diff options
| author | Saeed Bishara <saeed@marvell.com> | 2008-11-27 12:21:03 -0500 |
|---|---|---|
| committer | Nicolas Pitre <nico@cam.org> | 2008-12-02 16:53:26 -0500 |
| commit | 82676d76252680fc035247fd4cfdb07ffce5db52 (patch) | |
| tree | 6d6904370e364c279533a3db8c023fa1fe544bf8 | |
| parent | 020f97063dd68a8e3b9aac928ac49a438b7416ce (diff) | |
[ARM] Orion: fix bug in pcie configuration cycle function field mask
The function field is 3 bits.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
| -rw-r--r-- | arch/arm/plat-orion/pcie.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index 883902fead89..d41d41d78ad9 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c | |||
| @@ -35,7 +35,7 @@ | |||
| 35 | #define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) | 35 | #define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) |
| 36 | #define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) | 36 | #define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) |
| 37 | #define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) | 37 | #define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) |
| 38 | #define PCIE_CONF_FUNC(f) (((f) & 0x3) << 8) | 38 | #define PCIE_CONF_FUNC(f) (((f) & 0x7) << 8) |
| 39 | #define PCIE_CONF_DATA_OFF 0x18fc | 39 | #define PCIE_CONF_DATA_OFF 0x18fc |
| 40 | #define PCIE_MASK_OFF 0x1910 | 40 | #define PCIE_MASK_OFF 0x1910 |
| 41 | #define PCIE_CTRL_OFF 0x1a00 | 41 | #define PCIE_CTRL_OFF 0x1a00 |