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authorManuel Lauss <mano@roarinelk.homelinux.net>2007-01-25 01:22:11 -0500
committerPaul Mundt <lethal@linux-sh.org>2007-02-12 20:54:45 -0500
commit9f8a5e3a44d81bbf19fddeb74645dec6b0e23b23 (patch)
tree4dafea7b95e764eb9d01b66eca2800527171a7fa
parent6dcda6f1ecef86209ac161631837bc57172ba049 (diff)
sh: SH-DMAC compile fixes
This patch does the following: - remove the make_ipr_irq stuff from dma-sh.c and replace it with a simple channel<->irq mapping table. - add DMTEx_IRQ constants for sh4 cpus - fix sh7751 DMAE irq number The SH7780 uses the same IRQs for DMA as other SH4 types, so I put the constants on top of the dma.h file. Other CPU types need to #define their own DMTEx_IRQ contants in their appropriate header. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/drivers/dma/dma-sh.c45
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c2
-rw-r--r--include/asm-sh/cpu-sh4/dma.h11
3 files changed, 28 insertions, 30 deletions
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index f63721ed86c2..06ed0609a95d 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -19,34 +19,26 @@
19#include <asm/io.h> 19#include <asm/io.h>
20#include "dma-sh.h" 20#include "dma-sh.h"
21 21
22 22static int dmte_irq_map[] = {
23 23 DMTE0_IRQ,
24#ifdef CONFIG_CPU_SH4 24 DMTE1_IRQ,
25static struct ipr_data dmae_ipr_map[] = { 25 DMTE2_IRQ,
26 { DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY }, 26 DMTE3_IRQ,
27}; 27#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
28 defined(CONFIG_CPU_SUBTYPE_SH7760) || \
29 defined(CONFIG_CPU_SUBTYPE_SH7780)
30 DMTE4_IRQ,
31 DMTE5_IRQ,
32 DMTE6_IRQ,
33 DMTE7_IRQ,
28#endif 34#endif
29static struct ipr_data dmte_ipr_map[] = {
30 /*
31 * Normally we could just do DMTE0_IRQ + chan outright, though in the
32 * case of the 7751R, the DMTE IRQs for channels > 4 start right above
33 * the SCIF
34 */
35 { DMTE0_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
36 { DMTE0_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
37 { DMTE0_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
38 { DMTE0_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
39 { DMTE4_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
40 { DMTE4_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
41 { DMTE4_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
42 { DMTE4_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
43}; 35};
44 36
45static inline unsigned int get_dmte_irq(unsigned int chan) 37static inline unsigned int get_dmte_irq(unsigned int chan)
46{ 38{
47 unsigned int irq = 0; 39 unsigned int irq = 0;
48 if (chan < ARRAY_SIZE(dmte_ipr_map)) 40 if (chan < ARRAY_SIZE(dmte_irq_map))
49 irq = dmte_ipr_map[chan].irq; 41 irq = dmte_irq_map[chan];
50 return irq; 42 return irq;
51} 43}
52 44
@@ -103,7 +95,7 @@ static void sh_dmac_free_dma(struct dma_channel *chan)
103 free_irq(get_dmte_irq(chan->chan), chan); 95 free_irq(get_dmte_irq(chan->chan), chan);
104} 96}
105 97
106static void 98static int
107sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr) 99sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
108{ 100{
109 if (!chcr) 101 if (!chcr)
@@ -119,6 +111,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
119 ctrl_outl(chcr, CHCR[chan->chan]); 111 ctrl_outl(chcr, CHCR[chan->chan]);
120 112
121 chan->flags |= DMA_CONFIGURED; 113 chan->flags |= DMA_CONFIGURED;
114 return 0;
122} 115}
123 116
124static void sh_dmac_enable_dma(struct dma_channel *chan) 117static void sh_dmac_enable_dma(struct dma_channel *chan)
@@ -262,17 +255,11 @@ static int __init sh_dmac_init(void)
262 int i; 255 int i;
263 256
264#ifdef CONFIG_CPU_SH4 257#ifdef CONFIG_CPU_SH4
265 make_ipr_irq(dmae_ipr_map, ARRAY_SIZE(dmae_ipr_map));
266 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0); 258 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
267 if (unlikely(i < 0)) 259 if (unlikely(i < 0))
268 return i; 260 return i;
269#endif 261#endif
270 262
271 i = info->nr_channels;
272 if (i > ARRAY_SIZE(dmte_ipr_map))
273 i = ARRAY_SIZE(dmte_ipr_map);
274 make_ipr_irq(dmte_ipr_map, i);
275
276 /* 263 /*
277 * Initialize DMAOR, and clean up any error flags that may have 264 * Initialize DMAOR, and clean up any error flags that may have
278 * been set. 265 * been set.
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index cbac27634c0b..aa26245f0344 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -101,7 +101,7 @@ static struct ipr_data sh7750_ipr_map[] = {
101 { 35, 2, 8, 7 }, /* DMAC DMTE1 */ 101 { 35, 2, 8, 7 }, /* DMAC DMTE1 */
102 { 36, 2, 8, 7 }, /* DMAC DMTE2 */ 102 { 36, 2, 8, 7 }, /* DMAC DMTE2 */
103 { 37, 2, 8, 7 }, /* DMAC DMTE3 */ 103 { 37, 2, 8, 7 }, /* DMAC DMTE3 */
104 { 28, 2, 8, 7 }, /* DMAC DMAE */ 104 { 38, 2, 8, 7 }, /* DMAC DMAE */
105}; 105};
106 106
107static struct ipr_data sh7751_ipr_map[] = { 107static struct ipr_data sh7751_ipr_map[] = {
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h
index 3e4b3e6d80c0..c135e9cebd9c 100644
--- a/include/asm-sh/cpu-sh4/dma.h
+++ b/include/asm-sh/cpu-sh4/dma.h
@@ -3,6 +3,17 @@
3 3
4#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) 4#define DMAOR_INIT ( 0x8000 | DMAOR_DME )
5 5
6/* SH7751/7760/7780 DMA IRQ sources */
7#define DMTE0_IRQ 34
8#define DMTE1_IRQ 35
9#define DMTE2_IRQ 36
10#define DMTE3_IRQ 37
11#define DMTE4_IRQ 44
12#define DMTE5_IRQ 45
13#define DMTE6_IRQ 46
14#define DMTE7_IRQ 47
15#define DMAE_IRQ 38
16
6#ifdef CONFIG_CPU_SH4A 17#ifdef CONFIG_CPU_SH4A
7#define SH_DMAC_BASE 0xfc808020 18#define SH_DMAC_BASE 0xfc808020
8 19