diff options
author | Magnus Damm <damm@igel.co.jp> | 2008-07-17 06:18:24 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-07-28 05:10:37 -0400 |
commit | 8fa509ab915f668093c270151f884220232bfb25 (patch) | |
tree | 316da9d273a357944ad35243ba3d40d843881485 | |
parent | 6c7d826cf6ff05264f9af04410aee82a08edfb9f (diff) |
sh: Use clk_always_enable() on sh7343 / SE77343
Use clk_always_enable() on the sh7343 processor and in the board code
for Solution Engine 7343. Remove duplicate MSTPCR register definitions.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/boards/se/7343/setup.c | 4 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 15 | ||||
-rw-r--r-- | include/asm-sh/se7343.h | 4 |
3 files changed, 15 insertions, 8 deletions
diff --git a/arch/sh/boards/se/7343/setup.c b/arch/sh/boards/se/7343/setup.c index 59d8d94a8c29..8ae718d6c710 100644 --- a/arch/sh/boards/se/7343/setup.c +++ b/arch/sh/boards/se/7343/setup.c | |||
@@ -114,10 +114,6 @@ static void __init sh7343se_setup(char **cmdline_p) | |||
114 | { | 114 | { |
115 | ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ | 115 | ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ |
116 | 116 | ||
117 | ctrl_outl(0x00001001, MSTPCR0); | ||
118 | ctrl_outl(0x00000000, MSTPCR1); | ||
119 | ctrl_outl(0xffffbfC0, MSTPCR2); /* LCDC, BEU, CEU, VEU, KEYSC */ | ||
120 | |||
121 | ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ | 117 | ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ |
122 | ctrl_outw(0x0020, PORT_PSELD); | 118 | ctrl_outw(0x0020, PORT_PSELD); |
123 | 119 | ||
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 79ce34e19a2e..78881b4214da 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/serial.h> | 12 | #include <linux/serial.h> |
13 | #include <linux/serial_sci.h> | 13 | #include <linux/serial_sci.h> |
14 | #include <linux/uio_driver.h> | 14 | #include <linux/uio_driver.h> |
15 | #include <asm/clock.h> | ||
15 | 16 | ||
16 | static struct resource iic0_resources[] = { | 17 | static struct resource iic0_resources[] = { |
17 | [0] = { | 18 | [0] = { |
@@ -138,8 +139,22 @@ static struct platform_device *sh7343_devices[] __initdata = { | |||
138 | 139 | ||
139 | static int __init sh7343_devices_setup(void) | 140 | static int __init sh7343_devices_setup(void) |
140 | { | 141 | { |
142 | clk_always_enable("mstp031"); /* TLB */ | ||
143 | clk_always_enable("mstp030"); /* IC */ | ||
144 | clk_always_enable("mstp029"); /* OC */ | ||
145 | clk_always_enable("mstp028"); /* URAM */ | ||
146 | clk_always_enable("mstp026"); /* XYMEM */ | ||
147 | clk_always_enable("mstp023"); /* INTC3 */ | ||
148 | clk_always_enable("mstp022"); /* INTC */ | ||
149 | clk_always_enable("mstp020"); /* SuperHyway */ | ||
150 | clk_always_enable("mstp109"); /* I2C0 */ | ||
151 | clk_always_enable("mstp108"); /* I2C1 */ | ||
152 | clk_always_enable("mstp202"); /* VEU */ | ||
153 | clk_always_enable("mstp201"); /* VPU */ | ||
154 | |||
141 | platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); | 155 | platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); |
142 | platform_resource_setup_memory(&veu_device, "veu", 2 << 20); | 156 | platform_resource_setup_memory(&veu_device, "veu", 2 << 20); |
157 | |||
143 | return platform_add_devices(sh7343_devices, | 158 | return platform_add_devices(sh7343_devices, |
144 | ARRAY_SIZE(sh7343_devices)); | 159 | ARRAY_SIZE(sh7343_devices)); |
145 | } | 160 | } |
diff --git a/include/asm-sh/se7343.h b/include/asm-sh/se7343.h index 8d2af779fbc9..98458460e632 100644 --- a/include/asm-sh/se7343.h +++ b/include/asm-sh/se7343.h | |||
@@ -115,10 +115,6 @@ | |||
115 | #define PORT_PWDR 0xA4050166 | 115 | #define PORT_PWDR 0xA4050166 |
116 | #define PORT_PYDR 0xA4050168 | 116 | #define PORT_PYDR 0xA4050168 |
117 | 117 | ||
118 | #define MSTPCR0 0xA4150030 | ||
119 | #define MSTPCR1 0xA4150034 | ||
120 | #define MSTPCR2 0xA4150038 | ||
121 | |||
122 | #define FPGA_IN 0xb1400000 | 118 | #define FPGA_IN 0xb1400000 |
123 | #define FPGA_OUT 0xb1400002 | 119 | #define FPGA_OUT 0xb1400002 |
124 | 120 | ||