diff options
author | Roland McGrath <roland@redhat.com> | 2008-01-30 07:31:51 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:31:51 -0500 |
commit | 1eeaed7679eab3666d2d8c964d060c2169b3813b (patch) | |
tree | 2c2904e4ee8d75f30d00dd2367b12d37a5e3e55b | |
parent | 4421011120b2304e5c248ae4165a2704588aedf1 (diff) |
x86: x86 i387 cleanup
This removes all the old code that is no longer used after
the i387 unification and cleanup. The i387_64.h is renamed
to i387.h with no changes, but since it replaces the nonempty
one-line stub i387.h it looks like a big diff and not a rename.
Signed-off-by: Roland McGrath <roland@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | arch/x86/ia32/fpu32.c | 181 | ||||
-rw-r--r-- | arch/x86/kernel/i387_64.c | 119 | ||||
-rw-r--r-- | include/asm-x86/i387.h | 375 | ||||
-rw-r--r-- | include/asm-x86/i387_32.h | 149 | ||||
-rw-r--r-- | include/asm-x86/i387_64.h | 374 |
5 files changed, 374 insertions, 824 deletions
diff --git a/arch/x86/ia32/fpu32.c b/arch/x86/ia32/fpu32.c deleted file mode 100644 index ae80745f668f..000000000000 --- a/arch/x86/ia32/fpu32.c +++ /dev/null | |||
@@ -1,181 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2002 Andi Kleen, SuSE Labs. | ||
3 | * FXSAVE<->i387 conversion support. Based on code by Gareth Hughes. | ||
4 | * This is used for ptrace, signals and coredumps in 32bit emulation. | ||
5 | */ | ||
6 | |||
7 | #include <linux/sched.h> | ||
8 | #include <asm/sigcontext32.h> | ||
9 | #include <asm/processor.h> | ||
10 | #include <asm/uaccess.h> | ||
11 | #include <asm/i387.h> | ||
12 | |||
13 | static inline unsigned short twd_i387_to_fxsr(unsigned short twd) | ||
14 | { | ||
15 | unsigned int tmp; /* to avoid 16 bit prefixes in the code */ | ||
16 | |||
17 | /* Transform each pair of bits into 01 (valid) or 00 (empty) */ | ||
18 | tmp = ~twd; | ||
19 | tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */ | ||
20 | /* and move the valid bits to the lower byte. */ | ||
21 | tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */ | ||
22 | tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */ | ||
23 | tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */ | ||
24 | return tmp; | ||
25 | } | ||
26 | |||
27 | #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16); | ||
28 | #define FP_EXP_TAG_VALID 0 | ||
29 | #define FP_EXP_TAG_ZERO 1 | ||
30 | #define FP_EXP_TAG_SPECIAL 2 | ||
31 | #define FP_EXP_TAG_EMPTY 3 | ||
32 | |||
33 | static inline unsigned long twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave) | ||
34 | { | ||
35 | struct _fpxreg *st; | ||
36 | unsigned long tos = (fxsave->swd >> 11) & 7; | ||
37 | unsigned long twd = (unsigned long) fxsave->twd; | ||
38 | unsigned long tag; | ||
39 | unsigned long ret = 0xffff0000; | ||
40 | int i; | ||
41 | |||
42 | for (i = 0; i < 8; i++, twd >>= 1) { | ||
43 | if (twd & 0x1) { | ||
44 | st = FPREG_ADDR(fxsave, (i - tos) & 7); | ||
45 | |||
46 | switch (st->exponent & 0x7fff) { | ||
47 | case 0x7fff: | ||
48 | tag = FP_EXP_TAG_SPECIAL; | ||
49 | break; | ||
50 | case 0x0000: | ||
51 | if (!st->significand[0] && | ||
52 | !st->significand[1] && | ||
53 | !st->significand[2] && | ||
54 | !st->significand[3]) | ||
55 | tag = FP_EXP_TAG_ZERO; | ||
56 | else | ||
57 | tag = FP_EXP_TAG_SPECIAL; | ||
58 | break; | ||
59 | default: | ||
60 | if (st->significand[3] & 0x8000) | ||
61 | tag = FP_EXP_TAG_VALID; | ||
62 | else | ||
63 | tag = FP_EXP_TAG_SPECIAL; | ||
64 | break; | ||
65 | } | ||
66 | } else { | ||
67 | tag = FP_EXP_TAG_EMPTY; | ||
68 | } | ||
69 | ret |= tag << (2 * i); | ||
70 | } | ||
71 | return ret; | ||
72 | } | ||
73 | |||
74 | #define G(num, val) err |= __get_user(val, num + (u32 __user *)buf) | ||
75 | |||
76 | static inline int convert_fxsr_from_user(struct i387_fxsave_struct *fxsave, | ||
77 | struct _fpstate_ia32 __user *buf) | ||
78 | { | ||
79 | struct _fpxreg *to; | ||
80 | struct _fpreg __user *from; | ||
81 | int i, err = 0; | ||
82 | u32 v; | ||
83 | |||
84 | G(0, fxsave->cwd); | ||
85 | G(1, fxsave->swd); | ||
86 | G(2, fxsave->twd); | ||
87 | fxsave->twd = twd_i387_to_fxsr(fxsave->twd); | ||
88 | G(3, fxsave->rip); | ||
89 | G(4, v); | ||
90 | /* cs ignored */ | ||
91 | fxsave->fop = v>>16; | ||
92 | G(5, fxsave->rdp); | ||
93 | /* 6: ds ignored */ | ||
94 | if (err) | ||
95 | return -1; | ||
96 | |||
97 | to = (struct _fpxreg *)&fxsave->st_space[0]; | ||
98 | from = &buf->_st[0]; | ||
99 | for (i = 0; i < 8; i++, to++, from++) { | ||
100 | if (__copy_from_user(to, from, sizeof(*from))) | ||
101 | return -1; | ||
102 | } | ||
103 | return 0; | ||
104 | } | ||
105 | |||
106 | #define P(num, val) err |= __put_user(val, num + (u32 __user *)buf) | ||
107 | |||
108 | static inline int convert_fxsr_to_user(struct _fpstate_ia32 __user *buf, | ||
109 | struct i387_fxsave_struct *fxsave, | ||
110 | struct pt_regs *regs, | ||
111 | struct task_struct *tsk) | ||
112 | { | ||
113 | struct _fpreg __user *to; | ||
114 | struct _fpxreg *from; | ||
115 | int i, err = 0; | ||
116 | u16 cs, ds; | ||
117 | |||
118 | if (tsk == current) { | ||
119 | /* | ||
120 | * should be actually ds/cs at fpu exception time, but | ||
121 | * that information is not available in 64bit mode. | ||
122 | */ | ||
123 | asm("movw %%ds,%0 " : "=r" (ds)); | ||
124 | asm("movw %%cs,%0 " : "=r" (cs)); | ||
125 | } else { | ||
126 | /* ptrace. task has stopped. */ | ||
127 | ds = tsk->thread.ds; | ||
128 | cs = regs->cs; | ||
129 | } | ||
130 | |||
131 | P(0, (u32)fxsave->cwd | 0xffff0000); | ||
132 | P(1, (u32)fxsave->swd | 0xffff0000); | ||
133 | P(2, twd_fxsr_to_i387(fxsave)); | ||
134 | P(3, (u32)fxsave->rip); | ||
135 | P(4, cs | ((u32)fxsave->fop) << 16); | ||
136 | P(5, fxsave->rdp); | ||
137 | P(6, 0xffff0000 | ds); | ||
138 | |||
139 | if (err) | ||
140 | return -1; | ||
141 | |||
142 | to = &buf->_st[0]; | ||
143 | from = (struct _fpxreg *) &fxsave->st_space[0]; | ||
144 | for (i = 0; i < 8; i++, to++, from++) { | ||
145 | if (__copy_to_user(to, from, sizeof(*to))) | ||
146 | return -1; | ||
147 | } | ||
148 | return 0; | ||
149 | } | ||
150 | |||
151 | int restore_i387_ia32(struct task_struct *tsk, | ||
152 | struct _fpstate_ia32 __user *buf, int fsave) | ||
153 | { | ||
154 | clear_fpu(tsk); | ||
155 | if (!fsave) { | ||
156 | if (__copy_from_user(&tsk->thread.i387.fxsave, | ||
157 | &buf->_fxsr_env[0], | ||
158 | sizeof(struct i387_fxsave_struct))) | ||
159 | return -1; | ||
160 | tsk->thread.i387.fxsave.mxcsr &= mxcsr_feature_mask; | ||
161 | set_stopped_child_used_math(tsk); | ||
162 | } | ||
163 | return convert_fxsr_from_user(&tsk->thread.i387.fxsave, buf); | ||
164 | } | ||
165 | |||
166 | int save_i387_ia32(struct task_struct *tsk, struct _fpstate_ia32 __user *buf, | ||
167 | struct pt_regs *regs, int fsave) | ||
168 | { | ||
169 | int err = 0; | ||
170 | |||
171 | init_fpu(tsk); | ||
172 | if (convert_fxsr_to_user(buf, &tsk->thread.i387.fxsave, regs, tsk)) | ||
173 | return -1; | ||
174 | if (fsave) | ||
175 | return 0; | ||
176 | err |= __put_user(tsk->thread.i387.fxsave.swd, &buf->status); | ||
177 | err |= __put_user(X86_FXSR_MAGIC, &buf->magic); | ||
178 | err |= __copy_to_user(&buf->_fxsr_env[0], &tsk->thread.i387.fxsave, | ||
179 | sizeof(struct i387_fxsave_struct)); | ||
180 | return err ? -1 : 1; | ||
181 | } | ||
diff --git a/arch/x86/kernel/i387_64.c b/arch/x86/kernel/i387_64.c deleted file mode 100644 index f335a76d7ea7..000000000000 --- a/arch/x86/kernel/i387_64.c +++ /dev/null | |||
@@ -1,119 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1994 Linus Torvalds | ||
3 | * Copyright (C) 2002 Andi Kleen, SuSE Labs | ||
4 | * | ||
5 | * Pentium III FXSR, SSE support | ||
6 | * General FPU state handling cleanups | ||
7 | * Gareth Hughes <gareth@valinux.com>, May 2000 | ||
8 | * | ||
9 | * x86-64 rework 2002 Andi Kleen. | ||
10 | * Does direct fxsave in and out of user space now for signal handlers. | ||
11 | * All the FSAVE<->FXSAVE conversion code has been moved to the 32bit emulation, | ||
12 | * the 64bit user space sees a FXSAVE frame directly. | ||
13 | */ | ||
14 | |||
15 | #include <linux/sched.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <asm/processor.h> | ||
18 | #include <asm/i387.h> | ||
19 | #include <asm/sigcontext.h> | ||
20 | #include <asm/user.h> | ||
21 | #include <asm/ptrace.h> | ||
22 | #include <asm/uaccess.h> | ||
23 | |||
24 | unsigned int mxcsr_feature_mask __read_mostly = 0xffffffff; | ||
25 | |||
26 | void mxcsr_feature_mask_init(void) | ||
27 | { | ||
28 | unsigned int mask; | ||
29 | clts(); | ||
30 | memset(¤t->thread.i387.fxsave, 0, sizeof(struct i387_fxsave_struct)); | ||
31 | asm volatile("fxsave %0" : : "m" (current->thread.i387.fxsave)); | ||
32 | mask = current->thread.i387.fxsave.mxcsr_mask; | ||
33 | if (mask == 0) mask = 0x0000ffbf; | ||
34 | mxcsr_feature_mask &= mask; | ||
35 | stts(); | ||
36 | } | ||
37 | |||
38 | /* | ||
39 | * Called at bootup to set up the initial FPU state that is later cloned | ||
40 | * into all processes. | ||
41 | */ | ||
42 | void __cpuinit fpu_init(void) | ||
43 | { | ||
44 | unsigned long oldcr0 = read_cr0(); | ||
45 | extern void __bad_fxsave_alignment(void); | ||
46 | |||
47 | if (offsetof(struct task_struct, thread.i387.fxsave) & 15) | ||
48 | __bad_fxsave_alignment(); | ||
49 | set_in_cr4(X86_CR4_OSFXSR); | ||
50 | set_in_cr4(X86_CR4_OSXMMEXCPT); | ||
51 | |||
52 | write_cr0(oldcr0 & ~((1UL<<3)|(1UL<<2))); /* clear TS and EM */ | ||
53 | |||
54 | mxcsr_feature_mask_init(); | ||
55 | /* clean state in init */ | ||
56 | current_thread_info()->status = 0; | ||
57 | clear_used_math(); | ||
58 | } | ||
59 | |||
60 | void init_fpu(struct task_struct *child) | ||
61 | { | ||
62 | if (tsk_used_math(child)) { | ||
63 | if (child == current) | ||
64 | unlazy_fpu(child); | ||
65 | return; | ||
66 | } | ||
67 | memset(&child->thread.i387.fxsave, 0, sizeof(struct i387_fxsave_struct)); | ||
68 | child->thread.i387.fxsave.cwd = 0x37f; | ||
69 | child->thread.i387.fxsave.mxcsr = 0x1f80; | ||
70 | /* only the device not available exception or ptrace can call init_fpu */ | ||
71 | set_stopped_child_used_math(child); | ||
72 | } | ||
73 | |||
74 | /* | ||
75 | * ptrace request handlers. | ||
76 | */ | ||
77 | |||
78 | int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *tsk) | ||
79 | { | ||
80 | init_fpu(tsk); | ||
81 | return __copy_to_user(buf, &tsk->thread.i387.fxsave, | ||
82 | sizeof(struct user_i387_struct)) ? -EFAULT : 0; | ||
83 | } | ||
84 | |||
85 | int set_fpregs(struct task_struct *tsk, struct user_i387_struct __user *buf) | ||
86 | { | ||
87 | if (__copy_from_user(&tsk->thread.i387.fxsave, buf, | ||
88 | sizeof(struct user_i387_struct))) | ||
89 | return -EFAULT; | ||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | /* | ||
94 | * FPU state for core dumps. | ||
95 | */ | ||
96 | |||
97 | int dump_fpu( struct pt_regs *regs, struct user_i387_struct *fpu ) | ||
98 | { | ||
99 | struct task_struct *tsk = current; | ||
100 | |||
101 | if (!used_math()) | ||
102 | return 0; | ||
103 | |||
104 | unlazy_fpu(tsk); | ||
105 | memcpy(fpu, &tsk->thread.i387.fxsave, sizeof(struct user_i387_struct)); | ||
106 | return 1; | ||
107 | } | ||
108 | |||
109 | int dump_task_fpu(struct task_struct *tsk, struct user_i387_struct *fpu) | ||
110 | { | ||
111 | int fpvalid = !!tsk_used_math(tsk); | ||
112 | |||
113 | if (fpvalid) { | ||
114 | if (tsk == current) | ||
115 | unlazy_fpu(tsk); | ||
116 | memcpy(fpu, &tsk->thread.i387.fxsave, sizeof(struct user_i387_struct)); | ||
117 | } | ||
118 | return fpvalid; | ||
119 | } | ||
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h index b2bc0050ce99..de435b9114df 100644 --- a/include/asm-x86/i387.h +++ b/include/asm-x86/i387.h | |||
@@ -1 +1,374 @@ | |||
1 | #include "i387_64.h" | 1 | /* |
2 | * Copyright (C) 1994 Linus Torvalds | ||
3 | * | ||
4 | * Pentium III FXSR, SSE support | ||
5 | * General FPU state handling cleanups | ||
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | ||
7 | * x86-64 work by Andi Kleen 2002 | ||
8 | */ | ||
9 | |||
10 | #ifndef _ASM_X86_I387_H | ||
11 | #define _ASM_X86_I387_H | ||
12 | |||
13 | #include <linux/sched.h> | ||
14 | #include <linux/kernel_stat.h> | ||
15 | #include <linux/regset.h> | ||
16 | #include <asm/processor.h> | ||
17 | #include <asm/sigcontext.h> | ||
18 | #include <asm/user.h> | ||
19 | #include <asm/uaccess.h> | ||
20 | |||
21 | extern void fpu_init(void); | ||
22 | extern unsigned int mxcsr_feature_mask; | ||
23 | extern void mxcsr_feature_mask_init(void); | ||
24 | extern void init_fpu(struct task_struct *child); | ||
25 | extern asmlinkage void math_state_restore(void); | ||
26 | |||
27 | extern user_regset_active_fn fpregs_active, xfpregs_active; | ||
28 | extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get; | ||
29 | extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set; | ||
30 | |||
31 | #ifdef CONFIG_IA32_EMULATION | ||
32 | struct _fpstate_ia32; | ||
33 | extern int save_i387_ia32(struct _fpstate_ia32 __user *buf); | ||
34 | extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf); | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_X86_64 | ||
38 | |||
39 | /* Ignore delayed exceptions from user space */ | ||
40 | static inline void tolerant_fwait(void) | ||
41 | { | ||
42 | asm volatile("1: fwait\n" | ||
43 | "2:\n" | ||
44 | " .section __ex_table,\"a\"\n" | ||
45 | " .align 8\n" | ||
46 | " .quad 1b,2b\n" | ||
47 | " .previous\n"); | ||
48 | } | ||
49 | |||
50 | static inline int restore_fpu_checking(struct i387_fxsave_struct *fx) | ||
51 | { | ||
52 | int err; | ||
53 | |||
54 | asm volatile("1: rex64/fxrstor (%[fx])\n\t" | ||
55 | "2:\n" | ||
56 | ".section .fixup,\"ax\"\n" | ||
57 | "3: movl $-1,%[err]\n" | ||
58 | " jmp 2b\n" | ||
59 | ".previous\n" | ||
60 | ".section __ex_table,\"a\"\n" | ||
61 | " .align 8\n" | ||
62 | " .quad 1b,3b\n" | ||
63 | ".previous" | ||
64 | : [err] "=r" (err) | ||
65 | #if 0 /* See comment in __save_init_fpu() below. */ | ||
66 | : [fx] "r" (fx), "m" (*fx), "0" (0)); | ||
67 | #else | ||
68 | : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0)); | ||
69 | #endif | ||
70 | if (unlikely(err)) | ||
71 | init_fpu(current); | ||
72 | return err; | ||
73 | } | ||
74 | |||
75 | #define X87_FSW_ES (1 << 7) /* Exception Summary */ | ||
76 | |||
77 | /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception | ||
78 | is pending. Clear the x87 state here by setting it to fixed | ||
79 | values. The kernel data segment can be sometimes 0 and sometimes | ||
80 | new user value. Both should be ok. | ||
81 | Use the PDA as safe address because it should be already in L1. */ | ||
82 | static inline void clear_fpu_state(struct i387_fxsave_struct *fx) | ||
83 | { | ||
84 | if (unlikely(fx->swd & X87_FSW_ES)) | ||
85 | asm volatile("fnclex"); | ||
86 | alternative_input(ASM_NOP8 ASM_NOP2, | ||
87 | " emms\n" /* clear stack tags */ | ||
88 | " fildl %%gs:0", /* load to clear state */ | ||
89 | X86_FEATURE_FXSAVE_LEAK); | ||
90 | } | ||
91 | |||
92 | static inline int save_i387_checking(struct i387_fxsave_struct __user *fx) | ||
93 | { | ||
94 | int err; | ||
95 | |||
96 | asm volatile("1: rex64/fxsave (%[fx])\n\t" | ||
97 | "2:\n" | ||
98 | ".section .fixup,\"ax\"\n" | ||
99 | "3: movl $-1,%[err]\n" | ||
100 | " jmp 2b\n" | ||
101 | ".previous\n" | ||
102 | ".section __ex_table,\"a\"\n" | ||
103 | " .align 8\n" | ||
104 | " .quad 1b,3b\n" | ||
105 | ".previous" | ||
106 | : [err] "=r" (err), "=m" (*fx) | ||
107 | #if 0 /* See comment in __fxsave_clear() below. */ | ||
108 | : [fx] "r" (fx), "0" (0)); | ||
109 | #else | ||
110 | : [fx] "cdaSDb" (fx), "0" (0)); | ||
111 | #endif | ||
112 | if (unlikely(err) && __clear_user(fx, sizeof(struct i387_fxsave_struct))) | ||
113 | err = -EFAULT; | ||
114 | /* No need to clear here because the caller clears USED_MATH */ | ||
115 | return err; | ||
116 | } | ||
117 | |||
118 | static inline void __save_init_fpu(struct task_struct *tsk) | ||
119 | { | ||
120 | /* Using "rex64; fxsave %0" is broken because, if the memory operand | ||
121 | uses any extended registers for addressing, a second REX prefix | ||
122 | will be generated (to the assembler, rex64 followed by semicolon | ||
123 | is a separate instruction), and hence the 64-bitness is lost. */ | ||
124 | #if 0 | ||
125 | /* Using "fxsaveq %0" would be the ideal choice, but is only supported | ||
126 | starting with gas 2.16. */ | ||
127 | __asm__ __volatile__("fxsaveq %0" | ||
128 | : "=m" (tsk->thread.i387.fxsave)); | ||
129 | #elif 0 | ||
130 | /* Using, as a workaround, the properly prefixed form below isn't | ||
131 | accepted by any binutils version so far released, complaining that | ||
132 | the same type of prefix is used twice if an extended register is | ||
133 | needed for addressing (fix submitted to mainline 2005-11-21). */ | ||
134 | __asm__ __volatile__("rex64/fxsave %0" | ||
135 | : "=m" (tsk->thread.i387.fxsave)); | ||
136 | #else | ||
137 | /* This, however, we can work around by forcing the compiler to select | ||
138 | an addressing mode that doesn't require extended registers. */ | ||
139 | __asm__ __volatile__("rex64/fxsave %P2(%1)" | ||
140 | : "=m" (tsk->thread.i387.fxsave) | ||
141 | : "cdaSDb" (tsk), | ||
142 | "i" (offsetof(__typeof__(*tsk), | ||
143 | thread.i387.fxsave))); | ||
144 | #endif | ||
145 | clear_fpu_state(&tsk->thread.i387.fxsave); | ||
146 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
147 | } | ||
148 | |||
149 | /* | ||
150 | * Signal frame handlers. | ||
151 | */ | ||
152 | |||
153 | static inline int save_i387(struct _fpstate __user *buf) | ||
154 | { | ||
155 | struct task_struct *tsk = current; | ||
156 | int err = 0; | ||
157 | |||
158 | BUILD_BUG_ON(sizeof(struct user_i387_struct) != | ||
159 | sizeof(tsk->thread.i387.fxsave)); | ||
160 | |||
161 | if ((unsigned long)buf % 16) | ||
162 | printk("save_i387: bad fpstate %p\n", buf); | ||
163 | |||
164 | if (!used_math()) | ||
165 | return 0; | ||
166 | clear_used_math(); /* trigger finit */ | ||
167 | if (task_thread_info(tsk)->status & TS_USEDFPU) { | ||
168 | err = save_i387_checking((struct i387_fxsave_struct __user *)buf); | ||
169 | if (err) return err; | ||
170 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
171 | stts(); | ||
172 | } else { | ||
173 | if (__copy_to_user(buf, &tsk->thread.i387.fxsave, | ||
174 | sizeof(struct i387_fxsave_struct))) | ||
175 | return -1; | ||
176 | } | ||
177 | return 1; | ||
178 | } | ||
179 | |||
180 | /* | ||
181 | * This restores directly out of user space. Exceptions are handled. | ||
182 | */ | ||
183 | static inline int restore_i387(struct _fpstate __user *buf) | ||
184 | { | ||
185 | set_used_math(); | ||
186 | if (!(task_thread_info(current)->status & TS_USEDFPU)) { | ||
187 | clts(); | ||
188 | task_thread_info(current)->status |= TS_USEDFPU; | ||
189 | } | ||
190 | return restore_fpu_checking((__force struct i387_fxsave_struct *)buf); | ||
191 | } | ||
192 | |||
193 | #else /* CONFIG_X86_32 */ | ||
194 | |||
195 | static inline void tolerant_fwait(void) | ||
196 | { | ||
197 | asm volatile("fnclex ; fwait"); | ||
198 | } | ||
199 | |||
200 | static inline void restore_fpu(struct task_struct *tsk) | ||
201 | { | ||
202 | /* | ||
203 | * The "nop" is needed to make the instructions the same | ||
204 | * length. | ||
205 | */ | ||
206 | alternative_input( | ||
207 | "nop ; frstor %1", | ||
208 | "fxrstor %1", | ||
209 | X86_FEATURE_FXSR, | ||
210 | "m" ((tsk)->thread.i387.fxsave)); | ||
211 | } | ||
212 | |||
213 | /* We need a safe address that is cheap to find and that is already | ||
214 | in L1 during context switch. The best choices are unfortunately | ||
215 | different for UP and SMP */ | ||
216 | #ifdef CONFIG_SMP | ||
217 | #define safe_address (__per_cpu_offset[0]) | ||
218 | #else | ||
219 | #define safe_address (kstat_cpu(0).cpustat.user) | ||
220 | #endif | ||
221 | |||
222 | /* | ||
223 | * These must be called with preempt disabled | ||
224 | */ | ||
225 | static inline void __save_init_fpu(struct task_struct *tsk) | ||
226 | { | ||
227 | /* Use more nops than strictly needed in case the compiler | ||
228 | varies code */ | ||
229 | alternative_input( | ||
230 | "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4, | ||
231 | "fxsave %[fx]\n" | ||
232 | "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:", | ||
233 | X86_FEATURE_FXSR, | ||
234 | [fx] "m" (tsk->thread.i387.fxsave), | ||
235 | [fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory"); | ||
236 | /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception | ||
237 | is pending. Clear the x87 state here by setting it to fixed | ||
238 | values. safe_address is a random variable that should be in L1 */ | ||
239 | alternative_input( | ||
240 | GENERIC_NOP8 GENERIC_NOP2, | ||
241 | "emms\n\t" /* clear stack tags */ | ||
242 | "fildl %[addr]", /* set F?P to defined value */ | ||
243 | X86_FEATURE_FXSAVE_LEAK, | ||
244 | [addr] "m" (safe_address)); | ||
245 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
246 | } | ||
247 | |||
248 | /* | ||
249 | * Signal frame handlers... | ||
250 | */ | ||
251 | extern int save_i387(struct _fpstate __user *buf); | ||
252 | extern int restore_i387(struct _fpstate __user *buf); | ||
253 | |||
254 | #endif /* CONFIG_X86_64 */ | ||
255 | |||
256 | static inline void __unlazy_fpu(struct task_struct *tsk) | ||
257 | { | ||
258 | if (task_thread_info(tsk)->status & TS_USEDFPU) { | ||
259 | __save_init_fpu(tsk); | ||
260 | stts(); | ||
261 | } else | ||
262 | tsk->fpu_counter = 0; | ||
263 | } | ||
264 | |||
265 | static inline void __clear_fpu(struct task_struct *tsk) | ||
266 | { | ||
267 | if (task_thread_info(tsk)->status & TS_USEDFPU) { | ||
268 | tolerant_fwait(); | ||
269 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
270 | stts(); | ||
271 | } | ||
272 | } | ||
273 | |||
274 | static inline void kernel_fpu_begin(void) | ||
275 | { | ||
276 | struct thread_info *me = current_thread_info(); | ||
277 | preempt_disable(); | ||
278 | if (me->status & TS_USEDFPU) | ||
279 | __save_init_fpu(me->task); | ||
280 | else | ||
281 | clts(); | ||
282 | } | ||
283 | |||
284 | static inline void kernel_fpu_end(void) | ||
285 | { | ||
286 | stts(); | ||
287 | preempt_enable(); | ||
288 | } | ||
289 | |||
290 | #ifdef CONFIG_X86_64 | ||
291 | |||
292 | static inline void save_init_fpu(struct task_struct *tsk) | ||
293 | { | ||
294 | __save_init_fpu(tsk); | ||
295 | stts(); | ||
296 | } | ||
297 | |||
298 | #define unlazy_fpu __unlazy_fpu | ||
299 | #define clear_fpu __clear_fpu | ||
300 | |||
301 | #else /* CONFIG_X86_32 */ | ||
302 | |||
303 | /* | ||
304 | * These disable preemption on their own and are safe | ||
305 | */ | ||
306 | static inline void save_init_fpu(struct task_struct *tsk) | ||
307 | { | ||
308 | preempt_disable(); | ||
309 | __save_init_fpu(tsk); | ||
310 | stts(); | ||
311 | preempt_enable(); | ||
312 | } | ||
313 | |||
314 | static inline void unlazy_fpu(struct task_struct *tsk) | ||
315 | { | ||
316 | preempt_disable(); | ||
317 | __unlazy_fpu(tsk); | ||
318 | preempt_enable(); | ||
319 | } | ||
320 | |||
321 | static inline void clear_fpu(struct task_struct *tsk) | ||
322 | { | ||
323 | preempt_disable(); | ||
324 | __clear_fpu(tsk); | ||
325 | preempt_enable(); | ||
326 | } | ||
327 | |||
328 | #endif /* CONFIG_X86_64 */ | ||
329 | |||
330 | /* | ||
331 | * ptrace request handlers... | ||
332 | */ | ||
333 | extern int get_fpregs(struct user_i387_struct __user *buf, | ||
334 | struct task_struct *tsk); | ||
335 | extern int set_fpregs(struct task_struct *tsk, | ||
336 | struct user_i387_struct __user *buf); | ||
337 | |||
338 | struct user_fxsr_struct; | ||
339 | extern int get_fpxregs(struct user_fxsr_struct __user *buf, | ||
340 | struct task_struct *tsk); | ||
341 | extern int set_fpxregs(struct task_struct *tsk, | ||
342 | struct user_fxsr_struct __user *buf); | ||
343 | |||
344 | /* | ||
345 | * i387 state interaction | ||
346 | */ | ||
347 | static inline unsigned short get_fpu_cwd(struct task_struct *tsk) | ||
348 | { | ||
349 | if (cpu_has_fxsr) { | ||
350 | return tsk->thread.i387.fxsave.cwd; | ||
351 | } else { | ||
352 | return (unsigned short)tsk->thread.i387.fsave.cwd; | ||
353 | } | ||
354 | } | ||
355 | |||
356 | static inline unsigned short get_fpu_swd(struct task_struct *tsk) | ||
357 | { | ||
358 | if (cpu_has_fxsr) { | ||
359 | return tsk->thread.i387.fxsave.swd; | ||
360 | } else { | ||
361 | return (unsigned short)tsk->thread.i387.fsave.swd; | ||
362 | } | ||
363 | } | ||
364 | |||
365 | static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk) | ||
366 | { | ||
367 | if (cpu_has_xmm) { | ||
368 | return tsk->thread.i387.fxsave.mxcsr; | ||
369 | } else { | ||
370 | return MXCSR_DEFAULT; | ||
371 | } | ||
372 | } | ||
373 | |||
374 | #endif /* _ASM_X86_I387_H */ | ||
diff --git a/include/asm-x86/i387_32.h b/include/asm-x86/i387_32.h deleted file mode 100644 index 9ac2502cdd3d..000000000000 --- a/include/asm-x86/i387_32.h +++ /dev/null | |||
@@ -1,149 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1994 Linus Torvalds | ||
3 | * | ||
4 | * Pentium III FXSR, SSE support | ||
5 | * General FPU state handling cleanups | ||
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_I386_I387_H | ||
10 | #define __ASM_I386_I387_H | ||
11 | |||
12 | #include <linux/sched.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/kernel_stat.h> | ||
15 | #include <asm/processor.h> | ||
16 | #include <asm/sigcontext.h> | ||
17 | #include <asm/user.h> | ||
18 | |||
19 | extern void mxcsr_feature_mask_init(void); | ||
20 | extern void init_fpu(struct task_struct *); | ||
21 | |||
22 | /* | ||
23 | * FPU lazy state save handling... | ||
24 | */ | ||
25 | |||
26 | /* | ||
27 | * The "nop" is needed to make the instructions the same | ||
28 | * length. | ||
29 | */ | ||
30 | #define restore_fpu(tsk) \ | ||
31 | alternative_input( \ | ||
32 | "nop ; frstor %1", \ | ||
33 | "fxrstor %1", \ | ||
34 | X86_FEATURE_FXSR, \ | ||
35 | "m" ((tsk)->thread.i387.fxsave)) | ||
36 | |||
37 | extern void kernel_fpu_begin(void); | ||
38 | #define kernel_fpu_end() do { stts(); preempt_enable(); } while(0) | ||
39 | |||
40 | /* We need a safe address that is cheap to find and that is already | ||
41 | in L1 during context switch. The best choices are unfortunately | ||
42 | different for UP and SMP */ | ||
43 | #ifdef CONFIG_SMP | ||
44 | #define safe_address (__per_cpu_offset[0]) | ||
45 | #else | ||
46 | #define safe_address (kstat_cpu(0).cpustat.user) | ||
47 | #endif | ||
48 | |||
49 | /* | ||
50 | * These must be called with preempt disabled | ||
51 | */ | ||
52 | static inline void __save_init_fpu( struct task_struct *tsk ) | ||
53 | { | ||
54 | /* Use more nops than strictly needed in case the compiler | ||
55 | varies code */ | ||
56 | alternative_input( | ||
57 | "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4, | ||
58 | "fxsave %[fx]\n" | ||
59 | "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:", | ||
60 | X86_FEATURE_FXSR, | ||
61 | [fx] "m" (tsk->thread.i387.fxsave), | ||
62 | [fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory"); | ||
63 | /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception | ||
64 | is pending. Clear the x87 state here by setting it to fixed | ||
65 | values. safe_address is a random variable that should be in L1 */ | ||
66 | alternative_input( | ||
67 | GENERIC_NOP8 GENERIC_NOP2, | ||
68 | "emms\n\t" /* clear stack tags */ | ||
69 | "fildl %[addr]", /* set F?P to defined value */ | ||
70 | X86_FEATURE_FXSAVE_LEAK, | ||
71 | [addr] "m" (safe_address)); | ||
72 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
73 | } | ||
74 | |||
75 | #define __unlazy_fpu( tsk ) do { \ | ||
76 | if (task_thread_info(tsk)->status & TS_USEDFPU) { \ | ||
77 | __save_init_fpu(tsk); \ | ||
78 | stts(); \ | ||
79 | } else \ | ||
80 | tsk->fpu_counter = 0; \ | ||
81 | } while (0) | ||
82 | |||
83 | #define __clear_fpu( tsk ) \ | ||
84 | do { \ | ||
85 | if (task_thread_info(tsk)->status & TS_USEDFPU) { \ | ||
86 | asm volatile("fnclex ; fwait"); \ | ||
87 | task_thread_info(tsk)->status &= ~TS_USEDFPU; \ | ||
88 | stts(); \ | ||
89 | } \ | ||
90 | } while (0) | ||
91 | |||
92 | |||
93 | /* | ||
94 | * These disable preemption on their own and are safe | ||
95 | */ | ||
96 | static inline void save_init_fpu( struct task_struct *tsk ) | ||
97 | { | ||
98 | preempt_disable(); | ||
99 | __save_init_fpu(tsk); | ||
100 | stts(); | ||
101 | preempt_enable(); | ||
102 | } | ||
103 | |||
104 | #define unlazy_fpu( tsk ) do { \ | ||
105 | preempt_disable(); \ | ||
106 | __unlazy_fpu(tsk); \ | ||
107 | preempt_enable(); \ | ||
108 | } while (0) | ||
109 | |||
110 | #define clear_fpu( tsk ) do { \ | ||
111 | preempt_disable(); \ | ||
112 | __clear_fpu( tsk ); \ | ||
113 | preempt_enable(); \ | ||
114 | } while (0) | ||
115 | |||
116 | /* | ||
117 | * FPU state interaction... | ||
118 | */ | ||
119 | extern unsigned short get_fpu_cwd( struct task_struct *tsk ); | ||
120 | extern unsigned short get_fpu_swd( struct task_struct *tsk ); | ||
121 | extern unsigned short get_fpu_mxcsr( struct task_struct *tsk ); | ||
122 | extern asmlinkage void math_state_restore(void); | ||
123 | |||
124 | /* | ||
125 | * Signal frame handlers... | ||
126 | */ | ||
127 | extern int save_i387( struct _fpstate __user *buf ); | ||
128 | extern int restore_i387( struct _fpstate __user *buf ); | ||
129 | |||
130 | /* | ||
131 | * ptrace request handers... | ||
132 | */ | ||
133 | extern int get_fpregs( struct user_i387_struct __user *buf, | ||
134 | struct task_struct *tsk ); | ||
135 | extern int set_fpregs( struct task_struct *tsk, | ||
136 | struct user_i387_struct __user *buf ); | ||
137 | |||
138 | extern int get_fpxregs( struct user_fxsr_struct __user *buf, | ||
139 | struct task_struct *tsk ); | ||
140 | extern int set_fpxregs( struct task_struct *tsk, | ||
141 | struct user_fxsr_struct __user *buf ); | ||
142 | |||
143 | /* | ||
144 | * FPU state for core dumps... | ||
145 | */ | ||
146 | extern int dump_fpu( struct pt_regs *regs, | ||
147 | struct user_i387_struct *fpu ); | ||
148 | |||
149 | #endif /* __ASM_I386_I387_H */ | ||
diff --git a/include/asm-x86/i387_64.h b/include/asm-x86/i387_64.h deleted file mode 100644 index de435b9114df..000000000000 --- a/include/asm-x86/i387_64.h +++ /dev/null | |||
@@ -1,374 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1994 Linus Torvalds | ||
3 | * | ||
4 | * Pentium III FXSR, SSE support | ||
5 | * General FPU state handling cleanups | ||
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | ||
7 | * x86-64 work by Andi Kleen 2002 | ||
8 | */ | ||
9 | |||
10 | #ifndef _ASM_X86_I387_H | ||
11 | #define _ASM_X86_I387_H | ||
12 | |||
13 | #include <linux/sched.h> | ||
14 | #include <linux/kernel_stat.h> | ||
15 | #include <linux/regset.h> | ||
16 | #include <asm/processor.h> | ||
17 | #include <asm/sigcontext.h> | ||
18 | #include <asm/user.h> | ||
19 | #include <asm/uaccess.h> | ||
20 | |||
21 | extern void fpu_init(void); | ||
22 | extern unsigned int mxcsr_feature_mask; | ||
23 | extern void mxcsr_feature_mask_init(void); | ||
24 | extern void init_fpu(struct task_struct *child); | ||
25 | extern asmlinkage void math_state_restore(void); | ||
26 | |||
27 | extern user_regset_active_fn fpregs_active, xfpregs_active; | ||
28 | extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get; | ||
29 | extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set; | ||
30 | |||
31 | #ifdef CONFIG_IA32_EMULATION | ||
32 | struct _fpstate_ia32; | ||
33 | extern int save_i387_ia32(struct _fpstate_ia32 __user *buf); | ||
34 | extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf); | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_X86_64 | ||
38 | |||
39 | /* Ignore delayed exceptions from user space */ | ||
40 | static inline void tolerant_fwait(void) | ||
41 | { | ||
42 | asm volatile("1: fwait\n" | ||
43 | "2:\n" | ||
44 | " .section __ex_table,\"a\"\n" | ||
45 | " .align 8\n" | ||
46 | " .quad 1b,2b\n" | ||
47 | " .previous\n"); | ||
48 | } | ||
49 | |||
50 | static inline int restore_fpu_checking(struct i387_fxsave_struct *fx) | ||
51 | { | ||
52 | int err; | ||
53 | |||
54 | asm volatile("1: rex64/fxrstor (%[fx])\n\t" | ||
55 | "2:\n" | ||
56 | ".section .fixup,\"ax\"\n" | ||
57 | "3: movl $-1,%[err]\n" | ||
58 | " jmp 2b\n" | ||
59 | ".previous\n" | ||
60 | ".section __ex_table,\"a\"\n" | ||
61 | " .align 8\n" | ||
62 | " .quad 1b,3b\n" | ||
63 | ".previous" | ||
64 | : [err] "=r" (err) | ||
65 | #if 0 /* See comment in __save_init_fpu() below. */ | ||
66 | : [fx] "r" (fx), "m" (*fx), "0" (0)); | ||
67 | #else | ||
68 | : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0)); | ||
69 | #endif | ||
70 | if (unlikely(err)) | ||
71 | init_fpu(current); | ||
72 | return err; | ||
73 | } | ||
74 | |||
75 | #define X87_FSW_ES (1 << 7) /* Exception Summary */ | ||
76 | |||
77 | /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception | ||
78 | is pending. Clear the x87 state here by setting it to fixed | ||
79 | values. The kernel data segment can be sometimes 0 and sometimes | ||
80 | new user value. Both should be ok. | ||
81 | Use the PDA as safe address because it should be already in L1. */ | ||
82 | static inline void clear_fpu_state(struct i387_fxsave_struct *fx) | ||
83 | { | ||
84 | if (unlikely(fx->swd & X87_FSW_ES)) | ||
85 | asm volatile("fnclex"); | ||
86 | alternative_input(ASM_NOP8 ASM_NOP2, | ||
87 | " emms\n" /* clear stack tags */ | ||
88 | " fildl %%gs:0", /* load to clear state */ | ||
89 | X86_FEATURE_FXSAVE_LEAK); | ||
90 | } | ||
91 | |||
92 | static inline int save_i387_checking(struct i387_fxsave_struct __user *fx) | ||
93 | { | ||
94 | int err; | ||
95 | |||
96 | asm volatile("1: rex64/fxsave (%[fx])\n\t" | ||
97 | "2:\n" | ||
98 | ".section .fixup,\"ax\"\n" | ||
99 | "3: movl $-1,%[err]\n" | ||
100 | " jmp 2b\n" | ||
101 | ".previous\n" | ||
102 | ".section __ex_table,\"a\"\n" | ||
103 | " .align 8\n" | ||
104 | " .quad 1b,3b\n" | ||
105 | ".previous" | ||
106 | : [err] "=r" (err), "=m" (*fx) | ||
107 | #if 0 /* See comment in __fxsave_clear() below. */ | ||
108 | : [fx] "r" (fx), "0" (0)); | ||
109 | #else | ||
110 | : [fx] "cdaSDb" (fx), "0" (0)); | ||
111 | #endif | ||
112 | if (unlikely(err) && __clear_user(fx, sizeof(struct i387_fxsave_struct))) | ||
113 | err = -EFAULT; | ||
114 | /* No need to clear here because the caller clears USED_MATH */ | ||
115 | return err; | ||
116 | } | ||
117 | |||
118 | static inline void __save_init_fpu(struct task_struct *tsk) | ||
119 | { | ||
120 | /* Using "rex64; fxsave %0" is broken because, if the memory operand | ||
121 | uses any extended registers for addressing, a second REX prefix | ||
122 | will be generated (to the assembler, rex64 followed by semicolon | ||
123 | is a separate instruction), and hence the 64-bitness is lost. */ | ||
124 | #if 0 | ||
125 | /* Using "fxsaveq %0" would be the ideal choice, but is only supported | ||
126 | starting with gas 2.16. */ | ||
127 | __asm__ __volatile__("fxsaveq %0" | ||
128 | : "=m" (tsk->thread.i387.fxsave)); | ||
129 | #elif 0 | ||
130 | /* Using, as a workaround, the properly prefixed form below isn't | ||
131 | accepted by any binutils version so far released, complaining that | ||
132 | the same type of prefix is used twice if an extended register is | ||
133 | needed for addressing (fix submitted to mainline 2005-11-21). */ | ||
134 | __asm__ __volatile__("rex64/fxsave %0" | ||
135 | : "=m" (tsk->thread.i387.fxsave)); | ||
136 | #else | ||
137 | /* This, however, we can work around by forcing the compiler to select | ||
138 | an addressing mode that doesn't require extended registers. */ | ||
139 | __asm__ __volatile__("rex64/fxsave %P2(%1)" | ||
140 | : "=m" (tsk->thread.i387.fxsave) | ||
141 | : "cdaSDb" (tsk), | ||
142 | "i" (offsetof(__typeof__(*tsk), | ||
143 | thread.i387.fxsave))); | ||
144 | #endif | ||
145 | clear_fpu_state(&tsk->thread.i387.fxsave); | ||
146 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
147 | } | ||
148 | |||
149 | /* | ||
150 | * Signal frame handlers. | ||
151 | */ | ||
152 | |||
153 | static inline int save_i387(struct _fpstate __user *buf) | ||
154 | { | ||
155 | struct task_struct *tsk = current; | ||
156 | int err = 0; | ||
157 | |||
158 | BUILD_BUG_ON(sizeof(struct user_i387_struct) != | ||
159 | sizeof(tsk->thread.i387.fxsave)); | ||
160 | |||
161 | if ((unsigned long)buf % 16) | ||
162 | printk("save_i387: bad fpstate %p\n", buf); | ||
163 | |||
164 | if (!used_math()) | ||
165 | return 0; | ||
166 | clear_used_math(); /* trigger finit */ | ||
167 | if (task_thread_info(tsk)->status & TS_USEDFPU) { | ||
168 | err = save_i387_checking((struct i387_fxsave_struct __user *)buf); | ||
169 | if (err) return err; | ||
170 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
171 | stts(); | ||
172 | } else { | ||
173 | if (__copy_to_user(buf, &tsk->thread.i387.fxsave, | ||
174 | sizeof(struct i387_fxsave_struct))) | ||
175 | return -1; | ||
176 | } | ||
177 | return 1; | ||
178 | } | ||
179 | |||
180 | /* | ||
181 | * This restores directly out of user space. Exceptions are handled. | ||
182 | */ | ||
183 | static inline int restore_i387(struct _fpstate __user *buf) | ||
184 | { | ||
185 | set_used_math(); | ||
186 | if (!(task_thread_info(current)->status & TS_USEDFPU)) { | ||
187 | clts(); | ||
188 | task_thread_info(current)->status |= TS_USEDFPU; | ||
189 | } | ||
190 | return restore_fpu_checking((__force struct i387_fxsave_struct *)buf); | ||
191 | } | ||
192 | |||
193 | #else /* CONFIG_X86_32 */ | ||
194 | |||
195 | static inline void tolerant_fwait(void) | ||
196 | { | ||
197 | asm volatile("fnclex ; fwait"); | ||
198 | } | ||
199 | |||
200 | static inline void restore_fpu(struct task_struct *tsk) | ||
201 | { | ||
202 | /* | ||
203 | * The "nop" is needed to make the instructions the same | ||
204 | * length. | ||
205 | */ | ||
206 | alternative_input( | ||
207 | "nop ; frstor %1", | ||
208 | "fxrstor %1", | ||
209 | X86_FEATURE_FXSR, | ||
210 | "m" ((tsk)->thread.i387.fxsave)); | ||
211 | } | ||
212 | |||
213 | /* We need a safe address that is cheap to find and that is already | ||
214 | in L1 during context switch. The best choices are unfortunately | ||
215 | different for UP and SMP */ | ||
216 | #ifdef CONFIG_SMP | ||
217 | #define safe_address (__per_cpu_offset[0]) | ||
218 | #else | ||
219 | #define safe_address (kstat_cpu(0).cpustat.user) | ||
220 | #endif | ||
221 | |||
222 | /* | ||
223 | * These must be called with preempt disabled | ||
224 | */ | ||
225 | static inline void __save_init_fpu(struct task_struct *tsk) | ||
226 | { | ||
227 | /* Use more nops than strictly needed in case the compiler | ||
228 | varies code */ | ||
229 | alternative_input( | ||
230 | "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4, | ||
231 | "fxsave %[fx]\n" | ||
232 | "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:", | ||
233 | X86_FEATURE_FXSR, | ||
234 | [fx] "m" (tsk->thread.i387.fxsave), | ||
235 | [fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory"); | ||
236 | /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception | ||
237 | is pending. Clear the x87 state here by setting it to fixed | ||
238 | values. safe_address is a random variable that should be in L1 */ | ||
239 | alternative_input( | ||
240 | GENERIC_NOP8 GENERIC_NOP2, | ||
241 | "emms\n\t" /* clear stack tags */ | ||
242 | "fildl %[addr]", /* set F?P to defined value */ | ||
243 | X86_FEATURE_FXSAVE_LEAK, | ||
244 | [addr] "m" (safe_address)); | ||
245 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
246 | } | ||
247 | |||
248 | /* | ||
249 | * Signal frame handlers... | ||
250 | */ | ||
251 | extern int save_i387(struct _fpstate __user *buf); | ||
252 | extern int restore_i387(struct _fpstate __user *buf); | ||
253 | |||
254 | #endif /* CONFIG_X86_64 */ | ||
255 | |||
256 | static inline void __unlazy_fpu(struct task_struct *tsk) | ||
257 | { | ||
258 | if (task_thread_info(tsk)->status & TS_USEDFPU) { | ||
259 | __save_init_fpu(tsk); | ||
260 | stts(); | ||
261 | } else | ||
262 | tsk->fpu_counter = 0; | ||
263 | } | ||
264 | |||
265 | static inline void __clear_fpu(struct task_struct *tsk) | ||
266 | { | ||
267 | if (task_thread_info(tsk)->status & TS_USEDFPU) { | ||
268 | tolerant_fwait(); | ||
269 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
270 | stts(); | ||
271 | } | ||
272 | } | ||
273 | |||
274 | static inline void kernel_fpu_begin(void) | ||
275 | { | ||
276 | struct thread_info *me = current_thread_info(); | ||
277 | preempt_disable(); | ||
278 | if (me->status & TS_USEDFPU) | ||
279 | __save_init_fpu(me->task); | ||
280 | else | ||
281 | clts(); | ||
282 | } | ||
283 | |||
284 | static inline void kernel_fpu_end(void) | ||
285 | { | ||
286 | stts(); | ||
287 | preempt_enable(); | ||
288 | } | ||
289 | |||
290 | #ifdef CONFIG_X86_64 | ||
291 | |||
292 | static inline void save_init_fpu(struct task_struct *tsk) | ||
293 | { | ||
294 | __save_init_fpu(tsk); | ||
295 | stts(); | ||
296 | } | ||
297 | |||
298 | #define unlazy_fpu __unlazy_fpu | ||
299 | #define clear_fpu __clear_fpu | ||
300 | |||
301 | #else /* CONFIG_X86_32 */ | ||
302 | |||
303 | /* | ||
304 | * These disable preemption on their own and are safe | ||
305 | */ | ||
306 | static inline void save_init_fpu(struct task_struct *tsk) | ||
307 | { | ||
308 | preempt_disable(); | ||
309 | __save_init_fpu(tsk); | ||
310 | stts(); | ||
311 | preempt_enable(); | ||
312 | } | ||
313 | |||
314 | static inline void unlazy_fpu(struct task_struct *tsk) | ||
315 | { | ||
316 | preempt_disable(); | ||
317 | __unlazy_fpu(tsk); | ||
318 | preempt_enable(); | ||
319 | } | ||
320 | |||
321 | static inline void clear_fpu(struct task_struct *tsk) | ||
322 | { | ||
323 | preempt_disable(); | ||
324 | __clear_fpu(tsk); | ||
325 | preempt_enable(); | ||
326 | } | ||
327 | |||
328 | #endif /* CONFIG_X86_64 */ | ||
329 | |||
330 | /* | ||
331 | * ptrace request handlers... | ||
332 | */ | ||
333 | extern int get_fpregs(struct user_i387_struct __user *buf, | ||
334 | struct task_struct *tsk); | ||
335 | extern int set_fpregs(struct task_struct *tsk, | ||
336 | struct user_i387_struct __user *buf); | ||
337 | |||
338 | struct user_fxsr_struct; | ||
339 | extern int get_fpxregs(struct user_fxsr_struct __user *buf, | ||
340 | struct task_struct *tsk); | ||
341 | extern int set_fpxregs(struct task_struct *tsk, | ||
342 | struct user_fxsr_struct __user *buf); | ||
343 | |||
344 | /* | ||
345 | * i387 state interaction | ||
346 | */ | ||
347 | static inline unsigned short get_fpu_cwd(struct task_struct *tsk) | ||
348 | { | ||
349 | if (cpu_has_fxsr) { | ||
350 | return tsk->thread.i387.fxsave.cwd; | ||
351 | } else { | ||
352 | return (unsigned short)tsk->thread.i387.fsave.cwd; | ||
353 | } | ||
354 | } | ||
355 | |||
356 | static inline unsigned short get_fpu_swd(struct task_struct *tsk) | ||
357 | { | ||
358 | if (cpu_has_fxsr) { | ||
359 | return tsk->thread.i387.fxsave.swd; | ||
360 | } else { | ||
361 | return (unsigned short)tsk->thread.i387.fsave.swd; | ||
362 | } | ||
363 | } | ||
364 | |||
365 | static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk) | ||
366 | { | ||
367 | if (cpu_has_xmm) { | ||
368 | return tsk->thread.i387.fxsave.mxcsr; | ||
369 | } else { | ||
370 | return MXCSR_DEFAULT; | ||
371 | } | ||
372 | } | ||
373 | |||
374 | #endif /* _ASM_X86_I387_H */ | ||