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authorAndi Kleen <ak@suse.de>2006-10-21 18:38:23 -0400
committerAndi Kleen <andi@basil.nowhere.org>2006-10-21 18:38:23 -0400
commit37b1bccfe75691f5f42bf210d8a349f931896887 (patch)
tree13a4e7934f3597336ebdfde1d720b5f2c877ad6e
parentcb7fabcf9d4340b61f012cc7e8e3d7ff5c4f441c (diff)
[PATCH] x86-64: Fix C3 timer test
There was a typo in the C3 latency test to decide of the TSC should be used or not. It used the C2 latency threshold, not the C3 one. Fix that. This should fix the time on various dual core laptops. Signed-off-by: Andi Kleen <ak@suse.de>
-rw-r--r--arch/x86_64/kernel/time.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index 1ba5a442ac32..88722f11ca13 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -948,7 +948,7 @@ __cpuinit int unsynchronized_tsc(void)
948 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { 948 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
949#ifdef CONFIG_ACPI 949#ifdef CONFIG_ACPI
950 /* But TSC doesn't tick in C3 so don't use it there */ 950 /* But TSC doesn't tick in C3 so don't use it there */
951 if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100) 951 if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 1000)
952 return 1; 952 return 1;
953#endif 953#endif
954 return 0; 954 return 0;