[PATCH] i386: move SIMD initialization

Move some code unrelated to any dealing with hardware bugs from i386's
bugs.h to a more logical place.

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

2 files changed, 23 insertions, 22 deletions

diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c
index bb36a989db77..f0c4060bd4d5 100644
--- a/arch/i386/kernel/traps.c
+++ b/arch/i386/kernel/traps.c
@@ -1098,6 +1098,28 @@ void __init trap_init(void)
 #endif
         set_trap_gate(19,&simd_coprocessor_error);
 
+        if (cpu_has_fxsr) {
+                /*
+                 * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
+                 * Generates a compile-time "error: zero width for bit-field" if
+                 * the alignment is wrong.
+                 */
+                struct fxsrAlignAssert {
+                        int _:!(offsetof(struct task_struct,
+                                        thread.i387.fxsave) & 15);
+                };
+
+                printk(KERN_INFO "Enabling fast FPU save and restore... ");
+                set_in_cr4(X86_CR4_OSFXSR);
+                printk("done.\n");
+        }
+        if (cpu_has_xmm) {
+                printk(KERN_INFO "Enabling unmasked SIMD FPU exception "
+                                "support... ");
+                set_in_cr4(X86_CR4_OSXMMEXCPT);
+                printk("done.\n");
+        }
+
         set_system_gate(SYSCALL_VECTOR,&system_call);
 
         /*
diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h
index ea54540638d2..50233e0345fb 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-i386/bugs.h
@@ -8,9 +8,6 @@
  *        <rreilova@ececs.uc.edu>
  *      - Channing Corn (tests & fixes),
  *      - Andrew D. Balsa (code cleanup).
- *
- *  Pentium III FXSR, SSE support
- *      Gareth Hughes <gareth@valinux.com>, May 2000
  */
 
 /*
@@ -76,25 +73,7 @@ static void __init check_fpu(void)
                 return;
         }
 
-/* Enable FXSR and company _before_ testing for FP problems. */
-        /*
-         * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
-         */
-        if (offsetof(struct task_struct, thread.i387.fxsave) & 15) {
-                extern void __buggy_fxsr_alignment(void);
-                __buggy_fxsr_alignment();
-        }
-        if (cpu_has_fxsr) {
-                printk(KERN_INFO "Enabling fast FPU save and restore... ");
-                set_in_cr4(X86_CR4_OSFXSR);
-                printk("done.\n");
-        }
-        if (cpu_has_xmm) {
-                printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... ");
-                set_in_cr4(X86_CR4_OSXMMEXCPT);
-                printk("done.\n");
-        }
-
+/* trap_init() enabled FXSR and company _before_ testing for FP problems here. */
         /* Test for the divl bug.. */
         __asm__("fninit\n\t"
                 "fldl %1\n\t"