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authorBen Dooks <ben-linux@fluff.org>2006-09-14 08:29:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-14 08:29:15 -0400
commitc84cbb246e5a5235af30ddbe49d23bb1eaf64add (patch)
tree90ba1f16e562a64d4efe6e23470a90c74f9006e5
parenta55ee0ea51ae8f622cb3d69d81a47cb772952f73 (diff)
[ARM] 3785/1: S3C2412: Fix idle code as default uses wrong clocks
Patch from Ben Dooks Fix the idle code on the s3c2412 as the default code is using bits in the CLKCON register that are no-longer there. Provide an override for the idle code, and ensure that the power configuration is set to allow idle instead of stop or sleep. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-s3c2410/s3c2412.c29
-rw-r--r--include/asm-arm/arch-s3c2410/regs-power.h34
2 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2412.c b/arch/arm/mach-s3c2410/s3c2412.c
index e24ffd5e478b..2d163f7600be 100644
--- a/arch/arm/mach-s3c2410/s3c2412.c
+++ b/arch/arm/mach-s3c2410/s3c2412.c
@@ -35,11 +35,15 @@
35#include <asm/mach/irq.h> 35#include <asm/mach/irq.h>
36 36
37#include <asm/hardware.h> 37#include <asm/hardware.h>
38#include <asm/proc-fns.h>
38#include <asm/io.h> 39#include <asm/io.h>
39#include <asm/irq.h> 40#include <asm/irq.h>
40 41
42#include <asm/arch/idle.h>
43
41#include <asm/arch/regs-clock.h> 44#include <asm/arch/regs-clock.h>
42#include <asm/arch/regs-serial.h> 45#include <asm/arch/regs-serial.h>
46#include <asm/arch/regs-power.h>
43#include <asm/arch/regs-gpio.h> 47#include <asm/arch/regs-gpio.h>
44#include <asm/arch/regs-gpioj.h> 48#include <asm/arch/regs-gpioj.h>
45#include <asm/arch/regs-dsc.h> 49#include <asm/arch/regs-dsc.h>
@@ -75,6 +79,27 @@ void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
75 s3c_device_nand.name = "s3c2412-nand"; 79 s3c_device_nand.name = "s3c2412-nand";
76} 80}
77 81
82/* s3c2412_idle
83 *
84 * use the standard idle call by ensuring the idle mode
85 * in power config, then issuing the idle co-processor
86 * instruction
87*/
88
89static void s3c2412_idle(void)
90{
91 unsigned long tmp;
92
93 /* ensure our idle mode is to go to idle */
94
95 tmp = __raw_readl(S3C2412_PWRCFG);
96 tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK;
97 tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE;
98 __raw_writel(tmp, S3C2412_PWRCFG);
99
100 cpu_do_idle();
101}
102
78/* s3c2412_map_io 103/* s3c2412_map_io
79 * 104 *
80 * register the standard cpu IO areas, and any passed in from the 105 * register the standard cpu IO areas, and any passed in from the
@@ -87,6 +112,10 @@ void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
87 112
88 s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10; 113 s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10;
89 114
115 /* set our idle function */
116
117 s3c24xx_idle = s3c2412_idle;
118
90 /* register our io-tables */ 119 /* register our io-tables */
91 120
92 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); 121 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
diff --git a/include/asm-arm/arch-s3c2410/regs-power.h b/include/asm-arm/arch-s3c2410/regs-power.h
new file mode 100644
index 000000000000..6c319ea2afac
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/regs-power.h
@@ -0,0 +1,34 @@
1/* linux/include/asm/arch-s3c2410/regs-power.h
2 *
3 * Copyright (c) 2003,2004,2005,2006 Simtec Electronics <linux@simtec.co.uk>
4 * http://armlinux.simtec.co.uk/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C24XX power control register definitions
11*/
12
13#ifndef __ASM_ARM_REGS_PWR
14#define __ASM_ARM_REGS_PWR __FILE__
15
16#define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR)
17
18#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20)
19#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24)
20
21#define S3C2412_PWRCFG_BATF_IGNORE (0<<0)
22#define S3C2412_PWRCFG_BATF_SLEEP (3<<0)
23#define S3C2412_PWRCFG_BATF_MASK (3<<0)
24
25#define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0<<6)
26#define S3C2412_PWRCFG_STANDBYWFI_IDLE (1<<6)
27#define S3C2412_PWRCFG_STANDBYWFI_STOP (2<<6)
28#define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3<<6)
29#define S3C2412_PWRCFG_STANDBYWFI_MASK (3<<6)
30
31#define S3C2412_PWRCFG_RTC_MASKIRQ (1<<8)
32#define S3C2412_PWRCFG_NAND_NORST (1<<9)
33
34#endif /* __ASM_ARM_REGS_PWR */