diff options
author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2007-10-23 05:19:13 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-29 15:35:33 -0400 |
commit | c984c87826a6e3b2adae1fab8d5bddcf26af8c78 (patch) | |
tree | f326319dcd672bde4afcb69d128ba46df6d14e56 | |
parent | 2c771a4c28a71b6acc0bd6b7ef56e0a1849c9b09 (diff) |
[MIPS] time: Use non-interrupt locks in GT641xx clockevent driver
set_next_event() and set_mode() are always called with interrupt disabled.
irqsave and irqrestore are not necessary for spinlock.
Pointed out by Atsushi Nemoto.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/kernel/cevt-gt641xx.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c index 4c651b2680f9..155ef81ec216 100644 --- a/arch/mips/kernel/cevt-gt641xx.c +++ b/arch/mips/kernel/cevt-gt641xx.c | |||
@@ -49,10 +49,9 @@ int gt641xx_timer0_state(void) | |||
49 | static int gt641xx_timer0_set_next_event(unsigned long delta, | 49 | static int gt641xx_timer0_set_next_event(unsigned long delta, |
50 | struct clock_event_device *evt) | 50 | struct clock_event_device *evt) |
51 | { | 51 | { |
52 | unsigned long flags; | ||
53 | u32 ctrl; | 52 | u32 ctrl; |
54 | 53 | ||
55 | spin_lock_irqsave(>641xx_timer_lock, flags); | 54 | spin_lock(>641xx_timer_lock); |
56 | 55 | ||
57 | ctrl = GT_READ(GT_TC_CONTROL_OFS); | 56 | ctrl = GT_READ(GT_TC_CONTROL_OFS); |
58 | ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); | 57 | ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); |
@@ -61,7 +60,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta, | |||
61 | GT_WRITE(GT_TC0_OFS, delta); | 60 | GT_WRITE(GT_TC0_OFS, delta); |
62 | GT_WRITE(GT_TC_CONTROL_OFS, ctrl); | 61 | GT_WRITE(GT_TC_CONTROL_OFS, ctrl); |
63 | 62 | ||
64 | spin_unlock_irqrestore(>641xx_timer_lock, flags); | 63 | spin_unlock(>641xx_timer_lock); |
65 | 64 | ||
66 | return 0; | 65 | return 0; |
67 | } | 66 | } |
@@ -69,10 +68,9 @@ static int gt641xx_timer0_set_next_event(unsigned long delta, | |||
69 | static void gt641xx_timer0_set_mode(enum clock_event_mode mode, | 68 | static void gt641xx_timer0_set_mode(enum clock_event_mode mode, |
70 | struct clock_event_device *evt) | 69 | struct clock_event_device *evt) |
71 | { | 70 | { |
72 | unsigned long flags; | ||
73 | u32 ctrl; | 71 | u32 ctrl; |
74 | 72 | ||
75 | spin_lock_irqsave(>641xx_timer_lock, flags); | 73 | spin_lock(>641xx_timer_lock); |
76 | 74 | ||
77 | ctrl = GT_READ(GT_TC_CONTROL_OFS); | 75 | ctrl = GT_READ(GT_TC_CONTROL_OFS); |
78 | ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); | 76 | ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); |
@@ -90,7 +88,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode, | |||
90 | 88 | ||
91 | GT_WRITE(GT_TC_CONTROL_OFS, ctrl); | 89 | GT_WRITE(GT_TC_CONTROL_OFS, ctrl); |
92 | 90 | ||
93 | spin_unlock_irqrestore(>641xx_timer_lock, flags); | 91 | spin_unlock(>641xx_timer_lock); |
94 | } | 92 | } |
95 | 93 | ||
96 | static void gt641xx_timer0_event_handler(struct clock_event_device *dev) | 94 | static void gt641xx_timer0_event_handler(struct clock_event_device *dev) |