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authorMichael Buesch <mbuesch@freenet.de>2006-02-12 18:11:07 -0500
committerJohn W. Linville <linville@tuxdriver.com>2006-03-27 11:18:35 -0500
commit489423c8d0ba2b4311530502f7b5a331da9a60f9 (patch)
tree0bb259e3907eb33565e8140925b020400204e1b6
parentab4977f881fc23cb02ef6f20d1e8ebbdcfef75ad (diff)
[PATCH] bcm43xx: Code cleanups. This removes various "inline" statements and reduces codesize.
Signed-off-by: Michael Buesch <mbuesch@freenet.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx.h9
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_main.c281
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_main.h18
3 files changed, 127 insertions, 181 deletions
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx.h b/drivers/net/wireless/bcm43xx/bcm43xx.h
index 99b2e72281ea..848717513b5f 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx.h
+++ b/drivers/net/wireless/bcm43xx/bcm43xx.h
@@ -19,16 +19,17 @@
19 19
20#define PFX KBUILD_MODNAME ": " 20#define PFX KBUILD_MODNAME ": "
21 21
22#define BCM43xx_SWITCH_CORE_MAX_RETRIES 10 22#define BCM43xx_SWITCH_CORE_MAX_RETRIES 50
23#define BCM43xx_IRQWAIT_MAX_RETRIES 50 23#define BCM43xx_IRQWAIT_MAX_RETRIES 50
24 24
25#define BCM43xx_IO_SIZE 8192 25#define BCM43xx_IO_SIZE 8192
26#define BCM43xx_REG_ACTIVE_CORE 0x80
27 26
28/* Interrupt Control PCI Configuration Register. (Only on PCI cores with rev >= 6) */ 27/* Active Core PCI Configuration Register. */
29#define BCM43xx_PCICFG_ICR 0x94 28#define BCM43xx_PCICFG_ACTIVE_CORE 0x80
30/* SPROM control register. */ 29/* SPROM control register. */
31#define BCM43xx_PCICFG_SPROMCTL 0x88 30#define BCM43xx_PCICFG_SPROMCTL 0x88
31/* Interrupt Control PCI Configuration Register. (Only on PCI cores with rev >= 6) */
32#define BCM43xx_PCICFG_ICR 0x94
32 33
33/* MMIO offsets */ 34/* MMIO offsets */
34#define BCM43xx_MMIO_DMA1_REASON 0x20 35#define BCM43xx_MMIO_DMA1_REASON 0x20
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.c b/drivers/net/wireless/bcm43xx/bcm43xx_main.c
index 18152b0b2dd5..3443bd3c23e4 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx_main.c
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.c
@@ -119,40 +119,29 @@ MODULE_PARM_DESC(fwpostfix, "Postfix for .fw files. Useful for debugging.");
119//#define DEBUG_ENABLE_PCILOG 119//#define DEBUG_ENABLE_PCILOG
120 120
121 121
122static struct pci_device_id bcm43xx_pci_tbl[] = { 122/* Detailed list maintained at:
123 123 * http://openfacts.berlios.de/index-en.phtml?title=Bcm43xxDevices
124 /* Detailed list maintained at: 124 */
125 * http://openfacts.berlios.de/index-en.phtml?title=Bcm43xxDevices 125 static struct pci_device_id bcm43xx_pci_tbl[] = {
126 */
127
128#ifdef CONFIG_BCM947XX
129 /* SB bus on BCM947xx */
130 { PCI_VENDOR_ID_BROADCOM, 0x0800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
131#endif
132
133 /* Broadcom 4303 802.11b */ 126 /* Broadcom 4303 802.11b */
134 { PCI_VENDOR_ID_BROADCOM, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 127 { PCI_VENDOR_ID_BROADCOM, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
135 128 /* Broadcom 4307 802.11b */
136 /* Broadcom 4307 802.11b */
137 { PCI_VENDOR_ID_BROADCOM, 0x4307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 129 { PCI_VENDOR_ID_BROADCOM, 0x4307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
138 130 /* Broadcom 4318 802.11b/g */
139 /* Broadcom 4318 802.11b/g */
140 { PCI_VENDOR_ID_BROADCOM, 0x4318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 131 { PCI_VENDOR_ID_BROADCOM, 0x4318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
141
142 /* Broadcom 4306 802.11b/g */ 132 /* Broadcom 4306 802.11b/g */
143 { PCI_VENDOR_ID_BROADCOM, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 133 { PCI_VENDOR_ID_BROADCOM, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
144 134 /* Broadcom 4306 802.11a */
145 /* Broadcom 4306 802.11a */
146// { PCI_VENDOR_ID_BROADCOM, 0x4321, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 135// { PCI_VENDOR_ID_BROADCOM, 0x4321, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
147
148 /* Broadcom 4309 802.11a/b/g */ 136 /* Broadcom 4309 802.11a/b/g */
149 { PCI_VENDOR_ID_BROADCOM, 0x4324, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 137 { PCI_VENDOR_ID_BROADCOM, 0x4324, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
150
151 /* Broadcom 43XG 802.11b/g */ 138 /* Broadcom 43XG 802.11b/g */
152 { PCI_VENDOR_ID_BROADCOM, 0x4325, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 139 { PCI_VENDOR_ID_BROADCOM, 0x4325, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
153 140#ifdef CONFIG_BCM947XX
154 /* required last entry */ 141 /* SB bus on BCM947xx */
155 { 0, }, 142 { PCI_VENDOR_ID_BROADCOM, 0x0800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
143#endif
144 { 0 },
156}; 145};
157MODULE_DEVICE_TABLE(pci, bcm43xx_pci_tbl); 146MODULE_DEVICE_TABLE(pci, bcm43xx_pci_tbl);
158 147
@@ -353,9 +342,8 @@ void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf)
353 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status); 342 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
354} 343}
355 344
356static inline 345static u8 bcm43xx_plcp_get_bitrate(struct bcm43xx_plcp_hdr4 *plcp,
357u8 bcm43xx_plcp_get_bitrate(struct bcm43xx_plcp_hdr4 *plcp, 346 const int ofdm_modulation)
358 const int ofdm_modulation)
359{ 347{
360 u8 rate; 348 u8 rate;
361 349
@@ -412,8 +400,7 @@ u8 bcm43xx_plcp_get_bitrate(struct bcm43xx_plcp_hdr4 *plcp,
412 return rate; 400 return rate;
413} 401}
414 402
415static inline 403static u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate)
416u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate)
417{ 404{
418 switch (bitrate) { 405 switch (bitrate) {
419 case IEEE80211_CCK_RATE_1MB: 406 case IEEE80211_CCK_RATE_1MB:
@@ -429,8 +416,7 @@ u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate)
429 return 0; 416 return 0;
430} 417}
431 418
432static inline 419static u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate)
433u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate)
434{ 420{
435 switch (bitrate) { 421 switch (bitrate) {
436 case IEEE80211_OFDM_RATE_6MB: 422 case IEEE80211_OFDM_RATE_6MB:
@@ -489,13 +475,12 @@ static void bcm43xx_generate_plcp_hdr(struct bcm43xx_plcp_hdr4 *plcp,
489//bcm43xx_printk_bitdump(raw, 4, 0, "PLCP"); 475//bcm43xx_printk_bitdump(raw, 4, 0, "PLCP");
490} 476}
491 477
492void fastcall 478void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
493bcm43xx_generate_txhdr(struct bcm43xx_private *bcm, 479 struct bcm43xx_txhdr *txhdr,
494 struct bcm43xx_txhdr *txhdr, 480 const unsigned char *fragment_data,
495 const unsigned char *fragment_data, 481 unsigned int fragment_len,
496 unsigned int fragment_len, 482 const int is_first_fragment,
497 const int is_first_fragment, 483 const u16 cookie)
498 const u16 cookie)
499{ 484{
500 const struct bcm43xx_phyinfo *phy = bcm->current_core->phy; 485 const struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
501 const struct ieee80211_hdr_1addr *wireless_header = (const struct ieee80211_hdr_1addr *)fragment_data; 486 const struct ieee80211_hdr_1addr *wireless_header = (const struct ieee80211_hdr_1addr *)fragment_data;
@@ -606,9 +591,8 @@ void bcm43xx_macfilter_set(struct bcm43xx_private *bcm,
606 bcm43xx_write16(bcm, BCM43xx_MMIO_MACFILTER_DATA, data); 591 bcm43xx_write16(bcm, BCM43xx_MMIO_MACFILTER_DATA, data);
607} 592}
608 593
609static inline 594static void bcm43xx_macfilter_clear(struct bcm43xx_private *bcm,
610void bcm43xx_macfilter_clear(struct bcm43xx_private *bcm, 595 u16 offset)
611 u16 offset)
612{ 596{
613 const u8 zero_addr[ETH_ALEN] = { 0 }; 597 const u8 zero_addr[ETH_ALEN] = { 0 };
614 598
@@ -634,8 +618,7 @@ static void bcm43xx_write_mac_bssid_templates(struct bcm43xx_private *bcm)
634 bcm43xx_ram_write(bcm, 0x478 + i, *((u32 *)(mac_bssid + i))); 618 bcm43xx_ram_write(bcm, 0x478 + i, *((u32 *)(mac_bssid + i)));
635} 619}
636 620
637static inline 621static void bcm43xx_set_slot_time(struct bcm43xx_private *bcm, u16 slot_time)
638void bcm43xx_set_slot_time(struct bcm43xx_private *bcm, u16 slot_time)
639{ 622{
640 /* slot_time is in usec. */ 623 /* slot_time is in usec. */
641 if (bcm->current_core->phy->type != BCM43xx_PHYTYPE_G) 624 if (bcm->current_core->phy->type != BCM43xx_PHYTYPE_G)
@@ -644,14 +627,12 @@ void bcm43xx_set_slot_time(struct bcm43xx_private *bcm, u16 slot_time)
644 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0010, slot_time); 627 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0010, slot_time);
645} 628}
646 629
647static inline 630static void bcm43xx_short_slot_timing_enable(struct bcm43xx_private *bcm)
648void bcm43xx_short_slot_timing_enable(struct bcm43xx_private *bcm)
649{ 631{
650 bcm43xx_set_slot_time(bcm, 9); 632 bcm43xx_set_slot_time(bcm, 9);
651} 633}
652 634
653static inline 635static void bcm43xx_short_slot_timing_disable(struct bcm43xx_private *bcm)
654void bcm43xx_short_slot_timing_disable(struct bcm43xx_private *bcm)
655{ 636{
656 bcm43xx_set_slot_time(bcm, 20); 637 bcm43xx_set_slot_time(bcm, 20);
657} 638}
@@ -744,6 +725,8 @@ static int bcm43xx_disable_interrupts_sync(struct bcm43xx_private *bcm, u32 *old
744 725
745static int bcm43xx_read_radioinfo(struct bcm43xx_private *bcm) 726static int bcm43xx_read_radioinfo(struct bcm43xx_private *bcm)
746{ 727{
728 struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
729 struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
747 u32 radio_id; 730 u32 radio_id;
748 u16 manufact; 731 u16 manufact;
749 u16 version; 732 u16 version;
@@ -769,10 +752,10 @@ static int bcm43xx_read_radioinfo(struct bcm43xx_private *bcm)
769 version = (radio_id & 0x0FFFF000) >> 12; 752 version = (radio_id & 0x0FFFF000) >> 12;
770 revision = (radio_id & 0xF0000000) >> 28; 753 revision = (radio_id & 0xF0000000) >> 28;
771 754
772 dprintk(KERN_INFO PFX "Detected Radio: ID: %x (Manuf: %x Ver: %x Rev: %x)\n", 755 dprintk(KERN_INFO PFX "Detected Radio: ID: %x (Manuf: %x Ver: %x Rev: %x)\n",
773 radio_id, manufact, version, revision); 756 radio_id, manufact, version, revision);
774 757
775 switch (bcm->current_core->phy->type) { 758 switch (phy->type) {
776 case BCM43xx_PHYTYPE_A: 759 case BCM43xx_PHYTYPE_A:
777 if ((version != 0x2060) || (revision != 1) || (manufact != 0x17f)) 760 if ((version != 0x2060) || (revision != 1) || (manufact != 0x17f))
778 goto err_unsupported_radio; 761 goto err_unsupported_radio;
@@ -787,25 +770,25 @@ static int bcm43xx_read_radioinfo(struct bcm43xx_private *bcm)
787 break; 770 break;
788 } 771 }
789 772
790 bcm->current_core->radio->manufact = manufact; 773 radio->manufact = manufact;
791 bcm->current_core->radio->version = version; 774 radio->version = version;
792 bcm->current_core->radio->revision = revision; 775 radio->revision = revision;
793 776
794 /* Set default attenuation values. */ 777 /* Set default attenuation values. */
795 bcm->current_core->radio->txpower[0] = 2; 778 radio->txpower[0] = 2;
796 bcm->current_core->radio->txpower[1] = 2; 779 radio->txpower[1] = 2;
797 if (revision == 1) 780 if (revision == 1)
798 bcm->current_core->radio->txpower[2] = 3; 781 radio->txpower[2] = 3;
799 else 782 else
800 bcm->current_core->radio->txpower[2] = 0; 783 radio->txpower[2] = 0;
801 if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) 784 if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A)
802 bcm->current_core->radio->txpower_desired = bcm->sprom.maxpower_aphy; 785 radio->txpower_desired = bcm->sprom.maxpower_aphy;
803 else 786 else
804 bcm->current_core->radio->txpower_desired = bcm->sprom.maxpower_bgphy; 787 bcm->current_core->radio->txpower_desired = bcm->sprom.maxpower_bgphy;
805 788
806 /* Initialize the in-memory nrssi Lookup Table. */ 789 /* Initialize the in-memory nrssi Lookup Table. */
807 for (i = 0; i < 64; i++) 790 for (i = 0; i < 64; i++)
808 bcm->current_core->radio->nrssi_lt[i] = i; 791 radio->nrssi_lt[i] = i;
809 792
810 return 0; 793 return 0;
811 794
@@ -1155,6 +1138,7 @@ static void bcm43xx_geo_init(struct bcm43xx_private *bcm)
1155 */ 1138 */
1156void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm) 1139void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
1157{ 1140{
1141 struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
1158 unsigned int i, max_loop; 1142 unsigned int i, max_loop;
1159 u16 value = 0; 1143 u16 value = 0;
1160 u32 buffer[5] = { 1144 u32 buffer[5] = {
@@ -1165,7 +1149,7 @@ void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
1165 0x00000000, 1149 0x00000000,
1166 }; 1150 };
1167 1151
1168 switch (bcm->current_core->phy->type) { 1152 switch (phy->type) {
1169 case BCM43xx_PHYTYPE_A: 1153 case BCM43xx_PHYTYPE_A:
1170 max_loop = 0x1E; 1154 max_loop = 0x1E;
1171 buffer[0] = 0xCC010200; 1155 buffer[0] = 0xCC010200;
@@ -1187,7 +1171,7 @@ void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
1187 1171
1188 bcm43xx_write16(bcm, 0x0568, 0x0000); 1172 bcm43xx_write16(bcm, 0x0568, 0x0000);
1189 bcm43xx_write16(bcm, 0x07C0, 0x0000); 1173 bcm43xx_write16(bcm, 0x07C0, 0x0000);
1190 bcm43xx_write16(bcm, 0x050C, ((bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) ? 1 : 0)); 1174 bcm43xx_write16(bcm, 0x050C, ((phy->type == BCM43xx_PHYTYPE_A) ? 1 : 0));
1191 bcm43xx_write16(bcm, 0x0508, 0x0000); 1175 bcm43xx_write16(bcm, 0x0508, 0x0000);
1192 bcm43xx_write16(bcm, 0x050A, 0x0000); 1176 bcm43xx_write16(bcm, 0x050A, 0x0000);
1193 bcm43xx_write16(bcm, 0x054C, 0x0000); 1177 bcm43xx_write16(bcm, 0x054C, 0x0000);
@@ -1324,25 +1308,6 @@ static void bcm43xx_clear_keys(struct bcm43xx_private *bcm)
1324 dprintk(KERN_INFO PFX "Keys cleared\n"); 1308 dprintk(KERN_INFO PFX "Keys cleared\n");
1325} 1309}
1326 1310
1327/* Puts the index of the current core into user supplied core variable.
1328 * This function reads the value from the device.
1329 * Almost always you don't want to call this, but use bcm->current_core
1330 */
1331static inline
1332int _get_current_core(struct bcm43xx_private *bcm, int *core)
1333{
1334 int err;
1335
1336 err = bcm43xx_pci_read_config32(bcm, BCM43xx_REG_ACTIVE_CORE, core);
1337 if (unlikely(err)) {
1338 dprintk(KERN_ERR PFX "BCM43xx_REG_ACTIVE_CORE read failed!\n");
1339 return -ENODEV;
1340 }
1341 *core = (*core - 0x18000000) / 0x1000;
1342
1343 return 0;
1344}
1345
1346/* Lowlevel core-switch function. This is only to be used in 1311/* Lowlevel core-switch function. This is only to be used in
1347 * bcm43xx_switch_core() and bcm43xx_probe_cores() 1312 * bcm43xx_switch_core() and bcm43xx_probe_cores()
1348 */ 1313 */
@@ -1350,63 +1315,57 @@ static int _switch_core(struct bcm43xx_private *bcm, int core)
1350{ 1315{
1351 int err; 1316 int err;
1352 int attempts = 0; 1317 int attempts = 0;
1353 int current_core = -1; 1318 u32 current_core;
1354 1319
1355 assert(core >= 0); 1320 assert(core >= 0);
1356 1321 while (1) {
1357 err = _get_current_core(bcm, &current_core); 1322 err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_ACTIVE_CORE,
1358 if (unlikely(err))
1359 goto out;
1360
1361 /* Write the computed value to the register. This doesn't always
1362 succeed so we retry BCM43xx_SWITCH_CORE_MAX_RETRIES times */
1363 while (current_core != core) {
1364 if (unlikely(attempts++ > BCM43xx_SWITCH_CORE_MAX_RETRIES)) {
1365 err = -ENODEV;
1366 printk(KERN_ERR PFX
1367 "unable to switch to core %u, retried %i times\n",
1368 core, attempts);
1369 goto out;
1370 }
1371 err = bcm43xx_pci_write_config32(bcm, BCM43xx_REG_ACTIVE_CORE,
1372 (core * 0x1000) + 0x18000000); 1323 (core * 0x1000) + 0x18000000);
1373 if (unlikely(err)) { 1324 if (unlikely(err))
1374 dprintk(KERN_ERR PFX "BCM43xx_REG_ACTIVE_CORE write failed!\n"); 1325 goto error;
1375 continue; 1326 err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCICFG_ACTIVE_CORE,
1376 } 1327 &current_core);
1377 _get_current_core(bcm, &current_core); 1328 if (unlikely(err))
1329 goto error;
1330 current_core = (current_core - 0x18000000) / 0x1000;
1331 if (current_core == core)
1332 break;
1333
1334 if (unlikely(attempts++ > BCM43xx_SWITCH_CORE_MAX_RETRIES))
1335 goto error;
1336 udelay(10);
1337 }
1378#ifdef CONFIG_BCM947XX 1338#ifdef CONFIG_BCM947XX
1379 if (bcm->pci_dev->bus->number == 0) 1339 if (bcm->pci_dev->bus->number == 0)
1380 bcm->current_core_offset = 0x1000 * core; 1340 bcm->current_core_offset = 0x1000 * core;
1381 else 1341 else
1382 bcm->current_core_offset = 0; 1342 bcm->current_core_offset = 0;
1383#endif 1343#endif
1384 }
1385 1344
1386 assert(err == 0); 1345 return 0;
1387out: 1346error:
1388 return err; 1347 printk(KERN_ERR PFX "Failed to switch to core %d\n", core);
1348 return -ENODEV;
1389} 1349}
1390 1350
1391int bcm43xx_switch_core(struct bcm43xx_private *bcm, struct bcm43xx_coreinfo *new_core) 1351int bcm43xx_switch_core(struct bcm43xx_private *bcm, struct bcm43xx_coreinfo *new_core)
1392{ 1352{
1393 int err; 1353 int err;
1394 1354
1395 if (!new_core) 1355 if (unlikely(!new_core))
1396 return 0; 1356 return 0;
1397
1398 if (!(new_core->flags & BCM43xx_COREFLAG_AVAILABLE)) 1357 if (!(new_core->flags & BCM43xx_COREFLAG_AVAILABLE))
1399 return -ENODEV; 1358 return -ENODEV;
1400 if (bcm->current_core == new_core) 1359 if (bcm->current_core == new_core)
1401 return 0; 1360 return 0;
1402 err = _switch_core(bcm, new_core->index); 1361 err = _switch_core(bcm, new_core->index);
1403 if (!err) 1362 if (likely(!err))
1404 bcm->current_core = new_core; 1363 bcm->current_core = new_core;
1405 1364
1406 return err; 1365 return err;
1407} 1366}
1408 1367
1409static inline int bcm43xx_core_enabled(struct bcm43xx_private *bcm) 1368static int bcm43xx_core_enabled(struct bcm43xx_private *bcm)
1410{ 1369{
1411 u32 value; 1370 u32 value;
1412 1371
@@ -1609,7 +1568,7 @@ out:
1609 return err; 1568 return err;
1610} 1569}
1611 1570
1612static inline void handle_irq_transmit_status(struct bcm43xx_private *bcm) 1571static void handle_irq_transmit_status(struct bcm43xx_private *bcm)
1613{ 1572{
1614 u32 v0, v1; 1573 u32 v0, v1;
1615 u16 tmp; 1574 u16 tmp;
@@ -1648,7 +1607,7 @@ static inline void handle_irq_transmit_status(struct bcm43xx_private *bcm)
1648 } 1607 }
1649} 1608}
1650 1609
1651static inline void bcm43xx_generate_noise_sample(struct bcm43xx_private *bcm) 1610static void bcm43xx_generate_noise_sample(struct bcm43xx_private *bcm)
1652{ 1611{
1653 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x408, 0x7F7F); 1612 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x408, 0x7F7F);
1654 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x40A, 0x7F7F); 1613 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x40A, 0x7F7F);
@@ -1672,7 +1631,7 @@ static void bcm43xx_calculate_link_quality(struct bcm43xx_private *bcm)
1672 bcm43xx_generate_noise_sample(bcm); 1631 bcm43xx_generate_noise_sample(bcm);
1673} 1632}
1674 1633
1675static inline void handle_irq_noise(struct bcm43xx_private *bcm) 1634static void handle_irq_noise(struct bcm43xx_private *bcm)
1676{ 1635{
1677 struct bcm43xx_radioinfo *radio = bcm->current_core->radio; 1636 struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
1678 u16 tmp; 1637 u16 tmp;
@@ -1747,8 +1706,7 @@ generate_new:
1747 bcm43xx_generate_noise_sample(bcm); 1706 bcm43xx_generate_noise_sample(bcm);
1748} 1707}
1749 1708
1750static inline 1709static void handle_irq_ps(struct bcm43xx_private *bcm)
1751void handle_irq_ps(struct bcm43xx_private *bcm)
1752{ 1710{
1753 if (bcm->ieee->iw_mode == IW_MODE_MASTER) { 1711 if (bcm->ieee->iw_mode == IW_MODE_MASTER) {
1754 ///TODO: PS TBTT 1712 ///TODO: PS TBTT
@@ -1761,8 +1719,7 @@ void handle_irq_ps(struct bcm43xx_private *bcm)
1761 //FIXME else set to false? 1719 //FIXME else set to false?
1762} 1720}
1763 1721
1764static inline 1722static void handle_irq_reg124(struct bcm43xx_private *bcm)
1765void handle_irq_reg124(struct bcm43xx_private *bcm)
1766{ 1723{
1767 if (!bcm->reg124_set_0x4) 1724 if (!bcm->reg124_set_0x4)
1768 return; 1725 return;
@@ -1772,8 +1729,7 @@ void handle_irq_reg124(struct bcm43xx_private *bcm)
1772 //FIXME: reset reg124_set_0x4 to false? 1729 //FIXME: reset reg124_set_0x4 to false?
1773} 1730}
1774 1731
1775static inline 1732static void handle_irq_pmq(struct bcm43xx_private *bcm)
1776void handle_irq_pmq(struct bcm43xx_private *bcm)
1777{ 1733{
1778 u32 tmp; 1734 u32 tmp;
1779 1735
@@ -1829,8 +1785,7 @@ static void bcm43xx_generate_beacon_template(struct bcm43xx_private *bcm,
1829 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, shm_size_offset, size); 1785 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, shm_size_offset, size);
1830} 1786}
1831 1787
1832static inline 1788static void handle_irq_beacon(struct bcm43xx_private *bcm)
1833void handle_irq_beacon(struct bcm43xx_private *bcm)
1834{ 1789{
1835 u32 status; 1790 u32 status;
1836 1791
@@ -1992,9 +1947,8 @@ static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)
1992 1947
1993#undef bcmirq_print_reasons 1948#undef bcmirq_print_reasons
1994 1949
1995static inline 1950static void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm,
1996void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm, 1951 u32 reason, u32 mask)
1997 u32 reason, u32 mask)
1998{ 1952{
1999 bcm->dma_reason[0] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA1_REASON) 1953 bcm->dma_reason[0] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA1_REASON)
2000 & 0x0001dc00; 1954 & 0x0001dc00;
@@ -2340,7 +2294,7 @@ static int bcm43xx_initialize_irq(struct bcm43xx_private *bcm)
2340 SA_SHIRQ, KBUILD_MODNAME, bcm); 2294 SA_SHIRQ, KBUILD_MODNAME, bcm);
2341 if (res) { 2295 if (res) {
2342 printk(KERN_ERR PFX "Cannot register IRQ%d\n", bcm->irq); 2296 printk(KERN_ERR PFX "Cannot register IRQ%d\n", bcm->irq);
2343 return -EFAULT; 2297 return -ENODEV;
2344 } 2298 }
2345 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON, 0xffffffff); 2299 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON, 0xffffffff);
2346 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, 0x00020402); 2300 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, 0x00020402);
@@ -2367,7 +2321,7 @@ static int bcm43xx_initialize_irq(struct bcm43xx_private *bcm)
2367/* Switch to the core used to write the GPIO register. 2321/* Switch to the core used to write the GPIO register.
2368 * This is either the ChipCommon, or the PCI core. 2322 * This is either the ChipCommon, or the PCI core.
2369 */ 2323 */
2370static inline int switch_to_gpio_core(struct bcm43xx_private *bcm) 2324static int switch_to_gpio_core(struct bcm43xx_private *bcm)
2371{ 2325{
2372 int err; 2326 int err;
2373 2327
@@ -2379,13 +2333,13 @@ static inline int switch_to_gpio_core(struct bcm43xx_private *bcm)
2379 err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon); 2333 err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon);
2380 if (err == -ENODEV) { 2334 if (err == -ENODEV) {
2381 err = bcm43xx_switch_core(bcm, &bcm->core_pci); 2335 err = bcm43xx_switch_core(bcm, &bcm->core_pci);
2382 if (err == -ENODEV) { 2336 if (unlikely(err == -ENODEV)) {
2383 printk(KERN_ERR PFX "gpio error: " 2337 printk(KERN_ERR PFX "gpio error: "
2384 "Neither ChipCommon nor PCI core available!\n"); 2338 "Neither ChipCommon nor PCI core available!\n");
2385 return -ENODEV; 2339 return -ENODEV;
2386 } else if (err != 0) 2340 } else if (unlikely(err != 0))
2387 return -ENODEV; 2341 return -ENODEV;
2388 } else if (err != 0) 2342 } else if (unlikely(err != 0))
2389 return -ENODEV; 2343 return -ENODEV;
2390 2344
2391 return 0; 2345 return 0;
@@ -2691,40 +2645,30 @@ err_release_fw:
2691 * http://bcm-specs.sipsolutions.net/ValidateChipAccess */ 2645 * http://bcm-specs.sipsolutions.net/ValidateChipAccess */
2692static int bcm43xx_validate_chip(struct bcm43xx_private *bcm) 2646static int bcm43xx_validate_chip(struct bcm43xx_private *bcm)
2693{ 2647{
2694 int err = -ENODEV;
2695 u32 value; 2648 u32 value;
2696 u32 shm_backup; 2649 u32 shm_backup;
2697 2650
2698 shm_backup = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000); 2651 shm_backup = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000);
2699 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, 0xAA5555AA); 2652 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, 0xAA5555AA);
2700 if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0xAA5555AA) { 2653 if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0xAA5555AA)
2701 printk(KERN_ERR PFX "Error: SHM mismatch (1) validating chip\n"); 2654 goto error;
2702 goto out;
2703 }
2704
2705 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, 0x55AAAA55); 2655 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, 0x55AAAA55);
2706 if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0x55AAAA55) { 2656 if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0x55AAAA55)
2707 printk(KERN_ERR PFX "Error: SHM mismatch (2) validating chip\n"); 2657 goto error;
2708 goto out;
2709 }
2710
2711 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, shm_backup); 2658 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, shm_backup);
2712 2659
2713 value = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); 2660 value = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
2714 if ((value | 0x80000000) != 0x80000400) { 2661 if ((value | 0x80000000) != 0x80000400)
2715 printk(KERN_ERR PFX "Error: Bad Status Bitfield while validating chip\n"); 2662 goto error;
2716 goto out;
2717 }
2718 2663
2719 value = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON); 2664 value = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON);
2720 if (value != 0x00000000) { 2665 if (value != 0x00000000)
2721 printk(KERN_ERR PFX "Error: Bad interrupt reason code while validating chip\n"); 2666 goto error;
2722 goto out;
2723 }
2724 2667
2725 err = 0; 2668 return 0;
2726out: 2669error:
2727 return err; 2670 printk(KERN_ERR PFX "Failed to validate the chipaccess\n");
2671 return -ENODEV;
2728} 2672}
2729 2673
2730static int bcm43xx_probe_cores(struct bcm43xx_private *bcm) 2674static int bcm43xx_probe_cores(struct bcm43xx_private *bcm)
@@ -3172,9 +3116,9 @@ static void bcm43xx_chipset_detach(struct bcm43xx_private *bcm)
3172 bcm43xx_pctl_set_crystal(bcm, 0); 3116 bcm43xx_pctl_set_crystal(bcm, 0);
3173} 3117}
3174 3118
3175static inline void bcm43xx_pcicore_broadcast_value(struct bcm43xx_private *bcm, 3119static void bcm43xx_pcicore_broadcast_value(struct bcm43xx_private *bcm,
3176 u32 address, 3120 u32 address,
3177 u32 data) 3121 u32 data)
3178{ 3122{
3179 bcm43xx_write32(bcm, BCM43xx_PCICORE_BCAST_ADDR, address); 3123 bcm43xx_write32(bcm, BCM43xx_PCICORE_BCAST_ADDR, address);
3180 bcm43xx_write32(bcm, BCM43xx_PCICORE_BCAST_DATA, data); 3124 bcm43xx_write32(bcm, BCM43xx_PCICORE_BCAST_DATA, data);
@@ -3523,6 +3467,7 @@ static void bcm43xx_detach_board(struct bcm43xx_private *bcm)
3523 3467
3524static int bcm43xx_read_phyinfo(struct bcm43xx_private *bcm) 3468static int bcm43xx_read_phyinfo(struct bcm43xx_private *bcm)
3525{ 3469{
3470 struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
3526 u16 value; 3471 u16 value;
3527 u8 phy_version; 3472 u8 phy_version;
3528 u8 phy_type; 3473 u8 phy_type;
@@ -3578,15 +3523,15 @@ static int bcm43xx_read_phyinfo(struct bcm43xx_private *bcm)
3578 phy_rev); 3523 phy_rev);
3579 } 3524 }
3580 3525
3581 bcm->current_core->phy->version = phy_version; 3526 phy->version = phy_version;
3582 bcm->current_core->phy->type = phy_type; 3527 phy->type = phy_type;
3583 bcm->current_core->phy->rev = phy_rev; 3528 phy->rev = phy_rev;
3584 if ((phy_type == BCM43xx_PHYTYPE_B) || (phy_type == BCM43xx_PHYTYPE_G)) { 3529 if ((phy_type == BCM43xx_PHYTYPE_B) || (phy_type == BCM43xx_PHYTYPE_G)) {
3585 p = kzalloc(sizeof(struct bcm43xx_lopair) * BCM43xx_LO_COUNT, 3530 p = kzalloc(sizeof(struct bcm43xx_lopair) * BCM43xx_LO_COUNT,
3586 GFP_KERNEL); 3531 GFP_KERNEL);
3587 if (!p) 3532 if (!p)
3588 return -ENOMEM; 3533 return -ENOMEM;
3589 bcm->current_core->phy->_lo_pairs = p; 3534 phy->_lo_pairs = p;
3590 } 3535 }
3591 3536
3592 return 0; 3537 return 0;
@@ -3757,9 +3702,9 @@ err_pci_disable:
3757 goto out; 3702 goto out;
3758} 3703}
3759 3704
3760static inline 3705static s8 bcm43xx_rssi_postprocess(struct bcm43xx_private *bcm,
3761s8 bcm43xx_rssi_postprocess(struct bcm43xx_private *bcm, u8 in_rssi, 3706 u8 in_rssi, int ofdm,
3762 int ofdm, int adjust_2053, int adjust_2050) 3707 int adjust_2053, int adjust_2050)
3763{ 3708{
3764 s32 tmp; 3709 s32 tmp;
3765 3710
@@ -3816,8 +3761,8 @@ s8 bcm43xx_rssi_postprocess(struct bcm43xx_private *bcm, u8 in_rssi,
3816 return (s8)tmp; 3761 return (s8)tmp;
3817} 3762}
3818 3763
3819static inline 3764static s8 bcm43xx_rssinoise_postprocess(struct bcm43xx_private *bcm,
3820s8 bcm43xx_rssinoise_postprocess(struct bcm43xx_private *bcm, u8 in_rssi) 3765 u8 in_rssi)
3821{ 3766{
3822 s8 ret; 3767 s8 ret;
3823 3768
@@ -3843,9 +3788,9 @@ int bcm43xx_rx_packet(struct bcm43xx_private *bcm,
3843 return 0; 3788 return 0;
3844} 3789}
3845 3790
3846int fastcall bcm43xx_rx(struct bcm43xx_private *bcm, 3791int bcm43xx_rx(struct bcm43xx_private *bcm,
3847 struct sk_buff *skb, 3792 struct sk_buff *skb,
3848 struct bcm43xx_rxhdr *rxhdr) 3793 struct bcm43xx_rxhdr *rxhdr)
3849{ 3794{
3850 struct bcm43xx_plcp_hdr4 *plcp; 3795 struct bcm43xx_plcp_hdr4 *plcp;
3851 struct ieee80211_rx_stats stats; 3796 struct ieee80211_rx_stats stats;
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.h b/drivers/net/wireless/bcm43xx/bcm43xx_main.h
index 1d3eddd314bc..298e24b4ab64 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx_main.h
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.h
@@ -111,12 +111,12 @@ struct bcm43xx_txhdr {
111 111
112struct sk_buff; 112struct sk_buff;
113 113
114void FASTCALL(bcm43xx_generate_txhdr(struct bcm43xx_private *bcm, 114void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
115 struct bcm43xx_txhdr *txhdr, 115 struct bcm43xx_txhdr *txhdr,
116 const unsigned char *fragment_data, 116 const unsigned char *fragment_data,
117 const unsigned int fragment_len, 117 const unsigned int fragment_len,
118 const int is_first_fragment, 118 const int is_first_fragment,
119 const u16 cookie)); 119 const u16 cookie);
120 120
121/* RX header as received from the hardware. */ 121/* RX header as received from the hardware. */
122struct bcm43xx_rxhdr { 122struct bcm43xx_rxhdr {
@@ -244,9 +244,9 @@ int bcm43xx_is_valid_channel(struct bcm43xx_private *bcm,
244void bcm43xx_tsf_read(struct bcm43xx_private *bcm, u64 *tsf); 244void bcm43xx_tsf_read(struct bcm43xx_private *bcm, u64 *tsf);
245void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf); 245void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf);
246 246
247int FASTCALL(bcm43xx_rx(struct bcm43xx_private *bcm, 247int bcm43xx_rx(struct bcm43xx_private *bcm,
248 struct sk_buff *skb, 248 struct sk_buff *skb,
249 struct bcm43xx_rxhdr *rxhdr)); 249 struct bcm43xx_rxhdr *rxhdr);
250 250
251void bcm43xx_set_iwmode(struct bcm43xx_private *bcm, 251void bcm43xx_set_iwmode(struct bcm43xx_private *bcm,
252 int iw_mode); 252 int iw_mode);