diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-06 17:35:30 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-06 17:35:30 -0500 |
commit | e503606c5b7687842beb8fca46b827606ae40c63 (patch) | |
tree | 37003f6e8889d39fe64615809b3fffa395ce61cb | |
parent | 76c329563c5b8663ef27eb1bd195885ab826cbd0 (diff) | |
parent | d390008ebf42bdfda106e9de2b2d0abcc9858e26 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (40 commits)
[MIPS] Yosemite: Fix missing parens in SERIAL_READ_1 macro
[MIPS] Fix warnings in run_uncached on 32bit kernel
[MIPS] Comment fix
[MIPS] MT: Nuke duplicate mips_mt_regdump() prototype.
[MIPS] Alchemy: Fix PCI-memory access
[MIPS] Move .set reorder out of conditional code
[MIPS] Check FCSR for pending interrupts before restoring from a context.
[MIPS] Jaguar ATX: Fix large number of warnings.
[MIPS] Jaguar: Fix MAC address detection after platform_device conversion.
[MIPS] SMTC: Make a bunch of functions and variables static.
[MIPS] Use compat_sys_pselect6
[MIPS] SMTC: Cleanup idle hook invocation.
[MIPS] SELinux: Add security hooks to mips-mt {get,set}affinity
[MIPS] IRIX: Linux coding style cleanups.
[MIPS] PB1100: Fix pile of warnings
[MIPS] Alchemy: Fix bunch of warnings
[MIPS] Whitespace cleanups.
[MIPS] Alchemy: Fix bunch more warnings.
[MIPS] Use ARRAY_SIZE macro when appropriate
[MIPS] Fix some whitespace damage
...
152 files changed, 1111 insertions, 1052 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index bbd386f572d9..44a0224c32dd 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -575,6 +575,7 @@ config SGI_IP27 | |||
575 | select DMA_IP27 | 575 | select DMA_IP27 |
576 | select EARLY_PRINTK | 576 | select EARLY_PRINTK |
577 | select HW_HAS_PCI | 577 | select HW_HAS_PCI |
578 | select NR_CPUS_DEFAULT_64 | ||
578 | select PCI_DOMAINS | 579 | select PCI_DOMAINS |
579 | select SYS_HAS_CPU_R10000 | 580 | select SYS_HAS_CPU_R10000 |
580 | select SYS_SUPPORTS_64BIT_KERNEL | 581 | select SYS_SUPPORTS_64BIT_KERNEL |
@@ -612,6 +613,7 @@ config SIBYTE_BIGSUR | |||
612 | bool "Sibyte BCM91480B-BigSur" | 613 | bool "Sibyte BCM91480B-BigSur" |
613 | select BOOT_ELF32 | 614 | select BOOT_ELF32 |
614 | select DMA_COHERENT | 615 | select DMA_COHERENT |
616 | select NR_CPUS_DEFAULT_4 | ||
615 | select PCI_DOMAINS | 617 | select PCI_DOMAINS |
616 | select SIBYTE_BCM1x80 | 618 | select SIBYTE_BCM1x80 |
617 | select SWAP_IO_SPACE | 619 | select SWAP_IO_SPACE |
@@ -623,6 +625,7 @@ config SIBYTE_SWARM | |||
623 | bool "Sibyte BCM91250A-SWARM" | 625 | bool "Sibyte BCM91250A-SWARM" |
624 | select BOOT_ELF32 | 626 | select BOOT_ELF32 |
625 | select DMA_COHERENT | 627 | select DMA_COHERENT |
628 | select NR_CPUS_DEFAULT_2 | ||
626 | select SIBYTE_SB1250 | 629 | select SIBYTE_SB1250 |
627 | select SWAP_IO_SPACE | 630 | select SWAP_IO_SPACE |
628 | select SYS_HAS_CPU_SB1 | 631 | select SYS_HAS_CPU_SB1 |
@@ -635,6 +638,7 @@ config SIBYTE_SENTOSA | |||
635 | depends on EXPERIMENTAL | 638 | depends on EXPERIMENTAL |
636 | select BOOT_ELF32 | 639 | select BOOT_ELF32 |
637 | select DMA_COHERENT | 640 | select DMA_COHERENT |
641 | select NR_CPUS_DEFAULT_2 | ||
638 | select SIBYTE_SB1250 | 642 | select SIBYTE_SB1250 |
639 | select SWAP_IO_SPACE | 643 | select SWAP_IO_SPACE |
640 | select SYS_HAS_CPU_SB1 | 644 | select SYS_HAS_CPU_SB1 |
@@ -668,6 +672,7 @@ config SIBYTE_PTSWARM | |||
668 | depends on EXPERIMENTAL | 672 | depends on EXPERIMENTAL |
669 | select BOOT_ELF32 | 673 | select BOOT_ELF32 |
670 | select DMA_COHERENT | 674 | select DMA_COHERENT |
675 | select NR_CPUS_DEFAULT_2 | ||
671 | select SIBYTE_SB1250 | 676 | select SIBYTE_SB1250 |
672 | select SWAP_IO_SPACE | 677 | select SWAP_IO_SPACE |
673 | select SYS_HAS_CPU_SB1 | 678 | select SYS_HAS_CPU_SB1 |
@@ -680,6 +685,7 @@ config SIBYTE_LITTLESUR | |||
680 | depends on EXPERIMENTAL | 685 | depends on EXPERIMENTAL |
681 | select BOOT_ELF32 | 686 | select BOOT_ELF32 |
682 | select DMA_COHERENT | 687 | select DMA_COHERENT |
688 | select NR_CPUS_DEFAULT_2 | ||
683 | select SIBYTE_SB1250 | 689 | select SIBYTE_SB1250 |
684 | select SWAP_IO_SPACE | 690 | select SWAP_IO_SPACE |
685 | select SYS_HAS_CPU_SB1 | 691 | select SYS_HAS_CPU_SB1 |
@@ -790,23 +796,6 @@ config TOSHIBA_RBTX4938 | |||
790 | 796 | ||
791 | endchoice | 797 | endchoice |
792 | 798 | ||
793 | config KEXEC | ||
794 | bool "Kexec system call (EXPERIMENTAL)" | ||
795 | depends on EXPERIMENTAL | ||
796 | help | ||
797 | kexec is a system call that implements the ability to shutdown your | ||
798 | current kernel, and to start another kernel. It is like a reboot | ||
799 | but it is indepedent of the system firmware. And like a reboot | ||
800 | you can start any kernel with it, not just Linux. | ||
801 | |||
802 | The name comes from the similiarity to the exec system call. | ||
803 | |||
804 | It is an ongoing process to be certain the hardware in a machine | ||
805 | is properly shutdown, so do not be surprised if this code does not | ||
806 | initially work for you. It may help to enable device hotplugging | ||
807 | support. As of this writing the exact hardware interface is | ||
808 | strongly in flux, so no good recommendation can be made. | ||
809 | |||
810 | source "arch/mips/ddb5xxx/Kconfig" | 799 | source "arch/mips/ddb5xxx/Kconfig" |
811 | source "arch/mips/gt64120/ev64120/Kconfig" | 800 | source "arch/mips/gt64120/ev64120/Kconfig" |
812 | source "arch/mips/jazz/Kconfig" | 801 | source "arch/mips/jazz/Kconfig" |
@@ -1541,6 +1530,8 @@ config MIPS_MT_SMTC | |||
1541 | select CPU_MIPSR2_IRQ_VI | 1530 | select CPU_MIPSR2_IRQ_VI |
1542 | select CPU_MIPSR2_SRS | 1531 | select CPU_MIPSR2_SRS |
1543 | select MIPS_MT | 1532 | select MIPS_MT |
1533 | select NR_CPUS_DEFAULT_2 | ||
1534 | select NR_CPUS_DEFAULT_8 | ||
1544 | select SMP | 1535 | select SMP |
1545 | select SYS_SUPPORTS_SMP | 1536 | select SYS_SUPPORTS_SMP |
1546 | help | 1537 | help |
@@ -1756,13 +1747,34 @@ config SMP | |||
1756 | config SYS_SUPPORTS_SMP | 1747 | config SYS_SUPPORTS_SMP |
1757 | bool | 1748 | bool |
1758 | 1749 | ||
1750 | config NR_CPUS_DEFAULT_2 | ||
1751 | bool | ||
1752 | |||
1753 | config NR_CPUS_DEFAULT_4 | ||
1754 | bool | ||
1755 | |||
1756 | config NR_CPUS_DEFAULT_8 | ||
1757 | bool | ||
1758 | |||
1759 | config NR_CPUS_DEFAULT_16 | ||
1760 | bool | ||
1761 | |||
1762 | config NR_CPUS_DEFAULT_32 | ||
1763 | bool | ||
1764 | |||
1765 | config NR_CPUS_DEFAULT_64 | ||
1766 | bool | ||
1767 | |||
1759 | config NR_CPUS | 1768 | config NR_CPUS |
1760 | int "Maximum number of CPUs (2-64)" | 1769 | int "Maximum number of CPUs (2-64)" |
1761 | range 2 64 | 1770 | range 2 64 |
1762 | depends on SMP | 1771 | depends on SMP |
1763 | default "64" if SGI_IP27 | 1772 | default "2" if NR_CPUS_DEFAULT_2 |
1764 | default "2" | 1773 | default "4" if NR_CPUS_DEFAULT_4 |
1765 | default "8" if MIPS_MT_SMTC | 1774 | default "8" if NR_CPUS_DEFAULT_8 |
1775 | default "16" if NR_CPUS_DEFAULT_16 | ||
1776 | default "32" if NR_CPUS_DEFAULT_32 | ||
1777 | default "64" if NR_CPUS_DEFAULT_64 | ||
1766 | help | 1778 | help |
1767 | This allows you to specify the maximum number of CPUs which this | 1779 | This allows you to specify the maximum number of CPUs which this |
1768 | kernel will support. The maximum supported value is 32 for 32-bit | 1780 | kernel will support. The maximum supported value is 32 for 32-bit |
@@ -1859,6 +1871,40 @@ config MIPS_INSANE_LARGE | |||
1859 | This will result in additional memory usage, so it is not | 1871 | This will result in additional memory usage, so it is not |
1860 | recommended for normal users. | 1872 | recommended for normal users. |
1861 | 1873 | ||
1874 | config KEXEC | ||
1875 | bool "Kexec system call (EXPERIMENTAL)" | ||
1876 | depends on EXPERIMENTAL | ||
1877 | help | ||
1878 | kexec is a system call that implements the ability to shutdown your | ||
1879 | current kernel, and to start another kernel. It is like a reboot | ||
1880 | but it is indepedent of the system firmware. And like a reboot | ||
1881 | you can start any kernel with it, not just Linux. | ||
1882 | |||
1883 | The name comes from the similiarity to the exec system call. | ||
1884 | |||
1885 | It is an ongoing process to be certain the hardware in a machine | ||
1886 | is properly shutdown, so do not be surprised if this code does not | ||
1887 | initially work for you. It may help to enable device hotplugging | ||
1888 | support. As of this writing the exact hardware interface is | ||
1889 | strongly in flux, so no good recommendation can be made. | ||
1890 | |||
1891 | config SECCOMP | ||
1892 | bool "Enable seccomp to safely compute untrusted bytecode" | ||
1893 | depends on PROC_FS && BROKEN | ||
1894 | default y | ||
1895 | help | ||
1896 | This kernel feature is useful for number crunching applications | ||
1897 | that may need to compute untrusted bytecode during their | ||
1898 | execution. By using pipes or other transports made available to | ||
1899 | the process as file descriptors supporting the read/write | ||
1900 | syscalls, it's possible to isolate those applications in | ||
1901 | their own address space using seccomp. Once seccomp is | ||
1902 | enabled via /proc/<pid>/seccomp, it cannot be disabled | ||
1903 | and the task is only allowed to execute a few safe syscalls | ||
1904 | defined by each seccomp mode. | ||
1905 | |||
1906 | If unsure, say Y. Only embedded should say N here. | ||
1907 | |||
1862 | endmenu | 1908 | endmenu |
1863 | 1909 | ||
1864 | config RWSEM_GENERIC_SPINLOCK | 1910 | config RWSEM_GENERIC_SPINLOCK |
@@ -2025,23 +2071,6 @@ config BINFMT_ELF32 | |||
2025 | bool | 2071 | bool |
2026 | default y if MIPS32_O32 || MIPS32_N32 | 2072 | default y if MIPS32_O32 || MIPS32_N32 |
2027 | 2073 | ||
2028 | config SECCOMP | ||
2029 | bool "Enable seccomp to safely compute untrusted bytecode" | ||
2030 | depends on PROC_FS && BROKEN | ||
2031 | default y | ||
2032 | help | ||
2033 | This kernel feature is useful for number crunching applications | ||
2034 | that may need to compute untrusted bytecode during their | ||
2035 | execution. By using pipes or other transports made available to | ||
2036 | the process as file descriptors supporting the read/write | ||
2037 | syscalls, it's possible to isolate those applications in | ||
2038 | their own address space using seccomp. Once seccomp is | ||
2039 | enabled via /proc/<pid>/seccomp, it cannot be disabled | ||
2040 | and the task is only allowed to execute a few safe syscalls | ||
2041 | defined by each seccomp mode. | ||
2042 | |||
2043 | If unsure, say Y. Only embedded should say N here. | ||
2044 | |||
2045 | config PM | 2074 | config PM |
2046 | bool "Power Management support (EXPERIMENTAL)" | 2075 | bool "Power Management support (EXPERIMENTAL)" |
2047 | depends on EXPERIMENTAL && SOC_AU1X00 | 2076 | depends on EXPERIMENTAL && SOC_AU1X00 |
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 5d6afb52d904..9351f1c04a9d 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug | |||
@@ -22,10 +22,10 @@ config CMDLINE | |||
22 | string "Default kernel command string" | 22 | string "Default kernel command string" |
23 | default "" | 23 | default "" |
24 | help | 24 | help |
25 | On some platforms, there is currently no way for the boot loader to | 25 | On some platforms, there is currently no way for the boot loader to |
26 | pass arguments to the kernel. For these platforms, you can supply | 26 | pass arguments to the kernel. For these platforms, you can supply |
27 | some command-line options at build time by entering them here. In | 27 | some command-line options at build time by entering them here. In |
28 | other cases you can specify kernel args so that you don't have | 28 | other cases you can specify kernel args so that you don't have |
29 | to set them up in board prom initialization routines. | 29 | to set them up in board prom initialization routines. |
30 | 30 | ||
31 | config DEBUG_STACK_USAGE | 31 | config DEBUG_STACK_USAGE |
diff --git a/arch/mips/arc/identify.c b/arch/mips/arc/identify.c index 3ba7c47f9f23..4b907369b0f9 100644 --- a/arch/mips/arc/identify.c +++ b/arch/mips/arc/identify.c | |||
@@ -77,7 +77,7 @@ static struct smatch * __init string_to_mach(const char *s) | |||
77 | { | 77 | { |
78 | int i; | 78 | int i; |
79 | 79 | ||
80 | for (i = 0; i < (sizeof(mach_table) / sizeof (mach_table[0])); i++) { | 80 | for (i = 0; i < ARRAY_SIZE(mach_table); i++) { |
81 | if (!strcmp(s, mach_table[i].arcname)) | 81 | if (!strcmp(s, mach_table[i].arcname)) |
82 | return &mach_table[i]; | 82 | return &mach_table[i]; |
83 | } | 83 | } |
diff --git a/arch/mips/arc/memory.c b/arch/mips/arc/memory.c index 8a9ef58cc399..456cb81a32d9 100644 --- a/arch/mips/arc/memory.c +++ b/arch/mips/arc/memory.c | |||
@@ -141,30 +141,20 @@ void __init prom_meminit(void) | |||
141 | } | 141 | } |
142 | } | 142 | } |
143 | 143 | ||
144 | unsigned long __init prom_free_prom_memory(void) | 144 | void __init prom_free_prom_memory(void) |
145 | { | 145 | { |
146 | unsigned long freed = 0; | ||
147 | unsigned long addr; | 146 | unsigned long addr; |
148 | int i; | 147 | int i; |
149 | 148 | ||
150 | if (prom_flags & PROM_FLAG_DONT_FREE_TEMP) | 149 | if (prom_flags & PROM_FLAG_DONT_FREE_TEMP) |
151 | return 0; | 150 | return; |
152 | 151 | ||
153 | for (i = 0; i < boot_mem_map.nr_map; i++) { | 152 | for (i = 0; i < boot_mem_map.nr_map; i++) { |
154 | if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) | 153 | if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) |
155 | continue; | 154 | continue; |
156 | 155 | ||
157 | addr = boot_mem_map.map[i].addr; | 156 | addr = boot_mem_map.map[i].addr; |
158 | while (addr < boot_mem_map.map[i].addr | 157 | free_init_pages("prom memory", |
159 | + boot_mem_map.map[i].size) { | 158 | addr, addr + boot_mem_map.map[i].size); |
160 | ClearPageReserved(virt_to_page(__va(addr))); | ||
161 | init_page_count(virt_to_page(__va(addr))); | ||
162 | free_page((unsigned long)__va(addr)); | ||
163 | addr += PAGE_SIZE; | ||
164 | freed += PAGE_SIZE; | ||
165 | } | ||
166 | } | 159 | } |
167 | printk(KERN_INFO "Freeing prom memory: %ldkb freed\n", freed >> 10); | ||
168 | |||
169 | return freed; | ||
170 | } | 160 | } |
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index 9cf7b6715836..ea6e99fbe2f7 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c | |||
@@ -233,7 +233,7 @@ void restore_local_and_enable(int controller, unsigned long mask) | |||
233 | 233 | ||
234 | 234 | ||
235 | static struct irq_chip rise_edge_irq_type = { | 235 | static struct irq_chip rise_edge_irq_type = { |
236 | .typename = "Au1000 Rise Edge", | 236 | .name = "Au1000 Rise Edge", |
237 | .ack = mask_and_ack_rise_edge_irq, | 237 | .ack = mask_and_ack_rise_edge_irq, |
238 | .mask = local_disable_irq, | 238 | .mask = local_disable_irq, |
239 | .mask_ack = mask_and_ack_rise_edge_irq, | 239 | .mask_ack = mask_and_ack_rise_edge_irq, |
@@ -242,7 +242,7 @@ static struct irq_chip rise_edge_irq_type = { | |||
242 | }; | 242 | }; |
243 | 243 | ||
244 | static struct irq_chip fall_edge_irq_type = { | 244 | static struct irq_chip fall_edge_irq_type = { |
245 | .typename = "Au1000 Fall Edge", | 245 | .name = "Au1000 Fall Edge", |
246 | .ack = mask_and_ack_fall_edge_irq, | 246 | .ack = mask_and_ack_fall_edge_irq, |
247 | .mask = local_disable_irq, | 247 | .mask = local_disable_irq, |
248 | .mask_ack = mask_and_ack_fall_edge_irq, | 248 | .mask_ack = mask_and_ack_fall_edge_irq, |
@@ -251,7 +251,7 @@ static struct irq_chip fall_edge_irq_type = { | |||
251 | }; | 251 | }; |
252 | 252 | ||
253 | static struct irq_chip either_edge_irq_type = { | 253 | static struct irq_chip either_edge_irq_type = { |
254 | .typename = "Au1000 Rise or Fall Edge", | 254 | .name = "Au1000 Rise or Fall Edge", |
255 | .ack = mask_and_ack_either_edge_irq, | 255 | .ack = mask_and_ack_either_edge_irq, |
256 | .mask = local_disable_irq, | 256 | .mask = local_disable_irq, |
257 | .mask_ack = mask_and_ack_either_edge_irq, | 257 | .mask_ack = mask_and_ack_either_edge_irq, |
@@ -260,7 +260,7 @@ static struct irq_chip either_edge_irq_type = { | |||
260 | }; | 260 | }; |
261 | 261 | ||
262 | static struct irq_chip level_irq_type = { | 262 | static struct irq_chip level_irq_type = { |
263 | .typename = "Au1000 Level", | 263 | .name = "Au1000 Level", |
264 | .ack = mask_and_ack_level_irq, | 264 | .ack = mask_and_ack_level_irq, |
265 | .mask = local_disable_irq, | 265 | .mask = local_disable_irq, |
266 | .mask_ack = mask_and_ack_level_irq, | 266 | .mask_ack = mask_and_ack_level_irq, |
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c index 9f8ce08e173b..6c25e6c09f78 100644 --- a/arch/mips/au1000/common/pci.c +++ b/arch/mips/au1000/common/pci.c | |||
@@ -76,13 +76,17 @@ static int __init au1x_pci_setup(void) | |||
76 | } | 76 | } |
77 | 77 | ||
78 | #ifdef CONFIG_DMA_NONCOHERENT | 78 | #ifdef CONFIG_DMA_NONCOHERENT |
79 | /* | 79 | { |
80 | * Set the NC bit in controller for Au1500 pre-AC silicon | 80 | /* |
81 | */ | 81 | * Set the NC bit in controller for Au1500 pre-AC silicon |
82 | u32 prid = read_c0_prid(); | 82 | */ |
83 | if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { | 83 | u32 prid = read_c0_prid(); |
84 | au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG); | 84 | |
85 | printk("Non-coherent PCI accesses enabled\n"); | 85 | if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { |
86 | au_writel((1 << 16) | au_readl(Au1500_PCI_CFG), | ||
87 | Au1500_PCI_CFG); | ||
88 | printk("Non-coherent PCI accesses enabled\n"); | ||
89 | } | ||
86 | } | 90 | } |
87 | #endif | 91 | #endif |
88 | 92 | ||
diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/au1000/common/prom.c index 6fce60af005d..a8637cdb5b4b 100644 --- a/arch/mips/au1000/common/prom.c +++ b/arch/mips/au1000/common/prom.c | |||
@@ -149,9 +149,8 @@ int get_ethernet_addr(char *ethernet_addr) | |||
149 | return 0; | 149 | return 0; |
150 | } | 150 | } |
151 | 151 | ||
152 | unsigned long __init prom_free_prom_memory(void) | 152 | void __init prom_free_prom_memory(void) |
153 | { | 153 | { |
154 | return 0; | ||
155 | } | 154 | } |
156 | 155 | ||
157 | EXPORT_SYMBOL(prom_getcmdline); | 156 | EXPORT_SYMBOL(prom_getcmdline); |
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index 919172db560c..13fe187f35d6 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c | |||
@@ -141,17 +141,20 @@ void __init plat_mem_setup(void) | |||
141 | /* This routine should be valid for all Au1x based boards */ | 141 | /* This routine should be valid for all Au1x based boards */ |
142 | phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) | 142 | phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) |
143 | { | 143 | { |
144 | u32 start, end; | ||
145 | |||
146 | /* Don't fixup 36 bit addresses */ | 144 | /* Don't fixup 36 bit addresses */ |
147 | if ((phys_addr >> 32) != 0) return phys_addr; | 145 | if ((phys_addr >> 32) != 0) |
146 | return phys_addr; | ||
148 | 147 | ||
149 | #ifdef CONFIG_PCI | 148 | #ifdef CONFIG_PCI |
150 | start = (u32)Au1500_PCI_MEM_START; | 149 | { |
151 | end = (u32)Au1500_PCI_MEM_END; | 150 | u32 start, end; |
152 | /* check for pci memory window */ | 151 | |
153 | if ((phys_addr >= start) && ((phys_addr + size) < end)) { | 152 | start = (u32)Au1500_PCI_MEM_START; |
154 | return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START); | 153 | end = (u32)Au1500_PCI_MEM_END; |
154 | /* check for pci memory window */ | ||
155 | if ((phys_addr >= start) && ((phys_addr + size) < end)) | ||
156 | return (phys_t) | ||
157 | ((phys_addr - start) + Au1500_PCI_MEM_START); | ||
155 | } | 158 | } |
156 | #endif | 159 | #endif |
157 | 160 | ||
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c index 2d1533f116c0..6bc1f8e1b608 100644 --- a/arch/mips/au1000/pb1100/board_setup.c +++ b/arch/mips/au1000/pb1100/board_setup.c | |||
@@ -47,8 +47,7 @@ void board_reset (void) | |||
47 | 47 | ||
48 | void __init board_setup(void) | 48 | void __init board_setup(void) |
49 | { | 49 | { |
50 | u32 pin_func; | 50 | volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL; |
51 | u32 sys_freqctrl, sys_clksrc; | ||
52 | 51 | ||
53 | // set AUX clock to 12MHz * 8 = 96 MHz | 52 | // set AUX clock to 12MHz * 8 = 96 MHz |
54 | au_writel(8, SYS_AUXPLL); | 53 | au_writel(8, SYS_AUXPLL); |
@@ -56,58 +55,62 @@ void __init board_setup(void) | |||
56 | udelay(100); | 55 | udelay(100); |
57 | 56 | ||
58 | #ifdef CONFIG_USB_OHCI | 57 | #ifdef CONFIG_USB_OHCI |
59 | // configure pins GPIO[14:9] as GPIO | 58 | { |
60 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); | 59 | u32 pin_func, sys_freqctrl, sys_clksrc; |
61 | 60 | ||
62 | /* zero and disable FREQ2 */ | 61 | // configure pins GPIO[14:9] as GPIO |
63 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | 62 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); |
64 | sys_freqctrl &= ~0xFFF00000; | 63 | |
65 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | 64 | /* zero and disable FREQ2 */ |
66 | 65 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
67 | /* zero and disable USBH/USBD/IrDA clock */ | 66 | sys_freqctrl &= ~0xFFF00000; |
68 | sys_clksrc = au_readl(SYS_CLKSRC); | 67 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
69 | sys_clksrc &= ~0x0000001F; | 68 | |
70 | au_writel(sys_clksrc, SYS_CLKSRC); | 69 | /* zero and disable USBH/USBD/IrDA clock */ |
71 | 70 | sys_clksrc = au_readl(SYS_CLKSRC); | |
72 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | 71 | sys_clksrc &= ~0x0000001F; |
73 | sys_freqctrl &= ~0xFFF00000; | 72 | au_writel(sys_clksrc, SYS_CLKSRC); |
74 | 73 | ||
75 | sys_clksrc = au_readl(SYS_CLKSRC); | 74 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
76 | sys_clksrc &= ~0x0000001F; | 75 | sys_freqctrl &= ~0xFFF00000; |
77 | 76 | ||
78 | // FREQ2 = aux/2 = 48 MHz | 77 | sys_clksrc = au_readl(SYS_CLKSRC); |
79 | sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); | 78 | sys_clksrc &= ~0x0000001F; |
80 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | 79 | |
81 | 80 | // FREQ2 = aux/2 = 48 MHz | |
82 | /* | 81 | sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); |
83 | * Route 48MHz FREQ2 into USBH/USBD/IrDA | 82 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
84 | */ | 83 | |
85 | sys_clksrc |= ((4<<2) | (0<<1) | 0 ); | 84 | /* |
86 | au_writel(sys_clksrc, SYS_CLKSRC); | 85 | * Route 48MHz FREQ2 into USBH/USBD/IrDA |
87 | 86 | */ | |
88 | /* setup the static bus controller */ | 87 | sys_clksrc |= ((4<<2) | (0<<1) | 0 ); |
89 | au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ | 88 | au_writel(sys_clksrc, SYS_CLKSRC); |
90 | au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ | 89 | |
91 | au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ | 90 | /* setup the static bus controller */ |
92 | 91 | au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ | |
93 | // get USB Functionality pin state (device vs host drive pins) | 92 | au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ |
94 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); | 93 | au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ |
95 | // 2nd USB port is USB host | 94 | |
96 | pin_func |= 0x8000; | 95 | // get USB Functionality pin state (device vs host drive pins) |
97 | au_writel(pin_func, SYS_PINFUNC); | 96 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); |
97 | // 2nd USB port is USB host | ||
98 | pin_func |= 0x8000; | ||
99 | au_writel(pin_func, SYS_PINFUNC); | ||
100 | } | ||
98 | #endif // defined (CONFIG_USB_OHCI) | 101 | #endif // defined (CONFIG_USB_OHCI) |
99 | 102 | ||
100 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ | 103 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ |
101 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); | 104 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); |
102 | 105 | ||
103 | // Enable the RTC if not already enabled | 106 | // Enable the RTC if not already enabled |
104 | if (!(readb(0xac000028) & 0x20)) { | 107 | if (!(readb(base + 0x28) & 0x20)) { |
105 | writeb(readb(0xac000028) | 0x20, 0xac000028); | 108 | writeb(readb(base + 0x28) | 0x20, base + 0x28); |
106 | au_sync(); | 109 | au_sync(); |
107 | } | 110 | } |
108 | // Put the clock in BCD mode | 111 | // Put the clock in BCD mode |
109 | if (readb(0xac00002C) & 0x4) { /* reg B */ | 112 | if (readb(base + 0x2C) & 0x4) { /* reg B */ |
110 | writeb(readb(0xac00002c) & ~0x4, 0xac00002c); | 113 | writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); |
111 | au_sync(); | 114 | au_sync(); |
112 | } | 115 | } |
113 | } | 116 | } |
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c index 91983ba407c4..b73b2d18bf56 100644 --- a/arch/mips/au1000/pb1200/irqmap.c +++ b/arch/mips/au1000/pb1200/irqmap.c | |||
@@ -137,33 +137,20 @@ static void pb1200_shutdown_irq( unsigned int irq_nr ) | |||
137 | return; | 137 | return; |
138 | } | 138 | } |
139 | 139 | ||
140 | static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr) | ||
141 | { | ||
142 | pb1200_disable_irq( irq_nr ); | ||
143 | } | ||
144 | |||
145 | static void pb1200_end_irq(unsigned int irq_nr) | ||
146 | { | ||
147 | if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { | ||
148 | pb1200_enable_irq(irq_nr); | ||
149 | } | ||
150 | } | ||
151 | |||
152 | static struct irq_chip external_irq_type = | 140 | static struct irq_chip external_irq_type = |
153 | { | 141 | { |
154 | #ifdef CONFIG_MIPS_PB1200 | 142 | #ifdef CONFIG_MIPS_PB1200 |
155 | "Pb1200 Ext", | 143 | .name = "Pb1200 Ext", |
156 | #endif | 144 | #endif |
157 | #ifdef CONFIG_MIPS_DB1200 | 145 | #ifdef CONFIG_MIPS_DB1200 |
158 | "Db1200 Ext", | 146 | .name = "Db1200 Ext", |
159 | #endif | 147 | #endif |
160 | pb1200_startup_irq, | 148 | .startup = pb1200_startup_irq, |
161 | pb1200_shutdown_irq, | 149 | .shutdown = pb1200_shutdown_irq, |
162 | pb1200_enable_irq, | 150 | .ack = pb1200_disable_irq, |
163 | pb1200_disable_irq, | 151 | .mask = pb1200_disable_irq, |
164 | pb1200_mask_and_ack_irq, | 152 | .mask_ack = pb1200_disable_irq, |
165 | pb1200_end_irq, | 153 | .unmask = pb1200_enable_irq, |
166 | NULL | ||
167 | }; | 154 | }; |
168 | 155 | ||
169 | void _board_init_irq(void) | 156 | void _board_init_irq(void) |
@@ -172,7 +159,8 @@ void _board_init_irq(void) | |||
172 | 159 | ||
173 | for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) | 160 | for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) |
174 | { | 161 | { |
175 | irq_desc[irq_nr].chip = &external_irq_type; | 162 | set_irq_chip_and_handler(irq_nr, &external_irq_type, |
163 | handle_level_irq); | ||
176 | pb1200_disable_irq(irq_nr); | 164 | pb1200_disable_irq(irq_nr); |
177 | } | 165 | } |
178 | 166 | ||
diff --git a/arch/mips/basler/excite/excite_irq.c b/arch/mips/basler/excite/excite_irq.c index 2e2061a286c5..1ecab6350421 100644 --- a/arch/mips/basler/excite/excite_irq.c +++ b/arch/mips/basler/excite/excite_irq.c | |||
@@ -47,9 +47,9 @@ extern asmlinkage void excite_handle_int(void); | |||
47 | */ | 47 | */ |
48 | void __init arch_init_irq(void) | 48 | void __init arch_init_irq(void) |
49 | { | 49 | { |
50 | mips_cpu_irq_init(0); | 50 | mips_cpu_irq_init(); |
51 | rm7k_cpu_irq_init(8); | 51 | rm7k_cpu_irq_init(); |
52 | rm9k_cpu_irq_init(12); | 52 | rm9k_cpu_irq_init(); |
53 | 53 | ||
54 | #ifdef CONFIG_KGDB | 54 | #ifdef CONFIG_KGDB |
55 | excite_kgdb_init(); | 55 | excite_kgdb_init(); |
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c index 4c46f0e73783..fe93b846923b 100644 --- a/arch/mips/cobalt/irq.c +++ b/arch/mips/cobalt/irq.c | |||
@@ -104,7 +104,7 @@ void __init arch_init_irq(void) | |||
104 | GT_WRITE(GT_INTRMASK_OFS, 0); | 104 | GT_WRITE(GT_INTRMASK_OFS, 0); |
105 | 105 | ||
106 | init_i8259_irqs(); /* 0 ... 15 */ | 106 | init_i8259_irqs(); /* 0 ... 15 */ |
107 | mips_cpu_irq_init(COBALT_CPU_IRQ); /* 16 ... 23 */ | 107 | mips_cpu_irq_init(); /* 16 ... 23 */ |
108 | 108 | ||
109 | /* | 109 | /* |
110 | * Mask all cpu interrupts | 110 | * Mask all cpu interrupts |
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index e8f0f20b852d..a4b69b543bd9 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c | |||
@@ -204,8 +204,7 @@ void __init prom_init(void) | |||
204 | add_memory_region(0x0, memsz, BOOT_MEM_RAM); | 204 | add_memory_region(0x0, memsz, BOOT_MEM_RAM); |
205 | } | 205 | } |
206 | 206 | ||
207 | unsigned long __init prom_free_prom_memory(void) | 207 | void __init prom_free_prom_memory(void) |
208 | { | 208 | { |
209 | /* Nothing to do! */ | 209 | /* Nothing to do! */ |
210 | return 0; | ||
211 | } | 210 | } |
diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c index efef0f57ce1e..54a857b5e3ba 100644 --- a/arch/mips/ddb5xxx/common/prom.c +++ b/arch/mips/ddb5xxx/common/prom.c | |||
@@ -59,9 +59,8 @@ void __init prom_init(void) | |||
59 | #endif | 59 | #endif |
60 | } | 60 | } |
61 | 61 | ||
62 | unsigned long __init prom_free_prom_memory(void) | 62 | void __init prom_free_prom_memory(void) |
63 | { | 63 | { |
64 | return 0; | ||
65 | } | 64 | } |
66 | 65 | ||
67 | #if defined(CONFIG_DDB5477) | 66 | #if defined(CONFIG_DDB5477) |
diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c index a8bd2e66705c..2b23234a5b95 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq.c +++ b/arch/mips/ddb5xxx/ddb5477/irq.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/ptrace.h> | 17 | #include <linux/ptrace.h> |
18 | 18 | ||
19 | #include <asm/i8259.h> | 19 | #include <asm/i8259.h> |
20 | #include <asm/irq_cpu.h> | ||
20 | #include <asm/system.h> | 21 | #include <asm/system.h> |
21 | #include <asm/mipsregs.h> | 22 | #include <asm/mipsregs.h> |
22 | #include <asm/debug.h> | 23 | #include <asm/debug.h> |
@@ -73,7 +74,6 @@ set_pci_int_attr(u32 pci, u32 intn, u32 active, u32 trigger) | |||
73 | } | 74 | } |
74 | 75 | ||
75 | extern void vrc5477_irq_init(u32 base); | 76 | extern void vrc5477_irq_init(u32 base); |
76 | extern void mips_cpu_irq_init(u32 base); | ||
77 | static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; | 77 | static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; |
78 | 78 | ||
79 | void __init arch_init_irq(void) | 79 | void __init arch_init_irq(void) |
@@ -125,7 +125,7 @@ void __init arch_init_irq(void) | |||
125 | 125 | ||
126 | /* init all controllers */ | 126 | /* init all controllers */ |
127 | init_i8259_irqs(); | 127 | init_i8259_irqs(); |
128 | mips_cpu_irq_init(CPU_IRQ_BASE); | 128 | mips_cpu_irq_init(); |
129 | vrc5477_irq_init(VRC5477_IRQ_BASE); | 129 | vrc5477_irq_init(VRC5477_IRQ_BASE); |
130 | 130 | ||
131 | 131 | ||
@@ -146,8 +146,7 @@ u8 i8259_interrupt_ack(void) | |||
146 | irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE); | 146 | irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE); |
147 | ddb_out32(DDB_PCIINIT10, reg); | 147 | ddb_out32(DDB_PCIINIT10, reg); |
148 | 148 | ||
149 | /* i8259.c set the base vector to be 0x0 */ | 149 | return irq; |
150 | return irq + I8259_IRQ_BASE; | ||
151 | } | 150 | } |
152 | /* | 151 | /* |
153 | * the first level int-handler will jump here if it is a vrc5477 irq | 152 | * the first level int-handler will jump here if it is a vrc5477 irq |
@@ -177,7 +176,7 @@ static void vrc5477_irq_dispatch(void) | |||
177 | /* check for i8259 interrupts */ | 176 | /* check for i8259 interrupts */ |
178 | if (intStatus & (1 << VRC5477_I8259_CASCADE)) { | 177 | if (intStatus & (1 << VRC5477_I8259_CASCADE)) { |
179 | int i8259_irq = i8259_interrupt_ack(); | 178 | int i8259_irq = i8259_interrupt_ack(); |
180 | do_IRQ(I8259_IRQ_BASE + i8259_irq); | 179 | do_IRQ(i8259_irq); |
181 | return; | 180 | return; |
182 | } | 181 | } |
183 | } | 182 | } |
diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c index 96249aa5df5d..98c3b15eb369 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c +++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c | |||
@@ -82,7 +82,7 @@ vrc5477_irq_end(unsigned int irq) | |||
82 | } | 82 | } |
83 | 83 | ||
84 | struct irq_chip vrc5477_irq_controller = { | 84 | struct irq_chip vrc5477_irq_controller = { |
85 | .typename = "vrc5477_irq", | 85 | .name = "vrc5477_irq", |
86 | .ack = vrc5477_irq_ack, | 86 | .ack = vrc5477_irq_ack, |
87 | .mask = vrc5477_irq_disable, | 87 | .mask = vrc5477_irq_disable, |
88 | .mask_ack = vrc5477_irq_ack, | 88 | .mask_ack = vrc5477_irq_ack, |
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index 4c7cb4048d35..3acb133668dc 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c | |||
@@ -62,7 +62,7 @@ static inline void end_ioasic_irq(unsigned int irq) | |||
62 | } | 62 | } |
63 | 63 | ||
64 | static struct irq_chip ioasic_irq_type = { | 64 | static struct irq_chip ioasic_irq_type = { |
65 | .typename = "IO-ASIC", | 65 | .name = "IO-ASIC", |
66 | .ack = ack_ioasic_irq, | 66 | .ack = ack_ioasic_irq, |
67 | .mask = mask_ioasic_irq, | 67 | .mask = mask_ioasic_irq, |
68 | .mask_ack = ack_ioasic_irq, | 68 | .mask_ack = ack_ioasic_irq, |
@@ -84,7 +84,7 @@ static inline void end_ioasic_dma_irq(unsigned int irq) | |||
84 | } | 84 | } |
85 | 85 | ||
86 | static struct irq_chip ioasic_dma_irq_type = { | 86 | static struct irq_chip ioasic_dma_irq_type = { |
87 | .typename = "IO-ASIC-DMA", | 87 | .name = "IO-ASIC-DMA", |
88 | .ack = ack_ioasic_dma_irq, | 88 | .ack = ack_ioasic_dma_irq, |
89 | .mask = mask_ioasic_dma_irq, | 89 | .mask = mask_ioasic_dma_irq, |
90 | .mask_ack = ack_ioasic_dma_irq, | 90 | .mask_ack = ack_ioasic_dma_irq, |
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index 916e46b8ccd8..02439dc0ba83 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c | |||
@@ -58,7 +58,7 @@ static void ack_kn02_irq(unsigned int irq) | |||
58 | } | 58 | } |
59 | 59 | ||
60 | static struct irq_chip kn02_irq_type = { | 60 | static struct irq_chip kn02_irq_type = { |
61 | .typename = "KN02-CSR", | 61 | .name = "KN02-CSR", |
62 | .ack = ack_kn02_irq, | 62 | .ack = ack_kn02_irq, |
63 | .mask = mask_kn02_irq, | 63 | .mask = mask_kn02_irq, |
64 | .mask_ack = ack_kn02_irq, | 64 | .mask_ack = ack_kn02_irq, |
diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c index 3aa01d268f2d..5a557e268f78 100644 --- a/arch/mips/dec/prom/memory.c +++ b/arch/mips/dec/prom/memory.c | |||
@@ -92,9 +92,9 @@ void __init prom_meminit(u32 magic) | |||
92 | rex_setup_memory_region(); | 92 | rex_setup_memory_region(); |
93 | } | 93 | } |
94 | 94 | ||
95 | unsigned long __init prom_free_prom_memory(void) | 95 | void __init prom_free_prom_memory(void) |
96 | { | 96 | { |
97 | unsigned long addr, end; | 97 | unsigned long end; |
98 | 98 | ||
99 | /* | 99 | /* |
100 | * Free everything below the kernel itself but leave | 100 | * Free everything below the kernel itself but leave |
@@ -114,16 +114,5 @@ unsigned long __init prom_free_prom_memory(void) | |||
114 | #endif | 114 | #endif |
115 | end = __pa(&_text); | 115 | end = __pa(&_text); |
116 | 116 | ||
117 | addr = PAGE_SIZE; | 117 | free_init_pages("unused PROM memory", PAGE_SIZE, end); |
118 | while (addr < end) { | ||
119 | ClearPageReserved(virt_to_page(__va(addr))); | ||
120 | init_page_count(virt_to_page(__va(addr))); | ||
121 | free_page((unsigned long)__va(addr)); | ||
122 | addr += PAGE_SIZE; | ||
123 | } | ||
124 | |||
125 | printk("Freeing unused PROM memory: %ldkb freed\n", | ||
126 | (end - PAGE_SIZE) >> 10); | ||
127 | |||
128 | return end - PAGE_SIZE; | ||
129 | } | 118 | } |
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index d34032ac492a..1058e2f409bb 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c | |||
@@ -234,7 +234,7 @@ static void __init dec_init_kn01(void) | |||
234 | memcpy(&cpu_mask_nr_tbl, &kn01_cpu_mask_nr_tbl, | 234 | memcpy(&cpu_mask_nr_tbl, &kn01_cpu_mask_nr_tbl, |
235 | sizeof(kn01_cpu_mask_nr_tbl)); | 235 | sizeof(kn01_cpu_mask_nr_tbl)); |
236 | 236 | ||
237 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 237 | mips_cpu_irq_init(); |
238 | 238 | ||
239 | } /* dec_init_kn01 */ | 239 | } /* dec_init_kn01 */ |
240 | 240 | ||
@@ -309,7 +309,7 @@ static void __init dec_init_kn230(void) | |||
309 | memcpy(&cpu_mask_nr_tbl, &kn230_cpu_mask_nr_tbl, | 309 | memcpy(&cpu_mask_nr_tbl, &kn230_cpu_mask_nr_tbl, |
310 | sizeof(kn230_cpu_mask_nr_tbl)); | 310 | sizeof(kn230_cpu_mask_nr_tbl)); |
311 | 311 | ||
312 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 312 | mips_cpu_irq_init(); |
313 | 313 | ||
314 | } /* dec_init_kn230 */ | 314 | } /* dec_init_kn230 */ |
315 | 315 | ||
@@ -403,7 +403,7 @@ static void __init dec_init_kn02(void) | |||
403 | memcpy(&asic_mask_nr_tbl, &kn02_asic_mask_nr_tbl, | 403 | memcpy(&asic_mask_nr_tbl, &kn02_asic_mask_nr_tbl, |
404 | sizeof(kn02_asic_mask_nr_tbl)); | 404 | sizeof(kn02_asic_mask_nr_tbl)); |
405 | 405 | ||
406 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 406 | mips_cpu_irq_init(); |
407 | init_kn02_irqs(KN02_IRQ_BASE); | 407 | init_kn02_irqs(KN02_IRQ_BASE); |
408 | 408 | ||
409 | } /* dec_init_kn02 */ | 409 | } /* dec_init_kn02 */ |
@@ -504,7 +504,7 @@ static void __init dec_init_kn02ba(void) | |||
504 | memcpy(&asic_mask_nr_tbl, &kn02ba_asic_mask_nr_tbl, | 504 | memcpy(&asic_mask_nr_tbl, &kn02ba_asic_mask_nr_tbl, |
505 | sizeof(kn02ba_asic_mask_nr_tbl)); | 505 | sizeof(kn02ba_asic_mask_nr_tbl)); |
506 | 506 | ||
507 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 507 | mips_cpu_irq_init(); |
508 | init_ioasic_irqs(IO_IRQ_BASE); | 508 | init_ioasic_irqs(IO_IRQ_BASE); |
509 | 509 | ||
510 | } /* dec_init_kn02ba */ | 510 | } /* dec_init_kn02ba */ |
@@ -601,7 +601,7 @@ static void __init dec_init_kn02ca(void) | |||
601 | memcpy(&asic_mask_nr_tbl, &kn02ca_asic_mask_nr_tbl, | 601 | memcpy(&asic_mask_nr_tbl, &kn02ca_asic_mask_nr_tbl, |
602 | sizeof(kn02ca_asic_mask_nr_tbl)); | 602 | sizeof(kn02ca_asic_mask_nr_tbl)); |
603 | 603 | ||
604 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 604 | mips_cpu_irq_init(); |
605 | init_ioasic_irqs(IO_IRQ_BASE); | 605 | init_ioasic_irqs(IO_IRQ_BASE); |
606 | 606 | ||
607 | } /* dec_init_kn02ca */ | 607 | } /* dec_init_kn02ca */ |
@@ -702,7 +702,7 @@ static void __init dec_init_kn03(void) | |||
702 | memcpy(&asic_mask_nr_tbl, &kn03_asic_mask_nr_tbl, | 702 | memcpy(&asic_mask_nr_tbl, &kn03_asic_mask_nr_tbl, |
703 | sizeof(kn03_asic_mask_nr_tbl)); | 703 | sizeof(kn03_asic_mask_nr_tbl)); |
704 | 704 | ||
705 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 705 | mips_cpu_irq_init(); |
706 | init_ioasic_irqs(IO_IRQ_BASE); | 706 | init_ioasic_irqs(IO_IRQ_BASE); |
707 | 707 | ||
708 | } /* dec_init_kn03 */ | 708 | } /* dec_init_kn03 */ |
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c index 8d880f0b06ec..96df37b77759 100644 --- a/arch/mips/emma2rh/common/irq_emma2rh.c +++ b/arch/mips/emma2rh/common/irq_emma2rh.c | |||
@@ -57,7 +57,7 @@ static void emma2rh_irq_disable(unsigned int irq) | |||
57 | } | 57 | } |
58 | 58 | ||
59 | struct irq_chip emma2rh_irq_controller = { | 59 | struct irq_chip emma2rh_irq_controller = { |
60 | .typename = "emma2rh_irq", | 60 | .name = "emma2rh_irq", |
61 | .ack = emma2rh_irq_disable, | 61 | .ack = emma2rh_irq_disable, |
62 | .mask = emma2rh_irq_disable, | 62 | .mask = emma2rh_irq_disable, |
63 | .mask_ack = emma2rh_irq_disable, | 63 | .mask_ack = emma2rh_irq_disable, |
diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c index c93369cb4115..3299b6dfe764 100644 --- a/arch/mips/emma2rh/markeins/irq.c +++ b/arch/mips/emma2rh/markeins/irq.c | |||
@@ -106,7 +106,7 @@ void __init arch_init_irq(void) | |||
106 | emma2rh_irq_init(EMMA2RH_IRQ_BASE); | 106 | emma2rh_irq_init(EMMA2RH_IRQ_BASE); |
107 | emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE); | 107 | emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE); |
108 | emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); | 108 | emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); |
109 | mips_cpu_irq_init(CPU_IRQ_BASE); | 109 | mips_cpu_irq_init(); |
110 | 110 | ||
111 | /* setup cascade interrupts */ | 111 | /* setup cascade interrupts */ |
112 | setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); | 112 | setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); |
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c index 2116d9be5fa9..fba5c156f472 100644 --- a/arch/mips/emma2rh/markeins/irq_markeins.c +++ b/arch/mips/emma2rh/markeins/irq_markeins.c | |||
@@ -49,7 +49,7 @@ static void emma2rh_sw_irq_disable(unsigned int irq) | |||
49 | } | 49 | } |
50 | 50 | ||
51 | struct irq_chip emma2rh_sw_irq_controller = { | 51 | struct irq_chip emma2rh_sw_irq_controller = { |
52 | .typename = "emma2rh_sw_irq", | 52 | .name = "emma2rh_sw_irq", |
53 | .ack = emma2rh_sw_irq_disable, | 53 | .ack = emma2rh_sw_irq_disable, |
54 | .mask = emma2rh_sw_irq_disable, | 54 | .mask = emma2rh_sw_irq_disable, |
55 | .mask_ack = emma2rh_sw_irq_disable, | 55 | .mask_ack = emma2rh_sw_irq_disable, |
@@ -115,7 +115,7 @@ static void emma2rh_gpio_irq_end(unsigned int irq) | |||
115 | } | 115 | } |
116 | 116 | ||
117 | struct irq_chip emma2rh_gpio_irq_controller = { | 117 | struct irq_chip emma2rh_gpio_irq_controller = { |
118 | .typename = "emma2rh_gpio_irq", | 118 | .name = "emma2rh_gpio_irq", |
119 | .ack = emma2rh_gpio_irq_ack, | 119 | .ack = emma2rh_gpio_irq_ack, |
120 | .mask = emma2rh_gpio_irq_disable, | 120 | .mask = emma2rh_gpio_irq_disable, |
121 | .mask_ack = emma2rh_gpio_irq_ack, | 121 | .mask_ack = emma2rh_gpio_irq_ack, |
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index b3e5796c81d7..04572b9c9642 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c | |||
@@ -88,7 +88,7 @@ static void end_ev64120_irq(unsigned int irq) | |||
88 | } | 88 | } |
89 | 89 | ||
90 | static struct irq_chip ev64120_irq_type = { | 90 | static struct irq_chip ev64120_irq_type = { |
91 | .typename = "EV64120", | 91 | .name = "EV64120", |
92 | .ack = disable_ev64120_irq, | 92 | .ack = disable_ev64120_irq, |
93 | .mask = disable_ev64120_irq, | 93 | .mask = disable_ev64120_irq, |
94 | .mask_ack = disable_ev64120_irq, | 94 | .mask_ack = disable_ev64120_irq, |
diff --git a/arch/mips/gt64120/ev64120/setup.c b/arch/mips/gt64120/ev64120/setup.c index 99c8d42212e2..477848c22a2c 100644 --- a/arch/mips/gt64120/ev64120/setup.c +++ b/arch/mips/gt64120/ev64120/setup.c | |||
@@ -59,9 +59,8 @@ extern void galileo_machine_power_off(void); | |||
59 | */ | 59 | */ |
60 | extern struct pci_ops galileo_pci_ops; | 60 | extern struct pci_ops galileo_pci_ops; |
61 | 61 | ||
62 | unsigned long __init prom_free_prom_memory(void) | 62 | void __init prom_free_prom_memory(void) |
63 | { | 63 | { |
64 | return 0; | ||
65 | } | 64 | } |
66 | 65 | ||
67 | /* | 66 | /* |
diff --git a/arch/mips/gt64120/momenco_ocelot/dbg_io.c b/arch/mips/gt64120/momenco_ocelot/dbg_io.c index 2128684584f5..32d6fb4ee679 100644 --- a/arch/mips/gt64120/momenco_ocelot/dbg_io.c +++ b/arch/mips/gt64120/momenco_ocelot/dbg_io.c | |||
@@ -1,6 +1,4 @@ | |||
1 | 1 | ||
2 | #ifdef CONFIG_KGDB | ||
3 | |||
4 | #include <asm/serial.h> /* For the serial port location and base baud */ | 2 | #include <asm/serial.h> /* For the serial port location and base baud */ |
5 | 3 | ||
6 | /* --- CONFIG --- */ | 4 | /* --- CONFIG --- */ |
@@ -121,5 +119,3 @@ int putDebugChar(uint8 byte) | |||
121 | UART16550_WRITE(OFS_SEND_BUFFER, byte); | 119 | UART16550_WRITE(OFS_SEND_BUFFER, byte); |
122 | return 1; | 120 | return 1; |
123 | } | 121 | } |
124 | |||
125 | #endif | ||
diff --git a/arch/mips/gt64120/momenco_ocelot/irq.c b/arch/mips/gt64120/momenco_ocelot/irq.c index d9294401ccb0..2585d9dbda33 100644 --- a/arch/mips/gt64120/momenco_ocelot/irq.c +++ b/arch/mips/gt64120/momenco_ocelot/irq.c | |||
@@ -90,6 +90,6 @@ void __init arch_init_irq(void) | |||
90 | clear_c0_status(ST0_IM); | 90 | clear_c0_status(ST0_IM); |
91 | local_irq_disable(); | 91 | local_irq_disable(); |
92 | 92 | ||
93 | mips_cpu_irq_init(0); | 93 | mips_cpu_irq_init(); |
94 | rm7k_cpu_irq_init(8); | 94 | rm7k_cpu_irq_init(); |
95 | } | 95 | } |
diff --git a/arch/mips/gt64120/momenco_ocelot/prom.c b/arch/mips/gt64120/momenco_ocelot/prom.c index 8677b6d3ada7..78f393b2afd9 100644 --- a/arch/mips/gt64120/momenco_ocelot/prom.c +++ b/arch/mips/gt64120/momenco_ocelot/prom.c | |||
@@ -67,7 +67,6 @@ void __init prom_init(void) | |||
67 | add_memory_region(0, 64 << 20, BOOT_MEM_RAM); | 67 | add_memory_region(0, 64 << 20, BOOT_MEM_RAM); |
68 | } | 68 | } |
69 | 69 | ||
70 | unsigned long __init prom_free_prom_memory(void) | 70 | void __init prom_free_prom_memory(void) |
71 | { | 71 | { |
72 | return 0; | ||
73 | } | 72 | } |
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c index eedfc24e1eae..d3d96591780e 100644 --- a/arch/mips/gt64120/wrppmc/irq.c +++ b/arch/mips/gt64120/wrppmc/irq.c | |||
@@ -63,7 +63,7 @@ void gt64120_init_pic(void) | |||
63 | void __init arch_init_irq(void) | 63 | void __init arch_init_irq(void) |
64 | { | 64 | { |
65 | /* IRQ 0 - 7 are for MIPS common irq_cpu controller */ | 65 | /* IRQ 0 - 7 are for MIPS common irq_cpu controller */ |
66 | mips_cpu_irq_init(0); | 66 | mips_cpu_irq_init(); |
67 | 67 | ||
68 | gt64120_init_pic(); | 68 | gt64120_init_pic(); |
69 | } | 69 | } |
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c index 429afc400cb4..121188d5ec4a 100644 --- a/arch/mips/gt64120/wrppmc/setup.c +++ b/arch/mips/gt64120/wrppmc/setup.c | |||
@@ -93,9 +93,8 @@ void __init wrppmc_early_printk(const char *fmt, ...) | |||
93 | } | 93 | } |
94 | #endif /* WRPPMC_EARLY_DEBUG */ | 94 | #endif /* WRPPMC_EARLY_DEBUG */ |
95 | 95 | ||
96 | unsigned long __init prom_free_prom_memory(void) | 96 | void __init prom_free_prom_memory(void) |
97 | { | 97 | { |
98 | return 0; | ||
99 | } | 98 | } |
100 | 99 | ||
101 | #ifdef CONFIG_SERIAL_8250 | 100 | #ifdef CONFIG_SERIAL_8250 |
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index f8d417b5c2bb..295892e4ce53 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c | |||
@@ -40,7 +40,7 @@ void disable_r4030_irq(unsigned int irq) | |||
40 | } | 40 | } |
41 | 41 | ||
42 | static struct irq_chip r4030_irq_type = { | 42 | static struct irq_chip r4030_irq_type = { |
43 | .typename = "R4030", | 43 | .name = "R4030", |
44 | .ack = disable_r4030_irq, | 44 | .ack = disable_r4030_irq, |
45 | .mask = disable_r4030_irq, | 45 | .mask = disable_r4030_irq, |
46 | .mask_ack = disable_r4030_irq, | 46 | .mask_ack = disable_r4030_irq, |
diff --git a/arch/mips/jmr3927/common/prom.c b/arch/mips/jmr3927/common/prom.c index 5d5838f41d23..aa481b774c42 100644 --- a/arch/mips/jmr3927/common/prom.c +++ b/arch/mips/jmr3927/common/prom.c | |||
@@ -75,7 +75,6 @@ void __init prom_init_cmdline(void) | |||
75 | *cp = '\0'; | 75 | *cp = '\0'; |
76 | } | 76 | } |
77 | 77 | ||
78 | unsigned long __init prom_free_prom_memory(void) | 78 | void __init prom_free_prom_memory(void) |
79 | { | 79 | { |
80 | return 0; | ||
81 | } | 80 | } |
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index 3da49c5aaf49..7d2c203cb406 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c | |||
@@ -439,7 +439,7 @@ void __init arch_init_irq(void) | |||
439 | } | 439 | } |
440 | 440 | ||
441 | static struct irq_chip jmr3927_irq_controller = { | 441 | static struct irq_chip jmr3927_irq_controller = { |
442 | .typename = "jmr3927_irq", | 442 | .name = "jmr3927_irq", |
443 | .ack = jmr3927_irq_ack, | 443 | .ack = jmr3927_irq_ack, |
444 | .mask = jmr3927_irq_disable, | 444 | .mask = jmr3927_irq_disable, |
445 | .mask_ack = jmr3927_irq_ack, | 445 | .mask_ack = jmr3927_irq_ack, |
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 138f25efe38a..7ca3d6d07b34 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c | |||
@@ -434,7 +434,7 @@ void __init tx3927_setup(void) | |||
434 | 434 | ||
435 | /* DMA */ | 435 | /* DMA */ |
436 | tx3927_dmaptr->mcr = 0; | 436 | tx3927_dmaptr->mcr = 0; |
437 | for (i = 0; i < sizeof(tx3927_dmaptr->ch) / sizeof(tx3927_dmaptr->ch[0]); i++) { | 437 | for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) { |
438 | /* reset channel */ | 438 | /* reset channel */ |
439 | tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST; | 439 | tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST; |
440 | tx3927_dmaptr->ch[i].ccr = 0; | 440 | tx3927_dmaptr->ch[i].ccr = 0; |
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index ff88b06f89df..ea7df4b8da33 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c | |||
@@ -234,10 +234,6 @@ void output_mm_defines(void) | |||
234 | constant("#define _PMD_SHIFT ", PMD_SHIFT); | 234 | constant("#define _PMD_SHIFT ", PMD_SHIFT); |
235 | constant("#define _PGDIR_SHIFT ", PGDIR_SHIFT); | 235 | constant("#define _PGDIR_SHIFT ", PGDIR_SHIFT); |
236 | linefeed; | 236 | linefeed; |
237 | constant("#define _PGD_ORDER ", PGD_ORDER); | ||
238 | constant("#define _PMD_ORDER ", PMD_ORDER); | ||
239 | constant("#define _PTE_ORDER ", PTE_ORDER); | ||
240 | linefeed; | ||
241 | constant("#define _PTRS_PER_PGD ", PTRS_PER_PGD); | 237 | constant("#define _PTRS_PER_PGD ", PTRS_PER_PGD); |
242 | constant("#define _PTRS_PER_PMD ", PTRS_PER_PMD); | 238 | constant("#define _PTRS_PER_PMD ", PTRS_PER_PMD); |
243 | constant("#define _PTRS_PER_PTE ", PTRS_PER_PTE); | 239 | constant("#define _PTRS_PER_PTE ", PTRS_PER_PTE); |
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 442839e9578c..f59ef271d247 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -565,7 +565,7 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) | |||
565 | if (config3 & MIPS_CONF3_VEIC) | 565 | if (config3 & MIPS_CONF3_VEIC) |
566 | c->options |= MIPS_CPU_VEIC; | 566 | c->options |= MIPS_CPU_VEIC; |
567 | if (config3 & MIPS_CONF3_MT) | 567 | if (config3 & MIPS_CONF3_MT) |
568 | c->ases |= MIPS_ASE_MIPSMT; | 568 | c->ases |= MIPS_ASE_MIPSMT; |
569 | 569 | ||
570 | return config3 & MIPS_CONF_M; | 570 | return config3 & MIPS_CONF_M; |
571 | } | 571 | } |
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c index 719d26968cb2..7bc882049269 100644 --- a/arch/mips/kernel/gdb-stub.c +++ b/arch/mips/kernel/gdb-stub.c | |||
@@ -505,13 +505,13 @@ void show_gdbregs(struct gdb_regs * regs) | |||
505 | */ | 505 | */ |
506 | printk("$0 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | 506 | printk("$0 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
507 | regs->reg0, regs->reg1, regs->reg2, regs->reg3, | 507 | regs->reg0, regs->reg1, regs->reg2, regs->reg3, |
508 | regs->reg4, regs->reg5, regs->reg6, regs->reg7); | 508 | regs->reg4, regs->reg5, regs->reg6, regs->reg7); |
509 | printk("$8 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | 509 | printk("$8 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
510 | regs->reg8, regs->reg9, regs->reg10, regs->reg11, | 510 | regs->reg8, regs->reg9, regs->reg10, regs->reg11, |
511 | regs->reg12, regs->reg13, regs->reg14, regs->reg15); | 511 | regs->reg12, regs->reg13, regs->reg14, regs->reg15); |
512 | printk("$16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | 512 | printk("$16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
513 | regs->reg16, regs->reg17, regs->reg18, regs->reg19, | 513 | regs->reg16, regs->reg17, regs->reg18, regs->reg19, |
514 | regs->reg20, regs->reg21, regs->reg22, regs->reg23); | 514 | regs->reg20, regs->reg21, regs->reg22, regs->reg23); |
515 | printk("$24: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | 515 | printk("$24: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", |
516 | regs->reg24, regs->reg25, regs->reg26, regs->reg27, | 516 | regs->reg24, regs->reg25, regs->reg26, regs->reg27, |
517 | regs->reg28, regs->reg29, regs->reg30, regs->reg31); | 517 | regs->reg28, regs->reg29, regs->reg30, regs->reg31); |
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index 9a7811d13db2..6f57ca44291f 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S | |||
@@ -231,28 +231,3 @@ NESTED(smp_bootstrap, 16, sp) | |||
231 | #endif /* CONFIG_SMP */ | 231 | #endif /* CONFIG_SMP */ |
232 | 232 | ||
233 | __FINIT | 233 | __FINIT |
234 | |||
235 | .comm kernelsp, NR_CPUS * 8, 8 | ||
236 | .comm pgd_current, NR_CPUS * 8, 8 | ||
237 | |||
238 | .comm fw_arg0, SZREG, SZREG # firmware arguments | ||
239 | .comm fw_arg1, SZREG, SZREG | ||
240 | .comm fw_arg2, SZREG, SZREG | ||
241 | .comm fw_arg3, SZREG, SZREG | ||
242 | |||
243 | .macro page name, order | ||
244 | .comm \name, (_PAGE_SIZE << \order), (_PAGE_SIZE << \order) | ||
245 | .endm | ||
246 | |||
247 | /* | ||
248 | * On 64-bit we've got three-level pagetables with a slightly | ||
249 | * different layout ... | ||
250 | */ | ||
251 | page swapper_pg_dir, _PGD_ORDER | ||
252 | #ifdef CONFIG_64BIT | ||
253 | #if defined(CONFIG_MODULES) && !defined(CONFIG_BUILD_ELF64) | ||
254 | page module_pg_dir, _PGD_ORDER | ||
255 | #endif | ||
256 | page invalid_pmd_table, _PMD_ORDER | ||
257 | #endif | ||
258 | page invalid_pte_table, _PTE_ORDER | ||
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index b59a676c6d0e..b33ba6cd7f5b 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c | |||
@@ -54,9 +54,11 @@ static unsigned int cached_irq_mask = 0xffff; | |||
54 | 54 | ||
55 | void disable_8259A_irq(unsigned int irq) | 55 | void disable_8259A_irq(unsigned int irq) |
56 | { | 56 | { |
57 | unsigned int mask = 1 << irq; | 57 | unsigned int mask; |
58 | unsigned long flags; | 58 | unsigned long flags; |
59 | 59 | ||
60 | irq -= I8259A_IRQ_BASE; | ||
61 | mask = 1 << irq; | ||
60 | spin_lock_irqsave(&i8259A_lock, flags); | 62 | spin_lock_irqsave(&i8259A_lock, flags); |
61 | cached_irq_mask |= mask; | 63 | cached_irq_mask |= mask; |
62 | if (irq & 8) | 64 | if (irq & 8) |
@@ -68,9 +70,11 @@ void disable_8259A_irq(unsigned int irq) | |||
68 | 70 | ||
69 | void enable_8259A_irq(unsigned int irq) | 71 | void enable_8259A_irq(unsigned int irq) |
70 | { | 72 | { |
71 | unsigned int mask = ~(1 << irq); | 73 | unsigned int mask; |
72 | unsigned long flags; | 74 | unsigned long flags; |
73 | 75 | ||
76 | irq -= I8259A_IRQ_BASE; | ||
77 | mask = ~(1 << irq); | ||
74 | spin_lock_irqsave(&i8259A_lock, flags); | 78 | spin_lock_irqsave(&i8259A_lock, flags); |
75 | cached_irq_mask &= mask; | 79 | cached_irq_mask &= mask; |
76 | if (irq & 8) | 80 | if (irq & 8) |
@@ -82,10 +86,12 @@ void enable_8259A_irq(unsigned int irq) | |||
82 | 86 | ||
83 | int i8259A_irq_pending(unsigned int irq) | 87 | int i8259A_irq_pending(unsigned int irq) |
84 | { | 88 | { |
85 | unsigned int mask = 1 << irq; | 89 | unsigned int mask; |
86 | unsigned long flags; | 90 | unsigned long flags; |
87 | int ret; | 91 | int ret; |
88 | 92 | ||
93 | irq -= I8259A_IRQ_BASE; | ||
94 | mask = 1 << irq; | ||
89 | spin_lock_irqsave(&i8259A_lock, flags); | 95 | spin_lock_irqsave(&i8259A_lock, flags); |
90 | if (irq < 8) | 96 | if (irq < 8) |
91 | ret = inb(PIC_MASTER_CMD) & mask; | 97 | ret = inb(PIC_MASTER_CMD) & mask; |
@@ -134,9 +140,11 @@ static inline int i8259A_irq_real(unsigned int irq) | |||
134 | */ | 140 | */ |
135 | void mask_and_ack_8259A(unsigned int irq) | 141 | void mask_and_ack_8259A(unsigned int irq) |
136 | { | 142 | { |
137 | unsigned int irqmask = 1 << irq; | 143 | unsigned int irqmask; |
138 | unsigned long flags; | 144 | unsigned long flags; |
139 | 145 | ||
146 | irq -= I8259A_IRQ_BASE; | ||
147 | irqmask = 1 << irq; | ||
140 | spin_lock_irqsave(&i8259A_lock, flags); | 148 | spin_lock_irqsave(&i8259A_lock, flags); |
141 | /* | 149 | /* |
142 | * Lightweight spurious IRQ detection. We do not want | 150 | * Lightweight spurious IRQ detection. We do not want |
@@ -169,8 +177,8 @@ handle_real_irq: | |||
169 | outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ | 177 | outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ |
170 | } | 178 | } |
171 | #ifdef CONFIG_MIPS_MT_SMTC | 179 | #ifdef CONFIG_MIPS_MT_SMTC |
172 | if (irq_hwmask[irq] & ST0_IM) | 180 | if (irq_hwmask[irq] & ST0_IM) |
173 | set_c0_status(irq_hwmask[irq] & ST0_IM); | 181 | set_c0_status(irq_hwmask[irq] & ST0_IM); |
174 | #endif /* CONFIG_MIPS_MT_SMTC */ | 182 | #endif /* CONFIG_MIPS_MT_SMTC */ |
175 | spin_unlock_irqrestore(&i8259A_lock, flags); | 183 | spin_unlock_irqrestore(&i8259A_lock, flags); |
176 | return; | 184 | return; |
@@ -322,8 +330,8 @@ void __init init_i8259_irqs (void) | |||
322 | 330 | ||
323 | init_8259A(0); | 331 | init_8259A(0); |
324 | 332 | ||
325 | for (i = 0; i < 16; i++) | 333 | for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++) |
326 | set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq); | 334 | set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq); |
327 | 335 | ||
328 | setup_irq(PIC_CASCADE_IR, &irq2); | 336 | setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2); |
329 | } | 337 | } |
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c index 37cad5de515c..3cc25c05d367 100644 --- a/arch/mips/kernel/irixelf.c +++ b/arch/mips/kernel/irixelf.c | |||
@@ -10,6 +10,8 @@ | |||
10 | * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com> | 10 | * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com> |
11 | * Copyright (C) 2004 - 2005 Steven J. Hill <sjhill@realitydiluted.com> | 11 | * Copyright (C) 2004 - 2005 Steven J. Hill <sjhill@realitydiluted.com> |
12 | */ | 12 | */ |
13 | #undef DEBUG | ||
14 | |||
13 | #include <linux/module.h> | 15 | #include <linux/module.h> |
14 | #include <linux/fs.h> | 16 | #include <linux/fs.h> |
15 | #include <linux/stat.h> | 17 | #include <linux/stat.h> |
@@ -40,8 +42,6 @@ | |||
40 | 42 | ||
41 | #include <linux/elf.h> | 43 | #include <linux/elf.h> |
42 | 44 | ||
43 | #undef DEBUG | ||
44 | |||
45 | static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs); | 45 | static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs); |
46 | static int load_irix_library(struct file *); | 46 | static int load_irix_library(struct file *); |
47 | static int irix_core_dump(long signr, struct pt_regs * regs, | 47 | static int irix_core_dump(long signr, struct pt_regs * regs, |
@@ -52,72 +52,102 @@ static struct linux_binfmt irix_format = { | |||
52 | irix_core_dump, PAGE_SIZE | 52 | irix_core_dump, PAGE_SIZE |
53 | }; | 53 | }; |
54 | 54 | ||
55 | #ifdef DEBUG | ||
56 | /* Debugging routines. */ | 55 | /* Debugging routines. */ |
57 | static char *get_elf_p_type(Elf32_Word p_type) | 56 | static char *get_elf_p_type(Elf32_Word p_type) |
58 | { | 57 | { |
59 | int i = (int) p_type; | 58 | #ifdef DEBUG |
60 | 59 | switch (p_type) { | |
61 | switch(i) { | 60 | case PT_NULL: |
62 | case PT_NULL: return("PT_NULL"); break; | 61 | return "PT_NULL"; |
63 | case PT_LOAD: return("PT_LOAD"); break; | 62 | break; |
64 | case PT_DYNAMIC: return("PT_DYNAMIC"); break; | 63 | |
65 | case PT_INTERP: return("PT_INTERP"); break; | 64 | case PT_LOAD: |
66 | case PT_NOTE: return("PT_NOTE"); break; | 65 | return "PT_LOAD"; |
67 | case PT_SHLIB: return("PT_SHLIB"); break; | 66 | break; |
68 | case PT_PHDR: return("PT_PHDR"); break; | 67 | |
69 | case PT_LOPROC: return("PT_LOPROC/REGINFO"); break; | 68 | case PT_DYNAMIC: |
70 | case PT_HIPROC: return("PT_HIPROC"); break; | 69 | return "PT_DYNAMIC"; |
71 | default: return("PT_BOGUS"); break; | 70 | break; |
71 | |||
72 | case PT_INTERP: | ||
73 | return "PT_INTERP"; | ||
74 | break; | ||
75 | |||
76 | case PT_NOTE: | ||
77 | return "PT_NOTE"; | ||
78 | break; | ||
79 | |||
80 | case PT_SHLIB: | ||
81 | return "PT_SHLIB"; | ||
82 | break; | ||
83 | |||
84 | case PT_PHDR: | ||
85 | return "PT_PHDR"; | ||
86 | break; | ||
87 | |||
88 | case PT_LOPROC: | ||
89 | return "PT_LOPROC/REGINFO"; | ||
90 | break; | ||
91 | |||
92 | case PT_HIPROC: | ||
93 | return "PT_HIPROC"; | ||
94 | break; | ||
95 | |||
96 | default: | ||
97 | return "PT_BOGUS"; | ||
98 | break; | ||
72 | } | 99 | } |
100 | #endif | ||
73 | } | 101 | } |
74 | 102 | ||
75 | static void print_elfhdr(struct elfhdr *ehp) | 103 | static void print_elfhdr(struct elfhdr *ehp) |
76 | { | 104 | { |
77 | int i; | 105 | int i; |
78 | 106 | ||
79 | printk("ELFHDR: e_ident<"); | 107 | pr_debug("ELFHDR: e_ident<"); |
80 | for(i = 0; i < (EI_NIDENT - 1); i++) printk("%x ", ehp->e_ident[i]); | 108 | for (i = 0; i < (EI_NIDENT - 1); i++) |
81 | printk("%x>\n", ehp->e_ident[i]); | 109 | pr_debug("%x ", ehp->e_ident[i]); |
82 | printk(" e_type[%04x] e_machine[%04x] e_version[%08lx]\n", | 110 | pr_debug("%x>\n", ehp->e_ident[i]); |
83 | (unsigned short) ehp->e_type, (unsigned short) ehp->e_machine, | 111 | pr_debug(" e_type[%04x] e_machine[%04x] e_version[%08lx]\n", |
84 | (unsigned long) ehp->e_version); | 112 | (unsigned short) ehp->e_type, (unsigned short) ehp->e_machine, |
85 | printk(" e_entry[%08lx] e_phoff[%08lx] e_shoff[%08lx] " | 113 | (unsigned long) ehp->e_version); |
86 | "e_flags[%08lx]\n", | 114 | pr_debug(" e_entry[%08lx] e_phoff[%08lx] e_shoff[%08lx] " |
87 | (unsigned long) ehp->e_entry, (unsigned long) ehp->e_phoff, | 115 | "e_flags[%08lx]\n", |
88 | (unsigned long) ehp->e_shoff, (unsigned long) ehp->e_flags); | 116 | (unsigned long) ehp->e_entry, (unsigned long) ehp->e_phoff, |
89 | printk(" e_ehsize[%04x] e_phentsize[%04x] e_phnum[%04x]\n", | 117 | (unsigned long) ehp->e_shoff, (unsigned long) ehp->e_flags); |
90 | (unsigned short) ehp->e_ehsize, (unsigned short) ehp->e_phentsize, | 118 | pr_debug(" e_ehsize[%04x] e_phentsize[%04x] e_phnum[%04x]\n", |
91 | (unsigned short) ehp->e_phnum); | 119 | (unsigned short) ehp->e_ehsize, |
92 | printk(" e_shentsize[%04x] e_shnum[%04x] e_shstrndx[%04x]\n", | 120 | (unsigned short) ehp->e_phentsize, |
93 | (unsigned short) ehp->e_shentsize, (unsigned short) ehp->e_shnum, | 121 | (unsigned short) ehp->e_phnum); |
94 | (unsigned short) ehp->e_shstrndx); | 122 | pr_debug(" e_shentsize[%04x] e_shnum[%04x] e_shstrndx[%04x]\n", |
123 | (unsigned short) ehp->e_shentsize, | ||
124 | (unsigned short) ehp->e_shnum, | ||
125 | (unsigned short) ehp->e_shstrndx); | ||
95 | } | 126 | } |
96 | 127 | ||
97 | static void print_phdr(int i, struct elf_phdr *ep) | 128 | static void print_phdr(int i, struct elf_phdr *ep) |
98 | { | 129 | { |
99 | printk("PHDR[%d]: p_type[%s] p_offset[%08lx] p_vaddr[%08lx] " | 130 | pr_debug("PHDR[%d]: p_type[%s] p_offset[%08lx] p_vaddr[%08lx] " |
100 | "p_paddr[%08lx]\n", i, get_elf_p_type(ep->p_type), | 131 | "p_paddr[%08lx]\n", i, get_elf_p_type(ep->p_type), |
101 | (unsigned long) ep->p_offset, (unsigned long) ep->p_vaddr, | 132 | (unsigned long) ep->p_offset, (unsigned long) ep->p_vaddr, |
102 | (unsigned long) ep->p_paddr); | 133 | (unsigned long) ep->p_paddr); |
103 | printk(" p_filesz[%08lx] p_memsz[%08lx] p_flags[%08lx] " | 134 | pr_debug(" p_filesz[%08lx] p_memsz[%08lx] p_flags[%08lx] " |
104 | "p_align[%08lx]\n", (unsigned long) ep->p_filesz, | 135 | "p_align[%08lx]\n", (unsigned long) ep->p_filesz, |
105 | (unsigned long) ep->p_memsz, (unsigned long) ep->p_flags, | 136 | (unsigned long) ep->p_memsz, (unsigned long) ep->p_flags, |
106 | (unsigned long) ep->p_align); | 137 | (unsigned long) ep->p_align); |
107 | } | 138 | } |
108 | 139 | ||
109 | static void dump_phdrs(struct elf_phdr *ep, int pnum) | 140 | static void dump_phdrs(struct elf_phdr *ep, int pnum) |
110 | { | 141 | { |
111 | int i; | 142 | int i; |
112 | 143 | ||
113 | for(i = 0; i < pnum; i++, ep++) { | 144 | for (i = 0; i < pnum; i++, ep++) { |
114 | if((ep->p_type == PT_LOAD) || | 145 | if ((ep->p_type == PT_LOAD) || |
115 | (ep->p_type == PT_INTERP) || | 146 | (ep->p_type == PT_INTERP) || |
116 | (ep->p_type == PT_PHDR)) | 147 | (ep->p_type == PT_PHDR)) |
117 | print_phdr(i, ep); | 148 | print_phdr(i, ep); |
118 | } | 149 | } |
119 | } | 150 | } |
120 | #endif /* DEBUG */ | ||
121 | 151 | ||
122 | static void set_brk(unsigned long start, unsigned long end) | 152 | static void set_brk(unsigned long start, unsigned long end) |
123 | { | 153 | { |
@@ -156,11 +186,10 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc, | |||
156 | elf_addr_t *envp; | 186 | elf_addr_t *envp; |
157 | elf_addr_t *sp, *csp; | 187 | elf_addr_t *sp, *csp; |
158 | 188 | ||
159 | #ifdef DEBUG | 189 | pr_debug("create_irix_tables: p[%p] argc[%d] envc[%d] " |
160 | printk("create_irix_tables: p[%p] argc[%d] envc[%d] " | 190 | "load_addr[%08x] interp_load_addr[%08x]\n", |
161 | "load_addr[%08x] interp_load_addr[%08x]\n", | 191 | p, argc, envc, load_addr, interp_load_addr); |
162 | p, argc, envc, load_addr, interp_load_addr); | 192 | |
163 | #endif | ||
164 | sp = (elf_addr_t *) (~15UL & (unsigned long) p); | 193 | sp = (elf_addr_t *) (~15UL & (unsigned long) p); |
165 | csp = sp; | 194 | csp = sp; |
166 | csp -= exec ? DLINFO_ITEMS*2 : 2; | 195 | csp -= exec ? DLINFO_ITEMS*2 : 2; |
@@ -181,7 +210,7 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc, | |||
181 | sp -= 2; | 210 | sp -= 2; |
182 | NEW_AUX_ENT(0, AT_NULL, 0); | 211 | NEW_AUX_ENT(0, AT_NULL, 0); |
183 | 212 | ||
184 | if(exec) { | 213 | if (exec) { |
185 | sp -= 11*2; | 214 | sp -= 11*2; |
186 | 215 | ||
187 | NEW_AUX_ENT (0, AT_PHDR, load_addr + exec->e_phoff); | 216 | NEW_AUX_ENT (0, AT_PHDR, load_addr + exec->e_phoff); |
@@ -245,9 +274,7 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex, | |||
245 | last_bss = 0; | 274 | last_bss = 0; |
246 | error = load_addr = 0; | 275 | error = load_addr = 0; |
247 | 276 | ||
248 | #ifdef DEBUG | ||
249 | print_elfhdr(interp_elf_ex); | 277 | print_elfhdr(interp_elf_ex); |
250 | #endif | ||
251 | 278 | ||
252 | /* First of all, some simple consistency checks */ | 279 | /* First of all, some simple consistency checks */ |
253 | if ((interp_elf_ex->e_type != ET_EXEC && | 280 | if ((interp_elf_ex->e_type != ET_EXEC && |
@@ -258,7 +285,7 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex, | |||
258 | } | 285 | } |
259 | 286 | ||
260 | /* Now read in all of the header information */ | 287 | /* Now read in all of the header information */ |
261 | if(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum > PAGE_SIZE) { | 288 | if (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum > PAGE_SIZE) { |
262 | printk("IRIX interp header bigger than a page (%d)\n", | 289 | printk("IRIX interp header bigger than a page (%d)\n", |
263 | (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum)); | 290 | (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum)); |
264 | return 0xffffffff; | 291 | return 0xffffffff; |
@@ -267,15 +294,15 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex, | |||
267 | elf_phdata = kmalloc(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum, | 294 | elf_phdata = kmalloc(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum, |
268 | GFP_KERNEL); | 295 | GFP_KERNEL); |
269 | 296 | ||
270 | if(!elf_phdata) { | 297 | if (!elf_phdata) { |
271 | printk("Cannot kmalloc phdata for IRIX interp.\n"); | 298 | printk("Cannot kmalloc phdata for IRIX interp.\n"); |
272 | return 0xffffffff; | 299 | return 0xffffffff; |
273 | } | 300 | } |
274 | 301 | ||
275 | /* If the size of this structure has changed, then punt, since | 302 | /* If the size of this structure has changed, then punt, since |
276 | * we will be doing the wrong thing. | 303 | * we will be doing the wrong thing. |
277 | */ | 304 | */ |
278 | if(interp_elf_ex->e_phentsize != 32) { | 305 | if (interp_elf_ex->e_phentsize != 32) { |
279 | printk("IRIX interp e_phentsize == %d != 32 ", | 306 | printk("IRIX interp e_phentsize == %d != 32 ", |
280 | interp_elf_ex->e_phentsize); | 307 | interp_elf_ex->e_phentsize); |
281 | kfree(elf_phdata); | 308 | kfree(elf_phdata); |
@@ -286,61 +313,71 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex, | |||
286 | (char *) elf_phdata, | 313 | (char *) elf_phdata, |
287 | sizeof(struct elf_phdr) * interp_elf_ex->e_phnum); | 314 | sizeof(struct elf_phdr) * interp_elf_ex->e_phnum); |
288 | 315 | ||
289 | #ifdef DEBUG | ||
290 | dump_phdrs(elf_phdata, interp_elf_ex->e_phnum); | 316 | dump_phdrs(elf_phdata, interp_elf_ex->e_phnum); |
291 | #endif | ||
292 | 317 | ||
293 | eppnt = elf_phdata; | 318 | eppnt = elf_phdata; |
294 | for(i=0; i<interp_elf_ex->e_phnum; i++, eppnt++) { | 319 | for (i = 0; i < interp_elf_ex->e_phnum; i++, eppnt++) { |
295 | if(eppnt->p_type == PT_LOAD) { | 320 | if (eppnt->p_type == PT_LOAD) { |
296 | int elf_type = MAP_PRIVATE | MAP_DENYWRITE; | 321 | int elf_type = MAP_PRIVATE | MAP_DENYWRITE; |
297 | int elf_prot = 0; | 322 | int elf_prot = 0; |
298 | unsigned long vaddr = 0; | 323 | unsigned long vaddr = 0; |
299 | if (eppnt->p_flags & PF_R) elf_prot = PROT_READ; | 324 | if (eppnt->p_flags & PF_R) |
300 | if (eppnt->p_flags & PF_W) elf_prot |= PROT_WRITE; | 325 | elf_prot = PROT_READ; |
301 | if (eppnt->p_flags & PF_X) elf_prot |= PROT_EXEC; | 326 | if (eppnt->p_flags & PF_W) |
302 | elf_type |= MAP_FIXED; | 327 | elf_prot |= PROT_WRITE; |
303 | vaddr = eppnt->p_vaddr; | 328 | if (eppnt->p_flags & PF_X) |
304 | 329 | elf_prot |= PROT_EXEC; | |
305 | pr_debug("INTERP do_mmap(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ", | 330 | elf_type |= MAP_FIXED; |
306 | interpreter, vaddr, | 331 | vaddr = eppnt->p_vaddr; |
307 | (unsigned long) (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)), | 332 | |
308 | (unsigned long) elf_prot, (unsigned long) elf_type, | 333 | pr_debug("INTERP do_mmap" |
309 | (unsigned long) (eppnt->p_offset & 0xfffff000)); | 334 | "(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ", |
310 | down_write(¤t->mm->mmap_sem); | 335 | interpreter, vaddr, |
311 | error = do_mmap(interpreter, vaddr, | 336 | (unsigned long) |
312 | eppnt->p_filesz + (eppnt->p_vaddr & 0xfff), | 337 | (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)), |
313 | elf_prot, elf_type, | 338 | (unsigned long) |
314 | eppnt->p_offset & 0xfffff000); | 339 | elf_prot, (unsigned long) elf_type, |
315 | up_write(¤t->mm->mmap_sem); | 340 | (unsigned long) |
316 | 341 | (eppnt->p_offset & 0xfffff000)); | |
317 | if(error < 0 && error > -1024) { | 342 | |
318 | printk("Aieee IRIX interp mmap error=%d\n", error); | 343 | down_write(¤t->mm->mmap_sem); |
319 | break; /* Real error */ | 344 | error = do_mmap(interpreter, vaddr, |
320 | } | 345 | eppnt->p_filesz + (eppnt->p_vaddr & 0xfff), |
321 | pr_debug("error=%08lx ", (unsigned long) error); | 346 | elf_prot, elf_type, |
322 | if(!load_addr && interp_elf_ex->e_type == ET_DYN) { | 347 | eppnt->p_offset & 0xfffff000); |
323 | load_addr = error; | 348 | up_write(¤t->mm->mmap_sem); |
324 | pr_debug("load_addr = error "); | 349 | |
325 | } | 350 | if (error < 0 && error > -1024) { |
326 | 351 | printk("Aieee IRIX interp mmap error=%d\n", | |
327 | /* Find the end of the file mapping for this phdr, and keep | 352 | error); |
328 | * track of the largest address we see for this. | 353 | break; /* Real error */ |
329 | */ | 354 | } |
330 | k = eppnt->p_vaddr + eppnt->p_filesz; | 355 | pr_debug("error=%08lx ", (unsigned long) error); |
331 | if(k > elf_bss) elf_bss = k; | 356 | if (!load_addr && interp_elf_ex->e_type == ET_DYN) { |
332 | 357 | load_addr = error; | |
333 | /* Do the same thing for the memory mapping - between | 358 | pr_debug("load_addr = error "); |
334 | * elf_bss and last_bss is the bss section. | 359 | } |
335 | */ | 360 | |
336 | k = eppnt->p_memsz + eppnt->p_vaddr; | 361 | /* |
337 | if(k > last_bss) last_bss = k; | 362 | * Find the end of the file mapping for this phdr, and |
338 | pr_debug("\n"); | 363 | * keep track of the largest address we see for this. |
339 | } | 364 | */ |
365 | k = eppnt->p_vaddr + eppnt->p_filesz; | ||
366 | if (k > elf_bss) | ||
367 | elf_bss = k; | ||
368 | |||
369 | /* Do the same thing for the memory mapping - between | ||
370 | * elf_bss and last_bss is the bss section. | ||
371 | */ | ||
372 | k = eppnt->p_memsz + eppnt->p_vaddr; | ||
373 | if (k > last_bss) | ||
374 | last_bss = k; | ||
375 | pr_debug("\n"); | ||
376 | } | ||
340 | } | 377 | } |
341 | 378 | ||
342 | /* Now use mmap to map the library into memory. */ | 379 | /* Now use mmap to map the library into memory. */ |
343 | if(error < 0 && error > -1024) { | 380 | if (error < 0 && error > -1024) { |
344 | pr_debug("got error %d\n", error); | 381 | pr_debug("got error %d\n", error); |
345 | kfree(elf_phdata); | 382 | kfree(elf_phdata); |
346 | return 0xffffffff; | 383 | return 0xffffffff; |
@@ -377,7 +414,7 @@ static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm) | |||
377 | return -ENOEXEC; | 414 | return -ENOEXEC; |
378 | 415 | ||
379 | /* First of all, some simple consistency checks */ | 416 | /* First of all, some simple consistency checks */ |
380 | if((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) || | 417 | if ((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) || |
381 | !bprm->file->f_op->mmap) { | 418 | !bprm->file->f_op->mmap) { |
382 | return -ENOEXEC; | 419 | return -ENOEXEC; |
383 | } | 420 | } |
@@ -388,7 +425,7 @@ static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm) | |||
388 | * XXX all registers as 64bits on cpu's capable of this at | 425 | * XXX all registers as 64bits on cpu's capable of this at |
389 | * XXX exception time plus frob the XTLB exception vector. | 426 | * XXX exception time plus frob the XTLB exception vector. |
390 | */ | 427 | */ |
391 | if((ehp->e_flags & EF_MIPS_ABI2)) | 428 | if ((ehp->e_flags & EF_MIPS_ABI2)) |
392 | return -ENOEXEC; | 429 | return -ENOEXEC; |
393 | 430 | ||
394 | return 0; | 431 | return 0; |
@@ -410,7 +447,7 @@ static inline int look_for_irix_interpreter(char **name, | |||
410 | struct file *file = NULL; | 447 | struct file *file = NULL; |
411 | 448 | ||
412 | *name = NULL; | 449 | *name = NULL; |
413 | for(i = 0; i < pnum; i++, epp++) { | 450 | for (i = 0; i < pnum; i++, epp++) { |
414 | if (epp->p_type != PT_INTERP) | 451 | if (epp->p_type != PT_INTERP) |
415 | continue; | 452 | continue; |
416 | 453 | ||
@@ -467,8 +504,8 @@ static inline void map_executable(struct file *fp, struct elf_phdr *epp, int pnu | |||
467 | unsigned int tmp; | 504 | unsigned int tmp; |
468 | int i, prot; | 505 | int i, prot; |
469 | 506 | ||
470 | for(i = 0; i < pnum; i++, epp++) { | 507 | for (i = 0; i < pnum; i++, epp++) { |
471 | if(epp->p_type != PT_LOAD) | 508 | if (epp->p_type != PT_LOAD) |
472 | continue; | 509 | continue; |
473 | 510 | ||
474 | /* Map it. */ | 511 | /* Map it. */ |
@@ -483,23 +520,23 @@ static inline void map_executable(struct file *fp, struct elf_phdr *epp, int pnu | |||
483 | up_write(¤t->mm->mmap_sem); | 520 | up_write(¤t->mm->mmap_sem); |
484 | 521 | ||
485 | /* Fixup location tracking vars. */ | 522 | /* Fixup location tracking vars. */ |
486 | if((epp->p_vaddr & 0xfffff000) < *estack) | 523 | if ((epp->p_vaddr & 0xfffff000) < *estack) |
487 | *estack = (epp->p_vaddr & 0xfffff000); | 524 | *estack = (epp->p_vaddr & 0xfffff000); |
488 | if(!*laddr) | 525 | if (!*laddr) |
489 | *laddr = epp->p_vaddr - epp->p_offset; | 526 | *laddr = epp->p_vaddr - epp->p_offset; |
490 | if(epp->p_vaddr < *scode) | 527 | if (epp->p_vaddr < *scode) |
491 | *scode = epp->p_vaddr; | 528 | *scode = epp->p_vaddr; |
492 | 529 | ||
493 | tmp = epp->p_vaddr + epp->p_filesz; | 530 | tmp = epp->p_vaddr + epp->p_filesz; |
494 | if(tmp > *ebss) | 531 | if (tmp > *ebss) |
495 | *ebss = tmp; | 532 | *ebss = tmp; |
496 | if((epp->p_flags & PF_X) && *ecode < tmp) | 533 | if ((epp->p_flags & PF_X) && *ecode < tmp) |
497 | *ecode = tmp; | 534 | *ecode = tmp; |
498 | if(*edata < tmp) | 535 | if (*edata < tmp) |
499 | *edata = tmp; | 536 | *edata = tmp; |
500 | 537 | ||
501 | tmp = epp->p_vaddr + epp->p_memsz; | 538 | tmp = epp->p_vaddr + epp->p_memsz; |
502 | if(tmp > *ebrk) | 539 | if (tmp > *ebrk) |
503 | *ebrk = tmp; | 540 | *ebrk = tmp; |
504 | } | 541 | } |
505 | 542 | ||
@@ -513,12 +550,12 @@ static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp, | |||
513 | int i; | 550 | int i; |
514 | 551 | ||
515 | *eentry = 0xffffffff; | 552 | *eentry = 0xffffffff; |
516 | for(i = 0; i < pnum; i++, epp++) { | 553 | for (i = 0; i < pnum; i++, epp++) { |
517 | if(epp->p_type != PT_INTERP) | 554 | if (epp->p_type != PT_INTERP) |
518 | continue; | 555 | continue; |
519 | 556 | ||
520 | /* We should have fielded this error elsewhere... */ | 557 | /* We should have fielded this error elsewhere... */ |
521 | if(*eentry != 0xffffffff) | 558 | if (*eentry != 0xffffffff) |
522 | return -1; | 559 | return -1; |
523 | 560 | ||
524 | set_fs(old_fs); | 561 | set_fs(old_fs); |
@@ -604,9 +641,7 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) | |||
604 | if (elf_ex.e_shnum > 20) | 641 | if (elf_ex.e_shnum > 20) |
605 | goto out; | 642 | goto out; |
606 | 643 | ||
607 | #ifdef DEBUG | ||
608 | print_elfhdr(&elf_ex); | 644 | print_elfhdr(&elf_ex); |
609 | #endif | ||
610 | 645 | ||
611 | /* Now read in all of the header information */ | 646 | /* Now read in all of the header information */ |
612 | size = elf_ex.e_phentsize * elf_ex.e_phnum; | 647 | size = elf_ex.e_phentsize * elf_ex.e_phnum; |
@@ -622,13 +657,11 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) | |||
622 | if (retval < 0) | 657 | if (retval < 0) |
623 | goto out_free_ph; | 658 | goto out_free_ph; |
624 | 659 | ||
625 | #ifdef DEBUG | ||
626 | dump_phdrs(elf_phdata, elf_ex.e_phnum); | 660 | dump_phdrs(elf_phdata, elf_ex.e_phnum); |
627 | #endif | ||
628 | 661 | ||
629 | /* Set some things for later. */ | 662 | /* Set some things for later. */ |
630 | for(i = 0; i < elf_ex.e_phnum; i++) { | 663 | for (i = 0; i < elf_ex.e_phnum; i++) { |
631 | switch(elf_phdata[i].p_type) { | 664 | switch (elf_phdata[i].p_type) { |
632 | case PT_INTERP: | 665 | case PT_INTERP: |
633 | has_interp = 1; | 666 | has_interp = 1; |
634 | elf_ihdr = &elf_phdata[i]; | 667 | elf_ihdr = &elf_phdata[i]; |
@@ -667,7 +700,7 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) | |||
667 | 700 | ||
668 | if (elf_interpreter) { | 701 | if (elf_interpreter) { |
669 | retval = verify_irix_interpreter(&interp_elf_ex); | 702 | retval = verify_irix_interpreter(&interp_elf_ex); |
670 | if(retval) | 703 | if (retval) |
671 | goto out_free_interp; | 704 | goto out_free_interp; |
672 | } | 705 | } |
673 | 706 | ||
@@ -706,12 +739,12 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) | |||
706 | &load_addr, &start_code, &elf_bss, &end_code, | 739 | &load_addr, &start_code, &elf_bss, &end_code, |
707 | &end_data, &elf_brk); | 740 | &end_data, &elf_brk); |
708 | 741 | ||
709 | if(elf_interpreter) { | 742 | if (elf_interpreter) { |
710 | retval = map_interpreter(elf_phdata, &interp_elf_ex, | 743 | retval = map_interpreter(elf_phdata, &interp_elf_ex, |
711 | interpreter, &interp_load_addr, | 744 | interpreter, &interp_load_addr, |
712 | elf_ex.e_phnum, old_fs, &elf_entry); | 745 | elf_ex.e_phnum, old_fs, &elf_entry); |
713 | kfree(elf_interpreter); | 746 | kfree(elf_interpreter); |
714 | if(retval) { | 747 | if (retval) { |
715 | set_fs(old_fs); | 748 | set_fs(old_fs); |
716 | printk("Unable to load IRIX ELF interpreter\n"); | 749 | printk("Unable to load IRIX ELF interpreter\n"); |
717 | send_sig(SIGSEGV, current, 0); | 750 | send_sig(SIGSEGV, current, 0); |
@@ -809,12 +842,12 @@ static int load_irix_library(struct file *file) | |||
809 | return -ENOEXEC; | 842 | return -ENOEXEC; |
810 | 843 | ||
811 | /* First of all, some simple consistency checks. */ | 844 | /* First of all, some simple consistency checks. */ |
812 | if(elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 || | 845 | if (elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 || |
813 | !file->f_op->mmap) | 846 | !file->f_op->mmap) |
814 | return -ENOEXEC; | 847 | return -ENOEXEC; |
815 | 848 | ||
816 | /* Now read in all of the header information. */ | 849 | /* Now read in all of the header information. */ |
817 | if(sizeof(struct elf_phdr) * elf_ex.e_phnum > PAGE_SIZE) | 850 | if (sizeof(struct elf_phdr) * elf_ex.e_phnum > PAGE_SIZE) |
818 | return -ENOEXEC; | 851 | return -ENOEXEC; |
819 | 852 | ||
820 | elf_phdata = kmalloc(sizeof(struct elf_phdr) * elf_ex.e_phnum, GFP_KERNEL); | 853 | elf_phdata = kmalloc(sizeof(struct elf_phdr) * elf_ex.e_phnum, GFP_KERNEL); |
@@ -825,15 +858,15 @@ static int load_irix_library(struct file *file) | |||
825 | sizeof(struct elf_phdr) * elf_ex.e_phnum); | 858 | sizeof(struct elf_phdr) * elf_ex.e_phnum); |
826 | 859 | ||
827 | j = 0; | 860 | j = 0; |
828 | for(i=0; i<elf_ex.e_phnum; i++) | 861 | for (i=0; i<elf_ex.e_phnum; i++) |
829 | if((elf_phdata + i)->p_type == PT_LOAD) j++; | 862 | if ((elf_phdata + i)->p_type == PT_LOAD) j++; |
830 | 863 | ||
831 | if(j != 1) { | 864 | if (j != 1) { |
832 | kfree(elf_phdata); | 865 | kfree(elf_phdata); |
833 | return -ENOEXEC; | 866 | return -ENOEXEC; |
834 | } | 867 | } |
835 | 868 | ||
836 | while(elf_phdata->p_type != PT_LOAD) elf_phdata++; | 869 | while (elf_phdata->p_type != PT_LOAD) elf_phdata++; |
837 | 870 | ||
838 | /* Now use mmap to map the library into memory. */ | 871 | /* Now use mmap to map the library into memory. */ |
839 | down_write(¤t->mm->mmap_sem); | 872 | down_write(¤t->mm->mmap_sem); |
@@ -889,9 +922,7 @@ unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt) | |||
889 | return -EFAULT; | 922 | return -EFAULT; |
890 | } | 923 | } |
891 | 924 | ||
892 | #ifdef DEBUG | ||
893 | dump_phdrs(user_phdrp, cnt); | 925 | dump_phdrs(user_phdrp, cnt); |
894 | #endif | ||
895 | 926 | ||
896 | for (i = 0; i < cnt; i++, hp++) { | 927 | for (i = 0; i < cnt; i++, hp++) { |
897 | if (__get_user(type, &hp->p_type)) | 928 | if (__get_user(type, &hp->p_type)) |
@@ -905,14 +936,14 @@ unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt) | |||
905 | filp = fget(fd); | 936 | filp = fget(fd); |
906 | if (!filp) | 937 | if (!filp) |
907 | return -EACCES; | 938 | return -EACCES; |
908 | if(!filp->f_op) { | 939 | if (!filp->f_op) { |
909 | printk("irix_mapelf: Bogon filp!\n"); | 940 | printk("irix_mapelf: Bogon filp!\n"); |
910 | fput(filp); | 941 | fput(filp); |
911 | return -EACCES; | 942 | return -EACCES; |
912 | } | 943 | } |
913 | 944 | ||
914 | hp = user_phdrp; | 945 | hp = user_phdrp; |
915 | for(i = 0; i < cnt; i++, hp++) { | 946 | for (i = 0; i < cnt; i++, hp++) { |
916 | int prot; | 947 | int prot; |
917 | 948 | ||
918 | retval = __get_user(vaddr, &hp->p_vaddr); | 949 | retval = __get_user(vaddr, &hp->p_vaddr); |
@@ -1015,8 +1046,6 @@ static int notesize(struct memelfnote *en) | |||
1015 | return sz; | 1046 | return sz; |
1016 | } | 1047 | } |
1017 | 1048 | ||
1018 | /* #define DEBUG */ | ||
1019 | |||
1020 | #define DUMP_WRITE(addr, nr) \ | 1049 | #define DUMP_WRITE(addr, nr) \ |
1021 | if (!dump_write(file, (addr), (nr))) \ | 1050 | if (!dump_write(file, (addr), (nr))) \ |
1022 | goto end_coredump; | 1051 | goto end_coredump; |
@@ -1093,9 +1122,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) | |||
1093 | 1122 | ||
1094 | segs++; | 1123 | segs++; |
1095 | } | 1124 | } |
1096 | #ifdef DEBUG | 1125 | pr_debug("irix_core_dump: %d segs taking %d bytes\n", segs, size); |
1097 | printk("irix_core_dump: %d segs taking %d bytes\n", segs, size); | ||
1098 | #endif | ||
1099 | 1126 | ||
1100 | /* Set up header. */ | 1127 | /* Set up header. */ |
1101 | memcpy(elf.e_ident, ELFMAG, SELFMAG); | 1128 | memcpy(elf.e_ident, ELFMAG, SELFMAG); |
@@ -1221,7 +1248,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) | |||
1221 | struct elf_phdr phdr; | 1248 | struct elf_phdr phdr; |
1222 | int sz = 0; | 1249 | int sz = 0; |
1223 | 1250 | ||
1224 | for(i = 0; i < numnote; i++) | 1251 | for (i = 0; i < numnote; i++) |
1225 | sz += notesize(¬es[i]); | 1252 | sz += notesize(¬es[i]); |
1226 | 1253 | ||
1227 | phdr.p_type = PT_NOTE; | 1254 | phdr.p_type = PT_NOTE; |
@@ -1241,7 +1268,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) | |||
1241 | dataoff = offset = roundup(offset, PAGE_SIZE); | 1268 | dataoff = offset = roundup(offset, PAGE_SIZE); |
1242 | 1269 | ||
1243 | /* Write program headers for segments dump. */ | 1270 | /* Write program headers for segments dump. */ |
1244 | for(vma = current->mm->mmap, i = 0; | 1271 | for (vma = current->mm->mmap, i = 0; |
1245 | i < segs && vma != NULL; vma = vma->vm_next) { | 1272 | i < segs && vma != NULL; vma = vma->vm_next) { |
1246 | struct elf_phdr phdr; | 1273 | struct elf_phdr phdr; |
1247 | size_t sz; | 1274 | size_t sz; |
@@ -1267,7 +1294,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) | |||
1267 | DUMP_WRITE(&phdr, sizeof(phdr)); | 1294 | DUMP_WRITE(&phdr, sizeof(phdr)); |
1268 | } | 1295 | } |
1269 | 1296 | ||
1270 | for(i = 0; i < numnote; i++) | 1297 | for (i = 0; i < numnote; i++) |
1271 | if (!writenote(¬es[i], file)) | 1298 | if (!writenote(¬es[i], file)) |
1272 | goto end_coredump; | 1299 | goto end_coredump; |
1273 | 1300 | ||
@@ -1275,7 +1302,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) | |||
1275 | 1302 | ||
1276 | DUMP_SEEK(dataoff); | 1303 | DUMP_SEEK(dataoff); |
1277 | 1304 | ||
1278 | for(i = 0, vma = current->mm->mmap; | 1305 | for (i = 0, vma = current->mm->mmap; |
1279 | i < segs && vma != NULL; | 1306 | i < segs && vma != NULL; |
1280 | vma = vma->vm_next) { | 1307 | vma = vma->vm_next) { |
1281 | unsigned long addr = vma->vm_start; | 1308 | unsigned long addr = vma->vm_start; |
@@ -1284,9 +1311,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) | |||
1284 | if (!maydump(vma)) | 1311 | if (!maydump(vma)) |
1285 | continue; | 1312 | continue; |
1286 | i++; | 1313 | i++; |
1287 | #ifdef DEBUG | 1314 | pr_debug("elf_core_dump: writing %08lx %lx\n", addr, len); |
1288 | printk("elf_core_dump: writing %08lx %lx\n", addr, len); | ||
1289 | #endif | ||
1290 | DUMP_WRITE((void __user *)addr, len); | 1315 | DUMP_WRITE((void __user *)addr, len); |
1291 | } | 1316 | } |
1292 | 1317 | ||
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index bcaad6696082..2967537221e2 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c | |||
@@ -112,7 +112,7 @@ msc_bind_eic_interrupt (unsigned int irq, unsigned int set) | |||
112 | } | 112 | } |
113 | 113 | ||
114 | struct irq_chip msc_levelirq_type = { | 114 | struct irq_chip msc_levelirq_type = { |
115 | .typename = "SOC-it-Level", | 115 | .name = "SOC-it-Level", |
116 | .ack = level_mask_and_ack_msc_irq, | 116 | .ack = level_mask_and_ack_msc_irq, |
117 | .mask = mask_msc_irq, | 117 | .mask = mask_msc_irq, |
118 | .mask_ack = level_mask_and_ack_msc_irq, | 118 | .mask_ack = level_mask_and_ack_msc_irq, |
@@ -122,7 +122,7 @@ struct irq_chip msc_levelirq_type = { | |||
122 | }; | 122 | }; |
123 | 123 | ||
124 | struct irq_chip msc_edgeirq_type = { | 124 | struct irq_chip msc_edgeirq_type = { |
125 | .typename = "SOC-it-Edge", | 125 | .name = "SOC-it-Edge", |
126 | .ack = edge_mask_and_ack_msc_irq, | 126 | .ack = edge_mask_and_ack_msc_irq, |
127 | .mask = mask_msc_irq, | 127 | .mask = mask_msc_irq, |
128 | .mask_ack = edge_mask_and_ack_msc_irq, | 128 | .mask_ack = edge_mask_and_ack_msc_irq, |
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c index efbd219845b5..3dd561832e4c 100644 --- a/arch/mips/kernel/irq-mv6434x.c +++ b/arch/mips/kernel/irq-mv6434x.c | |||
@@ -23,13 +23,13 @@ static unsigned int irq_base; | |||
23 | 23 | ||
24 | static inline int ls1bit32(unsigned int x) | 24 | static inline int ls1bit32(unsigned int x) |
25 | { | 25 | { |
26 | int b = 31, s; | 26 | int b = 31, s; |
27 | 27 | ||
28 | s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s; | 28 | s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s; |
29 | s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s; | 29 | s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s; |
30 | s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s; | 30 | s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s; |
31 | s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s; | 31 | s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s; |
32 | s = 1; if (x << 1 == 0) s = 0; b -= s; | 32 | s = 1; if (x << 1 == 0) s = 0; b -= s; |
33 | 33 | ||
34 | return b; | 34 | return b; |
35 | } | 35 | } |
@@ -92,7 +92,7 @@ void ll_mv64340_irq(void) | |||
92 | } | 92 | } |
93 | 93 | ||
94 | struct irq_chip mv64340_irq_type = { | 94 | struct irq_chip mv64340_irq_type = { |
95 | .typename = "MV-64340", | 95 | .name = "MV-64340", |
96 | .ack = mask_mv64340_irq, | 96 | .ack = mask_mv64340_irq, |
97 | .mask = mask_mv64340_irq, | 97 | .mask = mask_mv64340_irq, |
98 | .mask_ack = mask_mv64340_irq, | 98 | .mask_ack = mask_mv64340_irq, |
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 123324ba8c14..250732883488 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c | |||
@@ -17,28 +17,27 @@ | |||
17 | #include <asm/mipsregs.h> | 17 | #include <asm/mipsregs.h> |
18 | #include <asm/system.h> | 18 | #include <asm/system.h> |
19 | 19 | ||
20 | static int irq_base; | ||
21 | |||
22 | static inline void unmask_rm7k_irq(unsigned int irq) | 20 | static inline void unmask_rm7k_irq(unsigned int irq) |
23 | { | 21 | { |
24 | set_c0_intcontrol(0x100 << (irq - irq_base)); | 22 | set_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); |
25 | } | 23 | } |
26 | 24 | ||
27 | static inline void mask_rm7k_irq(unsigned int irq) | 25 | static inline void mask_rm7k_irq(unsigned int irq) |
28 | { | 26 | { |
29 | clear_c0_intcontrol(0x100 << (irq - irq_base)); | 27 | clear_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); |
30 | } | 28 | } |
31 | 29 | ||
32 | static struct irq_chip rm7k_irq_controller = { | 30 | static struct irq_chip rm7k_irq_controller = { |
33 | .typename = "RM7000", | 31 | .name = "RM7000", |
34 | .ack = mask_rm7k_irq, | 32 | .ack = mask_rm7k_irq, |
35 | .mask = mask_rm7k_irq, | 33 | .mask = mask_rm7k_irq, |
36 | .mask_ack = mask_rm7k_irq, | 34 | .mask_ack = mask_rm7k_irq, |
37 | .unmask = unmask_rm7k_irq, | 35 | .unmask = unmask_rm7k_irq, |
38 | }; | 36 | }; |
39 | 37 | ||
40 | void __init rm7k_cpu_irq_init(int base) | 38 | void __init rm7k_cpu_irq_init(void) |
41 | { | 39 | { |
40 | int base = RM7K_CPU_IRQ_BASE; | ||
42 | int i; | 41 | int i; |
43 | 42 | ||
44 | clear_c0_intcontrol(0x00000f00); /* Mask all */ | 43 | clear_c0_intcontrol(0x00000f00); /* Mask all */ |
@@ -46,6 +45,4 @@ void __init rm7k_cpu_irq_init(int base) | |||
46 | for (i = base; i < base + 4; i++) | 45 | for (i = base; i < base + 4; i++) |
47 | set_irq_chip_and_handler(i, &rm7k_irq_controller, | 46 | set_irq_chip_and_handler(i, &rm7k_irq_controller, |
48 | handle_level_irq); | 47 | handle_level_irq); |
49 | |||
50 | irq_base = base; | ||
51 | } | 48 | } |
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index 0e6f4c5349d2..ae83d2df6f31 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c | |||
@@ -18,16 +18,14 @@ | |||
18 | #include <asm/mipsregs.h> | 18 | #include <asm/mipsregs.h> |
19 | #include <asm/system.h> | 19 | #include <asm/system.h> |
20 | 20 | ||
21 | static int irq_base; | ||
22 | |||
23 | static inline void unmask_rm9k_irq(unsigned int irq) | 21 | static inline void unmask_rm9k_irq(unsigned int irq) |
24 | { | 22 | { |
25 | set_c0_intcontrol(0x1000 << (irq - irq_base)); | 23 | set_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); |
26 | } | 24 | } |
27 | 25 | ||
28 | static inline void mask_rm9k_irq(unsigned int irq) | 26 | static inline void mask_rm9k_irq(unsigned int irq) |
29 | { | 27 | { |
30 | clear_c0_intcontrol(0x1000 << (irq - irq_base)); | 28 | clear_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); |
31 | } | 29 | } |
32 | 30 | ||
33 | static inline void rm9k_cpu_irq_enable(unsigned int irq) | 31 | static inline void rm9k_cpu_irq_enable(unsigned int irq) |
@@ -39,15 +37,6 @@ static inline void rm9k_cpu_irq_enable(unsigned int irq) | |||
39 | local_irq_restore(flags); | 37 | local_irq_restore(flags); |
40 | } | 38 | } |
41 | 39 | ||
42 | static void rm9k_cpu_irq_disable(unsigned int irq) | ||
43 | { | ||
44 | unsigned long flags; | ||
45 | |||
46 | local_irq_save(flags); | ||
47 | mask_rm9k_irq(irq); | ||
48 | local_irq_restore(flags); | ||
49 | } | ||
50 | |||
51 | /* | 40 | /* |
52 | * Performance counter interrupts are global on all processors. | 41 | * Performance counter interrupts are global on all processors. |
53 | */ | 42 | */ |
@@ -81,7 +70,7 @@ static void rm9k_perfcounter_irq_shutdown(unsigned int irq) | |||
81 | } | 70 | } |
82 | 71 | ||
83 | static struct irq_chip rm9k_irq_controller = { | 72 | static struct irq_chip rm9k_irq_controller = { |
84 | .typename = "RM9000", | 73 | .name = "RM9000", |
85 | .ack = mask_rm9k_irq, | 74 | .ack = mask_rm9k_irq, |
86 | .mask = mask_rm9k_irq, | 75 | .mask = mask_rm9k_irq, |
87 | .mask_ack = mask_rm9k_irq, | 76 | .mask_ack = mask_rm9k_irq, |
@@ -89,7 +78,7 @@ static struct irq_chip rm9k_irq_controller = { | |||
89 | }; | 78 | }; |
90 | 79 | ||
91 | static struct irq_chip rm9k_perfcounter_irq = { | 80 | static struct irq_chip rm9k_perfcounter_irq = { |
92 | .typename = "RM9000", | 81 | .name = "RM9000", |
93 | .startup = rm9k_perfcounter_irq_startup, | 82 | .startup = rm9k_perfcounter_irq_startup, |
94 | .shutdown = rm9k_perfcounter_irq_shutdown, | 83 | .shutdown = rm9k_perfcounter_irq_shutdown, |
95 | .ack = mask_rm9k_irq, | 84 | .ack = mask_rm9k_irq, |
@@ -102,8 +91,9 @@ unsigned int rm9000_perfcount_irq; | |||
102 | 91 | ||
103 | EXPORT_SYMBOL(rm9000_perfcount_irq); | 92 | EXPORT_SYMBOL(rm9000_perfcount_irq); |
104 | 93 | ||
105 | void __init rm9k_cpu_irq_init(int base) | 94 | void __init rm9k_cpu_irq_init(void) |
106 | { | 95 | { |
96 | int base = RM9K_CPU_IRQ_BASE; | ||
107 | int i; | 97 | int i; |
108 | 98 | ||
109 | clear_c0_intcontrol(0x0000f000); /* Mask all */ | 99 | clear_c0_intcontrol(0x0000f000); /* Mask all */ |
@@ -115,6 +105,4 @@ void __init rm9k_cpu_irq_init(int base) | |||
115 | rm9000_perfcount_irq = base + 1; | 105 | rm9000_perfcount_irq = base + 1; |
116 | set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, | 106 | set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, |
117 | handle_level_irq); | 107 | handle_level_irq); |
118 | |||
119 | irq_base = base; | ||
120 | } | 108 | } |
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index fcc86b96ccf6..7b66e03b5899 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c | |||
@@ -25,7 +25,7 @@ | |||
25 | * Don't even think about using this on SMP. You have been warned. | 25 | * Don't even think about using this on SMP. You have been warned. |
26 | * | 26 | * |
27 | * This file exports one global function: | 27 | * This file exports one global function: |
28 | * void mips_cpu_irq_init(int irq_base); | 28 | * void mips_cpu_irq_init(void); |
29 | */ | 29 | */ |
30 | #include <linux/init.h> | 30 | #include <linux/init.h> |
31 | #include <linux/interrupt.h> | 31 | #include <linux/interrupt.h> |
@@ -36,22 +36,20 @@ | |||
36 | #include <asm/mipsmtregs.h> | 36 | #include <asm/mipsmtregs.h> |
37 | #include <asm/system.h> | 37 | #include <asm/system.h> |
38 | 38 | ||
39 | static int mips_cpu_irq_base; | ||
40 | |||
41 | static inline void unmask_mips_irq(unsigned int irq) | 39 | static inline void unmask_mips_irq(unsigned int irq) |
42 | { | 40 | { |
43 | set_c0_status(0x100 << (irq - mips_cpu_irq_base)); | 41 | set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); |
44 | irq_enable_hazard(); | 42 | irq_enable_hazard(); |
45 | } | 43 | } |
46 | 44 | ||
47 | static inline void mask_mips_irq(unsigned int irq) | 45 | static inline void mask_mips_irq(unsigned int irq) |
48 | { | 46 | { |
49 | clear_c0_status(0x100 << (irq - mips_cpu_irq_base)); | 47 | clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); |
50 | irq_disable_hazard(); | 48 | irq_disable_hazard(); |
51 | } | 49 | } |
52 | 50 | ||
53 | static struct irq_chip mips_cpu_irq_controller = { | 51 | static struct irq_chip mips_cpu_irq_controller = { |
54 | .typename = "MIPS", | 52 | .name = "MIPS", |
55 | .ack = mask_mips_irq, | 53 | .ack = mask_mips_irq, |
56 | .mask = mask_mips_irq, | 54 | .mask = mask_mips_irq, |
57 | .mask_ack = mask_mips_irq, | 55 | .mask_ack = mask_mips_irq, |
@@ -70,7 +68,7 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) | |||
70 | { | 68 | { |
71 | unsigned int vpflags = dvpe(); | 69 | unsigned int vpflags = dvpe(); |
72 | 70 | ||
73 | clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); | 71 | clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); |
74 | evpe(vpflags); | 72 | evpe(vpflags); |
75 | unmask_mips_mt_irq(irq); | 73 | unmask_mips_mt_irq(irq); |
76 | 74 | ||
@@ -84,13 +82,13 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) | |||
84 | static void mips_mt_cpu_irq_ack(unsigned int irq) | 82 | static void mips_mt_cpu_irq_ack(unsigned int irq) |
85 | { | 83 | { |
86 | unsigned int vpflags = dvpe(); | 84 | unsigned int vpflags = dvpe(); |
87 | clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); | 85 | clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); |
88 | evpe(vpflags); | 86 | evpe(vpflags); |
89 | mask_mips_mt_irq(irq); | 87 | mask_mips_mt_irq(irq); |
90 | } | 88 | } |
91 | 89 | ||
92 | static struct irq_chip mips_mt_cpu_irq_controller = { | 90 | static struct irq_chip mips_mt_cpu_irq_controller = { |
93 | .typename = "MIPS", | 91 | .name = "MIPS", |
94 | .startup = mips_mt_cpu_irq_startup, | 92 | .startup = mips_mt_cpu_irq_startup, |
95 | .ack = mips_mt_cpu_irq_ack, | 93 | .ack = mips_mt_cpu_irq_ack, |
96 | .mask = mask_mips_mt_irq, | 94 | .mask = mask_mips_mt_irq, |
@@ -99,8 +97,9 @@ static struct irq_chip mips_mt_cpu_irq_controller = { | |||
99 | .eoi = unmask_mips_mt_irq, | 97 | .eoi = unmask_mips_mt_irq, |
100 | }; | 98 | }; |
101 | 99 | ||
102 | void __init mips_cpu_irq_init(int irq_base) | 100 | void __init mips_cpu_irq_init(void) |
103 | { | 101 | { |
102 | int irq_base = MIPS_CPU_IRQ_BASE; | ||
104 | int i; | 103 | int i; |
105 | 104 | ||
106 | /* Mask interrupts. */ | 105 | /* Mask interrupts. */ |
@@ -118,6 +117,4 @@ void __init mips_cpu_irq_init(int irq_base) | |||
118 | for (i = irq_base + 2; i < irq_base + 8; i++) | 117 | for (i = irq_base + 2; i < irq_base + 8; i++) |
119 | set_irq_chip_and_handler(i, &mips_cpu_irq_controller, | 118 | set_irq_chip_and_handler(i, &mips_cpu_irq_controller, |
120 | handle_level_irq); | 119 | handle_level_irq); |
121 | |||
122 | mips_cpu_irq_base = irq_base; | ||
123 | } | 120 | } |
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index de3fae260ff8..0b8ce59429a8 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c | |||
@@ -194,15 +194,15 @@ sysn32_waitid(int which, compat_pid_t pid, | |||
194 | } | 194 | } |
195 | 195 | ||
196 | struct sysinfo32 { | 196 | struct sysinfo32 { |
197 | s32 uptime; | 197 | s32 uptime; |
198 | u32 loads[3]; | 198 | u32 loads[3]; |
199 | u32 totalram; | 199 | u32 totalram; |
200 | u32 freeram; | 200 | u32 freeram; |
201 | u32 sharedram; | 201 | u32 sharedram; |
202 | u32 bufferram; | 202 | u32 bufferram; |
203 | u32 totalswap; | 203 | u32 totalswap; |
204 | u32 freeswap; | 204 | u32 freeswap; |
205 | u16 procs; | 205 | u16 procs; |
206 | u32 totalhigh; | 206 | u32 totalhigh; |
207 | u32 freehigh; | 207 | u32 freehigh; |
208 | u32 mem_unit; | 208 | u32 mem_unit; |
@@ -558,7 +558,7 @@ extern asmlinkage long sys_ustat(dev_t dev, struct ustat __user * ubuf); | |||
558 | asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32) | 558 | asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32) |
559 | { | 559 | { |
560 | int err; | 560 | int err; |
561 | struct ustat tmp; | 561 | struct ustat tmp; |
562 | struct ustat32 tmp32; | 562 | struct ustat32 tmp32; |
563 | mm_segment_t old_fs = get_fs(); | 563 | mm_segment_t old_fs = get_fs(); |
564 | 564 | ||
@@ -569,11 +569,11 @@ asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32) | |||
569 | if (err) | 569 | if (err) |
570 | goto out; | 570 | goto out; |
571 | 571 | ||
572 | memset(&tmp32,0,sizeof(struct ustat32)); | 572 | memset(&tmp32,0,sizeof(struct ustat32)); |
573 | tmp32.f_tfree = tmp.f_tfree; | 573 | tmp32.f_tfree = tmp.f_tfree; |
574 | tmp32.f_tinode = tmp.f_tinode; | 574 | tmp32.f_tinode = tmp.f_tinode; |
575 | 575 | ||
576 | err = copy_to_user(ubuf32,&tmp32,sizeof(struct ustat32)) ? -EFAULT : 0; | 576 | err = copy_to_user(ubuf32,&tmp32,sizeof(struct ustat32)) ? -EFAULT : 0; |
577 | 577 | ||
578 | out: | 578 | out: |
579 | return err; | 579 | return err; |
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c index c1373a6e668b..a32f6797353a 100644 --- a/arch/mips/kernel/mips-mt.c +++ b/arch/mips/kernel/mips-mt.c | |||
@@ -96,6 +96,10 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, | |||
96 | goto out_unlock; | 96 | goto out_unlock; |
97 | } | 97 | } |
98 | 98 | ||
99 | retval = security_task_setscheduler(p, 0, NULL); | ||
100 | if (retval) | ||
101 | goto out_unlock; | ||
102 | |||
99 | /* Record new user-specified CPU set for future reference */ | 103 | /* Record new user-specified CPU set for future reference */ |
100 | p->thread.user_cpus_allowed = new_mask; | 104 | p->thread.user_cpus_allowed = new_mask; |
101 | 105 | ||
@@ -141,8 +145,9 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len, | |||
141 | p = find_process_by_pid(pid); | 145 | p = find_process_by_pid(pid); |
142 | if (!p) | 146 | if (!p) |
143 | goto out_unlock; | 147 | goto out_unlock; |
144 | 148 | retval = security_task_getscheduler(p); | |
145 | retval = 0; | 149 | if (retval) |
150 | goto out_unlock; | ||
146 | 151 | ||
147 | cpus_and(mask, p->thread.user_cpus_allowed, cpu_possible_map); | 152 | cpus_and(mask, p->thread.user_cpus_allowed, cpu_possible_map); |
148 | 153 | ||
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 4ed37ba19731..5ddc2e9deecf 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c | |||
@@ -31,13 +31,13 @@ static const char *cpu_name[] = { | |||
31 | [CPU_R4000PC] = "R4000PC", | 31 | [CPU_R4000PC] = "R4000PC", |
32 | [CPU_R4000SC] = "R4000SC", | 32 | [CPU_R4000SC] = "R4000SC", |
33 | [CPU_R4000MC] = "R4000MC", | 33 | [CPU_R4000MC] = "R4000MC", |
34 | [CPU_R4200] = "R4200", | 34 | [CPU_R4200] = "R4200", |
35 | [CPU_R4400PC] = "R4400PC", | 35 | [CPU_R4400PC] = "R4400PC", |
36 | [CPU_R4400SC] = "R4400SC", | 36 | [CPU_R4400SC] = "R4400SC", |
37 | [CPU_R4400MC] = "R4400MC", | 37 | [CPU_R4400MC] = "R4400MC", |
38 | [CPU_R4600] = "R4600", | 38 | [CPU_R4600] = "R4600", |
39 | [CPU_R6000] = "R6000", | 39 | [CPU_R6000] = "R6000", |
40 | [CPU_R6000A] = "R6000A", | 40 | [CPU_R6000A] = "R6000A", |
41 | [CPU_R8000] = "R8000", | 41 | [CPU_R8000] = "R8000", |
42 | [CPU_R10000] = "R10000", | 42 | [CPU_R10000] = "R10000", |
43 | [CPU_R12000] = "R12000", | 43 | [CPU_R12000] = "R12000", |
@@ -46,14 +46,14 @@ static const char *cpu_name[] = { | |||
46 | [CPU_R4650] = "R4650", | 46 | [CPU_R4650] = "R4650", |
47 | [CPU_R4700] = "R4700", | 47 | [CPU_R4700] = "R4700", |
48 | [CPU_R5000] = "R5000", | 48 | [CPU_R5000] = "R5000", |
49 | [CPU_R5000A] = "R5000A", | 49 | [CPU_R5000A] = "R5000A", |
50 | [CPU_R4640] = "R4640", | 50 | [CPU_R4640] = "R4640", |
51 | [CPU_NEVADA] = "Nevada", | 51 | [CPU_NEVADA] = "Nevada", |
52 | [CPU_RM7000] = "RM7000", | 52 | [CPU_RM7000] = "RM7000", |
53 | [CPU_RM9000] = "RM9000", | 53 | [CPU_RM9000] = "RM9000", |
54 | [CPU_R5432] = "R5432", | 54 | [CPU_R5432] = "R5432", |
55 | [CPU_4KC] = "MIPS 4Kc", | 55 | [CPU_4KC] = "MIPS 4Kc", |
56 | [CPU_5KC] = "MIPS 5Kc", | 56 | [CPU_5KC] = "MIPS 5Kc", |
57 | [CPU_R4310] = "R4310", | 57 | [CPU_R4310] = "R4310", |
58 | [CPU_SB1] = "SiByte SB1", | 58 | [CPU_SB1] = "SiByte SB1", |
59 | [CPU_SB1A] = "SiByte SB1A", | 59 | [CPU_SB1A] = "SiByte SB1A", |
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index ec8209f3a0c6..04e5b38d327d 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c | |||
@@ -41,10 +41,6 @@ | |||
41 | #include <asm/isadep.h> | 41 | #include <asm/isadep.h> |
42 | #include <asm/inst.h> | 42 | #include <asm/inst.h> |
43 | #include <asm/stacktrace.h> | 43 | #include <asm/stacktrace.h> |
44 | #ifdef CONFIG_MIPS_MT_SMTC | ||
45 | #include <asm/mipsmtregs.h> | ||
46 | extern void smtc_idle_loop_hook(void); | ||
47 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
48 | 44 | ||
49 | /* | 45 | /* |
50 | * The idle thread. There's no useful work to be done, so just try to conserve | 46 | * The idle thread. There's no useful work to be done, so just try to conserve |
@@ -57,6 +53,8 @@ ATTRIB_NORET void cpu_idle(void) | |||
57 | while (1) { | 53 | while (1) { |
58 | while (!need_resched()) { | 54 | while (!need_resched()) { |
59 | #ifdef CONFIG_MIPS_MT_SMTC | 55 | #ifdef CONFIG_MIPS_MT_SMTC |
56 | extern void smtc_idle_loop_hook(void); | ||
57 | |||
60 | smtc_idle_loop_hook(); | 58 | smtc_idle_loop_hook(); |
61 | #endif /* CONFIG_MIPS_MT_SMTC */ | 59 | #endif /* CONFIG_MIPS_MT_SMTC */ |
62 | if (cpu_wait) | 60 | if (cpu_wait) |
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index 880fa6e841ee..59c1577ecbb3 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S | |||
@@ -114,6 +114,14 @@ LEAF(_save_fp_context32) | |||
114 | */ | 114 | */ |
115 | LEAF(_restore_fp_context) | 115 | LEAF(_restore_fp_context) |
116 | EX lw t0, SC_FPC_CSR(a0) | 116 | EX lw t0, SC_FPC_CSR(a0) |
117 | |||
118 | /* Fail if the CSR has exceptions pending */ | ||
119 | srl t1, t0, 5 | ||
120 | and t1, t0 | ||
121 | andi t1, 0x1f << 7 | ||
122 | bnez t1, fault | ||
123 | nop | ||
124 | |||
117 | #ifdef CONFIG_64BIT | 125 | #ifdef CONFIG_64BIT |
118 | EX ldc1 $f1, SC_FPREGS+8(a0) | 126 | EX ldc1 $f1, SC_FPREGS+8(a0) |
119 | EX ldc1 $f3, SC_FPREGS+24(a0) | 127 | EX ldc1 $f3, SC_FPREGS+24(a0) |
@@ -157,6 +165,14 @@ LEAF(_restore_fp_context) | |||
157 | LEAF(_restore_fp_context32) | 165 | LEAF(_restore_fp_context32) |
158 | /* Restore an o32 sigcontext. */ | 166 | /* Restore an o32 sigcontext. */ |
159 | EX lw t0, SC32_FPC_CSR(a0) | 167 | EX lw t0, SC32_FPC_CSR(a0) |
168 | |||
169 | /* Fail if the CSR has exceptions pending */ | ||
170 | srl t1, t0, 5 | ||
171 | and t1, t0 | ||
172 | andi t1, 0x1f << 7 | ||
173 | bnez t1, fault | ||
174 | nop | ||
175 | |||
160 | EX ldc1 $f0, SC32_FPREGS+0(a0) | 176 | EX ldc1 $f0, SC32_FPREGS+0(a0) |
161 | EX ldc1 $f2, SC32_FPREGS+16(a0) | 177 | EX ldc1 $f2, SC32_FPREGS+16(a0) |
162 | EX ldc1 $f4, SC32_FPREGS+32(a0) | 178 | EX ldc1 $f4, SC32_FPREGS+32(a0) |
@@ -177,9 +193,10 @@ LEAF(_restore_fp_context32) | |||
177 | jr ra | 193 | jr ra |
178 | li v0, 0 # success | 194 | li v0, 0 # success |
179 | END(_restore_fp_context32) | 195 | END(_restore_fp_context32) |
180 | .set reorder | ||
181 | #endif | 196 | #endif |
182 | 197 | ||
198 | .set reorder | ||
199 | |||
183 | .type fault@function | 200 | .type fault@function |
184 | .ent fault | 201 | .ent fault |
185 | fault: li v0, -EFAULT # failure | 202 | fault: li v0, -EFAULT # failure |
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c index 5a99e3e0c96d..8610f4a925e9 100644 --- a/arch/mips/kernel/rtlx.c +++ b/arch/mips/kernel/rtlx.c | |||
@@ -63,7 +63,7 @@ extern void *vpe_get_shared(int index); | |||
63 | 63 | ||
64 | static void rtlx_dispatch(void) | 64 | static void rtlx_dispatch(void) |
65 | { | 65 | { |
66 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ); | 66 | do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_RTLX_IRQ); |
67 | } | 67 | } |
68 | 68 | ||
69 | 69 | ||
@@ -491,7 +491,7 @@ static struct irqaction rtlx_irq = { | |||
491 | .name = "RTLX", | 491 | .name = "RTLX", |
492 | }; | 492 | }; |
493 | 493 | ||
494 | static int rtlx_irq_num = MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ; | 494 | static int rtlx_irq_num = MIPS_CPU_IRQ_BASE + MIPS_CPU_RTLX_IRQ; |
495 | 495 | ||
496 | static char register_chrdev_failed[] __initdata = | 496 | static char register_chrdev_failed[] __initdata = |
497 | KERN_ERR "rtlx_module_init: unable to register device\n"; | 497 | KERN_ERR "rtlx_module_init: unable to register device\n"; |
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index a7bff2a54723..39add2341aa2 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
@@ -384,7 +384,7 @@ EXPORT(sysn32_call_table) | |||
384 | PTR sys_readlinkat | 384 | PTR sys_readlinkat |
385 | PTR sys_fchmodat | 385 | PTR sys_fchmodat |
386 | PTR sys_faccessat | 386 | PTR sys_faccessat |
387 | PTR sys_pselect6 | 387 | PTR compat_sys_pselect6 |
388 | PTR sys_ppoll /* 6265 */ | 388 | PTR sys_ppoll /* 6265 */ |
389 | PTR sys_unshare | 389 | PTR sys_unshare |
390 | PTR sys_splice | 390 | PTR sys_splice |
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index e91379c1be1d..c58b8e0105ea 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
@@ -506,7 +506,7 @@ sys_call_table: | |||
506 | PTR sys_readlinkat | 506 | PTR sys_readlinkat |
507 | PTR sys_fchmodat | 507 | PTR sys_fchmodat |
508 | PTR sys_faccessat /* 4300 */ | 508 | PTR sys_faccessat /* 4300 */ |
509 | PTR sys_pselect6 | 509 | PTR compat_sys_pselect6 |
510 | PTR sys_ppoll | 510 | PTR sys_ppoll |
511 | PTR sys_unshare | 511 | PTR sys_unshare |
512 | PTR sys_splice | 512 | PTR sys_splice |
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 89440a0d8528..d2e01e7167b8 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
@@ -271,8 +271,7 @@ static void __init bootmem_init(void) | |||
271 | static void __init bootmem_init(void) | 271 | static void __init bootmem_init(void) |
272 | { | 272 | { |
273 | unsigned long reserved_end; | 273 | unsigned long reserved_end; |
274 | unsigned long highest = 0; | 274 | unsigned long mapstart = ~0UL; |
275 | unsigned long mapstart = -1UL; | ||
276 | unsigned long bootmap_size; | 275 | unsigned long bootmap_size; |
277 | int i; | 276 | int i; |
278 | 277 | ||
@@ -284,6 +283,13 @@ static void __init bootmem_init(void) | |||
284 | reserved_end = max(init_initrd(), PFN_UP(__pa_symbol(&_end))); | 283 | reserved_end = max(init_initrd(), PFN_UP(__pa_symbol(&_end))); |
285 | 284 | ||
286 | /* | 285 | /* |
286 | * max_low_pfn is not a number of pages. The number of pages | ||
287 | * of the system is given by 'max_low_pfn - min_low_pfn'. | ||
288 | */ | ||
289 | min_low_pfn = ~0UL; | ||
290 | max_low_pfn = 0; | ||
291 | |||
292 | /* | ||
287 | * Find the highest page frame number we have available. | 293 | * Find the highest page frame number we have available. |
288 | */ | 294 | */ |
289 | for (i = 0; i < boot_mem_map.nr_map; i++) { | 295 | for (i = 0; i < boot_mem_map.nr_map; i++) { |
@@ -296,8 +302,10 @@ static void __init bootmem_init(void) | |||
296 | end = PFN_DOWN(boot_mem_map.map[i].addr | 302 | end = PFN_DOWN(boot_mem_map.map[i].addr |
297 | + boot_mem_map.map[i].size); | 303 | + boot_mem_map.map[i].size); |
298 | 304 | ||
299 | if (end > highest) | 305 | if (end > max_low_pfn) |
300 | highest = end; | 306 | max_low_pfn = end; |
307 | if (start < min_low_pfn) | ||
308 | min_low_pfn = start; | ||
301 | if (end <= reserved_end) | 309 | if (end <= reserved_end) |
302 | continue; | 310 | continue; |
303 | if (start >= mapstart) | 311 | if (start >= mapstart) |
@@ -305,22 +313,36 @@ static void __init bootmem_init(void) | |||
305 | mapstart = max(reserved_end, start); | 313 | mapstart = max(reserved_end, start); |
306 | } | 314 | } |
307 | 315 | ||
316 | if (min_low_pfn >= max_low_pfn) | ||
317 | panic("Incorrect memory mapping !!!"); | ||
318 | if (min_low_pfn > ARCH_PFN_OFFSET) { | ||
319 | printk(KERN_INFO | ||
320 | "Wasting %lu bytes for tracking %lu unused pages\n", | ||
321 | (min_low_pfn - ARCH_PFN_OFFSET) * sizeof(struct page), | ||
322 | min_low_pfn - ARCH_PFN_OFFSET); | ||
323 | } else if (min_low_pfn < ARCH_PFN_OFFSET) { | ||
324 | printk(KERN_INFO | ||
325 | "%lu free pages won't be used\n", | ||
326 | ARCH_PFN_OFFSET - min_low_pfn); | ||
327 | } | ||
328 | min_low_pfn = ARCH_PFN_OFFSET; | ||
329 | |||
308 | /* | 330 | /* |
309 | * Determine low and high memory ranges | 331 | * Determine low and high memory ranges |
310 | */ | 332 | */ |
311 | if (highest > PFN_DOWN(HIGHMEM_START)) { | 333 | if (max_low_pfn > PFN_DOWN(HIGHMEM_START)) { |
312 | #ifdef CONFIG_HIGHMEM | 334 | #ifdef CONFIG_HIGHMEM |
313 | highstart_pfn = PFN_DOWN(HIGHMEM_START); | 335 | highstart_pfn = PFN_DOWN(HIGHMEM_START); |
314 | highend_pfn = highest; | 336 | highend_pfn = max_low_pfn; |
315 | #endif | 337 | #endif |
316 | highest = PFN_DOWN(HIGHMEM_START); | 338 | max_low_pfn = PFN_DOWN(HIGHMEM_START); |
317 | } | 339 | } |
318 | 340 | ||
319 | /* | 341 | /* |
320 | * Initialize the boot-time allocator with low memory only. | 342 | * Initialize the boot-time allocator with low memory only. |
321 | */ | 343 | */ |
322 | bootmap_size = init_bootmem(mapstart, highest); | 344 | bootmap_size = init_bootmem_node(NODE_DATA(0), mapstart, |
323 | 345 | min_low_pfn, max_low_pfn); | |
324 | /* | 346 | /* |
325 | * Register fully available low RAM pages with the bootmem allocator. | 347 | * Register fully available low RAM pages with the bootmem allocator. |
326 | */ | 348 | */ |
@@ -507,9 +529,9 @@ void __init setup_arch(char **cmdline_p) | |||
507 | 529 | ||
508 | #if defined(CONFIG_VT) | 530 | #if defined(CONFIG_VT) |
509 | #if defined(CONFIG_VGA_CONSOLE) | 531 | #if defined(CONFIG_VGA_CONSOLE) |
510 | conswitchp = &vga_con; | 532 | conswitchp = &vga_con; |
511 | #elif defined(CONFIG_DUMMY_CONSOLE) | 533 | #elif defined(CONFIG_DUMMY_CONSOLE) |
512 | conswitchp = &dummy_con; | 534 | conswitchp = &dummy_con; |
513 | #endif | 535 | #endif |
514 | #endif | 536 | #endif |
515 | 537 | ||
@@ -541,3 +563,6 @@ int __init dsp_disable(char *s) | |||
541 | } | 563 | } |
542 | 564 | ||
543 | __setup("nodsp", dsp_disable); | 565 | __setup("nodsp", dsp_disable); |
566 | |||
567 | unsigned long kernelsp[NR_CPUS]; | ||
568 | unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3; | ||
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index b9d358e05214..9a44053cd9f1 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c | |||
@@ -89,7 +89,7 @@ _sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) | |||
89 | spin_lock_irq(¤t->sighand->siglock); | 89 | spin_lock_irq(¤t->sighand->siglock); |
90 | current->saved_sigmask = current->blocked; | 90 | current->saved_sigmask = current->blocked; |
91 | current->blocked = newset; | 91 | current->blocked = newset; |
92 | recalc_sigpending(); | 92 | recalc_sigpending(); |
93 | spin_unlock_irq(¤t->sighand->siglock); | 93 | spin_unlock_irq(¤t->sighand->siglock); |
94 | 94 | ||
95 | current->state = TASK_INTERRUPTIBLE; | 95 | current->state = TASK_INTERRUPTIBLE; |
@@ -124,7 +124,7 @@ asmlinkage int sys_sigaction(int sig, const struct sigaction __user *act, | |||
124 | 124 | ||
125 | if (!ret && oact) { | 125 | if (!ret && oact) { |
126 | if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact))) | 126 | if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact))) |
127 | return -EFAULT; | 127 | return -EFAULT; |
128 | err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags); | 128 | err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags); |
129 | err |= __put_user(old_ka.sa.sa_handler, &oact->sa_handler); | 129 | err |= __put_user(old_ka.sa.sa_handler, &oact->sa_handler); |
130 | err |= __put_user(old_ka.sa.sa_mask.sig[0], oact->sa_mask.sig); | 130 | err |= __put_user(old_ka.sa.sa_mask.sig[0], oact->sa_mask.sig); |
@@ -304,7 +304,7 @@ int setup_frame(struct k_sigaction * ka, struct pt_regs *regs, | |||
304 | current->comm, current->pid, | 304 | current->comm, current->pid, |
305 | frame, regs->cp0_epc, frame->regs[31]); | 305 | frame, regs->cp0_epc, frame->regs[31]); |
306 | #endif | 306 | #endif |
307 | return 0; | 307 | return 0; |
308 | 308 | ||
309 | give_sigsegv: | 309 | give_sigsegv: |
310 | force_sigsegv(signr, current); | 310 | force_sigsegv(signr, current); |
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c index a67c18555ed3..b28646b3ceae 100644 --- a/arch/mips/kernel/signal_n32.c +++ b/arch/mips/kernel/signal_n32.c | |||
@@ -105,7 +105,7 @@ _sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) | |||
105 | spin_lock_irq(¤t->sighand->siglock); | 105 | spin_lock_irq(¤t->sighand->siglock); |
106 | current->saved_sigmask = current->blocked; | 106 | current->saved_sigmask = current->blocked; |
107 | current->blocked = newset; | 107 | current->blocked = newset; |
108 | recalc_sigpending(); | 108 | recalc_sigpending(); |
109 | spin_unlock_irq(¤t->sighand->siglock); | 109 | spin_unlock_irq(¤t->sighand->siglock); |
110 | 110 | ||
111 | current->state = TASK_INTERRUPTIBLE; | 111 | current->state = TASK_INTERRUPTIBLE; |
@@ -184,7 +184,7 @@ int setup_rt_frame_n32(struct k_sigaction * ka, | |||
184 | /* Create the ucontext. */ | 184 | /* Create the ucontext. */ |
185 | err |= __put_user(0, &frame->rs_uc.uc_flags); | 185 | err |= __put_user(0, &frame->rs_uc.uc_flags); |
186 | err |= __put_user(0, &frame->rs_uc.uc_link); | 186 | err |= __put_user(0, &frame->rs_uc.uc_link); |
187 | sp = (int) (long) current->sas_ss_sp; | 187 | sp = (int) (long) current->sas_ss_sp; |
188 | err |= __put_user(sp, | 188 | err |= __put_user(sp, |
189 | &frame->rs_uc.uc_stack.ss_sp); | 189 | &frame->rs_uc.uc_stack.ss_sp); |
190 | err |= __put_user(sas_ss_flags(regs->regs[29]), | 190 | err |= __put_user(sas_ss_flags(regs->regs[29]), |
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 1ee689c0e0c9..64b62bdfb4f6 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <asm/mipsregs.h> | 35 | #include <asm/mipsregs.h> |
36 | #include <asm/mipsmtregs.h> | 36 | #include <asm/mipsmtregs.h> |
37 | #include <asm/mips_mt.h> | 37 | #include <asm/mips_mt.h> |
38 | #include <asm/mips-boards/maltaint.h> /* This is f*cking wrong */ | ||
39 | 38 | ||
40 | #define MIPS_CPU_IPI_RESCHED_IRQ 0 | 39 | #define MIPS_CPU_IPI_RESCHED_IRQ 0 |
41 | #define MIPS_CPU_IPI_CALL_IRQ 1 | 40 | #define MIPS_CPU_IPI_CALL_IRQ 1 |
@@ -108,12 +107,12 @@ void __init sanitize_tlb_entries(void) | |||
108 | 107 | ||
109 | static void ipi_resched_dispatch(void) | 108 | static void ipi_resched_dispatch(void) |
110 | { | 109 | { |
111 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ); | 110 | do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ); |
112 | } | 111 | } |
113 | 112 | ||
114 | static void ipi_call_dispatch(void) | 113 | static void ipi_call_dispatch(void) |
115 | { | 114 | { |
116 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ); | 115 | do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ); |
117 | } | 116 | } |
118 | 117 | ||
119 | static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) | 118 | static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) |
@@ -270,8 +269,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus) | |||
270 | set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); | 269 | set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); |
271 | } | 270 | } |
272 | 271 | ||
273 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; | 272 | cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ; |
274 | cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; | 273 | cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ; |
275 | 274 | ||
276 | setup_irq(cpu_ipi_resched_irq, &irq_resched); | 275 | setup_irq(cpu_ipi_resched_irq, &irq_resched); |
277 | setup_irq(cpu_ipi_call_irq, &irq_call); | 276 | setup_irq(cpu_ipi_call_irq, &irq_call); |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 6a857bf030b0..9251ea824937 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -26,16 +26,6 @@ | |||
26 | * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set. | 26 | * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set. |
27 | */ | 27 | */ |
28 | 28 | ||
29 | /* | ||
30 | * MIPSCPU_INT_BASE is identically defined in both | ||
31 | * asm-mips/mips-boards/maltaint.h and asm-mips/mips-boards/simint.h, | ||
32 | * but as yet there's no properly organized include structure that | ||
33 | * will ensure that the right *int.h file will be included for a | ||
34 | * given platform build. | ||
35 | */ | ||
36 | |||
37 | #define MIPSCPU_INT_BASE 16 | ||
38 | |||
39 | #define MIPS_CPU_IPI_IRQ 1 | 29 | #define MIPS_CPU_IPI_IRQ 1 |
40 | 30 | ||
41 | #define LOCK_MT_PRA() \ | 31 | #define LOCK_MT_PRA() \ |
@@ -77,15 +67,15 @@ unsigned int ipi_timer_latch[NR_CPUS]; | |||
77 | 67 | ||
78 | #define IPIBUF_PER_CPU 4 | 68 | #define IPIBUF_PER_CPU 4 |
79 | 69 | ||
80 | struct smtc_ipi_q IPIQ[NR_CPUS]; | 70 | static struct smtc_ipi_q IPIQ[NR_CPUS]; |
81 | struct smtc_ipi_q freeIPIq; | 71 | static struct smtc_ipi_q freeIPIq; |
82 | 72 | ||
83 | 73 | ||
84 | /* Forward declarations */ | 74 | /* Forward declarations */ |
85 | 75 | ||
86 | void ipi_decode(struct smtc_ipi *); | 76 | void ipi_decode(struct smtc_ipi *); |
87 | void post_direct_ipi(int cpu, struct smtc_ipi *pipi); | 77 | static void post_direct_ipi(int cpu, struct smtc_ipi *pipi); |
88 | void setup_cross_vpe_interrupts(void); | 78 | static void setup_cross_vpe_interrupts(void); |
89 | void init_smtc_stats(void); | 79 | void init_smtc_stats(void); |
90 | 80 | ||
91 | /* Global SMTC Status */ | 81 | /* Global SMTC Status */ |
@@ -200,7 +190,7 @@ void __init sanitize_tlb_entries(void) | |||
200 | * Configure shared TLB - VPC configuration bit must be set by caller | 190 | * Configure shared TLB - VPC configuration bit must be set by caller |
201 | */ | 191 | */ |
202 | 192 | ||
203 | void smtc_configure_tlb(void) | 193 | static void smtc_configure_tlb(void) |
204 | { | 194 | { |
205 | int i,tlbsiz,vpes; | 195 | int i,tlbsiz,vpes; |
206 | unsigned long mvpconf0; | 196 | unsigned long mvpconf0; |
@@ -648,7 +638,7 @@ int setup_irq_smtc(unsigned int irq, struct irqaction * new, | |||
648 | * the VPE. | 638 | * the VPE. |
649 | */ | 639 | */ |
650 | 640 | ||
651 | void smtc_ipi_qdump(void) | 641 | static void smtc_ipi_qdump(void) |
652 | { | 642 | { |
653 | int i; | 643 | int i; |
654 | 644 | ||
@@ -686,28 +676,6 @@ static __inline__ int atomic_postincrement(unsigned int *pv) | |||
686 | return result; | 676 | return result; |
687 | } | 677 | } |
688 | 678 | ||
689 | /* No longer used in IPI dispatch, but retained for future recycling */ | ||
690 | |||
691 | static __inline__ int atomic_postclear(unsigned int *pv) | ||
692 | { | ||
693 | unsigned long result; | ||
694 | |||
695 | unsigned long temp; | ||
696 | |||
697 | __asm__ __volatile__( | ||
698 | "1: ll %0, %2 \n" | ||
699 | " or %1, $0, $0 \n" | ||
700 | " sc %1, %2 \n" | ||
701 | " beqz %1, 1b \n" | ||
702 | " sync \n" | ||
703 | : "=&r" (result), "=&r" (temp), "=m" (*pv) | ||
704 | : "m" (*pv) | ||
705 | : "memory"); | ||
706 | |||
707 | return result; | ||
708 | } | ||
709 | |||
710 | |||
711 | void smtc_send_ipi(int cpu, int type, unsigned int action) | 679 | void smtc_send_ipi(int cpu, int type, unsigned int action) |
712 | { | 680 | { |
713 | int tcstatus; | 681 | int tcstatus; |
@@ -781,7 +749,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action) | |||
781 | /* | 749 | /* |
782 | * Send IPI message to Halted TC, TargTC/TargVPE already having been set | 750 | * Send IPI message to Halted TC, TargTC/TargVPE already having been set |
783 | */ | 751 | */ |
784 | void post_direct_ipi(int cpu, struct smtc_ipi *pipi) | 752 | static void post_direct_ipi(int cpu, struct smtc_ipi *pipi) |
785 | { | 753 | { |
786 | struct pt_regs *kstack; | 754 | struct pt_regs *kstack; |
787 | unsigned long tcstatus; | 755 | unsigned long tcstatus; |
@@ -921,7 +889,7 @@ void smtc_timer_broadcast(int vpe) | |||
921 | * interrupts. | 889 | * interrupts. |
922 | */ | 890 | */ |
923 | 891 | ||
924 | static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ; | 892 | static int cpu_ipi_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_IRQ; |
925 | 893 | ||
926 | static irqreturn_t ipi_interrupt(int irq, void *dev_idm) | 894 | static irqreturn_t ipi_interrupt(int irq, void *dev_idm) |
927 | { | 895 | { |
@@ -1000,7 +968,7 @@ static void ipi_irq_dispatch(void) | |||
1000 | 968 | ||
1001 | static struct irqaction irq_ipi; | 969 | static struct irqaction irq_ipi; |
1002 | 970 | ||
1003 | void setup_cross_vpe_interrupts(void) | 971 | static void setup_cross_vpe_interrupts(void) |
1004 | { | 972 | { |
1005 | if (!cpu_has_vint) | 973 | if (!cpu_has_vint) |
1006 | panic("SMTC Kernel requires Vectored Interupt support"); | 974 | panic("SMTC Kernel requires Vectored Interupt support"); |
@@ -1191,7 +1159,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) | |||
1191 | * It would be nice to be able to use a spinlock here, | 1159 | * It would be nice to be able to use a spinlock here, |
1192 | * but this is invoked from within TLB flush routines | 1160 | * but this is invoked from within TLB flush routines |
1193 | * that protect themselves with DVPE, so if a lock is | 1161 | * that protect themselves with DVPE, so if a lock is |
1194 | * held by another TC, it'll never be freed. | 1162 | * held by another TC, it'll never be freed. |
1195 | * | 1163 | * |
1196 | * DVPE/DMT must not be done with interrupts enabled, | 1164 | * DVPE/DMT must not be done with interrupts enabled, |
1197 | * so even so most callers will already have disabled | 1165 | * so even so most callers will already have disabled |
@@ -1296,7 +1264,7 @@ void smtc_flush_tlb_asid(unsigned long asid) | |||
1296 | * Support for single-threading cache flush operations. | 1264 | * Support for single-threading cache flush operations. |
1297 | */ | 1265 | */ |
1298 | 1266 | ||
1299 | int halt_state_save[NR_CPUS]; | 1267 | static int halt_state_save[NR_CPUS]; |
1300 | 1268 | ||
1301 | /* | 1269 | /* |
1302 | * To really, really be sure that nothing is being done | 1270 | * To really, really be sure that nothing is being done |
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c index 6c2406a93f2b..93a148486f88 100644 --- a/arch/mips/kernel/sysirix.c +++ b/arch/mips/kernel/sysirix.c | |||
@@ -669,7 +669,7 @@ asmlinkage int irix_mount(char __user *dev_name, char __user *dir_name, | |||
669 | 669 | ||
670 | struct irix_statfs { | 670 | struct irix_statfs { |
671 | short f_type; | 671 | short f_type; |
672 | long f_bsize, f_frsize, f_blocks, f_bfree, f_files, f_ffree; | 672 | long f_bsize, f_frsize, f_blocks, f_bfree, f_files, f_ffree; |
673 | char f_fname[6], f_fpack[6]; | 673 | char f_fname[6], f_fpack[6]; |
674 | }; | 674 | }; |
675 | 675 | ||
@@ -959,7 +959,7 @@ static inline loff_t llseek(struct file *file, loff_t offset, int origin) | |||
959 | 959 | ||
960 | fn = default_llseek; | 960 | fn = default_llseek; |
961 | if (file->f_op && file->f_op->llseek) | 961 | if (file->f_op && file->f_op->llseek) |
962 | fn = file->f_op->llseek; | 962 | fn = file->f_op->llseek; |
963 | lock_kernel(); | 963 | lock_kernel(); |
964 | retval = fn(file, offset, origin); | 964 | retval = fn(file, offset, origin); |
965 | unlock_kernel(); | 965 | unlock_kernel(); |
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 458fccf87c54..459624969c99 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
@@ -522,7 +522,7 @@ static int (*reloc_handlers[]) (struct module *me, uint32_t *location, | |||
522 | }; | 522 | }; |
523 | 523 | ||
524 | static char *rstrs[] = { | 524 | static char *rstrs[] = { |
525 | [R_MIPS_NONE] = "MIPS_NONE", | 525 | [R_MIPS_NONE] = "MIPS_NONE", |
526 | [R_MIPS_32] = "MIPS_32", | 526 | [R_MIPS_32] = "MIPS_32", |
527 | [R_MIPS_26] = "MIPS_26", | 527 | [R_MIPS_26] = "MIPS_26", |
528 | [R_MIPS_HI16] = "MIPS_HI16", | 528 | [R_MIPS_HI16] = "MIPS_HI16", |
@@ -695,7 +695,7 @@ static void dump_tclist(void) | |||
695 | } | 695 | } |
696 | 696 | ||
697 | /* We are prepared so configure and start the VPE... */ | 697 | /* We are prepared so configure and start the VPE... */ |
698 | int vpe_run(struct vpe * v) | 698 | static int vpe_run(struct vpe * v) |
699 | { | 699 | { |
700 | struct vpe_notifications *n; | 700 | struct vpe_notifications *n; |
701 | unsigned long val, dmt_flag; | 701 | unsigned long val, dmt_flag; |
@@ -713,16 +713,16 @@ int vpe_run(struct vpe * v) | |||
713 | dvpe(); | 713 | dvpe(); |
714 | 714 | ||
715 | if (!list_empty(&v->tc)) { | 715 | if (!list_empty(&v->tc)) { |
716 | if ((t = list_entry(v->tc.next, struct tc, tc)) == NULL) { | 716 | if ((t = list_entry(v->tc.next, struct tc, tc)) == NULL) { |
717 | printk(KERN_WARNING "VPE loader: TC %d is already in use.\n", | 717 | printk(KERN_WARNING "VPE loader: TC %d is already in use.\n", |
718 | t->index); | 718 | t->index); |
719 | return -ENOEXEC; | 719 | return -ENOEXEC; |
720 | } | 720 | } |
721 | } else { | 721 | } else { |
722 | printk(KERN_WARNING "VPE loader: No TC's associated with VPE %d\n", | 722 | printk(KERN_WARNING "VPE loader: No TC's associated with VPE %d\n", |
723 | v->minor); | 723 | v->minor); |
724 | return -ENOEXEC; | 724 | return -ENOEXEC; |
725 | } | 725 | } |
726 | 726 | ||
727 | /* Put MVPE's into 'configuration state' */ | 727 | /* Put MVPE's into 'configuration state' */ |
728 | set_c0_mvpcontrol(MVPCONTROL_VPC); | 728 | set_c0_mvpcontrol(MVPCONTROL_VPC); |
@@ -775,14 +775,14 @@ int vpe_run(struct vpe * v) | |||
775 | 775 | ||
776 | back_to_back_c0_hazard(); | 776 | back_to_back_c0_hazard(); |
777 | 777 | ||
778 | /* Set up the XTC bit in vpeconf0 to point at our tc */ | 778 | /* Set up the XTC bit in vpeconf0 to point at our tc */ |
779 | write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC)) | 779 | write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC)) |
780 | | (t->index << VPECONF0_XTC_SHIFT)); | 780 | | (t->index << VPECONF0_XTC_SHIFT)); |
781 | 781 | ||
782 | back_to_back_c0_hazard(); | 782 | back_to_back_c0_hazard(); |
783 | 783 | ||
784 | /* enable this VPE */ | 784 | /* enable this VPE */ |
785 | write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA); | 785 | write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA); |
786 | 786 | ||
787 | /* clear out any left overs from a previous program */ | 787 | /* clear out any left overs from a previous program */ |
788 | write_vpe_c0_status(0); | 788 | write_vpe_c0_status(0); |
@@ -832,7 +832,7 @@ static int find_vpe_symbols(struct vpe * v, Elf_Shdr * sechdrs, | |||
832 | * contents of the program (p)buffer performing relocatations/etc, free's it | 832 | * contents of the program (p)buffer performing relocatations/etc, free's it |
833 | * when finished. | 833 | * when finished. |
834 | */ | 834 | */ |
835 | int vpe_elfload(struct vpe * v) | 835 | static int vpe_elfload(struct vpe * v) |
836 | { | 836 | { |
837 | Elf_Ehdr *hdr; | 837 | Elf_Ehdr *hdr; |
838 | Elf_Shdr *sechdrs; | 838 | Elf_Shdr *sechdrs; |
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index 2affa5ff171c..9a622b9a1051 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c | |||
@@ -45,7 +45,7 @@ void enable_lasat_irq(unsigned int irq_nr) | |||
45 | } | 45 | } |
46 | 46 | ||
47 | static struct irq_chip lasat_irq_type = { | 47 | static struct irq_chip lasat_irq_type = { |
48 | .typename = "Lasat", | 48 | .name = "Lasat", |
49 | .ack = disable_lasat_irq, | 49 | .ack = disable_lasat_irq, |
50 | .mask = disable_lasat_irq, | 50 | .mask = disable_lasat_irq, |
51 | .mask_ack = disable_lasat_irq, | 51 | .mask_ack = disable_lasat_irq, |
diff --git a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c index 88c7ab871ec4..d47692f73a26 100644 --- a/arch/mips/lasat/prom.c +++ b/arch/mips/lasat/prom.c | |||
@@ -132,9 +132,8 @@ void __init prom_init(void) | |||
132 | add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM); | 132 | add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM); |
133 | } | 133 | } |
134 | 134 | ||
135 | unsigned long __init prom_free_prom_memory(void) | 135 | void __init prom_free_prom_memory(void) |
136 | { | 136 | { |
137 | return 0; | ||
138 | } | 137 | } |
139 | 138 | ||
140 | const char *get_system_type(void) | 139 | const char *get_system_type(void) |
diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile index dcd4d2ed2ac4..2036cf5e6857 100644 --- a/arch/mips/lib-32/Makefile +++ b/arch/mips/lib-32/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for MIPS-specific library files.. | 2 | # Makefile for MIPS-specific library files.. |
3 | # | 3 | # |
4 | 4 | ||
5 | lib-y += memset.o watch.o | 5 | lib-y += watch.o |
6 | 6 | ||
7 | obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o | 7 | obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o |
8 | obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o | 8 | obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o |
diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile index dcd4d2ed2ac4..2036cf5e6857 100644 --- a/arch/mips/lib-64/Makefile +++ b/arch/mips/lib-64/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for MIPS-specific library files.. | 2 | # Makefile for MIPS-specific library files.. |
3 | # | 3 | # |
4 | 4 | ||
5 | lib-y += memset.o watch.o | 5 | lib-y += watch.o |
6 | 6 | ||
7 | obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o | 7 | obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o |
8 | obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o | 8 | obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o |
diff --git a/arch/mips/lib-64/memset.S b/arch/mips/lib-64/memset.S deleted file mode 100644 index e2c42c85113b..000000000000 --- a/arch/mips/lib-64/memset.S +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1998, 1999, 2000 by Ralf Baechle | ||
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | ||
8 | */ | ||
9 | #include <asm/asm.h> | ||
10 | #include <asm/asm-offsets.h> | ||
11 | #include <asm/regdef.h> | ||
12 | |||
13 | #define EX(insn,reg,addr,handler) \ | ||
14 | 9: insn reg, addr; \ | ||
15 | .section __ex_table,"a"; \ | ||
16 | PTR 9b, handler; \ | ||
17 | .previous | ||
18 | |||
19 | .macro f_fill64 dst, offset, val, fixup | ||
20 | EX(LONG_S, \val, (\offset + 0 * LONGSIZE)(\dst), \fixup) | ||
21 | EX(LONG_S, \val, (\offset + 1 * LONGSIZE)(\dst), \fixup) | ||
22 | EX(LONG_S, \val, (\offset + 2 * LONGSIZE)(\dst), \fixup) | ||
23 | EX(LONG_S, \val, (\offset + 3 * LONGSIZE)(\dst), \fixup) | ||
24 | EX(LONG_S, \val, (\offset + 4 * LONGSIZE)(\dst), \fixup) | ||
25 | EX(LONG_S, \val, (\offset + 5 * LONGSIZE)(\dst), \fixup) | ||
26 | EX(LONG_S, \val, (\offset + 6 * LONGSIZE)(\dst), \fixup) | ||
27 | EX(LONG_S, \val, (\offset + 7 * LONGSIZE)(\dst), \fixup) | ||
28 | .endm | ||
29 | |||
30 | /* | ||
31 | * memset(void *s, int c, size_t n) | ||
32 | * | ||
33 | * a0: start of area to clear | ||
34 | * a1: char to fill with | ||
35 | * a2: size of area to clear | ||
36 | */ | ||
37 | .set noreorder | ||
38 | .align 5 | ||
39 | LEAF(memset) | ||
40 | beqz a1, 1f | ||
41 | move v0, a0 /* result */ | ||
42 | |||
43 | andi a1, 0xff /* spread fillword */ | ||
44 | dsll t1, a1, 8 | ||
45 | or a1, t1 | ||
46 | dsll t1, a1, 16 | ||
47 | or a1, t1 | ||
48 | dsll t1, a1, 32 | ||
49 | or a1, t1 | ||
50 | 1: | ||
51 | |||
52 | FEXPORT(__bzero) | ||
53 | sltiu t0, a2, LONGSIZE /* very small region? */ | ||
54 | bnez t0, small_memset | ||
55 | andi t0, a0, LONGMASK /* aligned? */ | ||
56 | |||
57 | beqz t0, 1f | ||
58 | PTR_SUBU t0, LONGSIZE /* alignment in bytes */ | ||
59 | |||
60 | #ifdef __MIPSEB__ | ||
61 | EX(sdl, a1, (a0), first_fixup) /* make dword aligned */ | ||
62 | #endif | ||
63 | #ifdef __MIPSEL__ | ||
64 | EX(sdr, a1, (a0), first_fixup) /* make dword aligned */ | ||
65 | #endif | ||
66 | PTR_SUBU a0, t0 /* long align ptr */ | ||
67 | PTR_ADDU a2, t0 /* correct size */ | ||
68 | |||
69 | 1: ori t1, a2, 0x3f /* # of full blocks */ | ||
70 | xori t1, 0x3f | ||
71 | beqz t1, memset_partial /* no block to fill */ | ||
72 | andi t0, a2, 0x38 | ||
73 | |||
74 | PTR_ADDU t1, a0 /* end address */ | ||
75 | .set reorder | ||
76 | 1: PTR_ADDIU a0, 64 | ||
77 | f_fill64 a0, -64, a1, fwd_fixup | ||
78 | bne t1, a0, 1b | ||
79 | .set noreorder | ||
80 | |||
81 | memset_partial: | ||
82 | PTR_LA t1, 2f /* where to start */ | ||
83 | .set noat | ||
84 | dsrl AT, t0, 1 | ||
85 | PTR_SUBU t1, AT | ||
86 | .set noat | ||
87 | jr t1 | ||
88 | PTR_ADDU a0, t0 /* dest ptr */ | ||
89 | |||
90 | .set push | ||
91 | .set noreorder | ||
92 | .set nomacro | ||
93 | f_fill64 a0, -64, a1, partial_fixup /* ... but first do longs ... */ | ||
94 | 2: .set pop | ||
95 | andi a2, LONGMASK /* At most one long to go */ | ||
96 | |||
97 | beqz a2, 1f | ||
98 | PTR_ADDU a0, a2 /* What's left */ | ||
99 | #ifdef __MIPSEB__ | ||
100 | EX(sdr, a1, -1(a0), last_fixup) | ||
101 | #endif | ||
102 | #ifdef __MIPSEL__ | ||
103 | EX(sdl, a1, -1(a0), last_fixup) | ||
104 | #endif | ||
105 | 1: jr ra | ||
106 | move a2, zero | ||
107 | |||
108 | small_memset: | ||
109 | beqz a2, 2f | ||
110 | PTR_ADDU t1, a0, a2 | ||
111 | |||
112 | 1: PTR_ADDIU a0, 1 /* fill bytewise */ | ||
113 | bne t1, a0, 1b | ||
114 | sb a1, -1(a0) | ||
115 | |||
116 | 2: jr ra /* done */ | ||
117 | move a2, zero | ||
118 | END(memset) | ||
119 | |||
120 | first_fixup: | ||
121 | jr ra | ||
122 | nop | ||
123 | |||
124 | fwd_fixup: | ||
125 | PTR_L t0, TI_TASK($28) | ||
126 | LONG_L t0, THREAD_BUADDR(t0) | ||
127 | andi a2, 0x3f | ||
128 | LONG_ADDU a2, t1 | ||
129 | jr ra | ||
130 | LONG_SUBU a2, t0 | ||
131 | |||
132 | partial_fixup: | ||
133 | PTR_L t0, TI_TASK($28) | ||
134 | LONG_L t0, THREAD_BUADDR(t0) | ||
135 | andi a2, LONGMASK | ||
136 | LONG_ADDU a2, t1 | ||
137 | jr ra | ||
138 | LONG_SUBU a2, t0 | ||
139 | |||
140 | last_fixup: | ||
141 | jr ra | ||
142 | andi v1, a2, LONGMASK | ||
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 989c900b8b14..5ad501b30b43 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for MIPS-specific library files.. | 2 | # Makefile for MIPS-specific library files.. |
3 | # | 3 | # |
4 | 4 | ||
5 | lib-y += csum_partial.o memcpy.o promlib.o \ | 5 | lib-y += csum_partial.o memcpy.o memset.o promlib.o \ |
6 | strlen_user.o strncpy_user.o strnlen_user.o uncached.o | 6 | strlen_user.o strncpy_user.o strnlen_user.o uncached.o |
7 | 7 | ||
8 | obj-y += iomap.o | 8 | obj-y += iomap.o |
diff --git a/arch/mips/lib-32/memset.S b/arch/mips/lib/memset.S index 1981485bd48b..3f8b8b3d0b23 100644 --- a/arch/mips/lib-32/memset.S +++ b/arch/mips/lib/memset.S | |||
@@ -10,6 +10,14 @@ | |||
10 | #include <asm/asm-offsets.h> | 10 | #include <asm/asm-offsets.h> |
11 | #include <asm/regdef.h> | 11 | #include <asm/regdef.h> |
12 | 12 | ||
13 | #if LONGSIZE == 4 | ||
14 | #define LONG_S_L swl | ||
15 | #define LONG_S_R swr | ||
16 | #else | ||
17 | #define LONG_S_L sdl | ||
18 | #define LONG_S_R sdr | ||
19 | #endif | ||
20 | |||
13 | #define EX(insn,reg,addr,handler) \ | 21 | #define EX(insn,reg,addr,handler) \ |
14 | 9: insn reg, addr; \ | 22 | 9: insn reg, addr; \ |
15 | .section __ex_table,"a"; \ | 23 | .section __ex_table,"a"; \ |
@@ -25,6 +33,7 @@ | |||
25 | EX(LONG_S, \val, (\offset + 5 * LONGSIZE)(\dst), \fixup) | 33 | EX(LONG_S, \val, (\offset + 5 * LONGSIZE)(\dst), \fixup) |
26 | EX(LONG_S, \val, (\offset + 6 * LONGSIZE)(\dst), \fixup) | 34 | EX(LONG_S, \val, (\offset + 6 * LONGSIZE)(\dst), \fixup) |
27 | EX(LONG_S, \val, (\offset + 7 * LONGSIZE)(\dst), \fixup) | 35 | EX(LONG_S, \val, (\offset + 7 * LONGSIZE)(\dst), \fixup) |
36 | #if LONGSIZE == 4 | ||
28 | EX(LONG_S, \val, (\offset + 8 * LONGSIZE)(\dst), \fixup) | 37 | EX(LONG_S, \val, (\offset + 8 * LONGSIZE)(\dst), \fixup) |
29 | EX(LONG_S, \val, (\offset + 9 * LONGSIZE)(\dst), \fixup) | 38 | EX(LONG_S, \val, (\offset + 9 * LONGSIZE)(\dst), \fixup) |
30 | EX(LONG_S, \val, (\offset + 10 * LONGSIZE)(\dst), \fixup) | 39 | EX(LONG_S, \val, (\offset + 10 * LONGSIZE)(\dst), \fixup) |
@@ -33,6 +42,7 @@ | |||
33 | EX(LONG_S, \val, (\offset + 13 * LONGSIZE)(\dst), \fixup) | 42 | EX(LONG_S, \val, (\offset + 13 * LONGSIZE)(\dst), \fixup) |
34 | EX(LONG_S, \val, (\offset + 14 * LONGSIZE)(\dst), \fixup) | 43 | EX(LONG_S, \val, (\offset + 14 * LONGSIZE)(\dst), \fixup) |
35 | EX(LONG_S, \val, (\offset + 15 * LONGSIZE)(\dst), \fixup) | 44 | EX(LONG_S, \val, (\offset + 15 * LONGSIZE)(\dst), \fixup) |
45 | #endif | ||
36 | .endm | 46 | .endm |
37 | 47 | ||
38 | /* | 48 | /* |
@@ -49,9 +59,13 @@ LEAF(memset) | |||
49 | move v0, a0 /* result */ | 59 | move v0, a0 /* result */ |
50 | 60 | ||
51 | andi a1, 0xff /* spread fillword */ | 61 | andi a1, 0xff /* spread fillword */ |
52 | sll t1, a1, 8 | 62 | LONG_SLL t1, a1, 8 |
53 | or a1, t1 | 63 | or a1, t1 |
54 | sll t1, a1, 16 | 64 | LONG_SLL t1, a1, 16 |
65 | #if LONGSIZE == 8 | ||
66 | or a1, t1 | ||
67 | LONG_SLL t1, a1, 32 | ||
68 | #endif | ||
55 | or a1, t1 | 69 | or a1, t1 |
56 | 1: | 70 | 1: |
57 | 71 | ||
@@ -64,10 +78,10 @@ FEXPORT(__bzero) | |||
64 | PTR_SUBU t0, LONGSIZE /* alignment in bytes */ | 78 | PTR_SUBU t0, LONGSIZE /* alignment in bytes */ |
65 | 79 | ||
66 | #ifdef __MIPSEB__ | 80 | #ifdef __MIPSEB__ |
67 | EX(swl, a1, (a0), first_fixup) /* make word aligned */ | 81 | EX(LONG_S_L, a1, (a0), first_fixup) /* make word/dword aligned */ |
68 | #endif | 82 | #endif |
69 | #ifdef __MIPSEL__ | 83 | #ifdef __MIPSEL__ |
70 | EX(swr, a1, (a0), first_fixup) /* make word aligned */ | 84 | EX(LONG_S_R, a1, (a0), first_fixup) /* make word/dword aligned */ |
71 | #endif | 85 | #endif |
72 | PTR_SUBU a0, t0 /* long align ptr */ | 86 | PTR_SUBU a0, t0 /* long align ptr */ |
73 | PTR_ADDU a2, t0 /* correct size */ | 87 | PTR_ADDU a2, t0 /* correct size */ |
@@ -75,7 +89,7 @@ FEXPORT(__bzero) | |||
75 | 1: ori t1, a2, 0x3f /* # of full blocks */ | 89 | 1: ori t1, a2, 0x3f /* # of full blocks */ |
76 | xori t1, 0x3f | 90 | xori t1, 0x3f |
77 | beqz t1, memset_partial /* no block to fill */ | 91 | beqz t1, memset_partial /* no block to fill */ |
78 | andi t0, a2, 0x3c | 92 | andi t0, a2, 0x40-LONGSIZE |
79 | 93 | ||
80 | PTR_ADDU t1, a0 /* end address */ | 94 | PTR_ADDU t1, a0 /* end address */ |
81 | .set reorder | 95 | .set reorder |
@@ -86,7 +100,14 @@ FEXPORT(__bzero) | |||
86 | 100 | ||
87 | memset_partial: | 101 | memset_partial: |
88 | PTR_LA t1, 2f /* where to start */ | 102 | PTR_LA t1, 2f /* where to start */ |
103 | #if LONGSIZE == 4 | ||
89 | PTR_SUBU t1, t0 | 104 | PTR_SUBU t1, t0 |
105 | #else | ||
106 | .set noat | ||
107 | LONG_SRL AT, t0, 1 | ||
108 | PTR_SUBU t1, AT | ||
109 | .set noat | ||
110 | #endif | ||
90 | jr t1 | 111 | jr t1 |
91 | PTR_ADDU a0, t0 /* dest ptr */ | 112 | PTR_ADDU a0, t0 /* dest ptr */ |
92 | 113 | ||
@@ -100,10 +121,10 @@ memset_partial: | |||
100 | beqz a2, 1f | 121 | beqz a2, 1f |
101 | PTR_ADDU a0, a2 /* What's left */ | 122 | PTR_ADDU a0, a2 /* What's left */ |
102 | #ifdef __MIPSEB__ | 123 | #ifdef __MIPSEB__ |
103 | EX(swr, a1, -1(a0), last_fixup) | 124 | EX(LONG_S_R, a1, -1(a0), last_fixup) |
104 | #endif | 125 | #endif |
105 | #ifdef __MIPSEL__ | 126 | #ifdef __MIPSEL__ |
106 | EX(swl, a1, -1(a0), last_fixup) | 127 | EX(LONG_S_L, a1, -1(a0), last_fixup) |
107 | #endif | 128 | #endif |
108 | 1: jr ra | 129 | 1: jr ra |
109 | move a2, zero | 130 | move a2, zero |
diff --git a/arch/mips/lib/uncached.c b/arch/mips/lib/uncached.c index 98ce89f8068b..2388f7f3ffde 100644 --- a/arch/mips/lib/uncached.c +++ b/arch/mips/lib/uncached.c | |||
@@ -44,20 +44,24 @@ unsigned long __init run_uncached(void *func) | |||
44 | 44 | ||
45 | if (sp >= (long)CKSEG0 && sp < (long)CKSEG2) | 45 | if (sp >= (long)CKSEG0 && sp < (long)CKSEG2) |
46 | usp = CKSEG1ADDR(sp); | 46 | usp = CKSEG1ADDR(sp); |
47 | #ifdef CONFIG_64BIT | ||
47 | else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) && | 48 | else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) && |
48 | (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0)) | 49 | (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0)) |
49 | usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED, | 50 | usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED, |
50 | XKPHYS_TO_PHYS((long long)sp)); | 51 | XKPHYS_TO_PHYS((long long)sp)); |
52 | #endif | ||
51 | else { | 53 | else { |
52 | BUG(); | 54 | BUG(); |
53 | usp = sp; | 55 | usp = sp; |
54 | } | 56 | } |
55 | if (lfunc >= (long)CKSEG0 && lfunc < (long)CKSEG2) | 57 | if (lfunc >= (long)CKSEG0 && lfunc < (long)CKSEG2) |
56 | ufunc = CKSEG1ADDR(lfunc); | 58 | ufunc = CKSEG1ADDR(lfunc); |
59 | #ifdef CONFIG_64BIT | ||
57 | else if ((long long)lfunc >= (long long)PHYS_TO_XKPHYS(0LL, 0) && | 60 | else if ((long long)lfunc >= (long long)PHYS_TO_XKPHYS(0LL, 0) && |
58 | (long long)lfunc < (long long)PHYS_TO_XKPHYS(8LL, 0)) | 61 | (long long)lfunc < (long long)PHYS_TO_XKPHYS(8LL, 0)) |
59 | ufunc = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED, | 62 | ufunc = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED, |
60 | XKPHYS_TO_PHYS((long long)lfunc)); | 63 | XKPHYS_TO_PHYS((long long)lfunc)); |
64 | #endif | ||
61 | else { | 65 | else { |
62 | BUG(); | 66 | BUG(); |
63 | ufunc = lfunc; | 67 | ufunc = lfunc; |
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index 43dba6ce6603..dfa0acbd7fc2 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
33 | #include <linux/interrupt.h> | 33 | #include <linux/interrupt.h> |
34 | #include <linux/kernel_stat.h> | 34 | #include <linux/kernel_stat.h> |
35 | #include <linux/kernel.h> | ||
35 | 36 | ||
36 | #include <asm/gdb-stub.h> | 37 | #include <asm/gdb-stub.h> |
37 | #include <asm/io.h> | 38 | #include <asm/io.h> |
@@ -69,7 +70,7 @@ static void end_atlas_irq(unsigned int irq) | |||
69 | } | 70 | } |
70 | 71 | ||
71 | static struct irq_chip atlas_irq_type = { | 72 | static struct irq_chip atlas_irq_type = { |
72 | .typename = "Atlas", | 73 | .name = "Atlas", |
73 | .ack = disable_atlas_irq, | 74 | .ack = disable_atlas_irq, |
74 | .mask = disable_atlas_irq, | 75 | .mask = disable_atlas_irq, |
75 | .mask_ack = disable_atlas_irq, | 76 | .mask_ack = disable_atlas_irq, |
@@ -220,7 +221,7 @@ msc_irqmap_t __initdata msc_irqmap[] = { | |||
220 | {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0}, | 221 | {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0}, |
221 | {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0}, | 222 | {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0}, |
222 | }; | 223 | }; |
223 | int __initdata msc_nr_irqs = sizeof(msc_irqmap) / sizeof(*msc_irqmap); | 224 | int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap); |
224 | 225 | ||
225 | msc_irqmap_t __initdata msc_eicirqmap[] = { | 226 | msc_irqmap_t __initdata msc_eicirqmap[] = { |
226 | {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0}, | 227 | {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0}, |
@@ -231,14 +232,14 @@ msc_irqmap_t __initdata msc_eicirqmap[] = { | |||
231 | {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0}, | 232 | {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0}, |
232 | {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0} | 233 | {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0} |
233 | }; | 234 | }; |
234 | int __initdata msc_nr_eicirqs = sizeof(msc_eicirqmap) / sizeof(*msc_eicirqmap); | 235 | int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); |
235 | 236 | ||
236 | void __init arch_init_irq(void) | 237 | void __init arch_init_irq(void) |
237 | { | 238 | { |
238 | init_atlas_irqs(ATLAS_INT_BASE); | 239 | init_atlas_irqs(ATLAS_INT_BASE); |
239 | 240 | ||
240 | if (!cpu_has_veic) | 241 | if (!cpu_has_veic) |
241 | mips_cpu_irq_init(MIPSCPU_INT_BASE); | 242 | mips_cpu_irq_init(); |
242 | 243 | ||
243 | switch(mips_revision_corid) { | 244 | switch(mips_revision_corid) { |
244 | case MIPS_REVISION_CORID_CORE_MSC: | 245 | case MIPS_REVISION_CORID_CORE_MSC: |
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c index eeed944e0f83..ebf0e16c5a0d 100644 --- a/arch/mips/mips-boards/generic/memory.c +++ b/arch/mips/mips-boards/generic/memory.c | |||
@@ -166,9 +166,8 @@ void __init prom_meminit(void) | |||
166 | } | 166 | } |
167 | } | 167 | } |
168 | 168 | ||
169 | unsigned long __init prom_free_prom_memory(void) | 169 | void __init prom_free_prom_memory(void) |
170 | { | 170 | { |
171 | unsigned long freed = 0; | ||
172 | unsigned long addr; | 171 | unsigned long addr; |
173 | int i; | 172 | int i; |
174 | 173 | ||
@@ -176,17 +175,8 @@ unsigned long __init prom_free_prom_memory(void) | |||
176 | if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) | 175 | if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) |
177 | continue; | 176 | continue; |
178 | 177 | ||
179 | addr = PAGE_ALIGN(boot_mem_map.map[i].addr); | 178 | addr = boot_mem_map.map[i].addr; |
180 | while (addr < boot_mem_map.map[i].addr | 179 | free_init_pages("prom memory", |
181 | + boot_mem_map.map[i].size) { | 180 | addr, addr + boot_mem_map.map[i].size); |
182 | ClearPageReserved(virt_to_page(__va(addr))); | ||
183 | init_page_count(virt_to_page(__va(addr))); | ||
184 | free_page((unsigned long)__va(addr)); | ||
185 | addr += PAGE_SIZE; | ||
186 | freed += PAGE_SIZE; | ||
187 | } | ||
188 | } | 181 | } |
189 | printk("Freeing prom memory: %ldkb freed\n", freed >> 10); | ||
190 | |||
191 | return freed; | ||
192 | } | 182 | } |
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c index 90ad5bf3e2f1..3c206bb17160 100644 --- a/arch/mips/mips-boards/malta/malta_int.c +++ b/arch/mips/mips-boards/malta/malta_int.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
29 | #include <linux/kernel_stat.h> | 29 | #include <linux/kernel_stat.h> |
30 | #include <linux/kernel.h> | ||
30 | #include <linux/random.h> | 31 | #include <linux/random.h> |
31 | 32 | ||
32 | #include <asm/i8259.h> | 33 | #include <asm/i8259.h> |
@@ -289,7 +290,7 @@ msc_irqmap_t __initdata msc_irqmap[] = { | |||
289 | {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0}, | 290 | {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0}, |
290 | {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0}, | 291 | {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0}, |
291 | }; | 292 | }; |
292 | int __initdata msc_nr_irqs = sizeof(msc_irqmap)/sizeof(msc_irqmap_t); | 293 | int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap); |
293 | 294 | ||
294 | msc_irqmap_t __initdata msc_eicirqmap[] = { | 295 | msc_irqmap_t __initdata msc_eicirqmap[] = { |
295 | {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0}, | 296 | {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0}, |
@@ -303,14 +304,14 @@ msc_irqmap_t __initdata msc_eicirqmap[] = { | |||
303 | {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0}, | 304 | {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0}, |
304 | {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0} | 305 | {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0} |
305 | }; | 306 | }; |
306 | int __initdata msc_nr_eicirqs = sizeof(msc_eicirqmap)/sizeof(msc_irqmap_t); | 307 | int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); |
307 | 308 | ||
308 | void __init arch_init_irq(void) | 309 | void __init arch_init_irq(void) |
309 | { | 310 | { |
310 | init_i8259_irqs(); | 311 | init_i8259_irqs(); |
311 | 312 | ||
312 | if (!cpu_has_veic) | 313 | if (!cpu_has_veic) |
313 | mips_cpu_irq_init (MIPSCPU_INT_BASE); | 314 | mips_cpu_irq_init(); |
314 | 315 | ||
315 | switch(mips_revision_corid) { | 316 | switch(mips_revision_corid) { |
316 | case MIPS_REVISION_CORID_CORE_MSC: | 317 | case MIPS_REVISION_CORID_CORE_MSC: |
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c index 874ccb0066b8..c4b9de3a7f27 100644 --- a/arch/mips/mips-boards/sead/sead_int.c +++ b/arch/mips/mips-boards/sead/sead_int.c | |||
@@ -113,5 +113,5 @@ asmlinkage void plat_irq_dispatch(void) | |||
113 | 113 | ||
114 | void __init arch_init_irq(void) | 114 | void __init arch_init_irq(void) |
115 | { | 115 | { |
116 | mips_cpu_irq_init(MIPSCPU_INT_BASE); | 116 | mips_cpu_irq_init(); |
117 | } | 117 | } |
diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c index 2ce449dce6f2..15ac0655c1ff 100644 --- a/arch/mips/mips-boards/sim/sim_int.c +++ b/arch/mips/mips-boards/sim/sim_int.c | |||
@@ -21,9 +21,7 @@ | |||
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/kernel_stat.h> | 22 | #include <linux/kernel_stat.h> |
23 | #include <asm/mips-boards/simint.h> | 23 | #include <asm/mips-boards/simint.h> |
24 | 24 | #include <asm/irq_cpu.h> | |
25 | |||
26 | extern void mips_cpu_irq_init(int); | ||
27 | 25 | ||
28 | static inline int clz(unsigned long x) | 26 | static inline int clz(unsigned long x) |
29 | { | 27 | { |
@@ -86,5 +84,5 @@ asmlinkage void plat_irq_dispatch(void) | |||
86 | 84 | ||
87 | void __init arch_init_irq(void) | 85 | void __init arch_init_irq(void) |
88 | { | 86 | { |
89 | mips_cpu_irq_init(MIPSCPU_INT_BASE); | 87 | mips_cpu_irq_init(); |
90 | } | 88 | } |
diff --git a/arch/mips/mips-boards/sim/sim_mem.c b/arch/mips/mips-boards/sim/sim_mem.c index f7ce76983328..46bc16f8b15d 100644 --- a/arch/mips/mips-boards/sim/sim_mem.c +++ b/arch/mips/mips-boards/sim/sim_mem.c | |||
@@ -99,10 +99,9 @@ void __init prom_meminit(void) | |||
99 | } | 99 | } |
100 | } | 100 | } |
101 | 101 | ||
102 | unsigned long __init prom_free_prom_memory(void) | 102 | void __init prom_free_prom_memory(void) |
103 | { | 103 | { |
104 | int i; | 104 | int i; |
105 | unsigned long freed = 0; | ||
106 | unsigned long addr; | 105 | unsigned long addr; |
107 | 106 | ||
108 | for (i = 0; i < boot_mem_map.nr_map; i++) { | 107 | for (i = 0; i < boot_mem_map.nr_map; i++) { |
@@ -110,16 +109,7 @@ unsigned long __init prom_free_prom_memory(void) | |||
110 | continue; | 109 | continue; |
111 | 110 | ||
112 | addr = boot_mem_map.map[i].addr; | 111 | addr = boot_mem_map.map[i].addr; |
113 | while (addr < boot_mem_map.map[i].addr | 112 | free_init_pages("prom memory", |
114 | + boot_mem_map.map[i].size) { | 113 | addr, addr + boot_mem_map.map[i].size); |
115 | ClearPageReserved(virt_to_page(__va(addr))); | ||
116 | init_page_count(virt_to_page(__va(addr))); | ||
117 | free_page((unsigned long)__va(addr)); | ||
118 | addr += PAGE_SIZE; | ||
119 | freed += PAGE_SIZE; | ||
120 | } | ||
121 | } | 114 | } |
122 | printk("Freeing prom memory: %ldkb freed\n", freed >> 10); | ||
123 | |||
124 | return freed; | ||
125 | } | 115 | } |
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 49065c133ebf..125a4a85ec05 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -341,7 +341,6 @@ static int __init page_is_ram(unsigned long pagenr) | |||
341 | void __init paging_init(void) | 341 | void __init paging_init(void) |
342 | { | 342 | { |
343 | unsigned long zones_size[MAX_NR_ZONES] = { 0, }; | 343 | unsigned long zones_size[MAX_NR_ZONES] = { 0, }; |
344 | unsigned long max_dma, low; | ||
345 | #ifndef CONFIG_FLATMEM | 344 | #ifndef CONFIG_FLATMEM |
346 | unsigned long zholes_size[MAX_NR_ZONES] = { 0, }; | 345 | unsigned long zholes_size[MAX_NR_ZONES] = { 0, }; |
347 | unsigned long i, j, pfn; | 346 | unsigned long i, j, pfn; |
@@ -354,19 +353,19 @@ void __init paging_init(void) | |||
354 | #endif | 353 | #endif |
355 | kmap_coherent_init(); | 354 | kmap_coherent_init(); |
356 | 355 | ||
357 | max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT; | ||
358 | low = max_low_pfn; | ||
359 | |||
360 | #ifdef CONFIG_ISA | 356 | #ifdef CONFIG_ISA |
361 | if (low < max_dma) | 357 | if (max_low_pfn >= MAX_DMA_PFN) |
362 | zones_size[ZONE_DMA] = low; | 358 | if (min_low_pfn >= MAX_DMA_PFN) { |
363 | else { | 359 | zones_size[ZONE_DMA] = 0; |
364 | zones_size[ZONE_DMA] = max_dma; | 360 | zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn; |
365 | zones_size[ZONE_NORMAL] = low - max_dma; | 361 | } else { |
366 | } | 362 | zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn; |
367 | #else | 363 | zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN; |
368 | zones_size[ZONE_DMA] = low; | 364 | } |
365 | else | ||
369 | #endif | 366 | #endif |
367 | zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn; | ||
368 | |||
370 | #ifdef CONFIG_HIGHMEM | 369 | #ifdef CONFIG_HIGHMEM |
371 | zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn; | 370 | zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn; |
372 | 371 | ||
@@ -467,7 +466,7 @@ void __init mem_init(void) | |||
467 | } | 466 | } |
468 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ | 467 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ |
469 | 468 | ||
470 | static void free_init_pages(char *what, unsigned long begin, unsigned long end) | 469 | void free_init_pages(const char *what, unsigned long begin, unsigned long end) |
471 | { | 470 | { |
472 | unsigned long pfn; | 471 | unsigned long pfn; |
473 | 472 | ||
@@ -493,18 +492,25 @@ void free_initrd_mem(unsigned long start, unsigned long end) | |||
493 | } | 492 | } |
494 | #endif | 493 | #endif |
495 | 494 | ||
496 | extern unsigned long prom_free_prom_memory(void); | ||
497 | |||
498 | void free_initmem(void) | 495 | void free_initmem(void) |
499 | { | 496 | { |
500 | unsigned long freed; | 497 | prom_free_prom_memory(); |
501 | |||
502 | freed = prom_free_prom_memory(); | ||
503 | if (freed) | ||
504 | printk(KERN_INFO "Freeing firmware memory: %ldkb freed\n", | ||
505 | freed >> 10); | ||
506 | |||
507 | free_init_pages("unused kernel memory", | 498 | free_init_pages("unused kernel memory", |
508 | __pa_symbol(&__init_begin), | 499 | __pa_symbol(&__init_begin), |
509 | __pa_symbol(&__init_end)); | 500 | __pa_symbol(&__init_end)); |
510 | } | 501 | } |
502 | |||
503 | unsigned long pgd_current[NR_CPUS]; | ||
504 | /* | ||
505 | * On 64-bit we've got three-level pagetables with a slightly | ||
506 | * different layout ... | ||
507 | */ | ||
508 | #define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order))) | ||
509 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned(PGD_ORDER); | ||
510 | #ifdef CONFIG_64BIT | ||
511 | #ifdef MODULE_START | ||
512 | pgd_t module_pg_dir[PTRS_PER_PGD] __page_aligned(PGD_ORDER); | ||
513 | #endif | ||
514 | pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER); | ||
515 | #endif | ||
516 | pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER); | ||
diff --git a/arch/mips/momentum/jaguar_atx/Makefile b/arch/mips/momentum/jaguar_atx/Makefile index 67372f3f9654..2e8cebd49bc0 100644 --- a/arch/mips/momentum/jaguar_atx/Makefile +++ b/arch/mips/momentum/jaguar_atx/Makefile | |||
@@ -6,7 +6,7 @@ | |||
6 | # unless it's something special (ie not a .c file). | 6 | # unless it's something special (ie not a .c file). |
7 | # | 7 | # |
8 | 8 | ||
9 | obj-y += irq.o prom.o reset.o setup.o | 9 | obj-y += irq.o platform.o prom.o reset.o setup.o |
10 | 10 | ||
11 | obj-$(CONFIG_SERIAL_8250_CONSOLE) += ja-console.o | 11 | obj-$(CONFIG_SERIAL_8250_CONSOLE) += ja-console.o |
12 | obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o | 12 | obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o |
diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c index 2efb25aa1aed..f2b432585df2 100644 --- a/arch/mips/momentum/jaguar_atx/irq.c +++ b/arch/mips/momentum/jaguar_atx/irq.c | |||
@@ -82,8 +82,8 @@ void __init arch_init_irq(void) | |||
82 | */ | 82 | */ |
83 | clear_c0_status(ST0_IM); | 83 | clear_c0_status(ST0_IM); |
84 | 84 | ||
85 | mips_cpu_irq_init(0); | 85 | mips_cpu_irq_init(); |
86 | rm7k_cpu_irq_init(8); | 86 | rm7k_cpu_irq_init(); |
87 | 87 | ||
88 | /* set up the cascading interrupts */ | 88 | /* set up the cascading interrupts */ |
89 | setup_irq(8, &cascade_mv64340); | 89 | setup_irq(8, &cascade_mv64340); |
diff --git a/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h b/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h index 6978654c712b..022f6974b76e 100644 --- a/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h +++ b/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h | |||
@@ -46,7 +46,9 @@ | |||
46 | 46 | ||
47 | extern unsigned long ja_fpga_base; | 47 | extern unsigned long ja_fpga_base; |
48 | 48 | ||
49 | #define JAGUAR_FPGA_WRITE(x,y) writeb(x, ja_fpga_base + JAGUAR_ATX_REG_##y) | 49 | #define __FPGA_REG_TO_ADDR(reg) \ |
50 | #define JAGUAR_FPGA_READ(x) readb(ja_fpga_base + JAGUAR_ATX_REG_##x) | 50 | ((void *) ja_fpga_base + JAGUAR_ATX_REG_##reg) |
51 | #define JAGUAR_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg)) | ||
52 | #define JAGUAR_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg)) | ||
51 | 53 | ||
52 | #endif | 54 | #endif |
diff --git a/arch/mips/momentum/jaguar_atx/platform.c b/arch/mips/momentum/jaguar_atx/platform.c new file mode 100644 index 000000000000..035ea5137c71 --- /dev/null +++ b/arch/mips/momentum/jaguar_atx/platform.c | |||
@@ -0,0 +1,235 @@ | |||
1 | #include <linux/delay.h> | ||
2 | #include <linux/if_ether.h> | ||
3 | #include <linux/ioport.h> | ||
4 | #include <linux/mv643xx.h> | ||
5 | #include <linux/platform_device.h> | ||
6 | |||
7 | #include "jaguar_atx_fpga.h" | ||
8 | |||
9 | #if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) | ||
10 | |||
11 | static struct resource mv643xx_eth_shared_resources[] = { | ||
12 | [0] = { | ||
13 | .name = "ethernet shared base", | ||
14 | .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS, | ||
15 | .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS + | ||
16 | MV643XX_ETH_SHARED_REGS_SIZE - 1, | ||
17 | .flags = IORESOURCE_MEM, | ||
18 | }, | ||
19 | }; | ||
20 | |||
21 | static struct platform_device mv643xx_eth_shared_device = { | ||
22 | .name = MV643XX_ETH_SHARED_NAME, | ||
23 | .id = 0, | ||
24 | .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources), | ||
25 | .resource = mv643xx_eth_shared_resources, | ||
26 | }; | ||
27 | |||
28 | #define MV_SRAM_BASE 0xfe000000UL | ||
29 | #define MV_SRAM_SIZE (256 * 1024) | ||
30 | |||
31 | #define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4) | ||
32 | #define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4) | ||
33 | |||
34 | #define MV_SRAM_BASE_ETH0 MV_SRAM_BASE | ||
35 | #define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2)) | ||
36 | |||
37 | #define MV64x60_IRQ_ETH_0 48 | ||
38 | #define MV64x60_IRQ_ETH_1 49 | ||
39 | #define MV64x60_IRQ_ETH_2 50 | ||
40 | |||
41 | #ifdef CONFIG_MV643XX_ETH_0 | ||
42 | |||
43 | static struct resource mv64x60_eth0_resources[] = { | ||
44 | [0] = { | ||
45 | .name = "eth0 irq", | ||
46 | .start = MV64x60_IRQ_ETH_0, | ||
47 | .end = MV64x60_IRQ_ETH_0, | ||
48 | .flags = IORESOURCE_IRQ, | ||
49 | }, | ||
50 | }; | ||
51 | |||
52 | static char eth0_mac_addr[ETH_ALEN]; | ||
53 | |||
54 | static struct mv643xx_eth_platform_data eth0_pd = { | ||
55 | .mac_addr = eth0_mac_addr, | ||
56 | |||
57 | .tx_sram_addr = MV_SRAM_BASE_ETH0, | ||
58 | .tx_sram_size = MV_SRAM_TXRING_SIZE, | ||
59 | .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, | ||
60 | |||
61 | .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE, | ||
62 | .rx_sram_size = MV_SRAM_RXRING_SIZE, | ||
63 | .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, | ||
64 | }; | ||
65 | |||
66 | static struct platform_device eth0_device = { | ||
67 | .name = MV643XX_ETH_NAME, | ||
68 | .id = 0, | ||
69 | .num_resources = ARRAY_SIZE(mv64x60_eth0_resources), | ||
70 | .resource = mv64x60_eth0_resources, | ||
71 | .dev = { | ||
72 | .platform_data = ð0_pd, | ||
73 | }, | ||
74 | }; | ||
75 | #endif /* CONFIG_MV643XX_ETH_0 */ | ||
76 | |||
77 | #ifdef CONFIG_MV643XX_ETH_1 | ||
78 | |||
79 | static struct resource mv64x60_eth1_resources[] = { | ||
80 | [0] = { | ||
81 | .name = "eth1 irq", | ||
82 | .start = MV64x60_IRQ_ETH_1, | ||
83 | .end = MV64x60_IRQ_ETH_1, | ||
84 | .flags = IORESOURCE_IRQ, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static char eth1_mac_addr[ETH_ALEN]; | ||
89 | |||
90 | static struct mv643xx_eth_platform_data eth1_pd = { | ||
91 | .mac_addr = eth1_mac_addr, | ||
92 | |||
93 | .tx_sram_addr = MV_SRAM_BASE_ETH1, | ||
94 | .tx_sram_size = MV_SRAM_TXRING_SIZE, | ||
95 | .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, | ||
96 | |||
97 | .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE, | ||
98 | .rx_sram_size = MV_SRAM_RXRING_SIZE, | ||
99 | .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, | ||
100 | }; | ||
101 | |||
102 | static struct platform_device eth1_device = { | ||
103 | .name = MV643XX_ETH_NAME, | ||
104 | .id = 1, | ||
105 | .num_resources = ARRAY_SIZE(mv64x60_eth1_resources), | ||
106 | .resource = mv64x60_eth1_resources, | ||
107 | .dev = { | ||
108 | .platform_data = ð1_pd, | ||
109 | }, | ||
110 | }; | ||
111 | #endif /* CONFIG_MV643XX_ETH_1 */ | ||
112 | |||
113 | #ifdef CONFIG_MV643XX_ETH_2 | ||
114 | |||
115 | static struct resource mv64x60_eth2_resources[] = { | ||
116 | [0] = { | ||
117 | .name = "eth2 irq", | ||
118 | .start = MV64x60_IRQ_ETH_2, | ||
119 | .end = MV64x60_IRQ_ETH_2, | ||
120 | .flags = IORESOURCE_IRQ, | ||
121 | }, | ||
122 | }; | ||
123 | |||
124 | static char eth2_mac_addr[ETH_ALEN]; | ||
125 | |||
126 | static struct mv643xx_eth_platform_data eth2_pd = { | ||
127 | .mac_addr = eth2_mac_addr, | ||
128 | }; | ||
129 | |||
130 | static struct platform_device eth2_device = { | ||
131 | .name = MV643XX_ETH_NAME, | ||
132 | .id = 1, | ||
133 | .num_resources = ARRAY_SIZE(mv64x60_eth2_resources), | ||
134 | .resource = mv64x60_eth2_resources, | ||
135 | .dev = { | ||
136 | .platform_data = ð2_pd, | ||
137 | }, | ||
138 | }; | ||
139 | #endif /* CONFIG_MV643XX_ETH_2 */ | ||
140 | |||
141 | static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { | ||
142 | &mv643xx_eth_shared_device, | ||
143 | #ifdef CONFIG_MV643XX_ETH_0 | ||
144 | ð0_device, | ||
145 | #endif | ||
146 | #ifdef CONFIG_MV643XX_ETH_1 | ||
147 | ð1_device, | ||
148 | #endif | ||
149 | #ifdef CONFIG_MV643XX_ETH_2 | ||
150 | ð2_device, | ||
151 | #endif | ||
152 | }; | ||
153 | |||
154 | static u8 __init exchange_bit(u8 val, u8 cs) | ||
155 | { | ||
156 | /* place the data */ | ||
157 | JAGUAR_FPGA_WRITE((val << 2) | cs, EEPROM_MODE); | ||
158 | udelay(1); | ||
159 | |||
160 | /* turn the clock on */ | ||
161 | JAGUAR_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE); | ||
162 | udelay(1); | ||
163 | |||
164 | /* turn the clock off and read-strobe */ | ||
165 | JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); | ||
166 | |||
167 | /* return the data */ | ||
168 | return (JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1; | ||
169 | } | ||
170 | |||
171 | static void __init get_mac(char dest[6]) | ||
172 | { | ||
173 | u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; | ||
174 | int i,j; | ||
175 | |||
176 | for (i = 0; i < 12; i++) | ||
177 | exchange_bit(read_opcode[i], 1); | ||
178 | |||
179 | for (j = 0; j < 6; j++) { | ||
180 | dest[j] = 0; | ||
181 | for (i = 0; i < 8; i++) { | ||
182 | dest[j] <<= 1; | ||
183 | dest[j] |= exchange_bit(0, 1); | ||
184 | } | ||
185 | } | ||
186 | |||
187 | /* turn off CS */ | ||
188 | exchange_bit(0,0); | ||
189 | } | ||
190 | |||
191 | /* | ||
192 | * Copy and increment ethernet MAC address by a small value. | ||
193 | * | ||
194 | * This is useful for systems where the only one MAC address is stored in | ||
195 | * non-volatile memory for multiple ports. | ||
196 | */ | ||
197 | static inline void eth_mac_add(unsigned char *dst, unsigned char *src, | ||
198 | unsigned int add) | ||
199 | { | ||
200 | int i; | ||
201 | |||
202 | BUG_ON(add >= 256); | ||
203 | |||
204 | for (i = ETH_ALEN; i >= 0; i--) { | ||
205 | dst[i] = src[i] + add; | ||
206 | add = dst[i] < src[i]; /* compute carry */ | ||
207 | } | ||
208 | |||
209 | WARN_ON(add); | ||
210 | } | ||
211 | |||
212 | static int __init mv643xx_eth_add_pds(void) | ||
213 | { | ||
214 | unsigned char mac[ETH_ALEN]; | ||
215 | int ret; | ||
216 | |||
217 | get_mac(mac); | ||
218 | #ifdef CONFIG_MV643XX_ETH_0 | ||
219 | eth_mac_add(eth1_mac_addr, mac, 0); | ||
220 | #endif | ||
221 | #ifdef CONFIG_MV643XX_ETH_1 | ||
222 | eth_mac_add(eth1_mac_addr, mac, 1); | ||
223 | #endif | ||
224 | #ifdef CONFIG_MV643XX_ETH_2 | ||
225 | eth_mac_add(eth2_mac_addr, mac, 2); | ||
226 | #endif | ||
227 | ret = platform_add_devices(mv643xx_eth_pd_devs, | ||
228 | ARRAY_SIZE(mv643xx_eth_pd_devs)); | ||
229 | |||
230 | return ret; | ||
231 | } | ||
232 | |||
233 | device_initcall(mv643xx_eth_add_pds); | ||
234 | |||
235 | #endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */ | ||
diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c index 3d2712929293..5dd154ee58f6 100644 --- a/arch/mips/momentum/jaguar_atx/prom.c +++ b/arch/mips/momentum/jaguar_atx/prom.c | |||
@@ -39,56 +39,6 @@ const char *get_system_type(void) | |||
39 | return "Momentum Jaguar-ATX"; | 39 | return "Momentum Jaguar-ATX"; |
40 | } | 40 | } |
41 | 41 | ||
42 | #ifdef CONFIG_MV643XX_ETH | ||
43 | extern unsigned char prom_mac_addr_base[6]; | ||
44 | |||
45 | static void burn_clocks(void) | ||
46 | { | ||
47 | int i; | ||
48 | |||
49 | /* this loop should burn at least 1us -- this should be plenty */ | ||
50 | for (i = 0; i < 0x10000; i++) | ||
51 | ; | ||
52 | } | ||
53 | |||
54 | static u8 exchange_bit(u8 val, u8 cs) | ||
55 | { | ||
56 | /* place the data */ | ||
57 | JAGUAR_FPGA_WRITE((val << 2) | cs, EEPROM_MODE); | ||
58 | burn_clocks(); | ||
59 | |||
60 | /* turn the clock on */ | ||
61 | JAGUAR_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE); | ||
62 | burn_clocks(); | ||
63 | |||
64 | /* turn the clock off and read-strobe */ | ||
65 | JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); | ||
66 | |||
67 | /* return the data */ | ||
68 | return ((JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1); | ||
69 | } | ||
70 | |||
71 | void get_mac(char dest[6]) | ||
72 | { | ||
73 | u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; | ||
74 | int i,j; | ||
75 | |||
76 | for (i = 0; i < 12; i++) | ||
77 | exchange_bit(read_opcode[i], 1); | ||
78 | |||
79 | for (j = 0; j < 6; j++) { | ||
80 | dest[j] = 0; | ||
81 | for (i = 0; i < 8; i++) { | ||
82 | dest[j] <<= 1; | ||
83 | dest[j] |= exchange_bit(0, 1); | ||
84 | } | ||
85 | } | ||
86 | |||
87 | /* turn off CS */ | ||
88 | exchange_bit(0,0); | ||
89 | } | ||
90 | #endif | ||
91 | |||
92 | #ifdef CONFIG_64BIT | 42 | #ifdef CONFIG_64BIT |
93 | 43 | ||
94 | unsigned long signext(unsigned long addr) | 44 | unsigned long signext(unsigned long addr) |
@@ -228,16 +178,10 @@ void __init prom_init(void) | |||
228 | #endif /* CONFIG_64BIT */ | 178 | #endif /* CONFIG_64BIT */ |
229 | mips_machgroup = MACH_GROUP_MOMENCO; | 179 | mips_machgroup = MACH_GROUP_MOMENCO; |
230 | mips_machtype = MACH_MOMENCO_JAGUAR_ATX; | 180 | mips_machtype = MACH_MOMENCO_JAGUAR_ATX; |
231 | |||
232 | #ifdef CONFIG_MV643XX_ETH | ||
233 | /* get the base MAC address for on-board ethernet ports */ | ||
234 | get_mac(prom_mac_addr_base); | ||
235 | #endif | ||
236 | } | 181 | } |
237 | 182 | ||
238 | unsigned long __init prom_free_prom_memory(void) | 183 | void __init prom_free_prom_memory(void) |
239 | { | 184 | { |
240 | return 0; | ||
241 | } | 185 | } |
242 | 186 | ||
243 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) | 187 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) |
diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c index cea0e5deb80e..3862d1d1add4 100644 --- a/arch/mips/momentum/ocelot_3/irq.c +++ b/arch/mips/momentum/ocelot_3/irq.c | |||
@@ -65,7 +65,7 @@ void __init arch_init_irq(void) | |||
65 | */ | 65 | */ |
66 | clear_c0_status(ST0_IM | ST0_BEV); | 66 | clear_c0_status(ST0_IM | ST0_BEV); |
67 | 67 | ||
68 | rm7k_cpu_irq_init(8); | 68 | rm7k_cpu_irq_init(); |
69 | 69 | ||
70 | /* set up the cascading interrupts */ | 70 | /* set up the cascading interrupts */ |
71 | setup_irq(8, &cascade_mv64340); /* unmask intControl IM8, IRQ 9 */ | 71 | setup_irq(8, &cascade_mv64340); /* unmask intControl IM8, IRQ 9 */ |
diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c index 6ce9b7fdb824..8e02df63578a 100644 --- a/arch/mips/momentum/ocelot_3/prom.c +++ b/arch/mips/momentum/ocelot_3/prom.c | |||
@@ -180,9 +180,8 @@ void __init prom_init(void) | |||
180 | #endif | 180 | #endif |
181 | } | 181 | } |
182 | 182 | ||
183 | unsigned long __init prom_free_prom_memory(void) | 183 | void __init prom_free_prom_memory(void) |
184 | { | 184 | { |
185 | return 0; | ||
186 | } | 185 | } |
187 | 186 | ||
188 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) | 187 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) |
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c index bb11fef08472..186a140fd2a9 100644 --- a/arch/mips/momentum/ocelot_c/cpci-irq.c +++ b/arch/mips/momentum/ocelot_c/cpci-irq.c | |||
@@ -84,7 +84,7 @@ void ll_cpci_irq(void) | |||
84 | } | 84 | } |
85 | 85 | ||
86 | struct irq_chip cpci_irq_type = { | 86 | struct irq_chip cpci_irq_type = { |
87 | .typename = "CPCI/FPGA", | 87 | .name = "CPCI/FPGA", |
88 | .ack = mask_cpci_irq, | 88 | .ack = mask_cpci_irq, |
89 | .mask = mask_cpci_irq, | 89 | .mask = mask_cpci_irq, |
90 | .mask_ack = mask_cpci_irq, | 90 | .mask_ack = mask_cpci_irq, |
diff --git a/arch/mips/momentum/ocelot_c/dbg_io.c b/arch/mips/momentum/ocelot_c/dbg_io.c index 2128684584f5..32d6fb4ee679 100644 --- a/arch/mips/momentum/ocelot_c/dbg_io.c +++ b/arch/mips/momentum/ocelot_c/dbg_io.c | |||
@@ -1,6 +1,4 @@ | |||
1 | 1 | ||
2 | #ifdef CONFIG_KGDB | ||
3 | |||
4 | #include <asm/serial.h> /* For the serial port location and base baud */ | 2 | #include <asm/serial.h> /* For the serial port location and base baud */ |
5 | 3 | ||
6 | /* --- CONFIG --- */ | 4 | /* --- CONFIG --- */ |
@@ -121,5 +119,3 @@ int putDebugChar(uint8 byte) | |||
121 | UART16550_WRITE(OFS_SEND_BUFFER, byte); | 119 | UART16550_WRITE(OFS_SEND_BUFFER, byte); |
122 | return 1; | 120 | return 1; |
123 | } | 121 | } |
124 | |||
125 | #endif | ||
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c index ea65223a6d2c..40472f7944d7 100644 --- a/arch/mips/momentum/ocelot_c/irq.c +++ b/arch/mips/momentum/ocelot_c/irq.c | |||
@@ -94,7 +94,7 @@ void __init arch_init_irq(void) | |||
94 | */ | 94 | */ |
95 | clear_c0_status(ST0_IM); | 95 | clear_c0_status(ST0_IM); |
96 | 96 | ||
97 | mips_cpu_irq_init(0); | 97 | mips_cpu_irq_init(); |
98 | 98 | ||
99 | /* set up the cascading interrupts */ | 99 | /* set up the cascading interrupts */ |
100 | setup_irq(3, &cascade_fpga); | 100 | setup_irq(3, &cascade_fpga); |
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c index d0b77e101d74..b689ceea8cfb 100644 --- a/arch/mips/momentum/ocelot_c/prom.c +++ b/arch/mips/momentum/ocelot_c/prom.c | |||
@@ -178,7 +178,6 @@ void __init prom_init(void) | |||
178 | #endif | 178 | #endif |
179 | } | 179 | } |
180 | 180 | ||
181 | unsigned long __init prom_free_prom_memory(void) | 181 | void __init prom_free_prom_memory(void) |
182 | { | 182 | { |
183 | return 0; | ||
184 | } | 183 | } |
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c index a7a80c0da569..de1a31ee52f3 100644 --- a/arch/mips/momentum/ocelot_c/uart-irq.c +++ b/arch/mips/momentum/ocelot_c/uart-irq.c | |||
@@ -77,7 +77,7 @@ void ll_uart_irq(void) | |||
77 | } | 77 | } |
78 | 78 | ||
79 | struct irq_chip uart_irq_type = { | 79 | struct irq_chip uart_irq_type = { |
80 | .typename = "UART/FPGA", | 80 | .name = "UART/FPGA", |
81 | .ack = mask_uart_irq, | 81 | .ack = mask_uart_irq, |
82 | .mask = mask_uart_irq, | 82 | .mask = mask_uart_irq, |
83 | .mask_ack = mask_uart_irq, | 83 | .mask_ack = mask_uart_irq, |
diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c index 2128684584f5..32d6fb4ee679 100644 --- a/arch/mips/momentum/ocelot_g/dbg_io.c +++ b/arch/mips/momentum/ocelot_g/dbg_io.c | |||
@@ -1,6 +1,4 @@ | |||
1 | 1 | ||
2 | #ifdef CONFIG_KGDB | ||
3 | |||
4 | #include <asm/serial.h> /* For the serial port location and base baud */ | 2 | #include <asm/serial.h> /* For the serial port location and base baud */ |
5 | 3 | ||
6 | /* --- CONFIG --- */ | 4 | /* --- CONFIG --- */ |
@@ -121,5 +119,3 @@ int putDebugChar(uint8 byte) | |||
121 | UART16550_WRITE(OFS_SEND_BUFFER, byte); | 119 | UART16550_WRITE(OFS_SEND_BUFFER, byte); |
122 | return 1; | 120 | return 1; |
123 | } | 121 | } |
124 | |||
125 | #endif | ||
diff --git a/arch/mips/momentum/ocelot_g/irq.c b/arch/mips/momentum/ocelot_g/irq.c index da46524e87cb..273541fe7087 100644 --- a/arch/mips/momentum/ocelot_g/irq.c +++ b/arch/mips/momentum/ocelot_g/irq.c | |||
@@ -94,8 +94,8 @@ void __init arch_init_irq(void) | |||
94 | clear_c0_status(ST0_IM); | 94 | clear_c0_status(ST0_IM); |
95 | local_irq_disable(); | 95 | local_irq_disable(); |
96 | 96 | ||
97 | mips_cpu_irq_init(0); | 97 | mips_cpu_irq_init(); |
98 | rm7k_cpu_irq_init(8); | 98 | rm7k_cpu_irq_init(); |
99 | 99 | ||
100 | gt64240_irq_init(); | 100 | gt64240_irq_init(); |
101 | } | 101 | } |
diff --git a/arch/mips/momentum/ocelot_g/prom.c b/arch/mips/momentum/ocelot_g/prom.c index 2f75c6b91ec5..836d0830720d 100644 --- a/arch/mips/momentum/ocelot_g/prom.c +++ b/arch/mips/momentum/ocelot_g/prom.c | |||
@@ -79,7 +79,6 @@ void __init prom_init(void) | |||
79 | } | 79 | } |
80 | } | 80 | } |
81 | 81 | ||
82 | unsigned long __init prom_free_prom_memory(void) | 82 | void __init prom_free_prom_memory(void) |
83 | { | 83 | { |
84 | return 0; | ||
85 | } | 84 | } |
diff --git a/arch/mips/oprofile/Kconfig b/arch/mips/oprofile/Kconfig index 55feaf798596..ca395ef06d4e 100644 --- a/arch/mips/oprofile/Kconfig +++ b/arch/mips/oprofile/Kconfig | |||
@@ -11,7 +11,7 @@ config PROFILING | |||
11 | 11 | ||
12 | config OPROFILE | 12 | config OPROFILE |
13 | tristate "OProfile system profiling (EXPERIMENTAL)" | 13 | tristate "OProfile system profiling (EXPERIMENTAL)" |
14 | depends on PROFILING && EXPERIMENTAL | 14 | depends on PROFILING && !!MIPS_MT_SMTC && EXPERIMENTAL |
15 | help | 15 | help |
16 | OProfile is a profiling system capable of profiling the | 16 | OProfile is a profiling system capable of profiling the |
17 | whole system, include the kernel, kernel modules, libraries, | 17 | whole system, include the kernel, kernel modules, libraries, |
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c index 597b89764ba1..a8d9d22b13df 100644 --- a/arch/mips/pci/fixup-vr4133.c +++ b/arch/mips/pci/fixup-vr4133.c | |||
@@ -17,8 +17,10 @@ | |||
17 | */ | 17 | */ |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/pci.h> | 19 | #include <linux/pci.h> |
20 | #include <linux/kernel.h> | ||
20 | 21 | ||
21 | #include <asm/io.h> | 22 | #include <asm/io.h> |
23 | #include <asm/i8259.h> | ||
22 | #include <asm/vr41xx/cmbvr4133.h> | 24 | #include <asm/vr41xx/cmbvr4133.h> |
23 | 25 | ||
24 | extern int vr4133_rockhopper; | 26 | extern int vr4133_rockhopper; |
@@ -142,7 +144,7 @@ int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot) | |||
142 | if (bus == NULL) | 144 | if (bus == NULL) |
143 | return -1; | 145 | return -1; |
144 | 146 | ||
145 | for (i = 0; i < sizeof (int_map) / sizeof (int_map[0]); i++) { | 147 | for (i = 0; i < ARRAY_SIZE(int_map); i++) { |
146 | if (int_map[i].bus == bus->number && int_map[i].slot == slot) { | 148 | if (int_map[i].bus == bus->number && int_map[i].slot == slot) { |
147 | int line; | 149 | int line; |
148 | for (line = 0; line < 4; line++) | 150 | for (line = 0; line < 4; line++) |
@@ -160,17 +162,7 @@ int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot) | |||
160 | #ifdef CONFIG_ROCKHOPPER | 162 | #ifdef CONFIG_ROCKHOPPER |
161 | void i8259_init(void) | 163 | void i8259_init(void) |
162 | { | 164 | { |
163 | outb(0x11, 0x20); /* Master ICW1 */ | 165 | init_i8259_irqs(); |
164 | outb(I8259_IRQ_BASE, 0x21); /* Master ICW2 */ | ||
165 | outb(0x04, 0x21); /* Master ICW3 */ | ||
166 | outb(0x01, 0x21); /* Master ICW4 */ | ||
167 | outb(0xff, 0x21); /* Master IMW */ | ||
168 | |||
169 | outb(0x11, 0xa0); /* Slave ICW1 */ | ||
170 | outb(I8259_IRQ_BASE + 8, 0xa1); /* Slave ICW2 */ | ||
171 | outb(0x02, 0xa1); /* Slave ICW3 */ | ||
172 | outb(0x01, 0xa1); /* Slave ICW4 */ | ||
173 | outb(0xff, 0xa1); /* Slave IMW */ | ||
174 | 166 | ||
175 | outb(0x00, 0x4d0); | 167 | outb(0x00, 0x4d0); |
176 | outb(0x02, 0x4d1); /* USB IRQ9 is level */ | 168 | outb(0x02, 0x4d1); /* USB IRQ9 is level */ |
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index 2c36c108c4d6..d48665ebd33c 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c | |||
@@ -159,7 +159,7 @@ int pnx8550_set_gic_priority(int irq, int priority) | |||
159 | } | 159 | } |
160 | 160 | ||
161 | static struct irq_chip level_irq_type = { | 161 | static struct irq_chip level_irq_type = { |
162 | .typename = "PNX Level IRQ", | 162 | .name = "PNX Level IRQ", |
163 | .ack = mask_irq, | 163 | .ack = mask_irq, |
164 | .mask = mask_irq, | 164 | .mask = mask_irq, |
165 | .mask_ack = mask_irq, | 165 | .mask_ack = mask_irq, |
diff --git a/arch/mips/philips/pnx8550/common/prom.c b/arch/mips/philips/pnx8550/common/prom.c index eb6ec11fef07..8aeed6c2b8c3 100644 --- a/arch/mips/philips/pnx8550/common/prom.c +++ b/arch/mips/philips/pnx8550/common/prom.c | |||
@@ -106,9 +106,8 @@ int get_ethernet_addr(char *ethernet_addr) | |||
106 | return 0; | 106 | return 0; |
107 | } | 107 | } |
108 | 108 | ||
109 | unsigned long __init prom_free_prom_memory(void) | 109 | void __init prom_free_prom_memory(void) |
110 | { | 110 | { |
111 | return 0; | ||
112 | } | 111 | } |
113 | 112 | ||
114 | extern int pnx8550_console_port; | 113 | extern int pnx8550_console_port; |
diff --git a/arch/mips/pmc-sierra/yosemite/dbg_io.c b/arch/mips/pmc-sierra/yosemite/dbg_io.c index 0f659c9106ac..6362c702e389 100644 --- a/arch/mips/pmc-sierra/yosemite/dbg_io.c +++ b/arch/mips/pmc-sierra/yosemite/dbg_io.c | |||
@@ -93,7 +93,7 @@ | |||
93 | * Functions to READ and WRITE to serial port 1 | 93 | * Functions to READ and WRITE to serial port 1 |
94 | */ | 94 | */ |
95 | #define SERIAL_READ_1(ofs) (*((volatile unsigned char*) \ | 95 | #define SERIAL_READ_1(ofs) (*((volatile unsigned char*) \ |
96 | (TITAN_SERIAL_BASE_1 + ofs) | 96 | (TITAN_SERIAL_BASE_1 + ofs))) |
97 | 97 | ||
98 | #define SERIAL_WRITE_1(ofs, val) ((*((volatile unsigned char*) \ | 98 | #define SERIAL_WRITE_1(ofs, val) ((*((volatile unsigned char*) \ |
99 | (TITAN_SERIAL_BASE_1 + ofs))) = val) | 99 | (TITAN_SERIAL_BASE_1 + ofs))) = val) |
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c index adb048527e76..428d1f45a287 100644 --- a/arch/mips/pmc-sierra/yosemite/irq.c +++ b/arch/mips/pmc-sierra/yosemite/irq.c | |||
@@ -148,9 +148,9 @@ void __init arch_init_irq(void) | |||
148 | { | 148 | { |
149 | clear_c0_status(ST0_IM); | 149 | clear_c0_status(ST0_IM); |
150 | 150 | ||
151 | mips_cpu_irq_init(0); | 151 | mips_cpu_irq_init(); |
152 | rm7k_cpu_irq_init(8); | 152 | rm7k_cpu_irq_init(); |
153 | rm9k_cpu_irq_init(12); | 153 | rm9k_cpu_irq_init(); |
154 | 154 | ||
155 | #ifdef CONFIG_KGDB | 155 | #ifdef CONFIG_KGDB |
156 | /* At this point, initialize the second serial port */ | 156 | /* At this point, initialize the second serial port */ |
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c index 9fe4973377c3..1e1685e415a4 100644 --- a/arch/mips/pmc-sierra/yosemite/prom.c +++ b/arch/mips/pmc-sierra/yosemite/prom.c | |||
@@ -132,9 +132,8 @@ void __init prom_init(void) | |||
132 | prom_grab_secondary(); | 132 | prom_grab_secondary(); |
133 | } | 133 | } |
134 | 134 | ||
135 | unsigned long __init prom_free_prom_memory(void) | 135 | void __init prom_free_prom_memory(void) |
136 | { | 136 | { |
137 | return 0; | ||
138 | } | 137 | } |
139 | 138 | ||
140 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) | 139 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) |
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c index 1b9b0d396d3e..6a6e15e40009 100644 --- a/arch/mips/pmc-sierra/yosemite/setup.c +++ b/arch/mips/pmc-sierra/yosemite/setup.c | |||
@@ -171,6 +171,7 @@ static void __init py_map_ocd(void) | |||
171 | 171 | ||
172 | static void __init py_uart_setup(void) | 172 | static void __init py_uart_setup(void) |
173 | { | 173 | { |
174 | #ifdef CONFIG_SERIAL_8250 | ||
174 | struct uart_port up; | 175 | struct uart_port up; |
175 | 176 | ||
176 | /* | 177 | /* |
@@ -188,6 +189,7 @@ static void __init py_uart_setup(void) | |||
188 | 189 | ||
189 | if (early_serial_setup(&up)) | 190 | if (early_serial_setup(&up)) |
190 | printk(KERN_ERR "Early serial init of port 0 failed\n"); | 191 | printk(KERN_ERR "Early serial init of port 0 failed\n"); |
192 | #endif /* CONFIG_SERIAL_8250 */ | ||
191 | } | 193 | } |
192 | 194 | ||
193 | static void __init py_rtc_setup(void) | 195 | static void __init py_rtc_setup(void) |
diff --git a/arch/mips/qemu/q-mem.c b/arch/mips/qemu/q-mem.c index d174fac43031..dae39b59de15 100644 --- a/arch/mips/qemu/q-mem.c +++ b/arch/mips/qemu/q-mem.c | |||
@@ -1,6 +1,5 @@ | |||
1 | #include <linux/init.h> | 1 | #include <linux/init.h> |
2 | 2 | ||
3 | unsigned long __init prom_free_prom_memory(void) | 3 | void __init prom_free_prom_memory(void) |
4 | { | 4 | { |
5 | return 0UL; | ||
6 | } | 5 | } |
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c index a1a9af6da7bf..6b6e97b90c6e 100644 --- a/arch/mips/sgi-ip22/ip22-eisa.c +++ b/arch/mips/sgi-ip22/ip22-eisa.c | |||
@@ -139,7 +139,7 @@ static void end_eisa1_irq(unsigned int irq) | |||
139 | } | 139 | } |
140 | 140 | ||
141 | static struct irq_chip ip22_eisa1_irq_type = { | 141 | static struct irq_chip ip22_eisa1_irq_type = { |
142 | .typename = "IP22 EISA", | 142 | .name = "IP22 EISA", |
143 | .startup = startup_eisa1_irq, | 143 | .startup = startup_eisa1_irq, |
144 | .ack = mask_and_ack_eisa1_irq, | 144 | .ack = mask_and_ack_eisa1_irq, |
145 | .mask = disable_eisa1_irq, | 145 | .mask = disable_eisa1_irq, |
@@ -194,7 +194,7 @@ static void end_eisa2_irq(unsigned int irq) | |||
194 | } | 194 | } |
195 | 195 | ||
196 | static struct irq_chip ip22_eisa2_irq_type = { | 196 | static struct irq_chip ip22_eisa2_irq_type = { |
197 | .typename = "IP22 EISA", | 197 | .name = "IP22 EISA", |
198 | .startup = startup_eisa2_irq, | 198 | .startup = startup_eisa2_irq, |
199 | .ack = mask_and_ack_eisa2_irq, | 199 | .ack = mask_and_ack_eisa2_irq, |
200 | .mask = disable_eisa2_irq, | 200 | .mask = disable_eisa2_irq, |
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index c44f8be0644f..b454924aeb56 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #include <asm/mipsregs.h> | 20 | #include <asm/mipsregs.h> |
21 | #include <asm/addrspace.h> | 21 | #include <asm/addrspace.h> |
22 | #include <asm/irq_cpu.h> | ||
22 | 23 | ||
23 | #include <asm/sgi/ioc.h> | 24 | #include <asm/sgi/ioc.h> |
24 | #include <asm/sgi/hpc3.h> | 25 | #include <asm/sgi/hpc3.h> |
@@ -52,7 +53,7 @@ static void disable_local0_irq(unsigned int irq) | |||
52 | } | 53 | } |
53 | 54 | ||
54 | static struct irq_chip ip22_local0_irq_type = { | 55 | static struct irq_chip ip22_local0_irq_type = { |
55 | .typename = "IP22 local 0", | 56 | .name = "IP22 local 0", |
56 | .ack = disable_local0_irq, | 57 | .ack = disable_local0_irq, |
57 | .mask = disable_local0_irq, | 58 | .mask = disable_local0_irq, |
58 | .mask_ack = disable_local0_irq, | 59 | .mask_ack = disable_local0_irq, |
@@ -73,7 +74,7 @@ void disable_local1_irq(unsigned int irq) | |||
73 | } | 74 | } |
74 | 75 | ||
75 | static struct irq_chip ip22_local1_irq_type = { | 76 | static struct irq_chip ip22_local1_irq_type = { |
76 | .typename = "IP22 local 1", | 77 | .name = "IP22 local 1", |
77 | .ack = disable_local1_irq, | 78 | .ack = disable_local1_irq, |
78 | .mask = disable_local1_irq, | 79 | .mask = disable_local1_irq, |
79 | .mask_ack = disable_local1_irq, | 80 | .mask_ack = disable_local1_irq, |
@@ -94,7 +95,7 @@ void disable_local2_irq(unsigned int irq) | |||
94 | } | 95 | } |
95 | 96 | ||
96 | static struct irq_chip ip22_local2_irq_type = { | 97 | static struct irq_chip ip22_local2_irq_type = { |
97 | .typename = "IP22 local 2", | 98 | .name = "IP22 local 2", |
98 | .ack = disable_local2_irq, | 99 | .ack = disable_local2_irq, |
99 | .mask = disable_local2_irq, | 100 | .mask = disable_local2_irq, |
100 | .mask_ack = disable_local2_irq, | 101 | .mask_ack = disable_local2_irq, |
@@ -115,7 +116,7 @@ void disable_local3_irq(unsigned int irq) | |||
115 | } | 116 | } |
116 | 117 | ||
117 | static struct irq_chip ip22_local3_irq_type = { | 118 | static struct irq_chip ip22_local3_irq_type = { |
118 | .typename = "IP22 local 3", | 119 | .name = "IP22 local 3", |
119 | .ack = disable_local3_irq, | 120 | .ack = disable_local3_irq, |
120 | .mask = disable_local3_irq, | 121 | .mask = disable_local3_irq, |
121 | .mask_ack = disable_local3_irq, | 122 | .mask_ack = disable_local3_irq, |
@@ -253,8 +254,6 @@ asmlinkage void plat_irq_dispatch(void) | |||
253 | indy_8254timer_irq(); | 254 | indy_8254timer_irq(); |
254 | } | 255 | } |
255 | 256 | ||
256 | extern void mips_cpu_irq_init(unsigned int irq_base); | ||
257 | |||
258 | void __init arch_init_irq(void) | 257 | void __init arch_init_irq(void) |
259 | { | 258 | { |
260 | int i; | 259 | int i; |
@@ -316,7 +315,7 @@ void __init arch_init_irq(void) | |||
316 | sgint->cmeimask1 = 0; | 315 | sgint->cmeimask1 = 0; |
317 | 316 | ||
318 | /* init CPU irqs */ | 317 | /* init CPU irqs */ |
319 | mips_cpu_irq_init(SGINT_CPU); | 318 | mips_cpu_irq_init(); |
320 | 319 | ||
321 | for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) { | 320 | for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) { |
322 | struct irq_chip *handler; | 321 | struct irq_chip *handler; |
diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c index b58bd522262b..ddb6506d8341 100644 --- a/arch/mips/sgi-ip22/ip22-mc.c +++ b/arch/mips/sgi-ip22/ip22-mc.c | |||
@@ -202,7 +202,6 @@ void __init sgimc_init(void) | |||
202 | } | 202 | } |
203 | 203 | ||
204 | void __init prom_meminit(void) {} | 204 | void __init prom_meminit(void) {} |
205 | unsigned long __init prom_free_prom_memory(void) | 205 | void __init prom_free_prom_memory(void) |
206 | { | 206 | { |
207 | return 0; | ||
208 | } | 207 | } |
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 319f8803ef6f..60ade7690e09 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c | |||
@@ -333,7 +333,7 @@ static inline void disable_bridge_irq(unsigned int irq) | |||
333 | } | 333 | } |
334 | 334 | ||
335 | static struct irq_chip bridge_irq_type = { | 335 | static struct irq_chip bridge_irq_type = { |
336 | .typename = "bridge", | 336 | .name = "bridge", |
337 | .startup = startup_bridge_irq, | 337 | .startup = startup_bridge_irq, |
338 | .shutdown = shutdown_bridge_irq, | 338 | .shutdown = shutdown_bridge_irq, |
339 | .ack = disable_bridge_irq, | 339 | .ack = disable_bridge_irq, |
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index 16e5682b01f1..0e3d535e9f43 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c | |||
@@ -498,10 +498,9 @@ void __init prom_meminit(void) | |||
498 | } | 498 | } |
499 | } | 499 | } |
500 | 500 | ||
501 | unsigned long __init prom_free_prom_memory(void) | 501 | void __init prom_free_prom_memory(void) |
502 | { | 502 | { |
503 | /* We got nothing to free here ... */ | 503 | /* We got nothing to free here ... */ |
504 | return 0; | ||
505 | } | 504 | } |
506 | 505 | ||
507 | extern void pagetable_init(void); | 506 | extern void pagetable_init(void); |
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index c20e9899b34b..9ce513629b14 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c | |||
@@ -181,7 +181,7 @@ static void disable_rt_irq(unsigned int irq) | |||
181 | } | 181 | } |
182 | 182 | ||
183 | static struct irq_chip rt_irq_type = { | 183 | static struct irq_chip rt_irq_type = { |
184 | .typename = "SN HUB RT timer", | 184 | .name = "SN HUB RT timer", |
185 | .ack = disable_rt_irq, | 185 | .ack = disable_rt_irq, |
186 | .mask = disable_rt_irq, | 186 | .mask = disable_rt_irq, |
187 | .mask_ack = disable_rt_irq, | 187 | .mask_ack = disable_rt_irq, |
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index ae063864c026..8c450d9e8696 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c | |||
@@ -144,7 +144,7 @@ static void end_cpu_irq(unsigned int irq) | |||
144 | } | 144 | } |
145 | 145 | ||
146 | static struct irq_chip ip32_cpu_interrupt = { | 146 | static struct irq_chip ip32_cpu_interrupt = { |
147 | .typename = "IP32 CPU", | 147 | .name = "IP32 CPU", |
148 | .ack = disable_cpu_irq, | 148 | .ack = disable_cpu_irq, |
149 | .mask = disable_cpu_irq, | 149 | .mask = disable_cpu_irq, |
150 | .mask_ack = disable_cpu_irq, | 150 | .mask_ack = disable_cpu_irq, |
@@ -193,7 +193,7 @@ static void end_crime_irq(unsigned int irq) | |||
193 | } | 193 | } |
194 | 194 | ||
195 | static struct irq_chip ip32_crime_interrupt = { | 195 | static struct irq_chip ip32_crime_interrupt = { |
196 | .typename = "IP32 CRIME", | 196 | .name = "IP32 CRIME", |
197 | .ack = mask_and_ack_crime_irq, | 197 | .ack = mask_and_ack_crime_irq, |
198 | .mask = disable_crime_irq, | 198 | .mask = disable_crime_irq, |
199 | .mask_ack = mask_and_ack_crime_irq, | 199 | .mask_ack = mask_and_ack_crime_irq, |
@@ -234,7 +234,7 @@ static void end_macepci_irq(unsigned int irq) | |||
234 | } | 234 | } |
235 | 235 | ||
236 | static struct irq_chip ip32_macepci_interrupt = { | 236 | static struct irq_chip ip32_macepci_interrupt = { |
237 | .typename = "IP32 MACE PCI", | 237 | .name = "IP32 MACE PCI", |
238 | .ack = disable_macepci_irq, | 238 | .ack = disable_macepci_irq, |
239 | .mask = disable_macepci_irq, | 239 | .mask = disable_macepci_irq, |
240 | .mask_ack = disable_macepci_irq, | 240 | .mask_ack = disable_macepci_irq, |
@@ -347,7 +347,7 @@ static void end_maceisa_irq(unsigned irq) | |||
347 | } | 347 | } |
348 | 348 | ||
349 | static struct irq_chip ip32_maceisa_interrupt = { | 349 | static struct irq_chip ip32_maceisa_interrupt = { |
350 | .typename = "IP32 MACE ISA", | 350 | .name = "IP32 MACE ISA", |
351 | .ack = mask_and_ack_maceisa_irq, | 351 | .ack = mask_and_ack_maceisa_irq, |
352 | .mask = disable_maceisa_irq, | 352 | .mask = disable_maceisa_irq, |
353 | .mask_ack = mask_and_ack_maceisa_irq, | 353 | .mask_ack = mask_and_ack_maceisa_irq, |
@@ -379,7 +379,7 @@ static void end_mace_irq(unsigned int irq) | |||
379 | } | 379 | } |
380 | 380 | ||
381 | static struct irq_chip ip32_mace_interrupt = { | 381 | static struct irq_chip ip32_mace_interrupt = { |
382 | .typename = "IP32 MACE", | 382 | .name = "IP32 MACE", |
383 | .ack = disable_mace_irq, | 383 | .ack = disable_mace_irq, |
384 | .mask = disable_mace_irq, | 384 | .mask = disable_mace_irq, |
385 | .mask_ack = disable_mace_irq, | 385 | .mask_ack = disable_mace_irq, |
diff --git a/arch/mips/sgi-ip32/ip32-memory.c b/arch/mips/sgi-ip32/ip32-memory.c index d37d40a3cdae..849d392a0013 100644 --- a/arch/mips/sgi-ip32/ip32-memory.c +++ b/arch/mips/sgi-ip32/ip32-memory.c | |||
@@ -43,7 +43,6 @@ void __init prom_meminit (void) | |||
43 | } | 43 | } |
44 | 44 | ||
45 | 45 | ||
46 | unsigned long __init prom_free_prom_memory (void) | 46 | void __init prom_free_prom_memory(void) |
47 | { | 47 | { |
48 | return 0; | ||
49 | } | 48 | } |
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 2e8f6b2e2420..1dc5d05d8962 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -82,7 +82,7 @@ extern char sb1250_duart_present[]; | |||
82 | #endif | 82 | #endif |
83 | 83 | ||
84 | static struct irq_chip bcm1480_irq_type = { | 84 | static struct irq_chip bcm1480_irq_type = { |
85 | .typename = "BCM1480-IMR", | 85 | .name = "BCM1480-IMR", |
86 | .ack = ack_bcm1480_irq, | 86 | .ack = ack_bcm1480_irq, |
87 | .mask = disable_bcm1480_irq, | 87 | .mask = disable_bcm1480_irq, |
88 | .mask_ack = ack_bcm1480_irq, | 88 | .mask_ack = ack_bcm1480_irq, |
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c index 6e8952da6e2a..9e6099e69622 100644 --- a/arch/mips/sibyte/cfe/setup.c +++ b/arch/mips/sibyte/cfe/setup.c | |||
@@ -343,10 +343,9 @@ void __init prom_init(void) | |||
343 | prom_meminit(); | 343 | prom_meminit(); |
344 | } | 344 | } |
345 | 345 | ||
346 | unsigned long __init prom_free_prom_memory(void) | 346 | void __init prom_free_prom_memory(void) |
347 | { | 347 | { |
348 | /* Not sure what I'm supposed to do here. Nothing, I think */ | 348 | /* Not sure what I'm supposed to do here. Nothing, I think */ |
349 | return 0; | ||
350 | } | 349 | } |
351 | 350 | ||
352 | void prom_putchar(char c) | 351 | void prom_putchar(char c) |
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 82ce7533053f..148239446e6e 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -67,7 +67,7 @@ extern char sb1250_duart_present[]; | |||
67 | #endif | 67 | #endif |
68 | 68 | ||
69 | static struct irq_chip sb1250_irq_type = { | 69 | static struct irq_chip sb1250_irq_type = { |
70 | .typename = "SB1250-IMR", | 70 | .name = "SB1250-IMR", |
71 | .ack = ack_sb1250_irq, | 71 | .ack = ack_sb1250_irq, |
72 | .mask = disable_sb1250_irq, | 72 | .mask = disable_sb1250_irq, |
73 | .mask_ack = ack_sb1250_irq, | 73 | .mask_ack = ack_sb1250_irq, |
diff --git a/arch/mips/sibyte/sb1250/prom.c b/arch/mips/sibyte/sb1250/prom.c index 3c33a4517bc3..257c4e674353 100644 --- a/arch/mips/sibyte/sb1250/prom.c +++ b/arch/mips/sibyte/sb1250/prom.c | |||
@@ -87,10 +87,9 @@ void __init prom_init(void) | |||
87 | prom_meminit(); | 87 | prom_meminit(); |
88 | } | 88 | } |
89 | 89 | ||
90 | unsigned long __init prom_free_prom_memory(void) | 90 | void __init prom_free_prom_memory(void) |
91 | { | 91 | { |
92 | /* Not sure what I'm supposed to do here. Nothing, I think */ | 92 | /* Not sure what I'm supposed to do here. Nothing, I think */ |
93 | return 0; | ||
94 | } | 93 | } |
95 | 94 | ||
96 | void prom_putchar(char c) | 95 | void prom_putchar(char c) |
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 8511bcc6d99d..039e8e540508 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c | |||
@@ -37,7 +37,7 @@ static void end_pciasic_irq(unsigned int irq) | |||
37 | } | 37 | } |
38 | 38 | ||
39 | static struct irq_chip pciasic_irq_type = { | 39 | static struct irq_chip pciasic_irq_type = { |
40 | .typename = "ASIC-PCI", | 40 | .name = "ASIC-PCI", |
41 | .ack = disable_pciasic_irq, | 41 | .ack = disable_pciasic_irq, |
42 | .mask = disable_pciasic_irq, | 42 | .mask = disable_pciasic_irq, |
43 | .mask_ack = disable_pciasic_irq, | 43 | .mask_ack = disable_pciasic_irq, |
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c index d1d0f1f493b4..1213d166f22e 100644 --- a/arch/mips/sni/sniprom.c +++ b/arch/mips/sni/sniprom.c | |||
@@ -67,9 +67,8 @@ void prom_printf(char *fmt, ...) | |||
67 | va_end(args); | 67 | va_end(args); |
68 | } | 68 | } |
69 | 69 | ||
70 | unsigned long prom_free_prom_memory(void) | 70 | void __init prom_free_prom_memory(void) |
71 | { | 71 | { |
72 | return 0; | ||
73 | } | 72 | } |
74 | 73 | ||
75 | /* | 74 | /* |
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index ed4a19adf361..e7f3e5b84dcf 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c | |||
@@ -120,7 +120,7 @@ static void tx4927_irq_pic_disable(unsigned int irq); | |||
120 | 120 | ||
121 | #define TX4927_CP0_NAME "TX4927-CP0" | 121 | #define TX4927_CP0_NAME "TX4927-CP0" |
122 | static struct irq_chip tx4927_irq_cp0_type = { | 122 | static struct irq_chip tx4927_irq_cp0_type = { |
123 | .typename = TX4927_CP0_NAME, | 123 | .name = TX4927_CP0_NAME, |
124 | .ack = tx4927_irq_cp0_disable, | 124 | .ack = tx4927_irq_cp0_disable, |
125 | .mask = tx4927_irq_cp0_disable, | 125 | .mask = tx4927_irq_cp0_disable, |
126 | .mask_ack = tx4927_irq_cp0_disable, | 126 | .mask_ack = tx4927_irq_cp0_disable, |
@@ -129,7 +129,7 @@ static struct irq_chip tx4927_irq_cp0_type = { | |||
129 | 129 | ||
130 | #define TX4927_PIC_NAME "TX4927-PIC" | 130 | #define TX4927_PIC_NAME "TX4927-PIC" |
131 | static struct irq_chip tx4927_irq_pic_type = { | 131 | static struct irq_chip tx4927_irq_pic_type = { |
132 | .typename = TX4927_PIC_NAME, | 132 | .name = TX4927_PIC_NAME, |
133 | .ack = tx4927_irq_pic_disable, | 133 | .ack = tx4927_irq_pic_disable, |
134 | .mask = tx4927_irq_pic_disable, | 134 | .mask = tx4927_irq_pic_disable, |
135 | .mask_ack = tx4927_irq_pic_disable, | 135 | .mask_ack = tx4927_irq_pic_disable, |
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index b54b529a29f9..dcce88f403c9 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | |||
@@ -228,7 +228,7 @@ static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq); | |||
228 | 228 | ||
229 | #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" | 229 | #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" |
230 | static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | 230 | static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { |
231 | .typename = TOSHIBA_RBTX4927_IOC_NAME, | 231 | .name = TOSHIBA_RBTX4927_IOC_NAME, |
232 | .ack = toshiba_rbtx4927_irq_ioc_disable, | 232 | .ack = toshiba_rbtx4927_irq_ioc_disable, |
233 | .mask = toshiba_rbtx4927_irq_ioc_disable, | 233 | .mask = toshiba_rbtx4927_irq_ioc_disable, |
234 | .mask_ack = toshiba_rbtx4927_irq_ioc_disable, | 234 | .mask_ack = toshiba_rbtx4927_irq_ioc_disable, |
@@ -241,7 +241,7 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | |||
241 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 241 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
242 | #define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA" | 242 | #define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA" |
243 | static struct irq_chip toshiba_rbtx4927_irq_isa_type = { | 243 | static struct irq_chip toshiba_rbtx4927_irq_isa_type = { |
244 | .typename = TOSHIBA_RBTX4927_ISA_NAME, | 244 | .name = TOSHIBA_RBTX4927_ISA_NAME, |
245 | .ack = toshiba_rbtx4927_irq_isa_mask_and_ack, | 245 | .ack = toshiba_rbtx4927_irq_isa_mask_and_ack, |
246 | .mask = toshiba_rbtx4927_irq_isa_disable, | 246 | .mask = toshiba_rbtx4927_irq_isa_disable, |
247 | .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack, | 247 | .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack, |
@@ -490,13 +490,13 @@ void toshiba_rbtx4927_irq_dump(char *key) | |||
490 | { | 490 | { |
491 | u32 i, j = 0; | 491 | u32 i, j = 0; |
492 | for (i = 0; i < NR_IRQS; i++) { | 492 | for (i = 0; i < NR_IRQS; i++) { |
493 | if (strcmp(irq_desc[i].chip->typename, "none") | 493 | if (strcmp(irq_desc[i].chip->name, "none") |
494 | == 0) | 494 | == 0) |
495 | continue; | 495 | continue; |
496 | 496 | ||
497 | if ((i >= 1) | 497 | if ((i >= 1) |
498 | && (irq_desc[i - 1].chip->typename == | 498 | && (irq_desc[i - 1].chip->name == |
499 | irq_desc[i].chip->typename)) { | 499 | irq_desc[i].chip->name)) { |
500 | j++; | 500 | j++; |
501 | } else { | 501 | } else { |
502 | j = 0; | 502 | j = 0; |
@@ -510,7 +510,7 @@ void toshiba_rbtx4927_irq_dump(char *key) | |||
510 | (u32) (irq_desc[i].action ? irq_desc[i]. | 510 | (u32) (irq_desc[i].action ? irq_desc[i]. |
511 | action->handler : 0), | 511 | action->handler : 0), |
512 | irq_desc[i].depth, | 512 | irq_desc[i].depth, |
513 | irq_desc[i].chip->typename, j); | 513 | irq_desc[i].chip->name, j); |
514 | } | 514 | } |
515 | } | 515 | } |
516 | #endif | 516 | #endif |
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c index efe50562f0ce..9a3a5babd1fb 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c | |||
@@ -80,9 +80,8 @@ void __init prom_init(void) | |||
80 | add_memory_region(0, msize << 20, BOOT_MEM_RAM); | 80 | add_memory_region(0, msize << 20, BOOT_MEM_RAM); |
81 | } | 81 | } |
82 | 82 | ||
83 | unsigned long __init prom_free_prom_memory(void) | 83 | void __init prom_free_prom_memory(void) |
84 | { | 84 | { |
85 | return 0; | ||
86 | } | 85 | } |
87 | 86 | ||
88 | const char *get_system_type(void) | 87 | const char *get_system_type(void) |
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c index a347b424d91c..3a2dbfc25014 100644 --- a/arch/mips/tx4938/common/irq.c +++ b/arch/mips/tx4938/common/irq.c | |||
@@ -49,7 +49,7 @@ static void tx4938_irq_pic_disable(unsigned int irq); | |||
49 | 49 | ||
50 | #define TX4938_CP0_NAME "TX4938-CP0" | 50 | #define TX4938_CP0_NAME "TX4938-CP0" |
51 | static struct irq_chip tx4938_irq_cp0_type = { | 51 | static struct irq_chip tx4938_irq_cp0_type = { |
52 | .typename = TX4938_CP0_NAME, | 52 | .name = TX4938_CP0_NAME, |
53 | .ack = tx4938_irq_cp0_disable, | 53 | .ack = tx4938_irq_cp0_disable, |
54 | .mask = tx4938_irq_cp0_disable, | 54 | .mask = tx4938_irq_cp0_disable, |
55 | .mask_ack = tx4938_irq_cp0_disable, | 55 | .mask_ack = tx4938_irq_cp0_disable, |
@@ -58,7 +58,7 @@ static struct irq_chip tx4938_irq_cp0_type = { | |||
58 | 58 | ||
59 | #define TX4938_PIC_NAME "TX4938-PIC" | 59 | #define TX4938_PIC_NAME "TX4938-PIC" |
60 | static struct irq_chip tx4938_irq_pic_type = { | 60 | static struct irq_chip tx4938_irq_pic_type = { |
61 | .typename = TX4938_PIC_NAME, | 61 | .name = TX4938_PIC_NAME, |
62 | .ack = tx4938_irq_pic_disable, | 62 | .ack = tx4938_irq_pic_disable, |
63 | .mask = tx4938_irq_pic_disable, | 63 | .mask = tx4938_irq_pic_disable, |
64 | .mask_ack = tx4938_irq_pic_disable, | 64 | .mask_ack = tx4938_irq_pic_disable, |
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c index b6f363d08011..2e96dbb248b1 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c | |||
@@ -92,7 +92,7 @@ static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); | |||
92 | 92 | ||
93 | #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" | 93 | #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" |
94 | static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { | 94 | static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { |
95 | .typename = TOSHIBA_RBTX4938_IOC_NAME, | 95 | .name = TOSHIBA_RBTX4938_IOC_NAME, |
96 | .ack = toshiba_rbtx4938_irq_ioc_disable, | 96 | .ack = toshiba_rbtx4938_irq_ioc_disable, |
97 | .mask = toshiba_rbtx4938_irq_ioc_disable, | 97 | .mask = toshiba_rbtx4938_irq_ioc_disable, |
98 | .mask_ack = toshiba_rbtx4938_irq_ioc_disable, | 98 | .mask_ack = toshiba_rbtx4938_irq_ioc_disable, |
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c index e44daf30a7c1..7dc6a0aae21c 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/prom.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/prom.c | |||
@@ -56,9 +56,8 @@ void __init prom_init(void) | |||
56 | return; | 56 | return; |
57 | } | 57 | } |
58 | 58 | ||
59 | unsigned long __init prom_free_prom_memory(void) | 59 | void __init prom_free_prom_memory(void) |
60 | { | 60 | { |
61 | return 0; | ||
62 | } | 61 | } |
63 | 62 | ||
64 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) | 63 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) |
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index c075261976c5..adabc6bad440 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2001-2002 MontaVista Software Inc. | 4 | * Copyright (C) 2001-2002 MontaVista Software Inc. |
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> | 5 | * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> |
6 | * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 6 | * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -68,6 +68,7 @@ static unsigned char sysint2_assign[16] = { | |||
68 | #define MPIUINTREG 0x0e | 68 | #define MPIUINTREG 0x0e |
69 | #define MAIUINTREG 0x10 | 69 | #define MAIUINTREG 0x10 |
70 | #define MKIUINTREG 0x12 | 70 | #define MKIUINTREG 0x12 |
71 | #define MMACINTREG 0x12 | ||
71 | #define MGIUINTLREG 0x14 | 72 | #define MGIUINTLREG 0x14 |
72 | #define MDSIUINTREG 0x16 | 73 | #define MDSIUINTREG 0x16 |
73 | #define NMIREG 0x18 | 74 | #define NMIREG 0x18 |
@@ -241,6 +242,30 @@ void vr41xx_disable_kiuint(uint16_t mask) | |||
241 | 242 | ||
242 | EXPORT_SYMBOL(vr41xx_disable_kiuint); | 243 | EXPORT_SYMBOL(vr41xx_disable_kiuint); |
243 | 244 | ||
245 | void vr41xx_enable_macint(uint16_t mask) | ||
246 | { | ||
247 | struct irq_desc *desc = irq_desc + ETHERNET_IRQ; | ||
248 | unsigned long flags; | ||
249 | |||
250 | spin_lock_irqsave(&desc->lock, flags); | ||
251 | icu1_set(MMACINTREG, mask); | ||
252 | spin_unlock_irqrestore(&desc->lock, flags); | ||
253 | } | ||
254 | |||
255 | EXPORT_SYMBOL(vr41xx_enable_macint); | ||
256 | |||
257 | void vr41xx_disable_macint(uint16_t mask) | ||
258 | { | ||
259 | struct irq_desc *desc = irq_desc + ETHERNET_IRQ; | ||
260 | unsigned long flags; | ||
261 | |||
262 | spin_lock_irqsave(&desc->lock, flags); | ||
263 | icu1_clear(MMACINTREG, mask); | ||
264 | spin_unlock_irqrestore(&desc->lock, flags); | ||
265 | } | ||
266 | |||
267 | EXPORT_SYMBOL(vr41xx_disable_macint); | ||
268 | |||
244 | void vr41xx_enable_dsiuint(uint16_t mask) | 269 | void vr41xx_enable_dsiuint(uint16_t mask) |
245 | { | 270 | { |
246 | struct irq_desc *desc = irq_desc + DSIU_IRQ; | 271 | struct irq_desc *desc = irq_desc + DSIU_IRQ; |
@@ -428,7 +453,7 @@ static void enable_sysint1_irq(unsigned int irq) | |||
428 | } | 453 | } |
429 | 454 | ||
430 | static struct irq_chip sysint1_irq_type = { | 455 | static struct irq_chip sysint1_irq_type = { |
431 | .typename = "SYSINT1", | 456 | .name = "SYSINT1", |
432 | .ack = disable_sysint1_irq, | 457 | .ack = disable_sysint1_irq, |
433 | .mask = disable_sysint1_irq, | 458 | .mask = disable_sysint1_irq, |
434 | .mask_ack = disable_sysint1_irq, | 459 | .mask_ack = disable_sysint1_irq, |
@@ -446,7 +471,7 @@ static void enable_sysint2_irq(unsigned int irq) | |||
446 | } | 471 | } |
447 | 472 | ||
448 | static struct irq_chip sysint2_irq_type = { | 473 | static struct irq_chip sysint2_irq_type = { |
449 | .typename = "SYSINT2", | 474 | .name = "SYSINT2", |
450 | .ack = disable_sysint2_irq, | 475 | .ack = disable_sysint2_irq, |
451 | .mask = disable_sysint2_irq, | 476 | .mask = disable_sysint2_irq, |
452 | .mask_ack = disable_sysint2_irq, | 477 | .mask_ack = disable_sysint2_irq, |
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index a2e285c1d4d5..4f97e0ba9e24 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c | |||
@@ -81,7 +81,6 @@ void __init prom_init(void) | |||
81 | } | 81 | } |
82 | } | 82 | } |
83 | 83 | ||
84 | unsigned long __init prom_free_prom_memory (void) | 84 | void __init prom_free_prom_memory(void) |
85 | { | 85 | { |
86 | return 0UL; | ||
87 | } | 86 | } |
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 16decf4ac2f4..cba36a247e32 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c | |||
@@ -95,27 +95,27 @@ asmlinkage void plat_irq_dispatch(void) | |||
95 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; | 95 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; |
96 | 96 | ||
97 | if (pending & CAUSEF_IP7) | 97 | if (pending & CAUSEF_IP7) |
98 | do_IRQ(7); | 98 | do_IRQ(TIMER_IRQ); |
99 | else if (pending & 0x7800) { | 99 | else if (pending & 0x7800) { |
100 | if (pending & CAUSEF_IP3) | 100 | if (pending & CAUSEF_IP3) |
101 | irq_dispatch(3); | 101 | irq_dispatch(INT1_IRQ); |
102 | else if (pending & CAUSEF_IP4) | 102 | else if (pending & CAUSEF_IP4) |
103 | irq_dispatch(4); | 103 | irq_dispatch(INT2_IRQ); |
104 | else if (pending & CAUSEF_IP5) | 104 | else if (pending & CAUSEF_IP5) |
105 | irq_dispatch(5); | 105 | irq_dispatch(INT3_IRQ); |
106 | else if (pending & CAUSEF_IP6) | 106 | else if (pending & CAUSEF_IP6) |
107 | irq_dispatch(6); | 107 | irq_dispatch(INT4_IRQ); |
108 | } else if (pending & CAUSEF_IP2) | 108 | } else if (pending & CAUSEF_IP2) |
109 | irq_dispatch(2); | 109 | irq_dispatch(INT0_IRQ); |
110 | else if (pending & CAUSEF_IP0) | 110 | else if (pending & CAUSEF_IP0) |
111 | do_IRQ(0); | 111 | do_IRQ(MIPS_SOFTINT0_IRQ); |
112 | else if (pending & CAUSEF_IP1) | 112 | else if (pending & CAUSEF_IP1) |
113 | do_IRQ(1); | 113 | do_IRQ(MIPS_SOFTINT1_IRQ); |
114 | else | 114 | else |
115 | spurious_interrupt(); | 115 | spurious_interrupt(); |
116 | } | 116 | } |
117 | 117 | ||
118 | void __init arch_init_irq(void) | 118 | void __init arch_init_irq(void) |
119 | { | 119 | { |
120 | mips_cpu_irq_init(MIPS_CPU_IRQ_BASE); | 120 | mips_cpu_irq_init(); |
121 | } | 121 | } |
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c index 128ed8d6f111..7d2d076b0f54 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c | |||
@@ -21,60 +21,16 @@ | |||
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | 22 | ||
23 | #include <asm/io.h> | 23 | #include <asm/io.h> |
24 | #include <asm/i8259.h> | ||
24 | #include <asm/vr41xx/cmbvr4133.h> | 25 | #include <asm/vr41xx/cmbvr4133.h> |
25 | 26 | ||
26 | extern void enable_8259A_irq(unsigned int irq); | ||
27 | extern void disable_8259A_irq(unsigned int irq); | ||
28 | extern void mask_and_ack_8259A(unsigned int irq); | ||
29 | extern void init_8259A(int hoge); | ||
30 | |||
31 | extern int vr4133_rockhopper; | 27 | extern int vr4133_rockhopper; |
32 | 28 | ||
33 | static void enable_i8259_irq(unsigned int irq) | ||
34 | { | ||
35 | enable_8259A_irq(irq - I8259_IRQ_BASE); | ||
36 | } | ||
37 | |||
38 | static void disable_i8259_irq(unsigned int irq) | ||
39 | { | ||
40 | disable_8259A_irq(irq - I8259_IRQ_BASE); | ||
41 | } | ||
42 | |||
43 | static void ack_i8259_irq(unsigned int irq) | ||
44 | { | ||
45 | mask_and_ack_8259A(irq - I8259_IRQ_BASE); | ||
46 | } | ||
47 | |||
48 | static struct irq_chip i8259_irq_type = { | ||
49 | .typename = "XT-PIC", | ||
50 | .ack = ack_i8259_irq, | ||
51 | .mask = disable_i8259_irq, | ||
52 | .mask_ack = ack_i8259_irq, | ||
53 | .unmask = enable_i8259_irq, | ||
54 | }; | ||
55 | |||
56 | static int i8259_get_irq_number(int irq) | 29 | static int i8259_get_irq_number(int irq) |
57 | { | 30 | { |
58 | unsigned long isr; | 31 | return i8259_irq(); |
59 | |||
60 | isr = inb(0x20); | ||
61 | irq = ffz(~isr); | ||
62 | if (irq == 2) { | ||
63 | isr = inb(0xa0); | ||
64 | irq = 8 + ffz(~isr); | ||
65 | } | ||
66 | |||
67 | if (irq < 0 || irq > 15) | ||
68 | return -EINVAL; | ||
69 | |||
70 | return I8259_IRQ_BASE + irq; | ||
71 | } | 32 | } |
72 | 33 | ||
73 | static struct irqaction i8259_slave_cascade = { | ||
74 | .handler = &no_action, | ||
75 | .name = "cascade", | ||
76 | }; | ||
77 | |||
78 | void __init rockhopper_init_irq(void) | 34 | void __init rockhopper_init_irq(void) |
79 | { | 35 | { |
80 | int i; | 36 | int i; |
@@ -84,11 +40,6 @@ void __init rockhopper_init_irq(void) | |||
84 | return; | 40 | return; |
85 | } | 41 | } |
86 | 42 | ||
87 | for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) | ||
88 | set_irq_chip_and_handler(i, &i8259_irq_type, handle_level_irq); | ||
89 | |||
90 | setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); | ||
91 | |||
92 | vr41xx_set_irq_trigger(CMBVR41XX_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH); | 43 | vr41xx_set_irq_trigger(CMBVR41XX_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH); |
93 | vr41xx_set_irq_level(CMBVR41XX_INTC_PIN, LEVEL_HIGH); | 44 | vr41xx_set_irq_level(CMBVR41XX_INTC_PIN, LEVEL_HIGH); |
94 | vr41xx_cascade_irq(CMBVR41XX_INTC_IRQ, i8259_get_irq_number); | 45 | vr41xx_cascade_irq(CMBVR41XX_INTC_IRQ, i8259_get_irq_number); |
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index 8e321f53a382..c7c945baf1ee 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h | |||
@@ -243,6 +243,10 @@ extern struct boot_mem_map boot_mem_map; | |||
243 | extern void add_memory_region(phys_t start, phys_t size, long type); | 243 | extern void add_memory_region(phys_t start, phys_t size, long type); |
244 | 244 | ||
245 | extern void prom_init(void); | 245 | extern void prom_init(void); |
246 | extern void prom_free_prom_memory(void); | ||
247 | |||
248 | extern void free_init_pages(const char *what, | ||
249 | unsigned long begin, unsigned long end); | ||
246 | 250 | ||
247 | /* | 251 | /* |
248 | * Initial kernel command line, usually setup by prom_init() | 252 | * Initial kernel command line, usually setup by prom_init() |
diff --git a/include/asm-mips/ddb5xxx/ddb5477.h b/include/asm-mips/ddb5xxx/ddb5477.h index c5af4b73fdd7..6cf177caf6d5 100644 --- a/include/asm-mips/ddb5xxx/ddb5477.h +++ b/include/asm-mips/ddb5xxx/ddb5477.h | |||
@@ -17,6 +17,7 @@ | |||
17 | #ifndef __ASM_DDB5XXX_DDB5477_H | 17 | #ifndef __ASM_DDB5XXX_DDB5477_H |
18 | #define __ASM_DDB5XXX_DDB5477_H | 18 | #define __ASM_DDB5XXX_DDB5477_H |
19 | 19 | ||
20 | #include <irq.h> | ||
20 | 21 | ||
21 | /* | 22 | /* |
22 | * This contains macros that are specific to DDB5477 or renamed from | 23 | * This contains macros that are specific to DDB5477 or renamed from |
@@ -251,14 +252,10 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq); | |||
251 | */ | 252 | */ |
252 | 253 | ||
253 | #define NUM_CPU_IRQ 8 | 254 | #define NUM_CPU_IRQ 8 |
254 | #define NUM_I8259_IRQ 16 | ||
255 | #define NUM_VRC5477_IRQ 32 | 255 | #define NUM_VRC5477_IRQ 32 |
256 | 256 | ||
257 | #define DDB_IRQ_BASE 0 | 257 | #define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE |
258 | 258 | #define VRC5477_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ) | |
259 | #define I8259_IRQ_BASE DDB_IRQ_BASE | ||
260 | #define VRC5477_IRQ_BASE (I8259_IRQ_BASE + NUM_I8259_IRQ) | ||
261 | #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ) | ||
262 | 259 | ||
263 | /* | 260 | /* |
264 | * vrc5477 irq defs | 261 | * vrc5477 irq defs |
@@ -300,22 +297,22 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq); | |||
300 | /* | 297 | /* |
301 | * i2859 irq assignment | 298 | * i2859 irq assignment |
302 | */ | 299 | */ |
303 | #define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE) | 300 | #define I8259_IRQ_RESERVED_0 (0 + I8259A_IRQ_BASE) |
304 | #define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */ | 301 | #define I8259_IRQ_KEYBOARD (1 + I8259A_IRQ_BASE) /* M1543 default */ |
305 | #define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE) | 302 | #define I8259_IRQ_CASCADE (2 + I8259A_IRQ_BASE) |
306 | #define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */ | 303 | #define I8259_IRQ_UART_B (3 + I8259A_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */ |
307 | #define I8259_IRQ_UART_A (4 + I8259_IRQ_BASE) /* M1543 default */ | 304 | #define I8259_IRQ_UART_A (4 + I8259A_IRQ_BASE) /* M1543 default */ |
308 | #define I8259_IRQ_PARALLEL (5 + I8259_IRQ_BASE) /* M1543 default */ | 305 | #define I8259_IRQ_PARALLEL (5 + I8259A_IRQ_BASE) /* M1543 default */ |
309 | #define I8259_IRQ_RESERVED_6 (6 + I8259_IRQ_BASE) | 306 | #define I8259_IRQ_RESERVED_6 (6 + I8259A_IRQ_BASE) |
310 | #define I8259_IRQ_RESERVED_7 (7 + I8259_IRQ_BASE) | 307 | #define I8259_IRQ_RESERVED_7 (7 + I8259A_IRQ_BASE) |
311 | #define I8259_IRQ_RTC (8 + I8259_IRQ_BASE) /* who set this? */ | 308 | #define I8259_IRQ_RTC (8 + I8259A_IRQ_BASE) /* who set this? */ |
312 | #define I8259_IRQ_USB (9 + I8259_IRQ_BASE) /* ddb_setup */ | 309 | #define I8259_IRQ_USB (9 + I8259A_IRQ_BASE) /* ddb_setup */ |
313 | #define I8259_IRQ_PMU (10 + I8259_IRQ_BASE) /* ddb_setup */ | 310 | #define I8259_IRQ_PMU (10 + I8259A_IRQ_BASE) /* ddb_setup */ |
314 | #define I8259_IRQ_RESERVED_11 (11 + I8259_IRQ_BASE) | 311 | #define I8259_IRQ_RESERVED_11 (11 + I8259A_IRQ_BASE) |
315 | #define I8259_IRQ_RESERVED_12 (12 + I8259_IRQ_BASE) /* m1543_irq_setup */ | 312 | #define I8259_IRQ_RESERVED_12 (12 + I8259A_IRQ_BASE) /* m1543_irq_setup */ |
316 | #define I8259_IRQ_RESERVED_13 (13 + I8259_IRQ_BASE) | 313 | #define I8259_IRQ_RESERVED_13 (13 + I8259A_IRQ_BASE) |
317 | #define I8259_IRQ_HDC1 (14 + I8259_IRQ_BASE) /* default and ddb_setup */ | 314 | #define I8259_IRQ_HDC1 (14 + I8259A_IRQ_BASE) /* default and ddb_setup */ |
318 | #define I8259_IRQ_HDC2 (15 + I8259_IRQ_BASE) /* default */ | 315 | #define I8259_IRQ_HDC2 (15 + I8259A_IRQ_BASE) /* default */ |
319 | 316 | ||
320 | 317 | ||
321 | /* | 318 | /* |
diff --git a/include/asm-mips/dec/interrupts.h b/include/asm-mips/dec/interrupts.h index 273e4d65bfe6..e10d341067c8 100644 --- a/include/asm-mips/dec/interrupts.h +++ b/include/asm-mips/dec/interrupts.h | |||
@@ -14,6 +14,7 @@ | |||
14 | #ifndef __ASM_DEC_INTERRUPTS_H | 14 | #ifndef __ASM_DEC_INTERRUPTS_H |
15 | #define __ASM_DEC_INTERRUPTS_H | 15 | #define __ASM_DEC_INTERRUPTS_H |
16 | 16 | ||
17 | #include <irq.h> | ||
17 | #include <asm/mipsregs.h> | 18 | #include <asm/mipsregs.h> |
18 | 19 | ||
19 | 20 | ||
@@ -87,7 +88,7 @@ | |||
87 | #define DEC_CPU_INR_SW1 1 /* software #1 */ | 88 | #define DEC_CPU_INR_SW1 1 /* software #1 */ |
88 | #define DEC_CPU_INR_SW0 0 /* software #0 */ | 89 | #define DEC_CPU_INR_SW0 0 /* software #0 */ |
89 | 90 | ||
90 | #define DEC_CPU_IRQ_BASE 0 /* first IRQ assigned to CPU */ | 91 | #define DEC_CPU_IRQ_BASE MIPS_CPU_IRQ_BASE /* first IRQ assigned to CPU */ |
91 | 92 | ||
92 | #define DEC_CPU_IRQ_NR(n) ((n) + DEC_CPU_IRQ_BASE) | 93 | #define DEC_CPU_IRQ_NR(n) ((n) + DEC_CPU_IRQ_BASE) |
93 | #define DEC_CPU_IRQ_MASK(n) (1 << ((n) + CAUSEB_IP)) | 94 | #define DEC_CPU_IRQ_MASK(n) (1 << ((n) + CAUSEB_IP)) |
diff --git a/include/asm-mips/dma.h b/include/asm-mips/dma.h index 23f789c80845..e06ef0776d48 100644 --- a/include/asm-mips/dma.h +++ b/include/asm-mips/dma.h | |||
@@ -91,6 +91,7 @@ | |||
91 | #else | 91 | #else |
92 | #define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000) | 92 | #define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000) |
93 | #endif | 93 | #endif |
94 | #define MAX_DMA_PFN PFN_DOWN(virt_to_phys((void *)MAX_DMA_ADDRESS)) | ||
94 | 95 | ||
95 | /* 8237 DMA controllers */ | 96 | /* 8237 DMA controllers */ |
96 | #define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ | 97 | #define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ |
diff --git a/include/asm-mips/emma2rh/emma2rh.h b/include/asm-mips/emma2rh/emma2rh.h index 4fb8df71caa9..6a1af0af51e3 100644 --- a/include/asm-mips/emma2rh/emma2rh.h +++ b/include/asm-mips/emma2rh/emma2rh.h | |||
@@ -24,6 +24,8 @@ | |||
24 | #ifndef __ASM_EMMA2RH_EMMA2RH_H | 24 | #ifndef __ASM_EMMA2RH_EMMA2RH_H |
25 | #define __ASM_EMMA2RH_EMMA2RH_H | 25 | #define __ASM_EMMA2RH_EMMA2RH_H |
26 | 26 | ||
27 | #include <irq.h> | ||
28 | |||
27 | /* | 29 | /* |
28 | * EMMA2RH registers | 30 | * EMMA2RH registers |
29 | */ | 31 | */ |
@@ -104,7 +106,8 @@ | |||
104 | #define NUM_EMMA2RH_IRQ 96 | 106 | #define NUM_EMMA2RH_IRQ 96 |
105 | 107 | ||
106 | #define CPU_EMMA2RH_CASCADE 2 | 108 | #define CPU_EMMA2RH_CASCADE 2 |
107 | #define EMMA2RH_IRQ_BASE 0 | 109 | #define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE |
110 | #define EMMA2RH_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ) | ||
108 | 111 | ||
109 | /* | 112 | /* |
110 | * emma2rh irq defs | 113 | * emma2rh irq defs |
diff --git a/include/asm-mips/emma2rh/markeins.h b/include/asm-mips/emma2rh/markeins.h index 8fa766795078..973b0628490d 100644 --- a/include/asm-mips/emma2rh/markeins.h +++ b/include/asm-mips/emma2rh/markeins.h | |||
@@ -33,7 +33,6 @@ | |||
33 | 33 | ||
34 | #define EMMA2RH_SW_IRQ_BASE (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ) | 34 | #define EMMA2RH_SW_IRQ_BASE (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ) |
35 | #define EMMA2RH_GPIO_IRQ_BASE (EMMA2RH_SW_IRQ_BASE + NUM_EMMA2RH_IRQ_SW) | 35 | #define EMMA2RH_GPIO_IRQ_BASE (EMMA2RH_SW_IRQ_BASE + NUM_EMMA2RH_IRQ_SW) |
36 | #define CPU_IRQ_BASE (EMMA2RH_GPIO_IRQ_BASE + NUM_EMMA2RH_IRQ_GPIO) | ||
37 | 36 | ||
38 | #define EMMA2RH_SW_IRQ_INT0 (0+EMMA2RH_SW_IRQ_BASE) | 37 | #define EMMA2RH_SW_IRQ_INT0 (0+EMMA2RH_SW_IRQ_BASE) |
39 | #define EMMA2RH_SW_IRQ_INT1 (1+EMMA2RH_SW_IRQ_BASE) | 38 | #define EMMA2RH_SW_IRQ_INT1 (1+EMMA2RH_SW_IRQ_BASE) |
diff --git a/include/asm-mips/i8259.h b/include/asm-mips/i8259.h index 4df8d8b118c0..e88a01607fea 100644 --- a/include/asm-mips/i8259.h +++ b/include/asm-mips/i8259.h | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/spinlock.h> | 18 | #include <linux/spinlock.h> |
19 | 19 | ||
20 | #include <asm/io.h> | 20 | #include <asm/io.h> |
21 | #include <irq.h> | ||
21 | 22 | ||
22 | /* i8259A PIC registers */ | 23 | /* i8259A PIC registers */ |
23 | #define PIC_MASTER_CMD 0x20 | 24 | #define PIC_MASTER_CMD 0x20 |
@@ -42,8 +43,6 @@ extern void disable_8259A_irq(unsigned int irq); | |||
42 | 43 | ||
43 | extern void init_i8259_irqs(void); | 44 | extern void init_i8259_irqs(void); |
44 | 45 | ||
45 | #define I8259A_IRQ_BASE 0 | ||
46 | |||
47 | /* | 46 | /* |
48 | * Do the traditional i8259 interrupt polling thing. This is for the few | 47 | * Do the traditional i8259 interrupt polling thing. This is for the few |
49 | * cases where no better interrupt acknowledge method is available and we | 48 | * cases where no better interrupt acknowledge method is available and we |
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index d77b657c09c7..67f081078904 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h | |||
@@ -115,7 +115,7 @@ static inline void set_io_port_base(unsigned long base) | |||
115 | */ | 115 | */ |
116 | static inline unsigned long virt_to_phys(volatile const void *address) | 116 | static inline unsigned long virt_to_phys(volatile const void *address) |
117 | { | 117 | { |
118 | return (unsigned long)address - PAGE_OFFSET; | 118 | return (unsigned long)address - PAGE_OFFSET + PHYS_OFFSET; |
119 | } | 119 | } |
120 | 120 | ||
121 | /* | 121 | /* |
@@ -132,7 +132,7 @@ static inline unsigned long virt_to_phys(volatile const void *address) | |||
132 | */ | 132 | */ |
133 | static inline void * phys_to_virt(unsigned long address) | 133 | static inline void * phys_to_virt(unsigned long address) |
134 | { | 134 | { |
135 | return (void *)(address + PAGE_OFFSET); | 135 | return (void *)(address + PAGE_OFFSET - PHYS_OFFSET); |
136 | } | 136 | } |
137 | 137 | ||
138 | /* | 138 | /* |
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index 386da82e5774..91803ba30ff2 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h | |||
@@ -18,7 +18,7 @@ | |||
18 | #ifdef CONFIG_I8259 | 18 | #ifdef CONFIG_I8259 |
19 | static inline int irq_canonicalize(int irq) | 19 | static inline int irq_canonicalize(int irq) |
20 | { | 20 | { |
21 | return ((irq == 2) ? 9 : irq); | 21 | return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq); |
22 | } | 22 | } |
23 | #else | 23 | #else |
24 | #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ | 24 | #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ |
diff --git a/include/asm-mips/irq_cpu.h b/include/asm-mips/irq_cpu.h index ed3d1e3d09ec..ef6a07cddb23 100644 --- a/include/asm-mips/irq_cpu.h +++ b/include/asm-mips/irq_cpu.h | |||
@@ -13,8 +13,8 @@ | |||
13 | #ifndef _ASM_IRQ_CPU_H | 13 | #ifndef _ASM_IRQ_CPU_H |
14 | #define _ASM_IRQ_CPU_H | 14 | #define _ASM_IRQ_CPU_H |
15 | 15 | ||
16 | extern void mips_cpu_irq_init(int irq_base); | 16 | extern void mips_cpu_irq_init(void); |
17 | extern void rm7k_cpu_irq_init(int irq_base); | 17 | extern void rm7k_cpu_irq_init(void); |
18 | extern void rm9k_cpu_irq_init(int irq_base); | 18 | extern void rm9k_cpu_irq_init(void); |
19 | 19 | ||
20 | #endif /* _ASM_IRQ_CPU_H */ | 20 | #endif /* _ASM_IRQ_CPU_H */ |
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index 582acd8adb81..58fca8a5a9a6 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h | |||
@@ -39,6 +39,7 @@ | |||
39 | #ifndef _LANGUAGE_ASSEMBLY | 39 | #ifndef _LANGUAGE_ASSEMBLY |
40 | 40 | ||
41 | #include <linux/delay.h> | 41 | #include <linux/delay.h> |
42 | #include <linux/types.h> | ||
42 | #include <asm/io.h> | 43 | #include <asm/io.h> |
43 | 44 | ||
44 | /* cpu pipeline flush */ | 45 | /* cpu pipeline flush */ |
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h index 00b0fc68d5cb..24a8d51a55a3 100644 --- a/include/asm-mips/mach-cobalt/cobalt.h +++ b/include/asm-mips/mach-cobalt/cobalt.h | |||
@@ -12,6 +12,8 @@ | |||
12 | #ifndef __ASM_COBALT_H | 12 | #ifndef __ASM_COBALT_H |
13 | #define __ASM_COBALT_H | 13 | #define __ASM_COBALT_H |
14 | 14 | ||
15 | #include <irq.h> | ||
16 | |||
15 | /* | 17 | /* |
16 | * i8259 legacy interrupts used on Cobalt: | 18 | * i8259 legacy interrupts used on Cobalt: |
17 | * | 19 | * |
@@ -25,7 +27,7 @@ | |||
25 | /* | 27 | /* |
26 | * CPU IRQs are 16 ... 23 | 28 | * CPU IRQs are 16 ... 23 |
27 | */ | 29 | */ |
28 | #define COBALT_CPU_IRQ 16 | 30 | #define COBALT_CPU_IRQ MIPS_CPU_IRQ_BASE |
29 | 31 | ||
30 | #define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2) | 32 | #define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2) |
31 | #define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */ | 33 | #define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */ |
diff --git a/include/asm-mips/mach-emma2rh/irq.h b/include/asm-mips/mach-emma2rh/irq.h index bce64244b800..5439eb856461 100644 --- a/include/asm-mips/mach-emma2rh/irq.h +++ b/include/asm-mips/mach-emma2rh/irq.h | |||
@@ -10,4 +10,6 @@ | |||
10 | 10 | ||
11 | #define NR_IRQS 256 | 11 | #define NR_IRQS 256 |
12 | 12 | ||
13 | #include_next <irq.h> | ||
14 | |||
13 | #endif /* __ASM_MACH_EMMA2RH_IRQ_H */ | 15 | #endif /* __ASM_MACH_EMMA2RH_IRQ_H */ |
diff --git a/include/asm-mips/mach-generic/irq.h b/include/asm-mips/mach-generic/irq.h index 500e10ff24de..70d9a25132c5 100644 --- a/include/asm-mips/mach-generic/irq.h +++ b/include/asm-mips/mach-generic/irq.h | |||
@@ -8,6 +8,38 @@ | |||
8 | #ifndef __ASM_MACH_GENERIC_IRQ_H | 8 | #ifndef __ASM_MACH_GENERIC_IRQ_H |
9 | #define __ASM_MACH_GENERIC_IRQ_H | 9 | #define __ASM_MACH_GENERIC_IRQ_H |
10 | 10 | ||
11 | #ifndef NR_IRQS | ||
11 | #define NR_IRQS 128 | 12 | #define NR_IRQS 128 |
13 | #endif | ||
14 | |||
15 | #ifdef CONFIG_I8259 | ||
16 | #ifndef I8259A_IRQ_BASE | ||
17 | #define I8259A_IRQ_BASE 0 | ||
18 | #endif | ||
19 | #endif | ||
20 | |||
21 | #ifdef CONFIG_IRQ_CPU | ||
22 | |||
23 | #ifndef MIPS_CPU_IRQ_BASE | ||
24 | #ifdef CONFIG_I8259 | ||
25 | #define MIPS_CPU_IRQ_BASE 16 | ||
26 | #else | ||
27 | #define MIPS_CPU_IRQ_BASE 0 | ||
28 | #endif /* CONFIG_I8259 */ | ||
29 | #endif | ||
30 | |||
31 | #ifdef CONFIG_IRQ_CPU_RM7K | ||
32 | #ifndef RM7K_CPU_IRQ_BASE | ||
33 | #define RM7K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+8) | ||
34 | #endif | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_IRQ_CPU_RM9K | ||
38 | #ifndef RM9K_CPU_IRQ_BASE | ||
39 | #define RM9K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+12) | ||
40 | #endif | ||
41 | #endif | ||
42 | |||
43 | #endif /* CONFIG_IRQ_CPU */ | ||
12 | 44 | ||
13 | #endif /* __ASM_MACH_GENERIC_IRQ_H */ | 45 | #endif /* __ASM_MACH_GENERIC_IRQ_H */ |
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h index e994b0c01227..9b9da26683c2 100644 --- a/include/asm-mips/mach-mips/irq.h +++ b/include/asm-mips/mach-mips/irq.h | |||
@@ -4,4 +4,6 @@ | |||
4 | 4 | ||
5 | #define NR_IRQS 256 | 5 | #define NR_IRQS 256 |
6 | 6 | ||
7 | #include_next <irq.h> | ||
8 | |||
7 | #endif /* __ASM_MACH_MIPS_IRQ_H */ | 9 | #endif /* __ASM_MACH_MIPS_IRQ_H */ |
diff --git a/include/asm-mips/mach-vr41xx/irq.h b/include/asm-mips/mach-vr41xx/irq.h new file mode 100644 index 000000000000..848812296052 --- /dev/null +++ b/include/asm-mips/mach-vr41xx/irq.h | |||
@@ -0,0 +1,11 @@ | |||
1 | #ifndef __ASM_MACH_VR41XX_IRQ_H | ||
2 | #define __ASM_MACH_VR41XX_IRQ_H | ||
3 | |||
4 | #include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */ | ||
5 | #ifdef CONFIG_NEC_CMBVR4133 | ||
6 | #include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */ | ||
7 | #endif | ||
8 | |||
9 | #include_next <irq.h> | ||
10 | |||
11 | #endif /* __ASM_MACH_VR41XX_IRQ_H */ | ||
diff --git a/include/asm-mips/mips-boards/atlasint.h b/include/asm-mips/mips-boards/atlasint.h index b15e4ea0b091..76add42e486e 100644 --- a/include/asm-mips/mips-boards/atlasint.h +++ b/include/asm-mips/mips-boards/atlasint.h | |||
@@ -26,10 +26,12 @@ | |||
26 | #ifndef _MIPS_ATLASINT_H | 26 | #ifndef _MIPS_ATLASINT_H |
27 | #define _MIPS_ATLASINT_H | 27 | #define _MIPS_ATLASINT_H |
28 | 28 | ||
29 | #include <irq.h> | ||
30 | |||
29 | /* | 31 | /* |
30 | * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode) | 32 | * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode) |
31 | */ | 33 | */ |
32 | #define MIPSCPU_INT_BASE 0 | 34 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
33 | 35 | ||
34 | /* CPU interrupt offsets */ | 36 | /* CPU interrupt offsets */ |
35 | #define MIPSCPU_INT_SW0 0 | 37 | #define MIPSCPU_INT_SW0 0 |
diff --git a/include/asm-mips/mips-boards/maltaint.h b/include/asm-mips/mips-boards/maltaint.h index da6cc2fbbc78..9180d6466113 100644 --- a/include/asm-mips/mips-boards/maltaint.h +++ b/include/asm-mips/mips-boards/maltaint.h | |||
@@ -25,6 +25,8 @@ | |||
25 | #ifndef _MIPS_MALTAINT_H | 25 | #ifndef _MIPS_MALTAINT_H |
26 | #define _MIPS_MALTAINT_H | 26 | #define _MIPS_MALTAINT_H |
27 | 27 | ||
28 | #include <irq.h> | ||
29 | |||
28 | /* | 30 | /* |
29 | * Interrupts 0..15 are used for Malta ISA compatible interrupts | 31 | * Interrupts 0..15 are used for Malta ISA compatible interrupts |
30 | */ | 32 | */ |
@@ -33,7 +35,7 @@ | |||
33 | /* | 35 | /* |
34 | * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode) | 36 | * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode) |
35 | */ | 37 | */ |
36 | #define MIPSCPU_INT_BASE 16 | 38 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
37 | 39 | ||
38 | /* CPU interrupt offsets */ | 40 | /* CPU interrupt offsets */ |
39 | #define MIPSCPU_INT_SW0 0 | 41 | #define MIPSCPU_INT_SW0 0 |
diff --git a/include/asm-mips/mips-boards/prom.h b/include/asm-mips/mips-boards/prom.h index 4168c7fcd43e..7bf6f5f6ab9c 100644 --- a/include/asm-mips/mips-boards/prom.h +++ b/include/asm-mips/mips-boards/prom.h | |||
@@ -33,7 +33,6 @@ extern void prom_printf(char *fmt, ...); | |||
33 | extern void prom_init_cmdline(void); | 33 | extern void prom_init_cmdline(void); |
34 | extern void prom_meminit(void); | 34 | extern void prom_meminit(void); |
35 | extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem); | 35 | extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem); |
36 | extern unsigned long prom_free_prom_memory (void); | ||
37 | extern void mips_display_message(const char *str); | 36 | extern void mips_display_message(const char *str); |
38 | extern void mips_display_word(unsigned int num); | 37 | extern void mips_display_word(unsigned int num); |
39 | extern int get_ethernet_addr(char *ethernet_addr); | 38 | extern int get_ethernet_addr(char *ethernet_addr); |
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h index 365c2a3c64f5..4f6a3933699d 100644 --- a/include/asm-mips/mips-boards/seadint.h +++ b/include/asm-mips/mips-boards/seadint.h | |||
@@ -20,10 +20,12 @@ | |||
20 | #ifndef _MIPS_SEADINT_H | 20 | #ifndef _MIPS_SEADINT_H |
21 | #define _MIPS_SEADINT_H | 21 | #define _MIPS_SEADINT_H |
22 | 22 | ||
23 | #include <irq.h> | ||
24 | |||
23 | /* | 25 | /* |
24 | * Interrupts 0..7 are used for SEAD CPU interrupts | 26 | * Interrupts 0..7 are used for SEAD CPU interrupts |
25 | */ | 27 | */ |
26 | #define MIPSCPU_INT_BASE 0 | 28 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
27 | 29 | ||
28 | #define MIPSCPU_INT_UART0 2 | 30 | #define MIPSCPU_INT_UART0 2 |
29 | #define MIPSCPU_INT_UART1 3 | 31 | #define MIPSCPU_INT_UART1 3 |
diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h index 4952e0b3bf11..54f2fe621d69 100644 --- a/include/asm-mips/mips-boards/simint.h +++ b/include/asm-mips/mips-boards/simint.h | |||
@@ -17,10 +17,11 @@ | |||
17 | #ifndef _MIPS_SIMINT_H | 17 | #ifndef _MIPS_SIMINT_H |
18 | #define _MIPS_SIMINT_H | 18 | #define _MIPS_SIMINT_H |
19 | 19 | ||
20 | #include <irq.h> | ||
20 | 21 | ||
21 | #define SIM_INT_BASE 0 | 22 | #define SIM_INT_BASE 0 |
22 | #define MIPSCPU_INT_MB0 2 | 23 | #define MIPSCPU_INT_MB0 2 |
23 | #define MIPSCPU_INT_BASE 16 | 24 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
24 | #define MIPS_CPU_TIMER_IRQ 7 | 25 | #define MIPS_CPU_TIMER_IRQ 7 |
25 | 26 | ||
26 | 27 | ||
diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h index 3e9468f424f4..294bca12cd3f 100644 --- a/include/asm-mips/mipsmtregs.h +++ b/include/asm-mips/mipsmtregs.h | |||
@@ -165,8 +165,6 @@ | |||
165 | 165 | ||
166 | #ifndef __ASSEMBLY__ | 166 | #ifndef __ASSEMBLY__ |
167 | 167 | ||
168 | extern void mips_mt_regdump(unsigned long previous_mvpcontrol_value); | ||
169 | |||
170 | static inline unsigned int dvpe(void) | 168 | static inline unsigned int dvpe(void) |
171 | { | 169 | { |
172 | int res = 0; | 170 | int res = 0; |
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 2f9e1a9ec51f..d3fbd83ff545 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h | |||
@@ -34,6 +34,20 @@ | |||
34 | 34 | ||
35 | #ifndef __ASSEMBLY__ | 35 | #ifndef __ASSEMBLY__ |
36 | 36 | ||
37 | /* | ||
38 | * This gives the physical RAM offset. | ||
39 | */ | ||
40 | #ifndef PHYS_OFFSET | ||
41 | #define PHYS_OFFSET 0UL | ||
42 | #endif | ||
43 | |||
44 | /* | ||
45 | * It's normally defined only for FLATMEM config but it's | ||
46 | * used in our early mem init code for all memory models. | ||
47 | * So always define it. | ||
48 | */ | ||
49 | #define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET) | ||
50 | |||
37 | #include <linux/pfn.h> | 51 | #include <linux/pfn.h> |
38 | #include <asm/io.h> | 52 | #include <asm/io.h> |
39 | 53 | ||
@@ -132,20 +146,23 @@ typedef struct { unsigned long pgprot; } pgprot_t; | |||
132 | /* to align the pointer to the (next) page boundary */ | 146 | /* to align the pointer to the (next) page boundary */ |
133 | #define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) | 147 | #define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) |
134 | 148 | ||
149 | /* | ||
150 | * __pa()/__va() should be used only during mem init. | ||
151 | */ | ||
135 | #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) | 152 | #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) |
136 | #define __pa_page_offset(x) ((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0) | 153 | #define __pa_page_offset(x) ((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0) |
137 | #else | 154 | #else |
138 | #define __pa_page_offset(x) PAGE_OFFSET | 155 | #define __pa_page_offset(x) PAGE_OFFSET |
139 | #endif | 156 | #endif |
140 | #define __pa(x) ((unsigned long)(x) - __pa_page_offset(x)) | 157 | #define __pa(x) ((unsigned long)(x) - __pa_page_offset(x) + PHYS_OFFSET) |
141 | #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) | 158 | #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) |
142 | #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET)) | 159 | #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) |
143 | 160 | ||
144 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) | 161 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) |
145 | 162 | ||
146 | #ifdef CONFIG_FLATMEM | 163 | #ifdef CONFIG_FLATMEM |
147 | 164 | ||
148 | #define pfn_valid(pfn) ((pfn) < max_mapnr) | 165 | #define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr) |
149 | 166 | ||
150 | #elif defined(CONFIG_SPARSEMEM) | 167 | #elif defined(CONFIG_SPARSEMEM) |
151 | 168 | ||
diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h index 76cd51c6be39..59162f74a798 100644 --- a/include/asm-mips/rtlx.h +++ b/include/asm-mips/rtlx.h | |||
@@ -6,9 +6,10 @@ | |||
6 | #ifndef __ASM_RTLX_H | 6 | #ifndef __ASM_RTLX_H |
7 | #define __ASM_RTLX_H_ | 7 | #define __ASM_RTLX_H_ |
8 | 8 | ||
9 | #include <irq.h> | ||
10 | |||
9 | #define LX_NODE_BASE 10 | 11 | #define LX_NODE_BASE 10 |
10 | 12 | ||
11 | #define MIPSCPU_INT_BASE 16 | ||
12 | #define MIPS_CPU_RTLX_IRQ 0 | 13 | #define MIPS_CPU_RTLX_IRQ 0 |
13 | 14 | ||
14 | #define RTLX_VERSION 2 | 15 | #define RTLX_VERSION 2 |
diff --git a/include/asm-mips/sections.h b/include/asm-mips/sections.h index f7016278b266..b7e37262c246 100644 --- a/include/asm-mips/sections.h +++ b/include/asm-mips/sections.h | |||
@@ -3,6 +3,4 @@ | |||
3 | 3 | ||
4 | #include <asm-generic/sections.h> | 4 | #include <asm-generic/sections.h> |
5 | 5 | ||
6 | extern char _fdata; | ||
7 | |||
8 | #endif /* _ASM_SECTIONS_H */ | 6 | #endif /* _ASM_SECTIONS_H */ |
diff --git a/include/asm-mips/sgi/ip22.h b/include/asm-mips/sgi/ip22.h index bbfc05c3cab9..6592f3bd1999 100644 --- a/include/asm-mips/sgi/ip22.h +++ b/include/asm-mips/sgi/ip22.h | |||
@@ -21,15 +21,16 @@ | |||
21 | * HAL2 driver). This will prevent many complications, trust me ;-) | 21 | * HAL2 driver). This will prevent many complications, trust me ;-) |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include <irq.h> | ||
24 | #include <asm/sgi/ioc.h> | 25 | #include <asm/sgi/ioc.h> |
25 | 26 | ||
26 | #define SGINT_EISA 0 /* 16 EISA irq levels (Indigo2) */ | 27 | #define SGINT_EISA 0 /* 16 EISA irq levels (Indigo2) */ |
27 | #define SGINT_CPU 16 /* MIPS CPU define 8 interrupt sources */ | 28 | #define SGINT_CPU MIPS_CPU_IRQ_BASE /* MIPS CPU define 8 interrupt sources */ |
28 | #define SGINT_LOCAL0 24 /* 8 local0 irq levels */ | 29 | #define SGINT_LOCAL0 (SGINT_CPU+8) /* 8 local0 irq levels */ |
29 | #define SGINT_LOCAL1 32 /* 8 local1 irq levels */ | 30 | #define SGINT_LOCAL1 (SGINT_CPU+16) /* 8 local1 irq levels */ |
30 | #define SGINT_LOCAL2 40 /* 8 local2 vectored irq levels */ | 31 | #define SGINT_LOCAL2 (SGINT_CPU+24) /* 8 local2 vectored irq levels */ |
31 | #define SGINT_LOCAL3 48 /* 8 local3 vectored irq levels */ | 32 | #define SGINT_LOCAL3 (SGINT_CPU+32) /* 8 local3 vectored irq levels */ |
32 | #define SGINT_END 56 /* End of 'spaces' */ | 33 | #define SGINT_END (SGINT_CPU+40) /* End of 'spaces' */ |
33 | 34 | ||
34 | /* | 35 | /* |
35 | * Individual interrupt definitions for the Indy and Indigo2 | 36 | * Individual interrupt definitions for the Indy and Indigo2 |
diff --git a/include/asm-mips/smtc_ipi.h b/include/asm-mips/smtc_ipi.h index f22c3e2f993a..55f3419f6546 100644 --- a/include/asm-mips/smtc_ipi.h +++ b/include/asm-mips/smtc_ipi.h | |||
@@ -44,9 +44,6 @@ struct smtc_ipi_q { | |||
44 | int depth; | 44 | int depth; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | extern struct smtc_ipi_q IPIQ[NR_CPUS]; | ||
48 | extern struct smtc_ipi_q freeIPIq; | ||
49 | |||
50 | static inline void smtc_ipi_nq(struct smtc_ipi_q *q, struct smtc_ipi *p) | 47 | static inline void smtc_ipi_nq(struct smtc_ipi_q *q, struct smtc_ipi *p) |
51 | { | 48 | { |
52 | long flags; | 49 | long flags; |
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h index 1cdd4eeb2f73..c12ebc53ef31 100644 --- a/include/asm-mips/uaccess.h +++ b/include/asm-mips/uaccess.h | |||
@@ -488,7 +488,8 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); | |||
488 | }) | 488 | }) |
489 | 489 | ||
490 | /* | 490 | /* |
491 | * __copy_from_user: - Copy a block of data from user space, with less checking. * @to: Destination address, in kernel space. | 491 | * __copy_from_user: - Copy a block of data from user space, with less checking. |
492 | * @to: Destination address, in kernel space. | ||
492 | * @from: Source address, in user space. | 493 | * @from: Source address, in user space. |
493 | * @n: Number of bytes to copy. | 494 | * @n: Number of bytes to copy. |
494 | * | 495 | * |
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h index 9490ade58b46..42300037d593 100644 --- a/include/asm-mips/vr41xx/cmbvr4133.h +++ b/include/asm-mips/vr41xx/cmbvr4133.h | |||
@@ -35,8 +35,8 @@ | |||
35 | #define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN) | 35 | #define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN) |
36 | #define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN) | 36 | #define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN) |
37 | 37 | ||
38 | #define I8259_IRQ_BASE 72 | 38 | #define I8259A_IRQ_BASE 72 |
39 | #define I8259_IRQ(x) (I8259_IRQ_BASE + (x)) | 39 | #define I8259_IRQ(x) (I8259A_IRQ_BASE + (x)) |
40 | #define TIMER_IRQ I8259_IRQ(0) | 40 | #define TIMER_IRQ I8259_IRQ(0) |
41 | #define KEYBOARD_IRQ I8259_IRQ(1) | 41 | #define KEYBOARD_IRQ I8259_IRQ(1) |
42 | #define I8259_SLAVE_IRQ I8259_IRQ(2) | 42 | #define I8259_SLAVE_IRQ I8259_IRQ(2) |
@@ -52,6 +52,5 @@ | |||
52 | #define AUX_IRQ I8259_IRQ(12) | 52 | #define AUX_IRQ I8259_IRQ(12) |
53 | #define IDE_PRIMARY_IRQ I8259_IRQ(14) | 53 | #define IDE_PRIMARY_IRQ I8259_IRQ(14) |
54 | #define IDE_SECONDARY_IRQ I8259_IRQ(15) | 54 | #define IDE_SECONDARY_IRQ I8259_IRQ(15) |
55 | #define I8259_IRQ_LAST IDE_SECONDARY_IRQ | ||
56 | 55 | ||
57 | #endif /* __NEC_CMBVR4133_H */ | 56 | #endif /* __NEC_CMBVR4133_H */ |