[PATCH] Optimize qe_brg struct to use an array

The qe_brg structure manually defined each of the 16 BRG registers, which
made any code that used them cumbersome.  This patch replaces the fields
with a single 16-element array.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

2 files changed, 2 insertions, 18 deletions

diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 2bae632d3ad7..812c87c73bb6 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -175,8 +175,7 @@ void qe_setbrg(u32 brg, u32 rate)
         u32 divisor, tempval;
         int div16 = 0;
 
-        bp = &qe_immr->brg.brgc1;
-        bp += brg;
+        bp = &qe_immr->brg.brgc[brg];
 
         divisor = (get_brg_clk() / rate);
         if (divisor > QE_BRGC_DIVISOR_MAX + 1) {
diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h
index ce12f85fff9b..9fdd0491f6a3 100644
--- a/include/asm-powerpc/immap_qe.h
+++ b/include/asm-powerpc/immap_qe.h
@@ -136,22 +136,7 @@ struct qe_timers {
 
 /* BRG */
 struct qe_brg {
-        __be32  brgc1;          /* BRG1 configuration register */
-        __be32  brgc2;          /* BRG2 configuration register */
-        __be32  brgc3;          /* BRG3 configuration register */
-        __be32  brgc4;          /* BRG4 configuration register */
-        __be32  brgc5;          /* BRG5 configuration register */
-        __be32  brgc6;          /* BRG6 configuration register */
-        __be32  brgc7;          /* BRG7 configuration register */
-        __be32  brgc8;          /* BRG8 configuration register */
-        __be32  brgc9;          /* BRG9 configuration register */
-        __be32  brgc10;         /* BRG10 configuration register */
-        __be32  brgc11;         /* BRG11 configuration register */
-        __be32  brgc12;         /* BRG12 configuration register */
-        __be32  brgc13;         /* BRG13 configuration register */
-        __be32  brgc14;         /* BRG14 configuration register */
-        __be32  brgc15;         /* BRG15 configuration register */
-        __be32  brgc16;         /* BRG16 configuration register */
+        __be32  brgc[16];       /* BRG configuration registers */
         u8      res0[0x40];
 } __attribute__ ((packed));