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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-27 11:49:07 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-27 11:49:07 -0400
commitb98adfccdf5f8dd34ae56a2d5adbe2c030bd4674 (patch)
tree1807a029520f550dd4f90c95ad0063bceb00d645
parentba21fe71725f94792330ebc3034ef2b35a36276f (diff)
parent33573c0e3243aaa38b6ad96942de85a1b713c2ff (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (108 commits) sh: Fix occasional flush_cache_4096() stack corruption. sh: Calculate shm alignment at runtime. sh: dma-mapping compile fixes. sh: Initial vsyscall page support. sh: Clean up PAGE_SIZE definition for assembly use. sh: Selective flush_cache_mm() flushing. sh: More intelligent entry_mask/way_size calculation. sh: Support for L2 cache on newer SH-4A CPUs. sh: Update kexec support for API changes. sh: Optimized readsl()/writesl() support. sh: Report movli.l/movco.l capabilities. sh: CPU flags in AT_HWCAP in ELF auxvt. sh: Add support for 4K stacks. sh: Enable /proc/kcore support. sh: stack debugging support. sh: select CONFIG_EMBEDDED. sh: machvec rework. sh: Solution Engine SH7343 board support. sh: SH7710VoIPGW board support. sh: Enable verbose BUG() support. ...
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-rw-r--r--include/asm-sh/se.h (renamed from include/asm-sh/se/se.h)3
-rw-r--r--include/asm-sh/se/io.h35
-rw-r--r--include/asm-sh/se7300.h (renamed from include/asm-sh/se7300/se7300.h)3
-rw-r--r--include/asm-sh/se7300/io.h29
-rw-r--r--include/asm-sh/se73180.h (renamed from include/asm-sh/se73180/se73180.h)3
-rw-r--r--include/asm-sh/se73180/io.h32
-rw-r--r--include/asm-sh/se7343.h82
-rw-r--r--include/asm-sh/se7751.h (renamed from include/asm-sh/se7751/se7751.h)3
-rw-r--r--include/asm-sh/se7751/io.h42
-rw-r--r--include/asm-sh/setup.h2
-rw-r--r--include/asm-sh/sfp-machine.h86
-rw-r--r--include/asm-sh/sh03/io.h10
-rw-r--r--include/asm-sh/sh2000/sh2000.h8
-rw-r--r--include/asm-sh/shmin/shmin.h9
-rw-r--r--include/asm-sh/shmparam.h20
-rw-r--r--include/asm-sh/smc37c93x.h (renamed from include/asm-sh/se/smc37c93x.h)0
-rw-r--r--include/asm-sh/smp.h5
-rw-r--r--include/asm-sh/snapgear.h (renamed from include/asm-sh/snapgear/io.h)31
-rw-r--r--include/asm-sh/system.h199
-rw-r--r--include/asm-sh/systemh/io.h43
-rw-r--r--include/asm-sh/systemh7751.h (renamed from include/asm-sh/systemh/7751systemh.h)3
-rw-r--r--include/asm-sh/thread_info.h43
-rw-r--r--include/asm-sh/timer.h2
-rw-r--r--include/asm-sh/titan.h43
-rw-r--r--include/asm-sh/uaccess.h79
-rw-r--r--include/asm-sh/unistd.h44
-rw-r--r--include/asm-sh/voyagergx.h (renamed from include/asm-sh/rts7751r2d/voyagergx_reg.h)2
-rw-r--r--include/asm-sh/watchdog.h3
-rw-r--r--lib/Kconfig.debug4
-rw-r--r--sound/oss/sh_dac_audio.c60
355 files changed, 20709 insertions, 9006 deletions
diff --git a/Documentation/sh/new-machine.txt b/Documentation/sh/new-machine.txt
index eb2dd2e6993b..73988e0d112b 100644
--- a/Documentation/sh/new-machine.txt
+++ b/Documentation/sh/new-machine.txt
@@ -41,11 +41,6 @@ Board-specific code:
41 | 41 |
42 .. more boards here ... 42 .. more boards here ...
43 43
44It should also be noted that each board is required to have some certain
45headers. At the time of this writing, io.h is the only thing that needs
46to be provided for each board, and can generally just reference generic
47functions (with the exception of isa_port2addr).
48
49Next, for companion chips: 44Next, for companion chips:
50. 45.
51`-- arch 46`-- arch
@@ -104,12 +99,13 @@ and then populate that with sub-directories for each member of the family.
104Both the Solution Engine and the hp6xx boards are an example of this. 99Both the Solution Engine and the hp6xx boards are an example of this.
105 100
106After you have setup your new arch/sh/boards/ directory, remember that you 101After you have setup your new arch/sh/boards/ directory, remember that you
107also must add a directory in include/asm-sh for headers localized to this 102should also add a directory in include/asm-sh for headers localized to this
108board. In order to interoperate seamlessly with the build system, it's best 103board (if there are going to be more than one). In order to interoperate
109to have this directory the same as the arch/sh/boards/ directory name, 104seamlessly with the build system, it's best to have this directory the same
110though if your board is again part of a family, the build system has ways 105as the arch/sh/boards/ directory name, though if your board is again part of
111of dealing with this, and you can feel free to name the directory after 106a family, the build system has ways of dealing with this (via incdir-y
112the family member itself. 107overloading), and you can feel free to name the directory after the family
108member itself.
113 109
114There are a few things that each board is required to have, both in the 110There are a few things that each board is required to have, both in the
115arch/sh/boards and the include/asm-sh/ heirarchy. In order to better 111arch/sh/boards and the include/asm-sh/ heirarchy. In order to better
@@ -122,6 +118,7 @@ might look something like:
122 * arch/sh/boards/vapor/setup.c - Setup code for imaginary board 118 * arch/sh/boards/vapor/setup.c - Setup code for imaginary board
123 */ 119 */
124#include <linux/init.h> 120#include <linux/init.h>
121#include <asm/rtc.h> /* for board_time_init() */
125 122
126const char *get_system_type(void) 123const char *get_system_type(void)
127{ 124{
@@ -152,79 +149,57 @@ int __init platform_setup(void)
152} 149}
153 150
154Our new imaginary board will also have to tie into the machvec in order for it 151Our new imaginary board will also have to tie into the machvec in order for it
155to be of any use. Currently the machvec is slowly on its way out, but is still 152to be of any use.
156required for the time being. As such, let us take a look at what needs to be
157done for the machvec assignment.
158 153
159machvec functions fall into a number of categories: 154machvec functions fall into a number of categories:
160 155
161 - I/O functions to IO memory (inb etc) and PCI/main memory (readb etc). 156 - I/O functions to IO memory (inb etc) and PCI/main memory (readb etc).
162 - I/O remapping functions (ioremap etc) 157 - I/O mapping functions (ioport_map, ioport_unmap, etc).
163 - some initialisation functions 158 - a 'heartbeat' function.
164 - a 'heartbeat' function 159 - PCI and IRQ initialization routines.
165 - some miscellaneous flags 160 - Consistent allocators (for boards that need special allocators,
166 161 particularly for allocating out of some board-specific SRAM for DMA
167The tree can be built in two ways: 162 handles).
168 - as a fully generic build. All drivers are linked in, and all functions 163
169 go through the machvec 164There are machvec functions added and removed over time, so always be sure to
170 - as a machine specific build. In this case only the required drivers 165consult include/asm-sh/machvec.h for the current state of the machvec.
171 will be linked in, and some macros may be redefined to not go through 166
172 the machvec where performance is important (in particular IO functions). 167The kernel will automatically wrap in generic routines for undefined function
173 168pointers in the machvec at boot time, as machvec functions are referenced
174There are three ways in which IO can be performed: 169unconditionally throughout most of the tree. Some boards have incredibly
175 - none at all. This is really only useful for the 'unknown' machine type, 170sparse machvecs (such as the dreamcast and sh03), whereas others must define
176 which us designed to run on a machine about which we know nothing, and 171virtually everything (rts7751r2d).
177 so all all IO instructions do nothing. 172
178 - fully custom. In this case all IO functions go to a machine specific 173Adding a new machine is relatively trivial (using vapor as an example):
179 set of functions which can do what they like 174
180 - a generic set of functions. These will cope with most situations, 175If the board-specific definitions are quite minimalistic, as is the case for
181 and rely on a single function, mv_port2addr, which is called through the 176the vast majority of boards, simply having a single board-specific header is
182 machine vector, and converts an IO address into a memory address, which 177sufficient.
183 can be read from/written to directly. 178
184 179 - add a new file include/asm-sh/vapor.h which contains prototypes for
185Thus adding a new machine involves the following steps (I will assume I am
186adding a machine called vapor):
187
188 - add a new file include/asm-sh/vapor/io.h which contains prototypes for
189 any machine specific IO functions prefixed with the machine name, for 180 any machine specific IO functions prefixed with the machine name, for
190 example vapor_inb. These will be needed when filling out the machine 181 example vapor_inb. These will be needed when filling out the machine
191 vector. 182 vector.
192 183
193 This is the minimum that is required, however there are ample 184 Note that these prototypes are generated automatically by setting
194 opportunities to optimise this. In particular, by making the prototypes 185 __IO_PREFIX to something sensible. A typical example would be:
195 inline function definitions, it is possible to inline the function when 186
196 building machine specific versions. Note that the machine vector 187 #define __IO_PREFIX vapor
197 functions will still be needed, so that a module built for a generic 188 #include <asm/io_generic.h>
198 setup can be loaded. 189
199 190 somewhere in the board-specific header. Any boards being ported that still
200 - add a new file arch/sh/boards/vapor/mach.c. This contains the definition 191 have a legacy io.h should remove it entirely and switch to the new model.
201 of the machine vector. When building the machine specific version, this 192
202 will be the real machine vector (via an alias), while in the generic 193 - Add machine vector definitions to the board's setup.c. At a bare minimum,
203 version is used to initialise the machine vector, and then freed, by 194 this must be defined as something like:
204 making it initdata. This should be defined as: 195
205 196 struct sh_machine_vector mv_vapor __initmv = {
206 struct sh_machine_vector mv_vapor __initmv = { 197 .mv_name = "vapor",
207 .mv_name = "vapor", 198 };
208 } 199 ALIAS_MV(vapor)
209 ALIAS_MV(vapor) 200
210 201 - finally add a file arch/sh/boards/vapor/io.c, which contains definitions of
211 - finally add a file arch/sh/boards/vapor/io.c, which contains 202 the machine specific io functions (if there are enough to warrant it).
212 definitions of the machine specific io functions.
213
214A note about initialisation functions. Three initialisation functions are
215provided in the machine vector:
216 - mv_arch_init - called very early on from setup_arch
217 - mv_init_irq - called from init_IRQ, after the generic SH interrupt
218 initialisation
219 - mv_init_pci - currently not used
220
221Any other remaining functions which need to be called at start up can be
222added to the list using the __initcalls macro (or module_init if the code
223can be built as a module). Many generic drivers probe to see if the device
224they are targeting is present, however this may not always be appropriate,
225so a flag can be added to the machine vector which will be set on those
226machines which have the hardware in question, reducing the probe to a
227single conditional.
228 203
2293. Hooking into the Build System 2043. Hooking into the Build System
230================================ 205================================
@@ -303,4 +278,3 @@ which will in turn copy the defconfig for this board, run it through
303oldconfig (prompting you for any new options since the time of creation), 278oldconfig (prompting you for any new options since the time of creation),
304and start you on your way to having a functional kernel for your new 279and start you on your way to having a functional kernel for your new
305board. 280board.
306
diff --git a/Documentation/sh/register-banks.txt b/Documentation/sh/register-banks.txt
new file mode 100644
index 000000000000..a6719f2f6594
--- /dev/null
+++ b/Documentation/sh/register-banks.txt
@@ -0,0 +1,33 @@
1 Notes on register bank usage in the kernel
2 ==========================================
3
4Introduction
5------------
6
7The SH-3 and SH-4 CPU families traditionally include a single partial register
8bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
9may have more full-featured banking or simply no such capabilities at all.
10
11SR.RB banking
12-------------
13
14In the case of this type of banking, banked registers are mapped directly to
15r0 ... r7 if SR.RB is set to the bank we are interested in, otherwise ldc/stc
16can still be used to reference the banked registers (as r0_bank ... r7_bank)
17when in the context of another bank. The developer must keep the SR.RB value
18in mind when writing code that utilizes these banked registers, for obvious
19reasons. Userspace is also not able to poke at the bank1 values, so these can
20be used rather effectively as scratch registers by the kernel.
21
22Presently the kernel uses several of these registers.
23
24 - r0_bank, r1_bank (referenced as k0 and k1, used for scratch
25 registers when doing exception handling).
26 - r2_bank (used to track the EXPEVT/INTEVT code)
27 - Used by do_IRQ() and friends for doing irq mapping based off
28 of the interrupt exception vector jump table offset
29 - r6_bank (global interrupt mask)
30 - The SR.IMASK interrupt handler makes use of this to set the
31 interrupt priority level (used by local_irq_enable())
32 - r7_bank (current)
33
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 1a0db1d4c952..1cc5c9b27bfd 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -8,6 +8,7 @@ mainmenu "Linux/SuperH Kernel Configuration"
8config SUPERH 8config SUPERH
9 bool 9 bool
10 default y 10 default y
11 select EMBEDDED
11 help 12 help
12 The SuperH is a RISC processor targeted for use in embedded systems 13 The SuperH is a RISC processor targeted for use in embedded systems
13 and consumer electronics; it was also used in the Sega Dreamcast 14 and consumer electronics; it was also used in the Sega Dreamcast
@@ -51,18 +52,23 @@ source "init/Kconfig"
51 52
52menu "System type" 53menu "System type"
53 54
55config SOLUTION_ENGINE
56 bool
57
54choice 58choice
55 prompt "SuperH system type" 59 prompt "SuperH system type"
56 default SH_UNKNOWN 60 default SH_UNKNOWN
57 61
58config SH_SOLUTION_ENGINE 62config SH_SOLUTION_ENGINE
59 bool "SolutionEngine" 63 bool "SolutionEngine"
64 select SOLUTION_ENGINE
60 help 65 help
61 Select SolutionEngine if configuring for a Hitachi SH7709 66 Select SolutionEngine if configuring for a Hitachi SH7709
62 or SH7750 evaluation board. 67 or SH7750 evaluation board.
63 68
64config SH_7751_SOLUTION_ENGINE 69config SH_7751_SOLUTION_ENGINE
65 bool "SolutionEngine7751" 70 bool "SolutionEngine7751"
71 select SOLUTION_ENGINE
66 select CPU_SUBTYPE_SH7751 72 select CPU_SUBTYPE_SH7751
67 help 73 help
68 Select 7751 SolutionEngine if configuring for a Hitachi SH7751 74 Select 7751 SolutionEngine if configuring for a Hitachi SH7751
@@ -70,17 +76,27 @@ config SH_7751_SOLUTION_ENGINE
70 76
71config SH_7300_SOLUTION_ENGINE 77config SH_7300_SOLUTION_ENGINE
72 bool "SolutionEngine7300" 78 bool "SolutionEngine7300"
79 select SOLUTION_ENGINE
73 select CPU_SUBTYPE_SH7300 80 select CPU_SUBTYPE_SH7300
74 help 81 help
75 Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V) 82 Select 7300 SolutionEngine if configuring for a Hitachi
76 evaluation board. 83 SH7300(SH-Mobile V) evaluation board.
84
85config SH_7343_SOLUTION_ENGINE
86 bool "SolutionEngine7343"
87 select SOLUTION_ENGINE
88 select CPU_SUBTYPE_SH7343
89 help
90 Select 7343 SolutionEngine if configuring for a Hitachi
91 SH7343 (SH-Mobile 3AS) evaluation board.
77 92
78config SH_73180_SOLUTION_ENGINE 93config SH_73180_SOLUTION_ENGINE
79 bool "SolutionEngine73180" 94 bool "SolutionEngine73180"
80 select CPU_SUBTYPE_SH73180 95 select SOLUTION_ENGINE
81 help 96 select CPU_SUBTYPE_SH73180
82 Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3) 97 help
83 evaluation board. 98 Select 73180 SolutionEngine if configuring for a Hitachi
99 SH73180(SH-Mobile 3) evaluation board.
84 100
85config SH_7751_SYSTEMH 101config SH_7751_SYSTEMH
86 bool "SystemH7751R" 102 bool "SystemH7751R"
@@ -89,12 +105,6 @@ config SH_7751_SYSTEMH
89 Select SystemH if you are configuring for a Renesas SystemH 105 Select SystemH if you are configuring for a Renesas SystemH
90 7751R evaluation board. 106 7751R evaluation board.
91 107
92config SH_STB1_HARP
93 bool "STB1_Harp"
94
95config SH_STB1_OVERDRIVE
96 bool "STB1_Overdrive"
97
98config SH_HP6XX 108config SH_HP6XX
99 bool "HP6XX" 109 bool "HP6XX"
100 help 110 help
@@ -102,19 +112,6 @@ config SH_HP6XX
102 More information (hardware only) at 112 More information (hardware only) at
103 <http://www.hp.com/jornada/>. 113 <http://www.hp.com/jornada/>.
104 114
105config SH_CQREEK
106 bool "CqREEK"
107 help
108 Select CqREEK if configuring for a CqREEK SH7708 or SH7750.
109 More information at
110 <http://sources.redhat.com/ecos/hardware.html#SuperH>.
111
112config SH_DMIDA
113 bool "DMIDA"
114 help
115 Select DMIDA if configuring for a DataMyte 4000 Industrial
116 Digital Assistant. More information at <http://www.dmida.com/>.
117
118config SH_EC3104 115config SH_EC3104
119 bool "EC3104" 116 bool "EC3104"
120 help 117 help
@@ -136,25 +133,9 @@ config SH_DREAMCAST
136 <http://www.m17n.org/linux-sh/dreamcast/>. There is a 133 <http://www.m17n.org/linux-sh/dreamcast/>. There is a
137 Dreamcast project is at <http://linuxdc.sourceforge.net/>. 134 Dreamcast project is at <http://linuxdc.sourceforge.net/>.
138 135
139config SH_CAT68701
140 bool "CAT68701"
141
142config SH_BIGSUR 136config SH_BIGSUR
143 bool "BigSur" 137 bool "BigSur"
144 138
145config SH_SH2000
146 bool "SH2000"
147 select CPU_SUBTYPE_SH7709
148 help
149 SH-2000 is a single-board computer based around SH7709A chip
150 intended for embedded applications.
151 It has an Ethernet interface (CS8900A), direct connected
152 Compact Flash socket, three serial ports and PC-104 bus.
153 More information at <http://sh2000.sh-linux.org>.
154
155config SH_ADX
156 bool "ADX"
157
158config SH_MPC1211 139config SH_MPC1211
159 bool "Interface MPC1211" 140 bool "Interface MPC1211"
160 help 141 help
@@ -184,6 +165,13 @@ config SH_HS7751RVOIP
184 Select HS7751RVOIP if configuring for a Renesas Technology 165 Select HS7751RVOIP if configuring for a Renesas Technology
185 Sales VoIP board. 166 Sales VoIP board.
186 167
168config SH_7710VOIPGW
169 bool "SH7710-VOIP-GW"
170 select CPU_SUBTYPE_SH7710
171 help
172 Select this option to build a kernel for the SH7710 based
173 VOIP GW.
174
187config SH_RTS7751R2D 175config SH_RTS7751R2D
188 bool "RTS7751R2D" 176 bool "RTS7751R2D"
189 select CPU_SUBTYPE_SH7751R 177 select CPU_SUBTYPE_SH7751R
@@ -222,6 +210,12 @@ config SH_TITAN
222 Select Titan if you are configuring for a Nimble Microsystems 210 Select Titan if you are configuring for a Nimble Microsystems
223 NetEngine NP51R. 211 NetEngine NP51R.
224 212
213config SH_SHMIN
214 bool "SHMIN"
215 select CPU_SUBTYPE_SH7706
216 help
217 Select SHMIN if configureing for the SHMIN board
218
225config SH_UNKNOWN 219config SH_UNKNOWN
226 bool "BareCPU" 220 bool "BareCPU"
227 help 221 help
@@ -238,35 +232,9 @@ endchoice
238 232
239source "arch/sh/mm/Kconfig" 233source "arch/sh/mm/Kconfig"
240 234
241config MEMORY_START
242 hex "Physical memory start address"
243 default "0x08000000"
244 ---help---
245 Computers built with Hitachi SuperH processors always
246 map the ROM starting at address zero. But the processor
247 does not specify the range that RAM takes.
248
249 The physical memory (RAM) start address will be automatically
250 set to 08000000. Other platforms, such as the Solution Engine
251 boards typically map RAM at 0C000000.
252
253 Tweak this only when porting to a new machine which does not
254 already have a defconfig. Changing it from the known correct
255 value on any of the known systems will only lead to disaster.
256
257config MEMORY_SIZE
258 hex "Physical memory size"
259 default "0x00400000"
260 help
261 This sets the default memory size assumed by your SH kernel. It can
262 be overridden as normal by the 'mem=' argument on the kernel command
263 line. If unsure, consult your board specifications or just leave it
264 as 0x00400000 which was the default value before this became
265 configurable.
266
267config CF_ENABLER 235config CF_ENABLER
268 bool "Compact Flash Enabler support" 236 bool "Compact Flash Enabler support"
269 depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03 237 depends on SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_SH03
270 ---help--- 238 ---help---
271 Compact Flash is a small, removable mass storage device introduced 239 Compact Flash is a small, removable mass storage device introduced
272 in 1994 originally as a PCMCIA device. If you say `Y' here, you 240 in 1994 originally as a PCMCIA device. If you say `Y' here, you
@@ -294,7 +262,7 @@ config CF_AREA5
294 - "Area5" if CompactFlash is connected to Area 5 (0x14000000) 262 - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
295 - "Area6" if it is connected to Area 6 (0x18000000) 263 - "Area6" if it is connected to Area 6 (0x18000000)
296 264
297 "Area6" will work for most boards. For ADX, select "Area5". 265 "Area6" will work for most boards.
298 266
299config CF_AREA6 267config CF_AREA6
300 bool "Area6" 268 bool "Area6"
@@ -316,19 +284,6 @@ config CPU_LITTLE_ENDIAN
316 endian byte order. These modes require different kernels. Say Y if 284 endian byte order. These modes require different kernels. Say Y if
317 your machine is little endian, N if it's a big endian machine. 285 your machine is little endian, N if it's a big endian machine.
318 286
319# The SH7750 RTC module is disabled in the Dreamcast
320config SH_RTC
321 bool
322 depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && \
323 !SH_73180_SOLUTION_ENGINE && !SH_LANDISK && \
324 !SH_R7780RP
325 default y
326 help
327 Selecting this option will allow the Linux kernel to emulate
328 PC's RTC.
329
330 If unsure, say N.
331
332config SH_FPU 287config SH_FPU
333 bool "FPU support" 288 bool "FPU support"
334 depends on !CPU_SH3 289 depends on !CPU_SH3
@@ -339,14 +294,22 @@ config SH_FPU
339 294
340 This option must be set in order to enable the FPU. 295 This option must be set in order to enable the FPU.
341 296
297config SH_FPU_EMU
298 bool "FPU emulation support"
299 depends on !SH_FPU && EXPERIMENTAL
300 default n
301 help
302 Selecting this option will enable support for software FPU emulation.
303 Most SH-3 users will want to say Y here, whereas most SH-4 users will
304 want to say N.
305
342config SH_DSP 306config SH_DSP
343 bool "DSP support" 307 bool "DSP support"
344 depends on !CPU_SH4 308 default y if SH4AL_DSP || !CPU_SH4
345 default y 309 default n
346 help 310 help
347 Selecting this option will enable support for SH processors that 311 Selecting this option will enable support for SH processors that
348 have DSP units (ie, SH2-DSP and SH3-DSP). It is safe to say Y here 312 have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
349 by default, as the existance of the DSP will be probed at runtime.
350 313
351 This option must be set in order to enable the DSP. 314 This option must be set in order to enable the DSP.
352 315
@@ -373,6 +336,9 @@ config CPU_HAS_INTEVT
373config CPU_HAS_PINT_IRQ 336config CPU_HAS_PINT_IRQ
374 bool 337 bool
375 338
339config CPU_HAS_MASKREG_IRQ
340 bool
341
376config CPU_HAS_INTC2_IRQ 342config CPU_HAS_INTC2_IRQ
377 bool 343 bool
378 344
@@ -400,16 +366,19 @@ config SH_TMU
400 366
401endmenu 367endmenu
402 368
403#source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" 369source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
370
371source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
404 372
405#source "arch/sh/boards/renesas/rts7751r2d/Kconfig" 373source "arch/sh/boards/renesas/r7780rp/Kconfig"
406 374
407config SH_PCLK_FREQ 375config SH_PCLK_FREQ
408 int "Peripheral clock frequency (in Hz)" 376 int "Peripheral clock frequency (in Hz)"
409 default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 377 default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
410 default "60000000" if CPU_SUBTYPE_SH7751 378 default "60000000" if CPU_SUBTYPE_SH7751
411 default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7760 379 default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \
412 default "27000000" if CPU_SUBTYPE_SH73180 380 CPU_SUBTYPE_SH7760
381 default "27000000" if CPU_SUBTYPE_SH73180 || CPU_SUBTYPE_SH7343
413 default "66000000" if CPU_SUBTYPE_SH4_202 382 default "66000000" if CPU_SUBTYPE_SH4_202
414 help 383 help
415 This option is used to specify the peripheral clock frequency. 384 This option is used to specify the peripheral clock frequency.
@@ -440,10 +409,8 @@ source "arch/sh/cchips/Kconfig"
440 409
441config HEARTBEAT 410config HEARTBEAT
442 bool "Heartbeat LED" 411 bool "Heartbeat LED"
443 depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || \ 412 depends on SH_MPC1211 || SH_SH03 || \
444 SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || \ 413 SH_BIGSUR || SOLUTION_ENGINE || \
445 SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || \
446 SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || \
447 SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK 414 SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
448 help 415 help
449 Use the power-on LED on your machine as a load meter. The exact 416 Use the power-on LED on your machine as a load meter. The exact
@@ -459,6 +426,8 @@ config ISA_DMA_API
459 426
460menu "Kernel features" 427menu "Kernel features"
461 428
429source kernel/Kconfig.hz
430
462config KEXEC 431config KEXEC
463 bool "kexec system call (EXPERIMENTAL)" 432 bool "kexec system call (EXPERIMENTAL)"
464 depends on EXPERIMENTAL 433 depends on EXPERIMENTAL
@@ -476,10 +445,6 @@ config KEXEC
476 support. As of this writing the exact hardware interface is 445 support. As of this writing the exact hardware interface is
477 strongly in flux, so no good recommendation can be made. 446 strongly in flux, so no good recommendation can be made.
478 447
479config PREEMPT
480 bool "Preemptible Kernel (EXPERIMENTAL)"
481 depends on EXPERIMENTAL
482
483config SMP 448config SMP
484 bool "Symmetric multi-processing support" 449 bool "Symmetric multi-processing support"
485 ---help--- 450 ---help---
@@ -515,6 +480,8 @@ config NR_CPUS
515 This is purely to save memory - each supported CPU adds 480 This is purely to save memory - each supported CPU adds
516 approximately eight kilobytes to the kernel image. 481 approximately eight kilobytes to the kernel image.
517 482
483source "kernel/Kconfig.preempt"
484
518config CPU_HAS_SR_RB 485config CPU_HAS_SR_RB
519 bool "CPU has SR.RB" 486 bool "CPU has SR.RB"
520 depends on CPU_SH3 || CPU_SH4 487 depends on CPU_SH3 || CPU_SH4
@@ -636,6 +603,16 @@ source "fs/Kconfig.binfmt"
636 603
637endmenu 604endmenu
638 605
606menu "Power management options (EXPERIMENTAL)"
607depends on EXPERIMENTAL
608
609source kernel/power/Kconfig
610
611config APM
612 bool "Advanced Power Management Emulation"
613 depends on PM
614endmenu
615
639source "net/Kconfig" 616source "net/Kconfig"
640 617
641source "drivers/Kconfig" 618source "drivers/Kconfig"
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 8fb31ab2c02c..48479e014dac 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -30,8 +30,35 @@ config EARLY_PRINTK
30 when the kernel may crash or hang before the serial console is 30 when the kernel may crash or hang before the serial console is
31 initialised. If unsure, say N. 31 initialised. If unsure, say N.
32 32
33config DEBUG_STACKOVERFLOW
34 bool "Check for stack overflows"
35 depends on DEBUG_KERNEL
36 help
37 This option will cause messages to be printed if free stack space
38 drops below a certain limit.
39
40config DEBUG_STACK_USAGE
41 bool "Stack utilization instrumentation"
42 depends on DEBUG_KERNEL
43 help
44 Enables the display of the minimum amount of free stack which each
45 task has ever had available in the sysrq-T and sysrq-P debug output.
46
47 This option will slow down process creation somewhat.
48
49config 4KSTACKS
50 bool "Use 4Kb for kernel stacks instead of 8Kb"
51 depends on DEBUG_KERNEL
52 help
53 If you say Y here the kernel will use a 4Kb stacksize for the
54 kernel stack attached to each process/thread. This facilitates
55 running more threads on a system and also reduces the pressure
56 on the VM subsystem for higher order allocations. This option
57 will also use IRQ stacks to compensate for the reduced stackspace.
58
33config KGDB 59config KGDB
34 bool "Include KGDB kernel debugger" 60 bool "Include KGDB kernel debugger"
61 select FRAME_POINTER
35 help 62 help
36 Include in-kernel hooks for kgdb, the Linux kernel source level 63 Include in-kernel hooks for kgdb, the Linux kernel source level
37 debugger. See <http://kgdb.sourceforge.net/> for more information. 64 debugger. See <http://kgdb.sourceforge.net/> for more information.
@@ -112,13 +139,4 @@ endchoice
112 139
113endmenu 140endmenu
114 141
115config FRAME_POINTER
116 bool "Compile the kernel with frame pointers"
117 default y if KGDB
118 help
119 If you say Y here the resulting kernel image will be slightly larger
120 and slower, but it will give very useful debugging information.
121 If you don't debug the kernel, you can say N, but we may not be able
122 to solve problems without frame pointers.
123
124endmenu 142endmenu
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index e467a450662b..26d62ff51a64 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -18,11 +18,13 @@ cflags-y := -mb
18cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml 18cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml
19 19
20isa-y := any 20isa-y := any
21isa-$(CONFIG_SH_DSP) := sh
21isa-$(CONFIG_CPU_SH2) := sh2 22isa-$(CONFIG_CPU_SH2) := sh2
23isa-$(CONFIG_CPU_SH2A) := sh2a
22isa-$(CONFIG_CPU_SH3) := sh3 24isa-$(CONFIG_CPU_SH3) := sh3
23isa-$(CONFIG_CPU_SH4) := sh4 25isa-$(CONFIG_CPU_SH4) := sh4
24isa-$(CONFIG_CPU_SH4A) := sh4a 26isa-$(CONFIG_CPU_SH4A) := sh4a
25isa-$(CONFIG_CPU_SH2A) := sh2a 27isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al
26 28
27isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp 29isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
28 30
@@ -30,9 +32,11 @@ ifndef CONFIG_MMU
30isa-y := $(isa-y)-nommu 32isa-y := $(isa-y)-nommu
31endif 33endif
32 34
35ifndef CONFIG_SH_DSP
33ifndef CONFIG_SH_FPU 36ifndef CONFIG_SH_FPU
34isa-y := $(isa-y)-nofpu 37isa-y := $(isa-y)-nofpu
35endif 38endif
39endif
36 40
37cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),) 41cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
38 42
@@ -79,24 +83,19 @@ head-y := arch/sh/kernel/head.o arch/sh/kernel/init_task.o
79LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) 83LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
80 84
81core-y += arch/sh/kernel/ arch/sh/mm/ 85core-y += arch/sh/kernel/ arch/sh/mm/
86core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/
82 87
83# Boards 88# Boards
84machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x 89machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x
85machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751 90machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751
86machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300 91machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
92machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343
87machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180 93machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
88machdir-$(CONFIG_SH_STB1_HARP) := harp
89machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive
90machdir-$(CONFIG_SH_HP6XX) := hp6xx 94machdir-$(CONFIG_SH_HP6XX) := hp6xx
91machdir-$(CONFIG_SH_CQREEK) := cqreek
92machdir-$(CONFIG_SH_DMIDA) := dmida
93machdir-$(CONFIG_SH_EC3104) := ec3104 95machdir-$(CONFIG_SH_EC3104) := ec3104
94machdir-$(CONFIG_SH_SATURN) := saturn 96machdir-$(CONFIG_SH_SATURN) := saturn
95machdir-$(CONFIG_SH_DREAMCAST) := dreamcast 97machdir-$(CONFIG_SH_DREAMCAST) := dreamcast
96machdir-$(CONFIG_SH_CAT68701) := cat68701
97machdir-$(CONFIG_SH_BIGSUR) := bigsur 98machdir-$(CONFIG_SH_BIGSUR) := bigsur
98machdir-$(CONFIG_SH_SH2000) := sh2000
99machdir-$(CONFIG_SH_ADX) := adx
100machdir-$(CONFIG_SH_MPC1211) := mpc1211 99machdir-$(CONFIG_SH_MPC1211) := mpc1211
101machdir-$(CONFIG_SH_SH03) := sh03 100machdir-$(CONFIG_SH_SH03) := sh03
102machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear 101machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear
@@ -104,16 +103,16 @@ machdir-$(CONFIG_SH_HS7751RVOIP) := renesas/hs7751rvoip
104machdir-$(CONFIG_SH_RTS7751R2D) := renesas/rts7751r2d 103machdir-$(CONFIG_SH_RTS7751R2D) := renesas/rts7751r2d
105machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh 104machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh
106machdir-$(CONFIG_SH_EDOSK7705) := renesas/edosk7705 105machdir-$(CONFIG_SH_EDOSK7705) := renesas/edosk7705
106machdir-$(CONFIG_SH_R7780RP) := renesas/r7780rp
107machdir-$(CONFIG_SH_7710VOIPGW) := renesas/sh7710voipgw
107machdir-$(CONFIG_SH_SH4202_MICRODEV) := superh/microdev 108machdir-$(CONFIG_SH_SH4202_MICRODEV) := superh/microdev
109machdir-$(CONFIG_SH_LANDISK) := landisk
110machdir-$(CONFIG_SH_TITAN) := titan
111machdir-$(CONFIG_SH_SHMIN) := shmin
108machdir-$(CONFIG_SH_UNKNOWN) := unknown 112machdir-$(CONFIG_SH_UNKNOWN) := unknown
109 113
110incdir-y := $(notdir $(machdir-y)) 114incdir-y := $(notdir $(machdir-y))
111 115incdir-$(CONFIG_SH_HP6XX) := hp6xx
112incdir-$(CONFIG_SH_SOLUTION_ENGINE) := se
113incdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se7751
114incdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se7300
115incdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se73180
116incdir-$(CONFIG_SH_HP600) := hp6xx
117 116
118ifneq ($(machdir-y),) 117ifneq ($(machdir-y),)
119core-y += arch/sh/boards/$(machdir-y)/ 118core-y += arch/sh/boards/$(machdir-y)/
@@ -137,17 +136,14 @@ boot := arch/sh/boot
137 136
138CPPFLAGS_vmlinux.lds := -traditional 137CPPFLAGS_vmlinux.lds := -traditional
139 138
140ifneq ($(KBUILD_SRC),)
141incdir-prefix := $(srctree)/include/asm-sh/ 139incdir-prefix := $(srctree)/include/asm-sh/
142else
143incdir-prefix :=
144endif
145 140
146# Update machine arch and proc symlinks if something which affects 141# Update machine arch and proc symlinks if something which affects
147# them changed. We use .arch and .mach to indicate when they were 142# them changed. We use .arch and .mach to indicate when they were
148# updated last, otherwise make uses the target directory mtime. 143# updated last, otherwise make uses the target directory mtime.
149 144
150include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/auto.conf 145include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) \
146 include/config/auto.conf FORCE
151 @echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)' 147 @echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)'
152 $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi 148 $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
153 $(Q)ln -fsn $(incdir-prefix)$(cpuincdir-y) include/asm-sh/cpu 149 $(Q)ln -fsn $(incdir-prefix)$(cpuincdir-y) include/asm-sh/cpu
@@ -157,7 +153,8 @@ include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/auto.conf
157# don't, just reference the parent directory so the semantics are 153# don't, just reference the parent directory so the semantics are
158# kept roughly the same. 154# kept roughly the same.
159 155
160include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/auto.conf 156include/asm-sh/.mach: $(wildcard include/config/sh/*.h) \
157 include/config/auto.conf FORCE
161 @echo -n ' SYMLINK include/asm-sh/mach -> ' 158 @echo -n ' SYMLINK include/asm-sh/mach -> '
162 $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi 159 $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
163 $(Q)if [ -d $(incdir-prefix)$(incdir-y) ]; then \ 160 $(Q)if [ -d $(incdir-prefix)$(incdir-y) ]; then \
@@ -170,7 +167,7 @@ include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/auto.conf
170 fi 167 fi
171 @touch $@ 168 @touch $@
172 169
173archprepare: maketools include/asm-sh/.cpu include/asm-sh/.mach 170archprepare: include/asm-sh/.cpu include/asm-sh/.mach maketools
174 171
175PHONY += maketools FORCE 172PHONY += maketools FORCE
176maketools: include/linux/version.h FORCE 173maketools: include/linux/version.h FORCE
@@ -191,4 +188,3 @@ CLEAN_FILES += include/asm-sh/machtypes.h
191define archhelp 188define archhelp
192 @echo ' zImage - Compressed kernel image (arch/sh/boot/zImage)' 189 @echo ' zImage - Compressed kernel image (arch/sh/boot/zImage)'
193endef 190endef
194
diff --git a/arch/sh/boards/adx/Makefile b/arch/sh/boards/adx/Makefile
deleted file mode 100644
index 5b1c531b3991..000000000000
--- a/arch/sh/boards/adx/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for ADX boards
3#
4
5obj-y := setup.o irq.o irq_maskreq.o
6
diff --git a/arch/sh/boards/adx/irq.c b/arch/sh/boards/adx/irq.c
deleted file mode 100644
index c6ca409dff98..000000000000
--- a/arch/sh/boards/adx/irq.c
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * linux/arch/sh/boards/adx/irq.c
3 *
4 * Copyright (C) 2001 A&D Co., Ltd.
5 *
6 * I/O routine and setup routines for A&D ADX Board
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 *
12 */
13
14#include <asm/irq.h>
15
16void init_adx_IRQ(void)
17{
18 int i;
19
20/* printk("init_adx_IRQ()\n");*/
21 /* setup irq_mask_register */
22 irq_mask_register = (unsigned short *)0xa6000008;
23
24 /* cover all external interrupt area by maskreg_irq_type
25 * (Actually, irq15 doesn't exist)
26 */
27 for (i = 0; i < 16; i++) {
28 make_maskreg_irq(i);
29 disable_irq(i);
30 }
31}
diff --git a/arch/sh/boards/adx/setup.c b/arch/sh/boards/adx/setup.c
deleted file mode 100644
index 4938d9592343..000000000000
--- a/arch/sh/boards/adx/setup.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * linux/arch/sh/board/adx/setup.c
3 *
4 * Copyright (C) 2001 A&D Co., Ltd.
5 *
6 * I/O routine and setup routines for A&D ADX Board
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 *
12 */
13
14#include <asm/machvec.h>
15#include <linux/module.h>
16
17extern void init_adx_IRQ(void);
18extern void *cf_io_base;
19
20const char *get_system_type(void)
21{
22 return "A&D ADX";
23}
24
25unsigned long adx_isa_port2addr(unsigned long offset)
26{
27 /* CompactFlash (IDE) */
28 if (((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset == 0x3f6)) {
29 return (unsigned long)cf_io_base + offset;
30 }
31
32 /* eth0 */
33 if ((offset >= 0x300) && (offset <= 0x30f)) {
34 return 0xa5000000 + offset; /* COMM BOARD (AREA1) */
35 }
36
37 return offset + 0xb0000000; /* IOBUS (AREA 4)*/
38}
39
40/*
41 * The Machine Vector
42 */
43
44struct sh_machine_vector mv_adx __initmv = {
45 .mv_nr_irqs = 48,
46 .mv_isa_port2addr = adx_isa_port2addr,
47 .mv_init_irq = init_adx_IRQ,
48};
49ALIAS_MV(adx)
50
51int __init platform_setup(void)
52{
53 /* Nothing to see here .. */
54 return 0;
55}
56
diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c
index ac946a2201c7..1ab04da36382 100644
--- a/arch/sh/boards/bigsur/irq.c
+++ b/arch/sh/boards/bigsur/irq.c
@@ -19,6 +19,7 @@
19 * IRQ functions for a Hitachi Big Sur Evaluation Board. 19 * IRQ functions for a Hitachi Big Sur Evaluation Board.
20 * 20 *
21 */ 21 */
22#undef DEBUG
22 23
23#include <linux/sched.h> 24#include <linux/sched.h>
24#include <linux/module.h> 25#include <linux/module.h>
@@ -41,10 +42,8 @@
41#undef BIGSUR_DEBUG 42#undef BIGSUR_DEBUG
42 43
43#ifdef BIGSUR_DEBUG 44#ifdef BIGSUR_DEBUG
44#define DPRINTK(args...) printk(args)
45#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args) 45#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
46#else 46#else
47#define DPRINTK(args...)
48#define DIPRINTK(n, args...) 47#define DIPRINTK(n, args...)
49#endif /* BIGSUR_DEBUG */ 48#endif /* BIGSUR_DEBUG */
50 49
@@ -60,45 +59,39 @@ extern int hd64465_irq_demux(int irq);
60/* Level 1 IRQ routines */ 59/* Level 1 IRQ routines */
61static void disable_bigsur_l1irq(unsigned int irq) 60static void disable_bigsur_l1irq(unsigned int irq)
62{ 61{
63 unsigned long flags;
64 unsigned char mask; 62 unsigned char mask;
65 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; 63 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
66 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); 64 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
67 65
68 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 66 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
69 DPRINTK("Disable L1 IRQ %d\n", irq); 67 pr_debug("Disable L1 IRQ %d\n", irq);
70 DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", 68 DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
71 mask_port, bit); 69 mask_port, bit);
72 local_irq_save(flags);
73 70
74 /* Disable IRQ - set mask bit */ 71 /* Disable IRQ - set mask bit */
75 mask = inb(mask_port) | bit; 72 mask = inb(mask_port) | bit;
76 outb(mask, mask_port); 73 outb(mask, mask_port);
77 local_irq_restore(flags);
78 return; 74 return;
79 } 75 }
80 DPRINTK("disable_bigsur_l1irq: Invalid IRQ %d\n", irq); 76 pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
81} 77}
82 78
83static void enable_bigsur_l1irq(unsigned int irq) 79static void enable_bigsur_l1irq(unsigned int irq)
84{ 80{
85 unsigned long flags;
86 unsigned char mask; 81 unsigned char mask;
87 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; 82 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
88 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); 83 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
89 84
90 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 85 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
91 DPRINTK("Enable L1 IRQ %d\n", irq); 86 pr_debug("Enable L1 IRQ %d\n", irq);
92 DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", 87 DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
93 mask_port, bit); 88 mask_port, bit);
94 local_irq_save(flags);
95 /* Enable L1 IRQ - clear mask bit */ 89 /* Enable L1 IRQ - clear mask bit */
96 mask = inb(mask_port) & ~bit; 90 mask = inb(mask_port) & ~bit;
97 outb(mask, mask_port); 91 outb(mask, mask_port);
98 local_irq_restore(flags);
99 return; 92 return;
100 } 93 }
101 DPRINTK("enable_bigsur_l1irq: Invalid IRQ %d\n", irq); 94 pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
102} 95}
103 96
104 97
@@ -126,51 +119,45 @@ static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1;
126/* Level 2 IRQ routines */ 119/* Level 2 IRQ routines */
127static void disable_bigsur_l2irq(unsigned int irq) 120static void disable_bigsur_l2irq(unsigned int irq)
128{ 121{
129 unsigned long flags;
130 unsigned char mask; 122 unsigned char mask;
131 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); 123 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
132 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; 124 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
133 125
134 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { 126 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
135 DPRINTK("Disable L2 IRQ %d\n", irq); 127 pr_debug("Disable L2 IRQ %d\n", irq);
136 DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", 128 DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
137 mask_port, bit); 129 mask_port, bit);
138 local_irq_save(flags);
139 130
140 /* Disable L2 IRQ - set mask bit */ 131 /* Disable L2 IRQ - set mask bit */
141 mask = inb(mask_port) | bit; 132 mask = inb(mask_port) | bit;
142 outb(mask, mask_port); 133 outb(mask, mask_port);
143 local_irq_restore(flags);
144 return; 134 return;
145 } 135 }
146 DPRINTK("disable_bigsur_l2irq: Invalid IRQ %d\n", irq); 136 pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
147} 137}
148 138
149static void enable_bigsur_l2irq(unsigned int irq) 139static void enable_bigsur_l2irq(unsigned int irq)
150{ 140{
151 unsigned long flags;
152 unsigned char mask; 141 unsigned char mask;
153 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); 142 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
154 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; 143 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
155 144
156 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { 145 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
157 DPRINTK("Enable L2 IRQ %d\n", irq); 146 pr_debug("Enable L2 IRQ %d\n", irq);
158 DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", 147 DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
159 mask_port, bit); 148 mask_port, bit);
160 local_irq_save(flags);
161 149
162 /* Enable L2 IRQ - clear mask bit */ 150 /* Enable L2 IRQ - clear mask bit */
163 mask = inb(mask_port) & ~bit; 151 mask = inb(mask_port) & ~bit;
164 outb(mask, mask_port); 152 outb(mask, mask_port);
165 local_irq_restore(flags);
166 return; 153 return;
167 } 154 }
168 DPRINTK("enable_bigsur_l2irq: Invalid IRQ %d\n", irq); 155 pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
169} 156}
170 157
171static void mask_and_ack_bigsur(unsigned int irq) 158static void mask_and_ack_bigsur(unsigned int irq)
172{ 159{
173 DPRINTK("mask_and_ack_bigsur IRQ %d\n", irq); 160 pr_debug("mask_and_ack_bigsur IRQ %d\n", irq);
174 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 161 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
175 disable_bigsur_l1irq(irq); 162 disable_bigsur_l1irq(irq);
176 else 163 else
@@ -179,7 +166,7 @@ static void mask_and_ack_bigsur(unsigned int irq)
179 166
180static void end_bigsur_irq(unsigned int irq) 167static void end_bigsur_irq(unsigned int irq)
181{ 168{
182 DPRINTK("end_bigsur_irq IRQ %d\n", irq); 169 pr_debug("end_bigsur_irq IRQ %d\n", irq);
183 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { 170 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
184 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 171 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
185 enable_bigsur_l1irq(irq); 172 enable_bigsur_l1irq(irq);
@@ -193,7 +180,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq)
193 u8 mask; 180 u8 mask;
194 u32 reg; 181 u32 reg;
195 182
196 DPRINTK("startup_bigsur_irq IRQ %d\n", irq); 183 pr_debug("startup_bigsur_irq IRQ %d\n", irq);
197 184
198 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 185 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
199 /* Enable the L1 IRQ */ 186 /* Enable the L1 IRQ */
@@ -218,7 +205,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq)
218 205
219static void shutdown_bigsur_irq(unsigned int irq) 206static void shutdown_bigsur_irq(unsigned int irq)
220{ 207{
221 DPRINTK("shutdown_bigsur_irq IRQ %d\n", irq); 208 pr_debug("shutdown_bigsur_irq IRQ %d\n", irq);
222 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 209 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
223 disable_bigsur_l1irq(irq); 210 disable_bigsur_l1irq(irq);
224 else 211 else
@@ -260,7 +247,7 @@ static void make_bigsur_l1isr(unsigned int irq) {
260 disable_bigsur_l1irq(irq); 247 disable_bigsur_l1irq(irq);
261 return; 248 return;
262 } 249 }
263 DPRINTK("make_bigsur_l1isr: bad irq, %d\n", irq); 250 pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq);
264 return; 251 return;
265} 252}
266 253
@@ -277,7 +264,7 @@ static void make_bigsur_l2isr(unsigned int irq) {
277 disable_bigsur_l2irq(irq); 264 disable_bigsur_l2irq(irq);
278 return; 265 return;
279 } 266 }
280 DPRINTK("make_bigsur_l2isr: bad irq, %d\n", irq); 267 pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq);
281 return; 268 return;
282} 269}
283 270
diff --git a/arch/sh/boards/bigsur/setup.c b/arch/sh/boards/bigsur/setup.c
index dfeede9da50f..9711c20fc9e4 100644
--- a/arch/sh/boards/bigsur/setup.c
+++ b/arch/sh/boards/bigsur/setup.c
@@ -41,31 +41,7 @@
41// Big Sur Init Routines 41// Big Sur Init Routines
42/*===========================================================*/ 42/*===========================================================*/
43 43
44const char *get_system_type(void) 44static void __init bigsur_setup(char **cmdline_p)
45{
46 return "Big Sur";
47}
48
49/*
50 * The Machine Vector
51 */
52extern void heartbeat_bigsur(void);
53extern void init_bigsur_IRQ(void);
54
55struct sh_machine_vector mv_bigsur __initmv = {
56 .mv_nr_irqs = NR_IRQS, // Defined in <asm/irq.h>
57
58 .mv_isa_port2addr = bigsur_isa_port2addr,
59 .mv_irq_demux = bigsur_irq_demux,
60
61 .mv_init_irq = init_bigsur_IRQ,
62#ifdef CONFIG_HEARTBEAT
63 .mv_heartbeat = heartbeat_bigsur,
64#endif
65};
66ALIAS_MV(bigsur)
67
68int __init platform_setup(void)
69{ 45{
70 /* Mask all 2nd level IRQ's */ 46 /* Mask all 2nd level IRQ's */
71 outb(-1,BIGSUR_IMR0); 47 outb(-1,BIGSUR_IMR0);
@@ -89,7 +65,24 @@ int __init platform_setup(void)
89 outw(1, BIGSUR_ETHR+0xe); 65 outw(1, BIGSUR_ETHR+0xe);
90 /* set the IO port to BIGSUR_ETHER_IOPORT */ 66 /* set the IO port to BIGSUR_ETHER_IOPORT */
91 outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2); 67 outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2);
92
93 return 0;
94} 68}
95 69
70/*
71 * The Machine Vector
72 */
73extern void heartbeat_bigsur(void);
74extern void init_bigsur_IRQ(void);
75
76struct sh_machine_vector mv_bigsur __initmv = {
77 .mv_name = "Big Sur",
78 .mv_setup = bigsur_setup,
79
80 .mv_isa_port2addr = bigsur_isa_port2addr,
81 .mv_irq_demux = bigsur_irq_demux,
82
83 .mv_init_irq = init_bigsur_IRQ,
84#ifdef CONFIG_HEARTBEAT
85 .mv_heartbeat = heartbeat_bigsur,
86#endif
87};
88ALIAS_MV(bigsur)
diff --git a/arch/sh/boards/cat68701/Makefile b/arch/sh/boards/cat68701/Makefile
deleted file mode 100644
index 52c1de0a6dfd..000000000000
--- a/arch/sh/boards/cat68701/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the CAT-68701 specific parts of the kernel
3#
4
5obj-y := setup.o irq.o
6
diff --git a/arch/sh/boards/cat68701/irq.c b/arch/sh/boards/cat68701/irq.c
deleted file mode 100644
index f9a6d185fb8b..000000000000
--- a/arch/sh/boards/cat68701/irq.c
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * linux/arch/sh/boards/cat68701/irq.c
3 *
4 * Copyright (C) 2000 Niibe Yutaka
5 * 2001 Yutaro Ebihara
6 *
7 * Setup routines for A-ONE Corp CAT-68701 SH7708 Board
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 *
13 */
14
15#include <asm/irq.h>
16
17int cat68701_irq_demux(int irq)
18{
19 if(irq==13) return 14;
20 if(irq==7) return 10;
21 return irq;
22}
23
24void init_cat68701_IRQ()
25{
26 make_imask_irq(10);
27 make_imask_irq(14);
28}
diff --git a/arch/sh/boards/cat68701/setup.c b/arch/sh/boards/cat68701/setup.c
deleted file mode 100644
index 90e5175df227..000000000000
--- a/arch/sh/boards/cat68701/setup.c
+++ /dev/null
@@ -1,85 +0,0 @@
1/*
2 * linux/arch/sh/boards/cat68701/setup.c
3 *
4 * Copyright (C) 2000 Niibe Yutaka
5 * 2001 Yutaro Ebihara
6 *
7 * Setup routines for A-ONE Corp CAT-68701 SH7708 Board
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 *
13 */
14
15#include <asm/io.h>
16#include <asm/machvec.h>
17#include <asm/mach/io.h>
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/sched.h>
21
22const char *get_system_type(void)
23{
24 return "CAT-68701";
25}
26
27#ifdef CONFIG_HEARTBEAT
28void heartbeat_cat68701()
29{
30 static unsigned int cnt = 0, period = 0 , bit = 0;
31 cnt += 1;
32 if (cnt < period) {
33 return;
34 }
35 cnt = 0;
36
37 /* Go through the points (roughly!):
38 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
39 */
40 period = 110 - ( (300<<FSHIFT)/
41 ((avenrun[0]/5) + (3<<FSHIFT)) );
42
43 if(bit){ bit=0; }else{ bit=1; }
44 outw(bit<<15,0x3fe);
45}
46#endif /* CONFIG_HEARTBEAT */
47
48unsigned long cat68701_isa_port2addr(unsigned long offset)
49{
50 /* CompactFlash (IDE) */
51 if (((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset==0x3f6))
52 return 0xba000000 + offset;
53
54 /* INPUT PORT */
55 if ((offset >= 0x3fc) && (offset <= 0x3fd))
56 return 0xb4007000 + offset;
57
58 /* OUTPUT PORT */
59 if ((offset >= 0x3fe) && (offset <= 0x3ff))
60 return 0xb4007400 + offset;
61
62 return offset + 0xb4000000; /* other I/O (EREA 5)*/
63}
64
65/*
66 * The Machine Vector
67 */
68
69struct sh_machine_vector mv_cat68701 __initmv = {
70 .mv_nr_irqs = 32,
71 .mv_isa_port2addr = cat68701_isa_port2addr,
72 .mv_irq_demux = cat68701_irq_demux,
73
74 .mv_init_irq = init_cat68701_IRQ,
75#ifdef CONFIG_HEARTBEAT
76 .mv_heartbeat = heartbeat_cat68701,
77#endif
78};
79ALIAS_MV(cat68701)
80
81int __init platform_setup(void)
82{
83 /* dummy read erea5 (CS8900A) */
84}
85
diff --git a/arch/sh/boards/cqreek/Makefile b/arch/sh/boards/cqreek/Makefile
deleted file mode 100644
index 1a788a85eba3..000000000000
--- a/arch/sh/boards/cqreek/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the CqREEK specific parts of the kernel
3#
4
5obj-y := setup.o irq.o
6
diff --git a/arch/sh/boards/cqreek/irq.c b/arch/sh/boards/cqreek/irq.c
deleted file mode 100644
index 2955adc52310..000000000000
--- a/arch/sh/boards/cqreek/irq.c
+++ /dev/null
@@ -1,128 +0,0 @@
1/* $Id: irq.c,v 1.1.2.4 2002/11/04 20:33:56 lethal Exp $
2 *
3 * arch/sh/boards/cqreek/irq.c
4 *
5 * Copyright (C) 2000 Niibe Yutaka
6 *
7 * CqREEK IDE/ISA Bridge Support.
8 *
9 */
10
11#include <linux/irq.h>
12#include <linux/init.h>
13
14#include <asm/cqreek/cqreek.h>
15#include <asm/io.h>
16#include <asm/io_generic.h>
17#include <asm/irq.h>
18#include <asm/machvec.h>
19#include <asm/machvec_init.h>
20#include <asm/rtc.h>
21
22struct cqreek_irq_data {
23 unsigned short mask_port; /* Port of Interrupt Mask Register */
24 unsigned short stat_port; /* Port of Interrupt Status Register */
25 unsigned short bit; /* Value of the bit */
26};
27static struct cqreek_irq_data cqreek_irq_data[NR_IRQS];
28
29static void disable_cqreek_irq(unsigned int irq)
30{
31 unsigned long flags;
32 unsigned short mask;
33 unsigned short mask_port = cqreek_irq_data[irq].mask_port;
34 unsigned short bit = cqreek_irq_data[irq].bit;
35
36 local_irq_save(flags);
37 /* Disable IRQ */
38 mask = inw(mask_port) & ~bit;
39 outw_p(mask, mask_port);
40 local_irq_restore(flags);
41}
42
43static void enable_cqreek_irq(unsigned int irq)
44{
45 unsigned long flags;
46 unsigned short mask;
47 unsigned short mask_port = cqreek_irq_data[irq].mask_port;
48 unsigned short bit = cqreek_irq_data[irq].bit;
49
50 local_irq_save(flags);
51 /* Enable IRQ */
52 mask = inw(mask_port) | bit;
53 outw_p(mask, mask_port);
54 local_irq_restore(flags);
55}
56
57static void mask_and_ack_cqreek(unsigned int irq)
58{
59 unsigned short stat_port = cqreek_irq_data[irq].stat_port;
60 unsigned short bit = cqreek_irq_data[irq].bit;
61
62 disable_cqreek_irq(irq);
63 /* Clear IRQ (it might be edge IRQ) */
64 inw(stat_port);
65 outw_p(bit, stat_port);
66}
67
68static void end_cqreek_irq(unsigned int irq)
69{
70 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
71 enable_cqreek_irq(irq);
72}
73
74static unsigned int startup_cqreek_irq(unsigned int irq)
75{
76 enable_cqreek_irq(irq);
77 return 0;
78}
79
80static void shutdown_cqreek_irq(unsigned int irq)
81{
82 disable_cqreek_irq(irq);
83}
84
85static struct hw_interrupt_type cqreek_irq_type = {
86 .typename = "CqREEK-IRQ",
87 .startup = startup_cqreek_irq,
88 .shutdown = shutdown_cqreek_irq,
89 .enable = enable_cqreek_irq,
90 .disable = disable_cqreek_irq,
91 .ack = mask_and_ack_cqreek,
92 .end = end_cqreek_irq
93};
94
95int cqreek_has_ide, cqreek_has_isa;
96
97/* XXX: This is just for test for my NE2000 ISA board
98 What we really need is virtualized IRQ and demultiplexer like HP600 port */
99void __init init_cqreek_IRQ(void)
100{
101 if (cqreek_has_ide) {
102 cqreek_irq_data[14].mask_port = BRIDGE_IDE_INTR_MASK;
103 cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT;
104 cqreek_irq_data[14].bit = 1;
105
106 irq_desc[14].chip = &cqreek_irq_type;
107 irq_desc[14].status = IRQ_DISABLED;
108 irq_desc[14].action = 0;
109 irq_desc[14].depth = 1;
110
111 disable_cqreek_irq(14);
112 }
113
114 if (cqreek_has_isa) {
115 cqreek_irq_data[10].mask_port = BRIDGE_ISA_INTR_MASK;
116 cqreek_irq_data[10].stat_port = BRIDGE_ISA_INTR_STAT;
117 cqreek_irq_data[10].bit = (1 << 10);
118
119 /* XXX: Err... we may need demultiplexer for ISA irq... */
120 irq_desc[10].chip = &cqreek_irq_type;
121 irq_desc[10].status = IRQ_DISABLED;
122 irq_desc[10].action = 0;
123 irq_desc[10].depth = 1;
124
125 disable_cqreek_irq(10);
126 }
127}
128
diff --git a/arch/sh/boards/cqreek/setup.c b/arch/sh/boards/cqreek/setup.c
deleted file mode 100644
index eff4ed93599f..000000000000
--- a/arch/sh/boards/cqreek/setup.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/* $Id: setup.c,v 1.5 2003/08/04 01:51:58 lethal Exp $
2 *
3 * arch/sh/kernel/setup_cqreek.c
4 *
5 * Copyright (C) 2000 Niibe Yutaka
6 *
7 * CqREEK IDE/ISA Bridge Support.
8 *
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14
15#include <asm/mach/cqreek.h>
16#include <asm/machvec.h>
17#include <asm/io.h>
18#include <asm/io_generic.h>
19#include <asm/irq.h>
20#include <asm/rtc.h>
21
22#define IDE_OFFSET 0xA4000000UL
23#define ISA_OFFSET 0xA4A00000UL
24
25const char *get_system_type(void)
26{
27 return "CqREEK";
28}
29
30static unsigned long cqreek_port2addr(unsigned long port)
31{
32 if (0x0000<=port && port<=0x0040)
33 return IDE_OFFSET + port;
34 if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6)
35 return IDE_OFFSET + port;
36
37 return ISA_OFFSET + port;
38}
39
40/*
41 * The Machine Vector
42 */
43struct sh_machine_vector mv_cqreek __initmv = {
44#if defined(CONFIG_CPU_SH4)
45 .mv_nr_irqs = 48,
46#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
47 .mv_nr_irqs = 32,
48#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
49 .mv_nr_irqs = 61,
50#endif
51
52 .mv_init_irq = init_cqreek_IRQ,
53
54 .mv_isa_port2addr = cqreek_port2addr,
55};
56ALIAS_MV(cqreek)
57
58/*
59 * Initialize the board
60 */
61void __init platform_setup(void)
62{
63 int i;
64/* udelay is not available at setup time yet... */
65#define DELAY() do {for (i=0; i<10000; i++) ctrl_inw(0xa0000000);} while(0)
66
67 if ((inw (BRIDGE_FEATURE) & 1)) { /* We have IDE interface */
68 outw_p(0, BRIDGE_IDE_INTR_LVL);
69 outw_p(0, BRIDGE_IDE_INTR_MASK);
70
71 outw_p(0, BRIDGE_IDE_CTRL);
72 DELAY();
73
74 outw_p(0x8000, BRIDGE_IDE_CTRL);
75 DELAY();
76
77 outw_p(0xffff, BRIDGE_IDE_INTR_STAT); /* Clear interrupt status */
78 outw_p(0x0f-14, BRIDGE_IDE_INTR_LVL); /* Use 14 IPR */
79 outw_p(1, BRIDGE_IDE_INTR_MASK); /* Enable interrupt */
80 cqreek_has_ide=1;
81 }
82
83 if ((inw (BRIDGE_FEATURE) & 2)) { /* We have ISA interface */
84 outw_p(0, BRIDGE_ISA_INTR_LVL);
85 outw_p(0, BRIDGE_ISA_INTR_MASK);
86
87 outw_p(0, BRIDGE_ISA_CTRL);
88 DELAY();
89 outw_p(0x8000, BRIDGE_ISA_CTRL);
90 DELAY();
91
92 outw_p(0xffff, BRIDGE_ISA_INTR_STAT); /* Clear interrupt status */
93 outw_p(0x0f-10, BRIDGE_ISA_INTR_LVL); /* Use 10 IPR */
94 outw_p(0xfff8, BRIDGE_ISA_INTR_MASK); /* Enable interrupt */
95 cqreek_has_isa=1;
96 }
97
98 printk(KERN_INFO "CqREEK Setup (IDE=%d, ISA=%d)...done\n", cqreek_has_ide, cqreek_has_isa);
99}
100
diff --git a/arch/sh/boards/dmida/Makefile b/arch/sh/boards/dmida/Makefile
deleted file mode 100644
index 75999aa0a2d9..000000000000
--- a/arch/sh/boards/dmida/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the DataMyte Industrial Digital Assistant(tm) specific parts
3# of the kernel
4#
5
6obj-y := mach.o
7
diff --git a/arch/sh/boards/dmida/mach.c b/arch/sh/boards/dmida/mach.c
deleted file mode 100644
index d03a25f989c2..000000000000
--- a/arch/sh/boards/dmida/mach.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * linux/arch/sh/boards/dmida/mach.c
3 *
4 * by Greg Banks <gbanks@pocketpenguins.com>
5 * (c) 2000 PocketPenguins Inc
6 *
7 * Derived from mach_hp600.c, which bore the message:
8 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
9 *
10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information.
12 *
13 * Machine vector for the DataMyte Industrial Digital Assistant(tm).
14 * See http://www.dmida.com
15 *
16 */
17
18#include <linux/init.h>
19
20#include <asm/machvec.h>
21#include <asm/rtc.h>
22#include <asm/machvec_init.h>
23
24#include <asm/io.h>
25#include <asm/hd64465/hd64465.h>
26#include <asm/irq.h>
27
28/*
29 * The Machine Vector
30 */
31
32struct sh_machine_vector mv_dmida __initmv = {
33 .mv_nr_irqs = HD64465_IRQ_BASE+HD64465_IRQ_NUM,
34
35 .mv_inb = hd64465_inb,
36 .mv_inw = hd64465_inw,
37 .mv_inl = hd64465_inl,
38 .mv_outb = hd64465_outb,
39 .mv_outw = hd64465_outw,
40 .mv_outl = hd64465_outl,
41
42 .mv_inb_p = hd64465_inb_p,
43 .mv_inw_p = hd64465_inw,
44 .mv_inl_p = hd64465_inl,
45 .mv_outb_p = hd64465_outb_p,
46 .mv_outw_p = hd64465_outw,
47 .mv_outl_p = hd64465_outl,
48
49 .mv_insb = hd64465_insb,
50 .mv_insw = hd64465_insw,
51 .mv_insl = hd64465_insl,
52 .mv_outsb = hd64465_outsb,
53 .mv_outsw = hd64465_outsw,
54 .mv_outsl = hd64465_outsl,
55
56 .mv_irq_demux = hd64465_irq_demux,
57};
58ALIAS_MV(dmida)
59
diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c
index b10a6b11c034..5bf01f86c20c 100644
--- a/arch/sh/boards/dreamcast/irq.c
+++ b/arch/sh/boards/dreamcast/irq.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/irq.h> 12#include <linux/irq.h>
13
14#include <asm/io.h> 13#include <asm/io.h>
15#include <asm/irq.h> 14#include <asm/irq.h>
16#include <asm/dreamcast/sysasic.h> 15#include <asm/dreamcast/sysasic.h>
@@ -26,10 +25,10 @@
26 event. 25 event.
27 26
28 There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event 27 There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event
29 types can be found in include/asm-sh/dc_sysasic.h. There are three groups 28 types can be found in include/asm-sh/dreamcast/sysasic.h. There are three
30 of EMRs that parallel the ESRs. Each EMR group corresponds to an IRQ, so 29 groups of EMRs that parallel the ESRs. Each EMR group corresponds to an
31 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 triggers 30 IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928
32 IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. 31 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9.
33 32
34 In the kernel, these events are mapped to virtual IRQs so that drivers can 33 In the kernel, these events are mapped to virtual IRQs so that drivers can
35 respond to them as they would a normal interrupt. In order to keep this 34 respond to them as they would a normal interrupt. In order to keep this
@@ -57,29 +56,23 @@
57/* Disable the hardware event by masking its bit in its EMR */ 56/* Disable the hardware event by masking its bit in its EMR */
58static inline void disable_systemasic_irq(unsigned int irq) 57static inline void disable_systemasic_irq(unsigned int irq)
59{ 58{
60 unsigned long flags;
61 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 59 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
62 __u32 mask; 60 __u32 mask;
63 61
64 local_irq_save(flags);
65 mask = inl(emr); 62 mask = inl(emr);
66 mask &= ~(1 << EVENT_BIT(irq)); 63 mask &= ~(1 << EVENT_BIT(irq));
67 outl(mask, emr); 64 outl(mask, emr);
68 local_irq_restore(flags);
69} 65}
70 66
71/* Enable the hardware event by setting its bit in its EMR */ 67/* Enable the hardware event by setting its bit in its EMR */
72static inline void enable_systemasic_irq(unsigned int irq) 68static inline void enable_systemasic_irq(unsigned int irq)
73{ 69{
74 unsigned long flags;
75 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 70 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
76 __u32 mask; 71 __u32 mask;
77 72
78 local_irq_save(flags);
79 mask = inl(emr); 73 mask = inl(emr);
80 mask |= (1 << EVENT_BIT(irq)); 74 mask |= (1 << EVENT_BIT(irq));
81 outl(mask, emr); 75 outl(mask, emr);
82 local_irq_restore(flags);
83} 76}
84 77
85/* Acknowledge a hardware event by writing its bit back to its ESR */ 78/* Acknowledge a hardware event by writing its bit back to its ESR */
diff --git a/arch/sh/boards/dreamcast/rtc.c b/arch/sh/boards/dreamcast/rtc.c
index 379de1629134..b3a876a3b859 100644
--- a/arch/sh/boards/dreamcast/rtc.c
+++ b/arch/sh/boards/dreamcast/rtc.c
@@ -1,4 +1,5 @@
1/* arch/sh/kernel/rtc-aica.c 1/*
2 * arch/sh/boards/dreamcast/rtc.c
2 * 3 *
3 * Dreamcast AICA RTC routines. 4 * Dreamcast AICA RTC routines.
4 * 5 *
@@ -10,15 +11,12 @@
10 */ 11 */
11 12
12#include <linux/time.h> 13#include <linux/time.h>
13 14#include <asm/rtc.h>
14#include <asm/io.h> 15#include <asm/io.h>
15 16
16extern void (*rtc_get_time)(struct timespec *);
17extern int (*rtc_set_time)(const time_t);
18
19/* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in 17/* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in
20 seconds to get the standard Unix Epoch when getting the time, and add 20 18 seconds) to get the standard Unix Epoch when getting the time, and add
21 years when setting the time. */ 19 20 years when setting the time. */
22#define TWENTY_YEARS ((20 * 365LU + 5) * 86400) 20#define TWENTY_YEARS ((20 * 365LU + 5) * 86400)
23 21
24/* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit 22/* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit
@@ -32,7 +30,8 @@ extern int (*rtc_set_time)(const time_t);
32 * 30 *
33 * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch. 31 * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch.
34 */ 32 */
35void aica_rtc_gettimeofday(struct timespec *ts) { 33void aica_rtc_gettimeofday(struct timespec *ts)
34{
36 unsigned long val1, val2; 35 unsigned long val1, val2;
37 36
38 do { 37 do {
@@ -55,7 +54,8 @@ void aica_rtc_gettimeofday(struct timespec *ts) {
55 * 54 *
56 * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter. 55 * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter.
57 */ 56 */
58int aica_rtc_settimeofday(const time_t secs) { 57int aica_rtc_settimeofday(const time_t secs)
58{
59 unsigned long val1, val2; 59 unsigned long val1, val2;
60 unsigned long adj = secs + TWENTY_YEARS; 60 unsigned long adj = secs + TWENTY_YEARS;
61 61
@@ -75,7 +75,7 @@ int aica_rtc_settimeofday(const time_t secs) {
75 75
76void aica_time_init(void) 76void aica_time_init(void)
77{ 77{
78 rtc_get_time = aica_rtc_gettimeofday; 78 rtc_sh_get_time = aica_rtc_gettimeofday;
79 rtc_set_time = aica_rtc_settimeofday; 79 rtc_sh_set_time = aica_rtc_settimeofday;
80} 80}
81 81
diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c
index 0027b80a2343..f13017eeeb27 100644
--- a/arch/sh/boards/dreamcast/setup.c
+++ b/arch/sh/boards/dreamcast/setup.c
@@ -22,41 +22,21 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/device.h> 24#include <linux/device.h>
25
26#include <asm/io.h> 25#include <asm/io.h>
27#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/rtc.h>
28#include <asm/machvec.h> 28#include <asm/machvec.h>
29#include <asm/machvec_init.h>
30#include <asm/mach/sysasic.h> 29#include <asm/mach/sysasic.h>
31 30
32extern struct hw_interrupt_type systemasic_int; 31extern struct hw_interrupt_type systemasic_int;
33/* XXX: Move this into it's proper header. */
34extern void (*board_time_init)(void);
35extern void aica_time_init(void); 32extern void aica_time_init(void);
36extern int gapspci_init(void); 33extern int gapspci_init(void);
37extern int systemasic_irq_demux(int); 34extern int systemasic_irq_demux(int);
38 35
39void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, int); 36void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
40int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t); 37int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t);
41 38
42const char *get_system_type(void) 39static void __init dreamcast_setup(char **cmdline_p)
43{
44 return "Sega Dreamcast";
45}
46
47struct sh_machine_vector mv_dreamcast __initmv = {
48 .mv_nr_irqs = NR_IRQS,
49
50 .mv_irq_demux = systemasic_irq_demux,
51
52#ifdef CONFIG_PCI
53 .mv_consistent_alloc = dreamcast_consistent_alloc,
54 .mv_consistent_free = dreamcast_consistent_free,
55#endif
56};
57ALIAS_MV(dreamcast)
58
59int __init platform_setup(void)
60{ 40{
61 int i; 41 int i;
62 42
@@ -78,6 +58,16 @@ int __init platform_setup(void)
78 if (gapspci_init() < 0) 58 if (gapspci_init() < 0)
79 printk(KERN_WARNING "GAPSPCI was not detected.\n"); 59 printk(KERN_WARNING "GAPSPCI was not detected.\n");
80#endif 60#endif
81
82 return 0;
83} 61}
62
63struct sh_machine_vector mv_dreamcast __initmv = {
64 .mv_name = "Sega Dreamcast",
65 .mv_setup = dreamcast_setup,
66 .mv_irq_demux = systemasic_irq_demux,
67
68#ifdef CONFIG_PCI
69 .mv_consistent_alloc = dreamcast_consistent_alloc,
70 .mv_consistent_free = dreamcast_consistent_free,
71#endif
72};
73ALIAS_MV(dreamcast)
diff --git a/arch/sh/boards/ec3104/setup.c b/arch/sh/boards/ec3104/setup.c
index 4b3ef16a0e96..902bc975a13e 100644
--- a/arch/sh/boards/ec3104/setup.c
+++ b/arch/sh/boards/ec3104/setup.c
@@ -21,22 +21,36 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/types.h> 23#include <linux/types.h>
24
25#include <asm/io.h> 24#include <asm/io.h>
26#include <asm/irq.h> 25#include <asm/irq.h>
27#include <asm/machvec.h> 26#include <asm/machvec.h>
28#include <asm/mach/ec3104.h> 27#include <asm/mach/ec3104.h>
29 28
30const char *get_system_type(void) 29static void __init ec3104_setup(char **cmdline_p)
31{ 30{
32 return "EC3104"; 31 char str[8];
32 int i;
33
34 for (i=0; i<8; i++)
35 str[i] = ctrl_readb(EC3104_BASE + i);
36
37 for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
38 irq_desc[i].handler = &ec3104_int;
39
40 printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
41 str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
42
43 /* mask all interrupts. this should have been done by the boot
44 * loader for us but we want to be sure ... */
45 ctrl_writel(0xffffffff, EC3104_IMR);
33} 46}
34 47
35/* 48/*
36 * The Machine Vector 49 * The Machine Vector
37 */ 50 */
38
39struct sh_machine_vector mv_ec3104 __initmv = { 51struct sh_machine_vector mv_ec3104 __initmv = {
52 .mv_name = "EC3104",
53 .mv_setup = ec3104_setup,
40 .mv_nr_irqs = 96, 54 .mv_nr_irqs = 96,
41 55
42 .mv_inb = ec3104_inb, 56 .mv_inb = ec3104_inb,
@@ -48,31 +62,4 @@ struct sh_machine_vector mv_ec3104 __initmv = {
48 62
49 .mv_irq_demux = ec3104_irq_demux, 63 .mv_irq_demux = ec3104_irq_demux,
50}; 64};
51
52ALIAS_MV(ec3104) 65ALIAS_MV(ec3104)
53
54int __init platform_setup(void)
55{
56 char str[8];
57 int i;
58
59 if (0)
60 return 0;
61
62 for (i=0; i<8; i++)
63 str[i] = ctrl_readb(EC3104_BASE + i);
64
65 for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
66 irq_desc[i].chip = &ec3104_int;
67
68 printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
69 str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
70
71
72 /* mask all interrupts. this should have been done by the boot
73 * loader for us but we want to be sure ... */
74 ctrl_writel(0xffffffff, EC3104_IMR);
75
76 return 0;
77}
78
diff --git a/arch/sh/boards/harp/Makefile b/arch/sh/boards/harp/Makefile
deleted file mode 100644
index eb753d31812e..000000000000
--- a/arch/sh/boards/harp/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for STMicroelectronics board specific parts of the kernel
3#
4
5obj-y := irq.o setup.o mach.o led.o
6
7obj-$(CONFIG_PCI) += pcidma.o
8
diff --git a/arch/sh/boards/harp/irq.c b/arch/sh/boards/harp/irq.c
deleted file mode 100644
index 96bb41c9fc55..000000000000
--- a/arch/sh/boards/harp/irq.c
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Looks after interrupts on the HARP board.
8 *
9 * Bases on the IPR irq system
10 */
11
12#include <linux/init.h>
13#include <linux/irq.h>
14
15#include <asm/system.h>
16#include <asm/io.h>
17#include <asm/harp/harp.h>
18
19
20#define NUM_EXTERNAL_IRQS 16
21
22// Early versions of the STB1 Overdrive required this nasty frig
23//#define INVERT_INTMASK_WRITES
24
25static void enable_harp_irq(unsigned int irq);
26static void disable_harp_irq(unsigned int irq);
27
28/* shutdown is same as "disable" */
29#define shutdown_harp_irq disable_harp_irq
30
31static void mask_and_ack_harp(unsigned int);
32static void end_harp_irq(unsigned int irq);
33
34static unsigned int startup_harp_irq(unsigned int irq)
35{
36 enable_harp_irq(irq);
37 return 0; /* never anything pending */
38}
39
40static struct hw_interrupt_type harp_irq_type = {
41 .typename = "Harp-IRQ",
42 .startup = startup_harp_irq,
43 .shutdown = shutdown_harp_irq,
44 .enable = enable_harp_irq,
45 .disable = disable_harp_irq,
46 .ack = mask_and_ack_harp,
47 .end = end_harp_irq
48};
49
50static void disable_harp_irq(unsigned int irq)
51{
52 unsigned val, flags;
53 unsigned maskReg;
54 unsigned mask;
55 int pri;
56
57 if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
58 return;
59
60 pri = 15 - irq;
61
62 if (pri < 8) {
63 maskReg = EPLD_INTMASK0;
64 } else {
65 maskReg = EPLD_INTMASK1;
66 pri -= 8;
67 }
68
69 local_irq_save(flags);
70 mask = ctrl_inl(maskReg);
71 mask &= (~(1 << pri));
72#if defined(INVERT_INTMASK_WRITES)
73 mask ^= 0xff;
74#endif
75 ctrl_outl(mask, maskReg);
76 local_irq_restore(flags);
77}
78
79static void enable_harp_irq(unsigned int irq)
80{
81 unsigned flags;
82 unsigned maskReg;
83 unsigned mask;
84 int pri;
85
86 if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
87 return;
88
89 pri = 15 - irq;
90
91 if (pri < 8) {
92 maskReg = EPLD_INTMASK0;
93 } else {
94 maskReg = EPLD_INTMASK1;
95 pri -= 8;
96 }
97
98 local_irq_save(flags);
99 mask = ctrl_inl(maskReg);
100
101
102 mask |= (1 << pri);
103
104#if defined(INVERT_INTMASK_WRITES)
105 mask ^= 0xff;
106#endif
107 ctrl_outl(mask, maskReg);
108
109 local_irq_restore(flags);
110}
111
112/* This functions sets the desired irq handler to be an overdrive type */
113static void __init make_harp_irq(unsigned int irq)
114{
115 disable_irq_nosync(irq);
116 irq_desc[irq].chip = &harp_irq_type;
117 disable_harp_irq(irq);
118}
119
120static void mask_and_ack_harp(unsigned int irq)
121{
122 disable_harp_irq(irq);
123}
124
125static void end_harp_irq(unsigned int irq)
126{
127 enable_harp_irq(irq);
128}
129
130void __init init_harp_irq(void)
131{
132 int i;
133
134#if !defined(INVERT_INTMASK_WRITES)
135 // On the harp these are set to enable an interrupt
136 ctrl_outl(0x00, EPLD_INTMASK0);
137 ctrl_outl(0x00, EPLD_INTMASK1);
138#else
139 // On the Overdrive the data is inverted before being stored in the reg
140 ctrl_outl(0xff, EPLD_INTMASK0);
141 ctrl_outl(0xff, EPLD_INTMASK1);
142#endif
143
144 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) {
145 make_harp_irq(i);
146 }
147}
diff --git a/arch/sh/boards/harp/led.c b/arch/sh/boards/harp/led.c
deleted file mode 100644
index aeb7b392b190..000000000000
--- a/arch/sh/boards/harp/led.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * linux/arch/sh/stboards/led.c
3 *
4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * This file contains ST40STB1 HARP and compatible code.
10 */
11
12#include <asm/io.h>
13#include <asm/harp/harp.h>
14
15/* Harp: Flash LD10 (front pannel) connected to EPLD (IC8) */
16/* Overdrive: Flash LD1 (front panel) connected to EPLD (IC4) */
17/* Works for HARP and overdrive */
18static void mach_led(int position, int value)
19{
20 if (value) {
21 ctrl_outl(EPLD_LED_ON, EPLD_LED);
22 } else {
23 ctrl_outl(EPLD_LED_OFF, EPLD_LED);
24 }
25}
26
27#ifdef CONFIG_HEARTBEAT
28
29#include <linux/sched.h>
30
31/* acts like an actual heart beat -- ie thump-thump-pause... */
32void heartbeat_harp(void)
33{
34 static unsigned cnt = 0, period = 0, dist = 0;
35
36 if (cnt == 0 || cnt == dist)
37 mach_led( -1, 1);
38 else if (cnt == 7 || cnt == dist+7)
39 mach_led( -1, 0);
40
41 if (++cnt > period) {
42 cnt = 0;
43 /* The hyperbolic function below modifies the heartbeat period
44 * length in dependency of the current (5min) load. It goes
45 * through the points f(0)=126, f(1)=86, f(5)=51,
46 * f(inf)->30. */
47 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
48 dist = period / 4;
49 }
50}
51#endif
diff --git a/arch/sh/boards/harp/mach.c b/arch/sh/boards/harp/mach.c
deleted file mode 100644
index a946dd1674ca..000000000000
--- a/arch/sh/boards/harp/mach.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * linux/arch/sh/boards/harp/mach.c
3 *
4 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the STMicroelectronics STB1 HARP and compatible boards
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/machvec_init.h>
17#include <asm/hd64465/io.h>
18#include <asm/hd64465/hd64465.h>
19
20void setup_harp(void);
21void init_harp_irq(void);
22void heartbeat_harp(void);
23
24/*
25 * The Machine Vector
26 */
27
28struct sh_machine_vector mv_harp __initmv = {
29 .mv_nr_irqs = 89 + HD64465_IRQ_NUM,
30
31 .mv_inb = hd64465_inb,
32 .mv_inw = hd64465_inw,
33 .mv_inl = hd64465_inl,
34 .mv_outb = hd64465_outb,
35 .mv_outw = hd64465_outw,
36 .mv_outl = hd64465_outl,
37
38 .mv_inb_p = hd64465_inb_p,
39 .mv_inw_p = hd64465_inw,
40 .mv_inl_p = hd64465_inl,
41 .mv_outb_p = hd64465_outb_p,
42 .mv_outw_p = hd64465_outw,
43 .mv_outl_p = hd64465_outl,
44
45 .mv_insb = hd64465_insb,
46 .mv_insw = hd64465_insw,
47 .mv_insl = hd64465_insl,
48 .mv_outsb = hd64465_outsb,
49 .mv_outsw = hd64465_outsw,
50 .mv_outsl = hd64465_outsl,
51
52 .mv_isa_port2addr = hd64465_isa_port2addr,
53
54#ifdef CONFIG_PCI
55 .mv_init_irq = init_harp_irq,
56#endif
57#ifdef CONFIG_HEARTBEAT
58 .mv_heartbeat = heartbeat_harp,
59#endif
60};
61
62ALIAS_MV(harp)
diff --git a/arch/sh/boards/harp/pcidma.c b/arch/sh/boards/harp/pcidma.c
deleted file mode 100644
index 475311390fd6..000000000000
--- a/arch/sh/boards/harp/pcidma.c
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Dynamic DMA mapping support.
8 */
9
10#include <linux/types.h>
11#include <linux/mm.h>
12#include <linux/string.h>
13#include <linux/pci.h>
14#include <asm/io.h>
15#include <asm/addrspace.h>
16
17
18void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
19 dma_addr_t * dma_handle)
20{
21 void *ret;
22 int gfp = GFP_ATOMIC;
23
24 ret = (void *) __get_free_pages(gfp, get_order(size));
25
26 if (ret != NULL) {
27 /* Is it neccessary to do the memset? */
28 memset(ret, 0, size);
29 *dma_handle = virt_to_bus(ret);
30 }
31 /* We must flush the cache before we pass it on to the device */
32 flush_cache_all();
33 return P2SEGADDR(ret);
34}
35
36void pci_free_consistent(struct pci_dev *hwdev, size_t size,
37 void *vaddr, dma_addr_t dma_handle)
38{
39 unsigned long p1addr=P1SEGADDR((unsigned long)vaddr);
40
41 free_pages(p1addr, get_order(size));
42}
diff --git a/arch/sh/boards/harp/setup.c b/arch/sh/boards/harp/setup.c
deleted file mode 100644
index 886e450ab63e..000000000000
--- a/arch/sh/boards/harp/setup.c
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * arch/sh/stboard/setup.c
3 *
4 * Copyright (C) 2001 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * STMicroelectronics ST40STB1 HARP and compatible support.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <asm/io.h>
15#include <asm/harp/harp.h>
16
17const char *get_system_type(void)
18{
19 return "STB1 Harp";
20}
21
22/*
23 * Initialize the board
24 */
25int __init platform_setup(void)
26{
27#ifdef CONFIG_SH_STB1_HARP
28 unsigned long ic8_version, ic36_version;
29
30 ic8_version = ctrl_inl(EPLD_REVID2);
31 ic36_version = ctrl_inl(EPLD_REVID1);
32
33 printk("STMicroelectronics STB1 HARP initialisaton\n");
34 printk("EPLD versions: IC8: %d.%02d, IC36: %d.%02d\n",
35 (ic8_version >> 4) & 0xf, ic8_version & 0xf,
36 (ic36_version >> 4) & 0xf, ic36_version & 0xf);
37#elif defined(CONFIG_SH_STB1_OVERDRIVE)
38 unsigned long version;
39
40 version = ctrl_inl(EPLD_REVID);
41
42 printk("STMicroelectronics STB1 Overdrive initialisaton\n");
43 printk("EPLD version: %d.%02d\n",
44 (version >> 4) & 0xf, version & 0xf);
45#else
46#error Undefined machine
47#endif
48
49 /* Currently all STB1 chips have problems with the sleep instruction,
50 * so disable it here.
51 */
52 disable_hlt();
53
54 return 0;
55}
56
57/*
58 * pcibios_map_platform_irq
59 *
60 * This is board specific and returns the IRQ for a given PCI device.
61 * It is used by the PCI code (arch/sh/kernel/st40_pci*)
62 *
63 */
64
65#define HARP_PCI_IRQ 1
66#define HARP_BRIDGE_IRQ 2
67#define OVERDRIVE_SLOT0_IRQ 0
68
69
70int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
71{
72 switch (slot) {
73#ifdef CONFIG_SH_STB1_HARP
74 case 2: /*This is the PCI slot on the */
75 return HARP_PCI_IRQ;
76 case 1: /* this is the bridge */
77 return HARP_BRIDGE_IRQ;
78#elif defined(CONFIG_SH_STB1_OVERDRIVE)
79 case 1:
80 case 2:
81 case 3:
82 return slot - 1;
83#else
84#error Unknown board
85#endif
86 default:
87 return -1;
88 }
89}
90
diff --git a/arch/sh/boards/hp6xx/Makefile b/arch/sh/boards/hp6xx/Makefile
index 927fe0aa5dfa..ff1b7f5b4e91 100644
--- a/arch/sh/boards/hp6xx/Makefile
+++ b/arch/sh/boards/hp6xx/Makefile
@@ -2,5 +2,6 @@
2# Makefile for the HP6xx specific parts of the kernel 2# Makefile for the HP6xx specific parts of the kernel
3# 3#
4 4
5obj-y := mach.o setup.o 5obj-y := setup.o
6 6obj-$(CONFIG_PM) += pm.o pm_wakeup.o
7obj-$(CONFIG_APM) += hp6xx_apm.o
diff --git a/arch/sh/boards/hp6xx/hp6xx_apm.c b/arch/sh/boards/hp6xx/hp6xx_apm.c
new file mode 100644
index 000000000000..ad0e712c29f6
--- /dev/null
+++ b/arch/sh/boards/hp6xx/hp6xx_apm.c
@@ -0,0 +1,123 @@
1/*
2 * bios-less APM driver for hp680
3 *
4 * Copyright 2005 (c) Andriy Skulysh <askulysh@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License.
8 */
9#include <linux/config.h>
10#include <linux/module.h>
11#include <linux/apm_bios.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <asm/io.h>
16#include <asm/apm.h>
17#include <asm/adc.h>
18#include <asm/hp6xx/hp6xx.h>
19
20#define SH7709_PGDR 0xa400012c
21
22#define APM_CRITICAL 10
23#define APM_LOW 30
24
25#define HP680_BATTERY_MAX 875
26#define HP680_BATTERY_MIN 600
27#define HP680_BATTERY_AC_ON 900
28
29#define MODNAME "hp6x0_apm"
30
31static int hp6x0_apm_get_info(char *buf, char **start, off_t fpos, int length)
32{
33 u8 pgdr;
34 char *p;
35 int battery_status;
36 int battery_flag;
37 int ac_line_status;
38 int time_units = APM_BATTERY_LIFE_UNKNOWN;
39
40 int battery = adc_single(ADC_CHANNEL_BATTERY);
41 int backup = adc_single(ADC_CHANNEL_BACKUP);
42 int charging = adc_single(ADC_CHANNEL_CHARGE);
43 int percentage;
44
45 percentage = 100 * (battery - HP680_BATTERY_MIN) /
46 (HP680_BATTERY_MAX - HP680_BATTERY_MIN);
47
48 ac_line_status = (battery > HP680_BATTERY_AC_ON) ?
49 APM_AC_ONLINE : APM_AC_OFFLINE;
50
51 p = buf;
52
53 pgdr = ctrl_inb(SH7709_PGDR);
54 if (pgdr & PGDR_MAIN_BATTERY_OUT) {
55 battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
56 battery_flag = 0x80;
57 percentage = -1;
58 } else if (charging < 8 ) {
59 battery_status = APM_BATTERY_STATUS_CHARGING;
60 battery_flag = 0x08;
61 ac_line_status = 0xff;
62 } else if (percentage <= APM_CRITICAL) {
63 battery_status = APM_BATTERY_STATUS_CRITICAL;
64 battery_flag = 0x04;
65 } else if (percentage <= APM_LOW) {
66 battery_status = APM_BATTERY_STATUS_LOW;
67 battery_flag = 0x02;
68 } else {
69 battery_status = APM_BATTERY_STATUS_HIGH;
70 battery_flag = 0x01;
71 }
72
73 p += sprintf(p, "1.0 1.2 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n",
74 APM_32_BIT_SUPPORT,
75 ac_line_status,
76 battery_status,
77 battery_flag,
78 percentage,
79 time_units,
80 "min");
81 p += sprintf(p, "bat=%d backup=%d charge=%d\n",
82 battery, backup, charging);
83
84 return p - buf;
85}
86
87static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev, struct pt_regs *regs)
88{
89 if (!apm_suspended)
90 apm_queue_event(APM_USER_SUSPEND);
91
92 return IRQ_HANDLED;
93}
94
95static int __init hp6x0_apm_init(void)
96{
97 int ret;
98
99 ret = request_irq(HP680_BTN_IRQ, hp6x0_apm_interrupt,
100 SA_INTERRUPT, MODNAME, 0);
101 if (unlikely(ret < 0)) {
102 printk(KERN_ERR MODNAME ": IRQ %d request failed\n",
103 HP680_BTN_IRQ);
104 return ret;
105 }
106
107 apm_get_info = hp6x0_apm_get_info;
108
109 return ret;
110}
111
112static void __exit hp6x0_apm_exit(void)
113{
114 free_irq(HP680_BTN_IRQ, 0);
115 apm_get_info = 0;
116}
117
118module_init(hp6x0_apm_init);
119module_exit(hp6x0_apm_exit);
120
121MODULE_AUTHOR("Adriy Skulysh");
122MODULE_DESCRIPTION("hp6xx Advanced Power Management");
123MODULE_LICENSE("GPL");
diff --git a/arch/sh/boards/hp6xx/pm.c b/arch/sh/boards/hp6xx/pm.c
new file mode 100644
index 000000000000..0e501bcbd7a9
--- /dev/null
+++ b/arch/sh/boards/hp6xx/pm.c
@@ -0,0 +1,88 @@
1/*
2 * hp6x0 Power Management Routines
3 *
4 * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License.
8 */
9#include <linux/config.h>
10#include <linux/init.h>
11#include <linux/suspend.h>
12#include <linux/errno.h>
13#include <linux/time.h>
14#include <asm/io.h>
15#include <asm/hd64461.h>
16#include <asm/hp6xx/hp6xx.h>
17#include <asm/cpu/dac.h>
18#include <asm/pm.h>
19
20#define STBCR 0xffffff82
21#define STBCR2 0xffffff88
22
23static int hp6x0_pm_enter(suspend_state_t state)
24{
25 u8 stbcr, stbcr2;
26#ifdef CONFIG_HD64461_ENABLER
27 u8 scr;
28 u16 hd64461_stbcr;
29#endif
30
31 if (state != PM_SUSPEND_MEM)
32 return -EINVAL;
33
34#ifdef CONFIG_HD64461_ENABLER
35 outb(0, HD64461_PCC1CSCIER);
36
37 scr = inb(HD64461_PCC1SCR);
38 scr |= HD64461_PCCSCR_VCC1;
39 outb(scr, HD64461_PCC1SCR);
40
41 hd64461_stbcr = inw(HD64461_STBCR);
42 hd64461_stbcr |= HD64461_STBCR_SPC1ST;
43 outw(hd64461_stbcr, HD64461_STBCR);
44#endif
45
46 ctrl_outb(0x1f, DACR);
47
48 stbcr = ctrl_inb(STBCR);
49 ctrl_outb(0x01, STBCR);
50
51 stbcr2 = ctrl_inb(STBCR2);
52 ctrl_outb(0x7f , STBCR2);
53
54 outw(0xf07f, HD64461_SCPUCR);
55
56 pm_enter();
57
58 outw(0, HD64461_SCPUCR);
59 ctrl_outb(stbcr, STBCR);
60 ctrl_outb(stbcr2, STBCR2);
61
62#ifdef CONFIG_HD64461_ENABLER
63 hd64461_stbcr = inw(HD64461_STBCR);
64 hd64461_stbcr &= ~HD64461_STBCR_SPC1ST;
65 outw(hd64461_stbcr, HD64461_STBCR);
66
67 outb(0x4c, HD64461_PCC1CSCIER);
68 outb(0x00, HD64461_PCC1CSCR);
69#endif
70
71 return 0;
72}
73
74/*
75 * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
76 */
77static struct pm_ops hp6x0_pm_ops = {
78 .pm_disk_mode = PM_DISK_FIRMWARE,
79 .enter = hp6x0_pm_enter,
80};
81
82static int __init hp6x0_pm_init(void)
83{
84 pm_set_ops(&hp6x0_pm_ops);
85 return 0;
86}
87
88late_initcall(hp6x0_pm_init);
diff --git a/arch/sh/boards/hp6xx/pm_wakeup.S b/arch/sh/boards/hp6xx/pm_wakeup.S
new file mode 100644
index 000000000000..45e9bf0b9115
--- /dev/null
+++ b/arch/sh/boards/hp6xx/pm_wakeup.S
@@ -0,0 +1,58 @@
1/*
2 * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 */
9
10#include <linux/linkage.h>
11#include <asm/cpu/mmu_context.h>
12
13#define k0 r0
14#define k1 r1
15#define k2 r2
16#define k3 r3
17#define k4 r4
18
19/*
20 * Kernel mode register usage:
21 * k0 scratch
22 * k1 scratch
23 * k2 scratch (Exception code)
24 * k3 scratch (Return address)
25 * k4 scratch
26 * k5 reserved
27 * k6 Global Interrupt Mask (0--15 << 4)
28 * k7 CURRENT_THREAD_INFO (pointer to current thread info)
29 */
30
31ENTRY(wakeup_start)
32! clear STBY bit
33 mov #-126, k2
34 and #127, k0
35 mov.b k0, @k2
36! enable refresh
37 mov.l 5f, k1
38 mov.w 6f, k0
39 mov.w k0, @k1
40! jump to handler
41 mov.l 2f, k2
42 mov.l 3f, k3
43 mov.l @k2, k2
44
45 mov.l 4f, k1
46 jmp @k1
47 nop
48
49 .align 2
501: .long EXPEVT
512: .long INTEVT
523: .long ret_from_irq
534: .long handle_exception
545: .long 0xffffff68
556: .word 0x0524
56
57ENTRY(wakeup_end)
58 nop
diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c
index 71f315663cc9..60ab17ad6054 100644
--- a/arch/sh/boards/hp6xx/setup.c
+++ b/arch/sh/boards/hp6xx/setup.c
@@ -8,22 +8,22 @@
8 * 8 *
9 * Setup code for an HP680 (internal peripherials only) 9 * Setup code for an HP680 (internal peripherials only)
10 */ 10 */
11 11#include <linux/types.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/io.h>
14#include <asm/hd64461.h> 13#include <asm/hd64461.h>
14#include <asm/io.h>
15#include <asm/irq.h>
15#include <asm/hp6xx/hp6xx.h> 16#include <asm/hp6xx/hp6xx.h>
16#include <asm/cpu/dac.h> 17#include <asm/cpu/dac.h>
17 18
18const char *get_system_type(void) 19#define SCPCR 0xa4000116
19{ 20#define SCPDR 0xa4000136
20 return "HP6xx";
21}
22 21
23int __init platform_setup(void) 22static void __init hp6xx_setup(char **cmdline_p)
24{ 23{
25 u8 v8; 24 u8 v8;
26 u16 v; 25 u16 v;
26
27 v = inw(HD64461_STBCR); 27 v = inw(HD64461_STBCR);
28 v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | 28 v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST |
29 HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST | 29 HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST |
@@ -50,5 +50,51 @@ int __init platform_setup(void)
50 v8 &= ~DACR_DAE; 50 v8 &= ~DACR_DAE;
51 ctrl_outb(v8,DACR); 51 ctrl_outb(v8,DACR);
52 52
53 return 0; 53 v8 = ctrl_inb(SCPDR);
54 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y;
55 v8 &= ~SCPDR_TS_SCAN_ENABLE;
56 ctrl_outb(v8, SCPDR);
57
58 v = ctrl_inw(SCPCR);
59 v &= ~SCPCR_TS_MASK;
60 v |= SCPCR_TS_ENABLE;
61 ctrl_outw(v, SCPCR);
54} 62}
63
64/*
65 * XXX: This is stupid, we should have a generic machine vector for the cchips
66 * and just wrap the platform setup code in to this, as it's the only thing
67 * that ends up being different.
68 */
69struct sh_machine_vector mv_hp6xx __initmv = {
70 .mv_name = "hp6xx",
71 .mv_setup = hp6xx_setup,
72 .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM,
73
74 .mv_inb = hd64461_inb,
75 .mv_inw = hd64461_inw,
76 .mv_inl = hd64461_inl,
77 .mv_outb = hd64461_outb,
78 .mv_outw = hd64461_outw,
79 .mv_outl = hd64461_outl,
80
81 .mv_inb_p = hd64461_inb_p,
82 .mv_inw_p = hd64461_inw,
83 .mv_inl_p = hd64461_inl,
84 .mv_outb_p = hd64461_outb_p,
85 .mv_outw_p = hd64461_outw,
86 .mv_outl_p = hd64461_outl,
87
88 .mv_insb = hd64461_insb,
89 .mv_insw = hd64461_insw,
90 .mv_insl = hd64461_insl,
91 .mv_outsb = hd64461_outsb,
92 .mv_outsw = hd64461_outsw,
93 .mv_outsl = hd64461_outsl,
94
95 .mv_readw = hd64461_readw,
96 .mv_writew = hd64461_writew,
97
98 .mv_irq_demux = hd64461_irq_demux,
99};
100ALIAS_MV(hp6xx)
diff --git a/arch/sh/boards/landisk/Makefile b/arch/sh/boards/landisk/Makefile
new file mode 100644
index 000000000000..89e4beb2ad47
--- /dev/null
+++ b/arch/sh/boards/landisk/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for I-O DATA DEVICE, INC. "LANDISK Series"
3#
4
5obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o
diff --git a/arch/sh/boards/landisk/io.c b/arch/sh/boards/landisk/io.c
new file mode 100644
index 000000000000..92498b4947d5
--- /dev/null
+++ b/arch/sh/boards/landisk/io.c
@@ -0,0 +1,250 @@
1/*
2 * arch/sh/boards/landisk/io.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c.
6 *
7 * I/O routine for I-O Data Device, Inc. LANDISK.
8 *
9 * Initial version only to support LAN access; some
10 * placeholder code from io_landisk.c left in with the
11 * expectation of later SuperIO and PCMCIA access.
12 */
13/*
14 * modifed by kogiidena
15 * 2005.03.03
16 */
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <linux/pci.h>
20#include <asm/landisk/iodata_landisk.h>
21#include <asm/addrspace.h>
22#include <asm/io.h>
23
24extern void *area5_io_base; /* Area 5 I/O Base address */
25extern void *area6_io_base; /* Area 6 I/O Base address */
26
27static inline unsigned long port2adr(unsigned int port)
28{
29 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
30 if (port == 0x3f6)
31 return ((unsigned long)area5_io_base + 0x2c);
32 else
33 return ((unsigned long)area5_io_base + PA_PIDE_OFFSET +
34 ((port - 0x1f0) << 1));
35 else if ((0x170 <= port && port < 0x178) || port == 0x376)
36 if (port == 0x376)
37 return ((unsigned long)area6_io_base + 0x2c);
38 else
39 return ((unsigned long)area6_io_base + PA_SIDE_OFFSET +
40 ((port - 0x170) << 1));
41 else
42 maybebadio((unsigned long)port);
43
44 return port;
45}
46
47/*
48 * General outline: remap really low stuff [eventually] to SuperIO,
49 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
50 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
51 * should be way beyond the window, and is used w/o translation for
52 * compatibility.
53 */
54u8 landisk_inb(unsigned long port)
55{
56 if (PXSEG(port))
57 return ctrl_inb(port);
58 else if (is_pci_ioaddr(port))
59 return ctrl_inb(pci_ioaddr(port));
60
61 return ctrl_inw(port2adr(port)) & 0xff;
62}
63
64u8 landisk_inb_p(unsigned long port)
65{
66 u8 v;
67
68 if (PXSEG(port))
69 v = ctrl_inb(port);
70 else if (is_pci_ioaddr(port))
71 v = ctrl_inb(pci_ioaddr(port));
72 else
73 v = ctrl_inw(port2adr(port)) & 0xff;
74
75 ctrl_delay();
76
77 return v;
78}
79
80u16 landisk_inw(unsigned long port)
81{
82 if (PXSEG(port))
83 return ctrl_inw(port);
84 else if (is_pci_ioaddr(port))
85 return ctrl_inw(pci_ioaddr(port));
86 else
87 maybebadio(port);
88
89 return 0;
90}
91
92u32 landisk_inl(unsigned long port)
93{
94 if (PXSEG(port))
95 return ctrl_inl(port);
96 else if (is_pci_ioaddr(port))
97 return ctrl_inl(pci_ioaddr(port));
98 else
99 maybebadio(port);
100
101 return 0;
102}
103
104void landisk_outb(u8 value, unsigned long port)
105{
106 if (PXSEG(port))
107 ctrl_outb(value, port);
108 else if (is_pci_ioaddr(port))
109 ctrl_outb(value, pci_ioaddr(port));
110 else
111 ctrl_outw(value, port2adr(port));
112}
113
114void landisk_outb_p(u8 value, unsigned long port)
115{
116 if (PXSEG(port))
117 ctrl_outb(value, port);
118 else if (is_pci_ioaddr(port))
119 ctrl_outb(value, pci_ioaddr(port));
120 else
121 ctrl_outw(value, port2adr(port));
122 ctrl_delay();
123}
124
125void landisk_outw(u16 value, unsigned long port)
126{
127 if (PXSEG(port))
128 ctrl_outw(value, port);
129 else if (is_pci_ioaddr(port))
130 ctrl_outw(value, pci_ioaddr(port));
131 else
132 maybebadio(port);
133}
134
135void landisk_outl(u32 value, unsigned long port)
136{
137 if (PXSEG(port))
138 ctrl_outl(value, port);
139 else if (is_pci_ioaddr(port))
140 ctrl_outl(value, pci_ioaddr(port));
141 else
142 maybebadio(port);
143}
144
145void landisk_insb(unsigned long port, void *dst, unsigned long count)
146{
147 volatile u16 *p;
148 u8 *buf = dst;
149
150 if (PXSEG(port)) {
151 while (count--)
152 *buf++ = *(volatile u8 *)port;
153 } else if (is_pci_ioaddr(port)) {
154 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
155
156 while (count--)
157 *buf++ = *bp;
158 } else {
159 p = (volatile u16 *)port2adr(port);
160 while (count--)
161 *buf++ = *p & 0xff;
162 }
163}
164
165void landisk_insw(unsigned long port, void *dst, unsigned long count)
166{
167 volatile u16 *p;
168 u16 *buf = dst;
169
170 if (PXSEG(port))
171 p = (volatile u16 *)port;
172 else if (is_pci_ioaddr(port))
173 p = (volatile u16 *)pci_ioaddr(port);
174 else
175 p = (volatile u16 *)port2adr(port);
176 while (count--)
177 *buf++ = *p;
178}
179
180void landisk_insl(unsigned long port, void *dst, unsigned long count)
181{
182 u32 *buf = dst;
183
184 if (is_pci_ioaddr(port)) {
185 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
186
187 while (count--)
188 *buf++ = *p;
189 } else
190 maybebadio(port);
191}
192
193void landisk_outsb(unsigned long port, const void *src, unsigned long count)
194{
195 volatile u16 *p;
196 const u8 *buf = src;
197
198 if (PXSEG(port))
199 while (count--)
200 ctrl_outb(*buf++, port);
201 else if (is_pci_ioaddr(port)) {
202 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
203
204 while (count--)
205 *bp = *buf++;
206 } else {
207 p = (volatile u16 *)port2adr(port);
208 while (count--)
209 *p = *buf++;
210 }
211}
212
213void landisk_outsw(unsigned long port, const void *src, unsigned long count)
214{
215 volatile u16 *p;
216 const u16 *buf = src;
217
218 if (PXSEG(port))
219 p = (volatile u16 *)port;
220 else if (is_pci_ioaddr(port))
221 p = (volatile u16 *)pci_ioaddr(port);
222 else
223 p = (volatile u16 *)port2adr(port);
224
225 while (count--)
226 *p = *buf++;
227}
228
229void landisk_outsl(unsigned long port, const void *src, unsigned long count)
230{
231 const u32 *buf = src;
232
233 if (is_pci_ioaddr(port)) {
234 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
235
236 while (count--)
237 *p = *buf++;
238 } else
239 maybebadio(port);
240}
241
242void __iomem *landisk_ioport_map(unsigned long port, unsigned int size)
243{
244 if (PXSEG(port))
245 return (void __iomem *)port;
246 else if (is_pci_ioaddr(port))
247 return (void __iomem *)pci_ioaddr(port);
248
249 return (void __iomem *)port2adr(port);
250}
diff --git a/arch/sh/boards/landisk/irq.c b/arch/sh/boards/landisk/irq.c
new file mode 100644
index 000000000000..a006d6443225
--- /dev/null
+++ b/arch/sh/boards/landisk/irq.c
@@ -0,0 +1,99 @@
1/*
2 * arch/sh/boards/landisk/irq.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c.
6 *
7 * I/O routine for I-O Data Device, Inc. LANDISK.
8 *
9 * Initial version only to support LAN access; some
10 * placeholder code from io_landisk.c left in with the
11 * expectation of later SuperIO and PCMCIA access.
12 */
13/*
14 * modified by kogiidena
15 * 2005.03.03
16 */
17
18#include <linux/config.h>
19#include <linux/init.h>
20#include <linux/irq.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/landisk/iodata_landisk.h>
24
25static void enable_landisk_irq(unsigned int irq);
26static void disable_landisk_irq(unsigned int irq);
27
28/* shutdown is same as "disable" */
29#define shutdown_landisk_irq disable_landisk_irq
30
31static void ack_landisk_irq(unsigned int irq);
32static void end_landisk_irq(unsigned int irq);
33
34static unsigned int startup_landisk_irq(unsigned int irq)
35{
36 enable_landisk_irq(irq);
37 return 0; /* never anything pending */
38}
39
40static void disable_landisk_irq(unsigned int irq)
41{
42 unsigned char val;
43 unsigned char mask = 0xff ^ (0x01 << (irq - 5));
44
45 /* Set the priority in IPR to 0 */
46 val = ctrl_inb(PA_IMASK);
47 val &= mask;
48 ctrl_outb(val, PA_IMASK);
49}
50
51static void enable_landisk_irq(unsigned int irq)
52{
53 unsigned char val;
54 unsigned char value = (0x01 << (irq - 5));
55
56 /* Set priority in IPR back to original value */
57 val = ctrl_inb(PA_IMASK);
58 val |= value;
59 ctrl_outb(val, PA_IMASK);
60}
61
62static void ack_landisk_irq(unsigned int irq)
63{
64 disable_landisk_irq(irq);
65}
66
67static void end_landisk_irq(unsigned int irq)
68{
69 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
70 enable_landisk_irq(irq);
71}
72
73static struct hw_interrupt_type landisk_irq_type = {
74 .typename = "LANDISK IRQ",
75 .startup = startup_landisk_irq,
76 .shutdown = shutdown_landisk_irq,
77 .enable = enable_landisk_irq,
78 .disable = disable_landisk_irq,
79 .ack = ack_landisk_irq,
80 .end = end_landisk_irq
81};
82
83static void make_landisk_irq(unsigned int irq)
84{
85 disable_irq_nosync(irq);
86 irq_desc[irq].handler = &landisk_irq_type;
87 disable_landisk_irq(irq);
88}
89
90/*
91 * Initialize IRQ setting
92 */
93void __init init_landisk_IRQ(void)
94{
95 int i;
96
97 for (i = 5; i < 14; i++)
98 make_landisk_irq(i);
99}
diff --git a/arch/sh/boards/landisk/landisk_pwb.c b/arch/sh/boards/landisk/landisk_pwb.c
new file mode 100644
index 000000000000..e75cb578a28b
--- /dev/null
+++ b/arch/sh/boards/landisk/landisk_pwb.c
@@ -0,0 +1,348 @@
1/*
2 * arch/sh/boards/landisk/landisk_pwb.c -- driver for the Power control switch.
3 *
4 * This driver will also support the I-O DATA Device, Inc. LANDISK Board.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copylight (C) 2002 Atom Create Engineering Co., Ltd.
11 *
12 * LED control drive function added by kogiidena
13 */
14
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/errno.h>
18#include <linux/signal.h>
19#include <linux/major.h>
20#include <linux/poll.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/sched.h>
24#include <linux/timer.h>
25#include <linux/interrupt.h>
26
27#include <asm/system.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/uaccess.h>
31#include <asm/landisk/iodata_landisk.h>
32
33#define SHUTDOWN_BTN_MINOR 1 /* Shutdown button device minor no. */
34#define LED_MINOR 21 /* LED minor no. */
35#define BTN_MINOR 22 /* BUTTON minor no. */
36#define GIO_MINOR 40 /* GIO minor no. */
37
38static int openCnt;
39static int openCntLED;
40static int openCntGio;
41static int openCntBtn;
42static int landisk_btn;
43static int landisk_btnctrlpid;
44/*
45 * Functions prototypes
46 */
47
48static int gio_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
49 unsigned long arg);
50
51static int swdrv_open(struct inode *inode, struct file *filp)
52{
53 int minor;
54
55 minor = MINOR(inode->i_rdev);
56 filp->private_data = (void *)minor;
57
58 if (minor == SHUTDOWN_BTN_MINOR) {
59 if (openCnt > 0) {
60 return -EALREADY;
61 } else {
62 openCnt++;
63 return 0;
64 }
65 } else if (minor == LED_MINOR) {
66 if (openCntLED > 0) {
67 return -EALREADY;
68 } else {
69 openCntLED++;
70 return 0;
71 }
72 } else if (minor == BTN_MINOR) {
73 if (openCntBtn > 0) {
74 return -EALREADY;
75 } else {
76 openCntBtn++;
77 return 0;
78 }
79 } else if (minor == GIO_MINOR) {
80 if (openCntGio > 0) {
81 return -EALREADY;
82 } else {
83 openCntGio++;
84 return 0;
85 }
86 }
87 return -ENOENT;
88
89}
90
91static int swdrv_close(struct inode *inode, struct file *filp)
92{
93 int minor;
94
95 minor = MINOR(inode->i_rdev);
96 if (minor == SHUTDOWN_BTN_MINOR) {
97 openCnt--;
98 } else if (minor == LED_MINOR) {
99 openCntLED--;
100 } else if (minor == BTN_MINOR) {
101 openCntBtn--;
102 } else if (minor == GIO_MINOR) {
103 openCntGio--;
104 }
105 return 0;
106}
107
108static int swdrv_read(struct file *filp, char *buff, size_t count,
109 loff_t * ppos)
110{
111 int minor;
112 minor = (int)(filp->private_data);
113
114 if (!access_ok(VERIFY_WRITE, (void *)buff, count))
115 return -EFAULT;
116
117 if (minor == SHUTDOWN_BTN_MINOR) {
118 if (landisk_btn & 0x10) {
119 put_user(1, buff);
120 return 1;
121 } else {
122 return 0;
123 }
124 }
125 return 0;
126}
127
128static int swdrv_write(struct file *filp, const char *buff, size_t count,
129 loff_t * ppos)
130{
131 int minor;
132 minor = (int)(filp->private_data);
133
134 if (minor == SHUTDOWN_BTN_MINOR) {
135 return count;
136 }
137 return count;
138}
139
140static irqreturn_t sw_interrupt(int irq, void *dev_id, struct pt_regs *regs)
141{
142 landisk_btn = (0x0ff & (~ctrl_inb(PA_STATUS)));
143 disable_irq(IRQ_BUTTON);
144 disable_irq(IRQ_POWER);
145 ctrl_outb(0x00, PA_PWRINT_CLR);
146
147 if (landisk_btnctrlpid != 0) {
148 kill_proc(landisk_btnctrlpid, SIGUSR1, 1);
149 landisk_btnctrlpid = 0;
150 }
151
152 return IRQ_HANDLED;
153}
154
155static struct file_operations swdrv_fops = {
156 .read = swdrv_read, /* read */
157 .write = swdrv_write, /* write */
158 .open = swdrv_open, /* open */
159 .release = swdrv_close, /* release */
160 .ioctl = gio_ioctl, /* ioctl */
161
162};
163
164static char banner[] __initdata =
165 KERN_INFO "LANDISK and USL-5P Button, LED and GIO driver initialized\n";
166
167int __init swdrv_init(void)
168{
169 int error;
170
171 printk("%s", banner);
172
173 openCnt = 0;
174 openCntLED = 0;
175 openCntBtn = 0;
176 openCntGio = 0;
177 landisk_btn = 0;
178 landisk_btnctrlpid = 0;
179
180 if ((error = register_chrdev(SHUTDOWN_BTN_MAJOR, "swdrv", &swdrv_fops))) {
181 printk(KERN_ERR
182 "Button, LED and GIO driver:Couldn't register driver, error=%d\n",
183 error);
184 return 1;
185 }
186
187 if (request_irq(IRQ_POWER, sw_interrupt, 0, "SHUTDOWNSWITCH", NULL)) {
188 printk(KERN_ERR "Unable to get IRQ 11.\n");
189 return 1;
190 }
191 if (request_irq(IRQ_BUTTON, sw_interrupt, 0, "USL-5P BUTTON", NULL)) {
192 printk(KERN_ERR "Unable to get IRQ 12.\n");
193 return 1;
194 }
195 ctrl_outb(0x00, PA_PWRINT_CLR);
196
197 return 0;
198}
199
200module_init(swdrv_init);
201
202/*
203 * gio driver
204 *
205 */
206
207#include <asm/landisk/gio.h>
208
209static int gio_ioctl(struct inode *inode, struct file *filp,
210 unsigned int cmd, unsigned long arg)
211{
212 int minor;
213 unsigned int data, mask;
214 static unsigned int addr = 0;
215
216 minor = (int)(filp->private_data);
217
218 /* access control */
219 if (minor == GIO_MINOR) {
220 ;
221 } else if (minor == LED_MINOR) {
222 if (((cmd & 0x0ff) >= 9) && ((cmd & 0x0ff) < 20)) {
223 ;
224 } else {
225 return -EINVAL;
226 }
227 } else if (minor == BTN_MINOR) {
228 if (((cmd & 0x0ff) >= 20) && ((cmd & 0x0ff) < 30)) {
229 ;
230 } else {
231 return -EINVAL;
232 }
233 } else {
234 return -EINVAL;
235 }
236
237 if (cmd & 0x01) { /* write */
238 if (copy_from_user(&data, (int *)arg, sizeof(int))) {
239 return -EFAULT;
240 }
241 }
242
243 switch (cmd) {
244 case GIODRV_IOCSGIOSETADDR: /* addres set */
245 addr = data;
246 break;
247
248 case GIODRV_IOCSGIODATA1: /* write byte */
249 ctrl_outb((unsigned char)(0x0ff & data), addr);
250 break;
251
252 case GIODRV_IOCSGIODATA2: /* write word */
253 if (addr & 0x01) {
254 return -EFAULT;
255 }
256 ctrl_outw((unsigned short int)(0x0ffff & data), addr);
257 break;
258
259 case GIODRV_IOCSGIODATA4: /* write long */
260 if (addr & 0x03) {
261 return -EFAULT;
262 }
263 ctrl_outl(data, addr);
264 break;
265
266 case GIODRV_IOCGGIODATA1: /* read byte */
267 data = ctrl_inb(addr);
268 break;
269
270 case GIODRV_IOCGGIODATA2: /* read word */
271 if (addr & 0x01) {
272 return -EFAULT;
273 }
274 data = ctrl_inw(addr);
275 break;
276
277 case GIODRV_IOCGGIODATA4: /* read long */
278 if (addr & 0x03) {
279 return -EFAULT;
280 }
281 data = ctrl_inl(addr);
282 break;
283 case GIODRV_IOCSGIO_LED: /* write */
284 mask = ((data & 0x00ffffff) << 8)
285 | ((data & 0x0000ffff) << 16)
286 | ((data & 0x000000ff) << 24);
287 landisk_ledparam = data & (~mask);
288 if (landisk_arch == 0) { /* arch == landisk */
289 landisk_ledparam &= 0x03030303;
290 mask = (~(landisk_ledparam >> 22)) & 0x000c;
291 landisk_ledparam |= mask;
292 } else { /* arch == usl-5p */
293 mask = (landisk_ledparam >> 24) & 0x0001;
294 landisk_ledparam |= mask;
295 landisk_ledparam &= 0x007f7f7f;
296 }
297 landisk_ledparam |= 0x80;
298 break;
299 case GIODRV_IOCGGIO_LED: /* read */
300 data = landisk_ledparam;
301 if (landisk_arch == 0) { /* arch == landisk */
302 data &= 0x03030303;
303 } else { /* arch == usl-5p */
304 ;
305 }
306 data &= (~0x080);
307 break;
308 case GIODRV_IOCSGIO_BUZZER: /* write */
309 landisk_buzzerparam = data;
310 landisk_ledparam |= 0x80;
311 break;
312 case GIODRV_IOCGGIO_LANDISK: /* read */
313 data = landisk_arch & 0x01;
314 break;
315 case GIODRV_IOCGGIO_BTN: /* read */
316 data = (0x0ff & ctrl_inb(PA_PWRINT_CLR));
317 data <<= 8;
318 data |= (0x0ff & ctrl_inb(PA_IMASK));
319 data <<= 8;
320 data |= (0x0ff & landisk_btn);
321 data <<= 8;
322 data |= (0x0ff & (~ctrl_inb(PA_STATUS)));
323 break;
324 case GIODRV_IOCSGIO_BTNPID: /* write */
325 landisk_btnctrlpid = data;
326 landisk_btn = 0;
327 if (irq_desc[IRQ_BUTTON].depth) {
328 enable_irq(IRQ_BUTTON);
329 }
330 if (irq_desc[IRQ_POWER].depth) {
331 enable_irq(IRQ_POWER);
332 }
333 break;
334 case GIODRV_IOCGGIO_BTNPID: /* read */
335 data = landisk_btnctrlpid;
336 break;
337 default:
338 return -EFAULT;
339 break;
340 }
341
342 if ((cmd & 0x01) == 0) { /* read */
343 if (copy_to_user((int *)arg, &data, sizeof(int))) {
344 return -EFAULT;
345 }
346 }
347 return 0;
348}
diff --git a/arch/sh/boards/landisk/rtc.c b/arch/sh/boards/landisk/rtc.c
new file mode 100644
index 000000000000..35ba726a0979
--- /dev/null
+++ b/arch/sh/boards/landisk/rtc.c
@@ -0,0 +1,93 @@
1/*
2 * arch/sh/boards/landisk/rtc.c -- RTC support
3 *
4 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
5 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
6 */
7/*
8 * modifed by kogiidena
9 * 2005.09.16
10 */
11
12#include <linux/config.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/time.h>
17#include <linux/delay.h>
18#include <linux/spinlock.h>
19#include <linux/bcd.h>
20#include <asm/rtc.h>
21
22extern spinlock_t rtc_lock;
23
24extern void
25rs5c313_set_cmos_time(unsigned int BCD_yr, unsigned int BCD_mon,
26 unsigned int BCD_day, unsigned int BCD_hr,
27 unsigned int BCD_min, unsigned int BCD_sec);
28
29extern unsigned long
30rs5c313_get_cmos_time(unsigned int *BCD_yr, unsigned int *BCD_mon,
31 unsigned int *BCD_day, unsigned int *BCD_hr,
32 unsigned int *BCD_min, unsigned int *BCD_sec);
33
34void landisk_rtc_gettimeofday(struct timespec *tv)
35{
36 unsigned int BCD_yr, BCD_mon, BCD_day, BCD_hr, BCD_min, BCD_sec;
37 unsigned long flags;
38
39 spin_lock_irqsave(&rtc_lock, flags);
40 tv->tv_sec = rs5c313_get_cmos_time
41 (&BCD_yr, &BCD_mon, &BCD_day, &BCD_hr, &BCD_min, &BCD_sec);
42 tv->tv_nsec = 0;
43 spin_unlock_irqrestore(&rtc_lock, flags);
44}
45
46int landisk_rtc_settimeofday(const time_t secs)
47{
48 int retval = 0;
49 int real_seconds, real_minutes, cmos_minutes;
50 unsigned long flags;
51 unsigned long nowtime = secs;
52 unsigned int BCD_yr, BCD_mon, BCD_day, BCD_hr, BCD_min, BCD_sec;
53
54 spin_lock_irqsave(&rtc_lock, flags);
55
56 rs5c313_get_cmos_time
57 (&BCD_yr, &BCD_mon, &BCD_day, &BCD_hr, &BCD_min, &BCD_sec);
58 cmos_minutes = BCD_min;
59 BCD_TO_BIN(cmos_minutes);
60
61 /*
62 * since we're only adjusting minutes and seconds,
63 * don't interfere with hour overflow. This avoids
64 * messing with unknown time zones but requires your
65 * RTC not to be off by more than 15 minutes
66 */
67 real_seconds = nowtime % 60;
68 real_minutes = nowtime / 60;
69 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
70 real_minutes += 30; /* correct for half hour time zone */
71 real_minutes %= 60;
72
73 if (abs(real_minutes - cmos_minutes) < 30) {
74 BIN_TO_BCD(real_seconds);
75 BIN_TO_BCD(real_minutes);
76 rs5c313_set_cmos_time(BCD_yr, BCD_mon, BCD_day, BCD_hr,
77 real_minutes, real_seconds);
78 } else {
79 printk(KERN_WARNING
80 "set_rtc_time: can't update from %d to %d\n",
81 cmos_minutes, real_minutes);
82 retval = -1;
83 }
84
85 spin_unlock_irqrestore(&rtc_lock, flags);
86 return retval;
87}
88
89void landisk_time_init(void)
90{
91 rtc_sh_get_time = landisk_rtc_gettimeofday;
92 rtc_sh_set_time = landisk_rtc_settimeofday;
93}
diff --git a/arch/sh/boards/landisk/setup.c b/arch/sh/boards/landisk/setup.c
new file mode 100644
index 000000000000..127b9e020e00
--- /dev/null
+++ b/arch/sh/boards/landisk/setup.c
@@ -0,0 +1,177 @@
1/*
2 * arch/sh/boards/landisk/setup.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 * Copyright (C) 2002 Paul Mundt
6 *
7 * I-O DATA Device, Inc. LANDISK Support.
8 *
9 * Modified for LANDISK by
10 * Atom Create Engineering Co., Ltd. 2002.
11 *
12 * modifed by kogiidena
13 * 2005.09.16
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file "COPYING" in the main directory of this archive
17 * for more details.
18 */
19#include <linux/config.h>
20#include <linux/init.h>
21#include <linux/pm.h>
22#include <linux/mm.h>
23#include <asm/machvec.h>
24#include <asm/rtc.h>
25#include <asm/landisk/iodata_landisk.h>
26#include <asm/io.h>
27
28void landisk_time_init(void);
29void init_landisk_IRQ(void);
30
31int landisk_ledparam;
32int landisk_buzzerparam;
33int landisk_arch;
34
35/* cycle the led's in the clasic knightrider/sun pattern */
36static void heartbeat_landisk(void)
37{
38 static unsigned int cnt = 0, blink = 0x00, period = 25;
39 volatile u8 *p = (volatile u8 *)PA_LED;
40 char data;
41
42 if ((landisk_ledparam & 0x080) == 0)
43 return;
44
45 cnt += 1;
46
47 if (cnt < period)
48 return;
49
50 cnt = 0;
51 blink++;
52
53 data = (blink & 0x01) ? (landisk_ledparam >> 16) : 0;
54 data |= (blink & 0x02) ? (landisk_ledparam >> 8) : 0;
55 data |= landisk_ledparam;
56
57 /* buzzer */
58 if (landisk_buzzerparam & 0x1) {
59 data |= 0x80;
60 } else {
61 data &= 0x7f;
62 }
63 *p = data;
64
65 if (((landisk_ledparam & 0x007f7f00) == 0) &&
66 (landisk_buzzerparam == 0))
67 landisk_ledparam &= (~0x0080);
68
69 landisk_buzzerparam >>= 1;
70}
71
72static void landisk_power_off(void)
73{
74 ctrl_outb(0x01, PA_SHUTDOWN);
75}
76
77static void check_usl5p(void)
78{
79 volatile u8 *p = (volatile u8 *)PA_LED;
80 u8 tmp1, tmp2;
81
82 tmp1 = *p;
83 *p = 0x40;
84 tmp2 = *p;
85 *p = tmp1;
86
87 landisk_arch = (tmp2 == 0x40);
88 if (landisk_arch == 1) {
89 /* arch == usl-5p */
90 landisk_ledparam = 0x00000380;
91 landisk_ledparam |= (tmp1 & 0x07c);
92 } else {
93 /* arch == landisk */
94 landisk_ledparam = 0x02000180;
95 landisk_ledparam |= 0x04;
96 }
97}
98
99void *area5_io_base;
100void *area6_io_base;
101
102static int __init landisk_cf_init(void)
103{
104 pgprot_t prot;
105 unsigned long paddrbase, psize;
106
107 /* open I/O area window */
108 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
109 psize = PAGE_SIZE;
110 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
111 area5_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
112 if (!area5_io_base) {
113 printk("allocate_cf_area : can't open CF I/O window!\n");
114 return -ENOMEM;
115 }
116
117 paddrbase = virt_to_phys((void *)PA_AREA6_IO);
118 psize = PAGE_SIZE;
119 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
120 area6_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
121 if (!area6_io_base) {
122 printk("allocate_cf_area : can't open HDD I/O window!\n");
123 return -ENOMEM;
124 }
125
126 printk(KERN_INFO "Allocate Area5/6 success.\n");
127
128 /* XXX : do we need attribute and common-memory area also? */
129
130 return 0;
131}
132
133static void __init landisk_setup(char **cmdline_p)
134{
135 device_initcall(landisk_cf_init);
136
137 landisk_buzzerparam = 0;
138 check_usl5p();
139
140 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n");
141
142 board_time_init = landisk_time_init;
143 pm_power_off = landisk_power_off;
144}
145
146/*
147 * The Machine Vector
148 */
149struct sh_machine_vector mv_landisk __initmv = {
150 .mv_name = "LANDISK",
151 .mv_setup = landisk_setup,
152 .mv_nr_irqs = 72,
153 .mv_inb = landisk_inb,
154 .mv_inw = landisk_inw,
155 .mv_inl = landisk_inl,
156 .mv_outb = landisk_outb,
157 .mv_outw = landisk_outw,
158 .mv_outl = landisk_outl,
159 .mv_inb_p = landisk_inb_p,
160 .mv_inw_p = landisk_inw,
161 .mv_inl_p = landisk_inl,
162 .mv_outb_p = landisk_outb_p,
163 .mv_outw_p = landisk_outw,
164 .mv_outl_p = landisk_outl,
165 .mv_insb = landisk_insb,
166 .mv_insw = landisk_insw,
167 .mv_insl = landisk_insl,
168 .mv_outsb = landisk_outsb,
169 .mv_outsw = landisk_outsw,
170 .mv_outsl = landisk_outsl,
171 .mv_ioport_map = landisk_ioport_map,
172 .mv_init_irq = init_landisk_IRQ,
173#ifdef CONFIG_HEARTBEAT
174 .mv_heartbeat = heartbeat_landisk,
175#endif
176};
177ALIAS_MV(landisk)
diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c
index a76c655dceee..03b123a4bba4 100644
--- a/arch/sh/boards/mpc1211/rtc.c
+++ b/arch/sh/boards/mpc1211/rtc.c
@@ -130,7 +130,7 @@ int mpc1211_rtc_settimeofday(const struct timeval *tv)
130 130
131void mpc1211_time_init(void) 131void mpc1211_time_init(void)
132{ 132{
133 rtc_get_time = mpc1211_rtc_gettimeofday; 133 rtc_sh_get_time = mpc1211_rtc_gettimeofday;
134 rtc_set_time = mpc1211_rtc_settimeofday; 134 rtc_sh_set_time = mpc1211_rtc_settimeofday;
135} 135}
136 136
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
index 2bfb221cc35c..8eb5d4303972 100644
--- a/arch/sh/boards/mpc1211/setup.c
+++ b/arch/sh/boards/mpc1211/setup.c
@@ -10,14 +10,12 @@
10#include <linux/hdreg.h> 10#include <linux/hdreg.h>
11#include <linux/ide.h> 11#include <linux/ide.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13
14#include <asm/io.h> 13#include <asm/io.h>
15#include <asm/machvec.h> 14#include <asm/machvec.h>
16#include <asm/mpc1211/mpc1211.h> 15#include <asm/mpc1211/mpc1211.h>
17#include <asm/mpc1211/pci.h> 16#include <asm/mpc1211/pci.h>
18#include <asm/mpc1211/m1543c.h> 17#include <asm/mpc1211/m1543c.h>
19 18
20
21/* ALI15X3 SMBus address offsets */ 19/* ALI15X3 SMBus address offsets */
22#define SMBHSTSTS (0 + 0x3100) 20#define SMBHSTSTS (0 + 0x3100)
23#define SMBHSTCNT (1 + 0x3100) 21#define SMBHSTCNT (1 + 0x3100)
@@ -50,11 +48,6 @@
50#define ALI15X3_STS_TERM 0x80 /* terminated by abort */ 48#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
51#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */ 49#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
52 50
53const char *get_system_type(void)
54{
55 return "Interface MPC-1211(CTP/PCI/MPC-SH02)";
56}
57
58static void __init pci_write_config(unsigned long busNo, 51static void __init pci_write_config(unsigned long busNo,
59 unsigned long devNo, 52 unsigned long devNo,
60 unsigned long fncNo, 53 unsigned long fncNo,
@@ -80,9 +73,6 @@ volatile unsigned long irq_err_count;
80 73
81static void disable_mpc1211_irq(unsigned int irq) 74static void disable_mpc1211_irq(unsigned int irq)
82{ 75{
83 unsigned long flags;
84
85 save_and_cli(flags);
86 if( irq < 8) { 76 if( irq < 8) {
87 m_irq_mask |= (1 << irq); 77 m_irq_mask |= (1 << irq);
88 outb(m_irq_mask,I8259_M_MR); 78 outb(m_irq_mask,I8259_M_MR);
@@ -90,16 +80,11 @@ static void disable_mpc1211_irq(unsigned int irq)
90 s_irq_mask |= (1 << (irq - 8)); 80 s_irq_mask |= (1 << (irq - 8));
91 outb(s_irq_mask,I8259_S_MR); 81 outb(s_irq_mask,I8259_S_MR);
92 } 82 }
93 restore_flags(flags);
94 83
95} 84}
96 85
97static void enable_mpc1211_irq(unsigned int irq) 86static void enable_mpc1211_irq(unsigned int irq)
98{ 87{
99 unsigned long flags;
100
101 save_and_cli(flags);
102
103 if( irq < 8) { 88 if( irq < 8) {
104 m_irq_mask &= ~(1 << irq); 89 m_irq_mask &= ~(1 << irq);
105 outb(m_irq_mask,I8259_M_MR); 90 outb(m_irq_mask,I8259_M_MR);
@@ -107,7 +92,6 @@ static void enable_mpc1211_irq(unsigned int irq)
107 s_irq_mask &= ~(1 << (irq - 8)); 92 s_irq_mask &= ~(1 << (irq - 8));
108 outb(s_irq_mask,I8259_S_MR); 93 outb(s_irq_mask,I8259_S_MR);
109 } 94 }
110 restore_flags(flags);
111} 95}
112 96
113static inline int mpc1211_irq_real(unsigned int irq) 97static inline int mpc1211_irq_real(unsigned int irq)
@@ -131,10 +115,6 @@ static inline int mpc1211_irq_real(unsigned int irq)
131 115
132static void mask_and_ack_mpc1211(unsigned int irq) 116static void mask_and_ack_mpc1211(unsigned int irq)
133{ 117{
134 unsigned long flags;
135
136 save_and_cli(flags);
137
138 if(irq < 8) { 118 if(irq < 8) {
139 if(m_irq_mask & (1<<irq)){ 119 if(m_irq_mask & (1<<irq)){
140 if(!mpc1211_irq_real(irq)){ 120 if(!mpc1211_irq_real(irq)){
@@ -162,7 +142,6 @@ static void mask_and_ack_mpc1211(unsigned int irq)
162 outb(0x60+(irq-8),I8259_S_CR); /* EOI */ 142 outb(0x60+(irq-8),I8259_S_CR); /* EOI */
163 outb(0x60+2,I8259_M_CR); 143 outb(0x60+2,I8259_M_CR);
164 } 144 }
165 restore_flags(flags);
166} 145}
167 146
168static void end_mpc1211_irq(unsigned int irq) 147static void end_mpc1211_irq(unsigned int irq)
@@ -219,7 +198,7 @@ int mpc1211_irq_demux(int irq)
219 return irq; 198 return irq;
220} 199}
221 200
222void __init init_mpc1211_IRQ(void) 201static void __init init_mpc1211_IRQ(void)
223{ 202{
224 int i; 203 int i;
225 /* 204 /*
@@ -255,23 +234,12 @@ void __init init_mpc1211_IRQ(void)
255 } 234 }
256} 235}
257 236
258/* 237static void delay1000(void)
259 Initialize the board
260*/
261
262
263static void delay (void)
264{
265 volatile unsigned short tmp;
266 tmp = *(volatile unsigned short *) 0xa0000000;
267}
268
269static void delay1000 (void)
270{ 238{
271 int i; 239 int i;
272 240
273 for (i=0; i<1000; i++) 241 for (i=0; i<1000; i++)
274 delay (); 242 ctrl_delay();
275} 243}
276 244
277static int put_smb_blk(unsigned char *p, int address, int command, int no) 245static int put_smb_blk(unsigned char *p, int address, int command, int no)
@@ -314,26 +282,10 @@ static int put_smb_blk(unsigned char *p, int address, int command, int no)
314 return 0; 282 return 0;
315} 283}
316 284
317/*
318 * The Machine Vector
319 */
320
321struct sh_machine_vector mv_mpc1211 __initmv = {
322 .mv_nr_irqs = 48,
323 .mv_irq_demux = mpc1211_irq_demux,
324 .mv_init_irq = init_mpc1211_IRQ,
325
326#ifdef CONFIG_HEARTBEAT
327 .mv_heartbeat = heartbeat_mpc1211,
328#endif
329};
330
331ALIAS_MV(mpc1211)
332
333/* arch/sh/boards/mpc1211/rtc.c */ 285/* arch/sh/boards/mpc1211/rtc.c */
334void mpc1211_time_init(void); 286void mpc1211_time_init(void);
335 287
336int __init platform_setup(void) 288static void __init mpc1211_setup(char **cmdline_p)
337{ 289{
338 unsigned char spd_buf[128]; 290 unsigned char spd_buf[128];
339 291
@@ -357,3 +309,18 @@ int __init platform_setup(void)
357 return 0; 309 return 0;
358} 310}
359 311
312/*
313 * The Machine Vector
314 */
315struct sh_machine_vector mv_mpc1211 __initmv = {
316 .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
317 .mv_setup = mpc1211_setup,
318 .mv_nr_irqs = 48,
319 .mv_irq_demux = mpc1211_irq_demux,
320 .mv_init_irq = init_mpc1211_IRQ,
321
322#ifdef CONFIG_HEARTBEAT
323 .mv_heartbeat = heartbeat_mpc1211,
324#endif
325};
326ALIAS_MV(mpc1211)
diff --git a/arch/sh/boards/overdrive/Makefile b/arch/sh/boards/overdrive/Makefile
deleted file mode 100644
index 245f03baf762..000000000000
--- a/arch/sh/boards/overdrive/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the STMicroelectronics Overdrive specific parts of the kernel
3#
4
5obj-y := mach.o setup.o io.o irq.o led.o
6
7obj-$(CONFIG_PCI) += fpga.o galileo.o pcidma.o
8
diff --git a/arch/sh/boards/overdrive/fpga.c b/arch/sh/boards/overdrive/fpga.c
deleted file mode 100644
index 956c23901228..000000000000
--- a/arch/sh/boards/overdrive/fpga.c
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file handles programming up the Altera Flex10K that interfaces to
8 * the Galileo, and does the PS/2 keyboard and mouse
9 *
10 */
11
12
13#include <linux/kernel.h>
14#include <linux/smp.h>
15#include <linux/smp_lock.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20
21
22#include <asm/overdriver/gt64111.h>
23#include <asm/overdrive/overdrive.h>
24#include <asm/overdrive/fpga.h>
25
26#define FPGA_NotConfigHigh() (*FPGA_ControlReg) = (*FPGA_ControlReg) | ENABLE_FPGA_BIT
27#define FPGA_NotConfigLow() (*FPGA_ControlReg) = (*FPGA_ControlReg) & RESET_FPGA_MASK
28
29/* I need to find out what (if any) the real delay factor here is */
30/* The delay is definately not critical */
31#define long_delay() {int i;for(i=0;i<10000;i++);}
32#define short_delay() {int i;for(i=0;i<100;i++);}
33
34static void __init program_overdrive_fpga(const unsigned char *fpgacode,
35 int size)
36{
37 int timeout = 0;
38 int i, j;
39 unsigned char b;
40 static volatile unsigned char *FPGA_ControlReg =
41 (volatile unsigned char *) (OVERDRIVE_CTRL);
42 static volatile unsigned char *FPGA_ProgramReg =
43 (volatile unsigned char *) (FPGA_DCLK_ADDRESS);
44
45 printk("FPGA: Commencing FPGA Programming\n");
46
47 /* The PCI reset but MUST be low when programming the FPGA !!! */
48 b = (*FPGA_ControlReg) & RESET_PCI_MASK;
49
50 (*FPGA_ControlReg) = b;
51
52 /* Prepare FPGA to program */
53
54 FPGA_NotConfigHigh();
55 long_delay();
56
57 FPGA_NotConfigLow();
58 short_delay();
59
60 while ((*FPGA_ProgramReg & FPGA_NOT_STATUS) != 0) {
61 printk("FPGA: Waiting for NotStatus to go Low ... \n");
62 }
63
64 FPGA_NotConfigHigh();
65
66 /* Wait for FPGA "ready to be programmed" signal */
67 printk("FPGA: Waiting for NotStatus to go high (FPGA ready)... \n");
68
69 for (timeout = 0;
70 (((*FPGA_ProgramReg & FPGA_NOT_STATUS) == 0)
71 && (timeout < FPGA_TIMEOUT)); timeout++);
72
73 /* Check if timeout condition occured - i.e. an error */
74
75 if (timeout == FPGA_TIMEOUT) {
76 printk
77 ("FPGA: Failed to program - Timeout waiting for notSTATUS to go high\n");
78 return;
79 }
80
81 printk("FPGA: Copying data to FPGA ... %d bytes\n", size);
82
83 /* Copy array to FPGA - bit at a time */
84
85 for (i = 0; i < size; i++) {
86 volatile unsigned w = 0;
87
88 for (j = 0; j < 8; j++) {
89 *FPGA_ProgramReg = (fpgacode[i] >> j) & 0x01;
90 short_delay();
91 }
92 if ((i & 0x3ff) == 0) {
93 printk(".");
94 }
95 }
96
97 /* Waiting for CONFDONE to go high - means the program is complete */
98
99 for (timeout = 0;
100 (((*FPGA_ProgramReg & FPGA_CONFDONE) == 0)
101 && (timeout < FPGA_TIMEOUT)); timeout++) {
102
103 *FPGA_ProgramReg = 0x0;
104 long_delay();
105 }
106
107 if (timeout == FPGA_TIMEOUT) {
108 printk
109 ("FPGA: Failed to program - Timeout waiting for CONFDONE to go high\n");
110 return;
111 } else { /* Clock another 10 times - gets the device into a working state */
112 for (i = 0; i < 10; i++) {
113 *FPGA_ProgramReg = 0x0;
114 short_delay();
115 }
116 }
117
118 printk("FPGA: Programming complete\n");
119}
120
121
122static const unsigned char __init fpgacode[] = {
123#include "./overdrive.ttf" /* Code from maxplus2 compiler */
124 , 0, 0
125};
126
127
128int __init init_overdrive_fpga(void)
129{
130 program_overdrive_fpga(fpgacode, sizeof(fpgacode));
131
132 return 0;
133}
diff --git a/arch/sh/boards/overdrive/galileo.c b/arch/sh/boards/overdrive/galileo.c
deleted file mode 100644
index 29e48971bba0..000000000000
--- a/arch/sh/boards/overdrive/galileo.c
+++ /dev/null
@@ -1,587 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file contains the PCI routines required for the Galileo GT6411
8 * PCI bridge as used on the Orion and Overdrive boards.
9 *
10 */
11
12#include <linux/kernel.h>
13#include <linux/smp.h>
14#include <linux/smp_lock.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/pci.h>
18#include <linux/delay.h>
19#include <linux/types.h>
20#include <linux/ioport.h>
21
22#include <asm/overdrive/overdrive.h>
23#include <asm/overdrive/gt64111.h>
24
25
26/* After boot, we shift the Galileo registers so that they appear
27 * in BANK6, along with IO space. This means we can have one contingous
28 * lump of PCI address space without these registers appearing in the
29 * middle of them
30 */
31
32#define GT64111_BASE_ADDRESS 0xbb000000
33#define GT64111_IO_BASE_ADDRESS 0x1000
34/* The GT64111 registers appear at this address to the SH4 after reset */
35#define RESET_GT64111_BASE_ADDRESS 0xb4000000
36
37/* Macros used to access the Galileo registers */
38#define RESET_GT64111_REG(x) (RESET_GT64111_BASE_ADDRESS+x)
39#define GT64111_REG(x) (GT64111_BASE_ADDRESS+x)
40
41#define RESET_GT_WRITE(x,v) writel((v),RESET_GT64111_REG(x))
42
43#define RESET_GT_READ(x) readl(RESET_GT64111_REG(x))
44
45#define GT_WRITE(x,v) writel((v),GT64111_REG(x))
46#define GT_WRITE_BYTE(x,v) writeb((v),GT64111_REG(x))
47#define GT_WRITE_SHORT(x,v) writew((v),GT64111_REG(x))
48
49#define GT_READ(x) readl(GT64111_REG(x))
50#define GT_READ_BYTE(x) readb(GT64111_REG(x))
51#define GT_READ_SHORT(x) readw(GT64111_REG(x))
52
53
54/* Where the various SH banks start at */
55#define SH_BANK4_ADR 0xb0000000
56#define SH_BANK5_ADR 0xb4000000
57#define SH_BANK6_ADR 0xb8000000
58
59/* Masks out everything but lines 28,27,26 */
60#define BANK_SELECT_MASK 0x1c000000
61
62#define SH4_TO_BANK(x) ( (x) & BANK_SELECT_MASK)
63
64/*
65 * Masks used for address conversaion. Bank 6 is used for IO and
66 * has all the address bits zeroed by the FPGA. Special case this
67 */
68#define MEMORY_BANK_MASK 0x1fffffff
69#define IO_BANK_MASK 0x03ffffff
70
71/* Mark bank 6 as the bank used for IO. You can change this in the FPGA code
72 * if you want
73 */
74#define IO_BANK_ADR PCI_GTIO_BASE
75
76/* Will select the correct mask to apply depending on the SH$ address */
77#define SELECT_BANK_MASK(x) \
78 ( (SH4_TO_BANK(x)==SH4_TO_BANK(IO_BANK_ADR)) ? IO_BANK_MASK : MEMORY_BANK_MASK)
79
80/* Converts between PCI space and P2 region */
81#define SH4_TO_PCI(x) ((x)&SELECT_BANK_MASK(x))
82
83/* Various macros for figuring out what to stick in the Galileo registers.
84 * You *really* don't want to figure this stuff out by hand, you always get
85 * it wrong
86 */
87#define GT_MEM_LO_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>21)&0x7ff)
88#define GT_MEM_HI_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>21)&0x7f)
89#define GT_MEM_SUB_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>20)&0xff)
90
91#define PROGRAM_HI_LO(block,a,s) \
92 GT_WRITE(block##_LO_DEC_ADR,GT_MEM_LO_ADR(a));\
93 GT_WRITE(block##_HI_DEC_ADR,GT_MEM_HI_ADR(a+s-1))
94
95#define PROGRAM_SUB_HI_LO(block,a,s) \
96 GT_WRITE(block##_LO_DEC_ADR,GT_MEM_SUB_ADR(a));\
97 GT_WRITE(block##_HI_DEC_ADR,GT_MEM_SUB_ADR(a+s-1))
98
99/* We need to set the size, and the offset register */
100
101#define GT_BAR_MASK(x) ((x)&~0xfff)
102
103/* Macro to set up the BAR in the Galileo. Essentially used for the DRAM */
104#define PROGRAM_GT_BAR(block,a,s) \
105 GT_WRITE(PCI_##block##_BANK_SIZE,GT_BAR_MASK((s-1)));\
106 write_config_to_galileo(PCI_CONFIG_##block##_BASE_ADR,\
107 GT_BAR_MASK(a))
108
109#define DISABLE_GT_BAR(block) \
110 GT_WRITE(PCI_##block##_BANK_SIZE,0),\
111 GT_CONFIG_WRITE(PCI_CONFIG_##block##_BASE_ADR,\
112 0x80000000)
113
114/* Macros to disable things we are not going to use */
115#define DISABLE_DECODE(x) GT_WRITE(x##_LO_DEC_ADR,0x7ff);\
116 GT_WRITE(x##_HI_DEC_ADR,0x00)
117
118#define DISABLE_SUB_DECODE(x) GT_WRITE(x##_LO_DEC_ADR,0xff);\
119 GT_WRITE(x##_HI_DEC_ADR,0x00)
120
121static void __init reset_pci(void)
122{
123 /* Set RESET_PCI bit high */
124 writeb(readb(OVERDRIVE_CTRL) | ENABLE_PCI_BIT, OVERDRIVE_CTRL);
125 udelay(250);
126
127 /* Set RESET_PCI bit low */
128 writeb(readb(OVERDRIVE_CTRL) & RESET_PCI_MASK, OVERDRIVE_CTRL);
129 udelay(250);
130
131 writeb(readb(OVERDRIVE_CTRL) | ENABLE_PCI_BIT, OVERDRIVE_CTRL);
132 udelay(250);
133}
134
135static int write_config_to_galileo(int where, u32 val);
136#define GT_CONFIG_WRITE(where,val) write_config_to_galileo(where,val)
137
138#define ENABLE_PCI_DRAM
139
140
141#ifdef TEST_DRAM
142/* Test function to check out if the PCI DRAM is working OK */
143static int /* __init */ test_dram(unsigned *base, unsigned size)
144{
145 unsigned *p = base;
146 unsigned *end = (unsigned *) (((unsigned) base) + size);
147 unsigned w;
148
149 for (p = base; p < end; p++) {
150 *p = 0xffffffff;
151 if (*p != 0xffffffff) {
152 printk("AAARGH -write failed!!! at %p is %x\n", p,
153 *p);
154 return 0;
155 }
156 *p = 0x0;
157 if (*p != 0x0) {
158 printk("AAARGH -write failed!!!\n");
159 return 0;
160 }
161 }
162
163 for (p = base; p < end; p++) {
164 *p = (unsigned) p;
165 if (*p != (unsigned) p) {
166 printk("Failed at 0x%p, actually is 0x%x\n", p,
167 *p);
168 return 0;
169 }
170 }
171
172 for (p = base; p < end; p++) {
173 w = ((unsigned) p & 0xffff0000);
174 *p = w | (w >> 16);
175 }
176
177 for (p = base; p < end; p++) {
178 w = ((unsigned) p & 0xffff0000);
179 w |= (w >> 16);
180 if (*p != w) {
181 printk
182 ("Failed at 0x%p, should be 0x%x actually is 0x%x\n",
183 p, w, *p);
184 return 0;
185 }
186 }
187
188 return 1;
189}
190#endif
191
192
193/* Function to set up and initialise the galileo. This sets up the BARS,
194 * maps the DRAM into the address space etc,etc
195 */
196int __init galileo_init(void)
197{
198 reset_pci();
199
200 /* Now shift the galileo regs into this block */
201 RESET_GT_WRITE(INTERNAL_SPACE_DEC,
202 GT_MEM_LO_ADR(GT64111_BASE_ADDRESS));
203
204 /* Should have a sanity check here, that you can read back at the new
205 * address what you just wrote
206 */
207
208 /* Disable decode for all regions */
209 DISABLE_DECODE(RAS10);
210 DISABLE_DECODE(RAS32);
211 DISABLE_DECODE(CS20);
212 DISABLE_DECODE(CS3);
213 DISABLE_DECODE(PCI_IO);
214 DISABLE_DECODE(PCI_MEM0);
215 DISABLE_DECODE(PCI_MEM1);
216
217 /* Disable all BARS */
218 GT_WRITE(BAR_ENABLE_ADR, 0x1ff);
219 DISABLE_GT_BAR(RAS10);
220 DISABLE_GT_BAR(RAS32);
221 DISABLE_GT_BAR(CS20);
222 DISABLE_GT_BAR(CS3);
223
224 /* Tell the BAR where the IO registers now are */
225 GT_CONFIG_WRITE(PCI_CONFIG_INT_REG_IO_ADR,GT_BAR_MASK(
226 (GT64111_IO_BASE_ADDRESS &
227 IO_BANK_MASK)));
228 /* set up a 112 Mb decode */
229 PROGRAM_HI_LO(PCI_MEM0, SH_BANK4_ADR, 112 * 1024 * 1024);
230
231 /* Set up a 32 MB io space decode */
232 PROGRAM_HI_LO(PCI_IO, IO_BANK_ADR, 32 * 1024 * 1024);
233
234#ifdef ENABLE_PCI_DRAM
235 /* Program up the DRAM configuration - there is DRAM only in bank 0 */
236 /* Now set up the DRAM decode */
237 PROGRAM_HI_LO(RAS10, PCI_DRAM_BASE, PCI_DRAM_SIZE);
238 /* And the sub decode */
239 PROGRAM_SUB_HI_LO(RAS0, PCI_DRAM_BASE, PCI_DRAM_SIZE);
240
241 DISABLE_SUB_DECODE(RAS1);
242
243 /* Set refresh rate */
244 GT_WRITE(DRAM_BANK0_PARMS, 0x3f);
245 GT_WRITE(DRAM_CFG, 0x100);
246
247 /* we have to lob off the top bits rememeber!! */
248 PROGRAM_GT_BAR(RAS10, SH4_TO_PCI(PCI_DRAM_BASE), PCI_DRAM_SIZE);
249
250#endif
251
252 /* We are only interested in decoding RAS10 and the Galileo's internal
253 * registers (as IO) on the PCI bus
254 */
255#ifdef ENABLE_PCI_DRAM
256 GT_WRITE(BAR_ENABLE_ADR, (~((1 << 8) | (1 << 3))) & 0x1ff);
257#else
258 GT_WRITE(BAR_ENABLE_ADR, (~(1 << 3)) & 0x1ff);
259#endif
260
261 /* Change the class code to host bridge, it actually powers up
262 * as a memory controller
263 */
264 GT_CONFIG_WRITE(8, 0x06000011);
265
266 /* Allow the galileo to master the PCI bus */
267 GT_CONFIG_WRITE(PCI_COMMAND,
268 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
269 PCI_COMMAND_IO);
270
271
272#if 0
273 printk("Testing PCI DRAM - ");
274 if(test_dram(PCI_DRAM_BASE,PCI_DRAM_SIZE)) {
275 printk("Passed\n");
276 }else {
277 printk("FAILED\n");
278 }
279#endif
280 return 0;
281
282}
283
284
285#define SET_CONFIG_BITS(bus,devfn,where)\
286 ((1<<31) | ((bus) << 16) | ((devfn) << 8) | ((where) & ~3))
287
288#define CONFIG_CMD(dev, where) SET_CONFIG_BITS((dev)->bus->number,(dev)->devfn,where)
289
290/* This write to the galileo config registers, unlike the functions below, can
291 * be used before the PCI subsystem has started up
292 */
293static int __init write_config_to_galileo(int where, u32 val)
294{
295 GT_WRITE(PCI_CFG_ADR, SET_CONFIG_BITS(0, 0, where));
296
297 GT_WRITE(PCI_CFG_DATA, val);
298 return 0;
299}
300
301/* We exclude the galileo and slot 31, the galileo because I don't know how to stop
302 * the setup code shagging up the setup I have done on it, and 31 because the whole
303 * thing locks up if you try to access that slot (which doesn't exist of course anyway
304 */
305
306#define EXCLUDED_DEV(dev) ((dev->bus->number==0) && ((PCI_SLOT(dev->devfn)==0) || (PCI_SLOT(dev->devfn) == 31)))
307
308static int galileo_read_config_byte(struct pci_dev *dev, int where,
309 u8 * val)
310{
311
312
313 /* I suspect this doesn't work because this drives a special cycle ? */
314 if (EXCLUDED_DEV(dev)) {
315 *val = 0xff;
316 return PCIBIOS_SUCCESSFUL;
317 }
318 /* Start the config cycle */
319 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
320 /* Read back the result */
321 *val = GT_READ_BYTE(PCI_CFG_DATA + (where & 3));
322
323 return PCIBIOS_SUCCESSFUL;
324}
325
326
327static int galileo_read_config_word(struct pci_dev *dev, int where,
328 u16 * val)
329{
330
331 if (EXCLUDED_DEV(dev)) {
332 *val = 0xffff;
333 return PCIBIOS_SUCCESSFUL;
334 }
335
336 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
337 *val = GT_READ_SHORT(PCI_CFG_DATA + (where & 2));
338
339 return PCIBIOS_SUCCESSFUL;
340}
341
342
343static int galileo_read_config_dword(struct pci_dev *dev, int where,
344 u32 * val)
345{
346 if (EXCLUDED_DEV(dev)) {
347 *val = 0xffffffff;
348 return PCIBIOS_SUCCESSFUL;
349 }
350
351 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
352 *val = GT_READ(PCI_CFG_DATA);
353
354 return PCIBIOS_SUCCESSFUL;
355}
356
357static int galileo_write_config_byte(struct pci_dev *dev, int where,
358 u8 val)
359{
360 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
361
362 GT_WRITE_BYTE(PCI_CFG_DATA + (where & 3), val);
363
364 return PCIBIOS_SUCCESSFUL;
365}
366
367
368static int galileo_write_config_word(struct pci_dev *dev, int where,
369 u16 val)
370{
371 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
372
373 GT_WRITE_SHORT(PCI_CFG_DATA + (where & 2), val);
374
375 return PCIBIOS_SUCCESSFUL;
376}
377
378static int galileo_write_config_dword(struct pci_dev *dev, int where,
379 u32 val)
380{
381 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
382
383 GT_WRITE(PCI_CFG_DATA, val);
384
385 return PCIBIOS_SUCCESSFUL;
386}
387
388static struct pci_ops pci_config_ops = {
389 galileo_read_config_byte,
390 galileo_read_config_word,
391 galileo_read_config_dword,
392 galileo_write_config_byte,
393 galileo_write_config_word,
394 galileo_write_config_dword
395};
396
397
398/* Everything hangs off this */
399static struct pci_bus *pci_root_bus;
400
401
402static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin)
403{
404 return PCI_SLOT(dev->devfn);
405}
406
407static int __init map_od_irq(struct pci_dev *dev, u8 slot, u8 pin)
408{
409 /* Slot 1: Galileo
410 * Slot 2: PCI Slot 1
411 * Slot 3: PCI Slot 2
412 * Slot 4: ESS
413 */
414 switch (slot) {
415 case 2:
416 return OVERDRIVE_PCI_IRQ1;
417 case 3:
418 /* Note this assumes you have a hacked card in slot 2 */
419 return OVERDRIVE_PCI_IRQ2;
420 case 4:
421 return OVERDRIVE_ESS_IRQ;
422 default:
423 /* printk("PCI: Unexpected IRQ mapping request for slot %d\n", slot); */
424 return -1;
425 }
426}
427
428
429
430void __init
431pcibios_fixup_pbus_ranges(struct pci_bus *bus, struct pbus_set_ranges_data *ranges)
432{
433 ranges->io_start -= bus->resource[0]->start;
434 ranges->io_end -= bus->resource[0]->start;
435 ranges->mem_start -= bus->resource[1]->start;
436 ranges->mem_end -= bus->resource[1]->start;
437}
438
439static void __init pci_fixup_ide_bases(struct pci_dev *d)
440{
441 int i;
442
443 /*
444 * PCI IDE controllers use non-standard I/O port decoding, respect it.
445 */
446 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
447 return;
448 printk("PCI: IDE base address fixup for %s\n", pci_name(d));
449 for(i=0; i<4; i++) {
450 struct resource *r = &d->resource[i];
451 if ((r->start & ~0x80) == 0x374) {
452 r->start |= 2;
453 r->end = r->start;
454 }
455 }
456}
457DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
458
459void __init pcibios_init(void)
460{
461 static struct resource galio,galmem;
462
463 /* Allocate the registers used by the Galileo */
464 galio.flags = IORESOURCE_IO;
465 galio.name = "Galileo GT64011";
466 galmem.flags = IORESOURCE_MEM|IORESOURCE_PREFETCH;
467 galmem.name = "Galileo GT64011 DRAM";
468
469 allocate_resource(&ioport_resource, &galio, 256,
470 GT64111_IO_BASE_ADDRESS,GT64111_IO_BASE_ADDRESS+256, 256, NULL, NULL);
471 allocate_resource(&iomem_resource, &galmem,PCI_DRAM_SIZE,
472 PHYSADDR(PCI_DRAM_BASE), PHYSADDR(PCI_DRAM_BASE)+PCI_DRAM_SIZE,
473 PCI_DRAM_SIZE, NULL, NULL);
474
475 /* ok, do the scan man */
476 pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL);
477
478 pci_assign_unassigned_resources();
479 pci_fixup_irqs(no_swizzle, map_od_irq);
480
481#ifdef TEST_DRAM
482 printk("Testing PCI DRAM - ");
483 if(test_dram(PCI_DRAM_BASE,PCI_DRAM_SIZE)) {
484 printk("Passed\n");
485 }else {
486 printk("FAILED\n");
487 }
488#endif
489
490}
491
492char * __init pcibios_setup(char *str)
493{
494 return str;
495}
496
497
498
499int pcibios_enable_device(struct pci_dev *dev)
500{
501
502 u16 cmd, old_cmd;
503 int idx;
504 struct resource *r;
505
506 pci_read_config_word(dev, PCI_COMMAND, &cmd);
507 old_cmd = cmd;
508 for (idx = 0; idx < 6; idx++) {
509 r = dev->resource + idx;
510 if (!r->start && r->end) {
511 printk(KERN_ERR
512 "PCI: Device %s not available because"
513 " of resource collisions\n",
514 pci_name(dev));
515 return -EINVAL;
516 }
517 if (r->flags & IORESOURCE_IO)
518 cmd |= PCI_COMMAND_IO;
519 if (r->flags & IORESOURCE_MEM)
520 cmd |= PCI_COMMAND_MEMORY;
521 }
522 if (cmd != old_cmd) {
523 printk("PCI: enabling device %s (%04x -> %04x)\n",
524 pci_name(dev), old_cmd, cmd);
525 pci_write_config_word(dev, PCI_COMMAND, cmd);
526 }
527 return 0;
528
529}
530
531/* We should do some optimisation work here I think. Ok for now though */
532void __init pcibios_fixup_bus(struct pci_bus *bus)
533{
534
535}
536
537void pcibios_align_resource(void *data, struct resource *res,
538 resource_size_t size)
539{
540}
541
542void __init pcibios_update_resource(struct pci_dev *dev, struct resource *root,
543 struct resource *res, int resource)
544{
545
546 unsigned long where, size;
547 u32 reg;
548
549
550 printk("PCI: Assigning %3s %08lx to %s\n",
551 res->flags & IORESOURCE_IO ? "IO" : "MEM",
552 res->start, dev->name);
553
554 where = PCI_BASE_ADDRESS_0 + resource * 4;
555 size = res->end - res->start;
556
557 pci_read_config_dword(dev, where, &reg);
558 reg = (reg & size) | (((u32) (res->start - root->start)) & ~size);
559 pci_write_config_dword(dev, where, reg);
560}
561
562
563void __init pcibios_update_irq(struct pci_dev *dev, int irq)
564{
565 printk("PCI: Assigning IRQ %02d to %s\n", irq, dev->name);
566 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
567}
568
569/*
570 * If we set up a device for bus mastering, we need to check the latency
571 * timer as certain crappy BIOSes forget to set it properly.
572 */
573unsigned int pcibios_max_latency = 255;
574
575void pcibios_set_master(struct pci_dev *dev)
576{
577 u8 lat;
578 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
579 if (lat < 16)
580 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
581 else if (lat > pcibios_max_latency)
582 lat = pcibios_max_latency;
583 else
584 return;
585 printk("PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
586 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
587}
diff --git a/arch/sh/boards/overdrive/io.c b/arch/sh/boards/overdrive/io.c
deleted file mode 100644
index 4671b6b047bb..000000000000
--- a/arch/sh/boards/overdrive/io.c
+++ /dev/null
@@ -1,172 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file contains the I/O routines for use on the overdrive board
8 *
9 */
10
11#include <linux/types.h>
12#include <linux/delay.h>
13#include <asm/processor.h>
14#include <asm/io.h>
15#include <asm/addrspace.h>
16
17#include <asm/overdrive/overdrive.h>
18
19/*
20 * readX/writeX() are used to access memory mapped devices. On some
21 * architectures the memory mapped IO stuff needs to be accessed
22 * differently. On the SuperH architecture, we just read/write the
23 * memory location directly.
24 */
25
26#define dprintk(x...)
27
28/* Translates an IO address to where it is mapped in memory */
29
30#define io_addr(x) (((unsigned)(x))|PCI_GTIO_BASE)
31
32unsigned char od_inb(unsigned long port)
33{
34dprintk("od_inb(%x)\n", port);
35 return readb(io_addr(port)) & 0xff;
36}
37
38
39unsigned short od_inw(unsigned long port)
40{
41dprintk("od_inw(%x)\n", port);
42 return readw(io_addr(port)) & 0xffff;
43}
44
45unsigned int od_inl(unsigned long port)
46{
47dprintk("od_inl(%x)\n", port);
48 return readl(io_addr(port));
49}
50
51void od_outb(unsigned char value, unsigned long port)
52{
53dprintk("od_outb(%x, %x)\n", value, port);
54 writeb(value, io_addr(port));
55}
56
57void od_outw(unsigned short value, unsigned long port)
58{
59dprintk("od_outw(%x, %x)\n", value, port);
60 writew(value, io_addr(port));
61}
62
63void od_outl(unsigned int value, unsigned long port)
64{
65dprintk("od_outl(%x, %x)\n", value, port);
66 writel(value, io_addr(port));
67}
68
69/* This is horrible at the moment - needs more work to do something sensible */
70#define IO_DELAY() udelay(10)
71
72#define OUT_DELAY(x,type) \
73void od_out##x##_p(unsigned type value,unsigned long port){out##x(value,port);IO_DELAY();}
74
75#define IN_DELAY(x,type) \
76unsigned type od_in##x##_p(unsigned long port) {unsigned type tmp=in##x(port);IO_DELAY();return tmp;}
77
78
79OUT_DELAY(b,char)
80OUT_DELAY(w,short)
81OUT_DELAY(l,int)
82
83IN_DELAY(b,char)
84IN_DELAY(w,short)
85IN_DELAY(l,int)
86
87
88/* Now for the string version of these functions */
89void od_outsb(unsigned long port, const void *addr, unsigned long count)
90{
91 int i;
92 unsigned char *p = (unsigned char *) addr;
93
94 for (i = 0; i < count; i++, p++) {
95 outb(*p, port);
96 }
97}
98
99
100void od_insb(unsigned long port, void *addr, unsigned long count)
101{
102 int i;
103 unsigned char *p = (unsigned char *) addr;
104
105 for (i = 0; i < count; i++, p++) {
106 *p = inb(port);
107 }
108}
109
110/* For the 16 and 32 bit string functions, we have to worry about alignment.
111 * The SH does not do unaligned accesses, so we have to read as bytes and
112 * then write as a word or dword.
113 * This can be optimised a lot more, especially in the case where the data
114 * is aligned
115 */
116
117void od_outsw(unsigned long port, const void *addr, unsigned long count)
118{
119 int i;
120 unsigned short tmp;
121 unsigned char *p = (unsigned char *) addr;
122
123 for (i = 0; i < count; i++, p += 2) {
124 tmp = (*p) | ((*(p + 1)) << 8);
125 outw(tmp, port);
126 }
127}
128
129
130void od_insw(unsigned long port, void *addr, unsigned long count)
131{
132 int i;
133 unsigned short tmp;
134 unsigned char *p = (unsigned char *) addr;
135
136 for (i = 0; i < count; i++, p += 2) {
137 tmp = inw(port);
138 p[0] = tmp & 0xff;
139 p[1] = (tmp >> 8) & 0xff;
140 }
141}
142
143
144void od_outsl(unsigned long port, const void *addr, unsigned long count)
145{
146 int i;
147 unsigned tmp;
148 unsigned char *p = (unsigned char *) addr;
149
150 for (i = 0; i < count; i++, p += 4) {
151 tmp = (*p) | ((*(p + 1)) << 8) | ((*(p + 2)) << 16) |
152 ((*(p + 3)) << 24);
153 outl(tmp, port);
154 }
155}
156
157
158void od_insl(unsigned long port, void *addr, unsigned long count)
159{
160 int i;
161 unsigned tmp;
162 unsigned char *p = (unsigned char *) addr;
163
164 for (i = 0; i < count; i++, p += 4) {
165 tmp = inl(port);
166 p[0] = tmp & 0xff;
167 p[1] = (tmp >> 8) & 0xff;
168 p[2] = (tmp >> 16) & 0xff;
169 p[3] = (tmp >> 24) & 0xff;
170
171 }
172}
diff --git a/arch/sh/boards/overdrive/irq.c b/arch/sh/boards/overdrive/irq.c
deleted file mode 100644
index 5d730c70389e..000000000000
--- a/arch/sh/boards/overdrive/irq.c
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Looks after interrupts on the overdrive board.
8 *
9 * Bases on the IPR irq system
10 */
11
12#include <linux/init.h>
13#include <linux/irq.h>
14
15#include <asm/system.h>
16#include <asm/io.h>
17
18#include <asm/overdrive/overdrive.h>
19
20struct od_data {
21 int overdrive_irq;
22 int irq_mask;
23};
24
25#define NUM_EXTERNAL_IRQS 16
26#define EXTERNAL_IRQ_NOT_IN_USE (-1)
27#define EXTERNAL_IRQ_NOT_ASSIGNED (-1)
28
29/*
30 * This table is used to determine what to program into the FPGA's CT register
31 * for the specified Linux IRQ.
32 *
33 * The irq_mask gives the interrupt number from the PCI board (PCI_Int(6:0))
34 * but is one greater than that because the because the FPGA treats 0
35 * as disabled, a value of 1 asserts PCI_Int0, and so on.
36 *
37 * The overdrive_irq specifies which of the eight interrupt sources generates
38 * that interrupt, and but is multiplied by four to give the bit offset into
39 * the CT register.
40 *
41 * The seven interrupts levels (SH4 IRL's) we have available here is hardwired
42 * by the EPLD. The assignments here of which PCI interrupt generates each
43 * level is arbitary.
44 */
45static struct od_data od_data_table[NUM_EXTERNAL_IRQS] = {
46 /* overdrive_irq , irq_mask */
47 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 0 */
48 {EXTERNAL_IRQ_NOT_ASSIGNED, 7}, /* 1 */
49 {EXTERNAL_IRQ_NOT_ASSIGNED, 6}, /* 2 */
50 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 3 */
51 {EXTERNAL_IRQ_NOT_ASSIGNED, 5}, /* 4 */
52 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 5 */
53 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 6 */
54 {EXTERNAL_IRQ_NOT_ASSIGNED, 4}, /* 7 */
55 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 8 */
56 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 9 */
57 {EXTERNAL_IRQ_NOT_ASSIGNED, 3}, /* 10 */
58 {EXTERNAL_IRQ_NOT_ASSIGNED, 2}, /* 11 */
59 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 12 */
60 {EXTERNAL_IRQ_NOT_ASSIGNED, 1}, /* 13 */
61 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 14 */
62 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE} /* 15 */
63};
64
65static void set_od_data(int overdrive_irq, int irq)
66{
67 if (irq >= NUM_EXTERNAL_IRQS || irq < 0)
68 return;
69 od_data_table[irq].overdrive_irq = overdrive_irq << 2;
70}
71
72static void enable_od_irq(unsigned int irq);
73void disable_od_irq(unsigned int irq);
74
75/* shutdown is same as "disable" */
76#define shutdown_od_irq disable_od_irq
77
78static void mask_and_ack_od(unsigned int);
79static void end_od_irq(unsigned int irq);
80
81static unsigned int startup_od_irq(unsigned int irq)
82{
83 enable_od_irq(irq);
84 return 0; /* never anything pending */
85}
86
87static struct hw_interrupt_type od_irq_type = {
88 .typename = "Overdrive-IRQ",
89 .startup = startup_od_irq,
90 .shutdown = shutdown_od_irq,
91 .enable = enable_od_irq,
92 .disable = disable_od_irq,
93 .ack = mask_and_ack_od,
94 .end = end_od_irq
95};
96
97static void disable_od_irq(unsigned int irq)
98{
99 unsigned val, flags;
100 int overdrive_irq;
101 unsigned mask;
102
103 /* Not a valid interrupt */
104 if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
105 return;
106
107 /* Is is necessary to use a cli here? Would a spinlock not be
108 * mroe efficient?
109 */
110 local_irq_save(flags);
111 overdrive_irq = od_data_table[irq].overdrive_irq;
112 if (overdrive_irq != EXTERNAL_IRQ_NOT_ASSIGNED) {
113 mask = ~(0x7 << overdrive_irq);
114 val = ctrl_inl(OVERDRIVE_INT_CT);
115 val &= mask;
116 ctrl_outl(val, OVERDRIVE_INT_CT);
117 }
118 local_irq_restore(flags);
119}
120
121static void enable_od_irq(unsigned int irq)
122{
123 unsigned val, flags;
124 int overdrive_irq;
125 unsigned mask;
126
127 /* Not a valid interrupt */
128 if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
129 return;
130
131 /* Set priority in OD back to original value */
132 local_irq_save(flags);
133 /* This one is not in use currently */
134 overdrive_irq = od_data_table[irq].overdrive_irq;
135 if (overdrive_irq != EXTERNAL_IRQ_NOT_ASSIGNED) {
136 val = ctrl_inl(OVERDRIVE_INT_CT);
137 mask = ~(0x7 << overdrive_irq);
138 val &= mask;
139 mask = od_data_table[irq].irq_mask << overdrive_irq;
140 val |= mask;
141 ctrl_outl(val, OVERDRIVE_INT_CT);
142 }
143 local_irq_restore(flags);
144}
145
146
147
148/* this functions sets the desired irq handler to be an overdrive type */
149static void __init make_od_irq(unsigned int irq)
150{
151 disable_irq_nosync(irq);
152 irq_desc[irq].chip = &od_irq_type;
153 disable_od_irq(irq);
154}
155
156
157static void mask_and_ack_od(unsigned int irq)
158{
159 disable_od_irq(irq);
160}
161
162static void end_od_irq(unsigned int irq)
163{
164 enable_od_irq(irq);
165}
166
167void __init init_overdrive_irq(void)
168{
169 int i;
170
171 /* Disable all interrupts */
172 ctrl_outl(0, OVERDRIVE_INT_CT);
173
174 /* Update interrupt pin mode to use encoded interrupts */
175 i = ctrl_inw(INTC_ICR);
176 i &= ~INTC_ICR_IRLM;
177 ctrl_outw(i, INTC_ICR);
178
179 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) {
180 if (od_data_table[i].irq_mask != EXTERNAL_IRQ_NOT_IN_USE) {
181 make_od_irq(i);
182 } else if (i != 15) { // Cannot use imask on level 15
183 make_imask_irq(i);
184 }
185 }
186
187 /* Set up the interrupts */
188 set_od_data(OVERDRIVE_PCI_INTA, OVERDRIVE_PCI_IRQ1);
189 set_od_data(OVERDRIVE_PCI_INTB, OVERDRIVE_PCI_IRQ2);
190 set_od_data(OVERDRIVE_AUDIO_INT, OVERDRIVE_ESS_IRQ);
191}
diff --git a/arch/sh/boards/overdrive/led.c b/arch/sh/boards/overdrive/led.c
deleted file mode 100644
index 860d7f204a4e..000000000000
--- a/arch/sh/boards/overdrive/led.c
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * linux/arch/sh/overdrive/led.c
3 *
4 * Copyright (C) 1999 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * This file contains an Overdrive specific LED feature.
10 */
11
12#include <asm/system.h>
13#include <asm/io.h>
14#include <asm/overdrive/overdrive.h>
15
16static void mach_led(int position, int value)
17{
18 unsigned long flags;
19 unsigned long reg;
20
21 local_irq_save(flags);
22
23 reg = readl(OVERDRIVE_CTRL);
24 if (value) {
25 reg |= (1<<3);
26 } else {
27 reg &= ~(1<<3);
28 }
29 writel(reg, OVERDRIVE_CTRL);
30
31 local_irq_restore(flags);
32}
33
34#ifdef CONFIG_HEARTBEAT
35
36#include <linux/sched.h>
37
38/* acts like an actual heart beat -- ie thump-thump-pause... */
39void heartbeat_od(void)
40{
41 static unsigned cnt = 0, period = 0, dist = 0;
42
43 if (cnt == 0 || cnt == dist)
44 mach_led( -1, 1);
45 else if (cnt == 7 || cnt == dist+7)
46 mach_led( -1, 0);
47
48 if (++cnt > period) {
49 cnt = 0;
50 /* The hyperbolic function below modifies the heartbeat period
51 * length in dependency of the current (5min) load. It goes
52 * through the points f(0)=126, f(1)=86, f(5)=51,
53 * f(inf)->30. */
54 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
55 dist = period / 4;
56 }
57}
58#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/overdrive/mach.c b/arch/sh/boards/overdrive/mach.c
deleted file mode 100644
index 2834a03ae477..000000000000
--- a/arch/sh/boards/overdrive/mach.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * linux/arch/sh/overdrive/mach.c
3 *
4 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the STMicroelectronics Overdrive
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/machvec_init.h>
17
18#include <asm/io_unknown.h>
19#include <asm/io_generic.h>
20#include <asm/overdrive/io.h>
21
22void heartbeat_od(void);
23void init_overdrive_irq(void);
24void galileo_pcibios_init(void);
25
26/*
27 * The Machine Vector
28 */
29
30struct sh_machine_vector mv_od __initmv = {
31 .mv_nr_irqs = 48,
32
33 .mv_inb = od_inb,
34 .mv_inw = od_inw,
35 .mv_inl = od_inl,
36 .mv_outb = od_outb,
37 .mv_outw = od_outw,
38 .mv_outl = od_outl,
39
40 .mv_inb_p = od_inb_p,
41 .mv_inw_p = od_inw_p,
42 .mv_inl_p = od_inl_p,
43 .mv_outb_p = od_outb_p,
44 .mv_outw_p = od_outw_p,
45 .mv_outl_p = od_outl_p,
46
47 .mv_insb = od_insb,
48 .mv_insw = od_insw,
49 .mv_insl = od_insl,
50 .mv_outsb = od_outsb,
51 .mv_outsw = od_outsw,
52 .mv_outsl = od_outsl,
53
54#ifdef CONFIG_PCI
55 .mv_init_irq = init_overdrive_irq,
56#endif
57#ifdef CONFIG_HEARTBEAT
58 .mv_heartbeat = heartbeat_od,
59#endif
60};
61
62ALIAS_MV(od)
diff --git a/arch/sh/boards/overdrive/pcidma.c b/arch/sh/boards/overdrive/pcidma.c
deleted file mode 100644
index 1c9bfeda00b7..000000000000
--- a/arch/sh/boards/overdrive/pcidma.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Dynamic DMA mapping support.
8 *
9 * On the overdrive, we can only DMA from memory behind the PCI bus!
10 * this means that all DMA'able memory must come from there.
11 * this restriction will not apply to later boards.
12 */
13
14#include <linux/types.h>
15#include <linux/mm.h>
16#include <linux/string.h>
17#include <linux/pci.h>
18#include <asm/io.h>
19
20void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
21 dma_addr_t * dma_handle)
22{
23 void *ret;
24 int gfp = GFP_ATOMIC;
25
26 printk("BUG: pci_alloc_consistent() called - not yet supported\n");
27 /* We ALWAYS need DMA memory on the overdrive hardware,
28 * due to it's extreme weirdness
29 * Need to flush the cache here as well, since the memory
30 * can still be seen through the cache!
31 */
32 gfp |= GFP_DMA;
33 ret = (void *) __get_free_pages(gfp, get_order(size));
34
35 if (ret != NULL) {
36 memset(ret, 0, size);
37 *dma_handle = virt_to_bus(ret);
38 }
39 return ret;
40}
41
42void pci_free_consistent(struct pci_dev *hwdev, size_t size,
43 void *vaddr, dma_addr_t dma_handle)
44{
45 free_pages((unsigned long) vaddr, get_order(size));
46}
diff --git a/arch/sh/boards/overdrive/setup.c b/arch/sh/boards/overdrive/setup.c
deleted file mode 100644
index a3a7744c2047..000000000000
--- a/arch/sh/boards/overdrive/setup.c
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * arch/sh/overdrive/setup.c
3 *
4 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * STMicroelectronics Overdrive Support.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <asm/io.h>
15
16#include <asm/overdrive/overdrive.h>
17#include <asm/overdrive/fpga.h>
18
19const char *get_system_type(void)
20{
21 return "SH7750 Overdrive";
22}
23
24/*
25 * Initialize the board
26 */
27int __init platform_setup(void)
28{
29#ifdef CONFIG_PCI
30 init_overdrive_fpga();
31 galileo_init();
32#endif
33
34 /* Enable RS232 receive buffers */
35 writel(0x1e, OVERDRIVE_CTRL);
36}
diff --git a/arch/sh/boards/renesas/edosk7705/Makefile b/arch/sh/boards/renesas/edosk7705/Makefile
index 7fccbf2e4a1d..14bdd531f116 100644
--- a/arch/sh/boards/renesas/edosk7705/Makefile
+++ b/arch/sh/boards/renesas/edosk7705/Makefile
@@ -1,10 +1,6 @@
1# 1#
2# Makefile for the EDOSK7705 specific parts of the kernel 2# Makefile for the EDOSK7705 specific parts of the kernel
3# 3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8 4
9obj-y := setup.o io.o 5obj-y := setup.o io.o
10 6
diff --git a/arch/sh/boards/renesas/edosk7705/setup.c b/arch/sh/boards/renesas/edosk7705/setup.c
index ba143fa4afaa..ec5be0107719 100644
--- a/arch/sh/boards/renesas/edosk7705/setup.c
+++ b/arch/sh/boards/renesas/edosk7705/setup.c
@@ -8,19 +8,21 @@
8 * Modified for edosk7705 development 8 * Modified for edosk7705 development
9 * board by S. Dunn, 2003. 9 * board by S. Dunn, 2003.
10 */ 10 */
11
12#include <linux/init.h> 11#include <linux/init.h>
13#include <asm/machvec.h> 12#include <asm/machvec.h>
14#include <asm/machvec_init.h>
15#include <asm/edosk7705/io.h> 13#include <asm/edosk7705/io.h>
16 14
17static void init_edosk7705(void); 15static void __init sh_edosk7705_init_irq(void)
16{
17 /* This is the Ethernet interrupt */
18 make_imask_irq(0x09);
19}
18 20
19/* 21/*
20 * The Machine Vector 22 * The Machine Vector
21 */ 23 */
22
23struct sh_machine_vector mv_edosk7705 __initmv = { 24struct sh_machine_vector mv_edosk7705 __initmv = {
25 .mv_name = "EDOSK7705",
24 .mv_nr_irqs = 80, 26 .mv_nr_irqs = 80,
25 27
26 .mv_inb = sh_edosk7705_inb, 28 .mv_inb = sh_edosk7705_inb,
@@ -37,23 +39,6 @@ struct sh_machine_vector mv_edosk7705 __initmv = {
37 .mv_outsl = sh_edosk7705_outsl, 39 .mv_outsl = sh_edosk7705_outsl,
38 40
39 .mv_isa_port2addr = sh_edosk7705_isa_port2addr, 41 .mv_isa_port2addr = sh_edosk7705_isa_port2addr,
40 .mv_init_irq = init_edosk7705, 42 .mv_init_irq = sh_edosk7705_init_irq,
41}; 43};
42ALIAS_MV(edosk7705) 44ALIAS_MV(edosk7705)
43
44static void __init init_edosk7705(void)
45{
46 /* This is the Ethernet interrupt */
47 make_imask_irq(0x09);
48}
49
50const char *get_system_type(void)
51{
52 return "EDOSK7705";
53}
54
55void __init platform_setup(void)
56{
57 /* Nothing .. */
58}
59
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Kconfig b/arch/sh/boards/renesas/hs7751rvoip/Kconfig
new file mode 100644
index 000000000000..1743be477be5
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/Kconfig
@@ -0,0 +1,12 @@
1if SH_HS7751RVOIP
2
3menu "HS7751RVoIP options"
4
5config HS7751RVOIP_CODEC
6 bool "Support VoIP Codec section"
7 help
8 Selecting this option will support CODEC section.
9
10endmenu
11
12endif
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Makefile b/arch/sh/boards/renesas/hs7751rvoip/Makefile
index e8b4109ace11..e626377c55ee 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/Makefile
+++ b/arch/sh/boards/renesas/hs7751rvoip/Makefile
@@ -1,12 +1,8 @@
1# 1#
2# Makefile for the HS7751RVoIP specific parts of the kernel 2# Makefile for the HS7751RVoIP specific parts of the kernel
3# 3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8 4
9obj-y := mach.o setup.o io.o irq.o led.o 5obj-y := setup.o io.o irq.o
10 6
11obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
12 8
diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c
index 3a1abfa2fefb..9ea1136b219b 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/io.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/io.c
@@ -10,21 +10,16 @@
10 * placeholder code from io_hs7751rvoip.c left in with the 10 * placeholder code from io_hs7751rvoip.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 11 * expectation of later SuperIO and PCMCIA access.
12 */ 12 */
13
14#include <linux/kernel.h> 13#include <linux/kernel.h>
15#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/pci.h>
16#include <asm/io.h> 17#include <asm/io.h>
17#include <asm/hs7751rvoip/hs7751rvoip.h> 18#include <asm/hs7751rvoip/hs7751rvoip.h>
18#include <asm/addrspace.h> 19#include <asm/addrspace.h>
19 20
20#include <linux/module.h>
21#include <linux/pci.h>
22#include "../../../drivers/pci/pci-sh7751.h"
23
24extern void *area5_io8_base; /* Area 5 8bit I/O Base address */
25extern void *area6_io8_base; /* Area 6 8bit I/O Base address */ 21extern void *area6_io8_base; /* Area 6 8bit I/O Base address */
26extern void *area5_io16_base; /* Area 5 16bit I/O Base address */ 22extern void *area5_io16_base; /* Area 5 16bit I/O Base address */
27extern void *area6_io16_base; /* Area 6 16bit I/O Base address */
28 23
29/* 24/*
30 * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC) 25 * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC)
@@ -33,25 +28,8 @@ extern void *area6_io16_base; /* Area 6 16bit I/O Base address */
33 * like the other Solution Engine boards. 28 * like the other Solution Engine boards.
34 */ 29 */
35 30
36#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
37#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
38#define PCI_IO_AREA SH7751_PCI_IO_BASE
39#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
40
41#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
42
43#if defined(CONFIG_HS7751RVOIP_CODEC)
44#define CODEC_IO_BASE 0x1000 31#define CODEC_IO_BASE 0x1000
45#endif 32#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE))
46
47#define maybebadio(name,port) \
48 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
49 #name, (port), (__u32) __builtin_return_address(0))
50
51static inline void delay(void)
52{
53 ctrl_inw(0xa0000000);
54}
55 33
56static inline unsigned long port2adr(unsigned int port) 34static inline unsigned long port2adr(unsigned int port)
57{ 35{
@@ -59,9 +37,10 @@ static inline unsigned long port2adr(unsigned int port)
59 if (port == 0x3f6) 37 if (port == 0x3f6)
60 return ((unsigned long)area5_io16_base + 0x0c); 38 return ((unsigned long)area5_io16_base + 0x0c);
61 else 39 else
62 return ((unsigned long)area5_io16_base + 0x800 + ((port-0x1f0) << 1)); 40 return ((unsigned long)area5_io16_base + 0x800 +
41 ((port-0x1f0) << 1));
63 else 42 else
64 maybebadio(port2adr, (unsigned long)port); 43 maybebadio((unsigned long)port);
65 return port; 44 return port;
66} 45}
67 46
@@ -78,25 +57,10 @@ static inline int shifted_port(unsigned long port)
78} 57}
79 58
80#if defined(CONFIG_HS7751RVOIP_CODEC) 59#if defined(CONFIG_HS7751RVOIP_CODEC)
81static inline int 60#define codec_port(port) \
82codec_port(unsigned long port) 61 ((CODEC_IO_BASE <= (port)) && ((port) < (CODEC_IO_BASE + 0x20)))
83{
84 if (CODEC_IO_BASE <= port && port < (CODEC_IO_BASE+0x20))
85 return 1;
86 else
87 return 0;
88}
89#endif
90
91/* In case someone configures the kernel w/o PCI support: in that */
92/* scenario, don't ever bother to check for PCI-window addresses */
93
94/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
95#if defined(CONFIG_PCI)
96#define CHECK_SH7751_PCIIO(port) \
97 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
98#else 62#else
99#define CHECK_SH7751_PCIIO(port) (0) 63#define codec_port(port) (0)
100#endif 64#endif
101 65
102/* 66/*
@@ -109,15 +73,13 @@ codec_port(unsigned long port)
109unsigned char hs7751rvoip_inb(unsigned long port) 73unsigned char hs7751rvoip_inb(unsigned long port)
110{ 74{
111 if (PXSEG(port)) 75 if (PXSEG(port))
112 return *(volatile unsigned char *)port; 76 return ctrl_inb(port);
113#if defined(CONFIG_HS7751RVOIP_CODEC)
114 else if (codec_port(port)) 77 else if (codec_port(port))
115 return *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); 78 return ctrl_inb(CODEC_IOMAP(port));
116#endif 79 else if (is_pci_ioaddr(port) || shifted_port(port))
117 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 80 return ctrl_inb(pci_ioaddr(port));
118 return *(volatile unsigned char *)PCI_IOMAP(port);
119 else 81 else
120 return (*(volatile unsigned short *)port2adr(port) & 0xff); 82 return ctrl_inw(port2adr(port)) & 0xff;
121} 83}
122 84
123unsigned char hs7751rvoip_inb_p(unsigned long port) 85unsigned char hs7751rvoip_inb_p(unsigned long port)
@@ -125,38 +87,36 @@ unsigned char hs7751rvoip_inb_p(unsigned long port)
125 unsigned char v; 87 unsigned char v;
126 88
127 if (PXSEG(port)) 89 if (PXSEG(port))
128 v = *(volatile unsigned char *)port; 90 v = ctrl_inb(port);
129#if defined(CONFIG_HS7751RVOIP_CODEC)
130 else if (codec_port(port)) 91 else if (codec_port(port))
131 v = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); 92 v = ctrl_inb(CODEC_IOMAP(port));
132#endif 93 else if (is_pci_ioaddr(port) || shifted_port(port))
133 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 94 v = ctrl_inb(pci_ioaddr(port));
134 v = *(volatile unsigned char *)PCI_IOMAP(port);
135 else 95 else
136 v = (*(volatile unsigned short *)port2adr(port) & 0xff); 96 v = ctrl_inw(port2adr(port)) & 0xff;
137 delay(); 97 ctrl_delay();
138 return v; 98 return v;
139} 99}
140 100
141unsigned short hs7751rvoip_inw(unsigned long port) 101unsigned short hs7751rvoip_inw(unsigned long port)
142{ 102{
143 if (PXSEG(port)) 103 if (PXSEG(port))
144 return *(volatile unsigned short *)port; 104 return ctrl_inw(port);
145 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 105 else if (is_pci_ioaddr(port) || shifted_port(port))
146 return *(volatile unsigned short *)PCI_IOMAP(port); 106 return ctrl_inw(pci_ioaddr(port));
147 else 107 else
148 maybebadio(inw, port); 108 maybebadio(port);
149 return 0; 109 return 0;
150} 110}
151 111
152unsigned int hs7751rvoip_inl(unsigned long port) 112unsigned int hs7751rvoip_inl(unsigned long port)
153{ 113{
154 if (PXSEG(port)) 114 if (PXSEG(port))
155 return *(volatile unsigned long *)port; 115 return ctrl_inl(port);
156 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 116 else if (is_pci_ioaddr(port) || shifted_port(port))
157 return *(volatile unsigned long *)PCI_IOMAP(port); 117 return ctrl_inl(pci_ioaddr(port));
158 else 118 else
159 maybebadio(inl, port); 119 maybebadio(port);
160 return 0; 120 return 0;
161} 121}
162 122
@@ -164,146 +124,160 @@ void hs7751rvoip_outb(unsigned char value, unsigned long port)
164{ 124{
165 125
166 if (PXSEG(port)) 126 if (PXSEG(port))
167 *(volatile unsigned char *)port = value; 127 ctrl_outb(value, port);
168#if defined(CONFIG_HS7751RVOIP_CODEC)
169 else if (codec_port(port)) 128 else if (codec_port(port))
170 *(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; 129 ctrl_outb(value, CODEC_IOMAP(port));
171#endif 130 else if (is_pci_ioaddr(port) || shifted_port(port))
172 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 131 ctrl_outb(value, pci_ioaddr(port));
173 *(unsigned char *)PCI_IOMAP(port) = value;
174 else 132 else
175 *(volatile unsigned short *)port2adr(port) = value; 133 ctrl_outb(value, port2adr(port));
176} 134}
177 135
178void hs7751rvoip_outb_p(unsigned char value, unsigned long port) 136void hs7751rvoip_outb_p(unsigned char value, unsigned long port)
179{ 137{
180 if (PXSEG(port)) 138 if (PXSEG(port))
181 *(volatile unsigned char *)port = value; 139 ctrl_outb(value, port);
182#if defined(CONFIG_HS7751RVOIP_CODEC)
183 else if (codec_port(port)) 140 else if (codec_port(port))
184 *(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; 141 ctrl_outb(value, CODEC_IOMAP(port));
185#endif 142 else if (is_pci_ioaddr(port) || shifted_port(port))
186 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 143 ctrl_outb(value, pci_ioaddr(port));
187 *(unsigned char *)PCI_IOMAP(port) = value;
188 else 144 else
189 *(volatile unsigned short *)port2adr(port) = value; 145 ctrl_outw(value, port2adr(port));
190 delay(); 146
147 ctrl_delay();
191} 148}
192 149
193void hs7751rvoip_outw(unsigned short value, unsigned long port) 150void hs7751rvoip_outw(unsigned short value, unsigned long port)
194{ 151{
195 if (PXSEG(port)) 152 if (PXSEG(port))
196 *(volatile unsigned short *)port = value; 153 ctrl_outw(value, port);
197 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 154 else if (is_pci_ioaddr(port) || shifted_port(port))
198 *(unsigned short *)PCI_IOMAP(port) = value; 155 ctrl_outw(value, pci_ioaddr(port));
199 else 156 else
200 maybebadio(outw, port); 157 maybebadio(port);
201} 158}
202 159
203void hs7751rvoip_outl(unsigned int value, unsigned long port) 160void hs7751rvoip_outl(unsigned int value, unsigned long port)
204{ 161{
205 if (PXSEG(port)) 162 if (PXSEG(port))
206 *(volatile unsigned long *)port = value; 163 ctrl_outl(value, port);
207 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 164 else if (is_pci_ioaddr(port) || shifted_port(port))
208 *((unsigned long *)PCI_IOMAP(port)) = value; 165 ctrl_outl(value, pci_ioaddr(port));
209 else 166 else
210 maybebadio(outl, port); 167 maybebadio(port);
211} 168}
212 169
213void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count) 170void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count)
214{ 171{
172 u8 *buf = addr;
173
215 if (PXSEG(port)) 174 if (PXSEG(port))
216 while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)port; 175 while (count--)
217#if defined(CONFIG_HS7751RVOIP_CODEC) 176 *buf++ = ctrl_inb(port);
218 else if (codec_port(port)) 177 else if (codec_port(port))
219 while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); 178 while (count--)
220#endif 179 *buf++ = ctrl_inb(CODEC_IOMAP(port));
221 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 180 else if (is_pci_ioaddr(port) || shifted_port(port)) {
222 volatile __u8 *bp = (__u8 *)PCI_IOMAP(port); 181 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
223 182
224 while (count--) *((volatile unsigned char *) addr)++ = *bp; 183 while (count--)
184 *buf++ = *bp;
225 } else { 185 } else {
226 volatile __u16 *p = (volatile unsigned short *)port2adr(port); 186 volatile u16 *p = (volatile u16 *)port2adr(port);
227 187
228 while (count--) *((unsigned char *) addr)++ = *p & 0xff; 188 while (count--)
189 *buf++ = *p & 0xff;
229 } 190 }
230} 191}
231 192
232void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count) 193void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count)
233{ 194{
234 volatile __u16 *p; 195 volatile u16 *p;
196 u16 *buf = addr;
235 197
236 if (PXSEG(port)) 198 if (PXSEG(port))
237 p = (volatile unsigned short *)port; 199 p = (volatile u16 *)port;
238 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 200 else if (is_pci_ioaddr(port) || shifted_port(port))
239 p = (volatile unsigned short *)PCI_IOMAP(port); 201 p = (volatile u16 *)pci_ioaddr(port);
240 else 202 else
241 p = (volatile unsigned short *)port2adr(port); 203 p = (volatile u16 *)port2adr(port);
242 while (count--) *((__u16 *) addr)++ = *p; 204 while (count--)
205 *buf++ = *p;
243} 206}
244 207
245void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count) 208void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count)
246{ 209{
247 if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
248 volatile __u32 *p = (__u32 *)PCI_IOMAP(port);
249 210
250 while (count--) *((__u32 *) addr)++ = *p; 211 if (is_pci_ioaddr(port) || shifted_port(port)) {
212 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
213 u32 *buf = addr;
214
215 while (count--)
216 *buf++ = *p;
251 } else 217 } else
252 maybebadio(insl, port); 218 maybebadio(port);
253} 219}
254 220
255void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count) 221void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count)
256{ 222{
223 const u8 *buf = addr;
224
257 if (PXSEG(port)) 225 if (PXSEG(port))
258 while (count--) *(volatile unsigned char *)port = *((unsigned char *) addr)++; 226 while (count--)
259#if defined(CONFIG_HS7751RVOIP_CODEC) 227 ctrl_outb(*buf++, port);
260 else if (codec_port(port)) 228 else if (codec_port(port))
261 while (count--) *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = *((unsigned char *) addr)++; 229 while (count--)
262#endif 230 ctrl_outb(*buf++, CODEC_IOMAP(port));
263 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 231 else if (is_pci_ioaddr(port) || shifted_port(port)) {
264 volatile __u8 *bp = (__u8 *)PCI_IOMAP(port); 232 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
265 233
266 while (count--) *bp = *((volatile unsigned char *) addr)++; 234 while (count--)
235 *bp = *buf++;
267 } else { 236 } else {
268 volatile __u16 *p = (volatile unsigned short *)port2adr(port); 237 volatile u16 *p = (volatile u16 *)port2adr(port);
269 238
270 while (count--) *p = *((unsigned char *) addr)++; 239 while (count--)
240 *p = *buf++;
271 } 241 }
272} 242}
273 243
274void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count) 244void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count)
275{ 245{
276 volatile __u16 *p; 246 volatile u16 *p;
247 const u16 *buf = addr;
277 248
278 if (PXSEG(port)) 249 if (PXSEG(port))
279 p = (volatile unsigned short *)port; 250 p = (volatile u16 *)port;
280 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 251 else if (is_pci_ioaddr(port) || shifted_port(port))
281 p = (volatile unsigned short *)PCI_IOMAP(port); 252 p = (volatile u16 *)pci_ioaddr(port);
282 else 253 else
283 p = (volatile unsigned short *)port2adr(port); 254 p = (volatile u16 *)port2adr(port);
284 while (count--) *p = *((__u16 *) addr)++; 255
256 while (count--)
257 *p = *buf++;
285} 258}
286 259
287void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count) 260void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count)
288{ 261{
289 if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 262 const u32 *buf = addr;
290 volatile __u32 *p = (__u32 *)PCI_IOMAP(port);
291 263
292 while (count--) *p = *((__u32 *) addr)++; 264 if (is_pci_ioaddr(port) || shifted_port(port)) {
265 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
266
267 while (count--)
268 *p = *buf++;
293 } else 269 } else
294 maybebadio(outsl, port); 270 maybebadio(port);
295} 271}
296 272
297void *hs7751rvoip_ioremap(unsigned long offset, unsigned long size) 273void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size)
298{ 274{
299 if (offset >= 0xfd000000) 275 if (PXSEG(port))
300 return (void *)offset; 276 return (void __iomem *)port;
301 else 277 else if (unlikely(codec_port(port) && (size == 1)))
302 return (void *)P2SEGADDR(offset); 278 return (void __iomem *)CODEC_IOMAP(port);
303} 279 else if (is_pci_ioaddr(port))
304EXPORT_SYMBOL(hs7751rvoip_ioremap); 280 return (void __iomem *)pci_ioaddr(port);
305 281
306unsigned long hs7751rvoip_isa_port2addr(unsigned long offset) 282 return (void __iomem *)port2adr(port);
307{
308 return port2adr(offset);
309} 283}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c
index 705b7ddcb0d2..c617b188258a 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/irq.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/irq.c
@@ -35,30 +35,24 @@ static unsigned int startup_hs7751rvoip_irq(unsigned int irq)
35 35
36static void disable_hs7751rvoip_irq(unsigned int irq) 36static void disable_hs7751rvoip_irq(unsigned int irq)
37{ 37{
38 unsigned long flags;
39 unsigned short val; 38 unsigned short val;
40 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); 39 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
41 40
42 /* Set the priority in IPR to 0 */ 41 /* Set the priority in IPR to 0 */
43 local_irq_save(flags);
44 val = ctrl_inw(IRLCNTR3); 42 val = ctrl_inw(IRLCNTR3);
45 val &= mask; 43 val &= mask;
46 ctrl_outw(val, IRLCNTR3); 44 ctrl_outw(val, IRLCNTR3);
47 local_irq_restore(flags);
48} 45}
49 46
50static void enable_hs7751rvoip_irq(unsigned int irq) 47static void enable_hs7751rvoip_irq(unsigned int irq)
51{ 48{
52 unsigned long flags;
53 unsigned short val; 49 unsigned short val;
54 unsigned short value = (0x0001 << mask_pos[irq]); 50 unsigned short value = (0x0001 << mask_pos[irq]);
55 51
56 /* Set priority in IPR back to original value */ 52 /* Set priority in IPR back to original value */
57 local_irq_save(flags);
58 val = ctrl_inw(IRLCNTR3); 53 val = ctrl_inw(IRLCNTR3);
59 val |= value; 54 val |= value;
60 ctrl_outw(val, IRLCNTR3); 55 ctrl_outw(val, IRLCNTR3);
61 local_irq_restore(flags);
62} 56}
63 57
64static void ack_hs7751rvoip_irq(unsigned int irq) 58static void ack_hs7751rvoip_irq(unsigned int irq)
diff --git a/arch/sh/boards/renesas/hs7751rvoip/led.c b/arch/sh/boards/renesas/hs7751rvoip/led.c
deleted file mode 100644
index b6608fff9f38..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/led.c
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * linux/arch/sh/kernel/setup_hs7751rvoip.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Renesas Technology Sales HS7751RVoIP Support.
7 *
8 * Modified for HS7751RVoIP by
9 * Atom Create Engineering Co., Ltd. 2002.
10 * Lineo uSolutions, Inc. 2003.
11 */
12
13#include <asm/io.h>
14#include <asm/hs7751rvoip/hs7751rvoip.h>
15
16extern unsigned int debug_counter;
17
18void debug_led_disp(void)
19{
20 unsigned short value;
21
22 value = (unsigned char)debug_counter++;
23 ctrl_outb((0xf0|value), PA_OUTPORTR);
24 if (value == 0x0f)
25 debug_counter = 0;
26}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/mach.c b/arch/sh/boards/renesas/hs7751rvoip/mach.c
deleted file mode 100644
index caf967f77c61..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/mach.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/sh/kernel/mach_hs7751rvoip.c
3 *
4 * Minor tweak of mach_se.c file to reference hs7751rvoip-specific items.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the Renesas Technology sales HS7751RVoIP
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/irq.h>
17#include <asm/hs7751rvoip/io.h>
18
19extern void init_hs7751rvoip_IRQ(void);
20extern void *hs7751rvoip_ioremap(unsigned long, unsigned long);
21
22/*
23 * The Machine Vector
24 */
25
26struct sh_machine_vector mv_hs7751rvoip __initmv = {
27 .mv_nr_irqs = 72,
28
29 .mv_inb = hs7751rvoip_inb,
30 .mv_inw = hs7751rvoip_inw,
31 .mv_inl = hs7751rvoip_inl,
32 .mv_outb = hs7751rvoip_outb,
33 .mv_outw = hs7751rvoip_outw,
34 .mv_outl = hs7751rvoip_outl,
35
36 .mv_inb_p = hs7751rvoip_inb_p,
37 .mv_inw_p = hs7751rvoip_inw,
38 .mv_inl_p = hs7751rvoip_inl,
39 .mv_outb_p = hs7751rvoip_outb_p,
40 .mv_outw_p = hs7751rvoip_outw,
41 .mv_outl_p = hs7751rvoip_outl,
42
43 .mv_insb = hs7751rvoip_insb,
44 .mv_insw = hs7751rvoip_insw,
45 .mv_insl = hs7751rvoip_insl,
46 .mv_outsb = hs7751rvoip_outsb,
47 .mv_outsw = hs7751rvoip_outsw,
48 .mv_outsl = hs7751rvoip_outsl,
49
50 .mv_ioremap = hs7751rvoip_ioremap,
51 .mv_isa_port2addr = hs7751rvoip_isa_port2addr,
52 .mv_init_irq = init_hs7751rvoip_IRQ,
53};
54ALIAS_MV(hs7751rvoip)
diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c
index 29fb5ff70fb5..0414c15c3458 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/setup.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/setup.c
@@ -1,44 +1,38 @@
1/* 1/*
2 * linux/arch/sh/kernel/setup_hs7751rvoip.c 2 * Renesas Technology Sales HS7751RVoIP Support.
3 * 3 *
4 * Copyright (C) 2000 Kazumoto Kojima 4 * Copyright (C) 2000 Kazumoto Kojima
5 * 5 *
6 * Renesas Technology Sales HS7751RVoIP Support.
7 *
8 * Modified for HS7751RVoIP by 6 * Modified for HS7751RVoIP by
9 * Atom Create Engineering Co., Ltd. 2002. 7 * Atom Create Engineering Co., Ltd. 2002.
10 * Lineo uSolutions, Inc. 2003. 8 * Lineo uSolutions, Inc. 2003.
11 */ 9 */
12
13#include <linux/init.h> 10#include <linux/init.h>
14#include <linux/irq.h> 11#include <linux/irq.h>
15 12#include <linux/mm.h>
13#include <linux/vmalloc.h>
16#include <linux/hdreg.h> 14#include <linux/hdreg.h>
17#include <linux/ide.h> 15#include <linux/ide.h>
16#include <linux/pm.h>
18#include <asm/io.h> 17#include <asm/io.h>
19#include <asm/hs7751rvoip/hs7751rvoip.h> 18#include <asm/hs7751rvoip/hs7751rvoip.h>
19#include <asm/machvec.h>
20#include <asm/rtc.h>
21#include <asm/irq.h>
20 22
21#include <linux/mm.h> 23static void __init hs7751rvoip_init_irq(void)
22#include <linux/vmalloc.h>
23
24/* defined in mm/ioremap.c */
25extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
26
27unsigned int debug_counter;
28
29const char *get_system_type(void)
30{ 24{
31 return "HS7751RVoIP"; 25#if defined(CONFIG_HS7751RVOIP_CODEC)
26 make_ipr_irq(DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
27 make_ipr_irq(DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
28#endif
29
30 init_hs7751rvoip_IRQ();
32} 31}
33 32
34/* 33static void hs7751rvoip_power_off(void)
35 * Initialize the board
36 */
37void __init platform_setup(void)
38{ 34{
39 printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n"); 35 ctrl_outw(ctrl_inw(PA_OUTPORTR) & 0xffdf, PA_OUTPORTR);
40 ctrl_outb(0xf0, PA_OUTPORTR);
41 debug_counter = 0;
42} 36}
43 37
44void *area5_io8_base; 38void *area5_io8_base;
@@ -46,16 +40,15 @@ void *area6_io8_base;
46void *area5_io16_base; 40void *area5_io16_base;
47void *area6_io16_base; 41void *area6_io16_base;
48 42
49int __init cf_init(void) 43static int __init hs7751rvoip_cf_init(void)
50{ 44{
51 pgprot_t prot; 45 pgprot_t prot;
52 unsigned long paddrbase, psize; 46 unsigned long paddrbase;
53 47
54 /* open I/O area window */ 48 /* open I/O area window */
55 paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800)); 49 paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800));
56 psize = PAGE_SIZE;
57 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16); 50 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16);
58 area5_io16_base = p3_ioremap(paddrbase, psize, prot.pgprot); 51 area5_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
59 if (!area5_io16_base) { 52 if (!area5_io16_base) {
60 printk("allocate_cf_area : can't open CF I/O window!\n"); 53 printk("allocate_cf_area : can't open CF I/O window!\n");
61 return -ENOMEM; 54 return -ENOMEM;
@@ -64,19 +57,18 @@ int __init cf_init(void)
64 /* XXX : do we need attribute and common-memory area also? */ 57 /* XXX : do we need attribute and common-memory area also? */
65 58
66 paddrbase = virt_to_phys((void *)PA_AREA6_IO); 59 paddrbase = virt_to_phys((void *)PA_AREA6_IO);
67 psize = PAGE_SIZE;
68#if defined(CONFIG_HS7751RVOIP_CODEC) 60#if defined(CONFIG_HS7751RVOIP_CODEC)
69 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8); 61 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8);
70#else 62#else
71 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8); 63 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8);
72#endif 64#endif
73 area6_io8_base = p3_ioremap(paddrbase, psize, prot.pgprot); 65 area6_io8_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
74 if (!area6_io8_base) { 66 if (!area6_io8_base) {
75 printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n"); 67 printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n");
76 return -ENOMEM; 68 return -ENOMEM;
77 } 69 }
78 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16); 70 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
79 area6_io16_base = p3_ioremap(paddrbase, psize, prot.pgprot); 71 area6_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
80 if (!area6_io16_base) { 72 if (!area6_io16_base) {
81 printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n"); 73 printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n");
82 return -ENOMEM; 74 return -ENOMEM;
@@ -85,4 +77,46 @@ int __init cf_init(void)
85 return 0; 77 return 0;
86} 78}
87 79
88__initcall (cf_init); 80/*
81 * Initialize the board
82 */
83static void __init hs7751rvoip_setup(char **cmdline_p)
84{
85 device_initcall(hs7751rvoip_cf_init);
86
87 ctrl_outb(0xf0, PA_OUTPORTR);
88 pm_power_off = hs7751rvoip_power_off;
89
90 printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n");
91}
92
93struct sh_machine_vector mv_hs7751rvoip __initmv = {
94 .mv_name = "HS7751RVoIP",
95 .mv_setup = hs7751rvoip_setup,
96 .mv_nr_irqs = 72,
97
98 .mv_inb = hs7751rvoip_inb,
99 .mv_inw = hs7751rvoip_inw,
100 .mv_inl = hs7751rvoip_inl,
101 .mv_outb = hs7751rvoip_outb,
102 .mv_outw = hs7751rvoip_outw,
103 .mv_outl = hs7751rvoip_outl,
104
105 .mv_inb_p = hs7751rvoip_inb_p,
106 .mv_inw_p = hs7751rvoip_inw,
107 .mv_inl_p = hs7751rvoip_inl,
108 .mv_outb_p = hs7751rvoip_outb_p,
109 .mv_outw_p = hs7751rvoip_outw,
110 .mv_outl_p = hs7751rvoip_outl,
111
112 .mv_insb = hs7751rvoip_insb,
113 .mv_insw = hs7751rvoip_insw,
114 .mv_insl = hs7751rvoip_insl,
115 .mv_outsb = hs7751rvoip_outsb,
116 .mv_outsw = hs7751rvoip_outsw,
117 .mv_outsl = hs7751rvoip_outsl,
118
119 .mv_init_irq = hs7751rvoip_init_irq,
120 .mv_ioport_map = hs7751rvoip_ioport_map,
121};
122ALIAS_MV(hs7751rvoip)
diff --git a/arch/sh/boards/renesas/r7780rp/Kconfig b/arch/sh/boards/renesas/r7780rp/Kconfig
new file mode 100644
index 000000000000..c26d9813d239
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/Kconfig
@@ -0,0 +1,14 @@
1if SH_R7780RP
2
3menu "R7780RP options"
4
5config SH_R7780MP
6 bool "R7780MP board support"
7 default y
8 help
9 Selecting this option will enable support for the mass-production
10 version of the R7780RP. If in doubt, say Y.
11
12endmenu
13
14endif
diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile
new file mode 100644
index 000000000000..f1776d027978
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for the R7780RP-1 specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c
new file mode 100644
index 000000000000..db92d6e6ae99
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/io.c
@@ -0,0 +1,301 @@
1/*
2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
3 * Based largely on io_se.c.
4 *
5 * I/O routine for Renesas Solutions Highlander R7780RP-1
6 *
7 * Initial version only to support LAN access; some
8 * placeholder code from io_r7780rp.c left in with the
9 * expectation of later SuperIO and PCMCIA access.
10 */
11#include <linux/pci.h>
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <asm/r7780rp/r7780rp.h>
15#include <asm/addrspace.h>
16#include <asm/io.h>
17
18static inline unsigned long port2adr(unsigned int port)
19{
20 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
21 if (port == 0x3f6)
22 return (PA_AREA5_IO + 0x80c);
23 else
24 return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
25 else
26 maybebadio((unsigned long)port);
27
28 return port;
29}
30
31static inline unsigned long port88796l(unsigned int port, int flag)
32{
33 unsigned long addr;
34
35 if (flag)
36 addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1);
37 else
38 addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000;
39
40 return addr;
41}
42
43/* The 7780 R7780RP-1 seems to have everything hooked */
44/* up pretty normally (nothing on high-bytes only...) so this */
45/* shouldn't be needed */
46static inline int shifted_port(unsigned long port)
47{
48 /* For IDE registers, value is not shifted */
49 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
50 return 0;
51 else
52 return 1;
53}
54
55#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
56#define CHECK_AX88796L_PORT(port) \
57 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
58#else
59#define CHECK_AX88796L_PORT(port) (0)
60#endif
61
62/*
63 * General outline: remap really low stuff [eventually] to SuperIO,
64 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
65 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
66 * should be way beyond the window, and is used w/o translation for
67 * compatibility.
68 */
69u8 r7780rp_inb(unsigned long port)
70{
71 if (CHECK_AX88796L_PORT(port))
72 return ctrl_inw(port88796l(port, 0)) & 0xff;
73 else if (PXSEG(port))
74 return ctrl_inb(port);
75 else if (is_pci_ioaddr(port) || shifted_port(port))
76 return ctrl_inb(pci_ioaddr(port));
77
78 return ctrl_inw(port2adr(port)) & 0xff;
79}
80
81u8 r7780rp_inb_p(unsigned long port)
82{
83 u8 v;
84
85 if (CHECK_AX88796L_PORT(port))
86 v = ctrl_inw(port88796l(port, 0)) & 0xff;
87 else if (PXSEG(port))
88 v = ctrl_inb(port);
89 else if (is_pci_ioaddr(port) || shifted_port(port))
90 v = ctrl_inb(pci_ioaddr(port));
91 else
92 v = ctrl_inw(port2adr(port)) & 0xff;
93
94 ctrl_delay();
95
96 return v;
97}
98
99u16 r7780rp_inw(unsigned long port)
100{
101 if (CHECK_AX88796L_PORT(port))
102 maybebadio(port);
103 else if (PXSEG(port))
104 return ctrl_inw(port);
105 else if (is_pci_ioaddr(port) || shifted_port(port))
106 return ctrl_inw(pci_ioaddr(port));
107 else
108 maybebadio(port);
109
110 return 0;
111}
112
113u32 r7780rp_inl(unsigned long port)
114{
115 if (CHECK_AX88796L_PORT(port))
116 maybebadio(port);
117 else if (PXSEG(port))
118 return ctrl_inl(port);
119 else if (is_pci_ioaddr(port) || shifted_port(port))
120 return ctrl_inl(pci_ioaddr(port));
121 else
122 maybebadio(port);
123
124 return 0;
125}
126
127void r7780rp_outb(u8 value, unsigned long port)
128{
129 if (CHECK_AX88796L_PORT(port))
130 ctrl_outw(value, port88796l(port, 0));
131 else if (PXSEG(port))
132 ctrl_outb(value, port);
133 else if (is_pci_ioaddr(port) || shifted_port(port))
134 ctrl_outb(value, pci_ioaddr(port));
135 else
136 ctrl_outw(value, port2adr(port));
137}
138
139void r7780rp_outb_p(u8 value, unsigned long port)
140{
141 if (CHECK_AX88796L_PORT(port))
142 ctrl_outw(value, port88796l(port, 0));
143 else if (PXSEG(port))
144 ctrl_outb(value, port);
145 else if (is_pci_ioaddr(port) || shifted_port(port))
146 ctrl_outb(value, pci_ioaddr(port));
147 else
148 ctrl_outw(value, port2adr(port));
149
150 ctrl_delay();
151}
152
153void r7780rp_outw(u16 value, unsigned long port)
154{
155 if (CHECK_AX88796L_PORT(port))
156 maybebadio(port);
157 else if (PXSEG(port))
158 ctrl_outw(value, port);
159 else if (is_pci_ioaddr(port) || shifted_port(port))
160 ctrl_outw(value, pci_ioaddr(port));
161 else
162 maybebadio(port);
163}
164
165void r7780rp_outl(u32 value, unsigned long port)
166{
167 if (CHECK_AX88796L_PORT(port))
168 maybebadio(port);
169 else if (PXSEG(port))
170 ctrl_outl(value, port);
171 else if (is_pci_ioaddr(port) || shifted_port(port))
172 ctrl_outl(value, pci_ioaddr(port));
173 else
174 maybebadio(port);
175}
176
177void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
178{
179 volatile u16 *p;
180 u8 *buf = dst;
181
182 if (CHECK_AX88796L_PORT(port)) {
183 p = (volatile u16 *)port88796l(port, 0);
184 while (count--)
185 *buf++ = *p & 0xff;
186 } else if (PXSEG(port)) {
187 while (count--)
188 *buf++ = *(volatile u8 *)port;
189 } else if (is_pci_ioaddr(port) || shifted_port(port)) {
190 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
191
192 while (count--)
193 *buf++ = *bp;
194 } else {
195 p = (volatile u16 *)port2adr(port);
196 while (count--)
197 *buf++ = *p & 0xff;
198 }
199}
200
201void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
202{
203 volatile u16 *p;
204 u16 *buf = dst;
205
206 if (CHECK_AX88796L_PORT(port))
207 p = (volatile u16 *)port88796l(port, 1);
208 else if (PXSEG(port))
209 p = (volatile u16 *)port;
210 else if (is_pci_ioaddr(port) || shifted_port(port))
211 p = (volatile u16 *)pci_ioaddr(port);
212 else
213 p = (volatile u16 *)port2adr(port);
214
215 while (count--)
216 *buf++ = *p;
217}
218
219void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
220{
221 u32 *buf = dst;
222
223 if (CHECK_AX88796L_PORT(port))
224 maybebadio(port);
225 else if (is_pci_ioaddr(port) || shifted_port(port)) {
226 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
227
228 while (count--)
229 *buf++ = *p;
230 } else
231 maybebadio(port);
232}
233
234void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
235{
236 volatile u16 *p;
237 const u8 *buf = src;
238
239 if (CHECK_AX88796L_PORT(port)) {
240 p = (volatile u16 *)port88796l(port, 0);
241 while (count--)
242 *p = *buf++;
243 } else if (PXSEG(port))
244 while (count--)
245 ctrl_outb(*buf++, port);
246 else if (is_pci_ioaddr(port) || shifted_port(port)) {
247 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
248
249 while (count--)
250 *bp = *buf++;
251 } else {
252 p = (volatile u16 *)port2adr(port);
253 while (count--)
254 *p = *buf++;
255 }
256}
257
258void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
259{
260 volatile u16 *p;
261 const u16 *buf = src;
262
263 if (CHECK_AX88796L_PORT(port))
264 p = (volatile u16 *)port88796l(port, 1);
265 else if (PXSEG(port))
266 p = (volatile u16 *)port;
267 else if (is_pci_ioaddr(port) || shifted_port(port))
268 p = (volatile u16 *)pci_ioaddr(port);
269 else
270 p = (volatile u16 *)port2adr(port);
271
272 while (count--)
273 *p = *buf++;
274}
275
276void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
277{
278 const u32 *buf = src;
279
280 if (CHECK_AX88796L_PORT(port))
281 maybebadio(port);
282 else if (is_pci_ioaddr(port) || shifted_port(port)) {
283 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
284
285 while (count--)
286 *p = *buf++;
287 } else
288 maybebadio(port);
289}
290
291void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
292{
293 if (CHECK_AX88796L_PORT(port))
294 return (void __iomem *)port88796l(port, size > 1);
295 else if (PXSEG(port))
296 return (void __iomem *)port;
297 else if (is_pci_ioaddr(port) || shifted_port(port))
298 return (void __iomem *)pci_ioaddr(port);
299
300 return (void __iomem *)port2adr(port);
301}
diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c
new file mode 100644
index 000000000000..61d5e5d3c294
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/irq.c
@@ -0,0 +1,117 @@
1/*
2 * linux/arch/sh/boards/renesas/r7780rp/irq.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Renesas Solutions Highlander R7780RP-1 Support.
7 *
8 * Modified for R7780RP-1 by
9 * Atom Create Engineering Co., Ltd. 2002.
10 */
11
12#include <linux/config.h>
13#include <linux/init.h>
14#include <linux/irq.h>
15#include <asm/io.h>
16#include <asm/irq.h>
17#include <asm/r7780rp/r7780rp.h>
18
19#ifdef CONFIG_SH_R7780MP
20static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
21#else
22static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0};
23#endif
24
25static void enable_r7780rp_irq(unsigned int irq);
26static void disable_r7780rp_irq(unsigned int irq);
27
28/* shutdown is same as "disable" */
29#define shutdown_r7780rp_irq disable_r7780rp_irq
30
31static void ack_r7780rp_irq(unsigned int irq);
32static void end_r7780rp_irq(unsigned int irq);
33
34static unsigned int startup_r7780rp_irq(unsigned int irq)
35{
36 enable_r7780rp_irq(irq);
37 return 0; /* never anything pending */
38}
39
40static void disable_r7780rp_irq(unsigned int irq)
41{
42 unsigned short val;
43 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
44
45 /* Set the priority in IPR to 0 */
46 val = ctrl_inw(IRLCNTR1);
47 val &= mask;
48 ctrl_outw(val, IRLCNTR1);
49}
50
51static void enable_r7780rp_irq(unsigned int irq)
52{
53 unsigned short val;
54 unsigned short value = (0x0001 << mask_pos[irq]);
55
56 /* Set priority in IPR back to original value */
57 val = ctrl_inw(IRLCNTR1);
58 val |= value;
59 ctrl_outw(val, IRLCNTR1);
60}
61
62static void ack_r7780rp_irq(unsigned int irq)
63{
64 disable_r7780rp_irq(irq);
65}
66
67static void end_r7780rp_irq(unsigned int irq)
68{
69 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
70 enable_r7780rp_irq(irq);
71}
72
73static struct hw_interrupt_type r7780rp_irq_type = {
74 .typename = "R7780RP-IRQ",
75 .startup = startup_r7780rp_irq,
76 .shutdown = shutdown_r7780rp_irq,
77 .enable = enable_r7780rp_irq,
78 .disable = disable_r7780rp_irq,
79 .ack = ack_r7780rp_irq,
80 .end = end_r7780rp_irq,
81};
82
83static void make_r7780rp_irq(unsigned int irq)
84{
85 disable_irq_nosync(irq);
86 irq_desc[irq].handler = &r7780rp_irq_type;
87 disable_r7780rp_irq(irq);
88}
89
90/*
91 * Initialize IRQ setting
92 */
93void __init init_r7780rp_IRQ(void)
94{
95 int i;
96
97 /* IRL0=PCI Slot #A
98 * IRL1=PCI Slot #B
99 * IRL2=PCI Slot #C
100 * IRL3=PCI Slot #D
101 * IRL4=CF Card
102 * IRL5=CF Card Insert
103 * IRL6=M66596
104 * IRL7=SD Card
105 * IRL8=Touch Panel
106 * IRL9=SCI
107 * IRL10=Serial
108 * IRL11=Extention #A
109 * IRL11=Extention #B
110 * IRL12=Debug LAN
111 * IRL13=Push Switch
112 * IRL14=ZiggBee IO
113 */
114
115 for (i=0; i<15; i++)
116 make_r7780rp_irq(i);
117}
diff --git a/arch/sh/boards/renesas/r7780rp/led.c b/arch/sh/boards/renesas/r7780rp/led.c
new file mode 100644
index 000000000000..9f02766b6f53
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/led.c
@@ -0,0 +1,45 @@
1/*
2 * Copyright (C) Atom Create Engineering Co., Ltd.
3 *
4 * May be copied or modified under the terms of GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file contains Renesas Solutions HIGHLANDER R7780RP-1 specific LED code.
8 */
9
10#include <linux/config.h>
11#include <linux/sched.h>
12#include <asm/io.h>
13#include <asm/r7780rp/r7780rp.h>
14
15/* Cycle the LED's in the clasic Knightriger/Sun pattern */
16void heartbeat_r7780rp(void)
17{
18 static unsigned int cnt = 0, period = 0;
19 volatile unsigned short *p = (volatile unsigned short *)PA_OBLED;
20 static unsigned bit = 0, up = 1;
21 unsigned bit_pos[] = {2, 1, 0, 3, 6, 5, 4, 7};
22
23 cnt += 1;
24 if (cnt < period)
25 return;
26
27 cnt = 0;
28
29 /* Go through the points (roughly!):
30 * f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110
31 */
32 period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT)));
33
34 *p = 1 << bit_pos[bit];
35 if (up)
36 if (bit == 7) {
37 bit--;
38 up = 0;
39 } else
40 bit++;
41 else if (bit == 0)
42 up = 1;
43 else
44 bit--;
45}
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
new file mode 100644
index 000000000000..b941aa0aa34e
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -0,0 +1,163 @@
1/*
2 * arch/sh/boards/renesas/r7780rp/setup.c
3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2005, 2006 Paul Mundt
6 *
7 * Renesas Solutions Highlander R7780RP-1 Support.
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <asm/machvec.h>
16#include <asm/r7780rp/r7780rp.h>
17#include <asm/clock.h>
18#include <asm/io.h>
19
20extern void heartbeat_r7780rp(void);
21extern void init_r7780rp_IRQ(void);
22
23static struct resource m66596_usb_host_resources[] = {
24 [0] = {
25 .start = 0xa4800000,
26 .end = 0xa4ffffff,
27 .flags = IORESOURCE_MEM,
28 },
29 [1] = {
30 .start = 6, /* irq number */
31 .end = 6,
32 .flags = IORESOURCE_IRQ,
33 },
34};
35
36static struct platform_device m66596_usb_host_device = {
37 .name = "m66596-hcd",
38 .id = 0,
39 .dev = {
40 .dma_mask = NULL, /* don't use dma */
41 .coherent_dma_mask = 0xffffffff,
42 },
43 .num_resources = ARRAY_SIZE(m66596_usb_host_resources),
44 .resource = m66596_usb_host_resources,
45};
46
47static struct platform_device *r7780rp_devices[] __initdata = {
48 &m66596_usb_host_device,
49};
50
51static int __init r7780rp_devices_setup(void)
52{
53 return platform_add_devices(r7780rp_devices,
54 ARRAY_SIZE(r7780rp_devices));
55}
56
57/*
58 * Platform specific clocks
59 */
60static void ivdr_clk_enable(struct clk *clk)
61{
62 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << 8), PA_IVDRCTL);
63}
64
65static void ivdr_clk_disable(struct clk *clk)
66{
67 ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << 8), PA_IVDRCTL);
68}
69
70static struct clk_ops ivdr_clk_ops = {
71 .enable = ivdr_clk_enable,
72 .disable = ivdr_clk_disable,
73};
74
75static struct clk ivdr_clk = {
76 .name = "ivdr_clk",
77 .ops = &ivdr_clk_ops,
78};
79
80static struct clk *r7780rp_clocks[] = {
81 &ivdr_clk,
82};
83
84static void r7780rp_power_off(void)
85{
86#ifdef CONFIG_SH_R7780MP
87 ctrl_outw(0x0001, PA_POFF);
88#endif
89}
90
91/*
92 * Initialize the board
93 */
94static void __init r7780rp_setup(char **cmdline_p)
95{
96 u16 ver = ctrl_inw(PA_VERREG);
97 int i;
98
99 device_initcall(r7780rp_devices_setup);
100
101 printk(KERN_INFO "Renesas Solutions Highlander R7780RP-1 support.\n");
102
103 printk(KERN_INFO "Board version: %d (revision %d), "
104 "FPGA version: %d (revision %d)\n",
105 (ver >> 12) & 0xf, (ver >> 8) & 0xf,
106 (ver >> 4) & 0xf, ver & 0xf);
107
108 /*
109 * Enable the important clocks right away..
110 */
111 for (i = 0; i < ARRAY_SIZE(r7780rp_clocks); i++) {
112 struct clk *clk = r7780rp_clocks[i];
113
114 clk_register(clk);
115 clk_enable(clk);
116 }
117
118 ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */
119#ifndef CONFIG_SH_R7780MP
120 ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */
121#endif
122 ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x0100, PA_IVDRCTL); /* Si13112 */
123
124 pm_power_off = r7780rp_power_off;
125}
126
127/*
128 * The Machine Vector
129 */
130struct sh_machine_vector mv_r7780rp __initmv = {
131 .mv_name = "Highlander R7780RP-1",
132 .mv_setup = r7780rp_setup,
133
134 .mv_nr_irqs = 109,
135
136 .mv_inb = r7780rp_inb,
137 .mv_inw = r7780rp_inw,
138 .mv_inl = r7780rp_inl,
139 .mv_outb = r7780rp_outb,
140 .mv_outw = r7780rp_outw,
141 .mv_outl = r7780rp_outl,
142
143 .mv_inb_p = r7780rp_inb_p,
144 .mv_inw_p = r7780rp_inw,
145 .mv_inl_p = r7780rp_inl,
146 .mv_outb_p = r7780rp_outb_p,
147 .mv_outw_p = r7780rp_outw,
148 .mv_outl_p = r7780rp_outl,
149
150 .mv_insb = r7780rp_insb,
151 .mv_insw = r7780rp_insw,
152 .mv_insl = r7780rp_insl,
153 .mv_outsb = r7780rp_outsb,
154 .mv_outsw = r7780rp_outsw,
155 .mv_outsl = r7780rp_outsl,
156
157 .mv_ioport_map = r7780rp_ioport_map,
158 .mv_init_irq = init_r7780rp_IRQ,
159#ifdef CONFIG_HEARTBEAT
160 .mv_heartbeat = heartbeat_r7780rp,
161#endif
162};
163ALIAS_MV(r7780rp)
diff --git a/arch/sh/boards/renesas/rts7751r2d/Kconfig b/arch/sh/boards/renesas/rts7751r2d/Kconfig
new file mode 100644
index 000000000000..7780d1fb13ff
--- /dev/null
+++ b/arch/sh/boards/renesas/rts7751r2d/Kconfig
@@ -0,0 +1,12 @@
1if SH_RTS7751R2D
2
3menu "RTS7751R2D options"
4
5config RTS7751R2D_REV11
6 bool "RTS7751R2D Rev. 1.1 board support"
7 help
8 Selecting this option will support version rev. 1.1.
9endmenu
10
11endif
12
diff --git a/arch/sh/boards/renesas/rts7751r2d/Makefile b/arch/sh/boards/renesas/rts7751r2d/Makefile
index daa53334bdc3..686fc9ea5989 100644
--- a/arch/sh/boards/renesas/rts7751r2d/Makefile
+++ b/arch/sh/boards/renesas/rts7751r2d/Makefile
@@ -1,10 +1,6 @@
1# 1#
2# Makefile for the RTS7751R2D specific parts of the kernel 2# Makefile for the RTS7751R2D specific parts of the kernel
3# 3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9obj-y := mach.o setup.o io.o irq.o led.o
10 4
5obj-y := setup.o io.o irq.o
6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/renesas/rts7751r2d/io.c b/arch/sh/boards/renesas/rts7751r2d/io.c
index 123abbbc91e0..135aa0b5e62d 100644
--- a/arch/sh/boards/renesas/rts7751r2d/io.c
+++ b/arch/sh/boards/renesas/rts7751r2d/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_rts7751r2d.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 3 * Based largely on io_se.c.
6 * 4 *
@@ -10,17 +8,13 @@
10 * placeholder code from io_rts7751r2d.c left in with the 8 * placeholder code from io_rts7751r2d.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 9 * expectation of later SuperIO and PCMCIA access.
12 */ 10 */
13
14#include <linux/kernel.h> 11#include <linux/kernel.h>
15#include <linux/types.h> 12#include <linux/types.h>
16#include <asm/io.h> 13#include <linux/pci.h>
17#include <asm/rts7751r2d/rts7751r2d.h> 14#include <asm/rts7751r2d/rts7751r2d.h>
15#include <asm/io.h>
18#include <asm/addrspace.h> 16#include <asm/addrspace.h>
19 17
20#include <linux/module.h>
21#include <linux/pci.h>
22#include "../../../drivers/pci/pci-sh7751.h"
23
24/* 18/*
25 * The 7751R RTS7751R2D uses the built-in PCI controller (PCIC) 19 * The 7751R RTS7751R2D uses the built-in PCI controller (PCIC)
26 * of the 7751R processor, and has a SuperIO accessible via the PCI. 20 * of the 7751R processor, and has a SuperIO accessible via the PCI.
@@ -28,22 +22,6 @@
28 * like the other Solution Engine boards. 22 * like the other Solution Engine boards.
29 */ 23 */
30 24
31#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
32#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
33#define PCI_IO_AREA SH7751_PCI_IO_BASE
34#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
35
36#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
37
38#define maybebadio(name,port) \
39 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
40 #name, (port), (__u32) __builtin_return_address(0))
41
42static inline void delay(void)
43{
44 ctrl_inw(0xa0000000);
45}
46
47static inline unsigned long port2adr(unsigned int port) 25static inline unsigned long port2adr(unsigned int port)
48{ 26{
49 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) 27 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
@@ -52,7 +30,7 @@ static inline unsigned long port2adr(unsigned int port)
52 else 30 else
53 return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1)); 31 return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
54 else 32 else
55 maybebadio(port2adr, (unsigned long)port); 33 maybebadio((unsigned long)port);
56 34
57 return port; 35 return port;
58} 36}
@@ -81,17 +59,6 @@ static inline int shifted_port(unsigned long port)
81 return 1; 59 return 1;
82} 60}
83 61
84/* In case someone configures the kernel w/o PCI support: in that */
85/* scenario, don't ever bother to check for PCI-window addresses */
86
87/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
88#if defined(CONFIG_PCI)
89#define CHECK_SH7751_PCIIO(port) \
90 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
91#else
92#define CHECK_SH7751_PCIIO(port) (0)
93#endif
94
95#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) 62#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
96#define CHECK_AX88796L_PORT(port) \ 63#define CHECK_AX88796L_PORT(port) \
97 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) 64 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
@@ -112,8 +79,8 @@ unsigned char rts7751r2d_inb(unsigned long port)
112 return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; 79 return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
113 else if (PXSEG(port)) 80 else if (PXSEG(port))
114 return *(volatile unsigned char *)port; 81 return *(volatile unsigned char *)port;
115 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 82 else if (is_pci_ioaddr(port) || shifted_port(port))
116 return *(volatile unsigned char *)PCI_IOMAP(port); 83 return *(volatile unsigned char *)pci_ioaddr(port);
117 else 84 else
118 return (*(volatile unsigned short *)port2adr(port) & 0xff); 85 return (*(volatile unsigned short *)port2adr(port) & 0xff);
119} 86}
@@ -126,11 +93,12 @@ unsigned char rts7751r2d_inb_p(unsigned long port)
126 v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; 93 v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
127 else if (PXSEG(port)) 94 else if (PXSEG(port))
128 v = *(volatile unsigned char *)port; 95 v = *(volatile unsigned char *)port;
129 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 96 else if (is_pci_ioaddr(port) || shifted_port(port))
130 v = *(volatile unsigned char *)PCI_IOMAP(port); 97 v = *(volatile unsigned char *)pci_ioaddr(port);
131 else 98 else
132 v = (*(volatile unsigned short *)port2adr(port) & 0xff); 99 v = (*(volatile unsigned short *)port2adr(port) & 0xff);
133 delay(); 100
101 ctrl_delay();
134 102
135 return v; 103 return v;
136} 104}
@@ -138,13 +106,13 @@ unsigned char rts7751r2d_inb_p(unsigned long port)
138unsigned short rts7751r2d_inw(unsigned long port) 106unsigned short rts7751r2d_inw(unsigned long port)
139{ 107{
140 if (CHECK_AX88796L_PORT(port)) 108 if (CHECK_AX88796L_PORT(port))
141 maybebadio(inw, port); 109 maybebadio(port);
142 else if (PXSEG(port)) 110 else if (PXSEG(port))
143 return *(volatile unsigned short *)port; 111 return *(volatile unsigned short *)port;
144 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 112 else if (is_pci_ioaddr(port) || shifted_port(port))
145 return *(volatile unsigned short *)PCI_IOMAP(port); 113 return *(volatile unsigned short *)pci_ioaddr(port);
146 else 114 else
147 maybebadio(inw, port); 115 maybebadio(port);
148 116
149 return 0; 117 return 0;
150} 118}
@@ -152,13 +120,13 @@ unsigned short rts7751r2d_inw(unsigned long port)
152unsigned int rts7751r2d_inl(unsigned long port) 120unsigned int rts7751r2d_inl(unsigned long port)
153{ 121{
154 if (CHECK_AX88796L_PORT(port)) 122 if (CHECK_AX88796L_PORT(port))
155 maybebadio(inl, port); 123 maybebadio(port);
156 else if (PXSEG(port)) 124 else if (PXSEG(port))
157 return *(volatile unsigned long *)port; 125 return *(volatile unsigned long *)port;
158 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 126 else if (is_pci_ioaddr(port) || shifted_port(port))
159 return *(volatile unsigned long *)PCI_IOMAP(port); 127 return *(volatile unsigned long *)pci_ioaddr(port);
160 else 128 else
161 maybebadio(inl, port); 129 maybebadio(port);
162 130
163 return 0; 131 return 0;
164} 132}
@@ -169,8 +137,8 @@ void rts7751r2d_outb(unsigned char value, unsigned long port)
169 *((volatile unsigned short *)port88796l(port, 0)) = value; 137 *((volatile unsigned short *)port88796l(port, 0)) = value;
170 else if (PXSEG(port)) 138 else if (PXSEG(port))
171 *(volatile unsigned char *)port = value; 139 *(volatile unsigned char *)port = value;
172 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 140 else if (is_pci_ioaddr(port) || shifted_port(port))
173 *(volatile unsigned char *)PCI_IOMAP(port) = value; 141 *(volatile unsigned char *)pci_ioaddr(port) = value;
174 else 142 else
175 *(volatile unsigned short *)port2adr(port) = value; 143 *(volatile unsigned short *)port2adr(port) = value;
176} 144}
@@ -181,143 +149,152 @@ void rts7751r2d_outb_p(unsigned char value, unsigned long port)
181 *((volatile unsigned short *)port88796l(port, 0)) = value; 149 *((volatile unsigned short *)port88796l(port, 0)) = value;
182 else if (PXSEG(port)) 150 else if (PXSEG(port))
183 *(volatile unsigned char *)port = value; 151 *(volatile unsigned char *)port = value;
184 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 152 else if (is_pci_ioaddr(port) || shifted_port(port))
185 *(volatile unsigned char *)PCI_IOMAP(port) = value; 153 *(volatile unsigned char *)pci_ioaddr(port) = value;
186 else 154 else
187 *(volatile unsigned short *)port2adr(port) = value; 155 *(volatile unsigned short *)port2adr(port) = value;
188 delay(); 156
157 ctrl_delay();
189} 158}
190 159
191void rts7751r2d_outw(unsigned short value, unsigned long port) 160void rts7751r2d_outw(unsigned short value, unsigned long port)
192{ 161{
193 if (CHECK_AX88796L_PORT(port)) 162 if (CHECK_AX88796L_PORT(port))
194 maybebadio(outw, port); 163 maybebadio(port);
195 else if (PXSEG(port)) 164 else if (PXSEG(port))
196 *(volatile unsigned short *)port = value; 165 *(volatile unsigned short *)port = value;
197 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 166 else if (is_pci_ioaddr(port) || shifted_port(port))
198 *(volatile unsigned short *)PCI_IOMAP(port) = value; 167 *(volatile unsigned short *)pci_ioaddr(port) = value;
199 else 168 else
200 maybebadio(outw, port); 169 maybebadio(port);
201} 170}
202 171
203void rts7751r2d_outl(unsigned int value, unsigned long port) 172void rts7751r2d_outl(unsigned int value, unsigned long port)
204{ 173{
205 if (CHECK_AX88796L_PORT(port)) 174 if (CHECK_AX88796L_PORT(port))
206 maybebadio(outl, port); 175 maybebadio(port);
207 else if (PXSEG(port)) 176 else if (PXSEG(port))
208 *(volatile unsigned long *)port = value; 177 *(volatile unsigned long *)port = value;
209 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 178 else if (is_pci_ioaddr(port) || shifted_port(port))
210 *(volatile unsigned long *)PCI_IOMAP(port) = value; 179 *(volatile unsigned long *)pci_ioaddr(port) = value;
211 else 180 else
212 maybebadio(outl, port); 181 maybebadio(port);
213} 182}
214 183
215void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count) 184void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count)
216{ 185{
186 unsigned long a = (unsigned long)addr;
217 volatile __u8 *bp; 187 volatile __u8 *bp;
218 volatile __u16 *p; 188 volatile __u16 *p;
219 unsigned char *s = addr;
220 189
221 if (CHECK_AX88796L_PORT(port)) { 190 if (CHECK_AX88796L_PORT(port)) {
222 p = (volatile unsigned short *)port88796l(port, 0); 191 p = (volatile unsigned short *)port88796l(port, 0);
223 while (count--) *s++ = *p & 0xff; 192 while (count--)
193 ctrl_outb(*p & 0xff, a++);
224 } else if (PXSEG(port)) 194 } else if (PXSEG(port))
225 while (count--) *s++ = *(volatile unsigned char *)port; 195 while (count--)
226 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 196 ctrl_outb(ctrl_inb(port), a++);
227 bp = (__u8 *)PCI_IOMAP(port); 197 else if (is_pci_ioaddr(port) || shifted_port(port)) {
228 while (count--) *s++ = *bp; 198 bp = (__u8 *)pci_ioaddr(port);
199 while (count--)
200 ctrl_outb(*bp, a++);
229 } else { 201 } else {
230 p = (volatile unsigned short *)port2adr(port); 202 p = (volatile unsigned short *)port2adr(port);
231 while (count--) *s++ = *p & 0xff; 203 while (count--)
204 ctrl_outb(*p & 0xff, a++);
232 } 205 }
233} 206}
234 207
235void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count) 208void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count)
236{ 209{
210 unsigned long a = (unsigned long)addr;
237 volatile __u16 *p; 211 volatile __u16 *p;
238 __u16 *s = addr;
239 212
240 if (CHECK_AX88796L_PORT(port)) 213 if (CHECK_AX88796L_PORT(port))
241 p = (volatile unsigned short *)port88796l(port, 1); 214 p = (volatile unsigned short *)port88796l(port, 1);
242 else if (PXSEG(port)) 215 else if (PXSEG(port))
243 p = (volatile unsigned short *)port; 216 p = (volatile unsigned short *)port;
244 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 217 else if (is_pci_ioaddr(port) || shifted_port(port))
245 p = (volatile unsigned short *)PCI_IOMAP(port); 218 p = (volatile unsigned short *)pci_ioaddr(port);
246 else 219 else
247 p = (volatile unsigned short *)port2adr(port); 220 p = (volatile unsigned short *)port2adr(port);
248 while (count--) *s++ = *p; 221 while (count--)
222 ctrl_outw(*p, a++);
249} 223}
250 224
251void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count) 225void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count)
252{ 226{
253 if (CHECK_AX88796L_PORT(port)) 227 if (CHECK_AX88796L_PORT(port))
254 maybebadio(insl, port); 228 maybebadio(port);
255 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 229 else if (is_pci_ioaddr(port) || shifted_port(port)) {
256 volatile __u32 *p = (__u32 *)PCI_IOMAP(port); 230 unsigned long a = (unsigned long)addr;
257 __u32 *s = addr; 231
258 232 while (count--) {
259 while (count--) *s++ = *p; 233 ctrl_outl(ctrl_inl(pci_ioaddr(port)), a);
234 a += 4;
235 }
260 } else 236 } else
261 maybebadio(insl, port); 237 maybebadio(port);
262} 238}
263 239
264void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count) 240void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count)
265{ 241{
242 unsigned long a = (unsigned long)addr;
266 volatile __u8 *bp; 243 volatile __u8 *bp;
267 volatile __u16 *p; 244 volatile __u16 *p;
268 const __u8 *s = addr;
269 245
270 if (CHECK_AX88796L_PORT(port)) { 246 if (CHECK_AX88796L_PORT(port)) {
271 p = (volatile unsigned short *)port88796l(port, 0); 247 p = (volatile unsigned short *)port88796l(port, 0);
272 while (count--) *p = *s++; 248 while (count--)
249 *p = ctrl_inb(a++);
273 } else if (PXSEG(port)) 250 } else if (PXSEG(port))
274 while (count--) *(volatile unsigned char *)port = *s++; 251 while (count--)
275 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 252 ctrl_outb(a++, port);
276 bp = (__u8 *)PCI_IOMAP(port); 253 else if (is_pci_ioaddr(port) || shifted_port(port)) {
277 while (count--) *bp = *s++; 254 bp = (__u8 *)pci_ioaddr(port);
255 while (count--)
256 *bp = ctrl_inb(a++);
278 } else { 257 } else {
279 p = (volatile unsigned short *)port2adr(port); 258 p = (volatile unsigned short *)port2adr(port);
280 while (count--) *p = *s++; 259 while (count--)
260 *p = ctrl_inb(a++);
281 } 261 }
282} 262}
283 263
284void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count) 264void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count)
285{ 265{
266 unsigned long a = (unsigned long)addr;
286 volatile __u16 *p; 267 volatile __u16 *p;
287 const __u16 *s = addr;
288 268
289 if (CHECK_AX88796L_PORT(port)) 269 if (CHECK_AX88796L_PORT(port))
290 p = (volatile unsigned short *)port88796l(port, 1); 270 p = (volatile unsigned short *)port88796l(port, 1);
291 else if (PXSEG(port)) 271 else if (PXSEG(port))
292 p = (volatile unsigned short *)port; 272 p = (volatile unsigned short *)port;
293 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 273 else if (is_pci_ioaddr(port) || shifted_port(port))
294 p = (volatile unsigned short *)PCI_IOMAP(port); 274 p = (volatile unsigned short *)pci_ioaddr(port);
295 else 275 else
296 p = (volatile unsigned short *)port2adr(port); 276 p = (volatile unsigned short *)port2adr(port);
297 while (count--) *p = *s++; 277
278 while (count--) {
279 ctrl_outw(*p, a);
280 a += 2;
281 }
298} 282}
299 283
300void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count) 284void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count)
301{ 285{
302 if (CHECK_AX88796L_PORT(port)) 286 if (CHECK_AX88796L_PORT(port))
303 maybebadio(outsl, port); 287 maybebadio(port);
304 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 288 else if (is_pci_ioaddr(port) || shifted_port(port)) {
305 volatile __u32 *p = (__u32 *)PCI_IOMAP(port); 289 unsigned long a = (unsigned long)addr;
306 const __u32 *s = addr; 290
307 291 while (count--) {
308 while (count--) *p = *s++; 292 ctrl_outl(ctrl_inl(a), pci_ioaddr(port));
293 a += 4;
294 }
309 } else 295 } else
310 maybebadio(outsl, port); 296 maybebadio(port);
311}
312
313void *rts7751r2d_ioremap(unsigned long offset, unsigned long size)
314{
315 if (offset >= 0xfd000000)
316 return (void *)offset;
317 else
318 return (void *)P2SEGADDR(offset);
319} 297}
320EXPORT_SYMBOL(rts7751r2d_ioremap);
321 298
322unsigned long rts7751r2d_isa_port2addr(unsigned long offset) 299unsigned long rts7751r2d_isa_port2addr(unsigned long offset)
323{ 300{
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index 154535440bbf..c915e7a3693a 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -41,30 +41,24 @@ static unsigned int startup_rts7751r2d_irq(unsigned int irq)
41 41
42static void disable_rts7751r2d_irq(unsigned int irq) 42static void disable_rts7751r2d_irq(unsigned int irq)
43{ 43{
44 unsigned long flags;
45 unsigned short val; 44 unsigned short val;
46 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); 45 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
47 46
48 /* Set the priority in IPR to 0 */ 47 /* Set the priority in IPR to 0 */
49 local_irq_save(flags);
50 val = ctrl_inw(IRLCNTR1); 48 val = ctrl_inw(IRLCNTR1);
51 val &= mask; 49 val &= mask;
52 ctrl_outw(val, IRLCNTR1); 50 ctrl_outw(val, IRLCNTR1);
53 local_irq_restore(flags);
54} 51}
55 52
56static void enable_rts7751r2d_irq(unsigned int irq) 53static void enable_rts7751r2d_irq(unsigned int irq)
57{ 54{
58 unsigned long flags;
59 unsigned short val; 55 unsigned short val;
60 unsigned short value = (0x0001 << mask_pos[irq]); 56 unsigned short value = (0x0001 << mask_pos[irq]);
61 57
62 /* Set priority in IPR back to original value */ 58 /* Set priority in IPR back to original value */
63 local_irq_save(flags);
64 val = ctrl_inw(IRLCNTR1); 59 val = ctrl_inw(IRLCNTR1);
65 val |= value; 60 val |= value;
66 ctrl_outw(val, IRLCNTR1); 61 ctrl_outw(val, IRLCNTR1);
67 local_irq_restore(flags);
68} 62}
69 63
70int rts7751r2d_irq_demux(int irq) 64int rts7751r2d_irq_demux(int irq)
diff --git a/arch/sh/boards/renesas/rts7751r2d/led.c b/arch/sh/boards/renesas/rts7751r2d/led.c
index 4d16de71fac1..e14a13d12d4a 100644
--- a/arch/sh/boards/renesas/rts7751r2d/led.c
+++ b/arch/sh/boards/renesas/rts7751r2d/led.c
@@ -12,8 +12,6 @@
12#include <asm/io.h> 12#include <asm/io.h>
13#include <asm/rts7751r2d/rts7751r2d.h> 13#include <asm/rts7751r2d/rts7751r2d.h>
14 14
15extern unsigned int debug_counter;
16
17#ifdef CONFIG_HEARTBEAT 15#ifdef CONFIG_HEARTBEAT
18 16
19#include <linux/sched.h> 17#include <linux/sched.h>
@@ -55,12 +53,3 @@ void rts7751r2d_led(unsigned short value)
55 ctrl_outw(value, PA_OUTPORT); 53 ctrl_outw(value, PA_OUTPORT);
56} 54}
57 55
58void debug_led_disp(void)
59{
60 unsigned short value;
61
62 value = (unsigned short)debug_counter++;
63 rts7751r2d_led(value);
64 if (value == 0xff)
65 debug_counter = 0;
66}
diff --git a/arch/sh/boards/renesas/rts7751r2d/mach.c b/arch/sh/boards/renesas/rts7751r2d/mach.c
deleted file mode 100644
index 5ed9e97ea197..000000000000
--- a/arch/sh/boards/renesas/rts7751r2d/mach.c
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * linux/arch/sh/kernel/mach_rts7751r2d.c
3 *
4 * Minor tweak of mach_se.c file to reference rts7751r2d-specific items.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the Renesas Technology sales RTS7751R2D
10 */
11
12#include <linux/init.h>
13#include <linux/types.h>
14
15#include <asm/machvec.h>
16#include <asm/rtc.h>
17#include <asm/irq.h>
18#include <asm/rts7751r2d/io.h>
19
20extern void heartbeat_rts7751r2d(void);
21extern void init_rts7751r2d_IRQ(void);
22extern void *rts7751r2d_ioremap(unsigned long, unsigned long);
23extern int rts7751r2d_irq_demux(int irq);
24
25extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
26extern int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
27
28/*
29 * The Machine Vector
30 */
31
32struct sh_machine_vector mv_rts7751r2d __initmv = {
33 .mv_nr_irqs = 72,
34
35 .mv_inb = rts7751r2d_inb,
36 .mv_inw = rts7751r2d_inw,
37 .mv_inl = rts7751r2d_inl,
38 .mv_outb = rts7751r2d_outb,
39 .mv_outw = rts7751r2d_outw,
40 .mv_outl = rts7751r2d_outl,
41
42 .mv_inb_p = rts7751r2d_inb_p,
43 .mv_inw_p = rts7751r2d_inw,
44 .mv_inl_p = rts7751r2d_inl,
45 .mv_outb_p = rts7751r2d_outb_p,
46 .mv_outw_p = rts7751r2d_outw,
47 .mv_outl_p = rts7751r2d_outl,
48
49 .mv_insb = rts7751r2d_insb,
50 .mv_insw = rts7751r2d_insw,
51 .mv_insl = rts7751r2d_insl,
52 .mv_outsb = rts7751r2d_outsb,
53 .mv_outsw = rts7751r2d_outsw,
54 .mv_outsl = rts7751r2d_outsl,
55
56 .mv_ioremap = rts7751r2d_ioremap,
57 .mv_isa_port2addr = rts7751r2d_isa_port2addr,
58 .mv_init_irq = init_rts7751r2d_IRQ,
59#ifdef CONFIG_HEARTBEAT
60 .mv_heartbeat = heartbeat_rts7751r2d,
61#endif
62 .mv_irq_demux = rts7751r2d_irq_demux,
63
64#ifdef CONFIG_USB_OHCI_HCD
65 .mv_consistent_alloc = voyagergx_consistent_alloc,
66 .mv_consistent_free = voyagergx_consistent_free,
67#endif
68};
69ALIAS_MV(rts7751r2d)
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index 2587fd1a0240..20597a6e6702 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -1,31 +1,142 @@
1/* 1/*
2 * linux/arch/sh/kernel/setup_rts7751r2d.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Renesas Technology Sales RTS7751R2D Support. 2 * Renesas Technology Sales RTS7751R2D Support.
7 * 3 *
8 * Modified for RTS7751R2D by 4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
9 * Atom Create Engineering Co., Ltd. 2002. 5 * Copyright (C) 2004 - 2006 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */ 10 */
11
12#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/serial_8250.h>
14#include <linux/pm.h>
13#include <asm/io.h> 15#include <asm/io.h>
14#include <asm/rts7751r2d/rts7751r2d.h> 16#include <asm/machvec.h>
17#include <asm/mach/rts7751r2d.h>
18#include <asm/voyagergx.h>
19
20extern void heartbeat_rts7751r2d(void);
21extern void init_rts7751r2d_IRQ(void);
22extern int rts7751r2d_irq_demux(int irq);
23
24extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
25extern int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
26
27static struct plat_serial8250_port uart_platform_data[] = {
28 {
29 .membase = (void *)VOYAGER_UART_BASE,
30 .mapbase = VOYAGER_UART_BASE,
31 .iotype = UPIO_MEM,
32 .irq = VOYAGER_UART0_IRQ,
33 .flags = UPF_BOOT_AUTOCONF,
34 .regshift = 2,
35 .uartclk = (9600 * 16),
36 }, {
37 .flags = 0,
38 },
39};
40
41static void __init voyagergx_serial_init(void)
42{
43 unsigned long val;
44
45 /*
46 * GPIO Control
47 */
48 val = inl(GPIO_MUX_HIGH);
49 val |= 0x00001fe0;
50 outl(val, GPIO_MUX_HIGH);
51
52 /*
53 * Power Mode Gate
54 */
55 val = inl(POWER_MODE0_GATE);
56 val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
57 outl(val, POWER_MODE0_GATE);
58
59 val = inl(POWER_MODE1_GATE);
60 val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
61 outl(val, POWER_MODE1_GATE);
62}
63
64static struct platform_device uart_device = {
65 .name = "serial8250",
66 .id = -1,
67 .dev = {
68 .platform_data = uart_platform_data,
69 },
70};
71
72static struct platform_device *rts7751r2d_devices[] __initdata = {
73 &uart_device,
74};
15 75
16unsigned int debug_counter; 76static int __init rts7751r2d_devices_setup(void)
77{
78 return platform_add_devices(rts7751r2d_devices,
79 ARRAY_SIZE(rts7751r2d_devices));
80}
17 81
18const char *get_system_type(void) 82static void rts7751r2d_power_off(void)
19{ 83{
20 return "RTS7751R2D"; 84 ctrl_outw(0x0001, PA_POWOFF);
21} 85}
22 86
23/* 87/*
24 * Initialize the board 88 * Initialize the board
25 */ 89 */
26void __init platform_setup(void) 90static void __init rts7751r2d_setup(char **cmdline_p)
27{ 91{
28 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 92 device_initcall(rts7751r2d_devices_setup);
93
29 ctrl_outw(0x0000, PA_OUTPORT); 94 ctrl_outw(0x0000, PA_OUTPORT);
30 debug_counter = 0; 95 pm_power_off = rts7751r2d_power_off;
96
97 voyagergx_serial_init();
98
99 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
31} 100}
101
102/*
103 * The Machine Vector
104 */
105struct sh_machine_vector mv_rts7751r2d __initmv = {
106 .mv_name = "RTS7751R2D",
107 .mv_setup = rts7751r2d_setup,
108 .mv_nr_irqs = 72,
109
110 .mv_inb = rts7751r2d_inb,
111 .mv_inw = rts7751r2d_inw,
112 .mv_inl = rts7751r2d_inl,
113 .mv_outb = rts7751r2d_outb,
114 .mv_outw = rts7751r2d_outw,
115 .mv_outl = rts7751r2d_outl,
116
117 .mv_inb_p = rts7751r2d_inb_p,
118 .mv_inw_p = rts7751r2d_inw,
119 .mv_inl_p = rts7751r2d_inl,
120 .mv_outb_p = rts7751r2d_outb_p,
121 .mv_outw_p = rts7751r2d_outw,
122 .mv_outl_p = rts7751r2d_outl,
123
124 .mv_insb = rts7751r2d_insb,
125 .mv_insw = rts7751r2d_insw,
126 .mv_insl = rts7751r2d_insl,
127 .mv_outsb = rts7751r2d_outsb,
128 .mv_outsw = rts7751r2d_outsw,
129 .mv_outsl = rts7751r2d_outsl,
130
131 .mv_init_irq = init_rts7751r2d_IRQ,
132#ifdef CONFIG_HEARTBEAT
133 .mv_heartbeat = heartbeat_rts7751r2d,
134#endif
135 .mv_irq_demux = rts7751r2d_irq_demux,
136
137#ifdef CONFIG_USB_SM501
138 .mv_consistent_alloc = voyagergx_consistent_alloc,
139 .mv_consistent_free = voyagergx_consistent_free,
140#endif
141};
142ALIAS_MV(rts7751r2d)
diff --git a/arch/sh/boards/renesas/sh7710voipgw/Makefile b/arch/sh/boards/renesas/sh7710voipgw/Makefile
new file mode 100644
index 000000000000..77037567633b
--- /dev/null
+++ b/arch/sh/boards/renesas/sh7710voipgw/Makefile
@@ -0,0 +1 @@
obj-y := setup.o
diff --git a/arch/sh/boards/renesas/sh7710voipgw/setup.c b/arch/sh/boards/renesas/sh7710voipgw/setup.c
new file mode 100644
index 000000000000..e57e7afab8c6
--- /dev/null
+++ b/arch/sh/boards/renesas/sh7710voipgw/setup.c
@@ -0,0 +1,109 @@
1/*
2 * Renesas Technology SH7710 VoIP Gateway
3 *
4 * Copyright (C) 2006 Ranjit Deshpande
5 * Kenati Technologies Inc.
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
9 */
10#include <linux/init.h>
11#include <asm/machvec.h>
12#include <asm/irq.h>
13#include <asm/io.h>
14#include <asm/irq.h>
15
16/*
17 * Initialize IRQ setting
18 */
19static void __init sh7710voipgw_init_irq(void)
20{
21 /* Disable all interrupts in IPR registers */
22 ctrl_outw(0x0, INTC_IPRA);
23 ctrl_outw(0x0, INTC_IPRB);
24 ctrl_outw(0x0, INTC_IPRC);
25 ctrl_outw(0x0, INTC_IPRD);
26 ctrl_outw(0x0, INTC_IPRE);
27 ctrl_outw(0x0, INTC_IPRF);
28 ctrl_outw(0x0, INTC_IPRG);
29 ctrl_outw(0x0, INTC_IPRH);
30 ctrl_outw(0x0, INTC_IPRI);
31
32 /* Ack all interrupt sources in the IRR0 register */
33 ctrl_outb(0x3f, INTC_IRR0);
34
35 /* Use IRQ0 - IRQ3 as active low interrupt lines i.e. disable
36 * IRL mode.
37 */
38 ctrl_outw(0x2aa, INTC_ICR1);
39
40 /* Now make IPR interrupts */
41 make_ipr_irq(TIMER2_IRQ, TIMER2_IPR_ADDR,
42 TIMER2_IPR_POS, TIMER2_PRIORITY);
43 make_ipr_irq(WDT_IRQ, WDT_IPR_ADDR, WDT_IPR_POS, WDT_PRIORITY);
44
45 /* SCIF0 */
46 make_ipr_irq(SCIF0_ERI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
47 SCIF0_PRIORITY);
48 make_ipr_irq(SCIF0_RXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
49 SCIF0_PRIORITY);
50 make_ipr_irq(SCIF0_BRI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
51 SCIF0_PRIORITY);
52 make_ipr_irq(SCIF0_TXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
53 SCIF0_PRIORITY);
54
55 /* DMAC-1 */
56 make_ipr_irq(DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
57 make_ipr_irq(DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
58 make_ipr_irq(DMTE2_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
59 make_ipr_irq(DMTE3_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
60
61 /* DMAC-2 */
62 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
63 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
64
65 /* IPSEC */
66 make_ipr_irq(IPSEC_IRQ, IPSEC_IPR_ADDR, IPSEC_IPR_POS, IPSEC_PRIORITY);
67
68 /* EDMAC */
69 make_ipr_irq(EDMAC0_IRQ, EDMAC0_IPR_ADDR, EDMAC0_IPR_POS,
70 EDMAC0_PRIORITY);
71 make_ipr_irq(EDMAC1_IRQ, EDMAC1_IPR_ADDR, EDMAC1_IPR_POS,
72 EDMAC1_PRIORITY);
73 make_ipr_irq(EDMAC2_IRQ, EDMAC2_IPR_ADDR, EDMAC2_IPR_POS,
74 EDMAC2_PRIORITY);
75
76 /* SIOF0 */
77 make_ipr_irq(SIOF0_ERI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
78 SIOF0_PRIORITY);
79 make_ipr_irq(SIOF0_TXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
80 SIOF0_PRIORITY);
81 make_ipr_irq(SIOF0_RXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
82 SIOF0_PRIORITY);
83 make_ipr_irq(SIOF0_CCI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
84 SIOF0_PRIORITY);
85
86 /* SIOF1 */
87 make_ipr_irq(SIOF1_ERI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
88 SIOF1_PRIORITY);
89 make_ipr_irq(SIOF1_TXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
90 SIOF1_PRIORITY);
91 make_ipr_irq(SIOF1_RXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
92 SIOF1_PRIORITY);
93 make_ipr_irq(SIOF1_CCI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
94 SIOF1_PRIORITY);
95
96 /* SLIC IRQ's */
97 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
98 make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
99}
100
101/*
102 * The Machine Vector
103 */
104struct sh_machine_vector mv_sh7710voipgw __initmv = {
105 .mv_name = "SH7710 VoIP Gateway",
106 .mv_nr_irqs = 104,
107 .mv_init_irq = sh7710voipgw_init_irq,
108};
109ALIAS_MV(sh7710voipgw)
diff --git a/arch/sh/boards/renesas/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c
index cf979011aa94..cde6e5d192c4 100644
--- a/arch/sh/boards/renesas/systemh/io.c
+++ b/arch/sh/boards/renesas/systemh/io.c
@@ -5,66 +5,25 @@
5 * Based largely on io_se.c. 5 * Based largely on io_se.c.
6 * 6 *
7 * I/O routine for Hitachi 7751 Systemh. 7 * I/O routine for Hitachi 7751 Systemh.
8 *
9 */ 8 */
10
11#include <linux/kernel.h> 9#include <linux/kernel.h>
12#include <linux/types.h> 10#include <linux/types.h>
13#include <asm/systemh/7751systemh.h> 11#include <linux/pci.h>
12#include <asm/systemh7751.h>
14#include <asm/addrspace.h> 13#include <asm/addrspace.h>
15#include <asm/io.h> 14#include <asm/io.h>
16 15
17#include <linux/pci.h>
18#include "../../drivers/pci/pci-sh7751.h"
19
20/*
21 * The 7751 SystemH Engine uses the built-in PCI controller (PCIC)
22 * of the 7751 processor, and has a SuperIO accessible on its memory
23 * bus.
24 */
25
26#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
27#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
28#define PCI_IO_AREA SH7751_PCI_IO_BASE
29#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
30
31#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
32#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area 16#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area
33 of smc lan chip*/ 17 of smc lan chip*/
34
35#define maybebadio(name,port) \
36 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
37 #name, (port), (__u32) __builtin_return_address(0))
38
39static inline void delay(void)
40{
41 ctrl_inw(0xa0000000);
42}
43
44static inline volatile __u16 * 18static inline volatile __u16 *
45port2adr(unsigned int port) 19port2adr(unsigned int port)
46{ 20{
47 if (port >= 0x2000) 21 if (port >= 0x2000)
48 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 22 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
49#if 0 23 maybebadio((unsigned long)port);
50 else
51 return (volatile __u16 *) (PA_SUPERIO + (port << 1));
52#endif
53 maybebadio(name,(unsigned long)port);
54 return (volatile __u16*)port; 24 return (volatile __u16*)port;
55} 25}
56 26
57/* In case someone configures the kernel w/o PCI support: in that */
58/* scenario, don't ever bother to check for PCI-window addresses */
59
60/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
61#if defined(CONFIG_PCI)
62#define CHECK_SH7751_PCIIO(port) \
63 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
64#else
65#define CHECK_SH7751_PCIIO(port) (0)
66#endif
67
68/* 27/*
69 * General outline: remap really low stuff [eventually] to SuperIO, 28 * General outline: remap really low stuff [eventually] to SuperIO,
70 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 29 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -76,8 +35,8 @@ unsigned char sh7751systemh_inb(unsigned long port)
76{ 35{
77 if (PXSEG(port)) 36 if (PXSEG(port))
78 return *(volatile unsigned char *)port; 37 return *(volatile unsigned char *)port;
79 else if (CHECK_SH7751_PCIIO(port)) 38 else if (is_pci_ioaddr(port))
80 return *(volatile unsigned char *)PCI_IOMAP(port); 39 return *(volatile unsigned char *)pci_ioaddr(port);
81 else if (port <= 0x3F1) 40 else if (port <= 0x3F1)
82 return *(volatile unsigned char *)ETHER_IOMAP(port); 41 return *(volatile unsigned char *)ETHER_IOMAP(port);
83 else 42 else
@@ -90,13 +49,13 @@ unsigned char sh7751systemh_inb_p(unsigned long port)
90 49
91 if (PXSEG(port)) 50 if (PXSEG(port))
92 v = *(volatile unsigned char *)port; 51 v = *(volatile unsigned char *)port;
93 else if (CHECK_SH7751_PCIIO(port)) 52 else if (is_pci_ioaddr(port))
94 v = *(volatile unsigned char *)PCI_IOMAP(port); 53 v = *(volatile unsigned char *)pci_ioaddr(port);
95 else if (port <= 0x3F1) 54 else if (port <= 0x3F1)
96 v = *(volatile unsigned char *)ETHER_IOMAP(port); 55 v = *(volatile unsigned char *)ETHER_IOMAP(port);
97 else 56 else
98 v = (*port2adr(port))&0xff; 57 v = (*port2adr(port))&0xff;
99 delay(); 58 ctrl_delay();
100 return v; 59 return v;
101} 60}
102 61
@@ -104,14 +63,14 @@ unsigned short sh7751systemh_inw(unsigned long port)
104{ 63{
105 if (PXSEG(port)) 64 if (PXSEG(port))
106 return *(volatile unsigned short *)port; 65 return *(volatile unsigned short *)port;
107 else if (CHECK_SH7751_PCIIO(port)) 66 else if (is_pci_ioaddr(port))
108 return *(volatile unsigned short *)PCI_IOMAP(port); 67 return *(volatile unsigned short *)pci_ioaddr(port);
109 else if (port >= 0x2000) 68 else if (port >= 0x2000)
110 return *port2adr(port); 69 return *port2adr(port);
111 else if (port <= 0x3F1) 70 else if (port <= 0x3F1)
112 return *(volatile unsigned int *)ETHER_IOMAP(port); 71 return *(volatile unsigned int *)ETHER_IOMAP(port);
113 else 72 else
114 maybebadio(inw, port); 73 maybebadio(port);
115 return 0; 74 return 0;
116} 75}
117 76
@@ -119,14 +78,14 @@ unsigned int sh7751systemh_inl(unsigned long port)
119{ 78{
120 if (PXSEG(port)) 79 if (PXSEG(port))
121 return *(volatile unsigned long *)port; 80 return *(volatile unsigned long *)port;
122 else if (CHECK_SH7751_PCIIO(port)) 81 else if (is_pci_ioaddr(port))
123 return *(volatile unsigned int *)PCI_IOMAP(port); 82 return *(volatile unsigned int *)pci_ioaddr(port);
124 else if (port >= 0x2000) 83 else if (port >= 0x2000)
125 return *port2adr(port); 84 return *port2adr(port);
126 else if (port <= 0x3F1) 85 else if (port <= 0x3F1)
127 return *(volatile unsigned int *)ETHER_IOMAP(port); 86 return *(volatile unsigned int *)ETHER_IOMAP(port);
128 else 87 else
129 maybebadio(inl, port); 88 maybebadio(port);
130 return 0; 89 return 0;
131} 90}
132 91
@@ -135,8 +94,8 @@ void sh7751systemh_outb(unsigned char value, unsigned long port)
135 94
136 if (PXSEG(port)) 95 if (PXSEG(port))
137 *(volatile unsigned char *)port = value; 96 *(volatile unsigned char *)port = value;
138 else if (CHECK_SH7751_PCIIO(port)) 97 else if (is_pci_ioaddr(port))
139 *((unsigned char*)PCI_IOMAP(port)) = value; 98 *((unsigned char*)pci_ioaddr(port)) = value;
140 else if (port <= 0x3F1) 99 else if (port <= 0x3F1)
141 *(volatile unsigned char *)ETHER_IOMAP(port) = value; 100 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
142 else 101 else
@@ -147,37 +106,37 @@ void sh7751systemh_outb_p(unsigned char value, unsigned long port)
147{ 106{
148 if (PXSEG(port)) 107 if (PXSEG(port))
149 *(volatile unsigned char *)port = value; 108 *(volatile unsigned char *)port = value;
150 else if (CHECK_SH7751_PCIIO(port)) 109 else if (is_pci_ioaddr(port))
151 *((unsigned char*)PCI_IOMAP(port)) = value; 110 *((unsigned char*)pci_ioaddr(port)) = value;
152 else if (port <= 0x3F1) 111 else if (port <= 0x3F1)
153 *(volatile unsigned char *)ETHER_IOMAP(port) = value; 112 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
154 else 113 else
155 *(port2adr(port)) = value; 114 *(port2adr(port)) = value;
156 delay(); 115 ctrl_delay();
157} 116}
158 117
159void sh7751systemh_outw(unsigned short value, unsigned long port) 118void sh7751systemh_outw(unsigned short value, unsigned long port)
160{ 119{
161 if (PXSEG(port)) 120 if (PXSEG(port))
162 *(volatile unsigned short *)port = value; 121 *(volatile unsigned short *)port = value;
163 else if (CHECK_SH7751_PCIIO(port)) 122 else if (is_pci_ioaddr(port))
164 *((unsigned short *)PCI_IOMAP(port)) = value; 123 *((unsigned short *)pci_ioaddr(port)) = value;
165 else if (port >= 0x2000) 124 else if (port >= 0x2000)
166 *port2adr(port) = value; 125 *port2adr(port) = value;
167 else if (port <= 0x3F1) 126 else if (port <= 0x3F1)
168 *(volatile unsigned short *)ETHER_IOMAP(port) = value; 127 *(volatile unsigned short *)ETHER_IOMAP(port) = value;
169 else 128 else
170 maybebadio(outw, port); 129 maybebadio(port);
171} 130}
172 131
173void sh7751systemh_outl(unsigned int value, unsigned long port) 132void sh7751systemh_outl(unsigned int value, unsigned long port)
174{ 133{
175 if (PXSEG(port)) 134 if (PXSEG(port))
176 *(volatile unsigned long *)port = value; 135 *(volatile unsigned long *)port = value;
177 else if (CHECK_SH7751_PCIIO(port)) 136 else if (is_pci_ioaddr(port))
178 *((unsigned long*)PCI_IOMAP(port)) = value; 137 *((unsigned long*)pci_ioaddr(port)) = value;
179 else 138 else
180 maybebadio(outl, port); 139 maybebadio(port);
181} 140}
182 141
183void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count) 142void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count)
@@ -194,7 +153,7 @@ void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count)
194 153
195void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count) 154void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count)
196{ 155{
197 maybebadio(insl, port); 156 maybebadio(port);
198} 157}
199 158
200void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count) 159void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count)
@@ -211,73 +170,5 @@ void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long cou
211 170
212void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count) 171void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count)
213{ 172{
214 maybebadio(outsw, port); 173 maybebadio(port);
215}
216
217/* For read/write calls, just copy generic (pass-thru); PCIMBR is */
218/* already set up. For a larger memory space, these would need to */
219/* reset PCIMBR as needed on a per-call basis... */
220
221unsigned char sh7751systemh_readb(unsigned long addr)
222{
223 return *(volatile unsigned char*)addr;
224}
225
226unsigned short sh7751systemh_readw(unsigned long addr)
227{
228 return *(volatile unsigned short*)addr;
229}
230
231unsigned int sh7751systemh_readl(unsigned long addr)
232{
233 return *(volatile unsigned long*)addr;
234}
235
236void sh7751systemh_writeb(unsigned char b, unsigned long addr)
237{
238 *(volatile unsigned char*)addr = b;
239}
240
241void sh7751systemh_writew(unsigned short b, unsigned long addr)
242{
243 *(volatile unsigned short*)addr = b;
244}
245
246void sh7751systemh_writel(unsigned int b, unsigned long addr)
247{
248 *(volatile unsigned long*)addr = b;
249}
250
251
252
253/* Map ISA bus address to the real address. Only for PCMCIA. */
254
255/* ISA page descriptor. */
256static __u32 sh_isa_memmap[256];
257
258#if 0
259static int
260sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
261{
262 int idx;
263
264 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
265 return -1;
266
267 idx = start >> 12;
268 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
269 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
270 start, length, offset, idx, sh_isa_memmap[idx]);
271 return 0;
272}
273#endif
274
275unsigned long
276sh7751systemh_isa_port2addr(unsigned long offset)
277{
278 int idx;
279
280 idx = (offset >> 12) & 0xff;
281 offset &= 0xfff;
282 return sh_isa_memmap[idx] + offset;
283} 174}
diff --git a/arch/sh/boards/renesas/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c
index 8372d967f601..8d016dae2333 100644
--- a/arch/sh/boards/renesas/systemh/irq.c
+++ b/arch/sh/boards/renesas/systemh/irq.c
@@ -15,7 +15,7 @@
15#include <linux/hdreg.h> 15#include <linux/hdreg.h>
16#include <linux/ide.h> 16#include <linux/ide.h>
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/mach/7751systemh.h> 18#include <asm/systemh7751.h>
19#include <asm/smc37c93x.h> 19#include <asm/smc37c93x.h>
20 20
21/* address of external interrupt mask register 21/* address of external interrupt mask register
@@ -57,12 +57,9 @@ static void shutdown_systemh_irq(unsigned int irq)
57static void disable_systemh_irq(unsigned int irq) 57static void disable_systemh_irq(unsigned int irq)
58{ 58{
59 if (systemh_irq_mask_register) { 59 if (systemh_irq_mask_register) {
60 unsigned long flags;
61 unsigned long val, mask = 0x01 << 1; 60 unsigned long val, mask = 0x01 << 1;
62 61
63 /* Clear the "irq"th bit in the mask and set it in the request */ 62 /* Clear the "irq"th bit in the mask and set it in the request */
64 local_irq_save(flags);
65
66 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 63 val = ctrl_inl((unsigned long)systemh_irq_mask_register);
67 val &= ~mask; 64 val &= ~mask;
68 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 65 ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
@@ -70,23 +67,18 @@ static void disable_systemh_irq(unsigned int irq)
70 val = ctrl_inl((unsigned long)systemh_irq_request_register); 67 val = ctrl_inl((unsigned long)systemh_irq_request_register);
71 val |= mask; 68 val |= mask;
72 ctrl_outl(val, (unsigned long)systemh_irq_request_register); 69 ctrl_outl(val, (unsigned long)systemh_irq_request_register);
73
74 local_irq_restore(flags);
75 } 70 }
76} 71}
77 72
78static void enable_systemh_irq(unsigned int irq) 73static void enable_systemh_irq(unsigned int irq)
79{ 74{
80 if (systemh_irq_mask_register) { 75 if (systemh_irq_mask_register) {
81 unsigned long flags;
82 unsigned long val, mask = 0x01 << 1; 76 unsigned long val, mask = 0x01 << 1;
83 77
84 /* Set "irq"th bit in the mask register */ 78 /* Set "irq"th bit in the mask register */
85 local_irq_save(flags);
86 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 79 val = ctrl_inl((unsigned long)systemh_irq_mask_register);
87 val |= mask; 80 val |= mask;
88 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 81 ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
89 local_irq_restore(flags);
90 } 82 }
91} 83}
92 84
diff --git a/arch/sh/boards/renesas/systemh/setup.c b/arch/sh/boards/renesas/systemh/setup.c
index 826fa3d7669c..a8467bf90c25 100644
--- a/arch/sh/boards/renesas/systemh/setup.c
+++ b/arch/sh/boards/renesas/systemh/setup.c
@@ -15,28 +15,21 @@
15 * for more details. 15 * for more details.
16 */ 16 */
17#include <linux/init.h> 17#include <linux/init.h>
18#include <asm/mach/7751systemh.h>
19#include <asm/mach/io.h>
20#include <asm/machvec.h> 18#include <asm/machvec.h>
19#include <asm/systemh7751.h>
21 20
22extern void make_systemh_irq(unsigned int irq); 21extern void make_systemh_irq(unsigned int irq);
23 22
24const char *get_system_type(void)
25{
26 return "7751 SystemH";
27}
28
29/* 23/*
30 * Initialize IRQ setting 24 * Initialize IRQ setting
31 */ 25 */
32void __init init_7751systemh_IRQ(void) 26static void __init sh7751systemh_init_irq(void)
33{ 27{
34/* make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); LAN */
35/* make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-4); */
36 make_systemh_irq(0xb); /* Ethernet interrupt */ 28 make_systemh_irq(0xb); /* Ethernet interrupt */
37} 29}
38 30
39struct sh_machine_vector mv_7751systemh __initmv = { 31struct sh_machine_vector mv_7751systemh __initmv = {
32 .mv_name = "7751 SystemH",
40 .mv_nr_irqs = 72, 33 .mv_nr_irqs = 72,
41 34
42 .mv_inb = sh7751systemh_inb, 35 .mv_inb = sh7751systemh_inb,
@@ -60,21 +53,6 @@ struct sh_machine_vector mv_7751systemh __initmv = {
60 .mv_outsw = sh7751systemh_outsw, 53 .mv_outsw = sh7751systemh_outsw,
61 .mv_outsl = sh7751systemh_outsl, 54 .mv_outsl = sh7751systemh_outsl,
62 55
63 .mv_readb = sh7751systemh_readb, 56 .mv_init_irq = sh7751system_init_irq,
64 .mv_readw = sh7751systemh_readw,
65 .mv_readl = sh7751systemh_readl,
66 .mv_writeb = sh7751systemh_writeb,
67 .mv_writew = sh7751systemh_writew,
68 .mv_writel = sh7751systemh_writel,
69
70 .mv_isa_port2addr = sh7751systemh_isa_port2addr,
71
72 .mv_init_irq = init_7751systemh_IRQ,
73}; 57};
74ALIAS_MV(7751systemh) 58ALIAS_MV(7751systemh)
75
76int __init platform_setup(void)
77{
78 return 0;
79}
80
diff --git a/arch/sh/boards/saturn/setup.c b/arch/sh/boards/saturn/setup.c
index bea6c572ad82..a3a37c9aad2e 100644
--- a/arch/sh/boards/saturn/setup.c
+++ b/arch/sh/boards/saturn/setup.c
@@ -9,22 +9,17 @@
9 */ 9 */
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/init.h> 11#include <linux/init.h>
12
13#include <asm/io.h> 12#include <asm/io.h>
14#include <asm/machvec.h> 13#include <asm/machvec.h>
15#include <asm/mach/io.h> 14#include <asm/mach/io.h>
16 15
17extern int saturn_irq_demux(int irq_nr); 16extern int saturn_irq_demux(int irq_nr);
18 17
19const char *get_system_type(void)
20{
21 return "Sega Saturn";
22}
23
24/* 18/*
25 * The Machine Vector 19 * The Machine Vector
26 */ 20 */
27struct sh_machine_vector mv_saturn __initmv = { 21struct sh_machine_vector mv_saturn __initmv = {
22 .mv_name = "Sega Saturn",
28 .mv_nr_irqs = 80, /* Fix this later */ 23 .mv_nr_irqs = 80, /* Fix this later */
29 24
30 .mv_isa_port2addr = saturn_isa_port2addr, 25 .mv_isa_port2addr = saturn_isa_port2addr,
@@ -33,11 +28,4 @@ struct sh_machine_vector mv_saturn __initmv = {
33 .mv_ioremap = saturn_ioremap, 28 .mv_ioremap = saturn_ioremap,
34 .mv_iounmap = saturn_iounmap, 29 .mv_iounmap = saturn_iounmap,
35}; 30};
36
37ALIAS_MV(saturn) 31ALIAS_MV(saturn)
38
39int __init platform_setup(void)
40{
41 return 0;
42}
43
diff --git a/arch/sh/boards/se/7300/io.c b/arch/sh/boards/se/7300/io.c
index f449a94ddffd..8a03d7a52a7c 100644
--- a/arch/sh/boards/se/7300/io.c
+++ b/arch/sh/boards/se/7300/io.c
@@ -9,8 +9,8 @@
9 */ 9 */
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <asm/mach/se7300.h>
13#include <asm/io.h> 12#include <asm/io.h>
13#include <asm/se7300.h>
14 14
15#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a) 15#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
16 16
@@ -99,6 +99,7 @@ bad_outb(struct iop *p, unsigned char value, unsigned long port)
99 badio(inw, port); 99 badio(inw, port);
100} 100}
101 101
102#ifdef CONFIG_SMC91X
102/* MSTLANEX01 LAN at 0xb400:0000 */ 103/* MSTLANEX01 LAN at 0xb400:0000 */
103static struct iop laniop = { 104static struct iop laniop = {
104 .start = 0x300, 105 .start = 0x300,
@@ -110,6 +111,7 @@ static struct iop laniop = {
110 .outb = simple_outb, 111 .outb = simple_outb,
111 .outw = simple_outw, 112 .outw = simple_outw,
112}; 113};
114#endif
113 115
114/* NE2000 pc card NIC */ 116/* NE2000 pc card NIC */
115static struct iop neiop = { 117static struct iop neiop = {
@@ -123,6 +125,7 @@ static struct iop neiop = {
123 .outw = simple_outw, 125 .outw = simple_outw,
124}; 126};
125 127
128#ifdef CONFIG_IDE
126/* CF in CF slot */ 129/* CF in CF slot */
127static struct iop cfiop = { 130static struct iop cfiop = {
128 .base = 0xb0600000, 131 .base = 0xb0600000,
@@ -132,12 +135,13 @@ static struct iop cfiop = {
132 .outb = pcc_outb, 135 .outb = pcc_outb,
133 .outw = simple_outw, 136 .outw = simple_outw,
134}; 137};
138#endif
135 139
136static __inline__ struct iop * 140static __inline__ struct iop *
137port2iop(unsigned long port) 141port2iop(unsigned long port)
138{ 142{
139 if (0) ; 143 if (0) ;
140#if defined(CONFIG_SMC91111) 144#if defined(CONFIG_SMC91X)
141 else if (laniop.check(&laniop, port)) 145 else if (laniop.check(&laniop, port))
142 return &laniop; 146 return &laniop;
143#endif 147#endif
diff --git a/arch/sh/boards/se/7300/irq.c b/arch/sh/boards/se/7300/irq.c
index 216a78d1a108..ad1034f98a29 100644
--- a/arch/sh/boards/se/7300/irq.c
+++ b/arch/sh/boards/se/7300/irq.c
@@ -11,7 +11,7 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <asm/irq.h> 12#include <asm/irq.h>
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/mach/se7300.h> 14#include <asm/se7300.h>
15 15
16/* 16/*
17 * Initialize IRQ setting 17 * Initialize IRQ setting
diff --git a/arch/sh/boards/se/7300/led.c b/arch/sh/boards/se/7300/led.c
index ad51f0a9c1e3..4d03bb7774be 100644
--- a/arch/sh/boards/se/7300/led.c
+++ b/arch/sh/boards/se/7300/led.c
@@ -12,24 +12,10 @@
12 */ 12 */
13 13
14#include <linux/sched.h> 14#include <linux/sched.h>
15#include <asm/mach/se7300.h> 15#include <asm/se7300.h>
16
17static void
18mach_led(int position, int value)
19{
20 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
21
22 if (value) {
23 *p |= (1 << 8);
24 } else {
25 *p &= ~(1 << 8);
26 }
27}
28
29 16
30/* Cycle the LED's in the clasic Knightrider/Sun pattern */ 17/* Cycle the LED's in the clasic Knightrider/Sun pattern */
31void 18void heartbeat_7300se(void)
32heartbeat_7300se(void)
33{ 19{
34 static unsigned int cnt = 0, period = 0; 20 static unsigned int cnt = 0, period = 0;
35 volatile unsigned short *p = (volatile unsigned short *) PA_LED; 21 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
diff --git a/arch/sh/boards/se/7300/setup.c b/arch/sh/boards/se/7300/setup.c
index ebcd98d4c081..6f082a722d42 100644
--- a/arch/sh/boards/se/7300/setup.c
+++ b/arch/sh/boards/se/7300/setup.c
@@ -9,23 +9,16 @@
9 9
10#include <linux/init.h> 10#include <linux/init.h>
11#include <asm/machvec.h> 11#include <asm/machvec.h>
12#include <asm/machvec_init.h> 12#include <asm/se7300.h>
13#include <asm/mach/io.h>
14 13
15void heartbeat_7300se(void); 14void heartbeat_7300se(void);
16void init_7300se_IRQ(void); 15void init_7300se_IRQ(void);
17 16
18const char *
19get_system_type(void)
20{
21 return "SolutionEngine 7300";
22}
23
24/* 17/*
25 * The Machine Vector 18 * The Machine Vector
26 */ 19 */
27
28struct sh_machine_vector mv_7300se __initmv = { 20struct sh_machine_vector mv_7300se __initmv = {
21 .mv_name = "SolutionEngine 7300",
29 .mv_nr_irqs = 109, 22 .mv_nr_irqs = 109,
30 .mv_inb = sh7300se_inb, 23 .mv_inb = sh7300se_inb,
31 .mv_inw = sh7300se_inw, 24 .mv_inw = sh7300se_inw,
@@ -53,13 +46,4 @@ struct sh_machine_vector mv_7300se __initmv = {
53 .mv_heartbeat = heartbeat_7300se, 46 .mv_heartbeat = heartbeat_7300se,
54#endif 47#endif
55}; 48};
56
57ALIAS_MV(7300se) 49ALIAS_MV(7300se)
58/*
59 * Initialize the board
60 */
61void __init
62platform_setup(void)
63{
64
65}
diff --git a/arch/sh/boards/se/73180/io.c b/arch/sh/boards/se/73180/io.c
index 755df5ac4a4e..72715575458b 100644
--- a/arch/sh/boards/se/73180/io.c
+++ b/arch/sh/boards/se/73180/io.c
@@ -99,6 +99,7 @@ bad_outb(struct iop *p, unsigned char value, unsigned long port)
99 badio(inw, port); 99 badio(inw, port);
100} 100}
101 101
102#ifdef CONFIG_SMC91X
102/* MSTLANEX01 LAN at 0xb400:0000 */ 103/* MSTLANEX01 LAN at 0xb400:0000 */
103static struct iop laniop = { 104static struct iop laniop = {
104 .start = 0x300, 105 .start = 0x300,
@@ -110,6 +111,7 @@ static struct iop laniop = {
110 .outb = simple_outb, 111 .outb = simple_outb,
111 .outw = simple_outw, 112 .outw = simple_outw,
112}; 113};
114#endif
113 115
114/* NE2000 pc card NIC */ 116/* NE2000 pc card NIC */
115static struct iop neiop = { 117static struct iop neiop = {
@@ -123,6 +125,7 @@ static struct iop neiop = {
123 .outw = simple_outw, 125 .outw = simple_outw,
124}; 126};
125 127
128#ifdef CONFIG_IDE
126/* CF in CF slot */ 129/* CF in CF slot */
127static struct iop cfiop = { 130static struct iop cfiop = {
128 .base = 0xb0600000, 131 .base = 0xb0600000,
@@ -132,12 +135,13 @@ static struct iop cfiop = {
132 .outb = pcc_outb, 135 .outb = pcc_outb,
133 .outw = simple_outw, 136 .outw = simple_outw,
134}; 137};
138#endif
135 139
136static __inline__ struct iop * 140static __inline__ struct iop *
137port2iop(unsigned long port) 141port2iop(unsigned long port)
138{ 142{
139 if (0) ; 143 if (0) ;
140#if defined(CONFIG_SMC91111) 144#if defined(CONFIG_SMC91X)
141 else if (laniop.check(&laniop, port)) 145 else if (laniop.check(&laniop, port))
142 return &laniop; 146 return &laniop;
143#endif 147#endif
diff --git a/arch/sh/boards/se/73180/irq.c b/arch/sh/boards/se/73180/irq.c
index 4344d0ef24aa..2c62b8ea350e 100644
--- a/arch/sh/boards/se/73180/irq.c
+++ b/arch/sh/boards/se/73180/irq.c
@@ -7,7 +7,6 @@
7 * Modified for SH-Mobile SolutionEngine 73180 Support 7 * Modified for SH-Mobile SolutionEngine 73180 Support
8 * by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp> 8 * by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
9 * 9 *
10 *
11 */ 10 */
12 11
13#include <linux/init.h> 12#include <linux/init.h>
@@ -17,14 +16,6 @@
17#include <asm/mach/se73180.h> 16#include <asm/mach/se73180.h>
18 17
19static int 18static int
20intreq2irq(int i)
21{
22 if (i == 5)
23 return 10;
24 return 32 + 7 - i;
25}
26
27static int
28irq2intreq(int irq) 19irq2intreq(int irq)
29{ 20{
30 if (irq == 10) 21 if (irq == 10)
diff --git a/arch/sh/boards/se/73180/led.c b/arch/sh/boards/se/73180/led.c
index 610439fde6ee..4b72e9a3ead9 100644
--- a/arch/sh/boards/se/73180/led.c
+++ b/arch/sh/boards/se/73180/led.c
@@ -14,21 +14,8 @@
14#include <linux/sched.h> 14#include <linux/sched.h>
15#include <asm/mach/se73180.h> 15#include <asm/mach/se73180.h>
16 16
17static void
18mach_led(int position, int value)
19{
20 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
21
22 if (value) {
23 *p |= (1 << LED_SHIFT);
24 } else {
25 *p &= ~(1 << LED_SHIFT);
26 }
27}
28
29/* Cycle the LED's in the clasic Knightrider/Sun pattern */ 17/* Cycle the LED's in the clasic Knightrider/Sun pattern */
30void 18void heartbeat_73180se(void)
31heartbeat_73180se(void)
32{ 19{
33 static unsigned int cnt = 0, period = 0; 20 static unsigned int cnt = 0, period = 0;
34 volatile unsigned short *p = (volatile unsigned short *) PA_LED; 21 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
diff --git a/arch/sh/boards/se/73180/setup.c b/arch/sh/boards/se/73180/setup.c
index cdb7b5f8d942..b38ef50a160a 100644
--- a/arch/sh/boards/se/73180/setup.c
+++ b/arch/sh/boards/se/73180/setup.c
@@ -11,23 +11,17 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/machvec.h> 13#include <asm/machvec.h>
14#include <asm/machvec_init.h> 14#include <asm/se73180.h>
15#include <asm/mach/io.h> 15#include <asm/irq.h>
16 16
17void heartbeat_73180se(void); 17void heartbeat_73180se(void);
18void init_73180se_IRQ(void); 18void init_73180se_IRQ(void);
19 19
20const char *
21get_system_type(void)
22{
23 return "SolutionEngine 73180";
24}
25
26/* 20/*
27 * The Machine Vector 21 * The Machine Vector
28 */ 22 */
29
30struct sh_machine_vector mv_73180se __initmv = { 23struct sh_machine_vector mv_73180se __initmv = {
24 .mv_name = "SolutionEngine 73180",
31 .mv_nr_irqs = 108, 25 .mv_nr_irqs = 108,
32 .mv_inb = sh73180se_inb, 26 .mv_inb = sh73180se_inb,
33 .mv_inw = sh73180se_inw, 27 .mv_inw = sh73180se_inw,
@@ -51,17 +45,9 @@ struct sh_machine_vector mv_73180se __initmv = {
51 .mv_outsl = sh73180se_outsl, 45 .mv_outsl = sh73180se_outsl,
52 46
53 .mv_init_irq = init_73180se_IRQ, 47 .mv_init_irq = init_73180se_IRQ,
48 .mv_irq_demux = shmse_irq_demux,
54#ifdef CONFIG_HEARTBEAT 49#ifdef CONFIG_HEARTBEAT
55 .mv_heartbeat = heartbeat_73180se, 50 .mv_heartbeat = heartbeat_73180se,
56#endif 51#endif
57}; 52};
58
59ALIAS_MV(73180se) 53ALIAS_MV(73180se)
60/*
61 * Initialize the board
62 */
63void __init
64platform_setup(void)
65{
66
67}
diff --git a/arch/sh/boards/se/7343/Makefile b/arch/sh/boards/se/7343/Makefile
new file mode 100644
index 000000000000..4291069c0b4f
--- /dev/null
+++ b/arch/sh/boards/se/7343/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for the 7343 SolutionEngine specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6
7obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7343/io.c b/arch/sh/boards/se/7343/io.c
new file mode 100644
index 000000000000..646661a146ad
--- /dev/null
+++ b/arch/sh/boards/se/7343/io.c
@@ -0,0 +1,275 @@
1/*
2 * arch/sh/boards/se/7343/io.c
3 *
4 * I/O routine for SH-Mobile3AS 7343 SolutionEngine.
5 *
6 */
7
8#include <linux/config.h>
9#include <linux/kernel.h>
10#include <asm/io.h>
11#include <asm/mach/se7343.h>
12
13#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
14
15struct iop {
16 unsigned long start, end;
17 unsigned long base;
18 struct iop *(*check) (struct iop * p, unsigned long port);
19 unsigned char (*inb) (struct iop * p, unsigned long port);
20 unsigned short (*inw) (struct iop * p, unsigned long port);
21 void (*outb) (struct iop * p, unsigned char value, unsigned long port);
22 void (*outw) (struct iop * p, unsigned short value, unsigned long port);
23};
24
25struct iop *
26simple_check(struct iop *p, unsigned long port)
27{
28 static int count;
29
30 if (count < 100)
31 count++;
32
33 port &= 0xFFFF;
34
35 if ((p->start <= port) && (port <= p->end))
36 return p;
37 else
38 badio(check, port);
39}
40
41struct iop *
42ide_check(struct iop *p, unsigned long port)
43{
44 if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
45 return p;
46 return NULL;
47}
48
49unsigned char
50simple_inb(struct iop *p, unsigned long port)
51{
52 return *(unsigned char *) (p->base + port);
53}
54
55unsigned short
56simple_inw(struct iop *p, unsigned long port)
57{
58 return *(unsigned short *) (p->base + port);
59}
60
61void
62simple_outb(struct iop *p, unsigned char value, unsigned long port)
63{
64 *(unsigned char *) (p->base + port) = value;
65}
66
67void
68simple_outw(struct iop *p, unsigned short value, unsigned long port)
69{
70 *(unsigned short *) (p->base + port) = value;
71}
72
73unsigned char
74pcc_inb(struct iop *p, unsigned long port)
75{
76 unsigned long addr = p->base + port + 0x40000;
77 unsigned long v;
78
79 if (port & 1)
80 addr += 0x00400000;
81 v = *(volatile unsigned char *) addr;
82 return v;
83}
84
85void
86pcc_outb(struct iop *p, unsigned char value, unsigned long port)
87{
88 unsigned long addr = p->base + port + 0x40000;
89
90 if (port & 1)
91 addr += 0x00400000;
92 *(volatile unsigned char *) addr = value;
93}
94
95unsigned char
96bad_inb(struct iop *p, unsigned long port)
97{
98 badio(inb, port);
99}
100
101void
102bad_outb(struct iop *p, unsigned char value, unsigned long port)
103{
104 badio(inw, port);
105}
106
107#ifdef CONFIG_SMC91X
108/* MSTLANEX01 LAN at 0xb400:0000 */
109static struct iop laniop = {
110 .start = 0x00,
111 .end = 0x0F,
112 .base = 0x04000000,
113 .check = simple_check,
114 .inb = simple_inb,
115 .inw = simple_inw,
116 .outb = simple_outb,
117 .outw = simple_outw,
118};
119#endif
120
121#ifdef CONFIG_NE2000
122/* NE2000 pc card NIC */
123static struct iop neiop = {
124 .start = 0x280,
125 .end = 0x29f,
126 .base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
127 .check = simple_check,
128 .inb = pcc_inb,
129 .inw = simple_inw,
130 .outb = pcc_outb,
131 .outw = simple_outw,
132};
133#endif
134
135#ifdef CONFIG_IDE
136/* CF in CF slot */
137static struct iop cfiop = {
138 .base = 0xb0600000,
139 .check = ide_check,
140 .inb = pcc_inb,
141 .inw = simple_inw,
142 .outb = pcc_outb,
143 .outw = simple_outw,
144};
145#endif
146
147static __inline__ struct iop *
148port2iop(unsigned long port)
149{
150 if (0) ;
151#if defined(CONFIG_SMC91X)
152 else if (laniop.check(&laniop, port))
153 return &laniop;
154#endif
155#if defined(CONFIG_NE2000)
156 else if (neiop.check(&neiop, port))
157 return &neiop;
158#endif
159#if defined(CONFIG_IDE)
160 else if (cfiop.check(&cfiop, port))
161 return &cfiop;
162#endif
163 else
164 return NULL;
165}
166
167static inline void
168delay(void)
169{
170 ctrl_inw(0xac000000);
171 ctrl_inw(0xac000000);
172}
173
174unsigned char
175sh7343se_inb(unsigned long port)
176{
177 struct iop *p = port2iop(port);
178 return (p->inb) (p, port);
179}
180
181unsigned char
182sh7343se_inb_p(unsigned long port)
183{
184 unsigned char v = sh7343se_inb(port);
185 delay();
186 return v;
187}
188
189unsigned short
190sh7343se_inw(unsigned long port)
191{
192 struct iop *p = port2iop(port);
193 return (p->inw) (p, port);
194}
195
196unsigned int
197sh7343se_inl(unsigned long port)
198{
199 badio(inl, port);
200}
201
202void
203sh7343se_outb(unsigned char value, unsigned long port)
204{
205 struct iop *p = port2iop(port);
206 (p->outb) (p, value, port);
207}
208
209void
210sh7343se_outb_p(unsigned char value, unsigned long port)
211{
212 sh7343se_outb(value, port);
213 delay();
214}
215
216void
217sh7343se_outw(unsigned short value, unsigned long port)
218{
219 struct iop *p = port2iop(port);
220 (p->outw) (p, value, port);
221}
222
223void
224sh7343se_outl(unsigned int value, unsigned long port)
225{
226 badio(outl, port);
227}
228
229void
230sh7343se_insb(unsigned long port, void *addr, unsigned long count)
231{
232 unsigned char *a = addr;
233 struct iop *p = port2iop(port);
234 while (count--)
235 *a++ = (p->inb) (p, port);
236}
237
238void
239sh7343se_insw(unsigned long port, void *addr, unsigned long count)
240{
241 unsigned short *a = addr;
242 struct iop *p = port2iop(port);
243 while (count--)
244 *a++ = (p->inw) (p, port);
245}
246
247void
248sh7343se_insl(unsigned long port, void *addr, unsigned long count)
249{
250 badio(insl, port);
251}
252
253void
254sh7343se_outsb(unsigned long port, const void *addr, unsigned long count)
255{
256 unsigned char *a = (unsigned char *) addr;
257 struct iop *p = port2iop(port);
258 while (count--)
259 (p->outb) (p, *a++, port);
260}
261
262void
263sh7343se_outsw(unsigned long port, const void *addr, unsigned long count)
264{
265 unsigned short *a = (unsigned short *) addr;
266 struct iop *p = port2iop(port);
267 while (count--)
268 (p->outw) (p, *a++, port);
269}
270
271void
272sh7343se_outsl(unsigned long port, const void *addr, unsigned long count)
273{
274 badio(outsw, port);
275}
diff --git a/arch/sh/boards/se/7343/irq.c b/arch/sh/boards/se/7343/irq.c
new file mode 100644
index 000000000000..b41e3d4ea37c
--- /dev/null
+++ b/arch/sh/boards/se/7343/irq.c
@@ -0,0 +1,193 @@
1/*
2 * arch/sh/boards/se/7343/irq.c
3 *
4 */
5
6#include <linux/config.h>
7#include <linux/init.h>
8#include <linux/interrupt.h>
9#include <linux/irq.h>
10#include <asm/irq.h>
11#include <asm/io.h>
12#include <asm/mach/se7343.h>
13
14static void
15disable_intreq_irq(unsigned int irq)
16{
17 int bit = irq - OFFCHIP_IRQ_BASE;
18 u16 val;
19
20 val = ctrl_inw(PA_CPLD_IMSK);
21 val |= 1 << bit;
22 ctrl_outw(val, PA_CPLD_IMSK);
23}
24
25static void
26enable_intreq_irq(unsigned int irq)
27{
28 int bit = irq - OFFCHIP_IRQ_BASE;
29 u16 val;
30
31 val = ctrl_inw(PA_CPLD_IMSK);
32 val &= ~(1 << bit);
33 ctrl_outw(val, PA_CPLD_IMSK);
34}
35
36static void
37mask_and_ack_intreq_irq(unsigned int irq)
38{
39 disable_intreq_irq(irq);
40}
41
42static unsigned int
43startup_intreq_irq(unsigned int irq)
44{
45 enable_intreq_irq(irq);
46 return 0;
47}
48
49static void
50shutdown_intreq_irq(unsigned int irq)
51{
52 disable_intreq_irq(irq);
53}
54
55static void
56end_intreq_irq(unsigned int irq)
57{
58 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
59 enable_intreq_irq(irq);
60}
61
62static struct hw_interrupt_type intreq_irq_type = {
63 .typename = "FPGA-IRQ",
64 .startup = startup_intreq_irq,
65 .shutdown = shutdown_intreq_irq,
66 .enable = enable_intreq_irq,
67 .disable = disable_intreq_irq,
68 .ack = mask_and_ack_intreq_irq,
69 .end = end_intreq_irq
70};
71
72static void
73make_intreq_irq(unsigned int irq)
74{
75 disable_irq_nosync(irq);
76 irq_desc[irq].handler = &intreq_irq_type;
77 disable_intreq_irq(irq);
78}
79
80int
81shmse_irq_demux(int irq)
82{
83 int bit;
84 volatile u16 val;
85
86 if (irq == IRQ5_IRQ) {
87 /* Read status Register */
88 val = ctrl_inw(PA_CPLD_ST);
89 bit = ffs(val);
90 if (bit != 0)
91 return OFFCHIP_IRQ_BASE + bit - 1;
92 }
93 return irq;
94}
95
96/* IRQ5 is multiplexed between the following sources:
97 * 1. PC Card socket
98 * 2. Extension slot
99 * 3. USB Controller
100 * 4. Serial Controller
101 *
102 * We configure IRQ5 as a cascade IRQ.
103 */
104static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade",
105 NULL, NULL};
106
107/*
108 * Initialize IRQ setting
109 */
110void __init
111init_7343se_IRQ(void)
112{
113 /* Setup Multiplexed interrupts */
114 ctrl_outw(8, PA_CPLD_MODESET); /* Set all CPLD interrupts to active
115 * low.
116 */
117 /* Mask all CPLD controller interrupts */
118 ctrl_outw(0x0fff, PA_CPLD_IMSK);
119
120 /* PC Card interrupts */
121 make_intreq_irq(PC_IRQ0);
122 make_intreq_irq(PC_IRQ1);
123 make_intreq_irq(PC_IRQ2);
124 make_intreq_irq(PC_IRQ3);
125
126 /* Extension Slot Interrupts */
127 make_intreq_irq(EXT_IRQ0);
128 make_intreq_irq(EXT_IRQ1);
129 make_intreq_irq(EXT_IRQ2);
130 make_intreq_irq(EXT_IRQ3);
131
132 /* USB Controller interrupts */
133 make_intreq_irq(USB_IRQ0);
134 make_intreq_irq(USB_IRQ1);
135
136 /* Serial Controller interrupts */
137 make_intreq_irq(UART_IRQ0);
138 make_intreq_irq(UART_IRQ1);
139
140 /* Setup all external interrupts to be active low */
141 ctrl_outw(0xaaaa, INTC_ICR1);
142
143 make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY);
144 setup_irq(IRQ5_IRQ, &irq5);
145 /* Set port control to use IRQ5 */
146 *(u16 *)0xA4050108 &= ~0xc;
147
148 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
149 make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);
150
151 ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */
152
153 make_ipr_irq(DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
154 make_ipr_irq(DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
155 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
156 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
157 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
158 make_ipr_irq(DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
159
160 /* I2C block */
161 make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
162 make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
163 IIC0_PRIORITY);
164 make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
165 IIC0_PRIORITY);
166 make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
167
168 make_ipr_irq(IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
169 make_ipr_irq(IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
170 IIC1_PRIORITY);
171 make_ipr_irq(IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
172 IIC1_PRIORITY);
173 make_ipr_irq(IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
174
175 /* SIOF */
176 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
177
178 /* SIU */
179 make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);
180
181 /* VIO interrupt */
182 make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
183 make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
184 make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
185
186 /*MFI interrupt*/
187
188 make_ipr_irq(MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY);
189
190 /* LCD controller */
191 make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
192 ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
193}
diff --git a/arch/sh/boards/se/7343/led.c b/arch/sh/boards/se/7343/led.c
new file mode 100644
index 000000000000..6a439cf83e46
--- /dev/null
+++ b/arch/sh/boards/se/7343/led.c
@@ -0,0 +1,46 @@
1/*
2 * arch/sh/boards/se/7343/led.c
3 *
4 */
5
6#include <linux/config.h>
7#include <linux/sched.h>
8#include <asm/mach/se7343.h>
9
10/* Cycle the LED's in the clasic Knightrider/Sun pattern */
11void heartbeat_7343se(void)
12{
13 static unsigned int cnt = 0, period = 0;
14 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
15 static unsigned bit = 0, up = 1;
16
17 cnt += 1;
18 if (cnt < period) {
19 return;
20 }
21
22 cnt = 0;
23
24 /* Go through the points (roughly!):
25 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
26 */
27 period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
28
29 if (up) {
30 if (bit == 7) {
31 bit--;
32 up = 0;
33 } else {
34 bit++;
35 }
36 } else {
37 if (bit == 0) {
38 bit++;
39 up = 1;
40 } else {
41 bit--;
42 }
43 }
44 *p = 1 << (bit + LED_SHIFT);
45
46}
diff --git a/arch/sh/boards/se/7343/setup.c b/arch/sh/boards/se/7343/setup.c
new file mode 100644
index 000000000000..787322291fb3
--- /dev/null
+++ b/arch/sh/boards/se/7343/setup.c
@@ -0,0 +1,84 @@
1#include <linux/config.h>
2#include <linux/init.h>
3#include <linux/platform_device.h>
4#include <asm/machvec.h>
5#include <asm/mach/se7343.h>
6#include <asm/irq.h>
7
8void heartbeat_7343se(void);
9void init_7343se_IRQ(void);
10
11static struct resource smc91x_resources[] = {
12 [0] = {
13 .start = 0x10000000,
14 .end = 0x1000000F,
15 .flags = IORESOURCE_MEM,
16 },
17 [1] = {
18 /*
19 * shared with other devices via externel
20 * interrupt controller in FPGA...
21 */
22 .start = EXT_IRQ2,
23 .end = EXT_IRQ2,
24 .flags = IORESOURCE_IRQ,
25 },
26};
27
28static struct platform_device smc91x_device = {
29 .name = "smc91x",
30 .id = 0,
31 .num_resources = ARRAY_SIZE(smc91x_resources),
32 .resource = smc91x_resources,
33};
34
35static struct platform_device *smc91x_platform_devices[] __initdata = {
36 &smc91x_device,
37};
38
39static int __init sh7343se_devices_setup(void)
40{
41 return platform_add_devices(smc91x_platform_devices,
42 ARRAY_SIZE(smc91x_platform_devices));
43}
44
45static void __init sh7343se_setup(char **cmdline_p)
46{
47 device_initcall(sh7343se_devices_setup);
48}
49
50/*
51 * The Machine Vector
52 */
53struct sh_machine_vector mv_7343se __initmv = {
54 .mv_name = "SolutionEngine 7343",
55 .mv_setup = sh7343se_setup,
56 .mv_nr_irqs = 108,
57 .mv_inb = sh7343se_inb,
58 .mv_inw = sh7343se_inw,
59 .mv_inl = sh7343se_inl,
60 .mv_outb = sh7343se_outb,
61 .mv_outw = sh7343se_outw,
62 .mv_outl = sh7343se_outl,
63
64 .mv_inb_p = sh7343se_inb_p,
65 .mv_inw_p = sh7343se_inw,
66 .mv_inl_p = sh7343se_inl,
67 .mv_outb_p = sh7343se_outb_p,
68 .mv_outw_p = sh7343se_outw,
69 .mv_outl_p = sh7343se_outl,
70
71 .mv_insb = sh7343se_insb,
72 .mv_insw = sh7343se_insw,
73 .mv_insl = sh7343se_insl,
74 .mv_outsb = sh7343se_outsb,
75 .mv_outsw = sh7343se_outsw,
76 .mv_outsl = sh7343se_outsl,
77
78 .mv_init_irq = init_7343se_IRQ,
79 .mv_irq_demux = shmse_irq_demux,
80#ifdef CONFIG_HEARTBEAT
81 .mv_heartbeat = heartbeat_7343se,
82#endif
83};
84ALIAS_MV(7343se)
diff --git a/arch/sh/boards/se/770x/Makefile b/arch/sh/boards/se/770x/Makefile
index be89a73cc418..9a5035f80ec0 100644
--- a/arch/sh/boards/se/770x/Makefile
+++ b/arch/sh/boards/se/770x/Makefile
@@ -2,5 +2,5 @@
2# Makefile for the 770x SolutionEngine specific parts of the kernel 2# Makefile for the 770x SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := mach.o setup.o io.o irq.o led.o 5obj-y := setup.o io.o irq.o
6 6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c
index 9a39ee963143..9941949331ab 100644
--- a/arch/sh/boards/se/770x/io.c
+++ b/arch/sh/boards/se/770x/io.c
@@ -1,4 +1,4 @@
1/* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $ 1/* $Id: io.c,v 1.7 2006/02/05 21:55:29 lethal Exp $
2 * 2 *
3 * linux/arch/sh/kernel/io_se.c 3 * linux/arch/sh/kernel/io_se.c
4 * 4 *
@@ -11,7 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/se/se.h> 14#include <asm/se.h>
15 15
16/* SH pcmcia io window base, start and end. */ 16/* SH pcmcia io window base, start and end. */
17int sh_pcic_io_wbase = 0xb8400000; 17int sh_pcic_io_wbase = 0xb8400000;
@@ -20,11 +20,6 @@ int sh_pcic_io_stop;
20int sh_pcic_io_type; 20int sh_pcic_io_type;
21int sh_pcic_io_dummy; 21int sh_pcic_io_dummy;
22 22
23static inline void delay(void)
24{
25 ctrl_inw(0xa0000000);
26}
27
28/* MS7750 requires special versions of in*, out* routines, since 23/* MS7750 requires special versions of in*, out* routines, since
29 PC-like io ports are located at upper half byte of 16-bit word which 24 PC-like io ports are located at upper half byte of 16-bit word which
30 can be accessed only with 16-bit wide. */ 25 can be accessed only with 16-bit wide. */
@@ -52,10 +47,6 @@ shifted_port(unsigned long port)
52 return 1; 47 return 1;
53} 48}
54 49
55#define maybebadio(name,port) \
56 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
57 #name, (port), (__u32) __builtin_return_address(0))
58
59unsigned char se_inb(unsigned long port) 50unsigned char se_inb(unsigned long port)
60{ 51{
61 if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) 52 if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
@@ -76,7 +67,7 @@ unsigned char se_inb_p(unsigned long port)
76 v = (*port2adr(port) >> 8); 67 v = (*port2adr(port) >> 8);
77 else 68 else
78 v = (*port2adr(port))&0xff; 69 v = (*port2adr(port))&0xff;
79 delay(); 70 ctrl_delay();
80 return v; 71 return v;
81} 72}
82 73
@@ -86,13 +77,13 @@ unsigned short se_inw(unsigned long port)
86 (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) 77 (sh_pcic_io_start <= port && port <= sh_pcic_io_stop))
87 return *port2adr(port); 78 return *port2adr(port);
88 else 79 else
89 maybebadio(inw, port); 80 maybebadio(port);
90 return 0; 81 return 0;
91} 82}
92 83
93unsigned int se_inl(unsigned long port) 84unsigned int se_inl(unsigned long port)
94{ 85{
95 maybebadio(inl, port); 86 maybebadio(port);
96 return 0; 87 return 0;
97} 88}
98 89
@@ -114,7 +105,7 @@ void se_outb_p(unsigned char value, unsigned long port)
114 *(port2adr(port)) = value << 8; 105 *(port2adr(port)) = value << 8;
115 else 106 else
116 *(port2adr(port)) = value; 107 *(port2adr(port)) = value;
117 delay(); 108 ctrl_delay();
118} 109}
119 110
120void se_outw(unsigned short value, unsigned long port) 111void se_outw(unsigned short value, unsigned long port)
@@ -123,12 +114,12 @@ void se_outw(unsigned short value, unsigned long port)
123 (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) 114 (sh_pcic_io_start <= port && port <= sh_pcic_io_stop))
124 *port2adr(port) = value; 115 *port2adr(port) = value;
125 else 116 else
126 maybebadio(outw, port); 117 maybebadio(port);
127} 118}
128 119
129void se_outl(unsigned int value, unsigned long port) 120void se_outl(unsigned int value, unsigned long port)
130{ 121{
131 maybebadio(outl, port); 122 maybebadio(port);
132} 123}
133 124
134void se_insb(unsigned long port, void *addr, unsigned long count) 125void se_insb(unsigned long port, void *addr, unsigned long count)
@@ -159,7 +150,7 @@ void se_insw(unsigned long port, void *addr, unsigned long count)
159 150
160void se_insl(unsigned long port, void *addr, unsigned long count) 151void se_insl(unsigned long port, void *addr, unsigned long count)
161{ 152{
162 maybebadio(insl, port); 153 maybebadio(port);
163} 154}
164 155
165void se_outsb(unsigned long port, const void *addr, unsigned long count) 156void se_outsb(unsigned long port, const void *addr, unsigned long count)
@@ -190,37 +181,5 @@ void se_outsw(unsigned long port, const void *addr, unsigned long count)
190 181
191void se_outsl(unsigned long port, const void *addr, unsigned long count) 182void se_outsl(unsigned long port, const void *addr, unsigned long count)
192{ 183{
193 maybebadio(outsw, port); 184 maybebadio(port);
194}
195
196/* Map ISA bus address to the real address. Only for PCMCIA. */
197
198/* ISA page descriptor. */
199static __u32 sh_isa_memmap[256];
200
201static int
202sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
203{
204 int idx;
205
206 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
207 return -1;
208
209 idx = start >> 12;
210 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
211#if 0
212 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
213 start, length, offset, idx, sh_isa_memmap[idx]);
214#endif
215 return 0;
216}
217
218unsigned long
219se_isa_port2addr(unsigned long offset)
220{
221 int idx;
222
223 idx = (offset >> 12) & 0xff;
224 offset &= 0xfff;
225 return sh_isa_memmap[idx] + offset;
226} 185}
diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c
index 3e558716ce10..cff6700bbafd 100644
--- a/arch/sh/boards/se/770x/irq.c
+++ b/arch/sh/boards/se/770x/irq.c
@@ -11,7 +11,7 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <asm/irq.h> 12#include <asm/irq.h>
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/se/se.h> 14#include <asm/se.h>
15 15
16/* 16/*
17 * Initialize IRQ setting 17 * Initialize IRQ setting
diff --git a/arch/sh/boards/se/770x/led.c b/arch/sh/boards/se/770x/led.c
index 3cddbda025fc..daf7b1ee786a 100644
--- a/arch/sh/boards/se/770x/led.c
+++ b/arch/sh/boards/se/770x/led.c
@@ -9,22 +9,8 @@
9 * This file contains Solution Engine specific LED code. 9 * This file contains Solution Engine specific LED code.
10 */ 10 */
11 11
12#include <asm/se/se.h>
13
14static void mach_led(int position, int value)
15{
16 volatile unsigned short* p = (volatile unsigned short*)PA_LED;
17
18 if (value) {
19 *p |= (1<<8);
20 } else {
21 *p &= ~(1<<8);
22 }
23}
24
25#ifdef CONFIG_HEARTBEAT
26
27#include <linux/sched.h> 12#include <linux/sched.h>
13#include <asm/se.h>
28 14
29/* Cycle the LED's in the clasic Knightrider/Sun pattern */ 15/* Cycle the LED's in the clasic Knightrider/Sun pattern */
30void heartbeat_se(void) 16void heartbeat_se(void)
@@ -64,4 +50,3 @@ void heartbeat_se(void)
64 *p = 1<<(bit+8); 50 *p = 1<<(bit+8);
65 51
66} 52}
67#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/se/770x/mach.c b/arch/sh/boards/se/770x/mach.c
deleted file mode 100644
index 6ec07bd3dcf1..000000000000
--- a/arch/sh/boards/se/770x/mach.c
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * linux/arch/sh/kernel/mach_se.c
3 *
4 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the Hitachi SolutionEngine
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/machvec_init.h>
17
18#include <asm/se/io.h>
19
20void heartbeat_se(void);
21void setup_se(void);
22void init_se_IRQ(void);
23
24/*
25 * The Machine Vector
26 */
27
28struct sh_machine_vector mv_se __initmv = {
29#if defined(CONFIG_CPU_SH4)
30 .mv_nr_irqs = 48,
31#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
32 .mv_nr_irqs = 32,
33#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
34 .mv_nr_irqs = 61,
35#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
36 .mv_nr_irqs = 86,
37#endif
38
39 .mv_inb = se_inb,
40 .mv_inw = se_inw,
41 .mv_inl = se_inl,
42 .mv_outb = se_outb,
43 .mv_outw = se_outw,
44 .mv_outl = se_outl,
45
46 .mv_inb_p = se_inb_p,
47 .mv_inw_p = se_inw,
48 .mv_inl_p = se_inl,
49 .mv_outb_p = se_outb_p,
50 .mv_outw_p = se_outw,
51 .mv_outl_p = se_outl,
52
53 .mv_insb = se_insb,
54 .mv_insw = se_insw,
55 .mv_insl = se_insl,
56 .mv_outsb = se_outsb,
57 .mv_outsw = se_outsw,
58 .mv_outsl = se_outsl,
59
60 .mv_isa_port2addr = se_isa_port2addr,
61
62 .mv_init_irq = init_se_IRQ,
63#ifdef CONFIG_HEARTBEAT
64 .mv_heartbeat = heartbeat_se,
65#endif
66};
67ALIAS_MV(se)
diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c
index 7d1a071727cc..f3f82b7c8217 100644
--- a/arch/sh/boards/se/770x/setup.c
+++ b/arch/sh/boards/se/770x/setup.c
@@ -7,15 +7,17 @@
7 * Hitachi SolutionEngine Support. 7 * Hitachi SolutionEngine Support.
8 * 8 *
9 */ 9 */
10
11#include <linux/init.h> 10#include <linux/init.h>
12#include <linux/irq.h> 11#include <linux/irq.h>
13
14#include <linux/hdreg.h> 12#include <linux/hdreg.h>
15#include <linux/ide.h> 13#include <linux/ide.h>
16#include <asm/io.h> 14#include <asm/io.h>
17#include <asm/se/se.h> 15#include <asm/se.h>
18#include <asm/se/smc37c93x.h> 16#include <asm/smc37c93x.h>
17#include <asm/machvec.h>
18
19void heartbeat_se(void);
20void init_se_IRQ(void);
19 21
20/* 22/*
21 * Configure the Super I/O chip 23 * Configure the Super I/O chip
@@ -26,7 +28,8 @@ static void __init smsc_config(int index, int data)
26 outb_p(data, DATA_PORT); 28 outb_p(data, DATA_PORT);
27} 29}
28 30
29static void __init init_smsc(void) 31/* XXX: Another candidate for a more generic cchip machine vector */
32static void __init smsc_setup(char **cmdline_p)
30{ 33{
31 outb_p(CONFIG_ENTER, CONFIG_PORT); 34 outb_p(CONFIG_ENTER, CONFIG_PORT);
32 outb_p(CONFIG_ENTER, CONFIG_PORT); 35 outb_p(CONFIG_ENTER, CONFIG_PORT);
@@ -69,16 +72,46 @@ static void __init init_smsc(void)
69 outb_p(CONFIG_EXIT, CONFIG_PORT); 72 outb_p(CONFIG_EXIT, CONFIG_PORT);
70} 73}
71 74
72const char *get_system_type(void)
73{
74 return "SolutionEngine";
75}
76
77/* 75/*
78 * Initialize the board 76 * The Machine Vector
79 */ 77 */
80void __init platform_setup(void) 78struct sh_machine_vector mv_se __initmv = {
81{ 79 .mv_name = "SolutionEngine",
82 init_smsc(); 80 .mv_setup = smsc_setup,
83 /* XXX: RTC setting comes here */ 81#if defined(CONFIG_CPU_SH4)
84} 82 .mv_nr_irqs = 48,
83#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
84 .mv_nr_irqs = 32,
85#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
86 .mv_nr_irqs = 61,
87#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
88 .mv_nr_irqs = 86,
89#endif
90
91 .mv_inb = se_inb,
92 .mv_inw = se_inw,
93 .mv_inl = se_inl,
94 .mv_outb = se_outb,
95 .mv_outw = se_outw,
96 .mv_outl = se_outl,
97
98 .mv_inb_p = se_inb_p,
99 .mv_inw_p = se_inw,
100 .mv_inl_p = se_inl,
101 .mv_outb_p = se_outb_p,
102 .mv_outw_p = se_outw,
103 .mv_outl_p = se_outl,
104
105 .mv_insb = se_insb,
106 .mv_insw = se_insw,
107 .mv_insl = se_insl,
108 .mv_outsb = se_outsb,
109 .mv_outsw = se_outsw,
110 .mv_outsl = se_outsl,
111
112 .mv_init_irq = init_se_IRQ,
113#ifdef CONFIG_HEARTBEAT
114 .mv_heartbeat = heartbeat_se,
115#endif
116};
117ALIAS_MV(se)
diff --git a/arch/sh/boards/se/7751/Makefile b/arch/sh/boards/se/7751/Makefile
index ce7ca247f84d..188900c48321 100644
--- a/arch/sh/boards/se/7751/Makefile
+++ b/arch/sh/boards/se/7751/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the 7751 SolutionEngine specific parts of the kernel 2# Makefile for the 7751 SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := mach.o setup.o io.o irq.o led.o 5obj-y := setup.o io.o irq.o
6 6
7obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
8 8obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7751/io.c b/arch/sh/boards/se/7751/io.c
index 99041b269261..e8d846cec89d 100644
--- a/arch/sh/boards/se/7751/io.c
+++ b/arch/sh/boards/se/7751/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_7751se.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 3 * Based largely on io_se.c.
6 * 4 *
@@ -10,96 +8,21 @@
10 * placeholder code from io_se.c left in with the 8 * placeholder code from io_se.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 9 * expectation of later SuperIO and PCMCIA access.
12 */ 10 */
13
14#include <linux/kernel.h> 11#include <linux/kernel.h>
15#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/pci.h>
16#include <asm/io.h> 14#include <asm/io.h>
17#include <asm/se7751/se7751.h> 15#include <asm/se7751.h>
18#include <asm/addrspace.h> 16#include <asm/addrspace.h>
19 17
20#include <linux/pci.h> 18static inline volatile u16 *port2adr(unsigned int port)
21#include "../../../drivers/pci/pci-sh7751.h"
22
23#if 0
24/******************************************************************
25 * Variables from io_se.c, related to PCMCIA (not PCI); we're not
26 * compiling them in, and have removed references from functions
27 * which follow. [Many checked for IO ports in the range bounded
28 * by sh_pcic_io_start/stop, and used sh_pcic_io_wbase as offset.
29 * As start/stop are uninitialized, only port 0x0 would match?]
30 * When used, remember to adjust names to avoid clash with io_se?
31 *****************************************************************/
32/* SH pcmcia io window base, start and end. */
33int sh_pcic_io_wbase = 0xb8400000;
34int sh_pcic_io_start;
35int sh_pcic_io_stop;
36int sh_pcic_io_type;
37int sh_pcic_io_dummy;
38/*************************************************************/
39#endif
40
41/*
42 * The 7751 Solution Engine uses the built-in PCI controller (PCIC)
43 * of the 7751 processor, and has a SuperIO accessible via the PCI.
44 * The board also includes a PCMCIA controller on its memory bus,
45 * like the other Solution Engine boards.
46 */
47
48#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
49#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
50#define PCI_IO_AREA SH7751_PCI_IO_BASE
51#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
52
53#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
54
55#define maybebadio(name,port) \
56 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
57 #name, (port), (__u32) __builtin_return_address(0))
58
59static inline void delay(void)
60{
61 ctrl_inw(0xa0000000);
62}
63
64static inline volatile __u16 *
65port2adr(unsigned int port)
66{ 19{
67 if (port >= 0x2000) 20 if (port >= 0x2000)
68 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 21 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
69#if 0 22 maybebadio((unsigned long)port);
70 else
71 return (volatile __u16 *) (PA_SUPERIO + (port << 1));
72#endif
73 maybebadio(name,(unsigned long)port);
74 return (volatile __u16*)port; 23 return (volatile __u16*)port;
75} 24}
76 25
77#if 0
78/* The 7751 Solution Engine seems to have everything hooked */
79/* up pretty normally (nothing on high-bytes only...) so this */
80/* shouldn't be needed */
81static inline int
82shifted_port(unsigned long port)
83{
84 /* For IDE registers, value is not shifted */
85 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
86 return 0;
87 else
88 return 1;
89}
90#endif
91
92/* In case someone configures the kernel w/o PCI support: in that */
93/* scenario, don't ever bother to check for PCI-window addresses */
94
95/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
96#if defined(CONFIG_PCI)
97#define CHECK_SH7751_PCIIO(port) \
98 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
99#else
100#define CHECK_SH7751_PCIIO(port) (0)
101#endif
102
103/* 26/*
104 * General outline: remap really low stuff [eventually] to SuperIO, 27 * General outline: remap really low stuff [eventually] to SuperIO,
105 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 28 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -111,10 +34,10 @@ unsigned char sh7751se_inb(unsigned long port)
111{ 34{
112 if (PXSEG(port)) 35 if (PXSEG(port))
113 return *(volatile unsigned char *)port; 36 return *(volatile unsigned char *)port;
114 else if (CHECK_SH7751_PCIIO(port)) 37 else if (is_pci_ioaddr(port))
115 return *(volatile unsigned char *)PCI_IOMAP(port); 38 return *(volatile unsigned char *)pci_ioaddr(port);
116 else 39 else
117 return (*port2adr(port))&0xff; 40 return (*port2adr(port)) & 0xff;
118} 41}
119 42
120unsigned char sh7751se_inb_p(unsigned long port) 43unsigned char sh7751se_inb_p(unsigned long port)
@@ -123,11 +46,11 @@ unsigned char sh7751se_inb_p(unsigned long port)
123 46
124 if (PXSEG(port)) 47 if (PXSEG(port))
125 v = *(volatile unsigned char *)port; 48 v = *(volatile unsigned char *)port;
126 else if (CHECK_SH7751_PCIIO(port)) 49 else if (is_pci_ioaddr(port))
127 v = *(volatile unsigned char *)PCI_IOMAP(port); 50 v = *(volatile unsigned char *)pci_ioaddr(port);
128 else 51 else
129 v = (*port2adr(port))&0xff; 52 v = (*port2adr(port)) & 0xff;
130 delay(); 53 ctrl_delay();
131 return v; 54 return v;
132} 55}
133 56
@@ -135,12 +58,12 @@ unsigned short sh7751se_inw(unsigned long port)
135{ 58{
136 if (PXSEG(port)) 59 if (PXSEG(port))
137 return *(volatile unsigned short *)port; 60 return *(volatile unsigned short *)port;
138 else if (CHECK_SH7751_PCIIO(port)) 61 else if (is_pci_ioaddr(port))
139 return *(volatile unsigned short *)PCI_IOMAP(port); 62 return *(volatile unsigned short *)pci_ioaddr(port);
140 else if (port >= 0x2000) 63 else if (port >= 0x2000)
141 return *port2adr(port); 64 return *port2adr(port);
142 else 65 else
143 maybebadio(inw, port); 66 maybebadio(port);
144 return 0; 67 return 0;
145} 68}
146 69
@@ -148,12 +71,12 @@ unsigned int sh7751se_inl(unsigned long port)
148{ 71{
149 if (PXSEG(port)) 72 if (PXSEG(port))
150 return *(volatile unsigned long *)port; 73 return *(volatile unsigned long *)port;
151 else if (CHECK_SH7751_PCIIO(port)) 74 else if (is_pci_ioaddr(port))
152 return *(volatile unsigned int *)PCI_IOMAP(port); 75 return *(volatile unsigned int *)pci_ioaddr(port);
153 else if (port >= 0x2000) 76 else if (port >= 0x2000)
154 return *port2adr(port); 77 return *port2adr(port);
155 else 78 else
156 maybebadio(inl, port); 79 maybebadio(port);
157 return 0; 80 return 0;
158} 81}
159 82
@@ -162,8 +85,8 @@ void sh7751se_outb(unsigned char value, unsigned long port)
162 85
163 if (PXSEG(port)) 86 if (PXSEG(port))
164 *(volatile unsigned char *)port = value; 87 *(volatile unsigned char *)port = value;
165 else if (CHECK_SH7751_PCIIO(port)) 88 else if (is_pci_ioaddr(port))
166 *((unsigned char*)PCI_IOMAP(port)) = value; 89 *((unsigned char*)pci_ioaddr(port)) = value;
167 else 90 else
168 *(port2adr(port)) = value; 91 *(port2adr(port)) = value;
169} 92}
@@ -172,73 +95,41 @@ void sh7751se_outb_p(unsigned char value, unsigned long port)
172{ 95{
173 if (PXSEG(port)) 96 if (PXSEG(port))
174 *(volatile unsigned char *)port = value; 97 *(volatile unsigned char *)port = value;
175 else if (CHECK_SH7751_PCIIO(port)) 98 else if (is_pci_ioaddr(port))
176 *((unsigned char*)PCI_IOMAP(port)) = value; 99 *((unsigned char*)pci_ioaddr(port)) = value;
177 else 100 else
178 *(port2adr(port)) = value; 101 *(port2adr(port)) = value;
179 delay(); 102 ctrl_delay();
180} 103}
181 104
182void sh7751se_outw(unsigned short value, unsigned long port) 105void sh7751se_outw(unsigned short value, unsigned long port)
183{ 106{
184 if (PXSEG(port)) 107 if (PXSEG(port))
185 *(volatile unsigned short *)port = value; 108 *(volatile unsigned short *)port = value;
186 else if (CHECK_SH7751_PCIIO(port)) 109 else if (is_pci_ioaddr(port))
187 *((unsigned short *)PCI_IOMAP(port)) = value; 110 *((unsigned short *)pci_ioaddr(port)) = value;
188 else if (port >= 0x2000) 111 else if (port >= 0x2000)
189 *port2adr(port) = value; 112 *port2adr(port) = value;
190 else 113 else
191 maybebadio(outw, port); 114 maybebadio(port);
192} 115}
193 116
194void sh7751se_outl(unsigned int value, unsigned long port) 117void sh7751se_outl(unsigned int value, unsigned long port)
195{ 118{
196 if (PXSEG(port)) 119 if (PXSEG(port))
197 *(volatile unsigned long *)port = value; 120 *(volatile unsigned long *)port = value;
198 else if (CHECK_SH7751_PCIIO(port)) 121 else if (is_pci_ioaddr(port))
199 *((unsigned long*)PCI_IOMAP(port)) = value; 122 *((unsigned long*)pci_ioaddr(port)) = value;
200 else 123 else
201 maybebadio(outl, port); 124 maybebadio(port);
202} 125}
203 126
204void sh7751se_insl(unsigned long port, void *addr, unsigned long count) 127void sh7751se_insl(unsigned long port, void *addr, unsigned long count)
205{ 128{
206 maybebadio(insl, port); 129 maybebadio(port);
207} 130}
208 131
209void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count) 132void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
210{ 133{
211 maybebadio(outsw, port); 134 maybebadio(port);
212}
213
214/* Map ISA bus address to the real address. Only for PCMCIA. */
215
216/* ISA page descriptor. */
217static __u32 sh_isa_memmap[256];
218
219#if 0
220static int
221sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
222{
223 int idx;
224
225 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
226 return -1;
227
228 idx = start >> 12;
229 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
230 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
231 start, length, offset, idx, sh_isa_memmap[idx]);
232 return 0;
233}
234#endif
235
236unsigned long
237sh7751se_isa_port2addr(unsigned long offset)
238{
239 int idx;
240
241 idx = (offset >> 12) & 0xff;
242 offset &= 0xfff;
243 return sh_isa_memmap[idx] + offset;
244} 135}
diff --git a/arch/sh/boards/se/7751/irq.c b/arch/sh/boards/se/7751/irq.c
index bf6c023615df..c607b0a48479 100644
--- a/arch/sh/boards/se/7751/irq.c
+++ b/arch/sh/boards/se/7751/irq.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <asm/irq.h> 14#include <asm/irq.h>
15#include <asm/se7751/se7751.h> 15#include <asm/se7751.h>
16 16
17/* 17/*
18 * Initialize IRQ setting 18 * Initialize IRQ setting
diff --git a/arch/sh/boards/se/7751/led.c b/arch/sh/boards/se/7751/led.c
index a878726d3c7c..ff0355dea81b 100644
--- a/arch/sh/boards/se/7751/led.c
+++ b/arch/sh/boards/se/7751/led.c
@@ -8,23 +8,8 @@
8 * 8 *
9 * This file contains Solution Engine specific LED code. 9 * This file contains Solution Engine specific LED code.
10 */ 10 */
11
12#include <asm/se7751/se7751.h>
13
14static void mach_led(int position, int value)
15{
16 volatile unsigned short* p = (volatile unsigned short*)PA_LED;
17
18 if (value) {
19 *p |= (1<<8);
20 } else {
21 *p &= ~(1<<8);
22 }
23}
24
25#ifdef CONFIG_HEARTBEAT
26
27#include <linux/sched.h> 11#include <linux/sched.h>
12#include <asm/se7751.h>
28 13
29/* Cycle the LED's in the clasic Knightrider/Sun pattern */ 14/* Cycle the LED's in the clasic Knightrider/Sun pattern */
30void heartbeat_7751se(void) 15void heartbeat_7751se(void)
@@ -64,4 +49,3 @@ void heartbeat_7751se(void)
64 *p = 1<<(bit+8); 49 *p = 1<<(bit+8);
65 50
66} 51}
67#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/se/7751/mach.c b/arch/sh/boards/se/7751/mach.c
deleted file mode 100644
index 62d8d3e62590..000000000000
--- a/arch/sh/boards/se/7751/mach.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/sh/kernel/mach_7751se.c
3 *
4 * Minor tweak of mach_se.c file to reference 7751se-specific items.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the Hitachi 7751 SolutionEngine
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/machvec_init.h>
17
18#include <asm/se7751/io.h>
19
20void heartbeat_7751se(void);
21void init_7751se_IRQ(void);
22
23/*
24 * The Machine Vector
25 */
26
27struct sh_machine_vector mv_7751se __initmv = {
28 .mv_nr_irqs = 72,
29
30 .mv_inb = sh7751se_inb,
31 .mv_inw = sh7751se_inw,
32 .mv_inl = sh7751se_inl,
33 .mv_outb = sh7751se_outb,
34 .mv_outw = sh7751se_outw,
35 .mv_outl = sh7751se_outl,
36
37 .mv_inb_p = sh7751se_inb_p,
38 .mv_inw_p = sh7751se_inw,
39 .mv_inl_p = sh7751se_inl,
40 .mv_outb_p = sh7751se_outb_p,
41 .mv_outw_p = sh7751se_outw,
42 .mv_outl_p = sh7751se_outl,
43
44 .mv_insl = sh7751se_insl,
45 .mv_outsl = sh7751se_outsl,
46
47 .mv_isa_port2addr = sh7751se_isa_port2addr,
48
49 .mv_init_irq = init_7751se_IRQ,
50#ifdef CONFIG_HEARTBEAT
51 .mv_heartbeat = heartbeat_7751se,
52#endif
53};
54ALIAS_MV(7751se)
diff --git a/arch/sh/boards/se/7751/setup.c b/arch/sh/boards/se/7751/setup.c
index 48dc5aee67d4..73e826310ba8 100644
--- a/arch/sh/boards/se/7751/setup.c
+++ b/arch/sh/boards/se/7751/setup.c
@@ -1,4 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/setup_7751se.c 2 * linux/arch/sh/kernel/setup_7751se.c
3 * 3 *
4 * Copyright (C) 2000 Kazumoto Kojima 4 * Copyright (C) 2000 Kazumoto Kojima
@@ -11,78 +11,15 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14
15#include <linux/hdreg.h>
16#include <linux/ide.h> 14#include <linux/ide.h>
17#include <asm/io.h> 15#include <asm/io.h>
18#include <asm/se7751/se7751.h> 16#include <asm/se7751.h>
19 17
20#ifdef CONFIG_SH_KGDB 18void heartbeat_7751se(void);
21#include <asm/kgdb.h> 19void init_7751se_IRQ(void);
22#endif
23
24/*
25 * Configure the Super I/O chip
26 */
27#if 0
28/* Leftover code from regular Solution Engine, for reference. */
29/* The SH7751 Solution Engine has a different SuperIO. */
30static void __init smsc_config(int index, int data)
31{
32 outb_p(index, INDEX_PORT);
33 outb_p(data, DATA_PORT);
34}
35
36static void __init init_smsc(void)
37{
38 outb_p(CONFIG_ENTER, CONFIG_PORT);
39 outb_p(CONFIG_ENTER, CONFIG_PORT);
40
41 /* FDC */
42 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
43 smsc_config(ACTIVATE_INDEX, 0x01);
44 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
45
46 /* IDE1 */
47 smsc_config(CURRENT_LDN_INDEX, LDN_IDE1);
48 smsc_config(ACTIVATE_INDEX, 0x01);
49 smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */
50
51 /* AUXIO (GPIO): to use IDE1 */
52 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
53 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
54 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
55
56 /* COM1 */
57 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
58 smsc_config(ACTIVATE_INDEX, 0x01);
59 smsc_config(IO_BASE_HI_INDEX, 0x03);
60 smsc_config(IO_BASE_LO_INDEX, 0xf8);
61 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
62
63 /* COM2 */
64 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
65 smsc_config(ACTIVATE_INDEX, 0x01);
66 smsc_config(IO_BASE_HI_INDEX, 0x02);
67 smsc_config(IO_BASE_LO_INDEX, 0xf8);
68 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
69
70 /* RTC */
71 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
72 smsc_config(ACTIVATE_INDEX, 0x01);
73 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
74
75 /* XXX: PARPORT, KBD, and MOUSE will come here... */
76 outb_p(CONFIG_EXIT, CONFIG_PORT);
77}
78#endif
79
80const char *get_system_type(void)
81{
82 return "7751 SolutionEngine";
83}
84 20
85#ifdef CONFIG_SH_KGDB 21#ifdef CONFIG_SH_KGDB
22#include <asm/kgdb.h>
86static int kgdb_uart_setup(void); 23static int kgdb_uart_setup(void);
87static struct kgdb_sermap kgdb_uart_sermap = 24static struct kgdb_sermap kgdb_uart_sermap =
88{ "ttyS", 0, kgdb_uart_setup, NULL }; 25{ "ttyS", 0, kgdb_uart_setup, NULL };
@@ -91,7 +28,7 @@ static struct kgdb_sermap kgdb_uart_sermap =
91/* 28/*
92 * Initialize the board 29 * Initialize the board
93 */ 30 */
94void __init platform_setup(void) 31static void __init sh7751se_setup(char **cmdline_p)
95{ 32{
96 /* Call init_smsc() replacement to set up SuperIO. */ 33 /* Call init_smsc() replacement to set up SuperIO. */
97 /* XXX: RTC setting comes here */ 34 /* XXX: RTC setting comes here */
@@ -225,3 +162,37 @@ static int kgdb_uart_setup(void)
225 return 0; 162 return 0;
226} 163}
227#endif /* CONFIG_SH_KGDB */ 164#endif /* CONFIG_SH_KGDB */
165
166
167/*
168 * The Machine Vector
169 */
170
171struct sh_machine_vector mv_7751se __initmv = {
172 .mv_name = "7751 SolutionEngine",
173 .mv_setup = sh7751se_setup,
174 .mv_nr_irqs = 72,
175
176 .mv_inb = sh7751se_inb,
177 .mv_inw = sh7751se_inw,
178 .mv_inl = sh7751se_inl,
179 .mv_outb = sh7751se_outb,
180 .mv_outw = sh7751se_outw,
181 .mv_outl = sh7751se_outl,
182
183 .mv_inb_p = sh7751se_inb_p,
184 .mv_inw_p = sh7751se_inw,
185 .mv_inl_p = sh7751se_inl,
186 .mv_outb_p = sh7751se_outb_p,
187 .mv_outw_p = sh7751se_outw,
188 .mv_outl_p = sh7751se_outl,
189
190 .mv_insl = sh7751se_insl,
191 .mv_outsl = sh7751se_outsl,
192
193 .mv_init_irq = init_7751se_IRQ,
194#ifdef CONFIG_HEARTBEAT
195 .mv_heartbeat = heartbeat_7751se,
196#endif
197};
198ALIAS_MV(7751se)
diff --git a/arch/sh/boards/sh03/rtc.c b/arch/sh/boards/sh03/rtc.c
index d609863cfe53..0a9266bb51c5 100644
--- a/arch/sh/boards/sh03/rtc.c
+++ b/arch/sh/boards/sh03/rtc.c
@@ -10,9 +10,10 @@
10#include <linux/sched.h> 10#include <linux/sched.h>
11#include <linux/time.h> 11#include <linux/time.h>
12#include <linux/bcd.h> 12#include <linux/bcd.h>
13#include <asm/io.h>
14#include <linux/rtc.h> 13#include <linux/rtc.h>
15#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <asm/io.h>
16#include <asm/rtc.h>
16 17
17#define RTC_BASE 0xb0000000 18#define RTC_BASE 0xb0000000
18#define RTC_SEC1 (RTC_BASE + 0) 19#define RTC_SEC1 (RTC_BASE + 0)
@@ -34,8 +35,6 @@
34#define RTC_BUSY 1 35#define RTC_BUSY 1
35#define RTC_STOP 2 36#define RTC_STOP 2
36 37
37extern void (*rtc_get_time)(struct timespec *);
38extern int (*rtc_set_time)(const time_t);
39extern spinlock_t rtc_lock; 38extern spinlock_t rtc_lock;
40 39
41unsigned long get_cmos_time(void) 40unsigned long get_cmos_time(void)
@@ -128,6 +127,6 @@ int sh03_rtc_settimeofday(const time_t secs)
128 127
129void sh03_time_init(void) 128void sh03_time_init(void)
130{ 129{
131 rtc_get_time = sh03_rtc_gettimeofday; 130 rtc_sh_get_time = sh03_rtc_gettimeofday;
132 rtc_set_time = sh03_rtc_settimeofday; 131 rtc_sh_set_time = sh03_rtc_settimeofday;
133} 132}
diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c
index 60290f8f289c..6c310587ddfe 100644
--- a/arch/sh/boards/sh03/setup.c
+++ b/arch/sh/boards/sh03/setup.c
@@ -7,22 +7,13 @@
7 7
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/irq.h> 9#include <linux/irq.h>
10#include <linux/hdreg.h>
11#include <linux/ide.h>
12#include <asm/io.h> 10#include <asm/io.h>
11#include <asm/rtc.h>
13#include <asm/sh03/io.h> 12#include <asm/sh03/io.h>
14#include <asm/sh03/sh03.h> 13#include <asm/sh03/sh03.h>
15#include <asm/addrspace.h> 14#include <asm/addrspace.h>
16#include "../../drivers/pci/pci-sh7751.h"
17 15
18extern void (*board_time_init)(void); 16static void __init init_sh03_IRQ(void)
19
20const char *get_system_type(void)
21{
22 return "Interface CTP/PCI-SH03)";
23}
24
25void init_sh03_IRQ(void)
26{ 17{
27 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 18 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
28 19
@@ -34,38 +25,34 @@ void init_sh03_IRQ(void)
34 25
35extern void *cf_io_base; 26extern void *cf_io_base;
36 27
37unsigned long sh03_isa_port2addr(unsigned long port) 28static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size)
38{ 29{
39 if (PXSEG(port)) 30 if (PXSEG(port))
40 return port; 31 return (void __iomem *)port;
41 /* CompactFlash (IDE) */ 32 /* CompactFlash (IDE) */
42 if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6)) { 33 if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6))
43 return (unsigned long)cf_io_base + port; 34 return (void __iomem *)((unsigned long)cf_io_base + port);
44 } 35
45 return port + SH7751_PCI_IO_BASE; 36 return (void __iomem *)(port + PCI_IO_BASE);
46} 37}
47 38
48/* 39/* arch/sh/boards/sh03/rtc.c */
49 * The Machine Vector 40void sh03_time_init(void);
50 */ 41
42static void __init sh03_setup(char **cmdline_p)
43{
44 board_time_init = sh03_time_init;
45}
51 46
52struct sh_machine_vector mv_sh03 __initmv = { 47struct sh_machine_vector mv_sh03 __initmv = {
48 .mv_name = "Interface (CTP/PCI-SH03)",
49 .mv_setup = sh03_setup,
53 .mv_nr_irqs = 48, 50 .mv_nr_irqs = 48,
54 .mv_isa_port2addr = sh03_isa_port2addr, 51 .mv_ioport_map = sh03_ioport_map,
55 .mv_init_irq = init_sh03_IRQ, 52 .mv_init_irq = init_sh03_IRQ,
56 53
57#ifdef CONFIG_HEARTBEAT 54#ifdef CONFIG_HEARTBEAT
58 .mv_heartbeat = heartbeat_sh03, 55 .mv_heartbeat = heartbeat_sh03,
59#endif 56#endif
60}; 57};
61
62ALIAS_MV(sh03) 58ALIAS_MV(sh03)
63
64/* arch/sh/boards/sh03/rtc.c */
65void sh03_time_init(void);
66
67int __init platform_setup(void)
68{
69 board_time_init = sh03_time_init;
70 return 0;
71}
diff --git a/arch/sh/boards/sh2000/Makefile b/arch/sh/boards/sh2000/Makefile
deleted file mode 100644
index 05d390c3599c..000000000000
--- a/arch/sh/boards/sh2000/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the SH2000 specific parts of the kernel
3#
4
5obj-y := setup.o
6
diff --git a/arch/sh/boards/sh2000/setup.c b/arch/sh/boards/sh2000/setup.c
deleted file mode 100644
index 2fe6a11765e9..000000000000
--- a/arch/sh/boards/sh2000/setup.c
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * linux/arch/sh/kernel/setup_sh2000.c
3 *
4 * Copyright (C) 2001 SUGIOKA Tochinobu
5 *
6 * SH-2000 Support.
7 *
8 */
9
10#include <linux/init.h>
11#include <linux/irq.h>
12
13#include <asm/io.h>
14#include <asm/machvec.h>
15#include <asm/mach/sh2000.h>
16
17#define CF_CIS_BASE 0xb4200000
18
19#define PORT_PECR 0xa4000108
20#define PORT_PHCR 0xa400010E
21#define PORT_ICR1 0xa4000010
22#define PORT_IRR0 0xa4000004
23
24#define IDE_OFFSET 0xb6200000
25#define NIC_OFFSET 0xb6000000
26#define EXTBUS_OFFSET 0xba000000
27
28
29const char *get_system_type(void)
30{
31 return "sh2000";
32}
33
34static unsigned long sh2000_isa_port2addr(unsigned long offset)
35{
36 if((offset & ~7) == 0x1f0 || offset == 0x3f6)
37 return IDE_OFFSET + offset;
38 else if((offset & ~0x1f) == 0x300)
39 return NIC_OFFSET + offset;
40 return EXTBUS_OFFSET + offset;
41}
42
43/*
44 * The Machine Vector
45 */
46struct sh_machine_vector mv_sh2000 __initmv = {
47 .mv_nr_irqs = 80,
48 .mv_isa_port2addr = sh2000_isa_port2addr,
49};
50ALIAS_MV(sh2000)
51
52/*
53 * Initialize the board
54 */
55int __init platform_setup(void)
56{
57 /* XXX: RTC setting comes here */
58
59 /* These should be done by BIOS/IPL ... */
60 /* Enable nCE2A, nCE2B output */
61 ctrl_outw(ctrl_inw(PORT_PECR) & ~0xf00, PORT_PECR);
62 /* Enable the Compact Flash card, and set the level interrupt */
63 ctrl_outw(0x0042, CF_CIS_BASE+0x0200);
64 /* Enable interrupt */
65 ctrl_outw(ctrl_inw(PORT_PHCR) & ~0x03f3, PORT_PHCR);
66 ctrl_outw(1, PORT_ICR1);
67 ctrl_outw(ctrl_inw(PORT_IRR0) & ~0xff3f, PORT_IRR0);
68 printk(KERN_INFO "SH-2000 Setup...done\n");
69 return 0;
70}
diff --git a/arch/sh/boards/shmin/Makefile b/arch/sh/boards/shmin/Makefile
new file mode 100644
index 000000000000..3190cc72430e
--- /dev/null
+++ b/arch/sh/boards/shmin/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the SHMIN board.
3#
4
5obj-y := setup.o
diff --git a/arch/sh/boards/shmin/setup.c b/arch/sh/boards/shmin/setup.c
new file mode 100644
index 000000000000..2f0c19706cf9
--- /dev/null
+++ b/arch/sh/boards/shmin/setup.c
@@ -0,0 +1,41 @@
1/*
2 * arch/sh/boards/shmin/setup.c
3 *
4 * Copyright (C) 2006 Takashi YOSHII
5 *
6 * SHMIN Support.
7 */
8#include <linux/init.h>
9#include <asm/machvec.h>
10#include <asm/shmin/shmin.h>
11#include <asm/clock.h>
12#include <asm/irq.h>
13#include <asm/io.h>
14
15#define PFC_PHCR 0xa400010e
16
17static void __init init_shmin_irq(void)
18{
19 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
20 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
21}
22
23static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
24{
25 static int dummy;
26
27 if ((port & ~0x1f) == SHMIN_NE_BASE)
28 return (void __iomem *)(SHMIN_IO_BASE + port);
29
30 dummy = 0;
31
32 return &dummy;
33
34}
35
36struct sh_machine_vector mv_shmin __initmv = {
37 .mv_name = "SHMIN",
38 .mv_init_irq = init_shmin_irq,
39 .mv_ioport_map = shmin_ioport_map,
40};
41ALIAS_MV(shmin)
diff --git a/arch/sh/boards/snapgear/io.c b/arch/sh/boards/snapgear/io.c
index e2eb78fc381d..0f4824264557 100644
--- a/arch/sh/boards/snapgear/io.c
+++ b/arch/sh/boards/snapgear/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_7751se.c
3 *
4 * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 2 * Copyright (C) 2002 David McCullough <davidm@snapgear.com>
5 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 3 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
6 * Based largely on io_se.c. 4 * Based largely on io_se.c.
@@ -11,67 +9,22 @@
11 * placeholder code from io_se.c left in with the 9 * placeholder code from io_se.c left in with the
12 * expectation of later SuperIO and PCMCIA access. 10 * expectation of later SuperIO and PCMCIA access.
13 */ 11 */
14
15#include <linux/kernel.h> 12#include <linux/kernel.h>
16#include <linux/types.h> 13#include <linux/types.h>
17#include <linux/pci.h> 14#include <linux/pci.h>
18#include <asm/io.h> 15#include <asm/io.h>
19#include <asm/addrspace.h> 16#include <asm/addrspace.h>
20 17
21#include <asm/pci.h>
22#include "../../drivers/pci/pci-sh7751.h"
23
24#ifdef CONFIG_SH_SECUREEDGE5410 18#ifdef CONFIG_SH_SECUREEDGE5410
25unsigned short secureedge5410_ioport; 19unsigned short secureedge5410_ioport;
26#endif 20#endif
27 21
28/*
29 * The SnapGear uses the built-in PCI controller (PCIC)
30 * of the 7751 processor
31 */
32
33#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
34#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
35#define PCI_IO_AREA SH7751_PCI_IO_BASE
36#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
37
38
39#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
40
41
42#define maybebadio(name,port) \
43 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
44 #name, (port), (__u32) __builtin_return_address(0))
45
46
47static inline void delay(void)
48{
49 ctrl_inw(0xa0000000);
50}
51
52
53static inline volatile __u16 *port2adr(unsigned int port) 22static inline volatile __u16 *port2adr(unsigned int port)
54{ 23{
55#if 0 24 maybebadio((unsigned long)port);
56 if (port >= 0x2000)
57 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
58#endif
59 maybebadio(name,(unsigned long)port);
60 return (volatile __u16*)port; 25 return (volatile __u16*)port;
61} 26}
62 27
63
64/* In case someone configures the kernel w/o PCI support: in that */
65/* scenario, don't ever bother to check for PCI-window addresses */
66
67/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
68#if defined(CONFIG_PCI)
69#define CHECK_SH7751_PCIIO(port) \
70 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
71#else
72#define CHECK_SH7751_PCIIO(port) (0)
73#endif
74
75/* 28/*
76 * General outline: remap really low stuff [eventually] to SuperIO, 29 * General outline: remap really low stuff [eventually] to SuperIO,
77 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 30 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -79,148 +32,106 @@ static inline volatile __u16 *port2adr(unsigned int port)
79 * should be way beyond the window, and is used w/o translation for 32 * should be way beyond the window, and is used w/o translation for
80 * compatibility. 33 * compatibility.
81 */ 34 */
82
83unsigned char snapgear_inb(unsigned long port) 35unsigned char snapgear_inb(unsigned long port)
84{ 36{
85 if (PXSEG(port)) 37 if (PXSEG(port))
86 return *(volatile unsigned char *)port; 38 return *(volatile unsigned char *)port;
87 else if (CHECK_SH7751_PCIIO(port)) 39 else if (is_pci_ioaddr(port))
88 return *(volatile unsigned char *)PCI_IOMAP(port); 40 return *(volatile unsigned char *)pci_ioaddr(port);
89 else 41 else
90 return (*port2adr(port))&0xff; 42 return (*port2adr(port)) & 0xff;
91} 43}
92 44
93
94unsigned char snapgear_inb_p(unsigned long port) 45unsigned char snapgear_inb_p(unsigned long port)
95{ 46{
96 unsigned char v; 47 unsigned char v;
97 48
98 if (PXSEG(port)) 49 if (PXSEG(port))
99 v = *(volatile unsigned char *)port; 50 v = *(volatile unsigned char *)port;
100 else if (CHECK_SH7751_PCIIO(port)) 51 else if (is_pci_ioaddr(port))
101 v = *(volatile unsigned char *)PCI_IOMAP(port); 52 v = *(volatile unsigned char *)pci_ioaddr(port);
102 else 53 else
103 v = (*port2adr(port))&0xff; 54 v = (*port2adr(port))&0xff;
104 delay(); 55 ctrl_delay();
105 return v; 56 return v;
106} 57}
107 58
108
109unsigned short snapgear_inw(unsigned long port) 59unsigned short snapgear_inw(unsigned long port)
110{ 60{
111 if (PXSEG(port)) 61 if (PXSEG(port))
112 return *(volatile unsigned short *)port; 62 return *(volatile unsigned short *)port;
113 else if (CHECK_SH7751_PCIIO(port)) 63 else if (is_pci_ioaddr(port))
114 return *(volatile unsigned short *)PCI_IOMAP(port); 64 return *(volatile unsigned short *)pci_ioaddr(port);
115 else if (port >= 0x2000) 65 else if (port >= 0x2000)
116 return *port2adr(port); 66 return *port2adr(port);
117 else 67 else
118 maybebadio(inw, port); 68 maybebadio(port);
119 return 0; 69 return 0;
120} 70}
121 71
122
123unsigned int snapgear_inl(unsigned long port) 72unsigned int snapgear_inl(unsigned long port)
124{ 73{
125 if (PXSEG(port)) 74 if (PXSEG(port))
126 return *(volatile unsigned long *)port; 75 return *(volatile unsigned long *)port;
127 else if (CHECK_SH7751_PCIIO(port)) 76 else if (is_pci_ioaddr(port))
128 return *(volatile unsigned int *)PCI_IOMAP(port); 77 return *(volatile unsigned int *)pci_ioaddr(port);
129 else if (port >= 0x2000) 78 else if (port >= 0x2000)
130 return *port2adr(port); 79 return *port2adr(port);
131 else 80 else
132 maybebadio(inl, port); 81 maybebadio(port);
133 return 0; 82 return 0;
134} 83}
135 84
136
137void snapgear_outb(unsigned char value, unsigned long port) 85void snapgear_outb(unsigned char value, unsigned long port)
138{ 86{
139 87
140 if (PXSEG(port)) 88 if (PXSEG(port))
141 *(volatile unsigned char *)port = value; 89 *(volatile unsigned char *)port = value;
142 else if (CHECK_SH7751_PCIIO(port)) 90 else if (is_pci_ioaddr(port))
143 *((unsigned char*)PCI_IOMAP(port)) = value; 91 *((unsigned char*)pci_ioaddr(port)) = value;
144 else 92 else
145 *(port2adr(port)) = value; 93 *(port2adr(port)) = value;
146} 94}
147 95
148
149void snapgear_outb_p(unsigned char value, unsigned long port) 96void snapgear_outb_p(unsigned char value, unsigned long port)
150{ 97{
151 if (PXSEG(port)) 98 if (PXSEG(port))
152 *(volatile unsigned char *)port = value; 99 *(volatile unsigned char *)port = value;
153 else if (CHECK_SH7751_PCIIO(port)) 100 else if (is_pci_ioaddr(port))
154 *((unsigned char*)PCI_IOMAP(port)) = value; 101 *((unsigned char*)pci_ioaddr(port)) = value;
155 else 102 else
156 *(port2adr(port)) = value; 103 *(port2adr(port)) = value;
157 delay(); 104 ctrl_delay();
158} 105}
159 106
160
161void snapgear_outw(unsigned short value, unsigned long port) 107void snapgear_outw(unsigned short value, unsigned long port)
162{ 108{
163 if (PXSEG(port)) 109 if (PXSEG(port))
164 *(volatile unsigned short *)port = value; 110 *(volatile unsigned short *)port = value;
165 else if (CHECK_SH7751_PCIIO(port)) 111 else if (is_pci_ioaddr(port))
166 *((unsigned short *)PCI_IOMAP(port)) = value; 112 *((unsigned short *)pci_ioaddr(port)) = value;
167 else if (port >= 0x2000) 113 else if (port >= 0x2000)
168 *port2adr(port) = value; 114 *port2adr(port) = value;
169 else 115 else
170 maybebadio(outw, port); 116 maybebadio(port);
171} 117}
172 118
173
174void snapgear_outl(unsigned int value, unsigned long port) 119void snapgear_outl(unsigned int value, unsigned long port)
175{ 120{
176 if (PXSEG(port)) 121 if (PXSEG(port))
177 *(volatile unsigned long *)port = value; 122 *(volatile unsigned long *)port = value;
178 else if (CHECK_SH7751_PCIIO(port)) 123 else if (is_pci_ioaddr(port))
179 *((unsigned long*)PCI_IOMAP(port)) = value; 124 *((unsigned long*)pci_ioaddr(port)) = value;
180 else 125 else
181 maybebadio(outl, port); 126 maybebadio(port);
182} 127}
183 128
184void snapgear_insl(unsigned long port, void *addr, unsigned long count) 129void snapgear_insl(unsigned long port, void *addr, unsigned long count)
185{ 130{
186 maybebadio(insl, port); 131 maybebadio(port);
187} 132}
188 133
189void snapgear_outsl(unsigned long port, const void *addr, unsigned long count) 134void snapgear_outsl(unsigned long port, const void *addr, unsigned long count)
190{ 135{
191 maybebadio(outsw, port); 136 maybebadio(port);
192}
193
194/* Map ISA bus address to the real address. Only for PCMCIA. */
195
196
197/* ISA page descriptor. */
198static __u32 sh_isa_memmap[256];
199
200
201#if 0
202static int sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
203{
204 int idx;
205
206 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
207 return -1;
208
209 idx = start >> 12;
210 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
211#if 0
212 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
213 start, length, offset, idx, sh_isa_memmap[idx]);
214#endif
215 return 0;
216}
217#endif
218
219unsigned long snapgear_isa_port2addr(unsigned long offset)
220{
221 int idx;
222
223 idx = (offset >> 12) & 0xff;
224 offset &= 0xfff;
225 return sh_isa_memmap[idx] + offset;
226} 137}
diff --git a/arch/sh/boards/snapgear/rtc.c b/arch/sh/boards/snapgear/rtc.c
index b71e009da35c..1659fdd6695a 100644
--- a/arch/sh/boards/snapgear/rtc.c
+++ b/arch/sh/boards/snapgear/rtc.c
@@ -17,14 +17,9 @@
17#include <linux/time.h> 17#include <linux/time.h>
18#include <linux/rtc.h> 18#include <linux/rtc.h>
19#include <linux/mc146818rtc.h> 19#include <linux/mc146818rtc.h>
20
21#include <asm/io.h> 20#include <asm/io.h>
22#include <asm/rtc.h>
23#include <asm/mc146818rtc.h>
24
25/****************************************************************************/
26 21
27static int use_ds1302 = 0; 22static int use_ds1302;
28 23
29/****************************************************************************/ 24/****************************************************************************/
30/* 25/*
@@ -82,10 +77,6 @@ static unsigned int ds1302_readbyte(unsigned int addr)
82 unsigned int val; 77 unsigned int val;
83 unsigned long flags; 78 unsigned long flags;
84 79
85#if 0
86 printk("SnapGear RTC: ds1302_readbyte(addr=%x)\n", addr);
87#endif
88
89 local_irq_save(flags); 80 local_irq_save(flags);
90 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); 81 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
91 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 82 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
@@ -104,10 +95,6 @@ static void ds1302_writebyte(unsigned int addr, unsigned int val)
104{ 95{
105 unsigned long flags; 96 unsigned long flags;
106 97
107#if 0
108 printk("SnapGear RTC: ds1302_writebyte(addr=%x)\n", addr);
109#endif
110
111 local_irq_save(flags); 98 local_irq_save(flags);
112 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); 99 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
113 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 100 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
@@ -168,11 +155,8 @@ void __init secureedge5410_rtc_init(void)
168 } 155 }
169 156
170 if (use_ds1302) { 157 if (use_ds1302) {
171 rtc_get_time = snapgear_rtc_gettimeofday; 158 rtc_sh_get_time = snapgear_rtc_gettimeofday;
172 rtc_set_time = snapgear_rtc_settimeofday; 159 rtc_sh_set_time = snapgear_rtc_settimeofday;
173 } else {
174 rtc_get_time = sh_rtc_gettimeofday;
175 rtc_set_time = sh_rtc_settimeofday;
176 } 160 }
177 161
178 printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal"); 162 printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal");
@@ -187,10 +171,8 @@ void snapgear_rtc_gettimeofday(struct timespec *ts)
187{ 171{
188 unsigned int sec, min, hr, day, mon, yr; 172 unsigned int sec, min, hr, day, mon, yr;
189 173
190 if (!use_ds1302) { 174 if (!use_ds1302)
191 sh_rtc_gettimeofday(ts);
192 return; 175 return;
193 }
194 176
195 sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC)); 177 sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC));
196 min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN)); 178 min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
@@ -231,7 +213,7 @@ int snapgear_rtc_settimeofday(const time_t secs)
231 unsigned long nowtime; 213 unsigned long nowtime;
232 214
233 if (!use_ds1302) 215 if (!use_ds1302)
234 return sh_rtc_settimeofday(secs); 216 return 0;
235 217
236/* 218/*
237 * This is called direct from the kernel timer handling code. 219 * This is called direct from the kernel timer handling code.
@@ -240,10 +222,6 @@ int snapgear_rtc_settimeofday(const time_t secs)
240 222
241 nowtime = secs; 223 nowtime = secs;
242 224
243#if 1
244 printk("SnapGear RTC: snapgear_rtc_settimeofday(nowtime=%ld)\n", nowtime);
245#endif
246
247 /* STOP RTC */ 225 /* STOP RTC */
248 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); 226 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
249 227
@@ -329,5 +307,3 @@ void secureedge5410_cmos_write(unsigned char val, int addr)
329 default: break; 307 default: break;
330 } 308 }
331} 309}
332
333/****************************************************************************/
diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c
index f1f7c70c9402..f5e98c56b530 100644
--- a/arch/sh/boards/snapgear/setup.c
+++ b/arch/sh/boards/snapgear/setup.c
@@ -1,5 +1,4 @@
1/****************************************************************************/ 1/*
2/*
3 * linux/arch/sh/boards/snapgear/setup.c 2 * linux/arch/sh/boards/snapgear/setup.c
4 * 3 *
5 * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 4 * Copyright (C) 2002 David McCullough <davidm@snapgear.com>
@@ -12,8 +11,6 @@
12 * Modified for 7751 Solution Engine by 11 * Modified for 7751 Solution Engine by
13 * Ian da Silva and Jeremy Siegel, 2001. 12 * Ian da Silva and Jeremy Siegel, 2001.
14 */ 13 */
15/****************************************************************************/
16
17#include <linux/init.h> 14#include <linux/init.h>
18#include <linux/irq.h> 15#include <linux/irq.h>
19#include <linux/interrupt.h> 16#include <linux/interrupt.h>
@@ -21,14 +18,13 @@
21#include <linux/delay.h> 18#include <linux/delay.h>
22#include <linux/module.h> 19#include <linux/module.h>
23#include <linux/sched.h> 20#include <linux/sched.h>
24
25#include <asm/machvec.h> 21#include <asm/machvec.h>
26#include <asm/mach/io.h> 22#include <asm/snapgear.h>
27#include <asm/irq.h> 23#include <asm/irq.h>
28#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/rtc.h>
29#include <asm/cpu/timer.h> 26#include <asm/cpu/timer.h>
30 27
31extern void (*board_time_init)(void);
32extern void secureedge5410_rtc_init(void); 28extern void secureedge5410_rtc_init(void);
33extern void pcibios_init(void); 29extern void pcibios_init(void);
34 30
@@ -85,101 +81,20 @@ static void __init init_snapgear_IRQ(void)
85 make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); 81 make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
86} 82}
87 83
88/****************************************************************************/
89/*
90 * Fast poll interrupt simulator.
91 */
92
93/* 84/*
94 * Leave all of the fast timer/fast poll stuff commented out for now, since 85 * Initialize the board
95 * it's not clear whether it actually works or not. Since it wasn't being used
96 * at all in 2.4, we'll assume it's not sane for 2.6 either.. -- PFM
97 */
98#if 0
99#define FAST_POLL 1000
100//#define FAST_POLL_INTR
101
102#define FASTTIMER_IRQ 17
103#define FASTTIMER_IPR_ADDR INTC_IPRA
104#define FASTTIMER_IPR_POS 2
105#define FASTTIMER_PRIORITY 3
106
107#ifdef FAST_POLL_INTR
108#define TMU1_TCR_INIT 0x0020
109#else
110#define TMU1_TCR_INIT 0
111#endif
112#define TMU_TSTR_INIT 1
113#define TMU1_TCR_CALIB 0x0000
114
115
116#ifdef FAST_POLL_INTR
117static void fast_timer_irq(int irq, void *dev_instance, struct pt_regs *regs)
118{
119 unsigned long timer_status;
120 timer_status = ctrl_inw(TMU1_TCR);
121 timer_status &= ~0x100;
122 ctrl_outw(timer_status, TMU1_TCR);
123}
124#endif
125
126/*
127 * return the current ticks on the fast timer
128 */
129
130unsigned long fast_timer_count(void)
131{
132 return(ctrl_inl(TMU1_TCNT));
133}
134
135/*
136 * setup a fast timer for profiling etc etc
137 */ 86 */
138 87static void __init snapgear_setup(char **cmdline_p)
139static void setup_fast_timer()
140{
141 unsigned long interval;
142
143#ifdef FAST_POLL_INTR
144 interval = (current_cpu_data.module_clock/4 + FAST_POLL/2) / FAST_POLL;
145
146 make_ipr_irq(FASTTIMER_IRQ, FASTTIMER_IPR_ADDR, FASTTIMER_IPR_POS,
147 FASTTIMER_PRIORITY);
148
149 printk("SnapGear: %dHz fast timer on IRQ %d\n",FAST_POLL,FASTTIMER_IRQ);
150
151 if (request_irq(FASTTIMER_IRQ, fast_timer_irq, 0, "SnapGear fast timer",
152 NULL) != 0)
153 printk("%s(%d): request_irq() failed?\n", __FILE__, __LINE__);
154#else
155 printk("SnapGear: fast timer running\n",FAST_POLL,FASTTIMER_IRQ);
156 interval = 0xffffffff;
157#endif
158
159 ctrl_outb(ctrl_inb(TMU_TSTR) & ~0x2, TMU_TSTR); /* disable timer 1 */
160 ctrl_outw(TMU1_TCR_INIT, TMU1_TCR);
161 ctrl_outl(interval, TMU1_TCOR);
162 ctrl_outl(interval, TMU1_TCNT);
163 ctrl_outb(ctrl_inb(TMU_TSTR) | 0x2, TMU_TSTR); /* enable timer 1 */
164
165 printk("Timer count 1 = 0x%x\n", fast_timer_count());
166 udelay(1000);
167 printk("Timer count 2 = 0x%x\n", fast_timer_count());
168}
169#endif
170
171/****************************************************************************/
172
173const char *get_system_type(void)
174{ 88{
175 return "SnapGear SecureEdge5410"; 89 board_time_init = secureedge5410_rtc_init;
176} 90}
177 91
178/* 92/*
179 * The Machine Vector 93 * The Machine Vector
180 */ 94 */
181
182struct sh_machine_vector mv_snapgear __initmv = { 95struct sh_machine_vector mv_snapgear __initmv = {
96 .mv_name = "SnapGear SecureEdge5410",
97 .mv_setup = snapgear_setup,
183 .mv_nr_irqs = 72, 98 .mv_nr_irqs = 72,
184 99
185 .mv_inb = snapgear_inb, 100 .mv_inb = snapgear_inb,
@@ -196,20 +111,6 @@ struct sh_machine_vector mv_snapgear __initmv = {
196 .mv_outw_p = snapgear_outw, 111 .mv_outw_p = snapgear_outw,
197 .mv_outl_p = snapgear_outl, 112 .mv_outl_p = snapgear_outl,
198 113
199 .mv_isa_port2addr = snapgear_isa_port2addr,
200
201 .mv_init_irq = init_snapgear_IRQ, 114 .mv_init_irq = init_snapgear_IRQ,
202}; 115};
203ALIAS_MV(snapgear) 116ALIAS_MV(snapgear)
204
205/*
206 * Initialize the board
207 */
208
209int __init platform_setup(void)
210{
211 board_time_init = secureedge5410_rtc_init;
212
213 return 0;
214}
215
diff --git a/arch/sh/boards/superh/microdev/irq.c b/arch/sh/boards/superh/microdev/irq.c
index 236398fbc083..8c64baa30364 100644
--- a/arch/sh/boards/superh/microdev/irq.c
+++ b/arch/sh/boards/superh/microdev/irq.c
@@ -11,14 +11,12 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14
15#include <asm/system.h> 14#include <asm/system.h>
16#include <asm/io.h> 15#include <asm/io.h>
17#include <asm/microdev.h> 16#include <asm/microdev.h>
18 17
19#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */ 18#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */
20 19
21
22static const struct { 20static const struct {
23 unsigned char fpgaIrq; 21 unsigned char fpgaIrq;
24 unsigned char mapped; 22 unsigned char mapped;
@@ -93,53 +91,42 @@ static struct hw_interrupt_type microdev_irq_type = {
93 91
94static void disable_microdev_irq(unsigned int irq) 92static void disable_microdev_irq(unsigned int irq)
95{ 93{
96 unsigned int flags;
97 unsigned int fpgaIrq; 94 unsigned int fpgaIrq;
98 95
99 if (irq >= NUM_EXTERNAL_IRQS) return; 96 if (irq >= NUM_EXTERNAL_IRQS)
100 if (!fpgaIrqTable[irq].mapped) return; 97 return;
98 if (!fpgaIrqTable[irq].mapped)
99 return;
101 100
102 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 101 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
103 102
104 /* disable interrupts */ 103 /* disable interupts on the FPGA INTC register */
105 local_irq_save(flags);
106
107 /* disable interupts on the FPGA INTC register */
108 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); 104 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
109
110 /* restore interrupts */
111 local_irq_restore(flags);
112} 105}
113 106
114static void enable_microdev_irq(unsigned int irq) 107static void enable_microdev_irq(unsigned int irq)
115{ 108{
116 unsigned long priorityReg, priorities, pri; 109 unsigned long priorityReg, priorities, pri;
117 unsigned int flags;
118 unsigned int fpgaIrq; 110 unsigned int fpgaIrq;
119 111
120 112 if (unlikely(irq >= NUM_EXTERNAL_IRQS))
121 if (irq >= NUM_EXTERNAL_IRQS) return; 113 return;
122 if (!fpgaIrqTable[irq].mapped) return; 114 if (unlikely(!fpgaIrqTable[irq].mapped))
115 return;
123 116
124 pri = 15 - irq; 117 pri = 15 - irq;
125 118
126 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 119 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
127 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); 120 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
128 121
129 /* disable interrupts */ 122 /* set priority for the interrupt */
130 local_irq_save(flags);
131
132 /* set priority for the interrupt */
133 priorities = ctrl_inl(priorityReg); 123 priorities = ctrl_inl(priorityReg);
134 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); 124 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
135 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); 125 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
136 ctrl_outl(priorities, priorityReg); 126 ctrl_outl(priorities, priorityReg);
137 127
138 /* enable interupts on the FPGA INTC register */ 128 /* enable interupts on the FPGA INTC register */
139 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 129 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
140
141 /* restore interrupts */
142 local_irq_restore(flags);
143} 130}
144 131
145 /* This functions sets the desired irq handler to be a MicroDev type */ 132 /* This functions sets the desired irq handler to be a MicroDev type */
@@ -158,9 +145,7 @@ static void mask_and_ack_microdev(unsigned int irq)
158static void end_microdev_irq(unsigned int irq) 145static void end_microdev_irq(unsigned int irq)
159{ 146{
160 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 147 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
161 {
162 enable_microdev_irq(irq); 148 enable_microdev_irq(irq);
163 }
164} 149}
165 150
166extern void __init init_microdev_irq(void) 151extern void __init init_microdev_irq(void)
@@ -171,9 +156,7 @@ extern void __init init_microdev_irq(void)
171 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 156 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
172 157
173 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 158 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
174 {
175 make_microdev_irq(i); 159 make_microdev_irq(i);
176 }
177} 160}
178 161
179extern void microdev_print_fpga_intc_status(void) 162extern void microdev_print_fpga_intc_status(void)
diff --git a/arch/sh/boards/superh/microdev/setup.c b/arch/sh/boards/superh/microdev/setup.c
index 61b402a3f5d7..031c814e6e76 100644
--- a/arch/sh/boards/superh/microdev/setup.c
+++ b/arch/sh/boards/superh/microdev/setup.c
@@ -10,7 +10,6 @@
10 * May be copied or modified under the terms of the GNU General Public 10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information. 11 * License. See linux/COPYING for more information.
12 */ 12 */
13
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/platform_device.h> 14#include <linux/platform_device.h>
16#include <linux/ioport.h> 15#include <linux/ioport.h>
@@ -21,41 +20,6 @@
21 20
22extern void microdev_heartbeat(void); 21extern void microdev_heartbeat(void);
23 22
24/*
25 * The Machine Vector
26 */
27
28struct sh_machine_vector mv_sh4202_microdev __initmv = {
29 .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */
30
31 .mv_inb = microdev_inb,
32 .mv_inw = microdev_inw,
33 .mv_inl = microdev_inl,
34 .mv_outb = microdev_outb,
35 .mv_outw = microdev_outw,
36 .mv_outl = microdev_outl,
37
38 .mv_inb_p = microdev_inb_p,
39 .mv_inw_p = microdev_inw_p,
40 .mv_inl_p = microdev_inl_p,
41 .mv_outb_p = microdev_outb_p,
42 .mv_outw_p = microdev_outw_p,
43 .mv_outl_p = microdev_outl_p,
44
45 .mv_insb = microdev_insb,
46 .mv_insw = microdev_insw,
47 .mv_insl = microdev_insl,
48 .mv_outsb = microdev_outsb,
49 .mv_outsw = microdev_outsw,
50 .mv_outsl = microdev_outsl,
51
52 .mv_init_irq = init_microdev_irq,
53
54#ifdef CONFIG_HEARTBEAT
55 .mv_heartbeat = microdev_heartbeat,
56#endif
57};
58ALIAS_MV(sh4202_microdev)
59 23
60/****************************************************************************/ 24/****************************************************************************/
61 25
@@ -113,11 +77,6 @@ ALIAS_MV(sh4202_microdev)
113 /* assume a Keyboard Controller is present */ 77 /* assume a Keyboard Controller is present */
114int microdev_kbd_controller_present = 1; 78int microdev_kbd_controller_present = 1;
115 79
116const char *get_system_type(void)
117{
118 return "SH4-202 MicroDev";
119}
120
121static struct resource smc91x_resources[] = { 80static struct resource smc91x_resources[] = {
122 [0] = { 81 [0] = {
123 .start = 0x300, 82 .start = 0x300,
@@ -291,25 +250,9 @@ static int __init microdev_devices_setup(void)
291 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices)); 250 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
292} 251}
293 252
294__initcall(microdev_devices_setup); 253/*
295 254 * Setup for the SMSC FDC37C93xAPM
296void __init platform_setup(void) 255 */
297{
298 int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
299 const int fpgaRevision = *fpgaRevisionRegister;
300 int * const CacheControlRegister = (int*)CCR;
301
302 printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n",
303 get_system_type(), fpgaRevision, *CacheControlRegister);
304}
305
306
307/****************************************************************************/
308
309
310 /*
311 * Setup for the SMSC FDC37C93xAPM
312 */
313static int __init smsc_superio_setup(void) 256static int __init smsc_superio_setup(void)
314{ 257{
315 258
@@ -412,8 +355,52 @@ static int __init smsc_superio_setup(void)
412 return 0; 355 return 0;
413} 356}
414 357
358static void __init microdev_setup(char **cmdline_p)
359{
360 int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
361 const int fpgaRevision = *fpgaRevisionRegister;
362 int * const CacheControlRegister = (int*)CCR;
363
364 device_initcall(microdev_devices_setup);
365 device_initcall(smsc_superio_setup);
415 366
416/* This is grotty, but, because kernel is always referenced on the link line 367 printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n",
417 * before any devices, this is safe. 368 get_system_type(), fpgaRevision, *CacheControlRegister);
369}
370
371/*
372 * The Machine Vector
418 */ 373 */
419__initcall(smsc_superio_setup); 374struct sh_machine_vector mv_sh4202_microdev __initmv = {
375 .mv_name = "SH4-202 MicroDev",
376 .mv_setup = microdev_setup,
377 .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */
378
379 .mv_inb = microdev_inb,
380 .mv_inw = microdev_inw,
381 .mv_inl = microdev_inl,
382 .mv_outb = microdev_outb,
383 .mv_outw = microdev_outw,
384 .mv_outl = microdev_outl,
385
386 .mv_inb_p = microdev_inb_p,
387 .mv_inw_p = microdev_inw_p,
388 .mv_inl_p = microdev_inl_p,
389 .mv_outb_p = microdev_outb_p,
390 .mv_outw_p = microdev_outw_p,
391 .mv_outl_p = microdev_outl_p,
392
393 .mv_insb = microdev_insb,
394 .mv_insw = microdev_insw,
395 .mv_insl = microdev_insl,
396 .mv_outsb = microdev_outsb,
397 .mv_outsw = microdev_outsw,
398 .mv_outsl = microdev_outsl,
399
400 .mv_init_irq = init_microdev_irq,
401
402#ifdef CONFIG_HEARTBEAT
403 .mv_heartbeat = microdev_heartbeat,
404#endif
405};
406ALIAS_MV(sh4202_microdev)
diff --git a/arch/sh/boards/titan/Makefile b/arch/sh/boards/titan/Makefile
new file mode 100644
index 000000000000..08d753700062
--- /dev/null
+++ b/arch/sh/boards/titan/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Nimble Microsystems TITAN specific parts of the kernel
3#
4
5obj-y := setup.o io.o
diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c
new file mode 100644
index 000000000000..4730c1dd697d
--- /dev/null
+++ b/arch/sh/boards/titan/io.c
@@ -0,0 +1,126 @@
1/*
2 * I/O routines for Titan
3 */
4#include <linux/pci.h>
5#include <asm/machvec.h>
6#include <asm/addrspace.h>
7#include <asm/titan.h>
8#include <asm/io.h>
9
10static inline unsigned int port2adr(unsigned int port)
11{
12 maybebadio((unsigned long)port);
13 return port;
14}
15
16u8 titan_inb(unsigned long port)
17{
18 if (PXSEG(port))
19 return ctrl_inb(port);
20 else if (is_pci_ioaddr(port))
21 return ctrl_inb(pci_ioaddr(port));
22 return ctrl_inw(port2adr(port)) & 0xff;
23}
24
25u8 titan_inb_p(unsigned long port)
26{
27 u8 v;
28
29 if (PXSEG(port))
30 v = ctrl_inb(port);
31 else if (is_pci_ioaddr(port))
32 v = ctrl_inb(pci_ioaddr(port));
33 else
34 v = ctrl_inw(port2adr(port)) & 0xff;
35 ctrl_delay();
36 return v;
37}
38
39u16 titan_inw(unsigned long port)
40{
41 if (PXSEG(port))
42 return ctrl_inw(port);
43 else if (is_pci_ioaddr(port))
44 return ctrl_inw(pci_ioaddr(port));
45 else if (port >= 0x2000)
46 return ctrl_inw(port2adr(port));
47 else
48 maybebadio(port);
49 return 0;
50}
51
52u32 titan_inl(unsigned long port)
53{
54 if (PXSEG(port))
55 return ctrl_inl(port);
56 else if (is_pci_ioaddr(port))
57 return ctrl_inl(pci_ioaddr(port));
58 else if (port >= 0x2000)
59 return ctrl_inw(port2adr(port));
60 else
61 maybebadio(port);
62 return 0;
63}
64
65void titan_outb(u8 value, unsigned long port)
66{
67 if (PXSEG(port))
68 ctrl_outb(value, port);
69 else if (is_pci_ioaddr(port))
70 ctrl_outb(value, pci_ioaddr(port));
71 else
72 ctrl_outw(value, port2adr(port));
73}
74
75void titan_outb_p(u8 value, unsigned long port)
76{
77 if (PXSEG(port))
78 ctrl_outb(value, port);
79 else if (is_pci_ioaddr(port))
80 ctrl_outb(value, pci_ioaddr(port));
81 else
82 ctrl_outw(value, port2adr(port));
83 ctrl_delay();
84}
85
86void titan_outw(u16 value, unsigned long port)
87{
88 if (PXSEG(port))
89 ctrl_outw(value, port);
90 else if (is_pci_ioaddr(port))
91 ctrl_outw(value, pci_ioaddr(port));
92 else if (port >= 0x2000)
93 ctrl_outw(value, port2adr(port));
94 else
95 maybebadio(port);
96}
97
98void titan_outl(u32 value, unsigned long port)
99{
100 if (PXSEG(port))
101 ctrl_outl(value, port);
102 else if (is_pci_ioaddr(port))
103 ctrl_outl(value, pci_ioaddr(port));
104 else
105 maybebadio(port);
106}
107
108void titan_insl(unsigned long port, void *dst, unsigned long count)
109{
110 maybebadio(port);
111}
112
113void titan_outsl(unsigned long port, const void *src, unsigned long count)
114{
115 maybebadio(port);
116}
117
118void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
119{
120 if (PXSEG(port) || is_pci_memaddr(port))
121 return (void __iomem *)port;
122 else if (is_pci_ioaddr(port))
123 return (void __iomem *)pci_ioaddr(port);
124
125 return (void __iomem *)port2adr(port);
126}
diff --git a/arch/sh/boards/titan/setup.c b/arch/sh/boards/titan/setup.c
new file mode 100644
index 000000000000..52b66d8b8d2a
--- /dev/null
+++ b/arch/sh/boards/titan/setup.c
@@ -0,0 +1,48 @@
1/*
2 * Setup for Titan
3 */
4
5#include <linux/init.h>
6#include <asm/irq.h>
7#include <asm/titan.h>
8#include <asm/io.h>
9
10extern void __init pcibios_init_platform(void);
11
12static void __init init_titan_irq(void)
13{
14 /* enable individual interrupt mode for externals */
15 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
16
17 make_ipr_irq( TITAN_IRQ_WAN, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY); /* PCIRQ0 */
18 make_ipr_irq( TITAN_IRQ_LAN, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY); /* PCIRQ1 */
19 make_ipr_irq( TITAN_IRQ_MPCIA, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY); /* PCIRQ2 */
20 make_ipr_irq( TITAN_IRQ_USB, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); /* PCIRQ3 */
21}
22
23struct sh_machine_vector mv_titan __initmv = {
24 .mv_name = "Titan",
25
26 .mv_inb = titan_inb,
27 .mv_inw = titan_inw,
28 .mv_inl = titan_inl,
29 .mv_outb = titan_outb,
30 .mv_outw = titan_outw,
31 .mv_outl = titan_outl,
32
33 .mv_inb_p = titan_inb_p,
34 .mv_inw_p = titan_inw,
35 .mv_inl_p = titan_inl,
36 .mv_outb_p = titan_outb_p,
37 .mv_outw_p = titan_outw,
38 .mv_outl_p = titan_outl,
39
40 .mv_insl = titan_insl,
41 .mv_outsl = titan_outsl,
42
43 .mv_ioport_map = titan_ioport_map,
44
45 .mv_init_irq = init_titan_irq,
46 .mv_init_pci = pcibios_init_platform,
47};
48ALIAS_MV(titan)
diff --git a/arch/sh/boards/unknown/setup.c b/arch/sh/boards/unknown/setup.c
index c5e4ed10876b..1c941370a2e3 100644
--- a/arch/sh/boards/unknown/setup.c
+++ b/arch/sh/boards/unknown/setup.c
@@ -14,19 +14,8 @@
14 */ 14 */
15#include <linux/init.h> 15#include <linux/init.h>
16#include <asm/machvec.h> 16#include <asm/machvec.h>
17#include <asm/irq.h>
18 17
19struct sh_machine_vector mv_unknown __initmv = { 18struct sh_machine_vector mv_unknown __initmv = {
20 .mv_nr_irqs = NR_IRQS, 19 .mv_name = "Unknown",
21}; 20};
22ALIAS_MV(unknown) 21ALIAS_MV(unknown)
23
24const char *get_system_type(void)
25{
26 return "Unknown";
27}
28
29void __init platform_setup(void)
30{
31}
32
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index 75a6876bf6c6..e5f443790079 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -18,13 +18,20 @@ endif
18# Assign dummy values if these 2 variables are not defined, 18# Assign dummy values if these 2 variables are not defined,
19# in order to suppress error message. 19# in order to suppress error message.
20# 20#
21CONFIG_PAGE_OFFSET ?= 0x80000000
21CONFIG_MEMORY_START ?= 0x0c000000 22CONFIG_MEMORY_START ?= 0x0c000000
22CONFIG_BOOT_LINK_OFFSET ?= 0x00800000 23CONFIG_BOOT_LINK_OFFSET ?= 0x00800000
23IMAGE_OFFSET := $(shell printf "0x%8x" $$[0x80000000+$(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET)]) 24
25IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_PAGE_OFFSET) + \
26 $(CONFIG_MEMORY_START) + \
27 $(CONFIG_BOOT_LINK_OFFSET)])
28
29LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
24 30
25LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds 31LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds
26 32
27$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE 33
34$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
28 $(call if_changed,ld) 35 $(call if_changed,ld)
29 @: 36 @:
30 37
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig
index 155d139884c3..0582ca8346b6 100644
--- a/arch/sh/cchips/Kconfig
+++ b/arch/sh/cchips/Kconfig
@@ -65,6 +65,11 @@ config HD64461_IRQ
65 65
66 Do not change this unless you know what you are doing. 66 Do not change this unless you know what you are doing.
67 67
68config HD64461_IOBASE
69 hex "HD64461 start address"
70 depends on HD64461
71 default "0xb0000000"
72
68config HD64461_ENABLER 73config HD64461_ENABLER
69 bool "HD64461 PCMCIA enabler" 74 bool "HD64461 PCMCIA enabler"
70 depends on HD64461 75 depends on HD64461
@@ -73,7 +78,6 @@ config HD64461_ENABLER
73 via the HD64461 companion chip. 78 via the HD64461 companion chip.
74 Otherwise, say N. 79 Otherwise, say N.
75 80
76
77config HD64465_IOBASE 81config HD64465_IOBASE
78 hex "HD64465 start address" 82 hex "HD64465 start address"
79 depends on HD64465 83 depends on HD64465
diff --git a/arch/sh/cchips/hd6446x/hd64461/io.c b/arch/sh/cchips/hd6446x/hd64461/io.c
index ac3062671db7..7909a1b7b512 100644
--- a/arch/sh/cchips/hd6446x/hd64461/io.c
+++ b/arch/sh/cchips/hd6446x/hd64461/io.c
@@ -1,11 +1,10 @@
1/* 1/*
2 * $Id: io.c,v 1.6 2004/03/16 00:07:50 lethal Exp $
3 * Copyright (C) 2000 YAEGASHI Takeshi 2 * Copyright (C) 2000 YAEGASHI Takeshi
4 * Typical I/O routines for HD64461 system. 3 * Typical I/O routines for HD64461 system.
5 */ 4 */
6 5
7#include <asm/io.h> 6#include <asm/io.h>
8#include <asm/hd64461/hd64461.h> 7#include <asm/hd64461.h>
9 8
10#define MEM_BASE (CONFIG_HD64461_IOBASE - HD64461_STBCR) 9#define MEM_BASE (CONFIG_HD64461_IOBASE - HD64461_STBCR)
11 10
@@ -54,11 +53,6 @@ static __inline__ unsigned long PORT2ADDR(unsigned long port)
54 return 0xa0000000 + (port & 0x1fffffff); 53 return 0xa0000000 + (port & 0x1fffffff);
55} 54}
56 55
57static inline void delay(void)
58{
59 ctrl_inw(0xa0000000);
60}
61
62unsigned char hd64461_inb(unsigned long port) 56unsigned char hd64461_inb(unsigned long port)
63{ 57{
64 return *(volatile unsigned char*)PORT2ADDR(port); 58 return *(volatile unsigned char*)PORT2ADDR(port);
@@ -67,7 +61,7 @@ unsigned char hd64461_inb(unsigned long port)
67unsigned char hd64461_inb_p(unsigned long port) 61unsigned char hd64461_inb_p(unsigned long port)
68{ 62{
69 unsigned long v = *(volatile unsigned char*)PORT2ADDR(port); 63 unsigned long v = *(volatile unsigned char*)PORT2ADDR(port);
70 delay(); 64 ctrl_delay();
71 return v; 65 return v;
72} 66}
73 67
@@ -89,7 +83,7 @@ void hd64461_outb(unsigned char b, unsigned long port)
89void hd64461_outb_p(unsigned char b, unsigned long port) 83void hd64461_outb_p(unsigned char b, unsigned long port)
90{ 84{
91 *(volatile unsigned char*)PORT2ADDR(port) = b; 85 *(volatile unsigned char*)PORT2ADDR(port) = b;
92 delay(); 86 ctrl_delay();
93} 87}
94 88
95void hd64461_outw(unsigned short b, unsigned long port) 89void hd64461_outw(unsigned short b, unsigned long port)
@@ -144,13 +138,13 @@ void hd64461_outsl(unsigned long port, const void *buffer, unsigned long count)
144 while(count--) *addr=*buf++; 138 while(count--) *addr=*buf++;
145} 139}
146 140
147unsigned short hd64461_readw(unsigned long addr) 141unsigned short hd64461_readw(void __iomem *addr)
148{ 142{
149 return *(volatile unsigned short*)(MEM_BASE+addr); 143 return ctrl_inw(MEM_BASE+(unsigned long __force)addr);
150} 144}
151 145
152void hd64461_writew(unsigned short b, unsigned long addr) 146void hd64461_writew(unsigned short b, void __iomem *addr)
153{ 147{
154 *(volatile unsigned short*)(MEM_BASE+addr) = b; 148 ctrl_outw(b, MEM_BASE+(unsigned long __force)addr);
155} 149}
156 150
diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c
index ad126016720f..38f1e8171a3a 100644
--- a/arch/sh/cchips/hd6446x/hd64461/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64461/setup.c
@@ -11,36 +11,28 @@
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14
15#include <asm/io.h> 14#include <asm/io.h>
16#include <asm/irq.h> 15#include <asm/irq.h>
17 16#include <asm/hd64461.h>
18#include <asm/hd64461/hd64461.h>
19 17
20static void disable_hd64461_irq(unsigned int irq) 18static void disable_hd64461_irq(unsigned int irq)
21{ 19{
22 unsigned long flags;
23 unsigned short nimr; 20 unsigned short nimr;
24 unsigned short mask = 1 << (irq - HD64461_IRQBASE); 21 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
25 22
26 local_irq_save(flags);
27 nimr = inw(HD64461_NIMR); 23 nimr = inw(HD64461_NIMR);
28 nimr |= mask; 24 nimr |= mask;
29 outw(nimr, HD64461_NIMR); 25 outw(nimr, HD64461_NIMR);
30 local_irq_restore(flags);
31} 26}
32 27
33static void enable_hd64461_irq(unsigned int irq) 28static void enable_hd64461_irq(unsigned int irq)
34{ 29{
35 unsigned long flags;
36 unsigned short nimr; 30 unsigned short nimr;
37 unsigned short mask = 1 << (irq - HD64461_IRQBASE); 31 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
38 32
39 local_irq_save(flags);
40 nimr = inw(HD64461_NIMR); 33 nimr = inw(HD64461_NIMR);
41 nimr &= ~mask; 34 nimr &= ~mask;
42 outw(nimr, HD64461_NIMR); 35 outw(nimr, HD64461_NIMR);
43 local_irq_restore(flags);
44} 36}
45 37
46static void mask_and_ack_hd64461(unsigned int irq) 38static void mask_and_ack_hd64461(unsigned int irq)
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c
index d2b2851bc44b..30573d3e1966 100644
--- a/arch/sh/cchips/hd6446x/hd64465/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64465/setup.c
@@ -25,31 +25,25 @@
25 25
26static void disable_hd64465_irq(unsigned int irq) 26static void disable_hd64465_irq(unsigned int irq)
27{ 27{
28 unsigned long flags;
29 unsigned short nimr; 28 unsigned short nimr;
30 unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); 29 unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
31 30
32 pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask); 31 pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
33 local_irq_save(flags);
34 nimr = inw(HD64465_REG_NIMR); 32 nimr = inw(HD64465_REG_NIMR);
35 nimr |= mask; 33 nimr |= mask;
36 outw(nimr, HD64465_REG_NIMR); 34 outw(nimr, HD64465_REG_NIMR);
37 local_irq_restore(flags);
38} 35}
39 36
40 37
41static void enable_hd64465_irq(unsigned int irq) 38static void enable_hd64465_irq(unsigned int irq)
42{ 39{
43 unsigned long flags;
44 unsigned short nimr; 40 unsigned short nimr;
45 unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); 41 unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
46 42
47 pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask); 43 pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
48 local_irq_save(flags);
49 nimr = inw(HD64465_REG_NIMR); 44 nimr = inw(HD64465_REG_NIMR);
50 nimr &= ~mask; 45 nimr &= ~mask;
51 outw(nimr, HD64465_REG_NIMR); 46 outw(nimr, HD64465_REG_NIMR);
52 local_irq_restore(flags);
53} 47}
54 48
55 49
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
index 0dc1fb8f9687..392c8b12ce36 100644
--- a/arch/sh/cchips/voyagergx/irq.c
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -32,37 +32,30 @@
32 32
33#include <asm/io.h> 33#include <asm/io.h>
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <asm/rts7751r2d/rts7751r2d.h> 35#include <asm/voyagergx.h>
36#include <asm/rts7751r2d/voyagergx_reg.h>
37 36
38static void disable_voyagergx_irq(unsigned int irq) 37static void disable_voyagergx_irq(unsigned int irq)
39{ 38{
40 unsigned long flags, val; 39 unsigned long val;
41 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); 40 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
42 41
43 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask); 42 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
44 local_irq_save(flags);
45 val = inl(VOYAGER_INT_MASK); 43 val = inl(VOYAGER_INT_MASK);
46 val &= ~mask; 44 val &= ~mask;
47 outl(val, VOYAGER_INT_MASK); 45 outl(val, VOYAGER_INT_MASK);
48 local_irq_restore(flags);
49} 46}
50 47
51
52static void enable_voyagergx_irq(unsigned int irq) 48static void enable_voyagergx_irq(unsigned int irq)
53{ 49{
54 unsigned long flags, val; 50 unsigned long val;
55 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); 51 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
56 52
57 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask); 53 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
58 local_irq_save(flags);
59 val = inl(VOYAGER_INT_MASK); 54 val = inl(VOYAGER_INT_MASK);
60 val |= mask; 55 val |= mask;
61 outl(val, VOYAGER_INT_MASK); 56 outl(val, VOYAGER_INT_MASK);
62 local_irq_restore(flags);
63} 57}
64 58
65
66static void mask_and_ack_voyagergx(unsigned int irq) 59static void mask_and_ack_voyagergx(unsigned int irq)
67{ 60{
68 disable_voyagergx_irq(irq); 61 disable_voyagergx_irq(irq);
@@ -95,7 +88,8 @@ static struct hw_interrupt_type voyagergx_irq_type = {
95 .end = end_voyagergx_irq, 88 .end = end_voyagergx_irq,
96}; 89};
97 90
98static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *regs) 91static irqreturn_t voyagergx_interrupt(int irq, void *dev_id,
92 struct pt_regs *regs)
99{ 93{
100 printk(KERN_INFO 94 printk(KERN_INFO
101 "VoyagerGX: spurious interrupt, status: 0x%x\n", 95 "VoyagerGX: spurious interrupt, status: 0x%x\n",
@@ -103,9 +97,6 @@ static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *re
103 return IRQ_HANDLED; 97 return IRQ_HANDLED;
104} 98}
105 99
106
107/*====================================================*/
108
109static struct { 100static struct {
110 int (*func)(int, void *); 101 int (*func)(int, void *);
111 void *dev; 102 void *dev;
diff --git a/arch/sh/cchips/voyagergx/setup.c b/arch/sh/cchips/voyagergx/setup.c
index 139ca88ac9e6..66b2fedd7ad9 100644
--- a/arch/sh/cchips/voyagergx/setup.c
+++ b/arch/sh/cchips/voyagergx/setup.c
@@ -13,7 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/rts7751r2d/voyagergx_reg.h> 16#include <asm/voyagergx.h>
17 17
18static int __init setup_voyagergx(void) 18static int __init setup_voyagergx(void)
19{ 19{
diff --git a/arch/sh/configs/landisk_defconfig b/arch/sh/configs/landisk_defconfig
new file mode 100644
index 000000000000..6b43316d03cf
--- /dev/null
+++ b/arch/sh/configs/landisk_defconfig
@@ -0,0 +1,1373 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-sh
4# Sun Sep 11 13:00:46 2005
5#
6CONFIG_SUPERH=y
7CONFIG_UID16=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_HARDIRQS=y
10CONFIG_GENERIC_IRQ_PROBE=y
11CONFIG_GENERIC_CALIBRATE_DELAY=y
12CONFIG_GENERIC_IOMAP=y
13
14#
15# Code maturity level options
16#
17CONFIG_EXPERIMENTAL=y
18CONFIG_CLEAN_COMPILE=y
19CONFIG_BROKEN_ON_SMP=y
20CONFIG_INIT_ENV_ARG_LIMIT=32
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y
27CONFIG_SWAP=y
28CONFIG_SYSVIPC=y
29# CONFIG_POSIX_MQUEUE is not set
30# CONFIG_BSD_PROCESS_ACCT is not set
31CONFIG_SYSCTL=y
32# CONFIG_AUDIT is not set
33CONFIG_HOTPLUG=y
34CONFIG_KOBJECT_UEVENT=y
35# CONFIG_IKCONFIG is not set
36CONFIG_INITRAMFS_SOURCE=""
37# CONFIG_EMBEDDED is not set
38CONFIG_KALLSYMS=y
39CONFIG_KALLSYMS_EXTRA_PASS=y
40CONFIG_PRINTK=y
41CONFIG_BUG=y
42CONFIG_BASE_FULL=y
43CONFIG_FUTEX=y
44CONFIG_EPOLL=y
45CONFIG_SHMEM=y
46CONFIG_CC_ALIGN_FUNCTIONS=0
47CONFIG_CC_ALIGN_LABELS=0
48CONFIG_CC_ALIGN_LOOPS=0
49CONFIG_CC_ALIGN_JUMPS=0
50# CONFIG_TINY_SHMEM is not set
51CONFIG_BASE_SMALL=0
52
53#
54# Loadable module support
55#
56CONFIG_MODULES=y
57CONFIG_MODULE_UNLOAD=y
58CONFIG_MODULE_FORCE_UNLOAD=y
59CONFIG_OBSOLETE_MODPARM=y
60# CONFIG_MODVERSIONS is not set
61# CONFIG_MODULE_SRCVERSION_ALL is not set
62CONFIG_KMOD=y
63
64#
65# System type
66#
67# CONFIG_SH_SOLUTION_ENGINE is not set
68# CONFIG_SH_7751_SOLUTION_ENGINE is not set
69# CONFIG_SH_7300_SOLUTION_ENGINE is not set
70# CONFIG_SH_73180_SOLUTION_ENGINE is not set
71# CONFIG_SH_7751_SYSTEMH is not set
72# CONFIG_SH_STB1_HARP is not set
73# CONFIG_SH_STB1_OVERDRIVE is not set
74# CONFIG_SH_HP6XX is not set
75# CONFIG_SH_CQREEK is not set
76# CONFIG_SH_DMIDA is not set
77# CONFIG_SH_EC3104 is not set
78# CONFIG_SH_SATURN is not set
79# CONFIG_SH_DREAMCAST is not set
80# CONFIG_SH_CAT68701 is not set
81# CONFIG_SH_BIGSUR is not set
82# CONFIG_SH_SH2000 is not set
83# CONFIG_SH_ADX is not set
84# CONFIG_SH_MPC1211 is not set
85# CONFIG_SH_SH03 is not set
86# CONFIG_SH_SECUREEDGE5410 is not set
87# CONFIG_SH_HS7751RVOIP is not set
88# CONFIG_SH_RTS7751R2D is not set
89# CONFIG_SH_EDOSK7705 is not set
90# CONFIG_SH_SH4202_MICRODEV is not set
91CONFIG_SH_LANDISK=y
92# CONFIG_SH_TITAN is not set
93# CONFIG_SH_UNKNOWN is not set
94
95#
96# Processor selection
97#
98CONFIG_CPU_SH4=y
99
100#
101# SH-2 Processor Support
102#
103# CONFIG_CPU_SUBTYPE_SH7604 is not set
104
105#
106# SH-3 Processor Support
107#
108# CONFIG_CPU_SUBTYPE_SH7300 is not set
109# CONFIG_CPU_SUBTYPE_SH7705 is not set
110# CONFIG_CPU_SUBTYPE_SH7707 is not set
111# CONFIG_CPU_SUBTYPE_SH7708 is not set
112# CONFIG_CPU_SUBTYPE_SH7709 is not set
113
114#
115# SH-4 Processor Support
116#
117# CONFIG_CPU_SUBTYPE_SH7750 is not set
118# CONFIG_CPU_SUBTYPE_SH7091 is not set
119# CONFIG_CPU_SUBTYPE_SH7750R is not set
120# CONFIG_CPU_SUBTYPE_SH7750S is not set
121CONFIG_CPU_SUBTYPE_SH7751=y
122CONFIG_CPU_SUBTYPE_SH7751R=y
123# CONFIG_CPU_SUBTYPE_SH7760 is not set
124# CONFIG_CPU_SUBTYPE_SH4_202 is not set
125
126#
127# ST40 Processor Support
128#
129# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
130# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
131
132#
133# SH-4A Processor Support
134#
135# CONFIG_CPU_SUBTYPE_SH73180 is not set
136# CONFIG_CPU_SUBTYPE_SH7770 is not set
137# CONFIG_CPU_SUBTYPE_SH7780 is not set
138
139#
140# Memory management options
141#
142CONFIG_MMU=y
143CONFIG_SELECT_MEMORY_MODEL=y
144CONFIG_FLATMEM_MANUAL=y
145# CONFIG_DISCONTIGMEM_MANUAL is not set
146# CONFIG_SPARSEMEM_MANUAL is not set
147CONFIG_FLATMEM=y
148CONFIG_FLAT_NODE_MEM_MAP=y
149# CONFIG_SPARSEMEM_STATIC is not set
150
151#
152# Cache configuration
153#
154# CONFIG_SH_DIRECT_MAPPED is not set
155# CONFIG_SH_WRITETHROUGH is not set
156# CONFIG_SH_OCRAM is not set
157CONFIG_MEMORY_START=0x0c000000
158CONFIG_MEMORY_SIZE=0x04000000
159
160#
161# Processor features
162#
163CONFIG_CPU_LITTLE_ENDIAN=y
164CONFIG_SH_FPU=y
165# CONFIG_SH_STORE_QUEUES is not set
166
167#
168# Timer support
169#
170CONFIG_SH_TMU=y
171CONFIG_SH_PCLK_FREQ_BOOL=y
172CONFIG_SH_PCLK_FREQ=33333333
173
174#
175# CPU Frequency scaling
176#
177# CONFIG_CPU_FREQ is not set
178
179#
180# DMA support
181#
182CONFIG_SH_DMA=y
183CONFIG_NR_ONCHIP_DMA_CHANNELS=4
184# CONFIG_NR_DMA_CHANNELS_BOOL is not set
185
186#
187# Companion Chips
188#
189# CONFIG_HD6446X_SERIES is not set
190CONFIG_HEARTBEAT=y
191
192#
193# Kernel features
194#
195CONFIG_KEXEC=y
196# CONFIG_PREEMPT is not set
197# CONFIG_SMP is not set
198
199#
200# Boot options
201#
202CONFIG_ZERO_PAGE_OFFSET=0x00001000
203CONFIG_BOOT_LINK_OFFSET=0x00800000
204# CONFIG_UBC_WAKEUP is not set
205# CONFIG_CMDLINE_BOOL is not set
206
207#
208# Bus options
209#
210CONFIG_ISA=y
211CONFIG_PCI=y
212CONFIG_SH_PCIDMA_NONCOHERENT=y
213CONFIG_PCI_AUTO=y
214CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
215CONFIG_PCI_LEGACY_PROC=y
216
217#
218# PCCARD (PCMCIA/CardBus) support
219#
220CONFIG_PCCARD=y
221# CONFIG_PCMCIA_DEBUG is not set
222CONFIG_PCMCIA=y
223CONFIG_PCMCIA_LOAD_CIS=y
224CONFIG_PCMCIA_IOCTL=y
225CONFIG_CARDBUS=y
226
227#
228# PC-card bridges
229#
230CONFIG_YENTA=y
231# CONFIG_PD6729 is not set
232# CONFIG_I82092 is not set
233# CONFIG_I82365 is not set
234# CONFIG_TCIC is not set
235CONFIG_PCMCIA_PROBE=y
236CONFIG_PCCARD_NONSTATIC=y
237
238#
239# PCI Hotplug Support
240#
241# CONFIG_HOTPLUG_PCI is not set
242
243#
244# Executable file formats
245#
246CONFIG_BINFMT_ELF=y
247# CONFIG_BINFMT_FLAT is not set
248# CONFIG_BINFMT_MISC is not set
249
250#
251# Networking
252#
253CONFIG_NET=y
254
255#
256# Networking options
257#
258CONFIG_PACKET=y
259# CONFIG_PACKET_MMAP is not set
260CONFIG_UNIX=y
261# CONFIG_NET_KEY is not set
262CONFIG_INET=y
263# CONFIG_IP_MULTICAST is not set
264CONFIG_IP_ADVANCED_ROUTER=y
265CONFIG_ASK_IP_FIB_HASH=y
266# CONFIG_IP_FIB_TRIE is not set
267CONFIG_IP_FIB_HASH=y
268# CONFIG_IP_MULTIPLE_TABLES is not set
269# CONFIG_IP_ROUTE_MULTIPATH is not set
270# CONFIG_IP_ROUTE_VERBOSE is not set
271CONFIG_IP_PNP=y
272# CONFIG_IP_PNP_DHCP is not set
273# CONFIG_IP_PNP_BOOTP is not set
274# CONFIG_IP_PNP_RARP is not set
275# CONFIG_NET_IPIP is not set
276# CONFIG_NET_IPGRE is not set
277# CONFIG_ARPD is not set
278# CONFIG_SYN_COOKIES is not set
279# CONFIG_INET_AH is not set
280# CONFIG_INET_ESP is not set
281# CONFIG_INET_IPCOMP is not set
282# CONFIG_INET_TUNNEL is not set
283CONFIG_INET_DIAG=y
284CONFIG_INET_TCP_DIAG=y
285# CONFIG_TCP_CONG_ADVANCED is not set
286CONFIG_TCP_CONG_BIC=y
287
288#
289# IP: Virtual Server Configuration
290#
291# CONFIG_IP_VS is not set
292# CONFIG_IPV6 is not set
293CONFIG_NETFILTER=y
294# CONFIG_NETFILTER_DEBUG is not set
295# CONFIG_NETFILTER_NETLINK is not set
296
297#
298# IP: Netfilter Configuration
299#
300CONFIG_IP_NF_CONNTRACK=m
301CONFIG_IP_NF_CT_ACCT=y
302CONFIG_IP_NF_CONNTRACK_MARK=y
303# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
304# CONFIG_IP_NF_CT_PROTO_SCTP is not set
305CONFIG_IP_NF_FTP=m
306CONFIG_IP_NF_IRC=m
307# CONFIG_IP_NF_NETBIOS_NS is not set
308CONFIG_IP_NF_TFTP=m
309CONFIG_IP_NF_AMANDA=m
310# CONFIG_IP_NF_PPTP is not set
311CONFIG_IP_NF_QUEUE=m
312CONFIG_IP_NF_IPTABLES=m
313CONFIG_IP_NF_MATCH_LIMIT=m
314CONFIG_IP_NF_MATCH_IPRANGE=m
315CONFIG_IP_NF_MATCH_MAC=m
316CONFIG_IP_NF_MATCH_PKTTYPE=m
317CONFIG_IP_NF_MATCH_MARK=m
318CONFIG_IP_NF_MATCH_MULTIPORT=m
319CONFIG_IP_NF_MATCH_TOS=m
320CONFIG_IP_NF_MATCH_RECENT=m
321CONFIG_IP_NF_MATCH_ECN=m
322CONFIG_IP_NF_MATCH_DSCP=m
323CONFIG_IP_NF_MATCH_AH_ESP=m
324CONFIG_IP_NF_MATCH_LENGTH=m
325CONFIG_IP_NF_MATCH_TTL=m
326CONFIG_IP_NF_MATCH_TCPMSS=m
327CONFIG_IP_NF_MATCH_HELPER=m
328CONFIG_IP_NF_MATCH_STATE=m
329CONFIG_IP_NF_MATCH_CONNTRACK=m
330CONFIG_IP_NF_MATCH_OWNER=m
331CONFIG_IP_NF_MATCH_ADDRTYPE=m
332CONFIG_IP_NF_MATCH_REALM=m
333CONFIG_IP_NF_MATCH_SCTP=m
334# CONFIG_IP_NF_MATCH_DCCP is not set
335CONFIG_IP_NF_MATCH_COMMENT=m
336CONFIG_IP_NF_MATCH_CONNMARK=m
337# CONFIG_IP_NF_MATCH_CONNBYTES is not set
338CONFIG_IP_NF_MATCH_HASHLIMIT=m
339# CONFIG_IP_NF_MATCH_STRING is not set
340CONFIG_IP_NF_FILTER=m
341CONFIG_IP_NF_TARGET_REJECT=m
342CONFIG_IP_NF_TARGET_LOG=m
343CONFIG_IP_NF_TARGET_ULOG=m
344CONFIG_IP_NF_TARGET_TCPMSS=m
345# CONFIG_IP_NF_TARGET_NFQUEUE is not set
346CONFIG_IP_NF_NAT=m
347CONFIG_IP_NF_NAT_NEEDED=y
348CONFIG_IP_NF_TARGET_MASQUERADE=m
349CONFIG_IP_NF_TARGET_REDIRECT=m
350CONFIG_IP_NF_TARGET_NETMAP=m
351CONFIG_IP_NF_TARGET_SAME=m
352# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
353CONFIG_IP_NF_NAT_IRC=m
354CONFIG_IP_NF_NAT_FTP=m
355CONFIG_IP_NF_NAT_TFTP=m
356CONFIG_IP_NF_NAT_AMANDA=m
357CONFIG_IP_NF_MANGLE=m
358CONFIG_IP_NF_TARGET_TOS=m
359CONFIG_IP_NF_TARGET_ECN=m
360CONFIG_IP_NF_TARGET_DSCP=m
361CONFIG_IP_NF_TARGET_MARK=m
362CONFIG_IP_NF_TARGET_CLASSIFY=m
363# CONFIG_IP_NF_TARGET_TTL is not set
364CONFIG_IP_NF_TARGET_CONNMARK=m
365# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
366CONFIG_IP_NF_RAW=m
367CONFIG_IP_NF_TARGET_NOTRACK=m
368CONFIG_IP_NF_ARPTABLES=m
369CONFIG_IP_NF_ARPFILTER=m
370CONFIG_IP_NF_ARP_MANGLE=m
371
372#
373# DCCP Configuration (EXPERIMENTAL)
374#
375# CONFIG_IP_DCCP is not set
376
377#
378# SCTP Configuration (EXPERIMENTAL)
379#
380# CONFIG_IP_SCTP is not set
381# CONFIG_ATM is not set
382# CONFIG_BRIDGE is not set
383# CONFIG_VLAN_8021Q is not set
384# CONFIG_DECNET is not set
385CONFIG_LLC=m
386# CONFIG_LLC2 is not set
387# CONFIG_IPX is not set
388CONFIG_ATALK=m
389# CONFIG_DEV_APPLETALK is not set
390# CONFIG_X25 is not set
391# CONFIG_LAPB is not set
392# CONFIG_NET_DIVERT is not set
393# CONFIG_ECONET is not set
394# CONFIG_WAN_ROUTER is not set
395# CONFIG_NET_SCHED is not set
396CONFIG_NET_CLS_ROUTE=y
397
398#
399# Network testing
400#
401# CONFIG_NET_PKTGEN is not set
402# CONFIG_HAMRADIO is not set
403# CONFIG_IRDA is not set
404# CONFIG_BT is not set
405# CONFIG_IEEE80211 is not set
406
407#
408# Device Drivers
409#
410
411#
412# Generic Driver Options
413#
414CONFIG_STANDALONE=y
415CONFIG_PREVENT_FIRMWARE_BUILD=y
416CONFIG_FW_LOADER=y
417
418#
419# Connector - unified userspace <-> kernelspace linker
420#
421# CONFIG_CONNECTOR is not set
422
423#
424# Memory Technology Devices (MTD)
425#
426# CONFIG_MTD is not set
427
428#
429# Parallel port support
430#
431# CONFIG_PARPORT is not set
432
433#
434# Plug and Play support
435#
436# CONFIG_PNP is not set
437
438#
439# Block devices
440#
441# CONFIG_BLK_CPQ_DA is not set
442# CONFIG_BLK_CPQ_CISS_DA is not set
443# CONFIG_BLK_DEV_DAC960 is not set
444# CONFIG_BLK_DEV_UMEM is not set
445# CONFIG_BLK_DEV_COW_COMMON is not set
446CONFIG_BLK_DEV_LOOP=y
447# CONFIG_BLK_DEV_CRYPTOLOOP is not set
448# CONFIG_BLK_DEV_NBD is not set
449# CONFIG_BLK_DEV_SX8 is not set
450# CONFIG_BLK_DEV_UB is not set
451CONFIG_BLK_DEV_RAM=y
452CONFIG_BLK_DEV_RAM_COUNT=16
453CONFIG_BLK_DEV_RAM_SIZE=4096
454# CONFIG_BLK_DEV_INITRD is not set
455# CONFIG_LBD is not set
456# CONFIG_CDROM_PKTCDVD is not set
457
458#
459# IO Schedulers
460#
461CONFIG_IOSCHED_NOOP=y
462CONFIG_IOSCHED_AS=y
463CONFIG_IOSCHED_DEADLINE=y
464CONFIG_IOSCHED_CFQ=y
465# CONFIG_ATA_OVER_ETH is not set
466
467#
468# ATA/ATAPI/MFM/RLL support
469#
470CONFIG_IDE=y
471CONFIG_IDE_MAX_HWIFS=4
472CONFIG_BLK_DEV_IDE=y
473
474#
475# Please see Documentation/ide.txt for help/info on IDE drives
476#
477# CONFIG_BLK_DEV_IDE_SATA is not set
478CONFIG_BLK_DEV_IDEDISK=y
479# CONFIG_IDEDISK_MULTI_MODE is not set
480# CONFIG_BLK_DEV_IDECS is not set
481CONFIG_BLK_DEV_IDECD=y
482# CONFIG_BLK_DEV_IDETAPE is not set
483# CONFIG_BLK_DEV_IDEFLOPPY is not set
484CONFIG_BLK_DEV_IDESCSI=y
485# CONFIG_IDE_TASK_IOCTL is not set
486
487#
488# IDE chipset support/bugfixes
489#
490CONFIG_IDE_GENERIC=y
491CONFIG_BLK_DEV_IDEPCI=y
492CONFIG_IDEPCI_SHARE_IRQ=y
493CONFIG_BLK_DEV_OFFBOARD=y
494CONFIG_BLK_DEV_GENERIC=y
495# CONFIG_BLK_DEV_OPTI621 is not set
496CONFIG_BLK_DEV_IDEDMA_PCI=y
497# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
498CONFIG_IDEDMA_PCI_AUTO=y
499CONFIG_IDEDMA_ONLYDISK=y
500CONFIG_BLK_DEV_AEC62XX=y
501# CONFIG_BLK_DEV_ALI15X3 is not set
502# CONFIG_BLK_DEV_AMD74XX is not set
503# CONFIG_BLK_DEV_CMD64X is not set
504# CONFIG_BLK_DEV_TRIFLEX is not set
505# CONFIG_BLK_DEV_CY82C693 is not set
506# CONFIG_BLK_DEV_CS5520 is not set
507# CONFIG_BLK_DEV_CS5530 is not set
508# CONFIG_BLK_DEV_HPT34X is not set
509# CONFIG_BLK_DEV_HPT366 is not set
510# CONFIG_BLK_DEV_SC1200 is not set
511# CONFIG_BLK_DEV_PIIX is not set
512# CONFIG_BLK_DEV_IT821X is not set
513# CONFIG_BLK_DEV_NS87415 is not set
514# CONFIG_BLK_DEV_PDC202XX_OLD is not set
515# CONFIG_BLK_DEV_PDC202XX_NEW is not set
516# CONFIG_BLK_DEV_SVWKS is not set
517# CONFIG_BLK_DEV_SIIMAGE is not set
518# CONFIG_BLK_DEV_SLC90E66 is not set
519# CONFIG_BLK_DEV_TRM290 is not set
520# CONFIG_BLK_DEV_VIA82CXXX is not set
521CONFIG_IDE_SH=y
522# CONFIG_IDE_ARM is not set
523# CONFIG_IDE_CHIPSETS is not set
524CONFIG_BLK_DEV_IDEDMA=y
525# CONFIG_IDEDMA_IVB is not set
526CONFIG_IDEDMA_AUTO=y
527# CONFIG_BLK_DEV_HD is not set
528
529#
530# SCSI device support
531#
532# CONFIG_RAID_ATTRS is not set
533CONFIG_SCSI=y
534CONFIG_SCSI_PROC_FS=y
535
536#
537# SCSI support type (disk, tape, CD-ROM)
538#
539CONFIG_BLK_DEV_SD=y
540# CONFIG_CHR_DEV_ST is not set
541# CONFIG_CHR_DEV_OSST is not set
542# CONFIG_BLK_DEV_SR is not set
543# CONFIG_CHR_DEV_SG is not set
544# CONFIG_CHR_DEV_SCH is not set
545
546#
547# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
548#
549CONFIG_SCSI_MULTI_LUN=y
550# CONFIG_SCSI_CONSTANTS is not set
551# CONFIG_SCSI_LOGGING is not set
552
553#
554# SCSI Transport Attributes
555#
556# CONFIG_SCSI_SPI_ATTRS is not set
557# CONFIG_SCSI_FC_ATTRS is not set
558# CONFIG_SCSI_ISCSI_ATTRS is not set
559# CONFIG_SCSI_SAS_ATTRS is not set
560
561#
562# SCSI low-level drivers
563#
564# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
565# CONFIG_SCSI_3W_9XXX is not set
566# CONFIG_SCSI_ACARD is not set
567# CONFIG_SCSI_AHA152X is not set
568# CONFIG_SCSI_AACRAID is not set
569# CONFIG_SCSI_AIC7XXX is not set
570# CONFIG_SCSI_AIC7XXX_OLD is not set
571# CONFIG_SCSI_AIC79XX is not set
572# CONFIG_SCSI_DPT_I2O is not set
573# CONFIG_SCSI_IN2000 is not set
574# CONFIG_MEGARAID_NEWGEN is not set
575# CONFIG_MEGARAID_LEGACY is not set
576# CONFIG_MEGARAID_SAS is not set
577# CONFIG_SCSI_SATA is not set
578# CONFIG_SCSI_DMX3191D is not set
579# CONFIG_SCSI_DTC3280 is not set
580# CONFIG_SCSI_FUTURE_DOMAIN is not set
581# CONFIG_SCSI_GENERIC_NCR5380 is not set
582# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
583# CONFIG_SCSI_IPS is not set
584# CONFIG_SCSI_INITIO is not set
585# CONFIG_SCSI_INIA100 is not set
586# CONFIG_SCSI_NCR53C406A is not set
587# CONFIG_SCSI_SYM53C8XX_2 is not set
588# CONFIG_SCSI_IPR is not set
589# CONFIG_SCSI_PAS16 is not set
590# CONFIG_SCSI_PSI240I is not set
591# CONFIG_SCSI_QLOGIC_FAS is not set
592# CONFIG_SCSI_QLOGIC_FC is not set
593# CONFIG_SCSI_QLOGIC_1280 is not set
594CONFIG_SCSI_QLA2XXX=y
595# CONFIG_SCSI_QLA21XX is not set
596# CONFIG_SCSI_QLA22XX is not set
597# CONFIG_SCSI_QLA2300 is not set
598# CONFIG_SCSI_QLA2322 is not set
599# CONFIG_SCSI_QLA6312 is not set
600# CONFIG_SCSI_QLA24XX is not set
601# CONFIG_SCSI_LPFC is not set
602# CONFIG_SCSI_SYM53C416 is not set
603# CONFIG_SCSI_DC395x is not set
604# CONFIG_SCSI_DC390T is not set
605# CONFIG_SCSI_T128 is not set
606# CONFIG_SCSI_NSP32 is not set
607# CONFIG_SCSI_DEBUG is not set
608
609#
610# PCMCIA SCSI adapter support
611#
612# CONFIG_PCMCIA_AHA152X is not set
613# CONFIG_PCMCIA_FDOMAIN is not set
614# CONFIG_PCMCIA_NINJA_SCSI is not set
615# CONFIG_PCMCIA_QLOGIC is not set
616# CONFIG_PCMCIA_SYM53C500 is not set
617
618#
619# Old CD-ROM drivers (not SCSI, not IDE)
620#
621# CONFIG_CD_NO_IDESCSI is not set
622
623#
624# Multi-device support (RAID and LVM)
625#
626CONFIG_MD=y
627CONFIG_BLK_DEV_MD=m
628CONFIG_MD_LINEAR=m
629CONFIG_MD_RAID0=m
630CONFIG_MD_RAID1=m
631# CONFIG_MD_RAID10 is not set
632# CONFIG_MD_RAID5 is not set
633# CONFIG_MD_RAID6 is not set
634# CONFIG_MD_MULTIPATH is not set
635# CONFIG_MD_FAULTY is not set
636# CONFIG_BLK_DEV_DM is not set
637
638#
639# Fusion MPT device support
640#
641# CONFIG_FUSION is not set
642# CONFIG_FUSION_SPI is not set
643# CONFIG_FUSION_FC is not set
644# CONFIG_FUSION_SAS is not set
645
646#
647# IEEE 1394 (FireWire) support
648#
649# CONFIG_IEEE1394 is not set
650
651#
652# I2O device support
653#
654# CONFIG_I2O is not set
655
656#
657# Network device support
658#
659CONFIG_NETDEVICES=y
660# CONFIG_DUMMY is not set
661# CONFIG_BONDING is not set
662# CONFIG_EQUALIZER is not set
663CONFIG_TUN=m
664
665#
666# ARCnet devices
667#
668# CONFIG_ARCNET is not set
669
670#
671# PHY device support
672#
673# CONFIG_PHYLIB is not set
674
675#
676# Ethernet (10 or 100Mbit)
677#
678CONFIG_NET_ETHERNET=y
679CONFIG_MII=y
680# CONFIG_STNIC is not set
681# CONFIG_HAPPYMEAL is not set
682# CONFIG_SUNGEM is not set
683# CONFIG_CASSINI is not set
684# CONFIG_NET_VENDOR_3COM is not set
685# CONFIG_NET_VENDOR_SMC is not set
686# CONFIG_SMC91X is not set
687# CONFIG_NET_VENDOR_RACAL is not set
688
689#
690# Tulip family network device support
691#
692# CONFIG_NET_TULIP is not set
693# CONFIG_AT1700 is not set
694# CONFIG_DEPCA is not set
695# CONFIG_HP100 is not set
696# CONFIG_NET_ISA is not set
697# CONFIG_NE2000 is not set
698CONFIG_NET_PCI=y
699# CONFIG_PCNET32 is not set
700# CONFIG_AMD8111_ETH is not set
701# CONFIG_ADAPTEC_STARFIRE is not set
702# CONFIG_AC3200 is not set
703# CONFIG_APRICOT is not set
704# CONFIG_B44 is not set
705# CONFIG_FORCEDETH is not set
706# CONFIG_CS89x0 is not set
707# CONFIG_DGRS is not set
708# CONFIG_EEPRO100 is not set
709# CONFIG_E100 is not set
710# CONFIG_FEALNX is not set
711# CONFIG_NATSEMI is not set
712# CONFIG_NE2K_PCI is not set
713CONFIG_8139CP=y
714# CONFIG_8139TOO is not set
715# CONFIG_SIS900 is not set
716# CONFIG_EPIC100 is not set
717# CONFIG_SUNDANCE is not set
718# CONFIG_TLAN is not set
719# CONFIG_VIA_RHINE is not set
720
721#
722# Ethernet (1000 Mbit)
723#
724# CONFIG_ACENIC is not set
725# CONFIG_DL2K is not set
726# CONFIG_E1000 is not set
727# CONFIG_NS83820 is not set
728# CONFIG_HAMACHI is not set
729# CONFIG_YELLOWFIN is not set
730# CONFIG_R8169 is not set
731# CONFIG_SIS190 is not set
732# CONFIG_SKGE is not set
733# CONFIG_SK98LIN is not set
734# CONFIG_VIA_VELOCITY is not set
735# CONFIG_TIGON3 is not set
736# CONFIG_BNX2 is not set
737
738#
739# Ethernet (10000 Mbit)
740#
741# CONFIG_CHELSIO_T1 is not set
742# CONFIG_IXGB is not set
743# CONFIG_S2IO is not set
744
745#
746# Token Ring devices
747#
748# CONFIG_TR is not set
749
750#
751# Wireless LAN (non-hamradio)
752#
753# CONFIG_NET_RADIO is not set
754
755#
756# PCMCIA network device support
757#
758# CONFIG_NET_PCMCIA is not set
759
760#
761# Wan interfaces
762#
763# CONFIG_WAN is not set
764# CONFIG_FDDI is not set
765# CONFIG_HIPPI is not set
766# CONFIG_PPP is not set
767# CONFIG_SLIP is not set
768# CONFIG_NET_FC is not set
769# CONFIG_SHAPER is not set
770# CONFIG_NETCONSOLE is not set
771# CONFIG_NETPOLL is not set
772# CONFIG_NET_POLL_CONTROLLER is not set
773
774#
775# ISDN subsystem
776#
777# CONFIG_ISDN is not set
778
779#
780# Telephony Support
781#
782# CONFIG_PHONE is not set
783
784#
785# Input device support
786#
787CONFIG_INPUT=y
788
789#
790# Userland interfaces
791#
792CONFIG_INPUT_MOUSEDEV=y
793# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
794CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
795CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
796# CONFIG_INPUT_JOYDEV is not set
797# CONFIG_INPUT_TSDEV is not set
798# CONFIG_INPUT_EVDEV is not set
799# CONFIG_INPUT_EVBUG is not set
800
801#
802# Input Device Drivers
803#
804# CONFIG_INPUT_KEYBOARD is not set
805# CONFIG_INPUT_MOUSE is not set
806# CONFIG_INPUT_JOYSTICK is not set
807# CONFIG_INPUT_TOUCHSCREEN is not set
808# CONFIG_INPUT_MISC is not set
809
810#
811# Hardware I/O ports
812#
813# CONFIG_SERIO is not set
814# CONFIG_GAMEPORT is not set
815
816#
817# Character devices
818#
819CONFIG_VT=y
820CONFIG_VT_CONSOLE=y
821CONFIG_HW_CONSOLE=y
822# CONFIG_SERIAL_NONSTANDARD is not set
823
824#
825# Serial drivers
826#
827# CONFIG_SERIAL_8250 is not set
828
829#
830# Non-8250 serial port support
831#
832CONFIG_SERIAL_SH_SCI=y
833CONFIG_SERIAL_SH_SCI_CONSOLE=y
834CONFIG_SERIAL_CORE=y
835CONFIG_SERIAL_CORE_CONSOLE=y
836# CONFIG_SERIAL_JSM is not set
837CONFIG_UNIX98_PTYS=y
838CONFIG_LEGACY_PTYS=y
839CONFIG_LEGACY_PTY_COUNT=256
840
841#
842# IPMI
843#
844# CONFIG_IPMI_HANDLER is not set
845
846#
847# Watchdog Cards
848#
849# CONFIG_WATCHDOG is not set
850# CONFIG_RTC is not set
851CONFIG_RS5C313_RTC=y
852# CONFIG_GEN_RTC is not set
853# CONFIG_DTLK is not set
854# CONFIG_R3964 is not set
855# CONFIG_APPLICOM is not set
856
857#
858# Ftape, the floppy tape device driver
859#
860# CONFIG_DRM is not set
861
862#
863# PCMCIA character devices
864#
865# CONFIG_SYNCLINK_CS is not set
866# CONFIG_RAW_DRIVER is not set
867
868#
869# TPM devices
870#
871# CONFIG_TCG_TPM is not set
872
873#
874# I2C support
875#
876# CONFIG_I2C is not set
877
878#
879# Dallas's 1-wire bus
880#
881# CONFIG_W1 is not set
882
883#
884# Hardware Monitoring support
885#
886CONFIG_HWMON=y
887# CONFIG_HWMON_VID is not set
888# CONFIG_HWMON_DEBUG_CHIP is not set
889
890#
891# Misc devices
892#
893
894#
895# Multimedia Capabilities Port drivers
896#
897
898#
899# Multimedia devices
900#
901CONFIG_VIDEO_DEV=m
902
903#
904# Video For Linux
905#
906
907#
908# Video Adapters
909#
910# CONFIG_VIDEO_PMS is not set
911# CONFIG_VIDEO_CPIA is not set
912# CONFIG_VIDEO_STRADIS is not set
913# CONFIG_VIDEO_MXB is not set
914# CONFIG_VIDEO_DPC is not set
915# CONFIG_VIDEO_HEXIUM_ORION is not set
916# CONFIG_VIDEO_HEXIUM_GEMINI is not set
917
918#
919# Radio Adapters
920#
921# CONFIG_RADIO_CADET is not set
922# CONFIG_RADIO_RTRACK is not set
923# CONFIG_RADIO_RTRACK2 is not set
924# CONFIG_RADIO_AZTECH is not set
925# CONFIG_RADIO_GEMTEK is not set
926# CONFIG_RADIO_GEMTEK_PCI is not set
927# CONFIG_RADIO_MAXIRADIO is not set
928# CONFIG_RADIO_MAESTRO is not set
929# CONFIG_RADIO_SF16FMI is not set
930# CONFIG_RADIO_SF16FMR2 is not set
931# CONFIG_RADIO_TERRATEC is not set
932# CONFIG_RADIO_TRUST is not set
933# CONFIG_RADIO_TYPHOON is not set
934# CONFIG_RADIO_ZOLTRIX is not set
935
936#
937# Digital Video Broadcasting Devices
938#
939# CONFIG_DVB is not set
940
941#
942# Graphics support
943#
944# CONFIG_FB is not set
945
946#
947# Console display driver support
948#
949# CONFIG_MDA_CONSOLE is not set
950CONFIG_DUMMY_CONSOLE=y
951CONFIG_FONT_8x16=y
952
953#
954# Sound
955#
956CONFIG_SOUND=m
957
958#
959# Advanced Linux Sound Architecture
960#
961# CONFIG_SND is not set
962
963#
964# Open Sound System
965#
966CONFIG_SOUND_PRIME=m
967# CONFIG_SOUND_BT878 is not set
968# CONFIG_SOUND_CMPCI is not set
969# CONFIG_SOUND_EMU10K1 is not set
970# CONFIG_SOUND_FUSION is not set
971# CONFIG_SOUND_CS4281 is not set
972# CONFIG_SOUND_ES1370 is not set
973# CONFIG_SOUND_ES1371 is not set
974# CONFIG_SOUND_ESSSOLO1 is not set
975# CONFIG_SOUND_MAESTRO is not set
976# CONFIG_SOUND_MAESTRO3 is not set
977# CONFIG_SOUND_ICH is not set
978# CONFIG_SOUND_SONICVIBES is not set
979# CONFIG_SOUND_TRIDENT is not set
980# CONFIG_SOUND_MSNDCLAS is not set
981# CONFIG_SOUND_MSNDPIN is not set
982# CONFIG_SOUND_VIA82CXXX is not set
983# CONFIG_SOUND_ALI5455 is not set
984# CONFIG_SOUND_FORTE is not set
985# CONFIG_SOUND_RME96XX is not set
986# CONFIG_SOUND_AD1980 is not set
987
988#
989# USB support
990#
991CONFIG_USB_ARCH_HAS_HCD=y
992CONFIG_USB_ARCH_HAS_OHCI=y
993CONFIG_USB=y
994# CONFIG_USB_DEBUG is not set
995
996#
997# Miscellaneous USB options
998#
999CONFIG_USB_DEVICEFS=y
1000# CONFIG_USB_BANDWIDTH is not set
1001# CONFIG_USB_DYNAMIC_MINORS is not set
1002# CONFIG_USB_OTG is not set
1003
1004#
1005# USB Host Controller Drivers
1006#
1007CONFIG_USB_EHCI_HCD=y
1008# CONFIG_USB_EHCI_SPLIT_ISO is not set
1009# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1010# CONFIG_USB_ISP116X_HCD is not set
1011CONFIG_USB_OHCI_HCD=y
1012# CONFIG_USB_OHCI_BIG_ENDIAN is not set
1013CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1014# CONFIG_USB_UHCI_HCD is not set
1015# CONFIG_USB_SL811_HCD is not set
1016
1017#
1018# USB Device Class drivers
1019#
1020CONFIG_OBSOLETE_OSS_USB_DRIVER=y
1021CONFIG_USB_AUDIO=m
1022# CONFIG_USB_BLUETOOTH_TTY is not set
1023CONFIG_USB_MIDI=m
1024# CONFIG_USB_ACM is not set
1025CONFIG_USB_PRINTER=m
1026
1027#
1028# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
1029#
1030CONFIG_USB_STORAGE=m
1031# CONFIG_USB_STORAGE_DEBUG is not set
1032CONFIG_USB_STORAGE_DATAFAB=y
1033CONFIG_USB_STORAGE_FREECOM=y
1034CONFIG_USB_STORAGE_ISD200=y
1035CONFIG_USB_STORAGE_DPCM=y
1036# CONFIG_USB_STORAGE_USBAT is not set
1037CONFIG_USB_STORAGE_SDDR09=y
1038CONFIG_USB_STORAGE_SDDR55=y
1039CONFIG_USB_STORAGE_JUMPSHOT=y
1040
1041#
1042# USB Input Devices
1043#
1044CONFIG_USB_HID=m
1045CONFIG_USB_HIDINPUT=y
1046# CONFIG_HID_FF is not set
1047# CONFIG_USB_HIDDEV is not set
1048
1049#
1050# USB HID Boot Protocol drivers
1051#
1052# CONFIG_USB_KBD is not set
1053# CONFIG_USB_MOUSE is not set
1054# CONFIG_USB_AIPTEK is not set
1055# CONFIG_USB_WACOM is not set
1056# CONFIG_USB_ACECAD is not set
1057# CONFIG_USB_KBTAB is not set
1058# CONFIG_USB_POWERMATE is not set
1059# CONFIG_USB_MTOUCH is not set
1060# CONFIG_USB_ITMTOUCH is not set
1061# CONFIG_USB_EGALAX is not set
1062# CONFIG_USB_YEALINK is not set
1063# CONFIG_USB_XPAD is not set
1064# CONFIG_USB_ATI_REMOTE is not set
1065# CONFIG_USB_KEYSPAN_REMOTE is not set
1066# CONFIG_USB_APPLETOUCH is not set
1067
1068#
1069# USB Imaging devices
1070#
1071# CONFIG_USB_MDC800 is not set
1072# CONFIG_USB_MICROTEK is not set
1073
1074#
1075# USB Multimedia devices
1076#
1077CONFIG_USB_DABUSB=m
1078CONFIG_USB_VICAM=m
1079CONFIG_USB_DSBR=m
1080CONFIG_USB_IBMCAM=m
1081CONFIG_USB_KONICAWC=m
1082CONFIG_USB_OV511=m
1083CONFIG_USB_SE401=m
1084CONFIG_USB_SN9C102=m
1085CONFIG_USB_STV680=m
1086CONFIG_USB_PWC=m
1087
1088#
1089# USB Network Adapters
1090#
1091# CONFIG_USB_CATC is not set
1092# CONFIG_USB_KAWETH is not set
1093CONFIG_USB_PEGASUS=m
1094CONFIG_USB_RTL8150=m
1095# CONFIG_USB_USBNET is not set
1096CONFIG_USB_MON=y
1097
1098#
1099# USB port drivers
1100#
1101
1102#
1103# USB Serial Converter support
1104#
1105CONFIG_USB_SERIAL=m
1106# CONFIG_USB_SERIAL_GENERIC is not set
1107# CONFIG_USB_SERIAL_AIRPRIME is not set
1108# CONFIG_USB_SERIAL_BELKIN is not set
1109# CONFIG_USB_SERIAL_WHITEHEAT is not set
1110# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1111# CONFIG_USB_SERIAL_CP2101 is not set
1112# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1113# CONFIG_USB_SERIAL_EMPEG is not set
1114CONFIG_USB_SERIAL_FTDI_SIO=m
1115# CONFIG_USB_SERIAL_VISOR is not set
1116# CONFIG_USB_SERIAL_IPAQ is not set
1117# CONFIG_USB_SERIAL_IR is not set
1118# CONFIG_USB_SERIAL_EDGEPORT is not set
1119# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1120# CONFIG_USB_SERIAL_GARMIN is not set
1121# CONFIG_USB_SERIAL_IPW is not set
1122# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1123# CONFIG_USB_SERIAL_KEYSPAN is not set
1124# CONFIG_USB_SERIAL_KLSI is not set
1125# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1126# CONFIG_USB_SERIAL_MCT_U232 is not set
1127CONFIG_USB_SERIAL_PL2303=m
1128# CONFIG_USB_SERIAL_HP4X is not set
1129# CONFIG_USB_SERIAL_SAFE is not set
1130# CONFIG_USB_SERIAL_TI is not set
1131# CONFIG_USB_SERIAL_CYBERJACK is not set
1132# CONFIG_USB_SERIAL_XIRCOM is not set
1133# CONFIG_USB_SERIAL_OPTION is not set
1134# CONFIG_USB_SERIAL_OMNINET is not set
1135
1136#
1137# USB Miscellaneous drivers
1138#
1139CONFIG_USB_EMI62=m
1140CONFIG_USB_EMI26=m
1141# CONFIG_USB_AUERSWALD is not set
1142# CONFIG_USB_RIO500 is not set
1143# CONFIG_USB_LEGOTOWER is not set
1144# CONFIG_USB_LCD is not set
1145# CONFIG_USB_LED is not set
1146# CONFIG_USB_CYTHERM is not set
1147# CONFIG_USB_PHIDGETKIT is not set
1148# CONFIG_USB_PHIDGETSERVO is not set
1149# CONFIG_USB_IDMOUSE is not set
1150CONFIG_USB_SISUSBVGA=m
1151CONFIG_USB_SISUSBVGA_CON=y
1152# CONFIG_USB_LD is not set
1153# CONFIG_USB_TEST is not set
1154
1155#
1156# USB DSL modem support
1157#
1158
1159#
1160# USB Gadget Support
1161#
1162# CONFIG_USB_GADGET is not set
1163
1164#
1165# MMC/SD Card support
1166#
1167# CONFIG_MMC is not set
1168
1169#
1170# InfiniBand support
1171#
1172# CONFIG_INFINIBAND is not set
1173
1174#
1175# SN Devices
1176#
1177
1178#
1179# File systems
1180#
1181CONFIG_EXT2_FS=y
1182# CONFIG_EXT2_FS_XATTR is not set
1183# CONFIG_EXT2_FS_XIP is not set
1184CONFIG_EXT3_FS=y
1185CONFIG_EXT3_FS_XATTR=y
1186# CONFIG_EXT3_FS_POSIX_ACL is not set
1187# CONFIG_EXT3_FS_SECURITY is not set
1188CONFIG_JBD=y
1189# CONFIG_JBD_DEBUG is not set
1190CONFIG_FS_MBCACHE=y
1191CONFIG_REISERFS_FS=y
1192# CONFIG_REISERFS_CHECK is not set
1193# CONFIG_REISERFS_PROC_INFO is not set
1194# CONFIG_REISERFS_FS_XATTR is not set
1195# CONFIG_JFS_FS is not set
1196# CONFIG_FS_POSIX_ACL is not set
1197# CONFIG_XFS_FS is not set
1198# CONFIG_MINIX_FS is not set
1199CONFIG_ROMFS_FS=y
1200CONFIG_INOTIFY=y
1201# CONFIG_QUOTA is not set
1202CONFIG_DNOTIFY=y
1203# CONFIG_AUTOFS_FS is not set
1204# CONFIG_AUTOFS4_FS is not set
1205# CONFIG_FUSE_FS is not set
1206
1207#
1208# CD-ROM/DVD Filesystems
1209#
1210CONFIG_ISO9660_FS=m
1211# CONFIG_JOLIET is not set
1212# CONFIG_ZISOFS is not set
1213# CONFIG_UDF_FS is not set
1214
1215#
1216# DOS/FAT/NT Filesystems
1217#
1218CONFIG_FAT_FS=y
1219CONFIG_MSDOS_FS=y
1220CONFIG_VFAT_FS=y
1221CONFIG_FAT_DEFAULT_CODEPAGE=437
1222CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1223CONFIG_NTFS_FS=m
1224# CONFIG_NTFS_DEBUG is not set
1225CONFIG_NTFS_RW=y
1226
1227#
1228# Pseudo filesystems
1229#
1230CONFIG_PROC_FS=y
1231# CONFIG_PROC_KCORE is not set
1232CONFIG_SYSFS=y
1233CONFIG_TMPFS=y
1234# CONFIG_HUGETLBFS is not set
1235# CONFIG_HUGETLB_PAGE is not set
1236CONFIG_RAMFS=y
1237# CONFIG_RELAYFS_FS is not set
1238
1239#
1240# Miscellaneous filesystems
1241#
1242# CONFIG_ADFS_FS is not set
1243# CONFIG_AFFS_FS is not set
1244# CONFIG_HFS_FS is not set
1245# CONFIG_HFSPLUS_FS is not set
1246# CONFIG_BEFS_FS is not set
1247# CONFIG_BFS_FS is not set
1248# CONFIG_EFS_FS is not set
1249# CONFIG_CRAMFS is not set
1250# CONFIG_VXFS_FS is not set
1251# CONFIG_HPFS_FS is not set
1252# CONFIG_QNX4FS_FS is not set
1253# CONFIG_SYSV_FS is not set
1254CONFIG_UFS_FS=m
1255CONFIG_UFS_FS_WRITE=y
1256
1257#
1258# Network File Systems
1259#
1260CONFIG_NFS_FS=m
1261CONFIG_NFS_V3=y
1262# CONFIG_NFS_V3_ACL is not set
1263# CONFIG_NFS_V4 is not set
1264# CONFIG_NFS_DIRECTIO is not set
1265CONFIG_NFSD=m
1266CONFIG_NFSD_V3=y
1267# CONFIG_NFSD_V3_ACL is not set
1268# CONFIG_NFSD_V4 is not set
1269CONFIG_NFSD_TCP=y
1270CONFIG_LOCKD=m
1271CONFIG_LOCKD_V4=y
1272CONFIG_EXPORTFS=m
1273CONFIG_NFS_COMMON=y
1274CONFIG_SUNRPC=m
1275# CONFIG_RPCSEC_GSS_KRB5 is not set
1276# CONFIG_RPCSEC_GSS_SPKM3 is not set
1277CONFIG_SMB_FS=m
1278# CONFIG_SMB_NLS_DEFAULT is not set
1279# CONFIG_CIFS is not set
1280# CONFIG_NCP_FS is not set
1281# CONFIG_CODA_FS is not set
1282# CONFIG_AFS_FS is not set
1283# CONFIG_9P_FS is not set
1284
1285#
1286# Partition Types
1287#
1288# CONFIG_PARTITION_ADVANCED is not set
1289CONFIG_MSDOS_PARTITION=y
1290
1291#
1292# Native Language Support
1293#
1294CONFIG_NLS=y
1295CONFIG_NLS_DEFAULT="iso8859-1"
1296CONFIG_NLS_CODEPAGE_437=y
1297# CONFIG_NLS_CODEPAGE_737 is not set
1298# CONFIG_NLS_CODEPAGE_775 is not set
1299# CONFIG_NLS_CODEPAGE_850 is not set
1300# CONFIG_NLS_CODEPAGE_852 is not set
1301# CONFIG_NLS_CODEPAGE_855 is not set
1302# CONFIG_NLS_CODEPAGE_857 is not set
1303# CONFIG_NLS_CODEPAGE_860 is not set
1304# CONFIG_NLS_CODEPAGE_861 is not set
1305# CONFIG_NLS_CODEPAGE_862 is not set
1306# CONFIG_NLS_CODEPAGE_863 is not set
1307# CONFIG_NLS_CODEPAGE_864 is not set
1308# CONFIG_NLS_CODEPAGE_865 is not set
1309# CONFIG_NLS_CODEPAGE_866 is not set
1310# CONFIG_NLS_CODEPAGE_869 is not set
1311# CONFIG_NLS_CODEPAGE_936 is not set
1312# CONFIG_NLS_CODEPAGE_950 is not set
1313CONFIG_NLS_CODEPAGE_932=y
1314# CONFIG_NLS_CODEPAGE_949 is not set
1315# CONFIG_NLS_CODEPAGE_874 is not set
1316# CONFIG_NLS_ISO8859_8 is not set
1317# CONFIG_NLS_CODEPAGE_1250 is not set
1318# CONFIG_NLS_CODEPAGE_1251 is not set
1319# CONFIG_NLS_ASCII is not set
1320# CONFIG_NLS_ISO8859_1 is not set
1321# CONFIG_NLS_ISO8859_2 is not set
1322# CONFIG_NLS_ISO8859_3 is not set
1323# CONFIG_NLS_ISO8859_4 is not set
1324# CONFIG_NLS_ISO8859_5 is not set
1325# CONFIG_NLS_ISO8859_6 is not set
1326# CONFIG_NLS_ISO8859_7 is not set
1327# CONFIG_NLS_ISO8859_9 is not set
1328# CONFIG_NLS_ISO8859_13 is not set
1329# CONFIG_NLS_ISO8859_14 is not set
1330# CONFIG_NLS_ISO8859_15 is not set
1331# CONFIG_NLS_KOI8_R is not set
1332# CONFIG_NLS_KOI8_U is not set
1333# CONFIG_NLS_UTF8 is not set
1334
1335#
1336# Profiling support
1337#
1338# CONFIG_PROFILING is not set
1339
1340#
1341# Kernel hacking
1342#
1343# CONFIG_PRINTK_TIME is not set
1344# CONFIG_DEBUG_KERNEL is not set
1345CONFIG_LOG_BUF_SHIFT=14
1346# CONFIG_FRAME_POINTER is not set
1347CONFIG_SH_STANDARD_BIOS=y
1348# CONFIG_EARLY_SCIF_CONSOLE is not set
1349# CONFIG_EARLY_PRINTK is not set
1350# CONFIG_KGDB is not set
1351
1352#
1353# Security options
1354#
1355# CONFIG_KEYS is not set
1356# CONFIG_SECURITY is not set
1357
1358#
1359# Cryptographic options
1360#
1361# CONFIG_CRYPTO is not set
1362
1363#
1364# Hardware crypto devices
1365#
1366
1367#
1368# Library routines
1369#
1370# CONFIG_CRC_CCITT is not set
1371# CONFIG_CRC16 is not set
1372CONFIG_CRC32=y
1373# CONFIG_LIBCRC32C is not set
diff --git a/arch/sh/configs/r7780rp_defconfig b/arch/sh/configs/r7780rp_defconfig
new file mode 100644
index 000000000000..d597fc571549
--- /dev/null
+++ b/arch/sh/configs/r7780rp_defconfig
@@ -0,0 +1,1099 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.15-sh
4# Sat Jan 7 19:47:53 2006
5#
6CONFIG_SUPERH=y
7CONFIG_UID16=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_HARDIRQS=y
10CONFIG_GENERIC_IRQ_PROBE=y
11CONFIG_GENERIC_CALIBRATE_DELAY=y
12
13#
14# Code maturity level options
15#
16CONFIG_EXPERIMENTAL=y
17CONFIG_CLEAN_COMPILE=y
18CONFIG_BROKEN_ON_SMP=y
19CONFIG_LOCK_KERNEL=y
20CONFIG_INIT_ENV_ARG_LIMIT=32
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y
27CONFIG_SWAP=y
28CONFIG_SYSVIPC=y
29# CONFIG_POSIX_MQUEUE is not set
30CONFIG_BSD_PROCESS_ACCT=y
31# CONFIG_BSD_PROCESS_ACCT_V3 is not set
32CONFIG_SYSCTL=y
33# CONFIG_AUDIT is not set
34CONFIG_HOTPLUG=y
35CONFIG_KOBJECT_UEVENT=y
36CONFIG_IKCONFIG=y
37CONFIG_IKCONFIG_PROC=y
38CONFIG_INITRAMFS_SOURCE=""
39CONFIG_CC_OPTIMIZE_FOR_SIZE=y
40CONFIG_EMBEDDED=y
41CONFIG_KALLSYMS=y
42# CONFIG_KALLSYMS_ALL is not set
43# CONFIG_KALLSYMS_EXTRA_PASS is not set
44CONFIG_PRINTK=y
45CONFIG_BUG=y
46CONFIG_BASE_FULL=y
47# CONFIG_FUTEX is not set
48# CONFIG_EPOLL is not set
49CONFIG_SHMEM=y
50CONFIG_CC_ALIGN_FUNCTIONS=0
51CONFIG_CC_ALIGN_LABELS=0
52CONFIG_CC_ALIGN_LOOPS=0
53CONFIG_CC_ALIGN_JUMPS=0
54# CONFIG_TINY_SHMEM is not set
55CONFIG_BASE_SMALL=0
56
57#
58# Loadable module support
59#
60CONFIG_MODULES=y
61CONFIG_MODULE_UNLOAD=y
62# CONFIG_MODULE_FORCE_UNLOAD is not set
63CONFIG_OBSOLETE_MODPARM=y
64# CONFIG_MODVERSIONS is not set
65# CONFIG_MODULE_SRCVERSION_ALL is not set
66CONFIG_KMOD=y
67
68#
69# Block layer
70#
71# CONFIG_LBD is not set
72
73#
74# IO Schedulers
75#
76CONFIG_IOSCHED_NOOP=y
77# CONFIG_IOSCHED_AS is not set
78# CONFIG_IOSCHED_DEADLINE is not set
79# CONFIG_IOSCHED_CFQ is not set
80# CONFIG_DEFAULT_AS is not set
81# CONFIG_DEFAULT_DEADLINE is not set
82# CONFIG_DEFAULT_CFQ is not set
83CONFIG_DEFAULT_NOOP=y
84CONFIG_DEFAULT_IOSCHED="noop"
85
86#
87# System type
88#
89# CONFIG_SH_SOLUTION_ENGINE is not set
90# CONFIG_SH_7751_SOLUTION_ENGINE is not set
91# CONFIG_SH_7300_SOLUTION_ENGINE is not set
92# CONFIG_SH_73180_SOLUTION_ENGINE is not set
93# CONFIG_SH_7751_SYSTEMH is not set
94# CONFIG_SH_STB1_HARP is not set
95# CONFIG_SH_STB1_OVERDRIVE is not set
96# CONFIG_SH_HP6XX is not set
97# CONFIG_SH_CQREEK is not set
98# CONFIG_SH_DMIDA is not set
99# CONFIG_SH_EC3104 is not set
100# CONFIG_SH_SATURN is not set
101# CONFIG_SH_DREAMCAST is not set
102# CONFIG_SH_CAT68701 is not set
103# CONFIG_SH_BIGSUR is not set
104# CONFIG_SH_SH2000 is not set
105# CONFIG_SH_ADX is not set
106# CONFIG_SH_MPC1211 is not set
107# CONFIG_SH_SH03 is not set
108# CONFIG_SH_SECUREEDGE5410 is not set
109# CONFIG_SH_HS7751RVOIP is not set
110# CONFIG_SH_RTS7751R2D is not set
111# CONFIG_SH_R77703DRP is not set
112CONFIG_SH_R7780RP=y
113# CONFIG_SH_EDOSK7705 is not set
114# CONFIG_SH_SH4202_MICRODEV is not set
115# CONFIG_SH_LANDISK is not set
116# CONFIG_SH_TITAN is not set
117# CONFIG_SH_UNKNOWN is not set
118
119#
120# Processor selection
121#
122CONFIG_CPU_SH4=y
123CONFIG_CPU_SH4A=y
124
125#
126# SH-2 Processor Support
127#
128# CONFIG_CPU_SUBTYPE_SH7604 is not set
129
130#
131# SH-3 Processor Support
132#
133# CONFIG_CPU_SUBTYPE_SH7300 is not set
134# CONFIG_CPU_SUBTYPE_SH7705 is not set
135# CONFIG_CPU_SUBTYPE_SH7707 is not set
136# CONFIG_CPU_SUBTYPE_SH7708 is not set
137# CONFIG_CPU_SUBTYPE_SH7709 is not set
138
139#
140# SH-4 Processor Support
141#
142# CONFIG_CPU_SUBTYPE_SH7750 is not set
143# CONFIG_CPU_SUBTYPE_SH7091 is not set
144# CONFIG_CPU_SUBTYPE_SH7750R is not set
145# CONFIG_CPU_SUBTYPE_SH7750S is not set
146# CONFIG_CPU_SUBTYPE_SH7751 is not set
147# CONFIG_CPU_SUBTYPE_SH7751R is not set
148# CONFIG_CPU_SUBTYPE_SH7760 is not set
149# CONFIG_CPU_SUBTYPE_SH4_202 is not set
150
151#
152# ST40 Processor Support
153#
154# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
155# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
156
157#
158# SH-4A Processor Support
159#
160# CONFIG_CPU_SUBTYPE_SH73180 is not set
161# CONFIG_CPU_SUBTYPE_SH7770 is not set
162CONFIG_CPU_SUBTYPE_SH7780=y
163
164#
165# Memory management options
166#
167CONFIG_MMU=y
168CONFIG_32BIT=y
169CONFIG_HUGETLB_PAGE_SIZE_64K=y
170# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
171CONFIG_SELECT_MEMORY_MODEL=y
172CONFIG_FLATMEM_MANUAL=y
173# CONFIG_DISCONTIGMEM_MANUAL is not set
174# CONFIG_SPARSEMEM_MANUAL is not set
175CONFIG_FLATMEM=y
176CONFIG_FLAT_NODE_MEM_MAP=y
177# CONFIG_SPARSEMEM_STATIC is not set
178CONFIG_SPLIT_PTLOCK_CPUS=4
179
180#
181# Cache configuration
182#
183# CONFIG_SH_DIRECT_MAPPED is not set
184# CONFIG_SH_WRITETHROUGH is not set
185# CONFIG_SH_OCRAM is not set
186CONFIG_MEMORY_START=0x08000000
187CONFIG_MEMORY_SIZE=0x08000000
188
189#
190# Processor features
191#
192CONFIG_CPU_LITTLE_ENDIAN=y
193CONFIG_SH_FPU=y
194CONFIG_SH_STORE_QUEUES=y
195
196#
197# Timer support
198#
199CONFIG_SH_TMU=y
200CONFIG_SH_PCLK_FREQ_BOOL=y
201CONFIG_SH_PCLK_FREQ=32000000
202
203#
204# CPU Frequency scaling
205#
206# CONFIG_CPU_FREQ is not set
207
208#
209# DMA support
210#
211CONFIG_SH_DMA=y
212CONFIG_NR_ONCHIP_DMA_CHANNELS=6
213# CONFIG_NR_DMA_CHANNELS_BOOL is not set
214
215#
216# Companion Chips
217#
218# CONFIG_HD6446X_SERIES is not set
219
220#
221# Kernel features
222#
223# CONFIG_KEXEC is not set
224CONFIG_PREEMPT=y
225# CONFIG_SMP is not set
226CONFIG_CPU_HAS_INTEVT=y
227CONFIG_CPU_HAS_INTC2_IRQ=y
228
229#
230# Boot options
231#
232CONFIG_ZERO_PAGE_OFFSET=0x00001000
233CONFIG_BOOT_LINK_OFFSET=0x00800000
234# CONFIG_UBC_WAKEUP is not set
235CONFIG_CMDLINE_BOOL=y
236CONFIG_CMDLINE="mem=128M console=ttySC0,115200 root=/dev/hda1"
237
238#
239# Bus options
240#
241CONFIG_PCI=y
242CONFIG_SH_PCIDMA_NONCOHERENT=y
243CONFIG_PCI_AUTO=y
244CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
245CONFIG_PCI_LEGACY_PROC=y
246# CONFIG_PCI_DEBUG is not set
247
248#
249# PCCARD (PCMCIA/CardBus) support
250#
251# CONFIG_PCCARD is not set
252
253#
254# PCI Hotplug Support
255#
256CONFIG_HOTPLUG_PCI=y
257# CONFIG_HOTPLUG_PCI_FAKE is not set
258# CONFIG_HOTPLUG_PCI_CPCI is not set
259# CONFIG_HOTPLUG_PCI_SHPC is not set
260
261#
262# Executable file formats
263#
264CONFIG_BINFMT_ELF=y
265# CONFIG_BINFMT_FLAT is not set
266# CONFIG_BINFMT_MISC is not set
267
268#
269# Networking
270#
271CONFIG_NET=y
272
273#
274# Networking options
275#
276CONFIG_PACKET=y
277# CONFIG_PACKET_MMAP is not set
278CONFIG_UNIX=y
279# CONFIG_NET_KEY is not set
280CONFIG_INET=y
281# CONFIG_IP_MULTICAST is not set
282CONFIG_IP_ADVANCED_ROUTER=y
283CONFIG_ASK_IP_FIB_HASH=y
284# CONFIG_IP_FIB_TRIE is not set
285CONFIG_IP_FIB_HASH=y
286# CONFIG_IP_MULTIPLE_TABLES is not set
287# CONFIG_IP_ROUTE_MULTIPATH is not set
288# CONFIG_IP_ROUTE_VERBOSE is not set
289CONFIG_IP_PNP=y
290CONFIG_IP_PNP_DHCP=y
291# CONFIG_IP_PNP_BOOTP is not set
292# CONFIG_IP_PNP_RARP is not set
293# CONFIG_NET_IPIP is not set
294# CONFIG_NET_IPGRE is not set
295# CONFIG_ARPD is not set
296# CONFIG_SYN_COOKIES is not set
297# CONFIG_INET_AH is not set
298# CONFIG_INET_ESP is not set
299# CONFIG_INET_IPCOMP is not set
300# CONFIG_INET_TUNNEL is not set
301CONFIG_INET_DIAG=y
302CONFIG_INET_TCP_DIAG=y
303# CONFIG_TCP_CONG_ADVANCED is not set
304CONFIG_TCP_CONG_BIC=y
305# CONFIG_IPV6 is not set
306# CONFIG_NETFILTER is not set
307
308#
309# DCCP Configuration (EXPERIMENTAL)
310#
311# CONFIG_IP_DCCP is not set
312
313#
314# SCTP Configuration (EXPERIMENTAL)
315#
316# CONFIG_IP_SCTP is not set
317# CONFIG_ATM is not set
318CONFIG_BRIDGE=m
319# CONFIG_VLAN_8021Q is not set
320# CONFIG_DECNET is not set
321# CONFIG_LLC2 is not set
322# CONFIG_IPX is not set
323# CONFIG_ATALK is not set
324# CONFIG_X25 is not set
325# CONFIG_LAPB is not set
326# CONFIG_NET_DIVERT is not set
327# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set
329
330#
331# QoS and/or fair queueing
332#
333# CONFIG_NET_SCHED is not set
334
335#
336# Network testing
337#
338# CONFIG_NET_PKTGEN is not set
339# CONFIG_HAMRADIO is not set
340# CONFIG_IRDA is not set
341# CONFIG_BT is not set
342# CONFIG_IEEE80211 is not set
343
344#
345# Device Drivers
346#
347
348#
349# Generic Driver Options
350#
351CONFIG_STANDALONE=y
352CONFIG_PREVENT_FIRMWARE_BUILD=y
353CONFIG_FW_LOADER=m
354# CONFIG_DEBUG_DRIVER is not set
355
356#
357# Connector - unified userspace <-> kernelspace linker
358#
359# CONFIG_CONNECTOR is not set
360
361#
362# Memory Technology Devices (MTD)
363#
364# CONFIG_MTD is not set
365
366#
367# Parallel port support
368#
369# CONFIG_PARPORT is not set
370
371#
372# Plug and Play support
373#
374
375#
376# Block devices
377#
378# CONFIG_BLK_CPQ_DA is not set
379# CONFIG_BLK_CPQ_CISS_DA is not set
380# CONFIG_BLK_DEV_DAC960 is not set
381# CONFIG_BLK_DEV_UMEM is not set
382# CONFIG_BLK_DEV_COW_COMMON is not set
383# CONFIG_BLK_DEV_LOOP is not set
384# CONFIG_BLK_DEV_NBD is not set
385# CONFIG_BLK_DEV_SX8 is not set
386CONFIG_BLK_DEV_RAM=y
387CONFIG_BLK_DEV_RAM_COUNT=16
388CONFIG_BLK_DEV_RAM_SIZE=4096
389# CONFIG_BLK_DEV_INITRD is not set
390# CONFIG_CDROM_PKTCDVD is not set
391# CONFIG_ATA_OVER_ETH is not set
392
393#
394# ATA/ATAPI/MFM/RLL support
395#
396CONFIG_IDE=m
397CONFIG_IDE_MAX_HWIFS=4
398CONFIG_BLK_DEV_IDE=m
399
400#
401# Please see Documentation/ide.txt for help/info on IDE drives
402#
403CONFIG_BLK_DEV_IDE_SATA=y
404CONFIG_BLK_DEV_IDEDISK=m
405CONFIG_IDEDISK_MULTI_MODE=y
406# CONFIG_BLK_DEV_IDECD is not set
407# CONFIG_BLK_DEV_IDETAPE is not set
408# CONFIG_BLK_DEV_IDEFLOPPY is not set
409CONFIG_BLK_DEV_IDESCSI=m
410# CONFIG_IDE_TASK_IOCTL is not set
411
412#
413# IDE chipset support/bugfixes
414#
415CONFIG_IDE_GENERIC=m
416CONFIG_BLK_DEV_IDEPCI=y
417CONFIG_IDEPCI_SHARE_IRQ=y
418# CONFIG_BLK_DEV_OFFBOARD is not set
419CONFIG_BLK_DEV_GENERIC=m
420# CONFIG_BLK_DEV_OPTI621 is not set
421CONFIG_BLK_DEV_IDEDMA_PCI=y
422# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
423CONFIG_IDEDMA_PCI_AUTO=y
424# CONFIG_IDEDMA_ONLYDISK is not set
425CONFIG_BLK_DEV_AEC62XX=m
426# CONFIG_BLK_DEV_ALI15X3 is not set
427# CONFIG_BLK_DEV_AMD74XX is not set
428# CONFIG_BLK_DEV_CMD64X is not set
429# CONFIG_BLK_DEV_TRIFLEX is not set
430# CONFIG_BLK_DEV_CY82C693 is not set
431# CONFIG_BLK_DEV_CS5520 is not set
432# CONFIG_BLK_DEV_CS5530 is not set
433# CONFIG_BLK_DEV_HPT34X is not set
434# CONFIG_BLK_DEV_HPT366 is not set
435# CONFIG_BLK_DEV_SC1200 is not set
436# CONFIG_BLK_DEV_PIIX is not set
437# CONFIG_BLK_DEV_IT821X is not set
438# CONFIG_BLK_DEV_NS87415 is not set
439# CONFIG_BLK_DEV_PDC202XX_OLD is not set
440CONFIG_BLK_DEV_PDC202XX_NEW=m
441# CONFIG_PDC202XX_FORCE is not set
442# CONFIG_BLK_DEV_SVWKS is not set
443CONFIG_BLK_DEV_SIIMAGE=m
444# CONFIG_BLK_DEV_SLC90E66 is not set
445# CONFIG_BLK_DEV_TRM290 is not set
446# CONFIG_BLK_DEV_VIA82CXXX is not set
447CONFIG_IDE_SH=y
448# CONFIG_IDE_ARM is not set
449CONFIG_BLK_DEV_IDEDMA=y
450# CONFIG_IDEDMA_IVB is not set
451CONFIG_IDEDMA_AUTO=y
452# CONFIG_BLK_DEV_HD is not set
453
454#
455# SCSI device support
456#
457# CONFIG_RAID_ATTRS is not set
458CONFIG_SCSI=m
459CONFIG_SCSI_PROC_FS=y
460
461#
462# SCSI support type (disk, tape, CD-ROM)
463#
464CONFIG_BLK_DEV_SD=m
465# CONFIG_CHR_DEV_ST is not set
466# CONFIG_CHR_DEV_OSST is not set
467# CONFIG_BLK_DEV_SR is not set
468CONFIG_CHR_DEV_SG=m
469# CONFIG_CHR_DEV_SCH is not set
470
471#
472# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
473#
474# CONFIG_SCSI_MULTI_LUN is not set
475# CONFIG_SCSI_CONSTANTS is not set
476# CONFIG_SCSI_LOGGING is not set
477
478#
479# SCSI Transport Attributes
480#
481# CONFIG_SCSI_SPI_ATTRS is not set
482# CONFIG_SCSI_FC_ATTRS is not set
483# CONFIG_SCSI_ISCSI_ATTRS is not set
484# CONFIG_SCSI_SAS_ATTRS is not set
485
486#
487# SCSI low-level drivers
488#
489# CONFIG_ISCSI_TCP is not set
490# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
491# CONFIG_SCSI_3W_9XXX is not set
492# CONFIG_SCSI_ACARD is not set
493# CONFIG_SCSI_AACRAID is not set
494# CONFIG_SCSI_AIC7XXX is not set
495# CONFIG_SCSI_AIC7XXX_OLD is not set
496# CONFIG_SCSI_AIC79XX is not set
497# CONFIG_SCSI_DPT_I2O is not set
498# CONFIG_MEGARAID_NEWGEN is not set
499# CONFIG_MEGARAID_LEGACY is not set
500# CONFIG_MEGARAID_SAS is not set
501# CONFIG_SCSI_SATA is not set
502# CONFIG_SCSI_DMX3191D is not set
503# CONFIG_SCSI_FUTURE_DOMAIN is not set
504# CONFIG_SCSI_IPS is not set
505# CONFIG_SCSI_INITIO is not set
506# CONFIG_SCSI_INIA100 is not set
507# CONFIG_SCSI_SYM53C8XX_2 is not set
508# CONFIG_SCSI_IPR is not set
509# CONFIG_SCSI_QLOGIC_FC is not set
510# CONFIG_SCSI_QLOGIC_1280 is not set
511CONFIG_SCSI_QLA2XXX=m
512# CONFIG_SCSI_QLA21XX is not set
513# CONFIG_SCSI_QLA22XX is not set
514# CONFIG_SCSI_QLA2300 is not set
515# CONFIG_SCSI_QLA2322 is not set
516# CONFIG_SCSI_QLA6312 is not set
517# CONFIG_SCSI_QLA24XX is not set
518# CONFIG_SCSI_LPFC is not set
519# CONFIG_SCSI_DC395x is not set
520# CONFIG_SCSI_DC390T is not set
521# CONFIG_SCSI_NSP32 is not set
522# CONFIG_SCSI_DEBUG is not set
523
524#
525# Multi-device support (RAID and LVM)
526#
527# CONFIG_MD is not set
528
529#
530# Fusion MPT device support
531#
532# CONFIG_FUSION is not set
533# CONFIG_FUSION_SPI is not set
534# CONFIG_FUSION_FC is not set
535# CONFIG_FUSION_SAS is not set
536
537#
538# IEEE 1394 (FireWire) support
539#
540# CONFIG_IEEE1394 is not set
541
542#
543# I2O device support
544#
545# CONFIG_I2O is not set
546
547#
548# Network device support
549#
550CONFIG_NETDEVICES=y
551# CONFIG_DUMMY is not set
552# CONFIG_BONDING is not set
553# CONFIG_EQUALIZER is not set
554# CONFIG_TUN is not set
555
556#
557# ARCnet devices
558#
559# CONFIG_ARCNET is not set
560
561#
562# PHY device support
563#
564# CONFIG_PHYLIB is not set
565
566#
567# Ethernet (10 or 100Mbit)
568#
569CONFIG_NET_ETHERNET=y
570CONFIG_MII=y
571# CONFIG_STNIC is not set
572# CONFIG_HAPPYMEAL is not set
573# CONFIG_SUNGEM is not set
574# CONFIG_CASSINI is not set
575# CONFIG_NET_VENDOR_3COM is not set
576# CONFIG_SMC91X is not set
577
578#
579# Tulip family network device support
580#
581# CONFIG_NET_TULIP is not set
582# CONFIG_HP100 is not set
583CONFIG_NE2000=y
584CONFIG_NET_PCI=y
585CONFIG_PCNET32=m
586# CONFIG_AMD8111_ETH is not set
587# CONFIG_ADAPTEC_STARFIRE is not set
588# CONFIG_B44 is not set
589# CONFIG_FORCEDETH is not set
590# CONFIG_DGRS is not set
591# CONFIG_EEPRO100 is not set
592# CONFIG_E100 is not set
593# CONFIG_FEALNX is not set
594# CONFIG_NATSEMI is not set
595# CONFIG_NE2K_PCI is not set
596CONFIG_8139CP=m
597CONFIG_8139TOO=m
598# CONFIG_8139TOO_PIO is not set
599# CONFIG_8139TOO_TUNE_TWISTER is not set
600CONFIG_8139TOO_8129=y
601# CONFIG_8139_OLD_RX_RESET is not set
602# CONFIG_SIS900 is not set
603# CONFIG_EPIC100 is not set
604# CONFIG_SUNDANCE is not set
605# CONFIG_TLAN is not set
606CONFIG_VIA_RHINE=m
607CONFIG_VIA_RHINE_MMIO=y
608
609#
610# Ethernet (1000 Mbit)
611#
612# CONFIG_ACENIC is not set
613# CONFIG_DL2K is not set
614CONFIG_E1000=m
615# CONFIG_E1000_NAPI is not set
616# CONFIG_NS83820 is not set
617# CONFIG_HAMACHI is not set
618# CONFIG_YELLOWFIN is not set
619CONFIG_R8169=y
620# CONFIG_R8169_NAPI is not set
621# CONFIG_SIS190 is not set
622# CONFIG_SKGE is not set
623# CONFIG_SK98LIN is not set
624# CONFIG_VIA_VELOCITY is not set
625# CONFIG_TIGON3 is not set
626# CONFIG_BNX2 is not set
627
628#
629# Ethernet (10000 Mbit)
630#
631# CONFIG_CHELSIO_T1 is not set
632# CONFIG_IXGB is not set
633# CONFIG_S2IO is not set
634
635#
636# Token Ring devices
637#
638# CONFIG_TR is not set
639
640#
641# Wireless LAN (non-hamradio)
642#
643CONFIG_NET_RADIO=y
644
645#
646# Obsolete Wireless cards support (pre-802.11)
647#
648# CONFIG_STRIP is not set
649
650#
651# Wireless 802.11b ISA/PCI cards support
652#
653CONFIG_HERMES=m
654# CONFIG_PLX_HERMES is not set
655# CONFIG_TMD_HERMES is not set
656# CONFIG_NORTEL_HERMES is not set
657# CONFIG_PCI_HERMES is not set
658# CONFIG_ATMEL is not set
659
660#
661# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
662#
663CONFIG_PRISM54=m
664# CONFIG_HOSTAP is not set
665CONFIG_NET_WIRELESS=y
666
667#
668# Wan interfaces
669#
670# CONFIG_WAN is not set
671# CONFIG_FDDI is not set
672# CONFIG_HIPPI is not set
673# CONFIG_PPP is not set
674# CONFIG_SLIP is not set
675# CONFIG_NET_FC is not set
676# CONFIG_SHAPER is not set
677# CONFIG_NETCONSOLE is not set
678# CONFIG_NETPOLL is not set
679# CONFIG_NET_POLL_CONTROLLER is not set
680
681#
682# ISDN subsystem
683#
684# CONFIG_ISDN is not set
685
686#
687# Telephony Support
688#
689# CONFIG_PHONE is not set
690
691#
692# Input device support
693#
694CONFIG_INPUT=y
695
696#
697# Userland interfaces
698#
699CONFIG_INPUT_MOUSEDEV=y
700# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
701CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
702CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
703# CONFIG_INPUT_JOYDEV is not set
704# CONFIG_INPUT_TSDEV is not set
705# CONFIG_INPUT_EVDEV is not set
706# CONFIG_INPUT_EVBUG is not set
707
708#
709# Input Device Drivers
710#
711CONFIG_INPUT_KEYBOARD=y
712CONFIG_KEYBOARD_ATKBD=y
713# CONFIG_KEYBOARD_SUNKBD is not set
714# CONFIG_KEYBOARD_LKKBD is not set
715# CONFIG_KEYBOARD_XTKBD is not set
716# CONFIG_KEYBOARD_NEWTON is not set
717# CONFIG_INPUT_MOUSE is not set
718# CONFIG_INPUT_JOYSTICK is not set
719# CONFIG_INPUT_TOUCHSCREEN is not set
720# CONFIG_INPUT_MISC is not set
721
722#
723# Hardware I/O ports
724#
725CONFIG_SERIO=y
726# CONFIG_SERIO_I8042 is not set
727# CONFIG_SERIO_SERPORT is not set
728# CONFIG_SERIO_PCIPS2 is not set
729CONFIG_SERIO_LIBPS2=y
730# CONFIG_SERIO_RAW is not set
731# CONFIG_GAMEPORT is not set
732
733#
734# Character devices
735#
736# CONFIG_VT is not set
737# CONFIG_SERIAL_NONSTANDARD is not set
738
739#
740# Serial drivers
741#
742# CONFIG_SERIAL_8250 is not set
743
744#
745# Non-8250 serial port support
746#
747CONFIG_SERIAL_SH_SCI=y
748CONFIG_SERIAL_SH_SCI_CONSOLE=y
749CONFIG_SERIAL_CORE=y
750CONFIG_SERIAL_CORE_CONSOLE=y
751# CONFIG_SERIAL_JSM is not set
752CONFIG_UNIX98_PTYS=y
753CONFIG_LEGACY_PTYS=y
754CONFIG_LEGACY_PTY_COUNT=256
755
756#
757# IPMI
758#
759# CONFIG_IPMI_HANDLER is not set
760
761#
762# Watchdog Cards
763#
764# CONFIG_WATCHDOG is not set
765# CONFIG_RTC is not set
766# CONFIG_GEN_RTC is not set
767# CONFIG_DTLK is not set
768# CONFIG_R3964 is not set
769# CONFIG_APPLICOM is not set
770
771#
772# Ftape, the floppy tape device driver
773#
774# CONFIG_DRM is not set
775# CONFIG_RAW_DRIVER is not set
776
777#
778# TPM devices
779#
780# CONFIG_TCG_TPM is not set
781# CONFIG_TELCLOCK is not set
782
783#
784# I2C support
785#
786# CONFIG_I2C is not set
787
788#
789# Dallas's 1-wire bus
790#
791# CONFIG_W1 is not set
792
793#
794# Hardware Monitoring support
795#
796CONFIG_HWMON=y
797# CONFIG_HWMON_VID is not set
798# CONFIG_HWMON_DEBUG_CHIP is not set
799
800#
801# Misc devices
802#
803
804#
805# Multimedia Capabilities Port drivers
806#
807
808#
809# Multimedia devices
810#
811# CONFIG_VIDEO_DEV is not set
812
813#
814# Digital Video Broadcasting Devices
815#
816# CONFIG_DVB is not set
817
818#
819# Graphics support
820#
821# CONFIG_FB is not set
822
823#
824# Sound
825#
826CONFIG_SOUND=m
827
828#
829# Advanced Linux Sound Architecture
830#
831# CONFIG_SND is not set
832
833#
834# Open Sound System
835#
836CONFIG_SOUND_PRIME=m
837# CONFIG_OBSOLETE_OSS_DRIVER is not set
838# CONFIG_SOUND_FUSION is not set
839# CONFIG_SOUND_ICH is not set
840# CONFIG_SOUND_TRIDENT is not set
841# CONFIG_SOUND_MSNDCLAS is not set
842# CONFIG_SOUND_MSNDPIN is not set
843
844#
845# USB support
846#
847CONFIG_USB_ARCH_HAS_HCD=y
848CONFIG_USB_ARCH_HAS_OHCI=y
849# CONFIG_USB is not set
850
851#
852# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
853#
854
855#
856# USB Gadget Support
857#
858# CONFIG_USB_GADGET is not set
859
860#
861# MMC/SD Card support
862#
863# CONFIG_MMC is not set
864
865#
866# InfiniBand support
867#
868# CONFIG_INFINIBAND is not set
869
870#
871# SN Devices
872#
873
874#
875# File systems
876#
877CONFIG_EXT2_FS=y
878# CONFIG_EXT2_FS_XATTR is not set
879# CONFIG_EXT2_FS_XIP is not set
880CONFIG_EXT3_FS=y
881CONFIG_EXT3_FS_XATTR=y
882# CONFIG_EXT3_FS_POSIX_ACL is not set
883# CONFIG_EXT3_FS_SECURITY is not set
884CONFIG_JBD=y
885# CONFIG_JBD_DEBUG is not set
886CONFIG_FS_MBCACHE=y
887# CONFIG_REISERFS_FS is not set
888# CONFIG_JFS_FS is not set
889CONFIG_FS_POSIX_ACL=y
890# CONFIG_XFS_FS is not set
891CONFIG_MINIX_FS=y
892# CONFIG_ROMFS_FS is not set
893CONFIG_INOTIFY=y
894# CONFIG_QUOTA is not set
895CONFIG_DNOTIFY=y
896# CONFIG_AUTOFS_FS is not set
897# CONFIG_AUTOFS4_FS is not set
898# CONFIG_FUSE_FS is not set
899
900#
901# CD-ROM/DVD Filesystems
902#
903# CONFIG_ISO9660_FS is not set
904# CONFIG_UDF_FS is not set
905
906#
907# DOS/FAT/NT Filesystems
908#
909CONFIG_FAT_FS=y
910CONFIG_MSDOS_FS=y
911CONFIG_VFAT_FS=y
912CONFIG_FAT_DEFAULT_CODEPAGE=437
913CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
914CONFIG_NTFS_FS=y
915# CONFIG_NTFS_DEBUG is not set
916CONFIG_NTFS_RW=y
917
918#
919# Pseudo filesystems
920#
921CONFIG_PROC_FS=y
922CONFIG_PROC_KCORE=y
923CONFIG_SYSFS=y
924# CONFIG_TMPFS is not set
925CONFIG_HUGETLBFS=y
926CONFIG_HUGETLB_PAGE=y
927CONFIG_RAMFS=y
928# CONFIG_RELAYFS_FS is not set
929
930#
931# Miscellaneous filesystems
932#
933# CONFIG_ADFS_FS is not set
934# CONFIG_AFFS_FS is not set
935# CONFIG_HFS_FS is not set
936# CONFIG_HFSPLUS_FS is not set
937# CONFIG_BEFS_FS is not set
938# CONFIG_BFS_FS is not set
939# CONFIG_EFS_FS is not set
940# CONFIG_CRAMFS is not set
941# CONFIG_VXFS_FS is not set
942# CONFIG_HPFS_FS is not set
943# CONFIG_QNX4FS_FS is not set
944# CONFIG_SYSV_FS is not set
945# CONFIG_UFS_FS is not set
946
947#
948# Network File Systems
949#
950CONFIG_NFS_FS=y
951CONFIG_NFS_V3=y
952# CONFIG_NFS_V3_ACL is not set
953CONFIG_NFS_V4=y
954# CONFIG_NFS_DIRECTIO is not set
955CONFIG_NFSD=y
956CONFIG_NFSD_V3=y
957# CONFIG_NFSD_V3_ACL is not set
958CONFIG_NFSD_V4=y
959CONFIG_NFSD_TCP=y
960CONFIG_ROOT_NFS=y
961CONFIG_LOCKD=y
962CONFIG_LOCKD_V4=y
963CONFIG_EXPORTFS=y
964CONFIG_NFS_COMMON=y
965CONFIG_SUNRPC=y
966CONFIG_SUNRPC_GSS=y
967CONFIG_RPCSEC_GSS_KRB5=y
968# CONFIG_RPCSEC_GSS_SPKM3 is not set
969# CONFIG_SMB_FS is not set
970# CONFIG_CIFS is not set
971# CONFIG_NCP_FS is not set
972# CONFIG_CODA_FS is not set
973# CONFIG_AFS_FS is not set
974# CONFIG_9P_FS is not set
975
976#
977# Partition Types
978#
979# CONFIG_PARTITION_ADVANCED is not set
980CONFIG_MSDOS_PARTITION=y
981
982#
983# Native Language Support
984#
985CONFIG_NLS=y
986CONFIG_NLS_DEFAULT="iso8859-1"
987CONFIG_NLS_CODEPAGE_437=y
988# CONFIG_NLS_CODEPAGE_737 is not set
989# CONFIG_NLS_CODEPAGE_775 is not set
990# CONFIG_NLS_CODEPAGE_850 is not set
991# CONFIG_NLS_CODEPAGE_852 is not set
992# CONFIG_NLS_CODEPAGE_855 is not set
993# CONFIG_NLS_CODEPAGE_857 is not set
994# CONFIG_NLS_CODEPAGE_860 is not set
995# CONFIG_NLS_CODEPAGE_861 is not set
996# CONFIG_NLS_CODEPAGE_862 is not set
997# CONFIG_NLS_CODEPAGE_863 is not set
998# CONFIG_NLS_CODEPAGE_864 is not set
999# CONFIG_NLS_CODEPAGE_865 is not set
1000# CONFIG_NLS_CODEPAGE_866 is not set
1001# CONFIG_NLS_CODEPAGE_869 is not set
1002# CONFIG_NLS_CODEPAGE_936 is not set
1003# CONFIG_NLS_CODEPAGE_950 is not set
1004CONFIG_NLS_CODEPAGE_932=y
1005# CONFIG_NLS_CODEPAGE_949 is not set
1006# CONFIG_NLS_CODEPAGE_874 is not set
1007# CONFIG_NLS_ISO8859_8 is not set
1008# CONFIG_NLS_CODEPAGE_1250 is not set
1009# CONFIG_NLS_CODEPAGE_1251 is not set
1010# CONFIG_NLS_ASCII is not set
1011CONFIG_NLS_ISO8859_1=y
1012# CONFIG_NLS_ISO8859_2 is not set
1013# CONFIG_NLS_ISO8859_3 is not set
1014# CONFIG_NLS_ISO8859_4 is not set
1015# CONFIG_NLS_ISO8859_5 is not set
1016# CONFIG_NLS_ISO8859_6 is not set
1017# CONFIG_NLS_ISO8859_7 is not set
1018# CONFIG_NLS_ISO8859_9 is not set
1019# CONFIG_NLS_ISO8859_13 is not set
1020# CONFIG_NLS_ISO8859_14 is not set
1021# CONFIG_NLS_ISO8859_15 is not set
1022# CONFIG_NLS_KOI8_R is not set
1023# CONFIG_NLS_KOI8_U is not set
1024# CONFIG_NLS_UTF8 is not set
1025
1026#
1027# Profiling support
1028#
1029# CONFIG_PROFILING is not set
1030
1031#
1032# Kernel hacking
1033#
1034# CONFIG_PRINTK_TIME is not set
1035CONFIG_DEBUG_KERNEL=y
1036# CONFIG_MAGIC_SYSRQ is not set
1037CONFIG_LOG_BUF_SHIFT=14
1038CONFIG_DETECT_SOFTLOCKUP=y
1039# CONFIG_SCHEDSTATS is not set
1040# CONFIG_DEBUG_SLAB is not set
1041CONFIG_DEBUG_PREEMPT=y
1042CONFIG_DEBUG_SPINLOCK=y
1043# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1044# CONFIG_DEBUG_KOBJECT is not set
1045# CONFIG_DEBUG_INFO is not set
1046CONFIG_DEBUG_FS=y
1047# CONFIG_DEBUG_VM is not set
1048CONFIG_FRAME_POINTER=y
1049# CONFIG_RCU_TORTURE_TEST is not set
1050# CONFIG_SH_STANDARD_BIOS is not set
1051# CONFIG_EARLY_SCIF_CONSOLE is not set
1052# CONFIG_KGDB is not set
1053
1054#
1055# Security options
1056#
1057# CONFIG_KEYS is not set
1058# CONFIG_SECURITY is not set
1059
1060#
1061# Cryptographic options
1062#
1063CONFIG_CRYPTO=y
1064CONFIG_CRYPTO_HMAC=y
1065# CONFIG_CRYPTO_NULL is not set
1066# CONFIG_CRYPTO_MD4 is not set
1067CONFIG_CRYPTO_MD5=y
1068# CONFIG_CRYPTO_SHA1 is not set
1069# CONFIG_CRYPTO_SHA256 is not set
1070# CONFIG_CRYPTO_SHA512 is not set
1071# CONFIG_CRYPTO_WP512 is not set
1072# CONFIG_CRYPTO_TGR192 is not set
1073CONFIG_CRYPTO_DES=y
1074# CONFIG_CRYPTO_BLOWFISH is not set
1075# CONFIG_CRYPTO_TWOFISH is not set
1076# CONFIG_CRYPTO_SERPENT is not set
1077# CONFIG_CRYPTO_AES is not set
1078# CONFIG_CRYPTO_CAST5 is not set
1079# CONFIG_CRYPTO_CAST6 is not set
1080# CONFIG_CRYPTO_TEA is not set
1081# CONFIG_CRYPTO_ARC4 is not set
1082# CONFIG_CRYPTO_KHAZAD is not set
1083# CONFIG_CRYPTO_ANUBIS is not set
1084# CONFIG_CRYPTO_DEFLATE is not set
1085# CONFIG_CRYPTO_MICHAEL_MIC is not set
1086# CONFIG_CRYPTO_CRC32C is not set
1087# CONFIG_CRYPTO_TEST is not set
1088
1089#
1090# Hardware crypto devices
1091#
1092
1093#
1094# Library routines
1095#
1096# CONFIG_CRC_CCITT is not set
1097# CONFIG_CRC16 is not set
1098CONFIG_CRC32=y
1099# CONFIG_LIBCRC32C is not set
diff --git a/arch/sh/configs/se73180_defconfig b/arch/sh/configs/se73180_defconfig
index d217e44c89a6..fe19feb95ca9 100644
--- a/arch/sh/configs/se73180_defconfig
+++ b/arch/sh/configs/se73180_defconfig
@@ -78,6 +78,7 @@ CONFIG_SH_73180_SOLUTION_ENGINE=y
78# CONFIG_SH_SECUREEDGE5410 is not set 78# CONFIG_SH_SECUREEDGE5410 is not set
79# CONFIG_SH_HS7751RVOIP is not set 79# CONFIG_SH_HS7751RVOIP is not set
80# CONFIG_SH_RTS7751R2D is not set 80# CONFIG_SH_RTS7751R2D is not set
81# CONFIG_SH_R7780RP is not set
81# CONFIG_SH_EDOSK7705 is not set 82# CONFIG_SH_EDOSK7705 is not set
82# CONFIG_SH_SH4202_MICRODEV is not set 83# CONFIG_SH_SH4202_MICRODEV is not set
83# CONFIG_SH_UNKNOWN is not set 84# CONFIG_SH_UNKNOWN is not set
diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig
new file mode 100644
index 000000000000..948e507b52be
--- /dev/null
+++ b/arch/sh/configs/se7343_defconfig
@@ -0,0 +1,997 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.17
4# Mon Aug 7 20:14:44 2006
5#
6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_FIND_NEXT_BIT=y
9CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y
13
14#
15# Code maturity level options
16#
17CONFIG_EXPERIMENTAL=y
18CONFIG_BROKEN_ON_SMP=y
19CONFIG_INIT_ENV_ARG_LIMIT=32
20
21#
22# General setup
23#
24CONFIG_LOCALVERSION=""
25CONFIG_LOCALVERSION_AUTO=y
26# CONFIG_SWAP is not set
27CONFIG_SYSVIPC=y
28CONFIG_POSIX_MQUEUE=y
29# CONFIG_BSD_PROCESS_ACCT is not set
30CONFIG_SYSCTL=y
31# CONFIG_AUDIT is not set
32# CONFIG_IKCONFIG is not set
33# CONFIG_RELAY is not set
34CONFIG_INITRAMFS_SOURCE=""
35CONFIG_UID16=y
36CONFIG_CC_OPTIMIZE_FOR_SIZE=y
37CONFIG_EMBEDDED=y
38CONFIG_KALLSYMS=y
39# CONFIG_KALLSYMS_EXTRA_PASS is not set
40CONFIG_HOTPLUG=y
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_ELF_CORE=y
44CONFIG_BASE_FULL=y
45# CONFIG_FUTEX is not set
46# CONFIG_EPOLL is not set
47# CONFIG_SHMEM is not set
48CONFIG_SLAB=y
49CONFIG_TINY_SHMEM=y
50CONFIG_BASE_SMALL=0
51# CONFIG_SLOB is not set
52CONFIG_OBSOLETE_INTERMODULE=y
53
54#
55# Loadable module support
56#
57CONFIG_MODULES=y
58CONFIG_MODULE_UNLOAD=y
59CONFIG_MODULE_FORCE_UNLOAD=y
60# CONFIG_MODVERSIONS is not set
61# CONFIG_MODULE_SRCVERSION_ALL is not set
62# CONFIG_KMOD is not set
63
64#
65# Block layer
66#
67# CONFIG_LBD is not set
68# CONFIG_BLK_DEV_IO_TRACE is not set
69# CONFIG_LSF is not set
70
71#
72# IO Schedulers
73#
74CONFIG_IOSCHED_NOOP=y
75# CONFIG_IOSCHED_AS is not set
76CONFIG_IOSCHED_DEADLINE=y
77# CONFIG_IOSCHED_CFQ is not set
78# CONFIG_DEFAULT_AS is not set
79CONFIG_DEFAULT_DEADLINE=y
80# CONFIG_DEFAULT_CFQ is not set
81# CONFIG_DEFAULT_NOOP is not set
82CONFIG_DEFAULT_IOSCHED="deadline"
83
84#
85# System type
86#
87CONFIG_SOLUTION_ENGINE=y
88# CONFIG_SH_SOLUTION_ENGINE is not set
89# CONFIG_SH_7751_SOLUTION_ENGINE is not set
90# CONFIG_SH_7300_SOLUTION_ENGINE is not set
91CONFIG_SH_7343_SOLUTION_ENGINE=y
92# CONFIG_SH_73180_SOLUTION_ENGINE is not set
93# CONFIG_SH_7751_SYSTEMH is not set
94# CONFIG_SH_HP6XX is not set
95# CONFIG_SH_EC3104 is not set
96# CONFIG_SH_SATURN is not set
97# CONFIG_SH_DREAMCAST is not set
98# CONFIG_SH_BIGSUR is not set
99# CONFIG_SH_MPC1211 is not set
100# CONFIG_SH_SH03 is not set
101# CONFIG_SH_SECUREEDGE5410 is not set
102# CONFIG_SH_HS7751RVOIP is not set
103# CONFIG_SH_7710VOIPGW is not set
104# CONFIG_SH_RTS7751R2D is not set
105# CONFIG_SH_R7780RP is not set
106# CONFIG_SH_EDOSK7705 is not set
107# CONFIG_SH_SH4202_MICRODEV is not set
108# CONFIG_SH_LANDISK is not set
109# CONFIG_SH_TITAN is not set
110# CONFIG_SH_SHMIN is not set
111# CONFIG_SH_UNKNOWN is not set
112
113#
114# Processor selection
115#
116CONFIG_CPU_SH4=y
117CONFIG_CPU_SH4A=y
118
119#
120# SH-2 Processor Support
121#
122# CONFIG_CPU_SUBTYPE_SH7604 is not set
123
124#
125# SH-3 Processor Support
126#
127# CONFIG_CPU_SUBTYPE_SH7300 is not set
128# CONFIG_CPU_SUBTYPE_SH7705 is not set
129# CONFIG_CPU_SUBTYPE_SH7706 is not set
130# CONFIG_CPU_SUBTYPE_SH7707 is not set
131# CONFIG_CPU_SUBTYPE_SH7708 is not set
132# CONFIG_CPU_SUBTYPE_SH7709 is not set
133# CONFIG_CPU_SUBTYPE_SH7710 is not set
134
135#
136# SH-4 Processor Support
137#
138# CONFIG_CPU_SUBTYPE_SH7750 is not set
139# CONFIG_CPU_SUBTYPE_SH7091 is not set
140# CONFIG_CPU_SUBTYPE_SH7750R is not set
141# CONFIG_CPU_SUBTYPE_SH7750S is not set
142# CONFIG_CPU_SUBTYPE_SH7751 is not set
143# CONFIG_CPU_SUBTYPE_SH7751R is not set
144# CONFIG_CPU_SUBTYPE_SH7760 is not set
145# CONFIG_CPU_SUBTYPE_SH4_202 is not set
146
147#
148# ST40 Processor Support
149#
150# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
151# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
152
153#
154# SH-4A Processor Support
155#
156# CONFIG_CPU_SUBTYPE_SH73180 is not set
157CONFIG_CPU_SUBTYPE_SH7343=y
158# CONFIG_CPU_SUBTYPE_SH7770 is not set
159# CONFIG_CPU_SUBTYPE_SH7780 is not set
160
161#
162# Memory management options
163#
164CONFIG_MMU=y
165CONFIG_PAGE_OFFSET=0x80000000
166CONFIG_MEMORY_START=0x0c000000
167CONFIG_MEMORY_SIZE=0x01000000
168CONFIG_32BIT=y
169CONFIG_SELECT_MEMORY_MODEL=y
170CONFIG_FLATMEM_MANUAL=y
171# CONFIG_DISCONTIGMEM_MANUAL is not set
172# CONFIG_SPARSEMEM_MANUAL is not set
173CONFIG_FLATMEM=y
174CONFIG_FLAT_NODE_MEM_MAP=y
175# CONFIG_SPARSEMEM_STATIC is not set
176CONFIG_SPLIT_PTLOCK_CPUS=4
177
178#
179# Cache configuration
180#
181# CONFIG_SH_DIRECT_MAPPED is not set
182# CONFIG_SH_WRITETHROUGH is not set
183# CONFIG_SH_OCRAM is not set
184
185#
186# Processor features
187#
188CONFIG_CPU_LITTLE_ENDIAN=y
189# CONFIG_SH_FPU is not set
190# CONFIG_SH_FPU_EMU is not set
191CONFIG_SH_DSP=y
192# CONFIG_SH_STORE_QUEUES is not set
193CONFIG_CPU_HAS_INTEVT=y
194CONFIG_CPU_HAS_SR_RB=y
195
196#
197# Timer support
198#
199CONFIG_SH_TMU=y
200CONFIG_SH_PCLK_FREQ=27000000
201
202#
203# CPU Frequency scaling
204#
205# CONFIG_CPU_FREQ is not set
206
207#
208# DMA support
209#
210# CONFIG_SH_DMA is not set
211
212#
213# Companion Chips
214#
215# CONFIG_HD6446X_SERIES is not set
216CONFIG_HEARTBEAT=y
217
218#
219# Kernel features
220#
221# CONFIG_HZ_100 is not set
222CONFIG_HZ_250=y
223# CONFIG_HZ_1000 is not set
224CONFIG_HZ=250
225# CONFIG_KEXEC is not set
226# CONFIG_SMP is not set
227CONFIG_PREEMPT_NONE=y
228# CONFIG_PREEMPT_VOLUNTARY is not set
229# CONFIG_PREEMPT is not set
230
231#
232# Boot options
233#
234CONFIG_ZERO_PAGE_OFFSET=0x00001000
235CONFIG_BOOT_LINK_OFFSET=0x00800000
236# CONFIG_UBC_WAKEUP is not set
237# CONFIG_CMDLINE_BOOL is not set
238
239#
240# Bus options
241#
242# CONFIG_PCI is not set
243
244#
245# PCCARD (PCMCIA/CardBus) support
246#
247# CONFIG_PCCARD is not set
248
249#
250# PCI Hotplug Support
251#
252
253#
254# Executable file formats
255#
256CONFIG_BINFMT_ELF=y
257# CONFIG_BINFMT_FLAT is not set
258# CONFIG_BINFMT_MISC is not set
259
260#
261# Power management options (EXPERIMENTAL)
262#
263# CONFIG_PM is not set
264
265#
266# Networking
267#
268CONFIG_NET=y
269
270#
271# Networking options
272#
273# CONFIG_NETDEBUG is not set
274CONFIG_PACKET=y
275CONFIG_PACKET_MMAP=y
276CONFIG_UNIX=y
277# CONFIG_NET_KEY is not set
278CONFIG_INET=y
279# CONFIG_IP_MULTICAST is not set
280# CONFIG_IP_ADVANCED_ROUTER is not set
281CONFIG_IP_FIB_HASH=y
282CONFIG_IP_PNP=y
283CONFIG_IP_PNP_DHCP=y
284# CONFIG_IP_PNP_BOOTP is not set
285# CONFIG_IP_PNP_RARP is not set
286# CONFIG_NET_IPIP is not set
287# CONFIG_NET_IPGRE is not set
288# CONFIG_ARPD is not set
289CONFIG_SYN_COOKIES=y
290# CONFIG_INET_AH is not set
291# CONFIG_INET_ESP is not set
292# CONFIG_INET_IPCOMP is not set
293# CONFIG_INET_XFRM_TUNNEL is not set
294# CONFIG_INET_TUNNEL is not set
295# CONFIG_INET_DIAG is not set
296# CONFIG_TCP_CONG_ADVANCED is not set
297CONFIG_TCP_CONG_BIC=y
298# CONFIG_IPV6 is not set
299# CONFIG_INET6_XFRM_TUNNEL is not set
300# CONFIG_INET6_TUNNEL is not set
301# CONFIG_NETFILTER is not set
302
303#
304# DCCP Configuration (EXPERIMENTAL)
305#
306# CONFIG_IP_DCCP is not set
307
308#
309# SCTP Configuration (EXPERIMENTAL)
310#
311# CONFIG_IP_SCTP is not set
312
313#
314# TIPC Configuration (EXPERIMENTAL)
315#
316# CONFIG_TIPC is not set
317# CONFIG_ATM is not set
318# CONFIG_BRIDGE is not set
319# CONFIG_VLAN_8021Q is not set
320# CONFIG_DECNET is not set
321# CONFIG_LLC2 is not set
322# CONFIG_IPX is not set
323# CONFIG_ATALK is not set
324# CONFIG_X25 is not set
325# CONFIG_LAPB is not set
326# CONFIG_NET_DIVERT is not set
327# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set
329
330#
331# QoS and/or fair queueing
332#
333# CONFIG_NET_SCHED is not set
334
335#
336# Network testing
337#
338# CONFIG_NET_PKTGEN is not set
339# CONFIG_HAMRADIO is not set
340# CONFIG_IRDA is not set
341# CONFIG_BT is not set
342# CONFIG_IEEE80211 is not set
343
344#
345# Device Drivers
346#
347
348#
349# Generic Driver Options
350#
351CONFIG_STANDALONE=y
352CONFIG_PREVENT_FIRMWARE_BUILD=y
353CONFIG_FW_LOADER=y
354
355#
356# Connector - unified userspace <-> kernelspace linker
357#
358# CONFIG_CONNECTOR is not set
359
360#
361# Memory Technology Devices (MTD)
362#
363CONFIG_MTD=y
364# CONFIG_MTD_DEBUG is not set
365CONFIG_MTD_CONCAT=y
366CONFIG_MTD_PARTITIONS=y
367# CONFIG_MTD_REDBOOT_PARTS is not set
368# CONFIG_MTD_CMDLINE_PARTS is not set
369
370#
371# User Modules And Translation Layers
372#
373CONFIG_MTD_CHAR=y
374CONFIG_MTD_BLOCK=y
375# CONFIG_FTL is not set
376# CONFIG_NFTL is not set
377# CONFIG_INFTL is not set
378# CONFIG_RFD_FTL is not set
379
380#
381# RAM/ROM/Flash chip drivers
382#
383CONFIG_MTD_CFI=y
384# CONFIG_MTD_JEDECPROBE is not set
385CONFIG_MTD_GEN_PROBE=y
386# CONFIG_MTD_CFI_ADV_OPTIONS is not set
387CONFIG_MTD_MAP_BANK_WIDTH_1=y
388CONFIG_MTD_MAP_BANK_WIDTH_2=y
389CONFIG_MTD_MAP_BANK_WIDTH_4=y
390# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
391# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
392# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
393CONFIG_MTD_CFI_I1=y
394CONFIG_MTD_CFI_I2=y
395# CONFIG_MTD_CFI_I4 is not set
396# CONFIG_MTD_CFI_I8 is not set
397# CONFIG_MTD_CFI_INTELEXT is not set
398CONFIG_MTD_CFI_AMDSTD=y
399# CONFIG_MTD_CFI_STAA is not set
400CONFIG_MTD_CFI_UTIL=y
401CONFIG_MTD_RAM=y
402# CONFIG_MTD_ROM is not set
403# CONFIG_MTD_ABSENT is not set
404# CONFIG_MTD_OBSOLETE_CHIPS is not set
405
406#
407# Mapping drivers for chip access
408#
409# CONFIG_MTD_COMPLEX_MAPPINGS is not set
410# CONFIG_MTD_PHYSMAP is not set
411# CONFIG_MTD_SOLUTIONENGINE is not set
412# CONFIG_MTD_PLATRAM is not set
413
414#
415# Self-contained MTD device drivers
416#
417# CONFIG_MTD_SLRAM is not set
418# CONFIG_MTD_PHRAM is not set
419# CONFIG_MTD_MTDRAM is not set
420# CONFIG_MTD_BLOCK2MTD is not set
421
422#
423# Disk-On-Chip Device Drivers
424#
425# CONFIG_MTD_DOC2000 is not set
426# CONFIG_MTD_DOC2001 is not set
427# CONFIG_MTD_DOC2001PLUS is not set
428
429#
430# NAND Flash Device Drivers
431#
432# CONFIG_MTD_NAND is not set
433
434#
435# OneNAND Flash Device Drivers
436#
437# CONFIG_MTD_ONENAND is not set
438
439#
440# Parallel port support
441#
442# CONFIG_PARPORT is not set
443
444#
445# Plug and Play support
446#
447
448#
449# Block devices
450#
451# CONFIG_BLK_DEV_COW_COMMON is not set
452# CONFIG_BLK_DEV_LOOP is not set
453# CONFIG_BLK_DEV_NBD is not set
454# CONFIG_BLK_DEV_RAM is not set
455# CONFIG_BLK_DEV_INITRD is not set
456# CONFIG_CDROM_PKTCDVD is not set
457# CONFIG_ATA_OVER_ETH is not set
458
459#
460# ATA/ATAPI/MFM/RLL support
461#
462# CONFIG_IDE is not set
463
464#
465# SCSI device support
466#
467# CONFIG_RAID_ATTRS is not set
468# CONFIG_SCSI is not set
469
470#
471# Multi-device support (RAID and LVM)
472#
473# CONFIG_MD is not set
474
475#
476# Fusion MPT device support
477#
478# CONFIG_FUSION is not set
479
480#
481# IEEE 1394 (FireWire) support
482#
483
484#
485# I2O device support
486#
487
488#
489# Network device support
490#
491CONFIG_NETDEVICES=y
492# CONFIG_DUMMY is not set
493# CONFIG_BONDING is not set
494# CONFIG_EQUALIZER is not set
495# CONFIG_TUN is not set
496
497#
498# PHY device support
499#
500# CONFIG_PHYLIB is not set
501
502#
503# Ethernet (10 or 100Mbit)
504#
505CONFIG_NET_ETHERNET=y
506CONFIG_MII=y
507# CONFIG_STNIC is not set
508CONFIG_SMC91X=y
509# CONFIG_NE2000 is not set
510
511#
512# Ethernet (1000 Mbit)
513#
514
515#
516# Ethernet (10000 Mbit)
517#
518
519#
520# Token Ring devices
521#
522
523#
524# Wireless LAN (non-hamradio)
525#
526# CONFIG_NET_RADIO is not set
527
528#
529# Wan interfaces
530#
531# CONFIG_WAN is not set
532# CONFIG_PPP is not set
533# CONFIG_SLIP is not set
534# CONFIG_SHAPER is not set
535# CONFIG_NETCONSOLE is not set
536# CONFIG_NETPOLL is not set
537# CONFIG_NET_POLL_CONTROLLER is not set
538
539#
540# ISDN subsystem
541#
542# CONFIG_ISDN is not set
543
544#
545# Telephony Support
546#
547# CONFIG_PHONE is not set
548
549#
550# Input device support
551#
552CONFIG_INPUT=y
553
554#
555# Userland interfaces
556#
557# CONFIG_INPUT_MOUSEDEV is not set
558# CONFIG_INPUT_JOYDEV is not set
559# CONFIG_INPUT_TSDEV is not set
560# CONFIG_INPUT_EVDEV is not set
561# CONFIG_INPUT_EVBUG is not set
562
563#
564# Input Device Drivers
565#
566# CONFIG_INPUT_KEYBOARD is not set
567# CONFIG_INPUT_MOUSE is not set
568# CONFIG_INPUT_JOYSTICK is not set
569# CONFIG_INPUT_TOUCHSCREEN is not set
570# CONFIG_INPUT_MISC is not set
571
572#
573# Hardware I/O ports
574#
575# CONFIG_SERIO is not set
576# CONFIG_GAMEPORT is not set
577
578#
579# Character devices
580#
581CONFIG_VT=y
582CONFIG_VT_CONSOLE=y
583CONFIG_HW_CONSOLE=y
584# CONFIG_SERIAL_NONSTANDARD is not set
585
586#
587# Serial drivers
588#
589# CONFIG_SERIAL_8250 is not set
590
591#
592# Non-8250 serial port support
593#
594CONFIG_SERIAL_SH_SCI=y
595CONFIG_SERIAL_SH_SCI_NR_UARTS=2
596CONFIG_SERIAL_SH_SCI_CONSOLE=y
597CONFIG_SERIAL_CORE=y
598CONFIG_SERIAL_CORE_CONSOLE=y
599# CONFIG_UNIX98_PTYS is not set
600CONFIG_LEGACY_PTYS=y
601CONFIG_LEGACY_PTY_COUNT=256
602
603#
604# IPMI
605#
606# CONFIG_IPMI_HANDLER is not set
607
608#
609# Watchdog Cards
610#
611# CONFIG_WATCHDOG is not set
612# CONFIG_RTC is not set
613# CONFIG_GEN_RTC is not set
614# CONFIG_DTLK is not set
615# CONFIG_R3964 is not set
616
617#
618# Ftape, the floppy tape device driver
619#
620# CONFIG_RAW_DRIVER is not set
621
622#
623# TPM devices
624#
625# CONFIG_TCG_TPM is not set
626# CONFIG_TELCLOCK is not set
627
628#
629# I2C support
630#
631CONFIG_I2C=y
632CONFIG_I2C_CHARDEV=y
633
634#
635# I2C Algorithms
636#
637# CONFIG_I2C_ALGOBIT is not set
638# CONFIG_I2C_ALGOPCF is not set
639# CONFIG_I2C_ALGOPCA is not set
640
641#
642# I2C Hardware Bus support
643#
644# CONFIG_I2C_PARPORT_LIGHT is not set
645# CONFIG_I2C_STUB is not set
646# CONFIG_I2C_PCA_ISA is not set
647CONFIG_I2C_SH7343=y
648
649#
650# Miscellaneous I2C Chip support
651#
652# CONFIG_SENSORS_DS1337 is not set
653# CONFIG_SENSORS_DS1374 is not set
654# CONFIG_SENSORS_EEPROM is not set
655# CONFIG_SENSORS_PCF8574 is not set
656# CONFIG_SENSORS_PCA9539 is not set
657# CONFIG_SENSORS_PCF8591 is not set
658# CONFIG_SENSORS_MAX6875 is not set
659# CONFIG_I2C_DEBUG_CORE is not set
660# CONFIG_I2C_DEBUG_ALGO is not set
661# CONFIG_I2C_DEBUG_BUS is not set
662# CONFIG_I2C_DEBUG_CHIP is not set
663
664#
665# SPI support
666#
667# CONFIG_SPI is not set
668# CONFIG_SPI_MASTER is not set
669
670#
671# Dallas's 1-wire bus
672#
673# CONFIG_W1 is not set
674
675#
676# Hardware Monitoring support
677#
678# CONFIG_HWMON is not set
679# CONFIG_HWMON_VID is not set
680
681#
682# Misc devices
683#
684
685#
686# Multimedia devices
687#
688CONFIG_VIDEO_DEV=y
689CONFIG_VIDEO_V4L1=y
690CONFIG_VIDEO_V4L1_COMPAT=y
691CONFIG_VIDEO_V4L2=y
692
693#
694# Video Capture Adapters
695#
696
697#
698# Video Capture Adapters
699#
700# CONFIG_VIDEO_ADV_DEBUG is not set
701# CONFIG_VIDEO_VIVI is not set
702# CONFIG_VIDEO_CPIA is not set
703# CONFIG_VIDEO_SAA5246A is not set
704# CONFIG_VIDEO_SAA5249 is not set
705# CONFIG_TUNER_3036 is not set
706# CONFIG_VIDEO_OVCAMCHIP is not set
707
708#
709# Encoders and Decoders
710#
711# CONFIG_VIDEO_MSP3400 is not set
712# CONFIG_VIDEO_CS53L32A is not set
713# CONFIG_VIDEO_WM8775 is not set
714# CONFIG_VIDEO_WM8739 is not set
715# CONFIG_VIDEO_CX25840 is not set
716# CONFIG_VIDEO_SAA711X is not set
717# CONFIG_VIDEO_SAA7127 is not set
718# CONFIG_VIDEO_UPD64031A is not set
719# CONFIG_VIDEO_UPD64083 is not set
720
721#
722# Radio Adapters
723#
724# CONFIG_RADIO_MAESTRO is not set
725
726#
727# Digital Video Broadcasting Devices
728#
729# CONFIG_DVB is not set
730
731#
732# Graphics support
733#
734CONFIG_FB=y
735# CONFIG_FB_CFB_FILLRECT is not set
736# CONFIG_FB_CFB_COPYAREA is not set
737# CONFIG_FB_CFB_IMAGEBLIT is not set
738# CONFIG_FB_MACMODES is not set
739CONFIG_FB_FIRMWARE_EDID=y
740# CONFIG_FB_MODE_HELPERS is not set
741# CONFIG_FB_TILEBLITTING is not set
742# CONFIG_FB_EPSON1355 is not set
743# CONFIG_FB_S1D13XXX is not set
744# CONFIG_FB_VIRTUAL is not set
745
746#
747# Console display driver support
748#
749CONFIG_DUMMY_CONSOLE=y
750# CONFIG_FRAMEBUFFER_CONSOLE is not set
751
752#
753# Logo configuration
754#
755# CONFIG_LOGO is not set
756# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
757
758#
759# Sound
760#
761CONFIG_SOUND=y
762
763#
764# Advanced Linux Sound Architecture
765#
766CONFIG_SND=y
767CONFIG_SND_TIMER=y
768CONFIG_SND_PCM=y
769CONFIG_SND_SEQUENCER=y
770# CONFIG_SND_SEQ_DUMMY is not set
771CONFIG_SND_OSSEMUL=y
772# CONFIG_SND_MIXER_OSS is not set
773CONFIG_SND_PCM_OSS=y
774CONFIG_SND_PCM_OSS_PLUGINS=y
775# CONFIG_SND_SEQUENCER_OSS is not set
776# CONFIG_SND_DYNAMIC_MINORS is not set
777CONFIG_SND_SUPPORT_OLD_API=y
778CONFIG_SND_VERBOSE_PROCFS=y
779# CONFIG_SND_VERBOSE_PRINTK is not set
780# CONFIG_SND_DEBUG is not set
781
782#
783# Generic devices
784#
785# CONFIG_SND_DUMMY is not set
786# CONFIG_SND_VIRMIDI is not set
787# CONFIG_SND_MTPAV is not set
788# CONFIG_SND_SERIAL_U16550 is not set
789# CONFIG_SND_MPU401 is not set
790
791#
792# SuperH devices
793#
794CONFIG_SH7343_SIU=m
795CONFIG_AK4537_CODEC=y
796
797#
798# Open Sound System
799#
800# CONFIG_SOUND_PRIME is not set
801
802#
803# USB support
804#
805# CONFIG_USB_ARCH_HAS_HCD is not set
806# CONFIG_USB_ARCH_HAS_OHCI is not set
807# CONFIG_USB_ARCH_HAS_EHCI is not set
808
809#
810# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
811#
812
813#
814# USB Gadget Support
815#
816# CONFIG_USB_GADGET is not set
817
818#
819# MMC/SD Card support
820#
821# CONFIG_MMC is not set
822
823#
824# LED devices
825#
826# CONFIG_NEW_LEDS is not set
827
828#
829# LED drivers
830#
831
832#
833# LED Triggers
834#
835
836#
837# InfiniBand support
838#
839
840#
841# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
842#
843
844#
845# Real Time Clock
846#
847# CONFIG_RTC_CLASS is not set
848
849#
850# File systems
851#
852# CONFIG_EXT2_FS is not set
853# CONFIG_EXT3_FS is not set
854# CONFIG_REISERFS_FS is not set
855# CONFIG_JFS_FS is not set
856# CONFIG_FS_POSIX_ACL is not set
857# CONFIG_XFS_FS is not set
858# CONFIG_OCFS2_FS is not set
859# CONFIG_MINIX_FS is not set
860# CONFIG_ROMFS_FS is not set
861# CONFIG_INOTIFY is not set
862# CONFIG_QUOTA is not set
863# CONFIG_DNOTIFY is not set
864# CONFIG_AUTOFS_FS is not set
865# CONFIG_AUTOFS4_FS is not set
866# CONFIG_FUSE_FS is not set
867
868#
869# CD-ROM/DVD Filesystems
870#
871# CONFIG_ISO9660_FS is not set
872# CONFIG_UDF_FS is not set
873
874#
875# DOS/FAT/NT Filesystems
876#
877# CONFIG_MSDOS_FS is not set
878# CONFIG_VFAT_FS is not set
879# CONFIG_NTFS_FS is not set
880
881#
882# Pseudo filesystems
883#
884CONFIG_PROC_FS=y
885# CONFIG_PROC_KCORE is not set
886CONFIG_SYSFS=y
887CONFIG_TMPFS=y
888# CONFIG_HUGETLBFS is not set
889# CONFIG_HUGETLB_PAGE is not set
890CONFIG_RAMFS=y
891# CONFIG_CONFIGFS_FS is not set
892
893#
894# Miscellaneous filesystems
895#
896# CONFIG_ADFS_FS is not set
897# CONFIG_AFFS_FS is not set
898# CONFIG_HFS_FS is not set
899# CONFIG_HFSPLUS_FS is not set
900# CONFIG_BEFS_FS is not set
901# CONFIG_BFS_FS is not set
902# CONFIG_EFS_FS is not set
903# CONFIG_JFFS_FS is not set
904CONFIG_JFFS2_FS=y
905CONFIG_JFFS2_FS_DEBUG=0
906CONFIG_JFFS2_FS_WRITEBUFFER=y
907# CONFIG_JFFS2_SUMMARY is not set
908# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
909CONFIG_JFFS2_ZLIB=y
910CONFIG_JFFS2_RTIME=y
911# CONFIG_JFFS2_RUBIN is not set
912# CONFIG_CRAMFS is not set
913# CONFIG_VXFS_FS is not set
914# CONFIG_HPFS_FS is not set
915# CONFIG_QNX4FS_FS is not set
916# CONFIG_SYSV_FS is not set
917# CONFIG_UFS_FS is not set
918
919#
920# Network File Systems
921#
922CONFIG_NFS_FS=y
923CONFIG_NFS_V3=y
924# CONFIG_NFS_V3_ACL is not set
925# CONFIG_NFS_V4 is not set
926# CONFIG_NFS_DIRECTIO is not set
927CONFIG_NFSD=y
928# CONFIG_NFSD_V3 is not set
929# CONFIG_NFSD_TCP is not set
930CONFIG_ROOT_NFS=y
931CONFIG_LOCKD=y
932CONFIG_LOCKD_V4=y
933CONFIG_EXPORTFS=y
934CONFIG_NFS_COMMON=y
935CONFIG_SUNRPC=y
936# CONFIG_RPCSEC_GSS_KRB5 is not set
937# CONFIG_RPCSEC_GSS_SPKM3 is not set
938# CONFIG_SMB_FS is not set
939# CONFIG_CIFS is not set
940# CONFIG_NCP_FS is not set
941# CONFIG_CODA_FS is not set
942# CONFIG_AFS_FS is not set
943# CONFIG_9P_FS is not set
944
945#
946# Partition Types
947#
948# CONFIG_PARTITION_ADVANCED is not set
949CONFIG_MSDOS_PARTITION=y
950
951#
952# Native Language Support
953#
954# CONFIG_NLS is not set
955
956#
957# Profiling support
958#
959# CONFIG_PROFILING is not set
960
961#
962# Kernel hacking
963#
964# CONFIG_PRINTK_TIME is not set
965# CONFIG_MAGIC_SYSRQ is not set
966# CONFIG_DEBUG_KERNEL is not set
967CONFIG_LOG_BUF_SHIFT=14
968# CONFIG_DEBUG_BUGVERBOSE is not set
969# CONFIG_DEBUG_FS is not set
970# CONFIG_SH_STANDARD_BIOS is not set
971# CONFIG_EARLY_SCIF_CONSOLE is not set
972# CONFIG_KGDB is not set
973
974#
975# Security options
976#
977# CONFIG_KEYS is not set
978# CONFIG_SECURITY is not set
979
980#
981# Cryptographic options
982#
983# CONFIG_CRYPTO is not set
984
985#
986# Hardware crypto devices
987#
988
989#
990# Library routines
991#
992# CONFIG_CRC_CCITT is not set
993# CONFIG_CRC16 is not set
994CONFIG_CRC32=y
995# CONFIG_LIBCRC32C is not set
996CONFIG_ZLIB_INFLATE=y
997CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/sh/configs/sh7710voipgw_defconfig b/arch/sh/configs/sh7710voipgw_defconfig
new file mode 100644
index 000000000000..ec9a3034daa5
--- /dev/null
+++ b/arch/sh/configs/sh7710voipgw_defconfig
@@ -0,0 +1,913 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.17
4# Mon Aug 7 17:07:06 2006
5#
6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_FIND_NEXT_BIT=y
9CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y
13
14#
15# Code maturity level options
16#
17CONFIG_EXPERIMENTAL=y
18CONFIG_BROKEN_ON_SMP=y
19CONFIG_INIT_ENV_ARG_LIMIT=32
20
21#
22# General setup
23#
24CONFIG_LOCALVERSION=""
25CONFIG_LOCALVERSION_AUTO=y
26# CONFIG_SWAP is not set
27CONFIG_SYSVIPC=y
28CONFIG_POSIX_MQUEUE=y
29# CONFIG_BSD_PROCESS_ACCT is not set
30CONFIG_SYSCTL=y
31# CONFIG_AUDIT is not set
32# CONFIG_IKCONFIG is not set
33# CONFIG_RELAY is not set
34CONFIG_INITRAMFS_SOURCE=""
35CONFIG_UID16=y
36CONFIG_CC_OPTIMIZE_FOR_SIZE=y
37CONFIG_EMBEDDED=y
38CONFIG_KALLSYMS=y
39# CONFIG_KALLSYMS_EXTRA_PASS is not set
40CONFIG_HOTPLUG=y
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_ELF_CORE=y
44CONFIG_BASE_FULL=y
45# CONFIG_FUTEX is not set
46# CONFIG_EPOLL is not set
47# CONFIG_SHMEM is not set
48CONFIG_SLAB=y
49CONFIG_TINY_SHMEM=y
50CONFIG_BASE_SMALL=0
51# CONFIG_SLOB is not set
52CONFIG_OBSOLETE_INTERMODULE=y
53
54#
55# Loadable module support
56#
57CONFIG_MODULES=y
58CONFIG_MODULE_UNLOAD=y
59CONFIG_MODULE_FORCE_UNLOAD=y
60# CONFIG_MODVERSIONS is not set
61# CONFIG_MODULE_SRCVERSION_ALL is not set
62# CONFIG_KMOD is not set
63
64#
65# Block layer
66#
67# CONFIG_LBD is not set
68# CONFIG_BLK_DEV_IO_TRACE is not set
69# CONFIG_LSF is not set
70
71#
72# IO Schedulers
73#
74CONFIG_IOSCHED_NOOP=y
75# CONFIG_IOSCHED_AS is not set
76CONFIG_IOSCHED_DEADLINE=y
77# CONFIG_IOSCHED_CFQ is not set
78# CONFIG_DEFAULT_AS is not set
79CONFIG_DEFAULT_DEADLINE=y
80# CONFIG_DEFAULT_CFQ is not set
81# CONFIG_DEFAULT_NOOP is not set
82CONFIG_DEFAULT_IOSCHED="deadline"
83
84#
85# System type
86#
87# CONFIG_SH_SOLUTION_ENGINE is not set
88# CONFIG_SH_7751_SOLUTION_ENGINE is not set
89# CONFIG_SH_7300_SOLUTION_ENGINE is not set
90# CONFIG_SH_73180_SOLUTION_ENGINE is not set
91# CONFIG_SH_7751_SYSTEMH is not set
92# CONFIG_SH_HP6XX is not set
93# CONFIG_SH_EC3104 is not set
94# CONFIG_SH_SATURN is not set
95# CONFIG_SH_DREAMCAST is not set
96# CONFIG_SH_BIGSUR is not set
97# CONFIG_SH_MPC1211 is not set
98# CONFIG_SH_SH03 is not set
99# CONFIG_SH_SECUREEDGE5410 is not set
100# CONFIG_SH_HS7751RVOIP is not set
101CONFIG_SH_7710VOIPGW=y
102# CONFIG_SH_RTS7751R2D is not set
103# CONFIG_SH_R7780RP is not set
104# CONFIG_SH_EDOSK7705 is not set
105# CONFIG_SH_SH4202_MICRODEV is not set
106# CONFIG_SH_LANDISK is not set
107# CONFIG_SH_TITAN is not set
108# CONFIG_SH_SHMIN is not set
109# CONFIG_SH_UNKNOWN is not set
110
111#
112# Processor selection
113#
114CONFIG_CPU_SH3=y
115
116#
117# SH-2 Processor Support
118#
119# CONFIG_CPU_SUBTYPE_SH7604 is not set
120
121#
122# SH-3 Processor Support
123#
124# CONFIG_CPU_SUBTYPE_SH7300 is not set
125# CONFIG_CPU_SUBTYPE_SH7705 is not set
126# CONFIG_CPU_SUBTYPE_SH7706 is not set
127# CONFIG_CPU_SUBTYPE_SH7707 is not set
128# CONFIG_CPU_SUBTYPE_SH7708 is not set
129# CONFIG_CPU_SUBTYPE_SH7709 is not set
130CONFIG_CPU_SUBTYPE_SH7710=y
131
132#
133# SH-4 Processor Support
134#
135# CONFIG_CPU_SUBTYPE_SH7750 is not set
136# CONFIG_CPU_SUBTYPE_SH7091 is not set
137# CONFIG_CPU_SUBTYPE_SH7750R is not set
138# CONFIG_CPU_SUBTYPE_SH7750S is not set
139# CONFIG_CPU_SUBTYPE_SH7751 is not set
140# CONFIG_CPU_SUBTYPE_SH7751R is not set
141# CONFIG_CPU_SUBTYPE_SH7760 is not set
142# CONFIG_CPU_SUBTYPE_SH4_202 is not set
143
144#
145# ST40 Processor Support
146#
147# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
148# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
149
150#
151# SH-4A Processor Support
152#
153# CONFIG_CPU_SUBTYPE_SH73180 is not set
154# CONFIG_CPU_SUBTYPE_SH7770 is not set
155# CONFIG_CPU_SUBTYPE_SH7780 is not set
156
157#
158# Memory management options
159#
160CONFIG_MMU=y
161CONFIG_PAGE_OFFSET=0x80000000
162CONFIG_MEMORY_START=0x0c000000
163CONFIG_MEMORY_SIZE=0x00800000
164CONFIG_SELECT_MEMORY_MODEL=y
165CONFIG_FLATMEM_MANUAL=y
166# CONFIG_DISCONTIGMEM_MANUAL is not set
167# CONFIG_SPARSEMEM_MANUAL is not set
168CONFIG_FLATMEM=y
169CONFIG_FLAT_NODE_MEM_MAP=y
170# CONFIG_SPARSEMEM_STATIC is not set
171CONFIG_SPLIT_PTLOCK_CPUS=4
172
173#
174# Cache configuration
175#
176# CONFIG_SH_DIRECT_MAPPED is not set
177# CONFIG_SH_WRITETHROUGH is not set
178# CONFIG_SH_OCRAM is not set
179
180#
181# Processor features
182#
183CONFIG_CPU_LITTLE_ENDIAN=y
184# CONFIG_SH_FPU_EMU is not set
185CONFIG_SH_DSP=y
186# CONFIG_SH_ADC is not set
187CONFIG_CPU_HAS_INTEVT=y
188CONFIG_CPU_HAS_SR_RB=y
189
190#
191# Timer support
192#
193CONFIG_SH_TMU=y
194CONFIG_SH_PCLK_FREQ=32768000
195
196#
197# CPU Frequency scaling
198#
199# CONFIG_CPU_FREQ is not set
200
201#
202# DMA support
203#
204# CONFIG_SH_DMA is not set
205
206#
207# Companion Chips
208#
209# CONFIG_HD6446X_SERIES is not set
210
211#
212# Kernel features
213#
214# CONFIG_HZ_100 is not set
215CONFIG_HZ_250=y
216# CONFIG_HZ_1000 is not set
217CONFIG_HZ=250
218# CONFIG_KEXEC is not set
219# CONFIG_PREEMPT is not set
220# CONFIG_SMP is not set
221CONFIG_PREEMPT_NONE=y
222# CONFIG_PREEMPT_VOLUNTARY is not set
223
224#
225# Boot options
226#
227CONFIG_ZERO_PAGE_OFFSET=0x00001000
228CONFIG_BOOT_LINK_OFFSET=0x00800000
229# CONFIG_UBC_WAKEUP is not set
230# CONFIG_CMDLINE_BOOL is not set
231
232#
233# Bus options
234#
235# CONFIG_PCI is not set
236
237#
238# PCCARD (PCMCIA/CardBus) support
239#
240# CONFIG_PCCARD is not set
241
242#
243# PCI Hotplug Support
244#
245
246#
247# Executable file formats
248#
249CONFIG_BINFMT_ELF=y
250# CONFIG_BINFMT_FLAT is not set
251# CONFIG_BINFMT_MISC is not set
252
253#
254# Power management options (EXPERIMENTAL)
255#
256# CONFIG_PM is not set
257
258#
259# Networking
260#
261CONFIG_NET=y
262
263#
264# Networking options
265#
266# CONFIG_NETDEBUG is not set
267CONFIG_PACKET=y
268# CONFIG_PACKET_MMAP is not set
269CONFIG_UNIX=y
270# CONFIG_NET_KEY is not set
271CONFIG_INET=y
272# CONFIG_IP_MULTICAST is not set
273# CONFIG_IP_ADVANCED_ROUTER is not set
274CONFIG_IP_FIB_HASH=y
275# CONFIG_IP_PNP is not set
276# CONFIG_NET_IPIP is not set
277# CONFIG_NET_IPGRE is not set
278# CONFIG_ARPD is not set
279CONFIG_SYN_COOKIES=y
280# CONFIG_INET_AH is not set
281# CONFIG_INET_ESP is not set
282# CONFIG_INET_IPCOMP is not set
283# CONFIG_INET_XFRM_TUNNEL is not set
284# CONFIG_INET_TUNNEL is not set
285# CONFIG_INET_DIAG is not set
286# CONFIG_TCP_CONG_ADVANCED is not set
287CONFIG_TCP_CONG_BIC=y
288
289#
290# IP: Virtual Server Configuration
291#
292# CONFIG_IP_VS is not set
293# CONFIG_IPV6 is not set
294# CONFIG_INET6_XFRM_TUNNEL is not set
295# CONFIG_INET6_TUNNEL is not set
296CONFIG_NETFILTER=y
297# CONFIG_NETFILTER_DEBUG is not set
298
299#
300# Core Netfilter Configuration
301#
302# CONFIG_NETFILTER_NETLINK is not set
303# CONFIG_NETFILTER_XTABLES is not set
304
305#
306# IP: Netfilter Configuration
307#
308CONFIG_IP_NF_CONNTRACK=y
309# CONFIG_IP_NF_CT_ACCT is not set
310# CONFIG_IP_NF_CONNTRACK_MARK is not set
311# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
312# CONFIG_IP_NF_CT_PROTO_SCTP is not set
313CONFIG_IP_NF_FTP=m
314# CONFIG_IP_NF_IRC is not set
315# CONFIG_IP_NF_NETBIOS_NS is not set
316# CONFIG_IP_NF_TFTP is not set
317# CONFIG_IP_NF_AMANDA is not set
318CONFIG_IP_NF_PPTP=m
319# CONFIG_IP_NF_H323 is not set
320# CONFIG_IP_NF_QUEUE is not set
321
322#
323# DCCP Configuration (EXPERIMENTAL)
324#
325# CONFIG_IP_DCCP is not set
326
327#
328# SCTP Configuration (EXPERIMENTAL)
329#
330# CONFIG_IP_SCTP is not set
331
332#
333# TIPC Configuration (EXPERIMENTAL)
334#
335# CONFIG_TIPC is not set
336# CONFIG_ATM is not set
337# CONFIG_BRIDGE is not set
338# CONFIG_VLAN_8021Q is not set
339# CONFIG_DECNET is not set
340# CONFIG_LLC2 is not set
341# CONFIG_IPX is not set
342# CONFIG_ATALK is not set
343# CONFIG_X25 is not set
344# CONFIG_LAPB is not set
345# CONFIG_NET_DIVERT is not set
346# CONFIG_ECONET is not set
347# CONFIG_WAN_ROUTER is not set
348
349#
350# QoS and/or fair queueing
351#
352CONFIG_NET_SCHED=y
353CONFIG_NET_SCH_CLK_JIFFIES=y
354# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
355# CONFIG_NET_SCH_CLK_CPU is not set
356
357#
358# Queueing/Scheduling
359#
360CONFIG_NET_SCH_CBQ=y
361# CONFIG_NET_SCH_HTB is not set
362# CONFIG_NET_SCH_HFSC is not set
363# CONFIG_NET_SCH_PRIO is not set
364# CONFIG_NET_SCH_RED is not set
365# CONFIG_NET_SCH_SFQ is not set
366# CONFIG_NET_SCH_TEQL is not set
367# CONFIG_NET_SCH_TBF is not set
368# CONFIG_NET_SCH_GRED is not set
369# CONFIG_NET_SCH_DSMARK is not set
370# CONFIG_NET_SCH_NETEM is not set
371CONFIG_NET_SCH_INGRESS=y
372
373#
374# Classification
375#
376CONFIG_NET_CLS=y
377CONFIG_NET_CLS_BASIC=y
378CONFIG_NET_CLS_TCINDEX=y
379CONFIG_NET_CLS_ROUTE4=y
380CONFIG_NET_CLS_ROUTE=y
381# CONFIG_NET_CLS_FW is not set
382CONFIG_NET_CLS_U32=y
383# CONFIG_CLS_U32_PERF is not set
384# CONFIG_CLS_U32_MARK is not set
385# CONFIG_NET_CLS_RSVP is not set
386# CONFIG_NET_CLS_RSVP6 is not set
387# CONFIG_NET_EMATCH is not set
388# CONFIG_NET_CLS_ACT is not set
389CONFIG_NET_CLS_POLICE=y
390# CONFIG_NET_CLS_IND is not set
391CONFIG_NET_ESTIMATOR=y
392
393#
394# Network testing
395#
396# CONFIG_NET_PKTGEN is not set
397# CONFIG_HAMRADIO is not set
398# CONFIG_IRDA is not set
399# CONFIG_BT is not set
400# CONFIG_IEEE80211 is not set
401
402#
403# Device Drivers
404#
405
406#
407# Generic Driver Options
408#
409CONFIG_STANDALONE=y
410CONFIG_PREVENT_FIRMWARE_BUILD=y
411CONFIG_FW_LOADER=y
412
413#
414# Connector - unified userspace <-> kernelspace linker
415#
416# CONFIG_CONNECTOR is not set
417
418#
419# Memory Technology Devices (MTD)
420#
421CONFIG_MTD=y
422# CONFIG_MTD_DEBUG is not set
423# CONFIG_MTD_CONCAT is not set
424CONFIG_MTD_PARTITIONS=y
425# CONFIG_MTD_REDBOOT_PARTS is not set
426# CONFIG_MTD_CMDLINE_PARTS is not set
427
428#
429# User Modules And Translation Layers
430#
431CONFIG_MTD_CHAR=y
432CONFIG_MTD_BLOCK=y
433# CONFIG_FTL is not set
434# CONFIG_NFTL is not set
435# CONFIG_INFTL is not set
436# CONFIG_RFD_FTL is not set
437
438#
439# RAM/ROM/Flash chip drivers
440#
441CONFIG_MTD_CFI=y
442# CONFIG_MTD_JEDECPROBE is not set
443CONFIG_MTD_GEN_PROBE=y
444# CONFIG_MTD_CFI_ADV_OPTIONS is not set
445CONFIG_MTD_MAP_BANK_WIDTH_1=y
446CONFIG_MTD_MAP_BANK_WIDTH_2=y
447CONFIG_MTD_MAP_BANK_WIDTH_4=y
448# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
449# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
450# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
451CONFIG_MTD_CFI_I1=y
452CONFIG_MTD_CFI_I2=y
453# CONFIG_MTD_CFI_I4 is not set
454# CONFIG_MTD_CFI_I8 is not set
455# CONFIG_MTD_CFI_INTELEXT is not set
456CONFIG_MTD_CFI_AMDSTD=y
457# CONFIG_MTD_CFI_STAA is not set
458CONFIG_MTD_CFI_UTIL=y
459CONFIG_MTD_RAM=y
460# CONFIG_MTD_ROM is not set
461# CONFIG_MTD_ABSENT is not set
462# CONFIG_MTD_OBSOLETE_CHIPS is not set
463
464#
465# Mapping drivers for chip access
466#
467# CONFIG_MTD_COMPLEX_MAPPINGS is not set
468# CONFIG_MTD_PHYSMAP is not set
469# CONFIG_MTD_SOLUTIONENGINE is not set
470CONFIG_MTD_SH7710VOIPGW=y
471# CONFIG_MTD_PLATRAM is not set
472
473#
474# Self-contained MTD device drivers
475#
476# CONFIG_MTD_SLRAM is not set
477# CONFIG_MTD_PHRAM is not set
478# CONFIG_MTD_MTDRAM is not set
479# CONFIG_MTD_BLOCK2MTD is not set
480
481#
482# Disk-On-Chip Device Drivers
483#
484# CONFIG_MTD_DOC2000 is not set
485# CONFIG_MTD_DOC2001 is not set
486# CONFIG_MTD_DOC2001PLUS is not set
487
488#
489# NAND Flash Device Drivers
490#
491# CONFIG_MTD_NAND is not set
492
493#
494# OneNAND Flash Device Drivers
495#
496# CONFIG_MTD_ONENAND is not set
497
498#
499# Parallel port support
500#
501# CONFIG_PARPORT is not set
502
503#
504# Plug and Play support
505#
506
507#
508# Block devices
509#
510# CONFIG_BLK_DEV_COW_COMMON is not set
511# CONFIG_BLK_DEV_LOOP is not set
512# CONFIG_BLK_DEV_NBD is not set
513# CONFIG_BLK_DEV_RAM is not set
514# CONFIG_BLK_DEV_INITRD is not set
515# CONFIG_CDROM_PKTCDVD is not set
516# CONFIG_ATA_OVER_ETH is not set
517
518#
519# ATA/ATAPI/MFM/RLL support
520#
521# CONFIG_IDE is not set
522
523#
524# SCSI device support
525#
526# CONFIG_RAID_ATTRS is not set
527# CONFIG_SCSI is not set
528
529#
530# Multi-device support (RAID and LVM)
531#
532# CONFIG_MD is not set
533
534#
535# Fusion MPT device support
536#
537# CONFIG_FUSION is not set
538
539#
540# IEEE 1394 (FireWire) support
541#
542
543#
544# I2O device support
545#
546
547#
548# Network device support
549#
550CONFIG_NETDEVICES=y
551# CONFIG_DUMMY is not set
552# CONFIG_BONDING is not set
553# CONFIG_EQUALIZER is not set
554# CONFIG_TUN is not set
555
556#
557# PHY device support
558#
559# CONFIG_PHYLIB is not set
560
561#
562# Ethernet (10 or 100Mbit)
563#
564CONFIG_NET_ETHERNET=y
565# CONFIG_MII is not set
566# CONFIG_STNIC is not set
567# CONFIG_SMC91X is not set
568# CONFIG_NE2000 is not set
569
570#
571# Ethernet (1000 Mbit)
572#
573
574#
575# Ethernet (10000 Mbit)
576#
577
578#
579# Token Ring devices
580#
581
582#
583# Wireless LAN (non-hamradio)
584#
585# CONFIG_NET_RADIO is not set
586
587#
588# Wan interfaces
589#
590# CONFIG_WAN is not set
591# CONFIG_PPP is not set
592# CONFIG_SLIP is not set
593# CONFIG_SHAPER is not set
594# CONFIG_NETCONSOLE is not set
595# CONFIG_NETPOLL is not set
596# CONFIG_NET_POLL_CONTROLLER is not set
597
598#
599# ISDN subsystem
600#
601# CONFIG_ISDN is not set
602
603#
604# Telephony Support
605#
606CONFIG_PHONE=y
607# CONFIG_PHONE_IXJ is not set
608
609#
610# Input device support
611#
612CONFIG_INPUT=y
613
614#
615# Userland interfaces
616#
617# CONFIG_INPUT_MOUSEDEV is not set
618# CONFIG_INPUT_JOYDEV is not set
619# CONFIG_INPUT_TSDEV is not set
620# CONFIG_INPUT_EVDEV is not set
621# CONFIG_INPUT_EVBUG is not set
622
623#
624# Input Device Drivers
625#
626# CONFIG_INPUT_KEYBOARD is not set
627# CONFIG_INPUT_MOUSE is not set
628# CONFIG_INPUT_JOYSTICK is not set
629# CONFIG_INPUT_TOUCHSCREEN is not set
630# CONFIG_INPUT_MISC is not set
631
632#
633# Hardware I/O ports
634#
635# CONFIG_SERIO is not set
636# CONFIG_GAMEPORT is not set
637
638#
639# Character devices
640#
641# CONFIG_VT is not set
642# CONFIG_SERIAL_NONSTANDARD is not set
643
644#
645# Serial drivers
646#
647# CONFIG_SERIAL_8250 is not set
648
649#
650# Non-8250 serial port support
651#
652CONFIG_SERIAL_SH_SCI=y
653CONFIG_SERIAL_SH_SCI_NR_UARTS=2
654CONFIG_SERIAL_SH_SCI_CONSOLE=y
655CONFIG_SERIAL_CORE=y
656CONFIG_SERIAL_CORE_CONSOLE=y
657# CONFIG_UNIX98_PTYS is not set
658CONFIG_LEGACY_PTYS=y
659CONFIG_LEGACY_PTY_COUNT=256
660
661#
662# IPMI
663#
664# CONFIG_IPMI_HANDLER is not set
665
666#
667# Watchdog Cards
668#
669# CONFIG_WATCHDOG is not set
670# CONFIG_RTC is not set
671# CONFIG_GEN_RTC is not set
672# CONFIG_DTLK is not set
673# CONFIG_R3964 is not set
674
675#
676# Ftape, the floppy tape device driver
677#
678# CONFIG_RAW_DRIVER is not set
679
680#
681# TPM devices
682#
683# CONFIG_TCG_TPM is not set
684# CONFIG_TELCLOCK is not set
685
686#
687# I2C support
688#
689# CONFIG_I2C is not set
690
691#
692# SPI support
693#
694# CONFIG_SPI is not set
695# CONFIG_SPI_MASTER is not set
696
697#
698# Dallas's 1-wire bus
699#
700# CONFIG_W1 is not set
701
702#
703# Hardware Monitoring support
704#
705# CONFIG_HWMON is not set
706# CONFIG_HWMON_VID is not set
707
708#
709# Misc devices
710#
711
712#
713# Multimedia devices
714#
715# CONFIG_VIDEO_DEV is not set
716CONFIG_VIDEO_V4L2=y
717
718#
719# Digital Video Broadcasting Devices
720#
721# CONFIG_DVB is not set
722
723#
724# Graphics support
725#
726# CONFIG_FB is not set
727
728#
729# Sound
730#
731# CONFIG_SOUND is not set
732
733#
734# USB support
735#
736# CONFIG_USB_ARCH_HAS_HCD is not set
737# CONFIG_USB_ARCH_HAS_OHCI is not set
738# CONFIG_USB_ARCH_HAS_EHCI is not set
739
740#
741# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
742#
743
744#
745# USB Gadget Support
746#
747# CONFIG_USB_GADGET is not set
748
749#
750# MMC/SD Card support
751#
752# CONFIG_MMC is not set
753
754#
755# LED devices
756#
757# CONFIG_NEW_LEDS is not set
758
759#
760# LED drivers
761#
762
763#
764# LED Triggers
765#
766
767#
768# InfiniBand support
769#
770
771#
772# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
773#
774
775#
776# Real Time Clock
777#
778# CONFIG_RTC_CLASS is not set
779
780#
781# File systems
782#
783# CONFIG_EXT2_FS is not set
784# CONFIG_EXT3_FS is not set
785# CONFIG_REISERFS_FS is not set
786# CONFIG_JFS_FS is not set
787# CONFIG_FS_POSIX_ACL is not set
788# CONFIG_XFS_FS is not set
789# CONFIG_OCFS2_FS is not set
790# CONFIG_MINIX_FS is not set
791# CONFIG_ROMFS_FS is not set
792# CONFIG_INOTIFY is not set
793# CONFIG_QUOTA is not set
794# CONFIG_DNOTIFY is not set
795# CONFIG_AUTOFS_FS is not set
796# CONFIG_AUTOFS4_FS is not set
797# CONFIG_FUSE_FS is not set
798
799#
800# CD-ROM/DVD Filesystems
801#
802# CONFIG_ISO9660_FS is not set
803# CONFIG_UDF_FS is not set
804
805#
806# DOS/FAT/NT Filesystems
807#
808# CONFIG_MSDOS_FS is not set
809# CONFIG_VFAT_FS is not set
810# CONFIG_NTFS_FS is not set
811
812#
813# Pseudo filesystems
814#
815CONFIG_PROC_FS=y
816# CONFIG_PROC_KCORE is not set
817CONFIG_SYSFS=y
818CONFIG_TMPFS=y
819# CONFIG_HUGETLBFS is not set
820# CONFIG_HUGETLB_PAGE is not set
821CONFIG_RAMFS=y
822# CONFIG_CONFIGFS_FS is not set
823
824#
825# Miscellaneous filesystems
826#
827# CONFIG_ADFS_FS is not set
828# CONFIG_AFFS_FS is not set
829# CONFIG_HFS_FS is not set
830# CONFIG_HFSPLUS_FS is not set
831# CONFIG_BEFS_FS is not set
832# CONFIG_BFS_FS is not set
833# CONFIG_EFS_FS is not set
834# CONFIG_JFFS_FS is not set
835CONFIG_JFFS2_FS=y
836CONFIG_JFFS2_FS_DEBUG=0
837CONFIG_JFFS2_FS_WRITEBUFFER=y
838# CONFIG_JFFS2_SUMMARY is not set
839# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
840CONFIG_JFFS2_ZLIB=y
841CONFIG_JFFS2_RTIME=y
842# CONFIG_JFFS2_RUBIN is not set
843# CONFIG_CRAMFS is not set
844# CONFIG_VXFS_FS is not set
845# CONFIG_HPFS_FS is not set
846# CONFIG_QNX4FS_FS is not set
847# CONFIG_SYSV_FS is not set
848# CONFIG_UFS_FS is not set
849
850#
851# Network File Systems
852#
853# CONFIG_NFS_FS is not set
854# CONFIG_NFSD is not set
855# CONFIG_SMB_FS is not set
856# CONFIG_CIFS is not set
857# CONFIG_NCP_FS is not set
858# CONFIG_CODA_FS is not set
859# CONFIG_AFS_FS is not set
860# CONFIG_9P_FS is not set
861
862#
863# Partition Types
864#
865# CONFIG_PARTITION_ADVANCED is not set
866CONFIG_MSDOS_PARTITION=y
867
868#
869# Native Language Support
870#
871# CONFIG_NLS is not set
872
873#
874# Profiling support
875#
876# CONFIG_PROFILING is not set
877
878#
879# Kernel hacking
880#
881# CONFIG_PRINTK_TIME is not set
882# CONFIG_MAGIC_SYSRQ is not set
883# CONFIG_DEBUG_KERNEL is not set
884CONFIG_LOG_BUF_SHIFT=14
885# CONFIG_DEBUG_BUGVERBOSE is not set
886# CONFIG_DEBUG_FS is not set
887# CONFIG_SH_STANDARD_BIOS is not set
888# CONFIG_KGDB is not set
889
890#
891# Security options
892#
893# CONFIG_KEYS is not set
894# CONFIG_SECURITY is not set
895
896#
897# Cryptographic options
898#
899# CONFIG_CRYPTO is not set
900
901#
902# Hardware crypto devices
903#
904
905#
906# Library routines
907#
908# CONFIG_CRC_CCITT is not set
909# CONFIG_CRC16 is not set
910CONFIG_CRC32=y
911# CONFIG_LIBCRC32C is not set
912CONFIG_ZLIB_INFLATE=y
913CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/sh/configs/shmin_defconfig b/arch/sh/configs/shmin_defconfig
new file mode 100644
index 000000000000..382b3bd3963b
--- /dev/null
+++ b/arch/sh/configs/shmin_defconfig
@@ -0,0 +1,827 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.17
4# Wed Aug 2 01:45:03 2006
5#
6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_FIND_NEXT_BIT=y
9CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y
13CONFIG_PTRACE=y
14
15#
16# Code maturity level options
17#
18CONFIG_EXPERIMENTAL=y
19CONFIG_BROKEN_ON_SMP=y
20CONFIG_INIT_ENV_ARG_LIMIT=32
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y
27# CONFIG_SWAP is not set
28# CONFIG_SYSVIPC is not set
29# CONFIG_POSIX_MQUEUE is not set
30# CONFIG_BSD_PROCESS_ACCT is not set
31# CONFIG_SYSCTL is not set
32# CONFIG_AUDIT is not set
33# CONFIG_IKCONFIG is not set
34# CONFIG_RELAY is not set
35CONFIG_INITRAMFS_SOURCE=""
36# CONFIG_UID16 is not set
37CONFIG_CC_OPTIMIZE_FOR_SIZE=y
38CONFIG_EMBEDDED=y
39# CONFIG_KALLSYMS is not set
40# CONFIG_HOTPLUG is not set
41CONFIG_PRINTK=y
42# CONFIG_BUG is not set
43# CONFIG_ELF_CORE is not set
44# CONFIG_BASE_FULL is not set
45# CONFIG_FUTEX is not set
46# CONFIG_EPOLL is not set
47# CONFIG_SHMEM is not set
48# CONFIG_SLAB is not set
49CONFIG_TINY_SHMEM=y
50CONFIG_BASE_SMALL=1
51CONFIG_SLOB=y
52CONFIG_OBSOLETE_INTERMODULE=y
53
54#
55# Loadable module support
56#
57# CONFIG_MODULES is not set
58
59#
60# Block layer
61#
62# CONFIG_LBD is not set
63# CONFIG_LSF is not set
64
65#
66# IO Schedulers
67#
68CONFIG_IOSCHED_NOOP=y
69# CONFIG_IOSCHED_AS is not set
70# CONFIG_IOSCHED_DEADLINE is not set
71# CONFIG_IOSCHED_CFQ is not set
72# CONFIG_DEFAULT_AS is not set
73# CONFIG_DEFAULT_DEADLINE is not set
74# CONFIG_DEFAULT_CFQ is not set
75CONFIG_DEFAULT_NOOP=y
76CONFIG_DEFAULT_IOSCHED="noop"
77
78#
79# System type
80#
81# CONFIG_SH_SOLUTION_ENGINE is not set
82# CONFIG_SH_7709_SOLUTION_ENGINE is not set
83# CONFIG_SH_7751_SOLUTION_ENGINE is not set
84# CONFIG_SH_7300_SOLUTION_ENGINE is not set
85# CONFIG_SH_73180_SOLUTION_ENGINE is not set
86# CONFIG_SH_7751_SYSTEMH is not set
87# CONFIG_SH_STB1_HARP is not set
88# CONFIG_SH_STB1_OVERDRIVE is not set
89# CONFIG_SH_HP6XX is not set
90# CONFIG_SH_CQREEK is not set
91# CONFIG_SH_DMIDA is not set
92# CONFIG_SH_EC3104 is not set
93# CONFIG_SH_SATURN is not set
94# CONFIG_SH_DREAMCAST is not set
95# CONFIG_SH_CAT68701 is not set
96# CONFIG_SH_BIGSUR is not set
97# CONFIG_SH_SH2000 is not set
98# CONFIG_SH_ADX is not set
99# CONFIG_SH_MPC1211 is not set
100# CONFIG_SH_SH03 is not set
101# CONFIG_SH_SECUREEDGE5410 is not set
102# CONFIG_SH_HS7751RVOIP is not set
103# CONFIG_SH_RTS7751R2D is not set
104# CONFIG_SH_R7780RP is not set
105# CONFIG_SH_EDOSK7705 is not set
106# CONFIG_SH_SH4202_MICRODEV is not set
107# CONFIG_SH_LANDISK is not set
108# CONFIG_SH_TITAN is not set
109CONFIG_SH_SHMIN=y
110# CONFIG_SH_UNKNOWN is not set
111
112#
113# Processor selection
114#
115CONFIG_CPU_SH3=y
116
117#
118# SH-2 Processor Support
119#
120# CONFIG_CPU_SUBTYPE_SH7604 is not set
121
122#
123# SH-3 Processor Support
124#
125# CONFIG_CPU_SUBTYPE_SH7300 is not set
126# CONFIG_CPU_SUBTYPE_SH7705 is not set
127CONFIG_CPU_SUBTYPE_SH7706=y
128# CONFIG_CPU_SUBTYPE_SH7707 is not set
129# CONFIG_CPU_SUBTYPE_SH7708 is not set
130# CONFIG_CPU_SUBTYPE_SH7709 is not set
131
132#
133# SH-4 Processor Support
134#
135# CONFIG_CPU_SUBTYPE_SH7750 is not set
136# CONFIG_CPU_SUBTYPE_SH7091 is not set
137# CONFIG_CPU_SUBTYPE_SH7750R is not set
138# CONFIG_CPU_SUBTYPE_SH7750S is not set
139# CONFIG_CPU_SUBTYPE_SH7751 is not set
140# CONFIG_CPU_SUBTYPE_SH7751R is not set
141# CONFIG_CPU_SUBTYPE_SH7760 is not set
142# CONFIG_CPU_SUBTYPE_SH4_202 is not set
143
144#
145# ST40 Processor Support
146#
147# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
148# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
149
150#
151# SH-4A Processor Support
152#
153# CONFIG_CPU_SUBTYPE_SH73180 is not set
154# CONFIG_CPU_SUBTYPE_SH7770 is not set
155# CONFIG_CPU_SUBTYPE_SH7780 is not set
156
157#
158# Memory management options
159#
160CONFIG_MMU=y
161CONFIG_PAGE_OFFSET=0x80000000
162CONFIG_MEMORY_START=0x0c000000
163CONFIG_MEMORY_SIZE=0x00800000
164CONFIG_SELECT_MEMORY_MODEL=y
165CONFIG_FLATMEM_MANUAL=y
166# CONFIG_DISCONTIGMEM_MANUAL is not set
167# CONFIG_SPARSEMEM_MANUAL is not set
168CONFIG_FLATMEM=y
169CONFIG_FLAT_NODE_MEM_MAP=y
170# CONFIG_SPARSEMEM_STATIC is not set
171CONFIG_SPLIT_PTLOCK_CPUS=4
172
173#
174# Cache configuration
175#
176# CONFIG_SH_DIRECT_MAPPED is not set
177# CONFIG_SH_WRITETHROUGH is not set
178# CONFIG_SH_OCRAM is not set
179
180#
181# Processor features
182#
183CONFIG_CPU_LITTLE_ENDIAN=y
184# CONFIG_SH_FPU_EMU is not set
185# CONFIG_SH_DSP is not set
186# CONFIG_SH_ADC is not set
187CONFIG_CPU_HAS_INTEVT=y
188CONFIG_CPU_HAS_SR_RB=y
189
190#
191# Timer support
192#
193CONFIG_SH_TMU=y
194CONFIG_SH_PCLK_FREQ=32000000
195
196#
197# CPU Frequency scaling
198#
199# CONFIG_CPU_FREQ is not set
200
201#
202# DMA support
203#
204# CONFIG_SH_DMA is not set
205
206#
207# Companion Chips
208#
209# CONFIG_HD6446X_SERIES is not set
210
211#
212# Kernel features
213#
214# CONFIG_KEXEC is not set
215# CONFIG_PREEMPT is not set
216# CONFIG_SMP is not set
217
218#
219# Boot options
220#
221CONFIG_ZERO_PAGE_OFFSET=0x00001000
222CONFIG_BOOT_LINK_OFFSET=0x00210000
223# CONFIG_UBC_WAKEUP is not set
224CONFIG_CMDLINE_BOOL=y
225CONFIG_CMDLINE="console=ttySC1,115200 root=1f01 mtdparts=phys_mapped_flash:64k(firm)ro,-(sys) netdev=34,0x300,eth0 "
226
227#
228# Bus options
229#
230# CONFIG_PCI is not set
231
232#
233# PCCARD (PCMCIA/CardBus) support
234#
235# CONFIG_PCCARD is not set
236
237#
238# PCI Hotplug Support
239#
240
241#
242# Executable file formats
243#
244CONFIG_BINFMT_ELF=y
245# CONFIG_BINFMT_FLAT is not set
246# CONFIG_BINFMT_MISC is not set
247
248#
249# Power management options (EXPERIMENTAL)
250#
251# CONFIG_PM is not set
252
253#
254# Networking
255#
256CONFIG_NET=y
257
258#
259# Networking options
260#
261# CONFIG_NETDEBUG is not set
262# CONFIG_PACKET is not set
263CONFIG_UNIX=y
264# CONFIG_NET_KEY is not set
265CONFIG_INET=y
266# CONFIG_IP_MULTICAST is not set
267# CONFIG_IP_ADVANCED_ROUTER is not set
268CONFIG_IP_FIB_HASH=y
269CONFIG_IP_PNP=y
270# CONFIG_IP_PNP_DHCP is not set
271# CONFIG_IP_PNP_BOOTP is not set
272# CONFIG_IP_PNP_RARP is not set
273# CONFIG_NET_IPIP is not set
274# CONFIG_NET_IPGRE is not set
275# CONFIG_ARPD is not set
276# CONFIG_SYN_COOKIES is not set
277# CONFIG_INET_AH is not set
278# CONFIG_INET_ESP is not set
279# CONFIG_INET_IPCOMP is not set
280# CONFIG_INET_XFRM_TUNNEL is not set
281# CONFIG_INET_TUNNEL is not set
282CONFIG_INET_DIAG=y
283CONFIG_INET_TCP_DIAG=y
284# CONFIG_TCP_CONG_ADVANCED is not set
285CONFIG_TCP_CONG_BIC=y
286# CONFIG_IPV6 is not set
287# CONFIG_INET6_XFRM_TUNNEL is not set
288# CONFIG_INET6_TUNNEL is not set
289# CONFIG_NETFILTER is not set
290
291#
292# DCCP Configuration (EXPERIMENTAL)
293#
294# CONFIG_IP_DCCP is not set
295
296#
297# SCTP Configuration (EXPERIMENTAL)
298#
299# CONFIG_IP_SCTP is not set
300
301#
302# TIPC Configuration (EXPERIMENTAL)
303#
304# CONFIG_TIPC is not set
305# CONFIG_ATM is not set
306# CONFIG_BRIDGE is not set
307# CONFIG_VLAN_8021Q is not set
308# CONFIG_DECNET is not set
309# CONFIG_LLC2 is not set
310# CONFIG_IPX is not set
311# CONFIG_ATALK is not set
312# CONFIG_X25 is not set
313# CONFIG_LAPB is not set
314# CONFIG_NET_DIVERT is not set
315# CONFIG_ECONET is not set
316# CONFIG_WAN_ROUTER is not set
317
318#
319# QoS and/or fair queueing
320#
321# CONFIG_NET_SCHED is not set
322
323#
324# Network testing
325#
326# CONFIG_NET_PKTGEN is not set
327# CONFIG_HAMRADIO is not set
328# CONFIG_IRDA is not set
329# CONFIG_BT is not set
330# CONFIG_IEEE80211 is not set
331
332#
333# Device Drivers
334#
335
336#
337# Generic Driver Options
338#
339CONFIG_STANDALONE=y
340CONFIG_PREVENT_FIRMWARE_BUILD=y
341# CONFIG_FW_LOADER is not set
342
343#
344# Connector - unified userspace <-> kernelspace linker
345#
346# CONFIG_CONNECTOR is not set
347
348#
349# Memory Technology Devices (MTD)
350#
351CONFIG_MTD=y
352# CONFIG_MTD_DEBUG is not set
353# CONFIG_MTD_CONCAT is not set
354CONFIG_MTD_PARTITIONS=y
355# CONFIG_MTD_REDBOOT_PARTS is not set
356CONFIG_MTD_CMDLINE_PARTS=y
357
358#
359# User Modules And Translation Layers
360#
361# CONFIG_MTD_CHAR is not set
362CONFIG_MTD_BLOCK=y
363# CONFIG_FTL is not set
364# CONFIG_NFTL is not set
365# CONFIG_INFTL is not set
366# CONFIG_RFD_FTL is not set
367
368#
369# RAM/ROM/Flash chip drivers
370#
371# CONFIG_MTD_CFI is not set
372CONFIG_MTD_JEDECPROBE=y
373CONFIG_MTD_GEN_PROBE=y
374# CONFIG_MTD_CFI_ADV_OPTIONS is not set
375CONFIG_MTD_MAP_BANK_WIDTH_1=y
376CONFIG_MTD_MAP_BANK_WIDTH_2=y
377CONFIG_MTD_MAP_BANK_WIDTH_4=y
378# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
379# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
380# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
381CONFIG_MTD_CFI_I1=y
382CONFIG_MTD_CFI_I2=y
383# CONFIG_MTD_CFI_I4 is not set
384# CONFIG_MTD_CFI_I8 is not set
385# CONFIG_MTD_CFI_INTELEXT is not set
386CONFIG_MTD_CFI_AMDSTD=y
387# CONFIG_MTD_CFI_STAA is not set
388CONFIG_MTD_CFI_UTIL=y
389# CONFIG_MTD_RAM is not set
390# CONFIG_MTD_ROM is not set
391# CONFIG_MTD_ABSENT is not set
392# CONFIG_MTD_OBSOLETE_CHIPS is not set
393
394#
395# Mapping drivers for chip access
396#
397# CONFIG_MTD_COMPLEX_MAPPINGS is not set
398CONFIG_MTD_PHYSMAP=y
399CONFIG_MTD_PHYSMAP_START=0xa0000000
400CONFIG_MTD_PHYSMAP_LEN=0x80000
401CONFIG_MTD_PHYSMAP_BANKWIDTH=1
402# CONFIG_MTD_PLATRAM is not set
403
404#
405# Self-contained MTD device drivers
406#
407# CONFIG_MTD_SLRAM is not set
408# CONFIG_MTD_PHRAM is not set
409# CONFIG_MTD_MTDRAM is not set
410# CONFIG_MTD_BLOCK2MTD is not set
411
412#
413# Disk-On-Chip Device Drivers
414#
415# CONFIG_MTD_DOC2000 is not set
416# CONFIG_MTD_DOC2001 is not set
417# CONFIG_MTD_DOC2001PLUS is not set
418
419#
420# NAND Flash Device Drivers
421#
422# CONFIG_MTD_NAND is not set
423
424#
425# OneNAND Flash Device Drivers
426#
427# CONFIG_MTD_ONENAND is not set
428
429#
430# Parallel port support
431#
432# CONFIG_PARPORT is not set
433
434#
435# Plug and Play support
436#
437
438#
439# Block devices
440#
441# CONFIG_BLK_DEV_COW_COMMON is not set
442CONFIG_BLK_DEV_LOOP=y
443# CONFIG_BLK_DEV_CRYPTOLOOP is not set
444# CONFIG_BLK_DEV_NBD is not set
445# CONFIG_BLK_DEV_RAM is not set
446# CONFIG_BLK_DEV_INITRD is not set
447# CONFIG_CDROM_PKTCDVD is not set
448# CONFIG_ATA_OVER_ETH is not set
449
450#
451# ATA/ATAPI/MFM/RLL support
452#
453# CONFIG_IDE is not set
454
455#
456# SCSI device support
457#
458# CONFIG_RAID_ATTRS is not set
459# CONFIG_SCSI is not set
460
461#
462# Multi-device support (RAID and LVM)
463#
464# CONFIG_MD is not set
465
466#
467# Fusion MPT device support
468#
469# CONFIG_FUSION is not set
470
471#
472# IEEE 1394 (FireWire) support
473#
474
475#
476# I2O device support
477#
478
479#
480# Network device support
481#
482CONFIG_NETDEVICES=y
483# CONFIG_DUMMY is not set
484# CONFIG_BONDING is not set
485# CONFIG_EQUALIZER is not set
486# CONFIG_TUN is not set
487
488#
489# PHY device support
490#
491# CONFIG_PHYLIB is not set
492
493#
494# Ethernet (10 or 100Mbit)
495#
496CONFIG_NET_ETHERNET=y
497# CONFIG_MII is not set
498# CONFIG_STNIC is not set
499# CONFIG_SMC91X is not set
500CONFIG_NE2000=y
501
502#
503# Ethernet (1000 Mbit)
504#
505
506#
507# Ethernet (10000 Mbit)
508#
509
510#
511# Token Ring devices
512#
513
514#
515# Wireless LAN (non-hamradio)
516#
517# CONFIG_NET_RADIO is not set
518
519#
520# Wan interfaces
521#
522# CONFIG_WAN is not set
523# CONFIG_PPP is not set
524# CONFIG_SLIP is not set
525# CONFIG_SHAPER is not set
526# CONFIG_NETCONSOLE is not set
527# CONFIG_NETPOLL is not set
528# CONFIG_NET_POLL_CONTROLLER is not set
529
530#
531# ISDN subsystem
532#
533# CONFIG_ISDN is not set
534
535#
536# Telephony Support
537#
538# CONFIG_PHONE is not set
539
540#
541# Input device support
542#
543# CONFIG_INPUT is not set
544
545#
546# Hardware I/O ports
547#
548# CONFIG_SERIO is not set
549# CONFIG_GAMEPORT is not set
550
551#
552# Character devices
553#
554# CONFIG_VT is not set
555# CONFIG_SERIAL_NONSTANDARD is not set
556
557#
558# Serial drivers
559#
560# CONFIG_SERIAL_8250 is not set
561
562#
563# Non-8250 serial port support
564#
565CONFIG_SERIAL_SH_SCI=y
566CONFIG_SERIAL_SH_SCI_NR_UARTS=2
567CONFIG_SERIAL_SH_SCI_CONSOLE=y
568CONFIG_SERIAL_CORE=y
569CONFIG_SERIAL_CORE_CONSOLE=y
570CONFIG_UNIX98_PTYS=y
571CONFIG_LEGACY_PTYS=y
572CONFIG_LEGACY_PTY_COUNT=256
573
574#
575# IPMI
576#
577# CONFIG_IPMI_HANDLER is not set
578
579#
580# Watchdog Cards
581#
582# CONFIG_WATCHDOG is not set
583# CONFIG_RTC is not set
584# CONFIG_GEN_RTC is not set
585# CONFIG_DTLK is not set
586# CONFIG_R3964 is not set
587
588#
589# Ftape, the floppy tape device driver
590#
591# CONFIG_RAW_DRIVER is not set
592
593#
594# TPM devices
595#
596# CONFIG_TCG_TPM is not set
597# CONFIG_TELCLOCK is not set
598
599#
600# I2C support
601#
602# CONFIG_I2C is not set
603
604#
605# SPI support
606#
607# CONFIG_SPI is not set
608# CONFIG_SPI_MASTER is not set
609
610#
611# Dallas's 1-wire bus
612#
613# CONFIG_W1 is not set
614
615#
616# Hardware Monitoring support
617#
618# CONFIG_HWMON is not set
619# CONFIG_HWMON_VID is not set
620
621#
622# Misc devices
623#
624
625#
626# Multimedia devices
627#
628# CONFIG_VIDEO_DEV is not set
629CONFIG_VIDEO_V4L2=y
630
631#
632# Digital Video Broadcasting Devices
633#
634# CONFIG_DVB is not set
635
636#
637# Graphics support
638#
639# CONFIG_FB is not set
640
641#
642# Sound
643#
644# CONFIG_SOUND is not set
645
646#
647# USB support
648#
649# CONFIG_USB_ARCH_HAS_HCD is not set
650# CONFIG_USB_ARCH_HAS_OHCI is not set
651# CONFIG_USB_ARCH_HAS_EHCI is not set
652
653#
654# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
655#
656
657#
658# USB Gadget Support
659#
660# CONFIG_USB_GADGET is not set
661
662#
663# MMC/SD Card support
664#
665# CONFIG_MMC is not set
666
667#
668# LED devices
669#
670# CONFIG_NEW_LEDS is not set
671
672#
673# LED drivers
674#
675
676#
677# LED Triggers
678#
679
680#
681# InfiniBand support
682#
683
684#
685# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
686#
687
688#
689# Real Time Clock
690#
691# CONFIG_RTC_CLASS is not set
692
693#
694# File systems
695#
696# CONFIG_EXT2_FS is not set
697# CONFIG_EXT3_FS is not set
698# CONFIG_REISERFS_FS is not set
699# CONFIG_JFS_FS is not set
700# CONFIG_FS_POSIX_ACL is not set
701# CONFIG_XFS_FS is not set
702# CONFIG_OCFS2_FS is not set
703# CONFIG_MINIX_FS is not set
704# CONFIG_ROMFS_FS is not set
705# CONFIG_INOTIFY is not set
706# CONFIG_QUOTA is not set
707# CONFIG_DNOTIFY is not set
708# CONFIG_AUTOFS_FS is not set
709# CONFIG_AUTOFS4_FS is not set
710# CONFIG_FUSE_FS is not set
711
712#
713# CD-ROM/DVD Filesystems
714#
715# CONFIG_ISO9660_FS is not set
716# CONFIG_UDF_FS is not set
717
718#
719# DOS/FAT/NT Filesystems
720#
721# CONFIG_MSDOS_FS is not set
722# CONFIG_VFAT_FS is not set
723# CONFIG_NTFS_FS is not set
724
725#
726# Pseudo filesystems
727#
728CONFIG_PROC_FS=y
729# CONFIG_PROC_KCORE is not set
730# CONFIG_SYSFS is not set
731CONFIG_TMPFS=y
732# CONFIG_HUGETLBFS is not set
733# CONFIG_HUGETLB_PAGE is not set
734CONFIG_RAMFS=y
735
736#
737# Miscellaneous filesystems
738#
739# CONFIG_ADFS_FS is not set
740# CONFIG_AFFS_FS is not set
741# CONFIG_HFS_FS is not set
742# CONFIG_HFSPLUS_FS is not set
743# CONFIG_BEFS_FS is not set
744# CONFIG_BFS_FS is not set
745# CONFIG_EFS_FS is not set
746# CONFIG_JFFS_FS is not set
747# CONFIG_JFFS2_FS is not set
748CONFIG_CRAMFS=y
749# CONFIG_VXFS_FS is not set
750# CONFIG_HPFS_FS is not set
751# CONFIG_QNX4FS_FS is not set
752# CONFIG_SYSV_FS is not set
753# CONFIG_UFS_FS is not set
754
755#
756# Network File Systems
757#
758CONFIG_NFS_FS=y
759CONFIG_NFS_V3=y
760# CONFIG_NFS_V3_ACL is not set
761# CONFIG_NFS_V4 is not set
762# CONFIG_NFS_DIRECTIO is not set
763# CONFIG_NFSD is not set
764CONFIG_ROOT_NFS=y
765CONFIG_LOCKD=y
766CONFIG_LOCKD_V4=y
767CONFIG_NFS_COMMON=y
768CONFIG_SUNRPC=y
769# CONFIG_RPCSEC_GSS_KRB5 is not set
770# CONFIG_RPCSEC_GSS_SPKM3 is not set
771# CONFIG_SMB_FS is not set
772# CONFIG_CIFS is not set
773# CONFIG_NCP_FS is not set
774# CONFIG_CODA_FS is not set
775# CONFIG_AFS_FS is not set
776# CONFIG_9P_FS is not set
777
778#
779# Partition Types
780#
781# CONFIG_PARTITION_ADVANCED is not set
782CONFIG_MSDOS_PARTITION=y
783
784#
785# Native Language Support
786#
787# CONFIG_NLS is not set
788
789#
790# Profiling support
791#
792# CONFIG_PROFILING is not set
793
794#
795# Kernel hacking
796#
797# CONFIG_PRINTK_TIME is not set
798# CONFIG_MAGIC_SYSRQ is not set
799# CONFIG_DEBUG_KERNEL is not set
800CONFIG_LOG_BUF_SHIFT=14
801# CONFIG_UNWIND_INFO is not set
802CONFIG_SH_STANDARD_BIOS=y
803CONFIG_EARLY_PRINTK=y
804# CONFIG_KGDB is not set
805
806#
807# Security options
808#
809# CONFIG_KEYS is not set
810
811#
812# Cryptographic options
813#
814# CONFIG_CRYPTO is not set
815
816#
817# Hardware crypto devices
818#
819
820#
821# Library routines
822#
823# CONFIG_CRC_CCITT is not set
824# CONFIG_CRC16 is not set
825CONFIG_CRC32=y
826# CONFIG_LIBCRC32C is not set
827CONFIG_ZLIB_INFLATE=y
diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig
new file mode 100644
index 000000000000..1db2904de9e5
--- /dev/null
+++ b/arch/sh/configs/titan_defconfig
@@ -0,0 +1,1367 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-sh
4# Wed Nov 9 00:35:56 2005
5#
6CONFIG_SUPERH=y
7CONFIG_UID16=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_HARDIRQS=y
10CONFIG_GENERIC_IRQ_PROBE=y
11CONFIG_GENERIC_CALIBRATE_DELAY=y
12CONFIG_GENERIC_IOMAP=y
13
14#
15# Code maturity level options
16#
17CONFIG_EXPERIMENTAL=y
18CONFIG_CLEAN_COMPILE=y
19CONFIG_BROKEN_ON_SMP=y
20CONFIG_INIT_ENV_ARG_LIMIT=32
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y
27CONFIG_SWAP=y
28CONFIG_SYSVIPC=y
29# CONFIG_POSIX_MQUEUE is not set
30# CONFIG_BSD_PROCESS_ACCT is not set
31CONFIG_SYSCTL=y
32# CONFIG_AUDIT is not set
33CONFIG_HOTPLUG=y
34CONFIG_KOBJECT_UEVENT=y
35CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y
37CONFIG_INITRAMFS_SOURCE=""
38# CONFIG_EMBEDDED is not set
39CONFIG_KALLSYMS=y
40# CONFIG_KALLSYMS_ALL is not set
41# CONFIG_KALLSYMS_EXTRA_PASS is not set
42CONFIG_PRINTK=y
43CONFIG_BUG=y
44CONFIG_BASE_FULL=y
45CONFIG_FUTEX=y
46CONFIG_EPOLL=y
47CONFIG_SHMEM=y
48CONFIG_CC_ALIGN_FUNCTIONS=0
49CONFIG_CC_ALIGN_LABELS=0
50CONFIG_CC_ALIGN_LOOPS=0
51CONFIG_CC_ALIGN_JUMPS=0
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54
55#
56# Loadable module support
57#
58CONFIG_MODULES=y
59CONFIG_MODULE_UNLOAD=y
60CONFIG_MODULE_FORCE_UNLOAD=y
61CONFIG_OBSOLETE_MODPARM=y
62# CONFIG_MODVERSIONS is not set
63# CONFIG_MODULE_SRCVERSION_ALL is not set
64CONFIG_KMOD=y
65
66#
67# System type
68#
69# CONFIG_SH_SOLUTION_ENGINE is not set
70# CONFIG_SH_7751_SOLUTION_ENGINE is not set
71# CONFIG_SH_7300_SOLUTION_ENGINE is not set
72# CONFIG_SH_73180_SOLUTION_ENGINE is not set
73# CONFIG_SH_7751_SYSTEMH is not set
74CONFIG_SH_TITAN=y
75# CONFIG_SH_STB1_HARP is not set
76# CONFIG_SH_STB1_OVERDRIVE is not set
77# CONFIG_SH_HP6XX is not set
78# CONFIG_SH_CQREEK is not set
79# CONFIG_SH_DMIDA is not set
80# CONFIG_SH_EC3104 is not set
81# CONFIG_SH_SATURN is not set
82# CONFIG_SH_DREAMCAST is not set
83# CONFIG_SH_CAT68701 is not set
84# CONFIG_SH_BIGSUR is not set
85# CONFIG_SH_SH2000 is not set
86# CONFIG_SH_ADX is not set
87# CONFIG_SH_MPC1211 is not set
88# CONFIG_SH_SH03 is not set
89# CONFIG_SH_SECUREEDGE5410 is not set
90# CONFIG_SH_HS7751RVOIP is not set
91# CONFIG_SH_RTS7751R2D is not set
92# CONFIG_SH_EDOSK7705 is not set
93# CONFIG_SH_SH4202_MICRODEV is not set
94# CONFIG_SH_LANDISK is not set
95# CONFIG_SH_UNKNOWN is not set
96
97#
98# Processor selection
99#
100CONFIG_CPU_SH4=y
101
102#
103# SH-2 Processor Support
104#
105# CONFIG_CPU_SUBTYPE_SH7604 is not set
106
107#
108# SH-3 Processor Support
109#
110# CONFIG_CPU_SUBTYPE_SH7300 is not set
111# CONFIG_CPU_SUBTYPE_SH7705 is not set
112# CONFIG_CPU_SUBTYPE_SH7707 is not set
113# CONFIG_CPU_SUBTYPE_SH7708 is not set
114# CONFIG_CPU_SUBTYPE_SH7709 is not set
115
116#
117# SH-4 Processor Support
118#
119# CONFIG_CPU_SUBTYPE_SH7750 is not set
120# CONFIG_CPU_SUBTYPE_SH7091 is not set
121# CONFIG_CPU_SUBTYPE_SH7750R is not set
122# CONFIG_CPU_SUBTYPE_SH7750S is not set
123CONFIG_CPU_SUBTYPE_SH7751=y
124CONFIG_CPU_SUBTYPE_SH7751R=y
125# CONFIG_CPU_SUBTYPE_SH7760 is not set
126# CONFIG_CPU_SUBTYPE_SH4_202 is not set
127
128#
129# ST40 Processor Support
130#
131# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
132# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
133
134#
135# SH-4A Processor Support
136#
137# CONFIG_CPU_SUBTYPE_SH73180 is not set
138# CONFIG_CPU_SUBTYPE_SH7770 is not set
139# CONFIG_CPU_SUBTYPE_SH7780 is not set
140
141#
142# Memory management options
143#
144CONFIG_MMU=y
145CONFIG_SELECT_MEMORY_MODEL=y
146CONFIG_FLATMEM_MANUAL=y
147# CONFIG_DISCONTIGMEM_MANUAL is not set
148# CONFIG_SPARSEMEM_MANUAL is not set
149CONFIG_FLATMEM=y
150CONFIG_FLAT_NODE_MEM_MAP=y
151# CONFIG_SPARSEMEM_STATIC is not set
152
153#
154# Cache configuration
155#
156# CONFIG_SH_DIRECT_MAPPED is not set
157# CONFIG_SH_WRITETHROUGH is not set
158# CONFIG_SH_OCRAM is not set
159CONFIG_MEMORY_START=0x08030000
160CONFIG_MEMORY_SIZE=0x7fd0000
161
162#
163# Processor features
164#
165CONFIG_CPU_LITTLE_ENDIAN=y
166CONFIG_SH_RTC=y
167CONFIG_SH_FPU=y
168# CONFIG_SH_STORE_QUEUES is not set
169
170#
171# Timer support
172#
173CONFIG_SH_TMU=y
174CONFIG_SH_PCLK_FREQ_BOOL=y
175CONFIG_SH_PCLK_FREQ=30000000
176
177#
178# CPU Frequency scaling
179#
180# CONFIG_CPU_FREQ is not set
181
182#
183# DMA support
184#
185CONFIG_SH_DMA=y
186CONFIG_NR_ONCHIP_DMA_CHANNELS=8
187# CONFIG_NR_DMA_CHANNELS_BOOL is not set
188
189#
190# Companion Chips
191#
192# CONFIG_HD6446X_SERIES is not set
193
194#
195# Kernel features
196#
197# CONFIG_KEXEC is not set
198# CONFIG_PREEMPT is not set
199# CONFIG_SMP is not set
200
201#
202# Boot options
203#
204CONFIG_ZERO_PAGE_OFFSET=0x00001000
205CONFIG_BOOT_LINK_OFFSET=0x009e0000
206# CONFIG_UBC_WAKEUP is not set
207CONFIG_CMDLINE_BOOL=y
208CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf"
209
210#
211# Bus options
212#
213CONFIG_PCI=y
214CONFIG_SH_PCIDMA_NONCOHERENT=y
215CONFIG_PCI_AUTO=y
216CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
217CONFIG_PCI_LEGACY_PROC=y
218#CONFIG_PCI_DEBUG is not set
219
220#
221# PCCARD (PCMCIA/CardBus) support
222#
223# CONFIG_PCCARD is not set
224
225#
226# PCI Hotplug Support
227#
228CONFIG_HOTPLUG_PCI=y
229# CONFIG_HOTPLUG_PCI_FAKE is not set
230# CONFIG_HOTPLUG_PCI_CPCI is not set
231# CONFIG_HOTPLUG_PCI_SHPC is not set
232
233#
234# Executable file formats
235#
236CONFIG_BINFMT_ELF=y
237# CONFIG_BINFMT_FLAT is not set
238# CONFIG_BINFMT_MISC is not set
239
240#
241# Networking
242#
243CONFIG_NET=y
244
245#
246# Networking options
247#
248CONFIG_PACKET=y
249CONFIG_PACKET_MMAP=y
250CONFIG_UNIX=y
251CONFIG_XFRM=y
252# CONFIG_XFRM_USER is not set
253CONFIG_NET_KEY=y
254CONFIG_INET=y
255CONFIG_IP_MULTICAST=y
256CONFIG_IP_ADVANCED_ROUTER=y
257CONFIG_ASK_IP_FIB_HASH=y
258# CONFIG_IP_FIB_TRIE is not set
259CONFIG_IP_FIB_HASH=y
260CONFIG_IP_MULTIPLE_TABLES=y
261# CONFIG_IP_ROUTE_FWMARK is not set
262CONFIG_IP_ROUTE_MULTIPATH=y
263CONFIG_IP_ROUTE_MULTIPATH_CACHED=y
264CONFIG_IP_ROUTE_MULTIPATH_RR=m
265CONFIG_IP_ROUTE_MULTIPATH_RANDOM=m
266CONFIG_IP_ROUTE_MULTIPATH_WRANDOM=m
267CONFIG_IP_ROUTE_MULTIPATH_DRR=m
268# CONFIG_IP_ROUTE_VERBOSE is not set
269CONFIG_IP_PNP=y
270CONFIG_IP_PNP_DHCP=y
271CONFIG_IP_PNP_BOOTP=y
272CONFIG_IP_PNP_RARP=y
273CONFIG_NET_IPIP=m
274CONFIG_NET_IPGRE=m
275CONFIG_NET_IPGRE_BROADCAST=y
276CONFIG_IP_MROUTE=y
277CONFIG_IP_PIMSM_V1=y
278CONFIG_IP_PIMSM_V2=y
279# CONFIG_ARPD is not set
280CONFIG_SYN_COOKIES=y
281CONFIG_INET_AH=m
282CONFIG_INET_ESP=m
283CONFIG_INET_IPCOMP=m
284CONFIG_INET_TUNNEL=m
285CONFIG_INET_DIAG=m
286CONFIG_INET_TCP_DIAG=m
287# CONFIG_TCP_CONG_ADVANCED is not set
288CONFIG_TCP_CONG_BIC=y
289
290#
291# IP: Virtual Server Configuration
292#
293# CONFIG_IP_VS is not set
294CONFIG_IPV6=m
295CONFIG_IPV6_PRIVACY=y
296CONFIG_INET6_AH=m
297CONFIG_INET6_ESP=m
298CONFIG_INET6_IPCOMP=m
299CONFIG_INET6_TUNNEL=m
300CONFIG_IPV6_TUNNEL=m
301CONFIG_NETFILTER=y
302# CONFIG_NETFILTER_DEBUG is not set
303CONFIG_BRIDGE_NETFILTER=y
304CONFIG_NETFILTER_NETLINK=m
305CONFIG_NETFILTER_NETLINK_QUEUE=m
306CONFIG_NETFILTER_NETLINK_LOG=m
307
308#
309# IP: Netfilter Configuration
310#
311CONFIG_IP_NF_CONNTRACK=m
312CONFIG_IP_NF_CT_ACCT=y
313CONFIG_IP_NF_CONNTRACK_MARK=y
314CONFIG_IP_NF_CONNTRACK_EVENTS=y
315CONFIG_IP_NF_CONNTRACK_NETLINK=m
316# CONFIG_IP_NF_CT_PROTO_SCTP is not set
317CONFIG_IP_NF_FTP=m
318CONFIG_IP_NF_IRC=m
319CONFIG_IP_NF_NETBIOS_NS=m
320CONFIG_IP_NF_TFTP=m
321# CONFIG_IP_NF_AMANDA is not set
322CONFIG_IP_NF_PPTP=m
323CONFIG_IP_NF_QUEUE=m
324CONFIG_IP_NF_IPTABLES=m
325CONFIG_IP_NF_MATCH_LIMIT=m
326CONFIG_IP_NF_MATCH_IPRANGE=m
327CONFIG_IP_NF_MATCH_MAC=m
328CONFIG_IP_NF_MATCH_PKTTYPE=m
329CONFIG_IP_NF_MATCH_MARK=m
330CONFIG_IP_NF_MATCH_MULTIPORT=m
331CONFIG_IP_NF_MATCH_TOS=m
332CONFIG_IP_NF_MATCH_RECENT=m
333CONFIG_IP_NF_MATCH_ECN=m
334CONFIG_IP_NF_MATCH_DSCP=m
335CONFIG_IP_NF_MATCH_AH_ESP=m
336CONFIG_IP_NF_MATCH_LENGTH=m
337CONFIG_IP_NF_MATCH_TTL=m
338CONFIG_IP_NF_MATCH_TCPMSS=m
339CONFIG_IP_NF_MATCH_HELPER=m
340CONFIG_IP_NF_MATCH_STATE=m
341CONFIG_IP_NF_MATCH_CONNTRACK=m
342CONFIG_IP_NF_MATCH_OWNER=m
343# CONFIG_IP_NF_MATCH_PHYSDEV is not set
344CONFIG_IP_NF_MATCH_ADDRTYPE=m
345CONFIG_IP_NF_MATCH_REALM=m
346# CONFIG_IP_NF_MATCH_SCTP is not set
347# CONFIG_IP_NF_MATCH_DCCP is not set
348CONFIG_IP_NF_MATCH_COMMENT=m
349CONFIG_IP_NF_MATCH_CONNMARK=m
350CONFIG_IP_NF_MATCH_CONNBYTES=m
351CONFIG_IP_NF_MATCH_HASHLIMIT=m
352CONFIG_IP_NF_MATCH_STRING=m
353CONFIG_IP_NF_FILTER=m
354CONFIG_IP_NF_TARGET_REJECT=m
355CONFIG_IP_NF_TARGET_LOG=m
356CONFIG_IP_NF_TARGET_ULOG=m
357CONFIG_IP_NF_TARGET_TCPMSS=m
358CONFIG_IP_NF_TARGET_NFQUEUE=m
359CONFIG_IP_NF_NAT=m
360CONFIG_IP_NF_NAT_NEEDED=y
361CONFIG_IP_NF_TARGET_MASQUERADE=m
362CONFIG_IP_NF_TARGET_REDIRECT=m
363CONFIG_IP_NF_TARGET_NETMAP=m
364CONFIG_IP_NF_TARGET_SAME=m
365CONFIG_IP_NF_NAT_SNMP_BASIC=m
366CONFIG_IP_NF_NAT_IRC=m
367CONFIG_IP_NF_NAT_FTP=m
368CONFIG_IP_NF_NAT_TFTP=m
369CONFIG_IP_NF_NAT_PPTP=m
370CONFIG_IP_NF_MANGLE=m
371CONFIG_IP_NF_TARGET_TOS=m
372CONFIG_IP_NF_TARGET_ECN=m
373CONFIG_IP_NF_TARGET_DSCP=m
374CONFIG_IP_NF_TARGET_MARK=m
375CONFIG_IP_NF_TARGET_CLASSIFY=m
376CONFIG_IP_NF_TARGET_TTL=m
377CONFIG_IP_NF_TARGET_CONNMARK=m
378CONFIG_IP_NF_TARGET_CLUSTERIP=m
379CONFIG_IP_NF_RAW=m
380CONFIG_IP_NF_TARGET_NOTRACK=m
381CONFIG_IP_NF_ARPTABLES=m
382CONFIG_IP_NF_ARPFILTER=m
383CONFIG_IP_NF_ARP_MANGLE=m
384
385#
386# IPv6: Netfilter Configuration (EXPERIMENTAL)
387#
388CONFIG_IP6_NF_QUEUE=m
389CONFIG_IP6_NF_IPTABLES=m
390CONFIG_IP6_NF_MATCH_LIMIT=m
391CONFIG_IP6_NF_MATCH_MAC=m
392CONFIG_IP6_NF_MATCH_RT=m
393CONFIG_IP6_NF_MATCH_OPTS=m
394CONFIG_IP6_NF_MATCH_FRAG=m
395CONFIG_IP6_NF_MATCH_HL=m
396CONFIG_IP6_NF_MATCH_MULTIPORT=m
397CONFIG_IP6_NF_MATCH_OWNER=m
398CONFIG_IP6_NF_MATCH_MARK=m
399CONFIG_IP6_NF_MATCH_IPV6HEADER=m
400CONFIG_IP6_NF_MATCH_AHESP=m
401CONFIG_IP6_NF_MATCH_LENGTH=m
402CONFIG_IP6_NF_MATCH_EUI64=m
403# CONFIG_IP6_NF_MATCH_PHYSDEV is not set
404CONFIG_IP6_NF_FILTER=m
405CONFIG_IP6_NF_TARGET_LOG=m
406CONFIG_IP6_NF_TARGET_REJECT=m
407CONFIG_IP6_NF_TARGET_NFQUEUE=m
408CONFIG_IP6_NF_MANGLE=m
409CONFIG_IP6_NF_TARGET_MARK=m
410CONFIG_IP6_NF_TARGET_HL=m
411CONFIG_IP6_NF_RAW=m
412
413#
414# Bridge: Netfilter Configuration
415#
416# CONFIG_BRIDGE_NF_EBTABLES is not set
417
418#
419# DCCP Configuration (EXPERIMENTAL)
420#
421# CONFIG_IP_DCCP is not set
422
423#
424# SCTP Configuration (EXPERIMENTAL)
425#
426# CONFIG_IP_SCTP is not set
427# CONFIG_ATM is not set
428CONFIG_BRIDGE=m
429CONFIG_VLAN_8021Q=m
430# CONFIG_DECNET is not set
431# CONFIG_LLC2 is not set
432# CONFIG_IPX is not set
433# CONFIG_ATALK is not set
434# CONFIG_X25 is not set
435# CONFIG_LAPB is not set
436# CONFIG_NET_DIVERT is not set
437# CONFIG_ECONET is not set
438# CONFIG_WAN_ROUTER is not set
439CONFIG_NET_SCHED=y
440CONFIG_NET_SCH_CLK_JIFFIES=y
441# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
442# CONFIG_NET_SCH_CLK_CPU is not set
443CONFIG_NET_SCH_CBQ=m
444CONFIG_NET_SCH_HTB=m
445CONFIG_NET_SCH_HFSC=m
446CONFIG_NET_SCH_PRIO=m
447CONFIG_NET_SCH_RED=m
448CONFIG_NET_SCH_SFQ=m
449CONFIG_NET_SCH_TEQL=m
450CONFIG_NET_SCH_TBF=m
451CONFIG_NET_SCH_GRED=m
452CONFIG_NET_SCH_DSMARK=m
453CONFIG_NET_SCH_NETEM=m
454CONFIG_NET_SCH_INGRESS=m
455CONFIG_NET_QOS=y
456CONFIG_NET_ESTIMATOR=y
457CONFIG_NET_CLS=y
458CONFIG_NET_CLS_BASIC=m
459CONFIG_NET_CLS_TCINDEX=m
460CONFIG_NET_CLS_ROUTE4=m
461CONFIG_NET_CLS_ROUTE=y
462CONFIG_NET_CLS_FW=m
463CONFIG_NET_CLS_U32=m
464CONFIG_CLS_U32_PERF=y
465CONFIG_NET_CLS_IND=y
466CONFIG_CLS_U32_MARK=y
467CONFIG_NET_CLS_RSVP=m
468CONFIG_NET_CLS_RSVP6=m
469CONFIG_NET_EMATCH=y
470CONFIG_NET_EMATCH_STACK=32
471CONFIG_NET_EMATCH_CMP=m
472CONFIG_NET_EMATCH_NBYTE=m
473CONFIG_NET_EMATCH_U32=m
474CONFIG_NET_EMATCH_META=m
475CONFIG_NET_EMATCH_TEXT=m
476CONFIG_NET_CLS_ACT=y
477CONFIG_NET_ACT_POLICE=m
478CONFIG_NET_ACT_GACT=m
479CONFIG_GACT_PROB=y
480CONFIG_NET_ACT_MIRRED=m
481CONFIG_NET_ACT_IPT=m
482CONFIG_NET_ACT_PEDIT=m
483# CONFIG_NET_ACT_SIMP is not set
484
485#
486# Network testing
487#
488# CONFIG_NET_PKTGEN is not set
489# CONFIG_HAMRADIO is not set
490# CONFIG_IRDA is not set
491# CONFIG_BT is not set
492# CONFIG_IEEE80211 is not set
493
494#
495# Device Drivers
496#
497
498#
499# Generic Driver Options
500#
501CONFIG_STANDALONE=y
502CONFIG_PREVENT_FIRMWARE_BUILD=y
503CONFIG_FW_LOADER=m
504# CONFIG_DEBUG_DRIVER is not set
505
506#
507# Connector - unified userspace <-> kernelspace linker
508#
509CONFIG_CONNECTOR=m
510
511#
512# Memory Technology Devices (MTD)
513#
514# CONFIG_MTD is not set
515
516#
517# Parallel port support
518#
519# CONFIG_PARPORT is not set
520
521#
522# Plug and Play support
523#
524
525#
526# Block devices
527#
528# CONFIG_BLK_CPQ_DA is not set
529# CONFIG_BLK_CPQ_CISS_DA is not set
530# CONFIG_BLK_DEV_DAC960 is not set
531CONFIG_BLK_SSFDC=y
532# CONFIG_BLK_DEV_UMEM is not set
533# CONFIG_BLK_DEV_COW_COMMON is not set
534CONFIG_BLK_DEV_LOOP=m
535# CONFIG_BLK_DEV_CRYPTOLOOP is not set
536# CONFIG_BLK_DEV_NBD is not set
537# CONFIG_BLK_DEV_SX8 is not set
538# CONFIG_BLK_DEV_UB is not set
539CONFIG_BLK_DEV_RAM=y
540CONFIG_BLK_DEV_RAM_COUNT=16
541CONFIG_BLK_DEV_RAM_SIZE=4096
542CONFIG_BLK_DEV_INITRD=y
543# CONFIG_LBD is not set
544# CONFIG_CDROM_PKTCDVD is not set
545
546#
547# IO Schedulers
548#
549CONFIG_IOSCHED_NOOP=y
550CONFIG_IOSCHED_AS=y
551CONFIG_IOSCHED_DEADLINE=y
552CONFIG_IOSCHED_CFQ=y
553# CONFIG_ATA_OVER_ETH is not set
554
555#
556# ATA/ATAPI/MFM/RLL support
557#
558# CONFIG_IDE is not set
559
560#
561# SCSI device support
562#
563# CONFIG_RAID_ATTRS is not set
564CONFIG_SCSI=m
565CONFIG_SCSI_PROC_FS=y
566
567#
568# SCSI support type (disk, tape, CD-ROM)
569#
570CONFIG_BLK_DEV_SD=m
571# CONFIG_CHR_DEV_ST is not set
572# CONFIG_CHR_DEV_OSST is not set
573CONFIG_BLK_DEV_SR=m
574# CONFIG_BLK_DEV_SR_VENDOR is not set
575CONFIG_CHR_DEV_SG=m
576# CONFIG_CHR_DEV_SCH is not set
577
578#
579# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
580#
581# CONFIG_SCSI_MULTI_LUN is not set
582# CONFIG_SCSI_CONSTANTS is not set
583# CONFIG_SCSI_LOGGING is not set
584
585#
586# SCSI Transport Attributes
587#
588# CONFIG_SCSI_SPI_ATTRS is not set
589# CONFIG_SCSI_FC_ATTRS is not set
590# CONFIG_SCSI_ISCSI_ATTRS is not set
591# CONFIG_SCSI_SAS_ATTRS is not set
592
593#
594# SCSI low-level drivers
595#
596# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
597# CONFIG_SCSI_3W_9XXX is not set
598# CONFIG_SCSI_ACARD is not set
599# CONFIG_SCSI_AACRAID is not set
600# CONFIG_SCSI_AIC7XXX is not set
601# CONFIG_SCSI_AIC7XXX_OLD is not set
602# CONFIG_SCSI_AIC79XX is not set
603# CONFIG_SCSI_DPT_I2O is not set
604# CONFIG_MEGARAID_NEWGEN is not set
605# CONFIG_MEGARAID_LEGACY is not set
606# CONFIG_MEGARAID_SAS is not set
607# CONFIG_SCSI_SATA is not set
608# CONFIG_SCSI_DMX3191D is not set
609# CONFIG_SCSI_FUTURE_DOMAIN is not set
610# CONFIG_SCSI_IPS is not set
611# CONFIG_SCSI_INITIO is not set
612# CONFIG_SCSI_INIA100 is not set
613# CONFIG_SCSI_SYM53C8XX_2 is not set
614# CONFIG_SCSI_IPR is not set
615# CONFIG_SCSI_QLOGIC_FC is not set
616# CONFIG_SCSI_QLOGIC_1280 is not set
617CONFIG_SCSI_QLA2XXX=m
618# CONFIG_SCSI_QLA21XX is not set
619# CONFIG_SCSI_QLA22XX is not set
620# CONFIG_SCSI_QLA2300 is not set
621# CONFIG_SCSI_QLA2322 is not set
622# CONFIG_SCSI_QLA6312 is not set
623# CONFIG_SCSI_QLA24XX is not set
624# CONFIG_SCSI_LPFC is not set
625# CONFIG_SCSI_DC395x is not set
626# CONFIG_SCSI_DC390T is not set
627# CONFIG_SCSI_NSP32 is not set
628# CONFIG_SCSI_DEBUG is not set
629
630#
631# Multi-device support (RAID and LVM)
632#
633# CONFIG_MD is not set
634
635#
636# Fusion MPT device support
637#
638# CONFIG_FUSION is not set
639# CONFIG_FUSION_SPI is not set
640# CONFIG_FUSION_FC is not set
641# CONFIG_FUSION_SAS is not set
642
643#
644# IEEE 1394 (FireWire) support
645#
646# CONFIG_IEEE1394 is not set
647
648#
649# I2O device support
650#
651# CONFIG_I2O is not set
652
653#
654# Network device support
655#
656CONFIG_NETDEVICES=y
657# CONFIG_DUMMY is not set
658# CONFIG_BONDING is not set
659# CONFIG_EQUALIZER is not set
660CONFIG_TUN=m
661
662#
663# ARCnet devices
664#
665# CONFIG_ARCNET is not set
666
667#
668# PHY device support
669#
670CONFIG_PHYLIB=m
671CONFIG_PHYCONTROL=y
672
673#
674# MII PHY device drivers
675#
676CONFIG_MARVELL_PHY=m
677CONFIG_DAVICOM_PHY=m
678CONFIG_QSEMI_PHY=m
679CONFIG_LXT_PHY=m
680CONFIG_CICADA_PHY=m
681
682#
683# Ethernet (10 or 100Mbit)
684#
685CONFIG_NET_ETHERNET=y
686CONFIG_MII=y
687# CONFIG_STNIC is not set
688# CONFIG_HAPPYMEAL is not set
689# CONFIG_SUNGEM is not set
690CONFIG_CASSINI=m
691# CONFIG_NET_VENDOR_3COM is not set
692# CONFIG_SMC91X is not set
693
694#
695# Tulip family network device support
696#
697# CONFIG_NET_TULIP is not set
698# CONFIG_HP100 is not set
699# CONFIG_NE2000 is not set
700CONFIG_NET_PCI=y
701# CONFIG_PCNET32 is not set
702# CONFIG_AMD8111_ETH is not set
703# CONFIG_ADAPTEC_STARFIRE is not set
704# CONFIG_B44 is not set
705# CONFIG_FORCEDETH is not set
706# CONFIG_DGRS is not set
707# CONFIG_EEPRO100 is not set
708# CONFIG_E100 is not set
709# CONFIG_FEALNX is not set
710# CONFIG_NATSEMI is not set
711# CONFIG_NE2K_PCI is not set
712# CONFIG_8139CP is not set
713CONFIG_8139TOO=y
714# CONFIG_8139TOO_PIO is not set
715CONFIG_8139TOO_TUNE_TWISTER=y
716# CONFIG_8139TOO_8129 is not set
717CONFIG_8139_OLD_RX_RESET=y
718# CONFIG_SIS900 is not set
719# CONFIG_EPIC100 is not set
720# CONFIG_SUNDANCE is not set
721# CONFIG_TLAN is not set
722# CONFIG_VIA_RHINE is not set
723
724#
725# Ethernet (1000 Mbit)
726#
727# CONFIG_ACENIC is not set
728# CONFIG_DL2K is not set
729# CONFIG_E1000 is not set
730# CONFIG_NS83820 is not set
731# CONFIG_HAMACHI is not set
732# CONFIG_YELLOWFIN is not set
733# CONFIG_R8169 is not set
734# CONFIG_SIS190 is not set
735# CONFIG_SKGE is not set
736# CONFIG_SK98LIN is not set
737# CONFIG_VIA_VELOCITY is not set
738# CONFIG_TIGON3 is not set
739# CONFIG_BNX2 is not set
740
741#
742# Ethernet (10000 Mbit)
743#
744# CONFIG_CHELSIO_T1 is not set
745# CONFIG_IXGB is not set
746# CONFIG_S2IO is not set
747
748#
749# Token Ring devices
750#
751# CONFIG_TR is not set
752
753#
754# Wireless LAN (non-hamradio)
755#
756CONFIG_NET_RADIO=y
757
758#
759# Obsolete Wireless cards support (pre-802.11)
760#
761# CONFIG_STRIP is not set
762
763#
764# Wireless 802.11b ISA/PCI cards support
765#
766# CONFIG_HERMES is not set
767# CONFIG_ATMEL is not set
768
769#
770# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
771#
772CONFIG_PRISM54=m
773# CONFIG_HOSTAP is not set
774CONFIG_NET_WIRELESS=y
775
776#
777# Wan interfaces
778#
779# CONFIG_WAN is not set
780# CONFIG_FDDI is not set
781# CONFIG_HIPPI is not set
782CONFIG_PPP=m
783CONFIG_PPP_MULTILINK=y
784CONFIG_PPP_FILTER=y
785CONFIG_PPP_ASYNC=m
786CONFIG_PPP_SYNC_TTY=m
787CONFIG_PPP_DEFLATE=m
788CONFIG_PPP_BSDCOMP=m
789CONFIG_PPPOE=m
790# CONFIG_SLIP is not set
791# CONFIG_NET_FC is not set
792# CONFIG_SHAPER is not set
793# CONFIG_NETCONSOLE is not set
794# CONFIG_NETPOLL is not set
795# CONFIG_NET_POLL_CONTROLLER is not set
796
797#
798# ISDN subsystem
799#
800# CONFIG_ISDN is not set
801
802#
803# Telephony Support
804#
805# CONFIG_PHONE is not set
806
807#
808# Input device support
809#
810CONFIG_INPUT=y
811
812#
813# Userland interfaces
814#
815CONFIG_INPUT_MOUSEDEV=y
816# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
817CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
818CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
819# CONFIG_INPUT_JOYDEV is not set
820# CONFIG_INPUT_TSDEV is not set
821# CONFIG_INPUT_EVDEV is not set
822# CONFIG_INPUT_EVBUG is not set
823
824#
825# Input Device Drivers
826#
827# CONFIG_INPUT_KEYBOARD is not set
828# CONFIG_INPUT_MOUSE is not set
829# CONFIG_INPUT_JOYSTICK is not set
830# CONFIG_INPUT_TOUCHSCREEN is not set
831# CONFIG_INPUT_MISC is not set
832
833#
834# Hardware I/O ports
835#
836# CONFIG_SERIO is not set
837# CONFIG_GAMEPORT is not set
838
839#
840# Character devices
841#
842CONFIG_VT=y
843CONFIG_VT_CONSOLE=y
844CONFIG_HW_CONSOLE=y
845# CONFIG_SERIAL_NONSTANDARD is not set
846
847#
848# Serial drivers
849#
850# CONFIG_SERIAL_8250 is not set
851
852#
853# Non-8250 serial port support
854#
855CONFIG_SERIAL_SH_SCI=y
856CONFIG_SERIAL_SH_SCI_CONSOLE=y
857CONFIG_SERIAL_CORE=y
858CONFIG_SERIAL_CORE_CONSOLE=y
859# CONFIG_SERIAL_JSM is not set
860CONFIG_UNIX98_PTYS=y
861CONFIG_LEGACY_PTYS=y
862CONFIG_LEGACY_PTY_COUNT=256
863
864#
865# IPMI
866#
867# CONFIG_IPMI_HANDLER is not set
868
869#
870# Watchdog Cards
871#
872# CONFIG_WATCHDOG is not set
873# CONFIG_RTC is not set
874# CONFIG_GEN_RTC is not set
875# CONFIG_DTLK is not set
876# CONFIG_R3964 is not set
877# CONFIG_APPLICOM is not set
878
879#
880# Ftape, the floppy tape device driver
881#
882# CONFIG_DRM is not set
883# CONFIG_RAW_DRIVER is not set
884
885#
886# TPM devices
887#
888# CONFIG_TCG_TPM is not set
889
890#
891# I2C support
892#
893# CONFIG_I2C is not set
894
895#
896# Dallas's 1-wire bus
897#
898# CONFIG_W1 is not set
899
900#
901# Hardware Monitoring support
902#
903CONFIG_HWMON=y
904# CONFIG_HWMON_VID is not set
905# CONFIG_HWMON_DEBUG_CHIP is not set
906
907#
908# Misc devices
909#
910
911#
912# Multimedia Capabilities Port drivers
913#
914
915#
916# Multimedia devices
917#
918# CONFIG_VIDEO_DEV is not set
919
920#
921# Digital Video Broadcasting Devices
922#
923# CONFIG_DVB is not set
924
925#
926# Graphics support
927#
928# CONFIG_FB is not set
929
930#
931# Console display driver support
932#
933CONFIG_DUMMY_CONSOLE=y
934
935#
936# Sound
937#
938# CONFIG_SOUND is not set
939
940#
941# USB support
942#
943CONFIG_USB_ARCH_HAS_HCD=y
944CONFIG_USB_ARCH_HAS_OHCI=y
945CONFIG_USB=m
946# CONFIG_USB_DEBUG is not set
947
948#
949# Miscellaneous USB options
950#
951CONFIG_USB_DEVICEFS=y
952# CONFIG_USB_BANDWIDTH is not set
953# CONFIG_USB_DYNAMIC_MINORS is not set
954# CONFIG_USB_OTG is not set
955
956#
957# USB Host Controller Drivers
958#
959CONFIG_USB_EHCI_HCD=m
960# CONFIG_USB_EHCI_SPLIT_ISO is not set
961# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
962# CONFIG_USB_ISP116X_HCD is not set
963CONFIG_USB_OHCI_HCD=m
964# CONFIG_USB_OHCI_BIG_ENDIAN is not set
965CONFIG_USB_OHCI_LITTLE_ENDIAN=y
966# CONFIG_USB_UHCI_HCD is not set
967# CONFIG_USB_SL811_HCD is not set
968
969#
970# USB Device Class drivers
971#
972# CONFIG_USB_BLUETOOTH_TTY is not set
973# CONFIG_USB_ACM is not set
974# CONFIG_USB_PRINTER is not set
975
976#
977# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
978#
979CONFIG_USB_STORAGE=m
980# CONFIG_USB_STORAGE_DEBUG is not set
981# CONFIG_USB_STORAGE_DATAFAB is not set
982# CONFIG_USB_STORAGE_FREECOM is not set
983# CONFIG_USB_STORAGE_DPCM is not set
984# CONFIG_USB_STORAGE_USBAT is not set
985# CONFIG_USB_STORAGE_SDDR09 is not set
986# CONFIG_USB_STORAGE_SDDR55 is not set
987# CONFIG_USB_STORAGE_JUMPSHOT is not set
988
989#
990# USB Input Devices
991#
992# CONFIG_USB_HID is not set
993
994#
995# USB HID Boot Protocol drivers
996#
997# CONFIG_USB_KBD is not set
998# CONFIG_USB_MOUSE is not set
999# CONFIG_USB_AIPTEK is not set
1000# CONFIG_USB_WACOM is not set
1001# CONFIG_USB_ACECAD is not set
1002# CONFIG_USB_KBTAB is not set
1003# CONFIG_USB_POWERMATE is not set
1004# CONFIG_USB_MTOUCH is not set
1005# CONFIG_USB_ITMTOUCH is not set
1006# CONFIG_USB_EGALAX is not set
1007# CONFIG_USB_YEALINK is not set
1008# CONFIG_USB_XPAD is not set
1009# CONFIG_USB_ATI_REMOTE is not set
1010# CONFIG_USB_KEYSPAN_REMOTE is not set
1011# CONFIG_USB_APPLETOUCH is not set
1012
1013#
1014# USB Imaging devices
1015#
1016# CONFIG_USB_MDC800 is not set
1017# CONFIG_USB_MICROTEK is not set
1018
1019#
1020# USB Multimedia devices
1021#
1022# CONFIG_USB_DABUSB is not set
1023
1024#
1025# Video4Linux support is needed for USB Multimedia device support
1026#
1027
1028#
1029# USB Network Adapters
1030#
1031# CONFIG_USB_CATC is not set
1032# CONFIG_USB_KAWETH is not set
1033# CONFIG_USB_PEGASUS is not set
1034# CONFIG_USB_RTL8150 is not set
1035# CONFIG_USB_USBNET is not set
1036# CONFIG_USB_ZD1201 is not set
1037CONFIG_USB_MON=y
1038
1039#
1040# USB port drivers
1041#
1042
1043#
1044# USB Serial Converter support
1045#
1046CONFIG_USB_SERIAL=m
1047CONFIG_USB_SERIAL_GENERIC=y
1048# CONFIG_USB_SERIAL_AIRPRIME is not set
1049# CONFIG_USB_SERIAL_BELKIN is not set
1050# CONFIG_USB_SERIAL_WHITEHEAT is not set
1051# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1052# CONFIG_USB_SERIAL_CP2101 is not set
1053# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1054# CONFIG_USB_SERIAL_EMPEG is not set
1055# CONFIG_USB_SERIAL_FTDI_SIO is not set
1056# CONFIG_USB_SERIAL_VISOR is not set
1057# CONFIG_USB_SERIAL_IPAQ is not set
1058# CONFIG_USB_SERIAL_IR is not set
1059# CONFIG_USB_SERIAL_EDGEPORT is not set
1060# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1061# CONFIG_USB_SERIAL_GARMIN is not set
1062# CONFIG_USB_SERIAL_IPW is not set
1063# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1064# CONFIG_USB_SERIAL_KEYSPAN is not set
1065# CONFIG_USB_SERIAL_KLSI is not set
1066# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1067# CONFIG_USB_SERIAL_MCT_U232 is not set
1068CONFIG_USB_SERIAL_PL2303=m
1069# CONFIG_USB_SERIAL_HP4X is not set
1070# CONFIG_USB_SERIAL_SAFE is not set
1071# CONFIG_USB_SERIAL_TI is not set
1072# CONFIG_USB_SERIAL_CYBERJACK is not set
1073# CONFIG_USB_SERIAL_XIRCOM is not set
1074# CONFIG_USB_SERIAL_OMNINET is not set
1075
1076#
1077# USB Miscellaneous drivers
1078#
1079# CONFIG_USB_EMI62 is not set
1080# CONFIG_USB_EMI26 is not set
1081# CONFIG_USB_AUERSWALD is not set
1082# CONFIG_USB_RIO500 is not set
1083# CONFIG_USB_LEGOTOWER is not set
1084# CONFIG_USB_LCD is not set
1085# CONFIG_USB_LED is not set
1086# CONFIG_USB_CYTHERM is not set
1087# CONFIG_USB_PHIDGETKIT is not set
1088# CONFIG_USB_PHIDGETSERVO is not set
1089# CONFIG_USB_IDMOUSE is not set
1090# CONFIG_USB_SISUSBVGA is not set
1091# CONFIG_USB_LD is not set
1092# CONFIG_USB_TEST is not set
1093
1094#
1095# USB DSL modem support
1096#
1097
1098#
1099# USB Gadget Support
1100#
1101# CONFIG_USB_GADGET is not set
1102
1103#
1104# MMC/SD Card support
1105#
1106# CONFIG_MMC is not set
1107
1108#
1109# InfiniBand support
1110#
1111# CONFIG_INFINIBAND is not set
1112
1113#
1114# SN Devices
1115#
1116
1117#
1118# File systems
1119#
1120CONFIG_EXT2_FS=y
1121CONFIG_EXT2_FS_XATTR=y
1122CONFIG_EXT2_FS_POSIX_ACL=y
1123CONFIG_EXT2_FS_SECURITY=y
1124# CONFIG_EXT2_FS_XIP is not set
1125CONFIG_EXT3_FS=y
1126CONFIG_EXT3_FS_XATTR=y
1127CONFIG_EXT3_FS_POSIX_ACL=y
1128CONFIG_EXT3_FS_SECURITY=y
1129CONFIG_JBD=y
1130# CONFIG_JBD_DEBUG is not set
1131CONFIG_FS_MBCACHE=y
1132CONFIG_REISERFS_FS=m
1133# CONFIG_REISERFS_CHECK is not set
1134# CONFIG_REISERFS_PROC_INFO is not set
1135# CONFIG_REISERFS_FS_XATTR is not set
1136# CONFIG_JFS_FS is not set
1137CONFIG_FS_POSIX_ACL=y
1138# CONFIG_XFS_FS is not set
1139# CONFIG_MINIX_FS is not set
1140# CONFIG_ROMFS_FS is not set
1141CONFIG_INOTIFY=y
1142# CONFIG_QUOTA is not set
1143CONFIG_DNOTIFY=y
1144# CONFIG_AUTOFS_FS is not set
1145# CONFIG_AUTOFS4_FS is not set
1146CONFIG_FUSE_FS=m
1147
1148#
1149# CD-ROM/DVD Filesystems
1150#
1151CONFIG_ISO9660_FS=m
1152CONFIG_JOLIET=y
1153CONFIG_ZISOFS=y
1154CONFIG_ZISOFS_FS=m
1155CONFIG_UDF_FS=m
1156CONFIG_UDF_NLS=y
1157
1158#
1159# DOS/FAT/NT Filesystems
1160#
1161CONFIG_FAT_FS=m
1162CONFIG_MSDOS_FS=m
1163CONFIG_VFAT_FS=m
1164CONFIG_FAT_DEFAULT_CODEPAGE=437
1165CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1166# CONFIG_NTFS_FS is not set
1167
1168#
1169# Pseudo filesystems
1170#
1171CONFIG_PROC_FS=y
1172CONFIG_PROC_KCORE=y
1173CONFIG_SYSFS=y
1174CONFIG_TMPFS=y
1175# CONFIG_HUGETLBFS is not set
1176# CONFIG_HUGETLB_PAGE is not set
1177CONFIG_RAMFS=y
1178CONFIG_RELAYFS_FS=m
1179
1180#
1181# Miscellaneous filesystems
1182#
1183# CONFIG_ADFS_FS is not set
1184# CONFIG_AFFS_FS is not set
1185# CONFIG_HFS_FS is not set
1186# CONFIG_HFSPLUS_FS is not set
1187# CONFIG_BEFS_FS is not set
1188# CONFIG_BFS_FS is not set
1189# CONFIG_EFS_FS is not set
1190# CONFIG_CRAMFS is not set
1191# CONFIG_VXFS_FS is not set
1192# CONFIG_HPFS_FS is not set
1193# CONFIG_QNX4FS_FS is not set
1194# CONFIG_SYSV_FS is not set
1195# CONFIG_UFS_FS is not set
1196
1197#
1198# Network File Systems
1199#
1200CONFIG_NFS_FS=y
1201CONFIG_NFS_V3=y
1202# CONFIG_NFS_V3_ACL is not set
1203# CONFIG_NFS_V4 is not set
1204# CONFIG_NFS_DIRECTIO is not set
1205CONFIG_NFSD=y
1206CONFIG_NFSD_V3=y
1207# CONFIG_NFSD_V3_ACL is not set
1208# CONFIG_NFSD_V4 is not set
1209CONFIG_NFSD_TCP=y
1210CONFIG_ROOT_NFS=y
1211CONFIG_LOCKD=y
1212CONFIG_LOCKD_V4=y
1213CONFIG_EXPORTFS=y
1214CONFIG_NFS_COMMON=y
1215CONFIG_SUNRPC=y
1216# CONFIG_RPCSEC_GSS_KRB5 is not set
1217# CONFIG_RPCSEC_GSS_SPKM3 is not set
1218CONFIG_SMB_FS=m
1219# CONFIG_SMB_NLS_DEFAULT is not set
1220# CONFIG_CIFS is not set
1221# CONFIG_NCP_FS is not set
1222# CONFIG_CODA_FS is not set
1223# CONFIG_AFS_FS is not set
1224CONFIG_9P_FS=m
1225
1226#
1227# Partition Types
1228#
1229CONFIG_PARTITION_ADVANCED=y
1230# CONFIG_ACORN_PARTITION is not set
1231# CONFIG_OSF_PARTITION is not set
1232# CONFIG_AMIGA_PARTITION is not set
1233# CONFIG_ATARI_PARTITION is not set
1234# CONFIG_MAC_PARTITION is not set
1235CONFIG_MSDOS_PARTITION=y
1236# CONFIG_BSD_DISKLABEL is not set
1237# CONFIG_MINIX_SUBPARTITION is not set
1238# CONFIG_SOLARIS_X86_PARTITION is not set
1239# CONFIG_UNIXWARE_DISKLABEL is not set
1240# CONFIG_LDM_PARTITION is not set
1241# CONFIG_SGI_PARTITION is not set
1242# CONFIG_ULTRIX_PARTITION is not set
1243# CONFIG_SUN_PARTITION is not set
1244# CONFIG_EFI_PARTITION is not set
1245
1246#
1247# Native Language Support
1248#
1249CONFIG_NLS=m
1250CONFIG_NLS_DEFAULT="iso8859-1"
1251CONFIG_NLS_CODEPAGE_437=m
1252# CONFIG_NLS_CODEPAGE_737 is not set
1253# CONFIG_NLS_CODEPAGE_775 is not set
1254# CONFIG_NLS_CODEPAGE_850 is not set
1255# CONFIG_NLS_CODEPAGE_852 is not set
1256# CONFIG_NLS_CODEPAGE_855 is not set
1257# CONFIG_NLS_CODEPAGE_857 is not set
1258# CONFIG_NLS_CODEPAGE_860 is not set
1259# CONFIG_NLS_CODEPAGE_861 is not set
1260# CONFIG_NLS_CODEPAGE_862 is not set
1261# CONFIG_NLS_CODEPAGE_863 is not set
1262# CONFIG_NLS_CODEPAGE_864 is not set
1263# CONFIG_NLS_CODEPAGE_865 is not set
1264# CONFIG_NLS_CODEPAGE_866 is not set
1265# CONFIG_NLS_CODEPAGE_869 is not set
1266# CONFIG_NLS_CODEPAGE_936 is not set
1267# CONFIG_NLS_CODEPAGE_950 is not set
1268# CONFIG_NLS_CODEPAGE_932 is not set
1269# CONFIG_NLS_CODEPAGE_949 is not set
1270# CONFIG_NLS_CODEPAGE_874 is not set
1271# CONFIG_NLS_ISO8859_8 is not set
1272# CONFIG_NLS_CODEPAGE_1250 is not set
1273# CONFIG_NLS_CODEPAGE_1251 is not set
1274CONFIG_NLS_ASCII=m
1275CONFIG_NLS_ISO8859_1=m
1276# CONFIG_NLS_ISO8859_2 is not set
1277# CONFIG_NLS_ISO8859_3 is not set
1278# CONFIG_NLS_ISO8859_4 is not set
1279# CONFIG_NLS_ISO8859_5 is not set
1280# CONFIG_NLS_ISO8859_6 is not set
1281# CONFIG_NLS_ISO8859_7 is not set
1282# CONFIG_NLS_ISO8859_9 is not set
1283# CONFIG_NLS_ISO8859_13 is not set
1284# CONFIG_NLS_ISO8859_14 is not set
1285# CONFIG_NLS_ISO8859_15 is not set
1286# CONFIG_NLS_KOI8_R is not set
1287# CONFIG_NLS_KOI8_U is not set
1288CONFIG_NLS_UTF8=m
1289
1290#
1291# Profiling support
1292#
1293# CONFIG_PROFILING is not set
1294
1295#
1296# Kernel hacking
1297#
1298# CONFIG_PRINTK_TIME is not set
1299CONFIG_DEBUG_KERNEL=y
1300CONFIG_MAGIC_SYSRQ=y
1301CONFIG_LOG_BUF_SHIFT=16
1302# CONFIG_DETECT_SOFTLOCKUP is not set
1303# CONFIG_SCHEDSTATS is not set
1304CONFIG_DEBUG_SLAB=y
1305# CONFIG_DEBUG_SPINLOCK is not set
1306# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1307# CONFIG_DEBUG_KOBJECT is not set
1308# CONFIG_DEBUG_INFO is not set
1309# CONFIG_DEBUG_FS is not set
1310# CONFIG_FRAME_POINTER is not set
1311# CONFIG_SH_STANDARD_BIOS is not set
1312CONFIG_EARLY_SCIF_CONSOLE=y
1313# CONFIG_EARLY_PRINTK is not set
1314# CONFIG_KGDB is not set
1315
1316#
1317# Security options
1318#
1319# CONFIG_KEYS is not set
1320# CONFIG_SECURITY is not set
1321
1322#
1323# Cryptographic options
1324#
1325CONFIG_CRYPTO=y
1326CONFIG_CRYPTO_HMAC=y
1327# CONFIG_CRYPTO_NULL is not set
1328CONFIG_CRYPTO_MD4=m
1329CONFIG_CRYPTO_MD5=m
1330CONFIG_CRYPTO_SHA1=m
1331CONFIG_CRYPTO_SHA256=m
1332CONFIG_CRYPTO_SHA512=m
1333CONFIG_CRYPTO_WP512=m
1334CONFIG_CRYPTO_TGR192=m
1335CONFIG_CRYPTO_DES=m
1336CONFIG_CRYPTO_BLOWFISH=m
1337CONFIG_CRYPTO_TWOFISH=m
1338CONFIG_CRYPTO_SERPENT=m
1339CONFIG_CRYPTO_AES=m
1340CONFIG_CRYPTO_CAST5=m
1341CONFIG_CRYPTO_CAST6=m
1342CONFIG_CRYPTO_TEA=m
1343CONFIG_CRYPTO_ARC4=m
1344CONFIG_CRYPTO_KHAZAD=m
1345CONFIG_CRYPTO_ANUBIS=m
1346CONFIG_CRYPTO_DEFLATE=m
1347CONFIG_CRYPTO_MICHAEL_MIC=m
1348CONFIG_CRYPTO_CRC32C=m
1349# CONFIG_CRYPTO_TEST is not set
1350
1351#
1352# Hardware crypto devices
1353#
1354
1355#
1356# Library routines
1357#
1358CONFIG_CRC_CCITT=m
1359CONFIG_CRC16=m
1360CONFIG_CRC32=y
1361CONFIG_LIBCRC32C=m
1362CONFIG_ZLIB_INFLATE=m
1363CONFIG_ZLIB_DEFLATE=m
1364CONFIG_TEXTSEARCH=y
1365CONFIG_TEXTSEARCH_KMP=m
1366CONFIG_TEXTSEARCH_BM=m
1367CONFIG_TEXTSEARCH_FSM=m
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 0f15216cd39d..defc13c37d48 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -11,6 +11,8 @@ config SH_DMA
11config NR_ONCHIP_DMA_CHANNELS 11config NR_ONCHIP_DMA_CHANNELS
12 depends on SH_DMA 12 depends on SH_DMA
13 int "Number of on-chip DMAC channels" 13 int "Number of on-chip DMAC channels"
14 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
15 default "12" if CPU_SUBTYPE_SH7780
14 default "4" 16 default "4"
15 help 17 help
16 This allows you to specify the number of channels that the on-chip 18 This allows you to specify the number of channels that the on-chip
@@ -52,4 +54,3 @@ config DMA_PAGE_OPS_CHANNEL
52 are dual-address capable. 54 are dual-address capable.
53 55
54endmenu 56endmenu
55
diff --git a/arch/sh/drivers/dma/dma-g2.c b/arch/sh/drivers/dma/dma-g2.c
index 0f866f8789f0..9cb070924180 100644
--- a/arch/sh/drivers/dma/dma-g2.c
+++ b/arch/sh/drivers/dma/dma-g2.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * G2 bus DMA support 4 * G2 bus DMA support
5 * 5 *
6 * Copyright (C) 2003, 2004 Paul Mundt 6 * Copyright (C) 2003 - 2006 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -13,7 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16 16#include <asm/cacheflush.h>
17#include <asm/mach/sysasic.h> 17#include <asm/mach/sysasic.h>
18#include <asm/mach/dma.h> 18#include <asm/mach/dma.h>
19#include <asm/dma.h> 19#include <asm/dma.h>
@@ -47,17 +47,31 @@ struct g2_dma_info {
47 47
48static volatile struct g2_dma_info *g2_dma = (volatile struct g2_dma_info *)0xa05f7800; 48static volatile struct g2_dma_info *g2_dma = (volatile struct g2_dma_info *)0xa05f7800;
49 49
50#define g2_bytes_remaining(i) \
51 ((g2_dma->channel[i].size - \
52 g2_dma->status[i].size) & 0x0fffffff)
53
50static irqreturn_t g2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) 54static irqreturn_t g2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
51{ 55{
52 /* FIXME: Do some meaningful completion work here.. */ 56 int i;
53 return IRQ_HANDLED;
54}
55 57
56static struct irqaction g2_dma_irq = { 58 for (i = 0; i < G2_NR_DMA_CHANNELS; i++) {
57 .name = "g2 DMA handler", 59 if (g2_dma->status[i].status & 0x20000000) {
58 .handler = g2_dma_interrupt, 60 unsigned int bytes = g2_bytes_remaining(i);
59 .flags = IRQF_DISABLED, 61
60}; 62 if (likely(bytes == 0)) {
63 struct dma_info *info = dev_id;
64 struct dma_channel *chan = info->channels + i;
65
66 wake_up(&chan->wait_queue);
67
68 return IRQ_HANDLED;
69 }
70 }
71 }
72
73 return IRQ_NONE;
74}
61 75
62static int g2_enable_dma(struct dma_channel *chan) 76static int g2_enable_dma(struct dma_channel *chan)
63{ 77{
@@ -135,8 +149,14 @@ static int g2_xfer_dma(struct dma_channel *chan)
135 return 0; 149 return 0;
136} 150}
137 151
152static int g2_get_residue(struct dma_channel *chan)
153{
154 return g2_bytes_remaining(chan->chan);
155}
156
138static struct dma_ops g2_dma_ops = { 157static struct dma_ops g2_dma_ops = {
139 .xfer = g2_xfer_dma, 158 .xfer = g2_xfer_dma,
159 .get_residue = g2_get_residue,
140}; 160};
141 161
142static struct dma_info g2_dma_info = { 162static struct dma_info g2_dma_info = {
@@ -148,13 +168,22 @@ static struct dma_info g2_dma_info = {
148 168
149static int __init g2_dma_init(void) 169static int __init g2_dma_init(void)
150{ 170{
151 setup_irq(HW_EVENT_G2_DMA, &g2_dma_irq); 171 int ret;
172
173 ret = request_irq(HW_EVENT_G2_DMA, g2_dma_interrupt, IRQF_DISABLED,
174 "g2 DMA handler", &g2_dma_info);
175 if (unlikely(ret))
176 return -EINVAL;
152 177
153 /* Magic */ 178 /* Magic */
154 g2_dma->wait_state = 27; 179 g2_dma->wait_state = 27;
155 g2_dma->magic = 0x4659404f; 180 g2_dma->magic = 0x4659404f;
156 181
157 return register_dmac(&g2_dma_info); 182 ret = register_dmac(&g2_dma_info);
183 if (unlikely(ret != 0))
184 free_irq(HW_EVENT_G2_DMA, 0);
185
186 return ret;
158} 187}
159 188
160static void __exit g2_dma_exit(void) 189static void __exit g2_dma_exit(void)
@@ -169,4 +198,3 @@ module_exit(g2_dma_exit);
169MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>"); 198MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
170MODULE_DESCRIPTION("G2 bus DMA driver"); 199MODULE_DESCRIPTION("G2 bus DMA driver");
171MODULE_LICENSE("GPL"); 200MODULE_LICENSE("GPL");
172
diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c
index 30a580aa7cbd..3b0b0f60bb3c 100644
--- a/arch/sh/drivers/dma/dma-pvr2.c
+++ b/arch/sh/drivers/dma/dma-pvr2.c
@@ -18,8 +18,8 @@
18#include <asm/dma.h> 18#include <asm/dma.h>
19#include <asm/io.h> 19#include <asm/io.h>
20 20
21static unsigned int xfer_complete = 0; 21static unsigned int xfer_complete;
22static int count = 0; 22static int count;
23 23
24static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) 24static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
25{ 25{
@@ -107,4 +107,3 @@ module_exit(pvr2_dma_exit);
107MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>"); 107MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
108MODULE_DESCRIPTION("NEC PowerVR 2 DMA driver"); 108MODULE_DESCRIPTION("NEC PowerVR 2 DMA driver");
109MODULE_LICENSE("GPL"); 109MODULE_LICENSE("GPL");
110
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index e028a2d2a4ea..cbbe8bce3d67 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -11,14 +11,10 @@
11 * License. See the file "COPYING" in the main directory of this archive 11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details. 12 * for more details.
13 */ 13 */
14
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/irq.h>
17#include <linux/interrupt.h> 15#include <linux/interrupt.h>
18#include <linux/module.h> 16#include <linux/module.h>
19#include <asm/dreamcast/dma.h> 17#include <asm/dreamcast/dma.h>
20#include <asm/signal.h>
21#include <asm/irq.h>
22#include <asm/dma.h> 18#include <asm/dma.h>
23#include <asm/io.h> 19#include <asm/io.h>
24#include "dma-sh.h" 20#include "dma-sh.h"
@@ -84,18 +80,23 @@ static irqreturn_t dma_tei(int irq, void *dev_id, struct pt_regs *regs)
84 80
85static int sh_dmac_request_dma(struct dma_channel *chan) 81static int sh_dmac_request_dma(struct dma_channel *chan)
86{ 82{
87 char name[32]; 83 if (unlikely(!chan->flags & DMA_TEI_CAPABLE))
84 return 0;
88 85
89 snprintf(name, sizeof(name), "DMAC Transfer End (Channel %d)", 86 chan->name = kzalloc(32, GFP_KERNEL);
87 if (unlikely(chan->name == NULL))
88 return -ENOMEM;
89 snprintf(chan->name, 32, "DMAC Transfer End (Channel %d)",
90 chan->chan); 90 chan->chan);
91 91
92 return request_irq(get_dmte_irq(chan->chan), dma_tei, 92 return request_irq(get_dmte_irq(chan->chan), dma_tei,
93 IRQF_DISABLED, name, chan); 93 IRQF_DISABLED, chan->name, chan);
94} 94}
95 95
96static void sh_dmac_free_dma(struct dma_channel *chan) 96static void sh_dmac_free_dma(struct dma_channel *chan)
97{ 97{
98 free_irq(get_dmte_irq(chan->chan), chan); 98 free_irq(get_dmte_irq(chan->chan), chan);
99 kfree(chan->name);
99} 100}
100 101
101static void 102static void
@@ -259,7 +260,7 @@ static int __init sh_dmac_init(void)
259#ifdef CONFIG_CPU_SH4 260#ifdef CONFIG_CPU_SH4
260 make_ipr_irq(DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); 261 make_ipr_irq(DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
261 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0); 262 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
262 if (i < 0) 263 if (unlikely(i < 0))
263 return i; 264 return i;
264#endif 265#endif
265 266
@@ -274,7 +275,7 @@ static int __init sh_dmac_init(void)
274 * been set. 275 * been set.
275 */ 276 */
276 i = dmaor_reset(); 277 i = dmaor_reset();
277 if (i < 0) 278 if (unlikely(i != 0))
278 return i; 279 return i;
279 280
280 return register_dmac(info); 281 return register_dmac(info);
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 365bc16a4a83..9e00cb8a39e9 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -6,7 +6,8 @@ obj-y += pci.o
6obj-$(CONFIG_PCI_AUTO) += pci-auto.o 6obj-$(CONFIG_PCI_AUTO) += pci-auto.o
7 7
8obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += pci-st40.o 8obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += pci-st40.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
10 11
11obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 12obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
12 dma-dreamcast.o 13 dma-dreamcast.o
@@ -14,3 +15,6 @@ obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
14obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o 15obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o
15obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o 16obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
16obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o 17obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
18obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o
19obj-$(CONFIG_SH_TITAN) += ops-titan.o
20obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index 63b1c6f4b8d2..c0af5f7ef414 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -4,7 +4,7 @@
4 * PCI fixups for the Sega Dreamcast 4 * PCI fixups for the Sega Dreamcast
5 * 5 *
6 * Copyright (C) 2001, 2002 M. R. Brown 6 * Copyright (C) 2001, 2002 M. R. Brown
7 * Copyright (C) 2002, 2003 Paul Mundt 7 * Copyright (C) 2002, 2003, 2006 Paul Mundt
8 * 8 *
9 * This file originally bore the message (with enclosed-$): 9 * This file originally bore the message (with enclosed-$):
10 * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp 10 * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp
@@ -45,36 +45,16 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev)
45 printk("PCI: Failed resource fixup\n"); 45 printk("PCI: Failed resource fixup\n");
46 } 46 }
47} 47}
48
49DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources); 48DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources);
50 49
51void __init pcibios_fixup_bus(struct pci_bus *bus) 50int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
52{ 51{
53 /* 52 /*
54 * We don't have any sub bus to fix up, and this is a rather 53 * The interrupt routing semantics here are quite trivial.
55 * stupid place to put general device fixups. Don't do it. 54 *
56 * Use the pcibios_fixups table or suffer the consequences. 55 * We basically only support one interrupt, so we only bother
56 * updating a device's interrupt line with this single shared
57 * interrupt. Keeps routing quite simple, doesn't it?
57 */ 58 */
59 return GAPSPCI_IRQ;
58} 60}
59
60void __init pcibios_fixup_irqs(void)
61{
62 struct pci_dev *dev = 0;
63
64 for_each_pci_dev(dev) {
65 /*
66 * The interrupt routing semantics here are quite trivial.
67 *
68 * We basically only support one interrupt, so we only bother
69 * updating a device's interrupt line with this single shared
70 * interrupt. Keeps routing quite simple, doesn't it?
71 */
72 printk(KERN_NOTICE "PCI: Fixing up IRQ routing for device %s\n",
73 pci_name(dev));
74
75 dev->irq = GAPSPCI_IRQ;
76
77 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
78 }
79}
80
diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c
new file mode 100644
index 000000000000..3e321df65d22
--- /dev/null
+++ b/arch/sh/drivers/pci/fixups-r7780rp.c
@@ -0,0 +1,45 @@
1/*
2 * arch/sh/drivers/pci/fixups-r7780rp.c
3 *
4 * Highlander R7780RP-1 PCI fixups
5 *
6 * Copyright (C) 2003 Lineo uSolutions, Inc.
7 * Copyright (C) 2004 - 2006 Paul Mundt
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/pci.h>
14#include "pci-sh4.h"
15#include <asm/io.h>
16
17int pci_fixup_pcic(void)
18{
19 pci_write_reg(0x000043ff, SH4_PCIINTM);
20 pci_write_reg(0x0000380f, SH4_PCIAINTM);
21
22 pci_write_reg(0xfbb00047, SH7780_PCICMD);
23 pci_write_reg(0x00000000, SH7780_PCIIBAR);
24
25 pci_write_reg(0x00011912, SH7780_PCISVID);
26 pci_write_reg(0x08000000, SH7780_PCICSCR0);
27 pci_write_reg(0x0000001b, SH7780_PCICSAR0);
28 pci_write_reg(0xfd000000, SH7780_PCICSCR1);
29 pci_write_reg(0x0000000f, SH7780_PCICSAR1);
30
31 pci_write_reg(0xfd000000, SH7780_PCIMBR0);
32 pci_write_reg(0x00fc0000, SH7780_PCIMBMR0);
33
34#ifdef CONFIG_32BIT
35 pci_write_reg(0xc0000000, SH7780_PCIMBR2);
36 pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
37#endif
38
39 /* Set IOBR for windows containing area specified in pci.h */
40 pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)),
41 SH7780_PCIIOBR);
42 pci_write_reg(((SH7780_PCI_IO_SIZE-1) & (7<<18)), SH7780_PCIIOBMR);
43
44 return 0;
45}
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c
index 0c590fc7a081..e72ceb560d5b 100644
--- a/arch/sh/drivers/pci/fixups-rts7751r2d.c
+++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c
@@ -10,8 +10,7 @@
10 * License. See the file "COPYING" in the main directory of this archive 10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details. 11 * for more details.
12 */ 12 */
13#include "pci-sh7751.h" 13#include "pci-sh4.h"
14#include <asm/io.h>
15 14
16#define PCIMCR_MRSET_OFF 0xBFFFFFFF 15#define PCIMCR_MRSET_OFF 0xBFFFFFFF
17#define PCIMCR_RFSH_OFF 0xFFFFFFFB 16#define PCIMCR_RFSH_OFF 0xFFFFFFFB
@@ -22,22 +21,23 @@ int pci_fixup_pcic(void)
22 21
23 bcr1 = inl(SH7751_BCR1); 22 bcr1 = inl(SH7751_BCR1);
24 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ 23 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
25 outl(bcr1, PCI_REG(SH7751_PCIBCR1)); 24 pci_write_reg(bcr1, SH4_PCIBCR1);
26 25
27 /* Enable all interrupts, so we known what to fix */ 26 /* Enable all interrupts, so we known what to fix */
28 outl(0x0000c3ff, PCI_REG(SH7751_PCIINTM)); 27 pci_write_reg(0x0000c3ff, SH4_PCIINTM);
29 outl(0x0000380f, PCI_REG(SH7751_PCIAINTM)); 28 pci_write_reg(0x0000380f, SH4_PCIAINTM);
30 29
31 outl(0xfb900047, PCI_REG(SH7751_PCICONF1)); 30 pci_write_reg(0xfb900047, SH7751_PCICONF1);
32 outl(0xab000001, PCI_REG(SH7751_PCICONF4)); 31 pci_write_reg(0xab000001, SH7751_PCICONF4);
33 32
34 mcr = inl(SH7751_MCR); 33 mcr = inl(SH7751_MCR);
35 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; 34 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
36 outl(mcr, PCI_REG(SH7751_PCIMCR)); 35 pci_write_reg(mcr, SH4_PCIMCR);
36
37 pci_write_reg(0x0c000000, SH7751_PCICONF5);
38 pci_write_reg(0xd0000000, SH7751_PCICONF6);
39 pci_write_reg(0x0c000000, SH4_PCILAR0);
40 pci_write_reg(0x00000000, SH4_PCILAR1);
37 41
38 outl(0x0c000000, PCI_REG(SH7751_PCICONF5));
39 outl(0xd0000000, PCI_REG(SH7751_PCICONF6));
40 outl(0x0c000000, PCI_REG(SH7751_PCILAR0));
41 outl(0x00000000, PCI_REG(SH7751_PCILAR1));
42 return 0; 42 return 0;
43} 43}
diff --git a/arch/sh/drivers/pci/fixups-sh03.c b/arch/sh/drivers/pci/fixups-sh03.c
index 57ac26c2171f..2e8a18b7ee53 100644
--- a/arch/sh/drivers/pci/fixups-sh03.c
+++ b/arch/sh/drivers/pci/fixups-sh03.c
@@ -3,11 +3,7 @@
3#include <linux/types.h> 3#include <linux/types.h>
4#include <linux/pci.h> 4#include <linux/pci.h>
5 5
6/* 6int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
7 * IRQ functions
8 */
9
10int __init pcibios_map_platform_irq(u8 slot, u8 pin, struct pci_dev *dev)
11{ 7{
12 int irq; 8 int irq;
13 9
@@ -17,8 +13,9 @@ int __init pcibios_map_platform_irq(u8 slot, u8 pin, struct pci_dev *dev)
17 case 8: return 5; /* eth1 */ 13 case 8: return 5; /* eth1 */
18 case 6: return 2; /* PCI bridge */ 14 case 6: return 2; /* PCI bridge */
19 default: 15 default:
20 printk("PCI: Bad IRQ mapping request for slot %d\n", slot); 16 printk(KERN_ERR "PCI: Bad IRQ mapping request "
21 return 2; 17 "for slot %d\n", slot);
18 return 2;
22 } 19 }
23 } else { 20 } else {
24 switch (pin) { 21 switch (pin) {
@@ -32,30 +29,3 @@ int __init pcibios_map_platform_irq(u8 slot, u8 pin, struct pci_dev *dev)
32 } 29 }
33 return irq; 30 return irq;
34} 31}
35
36static u8 __init sh03_no_swizzle(struct pci_dev *dev, u8 *pin)
37{
38 /* no swizzling */
39 return PCI_SLOT(dev->devfn);
40}
41
42static int sh03_pci_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin)
43{
44 int irq = -1;
45
46 /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
47 irq = pcibios_map_platform_irq(slot, pin, dev);
48 if( irq < 0 ) {
49 pr_debug("PCI: Error mapping IRQ on device %s\n", pci_name(dev));
50 return irq;
51 }
52
53 pr_debug("Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
54
55 return irq;
56}
57
58void __init pcibios_fixup_irqs(void)
59{
60 pci_fixup_irqs(sh03_no_swizzle, sh03_pci_lookup_irq);
61}
diff --git a/arch/sh/drivers/pci/ops-bigsur.c b/arch/sh/drivers/pci/ops-bigsur.c
index ae82c6ca05e5..5da501bd77b5 100644
--- a/arch/sh/drivers/pci/ops-bigsur.c
+++ b/arch/sh/drivers/pci/ops-bigsur.c
@@ -10,15 +10,12 @@
10 * 10 *
11 * PCI initialization for the Hitachi Big Sur Evaluation Board 11 * PCI initialization for the Hitachi Big Sur Evaluation Board
12 */ 12 */
13
14#include <linux/kernel.h> 13#include <linux/kernel.h>
15#include <linux/types.h> 14#include <linux/types.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pci.h> 16#include <linux/pci.h>
19
20#include <asm/io.h> 17#include <asm/io.h>
21#include "pci-sh7751.h" 18#include "pci-sh4.h"
22#include <asm/bigsur/bigsur.h> 19#include <asm/bigsur/bigsur.h>
23 20
24#define BIGSUR_PCI_IO 0x4000 21#define BIGSUR_PCI_IO 0x4000
@@ -41,11 +38,11 @@ static struct resource sh7751_mem_resource = {
41extern struct pci_ops sh7751_pci_ops; 38extern struct pci_ops sh7751_pci_ops;
42 39
43struct pci_channel board_pci_channels[] = { 40struct pci_channel board_pci_channels[] = {
44 { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, 41 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
45 { 0, } 42 { 0, }
46}; 43};
47 44
48static struct sh7751_pci_address_map sh7751_pci_map = { 45static struct sh4_pci_address_map sh7751_pci_map = {
49 .window0 = { 46 .window0 = {
50 .base = SH7751_CS3_BASE_ADDR, 47 .base = SH7751_CS3_BASE_ADDR,
51 .size = BIGSUR_LSR0_SIZE, 48 .size = BIGSUR_LSR0_SIZE,
@@ -58,7 +55,7 @@ static struct sh7751_pci_address_map sh7751_pci_map = {
58}; 55};
59 56
60/* 57/*
61 * Initialize the Big Sur PCI interface 58 * Initialize the Big Sur PCI interface
62 * Setup hardware to be Central Funtion 59 * Setup hardware to be Central Funtion
63 * Copy the BSR regs to the PCI interface 60 * Copy the BSR regs to the PCI interface
64 * Setup PCI windows into local RAM 61 * Setup PCI windows into local RAM
@@ -68,15 +65,15 @@ int __init pcibios_init_platform(void)
68 return sh7751_pcic_init(&sh7751_pci_map); 65 return sh7751_pcic_init(&sh7751_pci_map);
69} 66}
70 67
71int pcibios_map_platform_irq(u8 slot, u8 pin) 68int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
72{ 69{
73 /* 70 /*
74 * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI 71 * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
75 * interface is on the wrong end of the board so that it can also 72 * interface is on the wrong end of the board so that it can also
76 * support a V320 CPI interface chip... Therefor the IRQ mapping is 73 * support a V320 CPI interface chip... Therefor the IRQ mapping is
77 * somewhat use dependent... I'l assume a linear map for now, i.e. 74 * somewhat use dependent... I'l assume a linear map for now, i.e.
78 * INTA=slot0,pin0... INTD=slot3,pin0... 75 * INTA=slot0,pin0... INTD=slot3,pin0...
79 */ 76 */
80 int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE; 77 int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
81 78
82 PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n", 79 PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
@@ -84,4 +81,3 @@ int pcibios_map_platform_irq(u8 slot, u8 pin)
84 81
85 return irq; 82 return irq;
86} 83}
87
diff --git a/arch/sh/drivers/pci/ops-landisk.c b/arch/sh/drivers/pci/ops-landisk.c
new file mode 100644
index 000000000000..ada301c21fe7
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-landisk.c
@@ -0,0 +1,68 @@
1/*
2 * arch/sh/drivers/pci/ops-landisk.c
3 *
4 * PCI initialization for the I-O DATA Device, Inc. LANDISK board
5 *
6 * Copyright (C) 2006 kogiidena
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 */
11#include <linux/config.h>
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pci.h>
17#include "pci-sh4.h"
18
19static struct resource sh7751_io_resource = {
20 .name = "SH7751 IO",
21 .start = 0x4000,
22 .end = 0x4000 + SH7751_PCI_IO_SIZE - 1,
23 .flags = IORESOURCE_IO
24};
25
26static struct resource sh7751_mem_resource = {
27 .name = "SH7751 mem",
28 .start = SH7751_PCI_MEMORY_BASE,
29 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
30 .flags = IORESOURCE_MEM
31};
32
33struct pci_channel board_pci_channels[] = {
34 {&sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0x3ff},
35 {NULL, NULL, NULL, 0, 0},
36};
37
38static struct sh4_pci_address_map sh7751_pci_map = {
39 .window0 = {
40 .base = SH7751_CS3_BASE_ADDR,
41 .size = (64 << 20), /* 64MB */
42 },
43
44 .flags = SH4_PCIC_NO_RESET,
45};
46
47int __init pcibios_init_platform(void)
48{
49 return sh7751_pcic_init(&sh7751_pci_map);
50}
51
52int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
53{
54 /*
55 * slot0: pin1-4 = irq5,6,7,8
56 * slot1: pin1-4 = irq6,7,8,5
57 * slot2: pin1-4 = irq7,8,5,6
58 * slot3: pin1-4 = irq8,5,6,7
59 */
60 int irq = ((slot + pin - 1) & 0x3) + 5;
61
62 if ((slot | (pin - 1)) > 0x3) {
63 printk("PCI: Bad IRQ mapping request for slot %d pin %c\n",
64 slot, pin - 1 + 'A');
65 return -1;
66 }
67 return irq;
68}
diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c
new file mode 100644
index 000000000000..554d5ed2c586
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-r7780rp.c
@@ -0,0 +1,75 @@
1/*
2 * Author: Ian DaSilva (idasilva@mvista.com)
3 *
4 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * PCI initialization for the Renesas SH7780 Highlander R7780RP-1 board
10 */
11
12#include <linux/config.h>
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pci.h>
18#include <asm/r7780rp/r7780rp.h>
19#include <asm/io.h>
20#include "pci-sh4.h"
21
22int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
23{
24 switch (slot) {
25 case 0: return IRQ_PCISLOT1; /* PCI Interrupt #1 */
26 case 1: return IRQ_PCISLOT2; /* PCI Interrupt #2 */
27 case 2: return IRQ_PCISLOT3; /* PCI Interrupt #3 */
28 case 3: return IRQ_PCISLOT4; /* PCI Interrupt E4 */
29 default:
30 printk(KERN_ERR "PCI: Bad IRQ mapping "
31 "request for slot %d, func %d\n", slot, pin-1);
32 return -1;
33 }
34}
35
36static struct resource sh7780_io_resource = {
37 .name = "SH7780_IO",
38 .start = 0x2000,
39 .end = 0x2000 + SH7780_PCI_IO_SIZE - 1,
40 .flags = IORESOURCE_IO
41};
42
43static struct resource sh7780_mem_resource = {
44 .name = "SH7780_mem",
45 .start = SH7780_PCI_MEMORY_BASE,
46 .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
47 .flags = IORESOURCE_MEM
48};
49
50extern struct pci_ops sh7780_pci_ops;
51
52struct pci_channel board_pci_channels[] = {
53 { &sh4_pci_ops, &sh7780_io_resource, &sh7780_mem_resource, 0, 0xff },
54 { NULL, NULL, NULL, 0, 0 },
55};
56EXPORT_SYMBOL(board_pci_channels);
57
58static struct sh4_pci_address_map sh7780_pci_map = {
59 .window0 = {
60 .base = SH7780_CS2_BASE_ADDR,
61 .size = 0x04000000,
62 },
63
64 .window1 = {
65 .base = SH7780_CS3_BASE_ADDR,
66 .size = 0x04000000,
67 },
68
69 .flags = SH4_PCIC_NO_RESET,
70};
71
72int __init pcibios_init_platform(void)
73{
74 return sh7780_pcic_init(&sh7780_pci_map);
75}
diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c
index 83171d10141a..88f44e245424 100644
--- a/arch/sh/drivers/pci/ops-rts7751r2d.c
+++ b/arch/sh/drivers/pci/ops-rts7751r2d.c
@@ -17,12 +17,11 @@
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/module.h> 19#include <linux/module.h>
20
21#include <asm/io.h>
22#include "pci-sh7751.h"
23#include <asm/rts7751r2d/rts7751r2d.h> 20#include <asm/rts7751r2d/rts7751r2d.h>
21#include <asm/io.h>
22#include "pci-sh4.h"
24 23
25int __init pcibios_map_platform_irq(u8 slot, u8 pin) 24int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
26{ 25{
27 switch (slot) { 26 switch (slot) {
28 case 0: return IRQ_PCISLOT1; /* PCI Extend slot #1 */ 27 case 0: return IRQ_PCISLOT1; /* PCI Extend slot #1 */
@@ -52,12 +51,12 @@ static struct resource sh7751_mem_resource = {
52extern struct pci_ops sh7751_pci_ops; 51extern struct pci_ops sh7751_pci_ops;
53 52
54struct pci_channel board_pci_channels[] = { 53struct pci_channel board_pci_channels[] = {
55 { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, 54 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
56 { NULL, NULL, NULL, 0, 0 }, 55 { NULL, NULL, NULL, 0, 0 },
57}; 56};
58EXPORT_SYMBOL(board_pci_channels); 57EXPORT_SYMBOL(board_pci_channels);
59 58
60static struct sh7751_pci_address_map sh7751_pci_map = { 59static struct sh4_pci_address_map sh7751_pci_map = {
61 .window0 = { 60 .window0 = {
62 .base = SH7751_CS3_BASE_ADDR, 61 .base = SH7751_CS3_BASE_ADDR,
63 .size = 0x04000000, 62 .size = 0x04000000,
@@ -68,7 +67,7 @@ static struct sh7751_pci_address_map sh7751_pci_map = {
68 .size = 0x00000000, /* Unused */ 67 .size = 0x00000000, /* Unused */
69 }, 68 },
70 69
71 .flags = SH7751_PCIC_NO_RESET, 70 .flags = SH4_PCIC_NO_RESET,
72}; 71};
73 72
74int __init pcibios_init_platform(void) 73int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
new file mode 100644
index 000000000000..2d4371009a5e
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -0,0 +1,164 @@
1/*
2 * Generic SH-4 / SH-4A PCIC operations (SH7751, SH7780).
3 *
4 * Copyright (C) 2002 - 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License v2. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/pci.h>
11#include <asm/addrspace.h>
12#include <asm/io.h>
13#include "pci-sh4.h"
14
15/*
16 * Direct access to PCI hardware...
17 */
18#define CONFIG_CMD(bus, devfn, where) \
19 P1SEGADDR((bus->number << 16) | (devfn << 8) | (where & ~3))
20
21static DEFINE_SPINLOCK(sh4_pci_lock);
22
23/*
24 * Functions for accessing PCI configuration space with type 1 accesses
25 */
26static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
27 int where, int size, u32 *val)
28{
29 unsigned long flags;
30 u32 data;
31
32 /*
33 * PCIPDR may only be accessed as 32 bit words,
34 * so we must do byte alignment by hand
35 */
36 spin_lock_irqsave(&sh4_pci_lock, flags);
37 pci_write_reg(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
38 data = pci_read_reg(SH4_PCIPDR);
39 spin_unlock_irqrestore(&sh4_pci_lock, flags);
40
41 switch (size) {
42 case 1:
43 *val = (data >> ((where & 3) << 3)) & 0xff;
44 break;
45 case 2:
46 *val = (data >> ((where & 2) << 3)) & 0xffff;
47 break;
48 case 4:
49 *val = data;
50 break;
51 default:
52 return PCIBIOS_FUNC_NOT_SUPPORTED;
53 }
54
55 return PCIBIOS_SUCCESSFUL;
56}
57
58/*
59 * Since SH4 only does 32bit access we'll have to do a read,
60 * mask,write operation.
61 * We'll allow an odd byte offset, though it should be illegal.
62 */
63static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
64 int where, int size, u32 val)
65{
66 unsigned long flags;
67 int shift;
68 u32 data;
69
70 spin_lock_irqsave(&sh4_pci_lock, flags);
71 pci_write_reg(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
72 data = pci_read_reg(SH4_PCIPDR);
73 spin_unlock_irqrestore(&sh4_pci_lock, flags);
74
75 switch (size) {
76 case 1:
77 shift = (where & 3) << 3;
78 data &= ~(0xff << shift);
79 data |= ((val & 0xff) << shift);
80 break;
81 case 2:
82 shift = (where & 2) << 3;
83 data &= ~(0xffff << shift);
84 data |= ((val & 0xffff) << shift);
85 break;
86 case 4:
87 data = val;
88 break;
89 default:
90 return PCIBIOS_FUNC_NOT_SUPPORTED;
91 }
92
93 pci_write_reg(data, SH4_PCIPDR);
94
95 return PCIBIOS_SUCCESSFUL;
96}
97
98struct pci_ops sh4_pci_ops = {
99 .read = sh4_pci_read,
100 .write = sh4_pci_write,
101};
102
103/*
104 * Not really related to pci_ops, but it's common and not worth shoving
105 * somewhere else for now..
106 */
107static unsigned int pci_probe = PCI_PROBE_CONF1;
108
109int __init sh4_pci_check_direct(void)
110{
111 /*
112 * Check if configuration works.
113 */
114 if (pci_probe & PCI_PROBE_CONF1) {
115 unsigned int tmp = pci_read_reg(SH4_PCIPAR);
116
117 pci_write_reg(P1SEG, SH4_PCIPAR);
118
119 if (pci_read_reg(SH4_PCIPAR) == P1SEG) {
120 pci_write_reg(tmp, SH4_PCIPAR);
121 printk(KERN_INFO "PCI: Using configuration type 1\n");
122 request_region(PCI_REG(SH4_PCIPAR), 8, "PCI conf1");
123
124 return 0;
125 }
126
127 pci_write_reg(tmp, SH4_PCIPAR);
128 }
129
130 pr_debug("PCI: pci_check_direct failed\n");
131 return -EINVAL;
132}
133
134/* Handle generic fixups */
135static void __init pci_fixup_ide_bases(struct pci_dev *d)
136{
137 int i;
138
139 /*
140 * PCI IDE controllers use non-standard I/O port decoding, respect it.
141 */
142 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
143 return;
144 pr_debug("PCI: IDE base address fixup for %s\n", pci_name(d));
145 for(i = 0; i < 4; i++) {
146 struct resource *r = &d->resource[i];
147
148 if ((r->start & ~0x80) == 0x374) {
149 r->start |= 2;
150 r->end = r->start;
151 }
152 }
153}
154DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
155
156char * __init pcibios_setup(char *str)
157{
158 if (!strcmp(str, "off")) {
159 pci_probe = 0;
160 return NULL;
161 }
162
163 return str;
164}
diff --git a/arch/sh/drivers/pci/ops-snapgear.c b/arch/sh/drivers/pci/ops-snapgear.c
index 3cbd14dd28fe..53dd893d4e54 100644
--- a/arch/sh/drivers/pci/ops-snapgear.c
+++ b/arch/sh/drivers/pci/ops-snapgear.c
@@ -2,7 +2,7 @@
2 * arch/sh/drivers/pci/ops-snapgear.c 2 * arch/sh/drivers/pci/ops-snapgear.c
3 * 3 *
4 * Author: David McCullough <davidm@snapgear.com> 4 * Author: David McCullough <davidm@snapgear.com>
5 * 5 *
6 * Ported to new API by Paul Mundt <lethal@linux-sh.org> 6 * Ported to new API by Paul Mundt <lethal@linux-sh.org>
7 * 7 *
8 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. 8 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
@@ -12,15 +12,11 @@
12 * 12 *
13 * PCI initialization for the SnapGear boards 13 * PCI initialization for the SnapGear boards
14 */ 14 */
15
16#include <linux/kernel.h> 15#include <linux/kernel.h>
17#include <linux/types.h> 16#include <linux/types.h>
18#include <linux/init.h> 17#include <linux/init.h>
19#include <linux/delay.h>
20#include <linux/pci.h> 18#include <linux/pci.h>
21 19#include "pci-sh4.h"
22#include <asm/io.h>
23#include "pci-sh7751.h"
24 20
25#define SNAPGEAR_PCI_IO 0x4000 21#define SNAPGEAR_PCI_IO 0x4000
26#define SNAPGEAR_PCI_MEM 0xfd000000 22#define SNAPGEAR_PCI_MEM 0xfd000000
@@ -43,14 +39,12 @@ static struct resource sh7751_mem_resource = {
43 .flags = IORESOURCE_MEM, 39 .flags = IORESOURCE_MEM,
44}; 40};
45 41
46extern struct pci_ops sh7751_pci_ops;
47
48struct pci_channel board_pci_channels[] = { 42struct pci_channel board_pci_channels[] = {
49 { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, 43 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
50 { 0, } 44 { 0, }
51}; 45};
52 46
53static struct sh7751_pci_address_map sh7751_pci_map = { 47static struct sh4_pci_address_map sh7751_pci_map = {
54 .window0 = { 48 .window0 = {
55 .base = SH7751_CS2_BASE_ADDR, 49 .base = SH7751_CS2_BASE_ADDR,
56 .size = SNAPGEAR_LSR0_SIZE, 50 .size = SNAPGEAR_LSR0_SIZE,
@@ -61,11 +55,11 @@ static struct sh7751_pci_address_map sh7751_pci_map = {
61 .size = SNAPGEAR_LSR1_SIZE, 55 .size = SNAPGEAR_LSR1_SIZE,
62 }, 56 },
63 57
64 .flags = SH7751_PCIC_NO_RESET, 58 .flags = SH4_PCIC_NO_RESET,
65}; 59};
66 60
67/* 61/*
68 * Initialize the SnapGear PCI interface 62 * Initialize the SnapGear PCI interface
69 * Setup hardware to be Central Funtion 63 * Setup hardware to be Central Funtion
70 * Copy the BSR regs to the PCI interface 64 * Copy the BSR regs to the PCI interface
71 * Setup PCI windows into local RAM 65 * Setup PCI windows into local RAM
@@ -75,7 +69,7 @@ int __init pcibios_init_platform(void)
75 return sh7751_pcic_init(&sh7751_pci_map); 69 return sh7751_pcic_init(&sh7751_pci_map);
76} 70}
77 71
78int __init pcibios_map_platform_irq(u8 slot, u8 pin) 72int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
79{ 73{
80 int irq = -1; 74 int irq = -1;
81 75
@@ -98,4 +92,3 @@ void __init pcibios_fixup(void)
98{ 92{
99 /* Nothing to fixup .. */ 93 /* Nothing to fixup .. */
100} 94}
101
diff --git a/arch/sh/drivers/pci/ops-titan.c b/arch/sh/drivers/pci/ops-titan.c
new file mode 100644
index 000000000000..c6097bcd97fd
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-titan.c
@@ -0,0 +1,83 @@
1/*
2 * arch/sh/drivers/pci/ops-titan.c
3 *
4 * Ported to new API by Paul Mundt <lethal@linux-sh.org>
5 *
6 * Modified from ops-snapgear.c written by David McCullough
7 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
8 *
9 * May be copied or modified under the terms of the GNU General Public
10 * License. See linux/COPYING for more information.
11 *
12 * PCI initialization for the Titan boards
13 */
14
15#include <linux/config.h>
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/pci.h>
20#include <asm/io.h>
21#include <asm/titan.h>
22#include "pci-sh4.h"
23
24int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
25{
26 int irq = -1;
27
28 switch (slot) {
29 case 0: irq = TITAN_IRQ_WAN; break; /* eth0 (WAN) */
30 case 1: irq = TITAN_IRQ_LAN; break; /* eth1 (LAN) */
31 case 2: irq = TITAN_IRQ_MPCIA; break; /* mPCI A */
32 case 3: irq = TITAN_IRQ_MPCIB; break; /* mPCI B */
33 case 4: irq = TITAN_IRQ_USB; break; /* USB */
34 default:
35 printk(KERN_INFO "PCI: Bad IRQ mapping "
36 "request for slot %d\n", slot);
37 return -1;
38 }
39
40 printk("PCI: Mapping TITAN IRQ for slot %d, pin %c to irq %d\n",
41 slot, pin - 1 + 'A', irq);
42
43 return irq;
44}
45
46static struct resource sh7751_io_resource = {
47 .name = "SH7751_IO",
48 .start = SH7751_PCI_IO_BASE,
49 .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
50 .flags = IORESOURCE_IO
51};
52
53static struct resource sh7751_mem_resource = {
54 .name = "SH7751_mem",
55 .start = SH7751_PCI_MEMORY_BASE,
56 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
57 .flags = IORESOURCE_MEM
58};
59
60struct pci_channel board_pci_channels[] = {
61 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
62 { NULL, NULL, NULL, 0, 0 },
63};
64EXPORT_SYMBOL(board_pci_channels);
65
66static struct sh4_pci_address_map sh7751_pci_map = {
67 .window0 = {
68 .base = SH7751_CS2_BASE_ADDR,
69 .size = SH7751_MEM_REGION_SIZE*2, /* cs2 and cs3 */
70 },
71
72 .window1 = {
73 .base = SH7751_CS2_BASE_ADDR,
74 .size = SH7751_MEM_REGION_SIZE*2,
75 },
76
77 .flags = SH4_PCIC_NO_RESET,
78};
79
80int __init pcibios_init_platform(void)
81{
82 return sh7751_pcic_init(&sh7751_pci_map);
83}
diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c
index 4cef4d1d8c84..ecf16344f94a 100644
--- a/arch/sh/drivers/pci/pci-auto.c
+++ b/arch/sh/drivers/pci/pci-auto.c
@@ -45,11 +45,11 @@
45#include <linux/types.h> 45#include <linux/types.h>
46#include <linux/pci.h> 46#include <linux/pci.h>
47 47
48#undef DEBUG 48#define DEBUG
49#ifdef DEBUG 49#ifdef DEBUG
50#define DBG(x...) printk(x) 50#define DBG(x...) printk(x)
51#else 51#else
52#define DBG(x...) 52#define DBG(x...)
53#endif 53#endif
54 54
55/* 55/*
@@ -102,7 +102,7 @@ static u32 pciauto_upper_iospc;
102static u32 pciauto_lower_memspc; 102static u32 pciauto_lower_memspc;
103static u32 pciauto_upper_memspc; 103static u32 pciauto_upper_memspc;
104 104
105static void __init 105static void __init
106pciauto_setup_bars(struct pci_channel *hose, 106pciauto_setup_bars(struct pci_channel *hose,
107 int top_bus, 107 int top_bus,
108 int current_bus, 108 int current_bus,
@@ -116,7 +116,6 @@ pciauto_setup_bars(struct pci_channel *hose,
116 int found_mem64 = 0; 116 int found_mem64 = 0;
117 117
118 for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar+=4) { 118 for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar+=4) {
119#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
120 u32 bar_addr; 119 u32 bar_addr;
121 120
122 /* Read the old BAR value */ 121 /* Read the old BAR value */
@@ -125,7 +124,6 @@ pciauto_setup_bars(struct pci_channel *hose,
125 pci_devfn, 124 pci_devfn,
126 bar, 125 bar,
127 &bar_addr); 126 &bar_addr);
128#endif
129 127
130 /* Tickle the BAR and get the response */ 128 /* Tickle the BAR and get the response */
131 early_write_config_dword(hose, top_bus, 129 early_write_config_dword(hose, top_bus,
@@ -140,8 +138,7 @@ pciauto_setup_bars(struct pci_channel *hose,
140 bar, 138 bar,
141 &bar_response); 139 &bar_response);
142 140
143#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) 141 /*
144 /*
145 * Write the old BAR value back out, only update the BAR 142 * Write the old BAR value back out, only update the BAR
146 * if we implicitly want resources to be updated, which 143 * if we implicitly want resources to be updated, which
147 * is done by the generic code further down. -- PFM. 144 * is done by the generic code further down. -- PFM.
@@ -151,7 +148,6 @@ pciauto_setup_bars(struct pci_channel *hose,
151 pci_devfn, 148 pci_devfn,
152 bar, 149 bar,
153 bar_addr); 150 bar_addr);
154#endif
155 151
156 /* If BAR is not implemented go to the next BAR */ 152 /* If BAR is not implemented go to the next BAR */
157 if (!bar_response) 153 if (!bar_response)
@@ -177,7 +173,7 @@ retry:
177 PCI_BASE_ADDRESS_MEM_TYPE_64) 173 PCI_BASE_ADDRESS_MEM_TYPE_64)
178 found_mem64 = 1; 174 found_mem64 = 1;
179 175
180 addr_mask = PCI_BASE_ADDRESS_MEM_MASK; 176 addr_mask = PCI_BASE_ADDRESS_MEM_MASK;
181 upper_limit = &pciauto_upper_memspc; 177 upper_limit = &pciauto_upper_memspc;
182 lower_limit = &pciauto_lower_memspc; 178 lower_limit = &pciauto_lower_memspc;
183 DBG(" Mem"); 179 DBG(" Mem");
@@ -193,22 +189,22 @@ retry:
193 if ((bar_value + bar_size) > *upper_limit) { 189 if ((bar_value + bar_size) > *upper_limit) {
194 if (bar_response & PCI_BASE_ADDRESS_SPACE) { 190 if (bar_response & PCI_BASE_ADDRESS_SPACE) {
195 if (io_resource_inuse->child) { 191 if (io_resource_inuse->child) {
196 io_resource_inuse = 192 io_resource_inuse =
197 io_resource_inuse->child; 193 io_resource_inuse->child;
198 pciauto_lower_iospc = 194 pciauto_lower_iospc =
199 io_resource_inuse->start; 195 io_resource_inuse->start;
200 pciauto_upper_iospc = 196 pciauto_upper_iospc =
201 io_resource_inuse->end + 1; 197 io_resource_inuse->end + 1;
202 goto retry; 198 goto retry;
203 } 199 }
204 200
205 } else { 201 } else {
206 if (mem_resource_inuse->child) { 202 if (mem_resource_inuse->child) {
207 mem_resource_inuse = 203 mem_resource_inuse =
208 mem_resource_inuse->child; 204 mem_resource_inuse->child;
209 pciauto_lower_memspc = 205 pciauto_lower_memspc =
210 mem_resource_inuse->start; 206 mem_resource_inuse->start;
211 pciauto_upper_memspc = 207 pciauto_upper_memspc =
212 mem_resource_inuse->end + 1; 208 mem_resource_inuse->end + 1;
213 goto retry; 209 goto retry;
214 } 210 }
@@ -230,7 +226,7 @@ retry:
230 * If we are a 64-bit decoder then increment to the 226 * If we are a 64-bit decoder then increment to the
231 * upper 32 bits of the bar and force it to locate 227 * upper 32 bits of the bar and force it to locate
232 * in the lower 4GB of memory. 228 * in the lower 4GB of memory.
233 */ 229 */
234 if (found_mem64) { 230 if (found_mem64) {
235 bar += 4; 231 bar += 4;
236 early_write_config_dword(hose, top_bus, 232 early_write_config_dword(hose, top_bus,
@@ -362,7 +358,6 @@ pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose,
362{ 358{
363 u32 temp; 359 u32 temp;
364 360
365#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
366 /* 361 /*
367 * [jsun] we always bump up baselines a little, so that if there 362 * [jsun] we always bump up baselines a little, so that if there
368 * nothing behind P2P bridge, we don't wind up overlapping IO/MEM 363 * nothing behind P2P bridge, we don't wind up overlapping IO/MEM
@@ -370,7 +365,6 @@ pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose,
370 */ 365 */
371 pciauto_lower_memspc += 1; 366 pciauto_lower_memspc += 1;
372 pciauto_lower_iospc += 1; 367 pciauto_lower_iospc += 1;
373#endif
374 368
375 /* 369 /*
376 * Configure subordinate bus number. The PCI subsystem 370 * Configure subordinate bus number. The PCI subsystem
@@ -396,11 +390,6 @@ pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose,
396 * configured by this routine to happily live behind a 390 * configured by this routine to happily live behind a
397 * P2P bridge in a system. 391 * P2P bridge in a system.
398 */ 392 */
399#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D)
400 pciauto_lower_memspc += 0x00400000;
401 pciauto_lower_iospc += 0x00004000;
402#endif
403
404 /* Align memory and I/O to 4KB and 4 byte boundaries. */ 393 /* Align memory and I/O to 4KB and 4 byte boundaries. */
405 pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) 394 pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
406 & ~(0x1000 - 1); 395 & ~(0x1000 - 1);
@@ -433,12 +422,12 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
433 int devfn_stop = 0xff; 422 int devfn_stop = 0xff;
434 423
435 sub_bus = current_bus; 424 sub_bus = current_bus;
436 425
437 if (hose->first_devfn) 426 if (hose->first_devfn)
438 devfn_start = hose->first_devfn; 427 devfn_start = hose->first_devfn;
439 if (hose->last_devfn) 428 if (hose->last_devfn)
440 devfn_stop = hose->last_devfn; 429 devfn_stop = hose->last_devfn;
441 430
442 for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) { 431 for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) {
443 432
444 if (PCI_FUNC(pci_devfn) && !found_multi) 433 if (PCI_FUNC(pci_devfn) && !found_multi)
@@ -471,9 +460,6 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
471 if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) { 460 if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) {
472 DBG(" Bridge: primary=%.2x, secondary=%.2x\n", 461 DBG(" Bridge: primary=%.2x, secondary=%.2x\n",
473 current_bus, sub_bus + 1); 462 current_bus, sub_bus + 1);
474#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D)
475 pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_1);
476#endif
477 pciauto_prescan_setup_bridge(hose, top_bus, current_bus, 463 pciauto_prescan_setup_bridge(hose, top_bus, current_bus,
478 pci_devfn, sub_bus); 464 pci_devfn, sub_bus);
479 DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", 465 DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n",
@@ -490,10 +476,10 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
490 DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn)); 476 DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn));
491 /* Place CardBus Socket/ExCA registers */ 477 /* Place CardBus Socket/ExCA registers */
492 pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_0); 478 pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_0);
493 479
494 pciauto_prescan_setup_cardbus_bridge(hose, top_bus, 480 pciauto_prescan_setup_cardbus_bridge(hose, top_bus,
495 current_bus, pci_devfn, sub_bus); 481 current_bus, pci_devfn, sub_bus);
496 482
497 DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", 483 DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n",
498 sub_bus + 1, 484 sub_bus + 1,
499 pciauto_lower_iospc, pciauto_lower_memspc); 485 pciauto_lower_iospc, pciauto_lower_memspc);
diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h
new file mode 100644
index 000000000000..5a61d6041f2c
--- /dev/null
+++ b/arch/sh/drivers/pci/pci-sh4.h
@@ -0,0 +1,180 @@
1#ifndef __PCI_SH4_H
2#define __PCI_SH4_H
3
4#ifdef CONFIG_CPU_SUBTYPE_SH7780
5#include "pci-sh7780.h"
6#else
7#include "pci-sh7751.h"
8#endif
9
10#include <asm/io.h>
11
12/* startup values */
13#define PCI_PROBE_BIOS 1
14#define PCI_PROBE_CONF1 2
15#define PCI_PROBE_CONF2 4
16#define PCI_NO_SORT 0x100
17#define PCI_BIOS_SORT 0x200
18#define PCI_NO_CHECKS 0x400
19#define PCI_ASSIGN_ROMS 0x1000
20#define PCI_BIOS_IRQ_SCAN 0x2000
21
22#define SH4_PCICR 0x100 /* PCI Control Register */
23 #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
24 #define SH4_PCICR_FTO 0x00000400 /* TRDY/IRDY Enable */
25 #define SH4_PCICR_TRSB 0x00000200 /* Target Read Single */
26 #define SH4_PCICR_BSWP 0x00000100 /* Target Byte Swap */
27 #define SH4_PCICR_PLUP 0x00000080 /* Enable PCI Pullup */
28 #define SH4_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */
29 #define SH4_PCICR_MD 0x00000030 /* MD9 and MD10 status */
30 #define SH4_PCICR_SERR 0x00000008 /* SERR output assert */
31 #define SH4_PCICR_INTA 0x00000004 /* INTA output assert */
32 #define SH4_PCICR_PRST 0x00000002 /* PCI Reset Assert */
33 #define SH4_PCICR_CFIN 0x00000001 /* Central Fun. Init Done */
34#define SH4_PCILSR0 0x104 /* PCI Local Space Register0 */
35#define SH4_PCILSR1 0x108 /* PCI Local Space Register1 */
36#define SH4_PCILAR0 0x10C /* PCI Local Addr Register1 */
37#define SH4_PCILAR1 0x110 /* PCI Local Addr Register1 */
38#define SH4_PCIINT 0x114 /* PCI Interrupt Register */
39 #define SH4_PCIINT_MLCK 0x00008000 /* Master Lock Error */
40 #define SH4_PCIINT_TABT 0x00004000 /* Target Abort Error */
41 #define SH4_PCIINT_TRET 0x00000200 /* Target Retry Error */
42 #define SH4_PCIINT_MFDE 0x00000100 /* Master Func. Disable Error */
43 #define SH4_PCIINT_PRTY 0x00000080 /* Address Parity Error */
44 #define SH4_PCIINT_SERR 0x00000040 /* SERR Detection Error */
45 #define SH4_PCIINT_TWDP 0x00000020 /* Tgt. Write Parity Error */
46 #define SH4_PCIINT_TRDP 0x00000010 /* Tgt. Read Parity Err Det. */
47 #define SH4_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */
48 #define SH4_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */
49 #define SH4_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */
50 #define SH4_PCIINT_MRPD 0x00000001 /* Master Read PERR Detect */
51#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
52#define SH4_PCIALR 0x11C /* Error Address Register */
53#define SH4_PCICLR 0x120 /* Error Command/Data */
54 #define SH4_PCICLR_MPIO 0x80000000
55 #define SH4_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */
56 #define SH4_PCICLR_MDMA1 0x20000000 /* DMA1 Transfer Error */
57 #define SH4_PCICLR_MDMA2 0x10000000 /* DMA2 Transfer Error */
58 #define SH4_PCICLR_MDMA3 0x08000000 /* DMA3 Transfer Error */
59 #define SH4_PCICLR_TGT 0x04000000 /* Target Transfer Error */
60 #define SH4_PCICLR_CMDL 0x0000000F /* PCI Command at Error */
61#define SH4_PCIAINT 0x130 /* Arbiter Interrupt Register */
62 #define SH4_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */
63 #define SH4_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */
64 #define SH4_PCIAINT_MBTO 0x00001000 /* Master Bus Time Out */
65 #define SH4_PCIAINT_TABT 0x00000008 /* Target Abort */
66 #define SH4_PCIAINT_MABT 0x00000004 /* Master Abort */
67 #define SH4_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */
68 #define SH4_PCIAINT_WDPE 0x00000001 /* Write Data Parity Error */
69#define SH4_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
70#define SH4_PCIBMLR 0x138 /* Error Bus Master Register */
71 #define SH4_PCIBMLR_REQ4 0x00000010 /* REQ4 bus master at error */
72 #define SH4_PCIBMLR_REQ3 0x00000008 /* REQ3 bus master at error */
73 #define SH4_PCIBMLR_REQ2 0x00000004 /* REQ2 bus master at error */
74 #define SH4_PCIBMLR_REQ1 0x00000002 /* REQ1 bus master at error */
75 #define SH4_PCIBMLR_REQ0 0x00000001 /* REQ0 bus master at error */
76#define SH4_PCIDMABT 0x140 /* DMA Transfer Arb. Register */
77 #define SH4_PCIDMABT_RRBN 0x00000001 /* DMA Arbitor Round-Robin */
78#define SH4_PCIDPA0 0x180 /* DMA0 Transfer Addr. */
79#define SH4_PCIDLA0 0x184 /* DMA0 Local Addr. */
80#define SH4_PCIDTC0 0x188 /* DMA0 Transfer Cnt. */
81#define SH4_PCIDCR0 0x18C /* DMA0 Control Register */
82 #define SH4_PCIDCR_ALGN 0x00000600 /* DMA Alignment Mode */
83 #define SH4_PCIDCR_MAST 0x00000100 /* DMA Termination Type */
84 #define SH4_PCIDCR_INTM 0x00000080 /* DMA Interrupt Done Mask*/
85 #define SH4_PCIDCR_INTS 0x00000040 /* DMA Interrupt Done Status */
86 #define SH4_PCIDCR_LHLD 0x00000020 /* Local Address Control */
87 #define SH4_PCIDCR_PHLD 0x00000010 /* PCI Address Control*/
88 #define SH4_PCIDCR_IOSEL 0x00000008 /* PCI Address Space Type */
89 #define SH4_PCIDCR_DIR 0x00000004 /* DMA Transfer Direction */
90 #define SH4_PCIDCR_STOP 0x00000002 /* Force DMA Stop */
91 #define SH4_PCIDCR_STRT 0x00000001 /* DMA Start */
92#define SH4_PCIDPA1 0x190 /* DMA1 Transfer Addr. */
93#define SH4_PCIDLA1 0x194 /* DMA1 Local Addr. */
94#define SH4_PCIDTC1 0x198 /* DMA1 Transfer Cnt. */
95#define SH4_PCIDCR1 0x19C /* DMA1 Control Register */
96#define SH4_PCIDPA2 0x1A0 /* DMA2 Transfer Addr. */
97#define SH4_PCIDLA2 0x1A4 /* DMA2 Local Addr. */
98#define SH4_PCIDTC2 0x1A8 /* DMA2 Transfer Cnt. */
99#define SH4_PCIDCR2 0x1AC /* DMA2 Control Register */
100#define SH4_PCIDPA3 0x1B0 /* DMA3 Transfer Addr. */
101#define SH4_PCIDLA3 0x1B4 /* DMA3 Local Addr. */
102#define SH4_PCIDTC3 0x1B8 /* DMA3 Transfer Cnt. */
103#define SH4_PCIDCR3 0x1BC /* DMA3 Control Register */
104#define SH4_PCIPAR 0x1C0 /* PIO Address Register */
105 #define SH4_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */
106 #define SH4_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */
107 #define SH4_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */
108 #define SH4_PCIPAR_REGAD 0x000000FC /* Register Address Number */
109#define SH4_PCIMBR 0x1C4 /* Memory Base Address */
110 #define SH4_PCIMBR_MASK 0xFF000000 /* Memory Space Mask */
111 #define SH4_PCIMBR_LOCK 0x00000001 /* Lock Memory Space */
112#define SH4_PCIIOBR 0x1C8 /* I/O Base Address Register */
113 #define SH4_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */
114 #define SH4_PCIIOBR_LOCK 0x00000001 /* Lock IO Space */
115#define SH4_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
116 #define SH4_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */
117 #define SH4_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */
118#define SH4_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */
119#define SH4_PCICLKR 0x1D4 /* Clock Ctrl. Register */
120 #define SH4_PCICLKR_PCSTP 0x00000002 /* PCI Clock Stop */
121 #define SH4_PCICLKR_BCSTP 0x00000001 /* BCLK Clock Stop */
122/* For definitions of BCR, MCR see ... */
123#define SH4_PCIBCR1 0x1E0 /* Memory BCR1 Register */
124 #define SH4_PCIMBR0 SH4_PCIBCR1
125#define SH4_PCIBCR2 0x1E4 /* Memory BCR2 Register */
126 #define SH4_PCIMBMR0 SH4_PCIBCR2
127#define SH4_PCIWCR1 0x1E8 /* Wait Control 1 Register */
128#define SH4_PCIWCR2 0x1EC /* Wait Control 2 Register */
129#define SH4_PCIWCR3 0x1F0 /* Wait Control 3 Register */
130 #define SH4_PCIMBR2 SH4_PCIWCR3
131#define SH4_PCIMCR 0x1F4 /* Memory Control Register */
132#define SH4_PCIBCR3 0x1f8 /* Memory BCR3 Register */
133#define SH4_PCIPCTR 0x200 /* Port Control Register */
134 #define SH4_PCIPCTR_P2EN 0x000400000 /* Port 2 Enable */
135 #define SH4_PCIPCTR_P1EN 0x000200000 /* Port 1 Enable */
136 #define SH4_PCIPCTR_P0EN 0x000100000 /* Port 0 Enable */
137 #define SH4_PCIPCTR_P2UP 0x000000020 /* Port2 Pull Up Enable */
138 #define SH4_PCIPCTR_P2IO 0x000000010 /* Port2 Output Enable */
139 #define SH4_PCIPCTR_P1UP 0x000000008 /* Port1 Pull Up Enable */
140 #define SH4_PCIPCTR_P1IO 0x000000004 /* Port1 Output Enable */
141 #define SH4_PCIPCTR_P0UP 0x000000002 /* Port0 Pull Up Enable */
142 #define SH4_PCIPCTR_P0IO 0x000000001 /* Port0 Output Enable */
143#define SH4_PCIPDTR 0x204 /* Port Data Register */
144 #define SH4_PCIPDTR_PB5 0x000000020 /* Port 5 Enable */
145 #define SH4_PCIPDTR_PB4 0x000000010 /* Port 4 Enable */
146 #define SH4_PCIPDTR_PB3 0x000000008 /* Port 3 Enable */
147 #define SH4_PCIPDTR_PB2 0x000000004 /* Port 2 Enable */
148 #define SH4_PCIPDTR_PB1 0x000000002 /* Port 1 Enable */
149 #define SH4_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */
150#define SH4_PCIPDR 0x220 /* Port IO Data Register */
151
152/* Flags */
153#define SH4_PCIC_NO_RESET 0x0001
154
155/* arch/sh/kernel/drivers/pci/ops-sh4.c */
156extern struct pci_ops sh4_pci_ops;
157int sh4_pci_check_direct(void);
158int pci_fixup_pcic(void);
159
160struct sh4_pci_address_space {
161 unsigned long base;
162 unsigned long size;
163};
164
165struct sh4_pci_address_map {
166 struct sh4_pci_address_space window0;
167 struct sh4_pci_address_space window1;
168 unsigned long flags;
169};
170
171static inline void pci_write_reg(unsigned long val, unsigned long reg)
172{
173 outl(val, PCI_REG(reg));
174}
175
176static inline unsigned long pci_read_reg(unsigned long reg)
177{
178 return inl(PCI_REG(reg));
179}
180#endif /* __PCI_SH4_H */
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 682f3dae305d..dbe837884983 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -15,180 +15,14 @@
15 15
16#undef DEBUG 16#undef DEBUG
17 17
18#include <linux/types.h>
19#include <linux/kernel.h>
20#include <linux/init.h> 18#include <linux/init.h>
21#include <linux/pci.h> 19#include <linux/pci.h>
22#include <linux/sched.h> 20#include <linux/types.h>
23#include <linux/ioport.h>
24#include <linux/errno.h> 21#include <linux/errno.h>
25#include <linux/irq.h>
26#include <linux/delay.h> 22#include <linux/delay.h>
27 23#include "pci-sh4.h"
28#include <asm/machvec.h> 24#include <asm/addrspace.h>
29#include <asm/io.h> 25#include <asm/io.h>
30#include "pci-sh7751.h"
31
32static unsigned int pci_probe = PCI_PROBE_CONF1;
33extern int pci_fixup_pcic(void);
34
35void pcibios_fixup_irqs(void) __attribute__ ((weak));
36
37/*
38 * Direct access to PCI hardware...
39 */
40
41#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
42
43/*
44 * Functions for accessing PCI configuration space with type 1 accesses
45 */
46static int sh7751_pci_read(struct pci_bus *bus, unsigned int devfn,
47 int where, int size, u32 *val)
48{
49 unsigned long flags;
50 u32 data;
51
52 /*
53 * PCIPDR may only be accessed as 32 bit words,
54 * so we must do byte alignment by hand
55 */
56 local_irq_save(flags);
57 outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR));
58 data = inl(PCI_REG(SH7751_PCIPDR));
59 local_irq_restore(flags);
60
61 switch (size) {
62 case 1:
63 *val = (data >> ((where & 3) << 3)) & 0xff;
64 break;
65 case 2:
66 *val = (data >> ((where & 2) << 3)) & 0xffff;
67 break;
68 case 4:
69 *val = data;
70 break;
71 default:
72 return PCIBIOS_FUNC_NOT_SUPPORTED;
73 }
74
75 return PCIBIOS_SUCCESSFUL;
76}
77
78/*
79 * Since SH7751 only does 32bit access we'll have to do a read,
80 * mask,write operation.
81 * We'll allow an odd byte offset, though it should be illegal.
82 */
83static int sh7751_pci_write(struct pci_bus *bus, unsigned int devfn,
84 int where, int size, u32 val)
85{
86 unsigned long flags;
87 int shift;
88 u32 data;
89
90 local_irq_save(flags);
91 outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR));
92 data = inl(PCI_REG(SH7751_PCIPDR));
93 local_irq_restore(flags);
94
95 switch (size) {
96 case 1:
97 shift = (where & 3) << 3;
98 data &= ~(0xff << shift);
99 data |= ((val & 0xff) << shift);
100 break;
101 case 2:
102 shift = (where & 2) << 3;
103 data &= ~(0xffff << shift);
104 data |= ((val & 0xffff) << shift);
105 break;
106 case 4:
107 data = val;
108 break;
109 default:
110 return PCIBIOS_FUNC_NOT_SUPPORTED;
111 }
112
113 outl(data, PCI_REG(SH7751_PCIPDR));
114
115 return PCIBIOS_SUCCESSFUL;
116}
117
118#undef CONFIG_CMD
119
120struct pci_ops sh7751_pci_ops = {
121 .read = sh7751_pci_read,
122 .write = sh7751_pci_write,
123};
124
125static int __init pci_check_direct(void)
126{
127 unsigned int tmp, id;
128
129 /* check for SH7751/SH7751R hardware */
130 id = inl(SH7751_PCIREG_BASE+SH7751_PCICONF0);
131 if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
132 id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
133 pr_debug("PCI: This is not an SH7751(R) (%x)\n", id);
134 return -ENODEV;
135 }
136
137 /*
138 * Check if configuration works.
139 */
140 if (pci_probe & PCI_PROBE_CONF1) {
141 tmp = inl (PCI_REG(SH7751_PCIPAR));
142 outl (0x80000000, PCI_REG(SH7751_PCIPAR));
143 if (inl (PCI_REG(SH7751_PCIPAR)) == 0x80000000) {
144 outl (tmp, PCI_REG(SH7751_PCIPAR));
145 printk(KERN_INFO "PCI: Using configuration type 1\n");
146 request_region(PCI_REG(SH7751_PCIPAR), 8, "PCI conf1");
147 return 0;
148 }
149 outl (tmp, PCI_REG(SH7751_PCIPAR));
150 }
151
152 pr_debug("PCI: pci_check_direct failed\n");
153 return -EINVAL;
154}
155
156/***************************************************************************************/
157
158/*
159 * Handle bus scanning and fixups ....
160 */
161
162static void __init pci_fixup_ide_bases(struct pci_dev *d)
163{
164 int i;
165
166 /*
167 * PCI IDE controllers use non-standard I/O port decoding, respect it.
168 */
169 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
170 return;
171 pr_debug("PCI: IDE base address fixup for %s\n", pci_name(d));
172 for(i=0; i<4; i++) {
173 struct resource *r = &d->resource[i];
174 if ((r->start & ~0x80) == 0x374) {
175 r->start |= 2;
176 r->end = r->start;
177 }
178 }
179}
180
181DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
182
183/*
184 * Called after each bus is probed, but before its children
185 * are examined.
186 */
187
188void __init pcibios_fixup_bus(struct pci_bus *b)
189{
190 pci_read_bridge_bases(b);
191}
192 26
193/* 27/*
194 * Initialization. Try all known PCI access methods. Note that we support 28 * Initialization. Try all known PCI access methods. Note that we support
@@ -196,25 +30,29 @@ void __init pcibios_fixup_bus(struct pci_bus *b)
196 * to access config space. 30 * to access config space.
197 * 31 *
198 * Note that the platform specific initialization (BSC registers, and memory 32 * Note that the platform specific initialization (BSC registers, and memory
199 * space mapping) will be called via the machine vectors (sh_mv.mv_pci_init()) if it 33 * space mapping) will be called via the platform defined function
200 * exitst and via the platform defined function pcibios_init_platform(). 34 * pcibios_init_platform().
201 * See pci_bigsur.c for implementation;
202 *
203 * The BIOS version of the pci functions is not yet implemented but it is left
204 * in for completeness. Currently an error will be genereated at compile time.
205 */ 35 */
206
207static int __init sh7751_pci_init(void) 36static int __init sh7751_pci_init(void)
208{ 37{
38 unsigned int id;
209 int ret; 39 int ret;
210 40
211 pr_debug("PCI: Starting intialization.\n"); 41 pr_debug("PCI: Starting intialization.\n");
212 if ((ret = pci_check_direct()) != 0) 42
43 /* check for SH7751/SH7751R hardware */
44 id = pci_read_reg(SH7751_PCICONF0);
45 if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
46 id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
47 pr_debug("PCI: This is not an SH7751(R) (%x)\n", id);
48 return -ENODEV;
49 }
50
51 if ((ret = sh4_pci_check_direct()) != 0)
213 return ret; 52 return ret;
214 53
215 return pcibios_init_platform(); 54 return pcibios_init_platform();
216} 55}
217
218subsys_initcall(sh7751_pci_init); 56subsys_initcall(sh7751_pci_init);
219 57
220static int __init __area_sdram_check(unsigned int area) 58static int __init __area_sdram_check(unsigned int area)
@@ -223,26 +61,26 @@ static int __init __area_sdram_check(unsigned int area)
223 61
224 word = inl(SH7751_BCR1); 62 word = inl(SH7751_BCR1);
225 /* check BCR for SDRAM in area */ 63 /* check BCR for SDRAM in area */
226 if(((word >> area) & 1) == 0) { 64 if (((word >> area) & 1) == 0) {
227 printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n", 65 printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n",
228 area, word); 66 area, word);
229 return 0; 67 return 0;
230 } 68 }
231 outl(word, PCI_REG(SH7751_PCIBCR1)); 69 pci_write_reg(word, SH4_PCIBCR1);
232 70
233 word = (u16)inw(SH7751_BCR2); 71 word = (u16)inw(SH7751_BCR2);
234 /* check BCR2 for 32bit SDRAM interface*/ 72 /* check BCR2 for 32bit SDRAM interface*/
235 if(((word >> (area << 1)) & 0x3) != 0x3) { 73 if (((word >> (area << 1)) & 0x3) != 0x3) {
236 printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n", 74 printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n",
237 area, word); 75 area, word);
238 return 0; 76 return 0;
239 } 77 }
240 outl(word, PCI_REG(SH7751_PCIBCR2)); 78 pci_write_reg(word, SH4_PCIBCR2);
241 79
242 return 1; 80 return 1;
243} 81}
244 82
245int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) 83int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
246{ 84{
247 u32 reg; 85 u32 reg;
248 u32 word; 86 u32 word;
@@ -251,39 +89,39 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map)
251 reg = inl(SH7751_BCR1); 89 reg = inl(SH7751_BCR1);
252 reg |= 0x80000; 90 reg |= 0x80000;
253 outl(reg, SH7751_BCR1); 91 outl(reg, SH7751_BCR1);
254 92
255 /* Turn the clocks back on (not done in reset)*/ 93 /* Turn the clocks back on (not done in reset)*/
256 outl(0, PCI_REG(SH7751_PCICLKR)); 94 pci_write_reg(0, SH4_PCICLKR);
257 /* Clear Powerdown IRQ's (not done in reset) */ 95 /* Clear Powerdown IRQ's (not done in reset) */
258 word = SH7751_PCIPINT_D3 | SH7751_PCIPINT_D0; 96 word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
259 outl(word, PCI_REG(SH7751_PCIPINT)); 97 pci_write_reg(word, SH4_PCIPINT);
260 98
261 /* 99 /*
262 * This code is unused for some boards as it is done in the 100 * This code is unused for some boards as it is done in the
263 * bootloader and doing it here means the MAC addresses loaded 101 * bootloader and doing it here means the MAC addresses loaded
264 * by the bootloader get lost. 102 * by the bootloader get lost.
265 */ 103 */
266 if (!(map->flags & SH7751_PCIC_NO_RESET)) { 104 if (!(map->flags & SH4_PCIC_NO_RESET)) {
267 /* toggle PCI reset pin */ 105 /* toggle PCI reset pin */
268 word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST; 106 word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
269 outl(word,PCI_REG(SH7751_PCICR)); 107 pci_write_reg(word, SH4_PCICR);
270 /* Wait for a long time... not 1 sec. but long enough */ 108 /* Wait for a long time... not 1 sec. but long enough */
271 mdelay(100); 109 mdelay(100);
272 word = SH7751_PCICR_PREFIX; 110 word = SH4_PCICR_PREFIX;
273 outl(word,PCI_REG(SH7751_PCICR)); 111 pci_write_reg(word, SH4_PCICR);
274 } 112 }
275 113
276 /* set the command/status bits to: 114 /* set the command/status bits to:
277 * Wait Cycle Control + Parity Enable + Bus Master + 115 * Wait Cycle Control + Parity Enable + Bus Master +
278 * Mem space enable 116 * Mem space enable
279 */ 117 */
280 word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER | 118 word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |
281 SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES; 119 SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES;
282 outl(word, PCI_REG(SH7751_PCICONF1)); 120 pci_write_reg(word, SH7751_PCICONF1);
283 121
284 /* define this host as the host bridge */ 122 /* define this host as the host bridge */
285 word = SH7751_PCI_HOST_BRIDGE << 24; 123 word = PCI_BASE_CLASS_BRIDGE << 24;
286 outl(word, PCI_REG(SH7751_PCICONF2)); 124 pci_write_reg(word, SH7751_PCICONF2);
287 125
288 /* Set IO and Mem windows to local address 126 /* Set IO and Mem windows to local address
289 * Make PCI and local address the same for easy 1 to 1 mapping 127 * Make PCI and local address the same for easy 1 to 1 mapping
@@ -291,46 +129,49 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map)
291 * Window1 = map->window1.size @ cached area base = SDRAM 129 * Window1 = map->window1.size @ cached area base = SDRAM
292 */ 130 */
293 word = map->window0.size - 1; 131 word = map->window0.size - 1;
294 outl(word, PCI_REG(SH7751_PCILSR0)); 132 pci_write_reg(word, SH4_PCILSR0);
295 word = map->window1.size - 1; 133 word = map->window1.size - 1;
296 outl(word, PCI_REG(SH7751_PCILSR1)); 134 pci_write_reg(word, SH4_PCILSR1);
297 /* Set the values on window 0 PCI config registers */ 135 /* Set the values on window 0 PCI config registers */
298 word = P2SEGADDR(map->window0.base); 136 word = P2SEGADDR(map->window0.base);
299 outl(word, PCI_REG(SH7751_PCILAR0)); 137 pci_write_reg(word, SH4_PCILAR0);
300 outl(word, PCI_REG(SH7751_PCICONF5)); 138 pci_write_reg(word, SH7751_PCICONF5);
301 /* Set the values on window 1 PCI config registers */ 139 /* Set the values on window 1 PCI config registers */
302 word = PHYSADDR(map->window1.base); 140 word = PHYSADDR(map->window1.base);
303 outl(word, PCI_REG(SH7751_PCILAR1)); 141 pci_write_reg(word, SH4_PCILAR1);
304 outl(word, PCI_REG(SH7751_PCICONF6)); 142 pci_write_reg(word, SH7751_PCICONF6);
305 143
306 /* Set the local 16MB PCI memory space window to 144 /* Set the local 16MB PCI memory space window to
307 * the lowest PCI mapped address 145 * the lowest PCI mapped address
308 */ 146 */
309 word = PCIBIOS_MIN_MEM & SH7751_PCIMBR_MASK; 147 word = PCIBIOS_MIN_MEM & SH4_PCIMBR_MASK;
310 PCIDBG(2,"PCI: Setting upper bits of Memory window to 0x%x\n", word); 148 pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word);
311 outl(word , PCI_REG(SH7751_PCIMBR)); 149 pci_write_reg(word , SH4_PCIMBR);
312 150
313 /* Map IO space into PCI IO window 151 /* Map IO space into PCI IO window
314 * The IO window is 64K-PCIBIOS_MIN_IO in size 152 * The IO window is 64K-PCIBIOS_MIN_IO in size
315 * IO addresses will be translated to the 153 * IO addresses will be translated to the
316 * PCI IO window base address 154 * PCI IO window base address
317 */ 155 */
318 PCIDBG(3,"PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", PCIBIOS_MIN_IO, 156 pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n",
319 (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO); 157 PCIBIOS_MIN_IO, (64 << 10),
158 SH4_PCI_IO_BASE + PCIBIOS_MIN_IO);
320 159
321 /* 160 /*
322 * XXX: For now, leave this board-specific. In the event we have other 161 * XXX: For now, leave this board-specific. In the event we have other
323 * boards that need to do similar work, this can be wrapped. 162 * boards that need to do similar work, this can be wrapped.
324 */ 163 */
325#ifdef CONFIG_SH_BIGSUR 164#ifdef CONFIG_SH_BIGSUR
326 bigsur_port_map(PCIBIOS_MIN_IO, (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO,0); 165 bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10),
166 SH4_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
327#endif 167#endif
328 168
329 /* Make sure the MSB's of IO window are set to access PCI space correctly */ 169 /* Make sure the MSB's of IO window are set to access PCI space
330 word = PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK; 170 * correctly */
331 PCIDBG(2,"PCI: Setting upper bits of IO window to 0x%x\n", word); 171 word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK;
332 outl(word, PCI_REG(SH7751_PCIIOBR)); 172 pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word);
333 173 pci_write_reg(word, SH4_PCIIOBR);
174
334 /* Set PCI WCRx, BCRx's, copy from BSC locations */ 175 /* Set PCI WCRx, BCRx's, copy from BSC locations */
335 176
336 /* check BCR for SDRAM in specified area */ 177 /* check BCR for SDRAM in specified area */
@@ -349,13 +190,13 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map)
349 190
350 /* configure the wait control registers */ 191 /* configure the wait control registers */
351 word = inl(SH7751_WCR1); 192 word = inl(SH7751_WCR1);
352 outl(word, PCI_REG(SH7751_PCIWCR1)); 193 pci_write_reg(word, SH4_PCIWCR1);
353 word = inl(SH7751_WCR2); 194 word = inl(SH7751_WCR2);
354 outl(word, PCI_REG(SH7751_PCIWCR2)); 195 pci_write_reg(word, SH4_PCIWCR2);
355 word = inl(SH7751_WCR3); 196 word = inl(SH7751_WCR3);
356 outl(word, PCI_REG(SH7751_PCIWCR3)); 197 pci_write_reg(word, SH4_PCIWCR3);
357 word = inl(SH7751_MCR); 198 word = inl(SH7751_MCR);
358 outl(word, PCI_REG(SH7751_PCIMCR)); 199 pci_write_reg(word, SH4_PCIMCR);
359 200
360 /* NOTE: I'm ignoring the PCI error IRQs for now.. 201 /* NOTE: I'm ignoring the PCI error IRQs for now..
361 * TODO: add support for the internal error interrupts and 202 * TODO: add support for the internal error interrupts and
@@ -368,49 +209,8 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map)
368 209
369 /* SH7751 init done, set central function init complete */ 210 /* SH7751 init done, set central function init complete */
370 /* use round robin mode to stop a device starving/overruning */ 211 /* use round robin mode to stop a device starving/overruning */
371 word = SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN | SH7751_PCICR_ARBM; 212 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
372 outl(word,PCI_REG(SH7751_PCICR)); 213 pci_write_reg(word, SH4_PCICR);
373 214
374 return 1; 215 return 1;
375} 216}
376
377char * __init pcibios_setup(char *str)
378{
379 if (!strcmp(str, "off")) {
380 pci_probe = 0;
381 return NULL;
382 }
383
384 return str;
385}
386
387/*
388 * IRQ functions
389 */
390static u8 __init sh7751_no_swizzle(struct pci_dev *dev, u8 *pin)
391{
392 /* no swizzling */
393 return PCI_SLOT(dev->devfn);
394}
395
396static int sh7751_pci_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin)
397{
398 int irq = -1;
399
400 /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
401 irq = pcibios_map_platform_irq(slot,pin);
402 if( irq < 0 ) {
403 pr_debug("PCI: Error mapping IRQ on device %s\n", pci_name(dev));
404 return irq;
405 }
406
407 pr_debug("Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
408
409 return irq;
410}
411
412void __init pcibios_fixup_irqs(void)
413{
414 pci_fixup_irqs(sh7751_no_swizzle, sh7751_pci_lookup_irq);
415}
416
diff --git a/arch/sh/drivers/pci/pci-sh7751.h b/arch/sh/drivers/pci/pci-sh7751.h
index 1fee5cae10d1..68e3cb5e6bec 100644
--- a/arch/sh/drivers/pci/pci-sh7751.h
+++ b/arch/sh/drivers/pci/pci-sh7751.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Dustin McIntire (dustin@sensoria.com) (c) 2001 4 * Dustin McIntire (dustin@sensoria.com) (c) 2001
5 * Paul Mundt (lethal@linux-sh.org) (c) 2003 5 * Paul Mundt (lethal@linux-sh.org) (c) 2003
6 * 6 *
7 * May be copied or modified under the terms of the GNU General Public 7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information. 8 * License. See linux/COPYING for more information.
9 * 9 *
@@ -12,28 +12,6 @@
12#ifndef _PCI_SH7751_H_ 12#ifndef _PCI_SH7751_H_
13#define _PCI_SH7751_H_ 13#define _PCI_SH7751_H_
14 14
15#include <linux/pci.h>
16
17/* set debug level 4=verbose...1=terse */
18//#define DEBUG_PCI 3
19#undef DEBUG_PCI
20
21#ifdef DEBUG_PCI
22#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); }
23#else
24#define PCIDBG(n, x...)
25#endif
26
27/* startup values */
28#define PCI_PROBE_BIOS 1
29#define PCI_PROBE_CONF1 2
30#define PCI_PROBE_CONF2 4
31#define PCI_NO_SORT 0x100
32#define PCI_BIOS_SORT 0x200
33#define PCI_NO_CHECKS 0x400
34#define PCI_ASSIGN_ROMS 0x1000
35#define PCI_BIOS_IRQ_SCAN 0x2000
36
37/* Platform Specific Values */ 15/* Platform Specific Values */
38#define SH7751_VENDOR_ID 0x1054 16#define SH7751_VENDOR_ID 0x1054
39#define SH7751_DEVICE_ID 0x3505 17#define SH7751_DEVICE_ID 0x3505
@@ -128,131 +106,6 @@
128 #define SH7751_PCICONF17_PMEN 0x00010000 /* PME Enable */ 106 #define SH7751_PCICONF17_PMEN 0x00010000 /* PME Enable */
129 #define SH7751_PCICONF17_PWST 0x00000003 /* Power State */ 107 #define SH7751_PCICONF17_PWST 0x00000003 /* Power State */
130/* SH7715 Internal PCI Registers */ 108/* SH7715 Internal PCI Registers */
131#define SH7751_PCICR 0x100 /* PCI Control Register */
132 #define SH7751_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
133 #define SH7751_PCICR_TRSB 0x00000200 /* Target Read Single */
134 #define SH7751_PCICR_BSWP 0x00000100 /* Target Byte Swap */
135 #define SH7751_PCICR_PLUP 0x00000080 /* Enable PCI Pullup */
136 #define SH7751_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */
137 #define SH7751_PCICR_MD 0x00000030 /* MD9 and MD10 status */
138 #define SH7751_PCICR_SERR 0x00000008 /* SERR output assert */
139 #define SH7751_PCICR_INTA 0x00000004 /* INTA output assert */
140 #define SH7751_PCICR_PRST 0x00000002 /* PCI Reset Assert */
141 #define SH7751_PCICR_CFIN 0x00000001 /* Central Fun. Init Done */
142#define SH7751_PCILSR0 0x104 /* PCI Local Space Register0 */
143#define SH7751_PCILSR1 0x108 /* PCI Local Space Register1 */
144#define SH7751_PCILAR0 0x10C /* PCI Local Address Register1 */
145#define SH7751_PCILAR1 0x110 /* PCI Local Address Register1 */
146#define SH7751_PCIINT 0x114 /* PCI Interrupt Register */
147 #define SH7751_PCIINT_MLCK 0x00008000 /* Master Lock Error */
148 #define SH7751_PCIINT_TABT 0x00004000 /* Target Abort Error */
149 #define SH7751_PCIINT_TRET 0x00000200 /* Target Retry Error */
150 #define SH7751_PCIINT_MFDE 0x00000100 /* Master Func. Disable Error */
151 #define SH7751_PCIINT_PRTY 0x00000080 /* Address Parity Error */
152 #define SH7751_PCIINT_SERR 0x00000040 /* SERR Detection Error */
153 #define SH7751_PCIINT_TWDP 0x00000020 /* Tgt. Write Parity Error */
154 #define SH7751_PCIINT_TRDP 0x00000010 /* Tgt. Read Parity Error Det. */
155 #define SH7751_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */
156 #define SH7751_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */
157 #define SH7751_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */
158 #define SH7751_PCIINT_MRPD 0x00000002 /* Master Read PERR Detect */
159#define SH7751_PCIINTM 0x118 /* PCI Interrupt Mask Register */
160#define SH7751_PCIALR 0x11C /* Error Address Register */
161#define SH7751_PCICLR 0x120 /* Error Command/Data Register */
162 #define SH7751_PCICLR_MPIO 0x80000000 /* Error Command/Data Register */
163 #define SH7751_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */
164 #define SH7751_PCICLR_MDMA1 0x20000000 /* DMA1 Transfer Error */
165 #define SH7751_PCICLR_MDMA2 0x10000000 /* DMA2 Transfer Error */
166 #define SH7751_PCICLR_MDMA3 0x08000000 /* DMA3 Transfer Error */
167 #define SH7751_PCICLR_TGT 0x04000000 /* Target Transfer Error */
168 #define SH7751_PCICLR_CMDL 0x0000000F /* PCI Command at Error */
169#define SH7751_PCIAINT 0x130 /* Arbiter Interrupt Register */
170 #define SH7751_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */
171 #define SH7751_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */
172 #define SH7751_PCIAINT_MBTO 0x00001000 /* Master Bus Time Out */
173 #define SH7751_PCIAINT_TABT 0x00000008 /* Target Abort */
174 #define SH7751_PCIAINT_MABT 0x00000004 /* Master Abort */
175 #define SH7751_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */
176 #define SH7751_PCIAINT_WDPE 0x00000002 /* Write Data Parity Error */
177#define SH7751_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
178#define SH7751_PCIBMLR 0x138 /* Error Bus Master Register */
179 #define SH7751_PCIBMLR_REQ4 0x00000010 /* REQ4 bus master at error */
180 #define SH7751_PCIBMLR_REQ3 0x00000008 /* REQ3 bus master at error */
181 #define SH7751_PCIBMLR_REQ2 0x00000004 /* REQ2 bus master at error */
182 #define SH7751_PCIBMLR_REQ1 0x00000002 /* REQ1 bus master at error */
183 #define SH7751_PCIBMLR_REQ0 0x00000001 /* REQ0 bus master at error */
184#define SH7751_PCIDMABT 0x140 /* DMA Transfer Arb. Register */
185 #define SH7751_PCIDMABT_RRBN 0x00000001 /* DMA Arbitor Round-Robin */
186#define SH7751_PCIDPA0 0x180 /* DMA0 Transfer Addr. Register */
187#define SH7751_PCIDLA0 0x184 /* DMA0 Local Addr. Register */
188#define SH7751_PCIDTC0 0x188 /* DMA0 Transfer Cnt. Register */
189#define SH7751_PCIDCR0 0x18C /* DMA0 Control Register */
190 #define SH7751_PCIDCR_ALGN 0x00000600 /* DMA Alignment Mode */
191 #define SH7751_PCIDCR_MAST 0x00000100 /* DMA Termination Type */
192 #define SH7751_PCIDCR_INTM 0x00000080 /* DMA Interrupt Done Mask*/
193 #define SH7751_PCIDCR_INTS 0x00000040 /* DMA Interrupt Done Status */
194 #define SH7751_PCIDCR_LHLD 0x00000020 /* Local Address Control */
195 #define SH7751_PCIDCR_PHLD 0x00000010 /* PCI Address Control*/
196 #define SH7751_PCIDCR_IOSEL 0x00000008 /* PCI Address Space Type */
197 #define SH7751_PCIDCR_DIR 0x00000004 /* DMA Transfer Direction */
198 #define SH7751_PCIDCR_STOP 0x00000002 /* Force DMA Stop */
199 #define SH7751_PCIDCR_STRT 0x00000001 /* DMA Start */
200#define SH7751_PCIDPA1 0x190 /* DMA1 Transfer Addr. Register */
201#define SH7751_PCIDLA1 0x194 /* DMA1 Local Addr. Register */
202#define SH7751_PCIDTC1 0x198 /* DMA1 Transfer Cnt. Register */
203#define SH7751_PCIDCR1 0x19C /* DMA1 Control Register */
204#define SH7751_PCIDPA2 0x1A0 /* DMA2 Transfer Addr. Register */
205#define SH7751_PCIDLA2 0x1A4 /* DMA2 Local Addr. Register */
206#define SH7751_PCIDTC2 0x1A8 /* DMA2 Transfer Cnt. Register */
207#define SH7751_PCIDCR2 0x1AC /* DMA2 Control Register */
208#define SH7751_PCIDPA3 0x1B0 /* DMA3 Transfer Addr. Register */
209#define SH7751_PCIDLA3 0x1B4 /* DMA3 Local Addr. Register */
210#define SH7751_PCIDTC3 0x1B8 /* DMA3 Transfer Cnt. Register */
211#define SH7751_PCIDCR3 0x1BC /* DMA3 Control Register */
212#define SH7751_PCIPAR 0x1C0 /* PIO Address Register */
213 #define SH7751_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */
214 #define SH7751_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */
215 #define SH7751_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */
216 #define SH7751_PCIPAR_REGAD 0x000000FC /* Register Address Number */
217#define SH7751_PCIMBR 0x1C4 /* Memory Base Address Register */
218 #define SH7751_PCIMBR_MASK 0xFF000000 /* Memory Space Mask */
219 #define SH7751_PCIMBR_LOCK 0x00000001 /* Lock Memory Space */
220#define SH7751_PCIIOBR 0x1C8 /* I/O Base Address Register */
221 #define SH7751_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */
222 #define SH7751_PCIIOBR_LOCK 0x00000001 /* Lock IO Space */
223#define SH7751_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
224 #define SH7751_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */
225 #define SH7751_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */
226#define SH7751_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */
227#define SH7751_PCICLKR 0x1D4 /* Clock Ctrl. Register */
228 #define SH7751_PCICLKR_PCSTP 0x00000002 /* PCI Clock Stop */
229 #define SH7751_PCICLKR_BCSTP 0x00000002 /* BCLK Clock Stop */
230/* For definitions of BCR, MCR see ... */
231#define SH7751_PCIBCR1 0x1E0 /* Memory BCR1 Register */
232#define SH7751_PCIBCR2 0x1E4 /* Memory BCR2 Register */
233#define SH7751_PCIWCR1 0x1E8 /* Wait Control 1 Register */
234#define SH7751_PCIWCR2 0x1EC /* Wait Control 2 Register */
235#define SH7751_PCIWCR3 0x1F0 /* Wait Control 3 Register */
236#define SH7751_PCIMCR 0x1F4 /* Memory Control Register */
237#define SH7751_PCIBCR3 0x1f8 /* Memory BCR3 Register */
238#define SH7751_PCIPCTR 0x200 /* Port Control Register */
239 #define SH7751_PCIPCTR_P2EN 0x000400000 /* Port 2 Enable */
240 #define SH7751_PCIPCTR_P1EN 0x000200000 /* Port 1 Enable */
241 #define SH7751_PCIPCTR_P0EN 0x000100000 /* Port 0 Enable */
242 #define SH7751_PCIPCTR_P2UP 0x000000020 /* Port2 Pull Up Enable */
243 #define SH7751_PCIPCTR_P2IO 0x000000010 /* Port2 Output Enable */
244 #define SH7751_PCIPCTR_P1UP 0x000000008 /* Port1 Pull Up Enable */
245 #define SH7751_PCIPCTR_P1IO 0x000000004 /* Port1 Output Enable */
246 #define SH7751_PCIPCTR_P0UP 0x000000002 /* Port0 Pull Up Enable */
247 #define SH7751_PCIPCTR_P0IO 0x000000001 /* Port0 Output Enable */
248#define SH7751_PCIPDTR 0x204 /* Port Data Register */
249 #define SH7751_PCIPDTR_PB5 0x000000020 /* Port 5 Enable */
250 #define SH7751_PCIPDTR_PB4 0x000000010 /* Port 4 Enable */
251 #define SH7751_PCIPDTR_PB3 0x000000008 /* Port 3 Enable */
252 #define SH7751_PCIPDTR_PB2 0x000000004 /* Port 2 Enable */
253 #define SH7751_PCIPDTR_PB1 0x000000002 /* Port 1 Enable */
254 #define SH7751_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */
255#define SH7751_PCIPDR 0x220 /* Port IO Data Register */
256 109
257/* Memory Control Registers */ 110/* Memory Control Registers */
258#define SH7751_BCR1 0xFF800000 /* Memory BCR1 Register */ 111#define SH7751_BCR1 0xFF800000 /* Memory BCR1 Register */
@@ -274,30 +127,9 @@
274#define SH7751_CS5_BASE_ADDR (SH7751_CS4_BASE_ADDR + SH7751_MEM_REGION_SIZE) 127#define SH7751_CS5_BASE_ADDR (SH7751_CS4_BASE_ADDR + SH7751_MEM_REGION_SIZE)
275#define SH7751_CS6_BASE_ADDR (SH7751_CS5_BASE_ADDR + SH7751_MEM_REGION_SIZE) 128#define SH7751_CS6_BASE_ADDR (SH7751_CS5_BASE_ADDR + SH7751_MEM_REGION_SIZE)
276 129
277/* General PCI values */ 130struct sh4_pci_address_map;
278#define SH7751_PCI_HOST_BRIDGE 0x6
279
280/* Flags */
281#define SH7751_PCIC_NO_RESET 0x0001
282
283/* External functions defined per platform i.e. Big Sur, SE... (these could be routed
284 * through the machine vectors... */
285extern int pcibios_init_platform(void);
286extern int pcibios_map_platform_irq(u8 slot, u8 pin);
287
288struct sh7751_pci_address_space {
289 unsigned long base;
290 unsigned long size;
291};
292
293struct sh7751_pci_address_map {
294 struct sh7751_pci_address_space window0;
295 struct sh7751_pci_address_space window1;
296 unsigned long flags;
297};
298 131
299/* arch/sh/drivers/pci/pci-sh7751.c */ 132/* arch/sh/drivers/pci/pci-sh7751.c */
300extern int sh7751_pcic_init(struct sh7751_pci_address_map *map); 133int sh7751_pcic_init(struct sh4_pci_address_map *map);
301 134
302#endif /* _PCI_SH7751_H_ */ 135#endif /* _PCI_SH7751_H_ */
303
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
new file mode 100644
index 000000000000..bd3064a82087
--- /dev/null
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -0,0 +1,139 @@
1/*
2 * Low-Level PCI Support for the SH7780
3 *
4 * Dustin McIntire (dustin@sensoria.com)
5 * Derived from arch/i386/kernel/pci-*.c which bore the message:
6 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 *
8 * Ported to the new API by Paul Mundt <lethal@linux-sh.org>
9 * With cleanup by Paul van Gool <pvangool@mimotech.com>
10 *
11 * May be copied or modified under the terms of the GNU General Public
12 * License. See linux/COPYING for more information.
13 *
14 */
15
16#undef DEBUG
17
18#include <linux/config.h>
19#include <linux/types.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/pci.h>
23#include <linux/errno.h>
24#include <linux/delay.h>
25#include "pci-sh4.h"
26
27/*
28 * Initialization. Try all known PCI access methods. Note that we support
29 * using both PCI BIOS and direct access: in such cases, we use I/O ports
30 * to access config space.
31 *
32 * Note that the platform specific initialization (BSC registers, and memory
33 * space mapping) will be called via the platform defined function
34 * pcibios_init_platform().
35 */
36static int __init sh7780_pci_init(void)
37{
38 unsigned int id;
39 int ret;
40
41 pr_debug("PCI: Starting intialization.\n");
42
43 outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */
44
45 /* check for SH7780/SH7780R hardware */
46 id = pci_read_reg(SH7780_PCIVID);
47 if ((id != ((SH7780_DEVICE_ID << 16) | SH7780_VENDOR_ID)) &&
48 (id != ((SH7781_DEVICE_ID << 16) | SH7780_VENDOR_ID))) {
49 printk(KERN_ERR "PCI: This is not an SH7780 (%x)\n", id);
50 return -ENODEV;
51 }
52
53 /* Setup the INTC */
54 ctrl_outl(0x00200000, INTC_ICR0); /* INTC SH-4 Mode */
55 ctrl_outl(0x00078000, INTC_INT2MSKCR); /* enable PCIINTA - PCIINTD */
56 ctrl_outl(0x40000000, INTC_INTMSK1); /* disable IRL4-7 Interrupt */
57 ctrl_outl(0x0000fffe, INTC_INTMSK2); /* disable IRL4-7 Interrupt */
58 ctrl_outl(0x80000000, INTC_INTMSKCLR1); /* enable IRL0-3 Interrupt */
59 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); /* enable IRL0-3 Interrupt */
60
61 if ((ret = sh4_pci_check_direct()) != 0)
62 return ret;
63
64 return pcibios_init_platform();
65}
66core_initcall(sh7780_pci_init);
67
68int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
69{
70 u32 word;
71
72 /*
73 * This code is unused for some boards as it is done in the
74 * bootloader and doing it here means the MAC addresses loaded
75 * by the bootloader get lost.
76 */
77 if (!(map->flags & SH4_PCIC_NO_RESET)) {
78 /* toggle PCI reset pin */
79 word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
80 pci_write_reg(word, SH4_PCICR);
81 /* Wait for a long time... not 1 sec. but long enough */
82 mdelay(100);
83 word = SH4_PCICR_PREFIX;
84 pci_write_reg(word, SH4_PCICR);
85 }
86
87 /* set the command/status bits to:
88 * Wait Cycle Control + Parity Enable + Bus Master +
89 * Mem space enable
90 */
91 pci_write_reg(0x00000046, SH7780_PCICMD);
92
93 /* define this host as the host bridge */
94 word = PCI_BASE_CLASS_BRIDGE << 24;
95 pci_write_reg(word, SH7780_PCIRID);
96
97 /* Set IO and Mem windows to local address
98 * Make PCI and local address the same for easy 1 to 1 mapping
99 * Window0 = map->window0.size @ non-cached area base = SDRAM
100 * Window1 = map->window1.size @ cached area base = SDRAM
101 */
102 word = ((map->window0.size - 1) & 0x1ff00001) | 0x01;
103 pci_write_reg(0x07f00001, SH4_PCILSR0);
104 word = ((map->window1.size - 1) & 0x1ff00001) | 0x01;
105 pci_write_reg(0x00000001, SH4_PCILSR1);
106 /* Set the values on window 0 PCI config registers */
107 word = P2SEGADDR(map->window0.base);
108 pci_write_reg(0xa8000000, SH4_PCILAR0);
109 pci_write_reg(0x08000000, SH7780_PCIMBAR0);
110 /* Set the values on window 1 PCI config registers */
111 word = P2SEGADDR(map->window1.base);
112 pci_write_reg(0x00000000, SH4_PCILAR1);
113 pci_write_reg(0x00000000, SH7780_PCIMBAR1);
114
115 /* Map IO space into PCI IO window
116 * The IO window is 64K-PCIBIOS_MIN_IO in size
117 * IO addresses will be translated to the
118 * PCI IO window base address
119 */
120 pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n",
121 PCIBIOS_MIN_IO, (64 << 10),
122 SH7780_PCI_IO_BASE + PCIBIOS_MIN_IO);
123
124 /* NOTE: I'm ignoring the PCI error IRQs for now..
125 * TODO: add support for the internal error interrupts and
126 * DMA interrupts...
127 */
128
129#ifdef CONFIG_SH_R7780RP
130 pci_fixup_pcic();
131#endif
132
133 /* SH7780 init done, set central function init complete */
134 /* use round robin mode to stop a device starving/overruning */
135 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO;
136 pci_write_reg(word, SH4_PCICR);
137
138 return 1;
139}
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
new file mode 100644
index 000000000000..f02d2180a4bc
--- /dev/null
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -0,0 +1,94 @@
1/*
2 * Low-Level PCI Support for SH7780 targets
3 *
4 * Dustin McIntire (dustin@sensoria.com) (c) 2001
5 * Paul Mundt (lethal@linux-sh.org) (c) 2003
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
9 *
10 */
11
12#ifndef _PCI_SH7780_H_
13#define _PCI_SH7780_H_
14
15/* Platform Specific Values */
16#define SH7780_VENDOR_ID 0x1912
17#define SH7780_DEVICE_ID 0x0002
18#define SH7781_DEVICE_ID 0x0001
19
20/* SH7780 Control Registers */
21#define SH7780_PCI_VCR0 0xFE000000
22#define SH7780_PCI_VCR1 0xFE000004
23#define SH7780_PCI_VCR2 0xFE000008
24
25/* SH7780 Specific Values */
26#define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */
27#define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */
28
29#define SH7780_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */
30#define SH7780_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
31
32#define SH7780_PCI_IO_BASE 0xFE400000 /* IO space base address */
33#define SH7780_PCI_IO_SIZE 0x00400000 /* Size of IO window */
34
35#define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */
36#define PCI_REG(n) (SH7780_PCIREG_BASE+n)
37
38/* SH7780 PCI Config Registers */
39#define SH7780_PCIVID 0x000 /* Vendor ID */
40#define SH7780_PCIDID 0x002 /* Device ID */
41#define SH7780_PCICMD 0x004 /* Command */
42#define SH7780_PCISTATUS 0x006 /* Status */
43#define SH7780_PCIRID 0x008 /* Revision ID */
44#define SH7780_PCIPIF 0x009 /* Program Interface */
45#define SH7780_PCISUB 0x00a /* Sub class code */
46#define SH7780_PCIBCC 0x00b /* Base class code */
47#define SH7780_PCICLS 0x00c /* Cache line size */
48#define SH7780_PCILTM 0x00d /* latency timer */
49#define SH7780_PCIHDR 0x00e /* Header type */
50#define SH7780_PCIBIST 0x00f /* BIST */
51#define SH7780_PCIIBAR 0x010 /* IO Base address */
52#define SH7780_PCIMBAR0 0x014 /* Memory base address0 */
53#define SH7780_PCIMBAR1 0x018 /* Memory base address1 */
54#define SH7780_PCISVID 0x02c /* Sub system vendor ID */
55#define SH7780_PCISID 0x02e /* Sub system ID */
56#define SH7780_PCICP 0x034
57#define SH7780_PCIINTLINE 0x03c /* Interrupt line */
58#define SH7780_PCIINTPIN 0x03d /* Interrupt pin */
59#define SH7780_PCIMINGNT 0x03e /* Minumum grand */
60#define SH7780_PCIMAXLAT 0x03f /* Maxmum latency */
61#define SH7780_PCICID 0x040
62#define SH7780_PCINIP 0x041
63#define SH7780_PCIPMC 0x042
64#define SH7780_PCIPMCSR 0x044
65#define SH7780_PCIPMCSR_BSE 0x046
66#define SH7780_PCICDD 0x047
67
68#define SH7780_PCIMBR0 0x1E0
69#define SH7780_PCIMBMR0 0x1E4
70#define SH7780_PCIMBR2 0x1F0
71#define SH7780_PCIMBMR2 0x1F4
72#define SH7780_PCIIOBR 0x1F8
73#define SH7780_PCIIOBMR 0x1FC
74#define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */
75#define SH7780_PCICSCR1 0x214 /* Cache Snoop2 Cnt. Register */
76#define SH7780_PCICSAR0 0x218 /* Cache Snoop1 Addr. Register */
77#define SH7780_PCICSAR1 0x21C /* Cache Snoop2 Addr. Register */
78
79/* General Memory Config Addresses */
80#define SH7780_CS0_BASE_ADDR 0x0
81#define SH7780_MEM_REGION_SIZE 0x04000000
82#define SH7780_CS1_BASE_ADDR (SH7780_CS0_BASE_ADDR + SH7780_MEM_REGION_SIZE)
83#define SH7780_CS2_BASE_ADDR (SH7780_CS1_BASE_ADDR + SH7780_MEM_REGION_SIZE)
84#define SH7780_CS3_BASE_ADDR (SH7780_CS2_BASE_ADDR + SH7780_MEM_REGION_SIZE)
85#define SH7780_CS4_BASE_ADDR (SH7780_CS3_BASE_ADDR + SH7780_MEM_REGION_SIZE)
86#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE)
87#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE)
88
89struct sh4_pci_address_map;
90
91/* arch/sh/drivers/pci/pci-sh7780.c */
92int sh7780_pcic_init(struct sh4_pci_address_map *map);
93
94#endif /* _PCI_SH7780_H_ */
diff --git a/arch/sh/drivers/pci/pci-st40.c b/arch/sh/drivers/pci/pci-st40.c
index 7c81b8b65bb5..4ab5ea6b35fb 100644
--- a/arch/sh/drivers/pci/pci-st40.c
+++ b/arch/sh/drivers/pci/pci-st40.c
@@ -70,12 +70,6 @@
70static void pci_set_rbar_region(unsigned int region, unsigned long localAddr, 70static void pci_set_rbar_region(unsigned int region, unsigned long localAddr,
71 unsigned long pciOffset, unsigned long regionSize); 71 unsigned long pciOffset, unsigned long regionSize);
72 72
73/*
74 * The pcibios_map_platform_irq function is defined in the appropriate
75 * board specific code and referenced here
76 */
77extern int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
78
79static __init void SetPCIPLL(void) 73static __init void SetPCIPLL(void)
80{ 74{
81 { 75 {
@@ -422,13 +416,6 @@ struct pci_ops st40pci_config_ops = {
422/* Everything hangs off this */ 416/* Everything hangs off this */
423static struct pci_bus *pci_root_bus; 417static struct pci_bus *pci_root_bus;
424 418
425
426static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin)
427{
428 return PCI_SLOT(dev->devfn);
429}
430
431
432static int __init pcibios_init(void) 419static int __init pcibios_init(void)
433{ 420{
434 extern unsigned long memory_start, memory_end; 421 extern unsigned long memory_start, memory_end;
@@ -465,17 +452,11 @@ static int __init pcibios_init(void)
465 /* ok, do the scan man */ 452 /* ok, do the scan man */
466 pci_root_bus = pci_scan_bus(0, &st40pci_config_ops, NULL); 453 pci_root_bus = pci_scan_bus(0, &st40pci_config_ops, NULL);
467 pci_assign_unassigned_resources(); 454 pci_assign_unassigned_resources();
468 pci_fixup_irqs(no_swizzle, pcibios_map_platform_irq);
469 455
470 return 0; 456 return 0;
471} 457}
472
473subsys_initcall(pcibios_init); 458subsys_initcall(pcibios_init);
474 459
475void __init pcibios_fixup_bus(struct pci_bus *bus)
476{
477}
478
479/* 460/*
480 * Publish a region of local address space over the PCI bus 461 * Publish a region of local address space over the PCI bus
481 * to other devices. 462 * to other devices.
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 3d546ba329cf..d439336d2e18 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -1,21 +1,45 @@
1/* arch/sh/kernel/pci.c 1/*
2 * $Id: pci.c,v 1.1 2003/08/24 19:15:45 lethal Exp $ 2 * arch/sh/drivers/pci/pci.c
3 * 3 *
4 * Copyright (c) 2002 M. R. Brown <mrbrown@linux-sh.org> 4 * Copyright (c) 2002 M. R. Brown <mrbrown@linux-sh.org>
5 * 5 * Copyright (c) 2004 - 2006 Paul Mundt <lethal@linux-sh.org>
6 * 6 *
7 * These functions are collected here to reduce duplication of common 7 * These functions are collected here to reduce duplication of common
8 * code amongst the many platform-specific PCI support code files. 8 * code amongst the many platform-specific PCI support code files.
9 * 9 *
10 * These routines require the following board-specific routines: 10 * These routines require the following board-specific routines:
11 * void pcibios_fixup_irqs(); 11 * void pcibios_fixup_irqs();
12 * 12 *
13 * See include/asm-sh/pci.h for more information. 13 * See include/asm-sh/pci.h for more information.
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file "COPYING" in the main directory of this archive
17 * for more details.
14 */ 18 */
15
16#include <linux/kernel.h> 19#include <linux/kernel.h>
17#include <linux/pci.h> 20#include <linux/pci.h>
18#include <linux/init.h> 21#include <linux/init.h>
22#include <asm/io.h>
23
24static inline u8 bridge_swizzle(u8 pin, u8 slot)
25{
26 return (((pin - 1) + slot) % 4) + 1;
27}
28
29static u8 __init simple_swizzle(struct pci_dev *dev, u8 *pinp)
30{
31 u8 pin = *pinp;
32
33 while (dev->bus->parent) {
34 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
35 /* Move up the chain of bridges. */
36 dev = dev->bus->self;
37 }
38 *pinp = pin;
39
40 /* The slot is the slot of the last bridge. */
41 return PCI_SLOT(dev->devfn);
42}
19 43
20static int __init pcibios_init(void) 44static int __init pcibios_init(void)
21{ 45{
@@ -26,26 +50,32 @@ static int __init pcibios_init(void)
26#ifdef CONFIG_PCI_AUTO 50#ifdef CONFIG_PCI_AUTO
27 /* assign resources */ 51 /* assign resources */
28 busno = 0; 52 busno = 0;
29 for (p = board_pci_channels; p->pci_ops != NULL; p++) { 53 for (p = board_pci_channels; p->pci_ops != NULL; p++)
30 busno = pciauto_assign_resources(busno, p) + 1; 54 busno = pciauto_assign_resources(busno, p) + 1;
31 }
32#endif 55#endif
33 56
34 /* scan the buses */ 57 /* scan the buses */
35 busno = 0; 58 busno = 0;
36 for (p= board_pci_channels; p->pci_ops != NULL; p++) { 59 for (p = board_pci_channels; p->pci_ops != NULL; p++) {
37 bus = pci_scan_bus(busno, p->pci_ops, p); 60 bus = pci_scan_bus(busno, p->pci_ops, p);
38 busno = bus->subordinate+1; 61 busno = bus->subordinate + 1;
39 } 62 }
40 63
41 /* board-specific fixups */ 64 pci_fixup_irqs(simple_swizzle, pcibios_map_platform_irq);
42 pcibios_fixup_irqs();
43 65
44 return 0; 66 return 0;
45} 67}
46
47subsys_initcall(pcibios_init); 68subsys_initcall(pcibios_init);
48 69
70/*
71 * Called after each bus is probed, but before its children
72 * are examined.
73 */
74void __init pcibios_fixup_bus(struct pci_bus *bus)
75{
76 pci_read_bridge_bases(bus);
77}
78
49void 79void
50pcibios_update_resource(struct pci_dev *dev, struct resource *root, 80pcibios_update_resource(struct pci_dev *dev, struct resource *root,
51 struct resource *res, int resource) 81 struct resource *res, int resource)
@@ -61,13 +91,17 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root,
61 new |= PCI_ROM_ADDRESS_ENABLE; 91 new |= PCI_ROM_ADDRESS_ENABLE;
62 reg = dev->rom_base_reg; 92 reg = dev->rom_base_reg;
63 } else { 93 } else {
64 /* Somebody might have asked allocation of a non-standard resource */ 94 /*
95 * Somebody might have asked allocation of a non-standard
96 * resource
97 */
65 return; 98 return;
66 } 99 }
67 100
68 pci_write_config_dword(dev, reg, new); 101 pci_write_config_dword(dev, reg, new);
69 pci_read_config_dword(dev, reg, &check); 102 pci_read_config_dword(dev, reg, &check);
70 if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) { 103 if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ?
104 PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
71 printk(KERN_ERR "PCI: Error while updating region " 105 printk(KERN_ERR "PCI: Error while updating region "
72 "%s/%d (%08x != %08x)\n", pci_name(dev), resource, 106 "%s/%d (%08x != %08x)\n", pci_name(dev), resource,
73 new, check); 107 new, check);
@@ -145,7 +179,8 @@ void pcibios_set_master(struct pci_dev *dev)
145 lat = pcibios_max_latency; 179 lat = pcibios_max_latency;
146 else 180 else
147 return; 181 return;
148 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); 182 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
183 pci_name(dev), lat);
149 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); 184 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
150} 185}
151 186
@@ -153,3 +188,39 @@ void __init pcibios_update_irq(struct pci_dev *dev, int irq)
153{ 188{
154 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 189 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
155} 190}
191
192void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
193{
194 unsigned long start = pci_resource_start(dev, bar);
195 unsigned long len = pci_resource_len(dev, bar);
196 unsigned long flags = pci_resource_flags(dev, bar);
197
198 if (unlikely(!len || !start))
199 return NULL;
200 if (maxlen && len > maxlen)
201 len = maxlen;
202
203 /*
204 * Presently the IORESOURCE_MEM case is a bit special, most
205 * SH7751 style PCI controllers have PCI memory at a fixed
206 * location in the address space where no remapping is desired
207 * (typically at 0xfd000000, but is_pci_memaddr() will know
208 * best). With the IORESOURCE_MEM case more care has to be taken
209 * to inhibit page table mapping for legacy cores, but this is
210 * punted off to __ioremap().
211 * -- PFM.
212 */
213 if (flags & IORESOURCE_IO)
214 return ioport_map(start, len);
215 if (flags & IORESOURCE_MEM)
216 return ioremap(start, len);
217
218 return NULL;
219}
220EXPORT_SYMBOL(pci_iomap);
221
222void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
223{
224 iounmap(addr);
225}
226EXPORT_SYMBOL(pci_iounmap);
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index f05cd96f8867..5da88a43d350 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -6,9 +6,10 @@ extra-y := head.o init_task.o vmlinux.lds
6 6
7obj-y := process.o signal.o entry.o traps.o irq.o \ 7obj-y := process.o signal.o entry.o traps.o irq.o \
8 ptrace.o setup.o time.o sys_sh.o semaphore.o \ 8 ptrace.o setup.o time.o sys_sh.o semaphore.o \
9 io.o io_generic.o sh_ksyms.o 9 io.o io_generic.o sh_ksyms.o syscalls.o
10 10
11obj-y += cpu/ timers/ 11obj-y += cpu/ timers/
12obj-$(CONFIG_VSYSCALL) += vsyscall/
12 13
13obj-$(CONFIG_SMP) += smp.o 14obj-$(CONFIG_SMP) += smp.o
14obj-$(CONFIG_CF_ENABLER) += cf-enabler.o 15obj-$(CONFIG_CF_ENABLER) += cf-enabler.o
@@ -18,3 +19,5 @@ obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
18obj-$(CONFIG_MODULES) += module.o 19obj-$(CONFIG_MODULES) += module.o
19obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 20obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
20obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 21obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
22obj-$(CONFIG_APM) += apm.o
23obj-$(CONFIG_PM) += pm.o
diff --git a/arch/sh/kernel/apm.c b/arch/sh/kernel/apm.c
new file mode 100644
index 000000000000..871e7d640002
--- /dev/null
+++ b/arch/sh/kernel/apm.c
@@ -0,0 +1,539 @@
1/*
2 * bios-less APM driver for hp680
3 *
4 * Copyright 2005 (c) Andriy Skulysh <askulysh@gmail.com>
5 *
6 * based on ARM APM driver by
7 * Jamey Hicks <jamey@crl.dec.com>
8 *
9 * adapted from the APM BIOS driver for Linux by
10 * Stephen Rothwell (sfr@linuxcare.com)
11 *
12 * APM 1.2 Reference:
13 * Intel Corporation, Microsoft Corporation. Advanced Power Management
14 * (APM) BIOS Interface Specification, Revision 1.2, February 1996.
15 *
16 * [This document is available from Microsoft at:
17 * http://www.microsoft.com/hwdev/busbios/amp_12.htm]
18 */
19#include <linux/config.h>
20#include <linux/module.h>
21#include <linux/poll.h>
22#include <linux/timer.h>
23#include <linux/slab.h>
24#include <linux/proc_fs.h>
25#include <linux/miscdevice.h>
26#include <linux/apm_bios.h>
27#include <linux/pm.h>
28#include <linux/pm_legacy.h>
29#include <asm/apm.h>
30
31#define MODNAME "apm"
32
33/*
34 * The apm_bios device is one of the misc char devices.
35 * This is its minor number.
36 */
37#define APM_MINOR_DEV 134
38
39/*
40 * Maximum number of events stored
41 */
42#define APM_MAX_EVENTS 16
43
44struct apm_queue {
45 unsigned int event_head;
46 unsigned int event_tail;
47 apm_event_t events[APM_MAX_EVENTS];
48};
49
50/*
51 * The per-file APM data
52 */
53struct apm_user {
54 struct list_head list;
55
56 unsigned int suser: 1;
57 unsigned int writer: 1;
58 unsigned int reader: 1;
59
60 int suspend_result;
61 unsigned int suspend_state;
62#define SUSPEND_NONE 0 /* no suspend pending */
63#define SUSPEND_PENDING 1 /* suspend pending read */
64#define SUSPEND_READ 2 /* suspend read, pending ack */
65#define SUSPEND_ACKED 3 /* suspend acked */
66#define SUSPEND_DONE 4 /* suspend completed */
67
68 struct apm_queue queue;
69};
70
71/*
72 * Local variables
73 */
74static int suspends_pending;
75
76static DECLARE_WAIT_QUEUE_HEAD(apm_waitqueue);
77static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue);
78
79/*
80 * This is a list of everyone who has opened /dev/apm_bios
81 */
82static DECLARE_RWSEM(user_list_lock);
83static LIST_HEAD(apm_user_list);
84
85/*
86 * kapmd info. kapmd provides us a process context to handle
87 * "APM" events within - specifically necessary if we're going
88 * to be suspending the system.
89 */
90static DECLARE_WAIT_QUEUE_HEAD(kapmd_wait);
91static DECLARE_COMPLETION(kapmd_exit);
92static DEFINE_SPINLOCK(kapmd_queue_lock);
93static struct apm_queue kapmd_queue;
94
95int apm_suspended;
96EXPORT_SYMBOL(apm_suspended);
97
98/* Platform-specific apm_read_proc(). */
99int (*apm_get_info)(char *buf, char **start, off_t fpos, int length);
100EXPORT_SYMBOL(apm_get_info);
101
102/*
103 * APM event queue management.
104 */
105static inline int queue_empty(struct apm_queue *q)
106{
107 return q->event_head == q->event_tail;
108}
109
110static inline apm_event_t queue_get_event(struct apm_queue *q)
111{
112 q->event_tail = (q->event_tail + 1) % APM_MAX_EVENTS;
113 return q->events[q->event_tail];
114}
115
116static void queue_add_event(struct apm_queue *q, apm_event_t event)
117{
118 q->event_head = (q->event_head + 1) % APM_MAX_EVENTS;
119 if (q->event_head == q->event_tail) {
120 static int notified;
121
122 if (notified++ == 0)
123 printk(KERN_ERR "apm: an event queue overflowed\n");
124
125 q->event_tail = (q->event_tail + 1) % APM_MAX_EVENTS;
126 }
127 q->events[q->event_head] = event;
128}
129
130static void queue_event_one_user(struct apm_user *as, apm_event_t event)
131{
132 if (as->suser && as->writer) {
133 switch (event) {
134 case APM_SYS_SUSPEND:
135 case APM_USER_SUSPEND:
136 /*
137 * If this user already has a suspend pending,
138 * don't queue another one.
139 */
140 if (as->suspend_state != SUSPEND_NONE)
141 return;
142
143 as->suspend_state = SUSPEND_PENDING;
144 suspends_pending++;
145 break;
146 }
147 }
148 queue_add_event(&as->queue, event);
149}
150
151static void queue_event(apm_event_t event, struct apm_user *sender)
152{
153 struct apm_user *as;
154
155 down_read(&user_list_lock);
156
157 list_for_each_entry(as, &apm_user_list, list)
158 if (as != sender && as->reader)
159 queue_event_one_user(as, event);
160
161 up_read(&user_list_lock);
162 wake_up_interruptible(&apm_waitqueue);
163}
164
165/**
166 * apm_queue_event - queue an APM event for kapmd
167 * @event: APM event
168 *
169 * Queue an APM event for kapmd to process and ultimately take the
170 * appropriate action. Only a subset of events are handled:
171 * %APM_LOW_BATTERY
172 * %APM_POWER_STATUS_CHANGE
173 * %APM_USER_SUSPEND
174 * %APM_SYS_SUSPEND
175 * %APM_CRITICAL_SUSPEND
176 */
177void apm_queue_event(apm_event_t event)
178{
179 spin_lock_irq(&kapmd_queue_lock);
180 queue_add_event(&kapmd_queue, event);
181 spin_unlock_irq(&kapmd_queue_lock);
182
183 wake_up_interruptible(&kapmd_wait);
184}
185EXPORT_SYMBOL(apm_queue_event);
186
187static void apm_suspend(void)
188{
189 struct apm_user *as;
190 int err;
191
192 apm_suspended = 1;
193 err = pm_suspend(PM_SUSPEND_MEM);
194
195 /*
196 * Anyone on the APM queues will think we're still suspended.
197 * Send a message so everyone knows we're now awake again.
198 */
199 queue_event(APM_NORMAL_RESUME, NULL);
200
201 /*
202 * Finally, wake up anyone who is sleeping on the suspend.
203 */
204 down_read(&user_list_lock);
205 list_for_each_entry(as, &apm_user_list, list) {
206 as->suspend_result = err;
207 as->suspend_state = SUSPEND_DONE;
208 }
209 up_read(&user_list_lock);
210
211 wake_up(&apm_suspend_waitqueue);
212 apm_suspended = 0;
213}
214
215static ssize_t apm_read(struct file *fp, char __user *buf,
216 size_t count, loff_t *ppos)
217{
218 struct apm_user *as = fp->private_data;
219 apm_event_t event;
220 int i = count, ret = 0;
221
222 if (count < sizeof(apm_event_t))
223 return -EINVAL;
224
225 if (queue_empty(&as->queue) && fp->f_flags & O_NONBLOCK)
226 return -EAGAIN;
227
228 wait_event_interruptible(apm_waitqueue, !queue_empty(&as->queue));
229
230 while ((i >= sizeof(event)) && !queue_empty(&as->queue)) {
231 event = queue_get_event(&as->queue);
232
233 ret = -EFAULT;
234 if (copy_to_user(buf, &event, sizeof(event)))
235 break;
236
237 if (event == APM_SYS_SUSPEND || event == APM_USER_SUSPEND)
238 as->suspend_state = SUSPEND_READ;
239
240 buf += sizeof(event);
241 i -= sizeof(event);
242 }
243
244 if (i < count)
245 ret = count - i;
246
247 return ret;
248}
249
250static unsigned int apm_poll(struct file *fp, poll_table * wait)
251{
252 struct apm_user *as = fp->private_data;
253
254 poll_wait(fp, &apm_waitqueue, wait);
255 return queue_empty(&as->queue) ? 0 : POLLIN | POLLRDNORM;
256}
257
258/*
259 * apm_ioctl - handle APM ioctl
260 *
261 * APM_IOC_SUSPEND
262 * This IOCTL is overloaded, and performs two functions. It is used to:
263 * - initiate a suspend
264 * - acknowledge a suspend read from /dev/apm_bios.
265 * Only when everyone who has opened /dev/apm_bios with write permission
266 * has acknowledge does the actual suspend happen.
267 */
268static int
269apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
270{
271 struct apm_user *as = filp->private_data;
272 unsigned long flags;
273 int err = -EINVAL;
274
275 if (!as->suser || !as->writer)
276 return -EPERM;
277
278 switch (cmd) {
279 case APM_IOC_SUSPEND:
280 as->suspend_result = -EINTR;
281
282 if (as->suspend_state == SUSPEND_READ) {
283 /*
284 * If we read a suspend command from /dev/apm_bios,
285 * then the corresponding APM_IOC_SUSPEND ioctl is
286 * interpreted as an acknowledge.
287 */
288 as->suspend_state = SUSPEND_ACKED;
289 suspends_pending--;
290 } else {
291 /*
292 * Otherwise it is a request to suspend the system.
293 * Queue an event for all readers, and expect an
294 * acknowledge from all writers who haven't already
295 * acknowledged.
296 */
297 queue_event(APM_USER_SUSPEND, as);
298 }
299
300 /*
301 * If there are no further acknowledges required, suspend
302 * the system.
303 */
304 if (suspends_pending == 0)
305 apm_suspend();
306
307 /*
308 * Wait for the suspend/resume to complete. If there are
309 * pending acknowledges, we wait here for them.
310 *
311 * Note that we need to ensure that the PM subsystem does
312 * not kick us out of the wait when it suspends the threads.
313 */
314 flags = current->flags;
315 current->flags |= PF_NOFREEZE;
316
317 /*
318 * Note: do not allow a thread which is acking the suspend
319 * to escape until the resume is complete.
320 */
321 if (as->suspend_state == SUSPEND_ACKED)
322 wait_event(apm_suspend_waitqueue,
323 as->suspend_state == SUSPEND_DONE);
324 else
325 wait_event_interruptible(apm_suspend_waitqueue,
326 as->suspend_state == SUSPEND_DONE);
327
328 current->flags = flags;
329 err = as->suspend_result;
330 as->suspend_state = SUSPEND_NONE;
331 break;
332 }
333
334 return err;
335}
336
337static int apm_release(struct inode * inode, struct file * filp)
338{
339 struct apm_user *as = filp->private_data;
340 filp->private_data = NULL;
341
342 down_write(&user_list_lock);
343 list_del(&as->list);
344 up_write(&user_list_lock);
345
346 /*
347 * We are now unhooked from the chain. As far as new
348 * events are concerned, we no longer exist. However, we
349 * need to balance suspends_pending, which means the
350 * possibility of sleeping.
351 */
352 if (as->suspend_state != SUSPEND_NONE) {
353 suspends_pending -= 1;
354 if (suspends_pending == 0)
355 apm_suspend();
356 }
357
358 kfree(as);
359 return 0;
360}
361
362static int apm_open(struct inode * inode, struct file * filp)
363{
364 struct apm_user *as;
365
366 as = kzalloc(sizeof(*as), GFP_KERNEL);
367 if (as) {
368 /*
369 * XXX - this is a tiny bit broken, when we consider BSD
370 * process accounting. If the device is opened by root, we
371 * instantly flag that we used superuser privs. Who knows,
372 * we might close the device immediately without doing a
373 * privileged operation -- cevans
374 */
375 as->suser = capable(CAP_SYS_ADMIN);
376 as->writer = (filp->f_mode & FMODE_WRITE) == FMODE_WRITE;
377 as->reader = (filp->f_mode & FMODE_READ) == FMODE_READ;
378
379 down_write(&user_list_lock);
380 list_add(&as->list, &apm_user_list);
381 up_write(&user_list_lock);
382
383 filp->private_data = as;
384 }
385
386 return as ? 0 : -ENOMEM;
387}
388
389static struct file_operations apm_bios_fops = {
390 .owner = THIS_MODULE,
391 .read = apm_read,
392 .poll = apm_poll,
393 .ioctl = apm_ioctl,
394 .open = apm_open,
395 .release = apm_release,
396};
397
398static struct miscdevice apm_device = {
399 .minor = APM_MINOR_DEV,
400 .name = "apm_bios",
401 .fops = &apm_bios_fops
402};
403
404
405#ifdef CONFIG_PROC_FS
406/*
407 * Arguments, with symbols from linux/apm_bios.h.
408 *
409 * 0) Linux driver version (this will change if format changes)
410 * 1) APM BIOS Version. Usually 1.0, 1.1 or 1.2.
411 * 2) APM flags from APM Installation Check (0x00):
412 * bit 0: APM_16_BIT_SUPPORT
413 * bit 1: APM_32_BIT_SUPPORT
414 * bit 2: APM_IDLE_SLOWS_CLOCK
415 * bit 3: APM_BIOS_DISABLED
416 * bit 4: APM_BIOS_DISENGAGED
417 * 3) AC line status
418 * 0x00: Off-line
419 * 0x01: On-line
420 * 0x02: On backup power (BIOS >= 1.1 only)
421 * 0xff: Unknown
422 * 4) Battery status
423 * 0x00: High
424 * 0x01: Low
425 * 0x02: Critical
426 * 0x03: Charging
427 * 0x04: Selected battery not present (BIOS >= 1.2 only)
428 * 0xff: Unknown
429 * 5) Battery flag
430 * bit 0: High
431 * bit 1: Low
432 * bit 2: Critical
433 * bit 3: Charging
434 * bit 7: No system battery
435 * 0xff: Unknown
436 * 6) Remaining battery life (percentage of charge):
437 * 0-100: valid
438 * -1: Unknown
439 * 7) Remaining battery life (time units):
440 * Number of remaining minutes or seconds
441 * -1: Unknown
442 * 8) min = minutes; sec = seconds
443 */
444static int apm_read_proc(char *buf, char **start, off_t fpos, int length)
445{
446 if (likely(apm_get_info))
447 return apm_get_info(buf, start, fpos, length);
448
449 return -EINVAL;
450}
451#endif
452
453static int kapmd(void *arg)
454{
455 daemonize("kapmd");
456 current->flags |= PF_NOFREEZE;
457
458 do {
459 apm_event_t event;
460
461 wait_event_interruptible(kapmd_wait,
462 !queue_empty(&kapmd_queue) || !pm_active);
463
464 if (!pm_active)
465 break;
466
467 spin_lock_irq(&kapmd_queue_lock);
468 event = 0;
469 if (!queue_empty(&kapmd_queue))
470 event = queue_get_event(&kapmd_queue);
471 spin_unlock_irq(&kapmd_queue_lock);
472
473 switch (event) {
474 case 0:
475 break;
476
477 case APM_LOW_BATTERY:
478 case APM_POWER_STATUS_CHANGE:
479 queue_event(event, NULL);
480 break;
481
482 case APM_USER_SUSPEND:
483 case APM_SYS_SUSPEND:
484 queue_event(event, NULL);
485 if (suspends_pending == 0)
486 apm_suspend();
487 break;
488
489 case APM_CRITICAL_SUSPEND:
490 apm_suspend();
491 break;
492 }
493 } while (1);
494
495 complete_and_exit(&kapmd_exit, 0);
496}
497
498static int __init apm_init(void)
499{
500 int ret;
501
502 pm_active = 1;
503
504 ret = kernel_thread(kapmd, NULL, CLONE_KERNEL);
505 if (unlikely(ret < 0)) {
506 pm_active = 0;
507 return ret;
508 }
509
510 create_proc_info_entry("apm", 0, NULL, apm_read_proc);
511
512 ret = misc_register(&apm_device);
513 if (unlikely(ret != 0)) {
514 remove_proc_entry("apm", NULL);
515
516 pm_active = 0;
517 wake_up(&kapmd_wait);
518 wait_for_completion(&kapmd_exit);
519 }
520
521 return ret;
522}
523
524static void __exit apm_exit(void)
525{
526 misc_deregister(&apm_device);
527 remove_proc_entry("apm", NULL);
528
529 pm_active = 0;
530 wake_up(&kapmd_wait);
531 wait_for_completion(&kapmd_exit);
532}
533
534module_init(apm_init);
535module_exit(apm_exit);
536
537MODULE_AUTHOR("Stephen Rothwell, Andriy Skulysh");
538MODULE_DESCRIPTION("Advanced Power Management");
539MODULE_LICENSE("GPL");
diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c
index f1f9ab87f0b0..3e5fa1e24df0 100644
--- a/arch/sh/kernel/cf-enabler.c
+++ b/arch/sh/kernel/cf-enabler.c
@@ -10,7 +10,8 @@
10 */ 10 */
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13 13#include <linux/mm.h>
14#include <linux/vmalloc.h>
14#include <asm/io.h> 15#include <asm/io.h>
15#include <asm/irq.h> 16#include <asm/irq.h>
16 17
@@ -32,8 +33,6 @@
32/* SH4 can't access PCMCIA interface through P2 area. 33/* SH4 can't access PCMCIA interface through P2 area.
33 * we must remap it with appropreate attribute bit of the page set. 34 * we must remap it with appropreate attribute bit of the page set.
34 * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */ 35 * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
35#include <linux/mm.h>
36#include <linux/vmalloc.h>
37 36
38#if defined(CONFIG_CF_AREA6) 37#if defined(CONFIG_CF_AREA6)
39#define slot_no 0 38#define slot_no 0
@@ -41,9 +40,6 @@
41#define slot_no 1 40#define slot_no 1
42#endif 41#endif
43 42
44/* defined in mm/ioremap.c */
45extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
46
47/* use this pointer to access to directly connected compact flash io area*/ 43/* use this pointer to access to directly connected compact flash io area*/
48void *cf_io_base; 44void *cf_io_base;
49 45
@@ -62,7 +58,7 @@ static int __init allocate_cf_area(void)
62 return -ENOMEM; 58 return -ENOMEM;
63 } 59 }
64/* printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n", 60/* printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n",
65 paddrbase, psize, prot.pgprot, cf_io_base);*/ 61 paddrbase, psize, prot.pgprot, cf_io_base);*/
66 62
67 /* XXX : do we need attribute and common-memory area also? */ 63 /* XXX : do we need attribute and common-memory area also? */
68 64
@@ -87,7 +83,7 @@ static int __init cf_init_default(void)
87} 83}
88 84
89#if defined(CONFIG_SH_SOLUTION_ENGINE) 85#if defined(CONFIG_SH_SOLUTION_ENGINE)
90#include <asm/se/se.h> 86#include <asm/se.h>
91 87
92/* 88/*
93 * SolutionEngine 89 * SolutionEngine
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 59d5b748752f..fb5dac069382 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -8,6 +8,5 @@ obj-$(CONFIG_CPU_SH2) += sh2/
8obj-$(CONFIG_CPU_SH3) += sh3/ 8obj-$(CONFIG_CPU_SH3) += sh3/
9obj-$(CONFIG_CPU_SH4) += sh4/ 9obj-$(CONFIG_CPU_SH4) += sh4/
10 10
11obj-$(CONFIG_SH_RTC) += rtc.o
12obj-$(CONFIG_UBC_WAKEUP) += ubc.o 11obj-$(CONFIG_UBC_WAKEUP) += ubc.o
13obj-$(CONFIG_SH_ADC) += adc.o 12obj-$(CONFIG_SH_ADC) += adc.o
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 97fa37f42b84..51ec64cdf348 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/sh/kernel/cpu/clock.c - SuperH clock framework 2 * arch/sh/kernel/cpu/clock.c - SuperH clock framework
3 * 3 *
4 * Copyright (C) 2005 Paul Mundt 4 * Copyright (C) 2005, 2006 Paul Mundt
5 * 5 *
6 * This clock framework is derived from the OMAP version by: 6 * This clock framework is derived from the OMAP version by:
7 * 7 *
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/mutex.h>
18#include <linux/list.h> 19#include <linux/list.h>
19#include <linux/kref.h> 20#include <linux/kref.h>
20#include <linux/seq_file.h> 21#include <linux/seq_file.h>
@@ -24,7 +25,7 @@
24 25
25static LIST_HEAD(clock_list); 26static LIST_HEAD(clock_list);
26static DEFINE_SPINLOCK(clock_lock); 27static DEFINE_SPINLOCK(clock_lock);
27static DECLARE_MUTEX(clock_list_sem); 28static DEFINE_MUTEX(clock_list_sem);
28 29
29/* 30/*
30 * Each subtype is expected to define the init routines for these clocks, 31 * Each subtype is expected to define the init routines for these clocks,
@@ -140,21 +141,21 @@ void clk_disable(struct clk *clk)
140 141
141int clk_register(struct clk *clk) 142int clk_register(struct clk *clk)
142{ 143{
143 down(&clock_list_sem); 144 mutex_lock(&clock_list_sem);
144 145
145 list_add(&clk->node, &clock_list); 146 list_add(&clk->node, &clock_list);
146 kref_init(&clk->kref); 147 kref_init(&clk->kref);
147 148
148 up(&clock_list_sem); 149 mutex_unlock(&clock_list_sem);
149 150
150 return 0; 151 return 0;
151} 152}
152 153
153void clk_unregister(struct clk *clk) 154void clk_unregister(struct clk *clk)
154{ 155{
155 down(&clock_list_sem); 156 mutex_lock(&clock_list_sem);
156 list_del(&clk->node); 157 list_del(&clk->node);
157 up(&clock_list_sem); 158 mutex_unlock(&clock_list_sem);
158} 159}
159 160
160inline unsigned long clk_get_rate(struct clk *clk) 161inline unsigned long clk_get_rate(struct clk *clk)
@@ -198,14 +199,14 @@ struct clk *clk_get(const char *id)
198{ 199{
199 struct clk *p, *clk = ERR_PTR(-ENOENT); 200 struct clk *p, *clk = ERR_PTR(-ENOENT);
200 201
201 down(&clock_list_sem); 202 mutex_lock(&clock_list_sem);
202 list_for_each_entry(p, &clock_list, node) { 203 list_for_each_entry(p, &clock_list, node) {
203 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { 204 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
204 clk = p; 205 clk = p;
205 break; 206 break;
206 } 207 }
207 } 208 }
208 up(&clock_list_sem); 209 mutex_unlock(&clock_list_sem);
209 210
210 return clk; 211 return clk;
211} 212}
@@ -225,7 +226,7 @@ int __init clk_init(void)
225{ 226{
226 int i, ret = 0; 227 int i, ret = 0;
227 228
228 BUG_ON(unlikely(!master_clk.rate)); 229 BUG_ON(!master_clk.rate);
229 230
230 for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) { 231 for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
231 struct clk *clk = onchip_clocks[i]; 232 struct clk *clk = onchip_clocks[i];
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 868e68b28880..bfb90eb0b7a6 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -4,6 +4,7 @@
4 * CPU init code 4 * CPU init code
5 * 5 *
6 * Copyright (C) 2002, 2003 Paul Mundt 6 * Copyright (C) 2002, 2003 Paul Mundt
7 * Copyright (C) 2003 Richard Curnow
7 * 8 *
8 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 10 * License. See the file "COPYING" in the main directory of this archive
@@ -13,6 +14,7 @@
13#include <linux/kernel.h> 14#include <linux/kernel.h>
14#include <asm/processor.h> 15#include <asm/processor.h>
15#include <asm/uaccess.h> 16#include <asm/uaccess.h>
17#include <asm/page.h>
16#include <asm/system.h> 18#include <asm/system.h>
17#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
18#include <asm/cache.h> 20#include <asm/cache.h>
@@ -51,7 +53,15 @@ static void __init cache_init(void)
51 ccr = ctrl_inl(CCR); 53 ccr = ctrl_inl(CCR);
52 54
53 /* 55 /*
54 * If the cache is already enabled .. flush it. 56 * At this point we don't know whether the cache is enabled or not - a
57 * bootloader may have enabled it. There are at least 2 things that
58 * could be dirty in the cache at this point:
59 * 1. kernel command line set up by boot loader
60 * 2. spilled registers from the prolog of this function
61 * => before re-initialising the cache, we must do a purge of the whole
62 * cache out to memory for safety. As long as nothing is spilled
63 * during the loop to lines that have already been done, this is safe.
64 * - RPC
55 */ 65 */
56 if (ccr & CCR_CACHE_ENABLE) { 66 if (ccr & CCR_CACHE_ENABLE) {
57 unsigned long ways, waysize, addrstart; 67 unsigned long ways, waysize, addrstart;
@@ -98,6 +108,8 @@ static void __init cache_init(void)
98 /* Force EMODE if possible */ 108 /* Force EMODE if possible */
99 if (cpu_data->dcache.ways > 1) 109 if (cpu_data->dcache.ways > 1)
100 flags |= CCR_CACHE_EMODE; 110 flags |= CCR_CACHE_EMODE;
111 else
112 flags &= ~CCR_CACHE_EMODE;
101#endif 113#endif
102 114
103#ifdef CONFIG_SH_WRITETHROUGH 115#ifdef CONFIG_SH_WRITETHROUGH
@@ -112,6 +124,9 @@ static void __init cache_init(void)
112 /* Turn on OCRAM -- halve the OC */ 124 /* Turn on OCRAM -- halve the OC */
113 flags |= CCR_CACHE_ORA; 125 flags |= CCR_CACHE_ORA;
114 cpu_data->dcache.sets >>= 1; 126 cpu_data->dcache.sets >>= 1;
127
128 cpu_data->dcache.way_size = cpu_data->dcache.sets *
129 cpu_data->dcache.linesz;
115#endif 130#endif
116 131
117 ctrl_outl(flags, CCR); 132 ctrl_outl(flags, CCR);
@@ -184,6 +199,10 @@ asmlinkage void __init sh_cpu_init(void)
184 /* Init the cache */ 199 /* Init the cache */
185 cache_init(); 200 cache_init();
186 201
202 shm_align_mask = max_t(unsigned long,
203 cpu_data->dcache.way_size - 1,
204 PAGE_SIZE - 1);
205
187 /* Disable the FPU */ 206 /* Disable the FPU */
188 if (fpu_disabled) { 207 if (fpu_disabled) {
189 printk("FPU Disabled\n"); 208 printk("FPU Disabled\n");
diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile
index e3cccea15e1d..1c034c283f59 100644
--- a/arch/sh/kernel/cpu/irq/Makefile
+++ b/arch/sh/kernel/cpu/irq/Makefile
@@ -3,5 +3,6 @@
3# 3#
4obj-y += ipr.o imask.o 4obj-y += ipr.o imask.o
5 5
6obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o 6obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o
7obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o 7obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o
8obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c
index 30064bf6e154..e30e4b7aa70e 100644
--- a/arch/sh/kernel/cpu/irq/intc2.c
+++ b/arch/sh/kernel/cpu/irq/intc2.c
@@ -241,9 +241,9 @@ static struct intc2_init {
241 /* 110-111 reserved/unused */ 241 /* 110-111 reserved/unused */
242#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 242#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
243 { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2}, 243 { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2},
244#ifdef CONFIG_SH_RTC 244 { 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
245 { RTC_IRQ, 4, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY }, 245 { 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
246#endif 246 { 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
247 { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, 247 { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
248 { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, 248 { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
249 { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, 249 { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 0f545941fb4f..f785822cd5de 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -57,31 +57,27 @@ static struct hw_interrupt_type ipr_irq_type = {
57 57
58static void disable_ipr_irq(unsigned int irq) 58static void disable_ipr_irq(unsigned int irq)
59{ 59{
60 unsigned long val, flags; 60 unsigned long val;
61 unsigned int addr = ipr_data[irq].addr; 61 unsigned int addr = ipr_data[irq].addr;
62 unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift); 62 unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift);
63 63
64 /* Set the priority in IPR to 0 */ 64 /* Set the priority in IPR to 0 */
65 local_irq_save(flags);
66 val = ctrl_inw(addr); 65 val = ctrl_inw(addr);
67 val &= mask; 66 val &= mask;
68 ctrl_outw(val, addr); 67 ctrl_outw(val, addr);
69 local_irq_restore(flags);
70} 68}
71 69
72static void enable_ipr_irq(unsigned int irq) 70static void enable_ipr_irq(unsigned int irq)
73{ 71{
74 unsigned long val, flags; 72 unsigned long val;
75 unsigned int addr = ipr_data[irq].addr; 73 unsigned int addr = ipr_data[irq].addr;
76 int priority = ipr_data[irq].priority; 74 int priority = ipr_data[irq].priority;
77 unsigned short value = (priority << ipr_data[irq].shift); 75 unsigned short value = (priority << ipr_data[irq].shift);
78 76
79 /* Set priority in IPR back to original value */ 77 /* Set priority in IPR back to original value */
80 local_irq_save(flags);
81 val = ctrl_inw(addr); 78 val = ctrl_inw(addr);
82 val |= value; 79 val |= value;
83 ctrl_outw(val, addr); 80 ctrl_outw(val, addr);
84 local_irq_restore(flags);
85} 81}
86 82
87static void mask_and_ack_ipr(unsigned int irq) 83static void mask_and_ack_ipr(unsigned int irq)
@@ -89,6 +85,7 @@ static void mask_and_ack_ipr(unsigned int irq)
89 disable_ipr_irq(irq); 85 disable_ipr_irq(irq);
90 86
91#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 87#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
88 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
92 defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) 89 defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
93 /* This is needed when we use edge triggered setting */ 90 /* This is needed when we use edge triggered setting */
94 /* XXX: Is it really needed? */ 91 /* XXX: Is it really needed? */
@@ -123,7 +120,7 @@ void __init init_IRQ(void)
123#ifndef CONFIG_CPU_SUBTYPE_SH7780 120#ifndef CONFIG_CPU_SUBTYPE_SH7780
124 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); 121 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
125 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); 122 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
126#if defined(CONFIG_SH_RTC) 123#ifdef RTC_IRQ
127 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); 124 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
128#endif 125#endif
129 126
@@ -162,6 +159,7 @@ void __init init_IRQ(void)
162#endif 159#endif
163 160
164#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 161#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
162 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
165 defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) 163 defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
166 /* 164 /*
167 * Initialize the Interrupt Controller (INTC) 165 * Initialize the Interrupt Controller (INTC)
@@ -192,6 +190,8 @@ void __init init_IRQ(void)
192 /* Perform the machine specific initialisation */ 190 /* Perform the machine specific initialisation */
193 if (sh_mv.mv_init_irq != NULL) 191 if (sh_mv.mv_init_irq != NULL)
194 sh_mv.mv_init_irq(); 192 sh_mv.mv_init_irq();
193
194 irq_ctx_init(smp_processor_id());
195} 195}
196 196
197#if !defined(CONFIG_CPU_HAS_PINT_IRQ) 197#if !defined(CONFIG_CPU_HAS_PINT_IRQ)
diff --git a/arch/sh/boards/adx/irq_maskreg.c b/arch/sh/kernel/cpu/irq/maskreg.c
index 4b2abe5eb165..492db31b3cab 100644
--- a/arch/sh/boards/adx/irq_maskreg.c
+++ b/arch/sh/kernel/cpu/irq/maskreg.c
@@ -1,30 +1,23 @@
1/* 1/*
2 * linux/arch/sh/kernel/irq_maskreg.c 2 * Interrupt handling for Simple external interrupt mask register
3 * 3 *
4 * Copyright (C) 2001 A&D Co., Ltd. <http://www.aandd.co.jp> 4 * Copyright (C) 2001 A&D Co., Ltd. <http://www.aandd.co.jp>
5 * 5 *
6 * This file may be copied or modified under the terms of the GNU
7 * General Public License. See linux/COPYING for more information.
8 *
9 * Interrupt handling for Simple external interrupt mask register
10 *
11 * This is for the machine which have single 16 bit register 6 * This is for the machine which have single 16 bit register
12 * for masking external IRQ individually. 7 * for masking external IRQ individually.
13 * Each bit of the register is for masking each interrupt. 8 * Each bit of the register is for masking each interrupt.
9 *
10 * This file may be copied or modified under the terms of the GNU
11 * General Public License. See linux/COPYING for more information.
14 */ 12 */
15
16#include <linux/kernel.h> 13#include <linux/kernel.h>
17#include <linux/init.h> 14#include <linux/init.h>
18#include <linux/irq.h> 15#include <linux/irq.h>
19
20#include <asm/system.h> 16#include <asm/system.h>
21#include <asm/io.h> 17#include <asm/io.h>
22#include <asm/machvec.h>
23 18
24/* address of external interrupt mask register 19/* address of external interrupt mask register */
25 * address must be set prior to use these (maybe in init_XXX_irq()) 20unsigned long irq_mask_register;
26 * XXX : is it better to use .config than specifying it in code? */
27unsigned short *irq_mask_register = 0;
28 21
29/* forward declaration */ 22/* forward declaration */
30static unsigned int startup_maskreg_irq(unsigned int irq); 23static unsigned int startup_maskreg_irq(unsigned int irq);
@@ -36,7 +29,7 @@ static void end_maskreg_irq(unsigned int irq);
36 29
37/* hw_interrupt_type */ 30/* hw_interrupt_type */
38static struct hw_interrupt_type maskreg_irq_type = { 31static struct hw_interrupt_type maskreg_irq_type = {
39 .typename = " Mask Register", 32 .typename = "Mask Register",
40 .startup = startup_maskreg_irq, 33 .startup = startup_maskreg_irq,
41 .shutdown = shutdown_maskreg_irq, 34 .shutdown = shutdown_maskreg_irq,
42 .enable = enable_maskreg_irq, 35 .enable = enable_maskreg_irq,
@@ -47,7 +40,7 @@ static struct hw_interrupt_type maskreg_irq_type = {
47 40
48/* actual implementatin */ 41/* actual implementatin */
49static unsigned int startup_maskreg_irq(unsigned int irq) 42static unsigned int startup_maskreg_irq(unsigned int irq)
50{ 43{
51 enable_maskreg_irq(irq); 44 enable_maskreg_irq(irq);
52 return 0; /* never anything pending */ 45 return 0; /* never anything pending */
53} 46}
@@ -59,32 +52,26 @@ static void shutdown_maskreg_irq(unsigned int irq)
59 52
60static void disable_maskreg_irq(unsigned int irq) 53static void disable_maskreg_irq(unsigned int irq)
61{ 54{
62 if (irq_mask_register) { 55 unsigned short val, mask = 0x01 << irq;
63 unsigned long flags; 56
64 unsigned short val, mask = 0x01 << irq; 57 BUG_ON(!irq_mask_register);
65 58
66 /* Set "irq"th bit */ 59 /* Set "irq"th bit */
67 local_irq_save(flags); 60 val = ctrl_inw(irq_mask_register);
68 val = ctrl_inw((unsigned long)irq_mask_register); 61 val |= mask;
69 val |= mask; 62 ctrl_outw(val, irq_mask_register);
70 ctrl_outw(val, (unsigned long)irq_mask_register);
71 local_irq_restore(flags);
72 }
73} 63}
74 64
75static void enable_maskreg_irq(unsigned int irq) 65static void enable_maskreg_irq(unsigned int irq)
76{ 66{
77 if (irq_mask_register) { 67 unsigned short val, mask = ~(0x01 << irq);
78 unsigned long flags; 68
79 unsigned short val, mask = ~(0x01 << irq); 69 BUG_ON(!irq_mask_register);
80 70
81 /* Clear "irq"th bit */ 71 /* Clear "irq"th bit */
82 local_irq_save(flags); 72 val = ctrl_inw(irq_mask_register);
83 val = ctrl_inw((unsigned long)irq_mask_register); 73 val &= mask;
84 val &= mask; 74 ctrl_outw(val, irq_mask_register);
85 ctrl_outw(val, (unsigned long)irq_mask_register);
86 local_irq_restore(flags);
87 }
88} 75}
89 76
90static void mask_and_ack_maskreg(unsigned int irq) 77static void mask_and_ack_maskreg(unsigned int irq)
@@ -101,6 +88,6 @@ static void end_maskreg_irq(unsigned int irq)
101void make_maskreg_irq(unsigned int irq) 88void make_maskreg_irq(unsigned int irq)
102{ 89{
103 disable_irq_nosync(irq); 90 disable_irq_nosync(irq);
104 irq_desc[irq].chip = &maskreg_irq_type; 91 irq_desc[irq].handler = &maskreg_irq_type;
105 disable_maskreg_irq(irq); 92 disable_maskreg_irq(irq);
106} 93}
diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c
index 80cd8108d36a..17f47b373d6e 100644
--- a/arch/sh/kernel/cpu/irq/pint.c
+++ b/arch/sh/kernel/cpu/irq/pint.c
@@ -48,26 +48,22 @@ static struct hw_interrupt_type pint_irq_type = {
48 48
49static void disable_pint_irq(unsigned int irq) 49static void disable_pint_irq(unsigned int irq)
50{ 50{
51 unsigned long val, flags; 51 unsigned long val;
52 52
53 local_irq_save(flags);
54 val = ctrl_inw(INTC_INTER); 53 val = ctrl_inw(INTC_INTER);
55 val &= ~(1 << (irq - PINT_IRQ_BASE)); 54 val &= ~(1 << (irq - PINT_IRQ_BASE));
56 ctrl_outw(val, INTC_INTER); /* disable PINTn */ 55 ctrl_outw(val, INTC_INTER); /* disable PINTn */
57 portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2); 56 portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2);
58 local_irq_restore(flags);
59} 57}
60 58
61static void enable_pint_irq(unsigned int irq) 59static void enable_pint_irq(unsigned int irq)
62{ 60{
63 unsigned long val, flags; 61 unsigned long val;
64 62
65 local_irq_save(flags);
66 val = ctrl_inw(INTC_INTER); 63 val = ctrl_inw(INTC_INTER);
67 val |= 1 << (irq - PINT_IRQ_BASE); 64 val |= 1 << (irq - PINT_IRQ_BASE);
68 ctrl_outw(val, INTC_INTER); /* enable PINTn */ 65 ctrl_outw(val, INTC_INTER); /* enable PINTn */
69 portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2; 66 portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2;
70 local_irq_restore(flags);
71} 67}
72 68
73static void mask_and_ack_pint(unsigned int irq) 69static void mask_and_ack_pint(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/rtc.c b/arch/sh/kernel/cpu/rtc.c
deleted file mode 100644
index 4304cf75cfa2..000000000000
--- a/arch/sh/kernel/cpu/rtc.c
+++ /dev/null
@@ -1,128 +0,0 @@
1/*
2 * linux/arch/sh/kernel/rtc.c -- SH3 / SH4 on-chip RTC support
3 *
4 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
5 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
6 */
7
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/time.h>
12#include <linux/bcd.h>
13#include <asm/io.h>
14#include <asm/rtc.h>
15
16void sh_rtc_gettimeofday(struct timespec *ts)
17{
18 unsigned int sec128, sec, sec2, min, hr, wk, day, mon, yr, yr100, cf_bit;
19 unsigned long flags;
20
21 again:
22 do {
23 local_irq_save(flags);
24 ctrl_outb(0, RCR1); /* Clear CF-bit */
25 sec128 = ctrl_inb(R64CNT);
26 sec = ctrl_inb(RSECCNT);
27 min = ctrl_inb(RMINCNT);
28 hr = ctrl_inb(RHRCNT);
29 wk = ctrl_inb(RWKCNT);
30 day = ctrl_inb(RDAYCNT);
31 mon = ctrl_inb(RMONCNT);
32#if defined(CONFIG_CPU_SH4)
33 yr = ctrl_inw(RYRCNT);
34 yr100 = (yr >> 8);
35 yr &= 0xff;
36#else
37 yr = ctrl_inb(RYRCNT);
38 yr100 = (yr == 0x99) ? 0x19 : 0x20;
39#endif
40 sec2 = ctrl_inb(R64CNT);
41 cf_bit = ctrl_inb(RCR1) & RCR1_CF;
42 local_irq_restore(flags);
43 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
44
45 BCD_TO_BIN(yr100);
46 BCD_TO_BIN(yr);
47 BCD_TO_BIN(mon);
48 BCD_TO_BIN(day);
49 BCD_TO_BIN(hr);
50 BCD_TO_BIN(min);
51 BCD_TO_BIN(sec);
52
53 if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
54 hr > 23 || min > 59 || sec > 59) {
55 printk(KERN_ERR
56 "SH RTC: invalid value, resetting to 1 Jan 2000\n");
57 local_irq_save(flags);
58 ctrl_outb(RCR2_RESET, RCR2); /* Reset & Stop */
59 ctrl_outb(0, RSECCNT);
60 ctrl_outb(0, RMINCNT);
61 ctrl_outb(0, RHRCNT);
62 ctrl_outb(6, RWKCNT);
63 ctrl_outb(1, RDAYCNT);
64 ctrl_outb(1, RMONCNT);
65#if defined(CONFIG_CPU_SH4)
66 ctrl_outw(0x2000, RYRCNT);
67#else
68 ctrl_outb(0, RYRCNT);
69#endif
70 ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start */
71 goto again;
72 }
73
74#if RTC_BIT_INVERTED != 0
75 if ((sec128 & RTC_BIT_INVERTED))
76 sec--;
77#endif
78
79 ts->tv_sec = mktime(yr100 * 100 + yr, mon, day, hr, min, sec);
80 ts->tv_nsec = ((sec128 * 1000000) / 128) * 1000;
81}
82
83/*
84 * Changed to only care about tv_sec, and not the full timespec struct
85 * (i.e. tv_nsec). It can easily be switched to timespec for future cpus
86 * that support setting usec or nsec RTC values.
87 */
88int sh_rtc_settimeofday(const time_t secs)
89{
90 int retval = 0;
91 int real_seconds, real_minutes, cmos_minutes;
92 unsigned long flags;
93
94 local_irq_save(flags);
95 ctrl_outb(RCR2_RESET, RCR2); /* Reset pre-scaler & stop RTC */
96
97 cmos_minutes = ctrl_inb(RMINCNT);
98 BCD_TO_BIN(cmos_minutes);
99
100 /*
101 * since we're only adjusting minutes and seconds,
102 * don't interfere with hour overflow. This avoids
103 * messing with unknown time zones but requires your
104 * RTC not to be off by more than 15 minutes
105 */
106 real_seconds = secs % 60;
107 real_minutes = secs / 60;
108 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
109 real_minutes += 30; /* correct for half hour time zone */
110 real_minutes %= 60;
111
112 if (abs(real_minutes - cmos_minutes) < 30) {
113 BIN_TO_BCD(real_seconds);
114 BIN_TO_BCD(real_minutes);
115 ctrl_outb(real_seconds, RSECCNT);
116 ctrl_outb(real_minutes, RMINCNT);
117 } else {
118 printk(KERN_WARNING
119 "set_rtc_time: can't update from %d to %d\n",
120 cmos_minutes, real_minutes);
121 retval = -1;
122 }
123
124 ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start RTC */
125 local_irq_restore(flags);
126
127 return retval;
128}
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index b54dbb9a0c86..58d3815695ff 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -4,10 +4,21 @@
4 4
5obj-y := ex.o probe.o 5obj-y := ex.o probe.o
6 6
7# CPU subtype setup
8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7300) += setup-sh7300.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o
15
16# Primary on-chip clocks (common)
7clock-$(CONFIG_CPU_SH3) := clock-sh3.o 17clock-$(CONFIG_CPU_SH3) := clock-sh3.o
8clock-$(CONFIG_CPU_SUBTYPE_SH7300) := clock-sh7300.o 18clock-$(CONFIG_CPU_SUBTYPE_SH7300) := clock-sh7300.o
9clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o 19clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o
20clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o
10clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o 21clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
22clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7300.o
11 23
12obj-y += $(clock-y) 24obj-y += $(clock-y)
13
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
new file mode 100644
index 000000000000..0cf96f9833bc
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
@@ -0,0 +1,84 @@
1/*
2 * arch/sh/kernel/cpu/sh3/clock-sh7706.c
3 *
4 * SH7706 support for the clock framework
5 *
6 * Copyright (C) 2006 Takashi YOSHII
7 *
8 * Based on arch/sh/kernel/cpu/sh3/clock-sh7709.c
9 * Copyright (C) 2005 Andriy Skulysh
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <asm/clock.h>
18#include <asm/freq.h>
19#include <asm/io.h>
20
21static int stc_multipliers[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
22static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 };
23static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
24
25static void master_clk_init(struct clk *clk)
26{
27 int frqcr = ctrl_inw(FRQCR);
28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
29
30 clk->rate *= pfc_divisors[idx];
31}
32
33static struct clk_ops sh7706_master_clk_ops = {
34 .init = master_clk_init,
35};
36
37static void module_clk_recalc(struct clk *clk)
38{
39 int frqcr = ctrl_inw(FRQCR);
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
41
42 clk->rate = clk->parent->rate / pfc_divisors[idx];
43}
44
45static struct clk_ops sh7706_module_clk_ops = {
46 .recalc = module_clk_recalc,
47};
48
49static void bus_clk_recalc(struct clk *clk)
50{
51 int frqcr = ctrl_inw(FRQCR);
52 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
53
54 clk->rate = clk->parent->rate / stc_multipliers[idx];
55}
56
57static struct clk_ops sh7706_bus_clk_ops = {
58 .recalc = bus_clk_recalc,
59};
60
61static void cpu_clk_recalc(struct clk *clk)
62{
63 int frqcr = ctrl_inw(FRQCR);
64 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
65
66 clk->rate = clk->parent->rate / ifc_divisors[idx];
67}
68
69static struct clk_ops sh7706_cpu_clk_ops = {
70 .recalc = cpu_clk_recalc,
71};
72
73static struct clk_ops *sh7706_clk_ops[] = {
74 &sh7706_master_clk_ops,
75 &sh7706_module_clk_ops,
76 &sh7706_bus_clk_ops,
77 &sh7706_cpu_clk_ops,
78};
79
80void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
81{
82 if (idx < ARRAY_SIZE(sh7706_clk_ops))
83 *ops = sh7706_clk_ops[idx];
84}
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index cc04e9e239ff..44daf44833f9 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -84,8 +84,12 @@ ENTRY(interrupt_table)
84 .long do_IRQ ! rovi 84 .long do_IRQ ! rovi
85 .long do_IRQ 85 .long do_IRQ
86 .long do_IRQ /* 5E0 */ 86 .long do_IRQ /* 5E0 */
87#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 87#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
88 defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) 88 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
89 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
90 defined(CONFIG_CPU_SUBTYPE_SH7300) || \
91 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
92 defined(CONFIG_CPU_SUBTYPE_SH7710)
89 .long do_IRQ ! 32 IRQ irq0 /* 600 */ 93 .long do_IRQ ! 32 IRQ irq0 /* 600 */
90 .long do_IRQ ! 33 irq1 94 .long do_IRQ ! 33 irq1
91 .long do_IRQ ! 34 irq2 95 .long do_IRQ ! 34 irq2
@@ -147,6 +151,51 @@ ENTRY(interrupt_table)
147 .long do_IRQ ! 62 PCC pcc0i 151 .long do_IRQ ! 62 PCC pcc0i
148 .long do_IRQ ! 63 pcc1i /* 9E0 */ 152 .long do_IRQ ! 63 pcc1i /* 9E0 */
149#endif 153#endif
154#if defined(CONFIG_CPU_SUBTYPE_SH7710)
155 .long exception_none ! 61 /* 9A0 */
156 .long exception_none ! 62
157 .long exception_none ! 63
158 .long exception_none ! 64 /* A00 */
159 .long exception_none ! 65
160 .long exception_none ! 66
161 .long exception_none ! 67
162 .long exception_none ! 68
163 .long exception_none ! 69
164 .long exception_none ! 70
165 .long exception_none ! 71
166 .long exception_none ! 72 /* B00 */
167 .long exception_none ! 73
168 .long exception_none ! 74
169 .long exception_none ! 75
170 .long do_IRQ ! 76 DMAC2 dei4 /* B80 */
171 .long do_IRQ ! 77 DMAC2 dei5
172 .long exception_none ! 78
173 .long do_IRQ ! 79 IPSEC ipseci /* BE0 */
174 .long do_IRQ ! 80 EDMAC eint0 /* C00 */
175 .long do_IRQ ! 81 EDMAC eint1
176 .long do_IRQ ! 82 EDMAC eint2
177 .long exception_none ! 83 /* C60 */
178 .long exception_none ! 84
179 .long exception_none ! 85
180 .long exception_none ! 86
181 .long exception_none ! 87
182 .long exception_none ! 88 /* D00 */
183 .long exception_none ! 89
184 .long exception_none ! 90
185 .long exception_none ! 91
186 .long exception_none ! 92
187 .long exception_none ! 93
188 .long exception_none ! 94
189 .long exception_none ! 95
190 .long do_IRQ ! 96 SIOF eri0 /* E00 */
191 .long do_IRQ ! 97 txi0
192 .long do_IRQ ! 98 rxi0
193 .long do_IRQ ! 99 cci0
194 .long do_IRQ ! 100 eri1 /* E80 */
195 .long do_IRQ ! 101 txi1
196 .long do_IRQ ! 102 rxi2
197 .long do_IRQ ! 103 cci3
198#endif
150#if defined(CONFIG_CPU_SUBTYPE_SH7300) 199#if defined(CONFIG_CPU_SUBTYPE_SH7300)
151 .long do_IRQ ! 64 200 .long do_IRQ ! 64
152 .long do_IRQ ! 65 201 .long do_IRQ ! 65
@@ -195,4 +244,3 @@ ENTRY(interrupt_table)
195 .long do_IRQ ! 108 244 .long do_IRQ ! 108
196#endif 245#endif
197#endif 246#endif
198
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index 5cdc88638601..e67098836290 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -72,6 +72,12 @@ int __init detect_cpu_and_cache_system(void)
72 cpu_data->dcache.sets = 256; 72 cpu_data->dcache.sets = 256;
73 cpu_data->type = CPU_SH7729; 73 cpu_data->type = CPU_SH7729;
74 74
75#if defined(CONFIG_CPU_SUBTYPE_SH7706)
76 cpu_data->type = CPU_SH7706;
77#endif
78#if defined(CONFIG_CPU_SUBTYPE_SH7710)
79 cpu_data->type = CPU_SH7710;
80#endif
75#if defined(CONFIG_CPU_SUBTYPE_SH7705) 81#if defined(CONFIG_CPU_SUBTYPE_SH7705)
76 cpu_data->type = CPU_SH7705; 82 cpu_data->type = CPU_SH7705;
77 83
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7300.c b/arch/sh/kernel/cpu/sh3/setup-sh7300.c
new file mode 100644
index 000000000000..ab4d204bfba5
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7300.c
@@ -0,0 +1,43 @@
1/*
2 * SH7300 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xa4430000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCI,
20 .irqs = { 80, 80, 80, 80 },
21 }, {
22 .flags = 0,
23 }
24};
25
26static struct platform_device sci_device = {
27 .name = "sh-sci",
28 .id = -1,
29 .dev = {
30 .platform_data = sci_platform_data,
31 },
32};
33
34static struct platform_device *sh7300_devices[] __initdata = {
35 &sci_device,
36};
37
38static int __init sh7300_devices_setup(void)
39{
40 return platform_add_devices(sh7300_devices,
41 ARRAY_SIZE(sh7300_devices));
42}
43__initcall(sh7300_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
new file mode 100644
index 000000000000..a8e41c5241fa
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -0,0 +1,48 @@
1/*
2 * SH7705 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xa4400000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF,
20 .irqs = { 52, 53, 55, 54 },
21 }, {
22 .mapbase = 0xa4410000,
23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF,
25 .irqs = { 56, 57, 59, 58 },
26 }, {
27 .flags = 0,
28 }
29};
30
31static struct platform_device sci_device = {
32 .name = "sh-sci",
33 .id = -1,
34 .dev = {
35 .platform_data = sci_platform_data,
36 },
37};
38
39static struct platform_device *sh7705_devices[] __initdata = {
40 &sci_device,
41};
42
43static int __init sh7705_devices_setup(void)
44{
45 return platform_add_devices(sh7705_devices,
46 ARRAY_SIZE(sh7705_devices));
47}
48__initcall(sh7705_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7708.c b/arch/sh/kernel/cpu/sh3/setup-sh7708.c
new file mode 100644
index 000000000000..f933723911ca
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7708.c
@@ -0,0 +1,43 @@
1/*
2 * SH7708 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xfffffe80,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCI,
20 .irqs = { 23, 24, 25, 0 },
21 }, {
22 .flags = 0,
23 }
24};
25
26static struct platform_device sci_device = {
27 .name = "sh-sci",
28 .id = -1,
29 .dev = {
30 .platform_data = sci_platform_data,
31 },
32};
33
34static struct platform_device *sh7708_devices[] __initdata = {
35 &sci_device,
36};
37
38static int __init sh7708_devices_setup(void)
39{
40 return platform_add_devices(sh7708_devices,
41 ARRAY_SIZE(sh7708_devices));
42}
43__initcall(sh7708_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
new file mode 100644
index 000000000000..ff43ef2a1f0c
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
@@ -0,0 +1,53 @@
1/*
2 * SH7707/SH7709 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xfffffe80,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCI,
20 .irqs = { 23, 24, 25, 0 },
21 }, {
22 .mapbase = 0xa4000150,
23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF,
25 .irqs = { 56, 57, 59, 58 },
26 }, {
27 .mapbase = 0xa4000140,
28 .flags = UPF_BOOT_AUTOCONF,
29 .type = PORT_IRDA,
30 .irqs = { 52, 53, 55, 54 },
31 }, {
32 .flags = 0,
33 }
34};
35
36static struct platform_device sci_device = {
37 .name = "sh-sci",
38 .id = -1,
39 .dev = {
40 .platform_data = sci_platform_data,
41 },
42};
43
44static struct platform_device *sh7709_devices[] __initdata = {
45 &sci_device,
46};
47
48static int __init sh7709_devices_setup(void)
49{
50 return platform_add_devices(sh7709_devices,
51 ARRAY_SIZE(sh7709_devices));
52}
53__initcall(sh7709_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
new file mode 100644
index 000000000000..895f99ee6a95
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -0,0 +1,43 @@
1/*
2 * SH7710 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xa4400000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF,
20 .irqs = { 52, 53, 55, 54 },
21 }, {
22 .flags = 0,
23 }
24};
25
26static struct platform_device sci_device = {
27 .name = "sh-sci",
28 .id = -1,
29 .dev = {
30 .platform_data = sci_platform_data,
31 },
32};
33
34static struct platform_device *sh7710_devices[] __initdata = {
35 &sci_device,
36};
37
38static int __init sh7710_devices_setup(void)
39{
40 return platform_add_devices(sh7710_devices,
41 ARRAY_SIZE(sh7710_devices));
42}
43__initcall(sh7710_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 3d5cafc71ae3..8dbf3895ece7 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -7,6 +7,16 @@ obj-y := ex.o probe.o
7obj-$(CONFIG_SH_FPU) += fpu.o 7obj-$(CONFIG_SH_FPU) += fpu.o
8obj-$(CONFIG_SH_STORE_QUEUES) += sq.o 8obj-$(CONFIG_SH_STORE_QUEUES) += sq.o
9 9
10# CPU subtype setup
11obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7751) += setup-sh7750.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7760) += setup-sh7760.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o
15obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
16obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o
17obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
18obj-$(CONFIG_CPU_SUBTYPE_SH4_202) += setup-sh4-202.o
19
10# Primary on-chip clocks (common) 20# Primary on-chip clocks (common)
11clock-$(CONFIG_CPU_SH4) := clock-sh4.o 21clock-$(CONFIG_CPU_SH4) := clock-sh4.o
12clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o 22clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o
diff --git a/arch/sh/kernel/cpu/sh4/ex.S b/arch/sh/kernel/cpu/sh4/ex.S
index 26a27df06505..7146893a6cca 100644
--- a/arch/sh/kernel/cpu/sh4/ex.S
+++ b/arch/sh/kernel/cpu/sh4/ex.S
@@ -72,6 +72,7 @@ ENTRY(interrupt_table)
72 .long do_IRQ ! 1110 72 .long do_IRQ ! 1110
73 .long exception_error 73 .long exception_error
74 ! Internal hardware 74 ! Internal hardware
75#ifndef CONFIG_CPU_SUBTYPE_SH7780
75 .long do_IRQ ! TMU0 tuni0 /* 400 */ 76 .long do_IRQ ! TMU0 tuni0 /* 400 */
76 .long do_IRQ ! TMU1 tuni1 77 .long do_IRQ ! TMU1 tuni1
77 .long do_IRQ ! TMU2 tuni2 78 .long do_IRQ ! TMU2 tuni2
@@ -122,6 +123,13 @@ ENTRY(interrupt_table)
122 .long do_IRQ ! 45 dmte5 123 .long do_IRQ ! 45 dmte5
123 .long do_IRQ ! 46 dmte6 124 .long do_IRQ ! 46 dmte6
124 .long do_IRQ ! 47 dmte7 /* 7E0 */ 125 .long do_IRQ ! 47 dmte7 /* 7E0 */
126#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
127 .long do_IRQ ! 44 IIC1 ali /* 780 */
128 .long do_IRQ ! 45 tacki
129 .long do_IRQ ! 46 waiti
130 .long do_IRQ ! 47 dtei /* 7E0 */
131 .long do_IRQ ! 48 DMAC dei0 /* 800 */
132 .long do_IRQ ! 49 dei1 /* 820 */
125#else 133#else
126 .long exception_error ! 44 /* 780 */ 134 .long exception_error ! 44 /* 780 */
127 .long exception_error ! 45 135 .long exception_error ! 45
@@ -131,7 +139,8 @@ ENTRY(interrupt_table)
131#if defined(CONFIG_SH_FPU) 139#if defined(CONFIG_SH_FPU)
132 .long do_fpu_state_restore ! 48 /* 800 */ 140 .long do_fpu_state_restore ! 48 /* 800 */
133 .long do_fpu_state_restore ! 49 /* 820 */ 141 .long do_fpu_state_restore ! 49 /* 820 */
134#else 142#elif !defined(CONFIG_CPU_SUBTYPE_SH7343) && \
143 !defined(CONFIG_CPU_SUBTYPE_SH73180)
135 .long exception_error 144 .long exception_error
136 .long exception_error 145 .long exception_error
137#endif 146#endif
@@ -224,7 +233,7 @@ ENTRY(interrupt_table)
224 .long exception_error 233 .long exception_error
225 .long do_IRQ ! ADC adi 234 .long do_IRQ ! ADC adi
226 .long do_IRQ ! CMT cmti /* FA0 */ 235 .long do_IRQ ! CMT cmti /* FA0 */
227#elif defined(CONFIG_CPU_SUBTYPE_SH73180) 236#elif defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7343)
228 .long do_IRQ ! 50 0x840 237 .long do_IRQ ! 50 0x840
229 .long do_IRQ ! 51 0x860 238 .long do_IRQ ! 51 0x860
230 .long do_IRQ ! 52 0x880 239 .long do_IRQ ! 52 0x880
@@ -379,5 +388,168 @@ ENTRY(interrupt_table)
379 .long exception_error ! 141 0x13a0 388 .long exception_error ! 141 0x13a0
380 .long exception_error ! 142 0x13c0 389 .long exception_error ! 142 0x13c0
381 .long exception_error ! 143 0x13e0 390 .long exception_error ! 143 0x13e0
391#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
392 .long do_IRQ ! 50 0x840
393 .long do_IRQ ! 51 0x860
394 .long do_IRQ ! 52 0x880
395 .long do_IRQ ! 53 0x8a0
396 .long do_IRQ ! 54 0x8c0
397 .long do_IRQ ! 55 0x8e0
398 .long do_IRQ ! 56 0x900
399 .long do_IRQ ! 57 0x920
400 .long do_IRQ ! 58 0x940
401 .long do_IRQ ! 59 0x960
402 .long do_IRQ ! 60 0x980
403 .long do_IRQ ! 61 0x9a0
404 .long do_IRQ ! 62 0x9c0
405 .long do_IRQ ! 63 0x9e0
406 .long do_IRQ ! 64 0xa00
407 .long do_IRQ ! 65 0xa20
408 .long do_IRQ ! 66 0xa4d
409 .long do_IRQ ! 67 0xa60
410 .long do_IRQ ! 68 0xa80
411 .long do_IRQ ! 69 0xaa0
412 .long do_IRQ ! 70 0xac0
413 .long do_IRQ ! 71 0xae0
414 .long do_IRQ ! 72 0xb00
415 .long do_IRQ ! 73 0xb20
416 .long do_IRQ ! 74 0xb40
417 .long do_IRQ ! 75 0xb60
418 .long do_IRQ ! 76 0xb80
419 .long do_IRQ ! 77 0xba0
420 .long do_IRQ ! 78 0xbc0
421 .long do_IRQ ! 79 0xbe0
422 .long do_IRQ ! 80 0xc00
423 .long do_IRQ ! 81 0xc20
424 .long do_IRQ ! 82 0xc40
425 .long do_IRQ ! 83 0xc60
426 .long do_IRQ ! 84 0xc80
427 .long do_IRQ ! 85 0xca0
428 .long do_IRQ ! 86 0xcc0
429 .long do_IRQ ! 87 0xce0
430 .long do_IRQ ! 88 0xd00
431 .long do_IRQ ! 89 0xd20
432 .long do_IRQ ! 90 0xd40
433 .long do_IRQ ! 91 0xd60
434 .long do_IRQ ! 92 0xd80
435 .long do_IRQ ! 93 0xda0
436 .long do_IRQ ! 94 0xdc0
437 .long do_IRQ ! 95 0xde0
438 .long do_IRQ ! 96 0xe00
439 .long do_IRQ ! 97 0xe20
440 .long do_IRQ ! 98 0xe40
441 .long do_IRQ ! 99 0xe60
442 .long do_IRQ ! 100 0xe80
443 .long do_IRQ ! 101 0xea0
444 .long do_IRQ ! 102 0xec0
445 .long do_IRQ ! 103 0xee0
446 .long do_IRQ ! 104 0xf00
447 .long do_IRQ ! 105 0xf20
448 .long do_IRQ ! 106 0xf40
449 .long do_IRQ ! 107 0xf60
450 .long do_IRQ ! 108 0xf80
451#endif
452#else
453 .long exception_error /* 400 */
454 .long exception_error
455 .long exception_error
456 .long exception_error
457 .long do_IRQ ! RTC ati
458 .long do_IRQ ! pri
459 .long do_IRQ ! cui
460 .long exception_error
461 .long exception_error /* 500 */
462 .long exception_error
463 .long exception_error
464 .long do_IRQ ! WDT iti /* 560 */
465 .long do_IRQ ! TMU-ch0
466 .long do_IRQ ! TMU-ch1
467 .long do_IRQ ! TMU-ch2
468 .long do_IRQ ! ticpi2 /* 5E0 */
469 .long do_IRQ ! 32 Hitachi UDI /* 600 */
470 .long exception_error
471 .long do_IRQ ! 34 DMAC dmte0
472 .long do_IRQ ! 35 dmte1
473 .long do_IRQ ! 36 dmte2
474 .long do_IRQ ! 37 dmte3
475 .long do_IRQ ! 38 dmae
476 .long exception_error ! 39 /* 6E0 */
477 .long do_IRQ ! 40 SCIF-ch0 eri /* 700 */
478 .long do_IRQ ! 41 rxi
479 .long do_IRQ ! 42 bri
480 .long do_IRQ ! 43 txi
481 .long do_IRQ ! 44 DMAC dmte4 /* 780 */
482 .long do_IRQ ! 45 dmte5
483 .long do_IRQ ! 46 dmte6
484 .long do_IRQ ! 47 dmte7 /* 7E0 */
485#if defined(CONFIG_SH_FPU)
486 .long do_fpu_state_restore ! 48 /* 800 */
487 .long do_fpu_state_restore ! 49 /* 820 */
488#else
489 .long exception_error
490 .long exception_error
491#endif
492 .long exception_error /* 840 */
493 .long exception_error
494 .long exception_error
495 .long exception_error
496 .long exception_error
497 .long exception_error
498 .long do_IRQ ! 56 CMT /* 900 */
499 .long exception_error
500 .long exception_error
501 .long exception_error
502 .long do_IRQ ! 60 HAC
503 .long exception_error
504 .long exception_error
505 .long exception_error
506 .long do_IRQ ! PCI serr /* A00 */
507 .long do_IRQ ! INTA
508 .long do_IRQ ! INTB
509 .long do_IRQ ! INTC
510 .long do_IRQ ! INTD
511 .long do_IRQ ! err
512 .long do_IRQ ! pwd3
513 .long do_IRQ ! pwd2
514 .long do_IRQ ! pwd1 /* B00 */
515 .long do_IRQ ! pwd0
516 .long exception_error
517 .long exception_error
518 .long do_IRQ ! SCIF-ch1 eri /* B80 */
519 .long do_IRQ ! rxi
520 .long do_IRQ ! bri
521 .long do_IRQ ! txi
522 .long do_IRQ ! SIOF /* C00 */
523 .long exception_error
524 .long exception_error
525 .long exception_error
526 .long do_IRQ ! HSPI /* C80 */
527 .long exception_error
528 .long exception_error
529 .long exception_error
530 .long do_IRQ ! MMCIF fatat /* D00 */
531 .long do_IRQ ! tran
532 .long do_IRQ ! err
533 .long do_IRQ ! frdy
534 .long do_IRQ ! DMAC dmint8 /* D80 */
535 .long do_IRQ ! dmint9
536 .long do_IRQ ! dmint10
537 .long do_IRQ ! dmint11
538 .long do_IRQ ! TMU-ch3 /* E00 */
539 .long do_IRQ ! TMU-ch4
540 .long do_IRQ ! TMU-ch5
541 .long exception_error
542 .long do_IRQ ! SSI
543 .long exception_error
544 .long exception_error
545 .long exception_error
546 .long do_IRQ ! FLCTL flste /* F00 */
547 .long do_IRQ ! fltend
548 .long do_IRQ ! fltrq0
549 .long do_IRQ ! fltrq1
550 .long do_IRQ ! GPIO gpioi0 /* F80 */
551 .long do_IRQ ! gpioi1
552 .long do_IRQ ! gpioi2
553 .long do_IRQ ! gpioi3
382#endif 554#endif
383 555
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 42427b79697b..c294de1e14a3 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * CPU Subtype Probing for SH-4. 4 * CPU Subtype Probing for SH-4.
5 * 5 *
6 * Copyright (C) 2001, 2002, 2003, 2004 Paul Mundt 6 * Copyright (C) 2001 - 2006 Paul Mundt
7 * Copyright (C) 2003 Richard Curnow 7 * Copyright (C) 2003 Richard Curnow
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
@@ -29,7 +29,7 @@ int __init detect_cpu_and_cache_system(void)
29 [9] = (1 << 16) 29 [9] = (1 << 16)
30 }; 30 };
31 31
32 pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffff; 32 pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffffff;
33 prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff; 33 prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff;
34 cvr = (ctrl_inl(CCN_CVR)); 34 cvr = (ctrl_inl(CCN_CVR));
35 35
@@ -38,7 +38,6 @@ int __init detect_cpu_and_cache_system(void)
38 */ 38 */
39 cpu_data->icache.way_incr = (1 << 13); 39 cpu_data->icache.way_incr = (1 << 13);
40 cpu_data->icache.entry_shift = 5; 40 cpu_data->icache.entry_shift = 5;
41 cpu_data->icache.entry_mask = 0x1fe0;
42 cpu_data->icache.sets = 256; 41 cpu_data->icache.sets = 256;
43 cpu_data->icache.ways = 1; 42 cpu_data->icache.ways = 1;
44 cpu_data->icache.linesz = L1_CACHE_BYTES; 43 cpu_data->icache.linesz = L1_CACHE_BYTES;
@@ -48,13 +47,29 @@ int __init detect_cpu_and_cache_system(void)
48 */ 47 */
49 cpu_data->dcache.way_incr = (1 << 14); 48 cpu_data->dcache.way_incr = (1 << 14);
50 cpu_data->dcache.entry_shift = 5; 49 cpu_data->dcache.entry_shift = 5;
51 cpu_data->dcache.entry_mask = 0x3fe0;
52 cpu_data->dcache.sets = 512; 50 cpu_data->dcache.sets = 512;
53 cpu_data->dcache.ways = 1; 51 cpu_data->dcache.ways = 1;
54 cpu_data->dcache.linesz = L1_CACHE_BYTES; 52 cpu_data->dcache.linesz = L1_CACHE_BYTES;
55 53
56 /* Set the FPU flag, virtually all SH-4's have one */ 54 /*
57 cpu_data->flags |= CPU_HAS_FPU; 55 * Setup some generic flags we can probe
56 * (L2 and DSP detection only work on SH-4A)
57 */
58 if (((pvr >> 16) & 0xff) == 0x10) {
59 if ((cvr & 0x02000000) == 0)
60 cpu_data->flags |= CPU_HAS_L2_CACHE;
61 if ((cvr & 0x10000000) == 0)
62 cpu_data->flags |= CPU_HAS_DSP;
63
64 cpu_data->flags |= CPU_HAS_LLSC;
65 }
66
67 /* FPU detection works for everyone */
68 if ((cvr & 0x20000000) == 1)
69 cpu_data->flags |= CPU_HAS_FPU;
70
71 /* Mask off the upper chip ID */
72 pvr &= 0xffff;
58 73
59 /* 74 /*
60 * Probe the underlying processor version/revision and 75 * Probe the underlying processor version/revision and
@@ -63,56 +78,101 @@ int __init detect_cpu_and_cache_system(void)
63 switch (pvr) { 78 switch (pvr) {
64 case 0x205: 79 case 0x205:
65 cpu_data->type = CPU_SH7750; 80 cpu_data->type = CPU_SH7750;
66 cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_PERF_COUNTER; 81 cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
82 CPU_HAS_PERF_COUNTER | CPU_HAS_PTEA;
67 break; 83 break;
68 case 0x206: 84 case 0x206:
69 cpu_data->type = CPU_SH7750S; 85 cpu_data->type = CPU_SH7750S;
70 cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_PERF_COUNTER; 86 cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
87 CPU_HAS_PERF_COUNTER | CPU_HAS_PTEA;
71 break; 88 break;
72 case 0x1100: 89 case 0x1100:
73 cpu_data->type = CPU_SH7751; 90 cpu_data->type = CPU_SH7751;
91 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
74 break; 92 break;
75 case 0x2000: 93 case 0x2000:
76 cpu_data->type = CPU_SH73180; 94 cpu_data->type = CPU_SH73180;
77 cpu_data->icache.ways = 4; 95 cpu_data->icache.ways = 4;
78 cpu_data->dcache.ways = 4; 96 cpu_data->dcache.ways = 4;
79 cpu_data->flags &= ~CPU_HAS_FPU; 97 cpu_data->flags |= CPU_HAS_LLSC;
98 break;
99 case 0x2001:
100 case 0x2004:
101 cpu_data->type = CPU_SH7770;
102 cpu_data->icache.ways = 4;
103 cpu_data->dcache.ways = 4;
104
105 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_LLSC;
106 break;
107 case 0x2006:
108 case 0x200A:
109 if (prr == 0x61)
110 cpu_data->type = CPU_SH7781;
111 else
112 cpu_data->type = CPU_SH7780;
113
114 cpu_data->icache.ways = 4;
115 cpu_data->dcache.ways = 4;
116
117 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
118 CPU_HAS_LLSC;
119 break;
120 case 0x3000:
121 case 0x3003:
122 cpu_data->type = CPU_SH7343;
123 cpu_data->icache.ways = 4;
124 cpu_data->dcache.ways = 4;
125 cpu_data->flags |= CPU_HAS_LLSC;
80 break; 126 break;
81 case 0x8000: 127 case 0x8000:
82 cpu_data->type = CPU_ST40RA; 128 cpu_data->type = CPU_ST40RA;
129 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
83 break; 130 break;
84 case 0x8100: 131 case 0x8100:
85 cpu_data->type = CPU_ST40GX1; 132 cpu_data->type = CPU_ST40GX1;
133 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
86 break; 134 break;
87 case 0x700: 135 case 0x700:
88 cpu_data->type = CPU_SH4_501; 136 cpu_data->type = CPU_SH4_501;
89 cpu_data->icache.ways = 2; 137 cpu_data->icache.ways = 2;
90 cpu_data->dcache.ways = 2; 138 cpu_data->dcache.ways = 2;
91 139 cpu_data->flags |= CPU_HAS_PTEA;
92 /* No FPU on the SH4-500 series.. */
93 cpu_data->flags &= ~CPU_HAS_FPU;
94 break; 140 break;
95 case 0x600: 141 case 0x600:
96 cpu_data->type = CPU_SH4_202; 142 cpu_data->type = CPU_SH4_202;
97 cpu_data->icache.ways = 2; 143 cpu_data->icache.ways = 2;
98 cpu_data->dcache.ways = 2; 144 cpu_data->dcache.ways = 2;
145 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
99 break; 146 break;
100 case 0x500 ... 0x501: 147 case 0x500 ... 0x501:
101 switch (prr) { 148 switch (prr) {
102 case 0x10: cpu_data->type = CPU_SH7750R; break; 149 case 0x10:
103 case 0x11: cpu_data->type = CPU_SH7751R; break; 150 cpu_data->type = CPU_SH7750R;
104 case 0x50: cpu_data->type = CPU_SH7760; break; 151 break;
152 case 0x11:
153 cpu_data->type = CPU_SH7751R;
154 break;
155 case 0x50 ... 0x5f:
156 cpu_data->type = CPU_SH7760;
157 break;
105 } 158 }
106 159
107 cpu_data->icache.ways = 2; 160 cpu_data->icache.ways = 2;
108 cpu_data->dcache.ways = 2; 161 cpu_data->dcache.ways = 2;
109 162
163 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
164
110 break; 165 break;
111 default: 166 default:
112 cpu_data->type = CPU_SH_NONE; 167 cpu_data->type = CPU_SH_NONE;
113 break; 168 break;
114 } 169 }
115 170
171#ifdef CONFIG_SH_DIRECT_MAPPED
172 cpu_data->icache.ways = 1;
173 cpu_data->dcache.ways = 1;
174#endif
175
116 /* 176 /*
117 * On anything that's not a direct-mapped cache, look to the CVR 177 * On anything that's not a direct-mapped cache, look to the CVR
118 * for I/D-cache specifics. 178 * for I/D-cache specifics.
@@ -121,18 +181,56 @@ int __init detect_cpu_and_cache_system(void)
121 size = sizes[(cvr >> 20) & 0xf]; 181 size = sizes[(cvr >> 20) & 0xf];
122 cpu_data->icache.way_incr = (size >> 1); 182 cpu_data->icache.way_incr = (size >> 1);
123 cpu_data->icache.sets = (size >> 6); 183 cpu_data->icache.sets = (size >> 6);
124 cpu_data->icache.entry_mask = 184
125 (cpu_data->icache.way_incr - (1 << 5));
126 } 185 }
127 186
187 /* Setup the rest of the I-cache info */
188 cpu_data->icache.entry_mask = cpu_data->icache.way_incr -
189 cpu_data->icache.linesz;
190
191 cpu_data->icache.way_size = cpu_data->icache.sets *
192 cpu_data->icache.linesz;
193
194 /* And the rest of the D-cache */
128 if (cpu_data->dcache.ways > 1) { 195 if (cpu_data->dcache.ways > 1) {
129 size = sizes[(cvr >> 16) & 0xf]; 196 size = sizes[(cvr >> 16) & 0xf];
130 cpu_data->dcache.way_incr = (size >> 1); 197 cpu_data->dcache.way_incr = (size >> 1);
131 cpu_data->dcache.sets = (size >> 6); 198 cpu_data->dcache.sets = (size >> 6);
132 cpu_data->dcache.entry_mask = 199 }
133 (cpu_data->dcache.way_incr - (1 << 5)); 200
201 cpu_data->dcache.entry_mask = cpu_data->dcache.way_incr -
202 cpu_data->dcache.linesz;
203
204 cpu_data->dcache.way_size = cpu_data->dcache.sets *
205 cpu_data->dcache.linesz;
206
207 /*
208 * Setup the L2 cache desc
209 *
210 * SH-4A's have an optional PIPT L2.
211 */
212 if (cpu_data->flags & CPU_HAS_L2_CACHE) {
213 /*
214 * Size calculation is much more sensible
215 * than it is for the L1.
216 *
217 * Sizes are 128KB, 258KB, 512KB, and 1MB.
218 */
219 size = (cvr & 0xf) << 17;
220
221 BUG_ON(!size);
222
223 cpu_data->scache.way_incr = (1 << 16);
224 cpu_data->scache.entry_shift = 5;
225 cpu_data->scache.ways = 4;
226 cpu_data->scache.linesz = L1_CACHE_BYTES;
227 cpu_data->scache.entry_mask =
228 (cpu_data->scache.way_incr - cpu_data->scache.linesz);
229 cpu_data->scache.sets = size /
230 (cpu_data->scache.linesz * cpu_data->scache.ways);
231 cpu_data->scache.way_size =
232 (cpu_data->scache.sets * cpu_data->scache.linesz);
134 } 233 }
135 234
136 return 0; 235 return 0;
137} 236}
138
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
new file mode 100644
index 000000000000..6e4e96541358
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -0,0 +1,43 @@
1/*
2 * SH4-202 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xffe80000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF,
20 .irqs = { 40, 41, 43, 42 },
21 }, {
22 .flags = 0,
23 }
24};
25
26static struct platform_device sci_device = {
27 .name = "sh-sci",
28 .id = -1,
29 .dev = {
30 .platform_data = sci_platform_data,
31 },
32};
33
34static struct platform_device *sh4202_devices[] __initdata = {
35 &sci_device,
36};
37
38static int __init sh4202_devices_setup(void)
39{
40 return platform_add_devices(sh4202_devices,
41 ARRAY_SIZE(sh4202_devices));
42}
43__initcall(sh4202_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh73180.c b/arch/sh/kernel/cpu/sh4/setup-sh73180.c
new file mode 100644
index 000000000000..cc9ea1e2e5df
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/setup-sh73180.c
@@ -0,0 +1,43 @@
1/*
2 * SH73180 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xffe80000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF,
20 .irqs = { 80, 81, 83, 82 },
21 }, {
22 .flags = 0,
23 }
24};
25
26static struct platform_device sci_device = {
27 .name = "sh-sci",
28 .id = -1,
29 .dev = {
30 .platform_data = sci_platform_data,
31 },
32};
33
34static struct platform_device *sh73180_devices[] __initdata = {
35 &sci_device,
36};
37
38static int __init sh73180_devices_setup(void)
39{
40 return platform_add_devices(sh73180_devices,
41 ARRAY_SIZE(sh73180_devices));
42}
43__initcall(sh73180_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7343.c b/arch/sh/kernel/cpu/sh4/setup-sh7343.c
new file mode 100644
index 000000000000..91d61cf91ba1
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7343.c
@@ -0,0 +1,43 @@
1/*
2 * SH7343 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xffe00000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF,
20 .irqs = { 80, 81, 83, 82 },
21 }, {
22 .flags = 0,
23 }
24};
25
26static struct platform_device sci_device = {
27 .name = "sh-sci",
28 .id = -1,
29 .dev = {
30 .platform_data = sci_platform_data,
31 },
32};
33
34static struct platform_device *sh7343_devices[] __initdata = {
35 &sci_device,
36};
37
38static int __init sh7343_devices_setup(void)
39{
40 return platform_add_devices(sh7343_devices,
41 ARRAY_SIZE(sh7343_devices));
42}
43__initcall(sh7343_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
new file mode 100644
index 000000000000..50812d57c1c1
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -0,0 +1,48 @@
1/*
2 * SH7750/SH7751 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xffe00000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCI,
20 .irqs = { 23, 24, 25, 0 },
21 }, {
22 .mapbase = 0xffe80000,
23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF,
25 .irqs = { 40, 41, 43, 42 },
26 }, {
27 .flags = 0,
28 }
29};
30
31static struct platform_device sci_device = {
32 .name = "sh-sci",
33 .id = -1,
34 .dev = {
35 .platform_data = sci_platform_data,
36 },
37};
38
39static struct platform_device *sh7750_devices[] __initdata = {
40 &sci_device,
41};
42
43static int __init sh7750_devices_setup(void)
44{
45 return platform_add_devices(sh7750_devices,
46 ARRAY_SIZE(sh7750_devices));
47}
48__initcall(sh7750_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
new file mode 100644
index 000000000000..97f1c9af35d6
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -0,0 +1,53 @@
1/*
2 * SH7760 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xfe600000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF,
20 .irqs = { 52, 53, 55, 54 },
21 }, {
22 .mapbase = 0xfe610000,
23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF,
25 .irqs = { 72, 73, 75, 74 },
26 }, {
27 .mapbase = 0xfe620000,
28 .flags = UPF_BOOT_AUTOCONF,
29 .type = PORT_SCIF,
30 .irqs = { 76, 77, 79, 78 },
31 }, {
32 .flags = 0,
33 }
34};
35
36static struct platform_device sci_device = {
37 .name = "sh-sci",
38 .id = -1,
39 .dev = {
40 .platform_data = sci_platform_data,
41 },
42};
43
44static struct platform_device *sh7760_devices[] __initdata = {
45 &sci_device,
46};
47
48static int __init sh7760_devices_setup(void)
49{
50 return platform_add_devices(sh7760_devices,
51 ARRAY_SIZE(sh7760_devices));
52}
53__initcall(sh7760_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7770.c b/arch/sh/kernel/cpu/sh4/setup-sh7770.c
new file mode 100644
index 000000000000..6a04cc5f5aca
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7770.c
@@ -0,0 +1,53 @@
1/*
2 * SH7770 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xff923000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF,
20 .irqs = { 61, 61, 61, 61 },
21 }, {
22 .mapbase = 0xff924000,
23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF,
25 .irqs = { 62, 62, 62, 62 },
26 }, {
27 .mapbase = 0xff925000,
28 .flags = UPF_BOOT_AUTOCONF,
29 .type = PORT_SCIF,
30 .irqs = { 63, 63, 63, 63 },
31 }, {
32 .flags = 0,
33 }
34};
35
36static struct platform_device sci_device = {
37 .name = "sh-sci",
38 .id = -1,
39 .dev = {
40 .platform_data = sci_platform_data,
41 },
42};
43
44static struct platform_device *sh7770_devices[] __initdata = {
45 &sci_device,
46};
47
48static int __init sh7770_devices_setup(void)
49{
50 return platform_add_devices(sh7770_devices,
51 ARRAY_SIZE(sh7770_devices));
52}
53__initcall(sh7770_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7780.c b/arch/sh/kernel/cpu/sh4/setup-sh7780.c
new file mode 100644
index 000000000000..72493f259edc
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7780.c
@@ -0,0 +1,79 @@
1/*
2 * SH7780 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct resource rtc_resources[] = {
16 [0] = {
17 .start = 0xffe80000,
18 .end = 0xffe80000 + 0x58 - 1,
19 .flags = IORESOURCE_IO,
20 },
21 [1] = {
22 /* Period IRQ */
23 .start = 21,
24 .flags = IORESOURCE_IRQ,
25 },
26 [2] = {
27 /* Carry IRQ */
28 .start = 22,
29 .flags = IORESOURCE_IRQ,
30 },
31 [3] = {
32 /* Alarm IRQ */
33 .start = 23,
34 .flags = IORESOURCE_IRQ,
35 },
36};
37
38static struct platform_device rtc_device = {
39 .name = "sh-rtc",
40 .id = -1,
41 .num_resources = ARRAY_SIZE(rtc_resources),
42 .resource = rtc_resources,
43};
44
45static struct plat_sci_port sci_platform_data[] = {
46 {
47 .mapbase = 0xffe00000,
48 .flags = UPF_BOOT_AUTOCONF,
49 .type = PORT_SCIF,
50 .irqs = { 40, 41, 43, 42 },
51 }, {
52 .mapbase = 0xffe10000,
53 .flags = UPF_BOOT_AUTOCONF,
54 .type = PORT_SCIF,
55 .irqs = { 76, 77, 79, 78 },
56 }, {
57 .flags = 0,
58 }
59};
60
61static struct platform_device sci_device = {
62 .name = "sh-sci",
63 .id = -1,
64 .dev = {
65 .platform_data = sci_platform_data,
66 },
67};
68
69static struct platform_device *sh7780_devices[] __initdata = {
70 &rtc_device,
71 &sci_device,
72};
73
74static int __init sh7780_devices_setup(void)
75{
76 return platform_add_devices(sh7780_devices,
77 ARRAY_SIZE(sh7780_devices));
78}
79__initcall(sh7780_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index b09805f3ee23..7bcc73f9b8df 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -1,49 +1,52 @@
1/* 1/*
2 * arch/sh/kernel/cpu/sq.c 2 * arch/sh/kernel/cpu/sh4/sq.c
3 * 3 *
4 * General management API for SH-4 integrated Store Queues 4 * General management API for SH-4 integrated Store Queues
5 * 5 *
6 * Copyright (C) 2001, 2002, 2003, 2004 Paul Mundt 6 * Copyright (C) 2001 - 2006 Paul Mundt
7 * Copyright (C) 2001, 2002 M. R. Brown 7 * Copyright (C) 2001, 2002 M. R. Brown
8 * 8 *
9 * Some of this code has been adopted directly from the old arch/sh/mm/sq.c
10 * hack that was part of the LinuxDC project. For all intents and purposes,
11 * this is a completely new interface that really doesn't have much in common
12 * with the old zone-based approach at all. In fact, it's only listed here for
13 * general completeness.
14 *
15 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file "COPYING" in the main directory of this archive 10 * License. See the file "COPYING" in the main directory of this archive
17 * for more details. 11 * for more details.
18 */ 12 */
19#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/cpu.h>
15#include <linux/bitmap.h>
16#include <linux/sysdev.h>
20#include <linux/kernel.h> 17#include <linux/kernel.h>
21#include <linux/module.h> 18#include <linux/module.h>
22#include <linux/slab.h> 19#include <linux/slab.h>
23#include <linux/list.h>
24#include <linux/proc_fs.h>
25#include <linux/miscdevice.h>
26#include <linux/vmalloc.h> 20#include <linux/vmalloc.h>
27 21#include <linux/mm.h>
28#include <asm/io.h> 22#include <asm/io.h>
29#include <asm/page.h> 23#include <asm/page.h>
30#include <asm/mmu_context.h> 24#include <asm/cacheflush.h>
31#include <asm/cpu/sq.h> 25#include <asm/cpu/sq.h>
32 26
33static LIST_HEAD(sq_mapping_list); 27struct sq_mapping;
28
29struct sq_mapping {
30 const char *name;
31
32 unsigned long sq_addr;
33 unsigned long addr;
34 unsigned int size;
35
36 struct sq_mapping *next;
37};
38
39static struct sq_mapping *sq_mapping_list;
34static DEFINE_SPINLOCK(sq_mapping_lock); 40static DEFINE_SPINLOCK(sq_mapping_lock);
41static kmem_cache_t *sq_cache;
42static unsigned long *sq_bitmap;
35 43
36/** 44#define store_queue_barrier() \
37 * sq_flush - Flush (prefetch) the store queue cache 45do { \
38 * @addr: the store queue address to flush 46 (void)ctrl_inl(P4SEG_STORE_QUE); \
39 * 47 ctrl_outl(0, P4SEG_STORE_QUE + 0); \
40 * Executes a prefetch instruction on the specified store queue cache, 48 ctrl_outl(0, P4SEG_STORE_QUE + 8); \
41 * so that the cached data is written to physical memory. 49} while (0);
42 */
43inline void sq_flush(void *addr)
44{
45 __asm__ __volatile__ ("pref @%0" : : "r" (addr) : "memory");
46}
47 50
48/** 51/**
49 * sq_flush_range - Flush (prefetch) a specific SQ range 52 * sq_flush_range - Flush (prefetch) a specific SQ range
@@ -56,152 +59,73 @@ inline void sq_flush(void *addr)
56void sq_flush_range(unsigned long start, unsigned int len) 59void sq_flush_range(unsigned long start, unsigned int len)
57{ 60{
58 volatile unsigned long *sq = (unsigned long *)start; 61 volatile unsigned long *sq = (unsigned long *)start;
59 unsigned long dummy;
60 62
61 /* Flush the queues */ 63 /* Flush the queues */
62 for (len >>= 5; len--; sq += 8) 64 for (len >>= 5; len--; sq += 8)
63 sq_flush((void *)sq); 65 prefetchw((void *)sq);
64 66
65 /* Wait for completion */ 67 /* Wait for completion */
66 dummy = ctrl_inl(P4SEG_STORE_QUE); 68 store_queue_barrier();
67
68 ctrl_outl(0, P4SEG_STORE_QUE + 0);
69 ctrl_outl(0, P4SEG_STORE_QUE + 8);
70} 69}
71 70
72static struct sq_mapping *__sq_alloc_mapping(unsigned long virt, unsigned long phys, unsigned long size, const char *name) 71static inline void sq_mapping_list_add(struct sq_mapping *map)
73{ 72{
74 struct sq_mapping *map; 73 struct sq_mapping **p, *tmp;
75
76 if (virt + size > SQ_ADDRMAX)
77 return ERR_PTR(-ENOSPC);
78
79 map = kmalloc(sizeof(struct sq_mapping), GFP_KERNEL);
80 if (!map)
81 return ERR_PTR(-ENOMEM);
82 74
83 INIT_LIST_HEAD(&map->list); 75 spin_lock_irq(&sq_mapping_lock);
84 76
85 map->sq_addr = virt; 77 p = &sq_mapping_list;
86 map->addr = phys; 78 while ((tmp = *p) != NULL)
87 map->size = size + 1; 79 p = &tmp->next;
88 map->name = name;
89 80
90 list_add(&map->list, &sq_mapping_list); 81 map->next = tmp;
82 *p = map;
91 83
92 return map; 84 spin_unlock_irq(&sq_mapping_lock);
93} 85}
94 86
95static unsigned long __sq_get_next_addr(void) 87static inline void sq_mapping_list_del(struct sq_mapping *map)
96{ 88{
97 if (!list_empty(&sq_mapping_list)) { 89 struct sq_mapping **p, *tmp;
98 struct list_head *pos, *tmp; 90
99 91 spin_lock_irq(&sq_mapping_lock);
100 /* 92
101 * Read one off the list head, as it will have the highest 93 for (p = &sq_mapping_list; (tmp = *p); p = &tmp->next)
102 * mapped allocation. Set the next one up right above it. 94 if (tmp == map) {
103 * 95 *p = tmp->next;
104 * This is somewhat sub-optimal, as we don't look at 96 break;
105 * gaps between allocations or anything lower then the
106 * highest-level allocation.
107 *
108 * However, in the interest of performance and the general
109 * lack of desire to do constant list rebalancing, we don't
110 * worry about it.
111 */
112 list_for_each_safe(pos, tmp, &sq_mapping_list) {
113 struct sq_mapping *entry;
114
115 entry = list_entry(pos, typeof(*entry), list);
116
117 return entry->sq_addr + entry->size;
118 } 97 }
119 }
120 98
121 return P4SEG_STORE_QUE; 99 spin_unlock_irq(&sq_mapping_lock);
122} 100}
123 101
124/** 102static int __sq_remap(struct sq_mapping *map, unsigned long flags)
125 * __sq_remap - Perform a translation from the SQ to a phys addr
126 * @map: sq mapping containing phys and store queue addresses.
127 *
128 * Maps the store queue address specified in the mapping to the physical
129 * address specified in the mapping.
130 */
131static struct sq_mapping *__sq_remap(struct sq_mapping *map)
132{ 103{
133 unsigned long flags, pteh, ptel; 104#if defined(CONFIG_MMU)
134 struct vm_struct *vma; 105 struct vm_struct *vma;
135 pgprot_t pgprot;
136
137 /*
138 * Without an MMU (or with it turned off), this is much more
139 * straightforward, as we can just load up each queue's QACR with
140 * the physical address appropriately masked.
141 */
142
143 ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
144 ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
145 106
146#ifdef CONFIG_MMU
147 /*
148 * With an MMU on the other hand, things are slightly more involved.
149 * Namely, we have to have a direct mapping between the SQ addr and
150 * the associated physical address in the UTLB by way of setting up
151 * a virt<->phys translation by hand. We do this by simply specifying
152 * the SQ addr in UTLB.VPN and the associated physical address in
153 * UTLB.PPN.
154 *
155 * Notably, even though this is a special case translation, and some
156 * of the configuration bits are meaningless, we're still required
157 * to have a valid ASID context in PTEH.
158 *
159 * We could also probably get by without explicitly setting PTEA, but
160 * we do it here just for good measure.
161 */
162 spin_lock_irqsave(&sq_mapping_lock, flags);
163
164 pteh = map->sq_addr;
165 ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH);
166
167 ptel = map->addr & PAGE_MASK;
168 ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA);
169
170 pgprot = pgprot_noncached(PAGE_KERNEL);
171
172 ptel &= _PAGE_FLAGS_HARDWARE_MASK;
173 ptel |= pgprot_val(pgprot);
174 ctrl_outl(ptel, MMU_PTEL);
175
176 __asm__ __volatile__ ("ldtlb" : : : "memory");
177
178 spin_unlock_irqrestore(&sq_mapping_lock, flags);
179
180 /*
181 * Next, we need to map ourselves in the kernel page table, so that
182 * future accesses after a TLB flush will be handled when we take a
183 * page fault.
184 *
185 * Theoretically we could just do this directly and not worry about
186 * setting up the translation by hand ahead of time, but for the
187 * cases where we want a one-shot SQ mapping followed by a quick
188 * writeout before we hit the TLB flush, we do it anyways. This way
189 * we at least save ourselves the initial page fault overhead.
190 */
191 vma = __get_vm_area(map->size, VM_ALLOC, map->sq_addr, SQ_ADDRMAX); 107 vma = __get_vm_area(map->size, VM_ALLOC, map->sq_addr, SQ_ADDRMAX);
192 if (!vma) 108 if (!vma)
193 return ERR_PTR(-ENOMEM); 109 return -ENOMEM;
194 110
195 vma->phys_addr = map->addr; 111 vma->phys_addr = map->addr;
196 112
197 if (remap_area_pages((unsigned long)vma->addr, vma->phys_addr, 113 if (remap_area_pages((unsigned long)vma->addr, vma->phys_addr,
198 map->size, pgprot_val(pgprot))) { 114 map->size, flags)) {
199 vunmap(vma->addr); 115 vunmap(vma->addr);
200 return NULL; 116 return -EAGAIN;
201 } 117 }
202#endif /* CONFIG_MMU */ 118#else
119 /*
120 * Without an MMU (or with it turned off), this is much more
121 * straightforward, as we can just load up each queue's QACR with
122 * the physical address appropriately masked.
123 */
124 ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
125 ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
126#endif
203 127
204 return map; 128 return 0;
205} 129}
206 130
207/** 131/**
@@ -209,42 +133,65 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map)
209 * @phys: Physical address of mapping. 133 * @phys: Physical address of mapping.
210 * @size: Length of mapping. 134 * @size: Length of mapping.
211 * @name: User invoking mapping. 135 * @name: User invoking mapping.
136 * @flags: Protection flags.
212 * 137 *
213 * Remaps the physical address @phys through the next available store queue 138 * Remaps the physical address @phys through the next available store queue
214 * address of @size length. @name is logged at boot time as well as through 139 * address of @size length. @name is logged at boot time as well as through
215 * the procfs interface. 140 * the sysfs interface.
216 *
217 * A pre-allocated and filled sq_mapping pointer is returned, and must be
218 * cleaned up with a call to sq_unmap() when the user is done with the
219 * mapping.
220 */ 141 */
221struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name) 142unsigned long sq_remap(unsigned long phys, unsigned int size,
143 const char *name, unsigned long flags)
222{ 144{
223 struct sq_mapping *map; 145 struct sq_mapping *map;
224 unsigned long virt, end; 146 unsigned long end;
225 unsigned int psz; 147 unsigned int psz;
148 int ret, page;
226 149
227 /* Don't allow wraparound or zero size */ 150 /* Don't allow wraparound or zero size */
228 end = phys + size - 1; 151 end = phys + size - 1;
229 if (!size || end < phys) 152 if (unlikely(!size || end < phys))
230 return NULL; 153 return -EINVAL;
231 /* Don't allow anyone to remap normal memory.. */ 154 /* Don't allow anyone to remap normal memory.. */
232 if (phys < virt_to_phys(high_memory)) 155 if (unlikely(phys < virt_to_phys(high_memory)))
233 return NULL; 156 return -EINVAL;
234 157
235 phys &= PAGE_MASK; 158 phys &= PAGE_MASK;
159 size = PAGE_ALIGN(end + 1) - phys;
160
161 map = kmem_cache_alloc(sq_cache, GFP_KERNEL);
162 if (unlikely(!map))
163 return -ENOMEM;
164
165 map->addr = phys;
166 map->size = size;
167 map->name = name;
168
169 page = bitmap_find_free_region(sq_bitmap, 0x04000000,
170 get_order(map->size));
171 if (unlikely(page < 0)) {
172 ret = -ENOSPC;
173 goto out;
174 }
175
176 map->sq_addr = P4SEG_STORE_QUE + (page << PAGE_SHIFT);
177
178 ret = __sq_remap(map, flags);
179 if (unlikely(ret != 0))
180 goto out;
181
182 psz = (size + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
183 pr_info("sqremap: %15s [%4d page%s] va 0x%08lx pa 0x%08lx\n",
184 likely(map->name) ? map->name : "???",
185 psz, psz == 1 ? " " : "s",
186 map->sq_addr, map->addr);
236 187
237 size = PAGE_ALIGN(end + 1) - phys; 188 sq_mapping_list_add(map);
238 virt = __sq_get_next_addr();
239 psz = (size + (PAGE_SIZE - 1)) / PAGE_SIZE;
240 map = __sq_alloc_mapping(virt, phys, size, name);
241 189
242 printk("sqremap: %15s [%4d page%s] va 0x%08lx pa 0x%08lx\n", 190 return map->sq_addr;
243 map->name ? map->name : "???",
244 psz, psz == 1 ? " " : "s",
245 map->sq_addr, map->addr);
246 191
247 return __sq_remap(map); 192out:
193 kmem_cache_free(sq_cache, map);
194 return ret;
248} 195}
249 196
250/** 197/**
@@ -255,188 +202,198 @@ struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *n
255 * sq_remap(). Also frees up the pte that was previously inserted into 202 * sq_remap(). Also frees up the pte that was previously inserted into
256 * the kernel page table and discards the UTLB translation. 203 * the kernel page table and discards the UTLB translation.
257 */ 204 */
258void sq_unmap(struct sq_mapping *map) 205void sq_unmap(unsigned long vaddr)
259{ 206{
260 if (map->sq_addr > (unsigned long)high_memory) 207 struct sq_mapping **p, *map;
261 vfree((void *)(map->sq_addr & PAGE_MASK)); 208 struct vm_struct *vma;
209 int page;
262 210
263 list_del(&map->list); 211 for (p = &sq_mapping_list; (map = *p); p = &map->next)
264 kfree(map); 212 if (map->sq_addr == vaddr)
265} 213 break;
266 214
267/** 215 if (unlikely(!map)) {
268 * sq_clear - Clear a store queue range 216 printk("%s: bad store queue address 0x%08lx\n",
269 * @addr: Address to start clearing from. 217 __FUNCTION__, vaddr);
270 * @len: Length to clear. 218 return;
271 * 219 }
272 * A quick zero-fill implementation for clearing out memory that has been
273 * remapped through the store queues.
274 */
275void sq_clear(unsigned long addr, unsigned int len)
276{
277 int i;
278 220
279 /* Clear out both queues linearly */ 221 page = (map->sq_addr - P4SEG_STORE_QUE) >> PAGE_SHIFT;
280 for (i = 0; i < 8; i++) { 222 bitmap_release_region(sq_bitmap, page, get_order(map->size));
281 ctrl_outl(0, addr + i + 0); 223
282 ctrl_outl(0, addr + i + 8); 224#ifdef CONFIG_MMU
225 vma = remove_vm_area((void *)(map->sq_addr & PAGE_MASK));
226 if (!vma) {
227 printk(KERN_ERR "%s: bad address 0x%08lx\n",
228 __FUNCTION__, map->sq_addr);
229 return;
283 } 230 }
231#endif
232
233 sq_mapping_list_del(map);
284 234
285 sq_flush_range(addr, len); 235 kmem_cache_free(sq_cache, map);
286} 236}
287 237
288/** 238/*
289 * sq_vma_unmap - Unmap a VMA range 239 * Needlessly complex sysfs interface. Unfortunately it doesn't seem like
290 * @area: VMA containing range. 240 * there is any other easy way to add things on a per-cpu basis without
291 * @addr: Start of range. 241 * putting the directory entries somewhere stupid and having to create
292 * @len: Length of range. 242 * links in sysfs by hand back in to the per-cpu directories.
293 * 243 *
294 * Searches the sq_mapping_list for a mapping matching the sq addr @addr, 244 * Some day we may want to have an additional abstraction per store
295 * and subsequently frees up the entry. Further cleanup is done by generic 245 * queue, but considering the kobject hell we already have to deal with,
296 * code. 246 * it's simply not worth the trouble.
297 */ 247 */
298static void sq_vma_unmap(struct vm_area_struct *area, 248static struct kobject *sq_kobject[NR_CPUS];
299 unsigned long addr, size_t len)
300{
301 struct list_head *pos, *tmp;
302 249
303 list_for_each_safe(pos, tmp, &sq_mapping_list) { 250struct sq_sysfs_attr {
304 struct sq_mapping *entry; 251 struct attribute attr;
252 ssize_t (*show)(char *buf);
253 ssize_t (*store)(const char *buf, size_t count);
254};
305 255
306 entry = list_entry(pos, typeof(*entry), list); 256#define to_sq_sysfs_attr(attr) container_of(attr, struct sq_sysfs_attr, attr)
307 257
308 if (entry->sq_addr == addr) { 258static ssize_t sq_sysfs_show(struct kobject *kobj, struct attribute *attr,
309 /* 259 char *buf)
310 * We could probably get away without doing the tlb flush 260{
311 * here, as generic code should take care of most of this 261 struct sq_sysfs_attr *sattr = to_sq_sysfs_attr(attr);
312 * when unmapping the rest of the VMA range for us. Leave
313 * it in for added sanity for the time being..
314 */
315 __flush_tlb_page(get_asid(), entry->sq_addr & PAGE_MASK);
316 262
317 list_del(&entry->list); 263 if (likely(sattr->show))
318 kfree(entry); 264 return sattr->show(buf);
319 265
320 return; 266 return -EIO;
321 }
322 }
323} 267}
324 268
325/** 269static ssize_t sq_sysfs_store(struct kobject *kobj, struct attribute *attr,
326 * sq_vma_sync - Sync a VMA range 270 const char *buf, size_t count)
327 * @area: VMA containing range.
328 * @start: Start of range.
329 * @len: Length of range.
330 * @flags: Additional flags.
331 *
332 * Synchronizes an sq mapped range by flushing the store queue cache for
333 * the duration of the mapping.
334 *
335 * Used internally for user mappings, which must use msync() to prefetch
336 * the store queue cache.
337 */
338static int sq_vma_sync(struct vm_area_struct *area,
339 unsigned long start, size_t len, unsigned int flags)
340{ 271{
341 sq_flush_range(start, len); 272 struct sq_sysfs_attr *sattr = to_sq_sysfs_attr(attr);
342 273
343 return 0; 274 if (likely(sattr->store))
275 return sattr->store(buf, count);
276
277 return -EIO;
344} 278}
345 279
346static struct vm_operations_struct sq_vma_ops = { 280static ssize_t mapping_show(char *buf)
347 .unmap = sq_vma_unmap, 281{
348 .sync = sq_vma_sync, 282 struct sq_mapping **list, *entry;
349}; 283 char *p = buf;
350 284
351/** 285 for (list = &sq_mapping_list; (entry = *list); list = &entry->next)
352 * sq_mmap - mmap() for /dev/cpu/sq 286 p += sprintf(p, "%08lx-%08lx [%08lx]: %s\n",
353 * @file: unused. 287 entry->sq_addr, entry->sq_addr + entry->size,
354 * @vma: VMA to remap. 288 entry->addr, entry->name);
355 * 289
356 * Remap the specified vma @vma through the store queues, and setup associated 290 return p - buf;
357 * information for the new mapping. Also build up the page tables for the new 291}
358 * area. 292
359 */ 293static ssize_t mapping_store(const char *buf, size_t count)
360static int sq_mmap(struct file *file, struct vm_area_struct *vma)
361{ 294{
362 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; 295 unsigned long base = 0, len = 0;
363 unsigned long size = vma->vm_end - vma->vm_start;
364 struct sq_mapping *map;
365 296
366 /* 297 sscanf(buf, "%lx %lx", &base, &len);
367 * We're not interested in any arbitrary virtual address that has 298 if (!base)
368 * been stuck in the VMA, as we already know what addresses we 299 return -EIO;
369 * want. Save off the size, and reposition the VMA to begin at
370 * the next available sq address.
371 */
372 vma->vm_start = __sq_get_next_addr();
373 vma->vm_end = vma->vm_start + size;
374 300
375 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 301 if (likely(len)) {
302 int ret = sq_remap(base, len, "Userspace",
303 pgprot_val(PAGE_SHARED));
304 if (ret < 0)
305 return ret;
306 } else
307 sq_unmap(base);
376 308
377 vma->vm_flags |= VM_IO | VM_RESERVED; 309 return count;
310}
378 311
379 map = __sq_alloc_mapping(vma->vm_start, offset, size, "Userspace"); 312static struct sq_sysfs_attr mapping_attr =
313 __ATTR(mapping, 0644, mapping_show, mapping_store);
380 314
381 if (io_remap_pfn_range(vma, map->sq_addr, map->addr >> PAGE_SHIFT, 315static struct attribute *sq_sysfs_attrs[] = {
382 size, vma->vm_page_prot)) 316 &mapping_attr.attr,
383 return -EAGAIN; 317 NULL,
318};
384 319
385 vma->vm_ops = &sq_vma_ops; 320static struct sysfs_ops sq_sysfs_ops = {
321 .show = sq_sysfs_show,
322 .store = sq_sysfs_store,
323};
386 324
387 return 0; 325static struct kobj_type ktype_percpu_entry = {
388} 326 .sysfs_ops = &sq_sysfs_ops,
327 .default_attrs = sq_sysfs_attrs,
328};
389 329
390#ifdef CONFIG_PROC_FS 330static int __devinit sq_sysdev_add(struct sys_device *sysdev)
391static int sq_mapping_read_proc(char *buf, char **start, off_t off,
392 int len, int *eof, void *data)
393{ 331{
394 struct list_head *pos; 332 unsigned int cpu = sysdev->id;
395 char *p = buf; 333 struct kobject *kobj;
396 334
397 list_for_each_prev(pos, &sq_mapping_list) { 335 sq_kobject[cpu] = kzalloc(sizeof(struct kobject), GFP_KERNEL);
398 struct sq_mapping *entry; 336 if (unlikely(!sq_kobject[cpu]))
337 return -ENOMEM;
399 338
400 entry = list_entry(pos, typeof(*entry), list); 339 kobj = sq_kobject[cpu];
340 kobj->parent = &sysdev->kobj;
341 kobject_set_name(kobj, "%s", "sq");
342 kobj->ktype = &ktype_percpu_entry;
401 343
402 p += sprintf(p, "%08lx-%08lx [%08lx]: %s\n", entry->sq_addr, 344 return kobject_register(kobj);
403 entry->sq_addr + entry->size - 1, entry->addr,
404 entry->name);
405 }
406
407 return p - buf;
408} 345}
409#endif
410 346
411static struct file_operations sq_fops = { 347static int __devexit sq_sysdev_remove(struct sys_device *sysdev)
412 .owner = THIS_MODULE, 348{
413 .mmap = sq_mmap, 349 unsigned int cpu = sysdev->id;
414}; 350 struct kobject *kobj = sq_kobject[cpu];
415 351
416static struct miscdevice sq_dev = { 352 kobject_unregister(kobj);
417 .minor = STORE_QUEUE_MINOR, 353 return 0;
418 .name = "sq", 354}
419 .fops = &sq_fops, 355
356static struct sysdev_driver sq_sysdev_driver = {
357 .add = sq_sysdev_add,
358 .remove = __devexit_p(sq_sysdev_remove),
420}; 359};
421 360
422static int __init sq_api_init(void) 361static int __init sq_api_init(void)
423{ 362{
424 int ret; 363 unsigned int nr_pages = 0x04000000 >> PAGE_SHIFT;
364 unsigned int size = (nr_pages + (BITS_PER_LONG - 1)) / BITS_PER_LONG;
365 int ret = -ENOMEM;
366
425 printk(KERN_NOTICE "sq: Registering store queue API.\n"); 367 printk(KERN_NOTICE "sq: Registering store queue API.\n");
426 368
427 create_proc_read_entry("sq_mapping", 0, 0, sq_mapping_read_proc, 0); 369 sq_cache = kmem_cache_create("store_queue_cache",
370 sizeof(struct sq_mapping), 0, 0,
371 NULL, NULL);
372 if (unlikely(!sq_cache))
373 return ret;
428 374
429 ret = misc_register(&sq_dev); 375 sq_bitmap = kzalloc(size, GFP_KERNEL);
430 if (ret) 376 if (unlikely(!sq_bitmap))
431 remove_proc_entry("sq_mapping", NULL); 377 goto out;
378
379 ret = sysdev_driver_register(&cpu_sysdev_class, &sq_sysdev_driver);
380 if (unlikely(ret != 0))
381 goto out;
382
383 return 0;
384
385out:
386 kfree(sq_bitmap);
387 kmem_cache_destroy(sq_cache);
432 388
433 return ret; 389 return ret;
434} 390}
435 391
436static void __exit sq_api_exit(void) 392static void __exit sq_api_exit(void)
437{ 393{
438 misc_deregister(&sq_dev); 394 sysdev_driver_unregister(&cpu_sysdev_class, &sq_sysdev_driver);
439 remove_proc_entry("sq_mapping", NULL); 395 kfree(sq_bitmap);
396 kmem_cache_destroy(sq_cache);
440} 397}
441 398
442module_init(sq_api_init); 399module_init(sq_api_init);
@@ -445,11 +402,7 @@ module_exit(sq_api_exit);
445MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>"); 402MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
446MODULE_DESCRIPTION("Simple API for SH-4 integrated Store Queues"); 403MODULE_DESCRIPTION("Simple API for SH-4 integrated Store Queues");
447MODULE_LICENSE("GPL"); 404MODULE_LICENSE("GPL");
448MODULE_ALIAS_MISCDEV(STORE_QUEUE_MINOR);
449 405
450EXPORT_SYMBOL(sq_remap); 406EXPORT_SYMBOL(sq_remap);
451EXPORT_SYMBOL(sq_unmap); 407EXPORT_SYMBOL(sq_unmap);
452EXPORT_SYMBOL(sq_clear);
453EXPORT_SYMBOL(sq_flush);
454EXPORT_SYMBOL(sq_flush_range); 408EXPORT_SYMBOL(sq_flush_range);
455
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 1378db375e17..a00022722e9e 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka 4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002 M. R. Brown 5 * Copyright (C) 2002 M. R. Brown
6 * Copyright (C) 2004 Paul Mundt 6 * Copyright (C) 2004 - 2006 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -49,7 +49,7 @@ static int __init sh_console_setup(struct console *co, char *options)
49 return 0; 49 return 0;
50} 50}
51 51
52static struct console early_console = { 52static struct console bios_console = {
53 .name = "bios", 53 .name = "bios",
54 .write = sh_console_write, 54 .write = sh_console_write,
55 .setup = sh_console_setup, 55 .setup = sh_console_setup,
@@ -59,34 +59,43 @@ static struct console early_console = {
59#endif 59#endif
60 60
61#ifdef CONFIG_EARLY_SCIF_CONSOLE 61#ifdef CONFIG_EARLY_SCIF_CONSOLE
62#include <linux/serial_core.h>
63#include "../../../drivers/serial/sh-sci.h"
64
65#ifdef CONFIG_CPU_SH4
62#define SCIF_REG 0xffe80000 66#define SCIF_REG 0xffe80000
67#elif defined(CONFIG_CPU_SUBTYPE_SH72060)
68#define SCIF_REG 0xfffe9800
69#else
70#error "Undefined SCIF for this subtype"
71#endif
72
73static struct uart_port scif_port = {
74 .mapbase = SCIF_REG,
75 .membase = (char __iomem *)SCIF_REG,
76};
63 77
64static void scif_sercon_putc(int c) 78static void scif_sercon_putc(int c)
65{ 79{
66 while (!(ctrl_inw(SCIF_REG + 0x10) & 0x20)) ; 80 while (((sci_in(&scif_port, SCFDR) & 0x1f00 >> 8) == 16))
81 ;
67 82
68 ctrl_outb(c, SCIF_REG + 12); 83 sci_out(&scif_port, SCxTDR, c);
69 ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0x9f), SCIF_REG + 0x10); 84 sci_in(&scif_port, SCxSR);
85 sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
86
87 while ((sci_in(&scif_port, SCxSR) & 0x40) == 0);
88 ;
70 89
71 if (c == '\n') 90 if (c == '\n')
72 scif_sercon_putc('\r'); 91 scif_sercon_putc('\r');
73} 92}
74 93
75static void scif_sercon_flush(void) 94static void scif_sercon_write(struct console *con, const char *s,
76{ 95 unsigned count)
77 ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10);
78
79 while (!(ctrl_inw(SCIF_REG + 0x10) & 0x40)) ;
80
81 ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10);
82}
83
84static void scif_sercon_write(struct console *con, const char *s, unsigned count)
85{ 96{
86 while (count-- > 0) 97 while (count-- > 0)
87 scif_sercon_putc(*s++); 98 scif_sercon_putc(*s++);
88
89 scif_sercon_flush();
90} 99}
91 100
92static int __init scif_sercon_setup(struct console *con, char *options) 101static int __init scif_sercon_setup(struct console *con, char *options)
@@ -96,7 +105,7 @@ static int __init scif_sercon_setup(struct console *con, char *options)
96 return 0; 105 return 0;
97} 106}
98 107
99static struct console early_console = { 108static struct console scif_console = {
100 .name = "sercon", 109 .name = "sercon",
101 .write = scif_sercon_write, 110 .write = scif_sercon_write,
102 .setup = scif_sercon_setup, 111 .setup = scif_sercon_setup,
@@ -104,7 +113,7 @@ static struct console early_console = {
104 .index = -1, 113 .index = -1,
105}; 114};
106 115
107void scif_sercon_init(int baud) 116static void scif_sercon_init(int baud)
108{ 117{
109 ctrl_outw(0, SCIF_REG + 8); 118 ctrl_outw(0, SCIF_REG + 8);
110 ctrl_outw(0, SCIF_REG); 119 ctrl_outw(0, SCIF_REG);
@@ -122,16 +131,61 @@ void scif_sercon_init(int baud)
122} 131}
123#endif 132#endif
124 133
125void __init enable_early_printk(void) 134/*
135 * Setup a default console, if more than one is compiled in, rely on the
136 * earlyprintk= parsing to give priority.
137 */
138static struct console *early_console =
139#ifdef CONFIG_SH_STANDARD_BIOS
140 &bios_console
141#elif defined(CONFIG_EARLY_SCIF_CONSOLE)
142 &scif_console
143#else
144 NULL
145#endif
146 ;
147
148static int __initdata keep_early;
149
150int __init setup_early_printk(char *opt)
126{ 151{
127#ifdef CONFIG_EARLY_SCIF_CONSOLE 152 char *space;
128 scif_sercon_init(115200); 153 char buf[256];
154
155 strlcpy(buf, opt, sizeof(buf));
156 space = strchr(buf, ' ');
157 if (space)
158 *space = 0;
159
160 if (strstr(buf, "keep"))
161 keep_early = 1;
162
163#ifdef CONFIG_SH_STANDARD_BIOS
164 if (!strncmp(buf, "bios", 4))
165 early_console = &bios_console;
166#endif
167#if defined(CONFIG_EARLY_SCIF_CONSOLE)
168 if (!strncmp(buf, "serial", 6)) {
169 early_console = &scif_console;
170
171#ifdef CONFIG_CPU_SH4
172 scif_sercon_init(115200);
173#endif
174 }
129#endif 175#endif
130 register_console(&early_console); 176
177 if (likely(early_console))
178 register_console(early_console);
179
180 return 1;
131} 181}
182__setup("earlyprintk=", setup_early_printk);
132 183
133void disable_early_printk(void) 184void __init disable_early_printk(void)
134{ 185{
135 unregister_console(&early_console); 186 if (!keep_early) {
187 printk("disabling early console\n");
188 unregister_console(early_console);
189 } else
190 printk("keeping early console\n");
136} 191}
137
diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S
index 7dfd2ba75f7f..fe8221855b28 100644
--- a/arch/sh/kernel/entry.S
+++ b/arch/sh/kernel/entry.S
@@ -18,24 +18,6 @@
18#include <asm/cpu/mmu_context.h> 18#include <asm/cpu/mmu_context.h>
19#include <asm/unistd.h> 19#include <asm/unistd.h>
20 20
21#if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE)
22#define sys_nfsservctl sys_ni_syscall
23#endif
24
25#if !defined(CONFIG_MMU)
26#define sys_madvise sys_ni_syscall
27#define sys_readahead sys_ni_syscall
28#define sys_mprotect sys_ni_syscall
29#define sys_msync sys_ni_syscall
30#define sys_mlock sys_ni_syscall
31#define sys_munlock sys_ni_syscall
32#define sys_mlockall sys_ni_syscall
33#define sys_munlockall sys_ni_syscall
34#define sys_mremap sys_ni_syscall
35#define sys_mincore sys_ni_syscall
36#define sys_remap_file_pages sys_ni_syscall
37#endif
38
39! NOTE: 21! NOTE:
40! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address 22! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
41! to be jumped is too far, but it causes illegal slot exception. 23! to be jumped is too far, but it causes illegal slot exception.
@@ -326,7 +308,7 @@ ENTRY(exception_error)
326 .align 2 308 .align 2
327ret_from_exception: 309ret_from_exception:
328 preempt_stop() 310 preempt_stop()
329ret_from_irq: 311ENTRY(ret_from_irq)
330 ! 312 !
331 mov #OFF_SR, r0 313 mov #OFF_SR, r0
332 mov.l @(r0,r15), r0 ! get status register 314 mov.l @(r0,r15), r0 ! get status register
@@ -389,11 +371,12 @@ work_pending:
389 ! r8: current_thread_info 371 ! r8: current_thread_info
390 ! t: result of "tst #_TIF_NEED_RESCHED, r0" 372 ! t: result of "tst #_TIF_NEED_RESCHED, r0"
391 bf/s work_resched 373 bf/s work_resched
392 tst #_TIF_SIGPENDING, r0 374 tst #(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r0
393work_notifysig: 375work_notifysig:
394 bt/s restore_all 376 bt/s restore_all
395 mov r15, r4 377 mov r15, r4
396 mov #0, r5 378 mov r12, r5 ! set arg1(save_r0)
379 mov r0, r6
397 mov.l 2f, r1 380 mov.l 2f, r1
398 mova restore_all, r0 381 mova restore_all, r0
399 jmp @r1 382 jmp @r1
@@ -431,7 +414,7 @@ work_resched:
431 414
432 .align 2 415 .align 2
4331: .long schedule 4161: .long schedule
4342: .long do_signal 4172: .long do_notify_resume
435 418
436 .align 2 419 .align 2
437syscall_exit_work: 420syscall_exit_work:
@@ -552,6 +535,7 @@ syscall_call:
552 mov.l @r9, r8 535 mov.l @r9, r8
553 jsr @r8 ! jump to specific syscall handler 536 jsr @r8 ! jump to specific syscall handler
554 nop 537 nop
538 mov.l @(OFF_R0,r15), r12 ! save r0
555 mov.l r0, @(OFF_R0,r15) ! save the return value 539 mov.l r0, @(OFF_R0,r15) ! save the return value
556 ! 540 !
557syscall_exit: 541syscall_exit:
@@ -644,7 +628,7 @@ skip_restore:
644 ! 628 !
645#if defined(CONFIG_KGDB_NMI) 629#if defined(CONFIG_KGDB_NMI)
646 ! Clear in_nmi 630 ! Clear in_nmi
647 mov.l 4f, k0 631 mov.l 6f, k0
648 mov #0, k1 632 mov #0, k1
649 mov.b k1, @k0 633 mov.b k1, @k0
650#endif 634#endif
@@ -722,7 +706,7 @@ interrupt:
722! 706!
723! 707!
724 .align 2 708 .align 2
725handle_exception: 709ENTRY(handle_exception)
726 ! Using k0, k1 for scratch registers (r0_bank1, r1_bank), 710 ! Using k0, k1 for scratch registers (r0_bank1, r1_bank),
727 ! save all registers onto stack. 711 ! save all registers onto stack.
728 ! 712 !
@@ -732,8 +716,8 @@ handle_exception:
732 bt/s 1f ! It's a kernel to kernel transition. 716 bt/s 1f ! It's a kernel to kernel transition.
733 mov r15, k0 ! save original stack to k0 717 mov r15, k0 ! save original stack to k0
734 /* User space to kernel */ 718 /* User space to kernel */
735 mov #0x20, k1 719 mov #(THREAD_SIZE >> 8), k1
736 shll8 k1 ! k1 := 8192 (== THREAD_SIZE) 720 shll8 k1 ! k1 := THREAD_SIZE
737 add current, k1 721 add current, k1
738 mov k1, r15 ! change to kernel stack 722 mov k1, r15 ! change to kernel stack
739 ! 723 !
@@ -838,300 +822,3 @@ ENTRY(exception_none)
838 rts 822 rts
839 nop 823 nop
840 824
841 .data
842ENTRY(sys_call_table)
843 .long sys_ni_syscall /* 0 - old "setup()" system call*/
844 .long sys_exit
845 .long sys_fork
846 .long sys_read
847 .long sys_write
848 .long sys_open /* 5 */
849 .long sys_close
850 .long sys_waitpid
851 .long sys_creat
852 .long sys_link
853 .long sys_unlink /* 10 */
854 .long sys_execve
855 .long sys_chdir
856 .long sys_time
857 .long sys_mknod
858 .long sys_chmod /* 15 */
859 .long sys_lchown16
860 .long sys_ni_syscall /* old break syscall holder */
861 .long sys_stat
862 .long sys_lseek
863 .long sys_getpid /* 20 */
864 .long sys_mount
865 .long sys_oldumount
866 .long sys_setuid16
867 .long sys_getuid16
868 .long sys_stime /* 25 */
869 .long sys_ptrace
870 .long sys_alarm
871 .long sys_fstat
872 .long sys_pause
873 .long sys_utime /* 30 */
874 .long sys_ni_syscall /* old stty syscall holder */
875 .long sys_ni_syscall /* old gtty syscall holder */
876 .long sys_access
877 .long sys_nice
878 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
879 .long sys_sync
880 .long sys_kill
881 .long sys_rename
882 .long sys_mkdir
883 .long sys_rmdir /* 40 */
884 .long sys_dup
885 .long sys_pipe
886 .long sys_times
887 .long sys_ni_syscall /* old prof syscall holder */
888 .long sys_brk /* 45 */
889 .long sys_setgid16
890 .long sys_getgid16
891 .long sys_signal
892 .long sys_geteuid16
893 .long sys_getegid16 /* 50 */
894 .long sys_acct
895 .long sys_umount /* recycled never used phys() */
896 .long sys_ni_syscall /* old lock syscall holder */
897 .long sys_ioctl
898 .long sys_fcntl /* 55 */
899 .long sys_ni_syscall /* old mpx syscall holder */
900 .long sys_setpgid
901 .long sys_ni_syscall /* old ulimit syscall holder */
902 .long sys_ni_syscall /* sys_olduname */
903 .long sys_umask /* 60 */
904 .long sys_chroot
905 .long sys_ustat
906 .long sys_dup2
907 .long sys_getppid
908 .long sys_getpgrp /* 65 */
909 .long sys_setsid
910 .long sys_sigaction
911 .long sys_sgetmask
912 .long sys_ssetmask
913 .long sys_setreuid16 /* 70 */
914 .long sys_setregid16
915 .long sys_sigsuspend
916 .long sys_sigpending
917 .long sys_sethostname
918 .long sys_setrlimit /* 75 */
919 .long sys_old_getrlimit
920 .long sys_getrusage
921 .long sys_gettimeofday
922 .long sys_settimeofday
923 .long sys_getgroups16 /* 80 */
924 .long sys_setgroups16
925 .long sys_ni_syscall /* sys_oldselect */
926 .long sys_symlink
927 .long sys_lstat
928 .long sys_readlink /* 85 */
929 .long sys_uselib
930 .long sys_swapon
931 .long sys_reboot
932 .long old_readdir
933 .long old_mmap /* 90 */
934 .long sys_munmap
935 .long sys_truncate
936 .long sys_ftruncate
937 .long sys_fchmod
938 .long sys_fchown16 /* 95 */
939 .long sys_getpriority
940 .long sys_setpriority
941 .long sys_ni_syscall /* old profil syscall holder */
942 .long sys_statfs
943 .long sys_fstatfs /* 100 */
944 .long sys_ni_syscall /* ioperm */
945 .long sys_socketcall
946 .long sys_syslog
947 .long sys_setitimer
948 .long sys_getitimer /* 105 */
949 .long sys_newstat
950 .long sys_newlstat
951 .long sys_newfstat
952 .long sys_uname
953 .long sys_ni_syscall /* 110 */ /* iopl */
954 .long sys_vhangup
955 .long sys_ni_syscall /* idle */
956 .long sys_ni_syscall /* vm86old */
957 .long sys_wait4
958 .long sys_swapoff /* 115 */
959 .long sys_sysinfo
960 .long sys_ipc
961 .long sys_fsync
962 .long sys_sigreturn
963 .long sys_clone /* 120 */
964 .long sys_setdomainname
965 .long sys_newuname
966 .long sys_ni_syscall /* sys_modify_ldt */
967 .long sys_adjtimex
968 .long sys_mprotect /* 125 */
969 .long sys_sigprocmask
970 .long sys_ni_syscall /* old "create_module" */
971 .long sys_init_module
972 .long sys_delete_module
973 .long sys_ni_syscall /* 130: old "get_kernel_syms" */
974 .long sys_quotactl
975 .long sys_getpgid
976 .long sys_fchdir
977 .long sys_bdflush
978 .long sys_sysfs /* 135 */
979 .long sys_personality
980 .long sys_ni_syscall /* for afs_syscall */
981 .long sys_setfsuid16
982 .long sys_setfsgid16
983 .long sys_llseek /* 140 */
984 .long sys_getdents
985 .long sys_select
986 .long sys_flock
987 .long sys_msync
988 .long sys_readv /* 145 */
989 .long sys_writev
990 .long sys_getsid
991 .long sys_fdatasync
992 .long sys_sysctl
993 .long sys_mlock /* 150 */
994 .long sys_munlock
995 .long sys_mlockall
996 .long sys_munlockall
997 .long sys_sched_setparam
998 .long sys_sched_getparam /* 155 */
999 .long sys_sched_setscheduler
1000 .long sys_sched_getscheduler
1001 .long sys_sched_yield
1002 .long sys_sched_get_priority_max
1003 .long sys_sched_get_priority_min /* 160 */
1004 .long sys_sched_rr_get_interval
1005 .long sys_nanosleep
1006 .long sys_mremap
1007 .long sys_setresuid16
1008 .long sys_getresuid16 /* 165 */
1009 .long sys_ni_syscall /* vm86 */
1010 .long sys_ni_syscall /* old "query_module" */
1011 .long sys_poll
1012 .long sys_nfsservctl
1013 .long sys_setresgid16 /* 170 */
1014 .long sys_getresgid16
1015 .long sys_prctl
1016 .long sys_rt_sigreturn
1017 .long sys_rt_sigaction
1018 .long sys_rt_sigprocmask /* 175 */
1019 .long sys_rt_sigpending
1020 .long sys_rt_sigtimedwait
1021 .long sys_rt_sigqueueinfo
1022 .long sys_rt_sigsuspend
1023 .long sys_pread_wrapper /* 180 */
1024 .long sys_pwrite_wrapper
1025 .long sys_chown16
1026 .long sys_getcwd
1027 .long sys_capget
1028 .long sys_capset /* 185 */
1029 .long sys_sigaltstack
1030 .long sys_sendfile
1031 .long sys_ni_syscall /* streams1 */
1032 .long sys_ni_syscall /* streams2 */
1033 .long sys_vfork /* 190 */
1034 .long sys_getrlimit
1035 .long sys_mmap2
1036 .long sys_truncate64
1037 .long sys_ftruncate64
1038 .long sys_stat64 /* 195 */
1039 .long sys_lstat64
1040 .long sys_fstat64
1041 .long sys_lchown
1042 .long sys_getuid
1043 .long sys_getgid /* 200 */
1044 .long sys_geteuid
1045 .long sys_getegid
1046 .long sys_setreuid
1047 .long sys_setregid
1048 .long sys_getgroups /* 205 */
1049 .long sys_setgroups
1050 .long sys_fchown
1051 .long sys_setresuid
1052 .long sys_getresuid
1053 .long sys_setresgid /* 210 */
1054 .long sys_getresgid
1055 .long sys_chown
1056 .long sys_setuid
1057 .long sys_setgid
1058 .long sys_setfsuid /* 215 */
1059 .long sys_setfsgid
1060 .long sys_pivot_root
1061 .long sys_mincore
1062 .long sys_madvise
1063 .long sys_getdents64 /* 220 */
1064 .long sys_fcntl64
1065 .long sys_ni_syscall /* reserved for TUX */
1066 .long sys_ni_syscall /* Reserved for Security */
1067 .long sys_gettid
1068 .long sys_readahead /* 225 */
1069 .long sys_setxattr
1070 .long sys_lsetxattr
1071 .long sys_fsetxattr
1072 .long sys_getxattr
1073 .long sys_lgetxattr /* 230 */
1074 .long sys_fgetxattr
1075 .long sys_listxattr
1076 .long sys_llistxattr
1077 .long sys_flistxattr
1078 .long sys_removexattr /* 235 */
1079 .long sys_lremovexattr
1080 .long sys_fremovexattr
1081 .long sys_tkill
1082 .long sys_sendfile64
1083 .long sys_futex /* 240 */
1084 .long sys_sched_setaffinity
1085 .long sys_sched_getaffinity
1086 .long sys_ni_syscall
1087 .long sys_ni_syscall
1088 .long sys_io_setup /* 245 */
1089 .long sys_io_destroy
1090 .long sys_io_getevents
1091 .long sys_io_submit
1092 .long sys_io_cancel
1093 .long sys_fadvise64 /* 250 */
1094 .long sys_ni_syscall
1095 .long sys_exit_group
1096 .long sys_lookup_dcookie
1097 .long sys_epoll_create
1098 .long sys_epoll_ctl /* 255 */
1099 .long sys_epoll_wait
1100 .long sys_remap_file_pages
1101 .long sys_set_tid_address
1102 .long sys_timer_create
1103 .long sys_timer_settime /* 260 */
1104 .long sys_timer_gettime
1105 .long sys_timer_getoverrun
1106 .long sys_timer_delete
1107 .long sys_clock_settime
1108 .long sys_clock_gettime /* 265 */
1109 .long sys_clock_getres
1110 .long sys_clock_nanosleep
1111 .long sys_statfs64
1112 .long sys_fstatfs64
1113 .long sys_tgkill /* 270 */
1114 .long sys_utimes
1115 .long sys_fadvise64_64_wrapper
1116 .long sys_ni_syscall /* Reserved for vserver */
1117 .long sys_ni_syscall /* Reserved for mbind */
1118 .long sys_ni_syscall /* 275 - get_mempolicy */
1119 .long sys_ni_syscall /* set_mempolicy */
1120 .long sys_mq_open
1121 .long sys_mq_unlink
1122 .long sys_mq_timedsend
1123 .long sys_mq_timedreceive /* 280 */
1124 .long sys_mq_notify
1125 .long sys_mq_getsetattr
1126 .long sys_ni_syscall /* Reserved for kexec */
1127 .long sys_waitid
1128 .long sys_add_key /* 285 */
1129 .long sys_request_key
1130 .long sys_keyctl
1131 .long sys_ioprio_set
1132 .long sys_ioprio_get
1133 .long sys_inotify_init /* 290 */
1134 .long sys_inotify_add_watch
1135 .long sys_inotify_rm_watch
1136
1137/* End of entry.S */
diff --git a/arch/sh/kernel/head.S b/arch/sh/kernel/head.S
index 9b9e6ef626ce..f5f53d14f245 100644
--- a/arch/sh/kernel/head.S
+++ b/arch/sh/kernel/head.S
@@ -11,6 +11,18 @@
11 * Head.S contains the SH exception handlers and startup code. 11 * Head.S contains the SH exception handlers and startup code.
12 */ 12 */
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <asm/thread_info.h>
15
16#ifdef CONFIG_CPU_SH4A
17#define SYNCO() synco
18
19#define PREFI(label, reg) \
20 mov.l label, reg; \
21 prefi @reg
22#else
23#define SYNCO()
24#define PREFI(label, reg)
25#endif
14 26
15 .section .empty_zero_page, "aw" 27 .section .empty_zero_page, "aw"
16ENTRY(empty_zero_page) 28ENTRY(empty_zero_page)
@@ -42,18 +54,25 @@ ENTRY(_stext)
42 ! Initialize global interrupt mask 54 ! Initialize global interrupt mask
43 mov #0, r0 55 mov #0, r0
44 ldc r0, r6_bank 56 ldc r0, r6_bank
57
58 /*
59 * Prefetch if possible to reduce cache miss penalty.
60 *
61 * We do this early on for SH-4A as a micro-optimization,
62 * as later on we will have speculative execution enabled
63 * and this will become less of an issue.
64 */
65 PREFI(5f, r0)
66 PREFI(6f, r0)
67
45 ! 68 !
46 mov.l 2f, r0 69 mov.l 2f, r0
47 mov r0, r15 ! Set initial r15 (stack pointer) 70 mov r0, r15 ! Set initial r15 (stack pointer)
48 mov #0x20, r1 ! 71 mov #(THREAD_SIZE >> 8), r1
49 shll8 r1 ! r1 = 8192 72 shll8 r1 ! r1 = THREAD_SIZE
50 sub r1, r0 ! 73 sub r1, r0 !
51 ldc r0, r7_bank ! ... and initial thread_info 74 ldc r0, r7_bank ! ... and initial thread_info
52 ! 75
53 ! Additional CPU initialization
54 mov.l 6f, r0
55 jsr @r0
56 nop
57 ! Clear BSS area 76 ! Clear BSS area
58 mov.l 3f, r1 77 mov.l 3f, r1
59 add #4, r1 78 add #4, r1
@@ -62,6 +81,14 @@ ENTRY(_stext)
629: cmp/hs r2, r1 819: cmp/hs r2, r1
63 bf/s 9b ! while (r1 < r2) 82 bf/s 9b ! while (r1 < r2)
64 mov.l r0,@-r2 83 mov.l r0,@-r2
84
85 ! Additional CPU initialization
86 mov.l 6f, r0
87 jsr @r0
88 nop
89
90 SYNCO() ! Wait for pending instructions..
91
65 ! Start kernel 92 ! Start kernel
66 mov.l 5f, r0 93 mov.l 5f, r0
67 jmp @r0 94 jmp @r0
@@ -69,7 +96,7 @@ ENTRY(_stext)
69 96
70 .balign 4 97 .balign 4
711: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF 981: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
722: .long stack 992: .long init_thread_union+THREAD_SIZE
733: .long __bss_start 1003: .long __bss_start
744: .long _end 1014: .long _end
755: .long start_kernel 1025: .long start_kernel
diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c
index 71c9fde2fd90..501fe03e3715 100644
--- a/arch/sh/kernel/io.c
+++ b/arch/sh/kernel/io.c
@@ -61,6 +61,73 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count)
61} 61}
62EXPORT_SYMBOL(memset_io); 62EXPORT_SYMBOL(memset_io);
63 63
64void __raw_readsl(unsigned long addr, void *datap, int len)
65{
66 u32 *data;
67
68 for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--)
69 *data++ = ctrl_inl(addr);
70
71 if (likely(len >= (0x20 >> 2))) {
72 int tmp2, tmp3, tmp4, tmp5, tmp6;
73
74 __asm__ __volatile__(
75 "1: \n\t"
76 "mov.l @%7, r0 \n\t"
77 "mov.l @%7, %2 \n\t"
78#ifdef CONFIG_CPU_SH4
79 "movca.l r0, @%0 \n\t"
80#else
81 "mov.l r0, @%0 \n\t"
82#endif
83 "mov.l @%7, %3 \n\t"
84 "mov.l @%7, %4 \n\t"
85 "mov.l @%7, %5 \n\t"
86 "mov.l @%7, %6 \n\t"
87 "mov.l @%7, r7 \n\t"
88 "mov.l @%7, r0 \n\t"
89 "mov.l %2, @(0x04,%0) \n\t"
90 "mov #0x20>>2, %2 \n\t"
91 "mov.l %3, @(0x08,%0) \n\t"
92 "sub %2, %1 \n\t"
93 "mov.l %4, @(0x0c,%0) \n\t"
94 "cmp/hi %1, %2 ! T if 32 > len \n\t"
95 "mov.l %5, @(0x10,%0) \n\t"
96 "mov.l %6, @(0x14,%0) \n\t"
97 "mov.l r7, @(0x18,%0) \n\t"
98 "mov.l r0, @(0x1c,%0) \n\t"
99 "bf.s 1b \n\t"
100 " add #0x20, %0 \n\t"
101 : "=&r" (data), "=&r" (len),
102 "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
103 "=&r" (tmp5), "=&r" (tmp6)
104 : "r"(addr), "0" (data), "1" (len)
105 : "r0", "r7", "t", "memory");
106 }
107
108 for (; len != 0; len--)
109 *data++ = ctrl_inl(addr);
110}
111EXPORT_SYMBOL(__raw_readsl);
112
113void __raw_writesl(unsigned long addr, const void *data, int len)
114{
115 if (likely(len != 0)) {
116 int tmp1;
117
118 __asm__ __volatile__ (
119 "1: \n\t"
120 "mov.l @%0+, %1 \n\t"
121 "dt %3 \n\t"
122 "bf.s 1b \n\t"
123 " mov.l %1, @%4 \n\t"
124 : "=&r" (data), "=&r" (tmp1)
125 : "0" (data), "r" (len), "r"(addr)
126 : "t", "memory");
127 }
128}
129EXPORT_SYMBOL(__raw_writesl);
130
64void __iomem *ioport_map(unsigned long port, unsigned int nr) 131void __iomem *ioport_map(unsigned long port, unsigned int nr)
65{ 132{
66 return sh_mv.mv_ioport_map(port, nr); 133 return sh_mv.mv_ioport_map(port, nr);
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index c2e07f7f3496..c7ebd6aec951 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -1,5 +1,4 @@
1/* $Id: irq.c,v 1.20 2004/01/13 05:52:11 kkojima Exp $ 1/*
2 *
3 * linux/arch/sh/kernel/irq.c 2 * linux/arch/sh/kernel/irq.c
4 * 3 *
5 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar 4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
@@ -7,13 +6,15 @@
7 * 6 *
8 * SuperH version: Copyright (C) 1999 Niibe Yutaka 7 * SuperH version: Copyright (C) 1999 Niibe Yutaka
9 */ 8 */
10
11#include <linux/irq.h> 9#include <linux/irq.h>
12#include <linux/interrupt.h> 10#include <linux/interrupt.h>
11#include <linux/module.h>
13#include <linux/kernel_stat.h> 12#include <linux/kernel_stat.h>
14#include <linux/seq_file.h> 13#include <linux/seq_file.h>
15#include <asm/irq.h> 14#include <asm/irq.h>
16#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/uaccess.h>
17#include <asm/thread_info.h>
17#include <asm/cpu/mmu_context.h> 18#include <asm/cpu/mmu_context.h>
18 19
19/* 20/*
@@ -60,15 +61,46 @@ unlock:
60} 61}
61#endif 62#endif
62 63
64#ifdef CONFIG_4KSTACKS
65/*
66 * per-CPU IRQ handling contexts (thread information and stack)
67 */
68union irq_ctx {
69 struct thread_info tinfo;
70 u32 stack[THREAD_SIZE/sizeof(u32)];
71};
72
73static union irq_ctx *hardirq_ctx[NR_CPUS];
74static union irq_ctx *softirq_ctx[NR_CPUS];
75#endif
63 76
64asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, 77asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
65 unsigned long r6, unsigned long r7, 78 unsigned long r6, unsigned long r7,
66 struct pt_regs regs) 79 struct pt_regs regs)
67{ 80{
68 int irq = r4; 81 int irq = r4;
82#ifdef CONFIG_4KSTACKS
83 union irq_ctx *curctx, *irqctx;
84#endif
69 85
70 irq_enter(); 86 irq_enter();
71 87
88#ifdef CONFIG_DEBUG_STACKOVERFLOW
89 /* Debugging check for stack overflow: is there less than 1KB free? */
90 {
91 long sp;
92
93 __asm__ __volatile__ ("and r15, %0" :
94 "=r" (sp) : "0" (THREAD_SIZE - 1));
95
96 if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) {
97 printk("do_IRQ: stack overflow: %ld\n",
98 sp - sizeof(struct thread_info));
99 dump_stack();
100 }
101 }
102#endif
103
72#ifdef CONFIG_CPU_HAS_INTEVT 104#ifdef CONFIG_CPU_HAS_INTEVT
73 __asm__ __volatile__ ( 105 __asm__ __volatile__ (
74#ifdef CONFIG_CPU_HAS_SR_RB 106#ifdef CONFIG_CPU_HAS_SR_RB
@@ -87,7 +119,135 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
87#endif 119#endif
88 120
89 irq = irq_demux(irq); 121 irq = irq_demux(irq);
90 __do_IRQ(irq, &regs); 122
123#ifdef CONFIG_4KSTACKS
124 curctx = (union irq_ctx *)current_thread_info();
125 irqctx = hardirq_ctx[smp_processor_id()];
126
127 /*
128 * this is where we switch to the IRQ stack. However, if we are
129 * already using the IRQ stack (because we interrupted a hardirq
130 * handler) we can't do that and just have to keep using the
131 * current stack (which is the irq stack already after all)
132 */
133 if (curctx != irqctx) {
134 u32 *isp;
135
136 isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
137 irqctx->tinfo.task = curctx->tinfo.task;
138 irqctx->tinfo.previous_sp = current_stack_pointer;
139
140 __asm__ __volatile__ (
141 "mov %0, r4 \n"
142 "mov %1, r5 \n"
143 "mov r15, r9 \n"
144 "jsr @%2 \n"
145 /* swith to the irq stack */
146 " mov %3, r15 \n"
147 /* restore the stack (ring zero) */
148 "mov r9, r15 \n"
149 : /* no outputs */
150 : "r" (irq), "r" (&regs), "r" (__do_IRQ), "r" (isp)
151 /* XXX: A somewhat excessive clobber list? -PFM */
152 : "memory", "r0", "r1", "r2", "r3", "r4",
153 "r5", "r6", "r7", "r8", "t", "pr"
154 );
155 } else
156#endif
157 __do_IRQ(irq, &regs);
158
91 irq_exit(); 159 irq_exit();
160
92 return 1; 161 return 1;
93} 162}
163
164#ifdef CONFIG_4KSTACKS
165/*
166 * These should really be __section__(".bss.page_aligned") as well, but
167 * gcc's 3.0 and earlier don't handle that correctly.
168 */
169static char softirq_stack[NR_CPUS * THREAD_SIZE]
170 __attribute__((__aligned__(THREAD_SIZE)));
171
172static char hardirq_stack[NR_CPUS * THREAD_SIZE]
173 __attribute__((__aligned__(THREAD_SIZE)));
174
175/*
176 * allocate per-cpu stacks for hardirq and for softirq processing
177 */
178void irq_ctx_init(int cpu)
179{
180 union irq_ctx *irqctx;
181
182 if (hardirq_ctx[cpu])
183 return;
184
185 irqctx = (union irq_ctx *)&hardirq_stack[cpu * THREAD_SIZE];
186 irqctx->tinfo.task = NULL;
187 irqctx->tinfo.exec_domain = NULL;
188 irqctx->tinfo.cpu = cpu;
189 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
190 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
191
192 hardirq_ctx[cpu] = irqctx;
193
194 irqctx = (union irq_ctx *)&softirq_stack[cpu * THREAD_SIZE];
195 irqctx->tinfo.task = NULL;
196 irqctx->tinfo.exec_domain = NULL;
197 irqctx->tinfo.cpu = cpu;
198 irqctx->tinfo.preempt_count = SOFTIRQ_OFFSET;
199 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
200
201 softirq_ctx[cpu] = irqctx;
202
203 printk("CPU %u irqstacks, hard=%p soft=%p\n",
204 cpu, hardirq_ctx[cpu], softirq_ctx[cpu]);
205}
206
207void irq_ctx_exit(int cpu)
208{
209 hardirq_ctx[cpu] = NULL;
210}
211
212extern asmlinkage void __do_softirq(void);
213
214asmlinkage void do_softirq(void)
215{
216 unsigned long flags;
217 struct thread_info *curctx;
218 union irq_ctx *irqctx;
219 u32 *isp;
220
221 if (in_interrupt())
222 return;
223
224 local_irq_save(flags);
225
226 if (local_softirq_pending()) {
227 curctx = current_thread_info();
228 irqctx = softirq_ctx[smp_processor_id()];
229 irqctx->tinfo.task = curctx->task;
230 irqctx->tinfo.previous_sp = current_stack_pointer;
231
232 /* build the stack frame on the softirq stack */
233 isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
234
235 __asm__ __volatile__ (
236 "mov r15, r9 \n"
237 "jsr @%0 \n"
238 /* switch to the softirq stack */
239 " mov %1, r15 \n"
240 /* restore the thread stack */
241 "mov r9, r15 \n"
242 : /* no outputs */
243 : "r" (__do_softirq), "r" (isp)
244 /* XXX: A somewhat excessive clobber list? -PFM */
245 : "memory", "r0", "r1", "r2", "r3", "r4",
246 "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr"
247 );
248 }
249
250 local_irq_restore(flags);
251}
252EXPORT_SYMBOL(do_softirq);
253#endif
diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c
index 42638b92b51c..9c6315f0335d 100644
--- a/arch/sh/kernel/kgdb_stub.c
+++ b/arch/sh/kernel/kgdb_stub.c
@@ -101,16 +101,17 @@
101#include <linux/linkage.h> 101#include <linux/linkage.h>
102#include <linux/init.h> 102#include <linux/init.h>
103 103
104#ifdef CONFIG_SH_KGDB_CONSOLE
105#include <linux/console.h>
106#endif
107
104#include <asm/system.h> 108#include <asm/system.h>
105#include <asm/current.h> 109#include <asm/current.h>
106#include <asm/signal.h> 110#include <asm/signal.h>
107#include <asm/pgtable.h> 111#include <asm/pgtable.h>
108#include <asm/ptrace.h> 112#include <asm/ptrace.h>
109#include <asm/kgdb.h> 113#include <asm/kgdb.h>
110 114#include <asm/io.h>
111#ifdef CONFIG_SH_KGDB_CONSOLE
112#include <linux/console.h>
113#endif
114 115
115/* Function pointers for linkage */ 116/* Function pointers for linkage */
116kgdb_debug_hook_t *kgdb_debug_hook; 117kgdb_debug_hook_t *kgdb_debug_hook;
@@ -240,7 +241,6 @@ static jmp_buf rem_com_env;
240/* Misc static */ 241/* Misc static */
241static int stepped_address; 242static int stepped_address;
242static short stepped_opcode; 243static short stepped_opcode;
243static const char hexchars[] = "0123456789abcdef";
244static char in_buffer[BUFMAX]; 244static char in_buffer[BUFMAX];
245static char out_buffer[OUTBUFMAX]; 245static char out_buffer[OUTBUFMAX];
246 246
@@ -253,29 +253,6 @@ typedef unsigned char threadref[8];
253#define BUF_THREAD_ID_SIZE 16 253#define BUF_THREAD_ID_SIZE 16
254#endif 254#endif
255 255
256/* Return addr as a real volatile address */
257static inline unsigned int ctrl_inl(const unsigned long addr)
258{
259 return *(volatile unsigned long *) addr;
260}
261
262/* Correctly set *addr using volatile */
263static inline void ctrl_outl(const unsigned int b, unsigned long addr)
264{
265 *(volatile unsigned long *) addr = b;
266}
267
268/* Get high hex bits */
269static char highhex(const int x)
270{
271 return hexchars[(x >> 4) & 0xf];
272}
273
274/* Get low hex bits */
275static char lowhex(const int x)
276{
277 return hexchars[x & 0xf];
278}
279 256
280/* Convert ch to hex */ 257/* Convert ch to hex */
281static int hex(const char ch) 258static int hex(const char ch)
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 6bcd8d92399f..08587cdb64d6 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -29,12 +29,6 @@ extern const unsigned char relocate_new_kernel[];
29extern const unsigned int relocate_new_kernel_size; 29extern const unsigned int relocate_new_kernel_size;
30extern void *gdb_vbr_vector; 30extern void *gdb_vbr_vector;
31 31
32/*
33 * Provide a dummy crash_notes definition while crash dump arrives to ppc.
34 * This prevents breakage of crash_notes attribute in kernel/ksysfs.c.
35 */
36void *crash_notes = NULL;
37
38void machine_shutdown(void) 32void machine_shutdown(void)
39{ 33{
40} 34}
diff --git a/arch/sh/kernel/pm.c b/arch/sh/kernel/pm.c
new file mode 100644
index 000000000000..10ab62c9aede
--- /dev/null
+++ b/arch/sh/kernel/pm.c
@@ -0,0 +1,88 @@
1/*
2 * Generic Power Management Routine
3 *
4 * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License.
8 */
9#include <linux/suspend.h>
10#include <linux/delay.h>
11#include <linux/gfp.h>
12#include <asm/freq.h>
13#include <asm/io.h>
14#include <asm/watchdog.h>
15#include <asm/pm.h>
16
17#define INTR_OFFSET 0x600
18
19#define STBCR 0xffffff82
20#define STBCR2 0xffffff88
21
22#define STBCR_STBY 0x80
23#define STBCR_MSTP2 0x04
24
25#define MCR 0xffffff68
26#define RTCNT 0xffffff70
27
28#define MCR_RMODE 2
29#define MCR_RFSH 4
30
31void pm_enter(void)
32{
33 u8 stbcr, csr;
34 u16 frqcr, mcr;
35 u32 vbr_new, vbr_old;
36
37 set_bl_bit();
38
39 /* set wdt */
40 csr = sh_wdt_read_csr();
41 csr &= ~WTCSR_TME;
42 csr |= WTCSR_CKS_4096;
43 sh_wdt_write_csr(csr);
44 csr = sh_wdt_read_csr();
45 sh_wdt_write_cnt(0);
46
47 /* disable PLL1 */
48 frqcr = ctrl_inw(FRQCR);
49 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
50 ctrl_outw(frqcr, FRQCR);
51
52 /* enable standby */
53 stbcr = ctrl_inb(STBCR);
54 ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
55
56 /* set self-refresh */
57 mcr = ctrl_inw(MCR);
58 ctrl_outw(mcr & ~MCR_RFSH, MCR);
59
60 /* set interrupt handler */
61 asm volatile("stc vbr, %0" : "=r" (vbr_old));
62 vbr_new = get_zeroed_page(GFP_ATOMIC);
63 udelay(50);
64 memcpy((void*)(vbr_new + INTR_OFFSET),
65 &wakeup_start, &wakeup_end - &wakeup_start);
66 asm volatile("ldc %0, vbr" : : "r" (vbr_new));
67
68 ctrl_outw(0, RTCNT);
69 ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
70
71 cpu_sleep();
72
73 asm volatile("ldc %0, vbr" : : "r" (vbr_old));
74
75 free_page(vbr_new);
76
77 /* enable PLL1 */
78 frqcr = ctrl_inw(FRQCR);
79 frqcr |= FRQCR_PSTBY;
80 ctrl_outw(frqcr, FRQCR);
81 udelay(50);
82 frqcr |= FRQCR_PLLEN;
83 ctrl_outw(frqcr, FRQCR);
84
85 ctrl_outb(stbcr, STBCR);
86
87 clear_bl_bit();
88}
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index f2031314cb2b..0b1d5dd7a93b 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -81,16 +81,6 @@ void cpu_idle(void)
81 81
82void machine_restart(char * __unused) 82void machine_restart(char * __unused)
83{ 83{
84
85#ifdef CONFIG_KEXEC
86 struct kimage *image;
87 image = xchg(&kexec_image, 0);
88 if (image) {
89 machine_shutdown();
90 machine_kexec(image);
91 }
92#endif
93
94 /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ 84 /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
95 asm volatile("ldc %0, sr\n\t" 85 asm volatile("ldc %0, sr\n\t"
96 "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); 86 "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
@@ -263,6 +253,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
263 unsigned long unused, 253 unsigned long unused,
264 struct task_struct *p, struct pt_regs *regs) 254 struct task_struct *p, struct pt_regs *regs)
265{ 255{
256 struct thread_info *ti = task_thread_info(p);
266 struct pt_regs *childregs; 257 struct pt_regs *childregs;
267#if defined(CONFIG_SH_FPU) 258#if defined(CONFIG_SH_FPU)
268 struct task_struct *tsk = current; 259 struct task_struct *tsk = current;
@@ -277,8 +268,10 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
277 268
278 if (user_mode(regs)) { 269 if (user_mode(regs)) {
279 childregs->regs[15] = usp; 270 childregs->regs[15] = usp;
271 ti->addr_limit = USER_DS;
280 } else { 272 } else {
281 childregs->regs[15] = (unsigned long)task_stack_page(p) + THREAD_SIZE; 273 childregs->regs[15] = (unsigned long)task_stack_page(p) + THREAD_SIZE;
274 ti->addr_limit = KERNEL_DS;
282 } 275 }
283 if (clone_flags & CLONE_SETTLS) { 276 if (clone_flags & CLONE_SETTLS) {
284 childregs->gbr = childregs->regs[0]; 277 childregs->gbr = childregs->regs[0];
@@ -299,13 +292,15 @@ ubc_set_tracing(int asid, unsigned long pc)
299{ 292{
300 ctrl_outl(pc, UBC_BARA); 293 ctrl_outl(pc, UBC_BARA);
301 294
295#ifdef CONFIG_MMU
302 /* We don't have any ASID settings for the SH-2! */ 296 /* We don't have any ASID settings for the SH-2! */
303 if (cpu_data->type != CPU_SH7604) 297 if (cpu_data->type != CPU_SH7604)
304 ctrl_outb(asid, UBC_BASRA); 298 ctrl_outb(asid, UBC_BASRA);
299#endif
305 300
306 ctrl_outl(0, UBC_BAMRA); 301 ctrl_outl(0, UBC_BAMRA);
307 302
308 if (cpu_data->type == CPU_SH7729) { 303 if (cpu_data->type == CPU_SH7729 || cpu_data->type == CPU_SH7710) {
309 ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA); 304 ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
310 ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR); 305 ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR);
311 } else { 306 } else {
@@ -344,6 +339,7 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
344 } 339 }
345#endif 340#endif
346 341
342#ifdef CONFIG_MMU
347 /* 343 /*
348 * Restore the kernel mode register 344 * Restore the kernel mode register
349 * k7 (r7_bank1) 345 * k7 (r7_bank1)
@@ -351,19 +347,21 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
351 asm volatile("ldc %0, r7_bank" 347 asm volatile("ldc %0, r7_bank"
352 : /* no output */ 348 : /* no output */
353 : "r" (task_thread_info(next))); 349 : "r" (task_thread_info(next)));
350#endif
354 351
355#ifdef CONFIG_MMU
356 /* If no tasks are using the UBC, we're done */ 352 /* If no tasks are using the UBC, we're done */
357 if (ubc_usercnt == 0) 353 if (ubc_usercnt == 0)
358 /* If no tasks are using the UBC, we're done */; 354 /* If no tasks are using the UBC, we're done */;
359 else if (next->thread.ubc_pc && next->mm) { 355 else if (next->thread.ubc_pc && next->mm) {
360 ubc_set_tracing(next->mm->context & MMU_CONTEXT_ASID_MASK, 356 int asid = 0;
361 next->thread.ubc_pc); 357#ifdef CONFIG_MMU
358 asid |= next->mm->context.id & MMU_CONTEXT_ASID_MASK;
359#endif
360 ubc_set_tracing(asid, next->thread.ubc_pc);
362 } else { 361 } else {
363 ctrl_outw(0, UBC_BBRA); 362 ctrl_outw(0, UBC_BBRA);
364 ctrl_outw(0, UBC_BBRB); 363 ctrl_outw(0, UBC_BBRB);
365 } 364 }
366#endif
367 365
368 return prev; 366 return prev;
369} 367}
diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace.c
index f7eebbde3291..04ca13a041c1 100644
--- a/arch/sh/kernel/ptrace.c
+++ b/arch/sh/kernel/ptrace.c
@@ -224,7 +224,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
224 224
225 case PTRACE_SETDSPREGS: { 225 case PTRACE_SETDSPREGS: {
226 unsigned long dp; 226 unsigned long dp;
227 int i;
228 227
229 ret = -EIO; 228 ret = -EIO;
230 dp = ((unsigned long) child) + THREAD_SIZE - 229 dp = ((unsigned long) child) + THREAD_SIZE -
diff --git a/arch/sh/kernel/semaphore.c b/arch/sh/kernel/semaphore.c
index a3c24dcbf01d..184119eeae56 100644
--- a/arch/sh/kernel/semaphore.c
+++ b/arch/sh/kernel/semaphore.c
@@ -14,7 +14,7 @@
14#include <asm/semaphore.h> 14#include <asm/semaphore.h>
15#include <asm/semaphore-helper.h> 15#include <asm/semaphore-helper.h>
16 16
17spinlock_t semaphore_wake_lock; 17DEFINE_SPINLOCK(semaphore_wake_lock);
18 18
19/* 19/*
20 * Semaphores are implemented using a two-way counter: 20 * Semaphores are implemented using a two-way counter:
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index e75189cb1db7..5f587332234a 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -43,27 +43,14 @@ extern void * __rd_start, * __rd_end;
43 * The bigger value means no problem. 43 * The bigger value means no problem.
44 */ 44 */
45struct sh_cpuinfo boot_cpu_data = { CPU_SH_NONE, 10000000, }; 45struct sh_cpuinfo boot_cpu_data = { CPU_SH_NONE, 10000000, };
46#ifdef CONFIG_VT
46struct screen_info screen_info; 47struct screen_info screen_info;
48#endif
47 49
48#if defined(CONFIG_SH_UNKNOWN) 50#if defined(CONFIG_SH_UNKNOWN)
49struct sh_machine_vector sh_mv; 51struct sh_machine_vector sh_mv;
50#endif 52#endif
51 53
52/* We need this to satisfy some external references. */
53struct screen_info screen_info = {
54 0, 25, /* orig-x, orig-y */
55 0, /* unused */
56 0, /* orig-video-page */
57 0, /* orig-video-mode */
58 80, /* orig-video-cols */
59 0,0,0, /* ega_ax, ega_bx, ega_cx */
60 25, /* orig-video-lines */
61 0, /* orig-video-isVGA */
62 16 /* orig-video-points */
63};
64
65extern void platform_setup(void);
66extern char *get_system_type(void);
67extern int root_mountflags; 54extern int root_mountflags;
68 55
69#define MV_NAME_SIZE 32 56#define MV_NAME_SIZE 32
@@ -90,29 +77,8 @@ static struct sh_machine_vector* __init get_mv_byname(const char* name);
90 77
91static char command_line[COMMAND_LINE_SIZE] = { 0, }; 78static char command_line[COMMAND_LINE_SIZE] = { 0, };
92 79
93struct resource standard_io_resources[] = { 80static struct resource code_resource = { .name = "Kernel code", };
94 { "dma1", 0x00, 0x1f }, 81static struct resource data_resource = { .name = "Kernel data", };
95 { "pic1", 0x20, 0x3f },
96 { "timer", 0x40, 0x5f },
97 { "keyboard", 0x60, 0x6f },
98 { "dma page reg", 0x80, 0x8f },
99 { "pic2", 0xa0, 0xbf },
100 { "dma2", 0xc0, 0xdf },
101 { "fpu", 0xf0, 0xff }
102};
103
104#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource))
105
106/* System RAM - interrupted by the 640kB-1M hole */
107#define code_resource (ram_resources[3])
108#define data_resource (ram_resources[4])
109static struct resource ram_resources[] = {
110 { "System RAM", 0x000000, 0x09ffff, IORESOURCE_BUSY },
111 { "System RAM", 0x100000, 0x100000, IORESOURCE_BUSY },
112 { "Video RAM area", 0x0a0000, 0x0bffff },
113 { "Kernel code", 0x100000, 0 },
114 { "Kernel data", 0, 0 }
115};
116 82
117unsigned long memory_start, memory_end; 83unsigned long memory_start, memory_end;
118 84
@@ -145,6 +111,24 @@ static inline void parse_cmdline (char ** cmdline_p, char mv_name[MV_NAME_SIZE],
145 memory_end = memory_start + mem_size; 111 memory_end = memory_start + mem_size;
146 } 112 }
147 } 113 }
114
115#ifdef CONFIG_EARLY_PRINTK
116 if (c == ' ' && !memcmp(from, "earlyprintk=", 12)) {
117 char *ep_end;
118
119 if (to != command_line)
120 to--;
121
122 from += 12;
123 ep_end = strchr(from, ' ');
124
125 setup_early_printk(from);
126 printk("early console enabled\n");
127
128 from = ep_end;
129 }
130#endif
131
148 if (c == ' ' && !memcmp(from, "sh_mv=", 6)) { 132 if (c == ' ' && !memcmp(from, "sh_mv=", 6)) {
149 char* mv_end; 133 char* mv_end;
150 char* mv_comma; 134 char* mv_comma;
@@ -237,6 +221,9 @@ static int __init sh_mv_setup(char **cmdline_p)
237 __set_io_port_base(mv_io_base); 221 __set_io_port_base(mv_io_base);
238#endif 222#endif
239 223
224 if (!sh_mv.mv_nr_irqs)
225 sh_mv.mv_nr_irqs = NR_IRQS;
226
240 return 0; 227 return 0;
241} 228}
242 229
@@ -245,11 +232,6 @@ void __init setup_arch(char **cmdline_p)
245 unsigned long bootmap_size; 232 unsigned long bootmap_size;
246 unsigned long start_pfn, max_pfn, max_low_pfn; 233 unsigned long start_pfn, max_pfn, max_low_pfn;
247 234
248#ifdef CONFIG_EARLY_PRINTK
249 extern void enable_early_printk(void);
250
251 enable_early_printk();
252#endif
253#ifdef CONFIG_CMDLINE_BOOL 235#ifdef CONFIG_CMDLINE_BOOL
254 strcpy(COMMAND_LINE, CONFIG_CMDLINE); 236 strcpy(COMMAND_LINE, CONFIG_CMDLINE);
255#endif 237#endif
@@ -368,14 +350,14 @@ void __init setup_arch(char **cmdline_p)
368#endif 350#endif
369 351
370 /* Perform the machine specific initialisation */ 352 /* Perform the machine specific initialisation */
371 platform_setup(); 353 if (likely(sh_mv.mv_setup))
354 sh_mv.mv_setup(cmdline_p);
372 355
373 paging_init(); 356 paging_init();
374} 357}
375 358
376struct sh_machine_vector* __init get_mv_byname(const char* name) 359struct sh_machine_vector* __init get_mv_byname(const char* name)
377{ 360{
378 extern int strcasecmp(const char *, const char *);
379 extern long __machvec_start, __machvec_end; 361 extern long __machvec_start, __machvec_end;
380 struct sh_machine_vector *all_vecs = 362 struct sh_machine_vector *all_vecs =
381 (struct sh_machine_vector *)&__machvec_start; 363 (struct sh_machine_vector *)&__machvec_start;
@@ -410,25 +392,18 @@ static int __init topology_init(void)
410subsys_initcall(topology_init); 392subsys_initcall(topology_init);
411 393
412static const char *cpu_name[] = { 394static const char *cpu_name[] = {
413 [CPU_SH7604] = "SH7604", 395 [CPU_SH7604] = "SH7604", [CPU_SH7300] = "SH7300",
414 [CPU_SH7705] = "SH7705", 396 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
415 [CPU_SH7708] = "SH7708", 397 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
416 [CPU_SH7729] = "SH7729", 398 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
417 [CPU_SH7300] = "SH7300", 399 [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750",
418 [CPU_SH7750] = "SH7750", 400 [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R",
419 [CPU_SH7750S] = "SH7750S", 401 [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R",
420 [CPU_SH7750R] = "SH7750R", 402 [CPU_SH7760] = "SH7760", [CPU_SH73180] = "SH73180",
421 [CPU_SH7751] = "SH7751", 403 [CPU_ST40RA] = "ST40RA", [CPU_ST40GX1] = "ST40GX1",
422 [CPU_SH7751R] = "SH7751R", 404 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
423 [CPU_SH7760] = "SH7760", 405 [CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780",
424 [CPU_SH73180] = "SH73180", 406 [CPU_SH7781] = "SH7781", [CPU_SH7343] = "SH7343",
425 [CPU_ST40RA] = "ST40RA",
426 [CPU_ST40GX1] = "ST40GX1",
427 [CPU_SH4_202] = "SH4-202",
428 [CPU_SH4_501] = "SH4-501",
429 [CPU_SH7770] = "SH7770",
430 [CPU_SH7780] = "SH7780",
431 [CPU_SH7781] = "SH7781",
432 [CPU_SH_NONE] = "Unknown" 407 [CPU_SH_NONE] = "Unknown"
433}; 408};
434 409
@@ -438,8 +413,10 @@ const char *get_cpu_subtype(void)
438} 413}
439 414
440#ifdef CONFIG_PROC_FS 415#ifdef CONFIG_PROC_FS
416/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
441static const char *cpu_flags[] = { 417static const char *cpu_flags[] = {
442 "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", "ptea", NULL 418 "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
419 "ptea", "llsc", "l2", NULL
443}; 420};
444 421
445static void show_cpuflags(struct seq_file *m) 422static void show_cpuflags(struct seq_file *m)
@@ -460,7 +437,8 @@ static void show_cpuflags(struct seq_file *m)
460 seq_printf(m, "\n"); 437 seq_printf(m, "\n");
461} 438}
462 439
463static void show_cacheinfo(struct seq_file *m, const char *type, struct cache_info info) 440static void show_cacheinfo(struct seq_file *m, const char *type,
441 struct cache_info info)
464{ 442{
465 unsigned int cache_size; 443 unsigned int cache_size;
466 444
@@ -493,7 +471,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
493 * unified cache on the SH-2 and SH-3, as well as the harvard 471 * unified cache on the SH-2 and SH-3, as well as the harvard
494 * style cache on the SH-4. 472 * style cache on the SH-4.
495 */ 473 */
496 if (test_bit(SH_CACHE_COMBINED, &(boot_cpu_data.icache.flags))) { 474 if (boot_cpu_data.icache.flags & SH_CACHE_COMBINED) {
497 seq_printf(m, "unified\n"); 475 seq_printf(m, "unified\n");
498 show_cacheinfo(m, "cache", boot_cpu_data.icache); 476 show_cacheinfo(m, "cache", boot_cpu_data.icache);
499 } else { 477 } else {
@@ -502,6 +480,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
502 show_cacheinfo(m, "dcache", boot_cpu_data.dcache); 480 show_cacheinfo(m, "dcache", boot_cpu_data.dcache);
503 } 481 }
504 482
483 /* Optional secondary cache */
484 if (boot_cpu_data.flags & CPU_HAS_L2_CACHE)
485 show_cacheinfo(m, "scache", boot_cpu_data.scache);
486
505 seq_printf(m, "bogomips\t: %lu.%02lu\n", 487 seq_printf(m, "bogomips\t: %lu.%02lu\n",
506 boot_cpu_data.loops_per_jiffy/(500000/HZ), 488 boot_cpu_data.loops_per_jiffy/(500000/HZ),
507 (boot_cpu_data.loops_per_jiffy/(5000/HZ)) % 100); 489 (boot_cpu_data.loops_per_jiffy/(5000/HZ)) % 100);
@@ -617,4 +599,3 @@ static int __init kgdb_parse_options(char *options)
617} 599}
618__setup("kgdb=", kgdb_parse_options); 600__setup("kgdb=", kgdb_parse_options);
619#endif /* CONFIG_SH_KGDB */ 601#endif /* CONFIG_SH_KGDB */
620
diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c
index 245ed8f945e8..d3cbfa2ad4a7 100644
--- a/arch/sh/kernel/sh_ksyms.c
+++ b/arch/sh/kernel/sh_ksyms.c
@@ -27,21 +27,11 @@ EXPORT_SYMBOL(sh_mv);
27 27
28/* platform dependent support */ 28/* platform dependent support */
29EXPORT_SYMBOL(dump_fpu); 29EXPORT_SYMBOL(dump_fpu);
30EXPORT_SYMBOL(iounmap);
31EXPORT_SYMBOL(enable_irq);
32EXPORT_SYMBOL(disable_irq);
33EXPORT_SYMBOL(probe_irq_mask);
34EXPORT_SYMBOL(kernel_thread); 30EXPORT_SYMBOL(kernel_thread);
35EXPORT_SYMBOL(disable_irq_nosync);
36EXPORT_SYMBOL(irq_desc); 31EXPORT_SYMBOL(irq_desc);
37EXPORT_SYMBOL(no_irq_type); 32EXPORT_SYMBOL(no_irq_type);
38 33
39EXPORT_SYMBOL(strstr);
40EXPORT_SYMBOL(strlen); 34EXPORT_SYMBOL(strlen);
41EXPORT_SYMBOL(strnlen);
42EXPORT_SYMBOL(strchr);
43EXPORT_SYMBOL(strcat);
44EXPORT_SYMBOL(strncat);
45 35
46/* PCI exports */ 36/* PCI exports */
47#ifdef CONFIG_PCI 37#ifdef CONFIG_PCI
@@ -52,13 +42,8 @@ EXPORT_SYMBOL(pci_free_consistent);
52/* mem exports */ 42/* mem exports */
53EXPORT_SYMBOL(memchr); 43EXPORT_SYMBOL(memchr);
54EXPORT_SYMBOL(memcpy); 44EXPORT_SYMBOL(memcpy);
55EXPORT_SYMBOL(memcpy_fromio);
56EXPORT_SYMBOL(memcpy_toio);
57EXPORT_SYMBOL(memset); 45EXPORT_SYMBOL(memset);
58EXPORT_SYMBOL(memset_io);
59EXPORT_SYMBOL(memmove); 46EXPORT_SYMBOL(memmove);
60EXPORT_SYMBOL(memcmp);
61EXPORT_SYMBOL(memscan);
62EXPORT_SYMBOL(__copy_user); 47EXPORT_SYMBOL(__copy_user);
63EXPORT_SYMBOL(boot_cpu_data); 48EXPORT_SYMBOL(boot_cpu_data);
64 49
@@ -94,7 +79,9 @@ EXPORT_SYMBOL(strcpy);
94DECLARE_EXPORT(__movstr_i4_even); 79DECLARE_EXPORT(__movstr_i4_even);
95DECLARE_EXPORT(__movstr_i4_odd); 80DECLARE_EXPORT(__movstr_i4_odd);
96DECLARE_EXPORT(__movstrSI12_i4); 81DECLARE_EXPORT(__movstrSI12_i4);
82#endif
97 83
84#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
98/* needed by some modules */ 85/* needed by some modules */
99EXPORT_SYMBOL(flush_cache_all); 86EXPORT_SYMBOL(flush_cache_all);
100EXPORT_SYMBOL(flush_cache_range); 87EXPORT_SYMBOL(flush_cache_range);
@@ -102,11 +89,9 @@ EXPORT_SYMBOL(flush_dcache_page);
102EXPORT_SYMBOL(__flush_purge_region); 89EXPORT_SYMBOL(__flush_purge_region);
103#endif 90#endif
104 91
105#if defined(CONFIG_SH7705_CACHE_32KB) 92#if defined(CONFIG_MMU) && (defined(CONFIG_CPU_SH4) || \
106EXPORT_SYMBOL(flush_cache_all); 93 defined(CONFIG_SH7705_CACHE_32KB))
107EXPORT_SYMBOL(flush_cache_range); 94EXPORT_SYMBOL(clear_user_page);
108EXPORT_SYMBOL(flush_dcache_page);
109EXPORT_SYMBOL(__flush_purge_region);
110#endif 95#endif
111 96
112EXPORT_SYMBOL(flush_tlb_page); 97EXPORT_SYMBOL(flush_tlb_page);
@@ -116,7 +101,12 @@ EXPORT_SYMBOL(__down_trylock);
116EXPORT_SYMBOL(synchronize_irq); 101EXPORT_SYMBOL(synchronize_irq);
117#endif 102#endif
118 103
104#ifdef CONFIG_PM
105EXPORT_SYMBOL(pm_suspend);
106#endif
107
119EXPORT_SYMBOL(csum_partial); 108EXPORT_SYMBOL(csum_partial);
109#ifdef CONFIG_IPV6
120EXPORT_SYMBOL(csum_ipv6_magic); 110EXPORT_SYMBOL(csum_ipv6_magic);
121EXPORT_SYMBOL(consistent_sync); 111#endif
122EXPORT_SYMBOL(clear_page); 112EXPORT_SYMBOL(clear_page);
diff --git a/arch/sh/kernel/signal.c b/arch/sh/kernel/signal.c
index b475c4d2405f..5213f5bc6ce0 100644
--- a/arch/sh/kernel/signal.c
+++ b/arch/sh/kernel/signal.c
@@ -8,7 +8,6 @@
8 * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima 8 * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
9 * 9 *
10 */ 10 */
11
12#include <linux/sched.h> 11#include <linux/sched.h>
13#include <linux/mm.h> 12#include <linux/mm.h>
14#include <linux/smp.h> 13#include <linux/smp.h>
@@ -21,6 +20,7 @@
21#include <linux/unistd.h> 20#include <linux/unistd.h>
22#include <linux/stddef.h> 21#include <linux/stddef.h>
23#include <linux/tty.h> 22#include <linux/tty.h>
23#include <linux/elf.h>
24#include <linux/personality.h> 24#include <linux/personality.h>
25#include <linux/binfmts.h> 25#include <linux/binfmts.h>
26 26
@@ -29,12 +29,8 @@
29#include <asm/pgtable.h> 29#include <asm/pgtable.h>
30#include <asm/cacheflush.h> 30#include <asm/cacheflush.h>
31 31
32#define DEBUG_SIG 0
33
34#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 32#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
35 33
36asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset);
37
38/* 34/*
39 * Atomically swap in the new signal mask, and wait for a signal. 35 * Atomically swap in the new signal mask, and wait for a signal.
40 */ 36 */
@@ -43,51 +39,17 @@ sys_sigsuspend(old_sigset_t mask,
43 unsigned long r5, unsigned long r6, unsigned long r7, 39 unsigned long r5, unsigned long r6, unsigned long r7,
44 struct pt_regs regs) 40 struct pt_regs regs)
45{ 41{
46 sigset_t saveset;
47
48 mask &= _BLOCKABLE; 42 mask &= _BLOCKABLE;
49 spin_lock_irq(&current->sighand->siglock); 43 spin_lock_irq(&current->sighand->siglock);
50 saveset = current->blocked; 44 current->saved_sigmask = current->blocked;
51 siginitset(&current->blocked, mask); 45 siginitset(&current->blocked, mask);
52 recalc_sigpending(); 46 recalc_sigpending();
53 spin_unlock_irq(&current->sighand->siglock); 47 spin_unlock_irq(&current->sighand->siglock);
54 48
55 regs.regs[0] = -EINTR; 49 current->state = TASK_INTERRUPTIBLE;
56 while (1) { 50 schedule();
57 current->state = TASK_INTERRUPTIBLE; 51 set_thread_flag(TIF_RESTORE_SIGMASK);
58 schedule(); 52 return -ERESTARTNOHAND;
59 if (do_signal(&regs, &saveset))
60 return -EINTR;
61 }
62}
63
64asmlinkage int
65sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize,
66 unsigned long r6, unsigned long r7,
67 struct pt_regs regs)
68{
69 sigset_t saveset, newset;
70
71 /* XXX: Don't preclude handling different sized sigset_t's. */
72 if (sigsetsize != sizeof(sigset_t))
73 return -EINVAL;
74
75 if (copy_from_user(&newset, unewset, sizeof(newset)))
76 return -EFAULT;
77 sigdelsetmask(&newset, ~_BLOCKABLE);
78 spin_lock_irq(&current->sighand->siglock);
79 saveset = current->blocked;
80 current->blocked = newset;
81 recalc_sigpending();
82 spin_unlock_irq(&current->sighand->siglock);
83
84 regs.regs[0] = -EINTR;
85 while (1) {
86 current->state = TASK_INTERRUPTIBLE;
87 schedule();
88 if (do_signal(&regs, &saveset))
89 return -EINTR;
90 }
91} 53}
92 54
93asmlinkage int 55asmlinkage int
@@ -348,7 +310,12 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
348 return (void __user *)((sp - frame_size) & -8ul); 310 return (void __user *)((sp - frame_size) & -8ul);
349} 311}
350 312
351static void setup_frame(int sig, struct k_sigaction *ka, 313/* These symbols are defined with the addresses in the vsyscall page.
314 See vsyscall-trapa.S. */
315extern void __user __kernel_sigreturn;
316extern void __user __kernel_rt_sigreturn;
317
318static int setup_frame(int sig, struct k_sigaction *ka,
352 sigset_t *set, struct pt_regs *regs) 319 sigset_t *set, struct pt_regs *regs)
353{ 320{
354 struct sigframe __user *frame; 321 struct sigframe __user *frame;
@@ -368,15 +335,18 @@ static void setup_frame(int sig, struct k_sigaction *ka,
368 335
369 err |= setup_sigcontext(&frame->sc, regs, set->sig[0]); 336 err |= setup_sigcontext(&frame->sc, regs, set->sig[0]);
370 337
371 if (_NSIG_WORDS > 1) { 338 if (_NSIG_WORDS > 1)
372 err |= __copy_to_user(frame->extramask, &set->sig[1], 339 err |= __copy_to_user(frame->extramask, &set->sig[1],
373 sizeof(frame->extramask)); 340 sizeof(frame->extramask));
374 }
375 341
376 /* Set up to return from userspace. If provided, use a stub 342 /* Set up to return from userspace. If provided, use a stub
377 already in userspace. */ 343 already in userspace. */
378 if (ka->sa.sa_flags & SA_RESTORER) { 344 if (ka->sa.sa_flags & SA_RESTORER) {
379 regs->pr = (unsigned long) ka->sa.sa_restorer; 345 regs->pr = (unsigned long) ka->sa.sa_restorer;
346#ifdef CONFIG_VSYSCALL
347 } else if (likely(current->mm->context.vdso)) {
348 regs->pr = VDSO_SYM(&__kernel_sigreturn);
349#endif
380 } else { 350 } else {
381 /* Generate return code (system call to sigreturn) */ 351 /* Generate return code (system call to sigreturn) */
382 err |= __put_user(MOVW(7), &frame->retcode[0]); 352 err |= __put_user(MOVW(7), &frame->retcode[0]);
@@ -402,21 +372,22 @@ static void setup_frame(int sig, struct k_sigaction *ka,
402 372
403 set_fs(USER_DS); 373 set_fs(USER_DS);
404 374
405#if DEBUG_SIG 375 pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
406 printk("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", 376 current->comm, current->pid, frame, regs->pc, regs->pr);
407 current->comm, current->pid, frame, regs->pc, regs->pr);
408#endif
409 377
410 flush_cache_sigtramp(regs->pr); 378 flush_cache_sigtramp(regs->pr);
379
411 if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) 380 if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode))
412 flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); 381 flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES);
413 return; 382
383 return 0;
414 384
415give_sigsegv: 385give_sigsegv:
416 force_sigsegv(sig, current); 386 force_sigsegv(sig, current);
387 return -EFAULT;
417} 388}
418 389
419static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, 390static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
420 sigset_t *set, struct pt_regs *regs) 391 sigset_t *set, struct pt_regs *regs)
421{ 392{
422 struct rt_sigframe __user *frame; 393 struct rt_sigframe __user *frame;
@@ -452,6 +423,10 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
452 already in userspace. */ 423 already in userspace. */
453 if (ka->sa.sa_flags & SA_RESTORER) { 424 if (ka->sa.sa_flags & SA_RESTORER) {
454 regs->pr = (unsigned long) ka->sa.sa_restorer; 425 regs->pr = (unsigned long) ka->sa.sa_restorer;
426#ifdef CONFIG_VSYSCALL
427 } else if (likely(current->mm->context.vdso)) {
428 regs->pr = VDSO_SYM(&__kernel_rt_sigreturn);
429#endif
455 } else { 430 } else {
456 /* Generate return code (system call to rt_sigreturn) */ 431 /* Generate return code (system call to rt_sigreturn) */
457 err |= __put_user(MOVW(7), &frame->retcode[0]); 432 err |= __put_user(MOVW(7), &frame->retcode[0]);
@@ -477,28 +452,31 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
477 452
478 set_fs(USER_DS); 453 set_fs(USER_DS);
479 454
480#if DEBUG_SIG 455 pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
481 printk("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", 456 current->comm, current->pid, frame, regs->pc, regs->pr);
482 current->comm, current->pid, frame, regs->pc, regs->pr);
483#endif
484 457
485 flush_cache_sigtramp(regs->pr); 458 flush_cache_sigtramp(regs->pr);
459
486 if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) 460 if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode))
487 flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); 461 flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES);
488 return; 462
463 return 0;
489 464
490give_sigsegv: 465give_sigsegv:
491 force_sigsegv(sig, current); 466 force_sigsegv(sig, current);
467 return -EFAULT;
492} 468}
493 469
494/* 470/*
495 * OK, we're invoking a handler 471 * OK, we're invoking a handler
496 */ 472 */
497 473
498static void 474static int
499handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, 475handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
500 sigset_t *oldset, struct pt_regs *regs) 476 sigset_t *oldset, struct pt_regs *regs)
501{ 477{
478 int ret;
479
502 /* Are we from a system call? */ 480 /* Are we from a system call? */
503 if (regs->tra >= 0) { 481 if (regs->tra >= 0) {
504 /* If so, check system call restarting.. */ 482 /* If so, check system call restarting.. */
@@ -539,19 +517,23 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
539 517
540 /* Set up the stack frame */ 518 /* Set up the stack frame */
541 if (ka->sa.sa_flags & SA_SIGINFO) 519 if (ka->sa.sa_flags & SA_SIGINFO)
542 setup_rt_frame(sig, ka, info, oldset, regs); 520 ret = setup_rt_frame(sig, ka, info, oldset, regs);
543 else 521 else
544 setup_frame(sig, ka, oldset, regs); 522 ret = setup_frame(sig, ka, oldset, regs);
545 523
546 if (ka->sa.sa_flags & SA_ONESHOT) 524 if (ka->sa.sa_flags & SA_ONESHOT)
547 ka->sa.sa_handler = SIG_DFL; 525 ka->sa.sa_handler = SIG_DFL;
548 526
549 spin_lock_irq(&current->sighand->siglock); 527 if (ret == 0) {
550 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 528 spin_lock_irq(&current->sighand->siglock);
551 if (!(ka->sa.sa_flags & SA_NODEFER)) 529 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
552 sigaddset(&current->blocked,sig); 530 if (!(ka->sa.sa_flags & SA_NODEFER))
553 recalc_sigpending(); 531 sigaddset(&current->blocked,sig);
554 spin_unlock_irq(&current->sighand->siglock); 532 recalc_sigpending();
533 spin_unlock_irq(&current->sighand->siglock);
534 }
535
536 return ret;
555} 537}
556 538
557/* 539/*
@@ -563,11 +545,12 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
563 * the kernel can handle, and then we build all the user-level signal handling 545 * the kernel can handle, and then we build all the user-level signal handling
564 * stack-frames in one go after that. 546 * stack-frames in one go after that.
565 */ 547 */
566int do_signal(struct pt_regs *regs, sigset_t *oldset) 548static void do_signal(struct pt_regs *regs, unsigned int save_r0)
567{ 549{
568 siginfo_t info; 550 siginfo_t info;
569 int signr; 551 int signr;
570 struct k_sigaction ka; 552 struct k_sigaction ka;
553 sigset_t *oldset;
571 554
572 /* 555 /*
573 * We want the common case to go fast, which 556 * We want the common case to go fast, which
@@ -576,19 +559,27 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset)
576 * if so. 559 * if so.
577 */ 560 */
578 if (!user_mode(regs)) 561 if (!user_mode(regs))
579 return 1; 562 return;
580 563
581 if (try_to_freeze()) 564 if (try_to_freeze())
582 goto no_signal; 565 goto no_signal;
583 566
584 if (!oldset) 567 if (test_thread_flag(TIF_RESTORE_SIGMASK))
568 oldset = &current->saved_sigmask;
569 else
585 oldset = &current->blocked; 570 oldset = &current->blocked;
586 571
587 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 572 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
588 if (signr > 0) { 573 if (signr > 0) {
589 /* Whee! Actually deliver the signal. */ 574 /* Whee! Actually deliver the signal. */
590 handle_signal(signr, &ka, &info, oldset, regs); 575 if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
591 return 1; 576 /* a signal was successfully delivered; the saved
577 * sigmask will have been stored in the signal frame,
578 * and will be restored by sigreturn, so we can simply
579 * clear the TIF_RESTORE_SIGMASK flag */
580 if (test_thread_flag(TIF_RESTORE_SIGMASK))
581 clear_thread_flag(TIF_RESTORE_SIGMASK);
582 }
592 } 583 }
593 584
594 no_signal: 585 no_signal:
@@ -597,10 +588,27 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset)
597 /* Restart the system call - no handlers present */ 588 /* Restart the system call - no handlers present */
598 if (regs->regs[0] == -ERESTARTNOHAND || 589 if (regs->regs[0] == -ERESTARTNOHAND ||
599 regs->regs[0] == -ERESTARTSYS || 590 regs->regs[0] == -ERESTARTSYS ||
600 regs->regs[0] == -ERESTARTNOINTR || 591 regs->regs[0] == -ERESTARTNOINTR) {
601 regs->regs[0] == -ERESTART_RESTARTBLOCK) { 592 regs->regs[0] = save_r0;
593 regs->pc -= 2;
594 } else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) {
602 regs->pc -= 2; 595 regs->pc -= 2;
596 regs->regs[3] = __NR_restart_syscall;
603 } 597 }
604 } 598 }
605 return 0; 599
600 /* if there's no signal to deliver, we just put the saved sigmask
601 * back */
602 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
603 clear_thread_flag(TIF_RESTORE_SIGMASK);
604 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
605 }
606}
607
608asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0,
609 __u32 thread_info_flags)
610{
611 /* deal with pending signal delivery */
612 if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
613 do_signal(regs, save_r0);
606} 614}
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 917b2f32f260..b68ff705f067 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -21,7 +21,8 @@
21#include <linux/mman.h> 21#include <linux/mman.h>
22#include <linux/file.h> 22#include <linux/file.h>
23#include <linux/utsname.h> 23#include <linux/utsname.h>
24 24#include <linux/module.h>
25#include <asm/cacheflush.h>
25#include <asm/uaccess.h> 26#include <asm/uaccess.h>
26#include <asm/ipc.h> 27#include <asm/ipc.h>
27 28
@@ -44,11 +45,16 @@ asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
44 return error; 45 return error;
45} 46}
46 47
47#if defined(HAVE_ARCH_UNMAPPED_AREA) 48unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
49
50EXPORT_SYMBOL(shm_align_mask);
51
48/* 52/*
49 * To avoid cache alias, we map the shard page with same color. 53 * To avoid cache aliases, we map the shared page with same color.
50 */ 54 */
51#define COLOUR_ALIGN(addr) (((addr)+SHMLBA-1)&~(SHMLBA-1)) 55#define COLOUR_ALIGN(addr, pgoff) \
56 ((((addr) + shm_align_mask) & ~shm_align_mask) + \
57 (((pgoff) << PAGE_SHIFT) & shm_align_mask))
52 58
53unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, 59unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
54 unsigned long len, unsigned long pgoff, unsigned long flags) 60 unsigned long len, unsigned long pgoff, unsigned long flags)
@@ -56,43 +62,52 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
56 struct mm_struct *mm = current->mm; 62 struct mm_struct *mm = current->mm;
57 struct vm_area_struct *vma; 63 struct vm_area_struct *vma;
58 unsigned long start_addr; 64 unsigned long start_addr;
65 int do_colour_align;
59 66
60 if (flags & MAP_FIXED) { 67 if (flags & MAP_FIXED) {
61 /* We do not accept a shared mapping if it would violate 68 /* We do not accept a shared mapping if it would violate
62 * cache aliasing constraints. 69 * cache aliasing constraints.
63 */ 70 */
64 if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1))) 71 if ((flags & MAP_SHARED) && (addr & shm_align_mask))
65 return -EINVAL; 72 return -EINVAL;
66 return addr; 73 return addr;
67 } 74 }
68 75
69 if (len > TASK_SIZE) 76 if (unlikely(len > TASK_SIZE))
70 return -ENOMEM; 77 return -ENOMEM;
71 78
79 do_colour_align = 0;
80 if (filp || (flags & MAP_SHARED))
81 do_colour_align = 1;
82
72 if (addr) { 83 if (addr) {
73 if (flags & MAP_PRIVATE) 84 if (do_colour_align)
74 addr = PAGE_ALIGN(addr); 85 addr = COLOUR_ALIGN(addr, pgoff);
75 else 86 else
76 addr = COLOUR_ALIGN(addr); 87 addr = PAGE_ALIGN(addr);
88
77 vma = find_vma(mm, addr); 89 vma = find_vma(mm, addr);
78 if (TASK_SIZE - len >= addr && 90 if (TASK_SIZE - len >= addr &&
79 (!vma || addr + len <= vma->vm_start)) 91 (!vma || addr + len <= vma->vm_start))
80 return addr; 92 return addr;
81 } 93 }
82 if (len <= mm->cached_hole_size) { 94
95 if (len > mm->cached_hole_size) {
96 start_addr = addr = mm->free_area_cache;
97 } else {
83 mm->cached_hole_size = 0; 98 mm->cached_hole_size = 0;
84 mm->free_area_cache = TASK_UNMAPPED_BASE; 99 start_addr = addr = TASK_UNMAPPED_BASE;
85 } 100 }
86 if (flags & MAP_PRIVATE)
87 addr = PAGE_ALIGN(mm->free_area_cache);
88 else
89 addr = COLOUR_ALIGN(mm->free_area_cache);
90 start_addr = addr;
91 101
92full_search: 102full_search:
103 if (do_colour_align)
104 addr = COLOUR_ALIGN(addr, pgoff);
105 else
106 addr = PAGE_ALIGN(mm->free_area_cache);
107
93 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) { 108 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
94 /* At this point: (!vma || addr < vma->vm_end). */ 109 /* At this point: (!vma || addr < vma->vm_end). */
95 if (TASK_SIZE - len < addr) { 110 if (unlikely(TASK_SIZE - len < addr)) {
96 /* 111 /*
97 * Start a new search - just in case we missed 112 * Start a new search - just in case we missed
98 * some holes. 113 * some holes.
@@ -104,7 +119,7 @@ full_search:
104 } 119 }
105 return -ENOMEM; 120 return -ENOMEM;
106 } 121 }
107 if (!vma || addr + len <= vma->vm_start) { 122 if (likely(!vma || addr + len <= vma->vm_start)) {
108 /* 123 /*
109 * Remember the place where we stopped the search: 124 * Remember the place where we stopped the search:
110 */ 125 */
@@ -115,11 +130,10 @@ full_search:
115 mm->cached_hole_size = vma->vm_start - addr; 130 mm->cached_hole_size = vma->vm_start - addr;
116 131
117 addr = vma->vm_end; 132 addr = vma->vm_end;
118 if (!(flags & MAP_PRIVATE)) 133 if (do_colour_align)
119 addr = COLOUR_ALIGN(addr); 134 addr = COLOUR_ALIGN(addr, pgoff);
120 } 135 }
121} 136}
122#endif
123 137
124static inline long 138static inline long
125do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 139do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S
new file mode 100644
index 000000000000..768334e95075
--- /dev/null
+++ b/arch/sh/kernel/syscalls.S
@@ -0,0 +1,353 @@
1/*
2 * arch/sh/kernel/syscalls.S
3 *
4 * System call table for SuperH
5 *
6 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
7 * Copyright (C) 2003 Paul Mundt
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 *
13 */
14#include <linux/sys.h>
15#include <linux/linkage.h>
16
17#if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE)
18#define sys_nfsservctl sys_ni_syscall
19#endif
20
21#if !defined(CONFIG_MMU)
22#define sys_madvise sys_ni_syscall
23#define sys_readahead sys_ni_syscall
24#define sys_mprotect sys_ni_syscall
25#define sys_msync sys_ni_syscall
26#define sys_mlock sys_ni_syscall
27#define sys_munlock sys_ni_syscall
28#define sys_mlockall sys_ni_syscall
29#define sys_munlockall sys_ni_syscall
30#define sys_mremap sys_ni_syscall
31#define sys_mincore sys_ni_syscall
32#define sys_remap_file_pages sys_ni_syscall
33#endif
34
35 .data
36ENTRY(sys_call_table)
37 .long sys_restart_syscall /* 0 - old "setup()" system call*/
38 .long sys_exit
39 .long sys_fork
40 .long sys_read
41 .long sys_write
42 .long sys_open /* 5 */
43 .long sys_close
44 .long sys_waitpid
45 .long sys_creat
46 .long sys_link
47 .long sys_unlink /* 10 */
48 .long sys_execve
49 .long sys_chdir
50 .long sys_time
51 .long sys_mknod
52 .long sys_chmod /* 15 */
53 .long sys_lchown16
54 .long sys_ni_syscall /* old break syscall holder */
55 .long sys_stat
56 .long sys_lseek
57 .long sys_getpid /* 20 */
58 .long sys_mount
59 .long sys_oldumount
60 .long sys_setuid16
61 .long sys_getuid16
62 .long sys_stime /* 25 */
63 .long sys_ptrace
64 .long sys_alarm
65 .long sys_fstat
66 .long sys_pause
67 .long sys_utime /* 30 */
68 .long sys_ni_syscall /* old stty syscall holder */
69 .long sys_ni_syscall /* old gtty syscall holder */
70 .long sys_access
71 .long sys_nice
72 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
73 .long sys_sync
74 .long sys_kill
75 .long sys_rename
76 .long sys_mkdir
77 .long sys_rmdir /* 40 */
78 .long sys_dup
79 .long sys_pipe
80 .long sys_times
81 .long sys_ni_syscall /* old prof syscall holder */
82 .long sys_brk /* 45 */
83 .long sys_setgid16
84 .long sys_getgid16
85 .long sys_signal
86 .long sys_geteuid16
87 .long sys_getegid16 /* 50 */
88 .long sys_acct
89 .long sys_umount /* recycled never used phys() */
90 .long sys_ni_syscall /* old lock syscall holder */
91 .long sys_ioctl
92 .long sys_fcntl /* 55 */
93 .long sys_ni_syscall /* old mpx syscall holder */
94 .long sys_setpgid
95 .long sys_ni_syscall /* old ulimit syscall holder */
96 .long sys_ni_syscall /* sys_olduname */
97 .long sys_umask /* 60 */
98 .long sys_chroot
99 .long sys_ustat
100 .long sys_dup2
101 .long sys_getppid
102 .long sys_getpgrp /* 65 */
103 .long sys_setsid
104 .long sys_sigaction
105 .long sys_sgetmask
106 .long sys_ssetmask
107 .long sys_setreuid16 /* 70 */
108 .long sys_setregid16
109 .long sys_sigsuspend
110 .long sys_sigpending
111 .long sys_sethostname
112 .long sys_setrlimit /* 75 */
113 .long sys_old_getrlimit
114 .long sys_getrusage
115 .long sys_gettimeofday
116 .long sys_settimeofday
117 .long sys_getgroups16 /* 80 */
118 .long sys_setgroups16
119 .long sys_ni_syscall /* sys_oldselect */
120 .long sys_symlink
121 .long sys_lstat
122 .long sys_readlink /* 85 */
123 .long sys_uselib
124 .long sys_swapon
125 .long sys_reboot
126 .long old_readdir
127 .long old_mmap /* 90 */
128 .long sys_munmap
129 .long sys_truncate
130 .long sys_ftruncate
131 .long sys_fchmod
132 .long sys_fchown16 /* 95 */
133 .long sys_getpriority
134 .long sys_setpriority
135 .long sys_ni_syscall /* old profil syscall holder */
136 .long sys_statfs
137 .long sys_fstatfs /* 100 */
138 .long sys_ni_syscall /* ioperm */
139 .long sys_socketcall
140 .long sys_syslog
141 .long sys_setitimer
142 .long sys_getitimer /* 105 */
143 .long sys_newstat
144 .long sys_newlstat
145 .long sys_newfstat
146 .long sys_uname
147 .long sys_ni_syscall /* 110 */ /* iopl */
148 .long sys_vhangup
149 .long sys_ni_syscall /* idle */
150 .long sys_ni_syscall /* vm86old */
151 .long sys_wait4
152 .long sys_swapoff /* 115 */
153 .long sys_sysinfo
154 .long sys_ipc
155 .long sys_fsync
156 .long sys_sigreturn
157 .long sys_clone /* 120 */
158 .long sys_setdomainname
159 .long sys_newuname
160 .long sys_ni_syscall /* sys_modify_ldt */
161 .long sys_adjtimex
162 .long sys_mprotect /* 125 */
163 .long sys_sigprocmask
164 .long sys_ni_syscall /* old "create_module" */
165 .long sys_init_module
166 .long sys_delete_module
167 .long sys_ni_syscall /* 130: old "get_kernel_syms" */
168 .long sys_quotactl
169 .long sys_getpgid
170 .long sys_fchdir
171 .long sys_bdflush
172 .long sys_sysfs /* 135 */
173 .long sys_personality
174 .long sys_ni_syscall /* for afs_syscall */
175 .long sys_setfsuid16
176 .long sys_setfsgid16
177 .long sys_llseek /* 140 */
178 .long sys_getdents
179 .long sys_select
180 .long sys_flock
181 .long sys_msync
182 .long sys_readv /* 145 */
183 .long sys_writev
184 .long sys_getsid
185 .long sys_fdatasync
186 .long sys_sysctl
187 .long sys_mlock /* 150 */
188 .long sys_munlock
189 .long sys_mlockall
190 .long sys_munlockall
191 .long sys_sched_setparam
192 .long sys_sched_getparam /* 155 */
193 .long sys_sched_setscheduler
194 .long sys_sched_getscheduler
195 .long sys_sched_yield
196 .long sys_sched_get_priority_max
197 .long sys_sched_get_priority_min /* 160 */
198 .long sys_sched_rr_get_interval
199 .long sys_nanosleep
200 .long sys_mremap
201 .long sys_setresuid16
202 .long sys_getresuid16 /* 165 */
203 .long sys_ni_syscall /* vm86 */
204 .long sys_ni_syscall /* old "query_module" */
205 .long sys_poll
206 .long sys_nfsservctl
207 .long sys_setresgid16 /* 170 */
208 .long sys_getresgid16
209 .long sys_prctl
210 .long sys_rt_sigreturn
211 .long sys_rt_sigaction
212 .long sys_rt_sigprocmask /* 175 */
213 .long sys_rt_sigpending
214 .long sys_rt_sigtimedwait
215 .long sys_rt_sigqueueinfo
216 .long sys_rt_sigsuspend
217 .long sys_pread_wrapper /* 180 */
218 .long sys_pwrite_wrapper
219 .long sys_chown16
220 .long sys_getcwd
221 .long sys_capget
222 .long sys_capset /* 185 */
223 .long sys_sigaltstack
224 .long sys_sendfile
225 .long sys_ni_syscall /* streams1 */
226 .long sys_ni_syscall /* streams2 */
227 .long sys_vfork /* 190 */
228 .long sys_getrlimit
229 .long sys_mmap2
230 .long sys_truncate64
231 .long sys_ftruncate64
232 .long sys_stat64 /* 195 */
233 .long sys_lstat64
234 .long sys_fstat64
235 .long sys_lchown
236 .long sys_getuid
237 .long sys_getgid /* 200 */
238 .long sys_geteuid
239 .long sys_getegid
240 .long sys_setreuid
241 .long sys_setregid
242 .long sys_getgroups /* 205 */
243 .long sys_setgroups
244 .long sys_fchown
245 .long sys_setresuid
246 .long sys_getresuid
247 .long sys_setresgid /* 210 */
248 .long sys_getresgid
249 .long sys_chown
250 .long sys_setuid
251 .long sys_setgid
252 .long sys_setfsuid /* 215 */
253 .long sys_setfsgid
254 .long sys_pivot_root
255 .long sys_mincore
256 .long sys_madvise
257 .long sys_getdents64 /* 220 */
258 .long sys_fcntl64
259 .long sys_ni_syscall /* reserved for TUX */
260 .long sys_ni_syscall /* Reserved for Security */
261 .long sys_gettid
262 .long sys_readahead /* 225 */
263 .long sys_setxattr
264 .long sys_lsetxattr
265 .long sys_fsetxattr
266 .long sys_getxattr
267 .long sys_lgetxattr /* 230 */
268 .long sys_fgetxattr
269 .long sys_listxattr
270 .long sys_llistxattr
271 .long sys_flistxattr
272 .long sys_removexattr /* 235 */
273 .long sys_lremovexattr
274 .long sys_fremovexattr
275 .long sys_tkill
276 .long sys_sendfile64
277 .long sys_futex /* 240 */
278 .long sys_sched_setaffinity
279 .long sys_sched_getaffinity
280 .long sys_ni_syscall
281 .long sys_ni_syscall
282 .long sys_io_setup /* 245 */
283 .long sys_io_destroy
284 .long sys_io_getevents
285 .long sys_io_submit
286 .long sys_io_cancel
287 .long sys_fadvise64 /* 250 */
288 .long sys_ni_syscall
289 .long sys_exit_group
290 .long sys_lookup_dcookie
291 .long sys_epoll_create
292 .long sys_epoll_ctl /* 255 */
293 .long sys_epoll_wait
294 .long sys_remap_file_pages
295 .long sys_set_tid_address
296 .long sys_timer_create
297 .long sys_timer_settime /* 260 */
298 .long sys_timer_gettime
299 .long sys_timer_getoverrun
300 .long sys_timer_delete
301 .long sys_clock_settime
302 .long sys_clock_gettime /* 265 */
303 .long sys_clock_getres
304 .long sys_clock_nanosleep
305 .long sys_statfs64
306 .long sys_fstatfs64
307 .long sys_tgkill /* 270 */
308 .long sys_utimes
309 .long sys_fadvise64_64_wrapper
310 .long sys_ni_syscall /* Reserved for vserver */
311 .long sys_ni_syscall /* Reserved for mbind */
312 .long sys_ni_syscall /* 275 - get_mempolicy */
313 .long sys_ni_syscall /* set_mempolicy */
314 .long sys_mq_open
315 .long sys_mq_unlink
316 .long sys_mq_timedsend
317 .long sys_mq_timedreceive /* 280 */
318 .long sys_mq_notify
319 .long sys_mq_getsetattr
320 .long sys_kexec_load
321 .long sys_waitid
322 .long sys_ni_syscall /* 285 */
323 .long sys_add_key
324 .long sys_request_key
325 .long sys_keyctl
326 .long sys_ioprio_set
327 .long sys_ioprio_get /* 290 */
328 .long sys_inotify_init
329 .long sys_inotify_add_watch
330 .long sys_inotify_rm_watch
331 .long sys_migrate_pages
332 .long sys_openat /* 295 */
333 .long sys_mkdirat
334 .long sys_mknodat
335 .long sys_fchownat
336 .long sys_futimesat
337 .long sys_fstatat64 /* 300 */
338 .long sys_unlinkat
339 .long sys_renameat
340 .long sys_linkat
341 .long sys_symlinkat
342 .long sys_readlinkat /* 305 */
343 .long sys_fchmodat
344 .long sys_faccessat
345 .long sys_pselect6
346 .long sys_ppoll
347 .long sys_unshare /* 310 */
348 .long sys_set_robust_list
349 .long sys_get_robust_list
350 .long sys_splice
351 .long sys_sync_file_range
352 .long sys_tee /* 315 */
353 .long sys_vmsplice
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index a1589f85499d..149d9713eddf 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -3,13 +3,12 @@
3 * 3 *
4 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka 4 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> 5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
6 * Copyright (C) 2002, 2003, 2004, 2005 Paul Mundt 6 * Copyright (C) 2002 - 2006 Paul Mundt
7 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> 7 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
8 * 8 *
9 * Some code taken from i386 version. 9 * Some code taken from i386 version.
10 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 10 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
11 */ 11 */
12
13#include <linux/kernel.h> 12#include <linux/kernel.h>
14#include <linux/module.h> 13#include <linux/module.h>
15#include <linux/init.h> 14#include <linux/init.h>
@@ -26,15 +25,20 @@ struct sys_timer *sys_timer;
26DEFINE_SPINLOCK(rtc_lock); 25DEFINE_SPINLOCK(rtc_lock);
27EXPORT_SYMBOL(rtc_lock); 26EXPORT_SYMBOL(rtc_lock);
28 27
29/* XXX: Can we initialize this in a routine somewhere? Dreamcast doesn't want 28/* Dummy RTC ops */
30 * these routines anywhere... */ 29static void null_rtc_get_time(struct timespec *tv)
31#ifdef CONFIG_SH_RTC 30{
32void (*rtc_get_time)(struct timespec *) = sh_rtc_gettimeofday; 31 tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0);
33int (*rtc_set_time)(const time_t) = sh_rtc_settimeofday; 32 tv->tv_nsec = 0;
34#else 33}
35void (*rtc_get_time)(struct timespec *); 34
36int (*rtc_set_time)(const time_t); 35static int null_rtc_set_time(const time_t secs)
37#endif 36{
37 return 0;
38}
39
40void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
41int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
38 42
39/* 43/*
40 * Scheduler clock - returns current time in nanosec units. 44 * Scheduler clock - returns current time in nanosec units.
@@ -70,7 +74,6 @@ void do_gettimeofday(struct timeval *tv)
70 tv->tv_sec = sec; 74 tv->tv_sec = sec;
71 tv->tv_usec = usec; 75 tv->tv_usec = usec;
72} 76}
73
74EXPORT_SYMBOL(do_gettimeofday); 77EXPORT_SYMBOL(do_gettimeofday);
75 78
76int do_settimeofday(struct timespec *tv) 79int do_settimeofday(struct timespec *tv)
@@ -103,7 +106,6 @@ int do_settimeofday(struct timespec *tv)
103 106
104 return 0; 107 return 0;
105} 108}
106
107EXPORT_SYMBOL(do_settimeofday); 109EXPORT_SYMBOL(do_settimeofday);
108 110
109/* last time the RTC clock got updated */ 111/* last time the RTC clock got updated */
@@ -135,7 +137,7 @@ void handle_timer_tick(struct pt_regs *regs)
135 xtime.tv_sec > last_rtc_update + 660 && 137 xtime.tv_sec > last_rtc_update + 660 &&
136 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && 138 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
137 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { 139 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
138 if (rtc_set_time(xtime.tv_sec) == 0) 140 if (rtc_sh_set_time(xtime.tv_sec) == 0)
139 last_rtc_update = xtime.tv_sec; 141 last_rtc_update = xtime.tv_sec;
140 else 142 else
141 /* do it again in 60s */ 143 /* do it again in 60s */
@@ -143,8 +145,33 @@ void handle_timer_tick(struct pt_regs *regs)
143 } 145 }
144} 146}
145 147
148#ifdef CONFIG_PM
149int timer_suspend(struct sys_device *dev, pm_message_t state)
150{
151 struct sys_timer *sys_timer = container_of(dev, struct sys_timer, dev);
152
153 sys_timer->ops->stop();
154
155 return 0;
156}
157
158int timer_resume(struct sys_device *dev)
159{
160 struct sys_timer *sys_timer = container_of(dev, struct sys_timer, dev);
161
162 sys_timer->ops->start();
163
164 return 0;
165}
166#else
167#define timer_suspend NULL
168#define timer_resume NULL
169#endif
170
146static struct sysdev_class timer_sysclass = { 171static struct sysdev_class timer_sysclass = {
147 set_kset_name("timer"), 172 set_kset_name("timer"),
173 .suspend = timer_suspend,
174 .resume = timer_resume,
148}; 175};
149 176
150static int __init timer_init_sysfs(void) 177static int __init timer_init_sysfs(void)
@@ -156,7 +183,6 @@ static int __init timer_init_sysfs(void)
156 sys_timer->dev.cls = &timer_sysclass; 183 sys_timer->dev.cls = &timer_sysclass;
157 return sysdev_register(&sys_timer->dev); 184 return sysdev_register(&sys_timer->dev);
158} 185}
159
160device_initcall(timer_init_sysfs); 186device_initcall(timer_init_sysfs);
161 187
162void (*board_time_init)(void); 188void (*board_time_init)(void);
@@ -168,15 +194,9 @@ void __init time_init(void)
168 194
169 clk_init(); 195 clk_init();
170 196
171 if (rtc_get_time) { 197 rtc_sh_get_time(&xtime);
172 rtc_get_time(&xtime); 198 set_normalized_timespec(&wall_to_monotonic,
173 } else { 199 -xtime.tv_sec, -xtime.tv_nsec);
174 xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0);
175 xtime.tv_nsec = 0;
176 }
177
178 set_normalized_timespec(&wall_to_monotonic,
179 -xtime.tv_sec, -xtime.tv_nsec);
180 200
181 /* 201 /*
182 * Find the timer to use as the system timer, it will be 202 * Find the timer to use as the system timer, it will be
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index d4212add53b2..205816fcf0da 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -132,17 +132,17 @@ static unsigned long tmu_timer_get_frequency(void)
132 ctrl_outl(0xffffffff, TMU0_TCOR); 132 ctrl_outl(0xffffffff, TMU0_TCOR);
133 ctrl_outl(0xffffffff, TMU0_TCNT); 133 ctrl_outl(0xffffffff, TMU0_TCNT);
134 134
135 rtc_get_time(&ts2); 135 rtc_sh_get_time(&ts2);
136 136
137 do { 137 do {
138 rtc_get_time(&ts1); 138 rtc_sh_get_time(&ts1);
139 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); 139 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
140 140
141 /* actually start the timer */ 141 /* actually start the timer */
142 ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); 142 ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
143 143
144 do { 144 do {
145 rtc_get_time(&ts2); 145 rtc_sh_get_time(&ts2);
146 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); 146 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
147 147
148 freq = 0xffffffff - ctrl_inl(TMU0_TCNT); 148 freq = 0xffffffff - ctrl_inl(TMU0_TCNT);
@@ -188,6 +188,18 @@ static struct clk tmu0_clk = {
188 .ops = &tmu_clk_ops, 188 .ops = &tmu_clk_ops,
189}; 189};
190 190
191static int tmu_timer_start(void)
192{
193 ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
194 return 0;
195}
196
197static int tmu_timer_stop(void)
198{
199 ctrl_outb(0, TMU_TSTR);
200 return 0;
201}
202
191static int tmu_timer_init(void) 203static int tmu_timer_init(void)
192{ 204{
193 unsigned long interval; 205 unsigned long interval;
@@ -197,7 +209,7 @@ static int tmu_timer_init(void)
197 tmu0_clk.parent = clk_get("module_clk"); 209 tmu0_clk.parent = clk_get("module_clk");
198 210
199 /* Start TMU0 */ 211 /* Start TMU0 */
200 ctrl_outb(0, TMU_TSTR); 212 tmu_timer_stop();
201#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760) 213#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760)
202 ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); 214 ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
203#endif 215#endif
@@ -211,13 +223,15 @@ static int tmu_timer_init(void)
211 ctrl_outl(interval, TMU0_TCOR); 223 ctrl_outl(interval, TMU0_TCOR);
212 ctrl_outl(interval, TMU0_TCNT); 224 ctrl_outl(interval, TMU0_TCNT);
213 225
214 ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); 226 tmu_timer_start();
215 227
216 return 0; 228 return 0;
217} 229}
218 230
219struct sys_timer_ops tmu_timer_ops = { 231struct sys_timer_ops tmu_timer_ops = {
220 .init = tmu_timer_init, 232 .init = tmu_timer_init,
233 .start = tmu_timer_start,
234 .stop = tmu_timer_stop,
221 .get_frequency = tmu_timer_get_frequency, 235 .get_frequency = tmu_timer_get_frequency,
222 .get_offset = tmu_timer_get_offset, 236 .get_offset = tmu_timer_get_offset,
223}; 237};
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index d9db1180f770..c2c597e09482 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -36,40 +36,15 @@
36 36
37#ifdef CONFIG_SH_KGDB 37#ifdef CONFIG_SH_KGDB
38#include <asm/kgdb.h> 38#include <asm/kgdb.h>
39#define CHK_REMOTE_DEBUG(regs) \ 39#define CHK_REMOTE_DEBUG(regs) \
40{ \ 40{ \
41 if ((kgdb_debug_hook != (kgdb_debug_hook_t *) NULL) && (!user_mode(regs))) \ 41 if (kgdb_debug_hook && !user_mode(regs))\
42 { \ 42 (*kgdb_debug_hook)(regs); \
43 (*kgdb_debug_hook)(regs); \
44 } \
45} 43}
46#else 44#else
47#define CHK_REMOTE_DEBUG(regs) 45#define CHK_REMOTE_DEBUG(regs)
48#endif 46#endif
49 47
50#define DO_ERROR(trapnr, signr, str, name, tsk) \
51asmlinkage void do_##name(unsigned long r4, unsigned long r5, \
52 unsigned long r6, unsigned long r7, \
53 struct pt_regs regs) \
54{ \
55 unsigned long error_code; \
56 \
57 /* Check if it's a DSP instruction */ \
58 if (is_dsp_inst(&regs)) { \
59 /* Enable DSP mode, and restart instruction. */ \
60 regs.sr |= SR_DSP; \
61 return; \
62 } \
63 \
64 asm volatile("stc r2_bank, %0": "=r" (error_code)); \
65 local_irq_enable(); \
66 tsk->thread.error_code = error_code; \
67 tsk->thread.trap_no = trapnr; \
68 CHK_REMOTE_DEBUG(&regs); \
69 force_sig(signr, tsk); \
70 die_if_no_fixup(str,&regs,error_code); \
71}
72
73#ifdef CONFIG_CPU_SH2 48#ifdef CONFIG_CPU_SH2
74#define TRAP_RESERVED_INST 4 49#define TRAP_RESERVED_INST 4
75#define TRAP_ILLEGAL_SLOT_INST 6 50#define TRAP_ILLEGAL_SLOT_INST 6
@@ -86,7 +61,7 @@ asmlinkage void do_##name(unsigned long r4, unsigned long r5, \
86#define VMALLOC_OFFSET (8*1024*1024) 61#define VMALLOC_OFFSET (8*1024*1024)
87#define MODULE_RANGE (8*1024*1024) 62#define MODULE_RANGE (8*1024*1024)
88 63
89spinlock_t die_lock; 64DEFINE_SPINLOCK(die_lock);
90 65
91void die(const char * str, struct pt_regs * regs, long err) 66void die(const char * str, struct pt_regs * regs, long err)
92{ 67{
@@ -575,8 +550,117 @@ int is_dsp_inst(struct pt_regs *regs)
575#define is_dsp_inst(regs) (0) 550#define is_dsp_inst(regs) (0)
576#endif /* CONFIG_SH_DSP */ 551#endif /* CONFIG_SH_DSP */
577 552
578DO_ERROR(TRAP_RESERVED_INST, SIGILL, "reserved instruction", reserved_inst, current) 553extern int do_fpu_inst(unsigned short, struct pt_regs*);
579DO_ERROR(TRAP_ILLEGAL_SLOT_INST, SIGILL, "illegal slot instruction", illegal_slot_inst, current) 554
555asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
556 unsigned long r6, unsigned long r7,
557 struct pt_regs regs)
558{
559 unsigned long error_code;
560 struct task_struct *tsk = current;
561
562#ifdef CONFIG_SH_FPU_EMU
563 unsigned short inst;
564 int err;
565
566 get_user(inst, (unsigned short*)regs.pc);
567
568 err = do_fpu_inst(inst, &regs);
569 if (!err) {
570 regs.pc += 2;
571 return;
572 }
573 /* not a FPU inst. */
574#endif
575
576#ifdef CONFIG_SH_DSP
577 /* Check if it's a DSP instruction */
578 if (is_dsp_inst(&regs)) {
579 /* Enable DSP mode, and restart instruction. */
580 regs.sr |= SR_DSP;
581 return;
582 }
583#endif
584
585 asm volatile("stc r2_bank, %0": "=r" (error_code));
586 local_irq_enable();
587 tsk->thread.error_code = error_code;
588 tsk->thread.trap_no = TRAP_RESERVED_INST;
589 CHK_REMOTE_DEBUG(&regs);
590 force_sig(SIGILL, tsk);
591 die_if_no_fixup("reserved instruction", &regs, error_code);
592}
593
594#ifdef CONFIG_SH_FPU_EMU
595static int emulate_branch(unsigned short inst, struct pt_regs* regs)
596{
597 /*
598 * bfs: 8fxx: PC+=d*2+4;
599 * bts: 8dxx: PC+=d*2+4;
600 * bra: axxx: PC+=D*2+4;
601 * bsr: bxxx: PC+=D*2+4 after PR=PC+4;
602 * braf:0x23: PC+=Rn*2+4;
603 * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4;
604 * jmp: 4x2b: PC=Rn;
605 * jsr: 4x0b: PC=Rn after PR=PC+4;
606 * rts: 000b: PC=PR;
607 */
608 if ((inst & 0xfd00) == 0x8d00) {
609 regs->pc += SH_PC_8BIT_OFFSET(inst);
610 return 0;
611 }
612
613 if ((inst & 0xe000) == 0xa000) {
614 regs->pc += SH_PC_12BIT_OFFSET(inst);
615 return 0;
616 }
617
618 if ((inst & 0xf0df) == 0x0003) {
619 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
620 return 0;
621 }
622
623 if ((inst & 0xf0df) == 0x400b) {
624 regs->pc = regs->regs[(inst & 0x0f00) >> 8];
625 return 0;
626 }
627
628 if ((inst & 0xffff) == 0x000b) {
629 regs->pc = regs->pr;
630 return 0;
631 }
632
633 return 1;
634}
635#endif
636
637asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
638 unsigned long r6, unsigned long r7,
639 struct pt_regs regs)
640{
641 unsigned long error_code;
642 struct task_struct *tsk = current;
643#ifdef CONFIG_SH_FPU_EMU
644 unsigned short inst;
645
646 get_user(inst, (unsigned short *)regs.pc + 1);
647 if (!do_fpu_inst(inst, &regs)) {
648 get_user(inst, (unsigned short *)regs.pc);
649 if (!emulate_branch(inst, &regs))
650 return;
651 /* fault in branch.*/
652 }
653 /* not a FPU inst. */
654#endif
655
656 asm volatile("stc r2_bank, %0": "=r" (error_code));
657 local_irq_enable();
658 tsk->thread.error_code = error_code;
659 tsk->thread.trap_no = TRAP_RESERVED_INST;
660 CHK_REMOTE_DEBUG(&regs);
661 force_sig(SIGILL, tsk);
662 die_if_no_fixup("illegal slot instruction", &regs, error_code);
663}
580 664
581asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, 665asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
582 unsigned long r6, unsigned long r7, 666 unsigned long r6, unsigned long r7,
@@ -634,14 +718,16 @@ void __init trap_init(void)
634 exception_handling_table[TRAP_ILLEGAL_SLOT_INST] 718 exception_handling_table[TRAP_ILLEGAL_SLOT_INST]
635 = (void *)do_illegal_slot_inst; 719 = (void *)do_illegal_slot_inst;
636 720
637#ifdef CONFIG_CPU_SH4 721#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
638 if (!(cpu_data->flags & CPU_HAS_FPU)) { 722 defined(CONFIG_SH_FPU_EMU)
639 /* For SH-4 lacking an FPU, treat floating point instructions 723 /*
640 as reserved. */ 724 * For SH-4 lacking an FPU, treat floating point instructions as
641 /* entry 64 corresponds to EXPEVT=0x800 */ 725 * reserved. They'll be handled in the math-emu case, or faulted on
642 exception_handling_table[64] = (void *)do_reserved_inst; 726 * otherwise.
643 exception_handling_table[65] = (void *)do_illegal_slot_inst; 727 */
644 } 728 /* entry 64 corresponds to EXPEVT=0x800 */
729 exception_handling_table[64] = (void *)do_reserved_inst;
730 exception_handling_table[65] = (void *)do_illegal_slot_inst;
645#endif 731#endif
646 732
647 /* Setup VBR for boot cpu */ 733 /* Setup VBR for boot cpu */
@@ -655,20 +741,12 @@ void show_stack(struct task_struct *tsk, unsigned long *sp)
655 unsigned long module_end = VMALLOC_END; 741 unsigned long module_end = VMALLOC_END;
656 int i = 1; 742 int i = 1;
657 743
658 if (tsk && !sp) { 744 if (!tsk)
745 tsk = current;
746 if (tsk == current)
747 sp = (unsigned long *)current_stack_pointer;
748 else
659 sp = (unsigned long *)tsk->thread.sp; 749 sp = (unsigned long *)tsk->thread.sp;
660 }
661
662 if (!sp) {
663 __asm__ __volatile__ (
664 "mov r15, %0\n\t"
665 "stc r7_bank, %1\n\t"
666 : "=r" (module_start),
667 "=r" (module_end)
668 );
669
670 sp = (unsigned long *)module_start;
671 }
672 750
673 stack = sp; 751 stack = sp;
674 752
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index 95fdd9135fcf..5eb930918186 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -2,6 +2,7 @@
2 * ld script to make SuperH Linux kernel 2 * ld script to make SuperH Linux kernel
3 * Written by Niibe Yutaka 3 * Written by Niibe Yutaka
4 */ 4 */
5#include <asm/thread_info.h>
5#include <asm-generic/vmlinux.lds.h> 6#include <asm-generic/vmlinux.lds.h>
6 7
7#ifdef CONFIG_CPU_LITTLE_ENDIAN 8#ifdef CONFIG_CPU_LITTLE_ENDIAN
@@ -13,7 +14,7 @@ OUTPUT_ARCH(sh)
13ENTRY(_start) 14ENTRY(_start)
14SECTIONS 15SECTIONS
15{ 16{
16 . = 0x80000000 + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET; 17 . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
17 _text = .; /* Text and read-only data */ 18 _text = .; /* Text and read-only data */
18 text = .; /* Text and read-only data */ 19 text = .; /* Text and read-only data */
19 .empty_zero_page : { 20 .empty_zero_page : {
@@ -40,16 +41,16 @@ SECTIONS
40 *(.data) 41 *(.data)
41 42
42 /* Align the initial ramdisk image (INITRD) on page boundaries. */ 43 /* Align the initial ramdisk image (INITRD) on page boundaries. */
43 . = ALIGN(4096); 44 . = ALIGN(PAGE_SIZE);
44 __rd_start = .; 45 __rd_start = .;
45 *(.initrd) 46 *(.initrd)
46 . = ALIGN(4096); 47 . = ALIGN(PAGE_SIZE);
47 __rd_end = .; 48 __rd_end = .;
48 49
49 CONSTRUCTORS 50 CONSTRUCTORS
50 } 51 }
51 52
52 . = ALIGN(4096); 53 . = ALIGN(PAGE_SIZE);
53 .data.page_aligned : { *(.data.idt) } 54 .data.page_aligned : { *(.data.idt) }
54 55
55 . = ALIGN(32); 56 . = ALIGN(32);
@@ -60,12 +61,10 @@ SECTIONS
60 61
61 _edata = .; /* End of data section */ 62 _edata = .; /* End of data section */
62 63
63 . = ALIGN(8192); /* init_task */ 64 . = ALIGN(THREAD_SIZE); /* init_task */
64 .data.init_task : { *(.data.init_task) } 65 .data.init_task : { *(.data.init_task) }
65 /* stack */
66 .stack : { stack = .; _stack = .; }
67 66
68 . = ALIGN(4096); /* Init code and data */ 67 . = ALIGN(PAGE_SIZE); /* Init code and data */
69 __init_begin = .; 68 __init_begin = .;
70 _sinittext = .; 69 _sinittext = .;
71 .init.text : { *(.init.text) } 70 .init.text : { *(.init.text) }
@@ -96,7 +95,7 @@ SECTIONS
96 __machvec_start = .; 95 __machvec_start = .;
97 .init.machvec : { *(.init.machvec) } 96 .init.machvec : { *(.init.machvec) }
98 __machvec_end = .; 97 __machvec_end = .;
99 . = ALIGN(4096); 98 . = ALIGN(PAGE_SIZE);
100 __init_end = .; 99 __init_end = .;
101 100
102 . = ALIGN(4); 101 . = ALIGN(4);
diff --git a/arch/sh/kernel/vsyscall/Makefile b/arch/sh/kernel/vsyscall/Makefile
new file mode 100644
index 000000000000..4bbce1cfa359
--- /dev/null
+++ b/arch/sh/kernel/vsyscall/Makefile
@@ -0,0 +1,36 @@
1obj-y += vsyscall.o vsyscall-syscall.o
2
3$(obj)/vsyscall-syscall.o: \
4 $(foreach F,trapa,$(obj)/vsyscall-$F.so)
5
6# Teach kbuild about targets
7targets += $(foreach F,trapa,vsyscall-$F.o vsyscall-$F.so)
8targets += vsyscall-note.o vsyscall.lds
9
10# The DSO images are built using a special linker script
11quiet_cmd_syscall = SYSCALL $@
12 cmd_syscall = $(CC) -nostdlib $(SYSCFLAGS_$(@F)) \
13 -Wl,-T,$(filter-out FORCE,$^) -o $@
14
15export CPPFLAGS_vsyscall.lds += -P -C -Ush
16
17vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 \
18 $(call ld-option, -Wl$(comma)--hash-style=sysv)
19
20SYSCFLAGS_vsyscall-trapa.so = $(vsyscall-flags)
21
22$(obj)/vsyscall-trapa.so: \
23$(obj)/vsyscall-%.so: $(src)/vsyscall.lds $(obj)/vsyscall-%.o FORCE
24 $(call if_changed,syscall)
25
26# We also create a special relocatable object that should mirror the symbol
27# table and layout of the linked DSO. With ld -R we can then refer to
28# these symbols in the kernel code rather than hand-coded addresses.
29extra-y += vsyscall-syms.o
30$(obj)/built-in.o: $(obj)/vsyscall-syms.o
31$(obj)/built-in.o: ld_flags += -R $(obj)/vsyscall-syms.o
32
33SYSCFLAGS_vsyscall-syms.o = -r
34$(obj)/vsyscall-syms.o: $(src)/vsyscall.lds \
35 $(obj)/vsyscall-trapa.o $(obj)/vsyscall-note.o FORCE
36 $(call if_changed,syscall)
diff --git a/arch/sh/kernel/vsyscall/vsyscall-note.S b/arch/sh/kernel/vsyscall/vsyscall-note.S
new file mode 100644
index 000000000000..d4b5be4f3d5f
--- /dev/null
+++ b/arch/sh/kernel/vsyscall/vsyscall-note.S
@@ -0,0 +1,25 @@
1/*
2 * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
3 * Here we can supply some information useful to userland.
4 */
5
6#include <linux/uts.h>
7#include <linux/version.h>
8
9#define ASM_ELF_NOTE_BEGIN(name, flags, vendor, type) \
10 .section name, flags; \
11 .balign 4; \
12 .long 1f - 0f; /* name length */ \
13 .long 3f - 2f; /* data length */ \
14 .long type; /* note type */ \
150: .asciz vendor; /* vendor name */ \
161: .balign 4; \
172:
18
19#define ASM_ELF_NOTE_END \
203: .balign 4; /* pad out section */ \
21 .previous
22
23 ASM_ELF_NOTE_BEGIN(".note.kernel-version", "a", UTS_SYSNAME, 0)
24 .long LINUX_VERSION_CODE
25 ASM_ELF_NOTE_END
diff --git a/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S b/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
new file mode 100644
index 000000000000..555a64f124ca
--- /dev/null
+++ b/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
@@ -0,0 +1,39 @@
1#include <asm/unistd.h>
2
3 .text
4 .balign 32
5 .globl __kernel_sigreturn
6 .type __kernel_sigreturn,@function
7__kernel_sigreturn:
8.LSTART_sigreturn:
9 mov.w 1f, r3
10 trapa #0x10
11 or r0, r0
12 or r0, r0
13 or r0, r0
14 or r0, r0
15 or r0, r0
16
171: .short __NR_sigreturn
18.LEND_sigreturn:
19 .size __kernel_sigreturn,.-.LSTART_sigreturn
20
21 .balign 32
22 .globl __kernel_rt_sigreturn
23 .type __kernel_rt_sigreturn,@function
24__kernel_rt_sigreturn:
25.LSTART_rt_sigreturn:
26 mov.w 1f, r3
27 trapa #0x10
28 or r0, r0
29 or r0, r0
30 or r0, r0
31 or r0, r0
32 or r0, r0
33
341: .short __NR_rt_sigreturn
35.LEND_rt_sigreturn:
36 .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn
37
38 .section .eh_frame,"a",@progbits
39 .previous
diff --git a/arch/sh/kernel/vsyscall/vsyscall-syscall.S b/arch/sh/kernel/vsyscall/vsyscall-syscall.S
new file mode 100644
index 000000000000..c2ac7f0282b3
--- /dev/null
+++ b/arch/sh/kernel/vsyscall/vsyscall-syscall.S
@@ -0,0 +1,10 @@
1#include <linux/init.h>
2
3__INITDATA
4
5 .globl vsyscall_trapa_start, vsyscall_trapa_end
6vsyscall_trapa_start:
7 .incbin "arch/sh/kernel/vsyscall/vsyscall-trapa.so"
8vsyscall_trapa_end:
9
10__FINIT
diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
new file mode 100644
index 000000000000..3b6eb34c43fa
--- /dev/null
+++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
@@ -0,0 +1,42 @@
1 .text
2 .globl __kernel_vsyscall
3 .type __kernel_vsyscall,@function
4__kernel_vsyscall:
5.LSTART_vsyscall:
6 /* XXX: We'll have to do something here once we opt to use the vDSO
7 * page for something other than the signal trampoline.. as well as
8 * fill out .eh_frame -- PFM. */
9.LEND_vsyscall:
10 .size __kernel_vsyscall,.-.LSTART_vsyscall
11 .previous
12
13 .section .eh_frame,"a",@progbits
14.LCIE:
15 .ualong .LCIE_end - .LCIE_start
16.LCIE_start:
17 .ualong 0 /* CIE ID */
18 .byte 0x1 /* Version number */
19 .string "zRS" /* NUL-terminated augmentation string */
20 .uleb128 0x1 /* Code alignment factor */
21 .sleb128 -4 /* Data alignment factor */
22 .byte 0x11 /* Return address register column */
23 /* Augmentation length and data (none) */
24 .byte 0xc /* DW_CFA_def_cfa */
25 .uleb128 0xf /* r15 */
26 .uleb128 0x0 /* offset 0 */
27
28 .align 2
29.LCIE_end:
30
31 .ualong .LFDE_end-.LFDE_start /* Length FDE */
32.LFDE_start:
33 .ualong .LCIE /* CIE pointer */
34 .ualong .LSTART_vsyscall-. /* start address */
35 .ualong .LEND_vsyscall-.LSTART_vsyscall
36 .uleb128 0
37 .align 2
38.LFDE_end:
39 .previous
40
41/* Get the common code for the sigreturn entry points */
42#include "vsyscall-sigreturn.S"
diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c
new file mode 100644
index 000000000000..075d6cc1a2d7
--- /dev/null
+++ b/arch/sh/kernel/vsyscall/vsyscall.c
@@ -0,0 +1,150 @@
1/*
2 * arch/sh/kernel/vsyscall.c
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * vDSO randomization
7 * Copyright(C) 2005-2006, Red Hat, Inc., Ingo Molnar
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/mm.h>
14#include <linux/slab.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/gfp.h>
18#include <linux/module.h>
19#include <linux/elf.h>
20
21/*
22 * Should the kernel map a VDSO page into processes and pass its
23 * address down to glibc upon exec()?
24 */
25unsigned int __read_mostly vdso_enabled = 1;
26EXPORT_SYMBOL_GPL(vdso_enabled);
27
28static int __init vdso_setup(char *s)
29{
30 vdso_enabled = simple_strtoul(s, NULL, 0);
31 return 1;
32}
33__setup("vdso=", vdso_setup);
34
35/*
36 * These symbols are defined by vsyscall.o to mark the bounds
37 * of the ELF DSO images included therein.
38 */
39extern const char vsyscall_trapa_start, vsyscall_trapa_end;
40static void *syscall_page;
41
42int __init vsyscall_init(void)
43{
44 syscall_page = (void *)get_zeroed_page(GFP_ATOMIC);
45
46 /*
47 * XXX: Map this page to a fixmap entry if we get around
48 * to adding the page to ELF core dumps
49 */
50
51 memcpy(syscall_page,
52 &vsyscall_trapa_start,
53 &vsyscall_trapa_end - &vsyscall_trapa_start);
54
55 return 0;
56}
57
58static struct page *syscall_vma_nopage(struct vm_area_struct *vma,
59 unsigned long address, int *type)
60{
61 unsigned long offset = address - vma->vm_start;
62 struct page *page;
63
64 if (address < vma->vm_start || address > vma->vm_end)
65 return NOPAGE_SIGBUS;
66
67 page = virt_to_page(syscall_page + offset);
68
69 get_page(page);
70
71 return page;
72}
73
74/* Prevent VMA merging */
75static void syscall_vma_close(struct vm_area_struct *vma)
76{
77}
78
79static struct vm_operations_struct syscall_vm_ops = {
80 .nopage = syscall_vma_nopage,
81 .close = syscall_vma_close,
82};
83
84/* Setup a VMA at program startup for the vsyscall page */
85int arch_setup_additional_pages(struct linux_binprm *bprm,
86 int executable_stack)
87{
88 struct vm_area_struct *vma;
89 struct mm_struct *mm = current->mm;
90 unsigned long addr;
91 int ret;
92
93 down_write(&mm->mmap_sem);
94 addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0);
95 if (IS_ERR_VALUE(addr)) {
96 ret = addr;
97 goto up_fail;
98 }
99
100 vma = kmem_cache_zalloc(vm_area_cachep, SLAB_KERNEL);
101 if (!vma) {
102 ret = -ENOMEM;
103 goto up_fail;
104 }
105
106 vma->vm_start = addr;
107 vma->vm_end = addr + PAGE_SIZE;
108 /* MAYWRITE to allow gdb to COW and set breakpoints */
109 vma->vm_flags = VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC|VM_MAYWRITE;
110 vma->vm_flags |= mm->def_flags;
111 vma->vm_page_prot = protection_map[vma->vm_flags & 7];
112 vma->vm_ops = &syscall_vm_ops;
113 vma->vm_mm = mm;
114
115 ret = insert_vm_struct(mm, vma);
116 if (unlikely(ret)) {
117 kmem_cache_free(vm_area_cachep, vma);
118 goto up_fail;
119 }
120
121 current->mm->context.vdso = (void *)addr;
122
123 mm->total_vm++;
124up_fail:
125 up_write(&mm->mmap_sem);
126 return ret;
127}
128
129const char *arch_vma_name(struct vm_area_struct *vma)
130{
131 if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso)
132 return "[vdso]";
133
134 return NULL;
135}
136
137struct vm_area_struct *get_gate_vma(struct task_struct *task)
138{
139 return NULL;
140}
141
142int in_gate_area(struct task_struct *task, unsigned long address)
143{
144 return 0;
145}
146
147int in_gate_area_no_task(unsigned long address)
148{
149 return 0;
150}
diff --git a/arch/sh/kernel/vsyscall/vsyscall.lds.S b/arch/sh/kernel/vsyscall/vsyscall.lds.S
new file mode 100644
index 000000000000..b13c3d439fee
--- /dev/null
+++ b/arch/sh/kernel/vsyscall/vsyscall.lds.S
@@ -0,0 +1,74 @@
1/*
2 * Linker script for vsyscall DSO. The vsyscall page is an ELF shared
3 * object prelinked to its virtual address, and with only one read-only
4 * segment (that fits in one page). This script controls its layout.
5 */
6#include <asm/asm-offsets.h>
7
8#ifdef CONFIG_CPU_LITTLE_ENDIAN
9OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
10#else
11OUTPUT_FORMAT("elf32-shbig-linux", "elf32-shbig-linux", "elf32-shbig-linux")
12#endif
13OUTPUT_ARCH(sh)
14
15/* The ELF entry point can be used to set the AT_SYSINFO value. */
16ENTRY(__kernel_vsyscall);
17
18SECTIONS
19{
20 . = SIZEOF_HEADERS;
21
22 .hash : { *(.hash) } :text
23 .gnu.hash : { *(.gnu.hash) }
24 .dynsym : { *(.dynsym) }
25 .dynstr : { *(.dynstr) }
26 .gnu.version : { *(.gnu.version) }
27 .gnu.version_d : { *(.gnu.version_d) }
28 .gnu.version_r : { *(.gnu.version_r) }
29
30 /* This linker script is used both with -r and with -shared.
31 For the layouts to match, we need to skip more than enough
32 space for the dynamic symbol table et al. If this amount
33 is insufficient, ld -shared will barf. Just increase it here. */
34 . = 0x400;
35
36 .text : { *(.text) } :text =0x90909090
37 .note : { *(.note.*) } :text :note
38 .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr
39 .eh_frame : { KEEP (*(.eh_frame)) } :text
40 .dynamic : { *(.dynamic) } :text :dynamic
41 .useless : {
42 *(.got.plt) *(.got)
43 *(.data .data.* .gnu.linkonce.d.*)
44 *(.dynbss)
45 *(.bss .bss.* .gnu.linkonce.b.*)
46 } :text
47}
48
49/*
50 * We must supply the ELF program headers explicitly to get just one
51 * PT_LOAD segment, and set the flags explicitly to make segments read-only.
52 */
53PHDRS
54{
55 text PT_LOAD FILEHDR PHDRS FLAGS(5); /* PF_R|PF_X */
56 dynamic PT_DYNAMIC FLAGS(4); /* PF_R */
57 note PT_NOTE FLAGS(4); /* PF_R */
58 eh_frame_hdr 0x6474e550; /* PT_GNU_EH_FRAME, but ld doesn't match the name */
59}
60
61/*
62 * This controls what symbols we export from the DSO.
63 */
64VERSION
65{
66 LINUX_2.6 {
67 global:
68 __kernel_vsyscall;
69 __kernel_sigreturn;
70 __kernel_rt_sigreturn;
71
72 local: *;
73 };
74}
diff --git a/arch/sh/lib/checksum.S b/arch/sh/lib/checksum.S
index 7c50dfe68c07..cbdd0d40e545 100644
--- a/arch/sh/lib/checksum.S
+++ b/arch/sh/lib/checksum.S
@@ -202,8 +202,9 @@ ENTRY(csum_partial_copy_generic)
202 cmp/pz r6 ! Jump if we had at least two bytes. 202 cmp/pz r6 ! Jump if we had at least two bytes.
203 bt/s 1f 203 bt/s 1f
204 clrt 204 clrt
205 add #2,r6 ! r6 was < 2. Deal with it.
205 bra 4f 206 bra 4f
206 add #2,r6 ! r6 was < 2. Deal with it. 207 mov r6,r2
207 208
2083: ! Handle different src and dest alignments. 2093: ! Handle different src and dest alignments.
209 ! This is not common, so simple byte by byte copy will do. 210 ! This is not common, so simple byte by byte copy will do.
diff --git a/arch/sh/lib/memcpy-sh4.S b/arch/sh/lib/memcpy-sh4.S
index db6b736537ad..560bc17eebdd 100644
--- a/arch/sh/lib/memcpy-sh4.S
+++ b/arch/sh/lib/memcpy-sh4.S
@@ -727,8 +727,8 @@ ENTRY(memcpy)
727 mov.l @(0x04,r5), r11 ! 18 LS (latency=2) 727 mov.l @(0x04,r5), r11 ! 18 LS (latency=2)
728 xtrct r9, r8 ! 48 EX 728 xtrct r9, r8 ! 48 EX
729 729
730 mov.w @(0x02,r5), r12 ! 18 LS (latency=2) 730 mov.l @(0x00,r5), r12 ! 18 LS (latency=2)
731 xtrct r10, r9 ! 48 EX 731 xtrct r10, r9 ! 48 EX
732 732
733 movca.l r0,@r1 ! 40 LS (latency=3-7) 733 movca.l r0,@r1 ! 40 LS (latency=3-7)
734 add #-0x1c, r1 ! 50 EX 734 add #-0x1c, r1 ! 50 EX
diff --git a/arch/sh/lib/memset.S b/arch/sh/lib/memset.S
index 95670090680e..af91fe2b72a6 100644
--- a/arch/sh/lib/memset.S
+++ b/arch/sh/lib/memset.S
@@ -29,6 +29,7 @@ ENTRY(memset)
29 bf/s 1b 29 bf/s 1b
30 mov.b r5,@-r4 30 mov.b r5,@-r4
312: ! make VVVV 312: ! make VVVV
32 extu.b r5,r5
32 swap.b r5,r0 ! V0 33 swap.b r5,r0 ! V0
33 or r0,r5 ! VV 34 or r0,r5 ! VV
34 swap.w r5,r0 ! VV00 35 swap.w r5,r0 ! VV00
diff --git a/arch/sh/math-emu/Makefile b/arch/sh/math-emu/Makefile
new file mode 100644
index 000000000000..638b342c781a
--- /dev/null
+++ b/arch/sh/math-emu/Makefile
@@ -0,0 +1 @@
obj-y := math.o
diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c
new file mode 100644
index 000000000000..26b6046814fd
--- /dev/null
+++ b/arch/sh/math-emu/math.c
@@ -0,0 +1,624 @@
1/*
2 * arch/sh/math-emu/math.c
3 *
4 * Copyright (C) 2006 Takashi YOSHII <takasi-y@ops.dti.ne.jp>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/config.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/types.h>
14#include <linux/sched.h>
15#include <linux/signal.h>
16
17#include <asm/system.h>
18#include <asm/uaccess.h>
19#include <asm/processor.h>
20#include <asm/io.h>
21
22#include "sfp-util.h"
23#include <math-emu/soft-fp.h>
24#include <math-emu/single.h>
25#include <math-emu/double.h>
26
27#define FPUL (fregs->fpul)
28#define FPSCR (fregs->fpscr)
29#define FPSCR_RM (FPSCR&3)
30#define FPSCR_DN ((FPSCR>>18)&1)
31#define FPSCR_PR ((FPSCR>>19)&1)
32#define FPSCR_SZ ((FPSCR>>20)&1)
33#define FPSCR_FR ((FPSCR>>21)&1)
34#define FPSCR_MASK 0x003fffffUL
35
36#define BANK(n) (n^(FPSCR_FR?16:0))
37#define FR ((unsigned long*)(fregs->fp_regs))
38#define FR0 (FR[BANK(0)])
39#define FRn (FR[BANK(n)])
40#define FRm (FR[BANK(m)])
41#define DR ((unsigned long long*)(fregs->fp_regs))
42#define DRn (DR[BANK(n)/2])
43#define DRm (DR[BANK(m)/2])
44
45#define XREG(n) (n^16)
46#define XFn (FR[BANK(XREG(n))])
47#define XFm (FR[BANK(XREG(m))])
48#define XDn (DR[BANK(XREG(n))/2])
49#define XDm (DR[BANK(XREG(m))/2])
50
51#define R0 (regs->regs[0])
52#define Rn (regs->regs[n])
53#define Rm (regs->regs[m])
54
55#define WRITE(d,a) ({if(put_user(d, (typeof (d)*)a)) return -EFAULT;})
56#define READ(d,a) ({if(get_user(d, (typeof (d)*)a)) return -EFAULT;})
57
58#define PACK_S(r,f) FP_PACK_SP(&r,f)
59#define UNPACK_S(f,r) FP_UNPACK_SP(f,&r)
60#define PACK_D(r,f) \
61 {u32 t[2]; FP_PACK_DP(t,f); ((u32*)&r)[0]=t[1]; ((u32*)&r)[1]=t[0];}
62#define UNPACK_D(f,r) \
63 {u32 t[2]; t[0]=((u32*)&r)[1]; t[1]=((u32*)&r)[0]; FP_UNPACK_DP(f,t);}
64
65// 2 args instructions.
66#define BOTH_PRmn(op,x) \
67 FP_DECL_EX; if(FPSCR_PR) op(D,x,DRm,DRn); else op(S,x,FRm,FRn);
68
69#define CMP_X(SZ,R,M,N) do{ \
70 FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); \
71 UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \
72 FP_CMP_##SZ(R, Fn, Fm, 2); }while(0)
73#define EQ_X(SZ,R,M,N) do{ \
74 FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); \
75 UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \
76 FP_CMP_EQ_##SZ(R, Fn, Fm); }while(0)
77#define CMP(OP) ({ int r; BOTH_PRmn(OP##_X,r); r; })
78
79static int
80fcmp_gt(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
81{
82 if (CMP(CMP) > 0)
83 regs->sr |= 1;
84 else
85 regs->sr &= ~1;
86
87 return 0;
88}
89
90static int
91fcmp_eq(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
92{
93 if (CMP(CMP /*EQ*/) == 0)
94 regs->sr |= 1;
95 else
96 regs->sr &= ~1;
97 return 0;
98}
99
100#define ARITH_X(SZ,OP,M,N) do{ \
101 FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); FP_DECL_##SZ(Fr); \
102 UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \
103 FP_##OP##_##SZ(Fr, Fn, Fm); \
104 PACK_##SZ(N, Fr); }while(0)
105
106static int
107fadd(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
108{
109 BOTH_PRmn(ARITH_X, ADD);
110 return 0;
111}
112
113static int
114fsub(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
115{
116 BOTH_PRmn(ARITH_X, SUB);
117 return 0;
118}
119
120static int
121fmul(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
122{
123 BOTH_PRmn(ARITH_X, MUL);
124 return 0;
125}
126
127static int
128fdiv(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
129{
130 BOTH_PRmn(ARITH_X, DIV);
131 return 0;
132}
133
134static int
135fmac(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
136{
137 FP_DECL_EX;
138 FP_DECL_S(Fr);
139 FP_DECL_S(Ft);
140 FP_DECL_S(F0);
141 FP_DECL_S(Fm);
142 FP_DECL_S(Fn);
143 UNPACK_S(F0, FR0);
144 UNPACK_S(Fm, FRm);
145 UNPACK_S(Fn, FRn);
146 FP_MUL_S(Ft, Fm, F0);
147 FP_ADD_S(Fr, Fn, Ft);
148 PACK_S(FRn, Fr);
149 return 0;
150}
151
152// to process fmov's extention (odd n for DR access XD).
153#define FMOV_EXT(x) if(x&1) x+=16-1
154
155static int
156fmov_idx_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
157 int n)
158{
159 if (FPSCR_SZ) {
160 FMOV_EXT(n);
161 READ(FRn, Rm + R0 + 4);
162 n++;
163 READ(FRn, Rm + R0);
164 } else {
165 READ(FRn, Rm + R0);
166 }
167
168 return 0;
169}
170
171static int
172fmov_mem_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
173 int n)
174{
175 if (FPSCR_SZ) {
176 FMOV_EXT(n);
177 READ(FRn, Rm + 4);
178 n++;
179 READ(FRn, Rm);
180 } else {
181 READ(FRn, Rm);
182 }
183
184 return 0;
185}
186
187static int
188fmov_inc_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
189 int n)
190{
191 if (FPSCR_SZ) {
192 FMOV_EXT(n);
193 READ(FRn, Rm + 4);
194 n++;
195 READ(FRn, Rm);
196 Rm += 8;
197 } else {
198 READ(FRn, Rm);
199 Rm += 4;
200 }
201
202 return 0;
203}
204
205static int
206fmov_reg_idx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
207 int n)
208{
209 if (FPSCR_SZ) {
210 FMOV_EXT(m);
211 WRITE(FRm, Rn + R0 + 4);
212 m++;
213 WRITE(FRm, Rn + R0);
214 } else {
215 WRITE(FRm, Rn + R0);
216 }
217
218 return 0;
219}
220
221static int
222fmov_reg_mem(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
223 int n)
224{
225 if (FPSCR_SZ) {
226 FMOV_EXT(m);
227 WRITE(FRm, Rn + 4);
228 m++;
229 WRITE(FRm, Rn);
230 } else {
231 WRITE(FRm, Rn);
232 }
233
234 return 0;
235}
236
237static int
238fmov_reg_dec(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
239 int n)
240{
241 if (FPSCR_SZ) {
242 FMOV_EXT(m);
243 Rn -= 8;
244 WRITE(FRm, Rn + 4);
245 m++;
246 WRITE(FRm, Rn);
247 } else {
248 Rn -= 4;
249 WRITE(FRm, Rn);
250 }
251
252 return 0;
253}
254
255static int
256fmov_reg_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
257 int n)
258{
259 if (FPSCR_SZ) {
260 FMOV_EXT(m);
261 FMOV_EXT(n);
262 DRn = DRm;
263 } else {
264 FRn = FRm;
265 }
266
267 return 0;
268}
269
270static int
271fnop_mn(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
272{
273 return -EINVAL;
274}
275
276// 1 arg instructions.
277#define NOTYETn(i) static int i(struct sh_fpu_soft_struct *fregs, int n) \
278 { printk( #i " not yet done.\n"); return 0; }
279
280NOTYETn(ftrv)
281NOTYETn(fsqrt)
282NOTYETn(fipr)
283NOTYETn(fsca)
284NOTYETn(fsrra)
285
286#define EMU_FLOAT_X(SZ,N) do { \
287 FP_DECL_##SZ(Fn); \
288 FP_FROM_INT_##SZ(Fn, FPUL, 32, int); \
289 PACK_##SZ(N, Fn); }while(0)
290static int ffloat(struct sh_fpu_soft_struct *fregs, int n)
291{
292 FP_DECL_EX;
293
294 if (FPSCR_PR)
295 EMU_FLOAT_X(D, DRn);
296 else
297 EMU_FLOAT_X(S, FRn);
298
299 return 0;
300}
301
302#define EMU_FTRC_X(SZ,N) do { \
303 FP_DECL_##SZ(Fn); \
304 UNPACK_##SZ(Fn, N); \
305 FP_TO_INT_##SZ(FPUL, Fn, 32, 1); }while(0)
306static int ftrc(struct sh_fpu_soft_struct *fregs, int n)
307{
308 FP_DECL_EX;
309
310 if (FPSCR_PR)
311 EMU_FTRC_X(D, DRn);
312 else
313 EMU_FTRC_X(S, FRn);
314
315 return 0;
316}
317
318static int fcnvsd(struct sh_fpu_soft_struct *fregs, int n)
319{
320 FP_DECL_EX;
321 FP_DECL_S(Fn);
322 FP_DECL_D(Fr);
323 UNPACK_S(Fn, FPUL);
324 FP_CONV(D, S, 2, 1, Fr, Fn);
325 PACK_D(DRn, Fr);
326 return 0;
327}
328
329static int fcnvds(struct sh_fpu_soft_struct *fregs, int n)
330{
331 FP_DECL_EX;
332 FP_DECL_D(Fn);
333 FP_DECL_S(Fr);
334 UNPACK_D(Fn, DRn);
335 FP_CONV(S, D, 1, 2, Fr, Fn);
336 PACK_S(FPUL, Fr);
337 return 0;
338}
339
340static int fxchg(struct sh_fpu_soft_struct *fregs, int flag)
341{
342 FPSCR ^= flag;
343 return 0;
344}
345
346static int fsts(struct sh_fpu_soft_struct *fregs, int n)
347{
348 FRn = FPUL;
349 return 0;
350}
351
352static int flds(struct sh_fpu_soft_struct *fregs, int n)
353{
354 FPUL = FRn;
355 return 0;
356}
357
358static int fneg(struct sh_fpu_soft_struct *fregs, int n)
359{
360 FRn ^= (1 << (_FP_W_TYPE_SIZE - 1));
361 return 0;
362}
363
364static int fabs(struct sh_fpu_soft_struct *fregs, int n)
365{
366 FRn &= ~(1 << (_FP_W_TYPE_SIZE - 1));
367 return 0;
368}
369
370static int fld0(struct sh_fpu_soft_struct *fregs, int n)
371{
372 FRn = 0;
373 return 0;
374}
375
376static int fld1(struct sh_fpu_soft_struct *fregs, int n)
377{
378 FRn = (_FP_EXPBIAS_S << (_FP_FRACBITS_S - 1));
379 return 0;
380}
381
382static int fnop_n(struct sh_fpu_soft_struct *fregs, int n)
383{
384 return -EINVAL;
385}
386
387/// Instruction decoders.
388
389static int id_fxfd(struct sh_fpu_soft_struct *, int);
390static int id_fnxd(struct sh_fpu_soft_struct *, struct pt_regs *, int, int);
391
392static int (*fnxd[])(struct sh_fpu_soft_struct *, int) = {
393 fsts, flds, ffloat, ftrc, fneg, fabs, fsqrt, fsrra,
394 fld0, fld1, fcnvsd, fcnvds, fnop_n, fnop_n, fipr, id_fxfd
395};
396
397static int (*fnmx[])(struct sh_fpu_soft_struct *, struct pt_regs *, int, int) = {
398 fadd, fsub, fmul, fdiv, fcmp_eq, fcmp_gt, fmov_idx_reg, fmov_reg_idx,
399 fmov_mem_reg, fmov_inc_reg, fmov_reg_mem, fmov_reg_dec,
400 fmov_reg_reg, id_fnxd, fmac, fnop_mn};
401
402static int id_fxfd(struct sh_fpu_soft_struct *fregs, int x)
403{
404 const int flag[] = { FPSCR_SZ, FPSCR_PR, FPSCR_FR, 0 };
405 switch (x & 3) {
406 case 3:
407 fxchg(fregs, flag[x >> 2]);
408 break;
409 case 1:
410 ftrv(fregs, x - 1);
411 break;
412 default:
413 fsca(fregs, x);
414 }
415 return 0;
416}
417
418static int
419id_fnxd(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int x, int n)
420{
421 return (fnxd[x])(fregs, n);
422}
423
424static int
425id_fnmx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code)
426{
427 int n = (code >> 8) & 0xf, m = (code >> 4) & 0xf, x = code & 0xf;
428 return (fnmx[x])(fregs, regs, m, n);
429}
430
431static int
432id_sys(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code)
433{
434 int n = ((code >> 8) & 0xf);
435 unsigned long *reg = (code & 0x0010) ? &FPUL : &FPSCR;
436
437 switch (code & 0xf0ff) {
438 case 0x005a:
439 case 0x006a:
440 Rn = *reg;
441 break;
442 case 0x405a:
443 case 0x406a:
444 *reg = Rn;
445 break;
446 case 0x4052:
447 case 0x4062:
448 Rn -= 4;
449 WRITE(*reg, Rn);
450 break;
451 case 0x4056:
452 case 0x4066:
453 READ(*reg, Rn);
454 Rn += 4;
455 break;
456 default:
457 return -EINVAL;
458 }
459
460 return 0;
461}
462
463static int fpu_emulate(u16 code, struct sh_fpu_soft_struct *fregs, struct pt_regs *regs)
464{
465 if ((code & 0xf000) == 0xf000)
466 return id_fnmx(fregs, regs, code);
467 else
468 return id_sys(fregs, regs, code);
469}
470
471/**
472 * denormal_to_double - Given denormalized float number,
473 * store double float
474 *
475 * @fpu: Pointer to sh_fpu_hard structure
476 * @n: Index to FP register
477 */
478static void denormal_to_double(struct sh_fpu_hard_struct *fpu, int n)
479{
480 unsigned long du, dl;
481 unsigned long x = fpu->fpul;
482 int exp = 1023 - 126;
483
484 if (x != 0 && (x & 0x7f800000) == 0) {
485 du = (x & 0x80000000);
486 while ((x & 0x00800000) == 0) {
487 x <<= 1;
488 exp--;
489 }
490 x &= 0x007fffff;
491 du |= (exp << 20) | (x >> 3);
492 dl = x << 29;
493
494 fpu->fp_regs[n] = du;
495 fpu->fp_regs[n+1] = dl;
496 }
497}
498
499/**
500 * ieee_fpe_handler - Handle denormalized number exception
501 *
502 * @regs: Pointer to register structure
503 *
504 * Returns 1 when it's handled (should not cause exception).
505 */
506static int ieee_fpe_handler(struct pt_regs *regs)
507{
508 unsigned short insn = *(unsigned short *)regs->pc;
509 unsigned short finsn;
510 unsigned long nextpc;
511 int nib[4] = {
512 (insn >> 12) & 0xf,
513 (insn >> 8) & 0xf,
514 (insn >> 4) & 0xf,
515 insn & 0xf};
516
517 if (nib[0] == 0xb ||
518 (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */
519 regs->pr = regs->pc + 4;
520
521 if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */
522 nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3);
523 finsn = *(unsigned short *) (regs->pc + 2);
524 } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */
525 if (regs->sr & 1)
526 nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
527 else
528 nextpc = regs->pc + 4;
529 finsn = *(unsigned short *) (regs->pc + 2);
530 } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */
531 if (regs->sr & 1)
532 nextpc = regs->pc + 4;
533 else
534 nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
535 finsn = *(unsigned short *) (regs->pc + 2);
536 } else if (nib[0] == 0x4 && nib[3] == 0xb &&
537 (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */
538 nextpc = regs->regs[nib[1]];
539 finsn = *(unsigned short *) (regs->pc + 2);
540 } else if (nib[0] == 0x0 && nib[3] == 0x3 &&
541 (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */
542 nextpc = regs->pc + 4 + regs->regs[nib[1]];
543 finsn = *(unsigned short *) (regs->pc + 2);
544 } else if (insn == 0x000b) { /* rts */
545 nextpc = regs->pr;
546 finsn = *(unsigned short *) (regs->pc + 2);
547 } else {
548 nextpc = regs->pc + 2;
549 finsn = insn;
550 }
551
552 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
553 struct task_struct *tsk = current;
554
555 if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) {
556 /* FPU error */
557 denormal_to_double (&tsk->thread.fpu.hard,
558 (finsn >> 8) & 0xf);
559 tsk->thread.fpu.hard.fpscr &=
560 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
561 set_tsk_thread_flag(tsk, TIF_USEDFPU);
562 } else {
563 tsk->thread.trap_no = 11;
564 tsk->thread.error_code = 0;
565 force_sig(SIGFPE, tsk);
566 }
567
568 regs->pc = nextpc;
569 return 1;
570 }
571
572 return 0;
573}
574
575asmlinkage void do_fpu_error(unsigned long r4, unsigned long r5,
576 unsigned long r6, unsigned long r7,
577 struct pt_regs regs)
578{
579 struct task_struct *tsk = current;
580
581 if (ieee_fpe_handler (&regs))
582 return;
583
584 regs.pc += 2;
585 tsk->thread.trap_no = 11;
586 tsk->thread.error_code = 0;
587 force_sig(SIGFPE, tsk);
588}
589
590/**
591 * fpu_init - Initialize FPU registers
592 * @fpu: Pointer to software emulated FPU registers.
593 */
594static void fpu_init(struct sh_fpu_soft_struct *fpu)
595{
596 int i;
597
598 fpu->fpscr = FPSCR_INIT;
599 fpu->fpul = 0;
600
601 for (i = 0; i < 16; i++) {
602 fpu->fp_regs[i] = 0;
603 fpu->xfp_regs[i]= 0;
604 }
605}
606
607/**
608 * do_fpu_inst - Handle reserved instructions for FPU emulation
609 * @inst: instruction code.
610 * @regs: registers on stack.
611 */
612int do_fpu_inst(unsigned short inst, struct pt_regs *regs)
613{
614 struct task_struct *tsk = current;
615 struct sh_fpu_soft_struct *fpu = &(tsk->thread.fpu.soft);
616
617 if (!test_tsk_thread_flag(tsk, TIF_USEDFPU)) {
618 /* initialize once. */
619 fpu_init(fpu);
620 set_tsk_thread_flag(tsk, TIF_USEDFPU);
621 }
622
623 return fpu_emulate(inst, fpu, regs);
624}
diff --git a/arch/sh/math-emu/sfp-util.h b/arch/sh/math-emu/sfp-util.h
new file mode 100644
index 000000000000..8ae1bd310ad0
--- /dev/null
+++ b/arch/sh/math-emu/sfp-util.h
@@ -0,0 +1,72 @@
1/*
2 * These are copied from glibc/stdlib/longlong.h
3 */
4
5#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
6 do { \
7 UWtype __x; \
8 __x = (al) + (bl); \
9 (sh) = (ah) + (bh) + (__x < (al)); \
10 (sl) = __x; \
11 } while (0)
12
13#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
14 do { \
15 UWtype __x; \
16 __x = (al) - (bl); \
17 (sh) = (ah) - (bh) - (__x > (al)); \
18 (sl) = __x; \
19 } while (0)
20
21#define umul_ppmm(w1, w0, u, v) \
22 __asm__ ("dmulu.l %2,%3\n\tsts macl,%1\n\tsts mach,%0" \
23 : "=r" ((u32)(w1)), "=r" ((u32)(w0)) \
24 : "r" ((u32)(u)), "r" ((u32)(v)) \
25 : "macl", "mach")
26
27#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
28#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
29#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
30
31#define udiv_qrnnd(q, r, n1, n0, d) \
32 do { \
33 UWtype __d1, __d0, __q1, __q0; \
34 UWtype __r1, __r0, __m; \
35 __d1 = __ll_highpart (d); \
36 __d0 = __ll_lowpart (d); \
37 \
38 __r1 = (n1) % __d1; \
39 __q1 = (n1) / __d1; \
40 __m = (UWtype) __q1 * __d0; \
41 __r1 = __r1 * __ll_B | __ll_highpart (n0); \
42 if (__r1 < __m) \
43 { \
44 __q1--, __r1 += (d); \
45 if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
46 if (__r1 < __m) \
47 __q1--, __r1 += (d); \
48 } \
49 __r1 -= __m; \
50 \
51 __r0 = __r1 % __d1; \
52 __q0 = __r1 / __d1; \
53 __m = (UWtype) __q0 * __d0; \
54 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
55 if (__r0 < __m) \
56 { \
57 __q0--, __r0 += (d); \
58 if (__r0 >= (d)) \
59 if (__r0 < __m) \
60 __q0--, __r0 += (d); \
61 } \
62 __r0 -= __m; \
63 \
64 (q) = (UWtype) __q1 * __ll_B | __q0; \
65 (r) = __r0; \
66 } while (0)
67
68#define abort() return 0
69
70#define __BYTE_ORDER __LITTLE_ENDIAN
71
72
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index fb586b1cf8bb..9dd606464d23 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -20,7 +20,10 @@ config CPU_SH4
20config CPU_SH4A 20config CPU_SH4A
21 bool 21 bool
22 select CPU_SH4 22 select CPU_SH4
23 select CPU_HAS_INTC2_IRQ 23
24config CPU_SH4AL_DSP
25 bool
26 select CPU_SH4A
24 27
25config CPU_SUBTYPE_ST40 28config CPU_SUBTYPE_ST40
26 bool 29 bool
@@ -48,6 +51,12 @@ config CPU_SUBTYPE_SH7705
48 select CPU_SH3 51 select CPU_SH3
49 select CPU_HAS_PINT_IRQ 52 select CPU_HAS_PINT_IRQ
50 53
54config CPU_SUBTYPE_SH7706
55 bool "Support SH7706 processor"
56 select CPU_SH3
57 help
58 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
59
51config CPU_SUBTYPE_SH7707 60config CPU_SUBTYPE_SH7707
52 bool "Support SH7707 processor" 61 bool "Support SH7707 processor"
53 select CPU_SH3 62 select CPU_SH3
@@ -69,6 +78,12 @@ config CPU_SUBTYPE_SH7709
69 help 78 help
70 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 79 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
71 80
81config CPU_SUBTYPE_SH7710
82 bool "Support SH7710 processor"
83 select CPU_SH3
84 help
85 Select SH7710 if you have a SH3-DSP SH7710 CPU.
86
72comment "SH-4 Processor Support" 87comment "SH-4 Processor Support"
73 88
74config CPU_SUBTYPE_SH7750 89config CPU_SUBTYPE_SH7750
@@ -133,10 +148,6 @@ config CPU_SUBTYPE_ST40GX1
133 148
134comment "SH-4A Processor Support" 149comment "SH-4A Processor Support"
135 150
136config CPU_SUBTYPE_SH73180
137 bool "Support SH73180 processor"
138 select CPU_SH4A
139
140config CPU_SUBTYPE_SH7770 151config CPU_SUBTYPE_SH7770
141 bool "Support SH7770 processor" 152 bool "Support SH7770 processor"
142 select CPU_SH4A 153 select CPU_SH4A
@@ -144,6 +155,17 @@ config CPU_SUBTYPE_SH7770
144config CPU_SUBTYPE_SH7780 155config CPU_SUBTYPE_SH7780
145 bool "Support SH7780 processor" 156 bool "Support SH7780 processor"
146 select CPU_SH4A 157 select CPU_SH4A
158 select CPU_HAS_INTC2_IRQ
159
160comment "SH4AL-DSP Processor Support"
161
162config CPU_SUBTYPE_SH73180
163 bool "Support SH73180 processor"
164 select CPU_SH4AL_DSP
165
166config CPU_SUBTYPE_SH7343
167 bool "Support SH7343 processor"
168 select CPU_SH4AL_DSP
147 169
148endmenu 170endmenu
149 171
@@ -161,15 +183,59 @@ config MMU
161 turning this off will boot the kernel on these machines with the 183 turning this off will boot the kernel on these machines with the
162 MMU implicitly switched off. 184 MMU implicitly switched off.
163 185
186config PAGE_OFFSET
187 hex
188 default "0x80000000" if MMU
189 default "0x00000000"
190
191config MEMORY_START
192 hex "Physical memory start address"
193 default "0x08000000"
194 ---help---
195 Computers built with Hitachi SuperH processors always
196 map the ROM starting at address zero. But the processor
197 does not specify the range that RAM takes.
198
199 The physical memory (RAM) start address will be automatically
200 set to 08000000. Other platforms, such as the Solution Engine
201 boards typically map RAM at 0C000000.
202
203 Tweak this only when porting to a new machine which does not
204 already have a defconfig. Changing it from the known correct
205 value on any of the known systems will only lead to disaster.
206
207config MEMORY_SIZE
208 hex "Physical memory size"
209 default "0x00400000"
210 help
211 This sets the default memory size assumed by your SH kernel. It can
212 be overridden as normal by the 'mem=' argument on the kernel command
213 line. If unsure, consult your board specifications or just leave it
214 as 0x00400000 which was the default value before this became
215 configurable.
216
164config 32BIT 217config 32BIT
165 bool "Support 32-bit physical addressing through PMB" 218 bool "Support 32-bit physical addressing through PMB"
166 depends on CPU_SH4A 219 depends on CPU_SH4A && MMU
167 default y 220 default y
168 help 221 help
169 If you say Y here, physical addressing will be extended to 222 If you say Y here, physical addressing will be extended to
170 32-bits through the SH-4A PMB. If this is not set, legacy 223 32-bits through the SH-4A PMB. If this is not set, legacy
171 29-bit physical addressing will be used. 224 29-bit physical addressing will be used.
172 225
226config VSYSCALL
227 bool "Support vsyscall page"
228 depends on MMU
229 default y
230 help
231 This will enable support for the kernel mapping a vDSO page
232 in process space, and subsequently handing down the entry point
233 to the libc through the ELF auxiliary vector.
234
235 From the kernel side this is used for the signal trampoline.
236 For systems with an MMU that can afford to give up a page,
237 (the default value) say Y.
238
173choice 239choice
174 prompt "HugeTLB page size" 240 prompt "HugeTLB page size"
175 depends on HUGETLB_PAGE && CPU_SH4 && MMU 241 depends on HUGETLB_PAGE && CPU_SH4 && MMU
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index 9489a1424644..3ffd7f68c0a2 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -6,20 +6,26 @@ obj-y := init.o extable.o consistent.o
6 6
7obj-$(CONFIG_CPU_SH2) += cache-sh2.o 7obj-$(CONFIG_CPU_SH2) += cache-sh2.o
8obj-$(CONFIG_CPU_SH3) += cache-sh3.o 8obj-$(CONFIG_CPU_SH3) += cache-sh3.o
9obj-$(CONFIG_CPU_SH4) += cache-sh4.o pg-sh4.o 9obj-$(CONFIG_CPU_SH4) += cache-sh4.o
10 10
11obj-$(CONFIG_DMA_PAGE_OPS) += pg-dma.o 11obj-$(CONFIG_DMA_PAGE_OPS) += pg-dma.o
12obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 12obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
13 13
14mmu-y := fault-nommu.o tlb-nommu.o pg-nommu.o 14mmu-y := fault-nommu.o tlb-nommu.o pg-nommu.o
15mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o 15mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o \
16 ioremap.o
16 17
17obj-y += $(mmu-y) 18obj-y += $(mmu-y)
18 19
20ifdef CONFIG_DEBUG_FS
21obj-$(CONFIG_CPU_SH4) += cache-debugfs.o
22endif
23
19ifdef CONFIG_MMU 24ifdef CONFIG_MMU
20obj-$(CONFIG_CPU_SH3) += tlb-sh3.o 25obj-$(CONFIG_CPU_SH3) += tlb-sh3.o
21obj-$(CONFIG_CPU_SH4) += tlb-sh4.o ioremap.o 26obj-$(CONFIG_CPU_SH4) += tlb-sh4.o pg-sh4.o
22obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o 27obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
23endif 28endif
24 29
25obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o 30obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
31obj-$(CONFIG_32BIT) += pmb.o
diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c
new file mode 100644
index 000000000000..a22d914e4d15
--- /dev/null
+++ b/arch/sh/mm/cache-debugfs.c
@@ -0,0 +1,147 @@
1/*
2 * debugfs ops for the L1 cache
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <asm/processor.h>
15#include <asm/uaccess.h>
16#include <asm/cache.h>
17#include <asm/io.h>
18
19enum cache_type {
20 CACHE_TYPE_ICACHE,
21 CACHE_TYPE_DCACHE,
22 CACHE_TYPE_UNIFIED,
23};
24
25static int cache_seq_show(struct seq_file *file, void *iter)
26{
27 unsigned int cache_type = (unsigned int)file->private;
28 struct cache_info *cache;
29 unsigned int waysize, way, cache_size;
30 unsigned long ccr, base;
31 static unsigned long addrstart = 0;
32
33 /*
34 * Go uncached immediately so we don't skew the results any
35 * more than we already are..
36 */
37 jump_to_P2();
38
39 ccr = ctrl_inl(CCR);
40 if ((ccr & CCR_CACHE_ENABLE) == 0) {
41 back_to_P1();
42
43 seq_printf(file, "disabled\n");
44 return 0;
45 }
46
47 if (cache_type == CACHE_TYPE_DCACHE) {
48 base = CACHE_OC_ADDRESS_ARRAY;
49 cache = &cpu_data->dcache;
50 } else {
51 base = CACHE_IC_ADDRESS_ARRAY;
52 cache = &cpu_data->icache;
53 }
54
55 /*
56 * Due to the amount of data written out (depending on the cache size),
57 * we may be iterated over multiple times. In this case, keep track of
58 * the entry position in addrstart, and rewind it when we've hit the
59 * end of the cache.
60 *
61 * Likewise, the same code is used for multiple caches, so care must
62 * be taken for bouncing addrstart back and forth so the appropriate
63 * cache is hit.
64 */
65 cache_size = cache->ways * cache->sets * cache->linesz;
66 if (((addrstart & 0xff000000) != base) ||
67 (addrstart & 0x00ffffff) > cache_size)
68 addrstart = base;
69
70 waysize = cache->sets;
71
72 /*
73 * If the OC is already in RAM mode, we only have
74 * half of the entries to consider..
75 */
76 if ((ccr & CCR_CACHE_ORA) && cache_type == CACHE_TYPE_DCACHE)
77 waysize >>= 1;
78
79 waysize <<= cache->entry_shift;
80
81 for (way = 0; way < cache->ways; way++) {
82 unsigned long addr;
83 unsigned int line;
84
85 seq_printf(file, "-----------------------------------------\n");
86 seq_printf(file, "Way %d\n", way);
87 seq_printf(file, "-----------------------------------------\n");
88
89 for (addr = addrstart, line = 0;
90 addr < addrstart + waysize;
91 addr += cache->linesz, line++) {
92 unsigned long data = ctrl_inl(addr);
93
94 /* Check the V bit, ignore invalid cachelines */
95 if ((data & 1) == 0)
96 continue;
97
98 /* U: Dirty, cache tag is 10 bits up */
99 seq_printf(file, "%3d: %c 0x%lx\n",
100 line, data & 2 ? 'U' : ' ',
101 data & 0x1ffffc00);
102 }
103
104 addrstart += cache->way_incr;
105 }
106
107 back_to_P1();
108
109 return 0;
110}
111
112static int cache_debugfs_open(struct inode *inode, struct file *file)
113{
114 return single_open(file, cache_seq_show, inode->u.generic_ip);
115}
116
117static struct file_operations cache_debugfs_fops = {
118 .owner = THIS_MODULE,
119 .open = cache_debugfs_open,
120 .read = seq_read,
121 .llseek = seq_lseek,
122 .release = seq_release,
123};
124
125static int __init cache_debugfs_init(void)
126{
127 struct dentry *dcache_dentry, *icache_dentry;
128
129 dcache_dentry = debugfs_create_file("dcache", S_IRUSR, NULL,
130 (unsigned int *)CACHE_TYPE_DCACHE,
131 &cache_debugfs_fops);
132 if (IS_ERR(dcache_dentry))
133 return PTR_ERR(dcache_dentry);
134
135 icache_dentry = debugfs_create_file("icache", S_IRUSR, NULL,
136 (unsigned int *)CACHE_TYPE_ICACHE,
137 &cache_debugfs_fops);
138 if (IS_ERR(icache_dentry)) {
139 debugfs_remove(dcache_dentry);
140 return PTR_ERR(icache_dentry);
141 }
142
143 return 0;
144}
145module_init(cache_debugfs_init);
146
147MODULE_LICENSE("GPL v2");
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 524cea5b47f9..e48cc22724d9 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -2,49 +2,120 @@
2 * arch/sh/mm/cache-sh4.c 2 * arch/sh/mm/cache-sh4.c
3 * 3 *
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2001, 2002, 2003, 2004 Paul Mundt 5 * Copyright (C) 2001 - 2006 Paul Mundt
6 * Copyright (C) 2003 Richard Curnow 6 * Copyright (C) 2003 Richard Curnow
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details. 10 * for more details.
11 */ 11 */
12
13#include <linux/init.h> 12#include <linux/init.h>
14#include <linux/mman.h>
15#include <linux/mm.h> 13#include <linux/mm.h>
16#include <linux/threads.h>
17#include <asm/addrspace.h> 14#include <asm/addrspace.h>
18#include <asm/page.h>
19#include <asm/pgtable.h> 15#include <asm/pgtable.h>
20#include <asm/processor.h> 16#include <asm/processor.h>
21#include <asm/cache.h> 17#include <asm/cache.h>
22#include <asm/io.h> 18#include <asm/io.h>
23#include <asm/uaccess.h>
24#include <asm/pgalloc.h> 19#include <asm/pgalloc.h>
25#include <asm/mmu_context.h> 20#include <asm/mmu_context.h>
26#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
27 22
28extern void __flush_cache_4096_all(unsigned long start); 23/*
29static void __flush_cache_4096_all_ex(unsigned long start); 24 * The maximum number of pages we support up to when doing ranged dcache
30extern void __flush_dcache_all(void); 25 * flushing. Anything exceeding this will simply flush the dcache in its
31static void __flush_dcache_all_ex(void); 26 * entirety.
27 */
28#define MAX_DCACHE_PAGES 64 /* XXX: Tune for ways */
29
30static void __flush_dcache_segment_1way(unsigned long start,
31 unsigned long extent);
32static void __flush_dcache_segment_2way(unsigned long start,
33 unsigned long extent);
34static void __flush_dcache_segment_4way(unsigned long start,
35 unsigned long extent);
36
37static void __flush_cache_4096(unsigned long addr, unsigned long phys,
38 unsigned long exec_offset);
39
40/*
41 * This is initialised here to ensure that it is not placed in the BSS. If
42 * that were to happen, note that cache_init gets called before the BSS is
43 * cleared, so this would get nulled out which would be hopeless.
44 */
45static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) =
46 (void (*)(unsigned long, unsigned long))0xdeadbeef;
47
48static void compute_alias(struct cache_info *c)
49{
50 c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1);
51 c->n_aliases = (c->alias_mask >> PAGE_SHIFT) + 1;
52}
53
54static void __init emit_cache_params(void)
55{
56 printk("PVR=%08x CVR=%08x PRR=%08x\n",
57 ctrl_inl(CCN_PVR),
58 ctrl_inl(CCN_CVR),
59 ctrl_inl(CCN_PRR));
60 printk("I-cache : n_ways=%d n_sets=%d way_incr=%d\n",
61 cpu_data->icache.ways,
62 cpu_data->icache.sets,
63 cpu_data->icache.way_incr);
64 printk("I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
65 cpu_data->icache.entry_mask,
66 cpu_data->icache.alias_mask,
67 cpu_data->icache.n_aliases);
68 printk("D-cache : n_ways=%d n_sets=%d way_incr=%d\n",
69 cpu_data->dcache.ways,
70 cpu_data->dcache.sets,
71 cpu_data->dcache.way_incr);
72 printk("D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
73 cpu_data->dcache.entry_mask,
74 cpu_data->dcache.alias_mask,
75 cpu_data->dcache.n_aliases);
76
77 if (!__flush_dcache_segment_fn)
78 panic("unknown number of cache ways\n");
79}
32 80
33/* 81/*
34 * SH-4 has virtually indexed and physically tagged cache. 82 * SH-4 has virtually indexed and physically tagged cache.
35 */ 83 */
36 84
37struct semaphore p3map_sem[4]; 85/* Worst case assumed to be 64k cache, direct-mapped i.e. 4 synonym bits. */
86#define MAX_P3_SEMAPHORES 16
87
88struct semaphore p3map_sem[MAX_P3_SEMAPHORES];
38 89
39void __init p3_cache_init(void) 90void __init p3_cache_init(void)
40{ 91{
41 if (remap_area_pages(P3SEG, 0, PAGE_SIZE*4, _PAGE_CACHABLE)) 92 int i;
93
94 compute_alias(&cpu_data->icache);
95 compute_alias(&cpu_data->dcache);
96
97 switch (cpu_data->dcache.ways) {
98 case 1:
99 __flush_dcache_segment_fn = __flush_dcache_segment_1way;
100 break;
101 case 2:
102 __flush_dcache_segment_fn = __flush_dcache_segment_2way;
103 break;
104 case 4:
105 __flush_dcache_segment_fn = __flush_dcache_segment_4way;
106 break;
107 default:
108 __flush_dcache_segment_fn = NULL;
109 break;
110 }
111
112 emit_cache_params();
113
114 if (remap_area_pages(P3SEG, 0, PAGE_SIZE * 4, _PAGE_CACHABLE))
42 panic("%s failed.", __FUNCTION__); 115 panic("%s failed.", __FUNCTION__);
43 116
44 sema_init (&p3map_sem[0], 1); 117 for (i = 0; i < cpu_data->dcache.n_aliases; i++)
45 sema_init (&p3map_sem[1], 1); 118 sema_init(&p3map_sem[i], 1);
46 sema_init (&p3map_sem[2], 1);
47 sema_init (&p3map_sem[3], 1);
48} 119}
49 120
50/* 121/*
@@ -89,7 +160,6 @@ void __flush_purge_region(void *start, int size)
89 } 160 }
90} 161}
91 162
92
93/* 163/*
94 * No write back please 164 * No write back please
95 */ 165 */
@@ -108,40 +178,6 @@ void __flush_invalidate_region(void *start, int size)
108 } 178 }
109} 179}
110 180
111static void __flush_dcache_all_ex(void)
112{
113 unsigned long addr, end_addr, entry_offset;
114
115 end_addr = CACHE_OC_ADDRESS_ARRAY + (cpu_data->dcache.sets << cpu_data->dcache.entry_shift) * cpu_data->dcache.ways;
116 entry_offset = 1 << cpu_data->dcache.entry_shift;
117 for (addr = CACHE_OC_ADDRESS_ARRAY; addr < end_addr; addr += entry_offset) {
118 ctrl_outl(0, addr);
119 }
120}
121
122static void __flush_cache_4096_all_ex(unsigned long start)
123{
124 unsigned long addr, entry_offset;
125 int i;
126
127 entry_offset = 1 << cpu_data->dcache.entry_shift;
128 for (i = 0; i < cpu_data->dcache.ways; i++, start += cpu_data->dcache.way_incr) {
129 for (addr = CACHE_OC_ADDRESS_ARRAY + start;
130 addr < CACHE_OC_ADDRESS_ARRAY + 4096 + start;
131 addr += entry_offset) {
132 ctrl_outl(0, addr);
133 }
134 }
135}
136
137void flush_cache_4096_all(unsigned long start)
138{
139 if (cpu_data->dcache.ways == 1)
140 __flush_cache_4096_all(start);
141 else
142 __flush_cache_4096_all_ex(start);
143}
144
145/* 181/*
146 * Write back the range of D-cache, and purge the I-cache. 182 * Write back the range of D-cache, and purge the I-cache.
147 * 183 *
@@ -153,14 +189,14 @@ void flush_icache_range(unsigned long start, unsigned long end)
153} 189}
154 190
155/* 191/*
156 * Write back the D-cache and purge the I-cache for signal trampoline. 192 * Write back the D-cache and purge the I-cache for signal trampoline.
157 * .. which happens to be the same behavior as flush_icache_range(). 193 * .. which happens to be the same behavior as flush_icache_range().
158 * So, we simply flush out a line. 194 * So, we simply flush out a line.
159 */ 195 */
160void flush_cache_sigtramp(unsigned long addr) 196void flush_cache_sigtramp(unsigned long addr)
161{ 197{
162 unsigned long v, index; 198 unsigned long v, index;
163 unsigned long flags; 199 unsigned long flags;
164 int i; 200 int i;
165 201
166 v = addr & ~(L1_CACHE_BYTES-1); 202 v = addr & ~(L1_CACHE_BYTES-1);
@@ -172,30 +208,33 @@ void flush_cache_sigtramp(unsigned long addr)
172 208
173 local_irq_save(flags); 209 local_irq_save(flags);
174 jump_to_P2(); 210 jump_to_P2();
175 for(i = 0; i < cpu_data->icache.ways; i++, index += cpu_data->icache.way_incr) 211
212 for (i = 0; i < cpu_data->icache.ways;
213 i++, index += cpu_data->icache.way_incr)
176 ctrl_outl(0, index); /* Clear out Valid-bit */ 214 ctrl_outl(0, index); /* Clear out Valid-bit */
215
177 back_to_P1(); 216 back_to_P1();
217 wmb();
178 local_irq_restore(flags); 218 local_irq_restore(flags);
179} 219}
180 220
181static inline void flush_cache_4096(unsigned long start, 221static inline void flush_cache_4096(unsigned long start,
182 unsigned long phys) 222 unsigned long phys)
183{ 223{
184 unsigned long flags; 224 unsigned long flags, exec_offset = 0;
185 extern void __flush_cache_4096(unsigned long addr, unsigned long phys, unsigned long exec_offset);
186 225
187 /* 226 /*
188 * SH7751, SH7751R, and ST40 have no restriction to handle cache. 227 * All types of SH-4 require PC to be in P2 to operate on the I-cache.
189 * (While SH7750 must do that at P2 area.) 228 * Some types of SH-4 require PC to be in P2 to operate on the D-cache.
190 */ 229 */
191 if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) 230 if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) ||
192 || start < CACHE_OC_ADDRESS_ARRAY) { 231 (start < CACHE_OC_ADDRESS_ARRAY))
193 local_irq_save(flags); 232 exec_offset = 0x20000000;
194 __flush_cache_4096(start | SH_CACHE_ASSOC, P1SEGADDR(phys), 0x20000000); 233
195 local_irq_restore(flags); 234 local_irq_save(flags);
196 } else { 235 __flush_cache_4096(start | SH_CACHE_ASSOC,
197 __flush_cache_4096(start | SH_CACHE_ASSOC, P1SEGADDR(phys), 0); 236 P1SEGADDR(phys), exec_offset);
198 } 237 local_irq_restore(flags);
199} 238}
200 239
201/* 240/*
@@ -206,15 +245,19 @@ void flush_dcache_page(struct page *page)
206{ 245{
207 if (test_bit(PG_mapped, &page->flags)) { 246 if (test_bit(PG_mapped, &page->flags)) {
208 unsigned long phys = PHYSADDR(page_address(page)); 247 unsigned long phys = PHYSADDR(page_address(page));
248 unsigned long addr = CACHE_OC_ADDRESS_ARRAY;
249 int i, n;
209 250
210 /* Loop all the D-cache */ 251 /* Loop all the D-cache */
211 flush_cache_4096(CACHE_OC_ADDRESS_ARRAY, phys); 252 n = cpu_data->dcache.n_aliases;
212 flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x1000, phys); 253 for (i = 0; i < n; i++, addr += PAGE_SIZE)
213 flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x2000, phys); 254 flush_cache_4096(addr, phys);
214 flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x3000, phys);
215 } 255 }
256
257 wmb();
216} 258}
217 259
260/* TODO: Selective icache invalidation through IC address array.. */
218static inline void flush_icache_all(void) 261static inline void flush_icache_all(void)
219{ 262{
220 unsigned long flags, ccr; 263 unsigned long flags, ccr;
@@ -227,34 +270,142 @@ static inline void flush_icache_all(void)
227 ccr |= CCR_CACHE_ICI; 270 ccr |= CCR_CACHE_ICI;
228 ctrl_outl(ccr, CCR); 271 ctrl_outl(ccr, CCR);
229 272
273 /*
274 * back_to_P1() will take care of the barrier for us, don't add
275 * another one!
276 */
277
230 back_to_P1(); 278 back_to_P1();
231 local_irq_restore(flags); 279 local_irq_restore(flags);
232} 280}
233 281
282void flush_dcache_all(void)
283{
284 (*__flush_dcache_segment_fn)(0UL, cpu_data->dcache.way_size);
285 wmb();
286}
287
234void flush_cache_all(void) 288void flush_cache_all(void)
235{ 289{
236 if (cpu_data->dcache.ways == 1) 290 flush_dcache_all();
237 __flush_dcache_all();
238 else
239 __flush_dcache_all_ex();
240 flush_icache_all(); 291 flush_icache_all();
241} 292}
242 293
294static void __flush_cache_mm(struct mm_struct *mm, unsigned long start,
295 unsigned long end)
296{
297 unsigned long d = 0, p = start & PAGE_MASK;
298 unsigned long alias_mask = cpu_data->dcache.alias_mask;
299 unsigned long n_aliases = cpu_data->dcache.n_aliases;
300 unsigned long select_bit;
301 unsigned long all_aliases_mask;
302 unsigned long addr_offset;
303 pgd_t *dir;
304 pmd_t *pmd;
305 pud_t *pud;
306 pte_t *pte;
307 int i;
308
309 dir = pgd_offset(mm, p);
310 pud = pud_offset(dir, p);
311 pmd = pmd_offset(pud, p);
312 end = PAGE_ALIGN(end);
313
314 all_aliases_mask = (1 << n_aliases) - 1;
315
316 do {
317 if (pmd_none(*pmd) || unlikely(pmd_bad(*pmd))) {
318 p &= PMD_MASK;
319 p += PMD_SIZE;
320 pmd++;
321
322 continue;
323 }
324
325 pte = pte_offset_kernel(pmd, p);
326
327 do {
328 unsigned long phys;
329 pte_t entry = *pte;
330
331 if (!(pte_val(entry) & _PAGE_PRESENT)) {
332 pte++;
333 p += PAGE_SIZE;
334 continue;
335 }
336
337 phys = pte_val(entry) & PTE_PHYS_MASK;
338
339 if ((p ^ phys) & alias_mask) {
340 d |= 1 << ((p & alias_mask) >> PAGE_SHIFT);
341 d |= 1 << ((phys & alias_mask) >> PAGE_SHIFT);
342
343 if (d == all_aliases_mask)
344 goto loop_exit;
345 }
346
347 pte++;
348 p += PAGE_SIZE;
349 } while (p < end && ((unsigned long)pte & ~PAGE_MASK));
350 pmd++;
351 } while (p < end);
352
353loop_exit:
354 addr_offset = 0;
355 select_bit = 1;
356
357 for (i = 0; i < n_aliases; i++) {
358 if (d & select_bit) {
359 (*__flush_dcache_segment_fn)(addr_offset, PAGE_SIZE);
360 wmb();
361 }
362
363 select_bit <<= 1;
364 addr_offset += PAGE_SIZE;
365 }
366}
367
368/*
369 * Note : (RPC) since the caches are physically tagged, the only point
370 * of flush_cache_mm for SH-4 is to get rid of aliases from the
371 * D-cache. The assumption elsewhere, e.g. flush_cache_range, is that
372 * lines can stay resident so long as the virtual address they were
373 * accessed with (hence cache set) is in accord with the physical
374 * address (i.e. tag). It's no different here. So I reckon we don't
375 * need to flush the I-cache, since aliases don't matter for that. We
376 * should try that.
377 *
378 * Caller takes mm->mmap_sem.
379 */
243void flush_cache_mm(struct mm_struct *mm) 380void flush_cache_mm(struct mm_struct *mm)
244{ 381{
245 /* Is there any good way? */ 382 /*
246 /* XXX: possibly call flush_cache_range for each vm area */ 383 * If cache is only 4k-per-way, there are never any 'aliases'. Since
247 /* 384 * the cache is physically tagged, the data can just be left in there.
248 * FIXME: Really, the optimal solution here would be able to flush out
249 * individual lines created by the specified context, but this isn't
250 * feasible for a number of architectures (such as MIPS, and some
251 * SPARC) .. is this possible for SuperH?
252 *
253 * In the meantime, we'll just flush all of the caches.. this
254 * seems to be the simplest way to avoid at least a few wasted
255 * cache flushes. -Lethal
256 */ 385 */
257 flush_cache_all(); 386 if (cpu_data->dcache.n_aliases == 0)
387 return;
388
389 /*
390 * Don't bother groveling around the dcache for the VMA ranges
391 * if there are too many PTEs to make it worthwhile.
392 */
393 if (mm->nr_ptes >= MAX_DCACHE_PAGES)
394 flush_dcache_all();
395 else {
396 struct vm_area_struct *vma;
397
398 /*
399 * In this case there are reasonably sized ranges to flush,
400 * iterate through the VMA list and take care of any aliases.
401 */
402 for (vma = mm->mmap; vma; vma = vma->vm_next)
403 __flush_cache_mm(mm, vma->vm_start, vma->vm_end);
404 }
405
406 /* Only touch the icache if one of the VMAs has VM_EXEC set. */
407 if (mm->exec_vm)
408 flush_icache_all();
258} 409}
259 410
260/* 411/*
@@ -263,27 +414,40 @@ void flush_cache_mm(struct mm_struct *mm)
263 * ADDR: Virtual Address (U0 address) 414 * ADDR: Virtual Address (U0 address)
264 * PFN: Physical page number 415 * PFN: Physical page number
265 */ 416 */
266void flush_cache_page(struct vm_area_struct *vma, unsigned long address, unsigned long pfn) 417void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
418 unsigned long pfn)
267{ 419{
268 unsigned long phys = pfn << PAGE_SHIFT; 420 unsigned long phys = pfn << PAGE_SHIFT;
421 unsigned int alias_mask;
422
423 alias_mask = cpu_data->dcache.alias_mask;
269 424
270 /* We only need to flush D-cache when we have alias */ 425 /* We only need to flush D-cache when we have alias */
271 if ((address^phys) & CACHE_ALIAS) { 426 if ((address^phys) & alias_mask) {
272 /* Loop 4K of the D-cache */ 427 /* Loop 4K of the D-cache */
273 flush_cache_4096( 428 flush_cache_4096(
274 CACHE_OC_ADDRESS_ARRAY | (address & CACHE_ALIAS), 429 CACHE_OC_ADDRESS_ARRAY | (address & alias_mask),
275 phys); 430 phys);
276 /* Loop another 4K of the D-cache */ 431 /* Loop another 4K of the D-cache */
277 flush_cache_4096( 432 flush_cache_4096(
278 CACHE_OC_ADDRESS_ARRAY | (phys & CACHE_ALIAS), 433 CACHE_OC_ADDRESS_ARRAY | (phys & alias_mask),
279 phys); 434 phys);
280 } 435 }
281 436
282 if (vma->vm_flags & VM_EXEC) 437 alias_mask = cpu_data->icache.alias_mask;
283 /* Loop 4K (half) of the I-cache */ 438 if (vma->vm_flags & VM_EXEC) {
439 /*
440 * Evict entries from the portion of the cache from which code
441 * may have been executed at this address (virtual). There's
442 * no need to evict from the portion corresponding to the
443 * physical address as for the D-cache, because we know the
444 * kernel has never executed the code through its identity
445 * translation.
446 */
284 flush_cache_4096( 447 flush_cache_4096(
285 CACHE_IC_ADDRESS_ARRAY | (address & 0x1000), 448 CACHE_IC_ADDRESS_ARRAY | (address & alias_mask),
286 phys); 449 phys);
450 }
287} 451}
288 452
289/* 453/*
@@ -298,52 +462,31 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address, unsigne
298void flush_cache_range(struct vm_area_struct *vma, unsigned long start, 462void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
299 unsigned long end) 463 unsigned long end)
300{ 464{
301 unsigned long p = start & PAGE_MASK; 465 /*
302 pgd_t *dir; 466 * If cache is only 4k-per-way, there are never any 'aliases'. Since
303 pmd_t *pmd; 467 * the cache is physically tagged, the data can just be left in there.
304 pte_t *pte; 468 */
305 pte_t entry; 469 if (cpu_data->dcache.n_aliases == 0)
306 unsigned long phys; 470 return;
307 unsigned long d = 0;
308
309 dir = pgd_offset(vma->vm_mm, p);
310 pmd = pmd_offset(dir, p);
311 471
312 do { 472 /*
313 if (pmd_none(*pmd) || pmd_bad(*pmd)) { 473 * Don't bother with the lookup and alias check if we have a
314 p &= ~((1 << PMD_SHIFT) -1); 474 * wide range to cover, just blow away the dcache in its
315 p += (1 << PMD_SHIFT); 475 * entirety instead. -- PFM.
316 pmd++; 476 */
317 continue; 477 if (((end - start) >> PAGE_SHIFT) >= MAX_DCACHE_PAGES)
318 } 478 flush_dcache_all();
319 pte = pte_offset_kernel(pmd, p); 479 else
320 do { 480 __flush_cache_mm(vma->vm_mm, start, end);
321 entry = *pte; 481
322 if ((pte_val(entry) & _PAGE_PRESENT)) { 482 if (vma->vm_flags & VM_EXEC) {
323 phys = pte_val(entry)&PTE_PHYS_MASK; 483 /*
324 if ((p^phys) & CACHE_ALIAS) { 484 * TODO: Is this required??? Need to look at how I-cache
325 d |= 1 << ((p & CACHE_ALIAS)>>12); 485 * coherency is assured when new programs are loaded to see if
326 d |= 1 << ((phys & CACHE_ALIAS)>>12); 486 * this matters.
327 if (d == 0x0f) 487 */
328 goto loop_exit;
329 }
330 }
331 pte++;
332 p += PAGE_SIZE;
333 } while (p < end && ((unsigned long)pte & ~PAGE_MASK));
334 pmd++;
335 } while (p < end);
336 loop_exit:
337 if (d & 1)
338 flush_cache_4096_all(0);
339 if (d & 2)
340 flush_cache_4096_all(0x1000);
341 if (d & 4)
342 flush_cache_4096_all(0x2000);
343 if (d & 8)
344 flush_cache_4096_all(0x3000);
345 if (vma->vm_flags & VM_EXEC)
346 flush_icache_all(); 488 flush_icache_all();
489 }
347} 490}
348 491
349/* 492/*
@@ -357,5 +500,273 @@ void flush_icache_user_range(struct vm_area_struct *vma,
357 struct page *page, unsigned long addr, int len) 500 struct page *page, unsigned long addr, int len)
358{ 501{
359 flush_cache_page(vma, addr, page_to_pfn(page)); 502 flush_cache_page(vma, addr, page_to_pfn(page));
503 mb();
504}
505
506/**
507 * __flush_cache_4096
508 *
509 * @addr: address in memory mapped cache array
510 * @phys: P1 address to flush (has to match tags if addr has 'A' bit
511 * set i.e. associative write)
512 * @exec_offset: set to 0x20000000 if flush has to be executed from P2
513 * region else 0x0
514 *
515 * The offset into the cache array implied by 'addr' selects the
516 * 'colour' of the virtual address range that will be flushed. The
517 * operation (purge/write-back) is selected by the lower 2 bits of
518 * 'phys'.
519 */
520static void __flush_cache_4096(unsigned long addr, unsigned long phys,
521 unsigned long exec_offset)
522{
523 int way_count;
524 unsigned long base_addr = addr;
525 struct cache_info *dcache;
526 unsigned long way_incr;
527 unsigned long a, ea, p;
528 unsigned long temp_pc;
529
530 dcache = &cpu_data->dcache;
531 /* Write this way for better assembly. */
532 way_count = dcache->ways;
533 way_incr = dcache->way_incr;
534
535 /*
536 * Apply exec_offset (i.e. branch to P2 if required.).
537 *
538 * FIXME:
539 *
540 * If I write "=r" for the (temp_pc), it puts this in r6 hence
541 * trashing exec_offset before it's been added on - why? Hence
542 * "=&r" as a 'workaround'
543 */
544 asm volatile("mov.l 1f, %0\n\t"
545 "add %1, %0\n\t"
546 "jmp @%0\n\t"
547 "nop\n\t"
548 ".balign 4\n\t"
549 "1: .long 2f\n\t"
550 "2:\n" : "=&r" (temp_pc) : "r" (exec_offset));
551
552 /*
553 * We know there will be >=1 iteration, so write as do-while to avoid
554 * pointless nead-of-loop check for 0 iterations.
555 */
556 do {
557 ea = base_addr + PAGE_SIZE;
558 a = base_addr;
559 p = phys;
560
561 do {
562 *(volatile unsigned long *)a = p;
563 /*
564 * Next line: intentionally not p+32, saves an add, p
565 * will do since only the cache tag bits need to
566 * match.
567 */
568 *(volatile unsigned long *)(a+32) = p;
569 a += 64;
570 p += 64;
571 } while (a < ea);
572
573 base_addr += way_incr;
574 } while (--way_count != 0);
360} 575}
361 576
577/*
578 * Break the 1, 2 and 4 way variants of this out into separate functions to
579 * avoid nearly all the overhead of having the conditional stuff in the function
580 * bodies (+ the 1 and 2 way cases avoid saving any registers too).
581 */
582static void __flush_dcache_segment_1way(unsigned long start,
583 unsigned long extent_per_way)
584{
585 unsigned long orig_sr, sr_with_bl;
586 unsigned long base_addr;
587 unsigned long way_incr, linesz, way_size;
588 struct cache_info *dcache;
589 register unsigned long a0, a0e;
590
591 asm volatile("stc sr, %0" : "=r" (orig_sr));
592 sr_with_bl = orig_sr | (1<<28);
593 base_addr = ((unsigned long)&empty_zero_page[0]);
594
595 /*
596 * The previous code aligned base_addr to 16k, i.e. the way_size of all
597 * existing SH-4 D-caches. Whilst I don't see a need to have this
598 * aligned to any better than the cache line size (which it will be
599 * anyway by construction), let's align it to at least the way_size of
600 * any existing or conceivable SH-4 D-cache. -- RPC
601 */
602 base_addr = ((base_addr >> 16) << 16);
603 base_addr |= start;
604
605 dcache = &cpu_data->dcache;
606 linesz = dcache->linesz;
607 way_incr = dcache->way_incr;
608 way_size = dcache->way_size;
609
610 a0 = base_addr;
611 a0e = base_addr + extent_per_way;
612 do {
613 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
614 asm volatile("movca.l r0, @%0\n\t"
615 "ocbi @%0" : : "r" (a0));
616 a0 += linesz;
617 asm volatile("movca.l r0, @%0\n\t"
618 "ocbi @%0" : : "r" (a0));
619 a0 += linesz;
620 asm volatile("movca.l r0, @%0\n\t"
621 "ocbi @%0" : : "r" (a0));
622 a0 += linesz;
623 asm volatile("movca.l r0, @%0\n\t"
624 "ocbi @%0" : : "r" (a0));
625 asm volatile("ldc %0, sr" : : "r" (orig_sr));
626 a0 += linesz;
627 } while (a0 < a0e);
628}
629
630static void __flush_dcache_segment_2way(unsigned long start,
631 unsigned long extent_per_way)
632{
633 unsigned long orig_sr, sr_with_bl;
634 unsigned long base_addr;
635 unsigned long way_incr, linesz, way_size;
636 struct cache_info *dcache;
637 register unsigned long a0, a1, a0e;
638
639 asm volatile("stc sr, %0" : "=r" (orig_sr));
640 sr_with_bl = orig_sr | (1<<28);
641 base_addr = ((unsigned long)&empty_zero_page[0]);
642
643 /* See comment under 1-way above */
644 base_addr = ((base_addr >> 16) << 16);
645 base_addr |= start;
646
647 dcache = &cpu_data->dcache;
648 linesz = dcache->linesz;
649 way_incr = dcache->way_incr;
650 way_size = dcache->way_size;
651
652 a0 = base_addr;
653 a1 = a0 + way_incr;
654 a0e = base_addr + extent_per_way;
655 do {
656 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
657 asm volatile("movca.l r0, @%0\n\t"
658 "movca.l r0, @%1\n\t"
659 "ocbi @%0\n\t"
660 "ocbi @%1" : :
661 "r" (a0), "r" (a1));
662 a0 += linesz;
663 a1 += linesz;
664 asm volatile("movca.l r0, @%0\n\t"
665 "movca.l r0, @%1\n\t"
666 "ocbi @%0\n\t"
667 "ocbi @%1" : :
668 "r" (a0), "r" (a1));
669 a0 += linesz;
670 a1 += linesz;
671 asm volatile("movca.l r0, @%0\n\t"
672 "movca.l r0, @%1\n\t"
673 "ocbi @%0\n\t"
674 "ocbi @%1" : :
675 "r" (a0), "r" (a1));
676 a0 += linesz;
677 a1 += linesz;
678 asm volatile("movca.l r0, @%0\n\t"
679 "movca.l r0, @%1\n\t"
680 "ocbi @%0\n\t"
681 "ocbi @%1" : :
682 "r" (a0), "r" (a1));
683 asm volatile("ldc %0, sr" : : "r" (orig_sr));
684 a0 += linesz;
685 a1 += linesz;
686 } while (a0 < a0e);
687}
688
689static void __flush_dcache_segment_4way(unsigned long start,
690 unsigned long extent_per_way)
691{
692 unsigned long orig_sr, sr_with_bl;
693 unsigned long base_addr;
694 unsigned long way_incr, linesz, way_size;
695 struct cache_info *dcache;
696 register unsigned long a0, a1, a2, a3, a0e;
697
698 asm volatile("stc sr, %0" : "=r" (orig_sr));
699 sr_with_bl = orig_sr | (1<<28);
700 base_addr = ((unsigned long)&empty_zero_page[0]);
701
702 /* See comment under 1-way above */
703 base_addr = ((base_addr >> 16) << 16);
704 base_addr |= start;
705
706 dcache = &cpu_data->dcache;
707 linesz = dcache->linesz;
708 way_incr = dcache->way_incr;
709 way_size = dcache->way_size;
710
711 a0 = base_addr;
712 a1 = a0 + way_incr;
713 a2 = a1 + way_incr;
714 a3 = a2 + way_incr;
715 a0e = base_addr + extent_per_way;
716 do {
717 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
718 asm volatile("movca.l r0, @%0\n\t"
719 "movca.l r0, @%1\n\t"
720 "movca.l r0, @%2\n\t"
721 "movca.l r0, @%3\n\t"
722 "ocbi @%0\n\t"
723 "ocbi @%1\n\t"
724 "ocbi @%2\n\t"
725 "ocbi @%3\n\t" : :
726 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
727 a0 += linesz;
728 a1 += linesz;
729 a2 += linesz;
730 a3 += linesz;
731 asm volatile("movca.l r0, @%0\n\t"
732 "movca.l r0, @%1\n\t"
733 "movca.l r0, @%2\n\t"
734 "movca.l r0, @%3\n\t"
735 "ocbi @%0\n\t"
736 "ocbi @%1\n\t"
737 "ocbi @%2\n\t"
738 "ocbi @%3\n\t" : :
739 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
740 a0 += linesz;
741 a1 += linesz;
742 a2 += linesz;
743 a3 += linesz;
744 asm volatile("movca.l r0, @%0\n\t"
745 "movca.l r0, @%1\n\t"
746 "movca.l r0, @%2\n\t"
747 "movca.l r0, @%3\n\t"
748 "ocbi @%0\n\t"
749 "ocbi @%1\n\t"
750 "ocbi @%2\n\t"
751 "ocbi @%3\n\t" : :
752 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
753 a0 += linesz;
754 a1 += linesz;
755 a2 += linesz;
756 a3 += linesz;
757 asm volatile("movca.l r0, @%0\n\t"
758 "movca.l r0, @%1\n\t"
759 "movca.l r0, @%2\n\t"
760 "movca.l r0, @%3\n\t"
761 "ocbi @%0\n\t"
762 "ocbi @%1\n\t"
763 "ocbi @%2\n\t"
764 "ocbi @%3\n\t" : :
765 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
766 asm volatile("ldc %0, sr" : : "r" (orig_sr));
767 a0 += linesz;
768 a1 += linesz;
769 a2 += linesz;
770 a3 += linesz;
771 } while (a0 < a0e);
772}
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index bf94eedb0a8e..045abdf078f5 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -9,7 +9,6 @@
9 * for more details. 9 * for more details.
10 * 10 *
11 */ 11 */
12
13#include <linux/init.h> 12#include <linux/init.h>
14#include <linux/mman.h> 13#include <linux/mman.h>
15#include <linux/mm.h> 14#include <linux/mm.h>
@@ -25,14 +24,10 @@
25#include <asm/mmu_context.h> 24#include <asm/mmu_context.h>
26#include <asm/cacheflush.h> 25#include <asm/cacheflush.h>
27 26
28/* The 32KB cache on the SH7705 suffers from the same synonym problem 27/*
29 * as SH4 CPUs */ 28 * The 32KB cache on the SH7705 suffers from the same synonym problem
30 29 * as SH4 CPUs
31#define __pte_offset(address) \ 30 */
32 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
33#define pte_offset(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
34 __pte_offset(address))
35
36static inline void cache_wback_all(void) 31static inline void cache_wback_all(void)
37{ 32{
38 unsigned long ways, waysize, addrstart; 33 unsigned long ways, waysize, addrstart;
@@ -73,7 +68,6 @@ void flush_icache_range(unsigned long start, unsigned long end)
73 __flush_wback_region((void *)start, end - start); 68 __flush_wback_region((void *)start, end - start);
74} 69}
75 70
76
77/* 71/*
78 * Writeback&Invalidate the D-cache of the page 72 * Writeback&Invalidate the D-cache of the page
79 */ 73 */
@@ -128,7 +122,6 @@ static void __flush_dcache_page(unsigned long phys)
128 local_irq_restore(flags); 122 local_irq_restore(flags);
129} 123}
130 124
131
132/* 125/*
133 * Write back & invalidate the D-cache of the page. 126 * Write back & invalidate the D-cache of the page.
134 * (To avoid "alias" issues) 127 * (To avoid "alias" issues)
@@ -186,7 +179,8 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
186 * 179 *
187 * ADDRESS: Virtual Address (U0 address) 180 * ADDRESS: Virtual Address (U0 address)
188 */ 181 */
189void flush_cache_page(struct vm_area_struct *vma, unsigned long address, unsigned long pfn) 182void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
183 unsigned long pfn)
190{ 184{
191 __flush_dcache_page(pfn << PAGE_SHIFT); 185 __flush_dcache_page(pfn << PAGE_SHIFT);
192} 186}
@@ -203,4 +197,3 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page)
203{ 197{
204 __flush_purge_region(page_address(page), PAGE_SIZE); 198 __flush_purge_region(page_address(page), PAGE_SIZE);
205} 199}
206
diff --git a/arch/sh/mm/clear_page.S b/arch/sh/mm/clear_page.S
index 08acead7b2a1..7b96425ae270 100644
--- a/arch/sh/mm/clear_page.S
+++ b/arch/sh/mm/clear_page.S
@@ -193,102 +193,5 @@ ENTRY(__clear_user_page)
193 nop 193 nop
194.L4096: .word 4096 194.L4096: .word 4096
195 195
196ENTRY(__flush_cache_4096)
197 mov.l 1f,r3
198 add r6,r3
199 mov r4,r0
200 mov #64,r2
201 shll r2
202 mov #64,r6
203 jmp @r3
204 mov #96,r7
205 .align 2
2061: .long 2f
2072:
208 .rept 32
209 mov.l r5,@r0
210 mov.l r5,@(32,r0)
211 mov.l r5,@(r0,r6)
212 mov.l r5,@(r0,r7)
213 add r2,r5
214 add r2,r0
215 .endr
216 nop
217 nop
218 nop
219 nop
220 nop
221 nop
222 nop
223 rts
224 nop
225
226ENTRY(__flush_dcache_all)
227 mov.l 2f,r0
228 mov.l 3f,r4
229 and r0,r4 ! r4 = (unsigned long)&empty_zero_page[0] & ~0xffffc000
230 stc sr,r1 ! save SR
231 mov.l 4f,r2
232 or r1,r2
233 mov #32,r3
234 shll2 r3
2351:
236 ldc r2,sr ! set BL bit
237 movca.l r0,@r4
238 ocbi @r4
239 add #32,r4
240 movca.l r0,@r4
241 ocbi @r4
242 add #32,r4
243 movca.l r0,@r4
244 ocbi @r4
245 add #32,r4
246 movca.l r0,@r4
247 ocbi @r4
248 ldc r1,sr ! restore SR
249 dt r3
250 bf/s 1b
251 add #32,r4
252
253 rts
254 nop
255 .align 2
2562: .long 0xffffc000
2573: .long empty_zero_page
2584: .long 0x10000000 ! BL bit
259
260/* __flush_cache_4096_all(unsigned long addr) */
261ENTRY(__flush_cache_4096_all)
262 mov.l 2f,r0
263 mov.l 3f,r2
264 and r0,r2
265 or r2,r4 ! r4 = addr | (unsigned long)&empty_zero_page[0] & ~0x3fff
266 stc sr,r1 ! save SR
267 mov.l 4f,r2
268 or r1,r2
269 mov #32,r3
2701:
271 ldc r2,sr ! set BL bit
272 movca.l r0,@r4
273 ocbi @r4
274 add #32,r4
275 movca.l r0,@r4
276 ocbi @r4
277 add #32,r4
278 movca.l r0,@r4
279 ocbi @r4
280 add #32,r4
281 movca.l r0,@r4
282 ocbi @r4
283 ldc r1,sr ! restore SR
284 dt r3
285 bf/s 1b
286 add #32,r4
287
288 rts
289 nop
290 .align 2
2912: .long 0xffffc000
2923: .long empty_zero_page
2934: .long 0x10000000 ! BL bit
294#endif 196#endif
197
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index ee73e30263af..c81e6b67ad30 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -9,6 +9,8 @@
9 */ 9 */
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/dma-mapping.h> 11#include <linux/dma-mapping.h>
12#include <asm/cacheflush.h>
13#include <asm/addrspace.h>
12#include <asm/io.h> 14#include <asm/io.h>
13 15
14void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle) 16void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle)
diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c
index 775f86cd3fe8..c69fd603226a 100644
--- a/arch/sh/mm/fault.c
+++ b/arch/sh/mm/fault.c
@@ -1,33 +1,22 @@
1/* $Id: fault.c,v 1.14 2004/01/13 05:52:11 kkojima Exp $ 1/*
2 * Page fault handler for SH with an MMU.
2 * 3 *
3 * linux/arch/sh/mm/fault.c
4 * Copyright (C) 1999 Niibe Yutaka 4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 Paul Mundt 5 * Copyright (C) 2003 Paul Mundt
6 * 6 *
7 * Based on linux/arch/i386/mm/fault.c: 7 * Based on linux/arch/i386/mm/fault.c:
8 * Copyright (C) 1995 Linus Torvalds 8 * Copyright (C) 1995 Linus Torvalds
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
9 */ 13 */
10
11#include <linux/signal.h>
12#include <linux/sched.h>
13#include <linux/kernel.h> 14#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/string.h>
16#include <linux/types.h>
17#include <linux/ptrace.h>
18#include <linux/mman.h>
19#include <linux/mm.h> 15#include <linux/mm.h>
20#include <linux/smp.h> 16#include <linux/hardirq.h>
21#include <linux/smp_lock.h> 17#include <linux/kprobes.h>
22#include <linux/interrupt.h>
23#include <linux/module.h>
24
25#include <asm/system.h> 18#include <asm/system.h>
26#include <asm/io.h>
27#include <asm/uaccess.h>
28#include <asm/pgalloc.h>
29#include <asm/mmu_context.h> 19#include <asm/mmu_context.h>
30#include <asm/cacheflush.h>
31#include <asm/kgdb.h> 20#include <asm/kgdb.h>
32 21
33extern void die(const char *,struct pt_regs *,long); 22extern void die(const char *,struct pt_regs *,long);
@@ -187,18 +176,30 @@ do_sigbus:
187 goto no_context; 176 goto no_context;
188} 177}
189 178
179#ifdef CONFIG_SH_STORE_QUEUES
190/* 180/*
191 * Called with interrupt disabled. 181 * This is a special case for the SH-4 store queues, as pages for this
182 * space still need to be faulted in before it's possible to flush the
183 * store queue cache for writeout to the remapped region.
192 */ 184 */
193asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess, 185#define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000)
194 unsigned long address) 186#else
187#define P3_ADDR_MAX P4SEG
188#endif
189
190/*
191 * Called with interrupts disabled.
192 */
193asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
194 unsigned long writeaccess,
195 unsigned long address)
195{ 196{
196 unsigned long addrmax = P4SEG;
197 pgd_t *pgd; 197 pgd_t *pgd;
198 pud_t *pud;
198 pmd_t *pmd; 199 pmd_t *pmd;
199 pte_t *pte; 200 pte_t *pte;
200 pte_t entry; 201 pte_t entry;
201 struct mm_struct *mm; 202 struct mm_struct *mm = current->mm;
202 spinlock_t *ptl; 203 spinlock_t *ptl;
203 int ret = 1; 204 int ret = 1;
204 205
@@ -207,31 +208,37 @@ asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess,
207 kgdb_bus_err_hook(); 208 kgdb_bus_err_hook();
208#endif 209#endif
209 210
210#ifdef CONFIG_SH_STORE_QUEUES 211 /*
211 addrmax = P4SEG_STORE_QUE + 0x04000000; 212 * We don't take page faults for P1, P2, and parts of P4, these
212#endif 213 * are always mapped, whether it be due to legacy behaviour in
213 214 * 29-bit mode, or due to PMB configuration in 32-bit mode.
214 if (address >= P3SEG && address < addrmax) { 215 */
216 if (address >= P3SEG && address < P3_ADDR_MAX) {
215 pgd = pgd_offset_k(address); 217 pgd = pgd_offset_k(address);
216 mm = NULL; 218 mm = NULL;
217 } else if (address >= TASK_SIZE) 219 } else {
218 return 1; 220 if (unlikely(address >= TASK_SIZE || !mm))
219 else if (!(mm = current->mm)) 221 return 1;
220 return 1; 222
221 else
222 pgd = pgd_offset(mm, address); 223 pgd = pgd_offset(mm, address);
224 }
223 225
224 pmd = pmd_offset(pgd, address); 226 pud = pud_offset(pgd, address);
227 if (pud_none_or_clear_bad(pud))
228 return 1;
229 pmd = pmd_offset(pud, address);
225 if (pmd_none_or_clear_bad(pmd)) 230 if (pmd_none_or_clear_bad(pmd))
226 return 1; 231 return 1;
232
227 if (mm) 233 if (mm)
228 pte = pte_offset_map_lock(mm, pmd, address, &ptl); 234 pte = pte_offset_map_lock(mm, pmd, address, &ptl);
229 else 235 else
230 pte = pte_offset_kernel(pmd, address); 236 pte = pte_offset_kernel(pmd, address);
231 237
232 entry = *pte; 238 entry = *pte;
233 if (pte_none(entry) || pte_not_present(entry) 239 if (unlikely(pte_none(entry) || pte_not_present(entry)))
234 || (writeaccess && !pte_write(entry))) 240 goto unlock;
241 if (unlikely(writeaccess && !pte_write(entry)))
235 goto unlock; 242 goto unlock;
236 243
237 if (writeaccess) 244 if (writeaccess)
@@ -243,13 +250,7 @@ asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess,
243 * ITLB is not affected by "ldtlb" instruction. 250 * ITLB is not affected by "ldtlb" instruction.
244 * So, we need to flush the entry by ourselves. 251 * So, we need to flush the entry by ourselves.
245 */ 252 */
246 253 __flush_tlb_page(get_asid(), address & PAGE_MASK);
247 {
248 unsigned long flags;
249 local_irq_save(flags);
250 __flush_tlb_page(get_asid(), address&PAGE_MASK);
251 local_irq_restore(flags);
252 }
253#endif 254#endif
254 255
255 set_pte(pte, entry); 256 set_pte(pte, entry);
@@ -260,121 +261,3 @@ unlock:
260 pte_unmap_unlock(pte, ptl); 261 pte_unmap_unlock(pte, ptl);
261 return ret; 262 return ret;
262} 263}
263
264void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
265{
266 if (vma->vm_mm && vma->vm_mm->context != NO_CONTEXT) {
267 unsigned long flags;
268 unsigned long asid;
269 unsigned long saved_asid = MMU_NO_ASID;
270
271 asid = vma->vm_mm->context & MMU_CONTEXT_ASID_MASK;
272 page &= PAGE_MASK;
273
274 local_irq_save(flags);
275 if (vma->vm_mm != current->mm) {
276 saved_asid = get_asid();
277 set_asid(asid);
278 }
279 __flush_tlb_page(asid, page);
280 if (saved_asid != MMU_NO_ASID)
281 set_asid(saved_asid);
282 local_irq_restore(flags);
283 }
284}
285
286void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
287 unsigned long end)
288{
289 struct mm_struct *mm = vma->vm_mm;
290
291 if (mm->context != NO_CONTEXT) {
292 unsigned long flags;
293 int size;
294
295 local_irq_save(flags);
296 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
297 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
298 mm->context = NO_CONTEXT;
299 if (mm == current->mm)
300 activate_context(mm);
301 } else {
302 unsigned long asid = mm->context&MMU_CONTEXT_ASID_MASK;
303 unsigned long saved_asid = MMU_NO_ASID;
304
305 start &= PAGE_MASK;
306 end += (PAGE_SIZE - 1);
307 end &= PAGE_MASK;
308 if (mm != current->mm) {
309 saved_asid = get_asid();
310 set_asid(asid);
311 }
312 while (start < end) {
313 __flush_tlb_page(asid, start);
314 start += PAGE_SIZE;
315 }
316 if (saved_asid != MMU_NO_ASID)
317 set_asid(saved_asid);
318 }
319 local_irq_restore(flags);
320 }
321}
322
323void flush_tlb_kernel_range(unsigned long start, unsigned long end)
324{
325 unsigned long flags;
326 int size;
327
328 local_irq_save(flags);
329 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
330 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
331 flush_tlb_all();
332 } else {
333 unsigned long asid = init_mm.context&MMU_CONTEXT_ASID_MASK;
334 unsigned long saved_asid = get_asid();
335
336 start &= PAGE_MASK;
337 end += (PAGE_SIZE - 1);
338 end &= PAGE_MASK;
339 set_asid(asid);
340 while (start < end) {
341 __flush_tlb_page(asid, start);
342 start += PAGE_SIZE;
343 }
344 set_asid(saved_asid);
345 }
346 local_irq_restore(flags);
347}
348
349void flush_tlb_mm(struct mm_struct *mm)
350{
351 /* Invalidate all TLB of this process. */
352 /* Instead of invalidating each TLB, we get new MMU context. */
353 if (mm->context != NO_CONTEXT) {
354 unsigned long flags;
355
356 local_irq_save(flags);
357 mm->context = NO_CONTEXT;
358 if (mm == current->mm)
359 activate_context(mm);
360 local_irq_restore(flags);
361 }
362}
363
364void flush_tlb_all(void)
365{
366 unsigned long flags, status;
367
368 /*
369 * Flush all the TLB.
370 *
371 * Write to the MMU control register's bit:
372 * TF-bit for SH-3, TI-bit for SH-4.
373 * It's same position, bit #2.
374 */
375 local_irq_save(flags);
376 status = ctrl_inl(MMUCR);
377 status |= 0x04;
378 ctrl_outl(status, MMUCR);
379 local_irq_restore(flags);
380}
diff --git a/arch/sh/mm/hugetlbpage.c b/arch/sh/mm/hugetlbpage.c
index 2a85bc15a412..329059d6b54a 100644
--- a/arch/sh/mm/hugetlbpage.c
+++ b/arch/sh/mm/hugetlbpage.c
@@ -26,61 +26,41 @@
26pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr) 26pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr)
27{ 27{
28 pgd_t *pgd; 28 pgd_t *pgd;
29 pud_t *pud;
29 pmd_t *pmd; 30 pmd_t *pmd;
30 pte_t *pte = NULL; 31 pte_t *pte = NULL;
31 32
32 pgd = pgd_offset(mm, addr); 33 pgd = pgd_offset(mm, addr);
33 if (pgd) { 34 if (pgd) {
34 pmd = pmd_alloc(mm, pgd, addr); 35 pud = pud_alloc(mm, pgd, addr);
35 if (pmd) 36 if (pud) {
36 pte = pte_alloc_map(mm, pmd, addr); 37 pmd = pmd_alloc(mm, pud, addr);
38 if (pmd)
39 pte = pte_alloc_map(mm, pmd, addr);
40 }
37 } 41 }
42
38 return pte; 43 return pte;
39} 44}
40 45
41pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr) 46pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
42{ 47{
43 pgd_t *pgd; 48 pgd_t *pgd;
49 pud_t *pud;
44 pmd_t *pmd; 50 pmd_t *pmd;
45 pte_t *pte = NULL; 51 pte_t *pte = NULL;
46 52
47 pgd = pgd_offset(mm, addr); 53 pgd = pgd_offset(mm, addr);
48 if (pgd) { 54 if (pgd) {
49 pmd = pmd_offset(pgd, addr); 55 pud = pud_offset(pgd, addr);
50 if (pmd) 56 if (pud) {
51 pte = pte_offset_map(pmd, addr); 57 pmd = pmd_offset(pud, addr);
52 } 58 if (pmd)
53 return pte; 59 pte = pte_offset_map(pmd, addr);
54} 60 }
55
56void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
57 pte_t *ptep, pte_t entry)
58{
59 int i;
60
61 for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
62 set_pte_at(mm, addr, ptep, entry);
63 ptep++;
64 addr += PAGE_SIZE;
65 pte_val(entry) += PAGE_SIZE;
66 } 61 }
67}
68
69pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
70 pte_t *ptep)
71{
72 pte_t entry;
73 int i;
74
75 entry = *ptep;
76 62
77 for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) { 63 return pte;
78 pte_clear(mm, addr, ptep);
79 addr += PAGE_SIZE;
80 ptep++;
81 }
82
83 return entry;
84} 64}
85 65
86struct page *follow_huge_addr(struct mm_struct *mm, 66struct page *follow_huge_addr(struct mm_struct *mm,
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 8ea27ca4b700..7154d1ce9785 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -24,7 +24,7 @@
24#include <linux/highmem.h> 24#include <linux/highmem.h>
25#include <linux/bootmem.h> 25#include <linux/bootmem.h>
26#include <linux/pagemap.h> 26#include <linux/pagemap.h>
27 27#include <linux/proc_fs.h>
28#include <asm/processor.h> 28#include <asm/processor.h>
29#include <asm/system.h> 29#include <asm/system.h>
30#include <asm/uaccess.h> 30#include <asm/uaccess.h>
@@ -80,6 +80,7 @@ void show_mem(void)
80static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) 80static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
81{ 81{
82 pgd_t *pgd; 82 pgd_t *pgd;
83 pud_t *pud;
83 pmd_t *pmd; 84 pmd_t *pmd;
84 pte_t *pte; 85 pte_t *pte;
85 86
@@ -89,7 +90,17 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
89 return; 90 return;
90 } 91 }
91 92
92 pmd = pmd_offset(pgd, addr); 93 pud = pud_offset(pgd, addr);
94 if (pud_none(*pud)) {
95 pmd = (pmd_t *)get_zeroed_page(GFP_ATOMIC);
96 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | _PAGE_USER));
97 if (pmd != pmd_offset(pud, 0)) {
98 pud_ERROR(*pud);
99 return;
100 }
101 }
102
103 pmd = pmd_offset(pud, addr);
93 if (pmd_none(*pmd)) { 104 if (pmd_none(*pmd)) {
94 pte = (pte_t *)get_zeroed_page(GFP_ATOMIC); 105 pte = (pte_t *)get_zeroed_page(GFP_ATOMIC);
95 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE | _PAGE_USER)); 106 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE | _PAGE_USER));
@@ -212,6 +223,8 @@ void __init paging_init(void)
212 free_area_init_node(0, NODE_DATA(0), zones_size, __MEMORY_START >> PAGE_SHIFT, 0); 223 free_area_init_node(0, NODE_DATA(0), zones_size, __MEMORY_START >> PAGE_SHIFT, 0);
213} 224}
214 225
226static struct kcore_list kcore_mem, kcore_vmalloc;
227
215void __init mem_init(void) 228void __init mem_init(void)
216{ 229{
217 extern unsigned long empty_zero_page[1024]; 230 extern unsigned long empty_zero_page[1024];
@@ -237,8 +250,13 @@ void __init mem_init(void)
237 * Setup wrappers for copy/clear_page(), these will get overridden 250 * Setup wrappers for copy/clear_page(), these will get overridden
238 * later in the boot process if a better method is available. 251 * later in the boot process if a better method is available.
239 */ 252 */
253#ifdef CONFIG_MMU
240 copy_page = copy_page_slow; 254 copy_page = copy_page_slow;
241 clear_page = clear_page_slow; 255 clear_page = clear_page_slow;
256#else
257 copy_page = copy_page_nommu;
258 clear_page = clear_page_nommu;
259#endif
242 260
243 /* this will put all low memory onto the freelists */ 261 /* this will put all low memory onto the freelists */
244 totalram_pages += free_all_bootmem_node(NODE_DATA(0)); 262 totalram_pages += free_all_bootmem_node(NODE_DATA(0));
@@ -254,7 +272,12 @@ void __init mem_init(void)
254 datasize = (unsigned long) &_edata - (unsigned long) &_etext; 272 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
255 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; 273 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
256 274
257 printk("Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init)\n", 275 kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
276 kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
277 VMALLOC_END - VMALLOC_START);
278
279 printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, "
280 "%dk reserved, %dk data, %dk init)\n",
258 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), 281 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
259 max_mapnr << (PAGE_SHIFT-10), 282 max_mapnr << (PAGE_SHIFT-10),
260 codesize >> 10, 283 codesize >> 10,
@@ -263,6 +286,9 @@ void __init mem_init(void)
263 initsize >> 10); 286 initsize >> 10);
264 287
265 p3_cache_init(); 288 p3_cache_init();
289
290 /* Initialize the vDSO */
291 vsyscall_init();
266} 292}
267 293
268void free_initmem(void) 294void free_initmem(void)
diff --git a/arch/sh/mm/ioremap.c b/arch/sh/mm/ioremap.c
index 96fa4a999e2a..a9fe80cfc233 100644
--- a/arch/sh/mm/ioremap.c
+++ b/arch/sh/mm/ioremap.c
@@ -15,6 +15,7 @@
15#include <linux/vmalloc.h> 15#include <linux/vmalloc.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/pci.h>
18#include <asm/io.h> 19#include <asm/io.h>
19#include <asm/page.h> 20#include <asm/page.h>
20#include <asm/pgalloc.h> 21#include <asm/pgalloc.h>
@@ -135,6 +136,20 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
135 return (void __iomem *)phys_to_virt(phys_addr); 136 return (void __iomem *)phys_to_virt(phys_addr);
136 137
137 /* 138 /*
139 * If we're on an SH7751 or SH7780 PCI controller, PCI memory is
140 * mapped at the end of the address space (typically 0xfd000000)
141 * in a non-translatable area, so mapping through page tables for
142 * this area is not only pointless, but also fundamentally
143 * broken. Just return the physical address instead.
144 *
145 * For boards that map a small PCI memory aperture somewhere in
146 * P1/P2 space, ioremap() will already do the right thing,
147 * and we'll never get this far.
148 */
149 if (is_pci_memaddr(phys_addr) && is_pci_memaddr(last_addr))
150 return (void __iomem *)phys_addr;
151
152 /*
138 * Don't allow anybody to remap normal RAM that we're using.. 153 * Don't allow anybody to remap normal RAM that we're using..
139 */ 154 */
140 if (phys_addr < virt_to_phys(high_memory)) 155 if (phys_addr < virt_to_phys(high_memory))
@@ -192,7 +207,7 @@ void __iounmap(void __iomem *addr)
192 unsigned long vaddr = (unsigned long __force)addr; 207 unsigned long vaddr = (unsigned long __force)addr;
193 struct vm_struct *p; 208 struct vm_struct *p;
194 209
195 if (PXSEG(vaddr) < P3SEG) 210 if (PXSEG(vaddr) < P3SEG || is_pci_memaddr(vaddr))
196 return; 211 return;
197 212
198#ifdef CONFIG_32BIT 213#ifdef CONFIG_32BIT
diff --git a/arch/sh/mm/pg-nommu.c b/arch/sh/mm/pg-nommu.c
index 8f9165a4e333..d15221beaa16 100644
--- a/arch/sh/mm/pg-nommu.c
+++ b/arch/sh/mm/pg-nommu.c
@@ -14,23 +14,24 @@
14#include <linux/string.h> 14#include <linux/string.h>
15#include <asm/page.h> 15#include <asm/page.h>
16 16
17static void copy_page_nommu(void *to, void *from) 17void copy_page_nommu(void *to, void *from)
18{ 18{
19 memcpy(to, from, PAGE_SIZE); 19 memcpy(to, from, PAGE_SIZE);
20} 20}
21 21
22static void clear_page_nommu(void *to) 22void clear_page_nommu(void *to)
23{ 23{
24 memset(to, 0, PAGE_SIZE); 24 memset(to, 0, PAGE_SIZE);
25} 25}
26 26
27static int __init pg_nommu_init(void) 27__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n)
28{ 28{
29 copy_page = copy_page_nommu; 29 memcpy(to, from, n);
30 clear_page = clear_page_nommu;
31
32 return 0; 30 return 0;
33} 31}
34 32
35subsys_initcall(pg_nommu_init); 33__kernel_size_t __clear_user(void *to, __kernel_size_t n)
36 34{
35 memset(to, 0, n);
36 return 0;
37}
diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c
index c776b60fc250..07371ed7a313 100644
--- a/arch/sh/mm/pg-sh4.c
+++ b/arch/sh/mm/pg-sh4.c
@@ -2,7 +2,7 @@
2 * arch/sh/mm/pg-sh4.c 2 * arch/sh/mm/pg-sh4.c
3 * 3 *
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2002 Paul Mundt 5 * Copyright (C) 2002 - 2005 Paul Mundt
6 * 6 *
7 * Released under the terms of the GNU GPL v2.0. 7 * Released under the terms of the GNU GPL v2.0.
8 */ 8 */
@@ -23,6 +23,8 @@
23 23
24extern struct semaphore p3map_sem[]; 24extern struct semaphore p3map_sem[];
25 25
26#define CACHE_ALIAS (cpu_data->dcache.alias_mask)
27
26/* 28/*
27 * clear_user_page 29 * clear_user_page
28 * @to: P1 address 30 * @to: P1 address
@@ -35,14 +37,15 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
35 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) 37 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
36 clear_page(to); 38 clear_page(to);
37 else { 39 else {
38 pgprot_t pgprot = __pgprot(_PAGE_PRESENT | 40 pgprot_t pgprot = __pgprot(_PAGE_PRESENT |
39 _PAGE_RW | _PAGE_CACHABLE | 41 _PAGE_RW | _PAGE_CACHABLE |
40 _PAGE_DIRTY | _PAGE_ACCESSED | 42 _PAGE_DIRTY | _PAGE_ACCESSED |
41 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD); 43 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD);
42 unsigned long phys_addr = PHYSADDR(to); 44 unsigned long phys_addr = PHYSADDR(to);
43 unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS); 45 unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);
44 pgd_t *dir = pgd_offset_k(p3_addr); 46 pgd_t *pgd = pgd_offset_k(p3_addr);
45 pmd_t *pmd = pmd_offset(dir, p3_addr); 47 pud_t *pud = pud_offset(pgd, p3_addr);
48 pmd_t *pmd = pmd_offset(pud, p3_addr);
46 pte_t *pte = pte_offset_kernel(pmd, p3_addr); 49 pte_t *pte = pte_offset_kernel(pmd, p3_addr);
47 pte_t entry; 50 pte_t entry;
48 unsigned long flags; 51 unsigned long flags;
@@ -67,21 +70,22 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
67 * @address: U0 address to be mapped 70 * @address: U0 address to be mapped
68 * @page: page (virt_to_page(to)) 71 * @page: page (virt_to_page(to))
69 */ 72 */
70void copy_user_page(void *to, void *from, unsigned long address, 73void copy_user_page(void *to, void *from, unsigned long address,
71 struct page *page) 74 struct page *page)
72{ 75{
73 __set_bit(PG_mapped, &page->flags); 76 __set_bit(PG_mapped, &page->flags);
74 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) 77 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
75 copy_page(to, from); 78 copy_page(to, from);
76 else { 79 else {
77 pgprot_t pgprot = __pgprot(_PAGE_PRESENT | 80 pgprot_t pgprot = __pgprot(_PAGE_PRESENT |
78 _PAGE_RW | _PAGE_CACHABLE | 81 _PAGE_RW | _PAGE_CACHABLE |
79 _PAGE_DIRTY | _PAGE_ACCESSED | 82 _PAGE_DIRTY | _PAGE_ACCESSED |
80 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD); 83 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD);
81 unsigned long phys_addr = PHYSADDR(to); 84 unsigned long phys_addr = PHYSADDR(to);
82 unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS); 85 unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);
83 pgd_t *dir = pgd_offset_k(p3_addr); 86 pgd_t *pgd = pgd_offset_k(p3_addr);
84 pmd_t *pmd = pmd_offset(dir, p3_addr); 87 pud_t *pud = pud_offset(pgd, p3_addr);
88 pmd_t *pmd = pmd_offset(pud, p3_addr);
85 pte_t *pte = pte_offset_kernel(pmd, p3_addr); 89 pte_t *pte = pte_offset_kernel(pmd, p3_addr);
86 pte_t entry; 90 pte_t entry;
87 unsigned long flags; 91 unsigned long flags;
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
new file mode 100644
index 000000000000..92e745341e4d
--- /dev/null
+++ b/arch/sh/mm/pmb.c
@@ -0,0 +1,400 @@
1/*
2 * arch/sh/mm/pmb.c
3 *
4 * Privileged Space Mapping Buffer (PMB) Support.
5 *
6 * Copyright (C) 2005, 2006 Paul Mundt
7 *
8 * P1/P2 Section mapping definitions from map32.h, which was:
9 *
10 * Copyright 2003 (c) Lineo Solutions,Inc.
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive
14 * for more details.
15 */
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/slab.h>
20#include <linux/bitops.h>
21#include <linux/debugfs.h>
22#include <linux/fs.h>
23#include <linux/seq_file.h>
24#include <linux/err.h>
25#include <asm/system.h>
26#include <asm/uaccess.h>
27#include <asm/pgtable.h>
28#include <asm/mmu.h>
29#include <asm/io.h>
30
31#define NR_PMB_ENTRIES 16
32
33static kmem_cache_t *pmb_cache;
34static unsigned long pmb_map;
35
36static struct pmb_entry pmb_init_map[] = {
37 /* vpn ppn flags (ub/sz/c/wt) */
38
39 /* P1 Section Mappings */
40 { 0x80000000, 0x00000000, PMB_SZ_64M | PMB_C, },
41 { 0x84000000, 0x04000000, PMB_SZ_64M | PMB_C, },
42 { 0x88000000, 0x08000000, PMB_SZ_128M | PMB_C, },
43 { 0x90000000, 0x10000000, PMB_SZ_64M | PMB_C, },
44 { 0x94000000, 0x14000000, PMB_SZ_64M | PMB_C, },
45 { 0x98000000, 0x18000000, PMB_SZ_64M | PMB_C, },
46
47 /* P2 Section Mappings */
48 { 0xa0000000, 0x00000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
49 { 0xa4000000, 0x04000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
50 { 0xa8000000, 0x08000000, PMB_UB | PMB_SZ_128M | PMB_WT, },
51 { 0xb0000000, 0x10000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
52 { 0xb4000000, 0x14000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
53 { 0xb8000000, 0x18000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
54};
55
56static inline unsigned long mk_pmb_entry(unsigned int entry)
57{
58 return (entry & PMB_E_MASK) << PMB_E_SHIFT;
59}
60
61static inline unsigned long mk_pmb_addr(unsigned int entry)
62{
63 return mk_pmb_entry(entry) | PMB_ADDR;
64}
65
66static inline unsigned long mk_pmb_data(unsigned int entry)
67{
68 return mk_pmb_entry(entry) | PMB_DATA;
69}
70
71struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
72 unsigned long flags)
73{
74 struct pmb_entry *pmbe;
75
76 pmbe = kmem_cache_alloc(pmb_cache, GFP_KERNEL);
77 if (!pmbe)
78 return ERR_PTR(-ENOMEM);
79
80 pmbe->vpn = vpn;
81 pmbe->ppn = ppn;
82 pmbe->flags = flags;
83
84 return pmbe;
85}
86
87void pmb_free(struct pmb_entry *pmbe)
88{
89 kmem_cache_free(pmb_cache, pmbe);
90}
91
92/*
93 * Must be in P2 for __set_pmb_entry()
94 */
95int __set_pmb_entry(unsigned long vpn, unsigned long ppn,
96 unsigned long flags, int *entry)
97{
98 unsigned int pos = *entry;
99
100 if (unlikely(pos == PMB_NO_ENTRY))
101 pos = find_first_zero_bit(&pmb_map, NR_PMB_ENTRIES);
102
103repeat:
104 if (unlikely(pos > NR_PMB_ENTRIES))
105 return -ENOSPC;
106
107 if (test_and_set_bit(pos, &pmb_map)) {
108 pos = find_first_zero_bit(&pmb_map, NR_PMB_ENTRIES);
109 goto repeat;
110 }
111
112 ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos));
113
114#ifdef CONFIG_SH_WRITETHROUGH
115 /*
116 * When we are in 32-bit address extended mode, CCR.CB becomes
117 * invalid, so care must be taken to manually adjust cacheable
118 * translations.
119 */
120 if (likely(flags & PMB_C))
121 flags |= PMB_WT;
122#endif
123
124 ctrl_outl(ppn | flags | PMB_V, mk_pmb_data(pos));
125
126 *entry = pos;
127
128 return 0;
129}
130
131int set_pmb_entry(struct pmb_entry *pmbe)
132{
133 int ret;
134
135 jump_to_P2();
136 ret = __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &pmbe->entry);
137 back_to_P1();
138
139 return ret;
140}
141
142void clear_pmb_entry(struct pmb_entry *pmbe)
143{
144 unsigned int entry = pmbe->entry;
145 unsigned long addr;
146
147 /*
148 * Don't allow clearing of wired init entries, P1 or P2 access
149 * without a corresponding mapping in the PMB will lead to reset
150 * by the TLB.
151 */
152 if (unlikely(entry < ARRAY_SIZE(pmb_init_map) ||
153 entry >= NR_PMB_ENTRIES))
154 return;
155
156 jump_to_P2();
157
158 /* Clear V-bit */
159 addr = mk_pmb_addr(entry);
160 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr);
161
162 addr = mk_pmb_data(entry);
163 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr);
164
165 back_to_P1();
166
167 clear_bit(entry, &pmb_map);
168}
169
170static DEFINE_SPINLOCK(pmb_list_lock);
171static struct pmb_entry *pmb_list;
172
173static inline void pmb_list_add(struct pmb_entry *pmbe)
174{
175 struct pmb_entry **p, *tmp;
176
177 p = &pmb_list;
178 while ((tmp = *p) != NULL)
179 p = &tmp->next;
180
181 pmbe->next = tmp;
182 *p = pmbe;
183}
184
185static inline void pmb_list_del(struct pmb_entry *pmbe)
186{
187 struct pmb_entry **p, *tmp;
188
189 for (p = &pmb_list; (tmp = *p); p = &tmp->next)
190 if (tmp == pmbe) {
191 *p = tmp->next;
192 return;
193 }
194}
195
196static struct {
197 unsigned long size;
198 int flag;
199} pmb_sizes[] = {
200 { .size = 0x20000000, .flag = PMB_SZ_512M, },
201 { .size = 0x08000000, .flag = PMB_SZ_128M, },
202 { .size = 0x04000000, .flag = PMB_SZ_64M, },
203 { .size = 0x01000000, .flag = PMB_SZ_16M, },
204};
205
206long pmb_remap(unsigned long vaddr, unsigned long phys,
207 unsigned long size, unsigned long flags)
208{
209 struct pmb_entry *pmbp;
210 unsigned long wanted;
211 int pmb_flags, i;
212
213 /* Convert typical pgprot value to the PMB equivalent */
214 if (flags & _PAGE_CACHABLE) {
215 if (flags & _PAGE_WT)
216 pmb_flags = PMB_WT;
217 else
218 pmb_flags = PMB_C;
219 } else
220 pmb_flags = PMB_WT | PMB_UB;
221
222 pmbp = NULL;
223 wanted = size;
224
225again:
226 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
227 struct pmb_entry *pmbe;
228 int ret;
229
230 if (size < pmb_sizes[i].size)
231 continue;
232
233 pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag);
234 if (IS_ERR(pmbe))
235 return PTR_ERR(pmbe);
236
237 ret = set_pmb_entry(pmbe);
238 if (ret != 0) {
239 pmb_free(pmbe);
240 return -EBUSY;
241 }
242
243 phys += pmb_sizes[i].size;
244 vaddr += pmb_sizes[i].size;
245 size -= pmb_sizes[i].size;
246
247 /*
248 * Link adjacent entries that span multiple PMB entries
249 * for easier tear-down.
250 */
251 if (likely(pmbp))
252 pmbp->link = pmbe;
253
254 pmbp = pmbe;
255 }
256
257 if (size >= 0x1000000)
258 goto again;
259
260 return wanted - size;
261}
262
263void pmb_unmap(unsigned long addr)
264{
265 struct pmb_entry **p, *pmbe;
266
267 for (p = &pmb_list; (pmbe = *p); p = &pmbe->next)
268 if (pmbe->vpn == addr)
269 break;
270
271 if (unlikely(!pmbe))
272 return;
273
274 WARN_ON(!test_bit(pmbe->entry, &pmb_map));
275
276 do {
277 struct pmb_entry *pmblink = pmbe;
278
279 clear_pmb_entry(pmbe);
280 pmbe = pmblink->link;
281
282 pmb_free(pmblink);
283 } while (pmbe);
284}
285
286static void pmb_cache_ctor(void *pmb, kmem_cache_t *cachep, unsigned long flags)
287{
288 struct pmb_entry *pmbe = pmb;
289
290 memset(pmb, 0, sizeof(struct pmb_entry));
291
292 spin_lock_irq(&pmb_list_lock);
293
294 pmbe->entry = PMB_NO_ENTRY;
295 pmb_list_add(pmbe);
296
297 spin_unlock_irq(&pmb_list_lock);
298}
299
300static void pmb_cache_dtor(void *pmb, kmem_cache_t *cachep, unsigned long flags)
301{
302 spin_lock_irq(&pmb_list_lock);
303 pmb_list_del(pmb);
304 spin_unlock_irq(&pmb_list_lock);
305}
306
307static int __init pmb_init(void)
308{
309 unsigned int nr_entries = ARRAY_SIZE(pmb_init_map);
310 unsigned int entry;
311
312 BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES));
313
314 pmb_cache = kmem_cache_create("pmb", sizeof(struct pmb_entry),
315 0, 0, pmb_cache_ctor, pmb_cache_dtor);
316 BUG_ON(!pmb_cache);
317
318 jump_to_P2();
319
320 /*
321 * Ordering is important, P2 must be mapped in the PMB before we
322 * can set PMB.SE, and P1 must be mapped before we jump back to
323 * P1 space.
324 */
325 for (entry = 0; entry < nr_entries; entry++) {
326 struct pmb_entry *pmbe = pmb_init_map + entry;
327
328 __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &entry);
329 }
330
331 ctrl_outl(0, PMB_IRMCR);
332
333 /* PMB.SE and UB[7] */
334 ctrl_outl((1 << 31) | (1 << 7), PMB_PASCR);
335
336 back_to_P1();
337
338 return 0;
339}
340arch_initcall(pmb_init);
341
342static int pmb_seq_show(struct seq_file *file, void *iter)
343{
344 int i;
345
346 seq_printf(file, "V: Valid, C: Cacheable, WT: Write-Through\n"
347 "CB: Copy-Back, B: Buffered, UB: Unbuffered\n");
348 seq_printf(file, "ety vpn ppn size flags\n");
349
350 for (i = 0; i < NR_PMB_ENTRIES; i++) {
351 unsigned long addr, data;
352 unsigned int size;
353 char *sz_str = NULL;
354
355 addr = ctrl_inl(mk_pmb_addr(i));
356 data = ctrl_inl(mk_pmb_data(i));
357
358 size = data & PMB_SZ_MASK;
359 sz_str = (size == PMB_SZ_16M) ? " 16MB":
360 (size == PMB_SZ_64M) ? " 64MB":
361 (size == PMB_SZ_128M) ? "128MB":
362 "512MB";
363
364 /* 02: V 0x88 0x08 128MB C CB B */
365 seq_printf(file, "%02d: %c 0x%02lx 0x%02lx %s %c %s %s\n",
366 i, ((addr & PMB_V) && (data & PMB_V)) ? 'V' : ' ',
367 (addr >> 24) & 0xff, (data >> 24) & 0xff,
368 sz_str, (data & PMB_C) ? 'C' : ' ',
369 (data & PMB_WT) ? "WT" : "CB",
370 (data & PMB_UB) ? "UB" : " B");
371 }
372
373 return 0;
374}
375
376static int pmb_debugfs_open(struct inode *inode, struct file *file)
377{
378 return single_open(file, pmb_seq_show, NULL);
379}
380
381static struct file_operations pmb_debugfs_fops = {
382 .owner = THIS_MODULE,
383 .open = pmb_debugfs_open,
384 .read = seq_read,
385 .llseek = seq_lseek,
386 .release = seq_release,
387};
388
389static int __init pmb_debugfs_init(void)
390{
391 struct dentry *dentry;
392
393 dentry = debugfs_create_file("pmb", S_IFREG | S_IRUGO,
394 NULL, NULL, &pmb_debugfs_fops);
395 if (IS_ERR(dentry))
396 return PTR_ERR(dentry);
397
398 return 0;
399}
400postcore_initcall(pmb_debugfs_init);
diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlb-flush.c
new file mode 100644
index 000000000000..73ec7f6084fa
--- /dev/null
+++ b/arch/sh/mm/tlb-flush.c
@@ -0,0 +1,134 @@
1/*
2 * TLB flushing operations for SH with an MMU.
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/mm.h>
12#include <asm/mmu_context.h>
13#include <asm/tlbflush.h>
14
15void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
16{
17 if (vma->vm_mm && vma->vm_mm->context.id != NO_CONTEXT) {
18 unsigned long flags;
19 unsigned long asid;
20 unsigned long saved_asid = MMU_NO_ASID;
21
22 asid = vma->vm_mm->context.id & MMU_CONTEXT_ASID_MASK;
23 page &= PAGE_MASK;
24
25 local_irq_save(flags);
26 if (vma->vm_mm != current->mm) {
27 saved_asid = get_asid();
28 set_asid(asid);
29 }
30 __flush_tlb_page(asid, page);
31 if (saved_asid != MMU_NO_ASID)
32 set_asid(saved_asid);
33 local_irq_restore(flags);
34 }
35}
36
37void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
38 unsigned long end)
39{
40 struct mm_struct *mm = vma->vm_mm;
41
42 if (mm->context.id != NO_CONTEXT) {
43 unsigned long flags;
44 int size;
45
46 local_irq_save(flags);
47 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
48 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
49 mm->context.id = NO_CONTEXT;
50 if (mm == current->mm)
51 activate_context(mm);
52 } else {
53 unsigned long asid;
54 unsigned long saved_asid = MMU_NO_ASID;
55
56 asid = mm->context.id & MMU_CONTEXT_ASID_MASK;
57 start &= PAGE_MASK;
58 end += (PAGE_SIZE - 1);
59 end &= PAGE_MASK;
60 if (mm != current->mm) {
61 saved_asid = get_asid();
62 set_asid(asid);
63 }
64 while (start < end) {
65 __flush_tlb_page(asid, start);
66 start += PAGE_SIZE;
67 }
68 if (saved_asid != MMU_NO_ASID)
69 set_asid(saved_asid);
70 }
71 local_irq_restore(flags);
72 }
73}
74
75void flush_tlb_kernel_range(unsigned long start, unsigned long end)
76{
77 unsigned long flags;
78 int size;
79
80 local_irq_save(flags);
81 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
82 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
83 flush_tlb_all();
84 } else {
85 unsigned long asid;
86 unsigned long saved_asid = get_asid();
87
88 asid = init_mm.context.id & MMU_CONTEXT_ASID_MASK;
89 start &= PAGE_MASK;
90 end += (PAGE_SIZE - 1);
91 end &= PAGE_MASK;
92 set_asid(asid);
93 while (start < end) {
94 __flush_tlb_page(asid, start);
95 start += PAGE_SIZE;
96 }
97 set_asid(saved_asid);
98 }
99 local_irq_restore(flags);
100}
101
102void flush_tlb_mm(struct mm_struct *mm)
103{
104 /* Invalidate all TLB of this process. */
105 /* Instead of invalidating each TLB, we get new MMU context. */
106 if (mm->context.id != NO_CONTEXT) {
107 unsigned long flags;
108
109 local_irq_save(flags);
110 mm->context.id = NO_CONTEXT;
111 if (mm == current->mm)
112 activate_context(mm);
113 local_irq_restore(flags);
114 }
115}
116
117void flush_tlb_all(void)
118{
119 unsigned long flags, status;
120
121 /*
122 * Flush all the TLB.
123 *
124 * Write to the MMU control register's bit:
125 * TF-bit for SH-3, TI-bit for SH-4.
126 * It's same position, bit #2.
127 */
128 local_irq_save(flags);
129 status = ctrl_inl(MMUCR);
130 status |= 0x04;
131 ctrl_outl(status, MMUCR);
132 ctrl_barrier();
133 local_irq_restore(flags);
134}
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index 115b1b6be40b..812b2d567de2 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -36,7 +36,6 @@ void update_mmu_cache(struct vm_area_struct * vma,
36 unsigned long vpn; 36 unsigned long vpn;
37 struct page *page; 37 struct page *page;
38 unsigned long pfn; 38 unsigned long pfn;
39 unsigned long ptea;
40 39
41 /* Ptrace may call this routine. */ 40 /* Ptrace may call this routine. */
42 if (vma && current->active_mm != vma->vm_mm) 41 if (vma && current->active_mm != vma->vm_mm)
@@ -59,10 +58,11 @@ void update_mmu_cache(struct vm_area_struct * vma,
59 ctrl_outl(vpn, MMU_PTEH); 58 ctrl_outl(vpn, MMU_PTEH);
60 59
61 pteval = pte_val(pte); 60 pteval = pte_val(pte);
61
62 /* Set PTEA register */ 62 /* Set PTEA register */
63 /* TODO: make this look less hacky */ 63 if (cpu_data->flags & CPU_HAS_PTEA)
64 ptea = ((pteval >> 28) & 0xe) | (pteval & 0x1); 64 /* TODO: make this look less hacky */
65 ctrl_outl(ptea, MMU_PTEA); 65 ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
66 66
67 /* Set PTEL register */ 67 /* Set PTEL register */
68 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ 68 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
diff --git a/arch/sh/oprofile/Makefile b/arch/sh/oprofile/Makefile
index 686738d4aa3c..1f25d9bb7538 100644
--- a/arch/sh/oprofile/Makefile
+++ b/arch/sh/oprofile/Makefile
@@ -7,7 +7,11 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
7 timer_int.o ) 7 timer_int.o )
8 8
9profdrvr-y := op_model_null.o 9profdrvr-y := op_model_null.o
10
11# SH7750-style performance counters exist across 7750/7750S and 7091.
12profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750S) := op_model_sh7750.o
10profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750) := op_model_sh7750.o 13profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750) := op_model_sh7750.o
14profdrvr-$(CONFIG_CPU_SUBTYPE_SH7091) := op_model_sh7750.o
11 15
12oprofile-y := $(DRIVER_OBJS) $(profdrvr-y) 16oprofile-y := $(DRIVER_OBJS) $(profdrvr-y)
13 17
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 182fe9092577..ac57638977ee 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -8,16 +8,15 @@
8SE SH_SOLUTION_ENGINE 8SE SH_SOLUTION_ENGINE
97751SE SH_7751_SOLUTION_ENGINE 97751SE SH_7751_SOLUTION_ENGINE
107300SE SH_7300_SOLUTION_ENGINE 107300SE SH_7300_SOLUTION_ENGINE
117343SE SH_7343_SOLUTION_ENGINE
1173180SE SH_73180_SOLUTION_ENGINE 1273180SE SH_73180_SOLUTION_ENGINE
127751SYSTEMH SH_7751_SYSTEMH 137751SYSTEMH SH_7751_SYSTEMH
13HP6XX SH_HP6XX 14HP6XX SH_HP6XX
14HD64461 HD64461 15HD64461 HD64461
15HD64465 HD64465 16HD64465 HD64465
16SH2000 SH_SH2000
17SATURN SH_SATURN 17SATURN SH_SATURN
18DREAMCAST SH_DREAMCAST 18DREAMCAST SH_DREAMCAST
19BIGSUR SH_BIGSUR 19BIGSUR SH_BIGSUR
20ADX SH_ADX
21MPC1211 SH_MPC1211 20MPC1211 SH_MPC1211
22SNAPGEAR SH_SECUREEDGE5410 21SNAPGEAR SH_SECUREEDGE5410
23HS7751RVOIP SH_HS7751RVOIP 22HS7751RVOIP SH_HS7751RVOIP
@@ -25,4 +24,9 @@ RTS7751R2D SH_RTS7751R2D
25EDOSK7705 SH_EDOSK7705 24EDOSK7705 SH_EDOSK7705
26SH4202_MICRODEV SH_SH4202_MICRODEV 25SH4202_MICRODEV SH_SH4202_MICRODEV
27SH03 SH_SH03 26SH03 SH_SH03
28 27LANDISK SH_LANDISK
28R7780RP SH_R7780RP
29R7780MP SH_R7780MP
30TITAN SH_TITAN
31SHMIN SH_SHMIN
327710VOIPGW SH_7710VOIPGW
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 6a3d3af45c59..1b21c3a911d9 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -747,7 +747,7 @@ config NVRAM
747 747
748config RTC 748config RTC
749 tristate "Enhanced Real Time Clock Support" 749 tristate "Enhanced Real Time Clock Support"
750 depends on !PPC && !PARISC && !IA64 && !M68K && (!SPARC || PCI) && !FRV && !ARM 750 depends on !PPC && !PARISC && !IA64 && !M68K && (!SPARC || PCI) && !FRV && !ARM && !SUPERH
751 ---help--- 751 ---help---
752 If you say Y here and create a character special file /dev/rtc with 752 If you say Y here and create a character special file /dev/rtc with
753 major number 10 and minor number 135 using mknod ("man mknod"), you 753 major number 10 and minor number 135 using mknod ("man mknod"), you
diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig
index fff89c2d88fd..f114d7b5bb2a 100644
--- a/drivers/char/watchdog/Kconfig
+++ b/drivers/char/watchdog/Kconfig
@@ -510,6 +510,14 @@ config SH_WDT
510 To compile this driver as a module, choose M here: the 510 To compile this driver as a module, choose M here: the
511 module will be called shwdt. 511 module will be called shwdt.
512 512
513config SH_WDT_MMAP
514 bool "Allow mmap of SH WDT"
515 default n
516 depends on SH_WDT
517 help
518 If you say Y here, user applications will be able to mmap the
519 WDT/CPG registers.
520#
513# SPARC64 Architecture 521# SPARC64 Architecture
514 522
515config WATCHDOG_CP1XXX 523config WATCHDOG_CP1XXX
diff --git a/drivers/char/watchdog/shwdt.c b/drivers/char/watchdog/shwdt.c
index 1355038f1044..e5b8c64f1d65 100644
--- a/drivers/char/watchdog/shwdt.c
+++ b/drivers/char/watchdog/shwdt.c
@@ -27,7 +27,7 @@
27#include <linux/notifier.h> 27#include <linux/notifier.h>
28#include <linux/ioport.h> 28#include <linux/ioport.h>
29#include <linux/fs.h> 29#include <linux/fs.h>
30 30#include <linux/mm.h>
31#include <asm/io.h> 31#include <asm/io.h>
32#include <asm/uaccess.h> 32#include <asm/uaccess.h>
33#include <asm/watchdog.h> 33#include <asm/watchdog.h>
@@ -125,7 +125,6 @@ static void sh_wdt_start(void)
125 125
126/** 126/**
127 * sh_wdt_stop - Stop the Watchdog 127 * sh_wdt_stop - Stop the Watchdog
128 *
129 * Stops the watchdog. 128 * Stops the watchdog.
130 */ 129 */
131static void sh_wdt_stop(void) 130static void sh_wdt_stop(void)
@@ -141,22 +140,20 @@ static void sh_wdt_stop(void)
141 140
142/** 141/**
143 * sh_wdt_keepalive - Keep the Userspace Watchdog Alive 142 * sh_wdt_keepalive - Keep the Userspace Watchdog Alive
144 *
145 * The Userspace watchdog got a KeepAlive: schedule the next heartbeat. 143 * The Userspace watchdog got a KeepAlive: schedule the next heartbeat.
146 */ 144 */
147static void sh_wdt_keepalive(void) 145static inline void sh_wdt_keepalive(void)
148{ 146{
149 next_heartbeat = jiffies + (heartbeat * HZ); 147 next_heartbeat = jiffies + (heartbeat * HZ);
150} 148}
151 149
152/** 150/**
153 * sh_wdt_set_heartbeat - Set the Userspace Watchdog heartbeat 151 * sh_wdt_set_heartbeat - Set the Userspace Watchdog heartbeat
154 *
155 * Set the Userspace Watchdog heartbeat 152 * Set the Userspace Watchdog heartbeat
156 */ 153 */
157static int sh_wdt_set_heartbeat(int t) 154static int sh_wdt_set_heartbeat(int t)
158{ 155{
159 if ((t < 1) || (t > 3600)) /* arbitrary upper limit */ 156 if (unlikely((t < 1) || (t > 3600))) /* arbitrary upper limit */
160 return -EINVAL; 157 return -EINVAL;
161 158
162 heartbeat = t; 159 heartbeat = t;
@@ -165,7 +162,6 @@ static int sh_wdt_set_heartbeat(int t)
165 162
166/** 163/**
167 * sh_wdt_ping - Ping the Watchdog 164 * sh_wdt_ping - Ping the Watchdog
168 *
169 * @data: Unused 165 * @data: Unused
170 * 166 *
171 * Clears overflow bit, resets timer counter. 167 * Clears overflow bit, resets timer counter.
@@ -182,14 +178,13 @@ static void sh_wdt_ping(unsigned long data)
182 sh_wdt_write_cnt(0); 178 sh_wdt_write_cnt(0);
183 179
184 mod_timer(&timer, next_ping_period(clock_division_ratio)); 180 mod_timer(&timer, next_ping_period(clock_division_ratio));
185 } else { 181 } else
186 printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n"); 182 printk(KERN_WARNING PFX "Heartbeat lost! Will not ping "
187 } 183 "the watchdog\n");
188} 184}
189 185
190/** 186/**
191 * sh_wdt_open - Open the Device 187 * sh_wdt_open - Open the Device
192 *
193 * @inode: inode of device 188 * @inode: inode of device
194 * @file: file handle of device 189 * @file: file handle of device
195 * 190 *
@@ -209,7 +204,6 @@ static int sh_wdt_open(struct inode *inode, struct file *file)
209 204
210/** 205/**
211 * sh_wdt_close - Close the Device 206 * sh_wdt_close - Close the Device
212 *
213 * @inode: inode of device 207 * @inode: inode of device
214 * @file: file handle of device 208 * @file: file handle of device
215 * 209 *
@@ -220,7 +214,8 @@ static int sh_wdt_close(struct inode *inode, struct file *file)
220 if (shwdt_expect_close == 42) { 214 if (shwdt_expect_close == 42) {
221 sh_wdt_stop(); 215 sh_wdt_stop();
222 } else { 216 } else {
223 printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n"); 217 printk(KERN_CRIT PFX "Unexpected close, not "
218 "stopping watchdog!\n");
224 sh_wdt_keepalive(); 219 sh_wdt_keepalive();
225 } 220 }
226 221
@@ -232,7 +227,6 @@ static int sh_wdt_close(struct inode *inode, struct file *file)
232 227
233/** 228/**
234 * sh_wdt_write - Write to Device 229 * sh_wdt_write - Write to Device
235 *
236 * @file: file handle of device 230 * @file: file handle of device
237 * @buf: buffer to write 231 * @buf: buffer to write
238 * @count: length of buffer 232 * @count: length of buffer
@@ -264,8 +258,56 @@ static ssize_t sh_wdt_write(struct file *file, const char *buf,
264} 258}
265 259
266/** 260/**
267 * sh_wdt_ioctl - Query Device 261 * sh_wdt_mmap - map WDT/CPG registers into userspace
262 * @file: file structure for the device
263 * @vma: VMA to map the registers into
264 *
265 * A simple mmap() implementation for the corner cases where the counter
266 * needs to be mapped in userspace directly. Due to the relatively small
267 * size of the area, neighbouring registers not necessarily tied to the
268 * CPG will also be accessible through the register page, so this remains
269 * configurable for users that really know what they're doing.
268 * 270 *
271 * Additionaly, the register page maps in the CPG register base relative
272 * to the nearest page-aligned boundary, which requires that userspace do
273 * the appropriate CPU subtype math for calculating the page offset for
274 * the counter value.
275 */
276static int sh_wdt_mmap(struct file *file, struct vm_area_struct *vma)
277{
278 int ret = -ENOSYS;
279
280#ifdef CONFIG_SH_WDT_MMAP
281 unsigned long addr;
282
283 /* Only support the simple cases where we map in a register page. */
284 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
285 return -EINVAL;
286
287 /*
288 * Pick WTCNT as the start, it's usually the first register after the
289 * FRQCR, and neither one are generally page-aligned out of the box.
290 */
291 addr = WTCNT & ~(PAGE_SIZE - 1);
292
293 vma->vm_flags |= VM_IO;
294 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
295
296 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
297 PAGE_SIZE, vma->vm_page_prot)) {
298 printk(KERN_ERR PFX "%s: io_remap_pfn_range failed\n",
299 __FUNCTION__);
300 return -EAGAIN;
301 }
302
303 ret = 0;
304#endif
305
306 return ret;
307}
308
309/**
310 * sh_wdt_ioctl - Query Device
269 * @inode: inode of device 311 * @inode: inode of device
270 * @file: file handle of device 312 * @file: file handle of device
271 * @cmd: watchdog command 313 * @cmd: watchdog command
@@ -326,7 +368,6 @@ static int sh_wdt_ioctl(struct inode *inode, struct file *file,
326 368
327/** 369/**
328 * sh_wdt_notify_sys - Notifier Handler 370 * sh_wdt_notify_sys - Notifier Handler
329 *
330 * @this: notifier block 371 * @this: notifier block
331 * @code: notifier event 372 * @code: notifier event
332 * @unused: unused 373 * @unused: unused
@@ -337,9 +378,8 @@ static int sh_wdt_ioctl(struct inode *inode, struct file *file,
337static int sh_wdt_notify_sys(struct notifier_block *this, 378static int sh_wdt_notify_sys(struct notifier_block *this,
338 unsigned long code, void *unused) 379 unsigned long code, void *unused)
339{ 380{
340 if (code == SYS_DOWN || code == SYS_HALT) { 381 if (code == SYS_DOWN || code == SYS_HALT)
341 sh_wdt_stop(); 382 sh_wdt_stop();
342 }
343 383
344 return NOTIFY_DONE; 384 return NOTIFY_DONE;
345} 385}
@@ -351,10 +391,12 @@ static const struct file_operations sh_wdt_fops = {
351 .ioctl = sh_wdt_ioctl, 391 .ioctl = sh_wdt_ioctl,
352 .open = sh_wdt_open, 392 .open = sh_wdt_open,
353 .release = sh_wdt_close, 393 .release = sh_wdt_close,
394 .mmap = sh_wdt_mmap,
354}; 395};
355 396
356static struct watchdog_info sh_wdt_info = { 397static struct watchdog_info sh_wdt_info = {
357 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, 398 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
399 WDIOF_MAGICCLOSE,
358 .firmware_version = 1, 400 .firmware_version = 1,
359 .identity = "SH WDT", 401 .identity = "SH WDT",
360}; 402};
@@ -371,7 +413,6 @@ static struct miscdevice sh_wdt_miscdev = {
371 413
372/** 414/**
373 * sh_wdt_init - Initialize module 415 * sh_wdt_init - Initialize module
374 *
375 * Registers the device and notifier handler. Actual device 416 * Registers the device and notifier handler. Actual device
376 * initialization is handled by sh_wdt_open(). 417 * initialization is handled by sh_wdt_open().
377 */ 418 */
@@ -381,15 +422,15 @@ static int __init sh_wdt_init(void)
381 422
382 if ((clock_division_ratio < 0x5) || (clock_division_ratio > 0x7)) { 423 if ((clock_division_ratio < 0x5) || (clock_division_ratio > 0x7)) {
383 clock_division_ratio = WTCSR_CKS_4096; 424 clock_division_ratio = WTCSR_CKS_4096;
384 printk(KERN_INFO PFX "clock_division_ratio value must be 0x5<=x<=0x7, using %d\n", 425 printk(KERN_INFO PFX "clock_division_ratio value must "
385 clock_division_ratio); 426 "be 0x5<=x<=0x7, using %d\n", clock_division_ratio);
386 } 427 }
387 428
388 if (sh_wdt_set_heartbeat(heartbeat)) 429 rc = sh_wdt_set_heartbeat(heartbeat);
389 { 430 if (unlikely(rc)) {
390 heartbeat = WATCHDOG_HEARTBEAT; 431 heartbeat = WATCHDOG_HEARTBEAT;
391 printk(KERN_INFO PFX "heartbeat value must be 1<=x<=3600, using %d\n", 432 printk(KERN_INFO PFX "heartbeat value must "
392 heartbeat); 433 "be 1<=x<=3600, using %d\n", heartbeat);
393 } 434 }
394 435
395 init_timer(&timer); 436 init_timer(&timer);
@@ -397,15 +438,16 @@ static int __init sh_wdt_init(void)
397 timer.data = 0; 438 timer.data = 0;
398 439
399 rc = register_reboot_notifier(&sh_wdt_notifier); 440 rc = register_reboot_notifier(&sh_wdt_notifier);
400 if (rc) { 441 if (unlikely(rc)) {
401 printk(KERN_ERR PFX "Can't register reboot notifier (err=%d)\n", rc); 442 printk(KERN_ERR PFX "Can't register reboot notifier (err=%d)\n",
443 rc);
402 return rc; 444 return rc;
403 } 445 }
404 446
405 rc = misc_register(&sh_wdt_miscdev); 447 rc = misc_register(&sh_wdt_miscdev);
406 if (rc) { 448 if (unlikely(rc)) {
407 printk(KERN_ERR PFX "Can't register miscdev on minor=%d (err=%d)\n", 449 printk(KERN_ERR PFX "Can't register miscdev on "
408 sh_wdt_miscdev.minor, rc); 450 "minor=%d (err=%d)\n", sh_wdt_miscdev.minor, rc);
409 unregister_reboot_notifier(&sh_wdt_notifier); 451 unregister_reboot_notifier(&sh_wdt_notifier);
410 return rc; 452 return rc;
411 } 453 }
@@ -418,7 +460,6 @@ static int __init sh_wdt_init(void)
418 460
419/** 461/**
420 * sh_wdt_exit - Deinitialize module 462 * sh_wdt_exit - Deinitialize module
421 *
422 * Unregisters the device and notifier handler. Actual device 463 * Unregisters the device and notifier handler. Actual device
423 * deinitialization is handled by sh_wdt_close(). 464 * deinitialization is handled by sh_wdt_close().
424 */ 465 */
@@ -434,14 +475,13 @@ MODULE_LICENSE("GPL");
434MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 475MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
435 476
436module_param(clock_division_ratio, int, 0); 477module_param(clock_division_ratio, int, 0);
437MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). Defaults to 0x7."); 478MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). (default=" __MODULE_STRING(clock_division_ratio) ")");
438 479
439module_param(heartbeat, int, 0); 480module_param(heartbeat, int, 0);
440MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<=heartbeat<=3600, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); 481MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<=heartbeat<=3600, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
441 482
442module_param(nowayout, int, 0); 483module_param(nowayout, int, 0);
443MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); 484MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
444 485
445module_init(sh_wdt_init); 486module_init(sh_wdt_init);
446module_exit(sh_wdt_exit); 487module_exit(sh_wdt_exit);
447
diff --git a/drivers/input/touchscreen/hp680_ts_input.c b/drivers/input/touchscreen/hp680_ts_input.c
index fa97e0f79e7e..ee6c2f40cdf6 100644
--- a/drivers/input/touchscreen/hp680_ts_input.c
+++ b/drivers/input/touchscreen/hp680_ts_input.c
@@ -15,7 +15,6 @@
15#define HP680_TS_ABS_Y_MIN 80 15#define HP680_TS_ABS_Y_MIN 80
16#define HP680_TS_ABS_Y_MAX 910 16#define HP680_TS_ABS_Y_MAX 910
17 17
18#define SCPCR 0xa4000116
19#define PHDR 0xa400012e 18#define PHDR 0xa400012e
20#define SCPDR 0xa4000136 19#define SCPDR 0xa4000136
21 20
@@ -77,19 +76,6 @@ static irqreturn_t hp680_ts_interrupt(int irq, void *dev, struct pt_regs *regs)
77 76
78static int __init hp680_ts_init(void) 77static int __init hp680_ts_init(void)
79{ 78{
80 u8 scpdr;
81 u16 scpcr;
82
83 scpdr = ctrl_inb(SCPDR);
84 scpdr |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y;
85 scpdr &= ~SCPDR_TS_SCAN_ENABLE;
86 ctrl_outb(scpdr, SCPDR);
87
88 scpcr = ctrl_inw(SCPCR);
89 scpcr &= ~SCPCR_TS_MASK;
90 scpcr |= SCPCR_TS_ENABLE;
91 ctrl_outw(scpcr, SCPCR);
92
93 hp680_ts_dev = input_allocate_device(); 79 hp680_ts_dev = input_allocate_device();
94 if (!hp680_ts_dev) 80 if (!hp680_ts_dev)
95 return -ENOMEM; 81 return -ENOMEM;
diff --git a/drivers/net/stnic.c b/drivers/net/stnic.c
index 3fd7a4fee665..e6f90427160c 100644
--- a/drivers/net/stnic.c
+++ b/drivers/net/stnic.c
@@ -19,7 +19,7 @@
19 19
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/se/se.h> 22#include <asm/se.h>
23#include <asm/machvec.h> 23#include <asm/machvec.h>
24#ifdef CONFIG_SH_STANDARD_BIOS 24#ifdef CONFIG_SH_STANDARD_BIOS
25#include <asm/sh_bios.h> 25#include <asm/sh_bios.h>
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 7ff1d88094b6..33a7b720539b 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -238,6 +238,16 @@ config RTC_DRV_SA1100
238 To compile this driver as a module, choose M here: the 238 To compile this driver as a module, choose M here: the
239 module will be called rtc-sa1100. 239 module will be called rtc-sa1100.
240 240
241config RTC_DRV_SH
242 tristate "SuperH On-Chip RTC"
243 depends on RTC_CLASS && SUPERH
244 help
245 Say Y here to enable support for the on-chip RTC found in
246 most SuperH processors.
247
248 To compile this driver as a module, choose M here: the
249 module will be called rtc-sh.
250
241config RTC_DRV_VR41XX 251config RTC_DRV_VR41XX
242 tristate "NEC VR41XX" 252 tristate "NEC VR41XX"
243 depends on RTC_CLASS && CPU_VR41XX 253 depends on RTC_CLASS && CPU_VR41XX
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index bbcfb09d81d9..e72d467ab214 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o
31obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o 31obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
32obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o 32obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o
33obj-$(CONFIG_RTC_DRV_AT91) += rtc-at91.o 33obj-$(CONFIG_RTC_DRV_AT91) += rtc-at91.o
34obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
new file mode 100644
index 000000000000..d2ce0c8bb8f3
--- /dev/null
+++ b/drivers/rtc/rtc-sh.c
@@ -0,0 +1,467 @@
1/*
2 * SuperH On-Chip RTC Support
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * Based on the old arch/sh/kernel/cpu/rtc.c by:
7 *
8 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
9 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/bcd.h>
18#include <linux/rtc.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/seq_file.h>
22#include <linux/interrupt.h>
23#include <linux/spinlock.h>
24#include <asm/io.h>
25
26#ifdef CONFIG_CPU_SH3
27#define rtc_reg_size sizeof(u16)
28#define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */
29#elif defined(CONFIG_CPU_SH4)
30#define rtc_reg_size sizeof(u32)
31#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */
32#endif
33
34#define RTC_REG(r) ((r) * rtc_reg_size)
35
36#define R64CNT RTC_REG(0)
37#define RSECCNT RTC_REG(1)
38#define RMINCNT RTC_REG(2)
39#define RHRCNT RTC_REG(3)
40#define RWKCNT RTC_REG(4)
41#define RDAYCNT RTC_REG(5)
42#define RMONCNT RTC_REG(6)
43#define RYRCNT RTC_REG(7)
44#define RSECAR RTC_REG(8)
45#define RMINAR RTC_REG(9)
46#define RHRAR RTC_REG(10)
47#define RWKAR RTC_REG(11)
48#define RDAYAR RTC_REG(12)
49#define RMONAR RTC_REG(13)
50#define RCR1 RTC_REG(14)
51#define RCR2 RTC_REG(15)
52
53/* RCR1 Bits */
54#define RCR1_CF 0x80 /* Carry Flag */
55#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
56#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
57#define RCR1_AF 0x01 /* Alarm Flag */
58
59/* RCR2 Bits */
60#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
61#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
62#define RCR2_RTCEN 0x08 /* ENable RTC */
63#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
64#define RCR2_RESET 0x02 /* Reset bit */
65#define RCR2_START 0x01 /* Start bit */
66
67struct sh_rtc {
68 void __iomem *regbase;
69 unsigned long regsize;
70 struct resource *res;
71 unsigned int alarm_irq, periodic_irq, carry_irq;
72 struct rtc_device *rtc_dev;
73 spinlock_t lock;
74};
75
76static irqreturn_t sh_rtc_interrupt(int irq, void *id, struct pt_regs *regs)
77{
78 struct platform_device *pdev = id;
79 struct sh_rtc *rtc = platform_get_drvdata(pdev);
80 unsigned int tmp, events = 0;
81
82 spin_lock(&rtc->lock);
83
84 tmp = readb(rtc->regbase + RCR1);
85
86 if (tmp & RCR1_AF)
87 events |= RTC_AF | RTC_IRQF;
88
89 tmp &= ~(RCR1_CF | RCR1_AF);
90
91 writeb(tmp, rtc->regbase + RCR1);
92
93 rtc_update_irq(&rtc->rtc_dev->class_dev, 1, events);
94
95 spin_unlock(&rtc->lock);
96
97 return IRQ_HANDLED;
98}
99
100static irqreturn_t sh_rtc_periodic(int irq, void *id, struct pt_regs *regs)
101{
102 struct sh_rtc *rtc = dev_get_drvdata(id);
103
104 spin_lock(&rtc->lock);
105
106 rtc_update_irq(&rtc->rtc_dev->class_dev, 1, RTC_PF | RTC_IRQF);
107
108 spin_unlock(&rtc->lock);
109
110 return IRQ_HANDLED;
111}
112
113static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
114{
115 struct sh_rtc *rtc = dev_get_drvdata(dev);
116 unsigned int tmp;
117
118 spin_lock_irq(&rtc->lock);
119
120 tmp = readb(rtc->regbase + RCR2);
121
122 if (enable) {
123 tmp &= ~RCR2_PESMASK;
124 tmp |= RCR2_PEF | (2 << 4);
125 } else
126 tmp &= ~(RCR2_PESMASK | RCR2_PEF);
127
128 writeb(tmp, rtc->regbase + RCR2);
129
130 spin_unlock_irq(&rtc->lock);
131}
132
133static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
134{
135 struct sh_rtc *rtc = dev_get_drvdata(dev);
136 unsigned int tmp;
137
138 spin_lock_irq(&rtc->lock);
139
140 tmp = readb(rtc->regbase + RCR1);
141
142 if (enable)
143 tmp |= RCR1_AIE;
144 else
145 tmp &= ~RCR1_AIE;
146
147 writeb(tmp, rtc->regbase + RCR1);
148
149 spin_unlock_irq(&rtc->lock);
150}
151
152static int sh_rtc_open(struct device *dev)
153{
154 struct sh_rtc *rtc = dev_get_drvdata(dev);
155 unsigned int tmp;
156 int ret;
157
158 tmp = readb(rtc->regbase + RCR1);
159 tmp &= ~RCR1_CF;
160 tmp |= RCR1_CIE;
161 writeb(tmp, rtc->regbase + RCR1);
162
163 ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, SA_INTERRUPT,
164 "sh-rtc period", dev);
165 if (unlikely(ret)) {
166 dev_err(dev, "request period IRQ failed with %d, IRQ %d\n",
167 ret, rtc->periodic_irq);
168 return ret;
169 }
170
171 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, SA_INTERRUPT,
172 "sh-rtc carry", dev);
173 if (unlikely(ret)) {
174 dev_err(dev, "request carry IRQ failed with %d, IRQ %d\n",
175 ret, rtc->carry_irq);
176 free_irq(rtc->periodic_irq, dev);
177 goto err_bad_carry;
178 }
179
180 ret = request_irq(rtc->alarm_irq, sh_rtc_interrupt, SA_INTERRUPT,
181 "sh-rtc alarm", dev);
182 if (unlikely(ret)) {
183 dev_err(dev, "request alarm IRQ failed with %d, IRQ %d\n",
184 ret, rtc->alarm_irq);
185 goto err_bad_alarm;
186 }
187
188 return 0;
189
190err_bad_alarm:
191 free_irq(rtc->carry_irq, dev);
192err_bad_carry:
193 free_irq(rtc->periodic_irq, dev);
194
195 return ret;
196}
197
198static void sh_rtc_release(struct device *dev)
199{
200 struct sh_rtc *rtc = dev_get_drvdata(dev);
201
202 sh_rtc_setpie(dev, 0);
203
204 free_irq(rtc->periodic_irq, dev);
205 free_irq(rtc->carry_irq, dev);
206 free_irq(rtc->alarm_irq, dev);
207}
208
209static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
210{
211 struct sh_rtc *rtc = dev_get_drvdata(dev);
212 unsigned int tmp;
213
214 tmp = readb(rtc->regbase + RCR1);
215 seq_printf(seq, "alarm_IRQ\t: %s\n",
216 (tmp & RCR1_AIE) ? "yes" : "no");
217 seq_printf(seq, "carry_IRQ\t: %s\n",
218 (tmp & RCR1_CIE) ? "yes" : "no");
219
220 tmp = readb(rtc->regbase + RCR2);
221 seq_printf(seq, "periodic_IRQ\t: %s\n",
222 (tmp & RCR2_PEF) ? "yes" : "no");
223
224 return 0;
225}
226
227static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
228{
229 unsigned int ret = -ENOIOCTLCMD;
230
231 switch (cmd) {
232 case RTC_PIE_OFF:
233 case RTC_PIE_ON:
234 sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
235 ret = 0;
236 break;
237 case RTC_AIE_OFF:
238 case RTC_AIE_ON:
239 sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
240 ret = 0;
241 break;
242 }
243
244 return ret;
245}
246
247static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
248{
249 struct platform_device *pdev = to_platform_device(dev);
250 struct sh_rtc *rtc = platform_get_drvdata(pdev);
251 unsigned int sec128, sec2, yr, yr100, cf_bit;
252
253 do {
254 unsigned int tmp;
255
256 spin_lock_irq(&rtc->lock);
257
258 tmp = readb(rtc->regbase + RCR1);
259 tmp &= ~RCR1_CF; /* Clear CF-bit */
260 tmp |= RCR1_CIE;
261 writeb(tmp, rtc->regbase + RCR1);
262
263 sec128 = readb(rtc->regbase + R64CNT);
264
265 tm->tm_sec = BCD2BIN(readb(rtc->regbase + RSECCNT));
266 tm->tm_min = BCD2BIN(readb(rtc->regbase + RMINCNT));
267 tm->tm_hour = BCD2BIN(readb(rtc->regbase + RHRCNT));
268 tm->tm_wday = BCD2BIN(readb(rtc->regbase + RWKCNT));
269 tm->tm_mday = BCD2BIN(readb(rtc->regbase + RDAYCNT));
270 tm->tm_mon = BCD2BIN(readb(rtc->regbase + RMONCNT));
271
272#if defined(CONFIG_CPU_SH4)
273 yr = readw(rtc->regbase + RYRCNT);
274 yr100 = BCD2BIN(yr >> 8);
275 yr &= 0xff;
276#else
277 yr = readb(rtc->regbase + RYRCNT);
278 yr100 = BCD2BIN((yr == 0x99) ? 0x19 : 0x20);
279#endif
280
281 tm->tm_year = (yr100 * 100 + BCD2BIN(yr)) - 1900;
282
283 sec2 = readb(rtc->regbase + R64CNT);
284 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
285
286 spin_unlock_irq(&rtc->lock);
287 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
288
289#if RTC_BIT_INVERTED != 0
290 if ((sec128 & RTC_BIT_INVERTED))
291 tm->tm_sec--;
292#endif
293
294 dev_dbg(&dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
295 "mday=%d, mon=%d, year=%d, wday=%d\n",
296 __FUNCTION__,
297 tm->tm_sec, tm->tm_min, tm->tm_hour,
298 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
299
300 if (rtc_valid_tm(tm) < 0)
301 dev_err(dev, "invalid date\n");
302
303 return 0;
304}
305
306static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
307{
308 struct platform_device *pdev = to_platform_device(dev);
309 struct sh_rtc *rtc = platform_get_drvdata(pdev);
310 unsigned int tmp;
311 int year;
312
313 spin_lock_irq(&rtc->lock);
314
315 /* Reset pre-scaler & stop RTC */
316 tmp = readb(rtc->regbase + RCR2);
317 tmp |= RCR2_RESET;
318 writeb(tmp, rtc->regbase + RCR2);
319
320 writeb(BIN2BCD(tm->tm_sec), rtc->regbase + RSECCNT);
321 writeb(BIN2BCD(tm->tm_min), rtc->regbase + RMINCNT);
322 writeb(BIN2BCD(tm->tm_hour), rtc->regbase + RHRCNT);
323 writeb(BIN2BCD(tm->tm_wday), rtc->regbase + RWKCNT);
324 writeb(BIN2BCD(tm->tm_mday), rtc->regbase + RDAYCNT);
325 writeb(BIN2BCD(tm->tm_mon), rtc->regbase + RMONCNT);
326
327#ifdef CONFIG_CPU_SH3
328 year = tm->tm_year % 100;
329 writeb(BIN2BCD(year), rtc->regbase + RYRCNT);
330#else
331 year = (BIN2BCD((tm->tm_year + 1900) / 100) << 8) |
332 BIN2BCD(tm->tm_year % 100);
333 writew(year, rtc->regbase + RYRCNT);
334#endif
335
336 /* Start RTC */
337 tmp = readb(rtc->regbase + RCR2);
338 tmp &= ~RCR2_RESET;
339 tmp |= RCR2_RTCEN | RCR2_START;
340 writeb(tmp, rtc->regbase + RCR2);
341
342 spin_unlock_irq(&rtc->lock);
343
344 return 0;
345}
346
347static struct rtc_class_ops sh_rtc_ops = {
348 .open = sh_rtc_open,
349 .release = sh_rtc_release,
350 .ioctl = sh_rtc_ioctl,
351 .read_time = sh_rtc_read_time,
352 .set_time = sh_rtc_set_time,
353 .proc = sh_rtc_proc,
354};
355
356static int __devinit sh_rtc_probe(struct platform_device *pdev)
357{
358 struct sh_rtc *rtc;
359 struct resource *res;
360 int ret = -ENOENT;
361
362 rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
363 if (unlikely(!rtc))
364 return -ENOMEM;
365
366 spin_lock_init(&rtc->lock);
367
368 rtc->periodic_irq = platform_get_irq(pdev, 0);
369 if (unlikely(rtc->periodic_irq < 0)) {
370 dev_err(&pdev->dev, "No IRQ for period\n");
371 goto err_badres;
372 }
373
374 rtc->carry_irq = platform_get_irq(pdev, 1);
375 if (unlikely(rtc->carry_irq < 0)) {
376 dev_err(&pdev->dev, "No IRQ for carry\n");
377 goto err_badres;
378 }
379
380 rtc->alarm_irq = platform_get_irq(pdev, 2);
381 if (unlikely(rtc->alarm_irq < 0)) {
382 dev_err(&pdev->dev, "No IRQ for alarm\n");
383 goto err_badres;
384 }
385
386 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
387 if (unlikely(res == NULL)) {
388 dev_err(&pdev->dev, "No IO resource\n");
389 goto err_badres;
390 }
391
392 rtc->regsize = res->end - res->start + 1;
393
394 rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
395 if (unlikely(!rtc->res)) {
396 ret = -EBUSY;
397 goto err_badres;
398 }
399
400 rtc->regbase = (void __iomem *)rtc->res->start;
401 if (unlikely(!rtc->regbase)) {
402 ret = -EINVAL;
403 goto err_badmap;
404 }
405
406 rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
407 &sh_rtc_ops, THIS_MODULE);
408 if (IS_ERR(rtc)) {
409 ret = PTR_ERR(rtc->rtc_dev);
410 goto err_badmap;
411 }
412
413 platform_set_drvdata(pdev, rtc);
414
415 return 0;
416
417err_badmap:
418 release_resource(rtc->res);
419err_badres:
420 kfree(rtc);
421
422 return ret;
423}
424
425static int __devexit sh_rtc_remove(struct platform_device *pdev)
426{
427 struct sh_rtc *rtc = platform_get_drvdata(pdev);
428
429 if (likely(rtc->rtc_dev))
430 rtc_device_unregister(rtc->rtc_dev);
431
432 sh_rtc_setpie(&pdev->dev, 0);
433 sh_rtc_setaie(&pdev->dev, 0);
434
435 release_resource(rtc->res);
436
437 platform_set_drvdata(pdev, NULL);
438
439 kfree(rtc);
440
441 return 0;
442}
443static struct platform_driver sh_rtc_platform_driver = {
444 .driver = {
445 .name = "sh-rtc",
446 .owner = THIS_MODULE,
447 },
448 .probe = sh_rtc_probe,
449 .remove = __devexit_p(sh_rtc_remove),
450};
451
452static int __init sh_rtc_init(void)
453{
454 return platform_driver_register(&sh_rtc_platform_driver);
455}
456
457static void __exit sh_rtc_exit(void)
458{
459 platform_driver_unregister(&sh_rtc_platform_driver);
460}
461
462module_init(sh_rtc_init);
463module_exit(sh_rtc_exit);
464
465MODULE_DESCRIPTION("SuperH on-chip RTC driver");
466MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
467MODULE_LICENSE("GPL");
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 5b48ac22c9c5..261eaa442953 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -642,12 +642,17 @@ config V850E_UART_CONSOLE
642 select SERIAL_CORE_CONSOLE 642 select SERIAL_CORE_CONSOLE
643 643
644config SERIAL_SH_SCI 644config SERIAL_SH_SCI
645 tristate "SH SCI(F) serial port support" 645 tristate "SuperH SCI(F) serial port support"
646 depends on SUPERH || H8300 646 depends on SUPERH || H8300
647 select SERIAL_CORE 647 select SERIAL_CORE
648 648
649config SERIAL_SH_SCI_NR_UARTS
650 int "Maximum number of SCI(F) serial ports"
651 depends on SERIAL_SH_SCI
652 default "2"
653
649config SERIAL_SH_SCI_CONSOLE 654config SERIAL_SH_SCI_CONSOLE
650 bool "Support for console on SH SCI(F)" 655 bool "Support for console on SuperH SCI(F)"
651 depends on SERIAL_SH_SCI=y 656 depends on SERIAL_SH_SCI=y
652 select SERIAL_CORE_CONSOLE 657 select SERIAL_CORE_CONSOLE
653 658
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index cbede06cac27..f336ba6778dd 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) 4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 * 5 *
6 * Copyright (C) 2002, 2003, 2004 Paul Mundt 6 * Copyright (C) 2002 - 2006 Paul Mundt
7 * 7 *
8 * based off of the old drivers/char/sh-sci.c by: 8 * based off of the old drivers/char/sh-sci.c by:
9 * 9 *
@@ -20,10 +20,9 @@
20 20
21#undef DEBUG 21#undef DEBUG
22 22
23#include <linux/config.h>
23#include <linux/module.h> 24#include <linux/module.h>
24#include <linux/errno.h> 25#include <linux/errno.h>
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/timer.h> 26#include <linux/timer.h>
28#include <linux/interrupt.h> 27#include <linux/interrupt.h>
29#include <linux/tty.h> 28#include <linux/tty.h>
@@ -32,71 +31,77 @@
32#include <linux/major.h> 31#include <linux/major.h>
33#include <linux/string.h> 32#include <linux/string.h>
34#include <linux/sysrq.h> 33#include <linux/sysrq.h>
35#include <linux/fcntl.h>
36#include <linux/ptrace.h>
37#include <linux/ioport.h> 34#include <linux/ioport.h>
38#include <linux/mm.h> 35#include <linux/mm.h>
39#include <linux/slab.h>
40#include <linux/init.h> 36#include <linux/init.h>
41#include <linux/delay.h> 37#include <linux/delay.h>
42#include <linux/console.h> 38#include <linux/console.h>
43#include <linux/bitops.h> 39#include <linux/platform_device.h>
44#include <linux/generic_serial.h>
45 40
46#ifdef CONFIG_CPU_FREQ 41#ifdef CONFIG_CPU_FREQ
47#include <linux/notifier.h> 42#include <linux/notifier.h>
48#include <linux/cpufreq.h> 43#include <linux/cpufreq.h>
49#endif 44#endif
50 45
51#include <asm/system.h>
52#include <asm/io.h>
53#include <asm/irq.h>
54#include <asm/uaccess.h>
55
56#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 46#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
57#include <asm/clock.h> 47#include <asm/clock.h>
58#endif
59
60#ifdef CONFIG_SH_STANDARD_BIOS
61#include <asm/sh_bios.h> 48#include <asm/sh_bios.h>
49#include <asm/kgdb.h>
62#endif 50#endif
63 51
52#include <asm/sci.h>
53
64#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 54#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
65#define SUPPORT_SYSRQ 55#define SUPPORT_SYSRQ
66#endif 56#endif
67 57
68#include "sh-sci.h" 58#include "sh-sci.h"
69 59
70#ifdef CONFIG_SH_KGDB 60struct sci_port {
71#include <asm/kgdb.h> 61 struct uart_port port;
62
63 /* Port type */
64 unsigned int type;
65
66 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
67 unsigned int irqs[SCIx_NR_IRQS];
68
69 /* Port pin configuration */
70 void (*init_pins)(struct uart_port *port,
71 unsigned int cflag);
72 72
73static int kgdb_get_char(struct sci_port *port); 73 /* Port enable callback */
74static void kgdb_put_char(struct sci_port *port, char c); 74 void (*enable)(struct uart_port *port);
75static void kgdb_handle_error(struct sci_port *port); 75
76 /* Port disable callback */
77 void (*disable)(struct uart_port *port);
78
79 /* Break timer */
80 struct timer_list break_timer;
81 int break_flag;
82};
83
84#ifdef CONFIG_SH_KGDB
76static struct sci_port *kgdb_sci_port; 85static struct sci_port *kgdb_sci_port;
77#endif /* CONFIG_SH_KGDB */ 86#endif
78 87
79#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE 88#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
80static struct sci_port *serial_console_port = 0; 89static struct sci_port *serial_console_port;
81#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ 90#endif
82 91
83/* Function prototypes */ 92/* Function prototypes */
84static void sci_stop_tx(struct uart_port *port); 93static void sci_stop_tx(struct uart_port *port);
85static void sci_start_tx(struct uart_port *port);
86static void sci_start_rx(struct uart_port *port, unsigned int tty_start);
87static void sci_stop_rx(struct uart_port *port);
88static int sci_request_irq(struct sci_port *port);
89static void sci_free_irq(struct sci_port *port);
90
91static struct sci_port sci_ports[];
92static struct uart_driver sci_uart_driver;
93 94
94#define SCI_NPORTS sci_uart_driver.nr 95#define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
95 96
96#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) 97static struct sci_port sci_ports[SCI_NPORTS];
98static struct uart_driver sci_uart_driver;
97 99
98static void handle_error(struct uart_port *port) 100#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
99{ /* Clear error flags */ 101 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
102static inline void handle_error(struct uart_port *port)
103{
104 /* Clear error flags */
100 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); 105 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
101} 106}
102 107
@@ -106,8 +111,8 @@ static int get_char(struct uart_port *port)
106 unsigned short status; 111 unsigned short status;
107 int c; 112 int c;
108 113
109 local_irq_save(flags); 114 spin_lock_irqsave(&port->lock, flags);
110 do { 115 do {
111 status = sci_in(port, SCxSR); 116 status = sci_in(port, SCxSR);
112 if (status & SCxSR_ERRORS(port)) { 117 if (status & SCxSR_ERRORS(port)) {
113 handle_error(port); 118 handle_error(port);
@@ -117,38 +122,19 @@ static int get_char(struct uart_port *port)
117 c = sci_in(port, SCxRDR); 122 c = sci_in(port, SCxRDR);
118 sci_in(port, SCxSR); /* Dummy read */ 123 sci_in(port, SCxSR); /* Dummy read */
119 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); 124 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
120 local_irq_restore(flags); 125 spin_unlock_irqrestore(&port->lock, flags);
121 126
122 return c; 127 return c;
123} 128}
124
125/* Taken from sh-stub.c of GDB 4.18 */
126static const char hexchars[] = "0123456789abcdef";
127
128static __inline__ char highhex(int x)
129{
130 return hexchars[(x >> 4) & 0xf];
131}
132
133static __inline__ char lowhex(int x)
134{
135 return hexchars[x & 0xf];
136}
137
138#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ 129#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
139 130
140/* 131#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
141 * Send the packet in buffer. The host gets one chance to read it.
142 * This routine does not wait for a positive acknowledge.
143 */
144
145#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
146static void put_char(struct uart_port *port, char c) 132static void put_char(struct uart_port *port, char c)
147{ 133{
148 unsigned long flags; 134 unsigned long flags;
149 unsigned short status; 135 unsigned short status;
150 136
151 local_irq_save(flags); 137 spin_lock_irqsave(&port->lock, flags);
152 138
153 do { 139 do {
154 status = sci_in(port, SCxSR); 140 status = sci_in(port, SCxSR);
@@ -158,9 +144,11 @@ static void put_char(struct uart_port *port, char c)
158 sci_in(port, SCxSR); /* Dummy read */ 144 sci_in(port, SCxSR); /* Dummy read */
159 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); 145 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
160 146
161 local_irq_restore(flags); 147 spin_unlock_irqrestore(&port->lock, flags);
162} 148}
149#endif
163 150
151#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
164static void put_string(struct sci_port *sci_port, const char *buffer, int count) 152static void put_string(struct sci_port *sci_port, const char *buffer, int count)
165{ 153{
166 struct uart_port *port = &sci_port->port; 154 struct uart_port *port = &sci_port->port;
@@ -213,96 +201,28 @@ static void put_string(struct sci_port *sci_port, const char *buffer, int count)
213} 201}
214#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ 202#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
215 203
216
217#ifdef CONFIG_SH_KGDB 204#ifdef CONFIG_SH_KGDB
218
219/* Is the SCI ready, ie is there a char waiting? */
220static int kgdb_is_char_ready(struct sci_port *port)
221{
222 unsigned short status = sci_in(port, SCxSR);
223
224 if (status & (SCxSR_ERRORS(port) | SCxSR_BRK(port)))
225 kgdb_handle_error(port);
226
227 return (status & SCxSR_RDxF(port));
228}
229
230/* Write a char */
231static void kgdb_put_char(struct sci_port *port, char c)
232{
233 unsigned short status;
234
235 do
236 status = sci_in(port, SCxSR);
237 while (!(status & SCxSR_TDxE(port)));
238
239 sci_out(port, SCxTDR, c);
240 sci_in(port, SCxSR); /* Dummy read */
241 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
242}
243
244/* Get a char if there is one, else ret -1 */
245static int kgdb_get_char(struct sci_port *port)
246{
247 int c;
248
249 if (kgdb_is_char_ready(port) == 0)
250 c = -1;
251 else {
252 c = sci_in(port, SCxRDR);
253 sci_in(port, SCxSR); /* Dummy read */
254 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
255 }
256
257 return c;
258}
259
260/* Called from kgdbstub.c to get a character, i.e. is blocking */
261static int kgdb_sci_getchar(void) 205static int kgdb_sci_getchar(void)
262{ 206{
263 volatile int c; 207 int c;
264 208
265 /* Keep trying to read a character, this could be neater */ 209 /* Keep trying to read a character, this could be neater */
266 while ((c = kgdb_get_char(kgdb_sci_port)) < 0); 210 while ((c = get_char(kgdb_sci_port)) < 0)
211 cpu_relax();
267 212
268 return c; 213 return c;
269} 214}
270 215
271/* Called from kgdbstub.c to put a character, just a wrapper */ 216static inline void kgdb_sci_putchar(int c)
272static void kgdb_sci_putchar(int c)
273{
274
275 kgdb_put_char(kgdb_sci_port, c);
276}
277
278/* Clear any errors on the SCI */
279static void kgdb_handle_error(struct sci_port *port)
280{ 217{
281 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); /* Clear error flags */ 218 put_char(kgdb_sci_port, c);
282} 219}
283
284/* Breakpoint if there's a break sent on the serial port */
285static void kgdb_break_interrupt(int irq, void *ptr, struct pt_regs *regs)
286{
287 struct sci_port *port = ptr;
288 unsigned short status = sci_in(port, SCxSR);
289
290 if (status & SCxSR_BRK(port)) {
291
292 /* Break into the debugger if a break is detected */
293 BREAKPOINT();
294
295 /* Clear */
296 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
297 }
298}
299
300#endif /* CONFIG_SH_KGDB */ 220#endif /* CONFIG_SH_KGDB */
301 221
302#if defined(__H8300S__) 222#if defined(__H8300S__)
303enum { sci_disable, sci_enable }; 223enum { sci_disable, sci_enable };
304 224
305static void h8300_sci_enable(struct uart_port* port, unsigned int ctrl) 225static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
306{ 226{
307 volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL; 227 volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
308 int ch = (port->mapbase - SMR0) >> 3; 228 int ch = (port->mapbase - SMR0) >> 3;
@@ -314,32 +234,66 @@ static void h8300_sci_enable(struct uart_port* port, unsigned int ctrl)
314 *mstpcrl &= ~mask; 234 *mstpcrl &= ~mask;
315 } 235 }
316} 236}
237
238static inline void h8300_sci_enable(struct uart_port *port)
239{
240 h8300_sci_config(port, sci_enable);
241}
242
243static inline void h8300_sci_disable(struct uart_port *port)
244{
245 h8300_sci_config(port, sci_disable);
246}
317#endif 247#endif
318 248
319#if defined(SCI_ONLY) || defined(SCI_AND_SCIF) 249#if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
320#if defined(__H8300H__) || defined(__H8300S__) 250 defined(__H8300H__) || defined(__H8300S__)
321static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag) 251static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
322{ 252{
323 int ch = (port->mapbase - SMR0) >> 3; 253 int ch = (port->mapbase - SMR0) >> 3;
324 254
325 /* set DDR regs */ 255 /* set DDR regs */
326 H8300_GPIO_DDR(h8300_sci_pins[ch].port,h8300_sci_pins[ch].rx,H8300_GPIO_INPUT); 256 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
327 H8300_GPIO_DDR(h8300_sci_pins[ch].port,h8300_sci_pins[ch].tx,H8300_GPIO_OUTPUT); 257 h8300_sci_pins[ch].rx,
258 H8300_GPIO_INPUT);
259 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
260 h8300_sci_pins[ch].tx,
261 H8300_GPIO_OUTPUT);
262
328 /* tx mark output*/ 263 /* tx mark output*/
329 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; 264 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
330} 265}
266#else
267#define sci_init_pins_sci NULL
268#endif
269
270#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
271static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
272{
273 unsigned int fcr_val = 0;
274
275 if (cflag & CRTSCTS)
276 fcr_val |= SCFCR_MCE;
277
278 sci_out(port, SCFCR, fcr_val);
279}
280#else
281#define sci_init_pins_irda NULL
331#endif 282#endif
283
284#ifdef SCI_ONLY
285#define sci_init_pins_scif NULL
332#endif 286#endif
333 287
334#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) 288#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
335#if defined(CONFIG_CPU_SUBTYPE_SH7300) 289#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
336/* SH7300 doesn't use RTS/CTS */ 290/* SH7300 doesn't use RTS/CTS */
337static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 291static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
338{ 292{
339 sci_out(port, SCFCR, 0); 293 sci_out(port, SCFCR, 0);
340} 294}
341#elif defined(CONFIG_CPU_SH3) 295#elif defined(CONFIG_CPU_SH3)
342/* For SH7705, SH7707, SH7709, SH7709A, SH7729 */ 296/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
343static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 297static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
344{ 298{
345 unsigned int fcr_val = 0; 299 unsigned int fcr_val = 0;
@@ -366,20 +320,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
366 320
367 sci_out(port, SCFCR, fcr_val); 321 sci_out(port, SCFCR, fcr_val);
368} 322}
369
370#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
371static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
372{
373 unsigned int fcr_val = 0;
374
375 if (cflag & CRTSCTS)
376 fcr_val |= SCFCR_MCE;
377
378 sci_out(port, SCFCR, fcr_val);
379}
380#endif
381#else 323#else
382
383/* For SH7750 */ 324/* For SH7750 */
384static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 325static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
385{ 326{
@@ -388,7 +329,9 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
388 if (cflag & CRTSCTS) { 329 if (cflag & CRTSCTS) {
389 fcr_val |= SCFCR_MCE; 330 fcr_val |= SCFCR_MCE;
390 } else { 331 } else {
391#ifdef CONFIG_CPU_SUBTYPE_SH7780 332#ifdef CONFIG_CPU_SUBTYPE_SH7343
333 /* Nothing */
334#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
392 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ 335 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
393#else 336#else
394 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */ 337 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
@@ -396,10 +339,41 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
396 } 339 }
397 sci_out(port, SCFCR, fcr_val); 340 sci_out(port, SCFCR, fcr_val);
398} 341}
342#endif
343
344#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
345static inline int scif_txroom(struct uart_port *port)
346{
347 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
348}
349
350static inline int scif_rxroom(struct uart_port *port)
351{
352 return sci_in(port, SCRFDR) & 0x7f;
353}
354#else
355static inline int scif_txroom(struct uart_port *port)
356{
357 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
358}
399 359
360static inline int scif_rxroom(struct uart_port *port)
361{
362 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
363}
400#endif 364#endif
401#endif /* SCIF_ONLY || SCI_AND_SCIF */ 365#endif /* SCIF_ONLY || SCI_AND_SCIF */
402 366
367static inline int sci_txroom(struct uart_port *port)
368{
369 return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
370}
371
372static inline int sci_rxroom(struct uart_port *port)
373{
374 return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
375}
376
403/* ********************************************************************** * 377/* ********************************************************************** *
404 * the interrupt related routines * 378 * the interrupt related routines *
405 * ********************************************************************** */ 379 * ********************************************************************** */
@@ -408,14 +382,12 @@ static void sci_transmit_chars(struct uart_port *port)
408{ 382{
409 struct circ_buf *xmit = &port->info->xmit; 383 struct circ_buf *xmit = &port->info->xmit;
410 unsigned int stopped = uart_tx_stopped(port); 384 unsigned int stopped = uart_tx_stopped(port);
411 unsigned long flags;
412 unsigned short status; 385 unsigned short status;
413 unsigned short ctrl; 386 unsigned short ctrl;
414 int count, txroom; 387 int count;
415 388
416 status = sci_in(port, SCxSR); 389 status = sci_in(port, SCxSR);
417 if (!(status & SCxSR_TDxE(port))) { 390 if (!(status & SCxSR_TDxE(port))) {
418 local_irq_save(flags);
419 ctrl = sci_in(port, SCSCR); 391 ctrl = sci_in(port, SCSCR);
420 if (uart_circ_empty(xmit)) { 392 if (uart_circ_empty(xmit)) {
421 ctrl &= ~SCI_CTRL_FLAGS_TIE; 393 ctrl &= ~SCI_CTRL_FLAGS_TIE;
@@ -423,25 +395,15 @@ static void sci_transmit_chars(struct uart_port *port)
423 ctrl |= SCI_CTRL_FLAGS_TIE; 395 ctrl |= SCI_CTRL_FLAGS_TIE;
424 } 396 }
425 sci_out(port, SCSCR, ctrl); 397 sci_out(port, SCSCR, ctrl);
426 local_irq_restore(flags);
427 return; 398 return;
428 } 399 }
429 400
430#if !defined(SCI_ONLY) 401#ifndef SCI_ONLY
431 if (port->type == PORT_SCIF) { 402 if (port->type == PORT_SCIF)
432#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) 403 count = scif_txroom(port);
433 txroom = SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f); 404 else
434#else
435 txroom = SCIF_TXROOM_MAX - (sci_in(port, SCFDR)>>8);
436#endif
437 } else {
438 txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0;
439 }
440#else
441 txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0;
442#endif 405#endif
443 406 count = sci_txroom(port);
444 count = txroom;
445 407
446 do { 408 do {
447 unsigned char c; 409 unsigned char c;
@@ -468,7 +430,6 @@ static void sci_transmit_chars(struct uart_port *port)
468 if (uart_circ_empty(xmit)) { 430 if (uart_circ_empty(xmit)) {
469 sci_stop_tx(port); 431 sci_stop_tx(port);
470 } else { 432 } else {
471 local_irq_save(flags);
472 ctrl = sci_in(port, SCSCR); 433 ctrl = sci_in(port, SCSCR);
473 434
474#if !defined(SCI_ONLY) 435#if !defined(SCI_ONLY)
@@ -480,7 +441,6 @@ static void sci_transmit_chars(struct uart_port *port)
480 441
481 ctrl |= SCI_CTRL_FLAGS_TIE; 442 ctrl |= SCI_CTRL_FLAGS_TIE;
482 sci_out(port, SCSCR, ctrl); 443 sci_out(port, SCSCR, ctrl);
483 local_irq_restore(flags);
484 } 444 }
485} 445}
486 446
@@ -490,6 +450,7 @@ static void sci_transmit_chars(struct uart_port *port)
490static inline void sci_receive_chars(struct uart_port *port, 450static inline void sci_receive_chars(struct uart_port *port,
491 struct pt_regs *regs) 451 struct pt_regs *regs)
492{ 452{
453 struct sci_port *sci_port = (struct sci_port *)port;
493 struct tty_struct *tty = port->info->tty; 454 struct tty_struct *tty = port->info->tty;
494 int i, count, copied = 0; 455 int i, count, copied = 0;
495 unsigned short status; 456 unsigned short status;
@@ -501,18 +462,11 @@ static inline void sci_receive_chars(struct uart_port *port,
501 462
502 while (1) { 463 while (1) {
503#if !defined(SCI_ONLY) 464#if !defined(SCI_ONLY)
504 if (port->type == PORT_SCIF) { 465 if (port->type == PORT_SCIF)
505#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) 466 count = scif_rxroom(port);
506 count = sci_in(port, SCRFDR) & 0x7f; 467 else
507#else
508 count = sci_in(port, SCFDR)&SCIF_RFDC_MASK ;
509#endif
510 } else {
511 count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0;
512 }
513#else
514 count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0;
515#endif 468#endif
469 count = sci_rxroom(port);
516 470
517 /* Don't copy more bytes than there is room for in the buffer */ 471 /* Don't copy more bytes than there is room for in the buffer */
518 count = tty_buffer_request_room(tty, count); 472 count = tty_buffer_request_room(tty, count);
@@ -523,11 +477,10 @@ static inline void sci_receive_chars(struct uart_port *port,
523 477
524 if (port->type == PORT_SCI) { 478 if (port->type == PORT_SCI) {
525 char c = sci_in(port, SCxRDR); 479 char c = sci_in(port, SCxRDR);
526 if(((struct sci_port *)port)->break_flag 480 if (uart_handle_sysrq_char(port, c, regs) || sci_port->break_flag)
527 || uart_handle_sysrq_char(port, c, regs)) {
528 count = 0; 481 count = 0;
529 } else { 482 else {
530 tty_insert_flip_char(tty, c, TTY_NORMAL); 483 tty_insert_flip_char(tty, c, TTY_NORMAL);
531 } 484 }
532 } else { 485 } else {
533 for (i=0; i<count; i++) { 486 for (i=0; i<count; i++) {
@@ -535,15 +488,17 @@ static inline void sci_receive_chars(struct uart_port *port,
535 status = sci_in(port, SCxSR); 488 status = sci_in(port, SCxSR);
536#if defined(CONFIG_CPU_SH3) 489#if defined(CONFIG_CPU_SH3)
537 /* Skip "chars" during break */ 490 /* Skip "chars" during break */
538 if (((struct sci_port *)port)->break_flag) { 491 if (sci_port->break_flag) {
539 if ((c == 0) && 492 if ((c == 0) &&
540 (status & SCxSR_FER(port))) { 493 (status & SCxSR_FER(port))) {
541 count--; i--; 494 count--; i--;
542 continue; 495 continue;
543 } 496 }
497
544 /* Nonzero => end-of-break */ 498 /* Nonzero => end-of-break */
545 pr_debug("scif: debounce<%02x>\n", c); 499 pr_debug("scif: debounce<%02x>\n", c);
546 ((struct sci_port *)port)->break_flag = 0; 500 sci_port->break_flag = 0;
501
547 if (STEPFN(c)) { 502 if (STEPFN(c)) {
548 count--; i--; 503 count--; i--;
549 continue; 504 continue;
@@ -600,15 +555,17 @@ static void sci_schedule_break_timer(struct sci_port *port)
600/* Ensure that two consecutive samples find the break over. */ 555/* Ensure that two consecutive samples find the break over. */
601static void sci_break_timer(unsigned long data) 556static void sci_break_timer(unsigned long data)
602{ 557{
603 struct sci_port * port = (struct sci_port *)data; 558 struct sci_port *port = (struct sci_port *)data;
604 if(sci_rxd_in(&port->port) == 0) { 559
560 if (sci_rxd_in(&port->port) == 0) {
605 port->break_flag = 1; 561 port->break_flag = 1;
606 sci_schedule_break_timer(port); 562 sci_schedule_break_timer(port);
607 } else if(port->break_flag == 1){ 563 } else if (port->break_flag == 1) {
608 /* break is over. */ 564 /* break is over. */
609 port->break_flag = 2; 565 port->break_flag = 2;
610 sci_schedule_break_timer(port); 566 sci_schedule_break_timer(port);
611 } else port->break_flag = 0; 567 } else
568 port->break_flag = 0;
612} 569}
613 570
614static inline int sci_handle_errors(struct uart_port *port) 571static inline int sci_handle_errors(struct uart_port *port)
@@ -617,40 +574,41 @@ static inline int sci_handle_errors(struct uart_port *port)
617 unsigned short status = sci_in(port, SCxSR); 574 unsigned short status = sci_in(port, SCxSR);
618 struct tty_struct *tty = port->info->tty; 575 struct tty_struct *tty = port->info->tty;
619 576
620 if (status&SCxSR_ORER(port)) { 577 if (status & SCxSR_ORER(port)) {
621 /* overrun error */ 578 /* overrun error */
622 if(tty_insert_flip_char(tty, 0, TTY_OVERRUN)) 579 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
623 copied++; 580 copied++;
624 pr_debug("sci: overrun error\n"); 581 pr_debug("sci: overrun error\n");
625 } 582 }
626 583
627 if (status&SCxSR_FER(port)) { 584 if (status & SCxSR_FER(port)) {
628 if (sci_rxd_in(port) == 0) { 585 if (sci_rxd_in(port) == 0) {
629 /* Notify of BREAK */ 586 /* Notify of BREAK */
630 struct sci_port * sci_port = (struct sci_port *)port; 587 struct sci_port *sci_port = (struct sci_port *)port;
631 if(!sci_port->break_flag) { 588
632 sci_port->break_flag = 1; 589 if (!sci_port->break_flag) {
633 sci_schedule_break_timer((struct sci_port *)port); 590 sci_port->break_flag = 1;
591 sci_schedule_break_timer(sci_port);
592
634 /* Do sysrq handling. */ 593 /* Do sysrq handling. */
635 if(uart_handle_break(port)) 594 if (uart_handle_break(port))
636 return 0; 595 return 0;
637 pr_debug("sci: BREAK detected\n"); 596 pr_debug("sci: BREAK detected\n");
638 if(tty_insert_flip_char(tty, 0, TTY_BREAK)) 597 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
639 copied++; 598 copied++;
640 } 599 }
641 } 600 } else {
642 else {
643 /* frame error */ 601 /* frame error */
644 if(tty_insert_flip_char(tty, 0, TTY_FRAME)) 602 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
645 copied++; 603 copied++;
646 pr_debug("sci: frame error\n"); 604 pr_debug("sci: frame error\n");
647 } 605 }
648 } 606 }
649 607
650 if (status&SCxSR_PER(port)) { 608 if (status & SCxSR_PER(port)) {
651 if(tty_insert_flip_char(tty, 0, TTY_PARITY))
652 copied++;
653 /* parity error */ 609 /* parity error */
610 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
611 copied++;
654 pr_debug("sci: parity error\n"); 612 pr_debug("sci: parity error\n");
655 } 613 }
656 614
@@ -673,7 +631,7 @@ static inline int sci_handle_breaks(struct uart_port *port)
673 s->break_flag = 1; 631 s->break_flag = 1;
674#endif 632#endif
675 /* Notify of BREAK */ 633 /* Notify of BREAK */
676 if(tty_insert_flip_char(tty, 0, TTY_BREAK)) 634 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
677 copied++; 635 copied++;
678 pr_debug("sci: BREAK detected\n"); 636 pr_debug("sci: BREAK detected\n");
679 } 637 }
@@ -682,7 +640,7 @@ static inline int sci_handle_breaks(struct uart_port *port)
682 /* XXX: Handle SCIF overrun error */ 640 /* XXX: Handle SCIF overrun error */
683 if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) { 641 if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
684 sci_out(port, SCLSR, 0); 642 sci_out(port, SCLSR, 0);
685 if(tty_insert_flip_char(tty, 0, TTY_OVERRUN)) { 643 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
686 copied++; 644 copied++;
687 pr_debug("sci: overrun error\n"); 645 pr_debug("sci: overrun error\n");
688 } 646 }
@@ -691,13 +649,12 @@ static inline int sci_handle_breaks(struct uart_port *port)
691 649
692 if (copied) 650 if (copied)
693 tty_flip_buffer_push(tty); 651 tty_flip_buffer_push(tty);
652
694 return copied; 653 return copied;
695} 654}
696 655
697static irqreturn_t sci_rx_interrupt(int irq, void *ptr, struct pt_regs *regs) 656static irqreturn_t sci_rx_interrupt(int irq, void *port, struct pt_regs *regs)
698{ 657{
699 struct uart_port *port = ptr;
700
701 /* I think sci_receive_chars has to be called irrespective 658 /* I think sci_receive_chars has to be called irrespective
702 * of whether the I_IXOFF is set, otherwise, how is the interrupt 659 * of whether the I_IXOFF is set, otherwise, how is the interrupt
703 * to be disabled? 660 * to be disabled?
@@ -711,7 +668,9 @@ static irqreturn_t sci_tx_interrupt(int irq, void *ptr, struct pt_regs *regs)
711{ 668{
712 struct uart_port *port = ptr; 669 struct uart_port *port = ptr;
713 670
671 spin_lock_irq(&port->lock);
714 sci_transmit_chars(port); 672 sci_transmit_chars(port);
673 spin_unlock_irq(&port->lock);
715 674
716 return IRQ_HANDLED; 675 return IRQ_HANDLED;
717} 676}
@@ -755,6 +714,12 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs)
755 714
756 /* Handle BREAKs */ 715 /* Handle BREAKs */
757 sci_handle_breaks(port); 716 sci_handle_breaks(port);
717
718#ifdef CONFIG_SH_KGDB
719 /* Break into the debugger if a break is detected */
720 BREAKPOINT();
721#endif
722
758 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port)); 723 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
759 724
760 return IRQ_HANDLED; 725 return IRQ_HANDLED;
@@ -769,16 +734,16 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr, struct pt_regs *regs)
769 scr_status = sci_in(port,SCSCR); 734 scr_status = sci_in(port,SCSCR);
770 735
771 /* Tx Interrupt */ 736 /* Tx Interrupt */
772 if ((ssr_status&0x0020) && (scr_status&0x0080)) 737 if ((ssr_status & 0x0020) && (scr_status & 0x0080))
773 sci_tx_interrupt(irq, ptr, regs); 738 sci_tx_interrupt(irq, ptr, regs);
774 /* Rx Interrupt */ 739 /* Rx Interrupt */
775 if ((ssr_status&0x0002) && (scr_status&0x0040)) 740 if ((ssr_status & 0x0002) && (scr_status & 0x0040))
776 sci_rx_interrupt(irq, ptr, regs); 741 sci_rx_interrupt(irq, ptr, regs);
777 /* Error Interrupt */ 742 /* Error Interrupt */
778 if ((ssr_status&0x0080) && (scr_status&0x0400)) 743 if ((ssr_status & 0x0080) && (scr_status & 0x0400))
779 sci_er_interrupt(irq, ptr, regs); 744 sci_er_interrupt(irq, ptr, regs);
780 /* Break Interrupt */ 745 /* Break Interrupt */
781 if ((ssr_status&0x0010) && (scr_status&0x0200)) 746 if ((ssr_status & 0x0010) && (scr_status & 0x0200))
782 sci_br_interrupt(irq, ptr, regs); 747 sci_br_interrupt(irq, ptr, regs);
783 748
784 return IRQ_HANDLED; 749 return IRQ_HANDLED;
@@ -789,7 +754,8 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr, struct pt_regs *regs)
789 * Here we define a transistion notifier so that we can update all of our 754 * Here we define a transistion notifier so that we can update all of our
790 * ports' baud rate when the peripheral clock changes. 755 * ports' baud rate when the peripheral clock changes.
791 */ 756 */
792static int sci_notifier(struct notifier_block *self, unsigned long phase, void *p) 757static int sci_notifier(struct notifier_block *self,
758 unsigned long phase, void *p)
793{ 759{
794 struct cpufreq_freqs *freqs = p; 760 struct cpufreq_freqs *freqs = p;
795 int i; 761 int i;
@@ -816,8 +782,9 @@ static int sci_notifier(struct notifier_block *self, unsigned long phase, void *
816 clk_put(clk); 782 clk_put(clk);
817 } 783 }
818 784
819 printk("%s: got a postchange notification for cpu %d (old %d, new %d)\n", 785 printk(KERN_INFO "%s: got a postchange notification "
820 __FUNCTION__, freqs->cpu, freqs->old, freqs->new); 786 "for cpu %d (old %d, new %d)\n",
787 __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
821 } 788 }
822 789
823 return NOTIFY_OK; 790 return NOTIFY_OK;
@@ -841,8 +808,9 @@ static int sci_request_irq(struct sci_port *port)
841 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n"); 808 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
842 return -ENODEV; 809 return -ENODEV;
843 } 810 }
844 if (request_irq(port->irqs[0], sci_mpxed_interrupt, IRQF_DISABLED, 811
845 "sci", port)) { 812 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
813 SA_INTERRUPT, "sci", port)) {
846 printk(KERN_ERR "sci: Cannot allocate irq.\n"); 814 printk(KERN_ERR "sci: Cannot allocate irq.\n");
847 return -ENODEV; 815 return -ENODEV;
848 } 816 }
@@ -850,8 +818,8 @@ static int sci_request_irq(struct sci_port *port)
850 for (i = 0; i < ARRAY_SIZE(handlers); i++) { 818 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
851 if (!port->irqs[i]) 819 if (!port->irqs[i])
852 continue; 820 continue;
853 if (request_irq(port->irqs[i], handlers[i], IRQF_DISABLED, 821 if (request_irq(port->irqs[i], handlers[i],
854 desc[i], port)) { 822 SA_INTERRUPT, desc[i], port)) {
855 printk(KERN_ERR "sci: Cannot allocate irq.\n"); 823 printk(KERN_ERR "sci: Cannot allocate irq.\n");
856 return -ENODEV; 824 return -ENODEV;
857 } 825 }
@@ -903,50 +871,42 @@ static unsigned int sci_get_mctrl(struct uart_port *port)
903 871
904static void sci_start_tx(struct uart_port *port) 872static void sci_start_tx(struct uart_port *port)
905{ 873{
906 struct sci_port *s = &sci_ports[port->line]; 874 unsigned short ctrl;
907 875
908 disable_irq(s->irqs[SCIx_TXI_IRQ]); 876 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
909 sci_transmit_chars(port); 877 ctrl = sci_in(port, SCSCR);
910 enable_irq(s->irqs[SCIx_TXI_IRQ]); 878 ctrl |= SCI_CTRL_FLAGS_TIE;
879 sci_out(port, SCSCR, ctrl);
911} 880}
912 881
913static void sci_stop_tx(struct uart_port *port) 882static void sci_stop_tx(struct uart_port *port)
914{ 883{
915 unsigned long flags;
916 unsigned short ctrl; 884 unsigned short ctrl;
917 885
918 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ 886 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
919 local_irq_save(flags);
920 ctrl = sci_in(port, SCSCR); 887 ctrl = sci_in(port, SCSCR);
921 ctrl &= ~SCI_CTRL_FLAGS_TIE; 888 ctrl &= ~SCI_CTRL_FLAGS_TIE;
922 sci_out(port, SCSCR, ctrl); 889 sci_out(port, SCSCR, ctrl);
923 local_irq_restore(flags);
924} 890}
925 891
926static void sci_start_rx(struct uart_port *port, unsigned int tty_start) 892static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
927{ 893{
928 unsigned long flags;
929 unsigned short ctrl; 894 unsigned short ctrl;
930 895
931 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ 896 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
932 local_irq_save(flags);
933 ctrl = sci_in(port, SCSCR); 897 ctrl = sci_in(port, SCSCR);
934 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE; 898 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
935 sci_out(port, SCSCR, ctrl); 899 sci_out(port, SCSCR, ctrl);
936 local_irq_restore(flags);
937} 900}
938 901
939static void sci_stop_rx(struct uart_port *port) 902static void sci_stop_rx(struct uart_port *port)
940{ 903{
941 unsigned long flags;
942 unsigned short ctrl; 904 unsigned short ctrl;
943 905
944 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ 906 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
945 local_irq_save(flags);
946 ctrl = sci_in(port, SCSCR); 907 ctrl = sci_in(port, SCSCR);
947 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); 908 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
948 sci_out(port, SCSCR, ctrl); 909 sci_out(port, SCSCR, ctrl);
949 local_irq_restore(flags);
950} 910}
951 911
952static void sci_enable_ms(struct uart_port *port) 912static void sci_enable_ms(struct uart_port *port)
@@ -963,9 +923,8 @@ static int sci_startup(struct uart_port *port)
963{ 923{
964 struct sci_port *s = &sci_ports[port->line]; 924 struct sci_port *s = &sci_ports[port->line];
965 925
966#if defined(__H8300S__) 926 if (s->enable)
967 h8300_sci_enable(port, sci_enable); 927 s->enable(port);
968#endif
969 928
970 sci_request_irq(s); 929 sci_request_irq(s);
971 sci_start_tx(port); 930 sci_start_tx(port);
@@ -982,9 +941,8 @@ static void sci_shutdown(struct uart_port *port)
982 sci_stop_tx(port); 941 sci_stop_tx(port);
983 sci_free_irq(s); 942 sci_free_irq(s);
984 943
985#if defined(__H8300S__) 944 if (s->disable)
986 h8300_sci_enable(port, sci_disable); 945 s->disable(port);
987#endif
988} 946}
989 947
990static void sci_set_termios(struct uart_port *port, struct termios *termios, 948static void sci_set_termios(struct uart_port *port, struct termios *termios,
@@ -997,6 +955,23 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios,
997 955
998 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 956 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
999 957
958 switch (baud) {
959 case 0:
960 t = -1;
961 break;
962 default:
963 {
964#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
965 struct clk *clk = clk_get("module_clk");
966 t = SCBRR_VALUE(baud, clk_get_rate(clk));
967 clk_put(clk);
968#else
969 t = SCBRR_VALUE(baud);
970#endif
971 }
972 break;
973 }
974
1000 spin_lock_irqsave(&port->lock, flags); 975 spin_lock_irqsave(&port->lock, flags);
1001 976
1002 do { 977 do {
@@ -1006,9 +981,8 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios,
1006 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ 981 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1007 982
1008#if !defined(SCI_ONLY) 983#if !defined(SCI_ONLY)
1009 if (port->type == PORT_SCIF) { 984 if (port->type == PORT_SCIF)
1010 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); 985 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1011 }
1012#endif 986#endif
1013 987
1014 smr_val = sci_in(port, SCSMR) & 3; 988 smr_val = sci_in(port, SCSMR) & 3;
@@ -1025,23 +999,6 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios,
1025 999
1026 sci_out(port, SCSMR, smr_val); 1000 sci_out(port, SCSMR, smr_val);
1027 1001
1028 switch (baud) {
1029 case 0:
1030 t = -1;
1031 break;
1032 default:
1033 {
1034#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1035 struct clk *clk = clk_get("module_clk");
1036 t = SCBRR_VALUE(baud, clk_get_rate(clk));
1037 clk_put(clk);
1038#else
1039 t = SCBRR_VALUE(baud);
1040#endif
1041 }
1042 break;
1043 }
1044
1045 if (t > 0) { 1002 if (t > 0) {
1046 if(t >= 256) { 1003 if(t >= 256) {
1047 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); 1004 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
@@ -1092,11 +1049,23 @@ static void sci_config_port(struct uart_port *port, int flags)
1092 1049
1093 port->type = s->type; 1050 port->type = s->type;
1094 1051
1052 switch (port->type) {
1053 case PORT_SCI:
1054 s->init_pins = sci_init_pins_sci;
1055 break;
1056 case PORT_SCIF:
1057 s->init_pins = sci_init_pins_scif;
1058 break;
1059 case PORT_IRDA:
1060 s->init_pins = sci_init_pins_irda;
1061 break;
1062 }
1063
1095#if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) 1064#if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1096 if (port->mapbase == 0) 1065 if (port->mapbase == 0)
1097 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF"); 1066 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1098 1067
1099 port->membase = (void *)port->mapbase; 1068 port->membase = (void __iomem *)port->mapbase;
1100#endif 1069#endif
1101} 1070}
1102 1071
@@ -1132,412 +1101,61 @@ static struct uart_ops sci_uart_ops = {
1132 .verify_port = sci_verify_port, 1101 .verify_port = sci_verify_port,
1133}; 1102};
1134 1103
1135static struct sci_port sci_ports[] = { 1104static void __init sci_init_ports(void)
1136#if defined(CONFIG_CPU_SUBTYPE_SH7708) 1105{
1137 { 1106 static int first = 1;
1138 .port = { 1107 int i;
1139 .membase = (void *)0xfffffe80, 1108
1140 .mapbase = 0xfffffe80, 1109 if (!first)
1141 .iotype = UPIO_MEM, 1110 return;
1142 .irq = 25, 1111
1143 .ops = &sci_uart_ops, 1112 first = 0;
1144 .flags = UPF_BOOT_AUTOCONF, 1113
1145 .line = 0, 1114 for (i = 0; i < SCI_NPORTS; i++) {
1146 }, 1115 sci_ports[i].port.ops = &sci_uart_ops;
1147 .type = PORT_SCI, 1116 sci_ports[i].port.iotype = UPIO_MEM;
1148 .irqs = SCI_IRQS, 1117 sci_ports[i].port.line = i;
1149 }, 1118 sci_ports[i].port.fifosize = 1;
1150#elif defined(CONFIG_CPU_SUBTYPE_SH7705) 1119
1151 { 1120#if defined(__H8300H__) || defined(__H8300S__)
1152 .port = { 1121#ifdef __H8300S__
1153 .membase = (void *)SCIF0, 1122 sci_ports[i].enable = h8300_sci_enable;
1154 .mapbase = SCIF0, 1123 sci_ports[i].disable = h8300_sci_disable;
1155 .iotype = UPIO_MEM, 1124#endif
1156 .irq = 55, 1125 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1157 .ops = &sci_uart_ops, 1126#elif defined(CONFIG_SUPERH64)
1158 .flags = UPF_BOOT_AUTOCONF, 1127 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1159 .line = 0,
1160 },
1161 .type = PORT_SCIF,
1162 .irqs = SH3_IRDA_IRQS,
1163 .init_pins = sci_init_pins_scif,
1164 },
1165 {
1166 .port = {
1167 .membase = (void *)SCIF2,
1168 .mapbase = SCIF2,
1169 .iotype = UPIO_MEM,
1170 .irq = 59,
1171 .ops = &sci_uart_ops,
1172 .flags = UPF_BOOT_AUTOCONF,
1173 .line = 1,
1174 },
1175 .type = PORT_SCIF,
1176 .irqs = SH3_SCIF_IRQS,
1177 .init_pins = sci_init_pins_scif,
1178 }
1179#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
1180 {
1181 .port = {
1182 .membase = (void *)0xfffffe80,
1183 .mapbase = 0xfffffe80,
1184 .iotype = UPIO_MEM,
1185 .irq = 25,
1186 .ops = &sci_uart_ops,
1187 .flags = UPF_BOOT_AUTOCONF,
1188 .line = 0,
1189 },
1190 .type = PORT_SCI,
1191 .irqs = SCI_IRQS,
1192 },
1193 {
1194 .port = {
1195 .membase = (void *)0xa4000150,
1196 .mapbase = 0xa4000150,
1197 .iotype = UPIO_MEM,
1198 .irq = 59,
1199 .ops = &sci_uart_ops,
1200 .flags = UPF_BOOT_AUTOCONF,
1201 .line = 1,
1202 },
1203 .type = PORT_SCIF,
1204 .irqs = SH3_SCIF_IRQS,
1205 .init_pins = sci_init_pins_scif,
1206 },
1207 {
1208 .port = {
1209 .membase = (void *)0xa4000140,
1210 .mapbase = 0xa4000140,
1211 .iotype = UPIO_MEM,
1212 .irq = 55,
1213 .ops = &sci_uart_ops,
1214 .flags = UPF_BOOT_AUTOCONF,
1215 .line = 2,
1216 },
1217 .type = PORT_IRDA,
1218 .irqs = SH3_IRDA_IRQS,
1219 .init_pins = sci_init_pins_irda,
1220 }
1221#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
1222 {
1223 .port = {
1224 .membase = (void *)0xA4430000,
1225 .mapbase = 0xA4430000,
1226 .iotype = UPIO_MEM,
1227 .irq = 25,
1228 .ops = &sci_uart_ops,
1229 .flags = UPF_BOOT_AUTOCONF,
1230 .line = 0,
1231 },
1232 .type = PORT_SCIF,
1233 .irqs = SH7300_SCIF0_IRQS,
1234 .init_pins = sci_init_pins_scif,
1235 },
1236#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
1237 {
1238 .port = {
1239 .membase = (void *)0xffe00000,
1240 .mapbase = 0xffe00000,
1241 .iotype = UPIO_MEM,
1242 .irq = 25,
1243 .ops = &sci_uart_ops,
1244 .flags = UPF_BOOT_AUTOCONF,
1245 .line = 0,
1246 },
1247 .type = PORT_SCIF,
1248 .irqs = SH73180_SCIF_IRQS,
1249 .init_pins = sci_init_pins_scif,
1250 },
1251#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
1252 {
1253 .port = {
1254 .membase = (void *)0xffe80000,
1255 .mapbase = 0xffe80000,
1256 .iotype = UPIO_MEM,
1257 .irq = 43,
1258 .ops = &sci_uart_ops,
1259 .flags = UPF_BOOT_AUTOCONF,
1260 .line = 0,
1261 },
1262 .type = PORT_SCIF,
1263 .irqs = SH4_SCIF_IRQS,
1264 .init_pins = sci_init_pins_scif,
1265 },
1266#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751)
1267 {
1268 .port = {
1269 .membase = (void *)0xffe00000,
1270 .mapbase = 0xffe00000,
1271 .iotype = UPIO_MEM,
1272 .irq = 25,
1273 .ops = &sci_uart_ops,
1274 .flags = UPF_BOOT_AUTOCONF,
1275 .line = 0,
1276 },
1277 .type = PORT_SCI,
1278 .irqs = SCI_IRQS,
1279 },
1280 {
1281 .port = {
1282 .membase = (void *)0xffe80000,
1283 .mapbase = 0xffe80000,
1284 .iotype = UPIO_MEM,
1285 .irq = 43,
1286 .ops = &sci_uart_ops,
1287 .flags = UPF_BOOT_AUTOCONF,
1288 .line = 1,
1289 },
1290 .type = PORT_SCIF,
1291 .irqs = SH4_SCIF_IRQS,
1292 .init_pins = sci_init_pins_scif,
1293 },
1294#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
1295 {
1296 .port = {
1297 .membase = (void *)0xfe600000,
1298 .mapbase = 0xfe600000,
1299 .iotype = UPIO_MEM,
1300 .irq = 55,
1301 .ops = &sci_uart_ops,
1302 .flags = UPF_BOOT_AUTOCONF,
1303 .line = 0,
1304 },
1305 .type = PORT_SCIF,
1306 .irqs = SH7760_SCIF0_IRQS,
1307 .init_pins = sci_init_pins_scif,
1308 },
1309 {
1310 .port = {
1311 .membase = (void *)0xfe610000,
1312 .mapbase = 0xfe610000,
1313 .iotype = UPIO_MEM,
1314 .irq = 75,
1315 .ops = &sci_uart_ops,
1316 .flags = UPF_BOOT_AUTOCONF,
1317 .line = 1,
1318 },
1319 .type = PORT_SCIF,
1320 .irqs = SH7760_SCIF1_IRQS,
1321 .init_pins = sci_init_pins_scif,
1322 },
1323 {
1324 .port = {
1325 .membase = (void *)0xfe620000,
1326 .mapbase = 0xfe620000,
1327 .iotype = UPIO_MEM,
1328 .irq = 79,
1329 .ops = &sci_uart_ops,
1330 .flags = UPF_BOOT_AUTOCONF,
1331 .line = 2,
1332 },
1333 .type = PORT_SCIF,
1334 .irqs = SH7760_SCIF2_IRQS,
1335 .init_pins = sci_init_pins_scif,
1336 },
1337#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
1338 {
1339 .port = {
1340 .membase = (void *)0xffe00000,
1341 .mapbase = 0xffe00000,
1342 .iotype = UPIO_MEM,
1343 .irq = 26,
1344 .ops = &sci_uart_ops,
1345 .flags = UPF_BOOT_AUTOCONF,
1346 .line = 0,
1347 },
1348 .type = PORT_SCIF,
1349 .irqs = STB1_SCIF1_IRQS,
1350 .init_pins = sci_init_pins_scif,
1351 },
1352 {
1353 .port = {
1354 .membase = (void *)0xffe80000,
1355 .mapbase = 0xffe80000,
1356 .iotype = UPIO_MEM,
1357 .irq = 43,
1358 .ops = &sci_uart_ops,
1359 .flags = UPF_BOOT_AUTOCONF,
1360 .line = 1,
1361 },
1362 .type = PORT_SCIF,
1363 .irqs = SH4_SCIF_IRQS,
1364 .init_pins = sci_init_pins_scif,
1365 },
1366#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1367 {
1368 .port = {
1369 .iotype = UPIO_MEM,
1370 .irq = 42,
1371 .ops = &sci_uart_ops,
1372 .flags = UPF_BOOT_AUTOCONF,
1373 .line = 0,
1374 },
1375 .type = PORT_SCIF,
1376 .irqs = SH5_SCIF_IRQS,
1377 .init_pins = sci_init_pins_scif,
1378 },
1379#elif defined(CONFIG_H83007) || defined(CONFIG_H83068)
1380 {
1381 .port = {
1382 .membase = (void *)0x00ffffb0,
1383 .mapbase = 0x00ffffb0,
1384 .iotype = UPIO_MEM,
1385 .irq = 54,
1386 .ops = &sci_uart_ops,
1387 .flags = UPF_BOOT_AUTOCONF,
1388 .line = 0,
1389 },
1390 .type = PORT_SCI,
1391 .irqs = H8300H_SCI_IRQS0,
1392 .init_pins = sci_init_pins_sci,
1393 },
1394 {
1395 .port = {
1396 .membase = (void *)0x00ffffb8,
1397 .mapbase = 0x00ffffb8,
1398 .iotype = UPIO_MEM,
1399 .irq = 58,
1400 .ops = &sci_uart_ops,
1401 .flags = UPF_BOOT_AUTOCONF,
1402 .line = 1,
1403 },
1404 .type = PORT_SCI,
1405 .irqs = H8300H_SCI_IRQS1,
1406 .init_pins = sci_init_pins_sci,
1407 },
1408 {
1409 .port = {
1410 .membase = (void *)0x00ffffc0,
1411 .mapbase = 0x00ffffc0,
1412 .iotype = UPIO_MEM,
1413 .irq = 62,
1414 .ops = &sci_uart_ops,
1415 .flags = UPF_BOOT_AUTOCONF,
1416 .line = 2,
1417 },
1418 .type = PORT_SCI,
1419 .irqs = H8300H_SCI_IRQS2,
1420 .init_pins = sci_init_pins_sci,
1421 },
1422#elif defined(CONFIG_H8S2678)
1423 {
1424 .port = {
1425 .membase = (void *)0x00ffff78,
1426 .mapbase = 0x00ffff78,
1427 .iotype = UPIO_MEM,
1428 .irq = 90,
1429 .ops = &sci_uart_ops,
1430 .flags = UPF_BOOT_AUTOCONF,
1431 .line = 0,
1432 },
1433 .type = PORT_SCI,
1434 .irqs = H8S_SCI_IRQS0,
1435 .init_pins = sci_init_pins_sci,
1436 },
1437 {
1438 .port = {
1439 .membase = (void *)0x00ffff80,
1440 .mapbase = 0x00ffff80,
1441 .iotype = UPIO_MEM,
1442 .irq = 94,
1443 .ops = &sci_uart_ops,
1444 .flags = UPF_BOOT_AUTOCONF,
1445 .line = 1,
1446 },
1447 .type = PORT_SCI,
1448 .irqs = H8S_SCI_IRQS1,
1449 .init_pins = sci_init_pins_sci,
1450 },
1451 {
1452 .port = {
1453 .membase = (void *)0x00ffff88,
1454 .mapbase = 0x00ffff88,
1455 .iotype = UPIO_MEM,
1456 .irq = 98,
1457 .ops = &sci_uart_ops,
1458 .flags = UPF_BOOT_AUTOCONF,
1459 .line = 2,
1460 },
1461 .type = PORT_SCI,
1462 .irqs = H8S_SCI_IRQS2,
1463 .init_pins = sci_init_pins_sci,
1464 },
1465#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
1466 {
1467 .port = {
1468 .membase = (void *)0xff923000,
1469 .mapbase = 0xff923000,
1470 .iotype = UPIO_MEM,
1471 .irq = 61,
1472 .ops = &sci_uart_ops,
1473 .flags = UPF_BOOT_AUTOCONF,
1474 .line = 0,
1475 },
1476 .type = PORT_SCIF,
1477 .irqs = SH7770_SCIF0_IRQS,
1478 .init_pins = sci_init_pins_scif,
1479 },
1480 {
1481 .port = {
1482 .membase = (void *)0xff924000,
1483 .mapbase = 0xff924000,
1484 .iotype = UPIO_MEM,
1485 .irq = 62,
1486 .ops = &sci_uart_ops,
1487 .flags = UPF_BOOT_AUTOCONF,
1488 .line = 1,
1489 },
1490 .type = PORT_SCIF,
1491 .irqs = SH7770_SCIF1_IRQS,
1492 .init_pins = sci_init_pins_scif,
1493 },
1494 {
1495 .port = {
1496 .membase = (void *)0xff925000,
1497 .mapbase = 0xff925000,
1498 .iotype = UPIO_MEM,
1499 .irq = 63,
1500 .ops = &sci_uart_ops,
1501 .flags = UPF_BOOT_AUTOCONF,
1502 .line = 2,
1503 },
1504 .type = PORT_SCIF,
1505 .irqs = SH7770_SCIF2_IRQS,
1506 .init_pins = sci_init_pins_scif,
1507 },
1508#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
1509 {
1510 .port = {
1511 .membase = (void *)0xffe00000,
1512 .mapbase = 0xffe00000,
1513 .iotype = UPIO_MEM,
1514 .irq = 43,
1515 .ops = &sci_uart_ops,
1516 .flags = UPF_BOOT_AUTOCONF,
1517 .line = 0,
1518 },
1519 .type = PORT_SCIF,
1520 .irqs = SH7780_SCIF0_IRQS,
1521 .init_pins = sci_init_pins_scif,
1522 },
1523 {
1524 .port = {
1525 .membase = (void *)0xffe10000,
1526 .mapbase = 0xffe10000,
1527 .iotype = UPIO_MEM,
1528 .irq = 79,
1529 .ops = &sci_uart_ops,
1530 .flags = UPF_BOOT_AUTOCONF,
1531 .line = 1,
1532 },
1533 .type = PORT_SCIF,
1534 .irqs = SH7780_SCIF1_IRQS,
1535 .init_pins = sci_init_pins_scif,
1536 },
1537#else 1128#else
1538#error "CPU subtype not defined" 1129 /*
1130 * XXX: We should use a proper SCI/SCIF clock
1131 */
1132 {
1133 struct clk *clk = clk_get("module_clk");
1134 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1135 clk_put(clk);
1136 }
1539#endif 1137#endif
1540}; 1138
1139 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1140 sci_ports[i].break_timer.function = sci_break_timer;
1141
1142 init_timer(&sci_ports[i].break_timer);
1143 }
1144}
1145
1146int __init early_sci_setup(struct uart_port *port)
1147{
1148 if (unlikely(port->line > SCI_NPORTS))
1149 return -ENODEV;
1150
1151 sci_init_ports();
1152
1153 sci_ports[port->line].port.membase = port->membase;
1154 sci_ports[port->line].port.mapbase = port->mapbase;
1155 sci_ports[port->line].port.type = port->type;
1156
1157 return 0;
1158}
1541 1159
1542#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE 1160#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1543/* 1161/*
@@ -1559,34 +1177,38 @@ static int __init serial_console_setup(struct console *co, char *options)
1559 int flow = 'n'; 1177 int flow = 'n';
1560 int ret; 1178 int ret;
1561 1179
1180 /*
1181 * Check whether an invalid uart number has been specified, and
1182 * if so, search for the first available port that does have
1183 * console support.
1184 */
1185 if (co->index >= SCI_NPORTS)
1186 co->index = 0;
1187
1562 serial_console_port = &sci_ports[co->index]; 1188 serial_console_port = &sci_ports[co->index];
1563 port = &serial_console_port->port; 1189 port = &serial_console_port->port;
1564 port->type = serial_console_port->type;
1565
1566#ifdef CONFIG_SUPERH64
1567 /* This is especially needed on sh64 to remap the SCIF */
1568 sci_config_port(port, 0);
1569#endif
1570 1190
1571 /* 1191 /*
1572 * We need to set the initial uartclk here, since otherwise it will 1192 * Also need to check port->type, we don't actually have any
1573 * only ever be setup at sci_init() time. 1193 * UPIO_PORT ports, but uart_report_port() handily misreports
1194 * it anyways if we don't have a port available by the time this is
1195 * called.
1574 */ 1196 */
1575#if defined(__H8300H__) || defined(__H8300S__) 1197 if (!port->type)
1576 port->uartclk = CONFIG_CPU_CLOCK; 1198 return -ENODEV;
1199 if (!port->membase || !port->mapbase)
1200 return -ENODEV;
1201
1202 spin_lock_init(&port->lock);
1203
1204 port->type = serial_console_port->type;
1205
1206 if (port->flags & UPF_IOREMAP)
1207 sci_config_port(port, 0);
1208
1209 if (serial_console_port->enable)
1210 serial_console_port->enable(port);
1577 1211
1578#if defined(__H8300S__)
1579 h8300_sci_enable(port, sci_enable);
1580#endif
1581#elif defined(CONFIG_SUPERH64)
1582 port->uartclk = current_cpu_data.module_clock * 16;
1583#else
1584 {
1585 struct clk *clk = clk_get("module_clk");
1586 port->uartclk = clk_get_rate(clk) * 16;
1587 clk_put(clk);
1588 }
1589#endif
1590 if (options) 1212 if (options)
1591 uart_parse_options(options, &baud, &parity, &bits, &flow); 1213 uart_parse_options(options, &baud, &parity, &bits, &flow);
1592 1214
@@ -1604,17 +1226,17 @@ static struct console serial_console = {
1604 .device = uart_console_device, 1226 .device = uart_console_device,
1605 .write = serial_console_write, 1227 .write = serial_console_write,
1606 .setup = serial_console_setup, 1228 .setup = serial_console_setup,
1607 .flags = CON_PRINTBUFFER, 1229 .flags = CON_PRINTBUFFER,
1608 .index = -1, 1230 .index = -1,
1609 .data = &sci_uart_driver, 1231 .data = &sci_uart_driver,
1610}; 1232};
1611 1233
1612static int __init sci_console_init(void) 1234static int __init sci_console_init(void)
1613{ 1235{
1236 sci_init_ports();
1614 register_console(&serial_console); 1237 register_console(&serial_console);
1615 return 0; 1238 return 0;
1616} 1239}
1617
1618console_initcall(sci_console_init); 1240console_initcall(sci_console_init);
1619#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ 1241#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1620 1242
@@ -1649,6 +1271,8 @@ int __init kgdb_console_setup(struct console *co, char *options)
1649 int parity = 'n'; 1271 int parity = 'n';
1650 int flow = 'n'; 1272 int flow = 'n';
1651 1273
1274 spin_lock_init(&port->lock);
1275
1652 if (co->index != kgdb_portnum) 1276 if (co->index != kgdb_portnum)
1653 co->index = kgdb_portnum; 1277 co->index = kgdb_portnum;
1654 1278
@@ -1677,10 +1301,10 @@ static struct console kgdb_console = {
1677/* Register the KGDB console so we get messages (d'oh!) */ 1301/* Register the KGDB console so we get messages (d'oh!) */
1678static int __init kgdb_console_init(void) 1302static int __init kgdb_console_init(void)
1679{ 1303{
1304 sci_init_ports();
1680 register_console(&kgdb_console); 1305 register_console(&kgdb_console);
1681 return 0; 1306 return 0;
1682} 1307}
1683
1684console_initcall(kgdb_console_init); 1308console_initcall(kgdb_console_init);
1685#endif /* CONFIG_SH_KGDB_CONSOLE */ 1309#endif /* CONFIG_SH_KGDB_CONSOLE */
1686 1310
@@ -1701,60 +1325,132 @@ static struct uart_driver sci_uart_driver = {
1701 .dev_name = "ttySC", 1325 .dev_name = "ttySC",
1702 .major = SCI_MAJOR, 1326 .major = SCI_MAJOR,
1703 .minor = SCI_MINOR_START, 1327 .minor = SCI_MINOR_START,
1328 .nr = SCI_NPORTS,
1704 .cons = SCI_CONSOLE, 1329 .cons = SCI_CONSOLE,
1705}; 1330};
1706 1331
1707static int __init sci_init(void) 1332/*
1333 * Register a set of serial devices attached to a platform device. The
1334 * list is terminated with a zero flags entry, which means we expect
1335 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1336 * remapping (such as sh64) should also set UPF_IOREMAP.
1337 */
1338static int __devinit sci_probe(struct platform_device *dev)
1708{ 1339{
1709 int chan, ret; 1340 struct plat_sci_port *p = dev->dev.platform_data;
1341 int i;
1710 1342
1711 printk("%s", banner); 1343 for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
1344 struct sci_port *sciport = &sci_ports[i];
1712 1345
1713 sci_uart_driver.nr = ARRAY_SIZE(sci_ports); 1346 sciport->port.mapbase = p->mapbase;
1714 1347
1715 ret = uart_register_driver(&sci_uart_driver); 1348 /*
1716 if (ret == 0) { 1349 * For the simple (and majority of) cases where we don't need
1717 for (chan = 0; chan < SCI_NPORTS; chan++) { 1350 * to do any remapping, just cast the cookie directly.
1718 struct sci_port *sciport = &sci_ports[chan]; 1351 */
1352 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1353 p->membase = (void __iomem *)p->mapbase;
1719 1354
1720#if defined(__H8300H__) || defined(__H8300S__) 1355 sciport->port.membase = p->membase;
1721 sciport->port.uartclk = CONFIG_CPU_CLOCK; 1356
1722#elif defined(CONFIG_SUPERH64) 1357 sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
1723 sciport->port.uartclk = current_cpu_data.module_clock * 16; 1358 sciport->port.flags = p->flags;
1724#else 1359 sciport->port.dev = &dev->dev;
1725 struct clk *clk = clk_get("module_clk"); 1360
1726 sciport->port.uartclk = clk_get_rate(clk) * 16; 1361 sciport->type = sciport->port.type = p->type;
1727 clk_put(clk); 1362
1728#endif 1363 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1729 uart_add_one_port(&sci_uart_driver, &sciport->port); 1364
1730 sciport->break_timer.data = (unsigned long)sciport; 1365 uart_add_one_port(&sci_uart_driver, &sciport->port);
1731 sciport->break_timer.function = sci_break_timer;
1732 init_timer(&sciport->break_timer);
1733 }
1734 } 1366 }
1735 1367
1736#ifdef CONFIG_CPU_FREQ 1368#ifdef CONFIG_CPU_FREQ
1737 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); 1369 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1738 printk("sci: CPU frequency notifier registered\n"); 1370 dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
1739#endif 1371#endif
1740 1372
1741#ifdef CONFIG_SH_STANDARD_BIOS 1373#ifdef CONFIG_SH_STANDARD_BIOS
1742 sh_bios_gdb_detach(); 1374 sh_bios_gdb_detach();
1743#endif 1375#endif
1744 1376
1745 return ret; 1377 return 0;
1746} 1378}
1747 1379
1748static void __exit sci_exit(void) 1380static int __devexit sci_remove(struct platform_device *dev)
1381{
1382 int i;
1383
1384 for (i = 0; i < SCI_NPORTS; i++)
1385 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1386
1387 return 0;
1388}
1389
1390static int sci_suspend(struct platform_device *dev, pm_message_t state)
1749{ 1391{
1750 int chan; 1392 int i;
1393
1394 for (i = 0; i < SCI_NPORTS; i++) {
1395 struct sci_port *p = &sci_ports[i];
1396
1397 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1398 uart_suspend_port(&sci_uart_driver, &p->port);
1399 }
1751 1400
1752 for (chan = 0; chan < SCI_NPORTS; chan++) 1401 return 0;
1753 uart_remove_one_port(&sci_uart_driver, &sci_ports[chan].port); 1402}
1754 1403
1404static int sci_resume(struct platform_device *dev)
1405{
1406 int i;
1407
1408 for (i = 0; i < SCI_NPORTS; i++) {
1409 struct sci_port *p = &sci_ports[i];
1410
1411 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1412 uart_resume_port(&sci_uart_driver, &p->port);
1413 }
1414
1415 return 0;
1416}
1417
1418static struct platform_driver sci_driver = {
1419 .probe = sci_probe,
1420 .remove = __devexit_p(sci_remove),
1421 .suspend = sci_suspend,
1422 .resume = sci_resume,
1423 .driver = {
1424 .name = "sh-sci",
1425 .owner = THIS_MODULE,
1426 },
1427};
1428
1429static int __init sci_init(void)
1430{
1431 int ret;
1432
1433 printk(banner);
1434
1435 sci_init_ports();
1436
1437 ret = uart_register_driver(&sci_uart_driver);
1438 if (likely(ret == 0)) {
1439 ret = platform_driver_register(&sci_driver);
1440 if (unlikely(ret))
1441 uart_unregister_driver(&sci_uart_driver);
1442 }
1443
1444 return ret;
1445}
1446
1447static void __exit sci_exit(void)
1448{
1449 platform_driver_unregister(&sci_driver);
1755 uart_unregister_driver(&sci_uart_driver); 1450 uart_unregister_driver(&sci_uart_driver);
1756} 1451}
1757 1452
1758module_init(sci_init); 1453module_init(sci_init);
1759module_exit(sci_exit); 1454module_exit(sci_exit);
1760 1455
1456MODULE_LICENSE("GPL");
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index ab320fa3237c..28643c4dc850 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -10,7 +10,9 @@
10 * Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003). 10 * Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003).
11 * Modified to support H8/300 Series Yoshinori Sato (Feb 2004). 11 * Modified to support H8/300 Series Yoshinori Sato (Feb 2004).
12 */ 12 */
13#include <linux/config.h>
13#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <asm/io.h>
14 16
15#if defined(__H8300H__) || defined(__H8300S__) 17#if defined(__H8300H__) || defined(__H8300S__)
16#include <asm/gpio.h> 18#include <asm/gpio.h>
@@ -22,40 +24,13 @@
22#endif 24#endif
23#endif 25#endif
24 26
25/* Offsets into the sci_port->irqs array */
26#define SCIx_ERI_IRQ 0
27#define SCIx_RXI_IRQ 1
28#define SCIx_TXI_IRQ 2
29
30/* ERI, RXI, TXI, BRI */
31#define SCI_IRQS { 23, 24, 25, 0 }
32#define SH3_SCIF_IRQS { 56, 57, 59, 58 }
33#define SH3_IRDA_IRQS { 52, 53, 55, 54 }
34#define SH4_SCIF_IRQS { 40, 41, 43, 42 }
35#define STB1_SCIF1_IRQS {23, 24, 26, 25 }
36#define SH7760_SCIF0_IRQS { 52, 53, 55, 54 }
37#define SH7760_SCIF1_IRQS { 72, 73, 75, 74 }
38#define SH7760_SCIF2_IRQS { 76, 77, 79, 78 }
39#define SH7300_SCIF0_IRQS {80, 80, 80, 80 }
40#define SH73180_SCIF_IRQS {80, 81, 83, 82 }
41#define H8300H_SCI_IRQS0 {52, 53, 54, 0 }
42#define H8300H_SCI_IRQS1 {56, 57, 58, 0 }
43#define H8300H_SCI_IRQS2 {60, 61, 62, 0 }
44#define H8S_SCI_IRQS0 {88, 89, 90, 0 }
45#define H8S_SCI_IRQS1 {92, 93, 94, 0 }
46#define H8S_SCI_IRQS2 {96, 97, 98, 0 }
47#define SH5_SCIF_IRQS {39, 40, 42, 0 }
48#define SH7770_SCIF0_IRQS {61, 61, 61, 61 }
49#define SH7770_SCIF1_IRQS {62, 62, 62, 62 }
50#define SH7770_SCIF2_IRQS {63, 63, 63, 63 }
51#define SH7780_SCIF0_IRQS {40, 41, 43, 42 }
52#define SH7780_SCIF1_IRQS {76, 77, 79, 78 }
53
54#if defined(CONFIG_CPU_SUBTYPE_SH7708) 27#if defined(CONFIG_CPU_SUBTYPE_SH7708)
55# define SCSPTR 0xffffff7c /* 8 bit */ 28# define SCSPTR 0xffffff7c /* 8 bit */
56# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ 29# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
57# define SCI_ONLY 30# define SCI_ONLY
58#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) 31#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7706)
59# define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */ 34# define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */
60# define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */ 35# define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */
61# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ 36# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
@@ -99,12 +74,23 @@
99# define SCPDR 0xA4050136 /* 16 bit SCIF */ 74# define SCPDR 0xA4050136 /* 16 bit SCIF */
100# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ 75# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
101# define SCIF_ONLY 76# define SCIF_ONLY
77#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
78# define SCSPTR0 0xA4400000 /* 16 bit SCIF */
79# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
80# define SCIF_ONLY
102#elif defined(CONFIG_CPU_SUBTYPE_SH73180) 81#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
103# define SCPDR 0xA4050138 /* 16 bit SCIF */ 82# define SCPDR 0xA4050138 /* 16 bit SCIF */
104# define SCSPTR2 SCPDR 83# define SCSPTR2 SCPDR
105# define SCIF_ORER 0x0001 /* overrun error bit */ 84# define SCIF_ORER 0x0001 /* overrun error bit */
106# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1 */ 85# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1 */
107# define SCIF_ONLY 86# define SCIF_ONLY
87#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
88# define SCSPTR0 0xffe00010 /* 16 bit SCIF */
89# define SCSPTR1 0xffe10010 /* 16 bit SCIF */
90# define SCSPTR2 0xffe20010 /* 16 bit SCIF */
91# define SCSPTR3 0xffe30010 /* 16 bit SCIF */
92# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
93# define SCIF_ONLY
108#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) 94#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
109# define SCSPTR2 0xffe80020 /* 16 bit SCIF */ 95# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
110# define SCIF_ORER 0x0001 /* overrun error bit */ 96# define SCIF_ORER 0x0001 /* overrun error bit */
@@ -145,7 +131,7 @@
145#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 131#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
146# define SCSPTR0 0xffe00024 /* 16 bit SCIF */ 132# define SCSPTR0 0xffe00024 /* 16 bit SCIF */
147# define SCSPTR1 0xffe10024 /* 16 bit SCIF */ 133# define SCSPTR1 0xffe10024 /* 16 bit SCIF */
148# define SCIF_OPER 0x0001 /* Overrun error bit */ 134# define SCIF_ORER 0x0001 /* Overrun error bit */
149# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 135# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
150# define SCIF_ONLY 136# define SCIF_ONLY
151#else 137#else
@@ -273,15 +259,6 @@
273 */ 259 */
274#define SCI_EVENT_WRITE_WAKEUP 0 260#define SCI_EVENT_WRITE_WAKEUP 0
275 261
276struct sci_port {
277 struct uart_port port;
278 int type;
279 unsigned char irqs[4]; /* ERI, RXI, TXI, BRI */
280 void (*init_pins)(struct uart_port *port, unsigned int cflag);
281 int break_flag;
282 struct timer_list break_timer;
283};
284
285#define SCI_IN(size, offset) \ 262#define SCI_IN(size, offset) \
286 unsigned int addr = port->mapbase + (offset); \ 263 unsigned int addr = port->mapbase + (offset); \
287 if ((size) == 8) { \ 264 if ((size) == 8) { \
@@ -336,7 +313,9 @@ struct sci_port {
336 } 313 }
337 314
338#ifdef CONFIG_CPU_SH3 315#ifdef CONFIG_CPU_SH3
339#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) 316#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
317 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
318 defined(CONFIG_CPU_SUBTYPE_SH7710)
340#define SCIF_FNS(name, scif_offset, scif_size) \ 319#define SCIF_FNS(name, scif_offset, scif_size) \
341 CPU_SCIF_FNS(name, scif_offset, scif_size) 320 CPU_SCIF_FNS(name, scif_offset, scif_size)
342#else 321#else
@@ -362,7 +341,9 @@ struct sci_port {
362 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) 341 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
363#endif 342#endif
364 343
365#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) 344#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
345 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
346 defined(CONFIG_CPU_SUBTYPE_SH7710)
366SCIF_FNS(SCSMR, 0x00, 16) 347SCIF_FNS(SCSMR, 0x00, 16)
367SCIF_FNS(SCBRR, 0x04, 8) 348SCIF_FNS(SCBRR, 0x04, 8)
368SCIF_FNS(SCSCR, 0x08, 16) 349SCIF_FNS(SCSCR, 0x08, 16)
@@ -447,7 +428,9 @@ static inline int sci_rxd_in(struct uart_port *port)
447 return ctrl_inb(SCSPTR)&0x01 ? 1 : 0; /* SCI */ 428 return ctrl_inb(SCSPTR)&0x01 ? 1 : 0; /* SCI */
448 return 1; 429 return 1;
449} 430}
450#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) 431#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || \
432 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
433 defined(CONFIG_CPU_SUBTYPE_SH7706)
451static inline int sci_rxd_in(struct uart_port *port) 434static inline int sci_rxd_in(struct uart_port *port)
452{ 435{
453 if (port->mapbase == 0xfffffe80) 436 if (port->mapbase == 0xfffffe80)
@@ -467,6 +450,13 @@ static inline int sci_rxd_in(struct uart_port *port)
467 return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ 450 return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
468 return 1; 451 return 1;
469} 452}
453#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
454static inline int sci_rxd_in(struct uart_port *port)
455{
456 if (port->mapbase == SCSPTR0)
457 return ctrl_inw(SCSPTR0 + 0x10) & 0x01 ? 1 : 0;
458 return 1;
459}
470#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ 460#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
471 defined(CONFIG_CPU_SUBTYPE_SH7751) || \ 461 defined(CONFIG_CPU_SUBTYPE_SH7751) || \
472 defined(CONFIG_CPU_SUBTYPE_SH4_202) 462 defined(CONFIG_CPU_SUBTYPE_SH4_202)
@@ -504,6 +494,19 @@ static inline int sci_rxd_in(struct uart_port *port)
504{ 494{
505 return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCIF0 */ 495 return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCIF0 */
506} 496}
497#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
498static inline int sci_rxd_in(struct uart_port *port)
499{
500 if (port->mapbase == 0xffe00000)
501 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
502 if (port->mapbase == 0xffe10000)
503 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
504 if (port->mapbase == 0xffe20000)
505 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
506 if (port->mapbase == 0xffe30000)
507 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
508 return 1;
509}
507#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) 510#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
508static inline int sci_rxd_in(struct uart_port *port) 511static inline int sci_rxd_in(struct uart_port *port)
509{ 512{
@@ -587,4 +590,3 @@ static inline int sci_rxd_in(struct uart_port *port)
587#else /* Generic SH */ 590#else /* Generic SH */
588#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) 591#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
589#endif 592#endif
590
diff --git a/drivers/video/backlight/hp680_bl.c b/drivers/video/backlight/hp680_bl.c
index ffc72ae3ada8..fe1488374f62 100644
--- a/drivers/video/backlight/hp680_bl.c
+++ b/drivers/video/backlight/hp680_bl.c
@@ -20,7 +20,7 @@
20 20
21#include <asm/cpu/dac.h> 21#include <asm/cpu/dac.h>
22#include <asm/hp6xx/hp6xx.h> 22#include <asm/hp6xx/hp6xx.h>
23#include <asm/hd64461/hd64461.h> 23#include <asm/hd64461.h>
24 24
25#define HP680_MAX_INTENSITY 255 25#define HP680_MAX_INTENSITY 255
26#define HP680_DEFAULT_INTENSITY 10 26#define HP680_DEFAULT_INTENSITY 10
@@ -163,6 +163,6 @@ static void __exit hp680bl_exit(void)
163module_init(hp680bl_init); 163module_init(hp680bl_init);
164module_exit(hp680bl_exit); 164module_exit(hp680bl_exit);
165 165
166MODULE_AUTHOR("Andriy Skulysh <askulysh@image.kiev.ua>"); 166MODULE_AUTHOR("Andriy Skulysh <askulysh@gmail.com>");
167MODULE_DESCRIPTION("HP Jornada 680 Backlight Driver"); 167MODULE_DESCRIPTION("HP Jornada 680 Backlight Driver");
168MODULE_LICENSE("GPL"); 168MODULE_LICENSE("GPL");
diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
index 4444bef68fba..aa3935df852a 100644
--- a/drivers/video/console/Kconfig
+++ b/drivers/video/console/Kconfig
@@ -6,7 +6,7 @@ menu "Console display driver support"
6 6
7config VGA_CONSOLE 7config VGA_CONSOLE
8 bool "VGA text console" if EMBEDDED || !X86 8 bool "VGA text console" if EMBEDDED || !X86
9 depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE 9 depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH
10 default y 10 default y
11 help 11 help
12 Saying Y here will allow you to use Linux in text mode through a 12 Saying Y here will allow you to use Linux in text mode through a
diff --git a/drivers/video/hitfb.c b/drivers/video/hitfb.c
index 4cc6b454265e..3afb472763c0 100644
--- a/drivers/video/hitfb.c
+++ b/drivers/video/hitfb.c
@@ -4,7 +4,7 @@
4 * (C) 1999 Mihai Spatar 4 * (C) 1999 Mihai Spatar
5 * (C) 2000 YAEGASHI Takeshi 5 * (C) 2000 YAEGASHI Takeshi
6 * (C) 2003, 2004 Paul Mundt 6 * (C) 2003, 2004 Paul Mundt
7 * (C) 2003, 2004 Andriy Skulysh 7 * (C) 2003, 2004, 2006 Andriy Skulysh
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive for 10 * License. See the file COPYING in the main directory of this archive for
@@ -20,18 +20,16 @@
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/platform_device.h>
23#include <linux/fb.h> 24#include <linux/fb.h>
24 25
25#include <asm/machvec.h> 26#include <asm/machvec.h>
26#include <asm/uaccess.h> 27#include <asm/uaccess.h>
27#include <asm/pgtable.h> 28#include <asm/pgtable.h>
28#include <asm/io.h> 29#include <asm/io.h>
29#include <asm/hd64461/hd64461.h> 30#include <asm/hd64461.h>
30
31#ifdef MACH_HP600
32#include <asm/cpu/dac.h> 31#include <asm/cpu/dac.h>
33#include <asm/hp6xx/hp6xx.h> 32#include <asm/hp6xx/hp6xx.h>
34#endif
35 33
36#define WIDTH 640 34#define WIDTH 640
37 35
@@ -45,7 +43,6 @@ static struct fb_var_screeninfo hitfb_var __initdata = {
45static struct fb_fix_screeninfo hitfb_fix __initdata = { 43static struct fb_fix_screeninfo hitfb_fix __initdata = {
46 .id = "Hitachi HD64461", 44 .id = "Hitachi HD64461",
47 .type = FB_TYPE_PACKED_PIXELS, 45 .type = FB_TYPE_PACKED_PIXELS,
48 .ypanstep = 8,
49 .accel = FB_ACCEL_NONE, 46 .accel = FB_ACCEL_NONE,
50}; 47};
51 48
@@ -73,26 +70,14 @@ static inline void hitfb_accel_set_dest(int truecolor, u16 dx, u16 dy,
73 if (truecolor) 70 if (truecolor)
74 saddr <<= 1; 71 saddr <<= 1;
75 72
76 fb_writew(width, HD64461_BBTDWR); 73 fb_writew(width-1, HD64461_BBTDWR);
77 fb_writew(height, HD64461_BBTDHR); 74 fb_writew(height-1, HD64461_BBTDHR);
78 75
79 fb_writew(saddr & 0xffff, HD64461_BBTDSARL); 76 fb_writew(saddr & 0xffff, HD64461_BBTDSARL);
80 fb_writew(saddr >> 16, HD64461_BBTDSARH); 77 fb_writew(saddr >> 16, HD64461_BBTDSARH);
81 78
82} 79}
83 80
84static inline void hitfb_accel_solidfill(int truecolor, u16 dx, u16 dy,
85 u16 width, u16 height, u16 color)
86{
87 hitfb_accel_set_dest(truecolor, dx, dy, width, height);
88
89 fb_writew(0x00f0, HD64461_BBTROPR);
90 fb_writew(16, HD64461_BBTMDR);
91 fb_writew(color, HD64461_GRSCR);
92
93 hitfb_accel_start(truecolor);
94}
95
96static inline void hitfb_accel_bitblt(int truecolor, u16 sx, u16 sy, u16 dx, 81static inline void hitfb_accel_bitblt(int truecolor, u16 sx, u16 sy, u16 dx,
97 u16 dy, u16 width, u16 height, u16 rop, 82 u16 dy, u16 width, u16 height, u16 rop,
98 u32 mask_addr) 83 u32 mask_addr)
@@ -100,6 +85,8 @@ static inline void hitfb_accel_bitblt(int truecolor, u16 sx, u16 sy, u16 dx,
100 u32 saddr, daddr; 85 u32 saddr, daddr;
101 u32 maddr = 0; 86 u32 maddr = 0;
102 87
88 height--;
89 width--;
103 fb_writew(rop, HD64461_BBTROPR); 90 fb_writew(rop, HD64461_BBTROPR);
104 if ((sy < dy) || ((sy == dy) && (sx <= dx))) { 91 if ((sy < dy) || ((sy == dy) && (sx <= dx))) {
105 saddr = WIDTH * (sy + height) + sx + width; 92 saddr = WIDTH * (sy + height) + sx + width;
@@ -146,6 +133,7 @@ static void hitfb_fillrect(struct fb_info *p, const struct fb_fillrect *rect)
146 if (rect->rop != ROP_COPY) 133 if (rect->rop != ROP_COPY)
147 cfb_fillrect(p, rect); 134 cfb_fillrect(p, rect);
148 else { 135 else {
136 hitfb_accel_wait();
149 fb_writew(0x00f0, HD64461_BBTROPR); 137 fb_writew(0x00f0, HD64461_BBTROPR);
150 fb_writew(16, HD64461_BBTMDR); 138 fb_writew(16, HD64461_BBTMDR);
151 139
@@ -161,16 +149,15 @@ static void hitfb_fillrect(struct fb_info *p, const struct fb_fillrect *rect)
161 rect->height); 149 rect->height);
162 hitfb_accel_start(0); 150 hitfb_accel_start(0);
163 } 151 }
164 hitfb_accel_wait();
165 } 152 }
166} 153}
167 154
168static void hitfb_copyarea(struct fb_info *p, const struct fb_copyarea *area) 155static void hitfb_copyarea(struct fb_info *p, const struct fb_copyarea *area)
169{ 156{
157 hitfb_accel_wait();
170 hitfb_accel_bitblt(p->var.bits_per_pixel == 16, area->sx, area->sy, 158 hitfb_accel_bitblt(p->var.bits_per_pixel == 16, area->sx, area->sy,
171 area->dx, area->dy, area->width, area->height, 159 area->dx, area->dy, area->width, area->height,
172 0x00cc, 0); 160 0x00cc, 0);
173 hitfb_accel_wait();
174} 161}
175 162
176static int hitfb_pan_display(struct fb_var_screeninfo *var, 163static int hitfb_pan_display(struct fb_var_screeninfo *var,
@@ -182,7 +169,7 @@ static int hitfb_pan_display(struct fb_var_screeninfo *var,
182 if (xoffset != 0) 169 if (xoffset != 0)
183 return -EINVAL; 170 return -EINVAL;
184 171
185 fb_writew(yoffset, HD64461_LCDCBAR); 172 fb_writew((yoffset*info->fix.line_length)>>10, HD64461_LCDCBAR);
186 173
187 return 0; 174 return 0;
188} 175}
@@ -192,12 +179,6 @@ int hitfb_blank(int blank_mode, struct fb_info *info)
192 unsigned short v; 179 unsigned short v;
193 180
194 if (blank_mode) { 181 if (blank_mode) {
195#ifdef MACH_HP600
196 sh_dac_disable(DAC_LCD_BRIGHTNESS);
197 v = fb_readw(HD64461_GPBDR);
198 v |= HD64461_GPBDR_LCDOFF;
199 fb_writew(v, HD64461_GPBDR);
200#endif
201 v = fb_readw(HD64461_LDR1); 182 v = fb_readw(HD64461_LDR1);
202 v &= ~HD64461_LDR1_DON; 183 v &= ~HD64461_LDR1_DON;
203 fb_writew(v, HD64461_LDR1); 184 fb_writew(v, HD64461_LDR1);
@@ -213,19 +194,18 @@ int hitfb_blank(int blank_mode, struct fb_info *info)
213 v = fb_readw(HD64461_STBCR); 194 v = fb_readw(HD64461_STBCR);
214 v &= ~HD64461_STBCR_SLCDST; 195 v &= ~HD64461_STBCR_SLCDST;
215 fb_writew(v, HD64461_STBCR); 196 fb_writew(v, HD64461_STBCR);
216#ifdef MACH_HP600
217 sh_dac_enable(DAC_LCD_BRIGHTNESS);
218 v = fb_readw(HD64461_GPBDR);
219 v &= ~HD64461_GPBDR_LCDOFF;
220 fb_writew(v, HD64461_GPBDR);
221#endif
222 v = fb_readw(HD64461_LDR1);
223 v |= HD64461_LDR1_DON;
224 fb_writew(v, HD64461_LDR1);
225 197
226 v = fb_readw(HD64461_LCDCCR); 198 v = fb_readw(HD64461_LCDCCR);
227 v &= ~HD64461_LCDCCR_MOFF; 199 v &= ~(HD64461_LCDCCR_MOFF | HD64461_LCDCCR_STREQ);
228 fb_writew(v, HD64461_LCDCCR); 200 fb_writew(v, HD64461_LCDCCR);
201
202 do {
203 v = fb_readw(HD64461_LCDCCR);
204 } while(v&HD64461_LCDCCR_STBACK);
205
206 v = fb_readw(HD64461_LDR1);
207 v |= HD64461_LDR1_DON;
208 fb_writew(v, HD64461_LDR1);
229 } 209 }
230 return 0; 210 return 0;
231} 211}
@@ -233,7 +213,7 @@ int hitfb_blank(int blank_mode, struct fb_info *info)
233static int hitfb_setcolreg(unsigned regno, unsigned red, unsigned green, 213static int hitfb_setcolreg(unsigned regno, unsigned red, unsigned green,
234 unsigned blue, unsigned transp, struct fb_info *info) 214 unsigned blue, unsigned transp, struct fb_info *info)
235{ 215{
236 if (regno >= info->cmap.len) 216 if (regno >= 256)
237 return 1; 217 return 1;
238 218
239 switch (info->var.bits_per_pixel) { 219 switch (info->var.bits_per_pixel) {
@@ -244,6 +224,8 @@ static int hitfb_setcolreg(unsigned regno, unsigned red, unsigned green,
244 fb_writew(blue >> 10, HD64461_CPTWDR); 224 fb_writew(blue >> 10, HD64461_CPTWDR);
245 break; 225 break;
246 case 16: 226 case 16:
227 if (regno >= 16)
228 return 1;
247 ((u32 *) (info->pseudo_palette))[regno] = 229 ((u32 *) (info->pseudo_palette))[regno] =
248 ((red & 0xf800)) | 230 ((red & 0xf800)) |
249 ((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11); 231 ((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11);
@@ -252,26 +234,113 @@ static int hitfb_setcolreg(unsigned regno, unsigned red, unsigned green,
252 return 0; 234 return 0;
253} 235}
254 236
237static int hitfb_sync(struct fb_info *info)
238{
239 hitfb_accel_wait();
240
241 return 0;
242}
243
244static int hitfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
245{
246 int maxy;
247
248 var->xres = info->var.xres;
249 var->xres_virtual = info->var.xres;
250 var->yres = info->var.yres;
251
252 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16))
253 var->bits_per_pixel = info->var.bits_per_pixel;
254
255 if (var->yres_virtual < var->yres)
256 var->yres_virtual = var->yres;
257
258 maxy = info->fix.smem_len / var->xres;
259
260 if (var->bits_per_pixel == 16)
261 maxy /= 2;
262
263 if (var->yres_virtual > maxy)
264 var->yres_virtual = maxy;
265
266 var->xoffset = 0;
267 var->yoffset = 0;
268
269 switch (var->bits_per_pixel) {
270 case 8:
271 var->red.offset = 0;
272 var->red.length = 8;
273 var->green.offset = 0;
274 var->green.length = 8;
275 var->blue.offset = 0;
276 var->blue.length = 8;
277 var->transp.offset = 0;
278 var->transp.length = 0;
279 break;
280 case 16: /* RGB 565 */
281 var->red.offset = 11;
282 var->red.length = 5;
283 var->green.offset = 5;
284 var->green.length = 6;
285 var->blue.offset = 0;
286 var->blue.length = 5;
287 var->transp.offset = 0;
288 var->transp.length = 0;
289 break;
290 }
291
292 return 0;
293}
294
295static int hitfb_set_par(struct fb_info *info)
296{
297 unsigned short ldr3;
298
299 switch (info->var.bits_per_pixel) {
300 case 8:
301 info->fix.line_length = info->var.xres;
302 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
303 info->fix.ypanstep = 16;
304 break;
305 case 16:
306 info->fix.line_length = info->var.xres*2;
307 info->fix.visual = FB_VISUAL_TRUECOLOR;
308 info->fix.ypanstep = 8;
309 break;
310 }
311
312 fb_writew(info->fix.line_length, HD64461_LCDCLOR);
313 ldr3 = fb_readw(HD64461_LDR3);
314 ldr3 &= ~15;
315 ldr3 |= (info->var.bits_per_pixel == 8) ? 4 : 8;
316 fb_writew(ldr3, HD64461_LDR3);
317 return 0;
318}
319
255static struct fb_ops hitfb_ops = { 320static struct fb_ops hitfb_ops = {
256 .owner = THIS_MODULE, 321 .owner = THIS_MODULE,
322 .fb_check_var = hitfb_check_var,
323 .fb_set_par = hitfb_set_par,
257 .fb_setcolreg = hitfb_setcolreg, 324 .fb_setcolreg = hitfb_setcolreg,
258 .fb_blank = hitfb_blank, 325 .fb_blank = hitfb_blank,
326 .fb_sync = hitfb_sync,
259 .fb_pan_display = hitfb_pan_display, 327 .fb_pan_display = hitfb_pan_display,
260 .fb_fillrect = hitfb_fillrect, 328 .fb_fillrect = hitfb_fillrect,
261 .fb_copyarea = hitfb_copyarea, 329 .fb_copyarea = hitfb_copyarea,
262 .fb_imageblit = cfb_imageblit, 330 .fb_imageblit = cfb_imageblit,
263}; 331};
264 332
265int __init hitfb_init(void) 333static int __init hitfb_probe(struct platform_device *dev)
266{ 334{
267 unsigned short lcdclor, ldr3, ldvndr; 335 unsigned short lcdclor, ldr3, ldvndr;
268 int size;
269 336
270 if (fb_get_options("hitfb", NULL)) 337 if (fb_get_options("hitfb", NULL))
271 return -ENODEV; 338 return -ENODEV;
272 339
340 hitfb_fix.mmio_start = CONFIG_HD64461_IOBASE+0x1000;
341 hitfb_fix.mmio_len = 0x1000;
273 hitfb_fix.smem_start = CONFIG_HD64461_IOBASE + 0x02000000; 342 hitfb_fix.smem_start = CONFIG_HD64461_IOBASE + 0x02000000;
274 hitfb_fix.smem_len = (MACH_HP690) ? 1024 * 1024 : 512 * 1024; 343 hitfb_fix.smem_len = 512 * 1024;
275 344
276 lcdclor = fb_readw(HD64461_LCDCLOR); 345 lcdclor = fb_readw(HD64461_LCDCLOR);
277 ldvndr = fb_readw(HD64461_LDVNDR); 346 ldvndr = fb_readw(HD64461_LDVNDR);
@@ -321,12 +390,12 @@ int __init hitfb_init(void)
321 fb_info.var = hitfb_var; 390 fb_info.var = hitfb_var;
322 fb_info.fix = hitfb_fix; 391 fb_info.fix = hitfb_fix;
323 fb_info.pseudo_palette = pseudo_palette; 392 fb_info.pseudo_palette = pseudo_palette;
324 fb_info.flags = FBINFO_DEFAULT; 393 fb_info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN |
394 FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA;
325 395
326 fb_info.screen_base = (void *)hitfb_fix.smem_start; 396 fb_info.screen_base = (void *)hitfb_fix.smem_start;
327 397
328 size = (fb_info.var.bits_per_pixel == 8) ? 256 : 16; 398 fb_alloc_cmap(&fb_info.cmap, 256, 0);
329 fb_alloc_cmap(&fb_info.cmap, size, 0);
330 399
331 if (register_framebuffer(&fb_info) < 0) 400 if (register_framebuffer(&fb_info) < 0)
332 return -EINVAL; 401 return -EINVAL;
@@ -336,9 +405,75 @@ int __init hitfb_init(void)
336 return 0; 405 return 0;
337} 406}
338 407
408static int __devexit hitfb_remove(struct platform_device *dev)
409{
410 return unregister_framebuffer(&fb_info);
411}
412
413#ifdef CONFIG_PM
414static int hitfb_suspend(struct platform_device *dev, pm_message_t state)
415{
416 u16 v;
417
418 hitfb_blank(1,0);
419 v = fb_readw(HD64461_STBCR);
420 v |= HD64461_STBCR_SLCKE_IST;
421 fb_writew(v, HD64461_STBCR);
422
423 return 0;
424}
425
426static int hitfb_resume(struct platform_device *dev)
427{
428 u16 v;
429
430 v = fb_readw(HD64461_STBCR);
431 v &= ~HD64461_STBCR_SLCKE_OST;
432 msleep(100);
433 v = fb_readw(HD64461_STBCR);
434 v &= ~HD64461_STBCR_SLCKE_IST;
435 fb_writew(v, HD64461_STBCR);
436 hitfb_blank(0,0);
437
438 return 0;
439}
440#endif
441
442static struct platform_driver hitfb_driver = {
443 .probe = hitfb_probe,
444 .remove = __devexit_p(hitfb_remove),
445#ifdef CONFIG_PM
446 .suspend = hitfb_suspend,
447 .resume = hitfb_resume,
448#endif
449 .driver = {
450 .name = "hitfb",
451 },
452};
453
454static struct platform_device hitfb_device = {
455 .name = "hitfb",
456 .id = -1,
457};
458
459static int __init hitfb_init(void)
460{
461 int ret;
462
463 ret = platform_driver_register(&hitfb_driver);
464 if (!ret) {
465 ret = platform_device_register(&hitfb_device);
466 if (ret)
467 platform_driver_unregister(&hitfb_driver);
468 }
469 return ret;
470}
471
472
339static void __exit hitfb_exit(void) 473static void __exit hitfb_exit(void)
340{ 474{
341 unregister_framebuffer(&fb_info); 475 platform_device_unregister(&hitfb_device);
476 platform_driver_unregister(&hitfb_driver);
342} 477}
343 478
344module_init(hitfb_init); 479module_init(hitfb_init);
diff --git a/drivers/video/pvr2fb.c b/drivers/video/pvr2fb.c
index 940ba2be55e9..78dc59a1751b 100644
--- a/drivers/video/pvr2fb.c
+++ b/drivers/video/pvr2fb.c
@@ -187,7 +187,7 @@ static short do_blank = 0; /* (Un)Blank the screen */
187static unsigned int is_blanked = 0; /* Is the screen blanked? */ 187static unsigned int is_blanked = 0; /* Is the screen blanked? */
188 188
189#ifdef CONFIG_SH_STORE_QUEUES 189#ifdef CONFIG_SH_STORE_QUEUES
190static struct sq_mapping *pvr2fb_map; 190static unsigned long pvr2fb_map;
191#endif 191#endif
192 192
193#ifdef CONFIG_SH_DMA 193#ifdef CONFIG_SH_DMA
@@ -213,15 +213,17 @@ static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id, struct pt_regs *fp);
213static int pvr2_init_cable(void); 213static int pvr2_init_cable(void);
214static int pvr2_get_param(const struct pvr2_params *p, const char *s, 214static int pvr2_get_param(const struct pvr2_params *p, const char *s,
215 int val, int size); 215 int val, int size);
216#ifdef CONFIG_SH_DMA
216static ssize_t pvr2fb_write(struct file *file, const char *buf, 217static ssize_t pvr2fb_write(struct file *file, const char *buf,
217 size_t count, loff_t *ppos); 218 size_t count, loff_t *ppos);
219#endif
218 220
219static struct fb_ops pvr2fb_ops = { 221static struct fb_ops pvr2fb_ops = {
220 .owner = THIS_MODULE, 222 .owner = THIS_MODULE,
221 .fb_setcolreg = pvr2fb_setcolreg, 223 .fb_setcolreg = pvr2fb_setcolreg,
222 .fb_blank = pvr2fb_blank, 224 .fb_blank = pvr2fb_blank,
223 .fb_check_var = pvr2fb_check_var, 225 .fb_check_var = pvr2fb_check_var,
224 .fb_set_par = pvr2fb_set_par, 226 .fb_set_par = pvr2fb_set_par,
225#ifdef CONFIG_SH_DMA 227#ifdef CONFIG_SH_DMA
226 .fb_write = pvr2fb_write, 228 .fb_write = pvr2fb_write,
227#endif 229#endif
@@ -783,7 +785,7 @@ static int __init pvr2fb_common_init(void)
783 goto out_err; 785 goto out_err;
784 } 786 }
785 787
786 fb_memset((unsigned long)fb_info->screen_base, 0, pvr2_fix.smem_len); 788 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len);
787 789
788 pvr2_fix.ypanstep = nopan ? 0 : 1; 790 pvr2_fix.ypanstep = nopan ? 0 : 1;
789 pvr2_fix.ywrapstep = nowrap ? 0 : 1; 791 pvr2_fix.ywrapstep = nowrap ? 0 : 1;
@@ -820,7 +822,7 @@ static int __init pvr2fb_common_init(void)
820 modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10)); 822 modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10));
821 printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n", 823 printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",
822 fb_info->node, fb_info->var.xres, fb_info->var.yres, 824 fb_info->node, fb_info->var.xres, fb_info->var.yres,
823 fb_info->var.bits_per_pixel, 825 fb_info->var.bits_per_pixel,
824 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel), 826 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),
825 (char *)pvr2_get_param(cables, NULL, cable_type, 3), 827 (char *)pvr2_get_param(cables, NULL, cable_type, 3),
826 (char *)pvr2_get_param(outputs, NULL, video_output, 3)); 828 (char *)pvr2_get_param(outputs, NULL, video_output, 3));
@@ -829,10 +831,10 @@ static int __init pvr2fb_common_init(void)
829 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node); 831 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node);
830 832
831 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len, 833 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
832 fb_info->fix.id); 834 fb_info->fix.id, pgprot_val(PAGE_SHARED));
833 835
834 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n", 836 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n",
835 fb_info->node, pvr2fb_map->sq_addr); 837 fb_info->node, pvr2fb_map);
836#endif 838#endif
837 839
838 return 0; 840 return 0;
diff --git a/include/asm-sh/addrspace.h b/include/asm-sh/addrspace.h
index 720afc11c2ca..b860218e402e 100644
--- a/include/asm-sh/addrspace.h
+++ b/include/asm-sh/addrspace.h
@@ -14,11 +14,19 @@
14#include <asm/cpu/addrspace.h> 14#include <asm/cpu/addrspace.h>
15 15
16/* Memory segments (32bit Privileged mode addresses) */ 16/* Memory segments (32bit Privileged mode addresses) */
17#ifndef CONFIG_CPU_SH2A
17#define P0SEG 0x00000000 18#define P0SEG 0x00000000
18#define P1SEG 0x80000000 19#define P1SEG 0x80000000
19#define P2SEG 0xa0000000 20#define P2SEG 0xa0000000
20#define P3SEG 0xc0000000 21#define P3SEG 0xc0000000
21#define P4SEG 0xe0000000 22#define P4SEG 0xe0000000
23#else
24#define P0SEG 0x00000000
25#define P1SEG 0x00000000
26#define P2SEG 0x20000000
27#define P3SEG 0x00000000
28#define P4SEG 0x80000000
29#endif
22 30
23/* Returns the privileged segment base of a given address */ 31/* Returns the privileged segment base of a given address */
24#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 32#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
diff --git a/include/asm-sh/adx/io.h b/include/asm-sh/adx/io.h
deleted file mode 100644
index ab1225f1d557..000000000000
--- a/include/asm-sh/adx/io.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * include/asm-sh/io_adx.h
3 *
4 * Copyright (C) 2001 A&D Co., Ltd.
5 *
6 * This file may be copied or modified under the terms of the GNU
7 * General Public License. See linux/COPYING for more information.
8 *
9 * IO functions for an A&D ADX Board
10 */
11
12#ifndef _ASM_SH_IO_ADX_H
13#define _ASM_SH_IO_ADX_H
14
15#include <asm/io_generic.h>
16
17extern unsigned char adx_inb(unsigned long port);
18extern unsigned short adx_inw(unsigned long port);
19extern unsigned int adx_inl(unsigned long port);
20
21extern void adx_outb(unsigned char value, unsigned long port);
22extern void adx_outw(unsigned short value, unsigned long port);
23extern void adx_outl(unsigned int value, unsigned long port);
24
25extern unsigned char adx_inb_p(unsigned long port);
26extern void adx_outb_p(unsigned char value, unsigned long port);
27
28extern void adx_insb(unsigned long port, void *addr, unsigned long count);
29extern void adx_insw(unsigned long port, void *addr, unsigned long count);
30extern void adx_insl(unsigned long port, void *addr, unsigned long count);
31extern void adx_outsb(unsigned long port, const void *addr, unsigned long count);
32extern void adx_outsw(unsigned long port, const void *addr, unsigned long count);
33extern void adx_outsl(unsigned long port, const void *addr, unsigned long count);
34
35extern unsigned char adx_readb(unsigned long addr);
36extern unsigned short adx_readw(unsigned long addr);
37extern unsigned int adx_readl(unsigned long addr);
38extern void adx_writeb(unsigned char b, unsigned long addr);
39extern void adx_writew(unsigned short b, unsigned long addr);
40extern void adx_writel(unsigned int b, unsigned long addr);
41
42extern void * adx_ioremap(unsigned long offset, unsigned long size);
43extern void adx_iounmap(void *addr);
44
45extern unsigned long adx_isa_port2addr(unsigned long offset);
46
47extern void setup_adx(void);
48extern void init_adx_IRQ(void);
49
50#ifdef __WANT_IO_DEF
51
52#define __inb adx_inb
53#define __inw adx_inw
54#define __inl adx_inl
55#define __outb adx_outb
56#define __outw adx_outw
57#define __outl adx_outl
58
59#define __inb_p adx_inb_p
60#define __inw_p adx_inw
61#define __inl_p adx_inl
62#define __outb_p adx_outb_p
63#define __outw_p adx_outw
64#define __outl_p adx_outl
65
66#define __insb adx_insb
67#define __insw adx_insw
68#define __insl adx_insl
69#define __outsb adx_outsb
70#define __outsw adx_outsw
71#define __outsl adx_outsl
72
73#define __readb adx_readb
74#define __readw adx_readw
75#define __readl adx_readl
76#define __writeb adx_writeb
77#define __writew adx_writew
78#define __writel adx_writel
79
80#define __isa_port2addr adx_isa_port2addr
81#define __ioremap adx_ioremap
82#define __iounmap adx_iounmap
83
84#endif
85
86#endif /* _ASM_SH_IO_AANDD_H */
diff --git a/include/asm-sh/apm.h b/include/asm-sh/apm.h
new file mode 100644
index 000000000000..8b091e93651f
--- /dev/null
+++ b/include/asm-sh/apm.h
@@ -0,0 +1,46 @@
1/*
2 * Copyright 2006 (c) Andriy Skulysh <askulysh@gmail.com>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 */
9
10#ifndef __ASM_SH_APM_H
11#define __ASM_SH_APM_H
12
13#define APM_AC_OFFLINE 0
14#define APM_AC_ONLINE 1
15#define APM_AC_BACKUP 2
16#define APM_AC_UNKNOWN 0xff
17
18#define APM_BATTERY_STATUS_HIGH 0
19#define APM_BATTERY_STATUS_LOW 1
20#define APM_BATTERY_STATUS_CRITICAL 2
21#define APM_BATTERY_STATUS_CHARGING 3
22#define APM_BATTERY_STATUS_NOT_PRESENT 4
23#define APM_BATTERY_STATUS_UNKNOWN 0xff
24
25#define APM_BATTERY_LIFE_UNKNOWN 0xFFFF
26#define APM_BATTERY_LIFE_MINUTES 0x8000
27#define APM_BATTERY_LIFE_VALUE_MASK 0x7FFF
28
29#define APM_BATTERY_FLAG_HIGH (1 << 0)
30#define APM_BATTERY_FLAG_LOW (1 << 1)
31#define APM_BATTERY_FLAG_CRITICAL (1 << 2)
32#define APM_BATTERY_FLAG_CHARGING (1 << 3)
33#define APM_BATTERY_FLAG_NOT_PRESENT (1 << 7)
34#define APM_BATTERY_FLAG_UNKNOWN 0xff
35
36#define APM_UNITS_MINS 0
37#define APM_UNITS_SECS 1
38#define APM_UNITS_UNKNOWN -1
39
40
41extern int (*apm_get_info)(char *buf, char **start, off_t fpos, int length);
42extern int apm_suspended;
43
44void apm_queue_event(apm_event_t event);
45
46#endif
diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h
index fb627de217f2..8bdc1ba56f73 100644
--- a/include/asm-sh/atomic.h
+++ b/include/asm-sh/atomic.h
@@ -14,6 +14,7 @@ typedef struct { volatile int counter; } atomic_t;
14#define atomic_read(v) ((v)->counter) 14#define atomic_read(v) ((v)->counter)
15#define atomic_set(v,i) ((v)->counter = (i)) 15#define atomic_set(v,i) ((v)->counter = (i))
16 16
17#include <linux/compiler.h>
17#include <asm/system.h> 18#include <asm/system.h>
18 19
19/* 20/*
@@ -21,49 +22,110 @@ typedef struct { volatile int counter; } atomic_t;
21 * forward to code at the end of this object's .text section, then 22 * forward to code at the end of this object's .text section, then
22 * branch back to restart the operation. 23 * branch back to restart the operation.
23 */ 24 */
24 25static inline void atomic_add(int i, atomic_t *v)
25static __inline__ void atomic_add(int i, atomic_t * v)
26{ 26{
27#ifdef CONFIG_CPU_SH4A
28 unsigned long tmp;
29
30 __asm__ __volatile__ (
31"1: movli.l @%3, %0 ! atomic_add \n"
32" add %2, %0 \n"
33" movco.l %0, @%3 \n"
34" bf 1b \n"
35 : "=&z" (tmp), "=r" (&v->counter)
36 : "r" (i), "r" (&v->counter)
37 : "t");
38#else
27 unsigned long flags; 39 unsigned long flags;
28 40
29 local_irq_save(flags); 41 local_irq_save(flags);
30 *(long *)v += i; 42 *(long *)v += i;
31 local_irq_restore(flags); 43 local_irq_restore(flags);
44#endif
32} 45}
33 46
34static __inline__ void atomic_sub(int i, atomic_t *v) 47static inline void atomic_sub(int i, atomic_t *v)
35{ 48{
49#ifdef CONFIG_CPU_SH4A
50 unsigned long tmp;
51
52 __asm__ __volatile__ (
53"1: movli.l @%3, %0 ! atomic_sub \n"
54" sub %2, %0 \n"
55" movco.l %0, @%3 \n"
56" bf 1b \n"
57 : "=&z" (tmp), "=r" (&v->counter)
58 : "r" (i), "r" (&v->counter)
59 : "t");
60#else
36 unsigned long flags; 61 unsigned long flags;
37 62
38 local_irq_save(flags); 63 local_irq_save(flags);
39 *(long *)v -= i; 64 *(long *)v -= i;
40 local_irq_restore(flags); 65 local_irq_restore(flags);
66#endif
41} 67}
42 68
43static __inline__ int atomic_add_return(int i, atomic_t * v) 69/*
70 * SH-4A note:
71 *
72 * We basically get atomic_xxx_return() for free compared with
73 * atomic_xxx(). movli.l/movco.l require r0 due to the instruction
74 * encoding, so the retval is automatically set without having to
75 * do any special work.
76 */
77static inline int atomic_add_return(int i, atomic_t *v)
44{ 78{
45 unsigned long temp, flags; 79 unsigned long temp;
80
81#ifdef CONFIG_CPU_SH4A
82 __asm__ __volatile__ (
83"1: movli.l @%3, %0 ! atomic_add_return \n"
84" add %2, %0 \n"
85" movco.l %0, @%3 \n"
86" bf 1b \n"
87" synco \n"
88 : "=&z" (temp), "=r" (&v->counter)
89 : "r" (i), "r" (&v->counter)
90 : "t");
91#else
92 unsigned long flags;
46 93
47 local_irq_save(flags); 94 local_irq_save(flags);
48 temp = *(long *)v; 95 temp = *(long *)v;
49 temp += i; 96 temp += i;
50 *(long *)v = temp; 97 *(long *)v = temp;
51 local_irq_restore(flags); 98 local_irq_restore(flags);
99#endif
52 100
53 return temp; 101 return temp;
54} 102}
55 103
56#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) 104#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
57 105
58static __inline__ int atomic_sub_return(int i, atomic_t * v) 106static inline int atomic_sub_return(int i, atomic_t *v)
59{ 107{
60 unsigned long temp, flags; 108 unsigned long temp;
109
110#ifdef CONFIG_CPU_SH4A
111 __asm__ __volatile__ (
112"1: movli.l @%3, %0 ! atomic_sub_return \n"
113" sub %2, %0 \n"
114" movco.l %0, @%3 \n"
115" bf 1b \n"
116" synco \n"
117 : "=&z" (temp), "=r" (&v->counter)
118 : "r" (i), "r" (&v->counter)
119 : "t");
120#else
121 unsigned long flags;
61 122
62 local_irq_save(flags); 123 local_irq_save(flags);
63 temp = *(long *)v; 124 temp = *(long *)v;
64 temp -= i; 125 temp -= i;
65 *(long *)v = temp; 126 *(long *)v = temp;
66 local_irq_restore(flags); 127 local_irq_restore(flags);
128#endif
67 129
68 return temp; 130 return temp;
69} 131}
@@ -118,22 +180,48 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
118} 180}
119#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 181#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
120 182
121static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) 183static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
122{ 184{
185#ifdef CONFIG_CPU_SH4A
186 unsigned long tmp;
187
188 __asm__ __volatile__ (
189"1: movli.l @%3, %0 ! atomic_clear_mask \n"
190" and %2, %0 \n"
191" movco.l %0, @%3 \n"
192" bf 1b \n"
193 : "=&z" (tmp), "=r" (&v->counter)
194 : "r" (~mask), "r" (&v->counter)
195 : "t");
196#else
123 unsigned long flags; 197 unsigned long flags;
124 198
125 local_irq_save(flags); 199 local_irq_save(flags);
126 *(long *)v &= ~mask; 200 *(long *)v &= ~mask;
127 local_irq_restore(flags); 201 local_irq_restore(flags);
202#endif
128} 203}
129 204
130static __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v) 205static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
131{ 206{
207#ifdef CONFIG_CPU_SH4A
208 unsigned long tmp;
209
210 __asm__ __volatile__ (
211"1: movli.l @%3, %0 ! atomic_set_mask \n"
212" or %2, %0 \n"
213" movco.l %0, @%3 \n"
214" bf 1b \n"
215 : "=&z" (tmp), "=r" (&v->counter)
216 : "r" (mask), "r" (&v->counter)
217 : "t");
218#else
132 unsigned long flags; 219 unsigned long flags;
133 220
134 local_irq_save(flags); 221 local_irq_save(flags);
135 *(long *)v |= mask; 222 *(long *)v |= mask;
136 local_irq_restore(flags); 223 local_irq_restore(flags);
224#endif
137} 225}
138 226
139/* Atomic operations are already serializing on SH */ 227/* Atomic operations are already serializing on SH */
diff --git a/include/asm-sh/auxvec.h b/include/asm-sh/auxvec.h
index fc21e4db5881..1b6916e63e90 100644
--- a/include/asm-sh/auxvec.h
+++ b/include/asm-sh/auxvec.h
@@ -1,4 +1,18 @@
1#ifndef __ASM_SH_AUXVEC_H 1#ifndef __ASM_SH_AUXVEC_H
2#define __ASM_SH_AUXVEC_H 2#define __ASM_SH_AUXVEC_H
3 3
4/*
5 * Architecture-neutral AT_ values in 0-17, leave some room
6 * for more of them.
7 */
8
9#ifdef CONFIG_VSYSCALL
10/*
11 * Only define this in the vsyscall case, the entry point to
12 * the vsyscall page gets placed here. The kernel will attempt
13 * to build a gate VMA we don't care about otherwise..
14 */
15#define AT_SYSINFO_EHDR 33
16#endif
17
4#endif /* __ASM_SH_AUXVEC_H */ 18#endif /* __ASM_SH_AUXVEC_H */
diff --git a/include/asm-sh/bitops.h b/include/asm-sh/bitops.h
index e34f82508568..1c16792cee1d 100644
--- a/include/asm-sh/bitops.h
+++ b/include/asm-sh/bitops.h
@@ -6,7 +6,7 @@
6/* For __swab32 */ 6/* For __swab32 */
7#include <asm/byteorder.h> 7#include <asm/byteorder.h>
8 8
9static __inline__ void set_bit(int nr, volatile void * addr) 9static inline void set_bit(int nr, volatile void * addr)
10{ 10{
11 int mask; 11 int mask;
12 volatile unsigned int *a = addr; 12 volatile unsigned int *a = addr;
@@ -24,7 +24,7 @@ static __inline__ void set_bit(int nr, volatile void * addr)
24 */ 24 */
25#define smp_mb__before_clear_bit() barrier() 25#define smp_mb__before_clear_bit() barrier()
26#define smp_mb__after_clear_bit() barrier() 26#define smp_mb__after_clear_bit() barrier()
27static __inline__ void clear_bit(int nr, volatile void * addr) 27static inline void clear_bit(int nr, volatile void * addr)
28{ 28{
29 int mask; 29 int mask;
30 volatile unsigned int *a = addr; 30 volatile unsigned int *a = addr;
@@ -37,7 +37,7 @@ static __inline__ void clear_bit(int nr, volatile void * addr)
37 local_irq_restore(flags); 37 local_irq_restore(flags);
38} 38}
39 39
40static __inline__ void change_bit(int nr, volatile void * addr) 40static inline void change_bit(int nr, volatile void * addr)
41{ 41{
42 int mask; 42 int mask;
43 volatile unsigned int *a = addr; 43 volatile unsigned int *a = addr;
@@ -50,7 +50,7 @@ static __inline__ void change_bit(int nr, volatile void * addr)
50 local_irq_restore(flags); 50 local_irq_restore(flags);
51} 51}
52 52
53static __inline__ int test_and_set_bit(int nr, volatile void * addr) 53static inline int test_and_set_bit(int nr, volatile void * addr)
54{ 54{
55 int mask, retval; 55 int mask, retval;
56 volatile unsigned int *a = addr; 56 volatile unsigned int *a = addr;
@@ -66,7 +66,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr)
66 return retval; 66 return retval;
67} 67}
68 68
69static __inline__ int test_and_clear_bit(int nr, volatile void * addr) 69static inline int test_and_clear_bit(int nr, volatile void * addr)
70{ 70{
71 int mask, retval; 71 int mask, retval;
72 volatile unsigned int *a = addr; 72 volatile unsigned int *a = addr;
@@ -82,7 +82,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
82 return retval; 82 return retval;
83} 83}
84 84
85static __inline__ int test_and_change_bit(int nr, volatile void * addr) 85static inline int test_and_change_bit(int nr, volatile void * addr)
86{ 86{
87 int mask, retval; 87 int mask, retval;
88 volatile unsigned int *a = addr; 88 volatile unsigned int *a = addr;
@@ -100,7 +100,7 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr)
100 100
101#include <asm-generic/bitops/non-atomic.h> 101#include <asm-generic/bitops/non-atomic.h>
102 102
103static __inline__ unsigned long ffz(unsigned long word) 103static inline unsigned long ffz(unsigned long word)
104{ 104{
105 unsigned long result; 105 unsigned long result;
106 106
@@ -120,7 +120,7 @@ static __inline__ unsigned long ffz(unsigned long word)
120 * 120 *
121 * Undefined if no bit exists, so code should check against 0 first. 121 * Undefined if no bit exists, so code should check against 0 first.
122 */ 122 */
123static __inline__ unsigned long __ffs(unsigned long word) 123static inline unsigned long __ffs(unsigned long word)
124{ 124{
125 unsigned long result; 125 unsigned long result;
126 126
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index a6de3d06a3d9..b4000c8bf31b 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -32,6 +32,10 @@ static void __init check_bugs(void)
32 case CPU_SH7750 ... CPU_SH4_501: 32 case CPU_SH7750 ... CPU_SH4_501:
33 *p++ = '4'; 33 *p++ = '4';
34 break; 34 break;
35 case CPU_SH7770 ... CPU_SH7781:
36 *p++ = '4';
37 *p++ = 'a';
38 break;
35 default: 39 default:
36 *p++ = '?'; 40 *p++ = '?';
37 *p++ = '!'; 41 *p++ = '!';
diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h
index 656fdfe9e8b4..e3a180cf5062 100644
--- a/include/asm-sh/cache.h
+++ b/include/asm-sh/cache.h
@@ -10,7 +10,6 @@
10#ifdef __KERNEL__ 10#ifdef __KERNEL__
11 11
12#include <asm/cpu/cache.h> 12#include <asm/cpu/cache.h>
13#include <asm/cpu/cacheflush.h>
14 13
15#define SH_CACHE_VALID 1 14#define SH_CACHE_VALID 1
16#define SH_CACHE_UPDATED 2 15#define SH_CACHE_UPDATED 2
@@ -23,24 +22,31 @@
23#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) 22#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
24 23
25struct cache_info { 24struct cache_info {
26 unsigned int ways; 25 unsigned int ways; /* Number of cache ways */
27 unsigned int sets; 26 unsigned int sets; /* Number of cache sets */
28 unsigned int linesz; 27 unsigned int linesz; /* Cache line size (bytes) */
29 28
30 unsigned int way_incr; 29 unsigned int way_size; /* sets * line size */
31 30
31 /*
32 * way_incr is the address offset for accessing the next way
33 * in memory mapped cache array ops.
34 */
35 unsigned int way_incr;
32 unsigned int entry_shift; 36 unsigned int entry_shift;
33 unsigned int entry_mask; 37 unsigned int entry_mask;
34 38
39 /*
40 * Compute a mask which selects the address bits which overlap between
41 * 1. those used to select the cache set during indexing
42 * 2. those in the physical page number.
43 */
44 unsigned int alias_mask;
45
46 unsigned int n_aliases; /* Number of aliases */
47
35 unsigned long flags; 48 unsigned long flags;
36}; 49};
37 50
38/* Flush (write-back only) a region (smaller than a page) */
39extern void __flush_wback_region(void *start, int size);
40/* Flush (write-back & invalidate) a region (smaller than a page) */
41extern void __flush_purge_region(void *start, int size);
42/* Flush (invalidate only) a region (smaller than a page) */
43extern void __flush_invalidate_region(void *start, int size);
44
45#endif /* __KERNEL__ */ 51#endif /* __KERNEL__ */
46#endif /* __ASM_SH_CACHE_H */ 52#endif /* __ASM_SH_CACHE_H */
diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h
index 9dfb33edb008..07f62ec9ff0c 100644
--- a/include/asm-sh/cacheflush.h
+++ b/include/asm-sh/cacheflush.h
@@ -2,6 +2,7 @@
2#define __ASM_SH_CACHEFLUSH_H 2#define __ASM_SH_CACHEFLUSH_H
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#include <linux/mm.h>
5#include <asm/cpu/cacheflush.h> 6#include <asm/cpu/cacheflush.h>
6 7
7/* Flush (write-back only) a region (smaller than a page) */ 8/* Flush (write-back only) a region (smaller than a page) */
@@ -27,5 +28,7 @@ extern void __flush_invalidate_region(void *start, int size);
27 memcpy(dst, src, len); \ 28 memcpy(dst, src, len); \
28 } while (0) 29 } while (0)
29 30
31#define HAVE_ARCH_UNMAPPED_AREA
32
30#endif /* __KERNEL__ */ 33#endif /* __KERNEL__ */
31#endif /* __ASM_SH_CACHEFLUSH_H */ 34#endif /* __ASM_SH_CACHEFLUSH_H */
diff --git a/include/asm-sh/cat68701/io.h b/include/asm-sh/cat68701/io.h
deleted file mode 100644
index 753b8466ad11..000000000000
--- a/include/asm-sh/cat68701/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * include/asm-sh/io_cat68701.h
3 *
4 * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
5 * 2001 Yutarou Ebihar (ebihara@si-linux.com)
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
9 *
10 * IO functions for an AONE Corp. CAT-68701 SH7708 Borad
11 */
12
13#ifndef _ASM_SH_IO_CAT68701_H
14#define _ASM_SH_IO_CAT68701_H
15
16extern unsigned long cat68701_isa_port2addr(unsigned long offset);
17extern int cat68701_irq_demux(int irq);
18
19extern void init_cat68701_IRQ(void);
20extern void heartbeat_cat68701(void);
21
22#endif /* _ASM_SH_IO_CAT68701_H */
diff --git a/include/asm-sh/checksum.h b/include/asm-sh/checksum.h
index fa03b30c4269..08168afe6746 100644
--- a/include/asm-sh/checksum.h
+++ b/include/asm-sh/checksum.h
@@ -159,6 +159,7 @@ static __inline__ unsigned short ip_compute_csum(unsigned char * buff, int len)
159} 159}
160 160
161#define _HAVE_ARCH_IPV6_CSUM 161#define _HAVE_ARCH_IPV6_CSUM
162#ifdef CONFIG_IPV6
162static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, 163static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
163 struct in6_addr *daddr, 164 struct in6_addr *daddr,
164 __u32 len, 165 __u32 len,
@@ -194,6 +195,7 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
194 195
195 return csum_fold(sum); 196 return csum_fold(sum);
196} 197}
198#endif
197 199
198/* 200/*
199 * Copy and checksum to user 201 * Copy and checksum to user
diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h
new file mode 100644
index 000000000000..4bccd7c032f9
--- /dev/null
+++ b/include/asm-sh/cpu-features.h
@@ -0,0 +1,24 @@
1#ifndef __ASM_SH_CPU_FEATURES_H
2#define __ASM_SH_CPU_FEATURES_H
3
4/*
5 * Processor flags
6 *
7 * Note: When adding a new flag, keep cpu_flags[] in
8 * arch/sh/kernel/setup.c in sync so symbolic name
9 * mapping of the processor flags has a chance of being
10 * reasonably accurate.
11 *
12 * These flags are also available through the ELF
13 * auxiliary vector as AT_HWCAP.
14 */
15#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
16#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
17#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
18#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
19#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
20#define CPU_HAS_PTEA 0x0020 /* PTEA register */
21#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */
22#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
23
24#endif /* __ASM_SH_CPU_FEATURES_H */
diff --git a/include/asm-sh/cpu-sh2/shmparam.h b/include/asm-sh/cpu-sh2/shmparam.h
deleted file mode 100644
index 817c1821ee4b..000000000000
--- a/include/asm-sh/cpu-sh2/shmparam.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh2/shmparam.h
3 *
4 * Copyright (C) 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH2_SHMPARAM_H
11#define __ASM_CPU_SH2_SHMPARAM_H
12
13#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
14
15#endif /* __ASM_CPU_SH2_SHMPARAM_H */
16
diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h
index 406aa8d9b947..ffe08d2813f9 100644
--- a/include/asm-sh/cpu-sh3/cache.h
+++ b/include/asm-sh/cpu-sh3/cache.h
@@ -26,12 +26,10 @@
26#define CCR_CACHE_ENABLE CCR_CACHE_CE 26#define CCR_CACHE_ENABLE CCR_CACHE_CE
27#define CCR_CACHE_INVALIDATE CCR_CACHE_CF 27#define CCR_CACHE_INVALIDATE CCR_CACHE_CF
28 28
29#if defined(CONFIG_CPU_SUBTYPE_SH7705) 29#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7710)
30#define CCR3 0xa40000b4 30#define CCR3 0xa40000b4
31#define CCR_CACHE_16KB 0x00010000 31#define CCR_CACHE_16KB 0x00010000
32#define CCR_CACHE_32KB 0x00020000 32#define CCR_CACHE_32KB 0x00020000
33#endif 33#endif
34 34
35
36#endif /* __ASM_CPU_SH3_CACHE_H */ 35#endif /* __ASM_CPU_SH3_CACHE_H */
37
diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h
index f51aed00c68f..03fde97a7fd0 100644
--- a/include/asm-sh/cpu-sh3/cacheflush.h
+++ b/include/asm-sh/cpu-sh3/cacheflush.h
@@ -10,7 +10,7 @@
10#ifndef __ASM_CPU_SH3_CACHEFLUSH_H 10#ifndef __ASM_CPU_SH3_CACHEFLUSH_H
11#define __ASM_CPU_SH3_CACHEFLUSH_H 11#define __ASM_CPU_SH3_CACHEFLUSH_H
12 12
13/* 13/*
14 * Cache flushing: 14 * Cache flushing:
15 * 15 *
16 * - flush_cache_all() flushes entire cache 16 * - flush_cache_all() flushes entire cache
@@ -35,53 +35,33 @@
35 /* 32KB cache, 4kb PAGE sizes need to check bit 12 */ 35 /* 32KB cache, 4kb PAGE sizes need to check bit 12 */
36#define CACHE_ALIAS 0x00001000 36#define CACHE_ALIAS 0x00001000
37 37
38struct page;
39struct mm_struct;
40struct vm_area_struct;
41
42extern void flush_cache_all(void);
43extern void flush_cache_mm(struct mm_struct *mm);
44extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
45 unsigned long end);
46extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
47extern void flush_dcache_page(struct page *pg);
48extern void flush_icache_range(unsigned long start, unsigned long end);
49extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
50
51#define flush_dcache_mmap_lock(mapping) do { } while (0)
52#define flush_dcache_mmap_unlock(mapping) do { } while (0)
53
54/* SH3 has unified cache so no special action needed here */
55#define flush_cache_sigtramp(vaddr) do { } while (0)
56#define flush_page_to_ram(page) do { } while (0)
57#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
58
59#define p3_cache_init() do { } while (0)
60
61#define PG_mapped PG_arch_1 38#define PG_mapped PG_arch_1
62 39
63/* We provide our own get_unmapped_area to avoid cache alias issue */ 40void flush_cache_all(void);
64#define HAVE_ARCH_UNMAPPED_AREA 41void flush_cache_mm(struct mm_struct *mm);
65 42void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
43 unsigned long end);
44void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
45void flush_dcache_page(struct page *pg);
46void flush_icache_range(unsigned long start, unsigned long end);
47void flush_icache_page(struct vm_area_struct *vma, struct page *page);
66#else 48#else
67
68#define flush_cache_all() do { } while (0) 49#define flush_cache_all() do { } while (0)
69#define flush_cache_mm(mm) do { } while (0) 50#define flush_cache_mm(mm) do { } while (0)
70#define flush_cache_range(vma, start, end) do { } while (0) 51#define flush_cache_range(vma, start, end) do { } while (0)
71#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) 52#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
72#define flush_dcache_page(page) do { } while (0) 53#define flush_dcache_page(page) do { } while (0)
73#define flush_dcache_mmap_lock(mapping) do { } while (0)
74#define flush_dcache_mmap_unlock(mapping) do { } while (0)
75#define flush_icache_range(start, end) do { } while (0) 54#define flush_icache_range(start, end) do { } while (0)
76#define flush_icache_page(vma,pg) do { } while (0) 55#define flush_icache_page(vma,pg) do { } while (0)
77#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) 56#endif
78#define flush_cache_sigtramp(vaddr) do { } while (0)
79 57
80#define p3_cache_init() do { } while (0) 58#define flush_dcache_mmap_lock(mapping) do { } while (0)
59#define flush_dcache_mmap_unlock(mapping) do { } while (0)
81 60
82#define HAVE_ARCH_UNMAPPED_AREA 61/* SH3 has unified cache so no special action needed here */
62#define flush_cache_sigtramp(vaddr) do { } while (0)
63#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
83 64
84#endif 65#define p3_cache_init() do { } while (0)
85 66
86#endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ 67#endif /* __ASM_CPU_SH3_CACHEFLUSH_H */
87
diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h
index b61b6e331df0..273f3229785c 100644
--- a/include/asm-sh/cpu-sh3/freq.h
+++ b/include/asm-sh/cpu-sh3/freq.h
@@ -18,5 +18,9 @@
18#define MIN_DIVISOR_NR 0 18#define MIN_DIVISOR_NR 0
19#define MAX_DIVISOR_NR 4 19#define MAX_DIVISOR_NR 4
20 20
21#define FRQCR_CKOEN 0x0100
22#define FRQCR_PLLEN 0x0080
23#define FRQCR_PSTBY 0x0040
24
21#endif /* __ASM_CPU_SH3_FREQ_H */ 25#endif /* __ASM_CPU_SH3_FREQ_H */
22 26
diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h
index a844ea0965b6..bccb7ddb438b 100644
--- a/include/asm-sh/cpu-sh3/mmu_context.h
+++ b/include/asm-sh/cpu-sh3/mmu_context.h
@@ -27,8 +27,12 @@
27#define TRA 0xffffffd0 27#define TRA 0xffffffd0
28#define EXPEVT 0xffffffd4 28#define EXPEVT 0xffffffd4
29 29
30#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 30#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
31 defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) 31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7300) || \
34 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7710)
32#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ 36#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */
33#else 37#else
34#define INTEVT 0xffffffd8 38#define INTEVT 0xffffffd8
diff --git a/include/asm-sh/cpu-sh3/shmparam.h b/include/asm-sh/cpu-sh3/shmparam.h
deleted file mode 100644
index da5b5eec81ee..000000000000
--- a/include/asm-sh/cpu-sh3/shmparam.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh3/shmparam.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH3_SHMPARAM_H
11#define __ASM_CPU_SH3_SHMPARAM_H
12
13#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
14
15#endif /* __ASM_CPU_SH3_SHMPARAM_H */
16
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index 3d8e95e8d10c..b2394cf76f49 100644
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -20,9 +20,14 @@
20 * SH7710 20 * SH7710
21 * SH7720 21 * SH7720
22 * SH7300 22 * SH7300
23 * SH7710
23 * --------------------------------------------------------------------------- 24 * ---------------------------------------------------------------------------
24 */ 25 */
25 26
27#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
28#define TMU_TOCR 0xfffffe90 /* Byte access */
29#endif
30
26#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) 31#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
27#define TMU_TSTR 0xa412fe92 /* Byte access */ 32#define TMU_TSTR 0xa412fe92 /* Byte access */
28 33
@@ -39,9 +44,6 @@
39#define TMU2_TCR 0xa412feb4 /* Word access */ 44#define TMU2_TCR 0xa412feb4 /* Word access */
40 45
41#else 46#else
42#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
43#define TMU_TOCR 0xfffffe90 /* Byte access */
44#endif
45#define TMU_TSTR 0xfffffe92 /* Byte access */ 47#define TMU_TSTR 0xfffffe92 /* Byte access */
46 48
47#define TMU0_TCOR 0xfffffe94 /* Long access */ 49#define TMU0_TCOR 0xfffffe94 /* Long access */
diff --git a/include/asm-sh/cpu-sh3/ubc.h b/include/asm-sh/cpu-sh3/ubc.h
index 0f809dec4e17..9d308cbe9b29 100644
--- a/include/asm-sh/cpu-sh3/ubc.h
+++ b/include/asm-sh/cpu-sh3/ubc.h
@@ -11,6 +11,19 @@
11#ifndef __ASM_CPU_SH3_UBC_H 11#ifndef __ASM_CPU_SH3_UBC_H
12#define __ASM_CPU_SH3_UBC_H 12#define __ASM_CPU_SH3_UBC_H
13 13
14#if defined(CONFIG_CPU_SUBTYPE_SH7710)
15#define UBC_BARA 0xa4ffffb0
16#define UBC_BAMRA 0xa4ffffb4
17#define UBC_BBRA 0xa4ffffb8
18#define UBC_BASRA 0xffffffe4
19#define UBC_BARB 0xa4ffffa0
20#define UBC_BAMRB 0xa4ffffa4
21#define UBC_BBRB 0xa4ffffa8
22#define UBC_BASRB 0xffffffe8
23#define UBC_BDRB 0xa4ffff90
24#define UBC_BDMRB 0xa4ffff94
25#define UBC_BRCR 0xa4ffff98
26#else
14#define UBC_BARA 0xffffffb0 27#define UBC_BARA 0xffffffb0
15#define UBC_BAMRA 0xffffffb4 28#define UBC_BAMRA 0xffffffb4
16#define UBC_BBRA 0xffffffb8 29#define UBC_BBRA 0xffffffb8
@@ -22,6 +35,6 @@
22#define UBC_BDRB 0xffffff90 35#define UBC_BDRB 0xffffff90
23#define UBC_BDMRB 0xffffff94 36#define UBC_BDMRB 0xffffff94
24#define UBC_BRCR 0xffffff98 37#define UBC_BRCR 0xffffff98
38#endif
25 39
26#endif /* __ASM_CPU_SH3_UBC_H */ 40#endif /* __ASM_CPU_SH3_UBC_H */
27
diff --git a/include/asm-sh/cpu-sh4/addrspace.h b/include/asm-sh/cpu-sh4/addrspace.h
index 727634d886ce..bb2e1b03060c 100644
--- a/include/asm-sh/cpu-sh4/addrspace.h
+++ b/include/asm-sh/cpu-sh4/addrspace.h
@@ -22,5 +22,8 @@
22#define P4SEG_TLB_DATA 0xf7000000 22#define P4SEG_TLB_DATA 0xf7000000
23#define P4SEG_REG_BASE 0xff000000 23#define P4SEG_REG_BASE 0xff000000
24 24
25#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
26#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
27
25#endif /* __ASM_CPU_SH4_ADDRSPACE_H */ 28#endif /* __ASM_CPU_SH4_ADDRSPACE_H */
26 29
diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h
index 1fe20359312c..6e9c7e6ee8e4 100644
--- a/include/asm-sh/cpu-sh4/cache.h
+++ b/include/asm-sh/cpu-sh4/cache.h
@@ -22,7 +22,9 @@
22#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ 22#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */
23#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ 23#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
24#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ 24#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
25#ifndef CONFIG_CPU_SUBTYPE_SH7780
25#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ 26#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */
27#endif
26 28
27/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */ 29/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */
28#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE) 30#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE)
diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h
index f323567e085f..515fd574267c 100644
--- a/include/asm-sh/cpu-sh4/cacheflush.h
+++ b/include/asm-sh/cpu-sh4/cacheflush.h
@@ -16,40 +16,29 @@
16 * caching; in which case they're only semi-broken), 16 * caching; in which case they're only semi-broken),
17 * so we need them. 17 * so we need them.
18 */ 18 */
19 19void flush_cache_all(void);
20/* Page is 4K, OC size is 16K, there are four lines. */ 20void flush_cache_mm(struct mm_struct *mm);
21#define CACHE_ALIAS 0x00003000 21void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
22 22 unsigned long end);
23struct page; 23void flush_cache_page(struct vm_area_struct *vma, unsigned long addr,
24struct mm_struct; 24 unsigned long pfn);
25struct vm_area_struct; 25void flush_dcache_page(struct page *pg);
26
27extern void flush_cache_all(void);
28extern void flush_cache_mm(struct mm_struct *mm);
29extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
30 unsigned long end);
31extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
32extern void flush_dcache_page(struct page *pg);
33 26
34#define flush_dcache_mmap_lock(mapping) do { } while (0) 27#define flush_dcache_mmap_lock(mapping) do { } while (0)
35#define flush_dcache_mmap_unlock(mapping) do { } while (0) 28#define flush_dcache_mmap_unlock(mapping) do { } while (0)
36 29
37extern void flush_icache_range(unsigned long start, unsigned long end); 30void flush_icache_range(unsigned long start, unsigned long end);
38extern void flush_cache_sigtramp(unsigned long addr); 31void flush_cache_sigtramp(unsigned long addr);
39extern void flush_icache_user_range(struct vm_area_struct *vma, 32void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
40 struct page *page, unsigned long addr, 33 unsigned long addr, int len);
41 int len);
42 34
43#define flush_icache_page(vma,pg) do { } while (0) 35#define flush_icache_page(vma,pg) do { } while (0)
44 36
45/* Initialization of P3 area for copy_user_page */ 37/* Initialization of P3 area for copy_user_page */
46extern void p3_cache_init(void); 38void p3_cache_init(void);
47 39
48#define PG_mapped PG_arch_1 40#define PG_mapped PG_arch_1
49 41
50/* We provide our own get_unmapped_area to avoid cache alias issue */
51#define HAVE_ARCH_UNMAPPED_AREA
52
53#ifdef CONFIG_MMU 42#ifdef CONFIG_MMU
54extern int remap_area_pages(unsigned long addr, unsigned long phys_addr, 43extern int remap_area_pages(unsigned long addr, unsigned long phys_addr,
55 unsigned long size, unsigned long flags); 44 unsigned long size, unsigned long flags);
@@ -61,4 +50,3 @@ static inline int remap_area_pages(unsigned long addr, unsigned long phys_addr,
61} 50}
62#endif /* CONFIG_MMU */ 51#endif /* CONFIG_MMU */
63#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ 52#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */
64
diff --git a/include/asm-sh/cpu-sh4/dma-sh7780.h b/include/asm-sh/cpu-sh4/dma-sh7780.h
new file mode 100644
index 000000000000..6c90d28331b2
--- /dev/null
+++ b/include/asm-sh/cpu-sh4/dma-sh7780.h
@@ -0,0 +1,39 @@
1#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H
2#define __ASM_SH_CPU_SH4_DMA_SH7780_H
3
4#define REQ_HE 0x000000C0
5#define REQ_H 0x00000080
6#define REQ_LE 0x00000040
7#define TM_BURST 0x0000020
8#define TS_8 0x00000000
9#define TS_16 0x00000008
10#define TS_32 0x00000010
11#define TS_16BLK 0x00000018
12#define TS_32BLK 0x00100000
13
14/*
15 * The SuperH DMAC supports a number of transmit sizes, we list them here,
16 * with their respective values as they appear in the CHCR registers.
17 *
18 * Defaults to a 64-bit transfer size.
19 */
20enum {
21 XMIT_SZ_8BIT,
22 XMIT_SZ_16BIT,
23 XMIT_SZ_32BIT,
24 XMIT_SZ_128BIT,
25 XMIT_SZ_256BIT,
26};
27
28/*
29 * The DMA count is defined as the number of bytes to transfer.
30 */
31static unsigned int __attribute__ ((used)) ts_shift[] = {
32 [XMIT_SZ_8BIT] = 0,
33 [XMIT_SZ_16BIT] = 1,
34 [XMIT_SZ_32BIT] = 2,
35 [XMIT_SZ_128BIT] = 4,
36 [XMIT_SZ_256BIT] = 5,
37};
38
39#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h
index 0dfe61f14802..3e4b3e6d80c0 100644
--- a/include/asm-sh/cpu-sh4/dma.h
+++ b/include/asm-sh/cpu-sh4/dma.h
@@ -1,11 +1,17 @@
1#ifndef __ASM_CPU_SH4_DMA_H 1#ifndef __ASM_CPU_SH4_DMA_H
2#define __ASM_CPU_SH4_DMA_H 2#define __ASM_CPU_SH4_DMA_H
3 3
4#define DMAOR_INIT ( 0x8000 | DMAOR_DME )
5
4#ifdef CONFIG_CPU_SH4A 6#ifdef CONFIG_CPU_SH4A
5#define SH_DMAC_BASE 0xfc808020 7#define SH_DMAC_BASE 0xfc808020
8
9#define CHCR_TS_MASK 0x18
10#define CHCR_TS_SHIFT 3
11
12#include <asm/cpu/dma-sh7780.h>
6#else 13#else
7#define SH_DMAC_BASE 0xffa00000 14#define SH_DMAC_BASE 0xffa00000
8#endif
9 15
10/* Definitions for the SuperH DMAC */ 16/* Definitions for the SuperH DMAC */
11#define TM_BURST 0x0000080 17#define TM_BURST 0x0000080
@@ -19,8 +25,6 @@
19 25
20#define DMAOR_COD 0x00000008 26#define DMAOR_COD 0x00000008
21 27
22#define DMAOR_INIT ( 0x8000 | DMAOR_DME )
23
24/* 28/*
25 * The SuperH DMAC supports a number of transmit sizes, we list them here, 29 * The SuperH DMAC supports a number of transmit sizes, we list them here,
26 * with their respective values as they appear in the CHCR registers. 30 * with their respective values as they appear in the CHCR registers.
@@ -45,5 +49,6 @@ static unsigned int ts_shift[] __attribute__ ((used)) = {
45 [XMIT_SZ_32BIT] = 2, 49 [XMIT_SZ_32BIT] = 2,
46 [XMIT_SZ_256BIT] = 5, 50 [XMIT_SZ_256BIT] = 5,
47}; 51};
52#endif
48 53
49#endif /* __ASM_CPU_SH4_DMA_H */ 54#endif /* __ASM_CPU_SH4_DMA_H */
diff --git a/include/asm-sh/cpu-sh4/shmparam.h b/include/asm-sh/cpu-sh4/shmparam.h
deleted file mode 100644
index a5a0aa9425fe..000000000000
--- a/include/asm-sh/cpu-sh4/shmparam.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh4/shmparam.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH4_SHMPARAM_H
11#define __ASM_CPU_SH4_SHMPARAM_H
12
13/*
14 * SH-4 has D-cache alias issue
15 */
16#define SHMLBA (PAGE_SIZE*4) /* attach addr a multiple of this */
17
18#endif /* __ASM_CPU_SH4_SHMPARAM_H */
19
diff --git a/include/asm-sh/cpu-sh4/sq.h b/include/asm-sh/cpu-sh4/sq.h
index 366b09166d3b..586d6491816a 100644
--- a/include/asm-sh/cpu-sh4/sq.h
+++ b/include/asm-sh/cpu-sh4/sq.h
@@ -17,7 +17,7 @@
17 * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be 17 * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be
18 * mapped to any physical address space. Since data is written (and aligned) 18 * mapped to any physical address space. Since data is written (and aligned)
19 * to 32-byte boundaries, we need to be sure that all allocations are aligned. 19 * to 32-byte boundaries, we need to be sure that all allocations are aligned.
20 */ 20 */
21#define SQ_SIZE 32 21#define SQ_SIZE 32
22#define SQ_ALIGN_MASK (~(SQ_SIZE - 1)) 22#define SQ_ALIGN_MASK (~(SQ_SIZE - 1))
23#define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK) 23#define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK)
@@ -26,23 +26,10 @@
26#define SQ_QACR1 (P4SEG_REG_BASE + 0x3c) 26#define SQ_QACR1 (P4SEG_REG_BASE + 0x3c)
27#define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000) 27#define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000)
28 28
29struct sq_mapping {
30 const char *name;
31
32 unsigned long sq_addr;
33 unsigned long addr;
34 unsigned int size;
35
36 struct list_head list;
37};
38
39/* arch/sh/kernel/cpu/sh4/sq.c */ 29/* arch/sh/kernel/cpu/sh4/sq.c */
40extern struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name); 30unsigned long sq_remap(unsigned long phys, unsigned int size,
41extern void sq_unmap(struct sq_mapping *map); 31 const char *name, unsigned long flags);
42 32void sq_unmap(unsigned long vaddr);
43extern void sq_clear(unsigned long addr, unsigned int len); 33void sq_flush_range(unsigned long start, unsigned int len);
44extern void sq_flush(void *addr);
45extern void sq_flush_range(unsigned long start, unsigned int len);
46 34
47#endif /* __ASM_CPU_SH4_SQ_H */ 35#endif /* __ASM_CPU_SH4_SQ_H */
48
diff --git a/include/asm-sh/cqreek/cqreek.h b/include/asm-sh/cqreek/cqreek.h
deleted file mode 100644
index 09aecc06693e..000000000000
--- a/include/asm-sh/cqreek/cqreek.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef __ASM_SH_CQREEK_CQREEK_H
2#define __ASM_SH_CQREEK_CQREEK_H
3
4#define BRIDGE_FEATURE 0x0002
5
6#define BRIDGE_IDE_CTRL 0x0018
7#define BRIDGE_IDE_INTR_LVL 0x001A
8#define BRIDGE_IDE_INTR_MASK 0x001C
9#define BRIDGE_IDE_INTR_STAT 0x001E
10
11#define BRIDGE_ISA_CTRL 0x0028
12#define BRIDGE_ISA_INTR_LVL 0x002A
13#define BRIDGE_ISA_INTR_MASK 0x002C
14#define BRIDGE_ISA_INTR_STAT 0x002E
15
16/* arch/sh/boards/cqreek/setup.c */
17extern void setup_cqreek(void);
18
19/* arch/sh/boards/cqreek/irq.c */
20extern int cqreek_has_ide, cqreek_has_isa;
21extern void init_cqreek_IRQ(void);
22
23/* arch/sh/boards/cqreek/io.c */
24extern unsigned long cqreek_port2addr(unsigned long port);
25
26#endif /* __ASM_SH_CQREEK_CQREEK_H */
27
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h
index 124968f9866e..56cd4b977232 100644
--- a/include/asm-sh/dma-mapping.h
+++ b/include/asm-sh/dma-mapping.h
@@ -141,25 +141,35 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
141 } 141 }
142} 142}
143 143
144static void dma_sync_single_for_cpu(struct device *dev, 144static inline void dma_sync_single_for_cpu(struct device *dev,
145 dma_addr_t dma_handle, size_t size, 145 dma_addr_t dma_handle, size_t size,
146 enum dma_data_direction dir) 146 enum dma_data_direction dir)
147 __attribute__ ((alias("dma_sync_single"))); 147{
148 dma_sync_single(dev, dma_handle, size, dir);
149}
150
151static inline void dma_sync_single_for_device(struct device *dev,
152 dma_addr_t dma_handle,
153 size_t size,
154 enum dma_data_direction dir)
155{
156 dma_sync_single(dev, dma_handle, size, dir);
157}
148 158
149static void dma_sync_single_for_device(struct device *dev, 159static inline void dma_sync_sg_for_cpu(struct device *dev,
150 dma_addr_t dma_handle, size_t size, 160 struct scatterlist *sg, int nelems,
151 enum dma_data_direction dir) 161 enum dma_data_direction dir)
152 __attribute__ ((alias("dma_sync_single"))); 162{
163 dma_sync_sg(dev, sg, nelems, dir);
164}
153 165
154static void dma_sync_sg_for_cpu(struct device *dev, 166static inline void dma_sync_sg_for_device(struct device *dev,
155 struct scatterlist *sg, int nelems, 167 struct scatterlist *sg, int nelems,
156 enum dma_data_direction dir) 168 enum dma_data_direction dir)
157 __attribute__ ((alias("dma_sync_sg"))); 169{
170 dma_sync_sg(dev, sg, nelems, dir);
171}
158 172
159static void dma_sync_sg_for_device(struct device *dev,
160 struct scatterlist *sg, int nelems,
161 enum dma_data_direction dir)
162 __attribute__ ((alias("dma_sync_sg")));
163 173
164static inline int dma_get_cache_alignment(void) 174static inline int dma_get_cache_alignment(void)
165{ 175{
@@ -174,6 +184,4 @@ static inline int dma_mapping_error(dma_addr_t dma_addr)
174{ 184{
175 return dma_addr == 0; 185 return dma_addr == 0;
176} 186}
177
178#endif /* __ASM_SH_DMA_MAPPING_H */ 187#endif /* __ASM_SH_DMA_MAPPING_H */
179
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h
index e62a6d0ed932..d9daa028689f 100644
--- a/include/asm-sh/dma.h
+++ b/include/asm-sh/dma.h
@@ -89,6 +89,7 @@ struct dma_channel {
89 wait_queue_head_t wait_queue; 89 wait_queue_head_t wait_queue;
90 90
91 struct sys_device dev; 91 struct sys_device dev;
92 char *name;
92}; 93};
93 94
94struct dma_info { 95struct dma_info {
diff --git a/include/asm-sh/dmida/io.h b/include/asm-sh/dmida/io.h
deleted file mode 100644
index 21bd416c01c3..000000000000
--- a/include/asm-sh/dmida/io.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef __ASM_SH_DMIDA_IO_H
2#define __ASM_SH_DMIDA_IO_H
3
4/*
5 * Nothing special here.. just use the generic cchip io routines.
6 */
7#include <asm/hd64465/io.h>
8
9#endif /* __ASM_SH_DMIDA_IO_H */
10
diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h
index 1b63dfeea4f2..3a07ab40ac4d 100644
--- a/include/asm-sh/elf.h
+++ b/include/asm-sh/elf.h
@@ -1,6 +1,11 @@
1#ifndef __ASM_SH_ELF_H 1#ifndef __ASM_SH_ELF_H
2#define __ASM_SH_ELF_H 2#define __ASM_SH_ELF_H
3 3
4#include <asm/processor.h>
5#include <asm/auxvec.h>
6#include <asm/ptrace.h>
7#include <asm/user.h>
8
4/* SH relocation types */ 9/* SH relocation types */
5#define R_SH_NONE 0 10#define R_SH_NONE 0
6#define R_SH_DIR32 1 11#define R_SH_DIR32 1
@@ -46,9 +51,6 @@
46 * ELF register definitions.. 51 * ELF register definitions..
47 */ 52 */
48 53
49#include <asm/ptrace.h>
50#include <asm/user.h>
51
52typedef unsigned long elf_greg_t; 54typedef unsigned long elf_greg_t;
53 55
54#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) 56#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
@@ -91,7 +93,7 @@ typedef struct user_fpu_struct elf_fpregset_t;
91 instruction set this CPU supports. This could be done in user space, 93 instruction set this CPU supports. This could be done in user space,
92 but it's not easy, and we've already done it here. */ 94 but it's not easy, and we've already done it here. */
93 95
94#define ELF_HWCAP (0) 96#define ELF_HWCAP (boot_cpu_data.flags)
95 97
96/* This yields a string that ld.so will use to load implementation 98/* This yields a string that ld.so will use to load implementation
97 specific libraries for optimization. This is more specific in 99 specific libraries for optimization. This is more specific in
@@ -119,4 +121,24 @@ extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
119#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) 121#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
120#endif 122#endif
121 123
124#ifdef CONFIG_VSYSCALL
125/* vDSO has arch_setup_additional_pages */
126#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
127struct linux_binprm;
128extern int arch_setup_additional_pages(struct linux_binprm *bprm,
129 int executable_stack);
130
131extern unsigned int vdso_enabled;
132extern void __kernel_vsyscall;
133
134#define VDSO_BASE ((unsigned long)current->mm->context.vdso)
135#define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x))
136
137#define ARCH_DLINFO \
138do { \
139 if (vdso_enabled) \
140 NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \
141} while (0)
142#endif /* CONFIG_VSYSCALL */
143
122#endif /* __ASM_SH_ELF_H */ 144#endif /* __ASM_SH_ELF_H */
diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h
index 412bccaa07e6..458e9fa59545 100644
--- a/include/asm-sh/fixmap.h
+++ b/include/asm-sh/fixmap.h
@@ -25,7 +25,7 @@
25 * addresses. The point is to have a constant address at 25 * addresses. The point is to have a constant address at
26 * compile time, but to set the physical address only 26 * compile time, but to set the physical address only
27 * in the boot process. We allocate these special addresses 27 * in the boot process. We allocate these special addresses
28 * from the end of virtual memory (0xfffff000) backwards. 28 * from the end of P3 backwards.
29 * Also this lets us do fail-safe vmalloc(), we 29 * Also this lets us do fail-safe vmalloc(), we
30 * can guarantee that these special addresses and 30 * can guarantee that these special addresses and
31 * vmalloc()-ed addresses never overlap. 31 * vmalloc()-ed addresses never overlap.
diff --git a/include/asm-sh/flat.h b/include/asm-sh/flat.h
index f29072e1c87e..0d5cc04ab005 100644
--- a/include/asm-sh/flat.h
+++ b/include/asm-sh/flat.h
@@ -13,7 +13,7 @@
13#define __ASM_SH_FLAT_H 13#define __ASM_SH_FLAT_H
14 14
15#define flat_stack_align(sp) /* nothing needed */ 15#define flat_stack_align(sp) /* nothing needed */
16#define flat_argvp_envp_on_stack() 1 16#define flat_argvp_envp_on_stack() 0
17#define flat_old_ram_flag(flags) (flags) 17#define flat_old_ram_flag(flags) (flags)
18#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) 18#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
19#define flat_get_addr_from_rp(rp, relval, flags) get_unaligned(rp) 19#define flat_get_addr_from_rp(rp, relval, flags) get_unaligned(rp)
diff --git a/include/asm-sh/harp/harp.h b/include/asm-sh/harp/harp.h
deleted file mode 100644
index b2fbcfae9940..000000000000
--- a/include/asm-sh/harp/harp.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Defintions applicable to the STMicroelectronics ST40STB1 HARP and
8 * compatible boards.
9 */
10
11#if defined(CONFIG_SH_STB1_HARP)
12
13#define EPLD_BASE 0xa0800000
14
15#define EPLD_LED (EPLD_BASE+0x000c0000)
16#define EPLD_INTSTAT0 (EPLD_BASE+0x00200000)
17#define EPLD_INTSTAT1 (EPLD_BASE+0x00240000)
18#define EPLD_INTMASK0 (EPLD_BASE+0x00280000)
19#define EPLD_INTMASK1 (EPLD_BASE+0x002c0000)
20#define EPLD_PAGEADDR (EPLD_BASE+0x00300000)
21#define EPLD_REVID1 (EPLD_BASE+0x00380000)
22#define EPLD_REVID2 (EPLD_BASE+0x003c0000)
23
24#define EPLD_LED_ON 1
25#define EPLD_LED_OFF 0
26
27#elif defined(CONFIG_SH_STB1_OVERDRIVE)
28
29#define EPLD_BASE 0xa7000000
30
31#define EPLD_REVID (EPLD_BASE+0x00000000)
32#define EPLD_LED (EPLD_BASE+0x00040000)
33#define EPLD_INTMASK0 (EPLD_BASE+0x001c0000)
34#define EPLD_INTMASK1 (EPLD_BASE+0x00200000)
35#define EPLD_INTSTAT0 (EPLD_BASE+0x00240000)
36#define EPLD_INTSTAT1 (EPLD_BASE+0x00280000)
37
38#define EPLD_LED_ON 0
39#define EPLD_LED_OFF 1
40
41#else
42#error Unknown board
43#endif
diff --git a/include/asm-sh/harp/io.h b/include/asm-sh/harp/io.h
deleted file mode 100644
index 68f39e0b39de..000000000000
--- a/include/asm-sh/harp/io.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef __ASM_SH_HARP_IO_H
2#define __ASM_SH_HARP_IO_H
3
4/*
5 * Nothing special here.. just use the generic cchip io routines.
6 */
7#include <asm/hd64465/io.h>
8
9#endif /* __ASM_SH_HARP_IO_H */
10
diff --git a/include/asm-sh/hd64461/hd64461.h b/include/asm-sh/hd64461.h
index 87f13d24c630..27e5c34e2659 100644
--- a/include/asm-sh/hd64461/hd64461.h
+++ b/include/asm-sh/hd64461.h
@@ -40,7 +40,12 @@
40#define HD64461_LCDCBAR 0x11000 40#define HD64461_LCDCBAR 0x11000
41#define HD64461_LCDCLOR 0x11002 41#define HD64461_LCDCLOR 0x11002
42#define HD64461_LCDCCR 0x11004 42#define HD64461_LCDCCR 0x11004
43#define HD64461_LCDCCR_MOFF 0x80 43#define HD64461_LCDCCR_STBACK 0x0400
44#define HD64461_LCDCCR_STREQ 0x0100
45#define HD64461_LCDCCR_MOFF 0x0080
46#define HD64461_LCDCCR_REFSEL 0x0040
47#define HD64461_LCDCCR_EPON 0x0020
48#define HD64461_LCDCCR_SPON 0x0010
44 49
45#define HD64461_LDR1 0x11010 50#define HD64461_LDR1 0x11010
46#define HD64461_LDR1_DON 0x01 51#define HD64461_LDR1_DON 0x01
@@ -54,9 +59,9 @@
54#define HD64461_LDVSPR 0x1101c 59#define HD64461_LDVSPR 0x1101c
55#define HD64461_LDR3 0x1101e 60#define HD64461_LDR3 0x1101e
56 61
57#define HD64461_CPTWAR 0x11030 62#define HD64461_CPTWAR 0x11030
58#define HD64461_CPTWDR 0x11032 63#define HD64461_CPTWDR 0x11032
59#define HD64461_CPTRAR 0x11034 64#define HD64461_CPTRAR 0x11034
60#define HD64461_CPTRDR 0x11036 65#define HD64461_CPTRDR 0x11036
61 66
62#define HD64461_GRDOR 0x11040 67#define HD64461_GRDOR 0x11040
@@ -111,7 +116,7 @@
111#define HD64461_PCCISR_BVD1 0x01 /* battery 1 */ 116#define HD64461_PCCISR_BVD1 0x01 /* battery 1 */
112 117
113#define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */ 118#define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */
114#define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */ 119#define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */
115#define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */ 120#define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */
116#define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */ 121#define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */
117#define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */ 122#define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */
@@ -139,11 +144,11 @@
139 144
140/* PCC Card Status Change Interrupt Enable Register */ 145/* PCC Card Status Change Interrupt Enable Register */
141#define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */ 146#define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */
142#define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */ 147#define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */
143#define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */ 148#define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */
144#define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */ 149#define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */
145#define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */ 150#define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */
146#define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */ 151#define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */
147 152
148#define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */ 153#define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */
149#define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */ 154#define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */
@@ -155,7 +160,6 @@
155#define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */ 160#define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */
156#define HD64461_PCCSCR_SWP 0x01 /* write protect */ 161#define HD64461_PCCSCR_SWP 0x01 /* write protect */
157 162
158
159#define HD64461_P0OCR 0x1202a 163#define HD64461_P0OCR 0x1202a
160#define HD64461_P1OCR 0x1202c 164#define HD64461_P1OCR 0x1202c
161#define HD64461_PGCR 0x1202e 165#define HD64461_PGCR 0x1202e
@@ -180,23 +184,25 @@
180#define HD64461_NIRR 0x15000 184#define HD64461_NIRR 0x15000
181#define HD64461_NIMR 0x15002 185#define HD64461_NIMR 0x15002
182 186
183#ifndef CONFIG_HD64461_IOBASE
184#define CONFIG_HD64461_IOBASE 0xb0000000
185#endif
186#ifndef CONFIG_HD64461_IRQ
187#define CONFIG_HD64461_IRQ 36
188#endif
189
190#define HD64461_IRQBASE OFFCHIP_IRQ_BASE 187#define HD64461_IRQBASE OFFCHIP_IRQ_BASE
191#define HD64461_IRQ_NUM 16 188#define HD64461_IRQ_NUM 16
192 189
193#define HD64461_IRQ_UART (HD64461_IRQBASE+5) 190#define HD64461_IRQ_UART (HD64461_IRQBASE+5)
194#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6) 191#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6)
195#define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9) 192#define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9)
196#define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10) 193#define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10)
197#define HD64461_IRQ_GPIO (HD64461_IRQBASE+11) 194#define HD64461_IRQ_GPIO (HD64461_IRQBASE+11)
198#define HD64461_IRQ_AFE (HD64461_IRQBASE+12) 195#define HD64461_IRQ_AFE (HD64461_IRQBASE+12)
199#define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13) 196#define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13)
200#define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14) 197#define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14)
198
199#define __IO_PREFIX hd64461
200#include <asm/io_generic.h>
201
202/* arch/sh/cchips/hd6446x/hd64461/setup.c */
203int hd64461_irq_demux(int irq);
204void hd64461_register_irq_demux(int irq,
205 int (*demux) (int irq, void *dev), void *dev);
206void hd64461_unregister_irq_demux(int irq);
201 207
202#endif 208#endif
diff --git a/include/asm-sh/hd64461/io.h b/include/asm-sh/hd64461/io.h
deleted file mode 100644
index 67f2489088d9..000000000000
--- a/include/asm-sh/hd64461/io.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * include/asm-sh/io_hd64461.h
3 *
4 * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * IO functions for an HD64461
10 */
11
12#ifndef _ASM_SH_IO_HD64461_H
13#define _ASM_SH_IO_HD64461_H
14
15extern unsigned char hd64461_inb(unsigned long port);
16extern unsigned short hd64461_inw(unsigned long port);
17extern unsigned int hd64461_inl(unsigned long port);
18
19extern void hd64461_outb(unsigned char value, unsigned long port);
20extern void hd64461_outw(unsigned short value, unsigned long port);
21extern void hd64461_outl(unsigned int value, unsigned long port);
22
23extern unsigned char hd64461_inb_p(unsigned long port);
24extern void hd64461_outb_p(unsigned char value, unsigned long port);
25
26extern void hd64461_insb(unsigned long port, void *addr, unsigned long count);
27extern void hd64461_insw(unsigned long port, void *addr, unsigned long count);
28extern void hd64461_insl(unsigned long port, void *addr, unsigned long count);
29
30extern void hd64461_outsb(unsigned long port, const void *buffer, unsigned long count);
31extern void hd64461_outsw(unsigned long port, const void *buffer, unsigned long count);
32extern void hd64461_outsl(unsigned long port, const void *buffer, unsigned long count);
33
34extern unsigned short hd64461_readw(unsigned long addr);
35extern void hd64461_writew(unsigned short b, unsigned long addr);
36
37
38extern int hd64461_irq_demux(int irq);
39extern void hd64461_register_irq_demux(int irq,
40 int (*demux)(int irq, void *dev), void *dev);
41extern void hd64461_unregister_irq_demux(int irq);
42
43#endif /* _ASM_SH_IO_HD64461_H */
diff --git a/include/asm-sh/hp6xx/hp6xx.h b/include/asm-sh/hp6xx/hp6xx.h
index a26247fd3d87..f35134c159dd 100644
--- a/include/asm-sh/hp6xx/hp6xx.h
+++ b/include/asm-sh/hp6xx/hp6xx.h
@@ -2,16 +2,33 @@
2#define __ASM_SH_HP6XX_H 2#define __ASM_SH_HP6XX_H
3 3
4/* 4/*
5 * Copyright (C) 2003 Andriy Skulysh 5 * Copyright (C) 2003, 2004, 2005 Andriy Skulysh
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
6 */ 11 */
7 12
8#define HP680_TS_IRQ IRQ3_IRQ 13#define HP680_BTN_IRQ IRQ0_IRQ
14#define HP680_TS_IRQ IRQ3_IRQ
15#define HP680_HD64461_IRQ IRQ4_IRQ
9 16
10#define DAC_LCD_BRIGHTNESS 0 17#define DAC_LCD_BRIGHTNESS 0
11#define DAC_SPEAKER_VOLUME 1 18#define DAC_SPEAKER_VOLUME 1
12 19
20#define PGDR_OPENED 0x01
21#define PGDR_MAIN_BATTERY_OUT 0x04
22#define PGDR_PLAY_BUTTON 0x08
23#define PGDR_REWIND_BUTTON 0x10
24#define PGDR_RECORD_BUTTON 0x20
25
13#define PHDR_TS_PEN_DOWN 0x08 26#define PHDR_TS_PEN_DOWN 0x08
14 27
28#define PJDR_LED_BLINK 0x02
29
30#define PKDR_LED_GREEN 0x10
31
15#define SCPDR_TS_SCAN_ENABLE 0x20 32#define SCPDR_TS_SCAN_ENABLE 0x20
16#define SCPDR_TS_SCAN_Y 0x02 33#define SCPDR_TS_SCAN_Y 0x02
17#define SCPDR_TS_SCAN_X 0x01 34#define SCPDR_TS_SCAN_X 0x01
@@ -21,11 +38,43 @@
21 38
22#define ADC_CHANNEL_TS_Y 1 39#define ADC_CHANNEL_TS_Y 1
23#define ADC_CHANNEL_TS_X 2 40#define ADC_CHANNEL_TS_X 2
41#define ADC_CHANNEL_BATTERY 3
42#define ADC_CHANNEL_BACKUP 4
43#define ADC_CHANNEL_CHARGE 5
24 44
25#define HD64461_GPADR_SPEAKER 0x01 45#define HD64461_GPADR_SPEAKER 0x01
26#define HD64461_GPADR_PCMCIA0 (0x02|0x08) 46#define HD64461_GPADR_PCMCIA0 (0x02|0x08)
47
27#define HD64461_GPBDR_LCDOFF 0x01 48#define HD64461_GPBDR_LCDOFF 0x01
49#define HD64461_GPBDR_LCD_CONTRAST_MASK 0x78
28#define HD64461_GPBDR_LED_RED 0x80 50#define HD64461_GPBDR_LED_RED 0x80
29 51
52#include <asm/hd64461.h>
53#include <asm/io.h>
54
55#define PJDR 0xa4000130
56#define PKDR 0xa4000132
57
58static inline void hp6xx_led_red(int on)
59{
60 u16 v16;
61 v16 = ctrl_inw(CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
62 if (on)
63 ctrl_outw(v16 & (~HD64461_GPBDR_LED_RED), CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
64 else
65 ctrl_outw(v16 | HD64461_GPBDR_LED_RED, CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
66}
67
68static inline void hp6xx_led_green(int on)
69{
70 u8 v8;
71
72 v8 = ctrl_inb(PKDR);
73 if (on)
74 ctrl_outb(v8 & (~PKDR_LED_GREEN), PKDR);
75 else
76 ctrl_outb(v8 | PKDR_LED_GREEN, PKDR);
77}
78
30 79
31#endif /* __ASM_SH_HP6XX_H */ 80#endif /* __ASM_SH_HP6XX_H */
diff --git a/include/asm-sh/hp6xx/io.h b/include/asm-sh/hp6xx/io.h
index 731798003550..2044476ab199 100644
--- a/include/asm-sh/hp6xx/io.h
+++ b/include/asm-sh/hp6xx/io.h
@@ -4,7 +4,7 @@
4/* 4/*
5 * Nothing special here.. just use the generic cchip io routines. 5 * Nothing special here.. just use the generic cchip io routines.
6 */ 6 */
7#include <asm/hd64461/io.h> 7#include <asm/hd64461.h>
8 8
9#endif /* __ASM_SH_HP6XX_IO_H */ 9#endif /* __ASM_SH_HP6XX_IO_H */
10 10
diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h
index 5f995f937a44..c4cff9d33927 100644
--- a/include/asm-sh/hs7751rvoip/hs7751rvoip.h
+++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h
@@ -19,8 +19,6 @@
19#define PA_OUTPORTR 0xa400000e /* Output Port Reguster */ 19#define PA_OUTPORTR 0xa400000e /* Output Port Reguster */
20#define PA_VERREG 0xa4000014 /* FPGA Version Register */ 20#define PA_VERREG 0xa4000014 /* FPGA Version Register */
21 21
22#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
23#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
24#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ 22#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
25 23
26#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ 24#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
@@ -44,4 +42,13 @@
44#define IRQ_RINGING 4 /* Ringing IRQ */ 42#define IRQ_RINGING 4 /* Ringing IRQ */
45#define IRQ_CODEC 5 /* CODEC IRQ */ 43#define IRQ_CODEC 5 /* CODEC IRQ */
46 44
45#define __IO_PREFIX hs7751rvoip
46#include <asm/io_generic.h>
47
48/* arch/sh/boards/renesas/hs7751rvoip/irq.c */
49void init_hs7751rvoip_IRQ(void);
50
51/* arch/sh/boards/renesas/hs7751rvoip/io.c */
52void *hs7751rvoip_ioremap(unsigned long, unsigned long);
53
47#endif /* __ASM_SH_RENESAS_HS7751RVOIP */ 54#endif /* __ASM_SH_RENESAS_HS7751RVOIP */
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index 894e64b2d5f0..ed12d38e8c00 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -107,6 +107,9 @@
107#define __raw_writew(v, a) __writew(v, (void __iomem *)(a)) 107#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
108#define __raw_writel(v, a) __writel(v, (void __iomem *)(a)) 108#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
109 109
110void __raw_writesl(unsigned long addr, const void *data, int longlen);
111void __raw_readsl(unsigned long addr, void *data, int longlen);
112
110/* 113/*
111 * The platform header files may define some of these macros to use 114 * The platform header files may define some of these macros to use
112 * the inlined versions where appropriate. These macros may also be 115 * the inlined versions where appropriate. These macros may also be
@@ -132,6 +135,9 @@
132# define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) 135# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
133#endif 136#endif
134 137
138#define writesl __raw_writesl
139#define readsl __raw_readsl
140
135#define readb_relaxed(a) readb(a) 141#define readb_relaxed(a) readb(a)
136#define readw_relaxed(a) readw(a) 142#define readw_relaxed(a) readw(a)
137#define readl_relaxed(a) readl(a) 143#define readl_relaxed(a) readl(a)
@@ -209,8 +215,14 @@ static inline void ctrl_outl(unsigned int b, unsigned long addr)
209 *(volatile unsigned long*)addr = b; 215 *(volatile unsigned long*)addr = b;
210} 216}
211 217
218static inline void ctrl_delay(void)
219{
220 ctrl_inw(P2SEG);
221}
222
212#define IO_SPACE_LIMIT 0xffffffff 223#define IO_SPACE_LIMIT 0xffffffff
213 224
225#ifdef CONFIG_MMU
214/* 226/*
215 * Change virtual addresses to physical addresses and vv. 227 * Change virtual addresses to physical addresses and vv.
216 * These are trivial on the 1:1 Linux/SuperH mapping 228 * These are trivial on the 1:1 Linux/SuperH mapping
@@ -224,6 +236,10 @@ static inline void *phys_to_virt(unsigned long address)
224{ 236{
225 return (void *)P1SEGADDR(address); 237 return (void *)P1SEGADDR(address);
226} 238}
239#else
240#define phys_to_virt(address) ((void *)(address))
241#define virt_to_phys(address) ((unsigned long)(address))
242#endif
227 243
228#define virt_to_bus virt_to_phys 244#define virt_to_bus virt_to_phys
229#define bus_to_virt phys_to_virt 245#define bus_to_virt phys_to_virt
diff --git a/include/asm-sh/irq-sh73180.h b/include/asm-sh/irq-sh73180.h
index d705252be260..b28af9a69d72 100644
--- a/include/asm-sh/irq-sh73180.h
+++ b/include/asm-sh/irq-sh73180.h
@@ -311,6 +311,4 @@
311#define IRQ6_PRIORITY 1 311#define IRQ6_PRIORITY 1
312#define IRQ7_PRIORITY 1 312#define IRQ7_PRIORITY 1
313 313
314int shmse_irq_demux(int irq);
315
316#endif /* __ASM_SH_IRQ_SH73180_H */ 314#endif /* __ASM_SH_IRQ_SH73180_H */
diff --git a/include/asm-sh/irq-sh7343.h b/include/asm-sh/irq-sh7343.h
new file mode 100644
index 000000000000..5d15419b53b0
--- /dev/null
+++ b/include/asm-sh/irq-sh7343.h
@@ -0,0 +1,317 @@
1#ifndef __ASM_SH_IRQ_SH7343_H
2#define __ASM_SH_IRQ_SH7343_H
3
4/*
5 * linux/include/asm-sh/irq-sh7343.h
6 *
7 * Copyright (C) 2006 Kenati Technologies Inc.
8 * Andre Mccurdy <andre@kenati.com>
9 * Ranjit Deshpande <ranjit@kenati.com>
10 */
11
12#undef INTC_IPRA
13#undef INTC_IPRB
14#undef INTC_IPRC
15#undef INTC_IPRD
16
17#undef DMTE0_IRQ
18#undef DMTE1_IRQ
19#undef DMTE2_IRQ
20#undef DMTE3_IRQ
21#undef DMTE4_IRQ
22#undef DMTE5_IRQ
23#undef DMTE6_IRQ
24#undef DMTE7_IRQ
25#undef DMAE_IRQ
26#undef DMA_IPR_ADDR
27#undef DMA_IPR_POS
28#undef DMA_PRIORITY
29
30#undef INTC_IMCR0
31#undef INTC_IMCR1
32#undef INTC_IMCR2
33#undef INTC_IMCR3
34#undef INTC_IMCR4
35#undef INTC_IMCR5
36#undef INTC_IMCR6
37#undef INTC_IMCR7
38#undef INTC_IMCR8
39#undef INTC_IMCR9
40#undef INTC_IMCR10
41
42
43#define INTC_IPRA 0xA4080000UL
44#define INTC_IPRB 0xA4080004UL
45#define INTC_IPRC 0xA4080008UL
46#define INTC_IPRD 0xA408000CUL
47#define INTC_IPRE 0xA4080010UL
48#define INTC_IPRF 0xA4080014UL
49#define INTC_IPRG 0xA4080018UL
50#define INTC_IPRH 0xA408001CUL
51#define INTC_IPRI 0xA4080020UL
52#define INTC_IPRJ 0xA4080024UL
53#define INTC_IPRK 0xA4080028UL
54#define INTC_IPRL 0xA408002CUL
55
56#define INTC_IMR0 0xA4080080UL
57#define INTC_IMR1 0xA4080084UL
58#define INTC_IMR2 0xA4080088UL
59#define INTC_IMR3 0xA408008CUL
60#define INTC_IMR4 0xA4080090UL
61#define INTC_IMR5 0xA4080094UL
62#define INTC_IMR6 0xA4080098UL
63#define INTC_IMR7 0xA408009CUL
64#define INTC_IMR8 0xA40800A0UL
65#define INTC_IMR9 0xA40800A4UL
66#define INTC_IMR10 0xA40800A8UL
67#define INTC_IMR11 0xA40800ACUL
68
69#define INTC_IMCR0 0xA40800C0UL
70#define INTC_IMCR1 0xA40800C4UL
71#define INTC_IMCR2 0xA40800C8UL
72#define INTC_IMCR3 0xA40800CCUL
73#define INTC_IMCR4 0xA40800D0UL
74#define INTC_IMCR5 0xA40800D4UL
75#define INTC_IMCR6 0xA40800D8UL
76#define INTC_IMCR7 0xA40800DCUL
77#define INTC_IMCR8 0xA40800E0UL
78#define INTC_IMCR9 0xA40800E4UL
79#define INTC_IMCR10 0xA40800E8UL
80#define INTC_IMCR11 0xA40800ECUL
81
82#define INTC_ICR0 0xA4140000UL
83#define INTC_ICR1 0xA414001CUL
84
85#define INTMSK0 0xa4140044
86#define INTMSKCLR0 0xa4140064
87#define INTC_INTPRI0 0xa4140010
88
89/*
90 NOTE:
91
92 *_IRQ = (INTEVT2 - 0x200)/0x20
93*/
94
95/* TMU0 */
96#define TMU0_IRQ 16
97#define TMU0_IPR_ADDR INTC_IPRA
98#define TMU0_IPR_POS 3
99#define TMU0_PRIORITY 2
100
101#define TIMER_IRQ 16
102#define TIMER_IPR_ADDR INTC_IPRA
103#define TIMER_IPR_POS 3
104#define TIMER_PRIORITY 2
105
106/* TMU1 */
107#define TMU1_IRQ 17
108#define TMU1_IPR_ADDR INTC_IPRA
109#define TMU1_IPR_POS 2
110#define TMU1_PRIORITY 2
111
112/* TMU2 */
113#define TMU2_IRQ 18
114#define TMU2_IPR_ADDR INTC_IPRA
115#define TMU2_IPR_POS 1
116#define TMU2_PRIORITY 2
117
118/* LCDC */
119#define LCDC_IRQ 28
120#define LCDC_IPR_ADDR INTC_IPRB
121#define LCDC_IPR_POS 2
122#define LCDC_PRIORITY 2
123
124/* VIO (Video I/O) */
125#define CEU_IRQ 52
126#define BEU_IRQ 53
127#define VEU_IRQ 54
128#define VOU_IRQ 55
129#define VIO_IPR_ADDR INTC_IPRE
130#define VIO_IPR_POS 2
131#define VIO_PRIORITY 2
132
133/* MFI (Multi Functional Interface) */
134#define MFI_IRQ 56
135#define MFI_IPR_ADDR INTC_IPRE
136#define MFI_IPR_POS 1
137#define MFI_PRIORITY 2
138
139/* VPU (Video Processing Unit) */
140#define VPU_IRQ 60
141#define VPU_IPR_ADDR INTC_IPRE
142#define VPU_IPR_POS 0
143#define VPU_PRIORITY 2
144
145/* 3DG */
146#define TDG_IRQ 63
147#define TDG_IPR_ADDR INTC_IPRJ
148#define TDG_IPR_POS 2
149#define TDG_PRIORITY 2
150
151/* DMAC(1) */
152#define DMTE0_IRQ 48
153#define DMTE1_IRQ 49
154#define DMTE2_IRQ 50
155#define DMTE3_IRQ 51
156#define DMA1_IPR_ADDR INTC_IPRE
157#define DMA1_IPR_POS 3
158#define DMA1_PRIORITY 7
159
160/* DMAC(2) */
161#define DMTE4_IRQ 76
162#define DMTE5_IRQ 77
163#define DMA2_IPR_ADDR INTC_IPRF
164#define DMA2_IPR_POS 2
165#define DMA2_PRIORITY 7
166
167/* SCIF0 */
168#define SCIF_ERI_IRQ 80
169#define SCIF_RXI_IRQ 81
170#define SCIF_BRI_IRQ 82
171#define SCIF_TXI_IRQ 83
172#define SCIF_IPR_ADDR INTC_IPRG
173#define SCIF_IPR_POS 3
174#define SCIF_PRIORITY 3
175
176/* SIOF0 */
177#define SIOF0_IRQ 84
178#define SIOF0_IPR_ADDR INTC_IPRH
179#define SIOF0_IPR_POS 3
180#define SIOF0_PRIORITY 3
181
182/* FLCTL (Flash Memory Controller) */
183#define FLSTE_IRQ 92
184#define FLTEND_IRQ 93
185#define FLTRQ0_IRQ 94
186#define FLTRQ1_IRQ 95
187#define FLCTL_IPR_ADDR INTC_IPRH
188#define FLCTL_IPR_POS 1
189#define FLCTL_PRIORITY 3
190
191/* IIC(0) (IIC Bus Interface) */
192#define IIC0_ALI_IRQ 96
193#define IIC0_TACKI_IRQ 97
194#define IIC0_WAITI_IRQ 98
195#define IIC0_DTEI_IRQ 99
196#define IIC0_IPR_ADDR INTC_IPRH
197#define IIC0_IPR_POS 0
198#define IIC0_PRIORITY 3
199
200/* IIC(1) (IIC Bus Interface) */
201#define IIC1_ALI_IRQ 44
202#define IIC1_TACKI_IRQ 45
203#define IIC1_WAITI_IRQ 46
204#define IIC1_DTEI_IRQ 47
205#define IIC1_IPR_ADDR INTC_IPRI
206#define IIC1_IPR_POS 0
207#define IIC1_PRIORITY 3
208
209/* SIO0 */
210#define SIO0_IRQ 88
211#define SIO0_IPR_ADDR INTC_IPRI
212#define SIO0_IPR_POS 3
213#define SIO0_PRIORITY 3
214
215/* SDHI */
216#define SDHI_SDHII0_IRQ 100
217#define SDHI_SDHII1_IRQ 101
218#define SDHI_SDHII2_IRQ 102
219#define SDHI_SDHII3_IRQ 103
220#define SDHI_IPR_ADDR INTC_IPRK
221#define SDHI_IPR_POS 0
222#define SDHI_PRIORITY 3
223
224/* SIU (Sound Interface Unit) */
225#define SIU_IRQ 108
226#define SIU_IPR_ADDR INTC_IPRJ
227#define SIU_IPR_POS 1
228#define SIU_PRIORITY 3
229
230#define PORT_PACR 0xA4050100UL
231#define PORT_PBCR 0xA4050102UL
232#define PORT_PCCR 0xA4050104UL
233#define PORT_PDCR 0xA4050106UL
234#define PORT_PECR 0xA4050108UL
235#define PORT_PFCR 0xA405010AUL
236#define PORT_PGCR 0xA405010CUL
237#define PORT_PHCR 0xA405010EUL
238#define PORT_PJCR 0xA4050110UL
239#define PORT_PKCR 0xA4050112UL
240#define PORT_PLCR 0xA4050114UL
241#define PORT_SCPCR 0xA4050116UL
242#define PORT_PMCR 0xA4050118UL
243#define PORT_PNCR 0xA405011AUL
244#define PORT_PQCR 0xA405011CUL
245#define PORT_PRCR 0xA405011EUL
246#define PORT_PTCR 0xA405014CUL
247#define PORT_PUCR 0xA405014EUL
248#define PORT_PVCR 0xA4050150UL
249
250#define PORT_PSELA 0xA4050140UL
251#define PORT_PSELB 0xA4050142UL
252#define PORT_PSELC 0xA4050144UL
253#define PORT_PSELE 0xA4050158UL
254
255#define PORT_HIZCRA 0xA4050146UL
256#define PORT_HIZCRB 0xA4050148UL
257#define PORT_DRVCR 0xA405014AUL
258
259#define PORT_PADR 0xA4050120UL
260#define PORT_PBDR 0xA4050122UL
261#define PORT_PCDR 0xA4050124UL
262#define PORT_PDDR 0xA4050126UL
263#define PORT_PEDR 0xA4050128UL
264#define PORT_PFDR 0xA405012AUL
265#define PORT_PGDR 0xA405012CUL
266#define PORT_PHDR 0xA405012EUL
267#define PORT_PJDR 0xA4050130UL
268#define PORT_PKDR 0xA4050132UL
269#define PORT_PLDR 0xA4050134UL
270#define PORT_SCPDR 0xA4050136UL
271#define PORT_PMDR 0xA4050138UL
272#define PORT_PNDR 0xA405013AUL
273#define PORT_PQDR 0xA405013CUL
274#define PORT_PRDR 0xA405013EUL
275#define PORT_PTDR 0xA405016CUL
276#define PORT_PUDR 0xA405016EUL
277#define PORT_PVDR 0xA4050170UL
278
279#define IRQ0_IRQ 32
280#define IRQ1_IRQ 33
281#define IRQ2_IRQ 34
282#define IRQ3_IRQ 35
283#define IRQ4_IRQ 36
284#define IRQ5_IRQ 37
285#define IRQ6_IRQ 38
286#define IRQ7_IRQ 39
287
288#define INTPRI00 0xA4140010UL
289
290#define IRQ0_IPR_ADDR INTPRI00
291#define IRQ1_IPR_ADDR INTPRI00
292#define IRQ2_IPR_ADDR INTPRI00
293#define IRQ3_IPR_ADDR INTPRI00
294#define IRQ4_IPR_ADDR INTPRI00
295#define IRQ5_IPR_ADDR INTPRI00
296#define IRQ6_IPR_ADDR INTPRI00
297#define IRQ7_IPR_ADDR INTPRI00
298
299#define IRQ0_IPR_POS 7
300#define IRQ1_IPR_POS 6
301#define IRQ2_IPR_POS 5
302#define IRQ3_IPR_POS 4
303#define IRQ4_IPR_POS 3
304#define IRQ5_IPR_POS 2
305#define IRQ6_IPR_POS 1
306#define IRQ7_IPR_POS 0
307
308#define IRQ0_PRIORITY 1
309#define IRQ1_PRIORITY 1
310#define IRQ2_PRIORITY 1
311#define IRQ3_PRIORITY 1
312#define IRQ4_PRIORITY 1
313#define IRQ5_PRIORITY 1
314#define IRQ6_PRIORITY 1
315#define IRQ7_PRIORITY 1
316
317#endif /* __ASM_SH_IRQ_SH7343_H */
diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h
index 7f90315cd830..895c5780e454 100644
--- a/include/asm-sh/irq-sh7780.h
+++ b/include/asm-sh/irq-sh7780.h
@@ -145,11 +145,6 @@
145#define TMU_CH5_IPR_POS 1 145#define TMU_CH5_IPR_POS 1
146#define TMU_CH5_PRIORITY 2 146#define TMU_CH5_PRIORITY 2
147 147
148#define RTC_IRQ 22
149#define RTC_IPR_ADDR INTC_INT2PRI1
150#define RTC_IPR_POS 0
151#define RTC_PRIORITY TIMER_PRIORITY
152
153/* SCIF0 */ 148/* SCIF0 */
154#define SCIF0_ERI_IRQ 40 149#define SCIF0_ERI_IRQ 40
155#define SCIF0_RXI_IRQ 41 150#define SCIF0_RXI_IRQ 41
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h
index 611e67cd0627..0e5f365aff70 100644
--- a/include/asm-sh/irq.h
+++ b/include/asm-sh/irq.h
@@ -192,7 +192,7 @@
192 192
193#if defined (CONFIG_CPU_SUBTYPE_SH7707) || defined (CONFIG_CPU_SUBTYPE_SH7708) || \ 193#if defined (CONFIG_CPU_SUBTYPE_SH7707) || defined (CONFIG_CPU_SUBTYPE_SH7708) || \
194 defined (CONFIG_CPU_SUBTYPE_SH7709) || defined (CONFIG_CPU_SUBTYPE_SH7750) || \ 194 defined (CONFIG_CPU_SUBTYPE_SH7709) || defined (CONFIG_CPU_SUBTYPE_SH7750) || \
195 defined (CONFIG_CPU_SUBTYPE_SH7751) 195 defined (CONFIG_CPU_SUBTYPE_SH7751) || defined (CONFIG_CPU_SUBTYPE_SH7706)
196#define SCI_ERI_IRQ 23 196#define SCI_ERI_IRQ 23
197#define SCI_RXI_IRQ 24 197#define SCI_RXI_IRQ 24
198#define SCI_TXI_IRQ 25 198#define SCI_TXI_IRQ 25
@@ -207,6 +207,7 @@
207#define SCIF0_IPR_POS 3 207#define SCIF0_IPR_POS 3
208#define SCIF0_PRIORITY 3 208#define SCIF0_PRIORITY 3
209#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 209#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
210 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
210 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 211 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
211 defined(CONFIG_CPU_SUBTYPE_SH7709) 212 defined(CONFIG_CPU_SUBTYPE_SH7709)
212#define SCIF_ERI_IRQ 56 213#define SCIF_ERI_IRQ 56
@@ -261,9 +262,12 @@
261#elif defined(CONFIG_CPU_SUBTYPE_SH7708) 262#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
262# define ONCHIP_NR_IRQS 32 263# define ONCHIP_NR_IRQS 32
263#elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 264#elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \
265 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
264 defined(CONFIG_CPU_SUBTYPE_SH7705) 266 defined(CONFIG_CPU_SUBTYPE_SH7705)
265# define ONCHIP_NR_IRQS 64 // Actually 61 267# define ONCHIP_NR_IRQS 64 // Actually 61
266# define PINT_NR_IRQS 16 268# define PINT_NR_IRQS 16
269#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
270# define ONCHIP_NR_IRQS 104
267#elif defined(CONFIG_CPU_SUBTYPE_SH7750) 271#elif defined(CONFIG_CPU_SUBTYPE_SH7750)
268# define ONCHIP_NR_IRQS 48 // Actually 44 272# define ONCHIP_NR_IRQS 48 // Actually 44
269#elif defined(CONFIG_CPU_SUBTYPE_SH7751) 273#elif defined(CONFIG_CPU_SUBTYPE_SH7751)
@@ -275,7 +279,8 @@
275#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) 279#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
276# define ONCHIP_NR_IRQS 144 280# define ONCHIP_NR_IRQS 144
277#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ 281#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
278 defined(CONFIG_CPU_SUBTYPE_SH73180) 282 defined(CONFIG_CPU_SUBTYPE_SH73180) || \
283 defined(CONFIG_CPU_SUBTYPE_SH7343)
279# define ONCHIP_NR_IRQS 109 284# define ONCHIP_NR_IRQS 109
280#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 285#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
281# define ONCHIP_NR_IRQS 111 286# define ONCHIP_NR_IRQS 111
@@ -311,6 +316,8 @@
311# define OFFCHIP_NR_IRQS 4 316# define OFFCHIP_NR_IRQS 4
312#elif defined(CONFIG_SH_R7780RP) 317#elif defined(CONFIG_SH_R7780RP)
313# define OFFCHIP_NR_IRQS 16 318# define OFFCHIP_NR_IRQS 16
319#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE)
320# define OFFCHIP_NR_IRQS 12
314#elif defined(CONFIG_SH_UNKNOWN) 321#elif defined(CONFIG_SH_UNKNOWN)
315# define OFFCHIP_NR_IRQS 16 /* Must also be last */ 322# define OFFCHIP_NR_IRQS 16 /* Must also be last */
316#else 323#else
@@ -335,6 +342,11 @@ extern void make_maskreg_irq(unsigned int irq);
335extern unsigned short *irq_mask_register; 342extern unsigned short *irq_mask_register;
336 343
337/* 344/*
345 * PINT IRQs
346 */
347void init_IRQ_pint(void);
348
349/*
338 * Function for "on chip support modules". 350 * Function for "on chip support modules".
339 */ 351 */
340extern void make_ipr_irq(unsigned int irq, unsigned int addr, 352extern void make_ipr_irq(unsigned int irq, unsigned int addr,
@@ -471,8 +483,10 @@ extern int ipr_irq_demux(int irq);
471 483
472#define INTC_ICR 0xfffffee0UL 484#define INTC_ICR 0xfffffee0UL
473#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 485#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
486 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
474 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 487 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
475 defined(CONFIG_CPU_SUBTYPE_SH7709) 488 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
489 defined(CONFIG_CPU_SUBTYPE_SH7710)
476#define INTC_IRR0 0xa4000004UL 490#define INTC_IRR0 0xa4000004UL
477#define INTC_IRR1 0xa4000006UL 491#define INTC_IRR1 0xa4000006UL
478#define INTC_IRR2 0xa4000008UL 492#define INTC_IRR2 0xa4000008UL
@@ -491,8 +505,105 @@ extern int ipr_irq_demux(int irq);
491#define INTC_IPRF 0xa4080000UL 505#define INTC_IPRF 0xa4080000UL
492#define INTC_IPRG 0xa4080002UL 506#define INTC_IPRG 0xa4080002UL
493#define INTC_IPRH 0xa4080004UL 507#define INTC_IPRH 0xa4080004UL
494#endif 508#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
509/* Interrupt Controller Registers */
510#undef INTC_IPRA
511#undef INTC_IPRB
512#define INTC_IPRA 0xA414FEE2UL
513#define INTC_IPRB 0xA414FEE4UL
514#define INTC_IPRF 0xA4080000UL
515#define INTC_IPRG 0xA4080002UL
516#define INTC_IPRH 0xA4080004UL
517#define INTC_IPRI 0xA4080006UL
518
519#undef INTC_ICR0
520#undef INTC_ICR1
521#define INTC_ICR0 0xA414FEE0UL
522#define INTC_ICR1 0xA4140010UL
523
524#define INTC_IRR0 0xa4000004UL
525#define INTC_IRR1 0xa4000006UL
526#define INTC_IRR2 0xa4000008UL
527#define INTC_IRR3 0xa400000AUL
528#define INTC_IRR4 0xa400000CUL
529#define INTC_IRR5 0xa4080020UL
530#define INTC_IRR7 0xa4080024UL
531#define INTC_IRR8 0xa4080026UL
532
533/* Interrupt numbers */
534#define TIMER2_IRQ 18
535#define TIMER2_IPR_ADDR INTC_IPRA
536#define TIMER2_IPR_POS 1
537#define TIMER2_PRIORITY 2
538
539/* WDT */
540#define WDT_IRQ 27
541#define WDT_IPR_ADDR INTC_IPRB
542#define WDT_IPR_POS 3
543#define WDT_PRIORITY 2
544
545#define SCIF0_ERI_IRQ 52
546#define SCIF0_RXI_IRQ 53
547#define SCIF0_BRI_IRQ 54
548#define SCIF0_TXI_IRQ 55
549#define SCIF0_IPR_ADDR INTC_IPRE
550#define SCIF0_IPR_POS 2
551#define SCIF0_PRIORITY 3
552
553#define DMTE4_IRQ 76
554#define DMTE5_IRQ 77
555#define DMA2_IPR_ADDR INTC_IPRF
556#define DMA2_IPR_POS 2
557#define DMA2_PRIORITY 7
495 558
559#define IPSEC_IRQ 79
560#define IPSEC_IPR_ADDR INTC_IPRF
561#define IPSEC_IPR_POS 3
562#define IPSEC_PRIORITY 3
563
564/* EDMAC */
565#define EDMAC0_IRQ 80
566#define EDMAC0_IPR_ADDR INTC_IPRG
567#define EDMAC0_IPR_POS 3
568#define EDMAC0_PRIORITY 3
569
570#define EDMAC1_IRQ 81
571#define EDMAC1_IPR_ADDR INTC_IPRG
572#define EDMAC1_IPR_POS 2
573#define EDMAC1_PRIORITY 3
574
575#define EDMAC2_IRQ 82
576#define EDMAC2_IPR_ADDR INTC_IPRG
577#define EDMAC2_IPR_POS 1
578#define EDMAC2_PRIORITY 3
579
580/* SIOF */
581#define SIOF0_ERI_IRQ 96
582#define SIOF0_TXI_IRQ 97
583#define SIOF0_RXI_IRQ 98
584#define SIOF0_CCI_IRQ 99
585#define SIOF0_IPR_ADDR INTC_IPRH
586#define SIOF0_IPR_POS 0
587#define SIOF0_PRIORITY 7
588
589#define SIOF1_ERI_IRQ 100
590#define SIOF1_TXI_IRQ 101
591#define SIOF1_RXI_IRQ 102
592#define SIOF1_CCI_IRQ 103
593#define SIOF1_IPR_ADDR INTC_IPRI
594#define SIOF1_IPR_POS 1
595#define SIOF1_PRIORITY 7
596#endif /* CONFIG_CPU_SUBTYPE_SH7710 */
597
598#if defined(CONFIG_CPU_SUBTYPE_SH7710)
599#define PORT_PACR 0xa4050100UL
600#define PORT_PBCR 0xa4050102UL
601#define PORT_PCCR 0xa4050104UL
602#define PORT_PETCR 0xa4050106UL
603#define PORT_PADR 0xa4050120UL
604#define PORT_PBDR 0xa4050122UL
605#define PORT_PCDR 0xa4050124UL
606#else
496#define PORT_PACR 0xa4000100UL 607#define PORT_PACR 0xa4000100UL
497#define PORT_PBCR 0xa4000102UL 608#define PORT_PBCR 0xa4000102UL
498#define PORT_PCCR 0xa4000104UL 609#define PORT_PCCR 0xa4000104UL
@@ -501,6 +612,7 @@ extern int ipr_irq_demux(int irq);
501#define PORT_PBDR 0xa4000122UL 612#define PORT_PBDR 0xa4000122UL
502#define PORT_PCDR 0xa4000124UL 613#define PORT_PCDR 0xa4000124UL
503#define PORT_PFDR 0xa400012aUL 614#define PORT_PFDR 0xa400012aUL
615#endif
504 616
505#define IRQ0_IRQ 32 617#define IRQ0_IRQ 32
506#define IRQ1_IRQ 33 618#define IRQ1_IRQ 33
@@ -577,7 +689,7 @@ extern int ipr_irq_demux(int irq);
577#define NR_INTC2_IRQS 64 689#define NR_INTC2_IRQS 64
578#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 690#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
579#define INTC2_BASE 0xffd40000 691#define INTC2_BASE 0xffd40000
580#define INTC2_FIRST_IRQ 22 692#define INTC2_FIRST_IRQ 21
581#define INTC2_INTMSK_OFFSET (0x38) 693#define INTC2_INTMSK_OFFSET (0x38)
582#define INTC2_INTMSKCLR_OFFSET (0x3c) 694#define INTC2_INTMSKCLR_OFFSET (0x3c)
583#define NR_INTC2_IRQS 60 695#define NR_INTC2_IRQS 60
@@ -594,6 +706,8 @@ void intc2_add_clear_irq(int irq, int (*fn)(int));
594 706
595#endif 707#endif
596 708
709extern int shmse_irq_demux(int irq);
710
597static inline int generic_irq_demux(int irq) 711static inline int generic_irq_demux(int irq)
598{ 712{
599 return irq; 713 return irq;
@@ -605,8 +719,21 @@ static inline int generic_irq_demux(int irq)
605#define irq_canonicalize(irq) (irq) 719#define irq_canonicalize(irq) (irq)
606#define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq)) 720#define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq))
607 721
722#ifdef CONFIG_4KSTACKS
723extern void irq_ctx_init(int cpu);
724extern void irq_ctx_exit(int cpu);
725# define __ARCH_HAS_DO_SOFTIRQ
726#else
727# define irq_ctx_init(cpu) do { } while (0)
728# define irq_ctx_exit(cpu) do { } while (0)
729#endif
730
608#if defined(CONFIG_CPU_SUBTYPE_SH73180) 731#if defined(CONFIG_CPU_SUBTYPE_SH73180)
609#include <asm/irq-sh73180.h> 732#include <asm/irq-sh73180.h>
610#endif 733#endif
611 734
735#if defined(CONFIG_CPU_SUBTYPE_SH7343)
736#include <asm/irq-sh7343.h>
737#endif
738
612#endif /* __ASM_SH_IRQ_H */ 739#endif /* __ASM_SH_IRQ_H */
diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h
index 9dfe59f6fcb5..9d235af20cdd 100644
--- a/include/asm-sh/kexec.h
+++ b/include/asm-sh/kexec.h
@@ -23,11 +23,10 @@
23/* The native architecture */ 23/* The native architecture */
24#define KEXEC_ARCH KEXEC_ARCH_SH 24#define KEXEC_ARCH KEXEC_ARCH_SH
25 25
26#ifndef __ASSEMBLY__ 26#define MAX_NOTE_BYTES 1024
27 27
28extern void machine_shutdown(void); 28/* Provide a dummy definition to avoid build failures. */
29extern void *crash_notes; 29static inline void crash_setup_regs(struct pt_regs *newregs,
30 30 struct pt_regs *oldregs) { }
31#endif /* __ASSEMBLY__ */
32 31
33#endif /* _SH_KEXEC_H */ 32#endif /* _SH_KEXEC_H */
diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h
index 1653ffb75fbe..7b26f53fe343 100644
--- a/include/asm-sh/kgdb.h
+++ b/include/asm-sh/kgdb.h
@@ -128,4 +128,19 @@ extern int setjmp(jmp_buf __jmpb);
128#define KGDB_ASSERT(condition, message) 128#define KGDB_ASSERT(condition, message)
129#endif 129#endif
130 130
131/* Taken from sh-stub.c of GDB 4.18 */
132static const char hexchars[] = "0123456789abcdef";
133
134/* Get high hex bits */
135static inline char highhex(const int x)
136{
137 return hexchars[(x >> 4) & 0xf];
138}
139
140/* Get low hex bits */
141static inline char lowhex(const int x)
142{
143 return hexchars[x & 0xf];
144}
145
131#endif 146#endif
diff --git a/include/asm-sh/landisk/gio.h b/include/asm-sh/landisk/gio.h
new file mode 100644
index 000000000000..3fce4c451a46
--- /dev/null
+++ b/include/asm-sh/landisk/gio.h
@@ -0,0 +1,45 @@
1#ifndef __ASM_SH_LANDISK_GIO_H
2#define __ASM_SH_LANDISK_GIO_H
3
4#include <linux/ioctl.h>
5
6/* version */
7#define VERSION_STR "1.00"
8
9/* Driver name */
10#define GIO_DRIVER_NAME "/dev/giodrv"
11
12/* Use 'k' as magic number */
13#define GIODRV_IOC_MAGIC 'k'
14
15#define GIODRV_IOCRESET _IO(GIODRV_IOC_MAGIC, 0)
16/*
17 * S means "Set" through a ptr,
18 * T means "Tell" directly
19 * G means "Get" (to a pointed var)
20 * Q means "Query", response is on the return value
21 * X means "eXchange": G and S atomically
22 * H means "sHift": T and Q atomically
23 */
24#define GIODRV_IOCSGIODATA1 _IOW(GIODRV_IOC_MAGIC, 1, unsigned char *)
25#define GIODRV_IOCGGIODATA1 _IOR(GIODRV_IOC_MAGIC, 2, unsigned char *)
26#define GIODRV_IOCSGIODATA2 _IOW(GIODRV_IOC_MAGIC, 3, unsigned short *)
27#define GIODRV_IOCGGIODATA2 _IOR(GIODRV_IOC_MAGIC, 4, unsigned short *)
28#define GIODRV_IOCSGIODATA4 _IOW(GIODRV_IOC_MAGIC, 5, unsigned long *)
29#define GIODRV_IOCGGIODATA4 _IOR(GIODRV_IOC_MAGIC, 6, unsigned long *)
30#define GIODRV_IOCSGIOSETADDR _IOW(GIODRV_IOC_MAGIC, 7, unsigned long *)
31#define GIODRV_IOCHARDRESET _IO(GIODRV_IOC_MAGIC, 8) /* debugging tool */
32
33#define GIODRV_IOCSGIO_LED _IOW(GIODRV_IOC_MAGIC, 9, unsigned long *)
34#define GIODRV_IOCGGIO_LED _IOR(GIODRV_IOC_MAGIC, 10, unsigned long *)
35#define GIODRV_IOCSGIO_BUZZER _IOW(GIODRV_IOC_MAGIC, 11, unsigned long *)
36#define GIODRV_IOCGGIO_LANDISK _IOR(GIODRV_IOC_MAGIC, 14, unsigned long *)
37#define GIODRV_IOCGGIO_BTN _IOR(GIODRV_IOC_MAGIC, 22, unsigned long *)
38#define GIODRV_IOCSGIO_BTNPID _IOW(GIODRV_IOC_MAGIC, 23, unsigned long *)
39#define GIODRV_IOCGGIO_BTNPID _IOR(GIODRV_IOC_MAGIC, 24, unsigned long *)
40
41#define GIODRV_IOC_MAXNR 8
42#define GIO_READ 0x00000000
43#define GIO_WRITE 0x00000001
44
45#endif /* __ASM_SH_LANDISK_GIO_H */
diff --git a/include/asm-sh/landisk/ide.h b/include/asm-sh/landisk/ide.h
new file mode 100644
index 000000000000..6490e28415ed
--- /dev/null
+++ b/include/asm-sh/landisk/ide.h
@@ -0,0 +1,14 @@
1/*
2 * modifed by kogiidena
3 * 2005.03.03
4 */
5
6#ifndef __ASM_SH_LANDISK_IDE_H
7#define __ASM_SH_LANDISK_IDE_H
8
9/* Nothing to see here.. */
10#include <asm/landisk/iodata_landisk.h>
11#define IRQ_CFCARD IRQ_FATA /* CF Card IRQ */
12#define IRQ_PCMCIA IRQ_ATA /* PCMCIA IRQ */
13
14#endif /* __ASM_SH_LANDISK_IDE_H */
diff --git a/include/asm-sh/landisk/iodata_landisk.h b/include/asm-sh/landisk/iodata_landisk.h
new file mode 100644
index 000000000000..c74d3c73f377
--- /dev/null
+++ b/include/asm-sh/landisk/iodata_landisk.h
@@ -0,0 +1,79 @@
1#ifndef __ASM_SH_IODATA_LANDISK_H
2#define __ASM_SH_IODATA_LANDISK_H
3
4/*
5 * linux/include/asm-sh/landisk/iodata_landisk.h
6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 *
9 * IO-DATA LANDISK support
10 */
11
12/* Box specific addresses. */
13
14#define PA_USB 0xa4000000 /* USB Controller M66590 */
15
16#define PA_ATARST 0xb0000000 /* ATA/FATA Access Control Register */
17#define PA_LED 0xb0000001 /* LED Control Register */
18#define PA_STATUS 0xb0000002 /* Switch Status Register */
19#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */
20#define PA_PCIPME 0xb0000004 /* PCI PME Status Register */
21#define PA_IMASK 0xb0000005 /* Interrupt Mask Register */
22/* 2003.10.31 I-O DATA NSD NWG add. for shutdown port clear */
23#define PA_PWRINT_CLR 0xb0000006 /* Shutdown Interrupt clear Register */
24
25#define PA_LCD_CLRDSP 0x00 /* LCD Clear Display Offset */
26#define PA_LCD_RTNHOME 0x00 /* LCD Return Home Offset */
27#define PA_LCD_ENTMODE 0x00 /* LCD Entry Mode Offset */
28#define PA_LCD_DSPCTL 0x00 /* LCD Display ON/OFF Control Offset */
29#define PA_LCD_FUNC 0x00 /* LCD Function Set Offset */
30#define PA_LCD_CGRAM 0x00 /* LCD Set CGRAM Address Offset */
31#define PA_LCD_DDRAM 0x00 /* LCD Set DDRAM Address Offset */
32#define PA_LCD_RDFLAG 0x01 /* LCD Read Busy Flag Offset */
33#define PA_LCD_WTDATA 0x02 /* LCD Write Datat to RAM Offset */
34#define PA_LCD_RDDATA 0x03 /* LCD Read Data from RAM Offset */
35#define PA_PIDE_OFFSET 0x40 /* CF IDE Offset */
36#define PA_SIDE_OFFSET 0x40 /* HDD IDE Offset */
37
38#define IRQ_PCIINTA 5 /* PCI INTA IRQ */
39#define IRQ_PCIINTB 6 /* PCI INTB IRQ */
40#define IRQ_PCIINDC 7 /* PCI INTC IRQ */
41#define IRQ_PCIINTD 8 /* PCI INTD IRQ */
42#define IRQ_ATA 9 /* ATA IRQ */
43#define IRQ_FATA 10 /* FATA IRQ */
44#define IRQ_POWER 11 /* Power Switch IRQ */
45#define IRQ_BUTTON 12 /* USL-5P Button IRQ */
46#define IRQ_FAULT 13 /* USL-5P Fault IRQ */
47
48#define SHUTDOWN_BTN_MAJOR 99 /* Shutdown button device major no. */
49
50#define SHUTDOWN_LOOP_CNT 5 /* Shutdown button Detection loop */
51#define SHUTDOWN_DELAY 200 /* Shutdown button delay value(ms) */
52
53
54/* added by kogiidena */
55/*
56 * landisk_ledparam
57 *
58 * led ------10 -6543210 -6543210 -6543210
59 * |000000..|0.......|0.......|U.......|
60 * | HARD |fastblik| blink | on |
61 *
62 * led0: power U:update flag
63 * led1: error
64 * led2: usb1
65 * led3: usb2
66 * led4: usb3
67 * led5: usb4
68 * led6: usb5
69 *
70 */
71extern int landisk_ledparam; /* from setup.c */
72extern int landisk_buzzerparam; /* from setup.c */
73extern int landisk_arch; /* from setup.c */
74
75#define __IO_PREFIX landisk
76#include <asm/io_generic.h>
77
78#endif /* __ASM_SH_IODATA_LANDISK_H */
79
diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h
index 550501fa4fed..70389b72ffef 100644
--- a/include/asm-sh/machvec.h
+++ b/include/asm-sh/machvec.h
@@ -8,17 +8,18 @@
8 */ 8 */
9 9
10#ifndef _ASM_SH_MACHVEC_H 10#ifndef _ASM_SH_MACHVEC_H
11#define _ASM_SH_MACHVEC_H 1 11#define _ASM_SH_MACHVEC_H
12 12
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/time.h> 14#include <linux/time.h>
15
16#include <asm/machtypes.h> 15#include <asm/machtypes.h>
17#include <asm/machvec_init.h> 16#include <asm/machvec_init.h>
18 17
19struct device; 18struct device;
20 19
21struct sh_machine_vector { 20struct sh_machine_vector {
21 void (*mv_setup)(char **cmdline_p);
22 const char *mv_name;
22 int mv_nr_irqs; 23 int mv_nr_irqs;
23 24
24 u8 (*mv_inb)(unsigned long); 25 u8 (*mv_inb)(unsigned long);
@@ -65,4 +66,6 @@ struct sh_machine_vector {
65 66
66extern struct sh_machine_vector sh_mv; 67extern struct sh_machine_vector sh_mv;
67 68
69#define get_system_type() sh_mv.mv_name
70
68#endif /* _ASM_SH_MACHVEC_H */ 71#endif /* _ASM_SH_MACHVEC_H */
diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h
index 1707cfb2915d..0aee96a97330 100644
--- a/include/asm-sh/mc146818rtc.h
+++ b/include/asm-sh/mc146818rtc.h
@@ -4,173 +4,4 @@
4#ifndef _ASM_MC146818RTC_H 4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H 5#define _ASM_MC146818RTC_H
6 6
7#ifdef CONFIG_SH_MPC1211
8#undef _ASM_MC146818RTC_H
9#undef RTC_IRQ
10#include <asm/mpc1211/mc146818rtc.h>
11#else
12
13#include <asm/rtc.h>
14
15#define RTC_ALWAYS_BCD 1
16
17/* FIXME:RTC Interrupt feature is not implemented yet. */
18#undef RTC_IRQ
19#define RTC_IRQ 0
20
21#if defined(CONFIG_CPU_SH3)
22#define RTC_PORT(n) (R64CNT+(n)*2)
23#define CMOS_READ(addr) __CMOS_READ(addr,b)
24#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b)
25
26#elif defined(CONFIG_SH_SECUREEDGE5410)
27#include <asm/snapgear/io.h>
28
29#define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR
30#define CMOS_READ(addr) secureedge5410_cmos_read(addr)
31#define CMOS_WRITE(val,addr) secureedge5410_cmos_write(val,addr)
32extern unsigned char secureedge5410_cmos_read(int addr);
33extern void secureedge5410_cmos_write(unsigned char val, int addr);
34
35#elif defined(CONFIG_CPU_SH4)
36#define RTC_PORT(n) (R64CNT+(n)*4)
37#define CMOS_READ(addr) __CMOS_READ(addr,w)
38#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,w)
39#endif
40
41#define __CMOS_READ(addr, s) ({ \
42 unsigned char val=0, rcr1, rcr2, r64cnt, retry; \
43 switch(addr) { \
44 case RTC_SECONDS: \
45 val = ctrl_inb(RSECCNT); \
46 break; \
47 case RTC_SECONDS_ALARM: \
48 val = ctrl_inb(RSECAR); \
49 break; \
50 case RTC_MINUTES: \
51 val = ctrl_inb(RMINCNT); \
52 break; \
53 case RTC_MINUTES_ALARM: \
54 val = ctrl_inb(RMINAR); \
55 break; \
56 case RTC_HOURS: \
57 val = ctrl_inb(RHRCNT); \
58 break; \
59 case RTC_HOURS_ALARM: \
60 val = ctrl_inb(RHRAR); \
61 break; \
62 case RTC_DAY_OF_WEEK: \
63 val = ctrl_inb(RWKCNT); \
64 break; \
65 case RTC_DAY_OF_MONTH: \
66 val = ctrl_inb(RDAYCNT); \
67 break; \
68 case RTC_MONTH: \
69 val = ctrl_inb(RMONCNT); \
70 break; \
71 case RTC_YEAR: \
72 val = ctrl_in##s(RYRCNT); \
73 break; \
74 case RTC_REG_A: /* RTC_FREQ_SELECT */ \
75 rcr2 = ctrl_inb(RCR2); \
76 val = (rcr2 & RCR2_PESMASK) >> 4; \
77 rcr1 = ctrl_inb(RCR1); \
78 rcr1 = (rcr1 & (RCR1_CIE | RCR1_AIE)) | RCR1_AF;\
79 retry = 0; \
80 do { \
81 ctrl_outb(rcr1, RCR1); /* clear CF */ \
82 r64cnt = ctrl_inb(R64CNT); \
83 } while((ctrl_inb(RCR1) & RCR1_CF) && retry++ < 1000);\
84 r64cnt ^= RTC_BIT_INVERTED; \
85 if(r64cnt == 0x7f || r64cnt == 0) \
86 val |= RTC_UIP; \
87 break; \
88 case RTC_REG_B: /* RTC_CONTROL */ \
89 rcr1 = ctrl_inb(RCR1); \
90 rcr2 = ctrl_inb(RCR2); \
91 if(rcr1 & RCR1_CIE) val |= RTC_UIE; \
92 if(rcr1 & RCR1_AIE) val |= RTC_AIE; \
93 if(rcr2 & RCR2_PESMASK) val |= RTC_PIE; \
94 if(!(rcr2 & RCR2_START))val |= RTC_SET; \
95 val |= RTC_24H; \
96 break; \
97 case RTC_REG_C: /* RTC_INTR_FLAGS */ \
98 rcr1 = ctrl_inb(RCR1); \
99 rcr1 &= ~(RCR1_CF | RCR1_AF); \
100 ctrl_outb(rcr1, RCR1); \
101 rcr2 = ctrl_inb(RCR2); \
102 rcr2 &= ~RCR2_PEF; \
103 ctrl_outb(rcr2, RCR2); \
104 break; \
105 case RTC_REG_D: /* RTC_VALID */ \
106 /* Always valid ... */ \
107 val = RTC_VRT; \
108 break; \
109 default: \
110 break; \
111 } \
112 val; \
113})
114
115#define __CMOS_WRITE(val, addr, s) ({ \
116 unsigned char rcr1,rcr2; \
117 switch(addr) { \
118 case RTC_SECONDS: \
119 ctrl_outb(val, RSECCNT); \
120 break; \
121 case RTC_SECONDS_ALARM: \
122 ctrl_outb(val, RSECAR); \
123 break; \
124 case RTC_MINUTES: \
125 ctrl_outb(val, RMINCNT); \
126 break; \
127 case RTC_MINUTES_ALARM: \
128 ctrl_outb(val, RMINAR); \
129 break; \
130 case RTC_HOURS: \
131 ctrl_outb(val, RHRCNT); \
132 break; \
133 case RTC_HOURS_ALARM: \
134 ctrl_outb(val, RHRAR); \
135 break; \
136 case RTC_DAY_OF_WEEK: \
137 ctrl_outb(val, RWKCNT); \
138 break; \
139 case RTC_DAY_OF_MONTH: \
140 ctrl_outb(val, RDAYCNT); \
141 break; \
142 case RTC_MONTH: \
143 ctrl_outb(val, RMONCNT); \
144 break; \
145 case RTC_YEAR: \
146 ctrl_out##s((ctrl_in##s(RYRCNT) & 0xff00) | (val & 0xff), RYRCNT);\
147 break; \
148 case RTC_REG_A: /* RTC_FREQ_SELECT */ \
149 rcr2 = ctrl_inb(RCR2); \
150 if((val & RTC_DIV_CTL) == RTC_DIV_RESET2) \
151 rcr2 |= RCR2_RESET; \
152 ctrl_outb(rcr2, RCR2); \
153 break; \
154 case RTC_REG_B: /* RTC_CONTROL */ \
155 rcr1 = (ctrl_inb(RCR1) & 0x99) | RCR1_AF; \
156 if(val & RTC_AIE) rcr1 |= RCR1_AIE; \
157 else rcr1 &= ~RCR1_AIE; \
158 if(val & RTC_UIE) rcr1 |= RCR1_CIE; \
159 else rcr1 &= ~RCR1_CIE; \
160 ctrl_outb(rcr1, RCR1); \
161 rcr2 = ctrl_inb(RCR2); \
162 if(val & RTC_SET) rcr2 &= ~RCR2_START; \
163 else rcr2 |= RCR2_START; \
164 ctrl_outb(rcr2, RCR2); \
165 break; \
166 case RTC_REG_C: /* RTC_INTR_FLAGS */ \
167 break; \
168 case RTC_REG_D: /* RTC_VALID */ \
169 break; \
170 default: \
171 break; \
172 } \
173})
174
175#endif /* CONFIG_SH_MPC1211 */
176#endif /* _ASM_MC146818RTC_H */ 7#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h
index 72f07be6117f..cf47df79bb94 100644
--- a/include/asm-sh/mmu.h
+++ b/include/asm-sh/mmu.h
@@ -3,27 +3,76 @@
3 3
4#if !defined(CONFIG_MMU) 4#if !defined(CONFIG_MMU)
5 5
6struct mm_rblock_struct {
7 int size;
8 int refcount;
9 void *kblock;
10};
11
12struct mm_tblock_struct {
13 struct mm_rblock_struct *rblock;
14 struct mm_tblock_struct *next;
15};
16
17typedef struct { 6typedef struct {
18 struct mm_tblock_struct tblock; 7 struct vm_list_struct *vmlist;
19 unsigned long end_brk; 8 unsigned long end_brk;
20} mm_context_t; 9} mm_context_t;
21 10
22#else 11#else
23 12
24/* Default "unsigned long" context */ 13/* Default "unsigned long" context */
25typedef unsigned long mm_context_t; 14typedef unsigned long mm_context_id_t;
15
16typedef struct {
17 mm_context_id_t id;
18 void *vdso;
19} mm_context_t;
26 20
27#endif /* CONFIG_MMU */ 21#endif /* CONFIG_MMU */
28#endif /* __MMH_H */ 22
23/*
24 * Privileged Space Mapping Buffer (PMB) definitions
25 */
26#define PMB_PASCR 0xff000070
27#define PMB_IRMCR 0xff000078
28
29#define PMB_ADDR 0xf6100000
30#define PMB_DATA 0xf7100000
31#define PMB_ENTRY_MAX 16
32#define PMB_E_MASK 0x0000000f
33#define PMB_E_SHIFT 8
34
35#define PMB_SZ_16M 0x00000000
36#define PMB_SZ_64M 0x00000010
37#define PMB_SZ_128M 0x00000080
38#define PMB_SZ_512M 0x00000090
39#define PMB_SZ_MASK PMB_SZ_512M
40#define PMB_C 0x00000008
41#define PMB_WT 0x00000001
42#define PMB_UB 0x00000200
43#define PMB_V 0x00000100
44
45#define PMB_NO_ENTRY (-1)
46
47struct pmb_entry;
48
49struct pmb_entry {
50 unsigned long vpn;
51 unsigned long ppn;
52 unsigned long flags;
53
54 /*
55 * 0 .. NR_PMB_ENTRIES for specific entry selection, or
56 * PMB_NO_ENTRY to search for a free one
57 */
58 int entry;
59
60 struct pmb_entry *next;
61 /* Adjacent entry link for contiguous multi-entry mappings */
62 struct pmb_entry *link;
63};
64
65/* arch/sh/mm/pmb.c */
66int __set_pmb_entry(unsigned long vpn, unsigned long ppn,
67 unsigned long flags, int *entry);
68int set_pmb_entry(struct pmb_entry *pmbe);
69void clear_pmb_entry(struct pmb_entry *pmbe);
70struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
71 unsigned long flags);
72void pmb_free(struct pmb_entry *pmbe);
73long pmb_remap(unsigned long virt, unsigned long phys,
74 unsigned long size, unsigned long flags);
75void pmb_unmap(unsigned long addr);
76
77#endif /* __MMU_H */
29 78
diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h
index 6760d064bd02..c7088efe579a 100644
--- a/include/asm-sh/mmu_context.h
+++ b/include/asm-sh/mmu_context.h
@@ -49,7 +49,7 @@ get_mmu_context(struct mm_struct *mm)
49 unsigned long mc = mmu_context_cache; 49 unsigned long mc = mmu_context_cache;
50 50
51 /* Check if we have old version of context. */ 51 /* Check if we have old version of context. */
52 if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0) 52 if (((mm->context.id ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0)
53 /* It's up to date, do nothing */ 53 /* It's up to date, do nothing */
54 return; 54 return;
55 55
@@ -68,7 +68,7 @@ get_mmu_context(struct mm_struct *mm)
68 if (!mc) 68 if (!mc)
69 mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION; 69 mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
70 } 70 }
71 mm->context = mc; 71 mm->context.id = mc;
72} 72}
73 73
74/* 74/*
@@ -78,7 +78,7 @@ get_mmu_context(struct mm_struct *mm)
78static __inline__ int init_new_context(struct task_struct *tsk, 78static __inline__ int init_new_context(struct task_struct *tsk,
79 struct mm_struct *mm) 79 struct mm_struct *mm)
80{ 80{
81 mm->context = NO_CONTEXT; 81 mm->context.id = NO_CONTEXT;
82 82
83 return 0; 83 return 0;
84} 84}
@@ -123,7 +123,7 @@ static __inline__ unsigned long get_asid(void)
123static __inline__ void activate_context(struct mm_struct *mm) 123static __inline__ void activate_context(struct mm_struct *mm)
124{ 124{
125 get_mmu_context(mm); 125 get_mmu_context(mm);
126 set_asid(mm->context & MMU_CONTEXT_ASID_MASK); 126 set_asid(mm->context.id & MMU_CONTEXT_ASID_MASK);
127} 127}
128 128
129/* MMU_TTB can be used for optimizing the fault handling. 129/* MMU_TTB can be used for optimizing the fault handling.
@@ -174,9 +174,7 @@ static inline void enable_mmu(void)
174{ 174{
175 /* Enable MMU */ 175 /* Enable MMU */
176 ctrl_outl(MMU_CONTROL_INIT, MMUCR); 176 ctrl_outl(MMU_CONTROL_INIT, MMUCR);
177 177 ctrl_barrier();
178 /* The manual suggests doing some nops after turning on the MMU */
179 __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop\n\t");
180 178
181 if (mmu_context_cache == NO_CONTEXT) 179 if (mmu_context_cache == NO_CONTEXT)
182 mmu_context_cache = MMU_CONTEXT_FIRST_VERSION; 180 mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
@@ -191,7 +189,8 @@ static inline void disable_mmu(void)
191 cr = ctrl_inl(MMUCR); 189 cr = ctrl_inl(MMUCR);
192 cr &= ~MMU_CONTROL_INIT; 190 cr &= ~MMU_CONTROL_INIT;
193 ctrl_outl(cr, MMUCR); 191 ctrl_outl(cr, MMUCR);
194 __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop\n\t"); 192
193 ctrl_barrier();
195} 194}
196#else 195#else
197/* 196/*
diff --git a/include/asm-sh/overdrive/fpga.h b/include/asm-sh/overdrive/fpga.h
deleted file mode 100644
index 1cd87992c124..000000000000
--- a/include/asm-sh/overdrive/fpga.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 */
8
9#ifndef __FPGA_OD_H__
10#define __FPGA_OD_H__
11
12/* This routine will program up the fpga which interfaces to the galileo */
13int init_overdrive_fpga(void);
14
15#endif
diff --git a/include/asm-sh/overdrive/gt64111.h b/include/asm-sh/overdrive/gt64111.h
deleted file mode 100644
index 01d58bc13a44..000000000000
--- a/include/asm-sh/overdrive/gt64111.h
+++ /dev/null
@@ -1,109 +0,0 @@
1#ifndef _GT64111_H_
2#define _GT64111_H_
3
4#define MASTER_INTERFACE 0x0
5#define RAS10_LO_DEC_ADR 0x8
6#define RAS10_HI_DEC_ADR 0x10
7#define RAS32_LO_DEC_ADR 0x18
8#define RAS32_HI_DEC_ADR 0x20
9#define CS20_LO_DEC_ADR 0x28
10#define CS20_HI_DEC_ADR 0x30
11#define CS3_LO_DEC_ADR 0x38
12#define CS3_HI_DEC_ADR 0x40
13#define PCI_IO_LO_DEC_ADR 0x48
14#define PCI_IO_HI_DEC_ADR 0x50
15#define PCI_MEM0_LO_DEC_ADR 0x58
16#define PCI_MEM0_HI_DEC_ADR 0x60
17#define INTERNAL_SPACE_DEC 0x68
18#define BUS_ERR_ADR_LO_CPU 0x70
19#define READONLY0 0x78
20#define PCI_MEM1_LO_DEC_ADR 0x80
21#define PCI_MEM1_HI_DEC_ADR 0x88
22#define RAS0_LO_DEC_ADR 0x400
23#define RAS0_HI_DEC_ADR 0x404
24#define RAS1_LO_DEC_ADR 0x408
25#define RAS1_HI_DEC_ADR 0x40c
26#define RAS2_LO_DEC_ADR 0x410
27#define RAS2_HI_DEC_ADR 0x414
28#define RAS3_LO_DEC_ADR 0x418
29#define RAS3_HI_DEC_ADR 0x41c
30#define DEV_CS0_LO_DEC_ADR 0x420
31#define DEV_CS0_HI_DEC_ADR 0x424
32#define DEV_CS1_LO_DEC_ADR 0x428
33#define DEV_CS1_HI_DEC_ADR 0x42c
34#define DEV_CS2_LO_DEC_ADR 0x430
35#define DEV_CS2_HI_DEC_ADR 0x434
36#define DEV_CS3_LO_DEC_ADR 0x438
37#define DEV_CS3_HI_DEC_ADR 0x43c
38#define DEV_BOOTCS_LO_DEC_ADR 0x440
39#define DEV_BOOTCS_HI_DEC_ADR 0x444
40#define DEV_ADR_DEC_ERR 0x470
41#define DRAM_CFG 0x448
42#define DRAM_BANK0_PARMS 0x44c
43#define DRAM_BANK1_PARMS 0x450
44#define DRAM_BANK2_PARMS 0x454
45#define DRAM_BANK3_PARMS 0x458
46#define DEV_BANK0_PARMS 0x45c
47#define DEV_BANK1_PARMS 0x460
48#define DEV_BANK2_PARMS 0x464
49#define DEV_BANK3_PARMS 0x468
50#define DEV_BOOT_BANK_PARMS 0x46c
51#define CH0_DMA_BYTECOUNT 0x800
52#define CH1_DMA_BYTECOUNT 0x804
53#define CH2_DMA_BYTECOUNT 0x808
54#define CH3_DMA_BYTECOUNT 0x80c
55#define CH0_DMA_SRC_ADR 0x810
56#define CH1_DMA_SRC_ADR 0x814
57#define CH2_DMA_SRC_ADR 0x818
58#define CH3_DMA_SRC_ADR 0x81c
59#define CH0_DMA_DST_ADR 0x820
60#define CH1_DMA_DST_ADR 0x824
61#define CH2_DMA_DST_ADR 0x828
62#define CH3_DMA_DST_ADR 0x82c
63#define CH0_NEXT_REC_PTR 0x830
64#define CH1_NEXT_REC_PTR 0x834
65#define CH2_NEXT_REC_PTR 0x838
66#define CH3_NEXT_REC_PTR 0x83c
67#define CH0_CTRL 0x840
68#define CH1_CTRL 0x844
69#define CH2_CTRL 0x848
70#define CH3_CTRL 0x84c
71#define DMA_ARBITER 0x860
72#define TIMER0 0x850
73#define TIMER1 0x854
74#define TIMER2 0x858
75#define TIMER3 0x85c
76#define TIMER_CTRL 0x864
77#define PCI_CMD 0xc00
78#define PCI_TIMEOUT 0xc04
79#define PCI_RAS10_BANK_SIZE 0xc08
80#define PCI_RAS32_BANK_SIZE 0xc0c
81#define PCI_CS20_BANK_SIZE 0xc10
82#define PCI_CS3_BANK_SIZE 0xc14
83#define PCI_SERRMASK 0xc28
84#define PCI_INTACK 0xc34
85#define PCI_BAR_EN 0xc3c
86#define PCI_CFG_ADR 0xcf8
87#define PCI_CFG_DATA 0xcfc
88#define PCI_INTCAUSE 0xc18
89#define PCI_MAST_MASK 0xc1c
90#define PCI_PCIMASK 0xc24
91#define BAR_ENABLE_ADR 0xc3c
92
93/* These are config registers, accessible via PCI space */
94#define PCI_CONFIG_RAS10_BASE_ADR 0x010
95#define PCI_CONFIG_RAS32_BASE_ADR 0x014
96#define PCI_CONFIG_CS20_BASE_ADR 0x018
97#define PCI_CONFIG_CS3_BASE_ADR 0x01c
98#define PCI_CONFIG_INT_REG_MM_ADR 0x020
99#define PCI_CONFIG_INT_REG_IO_ADR 0x024
100#define PCI_CONFIG_BOARD_VENDOR 0x02c
101#define PCI_CONFIG_ROM_ADR 0x030
102#define PCI_CONFIG_INT_PIN_LINE 0x03c
103
104
105
106
107
108#endif
109
diff --git a/include/asm-sh/overdrive/io.h b/include/asm-sh/overdrive/io.h
deleted file mode 100644
index 0dba700e9643..000000000000
--- a/include/asm-sh/overdrive/io.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * include/asm-sh/io_od.h
3 *
4 * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * IO functions for an STMicroelectronics Overdrive
10 */
11
12#ifndef _ASM_SH_IO_OD_H
13#define _ASM_SH_IO_OD_H
14
15extern unsigned char od_inb(unsigned long port);
16extern unsigned short od_inw(unsigned long port);
17extern unsigned int od_inl(unsigned long port);
18
19extern void od_outb(unsigned char value, unsigned long port);
20extern void od_outw(unsigned short value, unsigned long port);
21extern void od_outl(unsigned int value, unsigned long port);
22
23extern unsigned char od_inb_p(unsigned long port);
24extern unsigned short od_inw_p(unsigned long port);
25extern unsigned int od_inl_p(unsigned long port);
26extern void od_outb_p(unsigned char value, unsigned long port);
27extern void od_outw_p(unsigned short value, unsigned long port);
28extern void od_outl_p(unsigned int value, unsigned long port);
29
30extern void od_insb(unsigned long port, void *addr, unsigned long count);
31extern void od_insw(unsigned long port, void *addr, unsigned long count);
32extern void od_insl(unsigned long port, void *addr, unsigned long count);
33extern void od_outsb(unsigned long port, const void *addr, unsigned long count);
34extern void od_outsw(unsigned long port, const void *addr, unsigned long count);
35extern void od_outsl(unsigned long port, const void *addr, unsigned long count);
36
37extern unsigned long od_isa_port2addr(unsigned long offset);
38
39#endif /* _ASM_SH_IO_OD_H */
diff --git a/include/asm-sh/overdrive/overdrive.h b/include/asm-sh/overdrive/overdrive.h
deleted file mode 100644
index fc746c244f83..000000000000
--- a/include/asm-sh/overdrive/overdrive.h
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 */
8
9
10#ifndef __OVERDRIVE_H__
11#define __OVERDRIVE_H__
12
13#define OVERDRIVE_INT_CT 0xa3a00000
14#define OVERDRIVE_INT_DT 0xa3b00000
15
16#define OVERDRIVE_CTRL 0xa3000000
17
18/* Shoving all these bits into the same register is not a good idea.
19 * As soon as I get a spare moment, I'll change the FPGA and put each
20 * bit in a separate register
21 */
22
23#define VALID_CTRL_BITS 0x1f
24
25#define ENABLE_RS232_MASK 0x1e
26#define DISABLE_RS232_BIT 0x01
27
28#define ENABLE_NMI_MASK 0x1d
29#define DISABLE_NMI_BIT 0x02
30
31#define RESET_PCI_MASK 0x1b
32#define ENABLE_PCI_BIT 0x04
33
34#define ENABLE_LED_MASK 0x17
35#define DISABLE_LED_BIT 0x08
36
37#define RESET_FPGA_MASK 0x0f
38#define ENABLE_FPGA_BIT 0x10
39
40
41#define FPGA_DCLK_ADDRESS 0xA3C00000
42
43#define FPGA_DATA 0x01 /* W */
44#define FPGA_CONFDONE 0x02 /* R */
45#define FPGA_NOT_STATUS 0x04 /* R */
46#define FPGA_INITDONE 0x08 /* R */
47
48#define FPGA_TIMEOUT 100000
49
50
51/* Interrupts for the overdrive. Note that these numbers have
52 * nothing to do with the actual IRQ numbers they appear on,
53 * this is all programmable. This is simply the position in the
54 * INT_CT register.
55 */
56
57#define OVERDRIVE_PCI_INTA 0
58#define OVERDRIVE_PCI_INTB 1
59#define OVERDRIVE_PCI_INTC 2
60#define OVERDRIVE_PCI_INTD 3
61#define OVERDRIVE_GALILEO_INT 4
62#define OVERDRIVE_GALILEO_LOCAL_INT 5
63#define OVERDRIVE_AUDIO_INT 6
64#define OVERDRIVE_KEYBOARD_INT 7
65
66/* Which Linux IRQ should we assign to each interrupt source? */
67#define OVERDRIVE_PCI_IRQ1 2
68#ifdef CONFIG_HACKED_NE2K
69#define OVERDRIVE_PCI_IRQ2 7
70#else
71#define OVERDRIVE_PCI_IRQ2 2
72#undef OVERDRIVE_PCI_INTB
73#define OVERDRIVE_PCI_INTB OVERDRIVE_PCI_INTA
74
75#endif
76
77/* Put the ESS solo audio chip on IRQ 4 */
78#define OVERDRIVE_ESS_IRQ 4
79
80/* Where the memory behind the PCI bus appears */
81#define PCI_DRAM_BASE 0xb7000000
82#define PCI_DRAM_SIZE (16*1024*1024)
83#define PCI_DRAM_FINISH (PCI_DRAM_BASE+PCI_DRAM_SIZE-1)
84
85/* Where the IO region appears in the memory */
86#define PCI_GTIO_BASE 0xb8000000
87
88#endif
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index 6f7eb8a3aba5..ca8b26d90475 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -16,7 +16,13 @@
16 16
17/* PAGE_SHIFT determines the page size */ 17/* PAGE_SHIFT determines the page size */
18#define PAGE_SHIFT 12 18#define PAGE_SHIFT 12
19
20#ifdef __ASSEMBLY__
21#define PAGE_SIZE (1 << PAGE_SHIFT)
22#else
19#define PAGE_SIZE (1UL << PAGE_SHIFT) 23#define PAGE_SIZE (1UL << PAGE_SHIFT)
24#endif
25
20#define PAGE_MASK (~(PAGE_SIZE-1)) 26#define PAGE_MASK (~(PAGE_SIZE-1))
21#define PTE_MASK PAGE_MASK 27#define PTE_MASK PAGE_MASK
22 28
@@ -30,7 +36,6 @@
30#define HPAGE_SIZE (1UL << HPAGE_SHIFT) 36#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
31#define HPAGE_MASK (~(HPAGE_SIZE-1)) 37#define HPAGE_MASK (~(HPAGE_SIZE-1))
32#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT) 38#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
33#define ARCH_HAS_SETCLEAR_HUGE_PTE
34#endif 39#endif
35 40
36#ifdef __KERNEL__ 41#ifdef __KERNEL__
@@ -39,10 +44,18 @@
39extern void (*clear_page)(void *to); 44extern void (*clear_page)(void *to);
40extern void (*copy_page)(void *to, void *from); 45extern void (*copy_page)(void *to, void *from);
41 46
47extern unsigned long shm_align_mask;
48
49#ifdef CONFIG_MMU
42extern void clear_page_slow(void *to); 50extern void clear_page_slow(void *to);
43extern void copy_page_slow(void *to, void *from); 51extern void copy_page_slow(void *to, void *from);
52#else
53extern void clear_page_nommu(void *to);
54extern void copy_page_nommu(void *to, void *from);
55#endif
44 56
45#if defined(CONFIG_SH7705_CACHE_32KB) && defined(CONFIG_MMU) 57#if defined(CONFIG_MMU) && (defined(CONFIG_CPU_SH4) || \
58 defined(CONFIG_SH7705_CACHE_32KB))
46struct page; 59struct page;
47extern void clear_user_page(void *to, unsigned long address, struct page *pg); 60extern void clear_user_page(void *to, unsigned long address, struct page *pg);
48extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg); 61extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg);
@@ -51,29 +64,20 @@ extern void __copy_user_page(void *to, void *from, void *orig_to);
51#elif defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH3) || !defined(CONFIG_MMU) 64#elif defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH3) || !defined(CONFIG_MMU)
52#define clear_user_page(page, vaddr, pg) clear_page(page) 65#define clear_user_page(page, vaddr, pg) clear_page(page)
53#define copy_user_page(to, from, vaddr, pg) copy_page(to, from) 66#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
54#elif defined(CONFIG_CPU_SH4)
55struct page;
56extern void clear_user_page(void *to, unsigned long address, struct page *pg);
57extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg);
58extern void __clear_user_page(void *to, void *orig_to);
59extern void __copy_user_page(void *to, void *from, void *orig_to);
60#endif 67#endif
61 68
62/* 69/*
63 * These are used to make use of C type-checking.. 70 * These are used to make use of C type-checking..
64 */ 71 */
65typedef struct { unsigned long pte; } pte_t; 72typedef struct { unsigned long pte; } pte_t;
66typedef struct { unsigned long pmd; } pmd_t;
67typedef struct { unsigned long pgd; } pgd_t; 73typedef struct { unsigned long pgd; } pgd_t;
68typedef struct { unsigned long pgprot; } pgprot_t; 74typedef struct { unsigned long pgprot; } pgprot_t;
69 75
70#define pte_val(x) ((x).pte) 76#define pte_val(x) ((x).pte)
71#define pmd_val(x) ((x).pmd)
72#define pgd_val(x) ((x).pgd) 77#define pgd_val(x) ((x).pgd)
73#define pgprot_val(x) ((x).pgprot) 78#define pgprot_val(x) ((x).pgprot)
74 79
75#define __pte(x) ((pte_t) { (x) } ) 80#define __pte(x) ((pte_t) { (x) } )
76#define __pmd(x) ((pmd_t) { (x) } )
77#define __pgd(x) ((pgd_t) { (x) } ) 81#define __pgd(x) ((pgd_t) { (x) } )
78#define __pgprot(x) ((pgprot_t) { (x) } ) 82#define __pgprot(x) ((pgprot_t) { (x) } )
79 83
@@ -93,7 +97,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
93#define __MEMORY_START CONFIG_MEMORY_START 97#define __MEMORY_START CONFIG_MEMORY_START
94#define __MEMORY_SIZE CONFIG_MEMORY_SIZE 98#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
95 99
96#define PAGE_OFFSET (0x80000000UL) 100#define PAGE_OFFSET CONFIG_PAGE_OFFSET
97#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) 101#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
98#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) 102#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
99 103
@@ -115,5 +119,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
115#include <asm-generic/memory_model.h> 119#include <asm-generic/memory_model.h>
116#include <asm-generic/page.h> 120#include <asm-generic/page.h>
117 121
122/* vDSO support */
123#ifdef CONFIG_VSYSCALL
124#define __HAVE_ARCH_GATE_AREA
125#endif
126
118#endif /* __KERNEL__ */ 127#endif /* __KERNEL__ */
119#endif /* __ASM_SH_PAGE_H */ 128#endif /* __ASM_SH_PAGE_H */
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h
index 0a523c85b11c..6ccc948fe216 100644
--- a/include/asm-sh/pci.h
+++ b/include/asm-sh/pci.h
@@ -32,6 +32,34 @@ extern struct pci_channel board_pci_channels[];
32#define PCIBIOS_MIN_IO board_pci_channels->io_resource->start 32#define PCIBIOS_MIN_IO board_pci_channels->io_resource->start
33#define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start 33#define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start
34 34
35/*
36 * I/O routine helpers
37 */
38#ifdef CONFIG_CPU_SUBTYPE_SH7780
39#define PCI_IO_AREA 0xFE400000
40#define PCI_IO_SIZE 0x00400000
41#else
42#define PCI_IO_AREA 0xFE240000
43#define PCI_IO_SIZE 0X00040000
44#endif
45
46#define PCI_MEM_SIZE 0x01000000
47
48#define SH4_PCIIOBR_MASK 0xFFFC0000
49#define pci_ioaddr(addr) (PCI_IO_AREA + (addr & ~SH4_PCIIOBR_MASK))
50
51#if defined(CONFIG_PCI)
52#define is_pci_ioaddr(port) \
53 (((port) >= PCIBIOS_MIN_IO) && \
54 ((port) < (PCIBIOS_MIN_IO + PCI_IO_SIZE)))
55#define is_pci_memaddr(port) \
56 (((port) >= PCIBIOS_MIN_MEM) && \
57 ((port) < (PCIBIOS_MIN_MEM + PCI_MEM_SIZE)))
58#else
59#define is_pci_ioaddr(port) (0)
60#define is_pci_memaddr(port) (0)
61#endif
62
35struct pci_dev; 63struct pci_dev;
36 64
37extern void pcibios_set_master(struct pci_dev *dev); 65extern void pcibios_set_master(struct pci_dev *dev);
@@ -87,15 +115,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
87 */ 115 */
88#define pci_dac_dma_supported(pci_dev, mask) (0) 116#define pci_dac_dma_supported(pci_dev, mask) (0)
89 117
90/* These macros should be used after a pci_map_sg call has been done
91 * to get bus addresses of each of the SG entries and their lengths.
92 * You should only work with the number of sg entries pci_map_sg
93 * returns, or alternatively stop on the first sg_dma_len(sg) which
94 * is 0.
95 */
96#define sg_dma_address(sg) (virt_to_bus((sg)->dma_address))
97#define sg_dma_len(sg) ((sg)->length)
98
99#ifdef CONFIG_PCI 118#ifdef CONFIG_PCI
100static inline void pci_dma_burst_advice(struct pci_dev *pdev, 119static inline void pci_dma_burst_advice(struct pci_dev *pdev,
101 enum pci_dma_burst_strategy *strat, 120 enum pci_dma_burst_strategy *strat,
@@ -107,11 +126,12 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
107#endif 126#endif
108 127
109/* Board-specific fixup routines. */ 128/* Board-specific fixup routines. */
110extern void pcibios_fixup(void); 129void pcibios_fixup(void);
111extern void pcibios_fixup_irqs(void); 130int pcibios_init_platform(void);
131int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
112 132
113#ifdef CONFIG_PCI_AUTO 133#ifdef CONFIG_PCI_AUTO
114extern int pciauto_assign_resources(int busno, struct pci_channel *hose); 134int pciauto_assign_resources(int busno, struct pci_channel *hose);
115#endif 135#endif
116 136
117static inline void pcibios_add_platform_entries(struct pci_dev *dev) 137static inline void pcibios_add_platform_entries(struct pci_dev *dev)
diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h
index f4f233f7a4f5..e841465ab4d2 100644
--- a/include/asm-sh/pgalloc.h
+++ b/include/asm-sh/pgalloc.h
@@ -1,15 +1,6 @@
1#ifndef __ASM_SH_PGALLOC_H 1#ifndef __ASM_SH_PGALLOC_H
2#define __ASM_SH_PGALLOC_H 2#define __ASM_SH_PGALLOC_H
3 3
4#include <linux/threads.h>
5#include <linux/slab.h>
6#include <linux/mm.h>
7
8#define pgd_quicklist ((unsigned long *)0)
9#define pmd_quicklist ((unsigned long *)0)
10#define pte_quicklist ((unsigned long *)0)
11#define pgtable_cache_size 0L
12
13#define pmd_populate_kernel(mm, pmd, pte) \ 4#define pmd_populate_kernel(mm, pmd, pte) \
14 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) 5 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
15 6
@@ -24,38 +15,24 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
24 */ 15 */
25static inline pgd_t *pgd_alloc(struct mm_struct *mm) 16static inline pgd_t *pgd_alloc(struct mm_struct *mm)
26{ 17{
27 unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t)); 18 return (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
28 pgd_t *pgd = (pgd_t *)kmalloc(pgd_size, GFP_KERNEL);
29
30 if (pgd)
31 memset(pgd, 0, pgd_size);
32
33 return pgd;
34} 19}
35 20
36static inline void pgd_free(pgd_t *pgd) 21static inline void pgd_free(pgd_t *pgd)
37{ 22{
38 kfree(pgd); 23 free_page((unsigned long)pgd);
39} 24}
40 25
41static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, 26static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
42 unsigned long address) 27 unsigned long address)
43{ 28{
44 pte_t *pte; 29 return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
45
46 pte = (pte_t *) __get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
47
48 return pte;
49} 30}
50 31
51static inline struct page *pte_alloc_one(struct mm_struct *mm, 32static inline struct page *pte_alloc_one(struct mm_struct *mm,
52 unsigned long address) 33 unsigned long address)
53{ 34{
54 struct page *pte; 35 return alloc_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
55
56 pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
57
58 return pte;
59} 36}
60 37
61static inline void pte_free_kernel(pte_t *pte) 38static inline void pte_free_kernel(pte_t *pte)
@@ -75,14 +52,8 @@ static inline void pte_free(struct page *pte)
75 * inside the pgd, so has no extra memory associated with it. 52 * inside the pgd, so has no extra memory associated with it.
76 */ 53 */
77 54
78#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
79#define pmd_free(x) do { } while (0) 55#define pmd_free(x) do { } while (0)
80#define __pmd_free_tlb(tlb,x) do { } while (0) 56#define __pmd_free_tlb(tlb,x) do { } while (0)
81#define pgd_populate(mm, pmd, pte) BUG()
82#define check_pgt_cache() do { } while (0) 57#define check_pgt_cache() do { } while (0)
83 58
84#ifdef CONFIG_CPU_SH4
85#define PG_mapped PG_arch_1
86#endif
87
88#endif /* __ASM_SH_PGALLOC_H */ 59#endif /* __ASM_SH_PGALLOC_H */
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 40d41a78041e..2c8682ad1012 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -1,42 +1,42 @@
1#ifndef __ASM_SH_PGTABLE_H
2#define __ASM_SH_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6/* 1/*
2 * This file contains the functions and defines necessary to modify and
3 * use the SuperH page table tree.
4 *
7 * Copyright (C) 1999 Niibe Yutaka 5 * Copyright (C) 1999 Niibe Yutaka
8 * Copyright (C) 2002, 2003, 2004 Paul Mundt 6 * Copyright (C) 2002 - 2005 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file "COPYING" in the main directory of this
10 * archive for more details.
9 */ 11 */
12#ifndef __ASM_SH_PGTABLE_H
13#define __ASM_SH_PGTABLE_H
10 14
11#include <asm/pgtable-2level.h> 15#include <asm-generic/pgtable-nopmd.h>
16#include <asm/page.h>
17
18#define PTRS_PER_PGD 1024
12 19
13/*
14 * This file contains the functions and defines necessary to modify and use
15 * the SuperH page table tree.
16 */
17#ifndef __ASSEMBLY__ 20#ifndef __ASSEMBLY__
18#include <asm/processor.h>
19#include <asm/addrspace.h> 21#include <asm/addrspace.h>
20#include <asm/fixmap.h> 22#include <asm/fixmap.h>
21#include <linux/threads.h>
22 23
23extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 24extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
24extern void paging_init(void); 25extern void paging_init(void);
25 26
26/* 27/*
27 * Basically we have the same two-level (which is the logical three level
28 * Linux page table layout folded) page tables as the i386.
29 */
30
31/*
32 * ZERO_PAGE is a global shared page that is always zero: used 28 * ZERO_PAGE is a global shared page that is always zero: used
33 * for zero-mapped memory areas etc.. 29 * for zero-mapped memory areas etc..
34 */ 30 */
35extern unsigned long empty_zero_page[1024]; 31extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
36#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 32#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
37 33
38#endif /* !__ASSEMBLY__ */ 34#endif /* !__ASSEMBLY__ */
39 35
36/* traditional two-level paging structure */
37#define PGDIR_SHIFT 22
38#define PTRS_PER_PMD 1
39#define PTRS_PER_PTE 1024
40#define PMD_SIZE (1UL << PMD_SHIFT) 40#define PMD_SIZE (1UL << PMD_SHIFT)
41#define PMD_MASK (~(PMD_SIZE-1)) 41#define PMD_MASK (~(PMD_SIZE-1))
42#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 42#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
@@ -47,7 +47,6 @@ extern unsigned long empty_zero_page[1024];
47 47
48#define PTE_PHYS_MASK 0x1ffff000 48#define PTE_PHYS_MASK 0x1ffff000
49 49
50#ifndef __ASSEMBLY__
51/* 50/*
52 * First 1MB map is used by fixed purpose. 51 * First 1MB map is used by fixed purpose.
53 * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c) 52 * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
@@ -55,20 +54,41 @@ extern unsigned long empty_zero_page[1024];
55#define VMALLOC_START (P3SEG+0x00100000) 54#define VMALLOC_START (P3SEG+0x00100000)
56#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) 55#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
57 56
58#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ 57/*
59#define _PAGE_HW_SHARED 0x002 /* SH-bit : page is shared among processes */ 58 * Linux PTEL encoding.
60#define _PAGE_DIRTY 0x004 /* D-bit : page changed */ 59 *
61#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ 60 * Hardware and software bit definitions for the PTEL value:
62#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ 61 *
63#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ 62 * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
64#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed */ 63 *
65#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ 64 * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
66#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ 65 * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
67#define _PAGE_PROTNONE 0x200 /* software: if not present */ 66 * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
68#define _PAGE_ACCESSED 0x400 /* software: page referenced */ 67 *
69#define _PAGE_U0_SHARED 0x800 /* software: page is shared in user space */ 68 * In order to keep this relatively clean, do not use these for defining
70 69 * SH-3 specific flags until all of the other unused bits have been
71#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ 70 * exhausted.
71 *
72 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
73 *
74 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
75 * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
76 *
77 * - Bits 31, 30, and 29 remain unused by everyone and can be used for future
78 * software flags, although care must be taken to update _PAGE_CLEAR_FLAGS.
79 */
80#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
81#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */
82#define _PAGE_DIRTY 0x004 /* D-bit : page changed */
83#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
84#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
85#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
86#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed */
87#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
88#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
89#define _PAGE_PROTNONE 0x200 /* software: if not present */
90#define _PAGE_ACCESSED 0x400 /* software: page referenced */
91#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
72 92
73/* software: moves to PTEA.TC (Timing Control) */ 93/* software: moves to PTEA.TC (Timing Control) */
74#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ 94#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
@@ -83,23 +103,17 @@ extern unsigned long empty_zero_page[1024];
83#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ 103#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
84#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ 104#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
85 105
86 106/* Mask which drops unused bits from the PTEL value */
87/* Mask which drop software flags 107#ifdef CONFIG_CPU_SH3
88 * We also drop WT bit since it is used for _PAGE_FILE 108#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
89 * bit in this implementation. 109 _PAGE_FILE | _PAGE_SZ1 | \
90 */ 110 _PAGE_HW_SHARED)
91#define _PAGE_CLEAR_FLAGS (_PAGE_WT | _PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_U0_SHARED)
92
93#if defined(CONFIG_CPU_SH3)
94/*
95 * MMU on SH-3 has bug on SH-bit: We can't use it if MMUCR.IX=1.
96 * Work around: Just drop SH-bit.
97 */
98#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS | _PAGE_HW_SHARED))
99#else 111#else
100#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS)) 112#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
101#endif 113#endif
102 114
115#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
116
103/* Hardware flags: SZ0=1 (4k-byte) */ 117/* Hardware flags: SZ0=1 (4k-byte) */
104#define _PAGE_FLAGS_HARD _PAGE_SZ0 118#define _PAGE_FLAGS_HARD _PAGE_SZ0
105 119
@@ -109,15 +123,15 @@ extern unsigned long empty_zero_page[1024];
109#define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) 123#define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
110#endif 124#endif
111 125
112#define _PAGE_SHARED _PAGE_U0_SHARED
113
114#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY) 126#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
115#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) 127#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
116#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED) 128#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
129
130#ifndef __ASSEMBLY__
117 131
118#ifdef CONFIG_MMU 132#ifdef CONFIG_MMU
119#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD) 133#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
120#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD) 134#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
121#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 135#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
122#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 136#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
123#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 137#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
@@ -137,12 +151,13 @@ extern unsigned long empty_zero_page[1024];
137#define PAGE_KERNEL_PCC __pgprot(0) 151#define PAGE_KERNEL_PCC __pgprot(0)
138#endif 152#endif
139 153
154#endif /* __ASSEMBLY__ */
155
140/* 156/*
141 * As i386 and MIPS, SuperH can't do page protection for execute, and 157 * As i386 and MIPS, SuperH can't do page protection for execute, and
142 * considers that the same as a read. Also, write permissions imply 158 * considers that the same as a read. Also, write permissions imply
143 * read permissions. This is the closest we can get.. 159 * read permissions. This is the closest we can get..
144 */ 160 */
145
146#define __P000 PAGE_NONE 161#define __P000 PAGE_NONE
147#define __P001 PAGE_READONLY 162#define __P001 PAGE_READONLY
148#define __P010 PAGE_COPY 163#define __P010 PAGE_COPY
@@ -161,6 +176,26 @@ extern unsigned long empty_zero_page[1024];
161#define __S110 PAGE_SHARED 176#define __S110 PAGE_SHARED
162#define __S111 PAGE_SHARED 177#define __S111 PAGE_SHARED
163 178
179#ifndef __ASSEMBLY__
180
181/*
182 * Certain architectures need to do special things when PTEs
183 * within a page table are directly modified. Thus, the following
184 * hook is made available.
185 */
186#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
187#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
188
189/*
190 * (pmds are folded into pgds so this doesn't get actually called,
191 * but the define is needed for a generic inline function.)
192 */
193#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
194
195#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
196#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
197#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
198
164#define pte_none(x) (!pte_val(x)) 199#define pte_none(x) (!pte_val(x))
165#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE)) 200#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
166#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) 201#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
@@ -171,7 +206,7 @@ extern unsigned long empty_zero_page[1024];
171#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) 206#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
172 207
173#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) 208#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
174#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) 209#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK)
175 210
176/* 211/*
177 * The following only work if pte_present() is true. 212 * The following only work if pte_present() is true.
@@ -248,6 +283,11 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
248#define pte_unmap(pte) do { } while (0) 283#define pte_unmap(pte) do { } while (0)
249#define pte_unmap_nested(pte) do { } while (0) 284#define pte_unmap_nested(pte) do { } while (0)
250 285
286#define pte_ERROR(e) \
287 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
288#define pgd_ERROR(e) \
289 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
290
251struct vm_area_struct; 291struct vm_area_struct;
252extern void update_mmu_cache(struct vm_area_struct * vma, 292extern void update_mmu_cache(struct vm_area_struct * vma,
253 unsigned long address, pte_t pte); 293 unsigned long address, pte_t pte);
@@ -272,8 +312,6 @@ extern void update_mmu_cache(struct vm_area_struct * vma,
272 312
273typedef pte_t *pte_addr_t; 313typedef pte_t *pte_addr_t;
274 314
275#endif /* !__ASSEMBLY__ */
276
277#define kern_addr_valid(addr) (1) 315#define kern_addr_valid(addr) (1)
278 316
279#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 317#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
@@ -301,5 +339,5 @@ extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t
301 339
302#include <asm-generic/pgtable.h> 340#include <asm-generic/pgtable.h>
303 341
342#endif /* !__ASSEMBLY__ */
304#endif /* __ASM_SH_PAGE_H */ 343#endif /* __ASM_SH_PAGE_H */
305
diff --git a/include/asm-sh/pm.h b/include/asm-sh/pm.h
new file mode 100644
index 000000000000..56fdbd6b1c94
--- /dev/null
+++ b/include/asm-sh/pm.h
@@ -0,0 +1,17 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright 2006 (c) Andriy Skulysh <askulysh@gmail.com>
7 *
8 */
9#ifndef __ASM_SH_PM_H
10#define __ASM_SH_PM_H
11
12extern u8 wakeup_start;
13extern u8 wakeup_end;
14
15void pm_enter(void);
16
17#endif
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index eeb0f48bb99e..474773853cd1 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -14,6 +14,7 @@
14#include <asm/types.h> 14#include <asm/types.h>
15#include <asm/cache.h> 15#include <asm/cache.h>
16#include <asm/ptrace.h> 16#include <asm/ptrace.h>
17#include <asm/cpu-features.h>
17 18
18/* 19/*
19 * Default implementation of macro that returns current 20 * Default implementation of macro that returns current
@@ -38,27 +39,30 @@ enum cpu_type {
38 CPU_SH7604, 39 CPU_SH7604,
39 40
40 /* SH-3 types */ 41 /* SH-3 types */
41 CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, 42 CPU_SH7705, CPU_SH7706, CPU_SH7707,
42 CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300, 43 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
44 CPU_SH7709, CPU_SH7709A, CPU_SH7710,
45 CPU_SH7729, CPU_SH7300,
43 46
44 /* SH-4 types */ 47 /* SH-4 types */
45 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, 48 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
46 CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, 49 CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
47 CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781, 50 CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781,
48 51
49 /* Unknown subtype */ 52 /* Unknown subtype */
50 CPU_SH_NONE 53 CPU_SH_NONE
51}; 54};
52 55
53struct sh_cpuinfo { 56struct sh_cpuinfo {
54 enum cpu_type type; 57 unsigned int type;
55 unsigned long loops_per_jiffy; 58 unsigned long loops_per_jiffy;
56 59
57 struct cache_info icache; 60 struct cache_info icache; /* Primary I-cache */
58 struct cache_info dcache; 61 struct cache_info dcache; /* Primary D-cache */
62 struct cache_info scache; /* Secondary cache */
59 63
60 unsigned long flags; 64 unsigned long flags;
61}; 65} __attribute__ ((aligned(SMP_CACHE_BYTES)));
62 66
63extern struct sh_cpuinfo boot_cpu_data; 67extern struct sh_cpuinfo boot_cpu_data;
64 68
@@ -125,17 +129,6 @@ union sh_fpu_union {
125 struct sh_fpu_soft_struct soft; 129 struct sh_fpu_soft_struct soft;
126}; 130};
127 131
128/*
129 * Processor flags
130 */
131
132#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
133#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
134#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
135#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
136#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
137#define CPU_HAS_PTEA 0x0020 /* PTEA register */
138
139struct thread_struct { 132struct thread_struct {
140 unsigned long sp; 133 unsigned long sp;
141 unsigned long pc; 134 unsigned long pc;
@@ -149,6 +142,10 @@ struct thread_struct {
149 union sh_fpu_union fpu; 142 union sh_fpu_union fpu;
150}; 143};
151 144
145typedef struct {
146 unsigned long seg;
147} mm_segment_t;
148
152/* Count of active tasks with UBC settings */ 149/* Count of active tasks with UBC settings */
153extern int ubc_usercnt; 150extern int ubc_usercnt;
154 151
@@ -266,5 +263,24 @@ extern unsigned long get_wchan(struct task_struct *p);
266#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") 263#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
267#define cpu_relax() barrier() 264#define cpu_relax() barrier()
268 265
266#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
267 defined(CONFIG_CPU_SH4)
268#define PREFETCH_STRIDE L1_CACHE_BYTES
269#define ARCH_HAS_PREFETCH
270#define ARCH_HAS_PREFETCHW
271static inline void prefetch(void *x)
272{
273 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
274}
275
276#define prefetchw(x) prefetch(x)
277#endif
278
279#ifdef CONFIG_VSYSCALL
280extern int vsyscall_init(void);
281#else
282#define vsyscall_init() do { } while (0)
283#endif
284
269#endif /* __KERNEL__ */ 285#endif /* __KERNEL__ */
270#endif /* __ASM_SH_PROCESSOR_H */ 286#endif /* __ASM_SH_PROCESSOR_H */
diff --git a/include/asm-sh/r7780rp/ide.h b/include/asm-sh/r7780rp/ide.h
new file mode 100644
index 000000000000..a1ed78e0f617
--- /dev/null
+++ b/include/asm-sh/r7780rp/ide.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_R7780RP_IDE_H
2#define __ASM_SH_R7780RP_IDE_H
3
4/* Nothing to see here.. */
5#include <asm/mach/r7780rp.h>
6
7#endif /* __ASM_SH_R7780RP_IDE_H */
8
diff --git a/include/asm-sh/r7780rp/r7780rp.h b/include/asm-sh/r7780rp/r7780rp.h
new file mode 100644
index 000000000000..f95d9dba31a2
--- /dev/null
+++ b/include/asm-sh/r7780rp/r7780rp.h
@@ -0,0 +1,177 @@
1#ifndef __ASM_SH_RENESAS_R7780RP_H
2#define __ASM_SH_RENESAS_R7780RP_H
3
4/*
5 * linux/include/asm-sh/r7780rp.h
6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 *
9 * Renesas Solutions Highlander R7780RP support
10 */
11
12/* Box specific addresses. */
13#if defined(CONFIG_SH_R7780MP)
14#define PA_BCR 0xa4000000 /* FPGA */
15#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
16#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
17#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */
18#define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */
19#define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */
20#define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */
21#define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */
22#define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */
23#define PA_PCICD (PA_BCR+0x0010) /* PCI Conector detect control */
24#define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */
25#define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */
26#define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */
27#define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */
28#define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */
29#define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */
30#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */
31#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */
32#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */
33#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */
34#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */
35#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */
36#define PA_DBSW (PA_BCR+0x0200) /* Debug Board Switch control */
37#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */
38#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */
39#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */
40#define PA_SCSMR0 (PA_BCR+0x0400) /* SCIF0 Serial mode control */
41#define PA_SCBRR0 (PA_BCR+0x0404) /* SCIF0 Bit rate control */
42#define PA_SCSCR0 (PA_BCR+0x0408) /* SCIF0 Serial control */
43#define PA_SCFTDR0 (PA_BCR+0x040c) /* SCIF0 Send FIFO control */
44#define PA_SCFSR0 (PA_BCR+0x0410) /* SCIF0 Serial status control */
45#define PA_SCFRDR0 (PA_BCR+0x0414) /* SCIF0 Receive FIFO control */
46#define PA_SCFCR0 (PA_BCR+0x0418) /* SCIF0 FIFO control */
47#define PA_SCTFDR0 (PA_BCR+0x041c) /* SCIF0 Send FIFO data control */
48#define PA_SCRFDR0 (PA_BCR+0x0420) /* SCIF0 Receive FIFO data control */
49#define PA_SCSPTR0 (PA_BCR+0x0424) /* SCIF0 Serial Port control */
50#define PA_SCLSR0 (PA_BCR+0x0428) /* SCIF0 Line Status control */
51#define PA_SCRER0 (PA_BCR+0x042c) /* SCIF0 Serial Error control */
52#define PA_SCSMR1 (PA_BCR+0x0500) /* SCIF1 Serial mode control */
53#define PA_SCBRR1 (PA_BCR+0x0504) /* SCIF1 Bit rate control */
54#define PA_SCSCR1 (PA_BCR+0x0508) /* SCIF1 Serial control */
55#define PA_SCFTDR1 (PA_BCR+0x050c) /* SCIF1 Send FIFO control */
56#define PA_SCFSR1 (PA_BCR+0x0510) /* SCIF1 Serial status control */
57#define PA_SCFRDR1 (PA_BCR+0x0514) /* SCIF1 Receive FIFO control */
58#define PA_SCFCR1 (PA_BCR+0x0518) /* SCIF1 FIFO control */
59#define PA_SCTFDR1 (PA_BCR+0x051c) /* SCIF1 Send FIFO data control */
60#define PA_SCRFDR1 (PA_BCR+0x0520) /* SCIF1 Receive FIFO data control */
61#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */
62#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */
63#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */
64#define PA_ICCR (PA_BCR+0x0600) /* Serial control */
65#define PA_SAR (PA_BCR+0x0602) /* Serial Slave control */
66#define PA_MDR (PA_BCR+0x0604) /* Serial Mode control */
67#define PA_ADR1 (PA_BCR+0x0606) /* Serial Address1 control */
68#define PA_DAR1 (PA_BCR+0x0646) /* Serial Data1 control */
69#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */
70#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */
71#define PA_PMR (PA_BCR+0x0900) /* */
72
73#define PA_AX88796L 0xa4100400 /* AX88796L Area */
74#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
75#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
76#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
77#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
78#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
79
80#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
81
82#define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */
83#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */
84#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */
85#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */
86#define IRQ_CFCARD 1 /* CF Card IRQ */
87// #define IRQ_CFINST 0 /* CF Card Insert IRQ */
88#define IRQ_TP 2 /* Touch Panel IRQ */
89#define IRQ_SCI1 3 /* SCI1 IRQ */
90#define IRQ_SCI0 4 /* SCI0 IRQ */
91#define IRQ_2SERIAL 5 /* Serial IRQ */
92#define IRQ_RTC 6 /* RTC A / B IRQ */
93#define IRQ_EXTENTION6 7 /* EXT6n IRQ */
94#define IRQ_EXTENTION5 8 /* EXT5n IRQ */
95#define IRQ_EXTENTION4 9 /* EXT4n IRQ */
96#define IRQ_EXTENTION2 10 /* EXT2n IRQ */
97#define IRQ_EXTENTION1 11 /* EXT1n IRQ */
98#define IRQ_ONETH 13 /* On board Ethernet IRQ */
99#define IRQ_PSW 14 /* Push Switch IRQ */
100
101#else /* R7780RP */
102
103#define PA_BCR 0xa5000000 /* FPGA */
104#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
105#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
106#define PA_SDPOW (PA_BCR+0x0004) /* SD Power control */
107#define PA_RSTCTL (PA_BCR+0x0006) /* Device Reset control */
108#define PA_PCIBD (PA_BCR+0x0008) /* PCI Board detect control */
109#define PA_PCICD (PA_BCR+0x000a) /* PCI Conector detect control */
110#define PA_ZIGIO1 (PA_BCR+0x000c) /* Zigbee IO control 1 */
111#define PA_ZIGIO2 (PA_BCR+0x000e) /* Zigbee IO control 2 */
112#define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */
113#define PA_ZIGIO4 (PA_BCR+0x0012) /* Zigbee IO control 4 */
114#define PA_IVDRMON (PA_BCR+0x0014) /* iVDR Moniter control */
115#define PA_IVDRCTL (PA_BCR+0x0016) /* iVDR control */
116#define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */
117#define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */
118#define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */
119#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */
120#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */
121#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */
122#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */
123#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */
124#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */
125#define PA_DBDET (PA_BCR+0x0200) /* Debug Board detect control */
126#define PA_DBDISPCTL (PA_BCR+0x0202) /* Debug Board Dot timing control */
127#define PA_DBSW (PA_BCR+0x0204) /* Debug Board Switch control */
128#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */
129#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */
130#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */
131#define PA_SCSMR (PA_BCR+0x0400) /* SCIF Serial mode control */
132#define PA_SCBRR (PA_BCR+0x0402) /* SCIF Bit rate control */
133#define PA_SCSCR (PA_BCR+0x0404) /* SCIF Serial control */
134#define PA_SCFDTR (PA_BCR+0x0406) /* SCIF Send FIFO control */
135#define PA_SCFSR (PA_BCR+0x0408) /* SCIF Serial status control */
136#define PA_SCFRDR (PA_BCR+0x040a) /* SCIF Receive FIFO control */
137#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */
138#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */
139#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */
140#define PA_ICCR (PA_BCR+0x0500) /* Serial control */
141#define PA_SAR (PA_BCR+0x0502) /* Serial Slave control */
142#define PA_MDR (PA_BCR+0x0504) /* Serial Mode control */
143#define PA_ADR1 (PA_BCR+0x0506) /* Serial Address1 control */
144#define PA_DAR1 (PA_BCR+0x0546) /* Serial Data1 control */
145#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */
146
147#define PA_AX88796L 0xa5800400 /* AX88796L Area */
148#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
149#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
150#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
151#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
152#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
153
154#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
155
156#define IRQ_PCISLOT1 0 /* PCI Slot #1 IRQ */
157#define IRQ_PCISLOT2 1 /* PCI Slot #2 IRQ */
158#define IRQ_PCISLOT3 2 /* PCI Slot #3 IRQ */
159#define IRQ_PCISLOT4 3 /* PCI Slot #4 IRQ */
160#define IRQ_CFCARD 4 /* CF Card IRQ */
161#define IRQ_CFINST 5 /* CF Card Insert IRQ */
162#define IRQ_M66596 6 /* M66596 IRQ */
163#define IRQ_SDCARD 7 /* SD Card IRQ */
164#define IRQ_TUCHPANEL 8 /* Touch Panel IRQ */
165#define IRQ_SCI 9 /* SCI IRQ */
166#define IRQ_2SERIAL 10 /* Serial IRQ */
167#define IRQ_EXTENTION 11 /* EXTn IRQ */
168#define IRQ_ONETH 12 /* On board Ethernet IRQ */
169#define IRQ_PSW 13 /* Push Switch IRQ */
170#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */
171
172#endif /* CONFIG_SH_R7780MP */
173
174#define __IO_PREFIX r7780rp
175#include <asm/io_generic.h>
176
177#endif /* __ASM_SH_RENESAS_R7780RP */
diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h
index cea9cdf9b925..91aacc96151b 100644
--- a/include/asm-sh/rtc.h
+++ b/include/asm-sh/rtc.h
@@ -1,29 +1,8 @@
1#ifndef _ASM_RTC_H 1#ifndef _ASM_RTC_H
2#define _ASM_RTC_H 2#define _ASM_RTC_H
3#ifdef __KERNEL__
4 3
5#include <asm/machvec.h>
6#include <asm/cpu/rtc.h>
7
8extern void sh_rtc_gettimeofday(struct timespec *ts);
9extern int sh_rtc_settimeofday(const time_t secs);
10extern void (*board_time_init)(void); 4extern void (*board_time_init)(void);
11extern void (*rtc_get_time)(struct timespec *); 5extern void (*rtc_sh_get_time)(struct timespec *);
12extern int (*rtc_set_time)(const time_t); 6extern int (*rtc_sh_set_time)(const time_t);
13
14/* RCR1 Bits */
15#define RCR1_CF 0x80 /* Carry Flag */
16#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
17#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
18#define RCR1_AF 0x01 /* Alarm Flag */
19
20/* RCR2 Bits */
21#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
22#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
23#define RCR2_RTCEN 0x08 /* ENable RTC */
24#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
25#define RCR2_RESET 0x02 /* Reset bit */
26#define RCR2_START 0x01 /* Start bit */
27 7
28#endif /* __KERNEL__ */
29#endif /* _ASM_RTC_H */ 8#endif /* _ASM_RTC_H */
diff --git a/include/asm-sh/rts7751r2d/rts7751r2d.h b/include/asm-sh/rts7751r2d/rts7751r2d.h
index 4e09ba597e9a..b112ae221fd1 100644
--- a/include/asm-sh/rts7751r2d/rts7751r2d.h
+++ b/include/asm-sh/rts7751r2d/rts7751r2d.h
@@ -41,8 +41,6 @@
41 41
42#define PA_AX88796L 0xaa000400 /* AX88796L Area */ 42#define PA_AX88796L 0xaa000400 /* AX88796L Area */
43#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */ 43#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */
44#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
45#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
46#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ 44#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
47#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ 45#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
48 46
diff --git a/include/asm-sh/scatterlist.h b/include/asm-sh/scatterlist.h
index 7b91df140022..d19e7cd3b023 100644
--- a/include/asm-sh/scatterlist.h
+++ b/include/asm-sh/scatterlist.h
@@ -10,4 +10,13 @@ struct scatterlist {
10 10
11#define ISA_DMA_THRESHOLD (0x1fffffff) 11#define ISA_DMA_THRESHOLD (0x1fffffff)
12 12
13/* These macros should be used after a pci_map_sg call has been done
14 * to get bus addresses of each of the SG entries and their lengths.
15 * You should only work with the number of sg entries pci_map_sg
16 * returns, or alternatively stop on the first sg_dma_len(sg) which
17 * is 0.
18 */
19#define sg_dma_address(sg) ((sg)->dma_address)
20#define sg_dma_len(sg) ((sg)->length)
21
13#endif /* !(__ASM_SH_SCATTERLIST_H) */ 22#endif /* !(__ASM_SH_SCATTERLIST_H) */
diff --git a/include/asm-sh/sci.h b/include/asm-sh/sci.h
new file mode 100644
index 000000000000..52e73660c129
--- /dev/null
+++ b/include/asm-sh/sci.h
@@ -0,0 +1,34 @@
1#ifndef __ASM_SH_SCI_H
2#define __ASM_SH_SCI_H
3
4#include <linux/serial_core.h>
5
6/*
7 * Generic header for SuperH SCI(F)
8 *
9 * Do not place SH-specific parts in here, sh64 and h8300 depend on this too.
10 */
11
12/* Offsets into the sci_port->irqs array */
13enum {
14 SCIx_ERI_IRQ,
15 SCIx_RXI_IRQ,
16 SCIx_TXI_IRQ,
17 SCIx_BRI_IRQ,
18 SCIx_NR_IRQS,
19};
20
21/*
22 * Platform device specific platform_data struct
23 */
24struct plat_sci_port {
25 void __iomem *membase; /* io cookie */
26 unsigned long mapbase; /* resource base */
27 unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
28 unsigned int type; /* SCI / SCIF / IRDA */
29 upf_t flags; /* UPF_* flags */
30};
31
32int early_sci_setup(struct uart_port *port);
33
34#endif /* __ASM_SH_SCI_H */
diff --git a/include/asm-sh/se/se.h b/include/asm-sh/se.h
index 791c5da0388a..a1832154a3aa 100644
--- a/include/asm-sh/se/se.h
+++ b/include/asm-sh/se.h
@@ -74,4 +74,7 @@
74#define IRQ_STNIC 10 74#define IRQ_STNIC 10
75#endif 75#endif
76 76
77#define __IO_PREFIX se
78#include <asm/io_generic.h>
79
77#endif /* __ASM_SH_HITACHI_SE_H */ 80#endif /* __ASM_SH_HITACHI_SE_H */
diff --git a/include/asm-sh/se/io.h b/include/asm-sh/se/io.h
deleted file mode 100644
index 9eeb86cd6cef..000000000000
--- a/include/asm-sh/se/io.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * include/asm-sh/io_se.h
3 *
4 * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * IO functions for an Hitachi SolutionEngine
10 */
11
12#ifndef _ASM_SH_IO_SE_H
13#define _ASM_SH_IO_SE_H
14
15extern unsigned char se_inb(unsigned long port);
16extern unsigned short se_inw(unsigned long port);
17extern unsigned int se_inl(unsigned long port);
18
19extern void se_outb(unsigned char value, unsigned long port);
20extern void se_outw(unsigned short value, unsigned long port);
21extern void se_outl(unsigned int value, unsigned long port);
22
23extern unsigned char se_inb_p(unsigned long port);
24extern void se_outb_p(unsigned char value, unsigned long port);
25
26extern void se_insb(unsigned long port, void *addr, unsigned long count);
27extern void se_insw(unsigned long port, void *addr, unsigned long count);
28extern void se_insl(unsigned long port, void *addr, unsigned long count);
29extern void se_outsb(unsigned long port, const void *addr, unsigned long count);
30extern void se_outsw(unsigned long port, const void *addr, unsigned long count);
31extern void se_outsl(unsigned long port, const void *addr, unsigned long count);
32
33extern unsigned long se_isa_port2addr(unsigned long offset);
34
35#endif /* _ASM_SH_IO_SE_H */
diff --git a/include/asm-sh/se7300/se7300.h b/include/asm-sh/se7300.h
index 3ec1ded86c97..4e24edccb30d 100644
--- a/include/asm-sh/se7300/se7300.h
+++ b/include/asm-sh/se7300.h
@@ -58,4 +58,7 @@
58#define PA_LCD1 0xb8000000 58#define PA_LCD1 0xb8000000
59#define PA_LCD2 0xb8800000 59#define PA_LCD2 0xb8800000
60 60
61#define __IO_PREFIX sh7300se
62#include <asm/io_generic.h>
63
61#endif /* __ASM_SH_HITACHI_SE7300_H */ 64#endif /* __ASM_SH_HITACHI_SE7300_H */
diff --git a/include/asm-sh/se7300/io.h b/include/asm-sh/se7300/io.h
deleted file mode 100644
index c6af85529714..000000000000
--- a/include/asm-sh/se7300/io.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * include/asm-sh/se7300/io.h
3 *
4 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
5 * IO functions for SH-Mobile(SH7300) SolutionEngine
6 */
7
8#ifndef _ASM_SH_IO_7300SE_H
9#define _ASM_SH_IO_7300SE_H
10
11extern unsigned char sh7300se_inb(unsigned long port);
12extern unsigned short sh7300se_inw(unsigned long port);
13extern unsigned int sh7300se_inl(unsigned long port);
14
15extern void sh7300se_outb(unsigned char value, unsigned long port);
16extern void sh7300se_outw(unsigned short value, unsigned long port);
17extern void sh7300se_outl(unsigned int value, unsigned long port);
18
19extern unsigned char sh7300se_inb_p(unsigned long port);
20extern void sh7300se_outb_p(unsigned char value, unsigned long port);
21
22extern void sh7300se_insb(unsigned long port, void *addr, unsigned long count);
23extern void sh7300se_insw(unsigned long port, void *addr, unsigned long count);
24extern void sh7300se_insl(unsigned long port, void *addr, unsigned long count);
25extern void sh7300se_outsb(unsigned long port, const void *addr, unsigned long count);
26extern void sh7300se_outsw(unsigned long port, const void *addr, unsigned long count);
27extern void sh7300se_outsl(unsigned long port, const void *addr, unsigned long count);
28
29#endif /* _ASM_SH_IO_7300SE_H */
diff --git a/include/asm-sh/se73180/se73180.h b/include/asm-sh/se73180.h
index f5b93e39e768..3a4acb3e38a1 100644
--- a/include/asm-sh/se73180/se73180.h
+++ b/include/asm-sh/se73180.h
@@ -59,4 +59,7 @@
59#define PA_LCD1 0xb8000000 59#define PA_LCD1 0xb8000000
60#define PA_LCD2 0xb8800000 60#define PA_LCD2 0xb8800000
61 61
62#define __IO_PREFIX sh73180se
63#include <asm/io_generic.h>
64
62#endif /* __ASM_SH_HITACHI_SE73180_H */ 65#endif /* __ASM_SH_HITACHI_SE73180_H */
diff --git a/include/asm-sh/se73180/io.h b/include/asm-sh/se73180/io.h
deleted file mode 100644
index c9cb1b9412c6..000000000000
--- a/include/asm-sh/se73180/io.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * include/asm-sh/se73180/io.h
3 *
4 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
5 * Based on include/asm-sh/se7300/io.h
6 *
7 * IO functions for SH-Mobile3(SH73180) SolutionEngine
8 *
9 */
10
11#ifndef _ASM_SH_IO_73180SE_H
12#define _ASM_SH_IO_73180SE_H
13
14extern unsigned char sh73180se_inb(unsigned long port);
15extern unsigned short sh73180se_inw(unsigned long port);
16extern unsigned int sh73180se_inl(unsigned long port);
17
18extern void sh73180se_outb(unsigned char value, unsigned long port);
19extern void sh73180se_outw(unsigned short value, unsigned long port);
20extern void sh73180se_outl(unsigned int value, unsigned long port);
21
22extern unsigned char sh73180se_inb_p(unsigned long port);
23extern void sh73180se_outb_p(unsigned char value, unsigned long port);
24
25extern void sh73180se_insb(unsigned long port, void *addr, unsigned long count);
26extern void sh73180se_insw(unsigned long port, void *addr, unsigned long count);
27extern void sh73180se_insl(unsigned long port, void *addr, unsigned long count);
28extern void sh73180se_outsb(unsigned long port, const void *addr, unsigned long count);
29extern void sh73180se_outsw(unsigned long port, const void *addr, unsigned long count);
30extern void sh73180se_outsl(unsigned long port, const void *addr, unsigned long count);
31
32#endif /* _ASM_SH_IO_73180SE_H */
diff --git a/include/asm-sh/se7343.h b/include/asm-sh/se7343.h
new file mode 100644
index 000000000000..e7914a54aa96
--- /dev/null
+++ b/include/asm-sh/se7343.h
@@ -0,0 +1,82 @@
1#ifndef __ASM_SH_HITACHI_SE7343_H
2#define __ASM_SH_HITACHI_SE7343_H
3
4/*
5 * include/asm-sh/se/se7343.h
6 *
7 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
8 *
9 * SH-Mobile SolutionEngine 7343 support
10 */
11
12/* Box specific addresses. */
13
14/* Area 0 */
15#define PA_ROM 0x00000000 /* EPROM */
16#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
17#define PA_FROM 0x00400000 /* Flash ROM */
18#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
19#define PA_SRAM 0x00800000 /* SRAM */
20#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
21/* Area 1 */
22#define PA_EXT1 0x04000000
23#define PA_EXT1_SIZE 0x04000000
24/* Area 2 */
25#define PA_EXT2 0x08000000
26#define PA_EXT2_SIZE 0x04000000
27/* Area 3 */
28#define PA_SDRAM 0x0c000000
29#define PA_SDRAM_SIZE 0x04000000
30/* Area 4 */
31#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
32#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
33#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
34#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
35#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
36#define MRSHPC_OPTION (PA_MRSHPC + 6)
37#define MRSHPC_CSR (PA_MRSHPC + 8)
38#define MRSHPC_ISR (PA_MRSHPC + 10)
39#define MRSHPC_ICR (PA_MRSHPC + 12)
40#define MRSHPC_CPWCR (PA_MRSHPC + 14)
41#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
42#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
43#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
44#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
45#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
46#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
47#define MRSHPC_CDCR (PA_MRSHPC + 28)
48#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
49#define PA_LED 0xb0C00000 /* LED */
50#define LED_SHIFT 0
51#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
52#define PA_CPLD_MODESET 0xb1400004 /* CPLD Mode set register */
53#define PA_CPLD_ST 0xb1400008 /* CPLD Interrupt status register */
54#define PA_CPLD_IMSK 0xb140000a /* CPLD Interrupt mask register */
55/* Area 5 */
56#define PA_EXT5 0x14000000
57#define PA_EXT5_SIZE 0x04000000
58/* Area 6 */
59#define PA_LCD1 0xb8000000
60#define PA_LCD2 0xb8800000
61
62#define __IO_PREFIX sh7343se
63#include <asm/io_generic.h>
64
65/* External Multiplexed interrupts */
66#define PC_IRQ0 OFFCHIP_IRQ_BASE
67#define PC_IRQ1 (PC_IRQ0 + 1)
68#define PC_IRQ2 (PC_IRQ1 + 1)
69#define PC_IRQ3 (PC_IRQ2 + 1)
70
71#define EXT_IRQ0 (PC_IRQ3 + 1)
72#define EXT_IRQ1 (EXT_IRQ0 + 1)
73#define EXT_IRQ2 (EXT_IRQ1 + 1)
74#define EXT_IRQ3 (EXT_IRQ2 + 1)
75
76#define USB_IRQ0 (EXT_IRQ3 + 1)
77#define USB_IRQ1 (USB_IRQ0 + 1)
78
79#define UART_IRQ0 (USB_IRQ1 + 1)
80#define UART_IRQ1 (UART_IRQ0 + 1)
81
82#endif /* __ASM_SH_HITACHI_SE7343_H */
diff --git a/include/asm-sh/se7751/se7751.h b/include/asm-sh/se7751.h
index 738e22bebdfb..88cd379d9084 100644
--- a/include/asm-sh/se7751/se7751.h
+++ b/include/asm-sh/se7751.h
@@ -65,4 +65,7 @@
65 65
66#define IRQ_79C973 13 66#define IRQ_79C973 13
67 67
68#define __IO_PREFIX sh7751se
69#include <asm/io_generic.h>
70
68#endif /* __ASM_SH_HITACHI_7751SE_H */ 71#endif /* __ASM_SH_HITACHI_7751SE_H */
diff --git a/include/asm-sh/se7751/io.h b/include/asm-sh/se7751/io.h
deleted file mode 100644
index 78d8f5744bc5..000000000000
--- a/include/asm-sh/se7751/io.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * include/asm-sh/io_7751se.h
3 *
4 * Modified version of io_se.h for the 7751se-specific functions.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * IO functions for an Hitachi SolutionEngine
10 */
11
12#ifndef _ASM_SH_IO_7751SE_H
13#define _ASM_SH_IO_7751SE_H
14
15extern unsigned char sh7751se_inb(unsigned long port);
16extern unsigned short sh7751se_inw(unsigned long port);
17extern unsigned int sh7751se_inl(unsigned long port);
18
19extern void sh7751se_outb(unsigned char value, unsigned long port);
20extern void sh7751se_outw(unsigned short value, unsigned long port);
21extern void sh7751se_outl(unsigned int value, unsigned long port);
22
23extern unsigned char sh7751se_inb_p(unsigned long port);
24extern void sh7751se_outb_p(unsigned char value, unsigned long port);
25
26extern void sh7751se_insb(unsigned long port, void *addr, unsigned long count);
27extern void sh7751se_insw(unsigned long port, void *addr, unsigned long count);
28extern void sh7751se_insl(unsigned long port, void *addr, unsigned long count);
29extern void sh7751se_outsb(unsigned long port, const void *addr, unsigned long count);
30extern void sh7751se_outsw(unsigned long port, const void *addr, unsigned long count);
31extern void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count);
32
33extern unsigned char sh7751se_readb(unsigned long addr);
34extern unsigned short sh7751se_readw(unsigned long addr);
35extern unsigned int sh7751se_readl(unsigned long addr);
36extern void sh7751se_writeb(unsigned char b, unsigned long addr);
37extern void sh7751se_writew(unsigned short b, unsigned long addr);
38extern void sh7751se_writel(unsigned int b, unsigned long addr);
39
40extern unsigned long sh7751se_isa_port2addr(unsigned long offset);
41
42#endif /* _ASM_SH_IO_7751SE_H */
diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h
index d19de7c8df4e..34ca8a7f06ba 100644
--- a/include/asm-sh/setup.h
+++ b/include/asm-sh/setup.h
@@ -4,5 +4,7 @@
4 4
5#define COMMAND_LINE_SIZE 256 5#define COMMAND_LINE_SIZE 256
6 6
7int setup_early_printk(char *);
8
7#endif /* _SH_SETUP_H */ 9#endif /* _SH_SETUP_H */
8#endif /* __KERNEL__ */ 10#endif /* __KERNEL__ */
diff --git a/include/asm-sh/sfp-machine.h b/include/asm-sh/sfp-machine.h
new file mode 100644
index 000000000000..8a6399a8cfe0
--- /dev/null
+++ b/include/asm-sh/sfp-machine.h
@@ -0,0 +1,86 @@
1/* Machine-dependent software floating-point definitions.
2 SuperH kernel version.
3 Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
4 This file is part of the GNU C Library.
5 Contributed by Richard Henderson (rth@cygnus.com),
6 Jakub Jelinek (jj@ultra.linux.cz),
7 David S. Miller (davem@redhat.com) and
8 Peter Maydell (pmaydell@chiark.greenend.org.uk).
9
10 The GNU C Library is free software; you can redistribute it and/or
11 modify it under the terms of the GNU Library General Public License as
12 published by the Free Software Foundation; either version 2 of the
13 License, or (at your option) any later version.
14
15 The GNU C Library is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 Library General Public License for more details.
19
20 You should have received a copy of the GNU Library General Public
21 License along with the GNU C Library; see the file COPYING.LIB. If
22 not, write to the Free Software Foundation, Inc.,
23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25#ifndef _SFP_MACHINE_H
26#define _SFP_MACHINE_H
27
28#include <linux/config.h>
29
30#define _FP_W_TYPE_SIZE 32
31#define _FP_W_TYPE unsigned long
32#define _FP_WS_TYPE signed long
33#define _FP_I_TYPE long
34
35#define _FP_MUL_MEAT_S(R,X,Y) \
36 _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
37#define _FP_MUL_MEAT_D(R,X,Y) \
38 _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
39#define _FP_MUL_MEAT_Q(R,X,Y) \
40 _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
41
42#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y)
43#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
44#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
45
46#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
47#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
48#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
49#define _FP_NANSIGN_S 0
50#define _FP_NANSIGN_D 0
51#define _FP_NANSIGN_Q 0
52
53#define _FP_KEEPNANFRACP 1
54
55/*
56 * If one NaN is signaling and the other is not,
57 * we choose that one, otherwise we choose X.
58 */
59#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
60 do { \
61 if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
62 && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
63 { \
64 R##_s = Y##_s; \
65 _FP_FRAC_COPY_##wc(R,Y); \
66 } \
67 else \
68 { \
69 R##_s = X##_s; \
70 _FP_FRAC_COPY_##wc(R,X); \
71 } \
72 R##_c = FP_CLS_NAN; \
73 } while (0)
74
75//#define FP_ROUNDMODE FPSCR_RM
76#define FP_DENORM_ZERO 1/*FPSCR_DN*/
77
78/* Exception flags. */
79#define FP_EX_INVALID (1<<4)
80#define FP_EX_DIVZERO (1<<3)
81#define FP_EX_OVERFLOW (1<<2)
82#define FP_EX_UNDERFLOW (1<<1)
83#define FP_EX_INEXACT (1<<0)
84
85#endif
86
diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h
index 25792e9831ea..df3b187ef883 100644
--- a/include/asm-sh/sh03/io.h
+++ b/include/asm-sh/sh03/io.h
@@ -33,14 +33,6 @@
33#define IRL3_IPR_POS 0 33#define IRL3_IPR_POS 0
34#define IRL3_PRIORITY 4 34#define IRL3_PRIORITY 4
35 35
36 36void heartbeat_sh03(void);
37extern unsigned long sh03_isa_port2addr(unsigned long offset);
38
39extern void setup_sh03(void);
40extern void init_sh03_IRQ(void);
41extern void heartbeat_sh03(void);
42
43extern void sh03_rtc_gettimeofday(struct timeval *tv);
44extern int sh03_rtc_settimeofday(const struct timeval *tv);
45 37
46#endif /* _ASM_SH_IO_SH03_H */ 38#endif /* _ASM_SH_IO_SH03_H */
diff --git a/include/asm-sh/sh2000/sh2000.h b/include/asm-sh/sh2000/sh2000.h
deleted file mode 100644
index 8d547324d59a..000000000000
--- a/include/asm-sh/sh2000/sh2000.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef __ASM_SH_SH2000_SH2000_H
2#define __ASM_SH_SH2000_SH2000_H
3
4/* arch/sh/boards/sh2000/setup.c */
5extern int setup_sh2000(void);
6
7#endif /* __ASM_SH_SH2000_SH2000_H */
8
diff --git a/include/asm-sh/shmin/shmin.h b/include/asm-sh/shmin/shmin.h
new file mode 100644
index 000000000000..36ba138a81fb
--- /dev/null
+++ b/include/asm-sh/shmin/shmin.h
@@ -0,0 +1,9 @@
1#ifndef __ASM_SH_SHMIN_H
2#define __ASM_SH_SHMIN_H
3
4#define SHMIN_IO_BASE 0xb0000000UL
5
6#define SHMIN_NE_IRQ IRQ2_IRQ
7#define SHMIN_NE_BASE 0x300
8
9#endif
diff --git a/include/asm-sh/shmparam.h b/include/asm-sh/shmparam.h
index 0a95604b9b66..ba1758d90106 100644
--- a/include/asm-sh/shmparam.h
+++ b/include/asm-sh/shmparam.h
@@ -1,8 +1,22 @@
1/*
2 * include/asm-sh/shmparam.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2006 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
1#ifndef __ASM_SH_SHMPARAM_H 11#ifndef __ASM_SH_SHMPARAM_H
2#define __ASM_SH_SHMPARAM_H 12#define __ASM_SH_SHMPARAM_H
3#ifdef __KERNEL__
4 13
5#include <asm/cpu/shmparam.h> 14/*
15 * SH-4 and SH-3 7705 have an aliasing dcache. Bump this up to a sensible value
16 * for everyone, and work out the specifics from the probed cache descriptor.
17 */
18#define SHMLBA 0x4000 /* attach addr a multiple of this */
19
20#define __ARCH_FORCE_SHMLBA
6 21
7#endif /* __KERNEL__ */
8#endif /* __ASM_SH_SHMPARAM_H */ 22#endif /* __ASM_SH_SHMPARAM_H */
diff --git a/include/asm-sh/se/smc37c93x.h b/include/asm-sh/smc37c93x.h
index 585da2a8fc45..585da2a8fc45 100644
--- a/include/asm-sh/se/smc37c93x.h
+++ b/include/asm-sh/smc37c93x.h
diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h
index f57c4fe9692a..71ecddf70db3 100644
--- a/include/asm-sh/smp.h
+++ b/include/asm-sh/smp.h
@@ -19,11 +19,6 @@
19#include <asm/atomic.h> 19#include <asm/atomic.h>
20#include <asm/current.h> 20#include <asm/current.h>
21 21
22extern cpumask_t cpu_online_map;
23extern cpumask_t cpu_possible_map;
24
25#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map)
26
27#define raw_smp_processor_id() (current_thread_info()->cpu) 22#define raw_smp_processor_id() (current_thread_info()->cpu)
28 23
29/* I've no idea what the real meaning of this is */ 24/* I've no idea what the real meaning of this is */
diff --git a/include/asm-sh/snapgear/io.h b/include/asm-sh/snapgear.h
index bfa97ac06280..6b5e4ddc073a 100644
--- a/include/asm-sh/snapgear/io.h
+++ b/include/asm-sh/snapgear.h
@@ -40,21 +40,8 @@
40#define IRL3_PRIORITY 4 40#define IRL3_PRIORITY 4
41#endif 41#endif
42 42
43extern unsigned char snapgear_inb(unsigned long port); 43#define __IO_PREFIX snapgear
44extern unsigned short snapgear_inw(unsigned long port); 44#include <asm/io_generic.h>
45extern unsigned int snapgear_inl(unsigned long port);
46
47extern void snapgear_outb(unsigned char value, unsigned long port);
48extern void snapgear_outw(unsigned short value, unsigned long port);
49extern void snapgear_outl(unsigned int value, unsigned long port);
50
51extern unsigned char snapgear_inb_p(unsigned long port);
52extern void snapgear_outb_p(unsigned char value, unsigned long port);
53
54extern void snapgear_insl(unsigned long port, void *addr, unsigned long count);
55extern void snapgear_outsl(unsigned long port, const void *addr, unsigned long count);
56
57extern unsigned long snapgear_isa_port2addr(unsigned long offset);
58 45
59#ifdef CONFIG_SH_SECUREEDGE5410 46#ifdef CONFIG_SH_SECUREEDGE5410
60/* 47/*
@@ -79,14 +66,14 @@ extern unsigned long snapgear_isa_port2addr(unsigned long offset);
79 * D12 - RTS RESET 66 * D12 - RTS RESET
80 */ 67 */
81 68
82 #define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) 69#define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000)
83 extern unsigned short secureedge5410_ioport; 70extern unsigned short secureedge5410_ioport;
84 71
85 #define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ 72#define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \
86 (secureedge5410_ioport = \ 73 (secureedge5410_ioport = \
87 ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) 74 ((secureedge5410_ioport & ~(mask)) | ((val) & (mask)))))
88 #define SECUREEDGE_READ_IOPORT() \ 75#define SECUREEDGE_READ_IOPORT() \
89 ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) 76 ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817))
90#endif 77#endif
91 78
92#endif /* _ASM_SH_IO_SNAPGEAR_H */ 79#endif /* _ASM_SH_IO_SNAPGEAR_H */
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index ad35ad4958f4..6c1f8fde5ac4 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -6,6 +6,7 @@
6 * Copyright (C) 2002 Paul Mundt 6 * Copyright (C) 2002 Paul Mundt
7 */ 7 */
8 8
9#include <asm/types.h>
9 10
10/* 11/*
11 * switch_to() should switch tasks to task nr n, first 12 * switch_to() should switch tasks to task nr n, first
@@ -66,13 +67,20 @@ static inline void sched_cacheflush(void)
66{ 67{
67} 68}
68 69
69#define nop() __asm__ __volatile__ ("nop") 70#ifdef CONFIG_CPU_SH4A
70 71#define __icbi() \
71 72{ \
72#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) 73 unsigned long __addr; \
74 __addr = 0xa8000000; \
75 __asm__ __volatile__( \
76 "icbi %0\n\t" \
77 : /* no output */ \
78 : "m" (__m(__addr))); \
79}
80#endif
73 81
74static __inline__ unsigned long tas(volatile int *m) 82static inline unsigned long tas(volatile int *m)
75{ /* #define tas(ptr) (xchg((ptr),1)) */ 83{
76 unsigned long retval; 84 unsigned long retval;
77 85
78 __asm__ __volatile__ ("tas.b @%1\n\t" 86 __asm__ __volatile__ ("tas.b @%1\n\t"
@@ -81,12 +89,33 @@ static __inline__ unsigned long tas(volatile int *m)
81 return retval; 89 return retval;
82} 90}
83 91
84extern void __xchg_called_with_bad_pointer(void); 92/*
85 93 * A brief note on ctrl_barrier(), the control register write barrier.
86#define mb() __asm__ __volatile__ ("": : :"memory") 94 *
87#define rmb() mb() 95 * Legacy SH cores typically require a sequence of 8 nops after
88#define wmb() __asm__ __volatile__ ("": : :"memory") 96 * modification of a control register in order for the changes to take
97 * effect. On newer cores (like the sh4a and sh5) this is accomplished
98 * with icbi.
99 *
100 * Also note that on sh4a in the icbi case we can forego a synco for the
101 * write barrier, as it's not necessary for control registers.
102 *
103 * Historically we have only done this type of barrier for the MMUCR, but
104 * it's also necessary for the CCR, so we make it generic here instead.
105 */
106#ifdef CONFIG_CPU_SH4A
107#define mb() __asm__ __volatile__ ("synco": : :"memory")
108#define rmb() mb()
109#define wmb() __asm__ __volatile__ ("synco": : :"memory")
110#define ctrl_barrier() __icbi()
111#define read_barrier_depends() do { } while(0)
112#else
113#define mb() __asm__ __volatile__ ("": : :"memory")
114#define rmb() mb()
115#define wmb() __asm__ __volatile__ ("": : :"memory")
116#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop")
89#define read_barrier_depends() do { } while(0) 117#define read_barrier_depends() do { } while(0)
118#endif
90 119
91#ifdef CONFIG_SMP 120#ifdef CONFIG_SMP
92#define smp_mb() mb() 121#define smp_mb() mb()
@@ -103,7 +132,8 @@ extern void __xchg_called_with_bad_pointer(void);
103#define set_mb(var, value) do { xchg(&var, value); } while (0) 132#define set_mb(var, value) do { xchg(&var, value); } while (0)
104 133
105/* Interrupt Control */ 134/* Interrupt Control */
106static __inline__ void local_irq_enable(void) 135#ifdef CONFIG_CPU_HAS_SR_RB
136static inline void local_irq_enable(void)
107{ 137{
108 unsigned long __dummy0, __dummy1; 138 unsigned long __dummy0, __dummy1;
109 139
@@ -116,8 +146,22 @@ static __inline__ void local_irq_enable(void)
116 : "1" (~0x000000f0) 146 : "1" (~0x000000f0)
117 : "memory"); 147 : "memory");
118} 148}
149#else
150static inline void local_irq_enable(void)
151{
152 unsigned long __dummy0, __dummy1;
153
154 __asm__ __volatile__ (
155 "stc sr, %0\n\t"
156 "and %1, %0\n\t"
157 "ldc %0, sr\n\t"
158 : "=&r" (__dummy0), "=r" (__dummy1)
159 : "1" (~0x000000f0)
160 : "memory");
161}
162#endif
119 163
120static __inline__ void local_irq_disable(void) 164static inline void local_irq_disable(void)
121{ 165{
122 unsigned long __dummy; 166 unsigned long __dummy;
123 __asm__ __volatile__("stc sr, %0\n\t" 167 __asm__ __volatile__("stc sr, %0\n\t"
@@ -128,6 +172,31 @@ static __inline__ void local_irq_disable(void)
128 : "memory"); 172 : "memory");
129} 173}
130 174
175static inline void set_bl_bit(void)
176{
177 unsigned long __dummy0, __dummy1;
178
179 __asm__ __volatile__ ("stc sr, %0\n\t"
180 "or %2, %0\n\t"
181 "and %3, %0\n\t"
182 "ldc %0, sr"
183 : "=&r" (__dummy0), "=r" (__dummy1)
184 : "r" (0x10000000), "r" (0xffffff0f)
185 : "memory");
186}
187
188static inline void clear_bl_bit(void)
189{
190 unsigned long __dummy0, __dummy1;
191
192 __asm__ __volatile__ ("stc sr, %0\n\t"
193 "and %2, %0\n\t"
194 "ldc %0, sr"
195 : "=&r" (__dummy0), "=r" (__dummy1)
196 : "1" (~0x10000000)
197 : "memory");
198}
199
131#define local_save_flags(x) \ 200#define local_save_flags(x) \
132 __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" ) 201 __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" )
133 202
@@ -138,7 +207,7 @@ static __inline__ void local_irq_disable(void)
138 (flags != 0); \ 207 (flags != 0); \
139}) 208})
140 209
141static __inline__ unsigned long local_irq_save(void) 210static inline unsigned long local_irq_save(void)
142{ 211{
143 unsigned long flags, __dummy; 212 unsigned long flags, __dummy;
144 213
@@ -154,35 +223,9 @@ static __inline__ unsigned long local_irq_save(void)
154 return flags; 223 return flags;
155} 224}
156 225
157#ifdef DEBUG_CLI_STI 226#define local_irq_restore(x) do { \
158static __inline__ void local_irq_restore(unsigned long x)
159{
160 if ((x & 0x000000f0) != 0x000000f0)
161 local_irq_enable();
162 else {
163 unsigned long flags;
164 local_save_flags(flags);
165
166 if (flags == 0) {
167 extern void dump_stack(void);
168 printk(KERN_ERR "BUG!\n");
169 dump_stack();
170 local_irq_disable();
171 }
172 }
173}
174#else
175#define local_irq_restore(x) do { \
176 if ((x & 0x000000f0) != 0x000000f0) \
177 local_irq_enable(); \
178} while (0)
179#endif
180
181#define really_restore_flags(x) do { \
182 if ((x & 0x000000f0) != 0x000000f0) \ 227 if ((x & 0x000000f0) != 0x000000f0) \
183 local_irq_enable(); \ 228 local_irq_enable(); \
184 else \
185 local_irq_disable(); \
186} while (0) 229} while (0)
187 230
188/* 231/*
@@ -210,8 +253,8 @@ do { \
210#define back_to_P1() \ 253#define back_to_P1() \
211do { \ 254do { \
212 unsigned long __dummy; \ 255 unsigned long __dummy; \
256 ctrl_barrier(); \
213 __asm__ __volatile__( \ 257 __asm__ __volatile__( \
214 "nop;nop;nop;nop;nop;nop;nop\n\t" \
215 "mov.l 1f, %0\n\t" \ 258 "mov.l 1f, %0\n\t" \
216 "jmp @%0\n\t" \ 259 "jmp @%0\n\t" \
217 " nop\n\t" \ 260 " nop\n\t" \
@@ -224,7 +267,7 @@ do { \
224/* For spinlocks etc */ 267/* For spinlocks etc */
225#define local_irq_save(x) x = local_irq_save() 268#define local_irq_save(x) x = local_irq_save()
226 269
227static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) 270static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
228{ 271{
229 unsigned long flags, retval; 272 unsigned long flags, retval;
230 273
@@ -235,7 +278,7 @@ static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
235 return retval; 278 return retval;
236} 279}
237 280
238static __inline__ unsigned long xchg_u8(volatile unsigned char * m, unsigned long val) 281static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
239{ 282{
240 unsigned long flags, retval; 283 unsigned long flags, retval;
241 284
@@ -246,20 +289,70 @@ static __inline__ unsigned long xchg_u8(volatile unsigned char * m, unsigned lon
246 return retval; 289 return retval;
247} 290}
248 291
249static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int size) 292extern void __xchg_called_with_bad_pointer(void);
293
294#define __xchg(ptr, x, size) \
295({ \
296 unsigned long __xchg__res; \
297 volatile void *__xchg_ptr = (ptr); \
298 switch (size) { \
299 case 4: \
300 __xchg__res = xchg_u32(__xchg_ptr, x); \
301 break; \
302 case 1: \
303 __xchg__res = xchg_u8(__xchg_ptr, x); \
304 break; \
305 default: \
306 __xchg_called_with_bad_pointer(); \
307 __xchg__res = x; \
308 break; \
309 } \
310 \
311 __xchg__res; \
312})
313
314#define xchg(ptr,x) \
315 ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr))))
316
317static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
318 unsigned long new)
319{
320 __u32 retval;
321 unsigned long flags;
322
323 local_irq_save(flags);
324 retval = *m;
325 if (retval == old)
326 *m = new;
327 local_irq_restore(flags); /* implies memory barrier */
328 return retval;
329}
330
331/* This function doesn't exist, so you'll get a linker error
332 * if something tries to do an invalid cmpxchg(). */
333extern void __cmpxchg_called_with_bad_pointer(void);
334
335#define __HAVE_ARCH_CMPXCHG 1
336
337static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
338 unsigned long new, int size)
250{ 339{
251 switch (size) { 340 switch (size) {
252 case 4: 341 case 4:
253 return xchg_u32(ptr, x); 342 return __cmpxchg_u32(ptr, old, new);
254 break;
255 case 1:
256 return xchg_u8(ptr, x);
257 break;
258 } 343 }
259 __xchg_called_with_bad_pointer(); 344 __cmpxchg_called_with_bad_pointer();
260 return x; 345 return old;
261} 346}
262 347
348#define cmpxchg(ptr,o,n) \
349 ({ \
350 __typeof__(*(ptr)) _o_ = (o); \
351 __typeof__(*(ptr)) _n_ = (n); \
352 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
353 (unsigned long)_n_, sizeof(*(ptr))); \
354 })
355
263/* XXX 356/* XXX
264 * disable hlt during certain critical i/o operations 357 * disable hlt during certain critical i/o operations
265 */ 358 */
diff --git a/include/asm-sh/systemh/io.h b/include/asm-sh/systemh/io.h
deleted file mode 100644
index 327849b49db8..000000000000
--- a/include/asm-sh/systemh/io.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * include/asm-sh/systemh/io.h
3 *
4 * Stupid I/O definitions for SystemH, cloned from SE7751.
5 *
6 * Copyright (C) 2003 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#ifndef __ASM_SH_SYSTEMH_IO_H
13#define __ASM_SH_SYSTEMH_IO_H
14
15extern unsigned char sh7751systemh_inb(unsigned long port);
16extern unsigned short sh7751systemh_inw(unsigned long port);
17extern unsigned int sh7751systemh_inl(unsigned long port);
18
19extern void sh7751systemh_outb(unsigned char value, unsigned long port);
20extern void sh7751systemh_outw(unsigned short value, unsigned long port);
21extern void sh7751systemh_outl(unsigned int value, unsigned long port);
22
23extern unsigned char sh7751systemh_inb_p(unsigned long port);
24extern void sh7751systemh_outb_p(unsigned char value, unsigned long port);
25
26extern void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count);
27extern void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count);
28extern void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count);
29extern void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count);
30extern void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count);
31extern void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count);
32
33extern unsigned char sh7751systemh_readb(unsigned long addr);
34extern unsigned short sh7751systemh_readw(unsigned long addr);
35extern unsigned int sh7751systemh_readl(unsigned long addr);
36extern void sh7751systemh_writeb(unsigned char b, unsigned long addr);
37extern void sh7751systemh_writew(unsigned short b, unsigned long addr);
38extern void sh7751systemh_writel(unsigned int b, unsigned long addr);
39
40extern unsigned long sh7751systemh_isa_port2addr(unsigned long offset);
41
42#endif /* __ASM_SH_SYSTEMH_IO_H */
43
diff --git a/include/asm-sh/systemh/7751systemh.h b/include/asm-sh/systemh7751.h
index 4170531bdbd9..b143bb2a2ca7 100644
--- a/include/asm-sh/systemh/7751systemh.h
+++ b/include/asm-sh/systemh7751.h
@@ -65,4 +65,7 @@
65 65
66#define IRQ_79C973 13 66#define IRQ_79C973 13
67 67
68#define __IO_PREFIX sh7751systemh
69#include <asm/io_generic.h>
70
68#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ 71#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */
diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h
index 7345350d98c0..3ebc3f9039eb 100644
--- a/include/asm-sh/thread_info.h
+++ b/include/asm-sh/thread_info.h
@@ -9,8 +9,8 @@
9 * Copyright (C) 2002 David Howells (dhowells@redhat.com) 9 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
10 * - Incorporating suggestions made by Linus Torvalds and Dave Miller 10 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
11 */ 11 */
12
13#ifdef __KERNEL__ 12#ifdef __KERNEL__
13#include <asm/page.h>
14 14
15#ifndef __ASSEMBLY__ 15#ifndef __ASSEMBLY__
16#include <asm/processor.h> 16#include <asm/processor.h>
@@ -21,7 +21,10 @@ struct thread_info {
21 unsigned long flags; /* low level flags */ 21 unsigned long flags; /* low level flags */
22 __u32 cpu; 22 __u32 cpu;
23 int preempt_count; /* 0 => preemptable, <0 => BUG */ 23 int preempt_count; /* 0 => preemptable, <0 => BUG */
24 mm_segment_t addr_limit; /* thread address space */
24 struct restart_block restart_block; 25 struct restart_block restart_block;
26 unsigned long previous_sp; /* sp of previous stack in case
27 of nested IRQ stacks */
25 __u8 supervisor_stack[0]; 28 __u8 supervisor_stack[0];
26}; 29};
27 30
@@ -29,6 +32,13 @@ struct thread_info {
29 32
30#define PREEMPT_ACTIVE 0x10000000 33#define PREEMPT_ACTIVE 0x10000000
31 34
35#ifdef CONFIG_4KSTACKS
36#define THREAD_SIZE (PAGE_SIZE)
37#else
38#define THREAD_SIZE (PAGE_SIZE * 2)
39#endif
40#define STACK_WARN (THREAD_SIZE / 8)
41
32/* 42/*
33 * macros/functions for gaining access to the thread information structure 43 * macros/functions for gaining access to the thread information structure
34 */ 44 */
@@ -40,6 +50,7 @@ struct thread_info {
40 .flags = 0, \ 50 .flags = 0, \
41 .cpu = 0, \ 51 .cpu = 0, \
42 .preempt_count = 1, \ 52 .preempt_count = 1, \
53 .addr_limit = KERNEL_DS, \
43 .restart_block = { \ 54 .restart_block = { \
44 .fn = do_no_restart_syscall, \ 55 .fn = do_no_restart_syscall, \
45 }, \ 56 }, \
@@ -48,24 +59,42 @@ struct thread_info {
48#define init_thread_info (init_thread_union.thread_info) 59#define init_thread_info (init_thread_union.thread_info)
49#define init_stack (init_thread_union.stack) 60#define init_stack (init_thread_union.stack)
50 61
62/* how to get the current stack pointer from C */
63register unsigned long current_stack_pointer asm("r15") __attribute_used__;
64
51/* how to get the thread information struct from C */ 65/* how to get the thread information struct from C */
52static inline struct thread_info *current_thread_info(void) 66static inline struct thread_info *current_thread_info(void)
53{ 67{
54 struct thread_info *ti; 68 struct thread_info *ti;
69#ifdef CONFIG_CPU_HAS_SR_RB
55 __asm__("stc r7_bank, %0" : "=r" (ti)); 70 __asm__("stc r7_bank, %0" : "=r" (ti));
71#else
72 unsigned long __dummy;
73
74 __asm__ __volatile__ (
75 "mov r15, %0\n\t"
76 "and %1, %0\n\t"
77 : "=&r" (ti), "=r" (__dummy)
78 : "1" (~(THREAD_SIZE - 1))
79 : "memory");
80#endif
81
56 return ti; 82 return ti;
57} 83}
58 84
59/* thread information allocation */ 85/* thread information allocation */
60#define THREAD_SIZE (2*PAGE_SIZE) 86#ifdef CONFIG_DEBUG_STACK_USAGE
61#define alloc_thread_info(ti) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) 87#define alloc_thread_info(ti) kzalloc(THREAD_SIZE, GFP_KERNEL)
62#define free_thread_info(ti) free_pages((unsigned long) (ti), 1) 88#else
89#define alloc_thread_info(ti) kmalloc(THREAD_SIZE, GFP_KERNEL)
90#endif
91#define free_thread_info(ti) kfree(ti)
63 92
64#else /* !__ASSEMBLY__ */ 93#else /* !__ASSEMBLY__ */
65 94
66/* how to get the thread information struct from ASM */ 95/* how to get the thread information struct from ASM */
67#define GET_THREAD_INFO(reg) \ 96#define GET_THREAD_INFO(reg) \
68 stc r7_bank, reg 97 stc r7_bank, reg
69 98
70#endif 99#endif
71 100
@@ -79,18 +108,18 @@ static inline struct thread_info *current_thread_info(void)
79#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ 108#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
80#define TIF_SIGPENDING 2 /* signal pending */ 109#define TIF_SIGPENDING 2 /* signal pending */
81#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 110#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
111#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */
82#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ 112#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
83#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 113#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
84#define TIF_MEMDIE 18 114#define TIF_MEMDIE 18
85#define TIF_USERSPACE 31 /* true if FS sets userspace */
86 115
87#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 116#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
88#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 117#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
89#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 118#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
90#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 119#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
120#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
91#define _TIF_USEDFPU (1<<TIF_USEDFPU) 121#define _TIF_USEDFPU (1<<TIF_USEDFPU)
92#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 122#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
93#define _TIF_USERSPACE (1<<TIF_USERSPACE)
94 123
95#define _TIF_WORK_MASK 0x000000FE /* work to do on interrupt/exception return */ 124#define _TIF_WORK_MASK 0x000000FE /* work to do on interrupt/exception return */
96#define _TIF_ALLWORK_MASK 0x000000FF /* work to do on any return to u-space */ 125#define _TIF_ALLWORK_MASK 0x000000FF /* work to do on any return to u-space */
diff --git a/include/asm-sh/timer.h b/include/asm-sh/timer.h
index dd6579c0b04c..c7ab28095ba0 100644
--- a/include/asm-sh/timer.h
+++ b/include/asm-sh/timer.h
@@ -6,6 +6,8 @@
6 6
7struct sys_timer_ops { 7struct sys_timer_ops {
8 int (*init)(void); 8 int (*init)(void);
9 int (*start)(void);
10 int (*stop)(void);
9 unsigned long (*get_offset)(void); 11 unsigned long (*get_offset)(void);
10 unsigned long (*get_frequency)(void); 12 unsigned long (*get_frequency)(void);
11}; 13};
diff --git a/include/asm-sh/titan.h b/include/asm-sh/titan.h
new file mode 100644
index 000000000000..270a4f4bc8a9
--- /dev/null
+++ b/include/asm-sh/titan.h
@@ -0,0 +1,43 @@
1/*
2 * Platform defintions for Titan
3 */
4
5#ifndef _ASM_SH_TITAN_TITAN_H
6#define _ASM_SH_TITAN_TITAN_H
7
8#define __IO_PREFIX titan
9#include <asm/io_generic.h>
10
11/* IRQ assignments */
12#define TITAN_IRQ_WAN 2 /* eth0 (WAN) */
13#define TITAN_IRQ_LAN 5 /* eth1 (LAN) */
14#define TITAN_IRQ_MPCIA 8 /* mPCI A */
15#define TITAN_IRQ_MPCIB 11 /* mPCI B */
16#define TITAN_IRQ_USB 11 /* USB */
17
18/*
19 * The external interrupt lines, these take up ints 0 - 15 inclusive
20 * depending on the priority for the interrupt. In fact the priority
21 * is the interrupt :-)
22 */
23#define IRL0_IRQ 0
24#define IRL0_IPR_ADDR INTC_IPRD
25#define IRL0_IPR_POS 3
26#define IRL0_PRIORITY 8
27
28#define IRL1_IRQ 1
29#define IRL1_IPR_ADDR INTC_IPRD
30#define IRL1_IPR_POS 2
31#define IRL1_PRIORITY 8
32
33#define IRL2_IRQ 2
34#define IRL2_IPR_ADDR INTC_IPRD
35#define IRL2_IPR_POS 1
36#define IRL2_PRIORITY 8
37
38#define IRL3_IRQ 3
39#define IRL3_IPR_ADDR INTC_IPRD
40#define IRL3_IPR_POS 0
41#define IRL3_PRIORITY 8
42
43#endif
diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h
index 2cb01861e7c5..5c49ed6715f2 100644
--- a/include/asm-sh/uaccess.h
+++ b/include/asm-sh/uaccess.h
@@ -16,21 +16,9 @@
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/sched.h> 17#include <linux/sched.h>
18 18
19/*
20 * NOTE: Macro/functions in this file depends on threads_info.h implementation.
21 * Assumes:
22 * TI_FLAGS == 8
23 * TIF_USERSPACE == 31
24 * USER_ADDR_LIMIT == 0x80000000
25 */
26
27#define VERIFY_READ 0 19#define VERIFY_READ 0
28#define VERIFY_WRITE 1 20#define VERIFY_WRITE 1
29 21
30typedef struct {
31 unsigned int is_user_space;
32} mm_segment_t;
33
34/* 22/*
35 * The fs value determines whether argument validity checking should be 23 * The fs value determines whether argument validity checking should be
36 * performed or not. If get_fs() == USER_DS, checking is performed, with 24 * performed or not. If get_fs() == USER_DS, checking is performed, with
@@ -40,16 +28,18 @@ typedef struct {
40 */ 28 */
41 29
42#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) 30#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
43#define segment_eq(a,b) ((a).is_user_space == (b).is_user_space)
44 31
45#define USER_ADDR_LIMIT 0x80000000 32#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL)
33#define USER_DS MAKE_MM_SEG(PAGE_OFFSET)
46 34
47#define KERNEL_DS MAKE_MM_SEG(0) 35#define segment_eq(a,b) ((a).seg == (b).seg)
48#define USER_DS MAKE_MM_SEG(1)
49 36
50#define get_ds() (KERNEL_DS) 37#define get_ds() (KERNEL_DS)
51 38
52#if !defined(CONFIG_MMU) 39#if !defined(CONFIG_MMU)
40/* NOMMU is always true */
41#define __addr_ok(addr) (1)
42
53static inline mm_segment_t get_fs(void) 43static inline mm_segment_t get_fs(void)
54{ 44{
55 return USER_DS; 45 return USER_DS;
@@ -76,31 +66,11 @@ static inline int __access_ok(unsigned long addr, unsigned long size)
76 return ((addr >= memory_start) && ((addr + size) < memory_end)); 66 return ((addr >= memory_start) && ((addr + size) < memory_end));
77} 67}
78#else /* CONFIG_MMU */ 68#else /* CONFIG_MMU */
79static inline mm_segment_t get_fs(void) 69#define __addr_ok(addr) \
80{ 70 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
81 return MAKE_MM_SEG(test_thread_flag(TIF_USERSPACE));
82}
83 71
84static inline void set_fs(mm_segment_t s) 72#define get_fs() (current_thread_info()->addr_limit)
85{ 73#define set_fs(x) (current_thread_info()->addr_limit = (x))
86 unsigned long ti, flag;
87 __asm__ __volatile__(
88 "stc r7_bank, %0\n\t"
89 "mov.l @(8,%0), %1\n\t"
90 "shal %1\n\t"
91 "cmp/pl %2\n\t"
92 "rotcr %1\n\t"
93 "mov.l %1, @(8,%0)"
94 : "=&r" (ti), "=&r" (flag)
95 : "r" (s.is_user_space)
96 : "t");
97/****
98 if (s.is_user_space)
99 set_thread_flag(TIF_USERSPACE);
100 else
101 clear_thread_flag(TIF_USERSPACE);
102****/
103}
104 74
105/* 75/*
106 * __access_ok: Check if address with size is OK or not. 76 * __access_ok: Check if address with size is OK or not.
@@ -108,7 +78,7 @@ static inline void set_fs(mm_segment_t s)
108 * We do three checks: 78 * We do three checks:
109 * (1) is it user space? 79 * (1) is it user space?
110 * (2) addr + size --> carry? 80 * (2) addr + size --> carry?
111 * (3) addr + size >= 0x80000000 (USER_ADDR_LIMIT) 81 * (3) addr + size >= 0x80000000 (PAGE_OFFSET)
112 * 82 *
113 * (1) (2) (3) | RESULT 83 * (1) (2) (3) | RESULT
114 * 0 0 0 | ok 84 * 0 0 0 | ok
@@ -201,6 +171,7 @@ do { \
201 __gu_err; \ 171 __gu_err; \
202}) 172})
203 173
174#ifdef CONFIG_MMU
204#define __get_user_check(x,ptr,size) \ 175#define __get_user_check(x,ptr,size) \
205({ \ 176({ \
206 long __gu_err, __gu_val; \ 177 long __gu_err, __gu_val; \
@@ -290,6 +261,18 @@ __asm__("stc r7_bank, %1\n\t" \
290 : "r" (addr) \ 261 : "r" (addr) \
291 : "t"); \ 262 : "t"); \
292}) 263})
264#else /* CONFIG_MMU */
265#define __get_user_check(x,ptr,size) \
266({ \
267 long __gu_err, __gu_val; \
268 if (__access_ok((unsigned long)(ptr), (size))) { \
269 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
270 (x) = (__typeof__(*(ptr)))__gu_val; \
271 } else \
272 __gu_err = -EFAULT; \
273 __gu_err; \
274})
275#endif
293 276
294#define __get_user_asm(x, addr, err, insn) \ 277#define __get_user_asm(x, addr, err, insn) \
295({ \ 278({ \
@@ -541,7 +524,7 @@ static __inline__ long __strnlen_user(const char __user *__s, long __n)
541 "3:\n\t" 524 "3:\n\t"
542 "mov.l 4f, %1\n\t" 525 "mov.l 4f, %1\n\t"
543 "jmp @%1\n\t" 526 "jmp @%1\n\t"
544 " mov %5, %0\n" 527 " mov #0, %0\n"
545 ".balign 4\n" 528 ".balign 4\n"
546 "4: .long 2b\n" 529 "4: .long 2b\n"
547 ".previous\n" 530 ".previous\n"
@@ -550,26 +533,20 @@ static __inline__ long __strnlen_user(const char __user *__s, long __n)
550 " .long 1b,3b\n" 533 " .long 1b,3b\n"
551 ".previous" 534 ".previous"
552 : "=z" (res), "=&r" (__dummy) 535 : "=z" (res), "=&r" (__dummy)
553 : "0" (0), "r" (__s), "r" (__n), "i" (-EFAULT) 536 : "0" (0), "r" (__s), "r" (__n)
554 : "t"); 537 : "t");
555 return res; 538 return res;
556} 539}
557 540
558static __inline__ long strnlen_user(const char __user *s, long n) 541static __inline__ long strnlen_user(const char __user *s, long n)
559{ 542{
560 if (!access_ok(VERIFY_READ, s, n)) 543 if (!__addr_ok(s))
561 return 0; 544 return 0;
562 else 545 else
563 return __strnlen_user(s, n); 546 return __strnlen_user(s, n);
564} 547}
565 548
566static __inline__ long strlen_user(const char __user *s) 549#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
567{
568 if (!access_ok(VERIFY_READ, s, 0))
569 return 0;
570 else
571 return __strnlen_user(s, ~0UL >> 1);
572}
573 550
574/* 551/*
575 * The exception table consists of pairs of addresses: the first is the 552 * The exception table consists of pairs of addresses: the first is the
diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h
index da127d7901af..5d5e9f94def5 100644
--- a/include/asm-sh/unistd.h
+++ b/include/asm-sh/unistd.h
@@ -292,17 +292,40 @@
292#define __NR_mq_getsetattr (__NR_mq_open+5) 292#define __NR_mq_getsetattr (__NR_mq_open+5)
293#define __NR_kexec_load 283 293#define __NR_kexec_load 283
294#define __NR_waitid 284 294#define __NR_waitid 284
295#define __NR_add_key 285 295/* #define __NR_sys_setaltroot 285 */
296#define __NR_request_key 286 296#define __NR_add_key 286
297#define __NR_keyctl 287 297#define __NR_request_key 287
298#define __NR_ioprio_set 288 298#define __NR_keyctl 288
299#define __NR_ioprio_get 289 299#define __NR_ioprio_set 289
300#define __NR_inotify_init 290 300#define __NR_ioprio_get 290
301#define __NR_inotify_add_watch 291 301#define __NR_inotify_init 291
302#define __NR_inotify_rm_watch 292 302#define __NR_inotify_add_watch 292
303#define __NR_inotify_rm_watch 293
304#define __NR_migrate_pages 294
305#define __NR_openat 295
306#define __NR_mkdirat 296
307#define __NR_mknodat 297
308#define __NR_fchownat 298
309#define __NR_futimesat 299
310#define __NR_newfstatat 300
311#define __NR_unlinkat 301
312#define __NR_renameat 302
313#define __NR_linkat 303
314#define __NR_symlinkat 304
315#define __NR_readlinkat 305
316#define __NR_fchmodat 306
317#define __NR_faccessat 307
318#define __NR_pselect6 308
319#define __NR_ppoll 309
320#define __NR_unshare 310
321#define __NR_set_robust_list 311
322#define __NR_get_robust_list 312
323#define __NR_splice 313
324#define __NR_sync_file_range 314
325#define __NR_tee 315
326#define __NR_vmsplice 316
303 327
304 328#define NR_syscalls 317
305#define NR_syscalls 293
306 329
307#ifdef __KERNEL__ 330#ifdef __KERNEL__
308 331
@@ -447,6 +470,7 @@ __syscall_return(type,__sc0); \
447#define __ARCH_WANT_SYS_SIGPENDING 470#define __ARCH_WANT_SYS_SIGPENDING
448#define __ARCH_WANT_SYS_SIGPROCMASK 471#define __ARCH_WANT_SYS_SIGPROCMASK
449#define __ARCH_WANT_SYS_RT_SIGACTION 472#define __ARCH_WANT_SYS_RT_SIGACTION
473#define __ARCH_WANT_SYS_RT_SIGSUSPEND
450 474
451#ifdef __KERNEL_SYSCALLS__ 475#ifdef __KERNEL_SYSCALLS__
452 476
diff --git a/include/asm-sh/rts7751r2d/voyagergx_reg.h b/include/asm-sh/voyagergx.h
index f031b5d6cf54..99b0807d1c9f 100644
--- a/include/asm-sh/rts7751r2d/voyagergx_reg.h
+++ b/include/asm-sh/voyagergx.h
@@ -1,5 +1,5 @@
1/* -------------------------------------------------------------------- */ 1/* -------------------------------------------------------------------- */
2/* voyagergx_reg.h */ 2/* voyagergx.h */
3/* -------------------------------------------------------------------- */ 3/* -------------------------------------------------------------------- */
4/* This program is free software; you can redistribute it and/or modify 4/* This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by 5 it under the terms of the GNU General Public License as published by
diff --git a/include/asm-sh/watchdog.h b/include/asm-sh/watchdog.h
index 09ca41972a11..d19ea62ef8c6 100644
--- a/include/asm-sh/watchdog.h
+++ b/include/asm-sh/watchdog.h
@@ -62,7 +62,6 @@
62 62
63/** 63/**
64 * sh_wdt_read_cnt - Read from Counter 64 * sh_wdt_read_cnt - Read from Counter
65 *
66 * Reads back the WTCNT value. 65 * Reads back the WTCNT value.
67 */ 66 */
68static inline __u8 sh_wdt_read_cnt(void) 67static inline __u8 sh_wdt_read_cnt(void)
@@ -72,7 +71,6 @@ static inline __u8 sh_wdt_read_cnt(void)
72 71
73/** 72/**
74 * sh_wdt_write_cnt - Write to Counter 73 * sh_wdt_write_cnt - Write to Counter
75 *
76 * @val: Value to write 74 * @val: Value to write
77 * 75 *
78 * Writes the given value @val to the lower byte of the timer counter. 76 * Writes the given value @val to the lower byte of the timer counter.
@@ -95,7 +93,6 @@ static inline __u8 sh_wdt_read_csr(void)
95 93
96/** 94/**
97 * sh_wdt_write_csr - Write to Control/Status Register 95 * sh_wdt_write_csr - Write to Control/Status Register
98 *
99 * @val: Value to write 96 * @val: Value to write
100 * 97 *
101 * Writes the given value @val to the lower byte of the control/status 98 * Writes the given value @val to the lower byte of the control/status
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index f1ac3184dc08..b0f5ca72599f 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -284,7 +284,7 @@ config DEBUG_HIGHMEM
284config DEBUG_BUGVERBOSE 284config DEBUG_BUGVERBOSE
285 bool "Verbose BUG() reporting (adds 70K)" if DEBUG_KERNEL && EMBEDDED 285 bool "Verbose BUG() reporting (adds 70K)" if DEBUG_KERNEL && EMBEDDED
286 depends on BUG 286 depends on BUG
287 depends on ARM || ARM26 || AVR32 || M32R || M68K || SPARC32 || SPARC64 || X86_32 || FRV 287 depends on ARM || ARM26 || AVR32 || M32R || M68K || SPARC32 || SPARC64 || X86_32 || FRV || SUPERH
288 default !EMBEDDED 288 default !EMBEDDED
289 help 289 help
290 Say Y here to make BUG() panics output the file name and line number 290 Say Y here to make BUG() panics output the file name and line number
@@ -322,7 +322,7 @@ config DEBUG_VM
322 322
323config FRAME_POINTER 323config FRAME_POINTER
324 bool "Compile the kernel with frame pointers" 324 bool "Compile the kernel with frame pointers"
325 depends on DEBUG_KERNEL && (X86 || CRIS || M68K || M68KNOMMU || FRV || UML || S390 || AVR32) 325 depends on DEBUG_KERNEL && (X86 || CRIS || M68K || M68KNOMMU || FRV || UML || S390 || AVR32 || SUPERH)
326 default y if DEBUG_INFO && UML 326 default y if DEBUG_INFO && UML
327 help 327 help
328 If you say Y here the resulting kernel image will be slightly larger 328 If you say Y here the resulting kernel image will be slightly larger
diff --git a/sound/oss/sh_dac_audio.c b/sound/oss/sh_dac_audio.c
index 7b168d85f4ab..83ff8a71f716 100644
--- a/sound/oss/sh_dac_audio.c
+++ b/sound/oss/sh_dac_audio.c
@@ -1,3 +1,14 @@
1/*
2 * sound/oss/sh_dac_audio.c
3 *
4 * SH DAC based sound :(
5 *
6 * Copyright (C) 2004,2005 Andriy Skulysh
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
1#include <linux/module.h> 12#include <linux/module.h>
2#include <linux/init.h> 13#include <linux/init.h>
3#include <linux/sched.h> 14#include <linux/sched.h>
@@ -6,18 +17,17 @@
6#include <linux/fs.h> 17#include <linux/fs.h>
7#include <linux/sound.h> 18#include <linux/sound.h>
8#include <linux/soundcard.h> 19#include <linux/soundcard.h>
20#include <linux/interrupt.h>
9#include <asm/io.h> 21#include <asm/io.h>
10#include <asm/uaccess.h> 22#include <asm/uaccess.h>
11#include <asm/irq.h> 23#include <asm/irq.h>
12#include <asm/delay.h> 24#include <asm/delay.h>
13#include <linux/interrupt.h> 25#include <asm/clock.h>
14
15#include <asm/cpu/dac.h> 26#include <asm/cpu/dac.h>
16 27#include <asm/cpu/timer.h>
17#ifdef MACH_HP600 28#include <asm/machvec.h>
18#include <asm/hp6xx/hp6xx.h> 29#include <asm/hp6xx/hp6xx.h>
19#include <asm/hd64461/hd64461.h> 30#include <asm/hd64461.h>
20#endif
21 31
22#define MODNAME "sh_dac_audio" 32#define MODNAME "sh_dac_audio"
23 33
@@ -26,11 +36,6 @@
26#define TMU1_TCR_INIT 0x0020 /* Clock/4, rising edge; interrupt on */ 36#define TMU1_TCR_INIT 0x0020 /* Clock/4, rising edge; interrupt on */
27#define TMU1_TSTR_INIT 0x02 /* Bit to turn on TMU1 */ 37#define TMU1_TSTR_INIT 0x02 /* Bit to turn on TMU1 */
28 38
29#define TMU_TSTR 0xfffffe92
30#define TMU1_TCOR 0xfffffea0
31#define TMU1_TCNT 0xfffffea4
32#define TMU1_TCR 0xfffffea8
33
34#define BUFFER_SIZE 48000 39#define BUFFER_SIZE 48000
35 40
36static int rate; 41static int rate;
@@ -71,34 +76,37 @@ static void dac_audio_sync(void)
71 76
72static void dac_audio_start(void) 77static void dac_audio_start(void)
73{ 78{
74#ifdef MACH_HP600 79 if (mach_is_hp6xx()) {
75 u16 v; 80 u16 v = inw(HD64461_GPADR);
76 v = inw(HD64461_GPADR); 81 v &= ~HD64461_GPADR_SPEAKER;
77 v &= ~HD64461_GPADR_SPEAKER; 82 outw(v, HD64461_GPADR);
78 outw(v, HD64461_GPADR); 83 }
79#endif 84
80 sh_dac_enable(CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL); 85 sh_dac_enable(CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
81 ctrl_outw(TMU1_TCR_INIT, TMU1_TCR); 86 ctrl_outw(TMU1_TCR_INIT, TMU1_TCR);
82} 87}
83static void dac_audio_stop(void) 88static void dac_audio_stop(void)
84{ 89{
85#ifdef MACH_HP600
86 u16 v;
87#endif
88 dac_audio_stop_timer(); 90 dac_audio_stop_timer();
89#ifdef MACH_HP600 91
90 v = inw(HD64461_GPADR); 92 if (mach_is_hp6xx()) {
91 v |= HD64461_GPADR_SPEAKER; 93 u16 v = inw(HD64461_GPADR);
92 outw(v, HD64461_GPADR); 94 v |= HD64461_GPADR_SPEAKER;
93#endif 95 outw(v, HD64461_GPADR);
96 }
97
98 sh_dac_output(0, CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
94 sh_dac_disable(CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL); 99 sh_dac_disable(CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
95} 100}
96 101
97static void dac_audio_set_rate(void) 102static void dac_audio_set_rate(void)
98{ 103{
99 unsigned long interval; 104 unsigned long interval;
105 struct clk *clk;
100 106
101 interval = (current_cpu_data.module_clock / 4) / rate; 107 clk = clk_get("module_clk");
108 interval = (clk_get_rate(clk) / 4) / rate;
109 clk_put(clk);
102 ctrl_outl(interval, TMU1_TCOR); 110 ctrl_outl(interval, TMU1_TCOR);
103 ctrl_outl(interval, TMU1_TCNT); 111 ctrl_outl(interval, TMU1_TCNT);
104} 112}