diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2007-07-11 14:31:58 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-07-23 11:27:07 -0400 |
commit | 957ecffc2527ebd414c6e35b65f0f744739b012d (patch) | |
tree | 19ebce098f00688ae411603fc35effe792d1b769 | |
parent | 62c66c8e55fae40d93d8f79d60e2ed50379e46f9 (diff) |
[POWERPC] FSL: Cleanup how we detect if we are a PCIe controller
Use the PCI capabilities to determine if we are PCIe PHB. Also use
PPC_INDIRECT_TYPE_NO_PCIE_LINK since the Freescale PCIe controllers
will lock the system if they don't have link and you try to do a config
access to anything but the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 10c47b56702e..69d3c6eee83d 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -102,6 +102,10 @@ static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev) | |||
102 | int i, res_idx = PCI_BRIDGE_RESOURCES; | 102 | int i, res_idx = PCI_BRIDGE_RESOURCES; |
103 | struct pci_controller *hose; | 103 | struct pci_controller *hose; |
104 | 104 | ||
105 | /* if we aren't a PCIe don't bother */ | ||
106 | if (!pci_find_capability(dev, PCI_CAP_ID_EXP)) | ||
107 | return ; | ||
108 | |||
105 | /* | 109 | /* |
106 | * Make the bridge be transparent. | 110 | * Make the bridge be transparent. |
107 | */ | 111 | */ |
@@ -167,20 +171,16 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) | |||
167 | hose->first_busno = bus_range ? bus_range[0] : 0x0; | 171 | hose->first_busno = bus_range ? bus_range[0] : 0x0; |
168 | hose->last_busno = bus_range ? bus_range[1] : 0xff; | 172 | hose->last_busno = bus_range ? bus_range[1] : 0xff; |
169 | 173 | ||
170 | /* check PCI express bridge */ | ||
171 | if (of_device_is_compatible(dev, "fsl,mpc8548-pcie") || | ||
172 | of_device_is_compatible(dev, "fsl,mpc8641-pcie")) | ||
173 | hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG | | ||
174 | PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS; | ||
175 | |||
176 | setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4); | 174 | setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4); |
177 | setup_pci_cmd(hose); | 175 | setup_pci_cmd(hose); |
178 | 176 | ||
179 | /* check PCI express link status */ | 177 | /* check PCI express link status */ |
180 | if (of_device_is_compatible(dev, "fsl,mpc8548-pcie") || | 178 | if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { |
181 | of_device_is_compatible(dev, "fsl,mpc8641-pcie")) | 179 | hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG | |
180 | PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS; | ||
182 | if (fsl_pcie_check_link(hose)) | 181 | if (fsl_pcie_check_link(hose)) |
183 | return -ENXIO; | 182 | hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; |
183 | } | ||
184 | 184 | ||
185 | printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx." | 185 | printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx." |
186 | "Firmware bus number: %d->%d\n", | 186 | "Firmware bus number: %d->%d\n", |