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authorDavid S. Miller <davem@sunset.davemloft.net>2006-03-02 01:42:18 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 04:14:13 -0500
commit45f791eb0f03e760183d30d3f1f18dc2b8e902fe (patch)
tree05ef47c68b45202106b70c1f28d4935a2c6115fb
parent92daa77e9a829350fd3900ff58d9c69820ad0e3d (diff)
[SPARC64]: Fix _PAGE_EXEC handling.
First of all, use the known _PAGE_EXEC_{4U,4V} value instead of loading _PAGE_EXEC from memory. We either know which one to use by context, or we can code patch the test. Next, we need to check executability of a PTE in the generic TSB miss handler. Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--arch/sparc64/kernel/itlb_miss.S10
-rw-r--r--arch/sparc64/kernel/sun4v_tlb_miss.S4
-rw-r--r--arch/sparc64/kernel/tsb.S9
3 files changed, 15 insertions, 8 deletions
diff --git a/arch/sparc64/kernel/itlb_miss.S b/arch/sparc64/kernel/itlb_miss.S
index 6dfe3968c379..ad46e2024f4b 100644
--- a/arch/sparc64/kernel/itlb_miss.S
+++ b/arch/sparc64/kernel/itlb_miss.S
@@ -9,18 +9,18 @@
9 cmp %g4, %g6 ! Compare TAG 9 cmp %g4, %g6 ! Compare TAG
10 10
11/* ITLB ** ICACHE line 2: TSB compare and TLB load */ 11/* ITLB ** ICACHE line 2: TSB compare and TLB load */
12 sethi %hi(PAGE_EXEC), %g4 ! Setup exec check
13 ldx [%g4 + %lo(PAGE_EXEC)], %g4
14 bne,pn %xcc, tsb_miss_itlb ! Miss 12 bne,pn %xcc, tsb_miss_itlb ! Miss
15 mov FAULT_CODE_ITLB, %g3 13 mov FAULT_CODE_ITLB, %g3
16 andcc %g5, %g4, %g0 ! Executable? 14 andcc %g5, _PAGE_EXEC_4U, %g0 ! Executable?
17 be,pn %xcc, tsb_do_fault 15 be,pn %xcc, tsb_do_fault
18 nop ! Delay slot, fill me 16 nop ! Delay slot, fill me
17 stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB
18 retry ! Trap done
19 nop 19 nop
20 20
21/* ITLB ** ICACHE line 3: */ 21/* ITLB ** ICACHE line 3: */
22 stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB 22 nop
23 retry ! Trap done 23 nop
24 nop 24 nop
25 nop 25 nop
26 nop 26 nop
diff --git a/arch/sparc64/kernel/sun4v_tlb_miss.S b/arch/sparc64/kernel/sun4v_tlb_miss.S
index 3dccbd67818a..3eed8db96848 100644
--- a/arch/sparc64/kernel/sun4v_tlb_miss.S
+++ b/arch/sparc64/kernel/sun4v_tlb_miss.S
@@ -58,11 +58,9 @@ sun4v_itlb_miss:
58 /* Load TSB tag/pte into %g2/%g3 and compare the tag. */ 58 /* Load TSB tag/pte into %g2/%g3 and compare the tag. */
59 ldda [%g1] ASI_QUAD_LDD_PHYS_4V, %g2 59 ldda [%g1] ASI_QUAD_LDD_PHYS_4V, %g2
60 cmp %g2, %g6 60 cmp %g2, %g6
61 sethi %hi(PAGE_EXEC), %g7
62 ldx [%g7 + %lo(PAGE_EXEC)], %g7
63 bne,a,pn %xcc, tsb_miss_page_table_walk 61 bne,a,pn %xcc, tsb_miss_page_table_walk
64 mov FAULT_CODE_ITLB, %g3 62 mov FAULT_CODE_ITLB, %g3
65 andcc %g3, %g7, %g0 63 andcc %g3, _PAGE_EXEC_4V, %g0
66 be,a,pn %xcc, tsb_do_fault 64 be,a,pn %xcc, tsb_do_fault
67 mov FAULT_CODE_ITLB, %g3 65 mov FAULT_CODE_ITLB, %g3
68 66
diff --git a/arch/sparc64/kernel/tsb.S b/arch/sparc64/kernel/tsb.S
index cc225c0563c3..563852bf3594 100644
--- a/arch/sparc64/kernel/tsb.S
+++ b/arch/sparc64/kernel/tsb.S
@@ -103,6 +103,15 @@ tsb_dtlb_load:
103 mov %g5, %g3 103 mov %g5, %g3
104 104
105tsb_itlb_load: 105tsb_itlb_load:
106 /* Executable bit must be set. */
107661: andcc %g5, _PAGE_EXEC_4U, %g0
108 .section .sun4v_1insn_patch, "ax"
109 .word 661b
110 andcc %g5, _PAGE_EXEC_4V, %g0
111 .previous
112
113 be,pn %xcc, tsb_do_fault
114 nop
106 115
107661: stxa %g5, [%g0] ASI_ITLB_DATA_IN 116661: stxa %g5, [%g0] ASI_ITLB_DATA_IN
108 retry 117 retry