diff options
author | Darren Jenkins <darrenrjenkins@gmail.com> | 2010-01-07 01:35:21 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-01-07 22:05:16 -0500 |
commit | fc9a89f97e532152ae614d5ce717b81c8f8b0e91 (patch) | |
tree | c669c9a18e8667ce1b3d031a9774f570fa7cd03a | |
parent | 196c58d21fc47fbabab6a98e23e5a6335f717e44 (diff) |
drm/radeon: fix a couple of array index errors
There are a couple of array overruns, and some associated confusion in
the code.
This is just a wild guess at what the code should actually look like.
Coverity CID: 13305 13306
agd5f: fix up the original intent of the timing code
Signed-off-by: Darren Jenkins <darrenrjenkins@gmail.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_tv.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c index 3a12bb0c0563..417684daef4c 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c | |||
@@ -77,7 +77,7 @@ struct radeon_tv_mode_constants { | |||
77 | unsigned pix_to_tv; | 77 | unsigned pix_to_tv; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | static const uint16_t hor_timing_NTSC[] = { | 80 | static const uint16_t hor_timing_NTSC[MAX_H_CODE_TIMING_LEN] = { |
81 | 0x0007, | 81 | 0x0007, |
82 | 0x003f, | 82 | 0x003f, |
83 | 0x0263, | 83 | 0x0263, |
@@ -98,7 +98,7 @@ static const uint16_t hor_timing_NTSC[] = { | |||
98 | 0 | 98 | 0 |
99 | }; | 99 | }; |
100 | 100 | ||
101 | static const uint16_t vert_timing_NTSC[] = { | 101 | static const uint16_t vert_timing_NTSC[MAX_V_CODE_TIMING_LEN] = { |
102 | 0x2001, | 102 | 0x2001, |
103 | 0x200d, | 103 | 0x200d, |
104 | 0x1006, | 104 | 0x1006, |
@@ -115,7 +115,7 @@ static const uint16_t vert_timing_NTSC[] = { | |||
115 | 0 | 115 | 0 |
116 | }; | 116 | }; |
117 | 117 | ||
118 | static const uint16_t hor_timing_PAL[] = { | 118 | static const uint16_t hor_timing_PAL[MAX_H_CODE_TIMING_LEN] = { |
119 | 0x0007, | 119 | 0x0007, |
120 | 0x0058, | 120 | 0x0058, |
121 | 0x027c, | 121 | 0x027c, |
@@ -136,7 +136,7 @@ static const uint16_t hor_timing_PAL[] = { | |||
136 | 0 | 136 | 0 |
137 | }; | 137 | }; |
138 | 138 | ||
139 | static const uint16_t vert_timing_PAL[] = { | 139 | static const uint16_t vert_timing_PAL[MAX_V_CODE_TIMING_LEN] = { |
140 | 0x2001, | 140 | 0x2001, |
141 | 0x200c, | 141 | 0x200c, |
142 | 0x1005, | 142 | 0x1005, |
@@ -623,9 +623,9 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, | |||
623 | } | 623 | } |
624 | flicker_removal = (tmp + 500) / 1000; | 624 | flicker_removal = (tmp + 500) / 1000; |
625 | 625 | ||
626 | if (flicker_removal < 3) | 626 | if (flicker_removal < 2) |
627 | flicker_removal = 3; | 627 | flicker_removal = 2; |
628 | for (i = 0; i < 6; ++i) { | 628 | for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) { |
629 | if (flicker_removal == SLOPE_limit[i]) | 629 | if (flicker_removal == SLOPE_limit[i]) |
630 | break; | 630 | break; |
631 | } | 631 | } |