diff options
author | Tony Luck <tony.luck@intel.com> | 2005-07-11 12:43:11 -0400 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2005-07-11 12:43:11 -0400 |
commit | e7578c08a4dee36fe01fb38805f325689e642eb0 (patch) | |
tree | 7426054f6226aa2349ee0c0a3970aeef9276ea59 | |
parent | 763b3917e779c9c25d56fc71a796774185cd6ce2 (diff) | |
parent | 5c23804a0941a111752fdacefe0bea2db1b4d93f (diff) |
Auto merge with /home/aegl/GIT/linus
185 files changed, 8534 insertions, 1650 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 620f2ca94ed2..8752751f9985 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -223,7 +223,9 @@ source "arch/arm/mach-pxa/Kconfig" | |||
223 | 223 | ||
224 | source "arch/arm/mach-sa1100/Kconfig" | 224 | source "arch/arm/mach-sa1100/Kconfig" |
225 | 225 | ||
226 | source "arch/arm/mach-omap/Kconfig" | 226 | source "arch/arm/plat-omap/Kconfig" |
227 | |||
228 | source "arch/arm/mach-omap1/Kconfig" | ||
227 | 229 | ||
228 | source "arch/arm/mach-s3c2410/Kconfig" | 230 | source "arch/arm/mach-s3c2410/Kconfig" |
229 | 231 | ||
@@ -514,7 +516,7 @@ config XIP_PHYS_ADDR | |||
514 | 516 | ||
515 | endmenu | 517 | endmenu |
516 | 518 | ||
517 | if (ARCH_SA1100 || ARCH_INTEGRATOR) | 519 | if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1) |
518 | 520 | ||
519 | menu "CPU Frequency scaling" | 521 | menu "CPU Frequency scaling" |
520 | 522 | ||
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index eb933dcafba0..67f1453ade05 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -91,7 +91,8 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000 | |||
91 | machine-$(CONFIG_ARCH_IOP3XX) := iop3xx | 91 | machine-$(CONFIG_ARCH_IOP3XX) := iop3xx |
92 | machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx | 92 | machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx |
93 | machine-$(CONFIG_ARCH_IXP2000) := ixp2000 | 93 | machine-$(CONFIG_ARCH_IXP2000) := ixp2000 |
94 | machine-$(CONFIG_ARCH_OMAP) := omap | 94 | machine-$(CONFIG_ARCH_OMAP1) := omap1 |
95 | incdir-$(CONFIG_ARCH_OMAP) := omap | ||
95 | machine-$(CONFIG_ARCH_S3C2410) := s3c2410 | 96 | machine-$(CONFIG_ARCH_S3C2410) := s3c2410 |
96 | machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x | 97 | machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x |
97 | machine-$(CONFIG_ARCH_VERSATILE) := versatile | 98 | machine-$(CONFIG_ARCH_VERSATILE) := versatile |
@@ -142,6 +143,9 @@ core-$(CONFIG_FPE_NWFPE) += arch/arm/nwfpe/ | |||
142 | core-$(CONFIG_FPE_FASTFPE) += $(FASTFPE_OBJ) | 143 | core-$(CONFIG_FPE_FASTFPE) += $(FASTFPE_OBJ) |
143 | core-$(CONFIG_VFP) += arch/arm/vfp/ | 144 | core-$(CONFIG_VFP) += arch/arm/vfp/ |
144 | 145 | ||
146 | # If we have a common platform directory, then include it in the build. | ||
147 | core-$(CONFIG_ARCH_OMAP) += arch/arm/plat-omap/ | ||
148 | |||
145 | drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/ | 149 | drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/ |
146 | drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/ | 150 | drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/ |
147 | drivers-$(CONFIG_ARCH_L7200) += drivers/acorn/char/ | 151 | drivers-$(CONFIG_ARCH_L7200) += drivers/acorn/char/ |
diff --git a/arch/arm/configs/enp2611_defconfig b/arch/arm/configs/enp2611_defconfig index b8c51ee7f1bb..f67ca01b4982 100644 --- a/arch/arm/configs/enp2611_defconfig +++ b/arch/arm/configs/enp2611_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-git6 | 3 | # Linux kernel version: 2.6.13-rc2 |
4 | # Sat Jun 25 00:57:29 2005 | 4 | # Thu Jul 7 16:41:21 2005 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
@@ -137,6 +137,7 @@ CONFIG_PCI_NAMES=y | |||
137 | # | 137 | # |
138 | # CONFIG_SMP is not set | 138 | # CONFIG_SMP is not set |
139 | # CONFIG_PREEMPT is not set | 139 | # CONFIG_PREEMPT is not set |
140 | # CONFIG_NO_IDLE_HZ is not set | ||
140 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 141 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set |
141 | CONFIG_SELECT_MEMORY_MODEL=y | 142 | CONFIG_SELECT_MEMORY_MODEL=y |
142 | CONFIG_FLATMEM_MANUAL=y | 143 | CONFIG_FLATMEM_MANUAL=y |
@@ -345,10 +346,9 @@ CONFIG_PACKET_MMAP=y | |||
345 | CONFIG_UNIX=y | 346 | CONFIG_UNIX=y |
346 | # CONFIG_NET_KEY is not set | 347 | # CONFIG_NET_KEY is not set |
347 | CONFIG_INET=y | 348 | CONFIG_INET=y |
348 | CONFIG_IP_FIB_HASH=y | ||
349 | # CONFIG_IP_FIB_TRIE is not set | ||
350 | # CONFIG_IP_MULTICAST is not set | 349 | # CONFIG_IP_MULTICAST is not set |
351 | # CONFIG_IP_ADVANCED_ROUTER is not set | 350 | # CONFIG_IP_ADVANCED_ROUTER is not set |
351 | CONFIG_IP_FIB_HASH=y | ||
352 | CONFIG_IP_PNP=y | 352 | CONFIG_IP_PNP=y |
353 | CONFIG_IP_PNP_DHCP=y | 353 | CONFIG_IP_PNP_DHCP=y |
354 | CONFIG_IP_PNP_BOOTP=y | 354 | CONFIG_IP_PNP_BOOTP=y |
@@ -363,17 +363,8 @@ CONFIG_SYN_COOKIES=y | |||
363 | # CONFIG_INET_TUNNEL is not set | 363 | # CONFIG_INET_TUNNEL is not set |
364 | # CONFIG_IP_TCPDIAG is not set | 364 | # CONFIG_IP_TCPDIAG is not set |
365 | # CONFIG_IP_TCPDIAG_IPV6 is not set | 365 | # CONFIG_IP_TCPDIAG_IPV6 is not set |
366 | 366 | # CONFIG_TCP_CONG_ADVANCED is not set | |
367 | # | ||
368 | # TCP congestion control | ||
369 | # | ||
370 | CONFIG_TCP_CONG_BIC=y | 367 | CONFIG_TCP_CONG_BIC=y |
371 | CONFIG_TCP_CONG_WESTWOOD=m | ||
372 | CONFIG_TCP_CONG_HTCP=m | ||
373 | # CONFIG_TCP_CONG_HSTCP is not set | ||
374 | # CONFIG_TCP_CONG_HYBLA is not set | ||
375 | # CONFIG_TCP_CONG_VEGAS is not set | ||
376 | # CONFIG_TCP_CONG_SCALABLE is not set | ||
377 | # CONFIG_IPV6 is not set | 368 | # CONFIG_IPV6 is not set |
378 | # CONFIG_NETFILTER is not set | 369 | # CONFIG_NETFILTER is not set |
379 | 370 | ||
@@ -931,4 +922,3 @@ CONFIG_CRC32=y | |||
931 | # CONFIG_LIBCRC32C is not set | 922 | # CONFIG_LIBCRC32C is not set |
932 | CONFIG_ZLIB_INFLATE=y | 923 | CONFIG_ZLIB_INFLATE=y |
933 | CONFIG_ZLIB_DEFLATE=y | 924 | CONFIG_ZLIB_DEFLATE=y |
934 | # CONFIG_TEXTSEARCH is not set | ||
diff --git a/arch/arm/configs/ixdp2400_defconfig b/arch/arm/configs/ixdp2400_defconfig index 3cfbe2ec29ca..5c6c928215d0 100644 --- a/arch/arm/configs/ixdp2400_defconfig +++ b/arch/arm/configs/ixdp2400_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-git6 | 3 | # Linux kernel version: 2.6.13-rc2 |
4 | # Sat Jun 25 00:58:38 2005 | 4 | # Thu Jul 7 16:49:01 2005 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
@@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y | |||
138 | # | 138 | # |
139 | # CONFIG_SMP is not set | 139 | # CONFIG_SMP is not set |
140 | # CONFIG_PREEMPT is not set | 140 | # CONFIG_PREEMPT is not set |
141 | # CONFIG_NO_IDLE_HZ is not set | ||
141 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 142 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set |
142 | CONFIG_SELECT_MEMORY_MODEL=y | 143 | CONFIG_SELECT_MEMORY_MODEL=y |
143 | CONFIG_FLATMEM_MANUAL=y | 144 | CONFIG_FLATMEM_MANUAL=y |
@@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y | |||
346 | CONFIG_UNIX=y | 347 | CONFIG_UNIX=y |
347 | # CONFIG_NET_KEY is not set | 348 | # CONFIG_NET_KEY is not set |
348 | CONFIG_INET=y | 349 | CONFIG_INET=y |
349 | CONFIG_IP_FIB_HASH=y | ||
350 | # CONFIG_IP_FIB_TRIE is not set | ||
351 | # CONFIG_IP_MULTICAST is not set | 350 | # CONFIG_IP_MULTICAST is not set |
352 | # CONFIG_IP_ADVANCED_ROUTER is not set | 351 | # CONFIG_IP_ADVANCED_ROUTER is not set |
352 | CONFIG_IP_FIB_HASH=y | ||
353 | CONFIG_IP_PNP=y | 353 | CONFIG_IP_PNP=y |
354 | CONFIG_IP_PNP_DHCP=y | 354 | CONFIG_IP_PNP_DHCP=y |
355 | CONFIG_IP_PNP_BOOTP=y | 355 | CONFIG_IP_PNP_BOOTP=y |
@@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y | |||
364 | # CONFIG_INET_TUNNEL is not set | 364 | # CONFIG_INET_TUNNEL is not set |
365 | # CONFIG_IP_TCPDIAG is not set | 365 | # CONFIG_IP_TCPDIAG is not set |
366 | # CONFIG_IP_TCPDIAG_IPV6 is not set | 366 | # CONFIG_IP_TCPDIAG_IPV6 is not set |
367 | 367 | # CONFIG_TCP_CONG_ADVANCED is not set | |
368 | # | ||
369 | # TCP congestion control | ||
370 | # | ||
371 | CONFIG_TCP_CONG_BIC=y | 368 | CONFIG_TCP_CONG_BIC=y |
372 | CONFIG_TCP_CONG_WESTWOOD=m | ||
373 | CONFIG_TCP_CONG_HTCP=m | ||
374 | # CONFIG_TCP_CONG_HSTCP is not set | ||
375 | # CONFIG_TCP_CONG_HYBLA is not set | ||
376 | # CONFIG_TCP_CONG_VEGAS is not set | ||
377 | # CONFIG_TCP_CONG_SCALABLE is not set | ||
378 | # CONFIG_IPV6 is not set | 369 | # CONFIG_IPV6 is not set |
379 | # CONFIG_NETFILTER is not set | 370 | # CONFIG_NETFILTER is not set |
380 | 371 | ||
@@ -932,4 +923,3 @@ CONFIG_CRC32=y | |||
932 | # CONFIG_LIBCRC32C is not set | 923 | # CONFIG_LIBCRC32C is not set |
933 | CONFIG_ZLIB_INFLATE=y | 924 | CONFIG_ZLIB_INFLATE=y |
934 | CONFIG_ZLIB_DEFLATE=y | 925 | CONFIG_ZLIB_DEFLATE=y |
935 | # CONFIG_TEXTSEARCH is not set | ||
diff --git a/arch/arm/configs/ixdp2401_defconfig b/arch/arm/configs/ixdp2401_defconfig index 5c87e8e6969b..6dc40f6be0ef 100644 --- a/arch/arm/configs/ixdp2401_defconfig +++ b/arch/arm/configs/ixdp2401_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-git6 | 3 | # Linux kernel version: 2.6.13-rc2 |
4 | # Sat Jun 25 00:59:35 2005 | 4 | # Thu Jul 7 16:49:08 2005 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
@@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y | |||
138 | # | 138 | # |
139 | # CONFIG_SMP is not set | 139 | # CONFIG_SMP is not set |
140 | # CONFIG_PREEMPT is not set | 140 | # CONFIG_PREEMPT is not set |
141 | # CONFIG_NO_IDLE_HZ is not set | ||
141 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 142 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set |
142 | CONFIG_SELECT_MEMORY_MODEL=y | 143 | CONFIG_SELECT_MEMORY_MODEL=y |
143 | CONFIG_FLATMEM_MANUAL=y | 144 | CONFIG_FLATMEM_MANUAL=y |
@@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y | |||
346 | CONFIG_UNIX=y | 347 | CONFIG_UNIX=y |
347 | # CONFIG_NET_KEY is not set | 348 | # CONFIG_NET_KEY is not set |
348 | CONFIG_INET=y | 349 | CONFIG_INET=y |
349 | CONFIG_IP_FIB_HASH=y | ||
350 | # CONFIG_IP_FIB_TRIE is not set | ||
351 | # CONFIG_IP_MULTICAST is not set | 350 | # CONFIG_IP_MULTICAST is not set |
352 | # CONFIG_IP_ADVANCED_ROUTER is not set | 351 | # CONFIG_IP_ADVANCED_ROUTER is not set |
352 | CONFIG_IP_FIB_HASH=y | ||
353 | CONFIG_IP_PNP=y | 353 | CONFIG_IP_PNP=y |
354 | CONFIG_IP_PNP_DHCP=y | 354 | CONFIG_IP_PNP_DHCP=y |
355 | CONFIG_IP_PNP_BOOTP=y | 355 | CONFIG_IP_PNP_BOOTP=y |
@@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y | |||
364 | # CONFIG_INET_TUNNEL is not set | 364 | # CONFIG_INET_TUNNEL is not set |
365 | CONFIG_IP_TCPDIAG=y | 365 | CONFIG_IP_TCPDIAG=y |
366 | # CONFIG_IP_TCPDIAG_IPV6 is not set | 366 | # CONFIG_IP_TCPDIAG_IPV6 is not set |
367 | 367 | # CONFIG_TCP_CONG_ADVANCED is not set | |
368 | # | ||
369 | # TCP congestion control | ||
370 | # | ||
371 | CONFIG_TCP_CONG_BIC=y | 368 | CONFIG_TCP_CONG_BIC=y |
372 | CONFIG_TCP_CONG_WESTWOOD=m | ||
373 | CONFIG_TCP_CONG_HTCP=m | ||
374 | # CONFIG_TCP_CONG_HSTCP is not set | ||
375 | # CONFIG_TCP_CONG_HYBLA is not set | ||
376 | # CONFIG_TCP_CONG_VEGAS is not set | ||
377 | # CONFIG_TCP_CONG_SCALABLE is not set | ||
378 | # CONFIG_IPV6 is not set | 369 | # CONFIG_IPV6 is not set |
379 | # CONFIG_NETFILTER is not set | 370 | # CONFIG_NETFILTER is not set |
380 | 371 | ||
@@ -933,4 +924,3 @@ CONFIG_CRC32=y | |||
933 | # CONFIG_LIBCRC32C is not set | 924 | # CONFIG_LIBCRC32C is not set |
934 | CONFIG_ZLIB_INFLATE=y | 925 | CONFIG_ZLIB_INFLATE=y |
935 | CONFIG_ZLIB_DEFLATE=y | 926 | CONFIG_ZLIB_DEFLATE=y |
936 | # CONFIG_TEXTSEARCH is not set | ||
diff --git a/arch/arm/configs/ixdp2800_defconfig b/arch/arm/configs/ixdp2800_defconfig index 3cb561a551cb..d2bb0b7153fe 100644 --- a/arch/arm/configs/ixdp2800_defconfig +++ b/arch/arm/configs/ixdp2800_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-git6 | 3 | # Linux kernel version: 2.6.13-rc2 |
4 | # Sat Jun 25 01:00:27 2005 | 4 | # Thu Jul 7 16:49:20 2005 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
@@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y | |||
138 | # | 138 | # |
139 | # CONFIG_SMP is not set | 139 | # CONFIG_SMP is not set |
140 | # CONFIG_PREEMPT is not set | 140 | # CONFIG_PREEMPT is not set |
141 | # CONFIG_NO_IDLE_HZ is not set | ||
141 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 142 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set |
142 | CONFIG_SELECT_MEMORY_MODEL=y | 143 | CONFIG_SELECT_MEMORY_MODEL=y |
143 | CONFIG_FLATMEM_MANUAL=y | 144 | CONFIG_FLATMEM_MANUAL=y |
@@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y | |||
346 | CONFIG_UNIX=y | 347 | CONFIG_UNIX=y |
347 | # CONFIG_NET_KEY is not set | 348 | # CONFIG_NET_KEY is not set |
348 | CONFIG_INET=y | 349 | CONFIG_INET=y |
349 | CONFIG_IP_FIB_HASH=y | ||
350 | # CONFIG_IP_FIB_TRIE is not set | ||
351 | # CONFIG_IP_MULTICAST is not set | 350 | # CONFIG_IP_MULTICAST is not set |
352 | # CONFIG_IP_ADVANCED_ROUTER is not set | 351 | # CONFIG_IP_ADVANCED_ROUTER is not set |
352 | CONFIG_IP_FIB_HASH=y | ||
353 | CONFIG_IP_PNP=y | 353 | CONFIG_IP_PNP=y |
354 | CONFIG_IP_PNP_DHCP=y | 354 | CONFIG_IP_PNP_DHCP=y |
355 | CONFIG_IP_PNP_BOOTP=y | 355 | CONFIG_IP_PNP_BOOTP=y |
@@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y | |||
364 | # CONFIG_INET_TUNNEL is not set | 364 | # CONFIG_INET_TUNNEL is not set |
365 | # CONFIG_IP_TCPDIAG is not set | 365 | # CONFIG_IP_TCPDIAG is not set |
366 | # CONFIG_IP_TCPDIAG_IPV6 is not set | 366 | # CONFIG_IP_TCPDIAG_IPV6 is not set |
367 | 367 | # CONFIG_TCP_CONG_ADVANCED is not set | |
368 | # | ||
369 | # TCP congestion control | ||
370 | # | ||
371 | CONFIG_TCP_CONG_BIC=y | 368 | CONFIG_TCP_CONG_BIC=y |
372 | CONFIG_TCP_CONG_WESTWOOD=m | ||
373 | CONFIG_TCP_CONG_HTCP=m | ||
374 | # CONFIG_TCP_CONG_HSTCP is not set | ||
375 | # CONFIG_TCP_CONG_HYBLA is not set | ||
376 | # CONFIG_TCP_CONG_VEGAS is not set | ||
377 | # CONFIG_TCP_CONG_SCALABLE is not set | ||
378 | # CONFIG_IPV6 is not set | 369 | # CONFIG_IPV6 is not set |
379 | # CONFIG_NETFILTER is not set | 370 | # CONFIG_NETFILTER is not set |
380 | 371 | ||
@@ -932,4 +923,3 @@ CONFIG_CRC32=y | |||
932 | # CONFIG_LIBCRC32C is not set | 923 | # CONFIG_LIBCRC32C is not set |
933 | CONFIG_ZLIB_INFLATE=y | 924 | CONFIG_ZLIB_INFLATE=y |
934 | CONFIG_ZLIB_DEFLATE=y | 925 | CONFIG_ZLIB_DEFLATE=y |
935 | # CONFIG_TEXTSEARCH is not set | ||
diff --git a/arch/arm/configs/ixdp2801_defconfig b/arch/arm/configs/ixdp2801_defconfig index b1e162f29cb9..2d6f960e3395 100644 --- a/arch/arm/configs/ixdp2801_defconfig +++ b/arch/arm/configs/ixdp2801_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-git6 | 3 | # Linux kernel version: 2.6.13-rc2 |
4 | # Sat Jun 25 01:01:18 2005 | 4 | # Thu Jul 7 16:49:13 2005 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
@@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y | |||
138 | # | 138 | # |
139 | # CONFIG_SMP is not set | 139 | # CONFIG_SMP is not set |
140 | # CONFIG_PREEMPT is not set | 140 | # CONFIG_PREEMPT is not set |
141 | # CONFIG_NO_IDLE_HZ is not set | ||
141 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 142 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set |
142 | CONFIG_SELECT_MEMORY_MODEL=y | 143 | CONFIG_SELECT_MEMORY_MODEL=y |
143 | CONFIG_FLATMEM_MANUAL=y | 144 | CONFIG_FLATMEM_MANUAL=y |
@@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y | |||
346 | CONFIG_UNIX=y | 347 | CONFIG_UNIX=y |
347 | # CONFIG_NET_KEY is not set | 348 | # CONFIG_NET_KEY is not set |
348 | CONFIG_INET=y | 349 | CONFIG_INET=y |
349 | CONFIG_IP_FIB_HASH=y | ||
350 | # CONFIG_IP_FIB_TRIE is not set | ||
351 | # CONFIG_IP_MULTICAST is not set | 350 | # CONFIG_IP_MULTICAST is not set |
352 | # CONFIG_IP_ADVANCED_ROUTER is not set | 351 | # CONFIG_IP_ADVANCED_ROUTER is not set |
352 | CONFIG_IP_FIB_HASH=y | ||
353 | CONFIG_IP_PNP=y | 353 | CONFIG_IP_PNP=y |
354 | CONFIG_IP_PNP_DHCP=y | 354 | CONFIG_IP_PNP_DHCP=y |
355 | CONFIG_IP_PNP_BOOTP=y | 355 | CONFIG_IP_PNP_BOOTP=y |
@@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y | |||
364 | # CONFIG_INET_TUNNEL is not set | 364 | # CONFIG_INET_TUNNEL is not set |
365 | # CONFIG_IP_TCPDIAG is not set | 365 | # CONFIG_IP_TCPDIAG is not set |
366 | # CONFIG_IP_TCPDIAG_IPV6 is not set | 366 | # CONFIG_IP_TCPDIAG_IPV6 is not set |
367 | 367 | # CONFIG_TCP_CONG_ADVANCED is not set | |
368 | # | ||
369 | # TCP congestion control | ||
370 | # | ||
371 | CONFIG_TCP_CONG_BIC=y | 368 | CONFIG_TCP_CONG_BIC=y |
372 | CONFIG_TCP_CONG_WESTWOOD=m | ||
373 | CONFIG_TCP_CONG_HTCP=m | ||
374 | # CONFIG_TCP_CONG_HSTCP is not set | ||
375 | # CONFIG_TCP_CONG_HYBLA is not set | ||
376 | # CONFIG_TCP_CONG_VEGAS is not set | ||
377 | # CONFIG_TCP_CONG_SCALABLE is not set | ||
378 | # CONFIG_IPV6 is not set | 369 | # CONFIG_IPV6 is not set |
379 | # CONFIG_NETFILTER is not set | 370 | # CONFIG_NETFILTER is not set |
380 | 371 | ||
@@ -933,4 +924,3 @@ CONFIG_CRC32=y | |||
933 | # CONFIG_LIBCRC32C is not set | 924 | # CONFIG_LIBCRC32C is not set |
934 | CONFIG_ZLIB_INFLATE=y | 925 | CONFIG_ZLIB_INFLATE=y |
935 | CONFIG_ZLIB_DEFLATE=y | 926 | CONFIG_ZLIB_DEFLATE=y |
936 | # CONFIG_TEXTSEARCH is not set | ||
diff --git a/arch/arm/configs/omap_h2_1610_defconfig b/arch/arm/configs/omap_h2_1610_defconfig index 4e58d9341bce..24955263b096 100644 --- a/arch/arm/configs/omap_h2_1610_defconfig +++ b/arch/arm/configs/omap_h2_1610_defconfig | |||
@@ -1,14 +1,13 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-rc1-bk2 | 3 | # Linux kernel version: 2.6.13-rc2 |
4 | # Sun Mar 27 17:52:41 2005 | 4 | # Fri Jul 8 04:49:34 2005 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
8 | CONFIG_UID16=y | 8 | CONFIG_UID16=y |
9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
10 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 10 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
11 | CONFIG_GENERIC_IOMAP=y | ||
12 | 11 | ||
13 | # | 12 | # |
14 | # Code maturity level options | 13 | # Code maturity level options |
@@ -17,6 +16,7 @@ CONFIG_EXPERIMENTAL=y | |||
17 | CONFIG_CLEAN_COMPILE=y | 16 | CONFIG_CLEAN_COMPILE=y |
18 | CONFIG_BROKEN_ON_SMP=y | 17 | CONFIG_BROKEN_ON_SMP=y |
19 | CONFIG_LOCK_KERNEL=y | 18 | CONFIG_LOCK_KERNEL=y |
19 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
20 | 20 | ||
21 | # | 21 | # |
22 | # General setup | 22 | # General setup |
@@ -33,8 +33,9 @@ CONFIG_KOBJECT_UEVENT=y | |||
33 | # CONFIG_IKCONFIG is not set | 33 | # CONFIG_IKCONFIG is not set |
34 | # CONFIG_EMBEDDED is not set | 34 | # CONFIG_EMBEDDED is not set |
35 | CONFIG_KALLSYMS=y | 35 | CONFIG_KALLSYMS=y |
36 | # CONFIG_KALLSYMS_ALL is not set | ||
37 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 36 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
37 | CONFIG_PRINTK=y | ||
38 | CONFIG_BUG=y | ||
38 | CONFIG_BASE_FULL=y | 39 | CONFIG_BASE_FULL=y |
39 | CONFIG_FUTEX=y | 40 | CONFIG_FUTEX=y |
40 | CONFIG_EPOLL=y | 41 | CONFIG_EPOLL=y |
@@ -82,10 +83,28 @@ CONFIG_ARCH_OMAP=y | |||
82 | # CONFIG_ARCH_VERSATILE is not set | 83 | # CONFIG_ARCH_VERSATILE is not set |
83 | # CONFIG_ARCH_IMX is not set | 84 | # CONFIG_ARCH_IMX is not set |
84 | # CONFIG_ARCH_H720X is not set | 85 | # CONFIG_ARCH_H720X is not set |
86 | # CONFIG_ARCH_AAEC2000 is not set | ||
85 | 87 | ||
86 | # | 88 | # |
87 | # TI OMAP Implementations | 89 | # TI OMAP Implementations |
88 | # | 90 | # |
91 | CONFIG_ARCH_OMAP_OTG=y | ||
92 | CONFIG_ARCH_OMAP1=y | ||
93 | # CONFIG_ARCH_OMAP2 is not set | ||
94 | |||
95 | # | ||
96 | # OMAP Feature Selections | ||
97 | # | ||
98 | # CONFIG_OMAP_RESET_CLOCKS is not set | ||
99 | CONFIG_OMAP_MUX=y | ||
100 | # CONFIG_OMAP_MUX_DEBUG is not set | ||
101 | CONFIG_OMAP_MUX_WARNINGS=y | ||
102 | # CONFIG_OMAP_MPU_TIMER is not set | ||
103 | CONFIG_OMAP_32K_TIMER=y | ||
104 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
105 | CONFIG_OMAP_LL_DEBUG_UART1=y | ||
106 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
107 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set | ||
89 | 108 | ||
90 | # | 109 | # |
91 | # OMAP Core Type | 110 | # OMAP Core Type |
@@ -93,7 +112,6 @@ CONFIG_ARCH_OMAP=y | |||
93 | # CONFIG_ARCH_OMAP730 is not set | 112 | # CONFIG_ARCH_OMAP730 is not set |
94 | # CONFIG_ARCH_OMAP1510 is not set | 113 | # CONFIG_ARCH_OMAP1510 is not set |
95 | CONFIG_ARCH_OMAP16XX=y | 114 | CONFIG_ARCH_OMAP16XX=y |
96 | CONFIG_ARCH_OMAP_OTG=y | ||
97 | 115 | ||
98 | # | 116 | # |
99 | # OMAP Board Type | 117 | # OMAP Board Type |
@@ -101,21 +119,14 @@ CONFIG_ARCH_OMAP_OTG=y | |||
101 | # CONFIG_MACH_OMAP_INNOVATOR is not set | 119 | # CONFIG_MACH_OMAP_INNOVATOR is not set |
102 | CONFIG_MACH_OMAP_H2=y | 120 | CONFIG_MACH_OMAP_H2=y |
103 | # CONFIG_MACH_OMAP_H3 is not set | 121 | # CONFIG_MACH_OMAP_H3 is not set |
104 | # CONFIG_MACH_OMAP_H4 is not set | ||
105 | # CONFIG_MACH_OMAP_OSK is not set | 122 | # CONFIG_MACH_OMAP_OSK is not set |
106 | # CONFIG_MACH_OMAP_GENERIC is not set | 123 | # CONFIG_MACH_OMAP_GENERIC is not set |
107 | 124 | ||
108 | # | 125 | # |
109 | # OMAP Feature Selections | 126 | # OMAP CPU Speed |
110 | # | 127 | # |
111 | CONFIG_OMAP_MUX=y | 128 | # CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER is not set |
112 | # CONFIG_OMAP_MUX_DEBUG is not set | 129 | # CONFIG_OMAP_ARM_216MHZ is not set |
113 | CONFIG_OMAP_MUX_WARNINGS=y | ||
114 | CONFIG_OMAP_MPU_TIMER=y | ||
115 | # CONFIG_OMAP_32K_TIMER is not set | ||
116 | CONFIG_OMAP_LL_DEBUG_UART1=y | ||
117 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
118 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set | ||
119 | CONFIG_OMAP_ARM_192MHZ=y | 130 | CONFIG_OMAP_ARM_192MHZ=y |
120 | # CONFIG_OMAP_ARM_168MHZ is not set | 131 | # CONFIG_OMAP_ARM_168MHZ is not set |
121 | # CONFIG_OMAP_ARM_120MHZ is not set | 132 | # CONFIG_OMAP_ARM_120MHZ is not set |
@@ -145,6 +156,7 @@ CONFIG_ARM_THUMB=y | |||
145 | # | 156 | # |
146 | # Bus support | 157 | # Bus support |
147 | # | 158 | # |
159 | CONFIG_ISA_DMA_API=y | ||
148 | 160 | ||
149 | # | 161 | # |
150 | # PCCARD (PCMCIA/CardBus) support | 162 | # PCCARD (PCMCIA/CardBus) support |
@@ -154,7 +166,16 @@ CONFIG_ARM_THUMB=y | |||
154 | # | 166 | # |
155 | # Kernel Features | 167 | # Kernel Features |
156 | # | 168 | # |
169 | # CONFIG_SMP is not set | ||
157 | CONFIG_PREEMPT=y | 170 | CONFIG_PREEMPT=y |
171 | CONFIG_NO_IDLE_HZ=y | ||
172 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
173 | CONFIG_SELECT_MEMORY_MODEL=y | ||
174 | CONFIG_FLATMEM_MANUAL=y | ||
175 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
176 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
177 | CONFIG_FLATMEM=y | ||
178 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
158 | # CONFIG_LEDS is not set | 179 | # CONFIG_LEDS is not set |
159 | CONFIG_ALIGNMENT_TRAP=y | 180 | CONFIG_ALIGNMENT_TRAP=y |
160 | 181 | ||
@@ -167,6 +188,22 @@ CONFIG_CMDLINE="mem=32M console=ttyS0,115200n8 root=0801 ro init=/bin/sh" | |||
167 | # CONFIG_XIP_KERNEL is not set | 188 | # CONFIG_XIP_KERNEL is not set |
168 | 189 | ||
169 | # | 190 | # |
191 | # CPU Frequency scaling | ||
192 | # | ||
193 | CONFIG_CPU_FREQ=y | ||
194 | CONFIG_CPU_FREQ_TABLE=y | ||
195 | # CONFIG_CPU_FREQ_DEBUG is not set | ||
196 | CONFIG_CPU_FREQ_STAT=y | ||
197 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
198 | # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set | ||
199 | CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y | ||
200 | # CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set | ||
201 | # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set | ||
202 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
203 | # CONFIG_CPU_FREQ_GOV_ONDEMAND is not set | ||
204 | # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set | ||
205 | |||
206 | # | ||
170 | # Floating point emulation | 207 | # Floating point emulation |
171 | # | 208 | # |
172 | 209 | ||
@@ -202,7 +239,6 @@ CONFIG_PM=y | |||
202 | CONFIG_STANDALONE=y | 239 | CONFIG_STANDALONE=y |
203 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 240 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
204 | # CONFIG_FW_LOADER is not set | 241 | # CONFIG_FW_LOADER is not set |
205 | CONFIG_DEBUG_DRIVER=y | ||
206 | 242 | ||
207 | # | 243 | # |
208 | # Memory Technology Devices (MTD) | 244 | # Memory Technology Devices (MTD) |
@@ -292,7 +328,6 @@ CONFIG_MTD_CFI_UTIL=y | |||
292 | # | 328 | # |
293 | # Block devices | 329 | # Block devices |
294 | # | 330 | # |
295 | # CONFIG_BLK_DEV_FD is not set | ||
296 | # CONFIG_BLK_DEV_COW_COMMON is not set | 331 | # CONFIG_BLK_DEV_COW_COMMON is not set |
297 | CONFIG_BLK_DEV_LOOP=y | 332 | CONFIG_BLK_DEV_LOOP=y |
298 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 333 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
@@ -327,6 +362,7 @@ CONFIG_SCSI_PROC_FS=y | |||
327 | # CONFIG_CHR_DEV_OSST is not set | 362 | # CONFIG_CHR_DEV_OSST is not set |
328 | # CONFIG_BLK_DEV_SR is not set | 363 | # CONFIG_BLK_DEV_SR is not set |
329 | # CONFIG_CHR_DEV_SG is not set | 364 | # CONFIG_CHR_DEV_SG is not set |
365 | # CONFIG_CHR_DEV_SCH is not set | ||
330 | 366 | ||
331 | # | 367 | # |
332 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | 368 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs |
@@ -356,6 +392,7 @@ CONFIG_SCSI_PROC_FS=y | |||
356 | # | 392 | # |
357 | # Fusion MPT device support | 393 | # Fusion MPT device support |
358 | # | 394 | # |
395 | # CONFIG_FUSION is not set | ||
359 | 396 | ||
360 | # | 397 | # |
361 | # IEEE 1394 (FireWire) support | 398 | # IEEE 1394 (FireWire) support |
@@ -375,12 +412,12 @@ CONFIG_NET=y | |||
375 | # | 412 | # |
376 | CONFIG_PACKET=y | 413 | CONFIG_PACKET=y |
377 | # CONFIG_PACKET_MMAP is not set | 414 | # CONFIG_PACKET_MMAP is not set |
378 | # CONFIG_NETLINK_DEV is not set | ||
379 | CONFIG_UNIX=y | 415 | CONFIG_UNIX=y |
380 | # CONFIG_NET_KEY is not set | 416 | # CONFIG_NET_KEY is not set |
381 | CONFIG_INET=y | 417 | CONFIG_INET=y |
382 | # CONFIG_IP_MULTICAST is not set | 418 | # CONFIG_IP_MULTICAST is not set |
383 | # CONFIG_IP_ADVANCED_ROUTER is not set | 419 | # CONFIG_IP_ADVANCED_ROUTER is not set |
420 | CONFIG_IP_FIB_HASH=y | ||
384 | CONFIG_IP_PNP=y | 421 | CONFIG_IP_PNP=y |
385 | CONFIG_IP_PNP_DHCP=y | 422 | CONFIG_IP_PNP_DHCP=y |
386 | CONFIG_IP_PNP_BOOTP=y | 423 | CONFIG_IP_PNP_BOOTP=y |
@@ -395,6 +432,8 @@ CONFIG_IP_PNP_BOOTP=y | |||
395 | # CONFIG_INET_TUNNEL is not set | 432 | # CONFIG_INET_TUNNEL is not set |
396 | CONFIG_IP_TCPDIAG=y | 433 | CONFIG_IP_TCPDIAG=y |
397 | # CONFIG_IP_TCPDIAG_IPV6 is not set | 434 | # CONFIG_IP_TCPDIAG_IPV6 is not set |
435 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
436 | CONFIG_TCP_CONG_BIC=y | ||
398 | # CONFIG_IPV6 is not set | 437 | # CONFIG_IPV6 is not set |
399 | # CONFIG_NETFILTER is not set | 438 | # CONFIG_NETFILTER is not set |
400 | 439 | ||
@@ -442,6 +481,7 @@ CONFIG_NETDEVICES=y | |||
442 | CONFIG_NET_ETHERNET=y | 481 | CONFIG_NET_ETHERNET=y |
443 | CONFIG_MII=y | 482 | CONFIG_MII=y |
444 | CONFIG_SMC91X=y | 483 | CONFIG_SMC91X=y |
484 | # CONFIG_DM9000 is not set | ||
445 | 485 | ||
446 | # | 486 | # |
447 | # Ethernet (1000 Mbit) | 487 | # Ethernet (1000 Mbit) |
@@ -518,7 +558,6 @@ CONFIG_SERIO=y | |||
518 | CONFIG_SERIO_SERPORT=y | 558 | CONFIG_SERIO_SERPORT=y |
519 | # CONFIG_SERIO_RAW is not set | 559 | # CONFIG_SERIO_RAW is not set |
520 | # CONFIG_GAMEPORT is not set | 560 | # CONFIG_GAMEPORT is not set |
521 | CONFIG_SOUND_GAMEPORT=y | ||
522 | 561 | ||
523 | # | 562 | # |
524 | # Character devices | 563 | # Character devices |
@@ -567,13 +606,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
567 | # | 606 | # |
568 | # Ftape, the floppy tape device driver | 607 | # Ftape, the floppy tape device driver |
569 | # | 608 | # |
570 | # CONFIG_DRM is not set | ||
571 | # CONFIG_RAW_DRIVER is not set | 609 | # CONFIG_RAW_DRIVER is not set |
572 | 610 | ||
573 | # | 611 | # |
574 | # TPM devices | 612 | # TPM devices |
575 | # | 613 | # |
576 | # CONFIG_TCG_TPM is not set | ||
577 | 614 | ||
578 | # | 615 | # |
579 | # I2C support | 616 | # I2C support |
@@ -604,7 +641,9 @@ CONFIG_I2C_CHARDEV=y | |||
604 | # CONFIG_SENSORS_ADM1025 is not set | 641 | # CONFIG_SENSORS_ADM1025 is not set |
605 | # CONFIG_SENSORS_ADM1026 is not set | 642 | # CONFIG_SENSORS_ADM1026 is not set |
606 | # CONFIG_SENSORS_ADM1031 is not set | 643 | # CONFIG_SENSORS_ADM1031 is not set |
644 | # CONFIG_SENSORS_ADM9240 is not set | ||
607 | # CONFIG_SENSORS_ASB100 is not set | 645 | # CONFIG_SENSORS_ASB100 is not set |
646 | # CONFIG_SENSORS_ATXP1 is not set | ||
608 | # CONFIG_SENSORS_DS1621 is not set | 647 | # CONFIG_SENSORS_DS1621 is not set |
609 | # CONFIG_SENSORS_FSCHER is not set | 648 | # CONFIG_SENSORS_FSCHER is not set |
610 | # CONFIG_SENSORS_FSCPOS is not set | 649 | # CONFIG_SENSORS_FSCPOS is not set |
@@ -620,6 +659,7 @@ CONFIG_I2C_CHARDEV=y | |||
620 | # CONFIG_SENSORS_LM85 is not set | 659 | # CONFIG_SENSORS_LM85 is not set |
621 | # CONFIG_SENSORS_LM87 is not set | 660 | # CONFIG_SENSORS_LM87 is not set |
622 | # CONFIG_SENSORS_LM90 is not set | 661 | # CONFIG_SENSORS_LM90 is not set |
662 | # CONFIG_SENSORS_LM92 is not set | ||
623 | # CONFIG_SENSORS_MAX1619 is not set | 663 | # CONFIG_SENSORS_MAX1619 is not set |
624 | # CONFIG_SENSORS_PC87360 is not set | 664 | # CONFIG_SENSORS_PC87360 is not set |
625 | # CONFIG_SENSORS_SMSC47B397 is not set | 665 | # CONFIG_SENSORS_SMSC47B397 is not set |
@@ -627,15 +667,21 @@ CONFIG_I2C_CHARDEV=y | |||
627 | # CONFIG_SENSORS_W83781D is not set | 667 | # CONFIG_SENSORS_W83781D is not set |
628 | # CONFIG_SENSORS_W83L785TS is not set | 668 | # CONFIG_SENSORS_W83L785TS is not set |
629 | # CONFIG_SENSORS_W83627HF is not set | 669 | # CONFIG_SENSORS_W83627HF is not set |
670 | # CONFIG_SENSORS_W83627EHF is not set | ||
630 | 671 | ||
631 | # | 672 | # |
632 | # Other I2C Chip support | 673 | # Other I2C Chip support |
633 | # | 674 | # |
675 | # CONFIG_SENSORS_DS1337 is not set | ||
676 | # CONFIG_SENSORS_DS1374 is not set | ||
634 | # CONFIG_SENSORS_EEPROM is not set | 677 | # CONFIG_SENSORS_EEPROM is not set |
635 | # CONFIG_SENSORS_PCF8574 is not set | 678 | # CONFIG_SENSORS_PCF8574 is not set |
679 | # CONFIG_SENSORS_PCA9539 is not set | ||
636 | # CONFIG_SENSORS_PCF8591 is not set | 680 | # CONFIG_SENSORS_PCF8591 is not set |
637 | # CONFIG_SENSORS_RTC8564 is not set | 681 | # CONFIG_SENSORS_RTC8564 is not set |
638 | CONFIG_ISP1301_OMAP=y | 682 | CONFIG_ISP1301_OMAP=y |
683 | CONFIG_TPS65010=y | ||
684 | # CONFIG_SENSORS_MAX6875 is not set | ||
639 | # CONFIG_I2C_DEBUG_CORE is not set | 685 | # CONFIG_I2C_DEBUG_CORE is not set |
640 | # CONFIG_I2C_DEBUG_ALGO is not set | 686 | # CONFIG_I2C_DEBUG_ALGO is not set |
641 | # CONFIG_I2C_DEBUG_BUS is not set | 687 | # CONFIG_I2C_DEBUG_BUS is not set |
@@ -663,8 +709,10 @@ CONFIG_FB=y | |||
663 | # CONFIG_FB_CFB_COPYAREA is not set | 709 | # CONFIG_FB_CFB_COPYAREA is not set |
664 | # CONFIG_FB_CFB_IMAGEBLIT is not set | 710 | # CONFIG_FB_CFB_IMAGEBLIT is not set |
665 | # CONFIG_FB_SOFT_CURSOR is not set | 711 | # CONFIG_FB_SOFT_CURSOR is not set |
712 | # CONFIG_FB_MACMODES is not set | ||
666 | CONFIG_FB_MODE_HELPERS=y | 713 | CONFIG_FB_MODE_HELPERS=y |
667 | # CONFIG_FB_TILEBLITTING is not set | 714 | # CONFIG_FB_TILEBLITTING is not set |
715 | # CONFIG_FB_S1D13XXX is not set | ||
668 | # CONFIG_FB_VIRTUAL is not set | 716 | # CONFIG_FB_VIRTUAL is not set |
669 | 717 | ||
670 | # | 718 | # |
@@ -677,11 +725,13 @@ CONFIG_FONTS=y | |||
677 | CONFIG_FONT_8x8=y | 725 | CONFIG_FONT_8x8=y |
678 | CONFIG_FONT_8x16=y | 726 | CONFIG_FONT_8x16=y |
679 | # CONFIG_FONT_6x11 is not set | 727 | # CONFIG_FONT_6x11 is not set |
728 | # CONFIG_FONT_7x14 is not set | ||
680 | # CONFIG_FONT_PEARL_8x8 is not set | 729 | # CONFIG_FONT_PEARL_8x8 is not set |
681 | # CONFIG_FONT_ACORN_8x8 is not set | 730 | # CONFIG_FONT_ACORN_8x8 is not set |
682 | # CONFIG_FONT_MINI_4x6 is not set | 731 | # CONFIG_FONT_MINI_4x6 is not set |
683 | # CONFIG_FONT_SUN8x16 is not set | 732 | # CONFIG_FONT_SUN8x16 is not set |
684 | # CONFIG_FONT_SUN12x22 is not set | 733 | # CONFIG_FONT_SUN12x22 is not set |
734 | # CONFIG_FONT_10x18 is not set | ||
685 | 735 | ||
686 | # | 736 | # |
687 | # Logo configuration | 737 | # Logo configuration |
@@ -729,14 +779,14 @@ CONFIG_USB_ARCH_HAS_OHCI=y | |||
729 | # | 779 | # |
730 | CONFIG_USB_GADGET=y | 780 | CONFIG_USB_GADGET=y |
731 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | 781 | # CONFIG_USB_GADGET_DEBUG_FILES is not set |
782 | CONFIG_USB_GADGET_SELECTED=y | ||
732 | # CONFIG_USB_GADGET_NET2280 is not set | 783 | # CONFIG_USB_GADGET_NET2280 is not set |
733 | # CONFIG_USB_GADGET_PXA2XX is not set | 784 | # CONFIG_USB_GADGET_PXA2XX is not set |
734 | # CONFIG_USB_GADGET_GOKU is not set | 785 | # CONFIG_USB_GADGET_GOKU is not set |
735 | # CONFIG_USB_GADGET_SA1100 is not set | ||
736 | # CONFIG_USB_GADGET_LH7A40X is not set | 786 | # CONFIG_USB_GADGET_LH7A40X is not set |
737 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
738 | CONFIG_USB_GADGET_OMAP=y | 787 | CONFIG_USB_GADGET_OMAP=y |
739 | CONFIG_USB_OMAP=y | 788 | CONFIG_USB_OMAP=y |
789 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
740 | # CONFIG_USB_GADGET_DUALSPEED is not set | 790 | # CONFIG_USB_GADGET_DUALSPEED is not set |
741 | # CONFIG_USB_ZERO is not set | 791 | # CONFIG_USB_ZERO is not set |
742 | CONFIG_USB_ETH=y | 792 | CONFIG_USB_ETH=y |
@@ -755,6 +805,7 @@ CONFIG_USB_ETH_RNDIS=y | |||
755 | # | 805 | # |
756 | CONFIG_EXT2_FS=y | 806 | CONFIG_EXT2_FS=y |
757 | # CONFIG_EXT2_FS_XATTR is not set | 807 | # CONFIG_EXT2_FS_XATTR is not set |
808 | # CONFIG_EXT2_FS_XIP is not set | ||
758 | # CONFIG_EXT3_FS is not set | 809 | # CONFIG_EXT3_FS is not set |
759 | # CONFIG_JBD is not set | 810 | # CONFIG_JBD is not set |
760 | # CONFIG_REISERFS_FS is not set | 811 | # CONFIG_REISERFS_FS is not set |
@@ -791,7 +842,6 @@ CONFIG_FAT_DEFAULT_CODEPAGE=437 | |||
791 | # | 842 | # |
792 | CONFIG_PROC_FS=y | 843 | CONFIG_PROC_FS=y |
793 | CONFIG_SYSFS=y | 844 | CONFIG_SYSFS=y |
794 | # CONFIG_DEVFS_FS is not set | ||
795 | # CONFIG_DEVPTS_FS_XATTR is not set | 845 | # CONFIG_DEVPTS_FS_XATTR is not set |
796 | # CONFIG_TMPFS is not set | 846 | # CONFIG_TMPFS is not set |
797 | # CONFIG_HUGETLB_PAGE is not set | 847 | # CONFIG_HUGETLB_PAGE is not set |
@@ -828,12 +878,14 @@ CONFIG_CRAMFS=y | |||
828 | # | 878 | # |
829 | CONFIG_NFS_FS=y | 879 | CONFIG_NFS_FS=y |
830 | CONFIG_NFS_V3=y | 880 | CONFIG_NFS_V3=y |
881 | # CONFIG_NFS_V3_ACL is not set | ||
831 | CONFIG_NFS_V4=y | 882 | CONFIG_NFS_V4=y |
832 | # CONFIG_NFS_DIRECTIO is not set | 883 | # CONFIG_NFS_DIRECTIO is not set |
833 | # CONFIG_NFSD is not set | 884 | # CONFIG_NFSD is not set |
834 | CONFIG_ROOT_NFS=y | 885 | CONFIG_ROOT_NFS=y |
835 | CONFIG_LOCKD=y | 886 | CONFIG_LOCKD=y |
836 | CONFIG_LOCKD_V4=y | 887 | CONFIG_LOCKD_V4=y |
888 | CONFIG_NFS_COMMON=y | ||
837 | CONFIG_SUNRPC=y | 889 | CONFIG_SUNRPC=y |
838 | CONFIG_SUNRPC_GSS=y | 890 | CONFIG_SUNRPC_GSS=y |
839 | CONFIG_RPCSEC_GSS_KRB5=y | 891 | CONFIG_RPCSEC_GSS_KRB5=y |
@@ -903,24 +955,11 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
903 | # Kernel hacking | 955 | # Kernel hacking |
904 | # | 956 | # |
905 | # CONFIG_PRINTK_TIME is not set | 957 | # CONFIG_PRINTK_TIME is not set |
906 | CONFIG_DEBUG_KERNEL=y | 958 | # CONFIG_DEBUG_KERNEL is not set |
907 | # CONFIG_MAGIC_SYSRQ is not set | ||
908 | CONFIG_LOG_BUF_SHIFT=14 | 959 | CONFIG_LOG_BUF_SHIFT=14 |
909 | # CONFIG_SCHEDSTATS is not set | ||
910 | # CONFIG_DEBUG_SLAB is not set | ||
911 | CONFIG_DEBUG_PREEMPT=y | ||
912 | # CONFIG_DEBUG_SPINLOCK is not set | ||
913 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
914 | # CONFIG_DEBUG_KOBJECT is not set | ||
915 | CONFIG_DEBUG_BUGVERBOSE=y | 960 | CONFIG_DEBUG_BUGVERBOSE=y |
916 | CONFIG_DEBUG_INFO=y | ||
917 | # CONFIG_DEBUG_FS is not set | ||
918 | CONFIG_FRAME_POINTER=y | 961 | CONFIG_FRAME_POINTER=y |
919 | CONFIG_DEBUG_USER=y | 962 | # CONFIG_DEBUG_USER is not set |
920 | # CONFIG_DEBUG_WAITQ is not set | ||
921 | CONFIG_DEBUG_ERRORS=y | ||
922 | CONFIG_DEBUG_LL=y | ||
923 | # CONFIG_DEBUG_ICEDCC is not set | ||
924 | 963 | ||
925 | # | 964 | # |
926 | # Security options | 965 | # Security options |
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 4b9d841e04c1..45b18658499f 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/serial.h> | 23 | #include <linux/serial.h> |
24 | #include <linux/tty.h> | 24 | #include <linux/tty.h> |
25 | #include <linux/bitops.h> | 25 | #include <linux/bitops.h> |
26 | #include <linux/serial_core.h> | 26 | #include <linux/serial_8250.h> |
27 | #include <linux/mm.h> | 27 | #include <linux/mm.h> |
28 | 28 | ||
29 | #include <asm/types.h> | 29 | #include <asm/types.h> |
@@ -125,19 +125,6 @@ static struct map_desc ixp2000_io_desc[] __initdata = { | |||
125 | } | 125 | } |
126 | }; | 126 | }; |
127 | 127 | ||
128 | static struct uart_port ixp2000_serial_port = { | ||
129 | .membase = (char *)(IXP2000_UART_VIRT_BASE + 3), | ||
130 | .mapbase = IXP2000_UART_PHYS_BASE + 3, | ||
131 | .irq = IRQ_IXP2000_UART, | ||
132 | .flags = UPF_SKIP_TEST, | ||
133 | .iotype = UPIO_MEM, | ||
134 | .regshift = 2, | ||
135 | .uartclk = 50000000, | ||
136 | .line = 0, | ||
137 | .type = PORT_XSCALE, | ||
138 | .fifosize = 16 | ||
139 | }; | ||
140 | |||
141 | void __init ixp2000_map_io(void) | 128 | void __init ixp2000_map_io(void) |
142 | { | 129 | { |
143 | extern unsigned int processor_id; | 130 | extern unsigned int processor_id; |
@@ -157,12 +144,50 @@ void __init ixp2000_map_io(void) | |||
157 | } | 144 | } |
158 | 145 | ||
159 | iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); | 146 | iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); |
160 | early_serial_setup(&ixp2000_serial_port); | ||
161 | 147 | ||
162 | /* Set slowport to 8-bit mode. */ | 148 | /* Set slowport to 8-bit mode. */ |
163 | ixp2000_reg_write(IXP2000_SLOWPORT_FRM, 1); | 149 | ixp2000_reg_write(IXP2000_SLOWPORT_FRM, 1); |
164 | } | 150 | } |
165 | 151 | ||
152 | |||
153 | /************************************************************************* | ||
154 | * Serial port support for IXP2000 | ||
155 | *************************************************************************/ | ||
156 | static struct plat_serial8250_port ixp2000_serial_port[] = { | ||
157 | { | ||
158 | .mapbase = IXP2000_UART_PHYS_BASE, | ||
159 | .membase = (char *)(IXP2000_UART_VIRT_BASE + 3), | ||
160 | .irq = IRQ_IXP2000_UART, | ||
161 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | ||
162 | .iotype = UPIO_MEM, | ||
163 | .regshift = 2, | ||
164 | .uartclk = 50000000, | ||
165 | }, | ||
166 | { }, | ||
167 | }; | ||
168 | |||
169 | static struct resource ixp2000_uart_resource = { | ||
170 | .start = IXP2000_UART_PHYS_BASE, | ||
171 | .end = IXP2000_UART_PHYS_BASE + 0xffff, | ||
172 | .flags = IORESOURCE_MEM, | ||
173 | }; | ||
174 | |||
175 | static struct platform_device ixp2000_serial_device = { | ||
176 | .name = "serial8250", | ||
177 | .id = 0, | ||
178 | .dev = { | ||
179 | .platform_data = ixp2000_serial_port, | ||
180 | }, | ||
181 | .num_resources = 1, | ||
182 | .resource = &ixp2000_uart_resource, | ||
183 | }; | ||
184 | |||
185 | void __init ixp2000_uart_init(void) | ||
186 | { | ||
187 | platform_device_register(&ixp2000_serial_device); | ||
188 | } | ||
189 | |||
190 | |||
166 | /************************************************************************* | 191 | /************************************************************************* |
167 | * Timer-tick functions for IXP2000 | 192 | * Timer-tick functions for IXP2000 |
168 | *************************************************************************/ | 193 | *************************************************************************/ |
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index b7ebf3898fc5..9aa54de44740 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c | |||
@@ -219,6 +219,7 @@ static struct platform_device *enp2611_devices[] __initdata = { | |||
219 | static void __init enp2611_init_machine(void) | 219 | static void __init enp2611_init_machine(void) |
220 | { | 220 | { |
221 | platform_add_devices(enp2611_devices, ARRAY_SIZE(enp2611_devices)); | 221 | platform_add_devices(enp2611_devices, ARRAY_SIZE(enp2611_devices)); |
222 | ixp2000_uart_init(); | ||
222 | } | 223 | } |
223 | 224 | ||
224 | 225 | ||
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index 5e4380747b53..a43369ad876c 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c | |||
@@ -303,5 +303,6 @@ void __init ixdp2x00_init_machine(void) | |||
303 | gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT); | 303 | gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT); |
304 | 304 | ||
305 | platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices)); | 305 | platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices)); |
306 | ixp2000_uart_init(); | ||
306 | } | 307 | } |
307 | 308 | ||
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index c73588743ee1..43447dad1657 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c | |||
@@ -370,6 +370,7 @@ static void __init ixdp2x01_init_machine(void) | |||
370 | ((*IXDP2X01_CPLD_FLASH_REG & IXDP2X01_CPLD_FLASH_BANK_MASK) + 1); | 370 | ((*IXDP2X01_CPLD_FLASH_REG & IXDP2X01_CPLD_FLASH_BANK_MASK) + 1); |
371 | 371 | ||
372 | platform_add_devices(ixdp2x01_devices, ARRAY_SIZE(ixdp2x01_devices)); | 372 | platform_add_devices(ixdp2x01_devices, ARRAY_SIZE(ixdp2x01_devices)); |
373 | ixp2000_uart_init(); | ||
373 | } | 374 | } |
374 | 375 | ||
375 | 376 | ||
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig deleted file mode 100644 index 9e42efa66b2b..000000000000 --- a/arch/arm/mach-omap/Kconfig +++ /dev/null | |||
@@ -1,221 +0,0 @@ | |||
1 | if ARCH_OMAP | ||
2 | |||
3 | menu "TI OMAP Implementations" | ||
4 | |||
5 | comment "OMAP Core Type" | ||
6 | |||
7 | config ARCH_OMAP730 | ||
8 | depends on ARCH_OMAP | ||
9 | bool "OMAP730 Based System" | ||
10 | select ARCH_OMAP_OTG | ||
11 | |||
12 | config ARCH_OMAP1510 | ||
13 | depends on ARCH_OMAP | ||
14 | default y | ||
15 | bool "OMAP1510 Based System" | ||
16 | |||
17 | config ARCH_OMAP16XX | ||
18 | depends on ARCH_OMAP | ||
19 | bool "OMAP16XX Based System" | ||
20 | select ARCH_OMAP_OTG | ||
21 | |||
22 | config ARCH_OMAP_OTG | ||
23 | bool | ||
24 | |||
25 | comment "OMAP Board Type" | ||
26 | |||
27 | config MACH_OMAP_INNOVATOR | ||
28 | bool "TI Innovator" | ||
29 | depends on ARCH_OMAP1510 || ARCH_OMAP16XX | ||
30 | help | ||
31 | TI OMAP 1510 or 1610 Innovator board support. Say Y here if you | ||
32 | have such a board. | ||
33 | |||
34 | config MACH_OMAP_H2 | ||
35 | bool "TI H2 Support" | ||
36 | depends on ARCH_OMAP16XX | ||
37 | help | ||
38 | TI OMAP 1610/1611B H2 board support. Say Y here if you have such | ||
39 | a board. | ||
40 | |||
41 | config MACH_OMAP_H3 | ||
42 | bool "TI H3 Support" | ||
43 | depends on ARCH_OMAP16XX | ||
44 | help | ||
45 | TI OMAP 1710 H3 board support. Say Y here if you have such | ||
46 | a board. | ||
47 | |||
48 | config MACH_OMAP_H4 | ||
49 | bool "TI H4 Support" | ||
50 | depends on ARCH_OMAP16XX | ||
51 | help | ||
52 | TI OMAP 1610 H4 board support. Say Y here if you have such | ||
53 | a board. | ||
54 | |||
55 | config MACH_OMAP_OSK | ||
56 | bool "TI OSK Support" | ||
57 | depends on ARCH_OMAP16XX | ||
58 | help | ||
59 | TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here | ||
60 | if you have such a board. | ||
61 | |||
62 | config MACH_OMAP_PERSEUS2 | ||
63 | bool "TI Perseus2" | ||
64 | depends on ARCH_OMAP730 | ||
65 | help | ||
66 | Support for TI OMAP 730 Perseus2 board. Say Y here if you have such | ||
67 | a board. | ||
68 | |||
69 | config MACH_VOICEBLUE | ||
70 | bool "Voiceblue" | ||
71 | depends on ARCH_OMAP1510 | ||
72 | help | ||
73 | Support for Voiceblue GSM/VoIP gateway. Say Y here if you have such | ||
74 | board. | ||
75 | |||
76 | config MACH_NETSTAR | ||
77 | bool "NetStar" | ||
78 | depends on ARCH_OMAP1510 | ||
79 | help | ||
80 | Support for NetStar PBX. Say Y here if you have such a board. | ||
81 | |||
82 | config MACH_OMAP_GENERIC | ||
83 | bool "Generic OMAP board" | ||
84 | depends on ARCH_OMAP1510 || ARCH_OMAP16XX | ||
85 | help | ||
86 | Support for generic OMAP-1510, 1610 or 1710 board with | ||
87 | no FPGA. Can be used as template for porting Linux to | ||
88 | custom OMAP boards. Say Y here if you have a custom | ||
89 | board. | ||
90 | |||
91 | comment "OMAP Feature Selections" | ||
92 | |||
93 | #config OMAP_BOOT_TAG | ||
94 | # bool "OMAP bootloader information passing" | ||
95 | # depends on ARCH_OMAP | ||
96 | # default n | ||
97 | # help | ||
98 | # Say Y, if you have a bootloader which passes information | ||
99 | # about your board and its peripheral configuration. | ||
100 | |||
101 | config OMAP_MUX | ||
102 | bool "OMAP multiplexing support" | ||
103 | depends on ARCH_OMAP | ||
104 | default y | ||
105 | help | ||
106 | Pin multiplexing support for OMAP boards. If your bootloader | ||
107 | sets the multiplexing correctly, say N. Otherwise, or if unsure, | ||
108 | say Y. | ||
109 | |||
110 | config OMAP_MUX_DEBUG | ||
111 | bool "Multiplexing debug output" | ||
112 | depends on OMAP_MUX | ||
113 | default n | ||
114 | help | ||
115 | Makes the multiplexing functions print out a lot of debug info. | ||
116 | This is useful if you want to find out the correct values of the | ||
117 | multiplexing registers. | ||
118 | |||
119 | config OMAP_MUX_WARNINGS | ||
120 | bool "Warn about pins the bootloader didn't set up" | ||
121 | depends on OMAP_MUX | ||
122 | default y | ||
123 | help | ||
124 | Choose Y here to warn whenever driver initialization logic needs | ||
125 | to change the pin multiplexing setup. When there are no warnings | ||
126 | printed, it's safe to deselect OMAP_MUX for your product. | ||
127 | |||
128 | choice | ||
129 | prompt "System timer" | ||
130 | default OMAP_MPU_TIMER | ||
131 | |||
132 | config OMAP_MPU_TIMER | ||
133 | bool "Use mpu timer" | ||
134 | help | ||
135 | Select this option if you want to use the OMAP mpu timer. This | ||
136 | timer provides more intra-tick resolution than the 32KHz timer, | ||
137 | but consumes more power. | ||
138 | |||
139 | config OMAP_32K_TIMER | ||
140 | bool "Use 32KHz timer" | ||
141 | depends on ARCH_OMAP16XX | ||
142 | help | ||
143 | Select this option if you want to enable the OMAP 32KHz timer. | ||
144 | This timer saves power compared to the OMAP_MPU_TIMER, and has | ||
145 | support for no tick during idle. The 32KHz timer provides less | ||
146 | intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is | ||
147 | currently only available for OMAP-16xx. | ||
148 | |||
149 | endchoice | ||
150 | |||
151 | config OMAP_32K_TIMER_HZ | ||
152 | int "Kernel internal timer frequency for 32KHz timer" | ||
153 | range 32 1024 | ||
154 | depends on OMAP_32K_TIMER | ||
155 | default "128" | ||
156 | help | ||
157 | Kernel internal timer frequency should be a divisor of 32768, | ||
158 | such as 64 or 128. | ||
159 | |||
160 | choice | ||
161 | prompt "Low-level debug console UART" | ||
162 | depends on ARCH_OMAP | ||
163 | default OMAP_LL_DEBUG_UART1 | ||
164 | |||
165 | config OMAP_LL_DEBUG_UART1 | ||
166 | bool "UART1" | ||
167 | |||
168 | config OMAP_LL_DEBUG_UART2 | ||
169 | bool "UART2" | ||
170 | |||
171 | config OMAP_LL_DEBUG_UART3 | ||
172 | bool "UART3" | ||
173 | |||
174 | endchoice | ||
175 | |||
176 | config OMAP_ARM_195MHZ | ||
177 | bool "OMAP ARM 195 MHz CPU" | ||
178 | depends on ARCH_OMAP730 | ||
179 | help | ||
180 | Enable 195MHz clock for OMAP CPU. If unsure, say N. | ||
181 | |||
182 | config OMAP_ARM_192MHZ | ||
183 | bool "OMAP ARM 192 MHz CPU" | ||
184 | depends on ARCH_OMAP16XX | ||
185 | help | ||
186 | Enable 192MHz clock for OMAP CPU. If unsure, say N. | ||
187 | |||
188 | config OMAP_ARM_182MHZ | ||
189 | bool "OMAP ARM 182 MHz CPU" | ||
190 | depends on ARCH_OMAP730 | ||
191 | help | ||
192 | Enable 182MHz clock for OMAP CPU. If unsure, say N. | ||
193 | |||
194 | config OMAP_ARM_168MHZ | ||
195 | bool "OMAP ARM 168 MHz CPU" | ||
196 | depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730 | ||
197 | help | ||
198 | Enable 168MHz clock for OMAP CPU. If unsure, say N. | ||
199 | |||
200 | config OMAP_ARM_120MHZ | ||
201 | bool "OMAP ARM 120 MHz CPU" | ||
202 | depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730 | ||
203 | help | ||
204 | Enable 120MHz clock for OMAP CPU. If unsure, say N. | ||
205 | |||
206 | config OMAP_ARM_60MHZ | ||
207 | bool "OMAP ARM 60 MHz CPU" | ||
208 | depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730 | ||
209 | default y | ||
210 | help | ||
211 | Enable 60MHz clock for OMAP CPU. If unsure, say Y. | ||
212 | |||
213 | config OMAP_ARM_30MHZ | ||
214 | bool "OMAP ARM 30 MHz CPU" | ||
215 | depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730 | ||
216 | help | ||
217 | Enable 30MHz clock for OMAP CPU. If unsure, say N. | ||
218 | |||
219 | endmenu | ||
220 | |||
221 | endif | ||
diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile deleted file mode 100644 index 4cafb11d2c02..000000000000 --- a/arch/arm/mach-omap/Makefile +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the linux kernel. | ||
3 | # | ||
4 | |||
5 | # Common support | ||
6 | obj-y := common.o time.o irq.o dma.o clock.o mux.o gpio.o mcbsp.o usb.o | ||
7 | obj-m := | ||
8 | obj-n := | ||
9 | obj- := | ||
10 | led-y := leds.o | ||
11 | |||
12 | # Specific board support | ||
13 | obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o | ||
14 | obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o | ||
15 | obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o | ||
16 | obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o | ||
17 | obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o | ||
18 | obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o | ||
19 | obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o | ||
20 | obj-$(CONFIG_MACH_NETSTAR) += board-netstar.o | ||
21 | |||
22 | # OCPI interconnect support for 1710, 1610 and 5912 | ||
23 | obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o | ||
24 | |||
25 | # LEDs support | ||
26 | led-$(CONFIG_MACH_OMAP_H2) += leds-h2p2-debug.o | ||
27 | led-$(CONFIG_MACH_OMAP_INNOVATOR) += leds-innovator.o | ||
28 | led-$(CONFIG_MACH_OMAP_PERSEUS2) += leds-h2p2-debug.o | ||
29 | obj-$(CONFIG_LEDS) += $(led-y) | ||
30 | |||
31 | # Power Management | ||
32 | obj-$(CONFIG_PM) += pm.o sleep.o | ||
33 | |||
34 | ifeq ($(CONFIG_ARCH_OMAP1510),y) | ||
35 | # Innovator-1510 FPGA | ||
36 | obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o | ||
37 | endif | ||
38 | |||
39 | # kgdb support | ||
40 | obj-$(CONFIG_KGDB_SERIAL) += kgdb-serial.o | ||
diff --git a/arch/arm/mach-omap/common.c b/arch/arm/mach-omap/common.c deleted file mode 100644 index 265cde48586f..000000000000 --- a/arch/arm/mach-omap/common.c +++ /dev/null | |||
@@ -1,549 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-omap/common.c | ||
3 | * | ||
4 | * Code common to all OMAP machines. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/config.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/pm.h> | ||
16 | #include <linux/console.h> | ||
17 | #include <linux/serial.h> | ||
18 | #include <linux/tty.h> | ||
19 | #include <linux/serial_8250.h> | ||
20 | #include <linux/serial_reg.h> | ||
21 | |||
22 | #include <asm/hardware.h> | ||
23 | #include <asm/system.h> | ||
24 | #include <asm/pgtable.h> | ||
25 | #include <asm/mach/map.h> | ||
26 | #include <asm/hardware/clock.h> | ||
27 | #include <asm/io.h> | ||
28 | #include <asm/mach-types.h> | ||
29 | |||
30 | #include <asm/arch/board.h> | ||
31 | #include <asm/arch/mux.h> | ||
32 | #include <asm/arch/fpga.h> | ||
33 | |||
34 | #include "clock.h" | ||
35 | |||
36 | #define DEBUG 1 | ||
37 | |||
38 | struct omap_id { | ||
39 | u16 jtag_id; /* Used to determine OMAP type */ | ||
40 | u8 die_rev; /* Processor revision */ | ||
41 | u32 omap_id; /* OMAP revision */ | ||
42 | u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */ | ||
43 | }; | ||
44 | |||
45 | /* Register values to detect the OMAP version */ | ||
46 | static struct omap_id omap_ids[] __initdata = { | ||
47 | { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100}, | ||
48 | { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300}, | ||
49 | { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000}, | ||
50 | { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000}, | ||
51 | { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000}, | ||
52 | { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00}, | ||
53 | { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00}, | ||
54 | { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00}, | ||
55 | { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00}, | ||
56 | { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000}, | ||
57 | { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00}, | ||
58 | { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00}, | ||
59 | { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300}, | ||
60 | { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300}, | ||
61 | { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300}, | ||
62 | { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000}, | ||
63 | { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000}, | ||
64 | { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000}, | ||
65 | }; | ||
66 | |||
67 | /* | ||
68 | * Get OMAP type from PROD_ID. | ||
69 | * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM. | ||
70 | * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense. | ||
71 | * Undocumented register in TEST BLOCK is used as fallback; This seems to | ||
72 | * work on 1510, 1610 & 1710. The official way hopefully will work in future | ||
73 | * processors. | ||
74 | */ | ||
75 | static u16 __init omap_get_jtag_id(void) | ||
76 | { | ||
77 | u32 prod_id, omap_id; | ||
78 | |||
79 | prod_id = omap_readl(OMAP_PRODUCTION_ID_1); | ||
80 | omap_id = omap_readl(OMAP32_ID_1); | ||
81 | |||
82 | /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */ | ||
83 | if (((prod_id >> 20) == 0) || (prod_id == omap_id)) | ||
84 | prod_id = 0; | ||
85 | else | ||
86 | prod_id &= 0xffff; | ||
87 | |||
88 | if (prod_id) | ||
89 | return prod_id; | ||
90 | |||
91 | /* Use OMAP32_ID_1 as fallback */ | ||
92 | prod_id = ((omap_id >> 12) & 0xffff); | ||
93 | |||
94 | return prod_id; | ||
95 | } | ||
96 | |||
97 | /* | ||
98 | * Get OMAP revision from DIE_REV. | ||
99 | * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID. | ||
100 | * Undocumented register in the TEST BLOCK is used as fallback. | ||
101 | * REVISIT: This does not seem to work on 1510 | ||
102 | */ | ||
103 | static u8 __init omap_get_die_rev(void) | ||
104 | { | ||
105 | u32 die_rev; | ||
106 | |||
107 | die_rev = omap_readl(OMAP_DIE_ID_1); | ||
108 | |||
109 | /* Check for broken OMAP_DIE_ID on early 1710 */ | ||
110 | if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id()) | ||
111 | die_rev = 0; | ||
112 | |||
113 | die_rev = (die_rev >> 17) & 0xf; | ||
114 | if (die_rev) | ||
115 | return die_rev; | ||
116 | |||
117 | die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf; | ||
118 | |||
119 | return die_rev; | ||
120 | } | ||
121 | |||
122 | static void __init omap_check_revision(void) | ||
123 | { | ||
124 | int i; | ||
125 | u16 jtag_id; | ||
126 | u8 die_rev; | ||
127 | u32 omap_id; | ||
128 | u8 cpu_type; | ||
129 | |||
130 | jtag_id = omap_get_jtag_id(); | ||
131 | die_rev = omap_get_die_rev(); | ||
132 | omap_id = omap_readl(OMAP32_ID_0); | ||
133 | |||
134 | #ifdef DEBUG | ||
135 | printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0)); | ||
136 | printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n", | ||
137 | omap_readl(OMAP_DIE_ID_1), | ||
138 | (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf); | ||
139 | printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0)); | ||
140 | printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n", | ||
141 | omap_readl(OMAP_PRODUCTION_ID_1), | ||
142 | omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff); | ||
143 | printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0)); | ||
144 | printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1)); | ||
145 | printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev); | ||
146 | #endif | ||
147 | |||
148 | system_serial_high = omap_readl(OMAP_DIE_ID_0); | ||
149 | system_serial_low = omap_readl(OMAP_DIE_ID_1); | ||
150 | |||
151 | /* First check only the major version in a safe way */ | ||
152 | for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { | ||
153 | if (jtag_id == (omap_ids[i].jtag_id)) { | ||
154 | system_rev = omap_ids[i].type; | ||
155 | break; | ||
156 | } | ||
157 | } | ||
158 | |||
159 | /* Check if we can find the die revision */ | ||
160 | for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { | ||
161 | if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) { | ||
162 | system_rev = omap_ids[i].type; | ||
163 | break; | ||
164 | } | ||
165 | } | ||
166 | |||
167 | /* Finally check also the omap_id */ | ||
168 | for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { | ||
169 | if (jtag_id == omap_ids[i].jtag_id | ||
170 | && die_rev == omap_ids[i].die_rev | ||
171 | && omap_id == omap_ids[i].omap_id) { | ||
172 | system_rev = omap_ids[i].type; | ||
173 | break; | ||
174 | } | ||
175 | } | ||
176 | |||
177 | /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */ | ||
178 | cpu_type = system_rev >> 24; | ||
179 | |||
180 | switch (cpu_type) { | ||
181 | case 0x07: | ||
182 | system_rev |= 0x07; | ||
183 | break; | ||
184 | case 0x15: | ||
185 | system_rev |= 0x15; | ||
186 | break; | ||
187 | case 0x16: | ||
188 | case 0x17: | ||
189 | system_rev |= 0x16; | ||
190 | break; | ||
191 | case 0x24: | ||
192 | system_rev |= 0x24; | ||
193 | break; | ||
194 | default: | ||
195 | printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type); | ||
196 | } | ||
197 | |||
198 | printk("OMAP%04x", system_rev >> 16); | ||
199 | if ((system_rev >> 8) & 0xff) | ||
200 | printk("%x", (system_rev >> 8) & 0xff); | ||
201 | printk(" revision %i handled as %02xxx id: %08x%08x\n", | ||
202 | die_rev, system_rev & 0xff, system_serial_low, | ||
203 | system_serial_high); | ||
204 | } | ||
205 | |||
206 | /* | ||
207 | * ---------------------------------------------------------------------------- | ||
208 | * OMAP I/O mapping | ||
209 | * | ||
210 | * The machine specific code may provide the extra mapping besides the | ||
211 | * default mapping provided here. | ||
212 | * ---------------------------------------------------------------------------- | ||
213 | */ | ||
214 | |||
215 | static struct map_desc omap_io_desc[] __initdata = { | ||
216 | { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, | ||
217 | }; | ||
218 | |||
219 | #ifdef CONFIG_ARCH_OMAP730 | ||
220 | static struct map_desc omap730_io_desc[] __initdata = { | ||
221 | { OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE }, | ||
222 | { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE }, | ||
223 | { OMAP730_SRAM_BASE, OMAP730_SRAM_START, OMAP730_SRAM_SIZE, MT_DEVICE } | ||
224 | }; | ||
225 | #endif | ||
226 | |||
227 | #ifdef CONFIG_ARCH_OMAP1510 | ||
228 | static struct map_desc omap1510_io_desc[] __initdata = { | ||
229 | { OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE }, | ||
230 | { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE }, | ||
231 | { OMAP1510_SRAM_BASE, OMAP1510_SRAM_START, OMAP1510_SRAM_SIZE, MT_DEVICE } | ||
232 | }; | ||
233 | #endif | ||
234 | |||
235 | #if defined(CONFIG_ARCH_OMAP16XX) | ||
236 | static struct map_desc omap1610_io_desc[] __initdata = { | ||
237 | { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE }, | ||
238 | { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE }, | ||
239 | { OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP1610_SRAM_SIZE, MT_DEVICE } | ||
240 | }; | ||
241 | |||
242 | static struct map_desc omap5912_io_desc[] __initdata = { | ||
243 | { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE }, | ||
244 | { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE }, | ||
245 | /* | ||
246 | * The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page | ||
247 | * size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped. | ||
248 | * Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte | ||
249 | * can be used. | ||
250 | */ | ||
251 | { OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP5912_SRAM_SIZE + 0x800, MT_DEVICE } | ||
252 | }; | ||
253 | #endif | ||
254 | |||
255 | static int initialized = 0; | ||
256 | |||
257 | static void __init _omap_map_io(void) | ||
258 | { | ||
259 | initialized = 1; | ||
260 | |||
261 | /* We have to initialize the IO space mapping before we can run | ||
262 | * cpu_is_omapxxx() macros. */ | ||
263 | iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc)); | ||
264 | omap_check_revision(); | ||
265 | |||
266 | #ifdef CONFIG_ARCH_OMAP730 | ||
267 | if (cpu_is_omap730()) { | ||
268 | iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); | ||
269 | } | ||
270 | #endif | ||
271 | #ifdef CONFIG_ARCH_OMAP1510 | ||
272 | if (cpu_is_omap1510()) { | ||
273 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); | ||
274 | } | ||
275 | #endif | ||
276 | #if defined(CONFIG_ARCH_OMAP16XX) | ||
277 | if (cpu_is_omap1610() || cpu_is_omap1710()) { | ||
278 | iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc)); | ||
279 | } | ||
280 | if (cpu_is_omap5912()) { | ||
281 | iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc)); | ||
282 | } | ||
283 | #endif | ||
284 | |||
285 | /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort | ||
286 | * on a Posted Write in the TIPB Bridge". | ||
287 | */ | ||
288 | omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL); | ||
289 | omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL); | ||
290 | |||
291 | /* Must init clocks early to assure that timer interrupt works | ||
292 | */ | ||
293 | clk_init(); | ||
294 | } | ||
295 | |||
296 | /* | ||
297 | * This should only get called from board specific init | ||
298 | */ | ||
299 | void omap_map_io(void) | ||
300 | { | ||
301 | if (!initialized) | ||
302 | _omap_map_io(); | ||
303 | } | ||
304 | |||
305 | static inline unsigned int omap_serial_in(struct plat_serial8250_port *up, | ||
306 | int offset) | ||
307 | { | ||
308 | offset <<= up->regshift; | ||
309 | return (unsigned int)__raw_readb(up->membase + offset); | ||
310 | } | ||
311 | |||
312 | static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset, | ||
313 | int value) | ||
314 | { | ||
315 | offset <<= p->regshift; | ||
316 | __raw_writeb(value, p->membase + offset); | ||
317 | } | ||
318 | |||
319 | /* | ||
320 | * Internal UARTs need to be initialized for the 8250 autoconfig to work | ||
321 | * properly. Note that the TX watermark initialization may not be needed | ||
322 | * once the 8250.c watermark handling code is merged. | ||
323 | */ | ||
324 | static void __init omap_serial_reset(struct plat_serial8250_port *p) | ||
325 | { | ||
326 | omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */ | ||
327 | omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ | ||
328 | omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ | ||
329 | |||
330 | if (!cpu_is_omap1510()) { | ||
331 | omap_serial_outp(p, UART_OMAP_SYSC, 0x01); | ||
332 | while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); | ||
333 | } | ||
334 | } | ||
335 | |||
336 | static struct plat_serial8250_port serial_platform_data[] = { | ||
337 | { | ||
338 | .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE), | ||
339 | .mapbase = (unsigned long)OMAP_UART1_BASE, | ||
340 | .irq = INT_UART1, | ||
341 | .flags = UPF_BOOT_AUTOCONF, | ||
342 | .iotype = UPIO_MEM, | ||
343 | .regshift = 2, | ||
344 | .uartclk = OMAP16XX_BASE_BAUD * 16, | ||
345 | }, | ||
346 | { | ||
347 | .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE), | ||
348 | .mapbase = (unsigned long)OMAP_UART2_BASE, | ||
349 | .irq = INT_UART2, | ||
350 | .flags = UPF_BOOT_AUTOCONF, | ||
351 | .iotype = UPIO_MEM, | ||
352 | .regshift = 2, | ||
353 | .uartclk = OMAP16XX_BASE_BAUD * 16, | ||
354 | }, | ||
355 | { | ||
356 | .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE), | ||
357 | .mapbase = (unsigned long)OMAP_UART3_BASE, | ||
358 | .irq = INT_UART3, | ||
359 | .flags = UPF_BOOT_AUTOCONF, | ||
360 | .iotype = UPIO_MEM, | ||
361 | .regshift = 2, | ||
362 | .uartclk = OMAP16XX_BASE_BAUD * 16, | ||
363 | }, | ||
364 | { }, | ||
365 | }; | ||
366 | |||
367 | static struct platform_device serial_device = { | ||
368 | .name = "serial8250", | ||
369 | .id = 0, | ||
370 | .dev = { | ||
371 | .platform_data = serial_platform_data, | ||
372 | }, | ||
373 | }; | ||
374 | |||
375 | /* | ||
376 | * Note that on Innovator-1510 UART2 pins conflict with USB2. | ||
377 | * By default UART2 does not work on Innovator-1510 if you have | ||
378 | * USB OHCI enabled. To use UART2, you must disable USB2 first. | ||
379 | */ | ||
380 | void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS]) | ||
381 | { | ||
382 | int i; | ||
383 | |||
384 | if (cpu_is_omap730()) { | ||
385 | serial_platform_data[0].regshift = 0; | ||
386 | serial_platform_data[1].regshift = 0; | ||
387 | serial_platform_data[0].irq = INT_730_UART_MODEM_1; | ||
388 | serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; | ||
389 | } | ||
390 | |||
391 | if (cpu_is_omap1510()) { | ||
392 | serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; | ||
393 | serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; | ||
394 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; | ||
395 | } | ||
396 | |||
397 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | ||
398 | unsigned char reg; | ||
399 | |||
400 | if (ports[i] == 0) { | ||
401 | serial_platform_data[i].membase = 0; | ||
402 | serial_platform_data[i].mapbase = 0; | ||
403 | continue; | ||
404 | } | ||
405 | |||
406 | switch (i) { | ||
407 | case 0: | ||
408 | if (cpu_is_omap1510()) { | ||
409 | omap_cfg_reg(UART1_TX); | ||
410 | omap_cfg_reg(UART1_RTS); | ||
411 | if (machine_is_omap_innovator()) { | ||
412 | reg = fpga_read(OMAP1510_FPGA_POWER); | ||
413 | reg |= OMAP1510_FPGA_PCR_COM1_EN; | ||
414 | fpga_write(reg, OMAP1510_FPGA_POWER); | ||
415 | udelay(10); | ||
416 | } | ||
417 | } | ||
418 | break; | ||
419 | case 1: | ||
420 | if (cpu_is_omap1510()) { | ||
421 | omap_cfg_reg(UART2_TX); | ||
422 | omap_cfg_reg(UART2_RTS); | ||
423 | if (machine_is_omap_innovator()) { | ||
424 | reg = fpga_read(OMAP1510_FPGA_POWER); | ||
425 | reg |= OMAP1510_FPGA_PCR_COM2_EN; | ||
426 | fpga_write(reg, OMAP1510_FPGA_POWER); | ||
427 | udelay(10); | ||
428 | } | ||
429 | } | ||
430 | break; | ||
431 | case 2: | ||
432 | if (cpu_is_omap1510()) { | ||
433 | omap_cfg_reg(UART3_TX); | ||
434 | omap_cfg_reg(UART3_RX); | ||
435 | } | ||
436 | if (cpu_is_omap1710()) { | ||
437 | clk_enable(clk_get(0, "uart3_ck")); | ||
438 | } | ||
439 | break; | ||
440 | } | ||
441 | omap_serial_reset(&serial_platform_data[i]); | ||
442 | } | ||
443 | } | ||
444 | |||
445 | static int __init omap_init(void) | ||
446 | { | ||
447 | return platform_device_register(&serial_device); | ||
448 | } | ||
449 | arch_initcall(omap_init); | ||
450 | |||
451 | #define NO_LENGTH_CHECK 0xffffffff | ||
452 | |||
453 | extern int omap_bootloader_tag_len; | ||
454 | extern u8 omap_bootloader_tag[]; | ||
455 | |||
456 | struct omap_board_config_kernel *omap_board_config; | ||
457 | int omap_board_config_size = 0; | ||
458 | |||
459 | static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out) | ||
460 | { | ||
461 | struct omap_board_config_kernel *kinfo = NULL; | ||
462 | int i; | ||
463 | |||
464 | #ifdef CONFIG_OMAP_BOOT_TAG | ||
465 | struct omap_board_config_entry *info = NULL; | ||
466 | |||
467 | if (omap_bootloader_tag_len > 4) | ||
468 | info = (struct omap_board_config_entry *) omap_bootloader_tag; | ||
469 | while (info != NULL) { | ||
470 | u8 *next; | ||
471 | |||
472 | if (info->tag == tag) { | ||
473 | if (skip == 0) | ||
474 | break; | ||
475 | skip--; | ||
476 | } | ||
477 | |||
478 | if ((info->len & 0x03) != 0) { | ||
479 | /* We bail out to avoid an alignment fault */ | ||
480 | printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n", | ||
481 | info->len, info->tag); | ||
482 | return NULL; | ||
483 | } | ||
484 | next = (u8 *) info + sizeof(*info) + info->len; | ||
485 | if (next >= omap_bootloader_tag + omap_bootloader_tag_len) | ||
486 | info = NULL; | ||
487 | else | ||
488 | info = (struct omap_board_config_entry *) next; | ||
489 | } | ||
490 | if (info != NULL) { | ||
491 | /* Check the length as a lame attempt to check for | ||
492 | * binary inconsistancy. */ | ||
493 | if (len != NO_LENGTH_CHECK) { | ||
494 | /* Word-align len */ | ||
495 | if (len & 0x03) | ||
496 | len = (len + 3) & ~0x03; | ||
497 | if (info->len != len) { | ||
498 | printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n", | ||
499 | tag, len, info->len); | ||
500 | return NULL; | ||
501 | } | ||
502 | } | ||
503 | if (len_out != NULL) | ||
504 | *len_out = info->len; | ||
505 | return info->data; | ||
506 | } | ||
507 | #endif | ||
508 | /* Try to find the config from the board-specific structures | ||
509 | * in the kernel. */ | ||
510 | for (i = 0; i < omap_board_config_size; i++) { | ||
511 | if (omap_board_config[i].tag == tag) { | ||
512 | kinfo = &omap_board_config[i]; | ||
513 | break; | ||
514 | } | ||
515 | } | ||
516 | if (kinfo == NULL) | ||
517 | return NULL; | ||
518 | return kinfo->data; | ||
519 | } | ||
520 | |||
521 | const void *__omap_get_config(u16 tag, size_t len, int nr) | ||
522 | { | ||
523 | return get_config(tag, len, nr, NULL); | ||
524 | } | ||
525 | EXPORT_SYMBOL(__omap_get_config); | ||
526 | |||
527 | const void *omap_get_var_config(u16 tag, size_t *len) | ||
528 | { | ||
529 | return get_config(tag, NO_LENGTH_CHECK, 0, len); | ||
530 | } | ||
531 | EXPORT_SYMBOL(omap_get_var_config); | ||
532 | |||
533 | static int __init omap_add_serial_console(void) | ||
534 | { | ||
535 | const struct omap_uart_config *info; | ||
536 | |||
537 | info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); | ||
538 | if (info != NULL && info->console_uart) { | ||
539 | static char speed[11], *opt = NULL; | ||
540 | |||
541 | if (info->console_speed) { | ||
542 | snprintf(speed, sizeof(speed), "%u", info->console_speed); | ||
543 | opt = speed; | ||
544 | } | ||
545 | return add_preferred_console("ttyS", info->console_uart - 1, opt); | ||
546 | } | ||
547 | return 0; | ||
548 | } | ||
549 | console_initcall(omap_add_serial_console); | ||
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig new file mode 100644 index 000000000000..7408ac94f771 --- /dev/null +++ b/arch/arm/mach-omap1/Kconfig | |||
@@ -0,0 +1,144 @@ | |||
1 | comment "OMAP Core Type" | ||
2 | depends on ARCH_OMAP1 | ||
3 | |||
4 | config ARCH_OMAP730 | ||
5 | depends on ARCH_OMAP1 | ||
6 | bool "OMAP730 Based System" | ||
7 | select ARCH_OMAP_OTG | ||
8 | |||
9 | config ARCH_OMAP1510 | ||
10 | depends on ARCH_OMAP1 | ||
11 | default y | ||
12 | bool "OMAP1510 Based System" | ||
13 | |||
14 | config ARCH_OMAP16XX | ||
15 | depends on ARCH_OMAP1 | ||
16 | bool "OMAP16xx Based System" | ||
17 | select ARCH_OMAP_OTG | ||
18 | |||
19 | comment "OMAP Board Type" | ||
20 | depends on ARCH_OMAP1 | ||
21 | |||
22 | config MACH_OMAP_INNOVATOR | ||
23 | bool "TI Innovator" | ||
24 | depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX) | ||
25 | help | ||
26 | TI OMAP 1510 or 1610 Innovator board support. Say Y here if you | ||
27 | have such a board. | ||
28 | |||
29 | config MACH_OMAP_H2 | ||
30 | bool "TI H2 Support" | ||
31 | depends on ARCH_OMAP1 && ARCH_OMAP16XX | ||
32 | help | ||
33 | TI OMAP 1610/1611B H2 board support. Say Y here if you have such | ||
34 | a board. | ||
35 | |||
36 | config MACH_OMAP_H3 | ||
37 | bool "TI H3 Support" | ||
38 | depends on ARCH_OMAP1 && ARCH_OMAP16XX | ||
39 | help | ||
40 | TI OMAP 1710 H3 board support. Say Y here if you have such | ||
41 | a board. | ||
42 | |||
43 | config MACH_OMAP_OSK | ||
44 | bool "TI OSK Support" | ||
45 | depends on ARCH_OMAP1 && ARCH_OMAP16XX | ||
46 | help | ||
47 | TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here | ||
48 | if you have such a board. | ||
49 | |||
50 | config MACH_OMAP_PERSEUS2 | ||
51 | bool "TI Perseus2" | ||
52 | depends on ARCH_OMAP1 && ARCH_OMAP730 | ||
53 | help | ||
54 | Support for TI OMAP 730 Perseus2 board. Say Y here if you have such | ||
55 | a board. | ||
56 | |||
57 | config MACH_VOICEBLUE | ||
58 | bool "Voiceblue" | ||
59 | depends on ARCH_OMAP1 && ARCH_OMAP1510 | ||
60 | help | ||
61 | Support for Voiceblue GSM/VoIP gateway. Say Y here if you have | ||
62 | such a board. | ||
63 | |||
64 | config MACH_NETSTAR | ||
65 | bool "NetStar" | ||
66 | depends on ARCH_OMAP1 && ARCH_OMAP1510 | ||
67 | help | ||
68 | Support for NetStar PBX. Say Y here if you have such a board. | ||
69 | |||
70 | config MACH_OMAP_GENERIC | ||
71 | bool "Generic OMAP board" | ||
72 | depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX) | ||
73 | help | ||
74 | Support for generic OMAP-1510, 1610 or 1710 board with | ||
75 | no FPGA. Can be used as template for porting Linux to | ||
76 | custom OMAP boards. Say Y here if you have a custom | ||
77 | board. | ||
78 | |||
79 | comment "OMAP CPU Speed" | ||
80 | depends on ARCH_OMAP1 | ||
81 | |||
82 | config OMAP_CLOCKS_SET_BY_BOOTLOADER | ||
83 | bool "OMAP clocks set by bootloader" | ||
84 | depends on ARCH_OMAP1 | ||
85 | help | ||
86 | Enable this option to prevent the kernel from overriding the clock | ||
87 | frequencies programmed by bootloader for MPU, DSP, MMUs, TC, | ||
88 | internal LCD controller and MPU peripherals. | ||
89 | |||
90 | config OMAP_ARM_216MHZ | ||
91 | bool "OMAP ARM 216 MHz CPU (1710 only)" | ||
92 | depends on ARCH_OMAP1 && ARCH_OMAP16XX | ||
93 | help | ||
94 | Enable 216 MHz clock for OMAP1710 CPU. If unsure, say N. | ||
95 | |||
96 | config OMAP_ARM_195MHZ | ||
97 | bool "OMAP ARM 195 MHz CPU" | ||
98 | depends on ARCH_OMAP1 && ARCH_OMAP730 | ||
99 | help | ||
100 | Enable 195MHz clock for OMAP CPU. If unsure, say N. | ||
101 | |||
102 | config OMAP_ARM_192MHZ | ||
103 | bool "OMAP ARM 192 MHz CPU" | ||
104 | depends on ARCH_OMAP1 && ARCH_OMAP16XX | ||
105 | help | ||
106 | Enable 192MHz clock for OMAP CPU. If unsure, say N. | ||
107 | |||
108 | config OMAP_ARM_182MHZ | ||
109 | bool "OMAP ARM 182 MHz CPU" | ||
110 | depends on ARCH_OMAP1 && ARCH_OMAP730 | ||
111 | help | ||
112 | Enable 182MHz clock for OMAP CPU. If unsure, say N. | ||
113 | |||
114 | config OMAP_ARM_168MHZ | ||
115 | bool "OMAP ARM 168 MHz CPU" | ||
116 | depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730) | ||
117 | help | ||
118 | Enable 168MHz clock for OMAP CPU. If unsure, say N. | ||
119 | |||
120 | config OMAP_ARM_150MHZ | ||
121 | bool "OMAP ARM 150 MHz CPU" | ||
122 | depends on ARCH_OMAP1 && ARCH_OMAP1510 | ||
123 | help | ||
124 | Enable 150MHz clock for OMAP CPU. If unsure, say N. | ||
125 | |||
126 | config OMAP_ARM_120MHZ | ||
127 | bool "OMAP ARM 120 MHz CPU" | ||
128 | depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730) | ||
129 | help | ||
130 | Enable 120MHz clock for OMAP CPU. If unsure, say N. | ||
131 | |||
132 | config OMAP_ARM_60MHZ | ||
133 | bool "OMAP ARM 60 MHz CPU" | ||
134 | depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730) | ||
135 | default y | ||
136 | help | ||
137 | Enable 60MHz clock for OMAP CPU. If unsure, say Y. | ||
138 | |||
139 | config OMAP_ARM_30MHZ | ||
140 | bool "OMAP ARM 30 MHz CPU" | ||
141 | depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730) | ||
142 | help | ||
143 | Enable 30MHz clock for OMAP CPU. If unsure, say N. | ||
144 | |||
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile new file mode 100644 index 000000000000..d386fd913f0c --- /dev/null +++ b/arch/arm/mach-omap1/Makefile | |||
@@ -0,0 +1,30 @@ | |||
1 | # | ||
2 | # Makefile for the linux kernel. | ||
3 | # | ||
4 | |||
5 | # Common support | ||
6 | obj-y := io.o id.o irq.o time.o serial.o | ||
7 | led-y := leds.o | ||
8 | |||
9 | # Specific board support | ||
10 | obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o | ||
11 | obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o | ||
12 | obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o | ||
13 | obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o | ||
14 | obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o | ||
15 | obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o | ||
16 | obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o | ||
17 | obj-$(CONFIG_MACH_NETSTAR) += board-netstar.o | ||
18 | |||
19 | ifeq ($(CONFIG_ARCH_OMAP1510),y) | ||
20 | # Innovator-1510 FPGA | ||
21 | obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o | ||
22 | endif | ||
23 | |||
24 | # LEDs support | ||
25 | led-$(CONFIG_MACH_OMAP_H2) += leds-h2p2-debug.o | ||
26 | led-$(CONFIG_MACH_OMAP_INNOVATOR) += leds-innovator.o | ||
27 | led-$(CONFIG_MACH_OMAP_PERSEUS2) += leds-h2p2-debug.o | ||
28 | led-$(CONFIG_MACH_OMAP_OSK) += leds-osk.o | ||
29 | obj-$(CONFIG_LEDS) += $(led-y) | ||
30 | |||
diff --git a/arch/arm/mach-omap/Makefile.boot b/arch/arm/mach-omap1/Makefile.boot index fee1a6a15b54..292d56c5a888 100644 --- a/arch/arm/mach-omap/Makefile.boot +++ b/arch/arm/mach-omap1/Makefile.boot | |||
@@ -1,4 +1,3 @@ | |||
1 | zreladdr-y := 0x10008000 | 1 | zreladdr-y := 0x10008000 |
2 | params_phys-y := 0x10000100 | 2 | params_phys-y := 0x10000100 |
3 | initrd_phys-y := 0x10800000 | 3 | initrd_phys-y := 0x10800000 |
4 | |||
diff --git a/arch/arm/mach-omap/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 384bc7cec1db..122796ebe8f5 100644 --- a/arch/arm/mach-omap/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/board-generic.c | 2 | * linux/arch/arm/mach-omap1/board-generic.c |
3 | * | 3 | * |
4 | * Modified from board-innovator1510.c | 4 | * Modified from board-innovator1510.c |
5 | * | 5 | * |
@@ -26,8 +26,7 @@ | |||
26 | #include <asm/arch/mux.h> | 26 | #include <asm/arch/mux.h> |
27 | #include <asm/arch/usb.h> | 27 | #include <asm/arch/usb.h> |
28 | #include <asm/arch/board.h> | 28 | #include <asm/arch/board.h> |
29 | 29 | #include <asm/arch/common.h> | |
30 | #include "common.h" | ||
31 | 30 | ||
32 | static int __initdata generic_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1}; | 31 | static int __initdata generic_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1}; |
33 | 32 | ||
@@ -84,7 +83,7 @@ static void __init omap_generic_init(void) | |||
84 | 83 | ||
85 | static void __init omap_generic_map_io(void) | 84 | static void __init omap_generic_map_io(void) |
86 | { | 85 | { |
87 | omap_map_io(); | 86 | omap_map_common_io() |
88 | } | 87 | } |
89 | 88 | ||
90 | MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") | 89 | MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") |
diff --git a/arch/arm/mach-omap/board-h2.c b/arch/arm/mach-omap1/board-h2.c index f37c76a9b163..f4983ee95ab4 100644 --- a/arch/arm/mach-omap/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/board-h2.c | 2 | * linux/arch/arm/mach-omap1/board-h2.c |
3 | * | 3 | * |
4 | * Board specific inits for OMAP-1610 H2 | 4 | * Board specific inits for OMAP-1610 H2 |
5 | * | 5 | * |
@@ -35,8 +35,7 @@ | |||
35 | #include <asm/arch/gpio.h> | 35 | #include <asm/arch/gpio.h> |
36 | #include <asm/arch/tc.h> | 36 | #include <asm/arch/tc.h> |
37 | #include <asm/arch/usb.h> | 37 | #include <asm/arch/usb.h> |
38 | 38 | #include <asm/arch/common.h> | |
39 | #include "common.h" | ||
40 | 39 | ||
41 | extern int omap_gpio_init(void); | 40 | extern int omap_gpio_init(void); |
42 | 41 | ||
@@ -172,7 +171,7 @@ static void __init h2_init(void) | |||
172 | 171 | ||
173 | static void __init h2_map_io(void) | 172 | static void __init h2_map_io(void) |
174 | { | 173 | { |
175 | omap_map_io(); | 174 | omap_map_common_io(); |
176 | omap_serial_init(h2_serial_ports); | 175 | omap_serial_init(h2_serial_ports); |
177 | } | 176 | } |
178 | 177 | ||
diff --git a/arch/arm/mach-omap/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 705e48594e9a..7cd419d61b40 100644 --- a/arch/arm/mach-omap/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/board-h3.c | 2 | * linux/arch/arm/mach-omap1/board-h3.c |
3 | * | 3 | * |
4 | * This file contains OMAP1710 H3 specific code. | 4 | * This file contains OMAP1710 H3 specific code. |
5 | * | 5 | * |
@@ -37,8 +37,7 @@ | |||
37 | #include <asm/arch/mux.h> | 37 | #include <asm/arch/mux.h> |
38 | #include <asm/arch/tc.h> | 38 | #include <asm/arch/tc.h> |
39 | #include <asm/arch/usb.h> | 39 | #include <asm/arch/usb.h> |
40 | 40 | #include <asm/arch/common.h> | |
41 | #include "common.h" | ||
42 | 41 | ||
43 | extern int omap_gpio_init(void); | 42 | extern int omap_gpio_init(void); |
44 | 43 | ||
@@ -190,7 +189,7 @@ void h3_init_irq(void) | |||
190 | 189 | ||
191 | static void __init h3_map_io(void) | 190 | static void __init h3_map_io(void) |
192 | { | 191 | { |
193 | omap_map_io(); | 192 | omap_map_common_io(); |
194 | omap_serial_init(h3_serial_ports); | 193 | omap_serial_init(h3_serial_ports); |
195 | } | 194 | } |
196 | 195 | ||
diff --git a/arch/arm/mach-omap/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 523363f18cc0..91de60a91ef8 100644 --- a/arch/arm/mach-omap/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/board-innovator.c | 2 | * linux/arch/arm/mach-omap1/board-innovator.c |
3 | * | 3 | * |
4 | * Board specific inits for OMAP-1510 and OMAP-1610 Innovator | 4 | * Board specific inits for OMAP-1510 and OMAP-1610 Innovator |
5 | * | 5 | * |
@@ -33,8 +33,7 @@ | |||
33 | #include <asm/arch/gpio.h> | 33 | #include <asm/arch/gpio.h> |
34 | #include <asm/arch/tc.h> | 34 | #include <asm/arch/tc.h> |
35 | #include <asm/arch/usb.h> | 35 | #include <asm/arch/usb.h> |
36 | 36 | #include <asm/arch/common.h> | |
37 | #include "common.h" | ||
38 | 37 | ||
39 | static int __initdata innovator_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1}; | 38 | static int __initdata innovator_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1}; |
40 | 39 | ||
@@ -252,7 +251,7 @@ static void __init innovator_init(void) | |||
252 | 251 | ||
253 | static void __init innovator_map_io(void) | 252 | static void __init innovator_map_io(void) |
254 | { | 253 | { |
255 | omap_map_io(); | 254 | omap_map_common_io(); |
256 | 255 | ||
257 | #ifdef CONFIG_ARCH_OMAP1510 | 256 | #ifdef CONFIG_ARCH_OMAP1510 |
258 | if (cpu_is_omap1510()) { | 257 | if (cpu_is_omap1510()) { |
diff --git a/arch/arm/mach-omap/board-netstar.c b/arch/arm/mach-omap1/board-netstar.c index 8c653734d5a3..6750b2014092 100644 --- a/arch/arm/mach-omap/board-netstar.c +++ b/arch/arm/mach-omap1/board-netstar.c | |||
@@ -26,8 +26,7 @@ | |||
26 | #include <asm/arch/gpio.h> | 26 | #include <asm/arch/gpio.h> |
27 | #include <asm/arch/mux.h> | 27 | #include <asm/arch/mux.h> |
28 | #include <asm/arch/usb.h> | 28 | #include <asm/arch/usb.h> |
29 | 29 | #include <asm/arch/common.h> | |
30 | #include "common.h" | ||
31 | 30 | ||
32 | extern void __init omap_init_time(void); | 31 | extern void __init omap_init_time(void); |
33 | extern int omap_gpio_init(void); | 32 | extern int omap_gpio_init(void); |
@@ -100,7 +99,7 @@ static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1}; | |||
100 | 99 | ||
101 | static void __init netstar_map_io(void) | 100 | static void __init netstar_map_io(void) |
102 | { | 101 | { |
103 | omap_map_io(); | 102 | omap_map_common_io(); |
104 | omap_serial_init(omap_serial_ports); | 103 | omap_serial_init(omap_serial_ports); |
105 | } | 104 | } |
106 | 105 | ||
diff --git a/arch/arm/mach-omap/board-osk.c b/arch/arm/mach-omap1/board-osk.c index cb433436aa08..6844e536c698 100644 --- a/arch/arm/mach-omap/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/board-osk.c | 2 | * linux/arch/arm/mach-omap1/board-osk.c |
3 | * | 3 | * |
4 | * Board specific init for OMAP5912 OSK | 4 | * Board specific init for OMAP5912 OSK |
5 | * | 5 | * |
@@ -39,8 +39,7 @@ | |||
39 | #include <asm/arch/usb.h> | 39 | #include <asm/arch/usb.h> |
40 | #include <asm/arch/mux.h> | 40 | #include <asm/arch/mux.h> |
41 | #include <asm/arch/tc.h> | 41 | #include <asm/arch/tc.h> |
42 | 42 | #include <asm/arch/common.h> | |
43 | #include "common.h" | ||
44 | 43 | ||
45 | static struct map_desc osk5912_io_desc[] __initdata = { | 44 | static struct map_desc osk5912_io_desc[] __initdata = { |
46 | { OMAP_OSK_NOR_FLASH_BASE, OMAP_OSK_NOR_FLASH_START, OMAP_OSK_NOR_FLASH_SIZE, | 45 | { OMAP_OSK_NOR_FLASH_BASE, OMAP_OSK_NOR_FLASH_START, OMAP_OSK_NOR_FLASH_SIZE, |
@@ -153,7 +152,7 @@ static void __init osk_init(void) | |||
153 | 152 | ||
154 | static void __init osk_map_io(void) | 153 | static void __init osk_map_io(void) |
155 | { | 154 | { |
156 | omap_map_io(); | 155 | omap_map_common_io(); |
157 | iotable_init(osk5912_io_desc, ARRAY_SIZE(osk5912_io_desc)); | 156 | iotable_init(osk5912_io_desc, ARRAY_SIZE(osk5912_io_desc)); |
158 | omap_serial_init(osk_serial_ports); | 157 | omap_serial_init(osk_serial_ports); |
159 | } | 158 | } |
diff --git a/arch/arm/mach-omap/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index d5342043d48f..213317392d9b 100644 --- a/arch/arm/mach-omap/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/board-perseus2.c | 2 | * linux/arch/arm/mach-omap1/board-perseus2.c |
3 | * | 3 | * |
4 | * Modified from board-generic.c | 4 | * Modified from board-generic.c |
5 | * | 5 | * |
@@ -27,8 +27,7 @@ | |||
27 | #include <asm/arch/gpio.h> | 27 | #include <asm/arch/gpio.h> |
28 | #include <asm/arch/mux.h> | 28 | #include <asm/arch/mux.h> |
29 | #include <asm/arch/fpga.h> | 29 | #include <asm/arch/fpga.h> |
30 | 30 | #include <asm/arch/common.h> | |
31 | #include "common.h" | ||
32 | 31 | ||
33 | static struct resource smc91x_resources[] = { | 32 | static struct resource smc91x_resources[] = { |
34 | [0] = { | 33 | [0] = { |
@@ -140,7 +139,7 @@ static struct map_desc omap_perseus2_io_desc[] __initdata = { | |||
140 | 139 | ||
141 | static void __init omap_perseus2_map_io(void) | 140 | static void __init omap_perseus2_map_io(void) |
142 | { | 141 | { |
143 | omap_map_io(); | 142 | omap_map_common_io(); |
144 | iotable_init(omap_perseus2_io_desc, | 143 | iotable_init(omap_perseus2_io_desc, |
145 | ARRAY_SIZE(omap_perseus2_io_desc)); | 144 | ARRAY_SIZE(omap_perseus2_io_desc)); |
146 | 145 | ||
diff --git a/arch/arm/mach-omap/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 6b0c5003d719..e42281988990 100644 --- a/arch/arm/mach-omap/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/board-voiceblue.c | 2 | * linux/arch/arm/mach-omap1/board-voiceblue.c |
3 | * | 3 | * |
4 | * Modified from board-generic.c | 4 | * Modified from board-generic.c |
5 | * | 5 | * |
@@ -31,8 +31,7 @@ | |||
31 | #include <asm/arch/tc.h> | 31 | #include <asm/arch/tc.h> |
32 | #include <asm/arch/mux.h> | 32 | #include <asm/arch/mux.h> |
33 | #include <asm/arch/usb.h> | 33 | #include <asm/arch/usb.h> |
34 | 34 | #include <asm/arch/common.h> | |
35 | #include "common.h" | ||
36 | 35 | ||
37 | extern void omap_init_time(void); | 36 | extern void omap_init_time(void); |
38 | extern int omap_gpio_init(void); | 37 | extern int omap_gpio_init(void); |
@@ -170,7 +169,7 @@ static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1}; | |||
170 | 169 | ||
171 | static void __init voiceblue_map_io(void) | 170 | static void __init voiceblue_map_io(void) |
172 | { | 171 | { |
173 | omap_map_io(); | 172 | omap_map_common_io(); |
174 | omap_serial_init(omap_serial_ports); | 173 | omap_serial_init(omap_serial_ports); |
175 | } | 174 | } |
176 | 175 | ||
diff --git a/arch/arm/mach-omap/fpga.c b/arch/arm/mach-omap1/fpga.c index 7c08f6c2e1d0..7c08f6c2e1d0 100644 --- a/arch/arm/mach-omap/fpga.c +++ b/arch/arm/mach-omap1/fpga.c | |||
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c new file mode 100644 index 000000000000..986c3b7e09bb --- /dev/null +++ b/arch/arm/mach-omap1/id.c | |||
@@ -0,0 +1,188 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-omap1/id.c | ||
3 | * | ||
4 | * OMAP1 CPU identification code | ||
5 | * | ||
6 | * Copyright (C) 2004 Nokia Corporation | ||
7 | * Written by Tony Lindgren <tony@atomide.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/config.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/init.h> | ||
18 | |||
19 | #include <asm/io.h> | ||
20 | |||
21 | struct omap_id { | ||
22 | u16 jtag_id; /* Used to determine OMAP type */ | ||
23 | u8 die_rev; /* Processor revision */ | ||
24 | u32 omap_id; /* OMAP revision */ | ||
25 | u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */ | ||
26 | }; | ||
27 | |||
28 | /* Register values to detect the OMAP version */ | ||
29 | static struct omap_id omap_ids[] __initdata = { | ||
30 | { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100}, | ||
31 | { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300}, | ||
32 | { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000}, | ||
33 | { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000}, | ||
34 | { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000}, | ||
35 | { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00}, | ||
36 | { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00}, | ||
37 | { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00}, | ||
38 | { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00}, | ||
39 | { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000}, | ||
40 | { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00}, | ||
41 | { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00}, | ||
42 | { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300}, | ||
43 | { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300}, | ||
44 | { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300}, | ||
45 | { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000}, | ||
46 | { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000}, | ||
47 | { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000}, | ||
48 | }; | ||
49 | |||
50 | /* | ||
51 | * Get OMAP type from PROD_ID. | ||
52 | * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM. | ||
53 | * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense. | ||
54 | * Undocumented register in TEST BLOCK is used as fallback; This seems to | ||
55 | * work on 1510, 1610 & 1710. The official way hopefully will work in future | ||
56 | * processors. | ||
57 | */ | ||
58 | static u16 __init omap_get_jtag_id(void) | ||
59 | { | ||
60 | u32 prod_id, omap_id; | ||
61 | |||
62 | prod_id = omap_readl(OMAP_PRODUCTION_ID_1); | ||
63 | omap_id = omap_readl(OMAP32_ID_1); | ||
64 | |||
65 | /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */ | ||
66 | if (((prod_id >> 20) == 0) || (prod_id == omap_id)) | ||
67 | prod_id = 0; | ||
68 | else | ||
69 | prod_id &= 0xffff; | ||
70 | |||
71 | if (prod_id) | ||
72 | return prod_id; | ||
73 | |||
74 | /* Use OMAP32_ID_1 as fallback */ | ||
75 | prod_id = ((omap_id >> 12) & 0xffff); | ||
76 | |||
77 | return prod_id; | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * Get OMAP revision from DIE_REV. | ||
82 | * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID. | ||
83 | * Undocumented register in the TEST BLOCK is used as fallback. | ||
84 | * REVISIT: This does not seem to work on 1510 | ||
85 | */ | ||
86 | static u8 __init omap_get_die_rev(void) | ||
87 | { | ||
88 | u32 die_rev; | ||
89 | |||
90 | die_rev = omap_readl(OMAP_DIE_ID_1); | ||
91 | |||
92 | /* Check for broken OMAP_DIE_ID on early 1710 */ | ||
93 | if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id()) | ||
94 | die_rev = 0; | ||
95 | |||
96 | die_rev = (die_rev >> 17) & 0xf; | ||
97 | if (die_rev) | ||
98 | return die_rev; | ||
99 | |||
100 | die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf; | ||
101 | |||
102 | return die_rev; | ||
103 | } | ||
104 | |||
105 | void __init omap_check_revision(void) | ||
106 | { | ||
107 | int i; | ||
108 | u16 jtag_id; | ||
109 | u8 die_rev; | ||
110 | u32 omap_id; | ||
111 | u8 cpu_type; | ||
112 | |||
113 | jtag_id = omap_get_jtag_id(); | ||
114 | die_rev = omap_get_die_rev(); | ||
115 | omap_id = omap_readl(OMAP32_ID_0); | ||
116 | |||
117 | #ifdef DEBUG | ||
118 | printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0)); | ||
119 | printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n", | ||
120 | omap_readl(OMAP_DIE_ID_1), | ||
121 | (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf); | ||
122 | printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0)); | ||
123 | printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n", | ||
124 | omap_readl(OMAP_PRODUCTION_ID_1), | ||
125 | omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff); | ||
126 | printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0)); | ||
127 | printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1)); | ||
128 | printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev); | ||
129 | #endif | ||
130 | |||
131 | system_serial_high = omap_readl(OMAP_DIE_ID_0); | ||
132 | system_serial_low = omap_readl(OMAP_DIE_ID_1); | ||
133 | |||
134 | /* First check only the major version in a safe way */ | ||
135 | for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { | ||
136 | if (jtag_id == (omap_ids[i].jtag_id)) { | ||
137 | system_rev = omap_ids[i].type; | ||
138 | break; | ||
139 | } | ||
140 | } | ||
141 | |||
142 | /* Check if we can find the die revision */ | ||
143 | for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { | ||
144 | if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) { | ||
145 | system_rev = omap_ids[i].type; | ||
146 | break; | ||
147 | } | ||
148 | } | ||
149 | |||
150 | /* Finally check also the omap_id */ | ||
151 | for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { | ||
152 | if (jtag_id == omap_ids[i].jtag_id | ||
153 | && die_rev == omap_ids[i].die_rev | ||
154 | && omap_id == omap_ids[i].omap_id) { | ||
155 | system_rev = omap_ids[i].type; | ||
156 | break; | ||
157 | } | ||
158 | } | ||
159 | |||
160 | /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */ | ||
161 | cpu_type = system_rev >> 24; | ||
162 | |||
163 | switch (cpu_type) { | ||
164 | case 0x07: | ||
165 | system_rev |= 0x07; | ||
166 | break; | ||
167 | case 0x15: | ||
168 | system_rev |= 0x15; | ||
169 | break; | ||
170 | case 0x16: | ||
171 | case 0x17: | ||
172 | system_rev |= 0x16; | ||
173 | break; | ||
174 | case 0x24: | ||
175 | system_rev |= 0x24; | ||
176 | break; | ||
177 | default: | ||
178 | printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type); | ||
179 | } | ||
180 | |||
181 | printk("OMAP%04x", system_rev >> 16); | ||
182 | if ((system_rev >> 8) & 0xff) | ||
183 | printk("%x", (system_rev >> 8) & 0xff); | ||
184 | printk(" revision %i handled as %02xxx id: %08x%08x\n", | ||
185 | die_rev, system_rev & 0xff, system_serial_low, | ||
186 | system_serial_high); | ||
187 | } | ||
188 | |||
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c new file mode 100644 index 000000000000..207df0fe934d --- /dev/null +++ b/arch/arm/mach-omap1/io.c | |||
@@ -0,0 +1,115 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-omap1/io.c | ||
3 | * | ||
4 | * OMAP1 I/O mapping code | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/config.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | |||
16 | #include <asm/mach/map.h> | ||
17 | #include <asm/io.h> | ||
18 | #include <asm/arch/tc.h> | ||
19 | |||
20 | extern int clk_init(void); | ||
21 | extern void omap_check_revision(void); | ||
22 | |||
23 | /* | ||
24 | * The machine specific code may provide the extra mapping besides the | ||
25 | * default mapping provided here. | ||
26 | */ | ||
27 | static struct map_desc omap_io_desc[] __initdata = { | ||
28 | { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, | ||
29 | }; | ||
30 | |||
31 | #ifdef CONFIG_ARCH_OMAP730 | ||
32 | static struct map_desc omap730_io_desc[] __initdata = { | ||
33 | { OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE }, | ||
34 | { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE }, | ||
35 | { OMAP730_SRAM_BASE, OMAP730_SRAM_START, OMAP730_SRAM_SIZE, MT_DEVICE } | ||
36 | }; | ||
37 | #endif | ||
38 | |||
39 | #ifdef CONFIG_ARCH_OMAP1510 | ||
40 | static struct map_desc omap1510_io_desc[] __initdata = { | ||
41 | { OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE }, | ||
42 | { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE }, | ||
43 | { OMAP1510_SRAM_BASE, OMAP1510_SRAM_START, OMAP1510_SRAM_SIZE, MT_DEVICE } | ||
44 | }; | ||
45 | #endif | ||
46 | |||
47 | #if defined(CONFIG_ARCH_OMAP16XX) | ||
48 | static struct map_desc omap1610_io_desc[] __initdata = { | ||
49 | { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE }, | ||
50 | { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE }, | ||
51 | { OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP1610_SRAM_SIZE, MT_DEVICE } | ||
52 | }; | ||
53 | |||
54 | static struct map_desc omap5912_io_desc[] __initdata = { | ||
55 | { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE }, | ||
56 | { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE }, | ||
57 | /* | ||
58 | * The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page | ||
59 | * size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped. | ||
60 | * Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte | ||
61 | * can be used. | ||
62 | */ | ||
63 | { OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP5912_SRAM_SIZE + 0x800, MT_DEVICE } | ||
64 | }; | ||
65 | #endif | ||
66 | |||
67 | static int initialized = 0; | ||
68 | |||
69 | static void __init _omap_map_io(void) | ||
70 | { | ||
71 | initialized = 1; | ||
72 | |||
73 | /* We have to initialize the IO space mapping before we can run | ||
74 | * cpu_is_omapxxx() macros. */ | ||
75 | iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc)); | ||
76 | omap_check_revision(); | ||
77 | |||
78 | #ifdef CONFIG_ARCH_OMAP730 | ||
79 | if (cpu_is_omap730()) { | ||
80 | iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); | ||
81 | } | ||
82 | #endif | ||
83 | #ifdef CONFIG_ARCH_OMAP1510 | ||
84 | if (cpu_is_omap1510()) { | ||
85 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); | ||
86 | } | ||
87 | #endif | ||
88 | #if defined(CONFIG_ARCH_OMAP16XX) | ||
89 | if (cpu_is_omap1610() || cpu_is_omap1710()) { | ||
90 | iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc)); | ||
91 | } | ||
92 | if (cpu_is_omap5912()) { | ||
93 | iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc)); | ||
94 | } | ||
95 | #endif | ||
96 | |||
97 | /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort | ||
98 | * on a Posted Write in the TIPB Bridge". | ||
99 | */ | ||
100 | omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL); | ||
101 | omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL); | ||
102 | |||
103 | /* Must init clocks early to assure that timer interrupt works | ||
104 | */ | ||
105 | clk_init(); | ||
106 | } | ||
107 | |||
108 | /* | ||
109 | * This should only get called from board specific init | ||
110 | */ | ||
111 | void omap_map_common_io(void) | ||
112 | { | ||
113 | if (!initialized) | ||
114 | _omap_map_io(); | ||
115 | } | ||
diff --git a/arch/arm/mach-omap/irq.c b/arch/arm/mach-omap1/irq.c index f01c99266a86..a11b6d807352 100644 --- a/arch/arm/mach-omap/irq.c +++ b/arch/arm/mach-omap1/irq.c | |||
@@ -56,6 +56,7 @@ | |||
56 | struct omap_irq_bank { | 56 | struct omap_irq_bank { |
57 | unsigned long base_reg; | 57 | unsigned long base_reg; |
58 | unsigned long trigger_map; | 58 | unsigned long trigger_map; |
59 | unsigned long wake_enable; | ||
59 | }; | 60 | }; |
60 | 61 | ||
61 | static unsigned int irq_bank_count = 0; | 62 | static unsigned int irq_bank_count = 0; |
@@ -105,6 +106,19 @@ static void omap_mask_ack_irq(unsigned int irq) | |||
105 | omap_ack_irq(irq); | 106 | omap_ack_irq(irq); |
106 | } | 107 | } |
107 | 108 | ||
109 | static int omap_wake_irq(unsigned int irq, unsigned int enable) | ||
110 | { | ||
111 | int bank = IRQ_BANK(irq); | ||
112 | |||
113 | if (enable) | ||
114 | irq_banks[bank].wake_enable |= IRQ_BIT(irq); | ||
115 | else | ||
116 | irq_banks[bank].wake_enable &= ~IRQ_BIT(irq); | ||
117 | |||
118 | return 0; | ||
119 | } | ||
120 | |||
121 | |||
108 | /* | 122 | /* |
109 | * Allows tuning the IRQ type and priority | 123 | * Allows tuning the IRQ type and priority |
110 | * | 124 | * |
@@ -145,7 +159,7 @@ static struct omap_irq_bank omap1510_irq_banks[] = { | |||
145 | static struct omap_irq_bank omap1610_irq_banks[] = { | 159 | static struct omap_irq_bank omap1610_irq_banks[] = { |
146 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f }, | 160 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f }, |
147 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd }, | 161 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd }, |
148 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xfffff7ff }, | 162 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff }, |
149 | { .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff }, | 163 | { .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff }, |
150 | }; | 164 | }; |
151 | #endif | 165 | #endif |
@@ -154,6 +168,7 @@ static struct irqchip omap_irq_chip = { | |||
154 | .ack = omap_mask_ack_irq, | 168 | .ack = omap_mask_ack_irq, |
155 | .mask = omap_mask_irq, | 169 | .mask = omap_mask_irq, |
156 | .unmask = omap_unmask_irq, | 170 | .unmask = omap_unmask_irq, |
171 | .wake = omap_wake_irq, | ||
157 | }; | 172 | }; |
158 | 173 | ||
159 | void __init omap_init_irq(void) | 174 | void __init omap_init_irq(void) |
diff --git a/arch/arm/mach-omap/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c index 6e98290cca5c..6e98290cca5c 100644 --- a/arch/arm/mach-omap/leds-h2p2-debug.c +++ b/arch/arm/mach-omap1/leds-h2p2-debug.c | |||
diff --git a/arch/arm/mach-omap/leds-innovator.c b/arch/arm/mach-omap1/leds-innovator.c index 8043b7d0f66e..8043b7d0f66e 100644 --- a/arch/arm/mach-omap/leds-innovator.c +++ b/arch/arm/mach-omap1/leds-innovator.c | |||
diff --git a/arch/arm/mach-omap/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c index f5177f430793..4a0e8b9d4fc3 100644 --- a/arch/arm/mach-omap/leds-osk.c +++ b/arch/arm/mach-omap1/leds-osk.c | |||
@@ -129,14 +129,11 @@ void osk_leds_event(led_event_t evt) | |||
129 | 129 | ||
130 | #ifdef CONFIG_FB_OMAP | 130 | #ifdef CONFIG_FB_OMAP |
131 | 131 | ||
132 | #ifdef CONFIG_LEDS_TIMER | ||
133 | case led_timer: | 132 | case led_timer: |
134 | hw_led_state ^= TIMER_LED; | 133 | hw_led_state ^= TIMER_LED; |
135 | mistral_setled(); | 134 | mistral_setled(); |
136 | break; | 135 | break; |
137 | #endif | ||
138 | 136 | ||
139 | #ifdef CONFIG_LEDS_CPU | ||
140 | case led_idle_start: | 137 | case led_idle_start: |
141 | hw_led_state |= IDLE_LED; | 138 | hw_led_state |= IDLE_LED; |
142 | mistral_setled(); | 139 | mistral_setled(); |
@@ -146,7 +143,6 @@ void osk_leds_event(led_event_t evt) | |||
146 | hw_led_state &= ~IDLE_LED; | 143 | hw_led_state &= ~IDLE_LED; |
147 | mistral_setled(); | 144 | mistral_setled(); |
148 | break; | 145 | break; |
149 | #endif | ||
150 | 146 | ||
151 | #endif /* CONFIG_FB_OMAP */ | 147 | #endif /* CONFIG_FB_OMAP */ |
152 | 148 | ||
diff --git a/arch/arm/mach-omap/leds.c b/arch/arm/mach-omap1/leds.c index 8ab21fe98e1b..8ab21fe98e1b 100644 --- a/arch/arm/mach-omap/leds.c +++ b/arch/arm/mach-omap1/leds.c | |||
diff --git a/arch/arm/mach-omap/leds.h b/arch/arm/mach-omap1/leds.h index a1e9fedc376c..a1e9fedc376c 100644 --- a/arch/arm/mach-omap/leds.h +++ b/arch/arm/mach-omap1/leds.h | |||
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c new file mode 100644 index 000000000000..214e5d17c8b5 --- /dev/null +++ b/arch/arm/mach-omap1/serial.c | |||
@@ -0,0 +1,200 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-omap1/id.c | ||
3 | * | ||
4 | * OMAP1 CPU identification code | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/config.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/delay.h> | ||
16 | #include <linux/serial.h> | ||
17 | #include <linux/tty.h> | ||
18 | #include <linux/serial_8250.h> | ||
19 | #include <linux/serial_reg.h> | ||
20 | |||
21 | #include <asm/io.h> | ||
22 | #include <asm/mach-types.h> | ||
23 | #include <asm/hardware/clock.h> | ||
24 | |||
25 | #include <asm/arch/board.h> | ||
26 | #include <asm/arch/mux.h> | ||
27 | #include <asm/arch/fpga.h> | ||
28 | |||
29 | static struct clk * uart1_ck = NULL; | ||
30 | static struct clk * uart2_ck = NULL; | ||
31 | static struct clk * uart3_ck = NULL; | ||
32 | |||
33 | static inline unsigned int omap_serial_in(struct plat_serial8250_port *up, | ||
34 | int offset) | ||
35 | { | ||
36 | offset <<= up->regshift; | ||
37 | return (unsigned int)__raw_readb(up->membase + offset); | ||
38 | } | ||
39 | |||
40 | static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset, | ||
41 | int value) | ||
42 | { | ||
43 | offset <<= p->regshift; | ||
44 | __raw_writeb(value, p->membase + offset); | ||
45 | } | ||
46 | |||
47 | /* | ||
48 | * Internal UARTs need to be initialized for the 8250 autoconfig to work | ||
49 | * properly. Note that the TX watermark initialization may not be needed | ||
50 | * once the 8250.c watermark handling code is merged. | ||
51 | */ | ||
52 | static void __init omap_serial_reset(struct plat_serial8250_port *p) | ||
53 | { | ||
54 | omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */ | ||
55 | omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ | ||
56 | omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ | ||
57 | |||
58 | if (!cpu_is_omap1510()) { | ||
59 | omap_serial_outp(p, UART_OMAP_SYSC, 0x01); | ||
60 | while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); | ||
61 | } | ||
62 | } | ||
63 | |||
64 | static struct plat_serial8250_port serial_platform_data[] = { | ||
65 | { | ||
66 | .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE), | ||
67 | .mapbase = (unsigned long)OMAP_UART1_BASE, | ||
68 | .irq = INT_UART1, | ||
69 | .flags = UPF_BOOT_AUTOCONF, | ||
70 | .iotype = UPIO_MEM, | ||
71 | .regshift = 2, | ||
72 | .uartclk = OMAP16XX_BASE_BAUD * 16, | ||
73 | }, | ||
74 | { | ||
75 | .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE), | ||
76 | .mapbase = (unsigned long)OMAP_UART2_BASE, | ||
77 | .irq = INT_UART2, | ||
78 | .flags = UPF_BOOT_AUTOCONF, | ||
79 | .iotype = UPIO_MEM, | ||
80 | .regshift = 2, | ||
81 | .uartclk = OMAP16XX_BASE_BAUD * 16, | ||
82 | }, | ||
83 | { | ||
84 | .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE), | ||
85 | .mapbase = (unsigned long)OMAP_UART3_BASE, | ||
86 | .irq = INT_UART3, | ||
87 | .flags = UPF_BOOT_AUTOCONF, | ||
88 | .iotype = UPIO_MEM, | ||
89 | .regshift = 2, | ||
90 | .uartclk = OMAP16XX_BASE_BAUD * 16, | ||
91 | }, | ||
92 | { }, | ||
93 | }; | ||
94 | |||
95 | static struct platform_device serial_device = { | ||
96 | .name = "serial8250", | ||
97 | .id = 0, | ||
98 | .dev = { | ||
99 | .platform_data = serial_platform_data, | ||
100 | }, | ||
101 | }; | ||
102 | |||
103 | /* | ||
104 | * Note that on Innovator-1510 UART2 pins conflict with USB2. | ||
105 | * By default UART2 does not work on Innovator-1510 if you have | ||
106 | * USB OHCI enabled. To use UART2, you must disable USB2 first. | ||
107 | */ | ||
108 | void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS]) | ||
109 | { | ||
110 | int i; | ||
111 | |||
112 | if (cpu_is_omap730()) { | ||
113 | serial_platform_data[0].regshift = 0; | ||
114 | serial_platform_data[1].regshift = 0; | ||
115 | serial_platform_data[0].irq = INT_730_UART_MODEM_1; | ||
116 | serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; | ||
117 | } | ||
118 | |||
119 | if (cpu_is_omap1510()) { | ||
120 | serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; | ||
121 | serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; | ||
122 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; | ||
123 | } | ||
124 | |||
125 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | ||
126 | unsigned char reg; | ||
127 | |||
128 | if (ports[i] == 0) { | ||
129 | serial_platform_data[i].membase = NULL; | ||
130 | serial_platform_data[i].mapbase = 0; | ||
131 | continue; | ||
132 | } | ||
133 | |||
134 | switch (i) { | ||
135 | case 0: | ||
136 | uart1_ck = clk_get(NULL, "uart1_ck"); | ||
137 | if (IS_ERR(uart1_ck)) | ||
138 | printk("Could not get uart1_ck\n"); | ||
139 | else { | ||
140 | clk_use(uart1_ck); | ||
141 | if (cpu_is_omap1510()) | ||
142 | clk_set_rate(uart1_ck, 12000000); | ||
143 | } | ||
144 | if (cpu_is_omap1510()) { | ||
145 | omap_cfg_reg(UART1_TX); | ||
146 | omap_cfg_reg(UART1_RTS); | ||
147 | if (machine_is_omap_innovator()) { | ||
148 | reg = fpga_read(OMAP1510_FPGA_POWER); | ||
149 | reg |= OMAP1510_FPGA_PCR_COM1_EN; | ||
150 | fpga_write(reg, OMAP1510_FPGA_POWER); | ||
151 | udelay(10); | ||
152 | } | ||
153 | } | ||
154 | break; | ||
155 | case 1: | ||
156 | uart2_ck = clk_get(NULL, "uart2_ck"); | ||
157 | if (IS_ERR(uart2_ck)) | ||
158 | printk("Could not get uart2_ck\n"); | ||
159 | else { | ||
160 | clk_use(uart2_ck); | ||
161 | if (cpu_is_omap1510()) | ||
162 | clk_set_rate(uart2_ck, 12000000); | ||
163 | else | ||
164 | clk_set_rate(uart2_ck, 48000000); | ||
165 | } | ||
166 | if (cpu_is_omap1510()) { | ||
167 | omap_cfg_reg(UART2_TX); | ||
168 | omap_cfg_reg(UART2_RTS); | ||
169 | if (machine_is_omap_innovator()) { | ||
170 | reg = fpga_read(OMAP1510_FPGA_POWER); | ||
171 | reg |= OMAP1510_FPGA_PCR_COM2_EN; | ||
172 | fpga_write(reg, OMAP1510_FPGA_POWER); | ||
173 | udelay(10); | ||
174 | } | ||
175 | } | ||
176 | break; | ||
177 | case 2: | ||
178 | uart3_ck = clk_get(NULL, "uart3_ck"); | ||
179 | if (IS_ERR(uart3_ck)) | ||
180 | printk("Could not get uart3_ck\n"); | ||
181 | else { | ||
182 | clk_use(uart3_ck); | ||
183 | if (cpu_is_omap1510()) | ||
184 | clk_set_rate(uart3_ck, 12000000); | ||
185 | } | ||
186 | if (cpu_is_omap1510()) { | ||
187 | omap_cfg_reg(UART3_TX); | ||
188 | omap_cfg_reg(UART3_RX); | ||
189 | } | ||
190 | break; | ||
191 | } | ||
192 | omap_serial_reset(&serial_platform_data[i]); | ||
193 | } | ||
194 | } | ||
195 | |||
196 | static int __init omap_init(void) | ||
197 | { | ||
198 | return platform_device_register(&serial_device); | ||
199 | } | ||
200 | arch_initcall(omap_init); | ||
diff --git a/arch/arm/mach-omap/time.c b/arch/arm/mach-omap1/time.c index dd34e9f4c413..d540539c9bbb 100644 --- a/arch/arm/mach-omap/time.c +++ b/arch/arm/mach-omap1/time.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/time.c | 2 | * linux/arch/arm/mach-omap1/time.c |
3 | * | 3 | * |
4 | * OMAP Timers | 4 | * OMAP Timers |
5 | * | 5 | * |
@@ -58,17 +58,9 @@ struct sys_timer omap_timer; | |||
58 | * MPU timer | 58 | * MPU timer |
59 | * --------------------------------------------------------------------------- | 59 | * --------------------------------------------------------------------------- |
60 | */ | 60 | */ |
61 | #define OMAP_MPU_TIMER1_BASE (0xfffec500) | ||
62 | #define OMAP_MPU_TIMER2_BASE (0xfffec600) | ||
63 | #define OMAP_MPU_TIMER3_BASE (0xfffec700) | ||
64 | #define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE | 61 | #define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE |
65 | #define OMAP_MPU_TIMER_OFFSET 0x100 | 62 | #define OMAP_MPU_TIMER_OFFSET 0x100 |
66 | 63 | ||
67 | #define MPU_TIMER_FREE (1 << 6) | ||
68 | #define MPU_TIMER_CLOCK_ENABLE (1 << 5) | ||
69 | #define MPU_TIMER_AR (1 << 1) | ||
70 | #define MPU_TIMER_ST (1 << 0) | ||
71 | |||
72 | /* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c, | 64 | /* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c, |
73 | * converted to use kHz by Kevin Hilman */ | 65 | * converted to use kHz by Kevin Hilman */ |
74 | /* convert from cycles(64bits) => nanoseconds (64bits) | 66 | /* convert from cycles(64bits) => nanoseconds (64bits) |
@@ -255,6 +247,13 @@ unsigned long long sched_clock(void) | |||
255 | #define OMAP_32K_TIMER_TCR 0x04 | 247 | #define OMAP_32K_TIMER_TCR 0x04 |
256 | 248 | ||
257 | #define OMAP_32K_TICKS_PER_HZ (32768 / HZ) | 249 | #define OMAP_32K_TICKS_PER_HZ (32768 / HZ) |
250 | #if (32768 % HZ) != 0 | ||
251 | /* We cannot ignore modulo. | ||
252 | * Potential error can be as high as several percent. | ||
253 | */ | ||
254 | #define OMAP_32K_TICK_MODULO (32768 % HZ) | ||
255 | static unsigned modulo_count = 0; /* Counts 1/HZ units */ | ||
256 | #endif | ||
258 | 257 | ||
259 | /* | 258 | /* |
260 | * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1 | 259 | * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1 |
@@ -331,6 +330,19 @@ static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id, | |||
331 | now = omap_32k_sync_timer_read(); | 330 | now = omap_32k_sync_timer_read(); |
332 | 331 | ||
333 | while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) { | 332 | while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) { |
333 | #ifdef OMAP_32K_TICK_MODULO | ||
334 | /* Modulo addition may put omap_32k_last_tick ahead of now | ||
335 | * and cause unwanted repetition of the while loop. | ||
336 | */ | ||
337 | if (unlikely(now - omap_32k_last_tick == ~0)) | ||
338 | break; | ||
339 | |||
340 | modulo_count += OMAP_32K_TICK_MODULO; | ||
341 | if (modulo_count > HZ) { | ||
342 | ++omap_32k_last_tick; | ||
343 | modulo_count -= HZ; | ||
344 | } | ||
345 | #endif | ||
334 | omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ; | 346 | omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ; |
335 | timer_tick(regs); | 347 | timer_tick(regs); |
336 | } | 348 | } |
@@ -407,7 +419,7 @@ static __init void omap_init_32k_timer(void) | |||
407 | * Timer initialization | 419 | * Timer initialization |
408 | * --------------------------------------------------------------------------- | 420 | * --------------------------------------------------------------------------- |
409 | */ | 421 | */ |
410 | void __init omap_timer_init(void) | 422 | static void __init omap_timer_init(void) |
411 | { | 423 | { |
412 | #if defined(CONFIG_OMAP_MPU_TIMER) | 424 | #if defined(CONFIG_OMAP_MPU_TIMER) |
413 | omap_init_mpu_timer(); | 425 | omap_init_mpu_timer(); |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 95606b4a3ba6..afbbeb6f4658 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -101,7 +101,7 @@ config CPU_ARM922T | |||
101 | 101 | ||
102 | # ARM925T | 102 | # ARM925T |
103 | config CPU_ARM925T | 103 | config CPU_ARM925T |
104 | bool "Support ARM925T processor" if ARCH_OMAP | 104 | bool "Support ARM925T processor" if ARCH_OMAP1 |
105 | depends on ARCH_OMAP1510 | 105 | depends on ARCH_OMAP1510 |
106 | default y if ARCH_OMAP1510 | 106 | default y if ARCH_OMAP1510 |
107 | select CPU_32v4 | 107 | select CPU_32v4 |
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c index c3bd503b43a2..b19f00e99a21 100644 --- a/arch/arm/mm/mm-armv.c +++ b/arch/arm/mm/mm-armv.c | |||
@@ -399,7 +399,7 @@ static void __init build_mem_type_table(void) | |||
399 | ecc_mask = 0; | 399 | ecc_mask = 0; |
400 | } | 400 | } |
401 | 401 | ||
402 | if (cpu_arch <= CPU_ARCH_ARMv5) { | 402 | if (cpu_arch <= CPU_ARCH_ARMv5TEJ) { |
403 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { | 403 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { |
404 | if (mem_types[i].prot_l1) | 404 | if (mem_types[i].prot_l1) |
405 | mem_types[i].prot_l1 |= PMD_BIT4; | 405 | mem_types[i].prot_l1 |= PMD_BIT4; |
@@ -584,7 +584,7 @@ void setup_mm_for_reboot(char mode) | |||
584 | pmdval = (i << PGDIR_SHIFT) | | 584 | pmdval = (i << PGDIR_SHIFT) | |
585 | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | | 585 | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | |
586 | PMD_TYPE_SECT; | 586 | PMD_TYPE_SECT; |
587 | if (cpu_arch <= CPU_ARCH_ARMv5) | 587 | if (cpu_arch <= CPU_ARCH_ARMv5TEJ) |
588 | pmdval |= PMD_BIT4; | 588 | pmdval |= PMD_BIT4; |
589 | pmd = pmd_off(pgd, i << PGDIR_SHIFT); | 589 | pmd = pmd_off(pgd, i << PGDIR_SHIFT); |
590 | pmd[0] = __pmd(pmdval); | 590 | pmd[0] = __pmd(pmdval); |
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig new file mode 100644 index 000000000000..345365852f8c --- /dev/null +++ b/arch/arm/plat-omap/Kconfig | |||
@@ -0,0 +1,112 @@ | |||
1 | if ARCH_OMAP | ||
2 | |||
3 | menu "TI OMAP Implementations" | ||
4 | |||
5 | config ARCH_OMAP_OTG | ||
6 | bool | ||
7 | |||
8 | choice | ||
9 | prompt "OMAP System Type" | ||
10 | default ARCH_OMAP1 | ||
11 | |||
12 | config ARCH_OMAP1 | ||
13 | bool "TI OMAP1" | ||
14 | |||
15 | config ARCH_OMAP2 | ||
16 | bool "TI OMAP2" | ||
17 | |||
18 | endchoice | ||
19 | |||
20 | comment "OMAP Feature Selections" | ||
21 | |||
22 | config OMAP_RESET_CLOCKS | ||
23 | bool "Reset unused clocks during boot" | ||
24 | depends on ARCH_OMAP | ||
25 | default n | ||
26 | help | ||
27 | Say Y if you want to reset unused clocks during boot. | ||
28 | This option saves power, but assumes all drivers are | ||
29 | using the clock framework. Broken drivers that do not | ||
30 | yet use clock framework may not work with this option. | ||
31 | If you are booting from another operating system, you | ||
32 | probably do not want this option enabled until your | ||
33 | device drivers work properly. | ||
34 | |||
35 | config OMAP_MUX | ||
36 | bool "OMAP multiplexing support" | ||
37 | depends on ARCH_OMAP | ||
38 | default y | ||
39 | help | ||
40 | Pin multiplexing support for OMAP boards. If your bootloader | ||
41 | sets the multiplexing correctly, say N. Otherwise, or if unsure, | ||
42 | say Y. | ||
43 | |||
44 | config OMAP_MUX_DEBUG | ||
45 | bool "Multiplexing debug output" | ||
46 | depends on OMAP_MUX | ||
47 | default n | ||
48 | help | ||
49 | Makes the multiplexing functions print out a lot of debug info. | ||
50 | This is useful if you want to find out the correct values of the | ||
51 | multiplexing registers. | ||
52 | |||
53 | config OMAP_MUX_WARNINGS | ||
54 | bool "Warn about pins the bootloader didn't set up" | ||
55 | depends on OMAP_MUX | ||
56 | default y | ||
57 | help | ||
58 | Choose Y here to warn whenever driver initialization logic needs | ||
59 | to change the pin multiplexing setup. When there are no warnings | ||
60 | printed, it's safe to deselect OMAP_MUX for your product. | ||
61 | |||
62 | choice | ||
63 | prompt "System timer" | ||
64 | default OMAP_MPU_TIMER | ||
65 | |||
66 | config OMAP_MPU_TIMER | ||
67 | bool "Use mpu timer" | ||
68 | help | ||
69 | Select this option if you want to use the OMAP mpu timer. This | ||
70 | timer provides more intra-tick resolution than the 32KHz timer, | ||
71 | but consumes more power. | ||
72 | |||
73 | config OMAP_32K_TIMER | ||
74 | bool "Use 32KHz timer" | ||
75 | depends on ARCH_OMAP16XX | ||
76 | help | ||
77 | Select this option if you want to enable the OMAP 32KHz timer. | ||
78 | This timer saves power compared to the OMAP_MPU_TIMER, and has | ||
79 | support for no tick during idle. The 32KHz timer provides less | ||
80 | intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is | ||
81 | currently only available for OMAP-16xx. | ||
82 | |||
83 | endchoice | ||
84 | |||
85 | config OMAP_32K_TIMER_HZ | ||
86 | int "Kernel internal timer frequency for 32KHz timer" | ||
87 | range 32 1024 | ||
88 | depends on OMAP_32K_TIMER | ||
89 | default "128" | ||
90 | help | ||
91 | Kernel internal timer frequency should be a divisor of 32768, | ||
92 | such as 64 or 128. | ||
93 | |||
94 | choice | ||
95 | prompt "Low-level debug console UART" | ||
96 | depends on ARCH_OMAP | ||
97 | default OMAP_LL_DEBUG_UART1 | ||
98 | |||
99 | config OMAP_LL_DEBUG_UART1 | ||
100 | bool "UART1" | ||
101 | |||
102 | config OMAP_LL_DEBUG_UART2 | ||
103 | bool "UART2" | ||
104 | |||
105 | config OMAP_LL_DEBUG_UART3 | ||
106 | bool "UART3" | ||
107 | |||
108 | endchoice | ||
109 | |||
110 | endmenu | ||
111 | |||
112 | endif | ||
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile new file mode 100644 index 000000000000..531e11af54d4 --- /dev/null +++ b/arch/arm/plat-omap/Makefile | |||
@@ -0,0 +1,17 @@ | |||
1 | # | ||
2 | # Makefile for the linux kernel. | ||
3 | # | ||
4 | |||
5 | # Common support | ||
6 | obj-y := common.o dma.o clock.o mux.o gpio.o mcbsp.o usb.o | ||
7 | obj-m := | ||
8 | obj-n := | ||
9 | obj- := | ||
10 | |||
11 | # OCPI interconnect support for 1710, 1610 and 5912 | ||
12 | obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o | ||
13 | |||
14 | # Power Management | ||
15 | obj-$(CONFIG_PM) += pm.o sleep.o | ||
16 | |||
17 | obj-$(CONFIG_CPU_FREQ) += cpu-omap.o | ||
diff --git a/arch/arm/mach-omap/clock.c b/arch/arm/plat-omap/clock.c index e91186b5341a..59d91b3262ba 100644 --- a/arch/arm/mach-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/clock.c | 2 | * linux/arch/arm/plat-omap/clock.c |
3 | * | 3 | * |
4 | * Copyright (C) 2004 Nokia corporation | 4 | * Copyright (C) 2004 Nokia corporation |
5 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> | 5 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> |
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/errno.h> | 14 | #include <linux/errno.h> |
15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
16 | 16 | ||
17 | #include <asm/io.h> | ||
17 | #include <asm/semaphore.h> | 18 | #include <asm/semaphore.h> |
18 | #include <asm/hardware/clock.h> | 19 | #include <asm/hardware/clock.h> |
19 | #include <asm/arch/board.h> | 20 | #include <asm/arch/board.h> |
@@ -25,6 +26,8 @@ static LIST_HEAD(clocks); | |||
25 | static DECLARE_MUTEX(clocks_sem); | 26 | static DECLARE_MUTEX(clocks_sem); |
26 | static DEFINE_SPINLOCK(clockfw_lock); | 27 | static DEFINE_SPINLOCK(clockfw_lock); |
27 | static void propagate_rate(struct clk * clk); | 28 | static void propagate_rate(struct clk * clk); |
29 | /* UART clock function */ | ||
30 | static int set_uart_rate(struct clk * clk, unsigned long rate); | ||
28 | /* External clock (MCLK & BCLK) functions */ | 31 | /* External clock (MCLK & BCLK) functions */ |
29 | static int set_ext_clk_rate(struct clk * clk, unsigned long rate); | 32 | static int set_ext_clk_rate(struct clk * clk, unsigned long rate); |
30 | static long round_ext_clk_rate(struct clk * clk, unsigned long rate); | 33 | static long round_ext_clk_rate(struct clk * clk, unsigned long rate); |
@@ -34,7 +37,7 @@ static int select_table_rate(struct clk * clk, unsigned long rate); | |||
34 | static long round_to_table_rate(struct clk * clk, unsigned long rate); | 37 | static long round_to_table_rate(struct clk * clk, unsigned long rate); |
35 | void clk_setdpll(__u16, __u16); | 38 | void clk_setdpll(__u16, __u16); |
36 | 39 | ||
37 | struct mpu_rate rate_table[] = { | 40 | static struct mpu_rate rate_table[] = { |
38 | /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL | 41 | /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL |
39 | * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv | 42 | * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv |
40 | */ | 43 | */ |
@@ -48,7 +51,7 @@ struct mpu_rate rate_table[] = { | |||
48 | { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ | 51 | { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ |
49 | { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ | 52 | { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ |
50 | { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ | 53 | { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ |
51 | { 48000000, 12000000, 192000000, 0x0ccf, 0x2810 }, /* 4/4/4/4/8/8 */ | 54 | { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/8/4/4/8/8 */ |
52 | { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ | 55 | { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ |
53 | #endif | 56 | #endif |
54 | #if defined(CONFIG_OMAP_ARM_182MHZ) | 57 | #if defined(CONFIG_OMAP_ARM_182MHZ) |
@@ -58,7 +61,7 @@ struct mpu_rate rate_table[] = { | |||
58 | { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ | 61 | { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ |
59 | #endif | 62 | #endif |
60 | #if defined(CONFIG_OMAP_ARM_150MHZ) | 63 | #if defined(CONFIG_OMAP_ARM_150MHZ) |
61 | { 150000000, 12000000, 150000000, 0x150a, 0x2cb0 }, /* 0/0/1/1/2/2 */ | 64 | { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ |
62 | #endif | 65 | #endif |
63 | #if defined(CONFIG_OMAP_ARM_120MHZ) | 66 | #if defined(CONFIG_OMAP_ARM_120MHZ) |
64 | { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ | 67 | { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ |
@@ -76,19 +79,11 @@ struct mpu_rate rate_table[] = { | |||
76 | }; | 79 | }; |
77 | 80 | ||
78 | 81 | ||
79 | static void ckctl_recalc(struct clk * clk) | 82 | static void ckctl_recalc(struct clk * clk); |
80 | { | 83 | int __clk_enable(struct clk *clk); |
81 | int dsor; | 84 | void __clk_disable(struct clk *clk); |
82 | 85 | void __clk_unuse(struct clk *clk); | |
83 | /* Calculate divisor encoded as 2-bit exponent */ | 86 | int __clk_use(struct clk *clk); |
84 | dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); | ||
85 | if (unlikely(clk->rate == clk->parent->rate / dsor)) | ||
86 | return; /* No change, quick exit */ | ||
87 | clk->rate = clk->parent->rate / dsor; | ||
88 | |||
89 | if (unlikely(clk->flags & RATE_PROPAGATES)) | ||
90 | propagate_rate(clk); | ||
91 | } | ||
92 | 87 | ||
93 | 88 | ||
94 | static void followparent_recalc(struct clk * clk) | 89 | static void followparent_recalc(struct clk * clk) |
@@ -102,6 +97,14 @@ static void watchdog_recalc(struct clk * clk) | |||
102 | clk->rate = clk->parent->rate / 14; | 97 | clk->rate = clk->parent->rate / 14; |
103 | } | 98 | } |
104 | 99 | ||
100 | static void uart_recalc(struct clk * clk) | ||
101 | { | ||
102 | unsigned int val = omap_readl(clk->enable_reg); | ||
103 | if (val & clk->enable_bit) | ||
104 | clk->rate = 48000000; | ||
105 | else | ||
106 | clk->rate = 12000000; | ||
107 | } | ||
105 | 108 | ||
106 | static struct clk ck_ref = { | 109 | static struct clk ck_ref = { |
107 | .name = "ck_ref", | 110 | .name = "ck_ref", |
@@ -138,7 +141,7 @@ static struct clk arm_ck = { | |||
138 | static struct clk armper_ck = { | 141 | static struct clk armper_ck = { |
139 | .name = "armper_ck", | 142 | .name = "armper_ck", |
140 | .parent = &ck_dpll1, | 143 | .parent = &ck_dpll1, |
141 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 144 | .flags = CLOCK_IN_OMAP730 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
142 | RATE_CKCTL, | 145 | RATE_CKCTL, |
143 | .enable_reg = ARM_IDLECT2, | 146 | .enable_reg = ARM_IDLECT2, |
144 | .enable_bit = EN_PERCK, | 147 | .enable_bit = EN_PERCK, |
@@ -185,7 +188,7 @@ static struct clk armwdt_ck = { | |||
185 | static struct clk arminth_ck16xx = { | 188 | static struct clk arminth_ck16xx = { |
186 | .name = "arminth_ck", | 189 | .name = "arminth_ck", |
187 | .parent = &arm_ck, | 190 | .parent = &arm_ck, |
188 | .flags = CLOCK_IN_OMAP16XX, | 191 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
189 | .recalc = &followparent_recalc, | 192 | .recalc = &followparent_recalc, |
190 | /* Note: On 16xx the frequency can be divided by 2 by programming | 193 | /* Note: On 16xx the frequency can be divided by 2 by programming |
191 | * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 | 194 | * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 |
@@ -214,6 +217,38 @@ static struct clk dspmmu_ck = { | |||
214 | .recalc = &ckctl_recalc, | 217 | .recalc = &ckctl_recalc, |
215 | }; | 218 | }; |
216 | 219 | ||
220 | static struct clk dspper_ck = { | ||
221 | .name = "dspper_ck", | ||
222 | .parent = &ck_dpll1, | ||
223 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | ||
224 | RATE_CKCTL | DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS, | ||
225 | .enable_reg = DSP_IDLECT2, | ||
226 | .enable_bit = EN_PERCK, | ||
227 | .rate_offset = CKCTL_PERDIV_OFFSET, | ||
228 | .recalc = &followparent_recalc, | ||
229 | //.recalc = &ckctl_recalc, | ||
230 | }; | ||
231 | |||
232 | static struct clk dspxor_ck = { | ||
233 | .name = "dspxor_ck", | ||
234 | .parent = &ck_ref, | ||
235 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | ||
236 | DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS, | ||
237 | .enable_reg = DSP_IDLECT2, | ||
238 | .enable_bit = EN_XORPCK, | ||
239 | .recalc = &followparent_recalc, | ||
240 | }; | ||
241 | |||
242 | static struct clk dsptim_ck = { | ||
243 | .name = "dsptim_ck", | ||
244 | .parent = &ck_ref, | ||
245 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | ||
246 | DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS, | ||
247 | .enable_reg = DSP_IDLECT2, | ||
248 | .enable_bit = EN_DSPTIMCK, | ||
249 | .recalc = &followparent_recalc, | ||
250 | }; | ||
251 | |||
217 | static struct clk tc_ck = { | 252 | static struct clk tc_ck = { |
218 | .name = "tc_ck", | 253 | .name = "tc_ck", |
219 | .parent = &ck_dpll1, | 254 | .parent = &ck_dpll1, |
@@ -226,7 +261,7 @@ static struct clk tc_ck = { | |||
226 | static struct clk arminth_ck1510 = { | 261 | static struct clk arminth_ck1510 = { |
227 | .name = "arminth_ck", | 262 | .name = "arminth_ck", |
228 | .parent = &tc_ck, | 263 | .parent = &tc_ck, |
229 | .flags = CLOCK_IN_OMAP1510, | 264 | .flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, |
230 | .recalc = &followparent_recalc, | 265 | .recalc = &followparent_recalc, |
231 | /* Note: On 1510 the frequency follows TC_CK | 266 | /* Note: On 1510 the frequency follows TC_CK |
232 | * | 267 | * |
@@ -237,7 +272,7 @@ static struct clk arminth_ck1510 = { | |||
237 | static struct clk tipb_ck = { | 272 | static struct clk tipb_ck = { |
238 | .name = "tibp_ck", | 273 | .name = "tibp_ck", |
239 | .parent = &tc_ck, | 274 | .parent = &tc_ck, |
240 | .flags = CLOCK_IN_OMAP1510, | 275 | .flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, |
241 | .recalc = &followparent_recalc, | 276 | .recalc = &followparent_recalc, |
242 | }; | 277 | }; |
243 | 278 | ||
@@ -271,14 +306,15 @@ static struct clk tc2_ck = { | |||
271 | static struct clk dma_ck = { | 306 | static struct clk dma_ck = { |
272 | .name = "dma_ck", | 307 | .name = "dma_ck", |
273 | .parent = &tc_ck, | 308 | .parent = &tc_ck, |
274 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, | 309 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
310 | ALWAYS_ENABLED, | ||
275 | .recalc = &followparent_recalc, | 311 | .recalc = &followparent_recalc, |
276 | }; | 312 | }; |
277 | 313 | ||
278 | static struct clk dma_lcdfree_ck = { | 314 | static struct clk dma_lcdfree_ck = { |
279 | .name = "dma_lcdfree_ck", | 315 | .name = "dma_lcdfree_ck", |
280 | .parent = &tc_ck, | 316 | .parent = &tc_ck, |
281 | .flags = CLOCK_IN_OMAP16XX, | 317 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
282 | .recalc = &followparent_recalc, | 318 | .recalc = &followparent_recalc, |
283 | }; | 319 | }; |
284 | 320 | ||
@@ -303,14 +339,14 @@ static struct clk lb_ck = { | |||
303 | static struct clk rhea1_ck = { | 339 | static struct clk rhea1_ck = { |
304 | .name = "rhea1_ck", | 340 | .name = "rhea1_ck", |
305 | .parent = &tc_ck, | 341 | .parent = &tc_ck, |
306 | .flags = CLOCK_IN_OMAP16XX, | 342 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
307 | .recalc = &followparent_recalc, | 343 | .recalc = &followparent_recalc, |
308 | }; | 344 | }; |
309 | 345 | ||
310 | static struct clk rhea2_ck = { | 346 | static struct clk rhea2_ck = { |
311 | .name = "rhea2_ck", | 347 | .name = "rhea2_ck", |
312 | .parent = &tc_ck, | 348 | .parent = &tc_ck, |
313 | .flags = CLOCK_IN_OMAP16XX, | 349 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
314 | .recalc = &followparent_recalc, | 350 | .recalc = &followparent_recalc, |
315 | }; | 351 | }; |
316 | 352 | ||
@@ -325,43 +361,55 @@ static struct clk lcd_ck = { | |||
325 | .recalc = &ckctl_recalc, | 361 | .recalc = &ckctl_recalc, |
326 | }; | 362 | }; |
327 | 363 | ||
328 | static struct clk uart1_ck = { | 364 | static struct clk uart1_1510 = { |
365 | .name = "uart1_ck", | ||
366 | /* Direct from ULPD, no parent */ | ||
367 | .rate = 12000000, | ||
368 | .flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | ALWAYS_ENABLED, | ||
369 | .enable_reg = MOD_CONF_CTRL_0, | ||
370 | .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ | ||
371 | .set_rate = &set_uart_rate, | ||
372 | .recalc = &uart_recalc, | ||
373 | }; | ||
374 | |||
375 | static struct clk uart1_16xx = { | ||
329 | .name = "uart1_ck", | 376 | .name = "uart1_ck", |
330 | /* Direct from ULPD, no parent */ | 377 | /* Direct from ULPD, no parent */ |
331 | .rate = 48000000, | 378 | .rate = 48000000, |
332 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 379 | .flags = CLOCK_IN_OMAP16XX | RATE_FIXED | ENABLE_REG_32BIT, |
333 | RATE_FIXED | ENABLE_REG_32BIT, | ||
334 | .enable_reg = MOD_CONF_CTRL_0, | 380 | .enable_reg = MOD_CONF_CTRL_0, |
335 | .enable_bit = 29, | 381 | .enable_bit = 29, |
336 | /* (Only on 1510) | ||
337 | * The "enable bit" actually chooses between 48MHz and 12MHz. | ||
338 | */ | ||
339 | }; | 382 | }; |
340 | 383 | ||
341 | static struct clk uart2_ck = { | 384 | static struct clk uart2_ck = { |
342 | .name = "uart2_ck", | 385 | .name = "uart2_ck", |
343 | /* Direct from ULPD, no parent */ | 386 | /* Direct from ULPD, no parent */ |
344 | .rate = 48000000, | 387 | .rate = 12000000, |
345 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 388 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT, |
346 | RATE_FIXED | ENABLE_REG_32BIT, | ||
347 | .enable_reg = MOD_CONF_CTRL_0, | 389 | .enable_reg = MOD_CONF_CTRL_0, |
348 | .enable_bit = 30, | 390 | .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ |
349 | /* (for both 1510 and 16xx) | 391 | .set_rate = &set_uart_rate, |
350 | * The "enable bit" actually chooses between 48MHz and 12MHz/32kHz. | 392 | .recalc = &uart_recalc, |
351 | */ | ||
352 | }; | 393 | }; |
353 | 394 | ||
354 | static struct clk uart3_ck = { | 395 | static struct clk uart3_1510 = { |
396 | .name = "uart3_ck", | ||
397 | /* Direct from ULPD, no parent */ | ||
398 | .rate = 12000000, | ||
399 | .flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | ALWAYS_ENABLED, | ||
400 | .enable_reg = MOD_CONF_CTRL_0, | ||
401 | .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ | ||
402 | .set_rate = &set_uart_rate, | ||
403 | .recalc = &uart_recalc, | ||
404 | }; | ||
405 | |||
406 | static struct clk uart3_16xx = { | ||
355 | .name = "uart3_ck", | 407 | .name = "uart3_ck", |
356 | /* Direct from ULPD, no parent */ | 408 | /* Direct from ULPD, no parent */ |
357 | .rate = 48000000, | 409 | .rate = 48000000, |
358 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 410 | .flags = CLOCK_IN_OMAP16XX | RATE_FIXED | ENABLE_REG_32BIT, |
359 | RATE_FIXED | ENABLE_REG_32BIT, | ||
360 | .enable_reg = MOD_CONF_CTRL_0, | 411 | .enable_reg = MOD_CONF_CTRL_0, |
361 | .enable_bit = 31, | 412 | .enable_bit = 31, |
362 | /* (Only on 1510) | ||
363 | * The "enable bit" actually chooses between 48MHz and 12MHz. | ||
364 | */ | ||
365 | }; | 413 | }; |
366 | 414 | ||
367 | static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ | 415 | static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ |
@@ -480,6 +528,9 @@ static struct clk * onchip_clks[] = { | |||
480 | /* CK_GEN2 clocks */ | 528 | /* CK_GEN2 clocks */ |
481 | &dsp_ck, | 529 | &dsp_ck, |
482 | &dspmmu_ck, | 530 | &dspmmu_ck, |
531 | &dspper_ck, | ||
532 | &dspxor_ck, | ||
533 | &dsptim_ck, | ||
483 | /* CK_GEN3 clocks */ | 534 | /* CK_GEN3 clocks */ |
484 | &tc_ck, | 535 | &tc_ck, |
485 | &tipb_ck, | 536 | &tipb_ck, |
@@ -494,9 +545,11 @@ static struct clk * onchip_clks[] = { | |||
494 | &rhea2_ck, | 545 | &rhea2_ck, |
495 | &lcd_ck, | 546 | &lcd_ck, |
496 | /* ULPD clocks */ | 547 | /* ULPD clocks */ |
497 | &uart1_ck, | 548 | &uart1_1510, |
549 | &uart1_16xx, | ||
498 | &uart2_ck, | 550 | &uart2_ck, |
499 | &uart3_ck, | 551 | &uart3_1510, |
552 | &uart3_16xx, | ||
500 | &usb_clko, | 553 | &usb_clko, |
501 | &usb_hhc_ck1510, &usb_hhc_ck16xx, | 554 | &usb_hhc_ck1510, &usb_hhc_ck16xx, |
502 | &mclk_1510, &mclk_16xx, | 555 | &mclk_1510, &mclk_16xx, |
@@ -547,14 +600,34 @@ int __clk_enable(struct clk *clk) | |||
547 | return 0; | 600 | return 0; |
548 | } | 601 | } |
549 | 602 | ||
603 | if (clk->flags & DSP_DOMAIN_CLOCK) { | ||
604 | __clk_use(&api_ck); | ||
605 | } | ||
606 | |||
550 | if (clk->flags & ENABLE_REG_32BIT) { | 607 | if (clk->flags & ENABLE_REG_32BIT) { |
551 | regval32 = omap_readl(clk->enable_reg); | 608 | if (clk->flags & VIRTUAL_IO_ADDRESS) { |
552 | regval32 |= (1 << clk->enable_bit); | 609 | regval32 = __raw_readl(clk->enable_reg); |
553 | omap_writel(regval32, clk->enable_reg); | 610 | regval32 |= (1 << clk->enable_bit); |
611 | __raw_writel(regval32, clk->enable_reg); | ||
612 | } else { | ||
613 | regval32 = omap_readl(clk->enable_reg); | ||
614 | regval32 |= (1 << clk->enable_bit); | ||
615 | omap_writel(regval32, clk->enable_reg); | ||
616 | } | ||
554 | } else { | 617 | } else { |
555 | regval16 = omap_readw(clk->enable_reg); | 618 | if (clk->flags & VIRTUAL_IO_ADDRESS) { |
556 | regval16 |= (1 << clk->enable_bit); | 619 | regval16 = __raw_readw(clk->enable_reg); |
557 | omap_writew(regval16, clk->enable_reg); | 620 | regval16 |= (1 << clk->enable_bit); |
621 | __raw_writew(regval16, clk->enable_reg); | ||
622 | } else { | ||
623 | regval16 = omap_readw(clk->enable_reg); | ||
624 | regval16 |= (1 << clk->enable_bit); | ||
625 | omap_writew(regval16, clk->enable_reg); | ||
626 | } | ||
627 | } | ||
628 | |||
629 | if (clk->flags & DSP_DOMAIN_CLOCK) { | ||
630 | __clk_unuse(&api_ck); | ||
558 | } | 631 | } |
559 | 632 | ||
560 | return 0; | 633 | return 0; |
@@ -569,14 +642,34 @@ void __clk_disable(struct clk *clk) | |||
569 | if (clk->enable_reg == 0) | 642 | if (clk->enable_reg == 0) |
570 | return; | 643 | return; |
571 | 644 | ||
645 | if (clk->flags & DSP_DOMAIN_CLOCK) { | ||
646 | __clk_use(&api_ck); | ||
647 | } | ||
648 | |||
572 | if (clk->flags & ENABLE_REG_32BIT) { | 649 | if (clk->flags & ENABLE_REG_32BIT) { |
573 | regval32 = omap_readl(clk->enable_reg); | 650 | if (clk->flags & VIRTUAL_IO_ADDRESS) { |
574 | regval32 &= ~(1 << clk->enable_bit); | 651 | regval32 = __raw_readl(clk->enable_reg); |
575 | omap_writel(regval32, clk->enable_reg); | 652 | regval32 &= ~(1 << clk->enable_bit); |
653 | __raw_writel(regval32, clk->enable_reg); | ||
654 | } else { | ||
655 | regval32 = omap_readl(clk->enable_reg); | ||
656 | regval32 &= ~(1 << clk->enable_bit); | ||
657 | omap_writel(regval32, clk->enable_reg); | ||
658 | } | ||
576 | } else { | 659 | } else { |
577 | regval16 = omap_readw(clk->enable_reg); | 660 | if (clk->flags & VIRTUAL_IO_ADDRESS) { |
578 | regval16 &= ~(1 << clk->enable_bit); | 661 | regval16 = __raw_readw(clk->enable_reg); |
579 | omap_writew(regval16, clk->enable_reg); | 662 | regval16 &= ~(1 << clk->enable_bit); |
663 | __raw_writew(regval16, clk->enable_reg); | ||
664 | } else { | ||
665 | regval16 = omap_readw(clk->enable_reg); | ||
666 | regval16 &= ~(1 << clk->enable_bit); | ||
667 | omap_writew(regval16, clk->enable_reg); | ||
668 | } | ||
669 | } | ||
670 | |||
671 | if (clk->flags & DSP_DOMAIN_CLOCK) { | ||
672 | __clk_unuse(&api_ck); | ||
580 | } | 673 | } |
581 | } | 674 | } |
582 | 675 | ||
@@ -766,6 +859,33 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) | |||
766 | return dsor_exp; | 859 | return dsor_exp; |
767 | } | 860 | } |
768 | 861 | ||
862 | |||
863 | static void ckctl_recalc(struct clk * clk) | ||
864 | { | ||
865 | int dsor; | ||
866 | |||
867 | /* Calculate divisor encoded as 2-bit exponent */ | ||
868 | if (clk->flags & DSP_DOMAIN_CLOCK) { | ||
869 | /* The clock control bits are in DSP domain, | ||
870 | * so api_ck is needed for access. | ||
871 | * Note that DSP_CKCTL virt addr = phys addr, so | ||
872 | * we must use __raw_readw() instead of omap_readw(). | ||
873 | */ | ||
874 | __clk_use(&api_ck); | ||
875 | dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); | ||
876 | __clk_unuse(&api_ck); | ||
877 | } else { | ||
878 | dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); | ||
879 | } | ||
880 | if (unlikely(clk->rate == clk->parent->rate / dsor)) | ||
881 | return; /* No change, quick exit */ | ||
882 | clk->rate = clk->parent->rate / dsor; | ||
883 | |||
884 | if (unlikely(clk->flags & RATE_PROPAGATES)) | ||
885 | propagate_rate(clk); | ||
886 | } | ||
887 | |||
888 | |||
769 | long clk_round_rate(struct clk *clk, unsigned long rate) | 889 | long clk_round_rate(struct clk *clk, unsigned long rate) |
770 | { | 890 | { |
771 | int dsor_exp; | 891 | int dsor_exp; |
@@ -826,6 +946,9 @@ static int select_table_rate(struct clk * clk, unsigned long rate) | |||
826 | if (!ptr->rate) | 946 | if (!ptr->rate) |
827 | return -EINVAL; | 947 | return -EINVAL; |
828 | 948 | ||
949 | if (!ptr->rate) | ||
950 | return -EINVAL; | ||
951 | |||
829 | if (unlikely(ck_dpll1.rate == 0)) { | 952 | if (unlikely(ck_dpll1.rate == 0)) { |
830 | omap_writew(ptr->dpllctl_val, DPLL_CTL); | 953 | omap_writew(ptr->dpllctl_val, DPLL_CTL); |
831 | ck_dpll1.rate = ptr->pll_rate; | 954 | ck_dpll1.rate = ptr->pll_rate; |
@@ -921,6 +1044,23 @@ static unsigned calc_ext_dsor(unsigned long rate) | |||
921 | return dsor; | 1044 | return dsor; |
922 | } | 1045 | } |
923 | 1046 | ||
1047 | /* Only needed on 1510 */ | ||
1048 | static int set_uart_rate(struct clk * clk, unsigned long rate) | ||
1049 | { | ||
1050 | unsigned int val; | ||
1051 | |||
1052 | val = omap_readl(clk->enable_reg); | ||
1053 | if (rate == 12000000) | ||
1054 | val &= ~(1 << clk->enable_bit); | ||
1055 | else if (rate == 48000000) | ||
1056 | val |= (1 << clk->enable_bit); | ||
1057 | else | ||
1058 | return -EINVAL; | ||
1059 | omap_writel(val, clk->enable_reg); | ||
1060 | clk->rate = rate; | ||
1061 | |||
1062 | return 0; | ||
1063 | } | ||
924 | 1064 | ||
925 | static int set_ext_clk_rate(struct clk * clk, unsigned long rate) | 1065 | static int set_ext_clk_rate(struct clk * clk, unsigned long rate) |
926 | { | 1066 | { |
@@ -985,7 +1125,18 @@ void clk_unregister(struct clk *clk) | |||
985 | } | 1125 | } |
986 | EXPORT_SYMBOL(clk_unregister); | 1126 | EXPORT_SYMBOL(clk_unregister); |
987 | 1127 | ||
988 | 1128 | #ifdef CONFIG_OMAP_RESET_CLOCKS | |
1129 | /* | ||
1130 | * Resets some clocks that may be left on from bootloader, | ||
1131 | * but leaves serial clocks on. See also omap_late_clk_reset(). | ||
1132 | */ | ||
1133 | static inline void omap_early_clk_reset(void) | ||
1134 | { | ||
1135 | //omap_writel(0x3 << 29, MOD_CONF_CTRL_0); | ||
1136 | } | ||
1137 | #else | ||
1138 | #define omap_early_clk_reset() {} | ||
1139 | #endif | ||
989 | 1140 | ||
990 | int __init clk_init(void) | 1141 | int __init clk_init(void) |
991 | { | 1142 | { |
@@ -993,6 +1144,8 @@ int __init clk_init(void) | |||
993 | const struct omap_clock_config *info; | 1144 | const struct omap_clock_config *info; |
994 | int crystal_type = 0; /* Default 12 MHz */ | 1145 | int crystal_type = 0; /* Default 12 MHz */ |
995 | 1146 | ||
1147 | omap_early_clk_reset(); | ||
1148 | |||
996 | for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) { | 1149 | for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) { |
997 | if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) { | 1150 | if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) { |
998 | clk_register(*clkp); | 1151 | clk_register(*clkp); |
@@ -1023,9 +1176,42 @@ int __init clk_init(void) | |||
1023 | ck_ref.rate = 19200000; | 1176 | ck_ref.rate = 19200000; |
1024 | #endif | 1177 | #endif |
1025 | 1178 | ||
1179 | printk("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", | ||
1180 | omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), | ||
1181 | omap_readw(ARM_CKCTL)); | ||
1182 | |||
1026 | /* We want to be in syncronous scalable mode */ | 1183 | /* We want to be in syncronous scalable mode */ |
1027 | omap_writew(0x1000, ARM_SYSST); | 1184 | omap_writew(0x1000, ARM_SYSST); |
1028 | 1185 | ||
1186 | #ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER | ||
1187 | /* Use values set by bootloader. Determine PLL rate and recalculate | ||
1188 | * dependent clocks as if kernel had changed PLL or divisors. | ||
1189 | */ | ||
1190 | { | ||
1191 | unsigned pll_ctl_val = omap_readw(DPLL_CTL); | ||
1192 | |||
1193 | ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */ | ||
1194 | if (pll_ctl_val & 0x10) { | ||
1195 | /* PLL enabled, apply multiplier and divisor */ | ||
1196 | if (pll_ctl_val & 0xf80) | ||
1197 | ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7; | ||
1198 | ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1; | ||
1199 | } else { | ||
1200 | /* PLL disabled, apply bypass divisor */ | ||
1201 | switch (pll_ctl_val & 0xc) { | ||
1202 | case 0: | ||
1203 | break; | ||
1204 | case 0x4: | ||
1205 | ck_dpll1.rate /= 2; | ||
1206 | break; | ||
1207 | default: | ||
1208 | ck_dpll1.rate /= 4; | ||
1209 | break; | ||
1210 | } | ||
1211 | } | ||
1212 | } | ||
1213 | propagate_rate(&ck_dpll1); | ||
1214 | #else | ||
1029 | /* Find the highest supported frequency and enable it */ | 1215 | /* Find the highest supported frequency and enable it */ |
1030 | if (select_table_rate(&virtual_ck_mpu, ~0)) { | 1216 | if (select_table_rate(&virtual_ck_mpu, ~0)) { |
1031 | printk(KERN_ERR "System frequencies not set. Check your config.\n"); | 1217 | printk(KERN_ERR "System frequencies not set. Check your config.\n"); |
@@ -1034,12 +1220,13 @@ int __init clk_init(void) | |||
1034 | omap_writew(0x1005, ARM_CKCTL); | 1220 | omap_writew(0x1005, ARM_CKCTL); |
1035 | ck_dpll1.rate = 60000000; | 1221 | ck_dpll1.rate = 60000000; |
1036 | propagate_rate(&ck_dpll1); | 1222 | propagate_rate(&ck_dpll1); |
1037 | printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): %ld/%ld/%ld\n", | ||
1038 | ck_ref.rate, ck_dpll1.rate, arm_ck.rate); | ||
1039 | } | 1223 | } |
1040 | 1224 | #endif | |
1041 | /* Cache rates for clocks connected to ck_ref (not dpll1) */ | 1225 | /* Cache rates for clocks connected to ck_ref (not dpll1) */ |
1042 | propagate_rate(&ck_ref); | 1226 | propagate_rate(&ck_ref); |
1227 | printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld/%ld MHz\n", | ||
1228 | ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, | ||
1229 | ck_dpll1.rate, arm_ck.rate); | ||
1043 | 1230 | ||
1044 | #ifdef CONFIG_MACH_OMAP_PERSEUS2 | 1231 | #ifdef CONFIG_MACH_OMAP_PERSEUS2 |
1045 | /* Select slicer output as OMAP input clock */ | 1232 | /* Select slicer output as OMAP input clock */ |
@@ -1074,3 +1261,63 @@ int __init clk_init(void) | |||
1074 | 1261 | ||
1075 | return 0; | 1262 | return 0; |
1076 | } | 1263 | } |
1264 | |||
1265 | |||
1266 | #ifdef CONFIG_OMAP_RESET_CLOCKS | ||
1267 | |||
1268 | static int __init omap_late_clk_reset(void) | ||
1269 | { | ||
1270 | /* Turn off all unused clocks */ | ||
1271 | struct clk *p; | ||
1272 | __u32 regval32; | ||
1273 | |||
1274 | omap_writew(0, SOFT_REQ_REG); | ||
1275 | omap_writew(0, SOFT_REQ_REG2); | ||
1276 | |||
1277 | list_for_each_entry(p, &clocks, node) { | ||
1278 | if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) || | ||
1279 | p->enable_reg == 0) | ||
1280 | continue; | ||
1281 | |||
1282 | /* Assume no DSP clocks have been activated by bootloader */ | ||
1283 | if (p->flags & DSP_DOMAIN_CLOCK) | ||
1284 | continue; | ||
1285 | |||
1286 | /* Is the clock already disabled? */ | ||
1287 | if (p->flags & ENABLE_REG_32BIT) { | ||
1288 | if (p->flags & VIRTUAL_IO_ADDRESS) | ||
1289 | regval32 = __raw_readl(p->enable_reg); | ||
1290 | else | ||
1291 | regval32 = omap_readl(p->enable_reg); | ||
1292 | } else { | ||
1293 | if (p->flags & VIRTUAL_IO_ADDRESS) | ||
1294 | regval32 = __raw_readw(p->enable_reg); | ||
1295 | else | ||
1296 | regval32 = omap_readw(p->enable_reg); | ||
1297 | } | ||
1298 | |||
1299 | if ((regval32 & (1 << p->enable_bit)) == 0) | ||
1300 | continue; | ||
1301 | |||
1302 | /* FIXME: This clock seems to be necessary but no-one | ||
1303 | * has asked for its activation. */ | ||
1304 | if (p == &tc2_ck // FIX: pm.c (SRAM), CCP, Camera | ||
1305 | || p == &ck_dpll1out // FIX: SoSSI, SSR | ||
1306 | || p == &arm_gpio_ck // FIX: GPIO code for 1510 | ||
1307 | ) { | ||
1308 | printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n", | ||
1309 | p->name); | ||
1310 | continue; | ||
1311 | } | ||
1312 | |||
1313 | printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name); | ||
1314 | __clk_disable(p); | ||
1315 | printk(" done\n"); | ||
1316 | } | ||
1317 | |||
1318 | return 0; | ||
1319 | } | ||
1320 | |||
1321 | late_initcall(omap_late_clk_reset); | ||
1322 | |||
1323 | #endif | ||
diff --git a/arch/arm/mach-omap/clock.h b/arch/arm/plat-omap/clock.h index 08c0ddde1835..a89e1e8c2519 100644 --- a/arch/arm/mach-omap/clock.h +++ b/arch/arm/plat-omap/clock.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/clock.h | 2 | * linux/arch/arm/plat-omap/clock.h |
3 | * | 3 | * |
4 | * Copyright (C) 2004 Nokia corporation | 4 | * Copyright (C) 2004 Nokia corporation |
5 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> | 5 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> |
@@ -52,6 +52,8 @@ struct mpu_rate { | |||
52 | #define CLOCK_IN_OMAP16XX 64 | 52 | #define CLOCK_IN_OMAP16XX 64 |
53 | #define CLOCK_IN_OMAP1510 128 | 53 | #define CLOCK_IN_OMAP1510 128 |
54 | #define CLOCK_IN_OMAP730 256 | 54 | #define CLOCK_IN_OMAP730 256 |
55 | #define DSP_DOMAIN_CLOCK 512 | ||
56 | #define VIRTUAL_IO_ADDRESS 1024 | ||
55 | 57 | ||
56 | /* ARM_CKCTL bit shifts */ | 58 | /* ARM_CKCTL bit shifts */ |
57 | #define CKCTL_PERDIV_OFFSET 0 | 59 | #define CKCTL_PERDIV_OFFSET 0 |
@@ -63,6 +65,8 @@ struct mpu_rate { | |||
63 | /*#define ARM_TIMXO 12*/ | 65 | /*#define ARM_TIMXO 12*/ |
64 | #define EN_DSPCK 13 | 66 | #define EN_DSPCK 13 |
65 | /*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */ | 67 | /*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */ |
68 | /* DSP_CKCTL bit shifts */ | ||
69 | #define CKCTL_DSPPERDIV_OFFSET 0 | ||
66 | 70 | ||
67 | /* ARM_IDLECT1 bit shifts */ | 71 | /* ARM_IDLECT1 bit shifts */ |
68 | /*#define IDLWDT_ARM 0*/ | 72 | /*#define IDLWDT_ARM 0*/ |
@@ -96,6 +100,9 @@ struct mpu_rate { | |||
96 | #define EN_TC1_CK 2 | 100 | #define EN_TC1_CK 2 |
97 | #define EN_TC2_CK 4 | 101 | #define EN_TC2_CK 4 |
98 | 102 | ||
103 | /* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */ | ||
104 | #define EN_DSPTIMCK 5 | ||
105 | |||
99 | /* Various register defines for clock controls scattered around OMAP chip */ | 106 | /* Various register defines for clock controls scattered around OMAP chip */ |
100 | #define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */ | 107 | #define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */ |
101 | #define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */ | 108 | #define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */ |
@@ -103,7 +110,8 @@ struct mpu_rate { | |||
103 | #define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */ | 110 | #define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */ |
104 | #define SWD_CLK_DIV_CTRL_SEL 0xfffe0874 | 111 | #define SWD_CLK_DIV_CTRL_SEL 0xfffe0874 |
105 | #define COM_CLK_DIV_CTRL_SEL 0xfffe0878 | 112 | #define COM_CLK_DIV_CTRL_SEL 0xfffe0878 |
106 | 113 | #define SOFT_REQ_REG 0xfffe0834 | |
114 | #define SOFT_REQ_REG2 0xfffe0880 | ||
107 | 115 | ||
108 | int clk_register(struct clk *clk); | 116 | int clk_register(struct clk *clk); |
109 | void clk_unregister(struct clk *clk); | 117 | void clk_unregister(struct clk *clk); |
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c new file mode 100644 index 000000000000..ea967a8f6ce5 --- /dev/null +++ b/arch/arm/plat-omap/common.c | |||
@@ -0,0 +1,135 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-omap/common.c | ||
3 | * | ||
4 | * Code common to all OMAP machines. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/config.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/pm.h> | ||
16 | #include <linux/console.h> | ||
17 | #include <linux/serial.h> | ||
18 | #include <linux/tty.h> | ||
19 | #include <linux/serial_8250.h> | ||
20 | #include <linux/serial_reg.h> | ||
21 | |||
22 | #include <asm/hardware.h> | ||
23 | #include <asm/system.h> | ||
24 | #include <asm/pgtable.h> | ||
25 | #include <asm/mach/map.h> | ||
26 | #include <asm/hardware/clock.h> | ||
27 | #include <asm/io.h> | ||
28 | #include <asm/mach-types.h> | ||
29 | |||
30 | #include <asm/arch/board.h> | ||
31 | #include <asm/arch/mux.h> | ||
32 | #include <asm/arch/fpga.h> | ||
33 | |||
34 | #include "clock.h" | ||
35 | |||
36 | #define NO_LENGTH_CHECK 0xffffffff | ||
37 | |||
38 | extern int omap_bootloader_tag_len; | ||
39 | extern u8 omap_bootloader_tag[]; | ||
40 | |||
41 | struct omap_board_config_kernel *omap_board_config; | ||
42 | int omap_board_config_size = 0; | ||
43 | |||
44 | static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out) | ||
45 | { | ||
46 | struct omap_board_config_kernel *kinfo = NULL; | ||
47 | int i; | ||
48 | |||
49 | #ifdef CONFIG_OMAP_BOOT_TAG | ||
50 | struct omap_board_config_entry *info = NULL; | ||
51 | |||
52 | if (omap_bootloader_tag_len > 4) | ||
53 | info = (struct omap_board_config_entry *) omap_bootloader_tag; | ||
54 | while (info != NULL) { | ||
55 | u8 *next; | ||
56 | |||
57 | if (info->tag == tag) { | ||
58 | if (skip == 0) | ||
59 | break; | ||
60 | skip--; | ||
61 | } | ||
62 | |||
63 | if ((info->len & 0x03) != 0) { | ||
64 | /* We bail out to avoid an alignment fault */ | ||
65 | printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n", | ||
66 | info->len, info->tag); | ||
67 | return NULL; | ||
68 | } | ||
69 | next = (u8 *) info + sizeof(*info) + info->len; | ||
70 | if (next >= omap_bootloader_tag + omap_bootloader_tag_len) | ||
71 | info = NULL; | ||
72 | else | ||
73 | info = (struct omap_board_config_entry *) next; | ||
74 | } | ||
75 | if (info != NULL) { | ||
76 | /* Check the length as a lame attempt to check for | ||
77 | * binary inconsistancy. */ | ||
78 | if (len != NO_LENGTH_CHECK) { | ||
79 | /* Word-align len */ | ||
80 | if (len & 0x03) | ||
81 | len = (len + 3) & ~0x03; | ||
82 | if (info->len != len) { | ||
83 | printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n", | ||
84 | tag, len, info->len); | ||
85 | return NULL; | ||
86 | } | ||
87 | } | ||
88 | if (len_out != NULL) | ||
89 | *len_out = info->len; | ||
90 | return info->data; | ||
91 | } | ||
92 | #endif | ||
93 | /* Try to find the config from the board-specific structures | ||
94 | * in the kernel. */ | ||
95 | for (i = 0; i < omap_board_config_size; i++) { | ||
96 | if (omap_board_config[i].tag == tag) { | ||
97 | kinfo = &omap_board_config[i]; | ||
98 | break; | ||
99 | } | ||
100 | } | ||
101 | if (kinfo == NULL) | ||
102 | return NULL; | ||
103 | return kinfo->data; | ||
104 | } | ||
105 | |||
106 | const void *__omap_get_config(u16 tag, size_t len, int nr) | ||
107 | { | ||
108 | return get_config(tag, len, nr, NULL); | ||
109 | } | ||
110 | EXPORT_SYMBOL(__omap_get_config); | ||
111 | |||
112 | const void *omap_get_var_config(u16 tag, size_t *len) | ||
113 | { | ||
114 | return get_config(tag, NO_LENGTH_CHECK, 0, len); | ||
115 | } | ||
116 | EXPORT_SYMBOL(omap_get_var_config); | ||
117 | |||
118 | static int __init omap_add_serial_console(void) | ||
119 | { | ||
120 | const struct omap_serial_console_config *info; | ||
121 | |||
122 | info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE, | ||
123 | struct omap_serial_console_config); | ||
124 | if (info != NULL && info->console_uart) { | ||
125 | static char speed[11], *opt = NULL; | ||
126 | |||
127 | if (info->console_speed) { | ||
128 | snprintf(speed, sizeof(speed), "%u", info->console_speed); | ||
129 | opt = speed; | ||
130 | } | ||
131 | return add_preferred_console("ttyS", info->console_uart - 1, opt); | ||
132 | } | ||
133 | return 0; | ||
134 | } | ||
135 | console_initcall(omap_add_serial_console); | ||
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c new file mode 100644 index 000000000000..409aac2c4b9d --- /dev/null +++ b/arch/arm/plat-omap/cpu-omap.c | |||
@@ -0,0 +1,128 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-omap/cpu-omap.c | ||
3 | * | ||
4 | * CPU frequency scaling for OMAP | ||
5 | * | ||
6 | * Copyright (C) 2005 Nokia Corporation | ||
7 | * Written by Tony Lindgren <tony@atomide.com> | ||
8 | * | ||
9 | * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | #include <linux/types.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include <linux/cpufreq.h> | ||
19 | #include <linux/delay.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/err.h> | ||
22 | |||
23 | #include <asm/hardware.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | #include <asm/io.h> | ||
26 | #include <asm/system.h> | ||
27 | |||
28 | #include <asm/hardware/clock.h> | ||
29 | |||
30 | /* TODO: Add support for SDRAM timing changes */ | ||
31 | |||
32 | int omap_verify_speed(struct cpufreq_policy *policy) | ||
33 | { | ||
34 | struct clk * mpu_clk; | ||
35 | |||
36 | if (policy->cpu) | ||
37 | return -EINVAL; | ||
38 | |||
39 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
40 | policy->cpuinfo.max_freq); | ||
41 | mpu_clk = clk_get(NULL, "mpu"); | ||
42 | if (IS_ERR(mpu_clk)) | ||
43 | return PTR_ERR(mpu_clk); | ||
44 | policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; | ||
45 | policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; | ||
46 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
47 | policy->cpuinfo.max_freq); | ||
48 | clk_put(mpu_clk); | ||
49 | |||
50 | return 0; | ||
51 | } | ||
52 | |||
53 | unsigned int omap_getspeed(unsigned int cpu) | ||
54 | { | ||
55 | struct clk * mpu_clk; | ||
56 | unsigned long rate; | ||
57 | |||
58 | if (cpu) | ||
59 | return 0; | ||
60 | |||
61 | mpu_clk = clk_get(NULL, "mpu"); | ||
62 | if (IS_ERR(mpu_clk)) | ||
63 | return 0; | ||
64 | rate = clk_get_rate(mpu_clk) / 1000; | ||
65 | clk_put(mpu_clk); | ||
66 | |||
67 | return rate; | ||
68 | } | ||
69 | |||
70 | static int omap_target(struct cpufreq_policy *policy, | ||
71 | unsigned int target_freq, | ||
72 | unsigned int relation) | ||
73 | { | ||
74 | struct clk * mpu_clk; | ||
75 | struct cpufreq_freqs freqs; | ||
76 | int ret = 0; | ||
77 | |||
78 | mpu_clk = clk_get(NULL, "mpu"); | ||
79 | if (IS_ERR(mpu_clk)) | ||
80 | return PTR_ERR(mpu_clk); | ||
81 | |||
82 | freqs.old = omap_getspeed(0); | ||
83 | freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; | ||
84 | freqs.cpu = 0; | ||
85 | |||
86 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
87 | ret = clk_set_rate(mpu_clk, target_freq * 1000); | ||
88 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
89 | clk_put(mpu_clk); | ||
90 | |||
91 | return ret; | ||
92 | } | ||
93 | |||
94 | static int __init omap_cpu_init(struct cpufreq_policy *policy) | ||
95 | { | ||
96 | struct clk * mpu_clk; | ||
97 | |||
98 | mpu_clk = clk_get(NULL, "mpu"); | ||
99 | if (IS_ERR(mpu_clk)) | ||
100 | return PTR_ERR(mpu_clk); | ||
101 | |||
102 | if (policy->cpu != 0) | ||
103 | return -EINVAL; | ||
104 | policy->cur = policy->min = policy->max = omap_getspeed(0); | ||
105 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | ||
106 | policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; | ||
107 | policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, 216000000) / 1000; | ||
108 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; | ||
109 | clk_put(mpu_clk); | ||
110 | |||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | static struct cpufreq_driver omap_driver = { | ||
115 | .flags = CPUFREQ_STICKY, | ||
116 | .verify = omap_verify_speed, | ||
117 | .target = omap_target, | ||
118 | .get = omap_getspeed, | ||
119 | .init = omap_cpu_init, | ||
120 | .name = "omap", | ||
121 | }; | ||
122 | |||
123 | static int __init omap_cpufreq_init(void) | ||
124 | { | ||
125 | return cpufreq_register_driver(&omap_driver); | ||
126 | } | ||
127 | |||
128 | arch_initcall(omap_cpufreq_init); | ||
diff --git a/arch/arm/mach-omap/dma.c b/arch/arm/plat-omap/dma.c index 7a9ebe80d6f8..c0a5c2fa42bd 100644 --- a/arch/arm/mach-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/omap/dma.c | 2 | * linux/arch/arm/plat-omap/dma.c |
3 | * | 3 | * |
4 | * Copyright (C) 2003 Nokia Corporation | 4 | * Copyright (C) 2003 Nokia Corporation |
5 | * Author: Juha Yrjölä <juha.yrjola@nokia.com> | 5 | * Author: Juha Yrjölä <juha.yrjola@nokia.com> |
@@ -794,10 +794,6 @@ static void set_b1_regs(void) | |||
794 | w = omap_readw(OMAP1610_DMA_LCD_CTRL); | 794 | w = omap_readw(OMAP1610_DMA_LCD_CTRL); |
795 | /* Always set the source port as SDRAM for now*/ | 795 | /* Always set the source port as SDRAM for now*/ |
796 | w &= ~(0x03 << 6); | 796 | w &= ~(0x03 << 6); |
797 | if (lcd_dma.ext_ctrl) | ||
798 | w |= 1 << 8; | ||
799 | else | ||
800 | w &= ~(1 << 8); | ||
801 | if (lcd_dma.callback != NULL) | 797 | if (lcd_dma.callback != NULL) |
802 | w |= 1 << 1; /* Block interrupt enable */ | 798 | w |= 1 << 1; /* Block interrupt enable */ |
803 | else | 799 | else |
@@ -889,9 +885,15 @@ void omap_enable_lcd_dma(void) | |||
889 | */ | 885 | */ |
890 | if (enable_1510_mode || !lcd_dma.ext_ctrl) | 886 | if (enable_1510_mode || !lcd_dma.ext_ctrl) |
891 | return; | 887 | return; |
888 | |||
889 | w = omap_readw(OMAP1610_DMA_LCD_CTRL); | ||
890 | w |= 1 << 8; | ||
891 | omap_writew(w, OMAP1610_DMA_LCD_CTRL); | ||
892 | |||
892 | w = omap_readw(OMAP1610_DMA_LCD_CCR); | 893 | w = omap_readw(OMAP1610_DMA_LCD_CCR); |
893 | w |= 1 << 7; | 894 | w |= 1 << 7; |
894 | omap_writew(w, OMAP1610_DMA_LCD_CCR); | 895 | omap_writew(w, OMAP1610_DMA_LCD_CCR); |
896 | |||
895 | lcd_dma.active = 1; | 897 | lcd_dma.active = 1; |
896 | } | 898 | } |
897 | 899 | ||
@@ -922,10 +924,19 @@ void omap_setup_lcd_dma(void) | |||
922 | 924 | ||
923 | void omap_stop_lcd_dma(void) | 925 | void omap_stop_lcd_dma(void) |
924 | { | 926 | { |
927 | u16 w; | ||
928 | |||
925 | lcd_dma.active = 0; | 929 | lcd_dma.active = 0; |
926 | if (!enable_1510_mode && lcd_dma.ext_ctrl) | 930 | if (enable_1510_mode || !lcd_dma.ext_ctrl) |
927 | omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~(1 << 7), | 931 | return; |
928 | OMAP1610_DMA_LCD_CCR); | 932 | |
933 | w = omap_readw(OMAP1610_DMA_LCD_CCR); | ||
934 | w &= ~(1 << 7); | ||
935 | omap_writew(w, OMAP1610_DMA_LCD_CCR); | ||
936 | |||
937 | w = omap_readw(OMAP1610_DMA_LCD_CTRL); | ||
938 | w &= ~(1 << 8); | ||
939 | omap_writew(w, OMAP1610_DMA_LCD_CTRL); | ||
929 | } | 940 | } |
930 | 941 | ||
931 | /* | 942 | /* |
@@ -972,6 +983,25 @@ dma_addr_t omap_get_dma_dst_pos(int lch) | |||
972 | (OMAP_DMA_CDSA_U(lch) << 16)); | 983 | (OMAP_DMA_CDSA_U(lch) << 16)); |
973 | } | 984 | } |
974 | 985 | ||
986 | int omap_dma_running(void) | ||
987 | { | ||
988 | int lch; | ||
989 | |||
990 | /* Check if LCD DMA is running */ | ||
991 | if (cpu_is_omap16xx()) | ||
992 | if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN) | ||
993 | return 1; | ||
994 | |||
995 | for (lch = 0; lch < dma_chan_count; lch++) { | ||
996 | u16 w; | ||
997 | |||
998 | w = omap_readw(OMAP_DMA_CCR(lch)); | ||
999 | if (w & OMAP_DMA_CCR_EN) | ||
1000 | return 1; | ||
1001 | } | ||
1002 | return 0; | ||
1003 | } | ||
1004 | |||
975 | static int __init omap_init_dma(void) | 1005 | static int __init omap_init_dma(void) |
976 | { | 1006 | { |
977 | int ch, r; | 1007 | int ch, r; |
diff --git a/arch/arm/mach-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 9045dfd469ad..1c85b4e536c2 100644 --- a/arch/arm/mach-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/gpio.c | 2 | * linux/arch/arm/plat-omap/gpio.c |
3 | * | 3 | * |
4 | * Support functions for OMAP GPIO | 4 | * Support functions for OMAP GPIO |
5 | * | 5 | * |
diff --git a/arch/arm/mach-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 7c4ad7713091..43567d5edddb 100644 --- a/arch/arm/mach-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/omap/mcbsp.c | 2 | * linux/arch/arm/plat-omap/mcbsp.c |
3 | * | 3 | * |
4 | * Copyright (C) 2004 Nokia Corporation | 4 | * Copyright (C) 2004 Nokia Corporation |
5 | * Author: Samuel Ortiz <samuel.ortiz@nokia.com> | 5 | * Author: Samuel Ortiz <samuel.ortiz@nokia.com> |
@@ -66,6 +66,7 @@ struct omap_mcbsp { | |||
66 | static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; | 66 | static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; |
67 | static struct clk *mcbsp_dsp_ck = 0; | 67 | static struct clk *mcbsp_dsp_ck = 0; |
68 | static struct clk *mcbsp_api_ck = 0; | 68 | static struct clk *mcbsp_api_ck = 0; |
69 | static struct clk *mcbsp_dspxor_ck = 0; | ||
69 | 70 | ||
70 | 71 | ||
71 | static void omap_mcbsp_dump_reg(u8 id) | 72 | static void omap_mcbsp_dump_reg(u8 id) |
@@ -175,7 +176,7 @@ static int omap_mcbsp_check(unsigned int id) | |||
175 | return 0; | 176 | return 0; |
176 | } | 177 | } |
177 | 178 | ||
178 | if (cpu_is_omap1510() || cpu_is_omap1610() || cpu_is_omap1710()) { | 179 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { |
179 | if (id > OMAP_MAX_MCBSP_COUNT) { | 180 | if (id > OMAP_MAX_MCBSP_COUNT) { |
180 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); | 181 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); |
181 | return -1; | 182 | return -1; |
@@ -191,15 +192,12 @@ static int omap_mcbsp_check(unsigned int id) | |||
191 | 192 | ||
192 | static void omap_mcbsp_dsp_request(void) | 193 | static void omap_mcbsp_dsp_request(void) |
193 | { | 194 | { |
194 | if (cpu_is_omap1510() || cpu_is_omap1610() || cpu_is_omap1710()) { | 195 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { |
195 | omap_writew((omap_readw(ARM_RSTCT1) | (1 << 1) | (1 << 2)), | 196 | clk_use(mcbsp_dsp_ck); |
196 | ARM_RSTCT1); | 197 | clk_use(mcbsp_api_ck); |
197 | clk_enable(mcbsp_dsp_ck); | ||
198 | clk_enable(mcbsp_api_ck); | ||
199 | 198 | ||
200 | /* enable 12MHz clock to mcbsp 1 & 3 */ | 199 | /* enable 12MHz clock to mcbsp 1 & 3 */ |
201 | __raw_writew(__raw_readw(DSP_IDLECT2) | (1 << EN_XORPCK), | 200 | clk_use(mcbsp_dspxor_ck); |
202 | DSP_IDLECT2); | ||
203 | __raw_writew(__raw_readw(DSP_RSTCT2) | 1 | 1 << 1, | 201 | __raw_writew(__raw_readw(DSP_RSTCT2) | 1 | 1 << 1, |
204 | DSP_RSTCT2); | 202 | DSP_RSTCT2); |
205 | } | 203 | } |
@@ -207,10 +205,13 @@ static void omap_mcbsp_dsp_request(void) | |||
207 | 205 | ||
208 | static void omap_mcbsp_dsp_free(void) | 206 | static void omap_mcbsp_dsp_free(void) |
209 | { | 207 | { |
210 | /* Useless for now */ | 208 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { |
209 | clk_unuse(mcbsp_dspxor_ck); | ||
210 | clk_unuse(mcbsp_dsp_ck); | ||
211 | clk_unuse(mcbsp_api_ck); | ||
212 | } | ||
211 | } | 213 | } |
212 | 214 | ||
213 | |||
214 | int omap_mcbsp_request(unsigned int id) | 215 | int omap_mcbsp_request(unsigned int id) |
215 | { | 216 | { |
216 | int err; | 217 | int err; |
@@ -350,6 +351,73 @@ void omap_mcbsp_stop(unsigned int id) | |||
350 | } | 351 | } |
351 | 352 | ||
352 | 353 | ||
354 | /* polled mcbsp i/o operations */ | ||
355 | int omap_mcbsp_pollwrite(unsigned int id, u16 buf) | ||
356 | { | ||
357 | u32 base = mcbsp[id].io_base; | ||
358 | writew(buf, base + OMAP_MCBSP_REG_DXR1); | ||
359 | /* if frame sync error - clear the error */ | ||
360 | if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) { | ||
361 | /* clear error */ | ||
362 | writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR), | ||
363 | base + OMAP_MCBSP_REG_SPCR2); | ||
364 | /* resend */ | ||
365 | return -1; | ||
366 | } else { | ||
367 | /* wait for transmit confirmation */ | ||
368 | int attemps = 0; | ||
369 | while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) { | ||
370 | if (attemps++ > 1000) { | ||
371 | writew(readw(base + OMAP_MCBSP_REG_SPCR2) & | ||
372 | (~XRST), | ||
373 | base + OMAP_MCBSP_REG_SPCR2); | ||
374 | udelay(10); | ||
375 | writew(readw(base + OMAP_MCBSP_REG_SPCR2) | | ||
376 | (XRST), | ||
377 | base + OMAP_MCBSP_REG_SPCR2); | ||
378 | udelay(10); | ||
379 | printk(KERN_ERR | ||
380 | " Could not write to McBSP Register\n"); | ||
381 | return -2; | ||
382 | } | ||
383 | } | ||
384 | } | ||
385 | return 0; | ||
386 | } | ||
387 | |||
388 | int omap_mcbsp_pollread(unsigned int id, u16 * buf) | ||
389 | { | ||
390 | u32 base = mcbsp[id].io_base; | ||
391 | /* if frame sync error - clear the error */ | ||
392 | if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) { | ||
393 | /* clear error */ | ||
394 | writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR), | ||
395 | base + OMAP_MCBSP_REG_SPCR1); | ||
396 | /* resend */ | ||
397 | return -1; | ||
398 | } else { | ||
399 | /* wait for recieve confirmation */ | ||
400 | int attemps = 0; | ||
401 | while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) { | ||
402 | if (attemps++ > 1000) { | ||
403 | writew(readw(base + OMAP_MCBSP_REG_SPCR1) & | ||
404 | (~RRST), | ||
405 | base + OMAP_MCBSP_REG_SPCR1); | ||
406 | udelay(10); | ||
407 | writew(readw(base + OMAP_MCBSP_REG_SPCR1) | | ||
408 | (RRST), | ||
409 | base + OMAP_MCBSP_REG_SPCR1); | ||
410 | udelay(10); | ||
411 | printk(KERN_ERR | ||
412 | " Could not read from McBSP Register\n"); | ||
413 | return -2; | ||
414 | } | ||
415 | } | ||
416 | } | ||
417 | *buf = readw(base + OMAP_MCBSP_REG_DRR1); | ||
418 | return 0; | ||
419 | } | ||
420 | |||
353 | /* | 421 | /* |
354 | * IRQ based word transmission. | 422 | * IRQ based word transmission. |
355 | */ | 423 | */ |
@@ -625,10 +693,15 @@ static int __init omap_mcbsp_init(void) | |||
625 | return PTR_ERR(mcbsp_dsp_ck); | 693 | return PTR_ERR(mcbsp_dsp_ck); |
626 | } | 694 | } |
627 | mcbsp_api_ck = clk_get(0, "api_ck"); | 695 | mcbsp_api_ck = clk_get(0, "api_ck"); |
628 | if (IS_ERR(mcbsp_dsp_ck)) { | 696 | if (IS_ERR(mcbsp_api_ck)) { |
629 | printk(KERN_ERR "mcbsp: could not acquire api_ck handle.\n"); | 697 | printk(KERN_ERR "mcbsp: could not acquire api_ck handle.\n"); |
630 | return PTR_ERR(mcbsp_api_ck); | 698 | return PTR_ERR(mcbsp_api_ck); |
631 | } | 699 | } |
700 | mcbsp_dspxor_ck = clk_get(0, "dspxor_ck"); | ||
701 | if (IS_ERR(mcbsp_dspxor_ck)) { | ||
702 | printk(KERN_ERR "mcbsp: could not acquire dspxor_ck handle.\n"); | ||
703 | return PTR_ERR(mcbsp_dspxor_ck); | ||
704 | } | ||
632 | 705 | ||
633 | #ifdef CONFIG_ARCH_OMAP730 | 706 | #ifdef CONFIG_ARCH_OMAP730 |
634 | if (cpu_is_omap730()) { | 707 | if (cpu_is_omap730()) { |
@@ -643,7 +716,7 @@ static int __init omap_mcbsp_init(void) | |||
643 | } | 716 | } |
644 | #endif | 717 | #endif |
645 | #if defined(CONFIG_ARCH_OMAP16XX) | 718 | #if defined(CONFIG_ARCH_OMAP16XX) |
646 | if (cpu_is_omap1610() || cpu_is_omap1710()) { | 719 | if (cpu_is_omap16xx()) { |
647 | mcbsp_info = mcbsp_1610; | 720 | mcbsp_info = mcbsp_1610; |
648 | mcbsp_count = ARRAY_SIZE(mcbsp_1610); | 721 | mcbsp_count = ARRAY_SIZE(mcbsp_1610); |
649 | } | 722 | } |
diff --git a/arch/arm/mach-omap/mux.c b/arch/arm/plat-omap/mux.c index bcf3c6e5ecd0..ea7b955b9c81 100644 --- a/arch/arm/mach-omap/mux.c +++ b/arch/arm/plat-omap/mux.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/mux.c | 2 | * linux/arch/arm/plat-omap/mux.c |
3 | * | 3 | * |
4 | * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h | 4 | * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h |
5 | * | 5 | * |
@@ -53,19 +53,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) | |||
53 | return -EINVAL; | 53 | return -EINVAL; |
54 | } | 54 | } |
55 | 55 | ||
56 | cfg = ®_cfg_table[reg_cfg]; | 56 | cfg = (reg_cfg_set *)®_cfg_table[reg_cfg]; |
57 | |||
58 | /* | ||
59 | * We do a pretty long section here with lock on, but pin muxing | ||
60 | * should only happen on driver init for each driver, so it's not time | ||
61 | * critical. | ||
62 | */ | ||
63 | spin_lock_irqsave(&mux_spin_lock, flags); | ||
64 | 57 | ||
65 | /* Check the mux register in question */ | 58 | /* Check the mux register in question */ |
66 | if (cfg->mux_reg) { | 59 | if (cfg->mux_reg) { |
67 | unsigned tmp1, tmp2; | 60 | unsigned tmp1, tmp2; |
68 | 61 | ||
62 | spin_lock_irqsave(&mux_spin_lock, flags); | ||
69 | reg_orig = omap_readl(cfg->mux_reg); | 63 | reg_orig = omap_readl(cfg->mux_reg); |
70 | 64 | ||
71 | /* The mux registers always seem to be 3 bits long */ | 65 | /* The mux registers always seem to be 3 bits long */ |
@@ -80,11 +74,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) | |||
80 | warn = 1; | 74 | warn = 1; |
81 | 75 | ||
82 | omap_writel(reg, cfg->mux_reg); | 76 | omap_writel(reg, cfg->mux_reg); |
77 | spin_unlock_irqrestore(&mux_spin_lock, flags); | ||
83 | } | 78 | } |
84 | 79 | ||
85 | /* Check for pull up or pull down selection on 1610 */ | 80 | /* Check for pull up or pull down selection on 1610 */ |
86 | if (!cpu_is_omap1510()) { | 81 | if (!cpu_is_omap1510()) { |
87 | if (cfg->pu_pd_reg && cfg->pull_val) { | 82 | if (cfg->pu_pd_reg && cfg->pull_val) { |
83 | spin_lock_irqsave(&mux_spin_lock, flags); | ||
88 | pu_pd_orig = omap_readl(cfg->pu_pd_reg); | 84 | pu_pd_orig = omap_readl(cfg->pu_pd_reg); |
89 | mask = 1 << cfg->pull_bit; | 85 | mask = 1 << cfg->pull_bit; |
90 | 86 | ||
@@ -100,11 +96,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) | |||
100 | pu_pd = pu_pd_orig & ~mask; | 96 | pu_pd = pu_pd_orig & ~mask; |
101 | } | 97 | } |
102 | omap_writel(pu_pd, cfg->pu_pd_reg); | 98 | omap_writel(pu_pd, cfg->pu_pd_reg); |
99 | spin_unlock_irqrestore(&mux_spin_lock, flags); | ||
103 | } | 100 | } |
104 | } | 101 | } |
105 | 102 | ||
106 | /* Check for an associated pull down register */ | 103 | /* Check for an associated pull down register */ |
107 | if (cfg->pull_reg) { | 104 | if (cfg->pull_reg) { |
105 | spin_lock_irqsave(&mux_spin_lock, flags); | ||
108 | pull_orig = omap_readl(cfg->pull_reg); | 106 | pull_orig = omap_readl(cfg->pull_reg); |
109 | mask = 1 << cfg->pull_bit; | 107 | mask = 1 << cfg->pull_bit; |
110 | 108 | ||
@@ -121,6 +119,7 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) | |||
121 | } | 119 | } |
122 | 120 | ||
123 | omap_writel(pull, cfg->pull_reg); | 121 | omap_writel(pull, cfg->pull_reg); |
122 | spin_unlock_irqrestore(&mux_spin_lock, flags); | ||
124 | } | 123 | } |
125 | 124 | ||
126 | if (warn) { | 125 | if (warn) { |
@@ -149,8 +148,6 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) | |||
149 | } | 148 | } |
150 | #endif | 149 | #endif |
151 | 150 | ||
152 | spin_unlock_irqrestore(&mux_spin_lock, flags); | ||
153 | |||
154 | #ifdef CONFIG_OMAP_MUX_ERRORS | 151 | #ifdef CONFIG_OMAP_MUX_ERRORS |
155 | return warn ? -ETXTBSY : 0; | 152 | return warn ? -ETXTBSY : 0; |
156 | #else | 153 | #else |
diff --git a/arch/arm/mach-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c index c9ced134a75d..1fb16f9edfd5 100644 --- a/arch/arm/mach-omap/ocpi.c +++ b/arch/arm/plat-omap/ocpi.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/ocpi.c | 2 | * linux/arch/arm/plat-omap/ocpi.c |
3 | * | 3 | * |
4 | * Minimal OCP bus support for omap16xx | 4 | * Minimal OCP bus support for omap16xx |
5 | * | 5 | * |
diff --git a/arch/arm/mach-omap/pm.c b/arch/arm/plat-omap/pm.c index 6b03ccdc1e92..e6536b16c385 100644 --- a/arch/arm/mach-omap/pm.c +++ b/arch/arm/plat-omap/pm.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/pm.c | 2 | * linux/arch/arm/plat-omap/pm.c |
3 | * | 3 | * |
4 | * OMAP Power Management Routines | 4 | * OMAP Power Management Routines |
5 | * | 5 | * |
diff --git a/arch/arm/mach-omap/sleep.S b/arch/arm/plat-omap/sleep.S index 4d426d105828..279490ce772b 100644 --- a/arch/arm/mach-omap/sleep.S +++ b/arch/arm/plat-omap/sleep.S | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/sleep.S | 2 | * linux/arch/arm/plat-omap/sleep.S |
3 | * | 3 | * |
4 | * Low-level OMAP1510/1610 sleep/wakeUp support | 4 | * Low-level OMAP1510/1610 sleep/wakeUp support |
5 | * | 5 | * |
diff --git a/arch/arm/mach-omap/usb.c b/arch/arm/plat-omap/usb.c index fd483ff9f8fe..25bc4a8dd763 100644 --- a/arch/arm/mach-omap/usb.c +++ b/arch/arm/plat-omap/usb.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-omap/usb.c -- platform level USB initialization | 2 | * arch/arm/plat-omap/usb.c -- platform level USB initialization |
3 | * | 3 | * |
4 | * Copyright (C) 2004 Texas Instruments, Inc. | 4 | * Copyright (C) 2004 Texas Instruments, Inc. |
5 | * | 5 | * |
@@ -326,7 +326,7 @@ static u64 ohci_dmamask = ~(u32)0; | |||
326 | static struct resource ohci_resources[] = { | 326 | static struct resource ohci_resources[] = { |
327 | { | 327 | { |
328 | .start = OMAP_OHCI_BASE, | 328 | .start = OMAP_OHCI_BASE, |
329 | .end = OMAP_OHCI_BASE + 4096, | 329 | .end = OMAP_OHCI_BASE + 4096 - 1, |
330 | .flags = IORESOURCE_MEM, | 330 | .flags = IORESOURCE_MEM, |
331 | }, | 331 | }, |
332 | { | 332 | { |
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig index d78bc13ebbb9..4b1329286242 100644 --- a/arch/sparc64/Kconfig +++ b/arch/sparc64/Kconfig | |||
@@ -43,6 +43,8 @@ config SPARC64_PAGE_SIZE_4MB | |||
43 | 43 | ||
44 | endchoice | 44 | endchoice |
45 | 45 | ||
46 | source kernel/Kconfig.hz | ||
47 | |||
46 | source "init/Kconfig" | 48 | source "init/Kconfig" |
47 | 49 | ||
48 | config SYSVIPC_COMPAT | 50 | config SYSVIPC_COMPAT |
diff --git a/arch/sparc64/kernel/dtlb_backend.S b/arch/sparc64/kernel/dtlb_backend.S index b73a3c858770..538522848ad4 100644 --- a/arch/sparc64/kernel/dtlb_backend.S +++ b/arch/sparc64/kernel/dtlb_backend.S | |||
@@ -16,7 +16,7 @@ | |||
16 | #elif PAGE_SHIFT == 19 | 16 | #elif PAGE_SHIFT == 19 |
17 | #define SZ_BITS _PAGE_SZ512K | 17 | #define SZ_BITS _PAGE_SZ512K |
18 | #elif PAGE_SHIFT == 22 | 18 | #elif PAGE_SHIFT == 22 |
19 | #define SZ_BITS _PAGE_SZ4M | 19 | #define SZ_BITS _PAGE_SZ4MB |
20 | #endif | 20 | #endif |
21 | 21 | ||
22 | #define VALID_SZ_BITS (_PAGE_VALID | SZ_BITS) | 22 | #define VALID_SZ_BITS (_PAGE_VALID | SZ_BITS) |
diff --git a/arch/xtensa/kernel/syscalls.c b/arch/xtensa/kernel/syscalls.c index 3540d8b119f3..7270509c44de 100644 --- a/arch/xtensa/kernel/syscalls.c +++ b/arch/xtensa/kernel/syscalls.c | |||
@@ -42,7 +42,6 @@ | |||
42 | #include <asm/mman.h> | 42 | #include <asm/mman.h> |
43 | #include <asm/shmparam.h> | 43 | #include <asm/shmparam.h> |
44 | #include <asm/page.h> | 44 | #include <asm/page.h> |
45 | #include <asm/ipc.h> | ||
46 | 45 | ||
47 | extern void do_syscall_trace(void); | 46 | extern void do_syscall_trace(void); |
48 | typedef int (*syscall_t)(void *a0,...); | 47 | typedef int (*syscall_t)(void *a0,...); |
diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c index 3256192dcde8..f9b956fb2b8b 100644 --- a/drivers/bluetooth/hci_vhci.c +++ b/drivers/bluetooth/hci_vhci.c | |||
@@ -120,7 +120,7 @@ static unsigned int hci_vhci_chr_poll(struct file *file, poll_table * wait) | |||
120 | 120 | ||
121 | poll_wait(file, &hci_vhci->read_wait, wait); | 121 | poll_wait(file, &hci_vhci->read_wait, wait); |
122 | 122 | ||
123 | if (skb_queue_len(&hci_vhci->readq)) | 123 | if (!skb_queue_empty(&hci_vhci->readq)) |
124 | return POLLIN | POLLRDNORM; | 124 | return POLLIN | POLLRDNORM; |
125 | 125 | ||
126 | return POLLOUT | POLLWRNORM; | 126 | return POLLOUT | POLLWRNORM; |
diff --git a/drivers/char/drm/Kconfig b/drivers/char/drm/Kconfig index c2b12eab67c9..123417e43040 100644 --- a/drivers/char/drm/Kconfig +++ b/drivers/char/drm/Kconfig | |||
@@ -96,3 +96,10 @@ config DRM_SIS | |||
96 | chipset. If M is selected the module will be called sis. AGP | 96 | chipset. If M is selected the module will be called sis. AGP |
97 | support is required for this driver to work. | 97 | support is required for this driver to work. |
98 | 98 | ||
99 | config DRM_VIA | ||
100 | tristate "Via unichrome video cards" | ||
101 | depends on DRM | ||
102 | help | ||
103 | Choose this option if you have a Via unichrome or compatible video | ||
104 | chipset. If M is selected the module will be called via. | ||
105 | |||
diff --git a/drivers/char/drm/Makefile b/drivers/char/drm/Makefile index 7444dec40b94..ddd941045b1f 100644 --- a/drivers/char/drm/Makefile +++ b/drivers/char/drm/Makefile | |||
@@ -18,10 +18,14 @@ i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o | |||
18 | radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o | 18 | radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o |
19 | ffb-objs := ffb_drv.o ffb_context.o | 19 | ffb-objs := ffb_drv.o ffb_context.o |
20 | sis-objs := sis_drv.o sis_ds.o sis_mm.o | 20 | sis-objs := sis_drv.o sis_ds.o sis_mm.o |
21 | via-objs := via_irq.o via_drv.o via_ds.o via_map.o via_mm.o via_dma.o via_verifier.o via_video.o | ||
21 | 22 | ||
22 | ifeq ($(CONFIG_COMPAT),y) | 23 | ifeq ($(CONFIG_COMPAT),y) |
23 | drm-objs += drm_ioc32.o | 24 | drm-objs += drm_ioc32.o |
24 | radeon-objs += radeon_ioc32.o | 25 | radeon-objs += radeon_ioc32.o |
26 | mga-objs += mga_ioc32.o | ||
27 | r128-objs += r128_ioc32.o | ||
28 | i915-objs += i915_ioc32.o | ||
25 | endif | 29 | endif |
26 | 30 | ||
27 | obj-$(CONFIG_DRM) += drm.o | 31 | obj-$(CONFIG_DRM) += drm.o |
@@ -35,4 +39,5 @@ obj-$(CONFIG_DRM_I830) += i830.o | |||
35 | obj-$(CONFIG_DRM_I915) += i915.o | 39 | obj-$(CONFIG_DRM_I915) += i915.o |
36 | obj-$(CONFIG_DRM_FFB) += ffb.o | 40 | obj-$(CONFIG_DRM_FFB) += ffb.o |
37 | obj-$(CONFIG_DRM_SIS) += sis.o | 41 | obj-$(CONFIG_DRM_SIS) += sis.o |
42 | obj-$(CONFIG_DRM_VIA) +=via.o | ||
38 | 43 | ||
diff --git a/drivers/char/drm/ati_pcigart.c b/drivers/char/drm/ati_pcigart.c index fdca1876ecd5..0aec5ef481b8 100644 --- a/drivers/char/drm/ati_pcigart.c +++ b/drivers/char/drm/ati_pcigart.c | |||
@@ -52,7 +52,7 @@ | |||
52 | # define ATI_MAX_PCIGART_PAGES 8192 /**< 32 MB aperture, 4K pages */ | 52 | # define ATI_MAX_PCIGART_PAGES 8192 /**< 32 MB aperture, 4K pages */ |
53 | # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ | 53 | # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ |
54 | 54 | ||
55 | unsigned long drm_ati_alloc_pcigart_table( void ) | 55 | static unsigned long drm_ati_alloc_pcigart_table( void ) |
56 | { | 56 | { |
57 | unsigned long address; | 57 | unsigned long address; |
58 | struct page *page; | 58 | struct page *page; |
diff --git a/drivers/char/drm/drm.h b/drivers/char/drm/drm.h index 587305282ea8..e8371dd87fbc 100644 --- a/drivers/char/drm/drm.h +++ b/drivers/char/drm/drm.h | |||
@@ -38,7 +38,9 @@ | |||
38 | #define _DRM_H_ | 38 | #define _DRM_H_ |
39 | 39 | ||
40 | #if defined(__linux__) | 40 | #if defined(__linux__) |
41 | #if defined(__KERNEL__) | ||
41 | #include <linux/config.h> | 42 | #include <linux/config.h> |
43 | #endif | ||
42 | #include <asm/ioctl.h> /* For _IO* macros */ | 44 | #include <asm/ioctl.h> /* For _IO* macros */ |
43 | #define DRM_IOCTL_NR(n) _IOC_NR(n) | 45 | #define DRM_IOCTL_NR(n) _IOC_NR(n) |
44 | #define DRM_IOC_VOID _IOC_NONE | 46 | #define DRM_IOC_VOID _IOC_NONE |
diff --git a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h index b04ddf12a0ff..5df09cc8c6db 100644 --- a/drivers/char/drm/drmP.h +++ b/drivers/char/drm/drmP.h | |||
@@ -774,8 +774,6 @@ extern int drm_cpu_valid( void ); | |||
774 | /* Driver support (drm_drv.h) */ | 774 | /* Driver support (drm_drv.h) */ |
775 | extern int drm_init(struct drm_driver *driver); | 775 | extern int drm_init(struct drm_driver *driver); |
776 | extern void drm_exit(struct drm_driver *driver); | 776 | extern void drm_exit(struct drm_driver *driver); |
777 | extern int drm_version(struct inode *inode, struct file *filp, | ||
778 | unsigned int cmd, unsigned long arg); | ||
779 | extern int drm_ioctl(struct inode *inode, struct file *filp, | 777 | extern int drm_ioctl(struct inode *inode, struct file *filp, |
780 | unsigned int cmd, unsigned long arg); | 778 | unsigned int cmd, unsigned long arg); |
781 | extern long drm_compat_ioctl(struct file *filp, | 779 | extern long drm_compat_ioctl(struct file *filp, |
@@ -785,28 +783,19 @@ extern int drm_takedown(drm_device_t * dev); | |||
785 | /* Device support (drm_fops.h) */ | 783 | /* Device support (drm_fops.h) */ |
786 | extern int drm_open(struct inode *inode, struct file *filp); | 784 | extern int drm_open(struct inode *inode, struct file *filp); |
787 | extern int drm_stub_open(struct inode *inode, struct file *filp); | 785 | extern int drm_stub_open(struct inode *inode, struct file *filp); |
788 | extern int drm_open_helper(struct inode *inode, struct file *filp, | ||
789 | drm_device_t *dev); | ||
790 | extern int drm_flush(struct file *filp); | 786 | extern int drm_flush(struct file *filp); |
791 | extern int drm_fasync(int fd, struct file *filp, int on); | 787 | extern int drm_fasync(int fd, struct file *filp, int on); |
792 | extern int drm_release(struct inode *inode, struct file *filp); | 788 | extern int drm_release(struct inode *inode, struct file *filp); |
793 | 789 | ||
794 | /* Mapping support (drm_vm.h) */ | 790 | /* Mapping support (drm_vm.h) */ |
795 | extern void drm_vm_open(struct vm_area_struct *vma); | ||
796 | extern void drm_vm_close(struct vm_area_struct *vma); | ||
797 | extern void drm_vm_shm_close(struct vm_area_struct *vma); | ||
798 | extern int drm_mmap_dma(struct file *filp, | ||
799 | struct vm_area_struct *vma); | ||
800 | extern int drm_mmap(struct file *filp, struct vm_area_struct *vma); | 791 | extern int drm_mmap(struct file *filp, struct vm_area_struct *vma); |
801 | extern unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait); | 792 | extern unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait); |
802 | extern ssize_t drm_read(struct file *filp, char __user *buf, size_t count, loff_t *off); | ||
803 | 793 | ||
804 | /* Memory management support (drm_memory.h) */ | 794 | /* Memory management support (drm_memory.h) */ |
805 | #include "drm_memory.h" | 795 | #include "drm_memory.h" |
806 | extern void drm_mem_init(void); | 796 | extern void drm_mem_init(void); |
807 | extern int drm_mem_info(char *buf, char **start, off_t offset, | 797 | extern int drm_mem_info(char *buf, char **start, off_t offset, |
808 | int request, int *eof, void *data); | 798 | int request, int *eof, void *data); |
809 | extern void *drm_calloc(size_t nmemb, size_t size, int area); | ||
810 | extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, | 799 | extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, |
811 | int area); | 800 | int area); |
812 | extern unsigned long drm_alloc_pages(int order, int area); | 801 | extern unsigned long drm_alloc_pages(int order, int area); |
@@ -854,9 +843,6 @@ extern int drm_newctx( struct inode *inode, struct file *filp, | |||
854 | extern int drm_rmctx( struct inode *inode, struct file *filp, | 843 | extern int drm_rmctx( struct inode *inode, struct file *filp, |
855 | unsigned int cmd, unsigned long arg ); | 844 | unsigned int cmd, unsigned long arg ); |
856 | 845 | ||
857 | extern int drm_context_switch(drm_device_t *dev, int old, int new); | ||
858 | extern int drm_context_switch_complete(drm_device_t *dev, int new); | ||
859 | |||
860 | extern int drm_ctxbitmap_init( drm_device_t *dev ); | 846 | extern int drm_ctxbitmap_init( drm_device_t *dev ); |
861 | extern void drm_ctxbitmap_cleanup( drm_device_t *dev ); | 847 | extern void drm_ctxbitmap_cleanup( drm_device_t *dev ); |
862 | extern void drm_ctxbitmap_free( drm_device_t *dev, int ctx_handle ); | 848 | extern void drm_ctxbitmap_free( drm_device_t *dev, int ctx_handle ); |
@@ -874,9 +860,6 @@ extern int drm_rmdraw(struct inode *inode, struct file *filp, | |||
874 | 860 | ||
875 | 861 | ||
876 | /* Authentication IOCTL support (drm_auth.h) */ | 862 | /* Authentication IOCTL support (drm_auth.h) */ |
877 | extern int drm_add_magic(drm_device_t *dev, drm_file_t *priv, | ||
878 | drm_magic_t magic); | ||
879 | extern int drm_remove_magic(drm_device_t *dev, drm_magic_t magic); | ||
880 | extern int drm_getmagic(struct inode *inode, struct file *filp, | 863 | extern int drm_getmagic(struct inode *inode, struct file *filp, |
881 | unsigned int cmd, unsigned long arg); | 864 | unsigned int cmd, unsigned long arg); |
882 | extern int drm_authmagic(struct inode *inode, struct file *filp, | 865 | extern int drm_authmagic(struct inode *inode, struct file *filp, |
@@ -893,13 +876,9 @@ extern int drm_unlock(struct inode *inode, struct file *filp, | |||
893 | unsigned int cmd, unsigned long arg); | 876 | unsigned int cmd, unsigned long arg); |
894 | extern int drm_lock_take(__volatile__ unsigned int *lock, | 877 | extern int drm_lock_take(__volatile__ unsigned int *lock, |
895 | unsigned int context); | 878 | unsigned int context); |
896 | extern int drm_lock_transfer(drm_device_t *dev, | ||
897 | __volatile__ unsigned int *lock, | ||
898 | unsigned int context); | ||
899 | extern int drm_lock_free(drm_device_t *dev, | 879 | extern int drm_lock_free(drm_device_t *dev, |
900 | __volatile__ unsigned int *lock, | 880 | __volatile__ unsigned int *lock, |
901 | unsigned int context); | 881 | unsigned int context); |
902 | extern int drm_notifier(void *priv); | ||
903 | 882 | ||
904 | /* Buffer management support (drm_bufs.h) */ | 883 | /* Buffer management support (drm_bufs.h) */ |
905 | extern int drm_order( unsigned long size ); | 884 | extern int drm_order( unsigned long size ); |
@@ -927,7 +906,6 @@ extern void drm_core_reclaim_buffers(drm_device_t *dev, struct file *filp); | |||
927 | /* IRQ support (drm_irq.h) */ | 906 | /* IRQ support (drm_irq.h) */ |
928 | extern int drm_control( struct inode *inode, struct file *filp, | 907 | extern int drm_control( struct inode *inode, struct file *filp, |
929 | unsigned int cmd, unsigned long arg ); | 908 | unsigned int cmd, unsigned long arg ); |
930 | extern int drm_irq_install( drm_device_t *dev ); | ||
931 | extern int drm_irq_uninstall( drm_device_t *dev ); | 909 | extern int drm_irq_uninstall( drm_device_t *dev ); |
932 | extern irqreturn_t drm_irq_handler( DRM_IRQ_ARGS ); | 910 | extern irqreturn_t drm_irq_handler( DRM_IRQ_ARGS ); |
933 | extern void drm_driver_irq_preinstall( drm_device_t *dev ); | 911 | extern void drm_driver_irq_preinstall( drm_device_t *dev ); |
@@ -967,7 +945,6 @@ extern int drm_agp_unbind_memory(DRM_AGP_MEM *handle); | |||
967 | extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, | 945 | extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, |
968 | struct drm_driver *driver); | 946 | struct drm_driver *driver); |
969 | extern int drm_put_dev(drm_device_t * dev); | 947 | extern int drm_put_dev(drm_device_t * dev); |
970 | extern int drm_get_head(drm_device_t * dev, drm_head_t *head); | ||
971 | extern int drm_put_head(drm_head_t * head); | 948 | extern int drm_put_head(drm_head_t * head); |
972 | extern unsigned int drm_debug; | 949 | extern unsigned int drm_debug; |
973 | extern unsigned int drm_cards_limit; | 950 | extern unsigned int drm_cards_limit; |
@@ -1064,9 +1041,16 @@ static __inline__ void drm_free(void *pt, size_t size, int area) | |||
1064 | { | 1041 | { |
1065 | kfree(pt); | 1042 | kfree(pt); |
1066 | } | 1043 | } |
1044 | |||
1045 | /** Wrapper around kcalloc() */ | ||
1046 | static __inline__ void *drm_calloc(size_t nmemb, size_t size, int area) | ||
1047 | { | ||
1048 | return kcalloc(nmemb, size, GFP_KERNEL); | ||
1049 | } | ||
1067 | #else | 1050 | #else |
1068 | extern void *drm_alloc(size_t size, int area); | 1051 | extern void *drm_alloc(size_t size, int area); |
1069 | extern void drm_free(void *pt, size_t size, int area); | 1052 | extern void drm_free(void *pt, size_t size, int area); |
1053 | extern void *drm_calloc(size_t nmemb, size_t size, int area); | ||
1070 | #endif | 1054 | #endif |
1071 | 1055 | ||
1072 | /*@}*/ | 1056 | /*@}*/ |
diff --git a/drivers/char/drm/drm_auth.c b/drivers/char/drm/drm_auth.c index b428761c4e91..dd140bca8f71 100644 --- a/drivers/char/drm/drm_auth.c +++ b/drivers/char/drm/drm_auth.c | |||
@@ -87,7 +87,7 @@ static drm_file_t *drm_find_file(drm_device_t *dev, drm_magic_t magic) | |||
87 | * associated the magic number hash key in drm_device::magiclist, while holding | 87 | * associated the magic number hash key in drm_device::magiclist, while holding |
88 | * the drm_device::struct_sem lock. | 88 | * the drm_device::struct_sem lock. |
89 | */ | 89 | */ |
90 | int drm_add_magic(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic) | 90 | static int drm_add_magic(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic) |
91 | { | 91 | { |
92 | int hash; | 92 | int hash; |
93 | drm_magic_entry_t *entry; | 93 | drm_magic_entry_t *entry; |
@@ -124,7 +124,7 @@ int drm_add_magic(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic) | |||
124 | * Searches and unlinks the entry in drm_device::magiclist with the magic | 124 | * Searches and unlinks the entry in drm_device::magiclist with the magic |
125 | * number hash key, while holding the drm_device::struct_sem lock. | 125 | * number hash key, while holding the drm_device::struct_sem lock. |
126 | */ | 126 | */ |
127 | int drm_remove_magic(drm_device_t *dev, drm_magic_t magic) | 127 | static int drm_remove_magic(drm_device_t *dev, drm_magic_t magic) |
128 | { | 128 | { |
129 | drm_magic_entry_t *prev = NULL; | 129 | drm_magic_entry_t *prev = NULL; |
130 | drm_magic_entry_t *pt; | 130 | drm_magic_entry_t *pt; |
diff --git a/drivers/char/drm/drm_bufs.c b/drivers/char/drm/drm_bufs.c index 3407380b865a..4c6191d231b8 100644 --- a/drivers/char/drm/drm_bufs.c +++ b/drivers/char/drm/drm_bufs.c | |||
@@ -356,8 +356,8 @@ static void drm_cleanup_buf_error(drm_device_t *dev, drm_buf_entry_t *entry) | |||
356 | * reallocates the buffer list of the same size order to accommodate the new | 356 | * reallocates the buffer list of the same size order to accommodate the new |
357 | * buffers. | 357 | * buffers. |
358 | */ | 358 | */ |
359 | int drm_addbufs_agp( struct inode *inode, struct file *filp, | 359 | static int drm_addbufs_agp( struct inode *inode, struct file *filp, |
360 | unsigned int cmd, unsigned long arg ) | 360 | unsigned int cmd, unsigned long arg ) |
361 | { | 361 | { |
362 | drm_file_t *priv = filp->private_data; | 362 | drm_file_t *priv = filp->private_data; |
363 | drm_device_t *dev = priv->head->dev; | 363 | drm_device_t *dev = priv->head->dev; |
@@ -521,8 +521,8 @@ int drm_addbufs_agp( struct inode *inode, struct file *filp, | |||
521 | } | 521 | } |
522 | #endif /* __OS_HAS_AGP */ | 522 | #endif /* __OS_HAS_AGP */ |
523 | 523 | ||
524 | int drm_addbufs_pci( struct inode *inode, struct file *filp, | 524 | static int drm_addbufs_pci( struct inode *inode, struct file *filp, |
525 | unsigned int cmd, unsigned long arg ) | 525 | unsigned int cmd, unsigned long arg ) |
526 | { | 526 | { |
527 | drm_file_t *priv = filp->private_data; | 527 | drm_file_t *priv = filp->private_data; |
528 | drm_device_t *dev = priv->head->dev; | 528 | drm_device_t *dev = priv->head->dev; |
@@ -751,8 +751,8 @@ int drm_addbufs_pci( struct inode *inode, struct file *filp, | |||
751 | 751 | ||
752 | } | 752 | } |
753 | 753 | ||
754 | int drm_addbufs_sg( struct inode *inode, struct file *filp, | 754 | static int drm_addbufs_sg( struct inode *inode, struct file *filp, |
755 | unsigned int cmd, unsigned long arg ) | 755 | unsigned int cmd, unsigned long arg ) |
756 | { | 756 | { |
757 | drm_file_t *priv = filp->private_data; | 757 | drm_file_t *priv = filp->private_data; |
758 | drm_device_t *dev = priv->head->dev; | 758 | drm_device_t *dev = priv->head->dev; |
diff --git a/drivers/char/drm/drm_context.c b/drivers/char/drm/drm_context.c index fdf661f234ed..a7cfabd1ca2e 100644 --- a/drivers/char/drm/drm_context.c +++ b/drivers/char/drm/drm_context.c | |||
@@ -84,7 +84,7 @@ failed: | |||
84 | * drm_device::context_sareas to accommodate the new entry while holding the | 84 | * drm_device::context_sareas to accommodate the new entry while holding the |
85 | * drm_device::struct_sem lock. | 85 | * drm_device::struct_sem lock. |
86 | */ | 86 | */ |
87 | int drm_ctxbitmap_next( drm_device_t *dev ) | 87 | static int drm_ctxbitmap_next( drm_device_t *dev ) |
88 | { | 88 | { |
89 | int bit; | 89 | int bit; |
90 | 90 | ||
@@ -326,7 +326,7 @@ int drm_context_switch( drm_device_t *dev, int old, int new ) | |||
326 | * hardware lock is held, clears the drm_device::context_flag and wakes up | 326 | * hardware lock is held, clears the drm_device::context_flag and wakes up |
327 | * drm_device::context_wait. | 327 | * drm_device::context_wait. |
328 | */ | 328 | */ |
329 | int drm_context_switch_complete( drm_device_t *dev, int new ) | 329 | static int drm_context_switch_complete( drm_device_t *dev, int new ) |
330 | { | 330 | { |
331 | dev->last_context = new; /* PRE/POST: This is the _only_ writer. */ | 331 | dev->last_context = new; /* PRE/POST: This is the _only_ writer. */ |
332 | dev->last_switch = jiffies; | 332 | dev->last_switch = jiffies; |
diff --git a/drivers/char/drm/drm_drv.c b/drivers/char/drm/drm_drv.c index 1e37ed0c6b8d..3333c250c4d9 100644 --- a/drivers/char/drm/drm_drv.c +++ b/drivers/char/drm/drm_drv.c | |||
@@ -51,8 +51,11 @@ | |||
51 | #include "drmP.h" | 51 | #include "drmP.h" |
52 | #include "drm_core.h" | 52 | #include "drm_core.h" |
53 | 53 | ||
54 | static int drm_version(struct inode *inode, struct file *filp, | ||
55 | unsigned int cmd, unsigned long arg); | ||
56 | |||
54 | /** Ioctl table */ | 57 | /** Ioctl table */ |
55 | drm_ioctl_desc_t drm_ioctls[] = { | 58 | static drm_ioctl_desc_t drm_ioctls[] = { |
56 | [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { drm_version, 0, 0 }, | 59 | [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { drm_version, 0, 0 }, |
57 | [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 }, | 60 | [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 }, |
58 | [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 }, | 61 | [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 }, |
@@ -447,8 +450,8 @@ module_exit( drm_core_exit ); | |||
447 | * | 450 | * |
448 | * Fills in the version information in \p arg. | 451 | * Fills in the version information in \p arg. |
449 | */ | 452 | */ |
450 | int drm_version( struct inode *inode, struct file *filp, | 453 | static int drm_version( struct inode *inode, struct file *filp, |
451 | unsigned int cmd, unsigned long arg ) | 454 | unsigned int cmd, unsigned long arg ) |
452 | { | 455 | { |
453 | drm_file_t *priv = filp->private_data; | 456 | drm_file_t *priv = filp->private_data; |
454 | drm_device_t *dev = priv->head->dev; | 457 | drm_device_t *dev = priv->head->dev; |
diff --git a/drivers/char/drm/drm_fops.c b/drivers/char/drm/drm_fops.c index 906794247aeb..10e64fde8d78 100644 --- a/drivers/char/drm/drm_fops.c +++ b/drivers/char/drm/drm_fops.c | |||
@@ -37,6 +37,8 @@ | |||
37 | #include "drmP.h" | 37 | #include "drmP.h" |
38 | #include <linux/poll.h> | 38 | #include <linux/poll.h> |
39 | 39 | ||
40 | static int drm_open_helper(struct inode *inode, struct file *filp, drm_device_t *dev); | ||
41 | |||
40 | static int drm_setup( drm_device_t *dev ) | 42 | static int drm_setup( drm_device_t *dev ) |
41 | { | 43 | { |
42 | int i; | 44 | int i; |
@@ -251,7 +253,7 @@ int drm_release( struct inode *inode, struct file *filp ) | |||
251 | } | 253 | } |
252 | } | 254 | } |
253 | 255 | ||
254 | if (drm_core_check_feature(dev, DRIVER_HAVE_DMA)) | 256 | if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) && !dev->driver->release) |
255 | { | 257 | { |
256 | dev->driver->reclaim_buffers(dev, filp); | 258 | dev->driver->reclaim_buffers(dev, filp); |
257 | } | 259 | } |
@@ -259,7 +261,7 @@ int drm_release( struct inode *inode, struct file *filp ) | |||
259 | drm_fasync( -1, filp, 0 ); | 261 | drm_fasync( -1, filp, 0 ); |
260 | 262 | ||
261 | down( &dev->ctxlist_sem ); | 263 | down( &dev->ctxlist_sem ); |
262 | if ( !list_empty( &dev->ctxlist->head ) ) { | 264 | if ( dev->ctxlist && (!list_empty(&dev->ctxlist->head))) { |
263 | drm_ctx_list_t *pos, *n; | 265 | drm_ctx_list_t *pos, *n; |
264 | 266 | ||
265 | list_for_each_entry_safe( pos, n, &dev->ctxlist->head, head ) { | 267 | list_for_each_entry_safe( pos, n, &dev->ctxlist->head, head ) { |
@@ -341,7 +343,7 @@ EXPORT_SYMBOL(drm_release); | |||
341 | * Creates and initializes a drm_file structure for the file private data in \p | 343 | * Creates and initializes a drm_file structure for the file private data in \p |
342 | * filp and add it into the double linked list in \p dev. | 344 | * filp and add it into the double linked list in \p dev. |
343 | */ | 345 | */ |
344 | int drm_open_helper(struct inode *inode, struct file *filp, drm_device_t *dev) | 346 | static int drm_open_helper(struct inode *inode, struct file *filp, drm_device_t *dev) |
345 | { | 347 | { |
346 | int minor = iminor(inode); | 348 | int minor = iminor(inode); |
347 | drm_file_t *priv; | 349 | drm_file_t *priv; |
@@ -443,9 +445,3 @@ unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait) | |||
443 | } | 445 | } |
444 | EXPORT_SYMBOL(drm_poll); | 446 | EXPORT_SYMBOL(drm_poll); |
445 | 447 | ||
446 | |||
447 | /** No-op. */ | ||
448 | ssize_t drm_read(struct file *filp, char __user *buf, size_t count, loff_t *off) | ||
449 | { | ||
450 | return 0; | ||
451 | } | ||
diff --git a/drivers/char/drm/drm_irq.c b/drivers/char/drm/drm_irq.c index 2e236ebcf27b..cdd4aecd25e2 100644 --- a/drivers/char/drm/drm_irq.c +++ b/drivers/char/drm/drm_irq.c | |||
@@ -89,7 +89,7 @@ int drm_irq_by_busid(struct inode *inode, struct file *filp, | |||
89 | * \c drm_driver_irq_preinstall() and \c drm_driver_irq_postinstall() functions | 89 | * \c drm_driver_irq_preinstall() and \c drm_driver_irq_postinstall() functions |
90 | * before and after the installation. | 90 | * before and after the installation. |
91 | */ | 91 | */ |
92 | int drm_irq_install( drm_device_t *dev ) | 92 | static int drm_irq_install( drm_device_t *dev ) |
93 | { | 93 | { |
94 | int ret; | 94 | int ret; |
95 | unsigned long sh_flags=0; | 95 | unsigned long sh_flags=0; |
diff --git a/drivers/char/drm/drm_lock.c b/drivers/char/drm/drm_lock.c index d0d6fc661625..4702d863bcc6 100644 --- a/drivers/char/drm/drm_lock.c +++ b/drivers/char/drm/drm_lock.c | |||
@@ -35,6 +35,11 @@ | |||
35 | 35 | ||
36 | #include "drmP.h" | 36 | #include "drmP.h" |
37 | 37 | ||
38 | static int drm_lock_transfer(drm_device_t *dev, | ||
39 | __volatile__ unsigned int *lock, | ||
40 | unsigned int context); | ||
41 | static int drm_notifier(void *priv); | ||
42 | |||
38 | /** | 43 | /** |
39 | * Lock ioctl. | 44 | * Lock ioctl. |
40 | * | 45 | * |
@@ -225,8 +230,9 @@ int drm_lock_take(__volatile__ unsigned int *lock, unsigned int context) | |||
225 | * Resets the lock file pointer. | 230 | * Resets the lock file pointer. |
226 | * Marks the lock as held by the given context, via the \p cmpxchg instruction. | 231 | * Marks the lock as held by the given context, via the \p cmpxchg instruction. |
227 | */ | 232 | */ |
228 | int drm_lock_transfer(drm_device_t *dev, | 233 | static int drm_lock_transfer(drm_device_t *dev, |
229 | __volatile__ unsigned int *lock, unsigned int context) | 234 | __volatile__ unsigned int *lock, |
235 | unsigned int context) | ||
230 | { | 236 | { |
231 | unsigned int old, new, prev; | 237 | unsigned int old, new, prev; |
232 | 238 | ||
@@ -282,7 +288,7 @@ int drm_lock_free(drm_device_t *dev, | |||
282 | * \return one if the signal should be delivered normally, or zero if the | 288 | * \return one if the signal should be delivered normally, or zero if the |
283 | * signal should be blocked. | 289 | * signal should be blocked. |
284 | */ | 290 | */ |
285 | int drm_notifier(void *priv) | 291 | static int drm_notifier(void *priv) |
286 | { | 292 | { |
287 | drm_sigdata_t *s = (drm_sigdata_t *)priv; | 293 | drm_sigdata_t *s = (drm_sigdata_t *)priv; |
288 | unsigned int old, new, prev; | 294 | unsigned int old, new, prev; |
diff --git a/drivers/char/drm/drm_memory.c b/drivers/char/drm/drm_memory.c index 7f53f756c052..ace3d42f4407 100644 --- a/drivers/char/drm/drm_memory.c +++ b/drivers/char/drm/drm_memory.c | |||
@@ -65,19 +65,6 @@ int drm_mem_info(char *buf, char **start, off_t offset, | |||
65 | return 0; | 65 | return 0; |
66 | } | 66 | } |
67 | 67 | ||
68 | /** Wrapper around kmalloc() */ | ||
69 | void *drm_calloc(size_t nmemb, size_t size, int area) | ||
70 | { | ||
71 | void *addr; | ||
72 | |||
73 | addr = kmalloc(size * nmemb, GFP_KERNEL); | ||
74 | if (addr != NULL) | ||
75 | memset((void *)addr, 0, size * nmemb); | ||
76 | |||
77 | return addr; | ||
78 | } | ||
79 | EXPORT_SYMBOL(drm_calloc); | ||
80 | |||
81 | /** Wrapper around kmalloc() and kfree() */ | 68 | /** Wrapper around kmalloc() and kfree() */ |
82 | void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area) | 69 | void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area) |
83 | { | 70 | { |
diff --git a/drivers/char/drm/drm_pciids.h b/drivers/char/drm/drm_pciids.h index 11c6950158b3..70ca4fa55c9d 100644 --- a/drivers/char/drm/drm_pciids.h +++ b/drivers/char/drm/drm_pciids.h | |||
@@ -223,3 +223,10 @@ | |||
223 | {0x8086, 0x2772, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | 223 | {0x8086, 0x2772, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ |
224 | {0, 0, 0} | 224 | {0, 0, 0} |
225 | 225 | ||
226 | #define viadrv_PCI_IDS \ | ||
227 | {0x1106, 0x3022, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | ||
228 | {0x1106, 0x3122, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | ||
229 | {0x1106, 0x7205, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | ||
230 | {0x1106, 0x7204, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | ||
231 | {0, 0, 0} | ||
232 | |||
diff --git a/drivers/char/drm/drm_proc.c b/drivers/char/drm/drm_proc.c index 6e06e8c6a516..4774087d2e9e 100644 --- a/drivers/char/drm/drm_proc.c +++ b/drivers/char/drm/drm_proc.c | |||
@@ -57,7 +57,7 @@ static int drm_vma_info(char *buf, char **start, off_t offset, | |||
57 | /** | 57 | /** |
58 | * Proc file list. | 58 | * Proc file list. |
59 | */ | 59 | */ |
60 | struct drm_proc_list { | 60 | static struct drm_proc_list { |
61 | const char *name; /**< file name */ | 61 | const char *name; /**< file name */ |
62 | int (*f)(char *, char **, off_t, int, int *, void *); /**< proc callback*/ | 62 | int (*f)(char *, char **, off_t, int, int *, void *); /**< proc callback*/ |
63 | } drm_proc_list[] = { | 63 | } drm_proc_list[] = { |
diff --git a/drivers/char/drm/drm_stub.c b/drivers/char/drm/drm_stub.c index 8ccbdef7bb3e..48829a1a086a 100644 --- a/drivers/char/drm/drm_stub.c +++ b/drivers/char/drm/drm_stub.c | |||
@@ -157,52 +157,6 @@ int drm_stub_open(struct inode *inode, struct file *filp) | |||
157 | return err; | 157 | return err; |
158 | } | 158 | } |
159 | 159 | ||
160 | |||
161 | /** | ||
162 | * Register. | ||
163 | * | ||
164 | * \param pdev - PCI device structure | ||
165 | * \param ent entry from the PCI ID table with device type flags | ||
166 | * \return zero on success or a negative number on failure. | ||
167 | * | ||
168 | * Attempt to gets inter module "drm" information. If we are first | ||
169 | * then register the character device and inter module information. | ||
170 | * Try and register, if we fail to register, backout previous work. | ||
171 | */ | ||
172 | int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, | ||
173 | struct drm_driver *driver) | ||
174 | { | ||
175 | drm_device_t *dev; | ||
176 | int ret; | ||
177 | |||
178 | DRM_DEBUG("\n"); | ||
179 | |||
180 | dev = drm_calloc(1, sizeof(*dev), DRM_MEM_STUB); | ||
181 | if (!dev) | ||
182 | return -ENOMEM; | ||
183 | |||
184 | pci_enable_device(pdev); | ||
185 | |||
186 | if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) { | ||
187 | printk(KERN_ERR "DRM: Fill_in_dev failed.\n"); | ||
188 | goto err_g1; | ||
189 | } | ||
190 | if ((ret = drm_get_head(dev, &dev->primary))) | ||
191 | goto err_g1; | ||
192 | |||
193 | /* postinit is a required function to display the signon banner */ | ||
194 | /* drivers add secondary heads here if needed */ | ||
195 | if ((ret = dev->driver->postinit(dev, ent->driver_data))) | ||
196 | goto err_g1; | ||
197 | |||
198 | return 0; | ||
199 | |||
200 | err_g1: | ||
201 | drm_free(dev, sizeof(*dev), DRM_MEM_STUB); | ||
202 | return ret; | ||
203 | } | ||
204 | EXPORT_SYMBOL(drm_get_dev); | ||
205 | |||
206 | /** | 160 | /** |
207 | * Get a secondary minor number. | 161 | * Get a secondary minor number. |
208 | * | 162 | * |
@@ -214,7 +168,7 @@ EXPORT_SYMBOL(drm_get_dev); | |||
214 | * create the proc init entry via proc_init(). This routines assigns | 168 | * create the proc init entry via proc_init(). This routines assigns |
215 | * minor numbers to secondary heads of multi-headed cards | 169 | * minor numbers to secondary heads of multi-headed cards |
216 | */ | 170 | */ |
217 | int drm_get_head(drm_device_t *dev, drm_head_t *head) | 171 | static int drm_get_head(drm_device_t *dev, drm_head_t *head) |
218 | { | 172 | { |
219 | drm_head_t **heads = drm_heads; | 173 | drm_head_t **heads = drm_heads; |
220 | int ret; | 174 | int ret; |
@@ -262,6 +216,50 @@ err_g1: | |||
262 | return ret; | 216 | return ret; |
263 | } | 217 | } |
264 | 218 | ||
219 | /** | ||
220 | * Register. | ||
221 | * | ||
222 | * \param pdev - PCI device structure | ||
223 | * \param ent entry from the PCI ID table with device type flags | ||
224 | * \return zero on success or a negative number on failure. | ||
225 | * | ||
226 | * Attempt to gets inter module "drm" information. If we are first | ||
227 | * then register the character device and inter module information. | ||
228 | * Try and register, if we fail to register, backout previous work. | ||
229 | */ | ||
230 | int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, | ||
231 | struct drm_driver *driver) | ||
232 | { | ||
233 | drm_device_t *dev; | ||
234 | int ret; | ||
235 | |||
236 | DRM_DEBUG("\n"); | ||
237 | |||
238 | dev = drm_calloc(1, sizeof(*dev), DRM_MEM_STUB); | ||
239 | if (!dev) | ||
240 | return -ENOMEM; | ||
241 | |||
242 | pci_enable_device(pdev); | ||
243 | |||
244 | if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) { | ||
245 | printk(KERN_ERR "DRM: Fill_in_dev failed.\n"); | ||
246 | goto err_g1; | ||
247 | } | ||
248 | if ((ret = drm_get_head(dev, &dev->primary))) | ||
249 | goto err_g1; | ||
250 | |||
251 | /* postinit is a required function to display the signon banner */ | ||
252 | /* drivers add secondary heads here if needed */ | ||
253 | if ((ret = dev->driver->postinit(dev, ent->driver_data))) | ||
254 | goto err_g1; | ||
255 | |||
256 | return 0; | ||
257 | |||
258 | err_g1: | ||
259 | drm_free(dev, sizeof(*dev), DRM_MEM_STUB); | ||
260 | return ret; | ||
261 | } | ||
262 | EXPORT_SYMBOL(drm_get_dev); | ||
265 | 263 | ||
266 | /** | 264 | /** |
267 | * Put a device minor number. | 265 | * Put a device minor number. |
diff --git a/drivers/char/drm/drm_vm.c b/drivers/char/drm/drm_vm.c index fc72f30f312b..621220f3f372 100644 --- a/drivers/char/drm/drm_vm.c +++ b/drivers/char/drm/drm_vm.c | |||
@@ -38,6 +38,8 @@ | |||
38 | #include <linux/efi.h> | 38 | #include <linux/efi.h> |
39 | #endif | 39 | #endif |
40 | 40 | ||
41 | static void drm_vm_open(struct vm_area_struct *vma); | ||
42 | static void drm_vm_close(struct vm_area_struct *vma); | ||
41 | 43 | ||
42 | /** | 44 | /** |
43 | * \c nopage method for AGP virtual memory. | 45 | * \c nopage method for AGP virtual memory. |
@@ -163,7 +165,7 @@ static __inline__ struct page *drm_do_vm_shm_nopage(struct vm_area_struct *vma, | |||
163 | * Deletes map information if we are the last | 165 | * Deletes map information if we are the last |
164 | * person to close a mapping and it's not in the global maplist. | 166 | * person to close a mapping and it's not in the global maplist. |
165 | */ | 167 | */ |
166 | void drm_vm_shm_close(struct vm_area_struct *vma) | 168 | static void drm_vm_shm_close(struct vm_area_struct *vma) |
167 | { | 169 | { |
168 | drm_file_t *priv = vma->vm_file->private_data; | 170 | drm_file_t *priv = vma->vm_file->private_data; |
169 | drm_device_t *dev = priv->head->dev; | 171 | drm_device_t *dev = priv->head->dev; |
@@ -399,7 +401,7 @@ static struct vm_operations_struct drm_vm_sg_ops = { | |||
399 | * Create a new drm_vma_entry structure as the \p vma private data entry and | 401 | * Create a new drm_vma_entry structure as the \p vma private data entry and |
400 | * add it to drm_device::vmalist. | 402 | * add it to drm_device::vmalist. |
401 | */ | 403 | */ |
402 | void drm_vm_open(struct vm_area_struct *vma) | 404 | static void drm_vm_open(struct vm_area_struct *vma) |
403 | { | 405 | { |
404 | drm_file_t *priv = vma->vm_file->private_data; | 406 | drm_file_t *priv = vma->vm_file->private_data; |
405 | drm_device_t *dev = priv->head->dev; | 407 | drm_device_t *dev = priv->head->dev; |
@@ -428,7 +430,7 @@ void drm_vm_open(struct vm_area_struct *vma) | |||
428 | * Search the \p vma private data entry in drm_device::vmalist, unlink it, and | 430 | * Search the \p vma private data entry in drm_device::vmalist, unlink it, and |
429 | * free it. | 431 | * free it. |
430 | */ | 432 | */ |
431 | void drm_vm_close(struct vm_area_struct *vma) | 433 | static void drm_vm_close(struct vm_area_struct *vma) |
432 | { | 434 | { |
433 | drm_file_t *priv = vma->vm_file->private_data; | 435 | drm_file_t *priv = vma->vm_file->private_data; |
434 | drm_device_t *dev = priv->head->dev; | 436 | drm_device_t *dev = priv->head->dev; |
@@ -463,7 +465,7 @@ void drm_vm_close(struct vm_area_struct *vma) | |||
463 | * Sets the virtual memory area operations structure to vm_dma_ops, the file | 465 | * Sets the virtual memory area operations structure to vm_dma_ops, the file |
464 | * pointer, and calls vm_open(). | 466 | * pointer, and calls vm_open(). |
465 | */ | 467 | */ |
466 | int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma) | 468 | static int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma) |
467 | { | 469 | { |
468 | drm_file_t *priv = filp->private_data; | 470 | drm_file_t *priv = filp->private_data; |
469 | drm_device_t *dev; | 471 | drm_device_t *dev; |
diff --git a/drivers/char/drm/i810_dma.c b/drivers/char/drm/i810_dma.c index 24857cc6c23b..18e0b7622893 100644 --- a/drivers/char/drm/i810_dma.c +++ b/drivers/char/drm/i810_dma.c | |||
@@ -90,16 +90,7 @@ static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf) | |||
90 | return 0; | 90 | return 0; |
91 | } | 91 | } |
92 | 92 | ||
93 | static struct file_operations i810_buffer_fops = { | 93 | static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) |
94 | .open = drm_open, | ||
95 | .flush = drm_flush, | ||
96 | .release = drm_release, | ||
97 | .ioctl = drm_ioctl, | ||
98 | .mmap = i810_mmap_buffers, | ||
99 | .fasync = drm_fasync, | ||
100 | }; | ||
101 | |||
102 | int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) | ||
103 | { | 94 | { |
104 | drm_file_t *priv = filp->private_data; | 95 | drm_file_t *priv = filp->private_data; |
105 | drm_device_t *dev; | 96 | drm_device_t *dev; |
@@ -126,6 +117,15 @@ int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) | |||
126 | return 0; | 117 | return 0; |
127 | } | 118 | } |
128 | 119 | ||
120 | static struct file_operations i810_buffer_fops = { | ||
121 | .open = drm_open, | ||
122 | .flush = drm_flush, | ||
123 | .release = drm_release, | ||
124 | .ioctl = drm_ioctl, | ||
125 | .mmap = i810_mmap_buffers, | ||
126 | .fasync = drm_fasync, | ||
127 | }; | ||
128 | |||
129 | static int i810_map_buffer(drm_buf_t *buf, struct file *filp) | 129 | static int i810_map_buffer(drm_buf_t *buf, struct file *filp) |
130 | { | 130 | { |
131 | drm_file_t *priv = filp->private_data; | 131 | drm_file_t *priv = filp->private_data; |
@@ -1003,8 +1003,8 @@ void i810_reclaim_buffers(drm_device_t *dev, struct file *filp) | |||
1003 | } | 1003 | } |
1004 | } | 1004 | } |
1005 | 1005 | ||
1006 | int i810_flush_ioctl(struct inode *inode, struct file *filp, | 1006 | static int i810_flush_ioctl(struct inode *inode, struct file *filp, |
1007 | unsigned int cmd, unsigned long arg) | 1007 | unsigned int cmd, unsigned long arg) |
1008 | { | 1008 | { |
1009 | drm_file_t *priv = filp->private_data; | 1009 | drm_file_t *priv = filp->private_data; |
1010 | drm_device_t *dev = priv->head->dev; | 1010 | drm_device_t *dev = priv->head->dev; |
diff --git a/drivers/char/drm/i810_drv.h b/drivers/char/drm/i810_drv.h index fa23ca454e57..1b40538d1725 100644 --- a/drivers/char/drm/i810_drv.h +++ b/drivers/char/drm/i810_drv.h | |||
@@ -115,7 +115,6 @@ typedef struct drm_i810_private { | |||
115 | 115 | ||
116 | /* i810_dma.c */ | 116 | /* i810_dma.c */ |
117 | extern void i810_reclaim_buffers(drm_device_t *dev, struct file *filp); | 117 | extern void i810_reclaim_buffers(drm_device_t *dev, struct file *filp); |
118 | extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma); | ||
119 | 118 | ||
120 | extern int i810_driver_dma_quiescent(drm_device_t *dev); | 119 | extern int i810_driver_dma_quiescent(drm_device_t *dev); |
121 | extern void i810_driver_release(drm_device_t *dev, struct file *filp); | 120 | extern void i810_driver_release(drm_device_t *dev, struct file *filp); |
diff --git a/drivers/char/drm/i830_dma.c b/drivers/char/drm/i830_dma.c index 98adccf8e434..dc7733035864 100644 --- a/drivers/char/drm/i830_dma.c +++ b/drivers/char/drm/i830_dma.c | |||
@@ -92,16 +92,7 @@ static int i830_freelist_put(drm_device_t *dev, drm_buf_t *buf) | |||
92 | return 0; | 92 | return 0; |
93 | } | 93 | } |
94 | 94 | ||
95 | static struct file_operations i830_buffer_fops = { | 95 | static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma) |
96 | .open = drm_open, | ||
97 | .flush = drm_flush, | ||
98 | .release = drm_release, | ||
99 | .ioctl = drm_ioctl, | ||
100 | .mmap = i830_mmap_buffers, | ||
101 | .fasync = drm_fasync, | ||
102 | }; | ||
103 | |||
104 | int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma) | ||
105 | { | 96 | { |
106 | drm_file_t *priv = filp->private_data; | 97 | drm_file_t *priv = filp->private_data; |
107 | drm_device_t *dev; | 98 | drm_device_t *dev; |
@@ -128,6 +119,15 @@ int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma) | |||
128 | return 0; | 119 | return 0; |
129 | } | 120 | } |
130 | 121 | ||
122 | static struct file_operations i830_buffer_fops = { | ||
123 | .open = drm_open, | ||
124 | .flush = drm_flush, | ||
125 | .release = drm_release, | ||
126 | .ioctl = drm_ioctl, | ||
127 | .mmap = i830_mmap_buffers, | ||
128 | .fasync = drm_fasync, | ||
129 | }; | ||
130 | |||
131 | static int i830_map_buffer(drm_buf_t *buf, struct file *filp) | 131 | static int i830_map_buffer(drm_buf_t *buf, struct file *filp) |
132 | { | 132 | { |
133 | drm_file_t *priv = filp->private_data; | 133 | drm_file_t *priv = filp->private_data; |
diff --git a/drivers/char/drm/i830_drv.c b/drivers/char/drm/i830_drv.c index aa80ad6a5ee0..bc36be76b8b2 100644 --- a/drivers/char/drm/i830_drv.c +++ b/drivers/char/drm/i830_drv.c | |||
@@ -40,7 +40,7 @@ | |||
40 | 40 | ||
41 | #include "drm_pciids.h" | 41 | #include "drm_pciids.h" |
42 | 42 | ||
43 | int postinit( struct drm_device *dev, unsigned long flags ) | 43 | static int postinit( struct drm_device *dev, unsigned long flags ) |
44 | { | 44 | { |
45 | dev->counters += 4; | 45 | dev->counters += 4; |
46 | dev->types[6] = _DRM_STAT_IRQ; | 46 | dev->types[6] = _DRM_STAT_IRQ; |
diff --git a/drivers/char/drm/i830_drv.h b/drivers/char/drm/i830_drv.h index d4b2d093d6ab..df7746131dea 100644 --- a/drivers/char/drm/i830_drv.h +++ b/drivers/char/drm/i830_drv.h | |||
@@ -123,8 +123,6 @@ typedef struct drm_i830_private { | |||
123 | /* i830_dma.c */ | 123 | /* i830_dma.c */ |
124 | extern void i830_reclaim_buffers(drm_device_t *dev, struct file *filp); | 124 | extern void i830_reclaim_buffers(drm_device_t *dev, struct file *filp); |
125 | 125 | ||
126 | extern int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma); | ||
127 | |||
128 | /* i830_irq.c */ | 126 | /* i830_irq.c */ |
129 | extern int i830_irq_emit( struct inode *inode, struct file *filp, | 127 | extern int i830_irq_emit( struct inode *inode, struct file *filp, |
130 | unsigned int cmd, unsigned long arg ); | 128 | unsigned int cmd, unsigned long arg ); |
diff --git a/drivers/char/drm/i830_irq.c b/drivers/char/drm/i830_irq.c index 6d7729ffe2dc..a5923e5d0a77 100644 --- a/drivers/char/drm/i830_irq.c +++ b/drivers/char/drm/i830_irq.c | |||
@@ -54,8 +54,7 @@ irqreturn_t i830_driver_irq_handler( DRM_IRQ_ARGS ) | |||
54 | return IRQ_HANDLED; | 54 | return IRQ_HANDLED; |
55 | } | 55 | } |
56 | 56 | ||
57 | 57 | static int i830_emit_irq(drm_device_t *dev) | |
58 | int i830_emit_irq(drm_device_t *dev) | ||
59 | { | 58 | { |
60 | drm_i830_private_t *dev_priv = dev->dev_private; | 59 | drm_i830_private_t *dev_priv = dev->dev_private; |
61 | RING_LOCALS; | 60 | RING_LOCALS; |
@@ -73,7 +72,7 @@ int i830_emit_irq(drm_device_t *dev) | |||
73 | } | 72 | } |
74 | 73 | ||
75 | 74 | ||
76 | int i830_wait_irq(drm_device_t *dev, int irq_nr) | 75 | static int i830_wait_irq(drm_device_t *dev, int irq_nr) |
77 | { | 76 | { |
78 | drm_i830_private_t *dev_priv = | 77 | drm_i830_private_t *dev_priv = |
79 | (drm_i830_private_t *)dev->dev_private; | 78 | (drm_i830_private_t *)dev->dev_private; |
diff --git a/drivers/char/drm/i915_dma.c b/drivers/char/drm/i915_dma.c index b5903f9f1423..acf9e52a9507 100644 --- a/drivers/char/drm/i915_dma.c +++ b/drivers/char/drm/i915_dma.c | |||
@@ -32,23 +32,6 @@ | |||
32 | #include "i915_drm.h" | 32 | #include "i915_drm.h" |
33 | #include "i915_drv.h" | 33 | #include "i915_drv.h" |
34 | 34 | ||
35 | drm_ioctl_desc_t i915_ioctls[] = { | ||
36 | [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, 1, 1}, | ||
37 | [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, 1, 0}, | ||
38 | [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, 1, 0}, | ||
39 | [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, 1, 0}, | ||
40 | [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, 1, 0}, | ||
41 | [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, 1, 0}, | ||
42 | [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, 1, 0}, | ||
43 | [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, 1, 1}, | ||
44 | [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, 1, 0}, | ||
45 | [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, 1, 0}, | ||
46 | [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, 1, 1}, | ||
47 | [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, 1, 0} | ||
48 | }; | ||
49 | |||
50 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); | ||
51 | |||
52 | /* Really want an OS-independent resettable timer. Would like to have | 35 | /* Really want an OS-independent resettable timer. Would like to have |
53 | * this loop run for (eg) 3 sec, but have the timer reset every time | 36 | * this loop run for (eg) 3 sec, but have the timer reset every time |
54 | * the head pointer changes, so that EBUSY only happens if the ring | 37 | * the head pointer changes, so that EBUSY only happens if the ring |
@@ -95,7 +78,7 @@ void i915_kernel_lost_context(drm_device_t * dev) | |||
95 | dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY; | 78 | dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY; |
96 | } | 79 | } |
97 | 80 | ||
98 | int i915_dma_cleanup(drm_device_t * dev) | 81 | static int i915_dma_cleanup(drm_device_t * dev) |
99 | { | 82 | { |
100 | /* Make sure interrupts are disabled here because the uninstall ioctl | 83 | /* Make sure interrupts are disabled here because the uninstall ioctl |
101 | * may not have been called from userspace and after dev_private | 84 | * may not have been called from userspace and after dev_private |
@@ -247,7 +230,7 @@ static int i915_resume(drm_device_t * dev) | |||
247 | return 0; | 230 | return 0; |
248 | } | 231 | } |
249 | 232 | ||
250 | int i915_dma_init(DRM_IOCTL_ARGS) | 233 | static int i915_dma_init(DRM_IOCTL_ARGS) |
251 | { | 234 | { |
252 | DRM_DEVICE; | 235 | DRM_DEVICE; |
253 | drm_i915_private_t *dev_priv; | 236 | drm_i915_private_t *dev_priv; |
@@ -558,7 +541,7 @@ static int i915_quiescent(drm_device_t * dev) | |||
558 | return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__); | 541 | return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__); |
559 | } | 542 | } |
560 | 543 | ||
561 | int i915_flush_ioctl(DRM_IOCTL_ARGS) | 544 | static int i915_flush_ioctl(DRM_IOCTL_ARGS) |
562 | { | 545 | { |
563 | DRM_DEVICE; | 546 | DRM_DEVICE; |
564 | 547 | ||
@@ -567,7 +550,7 @@ int i915_flush_ioctl(DRM_IOCTL_ARGS) | |||
567 | return i915_quiescent(dev); | 550 | return i915_quiescent(dev); |
568 | } | 551 | } |
569 | 552 | ||
570 | int i915_batchbuffer(DRM_IOCTL_ARGS) | 553 | static int i915_batchbuffer(DRM_IOCTL_ARGS) |
571 | { | 554 | { |
572 | DRM_DEVICE; | 555 | DRM_DEVICE; |
573 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | 556 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
@@ -601,7 +584,7 @@ int i915_batchbuffer(DRM_IOCTL_ARGS) | |||
601 | return ret; | 584 | return ret; |
602 | } | 585 | } |
603 | 586 | ||
604 | int i915_cmdbuffer(DRM_IOCTL_ARGS) | 587 | static int i915_cmdbuffer(DRM_IOCTL_ARGS) |
605 | { | 588 | { |
606 | DRM_DEVICE; | 589 | DRM_DEVICE; |
607 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | 590 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
@@ -637,18 +620,7 @@ int i915_cmdbuffer(DRM_IOCTL_ARGS) | |||
637 | return 0; | 620 | return 0; |
638 | } | 621 | } |
639 | 622 | ||
640 | int i915_do_cleanup_pageflip(drm_device_t * dev) | 623 | static int i915_flip_bufs(DRM_IOCTL_ARGS) |
641 | { | ||
642 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
643 | |||
644 | DRM_DEBUG("%s\n", __FUNCTION__); | ||
645 | if (dev_priv->current_page != 0) | ||
646 | i915_dispatch_flip(dev); | ||
647 | |||
648 | return 0; | ||
649 | } | ||
650 | |||
651 | int i915_flip_bufs(DRM_IOCTL_ARGS) | ||
652 | { | 624 | { |
653 | DRM_DEVICE; | 625 | DRM_DEVICE; |
654 | 626 | ||
@@ -659,7 +631,7 @@ int i915_flip_bufs(DRM_IOCTL_ARGS) | |||
659 | return i915_dispatch_flip(dev); | 631 | return i915_dispatch_flip(dev); |
660 | } | 632 | } |
661 | 633 | ||
662 | int i915_getparam(DRM_IOCTL_ARGS) | 634 | static int i915_getparam(DRM_IOCTL_ARGS) |
663 | { | 635 | { |
664 | DRM_DEVICE; | 636 | DRM_DEVICE; |
665 | drm_i915_private_t *dev_priv = dev->dev_private; | 637 | drm_i915_private_t *dev_priv = dev->dev_private; |
@@ -694,7 +666,7 @@ int i915_getparam(DRM_IOCTL_ARGS) | |||
694 | return 0; | 666 | return 0; |
695 | } | 667 | } |
696 | 668 | ||
697 | int i915_setparam(DRM_IOCTL_ARGS) | 669 | static int i915_setparam(DRM_IOCTL_ARGS) |
698 | { | 670 | { |
699 | DRM_DEVICE; | 671 | DRM_DEVICE; |
700 | drm_i915_private_t *dev_priv = dev->dev_private; | 672 | drm_i915_private_t *dev_priv = dev->dev_private; |
@@ -743,3 +715,19 @@ void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp) | |||
743 | } | 715 | } |
744 | } | 716 | } |
745 | 717 | ||
718 | drm_ioctl_desc_t i915_ioctls[] = { | ||
719 | [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, 1, 1}, | ||
720 | [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, 1, 0}, | ||
721 | [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, 1, 0}, | ||
722 | [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, 1, 0}, | ||
723 | [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, 1, 0}, | ||
724 | [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, 1, 0}, | ||
725 | [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, 1, 0}, | ||
726 | [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, 1, 1}, | ||
727 | [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, 1, 0}, | ||
728 | [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, 1, 0}, | ||
729 | [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, 1, 1}, | ||
730 | [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, 1, 0} | ||
731 | }; | ||
732 | |||
733 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); | ||
diff --git a/drivers/char/drm/i915_drv.c b/drivers/char/drm/i915_drv.c index e6a9e1d1d283..1f59d3fc79bc 100644 --- a/drivers/char/drm/i915_drv.c +++ b/drivers/char/drm/i915_drv.c | |||
@@ -34,7 +34,7 @@ | |||
34 | 34 | ||
35 | #include "drm_pciids.h" | 35 | #include "drm_pciids.h" |
36 | 36 | ||
37 | int postinit( struct drm_device *dev, unsigned long flags ) | 37 | static int postinit( struct drm_device *dev, unsigned long flags ) |
38 | { | 38 | { |
39 | dev->counters += 4; | 39 | dev->counters += 4; |
40 | dev->types[6] = _DRM_STAT_IRQ; | 40 | dev->types[6] = _DRM_STAT_IRQ; |
@@ -97,6 +97,9 @@ static struct drm_driver driver = { | |||
97 | .mmap = drm_mmap, | 97 | .mmap = drm_mmap, |
98 | .poll = drm_poll, | 98 | .poll = drm_poll, |
99 | .fasync = drm_fasync, | 99 | .fasync = drm_fasync, |
100 | #ifdef CONFIG_COMPAT | ||
101 | .compat_ioctl = i915_compat_ioctl, | ||
102 | #endif | ||
100 | }, | 103 | }, |
101 | .pci_driver = { | 104 | .pci_driver = { |
102 | .name = DRIVER_NAME, | 105 | .name = DRIVER_NAME, |
diff --git a/drivers/char/drm/i915_drv.h b/drivers/char/drm/i915_drv.h index fa940d64b85d..9c37d2367dd5 100644 --- a/drivers/char/drm/i915_drv.h +++ b/drivers/char/drm/i915_drv.h | |||
@@ -99,14 +99,6 @@ typedef struct drm_i915_private { | |||
99 | } drm_i915_private_t; | 99 | } drm_i915_private_t; |
100 | 100 | ||
101 | /* i915_dma.c */ | 101 | /* i915_dma.c */ |
102 | extern int i915_dma_init(DRM_IOCTL_ARGS); | ||
103 | extern int i915_dma_cleanup(drm_device_t * dev); | ||
104 | extern int i915_flush_ioctl(DRM_IOCTL_ARGS); | ||
105 | extern int i915_batchbuffer(DRM_IOCTL_ARGS); | ||
106 | extern int i915_flip_bufs(DRM_IOCTL_ARGS); | ||
107 | extern int i915_getparam(DRM_IOCTL_ARGS); | ||
108 | extern int i915_setparam(DRM_IOCTL_ARGS); | ||
109 | extern int i915_cmdbuffer(DRM_IOCTL_ARGS); | ||
110 | extern void i915_kernel_lost_context(drm_device_t * dev); | 102 | extern void i915_kernel_lost_context(drm_device_t * dev); |
111 | extern void i915_driver_pretakedown(drm_device_t *dev); | 103 | extern void i915_driver_pretakedown(drm_device_t *dev); |
112 | extern void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp); | 104 | extern void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp); |
@@ -114,8 +106,6 @@ extern void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp); | |||
114 | /* i915_irq.c */ | 106 | /* i915_irq.c */ |
115 | extern int i915_irq_emit(DRM_IOCTL_ARGS); | 107 | extern int i915_irq_emit(DRM_IOCTL_ARGS); |
116 | extern int i915_irq_wait(DRM_IOCTL_ARGS); | 108 | extern int i915_irq_wait(DRM_IOCTL_ARGS); |
117 | extern int i915_wait_irq(drm_device_t * dev, int irq_nr); | ||
118 | extern int i915_emit_irq(drm_device_t * dev); | ||
119 | 109 | ||
120 | extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS); | 110 | extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS); |
121 | extern void i915_driver_irq_preinstall(drm_device_t *dev); | 111 | extern void i915_driver_irq_preinstall(drm_device_t *dev); |
@@ -130,6 +120,10 @@ extern void i915_mem_takedown(struct mem_block **heap); | |||
130 | extern void i915_mem_release(drm_device_t * dev, | 120 | extern void i915_mem_release(drm_device_t * dev, |
131 | DRMFILE filp, struct mem_block *heap); | 121 | DRMFILE filp, struct mem_block *heap); |
132 | 122 | ||
123 | extern long i915_compat_ioctl(struct file *filp, unsigned int cmd, | ||
124 | unsigned long arg); | ||
125 | |||
126 | |||
133 | #define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, reg) | 127 | #define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, reg) |
134 | #define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, reg, val) | 128 | #define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, reg, val) |
135 | #define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg) | 129 | #define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg) |
diff --git a/drivers/char/drm/i915_ioc32.c b/drivers/char/drm/i915_ioc32.c new file mode 100644 index 000000000000..fe009e1b3a3f --- /dev/null +++ b/drivers/char/drm/i915_ioc32.c | |||
@@ -0,0 +1,221 @@ | |||
1 | /** | ||
2 | * \file i915_ioc32.c | ||
3 | * | ||
4 | * 32-bit ioctl compatibility routines for the i915 DRM. | ||
5 | * | ||
6 | * \author Alan Hourihane <alanh@fairlite.demon.co.uk> | ||
7 | * | ||
8 | * | ||
9 | * Copyright (C) Paul Mackerras 2005 | ||
10 | * Copyright (C) Alan Hourihane 2005 | ||
11 | * All Rights Reserved. | ||
12 | * | ||
13 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
14 | * copy of this software and associated documentation files (the "Software"), | ||
15 | * to deal in the Software without restriction, including without limitation | ||
16 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
17 | * and/or sell copies of the Software, and to permit persons to whom the | ||
18 | * Software is furnished to do so, subject to the following conditions: | ||
19 | * | ||
20 | * The above copyright notice and this permission notice (including the next | ||
21 | * paragraph) shall be included in all copies or substantial portions of the | ||
22 | * Software. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
25 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
26 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
27 | * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | ||
28 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
29 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | ||
30 | * IN THE SOFTWARE. | ||
31 | */ | ||
32 | #include <linux/compat.h> | ||
33 | #include <linux/ioctl32.h> | ||
34 | |||
35 | #include "drmP.h" | ||
36 | #include "drm.h" | ||
37 | #include "i915_drm.h" | ||
38 | |||
39 | typedef struct _drm_i915_batchbuffer32 { | ||
40 | int start; /* agp offset */ | ||
41 | int used; /* nr bytes in use */ | ||
42 | int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ | ||
43 | int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ | ||
44 | int num_cliprects; /* mulitpass with multiple cliprects? */ | ||
45 | u32 cliprects; /* pointer to userspace cliprects */ | ||
46 | } drm_i915_batchbuffer32_t; | ||
47 | |||
48 | static int compat_i915_batchbuffer(struct file *file, unsigned int cmd, | ||
49 | unsigned long arg) | ||
50 | { | ||
51 | drm_i915_batchbuffer32_t batchbuffer32; | ||
52 | drm_i915_batchbuffer_t __user *batchbuffer; | ||
53 | |||
54 | if (copy_from_user(&batchbuffer32, (void __user *)arg, sizeof(batchbuffer32))) | ||
55 | return -EFAULT; | ||
56 | |||
57 | batchbuffer = compat_alloc_user_space(sizeof(*batchbuffer)); | ||
58 | if (!access_ok(VERIFY_WRITE, batchbuffer, sizeof(*batchbuffer)) | ||
59 | || __put_user(batchbuffer32.start, &batchbuffer->start) | ||
60 | || __put_user(batchbuffer32.used, &batchbuffer->used) | ||
61 | || __put_user(batchbuffer32.DR1, &batchbuffer->DR1) | ||
62 | || __put_user(batchbuffer32.DR4, &batchbuffer->DR4) | ||
63 | || __put_user(batchbuffer32.num_cliprects, &batchbuffer->num_cliprects) | ||
64 | || __put_user((int __user *)(unsigned long)batchbuffer32.cliprects, | ||
65 | &batchbuffer->cliprects)) | ||
66 | return -EFAULT; | ||
67 | |||
68 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
69 | DRM_IOCTL_I915_BATCHBUFFER, (unsigned long) batchbuffer); | ||
70 | } | ||
71 | |||
72 | typedef struct _drm_i915_cmdbuffer32 { | ||
73 | u32 buf; /* pointer to userspace command buffer */ | ||
74 | int sz; /* nr bytes in buf */ | ||
75 | int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ | ||
76 | int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ | ||
77 | int num_cliprects; /* mulitpass with multiple cliprects? */ | ||
78 | u32 cliprects; /* pointer to userspace cliprects */ | ||
79 | } drm_i915_cmdbuffer32_t; | ||
80 | |||
81 | static int compat_i915_cmdbuffer(struct file *file, unsigned int cmd, | ||
82 | unsigned long arg) | ||
83 | { | ||
84 | drm_i915_cmdbuffer32_t cmdbuffer32; | ||
85 | drm_i915_cmdbuffer_t __user *cmdbuffer; | ||
86 | |||
87 | if (copy_from_user(&cmdbuffer32, (void __user *)arg, sizeof(cmdbuffer32))) | ||
88 | return -EFAULT; | ||
89 | |||
90 | cmdbuffer = compat_alloc_user_space(sizeof(*cmdbuffer)); | ||
91 | if (!access_ok(VERIFY_WRITE, cmdbuffer, sizeof(*cmdbuffer)) | ||
92 | || __put_user((int __user *)(unsigned long)cmdbuffer32.buf, | ||
93 | &cmdbuffer->buf) | ||
94 | || __put_user(cmdbuffer32.sz, &cmdbuffer->sz) | ||
95 | || __put_user(cmdbuffer32.DR1, &cmdbuffer->DR1) | ||
96 | || __put_user(cmdbuffer32.DR4, &cmdbuffer->DR4) | ||
97 | || __put_user(cmdbuffer32.num_cliprects, &cmdbuffer->num_cliprects) | ||
98 | || __put_user((int __user *)(unsigned long)cmdbuffer32.cliprects, | ||
99 | &cmdbuffer->cliprects)) | ||
100 | return -EFAULT; | ||
101 | |||
102 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
103 | DRM_IOCTL_I915_CMDBUFFER, (unsigned long) cmdbuffer); | ||
104 | } | ||
105 | |||
106 | typedef struct drm_i915_irq_emit32 { | ||
107 | u32 irq_seq; | ||
108 | } drm_i915_irq_emit32_t; | ||
109 | |||
110 | static int compat_i915_irq_emit(struct file *file, unsigned int cmd, | ||
111 | unsigned long arg) | ||
112 | { | ||
113 | drm_i915_irq_emit32_t req32; | ||
114 | drm_i915_irq_emit_t __user *request; | ||
115 | |||
116 | if (copy_from_user(&req32, (void __user *) arg, sizeof(req32))) | ||
117 | return -EFAULT; | ||
118 | |||
119 | request = compat_alloc_user_space(sizeof(*request)); | ||
120 | if (!access_ok(VERIFY_WRITE, request, sizeof(*request)) | ||
121 | || __put_user((int __user *)(unsigned long)req32.irq_seq, | ||
122 | &request->irq_seq)) | ||
123 | return -EFAULT; | ||
124 | |||
125 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
126 | DRM_IOCTL_I915_IRQ_EMIT, (unsigned long) request); | ||
127 | } | ||
128 | typedef struct drm_i915_getparam32 { | ||
129 | int param; | ||
130 | u32 value; | ||
131 | } drm_i915_getparam32_t; | ||
132 | |||
133 | static int compat_i915_getparam(struct file *file, unsigned int cmd, | ||
134 | unsigned long arg) | ||
135 | { | ||
136 | drm_i915_getparam32_t req32; | ||
137 | drm_i915_getparam_t __user *request; | ||
138 | |||
139 | if (copy_from_user(&req32, (void __user *) arg, sizeof(req32))) | ||
140 | return -EFAULT; | ||
141 | |||
142 | request = compat_alloc_user_space(sizeof(*request)); | ||
143 | if (!access_ok(VERIFY_WRITE, request, sizeof(*request)) | ||
144 | || __put_user(req32.param, &request->param) | ||
145 | || __put_user((void __user *)(unsigned long)req32.value, | ||
146 | &request->value)) | ||
147 | return -EFAULT; | ||
148 | |||
149 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
150 | DRM_IOCTL_I915_GETPARAM, (unsigned long) request); | ||
151 | } | ||
152 | |||
153 | typedef struct drm_i915_mem_alloc32 { | ||
154 | int region; | ||
155 | int alignment; | ||
156 | int size; | ||
157 | u32 region_offset; /* offset from start of fb or agp */ | ||
158 | } drm_i915_mem_alloc32_t; | ||
159 | |||
160 | static int compat_i915_alloc(struct file *file, unsigned int cmd, | ||
161 | unsigned long arg) | ||
162 | { | ||
163 | drm_i915_mem_alloc32_t req32; | ||
164 | drm_i915_mem_alloc_t __user *request; | ||
165 | |||
166 | if (copy_from_user(&req32, (void __user *) arg, sizeof(req32))) | ||
167 | return -EFAULT; | ||
168 | |||
169 | request = compat_alloc_user_space(sizeof(*request)); | ||
170 | if (!access_ok(VERIFY_WRITE, request, sizeof(*request)) | ||
171 | || __put_user(req32.region, &request->region) | ||
172 | || __put_user(req32.alignment, &request->alignment) | ||
173 | || __put_user(req32.size, &request->size) | ||
174 | || __put_user((void __user *)(unsigned long)req32.region_offset, | ||
175 | &request->region_offset)) | ||
176 | return -EFAULT; | ||
177 | |||
178 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
179 | DRM_IOCTL_I915_ALLOC, (unsigned long) request); | ||
180 | } | ||
181 | |||
182 | |||
183 | drm_ioctl_compat_t *i915_compat_ioctls[] = { | ||
184 | [DRM_I915_BATCHBUFFER] = compat_i915_batchbuffer, | ||
185 | [DRM_I915_CMDBUFFER] = compat_i915_cmdbuffer, | ||
186 | [DRM_I915_GETPARAM] = compat_i915_getparam, | ||
187 | [DRM_I915_IRQ_EMIT] = compat_i915_irq_emit, | ||
188 | [DRM_I915_ALLOC] = compat_i915_alloc | ||
189 | }; | ||
190 | |||
191 | /** | ||
192 | * Called whenever a 32-bit process running under a 64-bit kernel | ||
193 | * performs an ioctl on /dev/dri/card<n>. | ||
194 | * | ||
195 | * \param filp file pointer. | ||
196 | * \param cmd command. | ||
197 | * \param arg user argument. | ||
198 | * \return zero on success or negative number on failure. | ||
199 | */ | ||
200 | long i915_compat_ioctl(struct file *filp, unsigned int cmd, | ||
201 | unsigned long arg) | ||
202 | { | ||
203 | unsigned int nr = DRM_IOCTL_NR(cmd); | ||
204 | drm_ioctl_compat_t *fn = NULL; | ||
205 | int ret; | ||
206 | |||
207 | if (nr < DRM_COMMAND_BASE) | ||
208 | return drm_compat_ioctl(filp, cmd, arg); | ||
209 | |||
210 | if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(i915_compat_ioctls)) | ||
211 | fn = i915_compat_ioctls[nr - DRM_COMMAND_BASE]; | ||
212 | |||
213 | lock_kernel(); /* XXX for now */ | ||
214 | if (fn != NULL) | ||
215 | ret = (*fn)(filp, cmd, arg); | ||
216 | else | ||
217 | ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg); | ||
218 | unlock_kernel(); | ||
219 | |||
220 | return ret; | ||
221 | } | ||
diff --git a/drivers/char/drm/i915_irq.c b/drivers/char/drm/i915_irq.c index a101cc9cfd7e..4fa448ee846b 100644 --- a/drivers/char/drm/i915_irq.c +++ b/drivers/char/drm/i915_irq.c | |||
@@ -56,7 +56,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) | |||
56 | return IRQ_HANDLED; | 56 | return IRQ_HANDLED; |
57 | } | 57 | } |
58 | 58 | ||
59 | int i915_emit_irq(drm_device_t * dev) | 59 | static int i915_emit_irq(drm_device_t * dev) |
60 | { | 60 | { |
61 | drm_i915_private_t *dev_priv = dev->dev_private; | 61 | drm_i915_private_t *dev_priv = dev->dev_private; |
62 | u32 ret; | 62 | u32 ret; |
@@ -76,7 +76,7 @@ int i915_emit_irq(drm_device_t * dev) | |||
76 | return ret; | 76 | return ret; |
77 | } | 77 | } |
78 | 78 | ||
79 | int i915_wait_irq(drm_device_t * dev, int irq_nr) | 79 | static int i915_wait_irq(drm_device_t * dev, int irq_nr) |
80 | { | 80 | { |
81 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | 81 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
82 | int ret = 0; | 82 | int ret = 0; |
diff --git a/drivers/char/drm/mga_drv.c b/drivers/char/drm/mga_drv.c index 22dab3e9d92a..844cca9cb29d 100644 --- a/drivers/char/drm/mga_drv.c +++ b/drivers/char/drm/mga_drv.c | |||
@@ -101,6 +101,9 @@ static struct drm_driver driver = { | |||
101 | .mmap = drm_mmap, | 101 | .mmap = drm_mmap, |
102 | .poll = drm_poll, | 102 | .poll = drm_poll, |
103 | .fasync = drm_fasync, | 103 | .fasync = drm_fasync, |
104 | #ifdef CONFIG_COMPAT | ||
105 | .compat_ioctl = mga_compat_ioctl, | ||
106 | #endif | ||
104 | }, | 107 | }, |
105 | .pci_driver = { | 108 | .pci_driver = { |
106 | .name = DRIVER_NAME, | 109 | .name = DRIVER_NAME, |
diff --git a/drivers/char/drm/mga_drv.h b/drivers/char/drm/mga_drv.h index 1d84a1eb34db..9412e2816eb7 100644 --- a/drivers/char/drm/mga_drv.h +++ b/drivers/char/drm/mga_drv.h | |||
@@ -137,6 +137,8 @@ extern irqreturn_t mga_driver_irq_handler( DRM_IRQ_ARGS ); | |||
137 | extern void mga_driver_irq_preinstall( drm_device_t *dev ); | 137 | extern void mga_driver_irq_preinstall( drm_device_t *dev ); |
138 | extern void mga_driver_irq_postinstall( drm_device_t *dev ); | 138 | extern void mga_driver_irq_postinstall( drm_device_t *dev ); |
139 | extern void mga_driver_irq_uninstall( drm_device_t *dev ); | 139 | extern void mga_driver_irq_uninstall( drm_device_t *dev ); |
140 | extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, | ||
141 | unsigned long arg); | ||
140 | 142 | ||
141 | #define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() | 143 | #define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() |
142 | 144 | ||
diff --git a/drivers/char/drm/mga_ioc32.c b/drivers/char/drm/mga_ioc32.c new file mode 100644 index 000000000000..bc745cfa2095 --- /dev/null +++ b/drivers/char/drm/mga_ioc32.c | |||
@@ -0,0 +1,167 @@ | |||
1 | /** | ||
2 | * \file mga_ioc32.c | ||
3 | * | ||
4 | * 32-bit ioctl compatibility routines for the MGA DRM. | ||
5 | * | ||
6 | * \author Dave Airlie <airlied@linux.ie> with code from patches by Egbert Eich | ||
7 | * | ||
8 | * | ||
9 | * Copyright (C) Paul Mackerras 2005 | ||
10 | * Copyright (C) Egbert Eich 2003,2004 | ||
11 | * Copyright (C) Dave Airlie 2005 | ||
12 | * All Rights Reserved. | ||
13 | * | ||
14 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
15 | * copy of this software and associated documentation files (the "Software"), | ||
16 | * to deal in the Software without restriction, including without limitation | ||
17 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
18 | * and/or sell copies of the Software, and to permit persons to whom the | ||
19 | * Software is furnished to do so, subject to the following conditions: | ||
20 | * | ||
21 | * The above copyright notice and this permission notice (including the next | ||
22 | * paragraph) shall be included in all copies or substantial portions of the | ||
23 | * Software. | ||
24 | * | ||
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
26 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
27 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
28 | * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | ||
29 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
30 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | ||
31 | * IN THE SOFTWARE. | ||
32 | */ | ||
33 | #include <linux/compat.h> | ||
34 | #include <linux/ioctl32.h> | ||
35 | |||
36 | #include "drmP.h" | ||
37 | #include "drm.h" | ||
38 | #include "mga_drm.h" | ||
39 | |||
40 | typedef struct drm32_mga_init { | ||
41 | int func; | ||
42 | u32 sarea_priv_offset; | ||
43 | int chipset; | ||
44 | int sgram; | ||
45 | unsigned int maccess; | ||
46 | unsigned int fb_cpp; | ||
47 | unsigned int front_offset, front_pitch; | ||
48 | unsigned int back_offset, back_pitch; | ||
49 | unsigned int depth_cpp; | ||
50 | unsigned int depth_offset, depth_pitch; | ||
51 | unsigned int texture_offset[MGA_NR_TEX_HEAPS]; | ||
52 | unsigned int texture_size[MGA_NR_TEX_HEAPS]; | ||
53 | u32 fb_offset; | ||
54 | u32 mmio_offset; | ||
55 | u32 status_offset; | ||
56 | u32 warp_offset; | ||
57 | u32 primary_offset; | ||
58 | u32 buffers_offset; | ||
59 | } drm_mga_init32_t; | ||
60 | |||
61 | static int compat_mga_init(struct file *file, unsigned int cmd, | ||
62 | unsigned long arg) | ||
63 | { | ||
64 | drm_mga_init32_t init32; | ||
65 | drm_mga_init_t __user *init; | ||
66 | int err = 0, i; | ||
67 | |||
68 | if (copy_from_user(&init32, (void __user *)arg, sizeof(init32))) | ||
69 | return -EFAULT; | ||
70 | |||
71 | init = compat_alloc_user_space(sizeof(*init)); | ||
72 | if (!access_ok(VERIFY_WRITE, init, sizeof(*init)) | ||
73 | || __put_user(init32.func, &init->func) | ||
74 | || __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset) | ||
75 | || __put_user(init32.chipset, &init->chipset) | ||
76 | || __put_user(init32.sgram, &init->sgram) | ||
77 | || __put_user(init32.maccess, &init->maccess) | ||
78 | || __put_user(init32.fb_cpp, &init->fb_cpp) | ||
79 | || __put_user(init32.front_offset, &init->front_offset) | ||
80 | || __put_user(init32.front_pitch, &init->front_pitch) | ||
81 | || __put_user(init32.back_offset, &init->back_offset) | ||
82 | || __put_user(init32.back_pitch, &init->back_pitch) | ||
83 | || __put_user(init32.depth_cpp, &init->depth_cpp) | ||
84 | || __put_user(init32.depth_offset, &init->depth_offset) | ||
85 | || __put_user(init32.depth_pitch, &init->depth_pitch) | ||
86 | || __put_user(init32.fb_offset, &init->fb_offset) | ||
87 | || __put_user(init32.mmio_offset, &init->mmio_offset) | ||
88 | || __put_user(init32.status_offset, &init->status_offset) | ||
89 | || __put_user(init32.warp_offset, &init->warp_offset) | ||
90 | || __put_user(init32.primary_offset, &init->primary_offset) | ||
91 | || __put_user(init32.buffers_offset, &init->buffers_offset)) | ||
92 | return -EFAULT; | ||
93 | |||
94 | for (i=0; i<MGA_NR_TEX_HEAPS; i++) | ||
95 | { | ||
96 | err |= __put_user(init32.texture_offset[i], &init->texture_offset[i]); | ||
97 | err |= __put_user(init32.texture_size[i], &init->texture_size[i]); | ||
98 | } | ||
99 | if (err) | ||
100 | return -EFAULT; | ||
101 | |||
102 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
103 | DRM_IOCTL_MGA_INIT, (unsigned long) init); | ||
104 | } | ||
105 | |||
106 | |||
107 | typedef struct drm_mga_getparam32 { | ||
108 | int param; | ||
109 | u32 value; | ||
110 | } drm_mga_getparam32_t; | ||
111 | |||
112 | |||
113 | static int compat_mga_getparam(struct file *file, unsigned int cmd, | ||
114 | unsigned long arg) | ||
115 | { | ||
116 | drm_mga_getparam32_t getparam32; | ||
117 | drm_mga_getparam_t __user *getparam; | ||
118 | |||
119 | if (copy_from_user(&getparam32, (void __user *)arg, sizeof(getparam32))) | ||
120 | return -EFAULT; | ||
121 | |||
122 | getparam = compat_alloc_user_space(sizeof(*getparam)); | ||
123 | if (!access_ok(VERIFY_WRITE, getparam, sizeof(*getparam)) | ||
124 | || __put_user(getparam32.param, &getparam->param) | ||
125 | || __put_user((void __user *)(unsigned long)getparam32.value, &getparam->value)) | ||
126 | return -EFAULT; | ||
127 | |||
128 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
129 | DRM_IOCTL_MGA_GETPARAM, (unsigned long)getparam); | ||
130 | } | ||
131 | |||
132 | drm_ioctl_compat_t *mga_compat_ioctls[] = { | ||
133 | [DRM_MGA_INIT] = compat_mga_init, | ||
134 | [DRM_MGA_GETPARAM] = compat_mga_getparam, | ||
135 | }; | ||
136 | |||
137 | /** | ||
138 | * Called whenever a 32-bit process running under a 64-bit kernel | ||
139 | * performs an ioctl on /dev/dri/card<n>. | ||
140 | * | ||
141 | * \param filp file pointer. | ||
142 | * \param cmd command. | ||
143 | * \param arg user argument. | ||
144 | * \return zero on success or negative number on failure. | ||
145 | */ | ||
146 | long mga_compat_ioctl(struct file *filp, unsigned int cmd, | ||
147 | unsigned long arg) | ||
148 | { | ||
149 | unsigned int nr = DRM_IOCTL_NR(cmd); | ||
150 | drm_ioctl_compat_t *fn = NULL; | ||
151 | int ret; | ||
152 | |||
153 | if (nr < DRM_COMMAND_BASE) | ||
154 | return drm_compat_ioctl(filp, cmd, arg); | ||
155 | |||
156 | if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls)) | ||
157 | fn = mga_compat_ioctls[nr - DRM_COMMAND_BASE]; | ||
158 | |||
159 | lock_kernel(); /* XXX for now */ | ||
160 | if (fn != NULL) | ||
161 | ret = (*fn)(filp, cmd, arg); | ||
162 | else | ||
163 | ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg); | ||
164 | unlock_kernel(); | ||
165 | |||
166 | return ret; | ||
167 | } | ||
diff --git a/drivers/char/drm/r128_drv.c b/drivers/char/drm/r128_drv.c index ced63810237b..bc446da1b210 100644 --- a/drivers/char/drm/r128_drv.c +++ b/drivers/char/drm/r128_drv.c | |||
@@ -96,6 +96,9 @@ static struct drm_driver driver = { | |||
96 | .mmap = drm_mmap, | 96 | .mmap = drm_mmap, |
97 | .poll = drm_poll, | 97 | .poll = drm_poll, |
98 | .fasync = drm_fasync, | 98 | .fasync = drm_fasync, |
99 | #ifdef CONFIG_COMPAT | ||
100 | .compat_ioctl = r128_compat_ioctl, | ||
101 | #endif | ||
99 | }, | 102 | }, |
100 | .pci_driver = { | 103 | .pci_driver = { |
101 | .name = DRIVER_NAME, | 104 | .name = DRIVER_NAME, |
diff --git a/drivers/char/drm/r128_drv.h b/drivers/char/drm/r128_drv.h index cf1aa5df459e..0fb687c9505e 100644 --- a/drivers/char/drm/r128_drv.h +++ b/drivers/char/drm/r128_drv.h | |||
@@ -156,6 +156,9 @@ extern void r128_driver_irq_uninstall( drm_device_t *dev ); | |||
156 | extern void r128_driver_pretakedown(drm_device_t *dev); | 156 | extern void r128_driver_pretakedown(drm_device_t *dev); |
157 | extern void r128_driver_prerelease(drm_device_t *dev, DRMFILE filp); | 157 | extern void r128_driver_prerelease(drm_device_t *dev, DRMFILE filp); |
158 | 158 | ||
159 | extern long r128_compat_ioctl(struct file *filp, unsigned int cmd, | ||
160 | unsigned long arg); | ||
161 | |||
159 | /* Register definitions, register access macros and drmAddMap constants | 162 | /* Register definitions, register access macros and drmAddMap constants |
160 | * for Rage 128 kernel driver. | 163 | * for Rage 128 kernel driver. |
161 | */ | 164 | */ |
diff --git a/drivers/char/drm/r128_ioc32.c b/drivers/char/drm/r128_ioc32.c new file mode 100644 index 000000000000..60598ef9475a --- /dev/null +++ b/drivers/char/drm/r128_ioc32.c | |||
@@ -0,0 +1,219 @@ | |||
1 | /** | ||
2 | * \file r128_ioc32.c | ||
3 | * | ||
4 | * 32-bit ioctl compatibility routines for the R128 DRM. | ||
5 | * | ||
6 | * \author Dave Airlie <airlied@linux.ie> with code from patches by Egbert Eich | ||
7 | * | ||
8 | * Copyright (C) Paul Mackerras 2005 | ||
9 | * Copyright (C) Egbert Eich 2003,2004 | ||
10 | * Copyright (C) Dave Airlie 2005 | ||
11 | * All Rights Reserved. | ||
12 | * | ||
13 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
14 | * copy of this software and associated documentation files (the "Software"), | ||
15 | * to deal in the Software without restriction, including without limitation | ||
16 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
17 | * and/or sell copies of the Software, and to permit persons to whom the | ||
18 | * Software is furnished to do so, subject to the following conditions: | ||
19 | * | ||
20 | * The above copyright notice and this permission notice (including the next | ||
21 | * paragraph) shall be included in all copies or substantial portions of the | ||
22 | * Software. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
25 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
26 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
27 | * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | ||
28 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
29 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | ||
30 | * IN THE SOFTWARE. | ||
31 | */ | ||
32 | #include <linux/compat.h> | ||
33 | #include <linux/ioctl32.h> | ||
34 | |||
35 | #include "drmP.h" | ||
36 | #include "drm.h" | ||
37 | #include "r128_drm.h" | ||
38 | |||
39 | typedef struct drm_r128_init32 { | ||
40 | int func; | ||
41 | unsigned int sarea_priv_offset; | ||
42 | int is_pci; | ||
43 | int cce_mode; | ||
44 | int cce_secure; | ||
45 | int ring_size; | ||
46 | int usec_timeout; | ||
47 | |||
48 | unsigned int fb_bpp; | ||
49 | unsigned int front_offset, front_pitch; | ||
50 | unsigned int back_offset, back_pitch; | ||
51 | unsigned int depth_bpp; | ||
52 | unsigned int depth_offset, depth_pitch; | ||
53 | unsigned int span_offset; | ||
54 | |||
55 | unsigned int fb_offset; | ||
56 | unsigned int mmio_offset; | ||
57 | unsigned int ring_offset; | ||
58 | unsigned int ring_rptr_offset; | ||
59 | unsigned int buffers_offset; | ||
60 | unsigned int agp_textures_offset; | ||
61 | } drm_r128_init32_t; | ||
62 | |||
63 | static int compat_r128_init(struct file *file, unsigned int cmd, | ||
64 | unsigned long arg) | ||
65 | { | ||
66 | drm_r128_init32_t init32; | ||
67 | drm_r128_init_t __user *init; | ||
68 | |||
69 | if (copy_from_user(&init32, (void __user *)arg, sizeof(init32))) | ||
70 | return -EFAULT; | ||
71 | |||
72 | init = compat_alloc_user_space(sizeof(*init)); | ||
73 | if (!access_ok(VERIFY_WRITE, init, sizeof(*init)) | ||
74 | || __put_user(init32.func, &init->func) | ||
75 | || __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset) | ||
76 | || __put_user(init32.is_pci, &init->is_pci) | ||
77 | || __put_user(init32.cce_mode, &init->cce_mode) | ||
78 | || __put_user(init32.cce_secure, &init->cce_secure) | ||
79 | || __put_user(init32.ring_size, &init->ring_size) | ||
80 | || __put_user(init32.usec_timeout, &init->usec_timeout) | ||
81 | || __put_user(init32.fb_bpp, &init->fb_bpp) | ||
82 | || __put_user(init32.front_offset, &init->front_offset) | ||
83 | || __put_user(init32.front_pitch, &init->front_pitch) | ||
84 | || __put_user(init32.back_offset, &init->back_offset) | ||
85 | || __put_user(init32.back_pitch, &init->back_pitch) | ||
86 | || __put_user(init32.depth_bpp, &init->depth_bpp) | ||
87 | || __put_user(init32.depth_offset, &init->depth_offset) | ||
88 | || __put_user(init32.depth_pitch, &init->depth_pitch) | ||
89 | || __put_user(init32.span_offset, &init->span_offset) | ||
90 | || __put_user(init32.fb_offset, &init->fb_offset) | ||
91 | || __put_user(init32.mmio_offset, &init->mmio_offset) | ||
92 | || __put_user(init32.ring_offset, &init->ring_offset) | ||
93 | || __put_user(init32.ring_rptr_offset, &init->ring_rptr_offset) | ||
94 | || __put_user(init32.buffers_offset, &init->buffers_offset) | ||
95 | || __put_user(init32.agp_textures_offset, &init->agp_textures_offset)) | ||
96 | return -EFAULT; | ||
97 | |||
98 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
99 | DRM_IOCTL_R128_INIT, (unsigned long)init); | ||
100 | } | ||
101 | |||
102 | |||
103 | typedef struct drm_r128_depth32 { | ||
104 | int func; | ||
105 | int n; | ||
106 | u32 x; | ||
107 | u32 y; | ||
108 | u32 buffer; | ||
109 | u32 mask; | ||
110 | } drm_r128_depth32_t; | ||
111 | |||
112 | static int compat_r128_depth(struct file *file, unsigned int cmd, | ||
113 | unsigned long arg) | ||
114 | { | ||
115 | drm_r128_depth32_t depth32; | ||
116 | drm_r128_depth_t __user *depth; | ||
117 | |||
118 | if (copy_from_user(&depth32, (void __user *)arg, sizeof(depth32))) | ||
119 | return -EFAULT; | ||
120 | |||
121 | depth = compat_alloc_user_space(sizeof(*depth)); | ||
122 | if (!access_ok(VERIFY_WRITE, depth, sizeof(*depth)) | ||
123 | || __put_user(depth32.func, &depth->func) | ||
124 | || __put_user(depth32.n, &depth->n) | ||
125 | || __put_user((int __user *)(unsigned long)depth32.x, &depth->x) | ||
126 | || __put_user((int __user *)(unsigned long)depth32.y, &depth->y) | ||
127 | || __put_user((unsigned int __user *)(unsigned long)depth32.buffer, &depth->buffer) | ||
128 | || __put_user((unsigned char __user *)(unsigned long)depth32.mask, &depth->mask)) | ||
129 | return -EFAULT; | ||
130 | |||
131 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
132 | DRM_IOCTL_R128_DEPTH, (unsigned long)depth); | ||
133 | |||
134 | } | ||
135 | |||
136 | typedef struct drm_r128_stipple32 { | ||
137 | u32 mask; | ||
138 | } drm_r128_stipple32_t; | ||
139 | |||
140 | static int compat_r128_stipple(struct file *file, unsigned int cmd, | ||
141 | unsigned long arg) | ||
142 | { | ||
143 | drm_r128_stipple32_t stipple32; | ||
144 | drm_r128_stipple_t __user *stipple; | ||
145 | |||
146 | if (copy_from_user(&stipple32, (void __user *)arg, sizeof(stipple32))) | ||
147 | return -EFAULT; | ||
148 | |||
149 | stipple = compat_alloc_user_space(sizeof(*stipple)); | ||
150 | if (!access_ok(VERIFY_WRITE, stipple, sizeof(*stipple)) | ||
151 | || __put_user((unsigned int __user *)(unsigned long)stipple32.mask, &stipple->mask)) | ||
152 | return -EFAULT; | ||
153 | |||
154 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
155 | DRM_IOCTL_R128_STIPPLE, (unsigned long)stipple); | ||
156 | } | ||
157 | |||
158 | typedef struct drm_r128_getparam32 { | ||
159 | int param; | ||
160 | u32 value; | ||
161 | } drm_r128_getparam32_t; | ||
162 | |||
163 | static int compat_r128_getparam(struct file *file, unsigned int cmd, | ||
164 | unsigned long arg) | ||
165 | { | ||
166 | drm_r128_getparam32_t getparam32; | ||
167 | drm_r128_getparam_t __user *getparam; | ||
168 | |||
169 | if (copy_from_user(&getparam32, (void __user *)arg, sizeof(getparam32))) | ||
170 | return -EFAULT; | ||
171 | |||
172 | getparam = compat_alloc_user_space(sizeof(*getparam)); | ||
173 | if (!access_ok(VERIFY_WRITE, getparam, sizeof(*getparam)) | ||
174 | || __put_user(getparam32.param, &getparam->param) | ||
175 | || __put_user((void __user *)(unsigned long)getparam32.value, &getparam->value)) | ||
176 | return -EFAULT; | ||
177 | |||
178 | return drm_ioctl(file->f_dentry->d_inode, file, | ||
179 | DRM_IOCTL_R128_GETPARAM, (unsigned long)getparam); | ||
180 | } | ||
181 | |||
182 | drm_ioctl_compat_t *r128_compat_ioctls[] = { | ||
183 | [DRM_R128_INIT] = compat_r128_init, | ||
184 | [DRM_R128_DEPTH] = compat_r128_depth, | ||
185 | [DRM_R128_STIPPLE] = compat_r128_stipple, | ||
186 | [DRM_R128_GETPARAM] = compat_r128_getparam, | ||
187 | }; | ||
188 | |||
189 | /** | ||
190 | * Called whenever a 32-bit process running under a 64-bit kernel | ||
191 | * performs an ioctl on /dev/dri/card<n>. | ||
192 | * | ||
193 | * \param filp file pointer. | ||
194 | * \param cmd command. | ||
195 | * \param arg user argument. | ||
196 | * \return zero on success or negative number on failure. | ||
197 | */ | ||
198 | long r128_compat_ioctl(struct file *filp, unsigned int cmd, | ||
199 | unsigned long arg) | ||
200 | { | ||
201 | unsigned int nr = DRM_IOCTL_NR(cmd); | ||
202 | drm_ioctl_compat_t *fn = NULL; | ||
203 | int ret; | ||
204 | |||
205 | if (nr < DRM_COMMAND_BASE) | ||
206 | return drm_compat_ioctl(filp, cmd, arg); | ||
207 | |||
208 | if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(r128_compat_ioctls)) | ||
209 | fn = r128_compat_ioctls[nr - DRM_COMMAND_BASE]; | ||
210 | |||
211 | lock_kernel(); /* XXX for now */ | ||
212 | if (fn != NULL) | ||
213 | ret = (*fn)(filp, cmd, arg); | ||
214 | else | ||
215 | ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg); | ||
216 | unlock_kernel(); | ||
217 | |||
218 | return ret; | ||
219 | } | ||
diff --git a/drivers/char/drm/r128_state.c b/drivers/char/drm/r128_state.c index 53af69162829..426a71c049d9 100644 --- a/drivers/char/drm/r128_state.c +++ b/drivers/char/drm/r128_state.c | |||
@@ -1307,7 +1307,7 @@ static int r128_do_init_pageflip( drm_device_t *dev ) | |||
1307 | return 0; | 1307 | return 0; |
1308 | } | 1308 | } |
1309 | 1309 | ||
1310 | int r128_do_cleanup_pageflip( drm_device_t *dev ) | 1310 | static int r128_do_cleanup_pageflip( drm_device_t *dev ) |
1311 | { | 1311 | { |
1312 | drm_r128_private_t *dev_priv = dev->dev_private; | 1312 | drm_r128_private_t *dev_priv = dev->dev_private; |
1313 | DRM_DEBUG( "\n" ); | 1313 | DRM_DEBUG( "\n" ); |
diff --git a/drivers/char/drm/via_3d_reg.h b/drivers/char/drm/via_3d_reg.h new file mode 100644 index 000000000000..cf61bb514db1 --- /dev/null +++ b/drivers/char/drm/via_3d_reg.h | |||
@@ -0,0 +1,1651 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * | ||
5 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
6 | * copy of this software and associated documentation files (the "Software"), | ||
7 | * to deal in the Software without restriction, including without limitation | ||
8 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
9 | * and/or sell copies of the Software, and to permit persons to whom the | ||
10 | * Software is furnished to do so, subject to the following conditions: | ||
11 | * | ||
12 | * The above copyright notice and this permission notice (including the | ||
13 | * next paragraph) shall be included in all copies or substantial portions | ||
14 | * of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
19 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | |||
25 | #ifndef VIA_3D_REG_H | ||
26 | #define VIA_3D_REG_H | ||
27 | #define HC_REG_BASE 0x0400 | ||
28 | |||
29 | #define HC_REG_TRANS_SPACE 0x0040 | ||
30 | |||
31 | #define HC_ParaN_MASK 0xffffffff | ||
32 | #define HC_Para_MASK 0x00ffffff | ||
33 | #define HC_SubA_MASK 0xff000000 | ||
34 | #define HC_SubA_SHIFT 24 | ||
35 | /* Transmission Setting | ||
36 | */ | ||
37 | #define HC_REG_TRANS_SET 0x003c | ||
38 | #define HC_ParaSubType_MASK 0xff000000 | ||
39 | #define HC_ParaType_MASK 0x00ff0000 | ||
40 | #define HC_ParaOS_MASK 0x0000ff00 | ||
41 | #define HC_ParaAdr_MASK 0x000000ff | ||
42 | #define HC_ParaSubType_SHIFT 24 | ||
43 | #define HC_ParaType_SHIFT 16 | ||
44 | #define HC_ParaOS_SHIFT 8 | ||
45 | #define HC_ParaAdr_SHIFT 0 | ||
46 | |||
47 | #define HC_ParaType_CmdVdata 0x0000 | ||
48 | #define HC_ParaType_NotTex 0x0001 | ||
49 | #define HC_ParaType_Tex 0x0002 | ||
50 | #define HC_ParaType_Palette 0x0003 | ||
51 | #define HC_ParaType_PreCR 0x0010 | ||
52 | #define HC_ParaType_Auto 0x00fe | ||
53 | |||
54 | /* Transmission Space | ||
55 | */ | ||
56 | #define HC_REG_Hpara0 0x0040 | ||
57 | #define HC_REG_HpataAF 0x02fc | ||
58 | |||
59 | /* Read | ||
60 | */ | ||
61 | #define HC_REG_HREngSt 0x0000 | ||
62 | #define HC_REG_HRFIFOempty 0x0004 | ||
63 | #define HC_REG_HRFIFOfull 0x0008 | ||
64 | #define HC_REG_HRErr 0x000c | ||
65 | #define HC_REG_FIFOstatus 0x0010 | ||
66 | /* HC_REG_HREngSt 0x0000 | ||
67 | */ | ||
68 | #define HC_HDASZC_MASK 0x00010000 | ||
69 | #define HC_HSGEMI_MASK 0x0000f000 | ||
70 | #define HC_HLGEMISt_MASK 0x00000f00 | ||
71 | #define HC_HCRSt_MASK 0x00000080 | ||
72 | #define HC_HSE0St_MASK 0x00000040 | ||
73 | #define HC_HSE1St_MASK 0x00000020 | ||
74 | #define HC_HPESt_MASK 0x00000010 | ||
75 | #define HC_HXESt_MASK 0x00000008 | ||
76 | #define HC_HBESt_MASK 0x00000004 | ||
77 | #define HC_HE2St_MASK 0x00000002 | ||
78 | #define HC_HE3St_MASK 0x00000001 | ||
79 | /* HC_REG_HRFIFOempty 0x0004 | ||
80 | */ | ||
81 | #define HC_HRZDempty_MASK 0x00000010 | ||
82 | #define HC_HRTXAempty_MASK 0x00000008 | ||
83 | #define HC_HRTXDempty_MASK 0x00000004 | ||
84 | #define HC_HWZDempty_MASK 0x00000002 | ||
85 | #define HC_HWCDempty_MASK 0x00000001 | ||
86 | /* HC_REG_HRFIFOfull 0x0008 | ||
87 | */ | ||
88 | #define HC_HRZDfull_MASK 0x00000010 | ||
89 | #define HC_HRTXAfull_MASK 0x00000008 | ||
90 | #define HC_HRTXDfull_MASK 0x00000004 | ||
91 | #define HC_HWZDfull_MASK 0x00000002 | ||
92 | #define HC_HWCDfull_MASK 0x00000001 | ||
93 | /* HC_REG_HRErr 0x000c | ||
94 | */ | ||
95 | #define HC_HAGPCMErr_MASK 0x80000000 | ||
96 | #define HC_HAGPCMErrC_MASK 0x70000000 | ||
97 | /* HC_REG_FIFOstatus 0x0010 | ||
98 | */ | ||
99 | #define HC_HRFIFOATall_MASK 0x80000000 | ||
100 | #define HC_HRFIFOATbusy_MASK 0x40000000 | ||
101 | #define HC_HRATFGMDo_MASK 0x00000100 | ||
102 | #define HC_HRATFGMDi_MASK 0x00000080 | ||
103 | #define HC_HRATFRZD_MASK 0x00000040 | ||
104 | #define HC_HRATFRTXA_MASK 0x00000020 | ||
105 | #define HC_HRATFRTXD_MASK 0x00000010 | ||
106 | #define HC_HRATFWZD_MASK 0x00000008 | ||
107 | #define HC_HRATFWCD_MASK 0x00000004 | ||
108 | #define HC_HRATTXTAG_MASK 0x00000002 | ||
109 | #define HC_HRATTXCH_MASK 0x00000001 | ||
110 | |||
111 | /* AGP Command Setting | ||
112 | */ | ||
113 | #define HC_SubA_HAGPBstL 0x0060 | ||
114 | #define HC_SubA_HAGPBendL 0x0061 | ||
115 | #define HC_SubA_HAGPCMNT 0x0062 | ||
116 | #define HC_SubA_HAGPBpL 0x0063 | ||
117 | #define HC_SubA_HAGPBpH 0x0064 | ||
118 | /* HC_SubA_HAGPCMNT 0x0062 | ||
119 | */ | ||
120 | #define HC_HAGPCMNT_MASK 0x00800000 | ||
121 | #define HC_HCmdErrClr_MASK 0x00400000 | ||
122 | #define HC_HAGPBendH_MASK 0x0000ff00 | ||
123 | #define HC_HAGPBstH_MASK 0x000000ff | ||
124 | #define HC_HAGPBendH_SHIFT 8 | ||
125 | #define HC_HAGPBstH_SHIFT 0 | ||
126 | /* HC_SubA_HAGPBpL 0x0063 | ||
127 | */ | ||
128 | #define HC_HAGPBpL_MASK 0x00fffffc | ||
129 | #define HC_HAGPBpID_MASK 0x00000003 | ||
130 | #define HC_HAGPBpID_PAUSE 0x00000000 | ||
131 | #define HC_HAGPBpID_JUMP 0x00000001 | ||
132 | #define HC_HAGPBpID_STOP 0x00000002 | ||
133 | /* HC_SubA_HAGPBpH 0x0064 | ||
134 | */ | ||
135 | #define HC_HAGPBpH_MASK 0x00ffffff | ||
136 | |||
137 | /* Miscellaneous Settings | ||
138 | */ | ||
139 | #define HC_SubA_HClipTB 0x0070 | ||
140 | #define HC_SubA_HClipLR 0x0071 | ||
141 | #define HC_SubA_HFPClipTL 0x0072 | ||
142 | #define HC_SubA_HFPClipBL 0x0073 | ||
143 | #define HC_SubA_HFPClipLL 0x0074 | ||
144 | #define HC_SubA_HFPClipRL 0x0075 | ||
145 | #define HC_SubA_HFPClipTBH 0x0076 | ||
146 | #define HC_SubA_HFPClipLRH 0x0077 | ||
147 | #define HC_SubA_HLP 0x0078 | ||
148 | #define HC_SubA_HLPRF 0x0079 | ||
149 | #define HC_SubA_HSolidCL 0x007a | ||
150 | #define HC_SubA_HPixGC 0x007b | ||
151 | #define HC_SubA_HSPXYOS 0x007c | ||
152 | #define HC_SubA_HVertexCNT 0x007d | ||
153 | |||
154 | #define HC_HClipT_MASK 0x00fff000 | ||
155 | #define HC_HClipT_SHIFT 12 | ||
156 | #define HC_HClipB_MASK 0x00000fff | ||
157 | #define HC_HClipB_SHIFT 0 | ||
158 | #define HC_HClipL_MASK 0x00fff000 | ||
159 | #define HC_HClipL_SHIFT 12 | ||
160 | #define HC_HClipR_MASK 0x00000fff | ||
161 | #define HC_HClipR_SHIFT 0 | ||
162 | #define HC_HFPClipBH_MASK 0x0000ff00 | ||
163 | #define HC_HFPClipBH_SHIFT 8 | ||
164 | #define HC_HFPClipTH_MASK 0x000000ff | ||
165 | #define HC_HFPClipTH_SHIFT 0 | ||
166 | #define HC_HFPClipRH_MASK 0x0000ff00 | ||
167 | #define HC_HFPClipRH_SHIFT 8 | ||
168 | #define HC_HFPClipLH_MASK 0x000000ff | ||
169 | #define HC_HFPClipLH_SHIFT 0 | ||
170 | #define HC_HSolidCH_MASK 0x000000ff | ||
171 | #define HC_HPixGC_MASK 0x00800000 | ||
172 | #define HC_HSPXOS_MASK 0x00fff000 | ||
173 | #define HC_HSPXOS_SHIFT 12 | ||
174 | #define HC_HSPYOS_MASK 0x00000fff | ||
175 | |||
176 | /* Command | ||
177 | * Command A | ||
178 | */ | ||
179 | #define HC_HCmdHeader_MASK 0xfe000000 /*0xffe00000 */ | ||
180 | #define HC_HE3Fire_MASK 0x00100000 | ||
181 | #define HC_HPMType_MASK 0x000f0000 | ||
182 | #define HC_HEFlag_MASK 0x0000e000 | ||
183 | #define HC_HShading_MASK 0x00001c00 | ||
184 | #define HC_HPMValidN_MASK 0x00000200 | ||
185 | #define HC_HPLEND_MASK 0x00000100 | ||
186 | #define HC_HVCycle_MASK 0x000000ff | ||
187 | #define HC_HVCycle_Style_MASK 0x000000c0 | ||
188 | #define HC_HVCycle_ChgA_MASK 0x00000030 | ||
189 | #define HC_HVCycle_ChgB_MASK 0x0000000c | ||
190 | #define HC_HVCycle_ChgC_MASK 0x00000003 | ||
191 | #define HC_HPMType_Point 0x00000000 | ||
192 | #define HC_HPMType_Line 0x00010000 | ||
193 | #define HC_HPMType_Tri 0x00020000 | ||
194 | #define HC_HPMType_TriWF 0x00040000 | ||
195 | #define HC_HEFlag_NoAA 0x00000000 | ||
196 | #define HC_HEFlag_ab 0x00008000 | ||
197 | #define HC_HEFlag_bc 0x00004000 | ||
198 | #define HC_HEFlag_ca 0x00002000 | ||
199 | #define HC_HShading_Solid 0x00000000 | ||
200 | #define HC_HShading_FlatA 0x00000400 | ||
201 | #define HC_HShading_FlatB 0x00000800 | ||
202 | #define HC_HShading_FlatC 0x00000c00 | ||
203 | #define HC_HShading_Gouraud 0x00001000 | ||
204 | #define HC_HVCycle_Full 0x00000000 | ||
205 | #define HC_HVCycle_AFP 0x00000040 | ||
206 | #define HC_HVCycle_One 0x000000c0 | ||
207 | #define HC_HVCycle_NewA 0x00000000 | ||
208 | #define HC_HVCycle_AA 0x00000010 | ||
209 | #define HC_HVCycle_AB 0x00000020 | ||
210 | #define HC_HVCycle_AC 0x00000030 | ||
211 | #define HC_HVCycle_NewB 0x00000000 | ||
212 | #define HC_HVCycle_BA 0x00000004 | ||
213 | #define HC_HVCycle_BB 0x00000008 | ||
214 | #define HC_HVCycle_BC 0x0000000c | ||
215 | #define HC_HVCycle_NewC 0x00000000 | ||
216 | #define HC_HVCycle_CA 0x00000001 | ||
217 | #define HC_HVCycle_CB 0x00000002 | ||
218 | #define HC_HVCycle_CC 0x00000003 | ||
219 | |||
220 | /* Command B | ||
221 | */ | ||
222 | #define HC_HLPrst_MASK 0x00010000 | ||
223 | #define HC_HLLastP_MASK 0x00008000 | ||
224 | #define HC_HVPMSK_MASK 0x00007f80 | ||
225 | #define HC_HBFace_MASK 0x00000040 | ||
226 | #define HC_H2nd1VT_MASK 0x0000003f | ||
227 | #define HC_HVPMSK_X 0x00004000 | ||
228 | #define HC_HVPMSK_Y 0x00002000 | ||
229 | #define HC_HVPMSK_Z 0x00001000 | ||
230 | #define HC_HVPMSK_W 0x00000800 | ||
231 | #define HC_HVPMSK_Cd 0x00000400 | ||
232 | #define HC_HVPMSK_Cs 0x00000200 | ||
233 | #define HC_HVPMSK_S 0x00000100 | ||
234 | #define HC_HVPMSK_T 0x00000080 | ||
235 | |||
236 | /* Enable Setting | ||
237 | */ | ||
238 | #define HC_SubA_HEnable 0x0000 | ||
239 | #define HC_HenTXEnvMap_MASK 0x00200000 | ||
240 | #define HC_HenVertexCNT_MASK 0x00100000 | ||
241 | #define HC_HenCPUDAZ_MASK 0x00080000 | ||
242 | #define HC_HenDASZWC_MASK 0x00040000 | ||
243 | #define HC_HenFBCull_MASK 0x00020000 | ||
244 | #define HC_HenCW_MASK 0x00010000 | ||
245 | #define HC_HenAA_MASK 0x00008000 | ||
246 | #define HC_HenST_MASK 0x00004000 | ||
247 | #define HC_HenZT_MASK 0x00002000 | ||
248 | #define HC_HenZW_MASK 0x00001000 | ||
249 | #define HC_HenAT_MASK 0x00000800 | ||
250 | #define HC_HenAW_MASK 0x00000400 | ||
251 | #define HC_HenSP_MASK 0x00000200 | ||
252 | #define HC_HenLP_MASK 0x00000100 | ||
253 | #define HC_HenTXCH_MASK 0x00000080 | ||
254 | #define HC_HenTXMP_MASK 0x00000040 | ||
255 | #define HC_HenTXPP_MASK 0x00000020 | ||
256 | #define HC_HenTXTR_MASK 0x00000010 | ||
257 | #define HC_HenCS_MASK 0x00000008 | ||
258 | #define HC_HenFOG_MASK 0x00000004 | ||
259 | #define HC_HenABL_MASK 0x00000002 | ||
260 | #define HC_HenDT_MASK 0x00000001 | ||
261 | |||
262 | /* Z Setting | ||
263 | */ | ||
264 | #define HC_SubA_HZWBBasL 0x0010 | ||
265 | #define HC_SubA_HZWBBasH 0x0011 | ||
266 | #define HC_SubA_HZWBType 0x0012 | ||
267 | #define HC_SubA_HZBiasL 0x0013 | ||
268 | #define HC_SubA_HZWBend 0x0014 | ||
269 | #define HC_SubA_HZWTMD 0x0015 | ||
270 | #define HC_SubA_HZWCDL 0x0016 | ||
271 | #define HC_SubA_HZWCTAGnum 0x0017 | ||
272 | #define HC_SubA_HZCYNum 0x0018 | ||
273 | #define HC_SubA_HZWCFire 0x0019 | ||
274 | /* HC_SubA_HZWBType | ||
275 | */ | ||
276 | #define HC_HZWBType_MASK 0x00800000 | ||
277 | #define HC_HZBiasedWB_MASK 0x00400000 | ||
278 | #define HC_HZONEasFF_MASK 0x00200000 | ||
279 | #define HC_HZOONEasFF_MASK 0x00100000 | ||
280 | #define HC_HZWBFM_MASK 0x00030000 | ||
281 | #define HC_HZWBLoc_MASK 0x0000c000 | ||
282 | #define HC_HZWBPit_MASK 0x00003fff | ||
283 | #define HC_HZWBFM_16 0x00000000 | ||
284 | #define HC_HZWBFM_32 0x00020000 | ||
285 | #define HC_HZWBFM_24 0x00030000 | ||
286 | #define HC_HZWBLoc_Local 0x00000000 | ||
287 | #define HC_HZWBLoc_SyS 0x00004000 | ||
288 | /* HC_SubA_HZWBend | ||
289 | */ | ||
290 | #define HC_HZWBend_MASK 0x00ffe000 | ||
291 | #define HC_HZBiasH_MASK 0x000000ff | ||
292 | #define HC_HZWBend_SHIFT 10 | ||
293 | /* HC_SubA_HZWTMD | ||
294 | */ | ||
295 | #define HC_HZWTMD_MASK 0x00070000 | ||
296 | #define HC_HEBEBias_MASK 0x00007f00 | ||
297 | #define HC_HZNF_MASK 0x000000ff | ||
298 | #define HC_HZWTMD_NeverPass 0x00000000 | ||
299 | #define HC_HZWTMD_LT 0x00010000 | ||
300 | #define HC_HZWTMD_EQ 0x00020000 | ||
301 | #define HC_HZWTMD_LE 0x00030000 | ||
302 | #define HC_HZWTMD_GT 0x00040000 | ||
303 | #define HC_HZWTMD_NE 0x00050000 | ||
304 | #define HC_HZWTMD_GE 0x00060000 | ||
305 | #define HC_HZWTMD_AllPass 0x00070000 | ||
306 | #define HC_HEBEBias_SHIFT 8 | ||
307 | /* HC_SubA_HZWCDL 0x0016 | ||
308 | */ | ||
309 | #define HC_HZWCDL_MASK 0x00ffffff | ||
310 | /* HC_SubA_HZWCTAGnum 0x0017 | ||
311 | */ | ||
312 | #define HC_HZWCTAGnum_MASK 0x00ff0000 | ||
313 | #define HC_HZWCTAGnum_SHIFT 16 | ||
314 | #define HC_HZWCDH_MASK 0x000000ff | ||
315 | #define HC_HZWCDH_SHIFT 0 | ||
316 | /* HC_SubA_HZCYNum 0x0018 | ||
317 | */ | ||
318 | #define HC_HZCYNum_MASK 0x00030000 | ||
319 | #define HC_HZCYNum_SHIFT 16 | ||
320 | #define HC_HZWCQWnum_MASK 0x00003fff | ||
321 | #define HC_HZWCQWnum_SHIFT 0 | ||
322 | /* HC_SubA_HZWCFire 0x0019 | ||
323 | */ | ||
324 | #define HC_ZWCFire_MASK 0x00010000 | ||
325 | #define HC_HZWCQWnumLast_MASK 0x00003fff | ||
326 | #define HC_HZWCQWnumLast_SHIFT 0 | ||
327 | |||
328 | /* Stencil Setting | ||
329 | */ | ||
330 | #define HC_SubA_HSTREF 0x0023 | ||
331 | #define HC_SubA_HSTMD 0x0024 | ||
332 | /* HC_SubA_HSBFM | ||
333 | */ | ||
334 | #define HC_HSBFM_MASK 0x00030000 | ||
335 | #define HC_HSBLoc_MASK 0x0000c000 | ||
336 | #define HC_HSBPit_MASK 0x00003fff | ||
337 | /* HC_SubA_HSTREF | ||
338 | */ | ||
339 | #define HC_HSTREF_MASK 0x00ff0000 | ||
340 | #define HC_HSTOPMSK_MASK 0x0000ff00 | ||
341 | #define HC_HSTBMSK_MASK 0x000000ff | ||
342 | #define HC_HSTREF_SHIFT 16 | ||
343 | #define HC_HSTOPMSK_SHIFT 8 | ||
344 | /* HC_SubA_HSTMD | ||
345 | */ | ||
346 | #define HC_HSTMD_MASK 0x00070000 | ||
347 | #define HC_HSTOPSF_MASK 0x000001c0 | ||
348 | #define HC_HSTOPSPZF_MASK 0x00000038 | ||
349 | #define HC_HSTOPSPZP_MASK 0x00000007 | ||
350 | #define HC_HSTMD_NeverPass 0x00000000 | ||
351 | #define HC_HSTMD_LT 0x00010000 | ||
352 | #define HC_HSTMD_EQ 0x00020000 | ||
353 | #define HC_HSTMD_LE 0x00030000 | ||
354 | #define HC_HSTMD_GT 0x00040000 | ||
355 | #define HC_HSTMD_NE 0x00050000 | ||
356 | #define HC_HSTMD_GE 0x00060000 | ||
357 | #define HC_HSTMD_AllPass 0x00070000 | ||
358 | #define HC_HSTOPSF_KEEP 0x00000000 | ||
359 | #define HC_HSTOPSF_ZERO 0x00000040 | ||
360 | #define HC_HSTOPSF_REPLACE 0x00000080 | ||
361 | #define HC_HSTOPSF_INCRSAT 0x000000c0 | ||
362 | #define HC_HSTOPSF_DECRSAT 0x00000100 | ||
363 | #define HC_HSTOPSF_INVERT 0x00000140 | ||
364 | #define HC_HSTOPSF_INCR 0x00000180 | ||
365 | #define HC_HSTOPSF_DECR 0x000001c0 | ||
366 | #define HC_HSTOPSPZF_KEEP 0x00000000 | ||
367 | #define HC_HSTOPSPZF_ZERO 0x00000008 | ||
368 | #define HC_HSTOPSPZF_REPLACE 0x00000010 | ||
369 | #define HC_HSTOPSPZF_INCRSAT 0x00000018 | ||
370 | #define HC_HSTOPSPZF_DECRSAT 0x00000020 | ||
371 | #define HC_HSTOPSPZF_INVERT 0x00000028 | ||
372 | #define HC_HSTOPSPZF_INCR 0x00000030 | ||
373 | #define HC_HSTOPSPZF_DECR 0x00000038 | ||
374 | #define HC_HSTOPSPZP_KEEP 0x00000000 | ||
375 | #define HC_HSTOPSPZP_ZERO 0x00000001 | ||
376 | #define HC_HSTOPSPZP_REPLACE 0x00000002 | ||
377 | #define HC_HSTOPSPZP_INCRSAT 0x00000003 | ||
378 | #define HC_HSTOPSPZP_DECRSAT 0x00000004 | ||
379 | #define HC_HSTOPSPZP_INVERT 0x00000005 | ||
380 | #define HC_HSTOPSPZP_INCR 0x00000006 | ||
381 | #define HC_HSTOPSPZP_DECR 0x00000007 | ||
382 | |||
383 | /* Alpha Setting | ||
384 | */ | ||
385 | #define HC_SubA_HABBasL 0x0030 | ||
386 | #define HC_SubA_HABBasH 0x0031 | ||
387 | #define HC_SubA_HABFM 0x0032 | ||
388 | #define HC_SubA_HATMD 0x0033 | ||
389 | #define HC_SubA_HABLCsat 0x0034 | ||
390 | #define HC_SubA_HABLCop 0x0035 | ||
391 | #define HC_SubA_HABLAsat 0x0036 | ||
392 | #define HC_SubA_HABLAop 0x0037 | ||
393 | #define HC_SubA_HABLRCa 0x0038 | ||
394 | #define HC_SubA_HABLRFCa 0x0039 | ||
395 | #define HC_SubA_HABLRCbias 0x003a | ||
396 | #define HC_SubA_HABLRCb 0x003b | ||
397 | #define HC_SubA_HABLRFCb 0x003c | ||
398 | #define HC_SubA_HABLRAa 0x003d | ||
399 | #define HC_SubA_HABLRAb 0x003e | ||
400 | /* HC_SubA_HABFM | ||
401 | */ | ||
402 | #define HC_HABFM_MASK 0x00030000 | ||
403 | #define HC_HABLoc_MASK 0x0000c000 | ||
404 | #define HC_HABPit_MASK 0x000007ff | ||
405 | /* HC_SubA_HATMD | ||
406 | */ | ||
407 | #define HC_HATMD_MASK 0x00000700 | ||
408 | #define HC_HATREF_MASK 0x000000ff | ||
409 | #define HC_HATMD_NeverPass 0x00000000 | ||
410 | #define HC_HATMD_LT 0x00000100 | ||
411 | #define HC_HATMD_EQ 0x00000200 | ||
412 | #define HC_HATMD_LE 0x00000300 | ||
413 | #define HC_HATMD_GT 0x00000400 | ||
414 | #define HC_HATMD_NE 0x00000500 | ||
415 | #define HC_HATMD_GE 0x00000600 | ||
416 | #define HC_HATMD_AllPass 0x00000700 | ||
417 | /* HC_SubA_HABLCsat | ||
418 | */ | ||
419 | #define HC_HABLCsat_MASK 0x00010000 | ||
420 | #define HC_HABLCa_MASK 0x0000fc00 | ||
421 | #define HC_HABLCa_C_MASK 0x0000c000 | ||
422 | #define HC_HABLCa_OPC_MASK 0x00003c00 | ||
423 | #define HC_HABLFCa_MASK 0x000003f0 | ||
424 | #define HC_HABLFCa_C_MASK 0x00000300 | ||
425 | #define HC_HABLFCa_OPC_MASK 0x000000f0 | ||
426 | #define HC_HABLCbias_MASK 0x0000000f | ||
427 | #define HC_HABLCbias_C_MASK 0x00000008 | ||
428 | #define HC_HABLCbias_OPC_MASK 0x00000007 | ||
429 | /*-- Define the input color. | ||
430 | */ | ||
431 | #define HC_XC_Csrc 0x00000000 | ||
432 | #define HC_XC_Cdst 0x00000001 | ||
433 | #define HC_XC_Asrc 0x00000002 | ||
434 | #define HC_XC_Adst 0x00000003 | ||
435 | #define HC_XC_Fog 0x00000004 | ||
436 | #define HC_XC_HABLRC 0x00000005 | ||
437 | #define HC_XC_minSrcDst 0x00000006 | ||
438 | #define HC_XC_maxSrcDst 0x00000007 | ||
439 | #define HC_XC_mimAsrcInvAdst 0x00000008 | ||
440 | #define HC_XC_OPC 0x00000000 | ||
441 | #define HC_XC_InvOPC 0x00000010 | ||
442 | #define HC_XC_OPCp5 0x00000020 | ||
443 | /*-- Define the input Alpha | ||
444 | */ | ||
445 | #define HC_XA_OPA 0x00000000 | ||
446 | #define HC_XA_InvOPA 0x00000010 | ||
447 | #define HC_XA_OPAp5 0x00000020 | ||
448 | #define HC_XA_0 0x00000000 | ||
449 | #define HC_XA_Asrc 0x00000001 | ||
450 | #define HC_XA_Adst 0x00000002 | ||
451 | #define HC_XA_Fog 0x00000003 | ||
452 | #define HC_XA_minAsrcFog 0x00000004 | ||
453 | #define HC_XA_minAsrcAdst 0x00000005 | ||
454 | #define HC_XA_maxAsrcFog 0x00000006 | ||
455 | #define HC_XA_maxAsrcAdst 0x00000007 | ||
456 | #define HC_XA_HABLRA 0x00000008 | ||
457 | #define HC_XA_minAsrcInvAdst 0x00000008 | ||
458 | #define HC_XA_HABLFRA 0x00000009 | ||
459 | /*-- | ||
460 | */ | ||
461 | #define HC_HABLCa_OPC (HC_XC_OPC << 10) | ||
462 | #define HC_HABLCa_InvOPC (HC_XC_InvOPC << 10) | ||
463 | #define HC_HABLCa_OPCp5 (HC_XC_OPCp5 << 10) | ||
464 | #define HC_HABLCa_Csrc (HC_XC_Csrc << 10) | ||
465 | #define HC_HABLCa_Cdst (HC_XC_Cdst << 10) | ||
466 | #define HC_HABLCa_Asrc (HC_XC_Asrc << 10) | ||
467 | #define HC_HABLCa_Adst (HC_XC_Adst << 10) | ||
468 | #define HC_HABLCa_Fog (HC_XC_Fog << 10) | ||
469 | #define HC_HABLCa_HABLRCa (HC_XC_HABLRC << 10) | ||
470 | #define HC_HABLCa_minSrcDst (HC_XC_minSrcDst << 10) | ||
471 | #define HC_HABLCa_maxSrcDst (HC_XC_maxSrcDst << 10) | ||
472 | #define HC_HABLFCa_OPC (HC_XC_OPC << 4) | ||
473 | #define HC_HABLFCa_InvOPC (HC_XC_InvOPC << 4) | ||
474 | #define HC_HABLFCa_OPCp5 (HC_XC_OPCp5 << 4) | ||
475 | #define HC_HABLFCa_Csrc (HC_XC_Csrc << 4) | ||
476 | #define HC_HABLFCa_Cdst (HC_XC_Cdst << 4) | ||
477 | #define HC_HABLFCa_Asrc (HC_XC_Asrc << 4) | ||
478 | #define HC_HABLFCa_Adst (HC_XC_Adst << 4) | ||
479 | #define HC_HABLFCa_Fog (HC_XC_Fog << 4) | ||
480 | #define HC_HABLFCa_HABLRCa (HC_XC_HABLRC << 4) | ||
481 | #define HC_HABLFCa_minSrcDst (HC_XC_minSrcDst << 4) | ||
482 | #define HC_HABLFCa_maxSrcDst (HC_XC_maxSrcDst << 4) | ||
483 | #define HC_HABLFCa_mimAsrcInvAdst (HC_XC_mimAsrcInvAdst << 4) | ||
484 | #define HC_HABLCbias_HABLRCbias 0x00000000 | ||
485 | #define HC_HABLCbias_Asrc 0x00000001 | ||
486 | #define HC_HABLCbias_Adst 0x00000002 | ||
487 | #define HC_HABLCbias_Fog 0x00000003 | ||
488 | #define HC_HABLCbias_Cin 0x00000004 | ||
489 | /* HC_SubA_HABLCop 0x0035 | ||
490 | */ | ||
491 | #define HC_HABLdot_MASK 0x00010000 | ||
492 | #define HC_HABLCop_MASK 0x00004000 | ||
493 | #define HC_HABLCb_MASK 0x00003f00 | ||
494 | #define HC_HABLCb_C_MASK 0x00003000 | ||
495 | #define HC_HABLCb_OPC_MASK 0x00000f00 | ||
496 | #define HC_HABLFCb_MASK 0x000000fc | ||
497 | #define HC_HABLFCb_C_MASK 0x000000c0 | ||
498 | #define HC_HABLFCb_OPC_MASK 0x0000003c | ||
499 | #define HC_HABLCshift_MASK 0x00000003 | ||
500 | #define HC_HABLCb_OPC (HC_XC_OPC << 8) | ||
501 | #define HC_HABLCb_InvOPC (HC_XC_InvOPC << 8) | ||
502 | #define HC_HABLCb_OPCp5 (HC_XC_OPCp5 << 8) | ||
503 | #define HC_HABLCb_Csrc (HC_XC_Csrc << 8) | ||
504 | #define HC_HABLCb_Cdst (HC_XC_Cdst << 8) | ||
505 | #define HC_HABLCb_Asrc (HC_XC_Asrc << 8) | ||
506 | #define HC_HABLCb_Adst (HC_XC_Adst << 8) | ||
507 | #define HC_HABLCb_Fog (HC_XC_Fog << 8) | ||
508 | #define HC_HABLCb_HABLRCa (HC_XC_HABLRC << 8) | ||
509 | #define HC_HABLCb_minSrcDst (HC_XC_minSrcDst << 8) | ||
510 | #define HC_HABLCb_maxSrcDst (HC_XC_maxSrcDst << 8) | ||
511 | #define HC_HABLFCb_OPC (HC_XC_OPC << 2) | ||
512 | #define HC_HABLFCb_InvOPC (HC_XC_InvOPC << 2) | ||
513 | #define HC_HABLFCb_OPCp5 (HC_XC_OPCp5 << 2) | ||
514 | #define HC_HABLFCb_Csrc (HC_XC_Csrc << 2) | ||
515 | #define HC_HABLFCb_Cdst (HC_XC_Cdst << 2) | ||
516 | #define HC_HABLFCb_Asrc (HC_XC_Asrc << 2) | ||
517 | #define HC_HABLFCb_Adst (HC_XC_Adst << 2) | ||
518 | #define HC_HABLFCb_Fog (HC_XC_Fog << 2) | ||
519 | #define HC_HABLFCb_HABLRCb (HC_XC_HABLRC << 2) | ||
520 | #define HC_HABLFCb_minSrcDst (HC_XC_minSrcDst << 2) | ||
521 | #define HC_HABLFCb_maxSrcDst (HC_XC_maxSrcDst << 2) | ||
522 | #define HC_HABLFCb_mimAsrcInvAdst (HC_XC_mimAsrcInvAdst << 2) | ||
523 | /* HC_SubA_HABLAsat 0x0036 | ||
524 | */ | ||
525 | #define HC_HABLAsat_MASK 0x00010000 | ||
526 | #define HC_HABLAa_MASK 0x0000fc00 | ||
527 | #define HC_HABLAa_A_MASK 0x0000c000 | ||
528 | #define HC_HABLAa_OPA_MASK 0x00003c00 | ||
529 | #define HC_HABLFAa_MASK 0x000003f0 | ||
530 | #define HC_HABLFAa_A_MASK 0x00000300 | ||
531 | #define HC_HABLFAa_OPA_MASK 0x000000f0 | ||
532 | #define HC_HABLAbias_MASK 0x0000000f | ||
533 | #define HC_HABLAbias_A_MASK 0x00000008 | ||
534 | #define HC_HABLAbias_OPA_MASK 0x00000007 | ||
535 | #define HC_HABLAa_OPA (HC_XA_OPA << 10) | ||
536 | #define HC_HABLAa_InvOPA (HC_XA_InvOPA << 10) | ||
537 | #define HC_HABLAa_OPAp5 (HC_XA_OPAp5 << 10) | ||
538 | #define HC_HABLAa_0 (HC_XA_0 << 10) | ||
539 | #define HC_HABLAa_Asrc (HC_XA_Asrc << 10) | ||
540 | #define HC_HABLAa_Adst (HC_XA_Adst << 10) | ||
541 | #define HC_HABLAa_Fog (HC_XA_Fog << 10) | ||
542 | #define HC_HABLAa_minAsrcFog (HC_XA_minAsrcFog << 10) | ||
543 | #define HC_HABLAa_minAsrcAdst (HC_XA_minAsrcAdst << 10) | ||
544 | #define HC_HABLAa_maxAsrcFog (HC_XA_maxAsrcFog << 10) | ||
545 | #define HC_HABLAa_maxAsrcAdst (HC_XA_maxAsrcAdst << 10) | ||
546 | #define HC_HABLAa_HABLRA (HC_XA_HABLRA << 10) | ||
547 | #define HC_HABLFAa_OPA (HC_XA_OPA << 4) | ||
548 | #define HC_HABLFAa_InvOPA (HC_XA_InvOPA << 4) | ||
549 | #define HC_HABLFAa_OPAp5 (HC_XA_OPAp5 << 4) | ||
550 | #define HC_HABLFAa_0 (HC_XA_0 << 4) | ||
551 | #define HC_HABLFAa_Asrc (HC_XA_Asrc << 4) | ||
552 | #define HC_HABLFAa_Adst (HC_XA_Adst << 4) | ||
553 | #define HC_HABLFAa_Fog (HC_XA_Fog << 4) | ||
554 | #define HC_HABLFAa_minAsrcFog (HC_XA_minAsrcFog << 4) | ||
555 | #define HC_HABLFAa_minAsrcAdst (HC_XA_minAsrcAdst << 4) | ||
556 | #define HC_HABLFAa_maxAsrcFog (HC_XA_maxAsrcFog << 4) | ||
557 | #define HC_HABLFAa_maxAsrcAdst (HC_XA_maxAsrcAdst << 4) | ||
558 | #define HC_HABLFAa_minAsrcInvAdst (HC_XA_minAsrcInvAdst << 4) | ||
559 | #define HC_HABLFAa_HABLFRA (HC_XA_HABLFRA << 4) | ||
560 | #define HC_HABLAbias_HABLRAbias 0x00000000 | ||
561 | #define HC_HABLAbias_Asrc 0x00000001 | ||
562 | #define HC_HABLAbias_Adst 0x00000002 | ||
563 | #define HC_HABLAbias_Fog 0x00000003 | ||
564 | #define HC_HABLAbias_Aaa 0x00000004 | ||
565 | /* HC_SubA_HABLAop 0x0037 | ||
566 | */ | ||
567 | #define HC_HABLAop_MASK 0x00004000 | ||
568 | #define HC_HABLAb_MASK 0x00003f00 | ||
569 | #define HC_HABLAb_OPA_MASK 0x00000f00 | ||
570 | #define HC_HABLFAb_MASK 0x000000fc | ||
571 | #define HC_HABLFAb_OPA_MASK 0x0000003c | ||
572 | #define HC_HABLAshift_MASK 0x00000003 | ||
573 | #define HC_HABLAb_OPA (HC_XA_OPA << 8) | ||
574 | #define HC_HABLAb_InvOPA (HC_XA_InvOPA << 8) | ||
575 | #define HC_HABLAb_OPAp5 (HC_XA_OPAp5 << 8) | ||
576 | #define HC_HABLAb_0 (HC_XA_0 << 8) | ||
577 | #define HC_HABLAb_Asrc (HC_XA_Asrc << 8) | ||
578 | #define HC_HABLAb_Adst (HC_XA_Adst << 8) | ||
579 | #define HC_HABLAb_Fog (HC_XA_Fog << 8) | ||
580 | #define HC_HABLAb_minAsrcFog (HC_XA_minAsrcFog << 8) | ||
581 | #define HC_HABLAb_minAsrcAdst (HC_XA_minAsrcAdst << 8) | ||
582 | #define HC_HABLAb_maxAsrcFog (HC_XA_maxAsrcFog << 8) | ||
583 | #define HC_HABLAb_maxAsrcAdst (HC_XA_maxAsrcAdst << 8) | ||
584 | #define HC_HABLAb_HABLRA (HC_XA_HABLRA << 8) | ||
585 | #define HC_HABLFAb_OPA (HC_XA_OPA << 2) | ||
586 | #define HC_HABLFAb_InvOPA (HC_XA_InvOPA << 2) | ||
587 | #define HC_HABLFAb_OPAp5 (HC_XA_OPAp5 << 2) | ||
588 | #define HC_HABLFAb_0 (HC_XA_0 << 2) | ||
589 | #define HC_HABLFAb_Asrc (HC_XA_Asrc << 2) | ||
590 | #define HC_HABLFAb_Adst (HC_XA_Adst << 2) | ||
591 | #define HC_HABLFAb_Fog (HC_XA_Fog << 2) | ||
592 | #define HC_HABLFAb_minAsrcFog (HC_XA_minAsrcFog << 2) | ||
593 | #define HC_HABLFAb_minAsrcAdst (HC_XA_minAsrcAdst << 2) | ||
594 | #define HC_HABLFAb_maxAsrcFog (HC_XA_maxAsrcFog << 2) | ||
595 | #define HC_HABLFAb_maxAsrcAdst (HC_XA_maxAsrcAdst << 2) | ||
596 | #define HC_HABLFAb_minAsrcInvAdst (HC_XA_minAsrcInvAdst << 2) | ||
597 | #define HC_HABLFAb_HABLFRA (HC_XA_HABLFRA << 2) | ||
598 | /* HC_SubA_HABLRAa 0x003d | ||
599 | */ | ||
600 | #define HC_HABLRAa_MASK 0x00ff0000 | ||
601 | #define HC_HABLRFAa_MASK 0x0000ff00 | ||
602 | #define HC_HABLRAbias_MASK 0x000000ff | ||
603 | #define HC_HABLRAa_SHIFT 16 | ||
604 | #define HC_HABLRFAa_SHIFT 8 | ||
605 | /* HC_SubA_HABLRAb 0x003e | ||
606 | */ | ||
607 | #define HC_HABLRAb_MASK 0x0000ff00 | ||
608 | #define HC_HABLRFAb_MASK 0x000000ff | ||
609 | #define HC_HABLRAb_SHIFT 8 | ||
610 | |||
611 | /* Destination Setting | ||
612 | */ | ||
613 | #define HC_SubA_HDBBasL 0x0040 | ||
614 | #define HC_SubA_HDBBasH 0x0041 | ||
615 | #define HC_SubA_HDBFM 0x0042 | ||
616 | #define HC_SubA_HFBBMSKL 0x0043 | ||
617 | #define HC_SubA_HROP 0x0044 | ||
618 | /* HC_SubA_HDBFM 0x0042 | ||
619 | */ | ||
620 | #define HC_HDBFM_MASK 0x001f0000 | ||
621 | #define HC_HDBLoc_MASK 0x0000c000 | ||
622 | #define HC_HDBPit_MASK 0x00003fff | ||
623 | #define HC_HDBFM_RGB555 0x00000000 | ||
624 | #define HC_HDBFM_RGB565 0x00010000 | ||
625 | #define HC_HDBFM_ARGB4444 0x00020000 | ||
626 | #define HC_HDBFM_ARGB1555 0x00030000 | ||
627 | #define HC_HDBFM_BGR555 0x00040000 | ||
628 | #define HC_HDBFM_BGR565 0x00050000 | ||
629 | #define HC_HDBFM_ABGR4444 0x00060000 | ||
630 | #define HC_HDBFM_ABGR1555 0x00070000 | ||
631 | #define HC_HDBFM_ARGB0888 0x00080000 | ||
632 | #define HC_HDBFM_ARGB8888 0x00090000 | ||
633 | #define HC_HDBFM_ABGR0888 0x000a0000 | ||
634 | #define HC_HDBFM_ABGR8888 0x000b0000 | ||
635 | #define HC_HDBLoc_Local 0x00000000 | ||
636 | #define HC_HDBLoc_Sys 0x00004000 | ||
637 | /* HC_SubA_HROP 0x0044 | ||
638 | */ | ||
639 | #define HC_HROP_MASK 0x00000f00 | ||
640 | #define HC_HFBBMSKH_MASK 0x000000ff | ||
641 | #define HC_HROP_BLACK 0x00000000 | ||
642 | #define HC_HROP_DPon 0x00000100 | ||
643 | #define HC_HROP_DPna 0x00000200 | ||
644 | #define HC_HROP_Pn 0x00000300 | ||
645 | #define HC_HROP_PDna 0x00000400 | ||
646 | #define HC_HROP_Dn 0x00000500 | ||
647 | #define HC_HROP_DPx 0x00000600 | ||
648 | #define HC_HROP_DPan 0x00000700 | ||
649 | #define HC_HROP_DPa 0x00000800 | ||
650 | #define HC_HROP_DPxn 0x00000900 | ||
651 | #define HC_HROP_D 0x00000a00 | ||
652 | #define HC_HROP_DPno 0x00000b00 | ||
653 | #define HC_HROP_P 0x00000c00 | ||
654 | #define HC_HROP_PDno 0x00000d00 | ||
655 | #define HC_HROP_DPo 0x00000e00 | ||
656 | #define HC_HROP_WHITE 0x00000f00 | ||
657 | |||
658 | /* Fog Setting | ||
659 | */ | ||
660 | #define HC_SubA_HFogLF 0x0050 | ||
661 | #define HC_SubA_HFogCL 0x0051 | ||
662 | #define HC_SubA_HFogCH 0x0052 | ||
663 | #define HC_SubA_HFogStL 0x0053 | ||
664 | #define HC_SubA_HFogStH 0x0054 | ||
665 | #define HC_SubA_HFogOOdMF 0x0055 | ||
666 | #define HC_SubA_HFogOOdEF 0x0056 | ||
667 | #define HC_SubA_HFogEndL 0x0057 | ||
668 | #define HC_SubA_HFogDenst 0x0058 | ||
669 | /* HC_SubA_FogLF 0x0050 | ||
670 | */ | ||
671 | #define HC_FogLF_MASK 0x00000010 | ||
672 | #define HC_FogEq_MASK 0x00000008 | ||
673 | #define HC_FogMD_MASK 0x00000007 | ||
674 | #define HC_FogMD_LocalFog 0x00000000 | ||
675 | #define HC_FogMD_LinearFog 0x00000002 | ||
676 | #define HC_FogMD_ExponentialFog 0x00000004 | ||
677 | #define HC_FogMD_Exponential2Fog 0x00000005 | ||
678 | /* #define HC_FogMD_FogTable 0x00000003 */ | ||
679 | |||
680 | /* HC_SubA_HFogDenst 0x0058 | ||
681 | */ | ||
682 | #define HC_FogDenst_MASK 0x001fff00 | ||
683 | #define HC_FogEndL_MASK 0x000000ff | ||
684 | |||
685 | /* Texture subtype definitions | ||
686 | */ | ||
687 | #define HC_SubType_Tex0 0x00000000 | ||
688 | #define HC_SubType_Tex1 0x00000001 | ||
689 | #define HC_SubType_TexGeneral 0x000000fe | ||
690 | |||
691 | /* Attribute of texture n | ||
692 | */ | ||
693 | #define HC_SubA_HTXnL0BasL 0x0000 | ||
694 | #define HC_SubA_HTXnL1BasL 0x0001 | ||
695 | #define HC_SubA_HTXnL2BasL 0x0002 | ||
696 | #define HC_SubA_HTXnL3BasL 0x0003 | ||
697 | #define HC_SubA_HTXnL4BasL 0x0004 | ||
698 | #define HC_SubA_HTXnL5BasL 0x0005 | ||
699 | #define HC_SubA_HTXnL6BasL 0x0006 | ||
700 | #define HC_SubA_HTXnL7BasL 0x0007 | ||
701 | #define HC_SubA_HTXnL8BasL 0x0008 | ||
702 | #define HC_SubA_HTXnL9BasL 0x0009 | ||
703 | #define HC_SubA_HTXnLaBasL 0x000a | ||
704 | #define HC_SubA_HTXnLbBasL 0x000b | ||
705 | #define HC_SubA_HTXnLcBasL 0x000c | ||
706 | #define HC_SubA_HTXnLdBasL 0x000d | ||
707 | #define HC_SubA_HTXnLeBasL 0x000e | ||
708 | #define HC_SubA_HTXnLfBasL 0x000f | ||
709 | #define HC_SubA_HTXnL10BasL 0x0010 | ||
710 | #define HC_SubA_HTXnL11BasL 0x0011 | ||
711 | #define HC_SubA_HTXnL012BasH 0x0020 | ||
712 | #define HC_SubA_HTXnL345BasH 0x0021 | ||
713 | #define HC_SubA_HTXnL678BasH 0x0022 | ||
714 | #define HC_SubA_HTXnL9abBasH 0x0023 | ||
715 | #define HC_SubA_HTXnLcdeBasH 0x0024 | ||
716 | #define HC_SubA_HTXnLf1011BasH 0x0025 | ||
717 | #define HC_SubA_HTXnL0Pit 0x002b | ||
718 | #define HC_SubA_HTXnL1Pit 0x002c | ||
719 | #define HC_SubA_HTXnL2Pit 0x002d | ||
720 | #define HC_SubA_HTXnL3Pit 0x002e | ||
721 | #define HC_SubA_HTXnL4Pit 0x002f | ||
722 | #define HC_SubA_HTXnL5Pit 0x0030 | ||
723 | #define HC_SubA_HTXnL6Pit 0x0031 | ||
724 | #define HC_SubA_HTXnL7Pit 0x0032 | ||
725 | #define HC_SubA_HTXnL8Pit 0x0033 | ||
726 | #define HC_SubA_HTXnL9Pit 0x0034 | ||
727 | #define HC_SubA_HTXnLaPit 0x0035 | ||
728 | #define HC_SubA_HTXnLbPit 0x0036 | ||
729 | #define HC_SubA_HTXnLcPit 0x0037 | ||
730 | #define HC_SubA_HTXnLdPit 0x0038 | ||
731 | #define HC_SubA_HTXnLePit 0x0039 | ||
732 | #define HC_SubA_HTXnLfPit 0x003a | ||
733 | #define HC_SubA_HTXnL10Pit 0x003b | ||
734 | #define HC_SubA_HTXnL11Pit 0x003c | ||
735 | #define HC_SubA_HTXnL0_5WE 0x004b | ||
736 | #define HC_SubA_HTXnL6_bWE 0x004c | ||
737 | #define HC_SubA_HTXnLc_11WE 0x004d | ||
738 | #define HC_SubA_HTXnL0_5HE 0x0051 | ||
739 | #define HC_SubA_HTXnL6_bHE 0x0052 | ||
740 | #define HC_SubA_HTXnLc_11HE 0x0053 | ||
741 | #define HC_SubA_HTXnL0OS 0x0077 | ||
742 | #define HC_SubA_HTXnTB 0x0078 | ||
743 | #define HC_SubA_HTXnMPMD 0x0079 | ||
744 | #define HC_SubA_HTXnCLODu 0x007a | ||
745 | #define HC_SubA_HTXnFM 0x007b | ||
746 | #define HC_SubA_HTXnTRCH 0x007c | ||
747 | #define HC_SubA_HTXnTRCL 0x007d | ||
748 | #define HC_SubA_HTXnTBC 0x007e | ||
749 | #define HC_SubA_HTXnTRAH 0x007f | ||
750 | #define HC_SubA_HTXnTBLCsat 0x0080 | ||
751 | #define HC_SubA_HTXnTBLCop 0x0081 | ||
752 | #define HC_SubA_HTXnTBLMPfog 0x0082 | ||
753 | #define HC_SubA_HTXnTBLAsat 0x0083 | ||
754 | #define HC_SubA_HTXnTBLRCa 0x0085 | ||
755 | #define HC_SubA_HTXnTBLRCb 0x0086 | ||
756 | #define HC_SubA_HTXnTBLRCc 0x0087 | ||
757 | #define HC_SubA_HTXnTBLRCbias 0x0088 | ||
758 | #define HC_SubA_HTXnTBLRAa 0x0089 | ||
759 | #define HC_SubA_HTXnTBLRFog 0x008a | ||
760 | #define HC_SubA_HTXnBumpM00 0x0090 | ||
761 | #define HC_SubA_HTXnBumpM01 0x0091 | ||
762 | #define HC_SubA_HTXnBumpM10 0x0092 | ||
763 | #define HC_SubA_HTXnBumpM11 0x0093 | ||
764 | #define HC_SubA_HTXnLScale 0x0094 | ||
765 | #define HC_SubA_HTXSMD 0x0000 | ||
766 | /* HC_SubA_HTXnL012BasH 0x0020 | ||
767 | */ | ||
768 | #define HC_HTXnL0BasH_MASK 0x000000ff | ||
769 | #define HC_HTXnL1BasH_MASK 0x0000ff00 | ||
770 | #define HC_HTXnL2BasH_MASK 0x00ff0000 | ||
771 | #define HC_HTXnL1BasH_SHIFT 8 | ||
772 | #define HC_HTXnL2BasH_SHIFT 16 | ||
773 | /* HC_SubA_HTXnL345BasH 0x0021 | ||
774 | */ | ||
775 | #define HC_HTXnL3BasH_MASK 0x000000ff | ||
776 | #define HC_HTXnL4BasH_MASK 0x0000ff00 | ||
777 | #define HC_HTXnL5BasH_MASK 0x00ff0000 | ||
778 | #define HC_HTXnL4BasH_SHIFT 8 | ||
779 | #define HC_HTXnL5BasH_SHIFT 16 | ||
780 | /* HC_SubA_HTXnL678BasH 0x0022 | ||
781 | */ | ||
782 | #define HC_HTXnL6BasH_MASK 0x000000ff | ||
783 | #define HC_HTXnL7BasH_MASK 0x0000ff00 | ||
784 | #define HC_HTXnL8BasH_MASK 0x00ff0000 | ||
785 | #define HC_HTXnL7BasH_SHIFT 8 | ||
786 | #define HC_HTXnL8BasH_SHIFT 16 | ||
787 | /* HC_SubA_HTXnL9abBasH 0x0023 | ||
788 | */ | ||
789 | #define HC_HTXnL9BasH_MASK 0x000000ff | ||
790 | #define HC_HTXnLaBasH_MASK 0x0000ff00 | ||
791 | #define HC_HTXnLbBasH_MASK 0x00ff0000 | ||
792 | #define HC_HTXnLaBasH_SHIFT 8 | ||
793 | #define HC_HTXnLbBasH_SHIFT 16 | ||
794 | /* HC_SubA_HTXnLcdeBasH 0x0024 | ||
795 | */ | ||
796 | #define HC_HTXnLcBasH_MASK 0x000000ff | ||
797 | #define HC_HTXnLdBasH_MASK 0x0000ff00 | ||
798 | #define HC_HTXnLeBasH_MASK 0x00ff0000 | ||
799 | #define HC_HTXnLdBasH_SHIFT 8 | ||
800 | #define HC_HTXnLeBasH_SHIFT 16 | ||
801 | /* HC_SubA_HTXnLcdeBasH 0x0025 | ||
802 | */ | ||
803 | #define HC_HTXnLfBasH_MASK 0x000000ff | ||
804 | #define HC_HTXnL10BasH_MASK 0x0000ff00 | ||
805 | #define HC_HTXnL11BasH_MASK 0x00ff0000 | ||
806 | #define HC_HTXnL10BasH_SHIFT 8 | ||
807 | #define HC_HTXnL11BasH_SHIFT 16 | ||
808 | /* HC_SubA_HTXnL0Pit 0x002b | ||
809 | */ | ||
810 | #define HC_HTXnLnPit_MASK 0x00003fff | ||
811 | #define HC_HTXnEnPit_MASK 0x00080000 | ||
812 | #define HC_HTXnLnPitE_MASK 0x00f00000 | ||
813 | #define HC_HTXnLnPitE_SHIFT 20 | ||
814 | /* HC_SubA_HTXnL0_5WE 0x004b | ||
815 | */ | ||
816 | #define HC_HTXnL0WE_MASK 0x0000000f | ||
817 | #define HC_HTXnL1WE_MASK 0x000000f0 | ||
818 | #define HC_HTXnL2WE_MASK 0x00000f00 | ||
819 | #define HC_HTXnL3WE_MASK 0x0000f000 | ||
820 | #define HC_HTXnL4WE_MASK 0x000f0000 | ||
821 | #define HC_HTXnL5WE_MASK 0x00f00000 | ||
822 | #define HC_HTXnL1WE_SHIFT 4 | ||
823 | #define HC_HTXnL2WE_SHIFT 8 | ||
824 | #define HC_HTXnL3WE_SHIFT 12 | ||
825 | #define HC_HTXnL4WE_SHIFT 16 | ||
826 | #define HC_HTXnL5WE_SHIFT 20 | ||
827 | /* HC_SubA_HTXnL6_bWE 0x004c | ||
828 | */ | ||
829 | #define HC_HTXnL6WE_MASK 0x0000000f | ||
830 | #define HC_HTXnL7WE_MASK 0x000000f0 | ||
831 | #define HC_HTXnL8WE_MASK 0x00000f00 | ||
832 | #define HC_HTXnL9WE_MASK 0x0000f000 | ||
833 | #define HC_HTXnLaWE_MASK 0x000f0000 | ||
834 | #define HC_HTXnLbWE_MASK 0x00f00000 | ||
835 | #define HC_HTXnL7WE_SHIFT 4 | ||
836 | #define HC_HTXnL8WE_SHIFT 8 | ||
837 | #define HC_HTXnL9WE_SHIFT 12 | ||
838 | #define HC_HTXnLaWE_SHIFT 16 | ||
839 | #define HC_HTXnLbWE_SHIFT 20 | ||
840 | /* HC_SubA_HTXnLc_11WE 0x004d | ||
841 | */ | ||
842 | #define HC_HTXnLcWE_MASK 0x0000000f | ||
843 | #define HC_HTXnLdWE_MASK 0x000000f0 | ||
844 | #define HC_HTXnLeWE_MASK 0x00000f00 | ||
845 | #define HC_HTXnLfWE_MASK 0x0000f000 | ||
846 | #define HC_HTXnL10WE_MASK 0x000f0000 | ||
847 | #define HC_HTXnL11WE_MASK 0x00f00000 | ||
848 | #define HC_HTXnLdWE_SHIFT 4 | ||
849 | #define HC_HTXnLeWE_SHIFT 8 | ||
850 | #define HC_HTXnLfWE_SHIFT 12 | ||
851 | #define HC_HTXnL10WE_SHIFT 16 | ||
852 | #define HC_HTXnL11WE_SHIFT 20 | ||
853 | /* HC_SubA_HTXnL0_5HE 0x0051 | ||
854 | */ | ||
855 | #define HC_HTXnL0HE_MASK 0x0000000f | ||
856 | #define HC_HTXnL1HE_MASK 0x000000f0 | ||
857 | #define HC_HTXnL2HE_MASK 0x00000f00 | ||
858 | #define HC_HTXnL3HE_MASK 0x0000f000 | ||
859 | #define HC_HTXnL4HE_MASK 0x000f0000 | ||
860 | #define HC_HTXnL5HE_MASK 0x00f00000 | ||
861 | #define HC_HTXnL1HE_SHIFT 4 | ||
862 | #define HC_HTXnL2HE_SHIFT 8 | ||
863 | #define HC_HTXnL3HE_SHIFT 12 | ||
864 | #define HC_HTXnL4HE_SHIFT 16 | ||
865 | #define HC_HTXnL5HE_SHIFT 20 | ||
866 | /* HC_SubA_HTXnL6_bHE 0x0052 | ||
867 | */ | ||
868 | #define HC_HTXnL6HE_MASK 0x0000000f | ||
869 | #define HC_HTXnL7HE_MASK 0x000000f0 | ||
870 | #define HC_HTXnL8HE_MASK 0x00000f00 | ||
871 | #define HC_HTXnL9HE_MASK 0x0000f000 | ||
872 | #define HC_HTXnLaHE_MASK 0x000f0000 | ||
873 | #define HC_HTXnLbHE_MASK 0x00f00000 | ||
874 | #define HC_HTXnL7HE_SHIFT 4 | ||
875 | #define HC_HTXnL8HE_SHIFT 8 | ||
876 | #define HC_HTXnL9HE_SHIFT 12 | ||
877 | #define HC_HTXnLaHE_SHIFT 16 | ||
878 | #define HC_HTXnLbHE_SHIFT 20 | ||
879 | /* HC_SubA_HTXnLc_11HE 0x0053 | ||
880 | */ | ||
881 | #define HC_HTXnLcHE_MASK 0x0000000f | ||
882 | #define HC_HTXnLdHE_MASK 0x000000f0 | ||
883 | #define HC_HTXnLeHE_MASK 0x00000f00 | ||
884 | #define HC_HTXnLfHE_MASK 0x0000f000 | ||
885 | #define HC_HTXnL10HE_MASK 0x000f0000 | ||
886 | #define HC_HTXnL11HE_MASK 0x00f00000 | ||
887 | #define HC_HTXnLdHE_SHIFT 4 | ||
888 | #define HC_HTXnLeHE_SHIFT 8 | ||
889 | #define HC_HTXnLfHE_SHIFT 12 | ||
890 | #define HC_HTXnL10HE_SHIFT 16 | ||
891 | #define HC_HTXnL11HE_SHIFT 20 | ||
892 | /* HC_SubA_HTXnL0OS 0x0077 | ||
893 | */ | ||
894 | #define HC_HTXnL0OS_MASK 0x003ff000 | ||
895 | #define HC_HTXnLVmax_MASK 0x00000fc0 | ||
896 | #define HC_HTXnLVmin_MASK 0x0000003f | ||
897 | #define HC_HTXnL0OS_SHIFT 12 | ||
898 | #define HC_HTXnLVmax_SHIFT 6 | ||
899 | /* HC_SubA_HTXnTB 0x0078 | ||
900 | */ | ||
901 | #define HC_HTXnTB_MASK 0x00f00000 | ||
902 | #define HC_HTXnFLSe_MASK 0x0000e000 | ||
903 | #define HC_HTXnFLSs_MASK 0x00001c00 | ||
904 | #define HC_HTXnFLTe_MASK 0x00000380 | ||
905 | #define HC_HTXnFLTs_MASK 0x00000070 | ||
906 | #define HC_HTXnFLDs_MASK 0x0000000f | ||
907 | #define HC_HTXnTB_NoTB 0x00000000 | ||
908 | #define HC_HTXnTB_TBC_S 0x00100000 | ||
909 | #define HC_HTXnTB_TBC_T 0x00200000 | ||
910 | #define HC_HTXnTB_TB_S 0x00400000 | ||
911 | #define HC_HTXnTB_TB_T 0x00800000 | ||
912 | #define HC_HTXnFLSe_Nearest 0x00000000 | ||
913 | #define HC_HTXnFLSe_Linear 0x00002000 | ||
914 | #define HC_HTXnFLSe_NonLinear 0x00004000 | ||
915 | #define HC_HTXnFLSe_Sharp 0x00008000 | ||
916 | #define HC_HTXnFLSe_Flat_Gaussian_Cubic 0x0000c000 | ||
917 | #define HC_HTXnFLSs_Nearest 0x00000000 | ||
918 | #define HC_HTXnFLSs_Linear 0x00000400 | ||
919 | #define HC_HTXnFLSs_NonLinear 0x00000800 | ||
920 | #define HC_HTXnFLSs_Flat_Gaussian_Cubic 0x00001800 | ||
921 | #define HC_HTXnFLTe_Nearest 0x00000000 | ||
922 | #define HC_HTXnFLTe_Linear 0x00000080 | ||
923 | #define HC_HTXnFLTe_NonLinear 0x00000100 | ||
924 | #define HC_HTXnFLTe_Sharp 0x00000180 | ||
925 | #define HC_HTXnFLTe_Flat_Gaussian_Cubic 0x00000300 | ||
926 | #define HC_HTXnFLTs_Nearest 0x00000000 | ||
927 | #define HC_HTXnFLTs_Linear 0x00000010 | ||
928 | #define HC_HTXnFLTs_NonLinear 0x00000020 | ||
929 | #define HC_HTXnFLTs_Flat_Gaussian_Cubic 0x00000060 | ||
930 | #define HC_HTXnFLDs_Tex0 0x00000000 | ||
931 | #define HC_HTXnFLDs_Nearest 0x00000001 | ||
932 | #define HC_HTXnFLDs_Linear 0x00000002 | ||
933 | #define HC_HTXnFLDs_NonLinear 0x00000003 | ||
934 | #define HC_HTXnFLDs_Dither 0x00000004 | ||
935 | #define HC_HTXnFLDs_ConstLOD 0x00000005 | ||
936 | #define HC_HTXnFLDs_Ani 0x00000006 | ||
937 | #define HC_HTXnFLDs_AniDither 0x00000007 | ||
938 | /* HC_SubA_HTXnMPMD 0x0079 | ||
939 | */ | ||
940 | #define HC_HTXnMPMD_SMASK 0x00070000 | ||
941 | #define HC_HTXnMPMD_TMASK 0x00380000 | ||
942 | #define HC_HTXnLODDTf_MASK 0x00000007 | ||
943 | #define HC_HTXnXY2ST_MASK 0x00000008 | ||
944 | #define HC_HTXnMPMD_Tsingle 0x00000000 | ||
945 | #define HC_HTXnMPMD_Tclamp 0x00080000 | ||
946 | #define HC_HTXnMPMD_Trepeat 0x00100000 | ||
947 | #define HC_HTXnMPMD_Tmirror 0x00180000 | ||
948 | #define HC_HTXnMPMD_Twrap 0x00200000 | ||
949 | #define HC_HTXnMPMD_Ssingle 0x00000000 | ||
950 | #define HC_HTXnMPMD_Sclamp 0x00010000 | ||
951 | #define HC_HTXnMPMD_Srepeat 0x00020000 | ||
952 | #define HC_HTXnMPMD_Smirror 0x00030000 | ||
953 | #define HC_HTXnMPMD_Swrap 0x00040000 | ||
954 | /* HC_SubA_HTXnCLODu 0x007a | ||
955 | */ | ||
956 | #define HC_HTXnCLODu_MASK 0x000ffc00 | ||
957 | #define HC_HTXnCLODd_MASK 0x000003ff | ||
958 | #define HC_HTXnCLODu_SHIFT 10 | ||
959 | /* HC_SubA_HTXnFM 0x007b | ||
960 | */ | ||
961 | #define HC_HTXnFM_MASK 0x00ff0000 | ||
962 | #define HC_HTXnLoc_MASK 0x00000003 | ||
963 | #define HC_HTXnFM_INDEX 0x00000000 | ||
964 | #define HC_HTXnFM_Intensity 0x00080000 | ||
965 | #define HC_HTXnFM_Lum 0x00100000 | ||
966 | #define HC_HTXnFM_Alpha 0x00180000 | ||
967 | #define HC_HTXnFM_DX 0x00280000 | ||
968 | #define HC_HTXnFM_ARGB16 0x00880000 | ||
969 | #define HC_HTXnFM_ARGB32 0x00980000 | ||
970 | #define HC_HTXnFM_ABGR16 0x00a80000 | ||
971 | #define HC_HTXnFM_ABGR32 0x00b80000 | ||
972 | #define HC_HTXnFM_RGBA16 0x00c80000 | ||
973 | #define HC_HTXnFM_RGBA32 0x00d80000 | ||
974 | #define HC_HTXnFM_BGRA16 0x00e80000 | ||
975 | #define HC_HTXnFM_BGRA32 0x00f80000 | ||
976 | #define HC_HTXnFM_BUMPMAP 0x00380000 | ||
977 | #define HC_HTXnFM_Index1 (HC_HTXnFM_INDEX | 0x00000000) | ||
978 | #define HC_HTXnFM_Index2 (HC_HTXnFM_INDEX | 0x00010000) | ||
979 | #define HC_HTXnFM_Index4 (HC_HTXnFM_INDEX | 0x00020000) | ||
980 | #define HC_HTXnFM_Index8 (HC_HTXnFM_INDEX | 0x00030000) | ||
981 | #define HC_HTXnFM_T1 (HC_HTXnFM_Intensity | 0x00000000) | ||
982 | #define HC_HTXnFM_T2 (HC_HTXnFM_Intensity | 0x00010000) | ||
983 | #define HC_HTXnFM_T4 (HC_HTXnFM_Intensity | 0x00020000) | ||
984 | #define HC_HTXnFM_T8 (HC_HTXnFM_Intensity | 0x00030000) | ||
985 | #define HC_HTXnFM_L1 (HC_HTXnFM_Lum | 0x00000000) | ||
986 | #define HC_HTXnFM_L2 (HC_HTXnFM_Lum | 0x00010000) | ||
987 | #define HC_HTXnFM_L4 (HC_HTXnFM_Lum | 0x00020000) | ||
988 | #define HC_HTXnFM_L8 (HC_HTXnFM_Lum | 0x00030000) | ||
989 | #define HC_HTXnFM_AL44 (HC_HTXnFM_Lum | 0x00040000) | ||
990 | #define HC_HTXnFM_AL88 (HC_HTXnFM_Lum | 0x00050000) | ||
991 | #define HC_HTXnFM_A1 (HC_HTXnFM_Alpha | 0x00000000) | ||
992 | #define HC_HTXnFM_A2 (HC_HTXnFM_Alpha | 0x00010000) | ||
993 | #define HC_HTXnFM_A4 (HC_HTXnFM_Alpha | 0x00020000) | ||
994 | #define HC_HTXnFM_A8 (HC_HTXnFM_Alpha | 0x00030000) | ||
995 | #define HC_HTXnFM_DX1 (HC_HTXnFM_DX | 0x00010000) | ||
996 | #define HC_HTXnFM_DX23 (HC_HTXnFM_DX | 0x00020000) | ||
997 | #define HC_HTXnFM_DX45 (HC_HTXnFM_DX | 0x00030000) | ||
998 | #define HC_HTXnFM_RGB555 (HC_HTXnFM_ARGB16 | 0x00000000) | ||
999 | #define HC_HTXnFM_RGB565 (HC_HTXnFM_ARGB16 | 0x00010000) | ||
1000 | #define HC_HTXnFM_ARGB1555 (HC_HTXnFM_ARGB16 | 0x00020000) | ||
1001 | #define HC_HTXnFM_ARGB4444 (HC_HTXnFM_ARGB16 | 0x00030000) | ||
1002 | #define HC_HTXnFM_ARGB0888 (HC_HTXnFM_ARGB32 | 0x00000000) | ||
1003 | #define HC_HTXnFM_ARGB8888 (HC_HTXnFM_ARGB32 | 0x00010000) | ||
1004 | #define HC_HTXnFM_BGR555 (HC_HTXnFM_ABGR16 | 0x00000000) | ||
1005 | #define HC_HTXnFM_BGR565 (HC_HTXnFM_ABGR16 | 0x00010000) | ||
1006 | #define HC_HTXnFM_ABGR1555 (HC_HTXnFM_ABGR16 | 0x00020000) | ||
1007 | #define HC_HTXnFM_ABGR4444 (HC_HTXnFM_ABGR16 | 0x00030000) | ||
1008 | #define HC_HTXnFM_ABGR0888 (HC_HTXnFM_ABGR32 | 0x00000000) | ||
1009 | #define HC_HTXnFM_ABGR8888 (HC_HTXnFM_ABGR32 | 0x00010000) | ||
1010 | #define HC_HTXnFM_RGBA5550 (HC_HTXnFM_RGBA16 | 0x00000000) | ||
1011 | #define HC_HTXnFM_RGBA5551 (HC_HTXnFM_RGBA16 | 0x00020000) | ||
1012 | #define HC_HTXnFM_RGBA4444 (HC_HTXnFM_RGBA16 | 0x00030000) | ||
1013 | #define HC_HTXnFM_RGBA8880 (HC_HTXnFM_RGBA32 | 0x00000000) | ||
1014 | #define HC_HTXnFM_RGBA8888 (HC_HTXnFM_RGBA32 | 0x00010000) | ||
1015 | #define HC_HTXnFM_BGRA5550 (HC_HTXnFM_BGRA16 | 0x00000000) | ||
1016 | #define HC_HTXnFM_BGRA5551 (HC_HTXnFM_BGRA16 | 0x00020000) | ||
1017 | #define HC_HTXnFM_BGRA4444 (HC_HTXnFM_BGRA16 | 0x00030000) | ||
1018 | #define HC_HTXnFM_BGRA8880 (HC_HTXnFM_BGRA32 | 0x00000000) | ||
1019 | #define HC_HTXnFM_BGRA8888 (HC_HTXnFM_BGRA32 | 0x00010000) | ||
1020 | #define HC_HTXnFM_VU88 (HC_HTXnFM_BUMPMAP | 0x00000000) | ||
1021 | #define HC_HTXnFM_LVU655 (HC_HTXnFM_BUMPMAP | 0x00010000) | ||
1022 | #define HC_HTXnFM_LVU888 (HC_HTXnFM_BUMPMAP | 0x00020000) | ||
1023 | #define HC_HTXnLoc_Local 0x00000000 | ||
1024 | #define HC_HTXnLoc_Sys 0x00000002 | ||
1025 | #define HC_HTXnLoc_AGP 0x00000003 | ||
1026 | /* HC_SubA_HTXnTRAH 0x007f | ||
1027 | */ | ||
1028 | #define HC_HTXnTRAH_MASK 0x00ff0000 | ||
1029 | #define HC_HTXnTRAL_MASK 0x0000ff00 | ||
1030 | #define HC_HTXnTBA_MASK 0x000000ff | ||
1031 | #define HC_HTXnTRAH_SHIFT 16 | ||
1032 | #define HC_HTXnTRAL_SHIFT 8 | ||
1033 | /* HC_SubA_HTXnTBLCsat 0x0080 | ||
1034 | *-- Define the input texture. | ||
1035 | */ | ||
1036 | #define HC_XTC_TOPC 0x00000000 | ||
1037 | #define HC_XTC_InvTOPC 0x00000010 | ||
1038 | #define HC_XTC_TOPCp5 0x00000020 | ||
1039 | #define HC_XTC_Cbias 0x00000000 | ||
1040 | #define HC_XTC_InvCbias 0x00000010 | ||
1041 | #define HC_XTC_0 0x00000000 | ||
1042 | #define HC_XTC_Dif 0x00000001 | ||
1043 | #define HC_XTC_Spec 0x00000002 | ||
1044 | #define HC_XTC_Tex 0x00000003 | ||
1045 | #define HC_XTC_Cur 0x00000004 | ||
1046 | #define HC_XTC_Adif 0x00000005 | ||
1047 | #define HC_XTC_Fog 0x00000006 | ||
1048 | #define HC_XTC_Atex 0x00000007 | ||
1049 | #define HC_XTC_Acur 0x00000008 | ||
1050 | #define HC_XTC_HTXnTBLRC 0x00000009 | ||
1051 | #define HC_XTC_Ctexnext 0x0000000a | ||
1052 | /*-- | ||
1053 | */ | ||
1054 | #define HC_HTXnTBLCsat_MASK 0x00800000 | ||
1055 | #define HC_HTXnTBLCa_MASK 0x000fc000 | ||
1056 | #define HC_HTXnTBLCb_MASK 0x00001f80 | ||
1057 | #define HC_HTXnTBLCc_MASK 0x0000003f | ||
1058 | #define HC_HTXnTBLCa_TOPC (HC_XTC_TOPC << 14) | ||
1059 | #define HC_HTXnTBLCa_InvTOPC (HC_XTC_InvTOPC << 14) | ||
1060 | #define HC_HTXnTBLCa_TOPCp5 (HC_XTC_TOPCp5 << 14) | ||
1061 | #define HC_HTXnTBLCa_0 (HC_XTC_0 << 14) | ||
1062 | #define HC_HTXnTBLCa_Dif (HC_XTC_Dif << 14) | ||
1063 | #define HC_HTXnTBLCa_Spec (HC_XTC_Spec << 14) | ||
1064 | #define HC_HTXnTBLCa_Tex (HC_XTC_Tex << 14) | ||
1065 | #define HC_HTXnTBLCa_Cur (HC_XTC_Cur << 14) | ||
1066 | #define HC_HTXnTBLCa_Adif (HC_XTC_Adif << 14) | ||
1067 | #define HC_HTXnTBLCa_Fog (HC_XTC_Fog << 14) | ||
1068 | #define HC_HTXnTBLCa_Atex (HC_XTC_Atex << 14) | ||
1069 | #define HC_HTXnTBLCa_Acur (HC_XTC_Acur << 14) | ||
1070 | #define HC_HTXnTBLCa_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14) | ||
1071 | #define HC_HTXnTBLCa_Ctexnext (HC_XTC_Ctexnext << 14) | ||
1072 | #define HC_HTXnTBLCb_TOPC (HC_XTC_TOPC << 7) | ||
1073 | #define HC_HTXnTBLCb_InvTOPC (HC_XTC_InvTOPC << 7) | ||
1074 | #define HC_HTXnTBLCb_TOPCp5 (HC_XTC_TOPCp5 << 7) | ||
1075 | #define HC_HTXnTBLCb_0 (HC_XTC_0 << 7) | ||
1076 | #define HC_HTXnTBLCb_Dif (HC_XTC_Dif << 7) | ||
1077 | #define HC_HTXnTBLCb_Spec (HC_XTC_Spec << 7) | ||
1078 | #define HC_HTXnTBLCb_Tex (HC_XTC_Tex << 7) | ||
1079 | #define HC_HTXnTBLCb_Cur (HC_XTC_Cur << 7) | ||
1080 | #define HC_HTXnTBLCb_Adif (HC_XTC_Adif << 7) | ||
1081 | #define HC_HTXnTBLCb_Fog (HC_XTC_Fog << 7) | ||
1082 | #define HC_HTXnTBLCb_Atex (HC_XTC_Atex << 7) | ||
1083 | #define HC_HTXnTBLCb_Acur (HC_XTC_Acur << 7) | ||
1084 | #define HC_HTXnTBLCb_HTXnTBLRC (HC_XTC_HTXnTBLRC << 7) | ||
1085 | #define HC_HTXnTBLCb_Ctexnext (HC_XTC_Ctexnext << 7) | ||
1086 | #define HC_HTXnTBLCc_TOPC (HC_XTC_TOPC << 0) | ||
1087 | #define HC_HTXnTBLCc_InvTOPC (HC_XTC_InvTOPC << 0) | ||
1088 | #define HC_HTXnTBLCc_TOPCp5 (HC_XTC_TOPCp5 << 0) | ||
1089 | #define HC_HTXnTBLCc_0 (HC_XTC_0 << 0) | ||
1090 | #define HC_HTXnTBLCc_Dif (HC_XTC_Dif << 0) | ||
1091 | #define HC_HTXnTBLCc_Spec (HC_XTC_Spec << 0) | ||
1092 | #define HC_HTXnTBLCc_Tex (HC_XTC_Tex << 0) | ||
1093 | #define HC_HTXnTBLCc_Cur (HC_XTC_Cur << 0) | ||
1094 | #define HC_HTXnTBLCc_Adif (HC_XTC_Adif << 0) | ||
1095 | #define HC_HTXnTBLCc_Fog (HC_XTC_Fog << 0) | ||
1096 | #define HC_HTXnTBLCc_Atex (HC_XTC_Atex << 0) | ||
1097 | #define HC_HTXnTBLCc_Acur (HC_XTC_Acur << 0) | ||
1098 | #define HC_HTXnTBLCc_HTXnTBLRC (HC_XTC_HTXnTBLRC << 0) | ||
1099 | #define HC_HTXnTBLCc_Ctexnext (HC_XTC_Ctexnext << 0) | ||
1100 | /* HC_SubA_HTXnTBLCop 0x0081 | ||
1101 | */ | ||
1102 | #define HC_HTXnTBLdot_MASK 0x00c00000 | ||
1103 | #define HC_HTXnTBLCop_MASK 0x00380000 | ||
1104 | #define HC_HTXnTBLCbias_MASK 0x0007c000 | ||
1105 | #define HC_HTXnTBLCshift_MASK 0x00001800 | ||
1106 | #define HC_HTXnTBLAop_MASK 0x00000380 | ||
1107 | #define HC_HTXnTBLAbias_MASK 0x00000078 | ||
1108 | #define HC_HTXnTBLAshift_MASK 0x00000003 | ||
1109 | #define HC_HTXnTBLCop_Add 0x00000000 | ||
1110 | #define HC_HTXnTBLCop_Sub 0x00080000 | ||
1111 | #define HC_HTXnTBLCop_Min 0x00100000 | ||
1112 | #define HC_HTXnTBLCop_Max 0x00180000 | ||
1113 | #define HC_HTXnTBLCop_Mask 0x00200000 | ||
1114 | #define HC_HTXnTBLCbias_Cbias (HC_XTC_Cbias << 14) | ||
1115 | #define HC_HTXnTBLCbias_InvCbias (HC_XTC_InvCbias << 14) | ||
1116 | #define HC_HTXnTBLCbias_0 (HC_XTC_0 << 14) | ||
1117 | #define HC_HTXnTBLCbias_Dif (HC_XTC_Dif << 14) | ||
1118 | #define HC_HTXnTBLCbias_Spec (HC_XTC_Spec << 14) | ||
1119 | #define HC_HTXnTBLCbias_Tex (HC_XTC_Tex << 14) | ||
1120 | #define HC_HTXnTBLCbias_Cur (HC_XTC_Cur << 14) | ||
1121 | #define HC_HTXnTBLCbias_Adif (HC_XTC_Adif << 14) | ||
1122 | #define HC_HTXnTBLCbias_Fog (HC_XTC_Fog << 14) | ||
1123 | #define HC_HTXnTBLCbias_Atex (HC_XTC_Atex << 14) | ||
1124 | #define HC_HTXnTBLCbias_Acur (HC_XTC_Acur << 14) | ||
1125 | #define HC_HTXnTBLCbias_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14) | ||
1126 | #define HC_HTXnTBLCshift_1 0x00000000 | ||
1127 | #define HC_HTXnTBLCshift_2 0x00000800 | ||
1128 | #define HC_HTXnTBLCshift_No 0x00001000 | ||
1129 | #define HC_HTXnTBLCshift_DotP 0x00001800 | ||
1130 | /*=* John Sheng [2003.7.18] texture combine *=*/ | ||
1131 | #define HC_HTXnTBLDOT3 0x00080000 | ||
1132 | #define HC_HTXnTBLDOT4 0x000C0000 | ||
1133 | |||
1134 | #define HC_HTXnTBLAop_Add 0x00000000 | ||
1135 | #define HC_HTXnTBLAop_Sub 0x00000080 | ||
1136 | #define HC_HTXnTBLAop_Min 0x00000100 | ||
1137 | #define HC_HTXnTBLAop_Max 0x00000180 | ||
1138 | #define HC_HTXnTBLAop_Mask 0x00000200 | ||
1139 | #define HC_HTXnTBLAbias_Inv 0x00000040 | ||
1140 | #define HC_HTXnTBLAbias_Adif 0x00000000 | ||
1141 | #define HC_HTXnTBLAbias_Fog 0x00000008 | ||
1142 | #define HC_HTXnTBLAbias_Acur 0x00000010 | ||
1143 | #define HC_HTXnTBLAbias_HTXnTBLRAbias 0x00000018 | ||
1144 | #define HC_HTXnTBLAbias_Atex 0x00000020 | ||
1145 | #define HC_HTXnTBLAshift_1 0x00000000 | ||
1146 | #define HC_HTXnTBLAshift_2 0x00000001 | ||
1147 | #define HC_HTXnTBLAshift_No 0x00000002 | ||
1148 | /* #define HC_HTXnTBLAshift_DotP 0x00000003 */ | ||
1149 | /* HC_SubA_HTXnTBLMPFog 0x0082 | ||
1150 | */ | ||
1151 | #define HC_HTXnTBLMPfog_MASK 0x00e00000 | ||
1152 | #define HC_HTXnTBLMPfog_0 0x00000000 | ||
1153 | #define HC_HTXnTBLMPfog_Adif 0x00200000 | ||
1154 | #define HC_HTXnTBLMPfog_Fog 0x00400000 | ||
1155 | #define HC_HTXnTBLMPfog_Atex 0x00600000 | ||
1156 | #define HC_HTXnTBLMPfog_Acur 0x00800000 | ||
1157 | #define HC_HTXnTBLMPfog_GHTXnTBLRFog 0x00a00000 | ||
1158 | /* HC_SubA_HTXnTBLAsat 0x0083 | ||
1159 | *-- Define the texture alpha input. | ||
1160 | */ | ||
1161 | #define HC_XTA_TOPA 0x00000000 | ||
1162 | #define HC_XTA_InvTOPA 0x00000008 | ||
1163 | #define HC_XTA_TOPAp5 0x00000010 | ||
1164 | #define HC_XTA_Adif 0x00000000 | ||
1165 | #define HC_XTA_Fog 0x00000001 | ||
1166 | #define HC_XTA_Acur 0x00000002 | ||
1167 | #define HC_XTA_HTXnTBLRA 0x00000003 | ||
1168 | #define HC_XTA_Atex 0x00000004 | ||
1169 | #define HC_XTA_Atexnext 0x00000005 | ||
1170 | /*-- | ||
1171 | */ | ||
1172 | #define HC_HTXnTBLAsat_MASK 0x00800000 | ||
1173 | #define HC_HTXnTBLAMB_MASK 0x00700000 | ||
1174 | #define HC_HTXnTBLAa_MASK 0x0007c000 | ||
1175 | #define HC_HTXnTBLAb_MASK 0x00000f80 | ||
1176 | #define HC_HTXnTBLAc_MASK 0x0000001f | ||
1177 | #define HC_HTXnTBLAMB_SHIFT 20 | ||
1178 | #define HC_HTXnTBLAa_TOPA (HC_XTA_TOPA << 14) | ||
1179 | #define HC_HTXnTBLAa_InvTOPA (HC_XTA_InvTOPA << 14) | ||
1180 | #define HC_HTXnTBLAa_TOPAp5 (HC_XTA_TOPAp5 << 14) | ||
1181 | #define HC_HTXnTBLAa_Adif (HC_XTA_Adif << 14) | ||
1182 | #define HC_HTXnTBLAa_Fog (HC_XTA_Fog << 14) | ||
1183 | #define HC_HTXnTBLAa_Acur (HC_XTA_Acur << 14) | ||
1184 | #define HC_HTXnTBLAa_HTXnTBLRA (HC_XTA_HTXnTBLRA << 14) | ||
1185 | #define HC_HTXnTBLAa_Atex (HC_XTA_Atex << 14) | ||
1186 | #define HC_HTXnTBLAa_Atexnext (HC_XTA_Atexnext << 14) | ||
1187 | #define HC_HTXnTBLAb_TOPA (HC_XTA_TOPA << 7) | ||
1188 | #define HC_HTXnTBLAb_InvTOPA (HC_XTA_InvTOPA << 7) | ||
1189 | #define HC_HTXnTBLAb_TOPAp5 (HC_XTA_TOPAp5 << 7) | ||
1190 | #define HC_HTXnTBLAb_Adif (HC_XTA_Adif << 7) | ||
1191 | #define HC_HTXnTBLAb_Fog (HC_XTA_Fog << 7) | ||
1192 | #define HC_HTXnTBLAb_Acur (HC_XTA_Acur << 7) | ||
1193 | #define HC_HTXnTBLAb_HTXnTBLRA (HC_XTA_HTXnTBLRA << 7) | ||
1194 | #define HC_HTXnTBLAb_Atex (HC_XTA_Atex << 7) | ||
1195 | #define HC_HTXnTBLAb_Atexnext (HC_XTA_Atexnext << 7) | ||
1196 | #define HC_HTXnTBLAc_TOPA (HC_XTA_TOPA << 0) | ||
1197 | #define HC_HTXnTBLAc_InvTOPA (HC_XTA_InvTOPA << 0) | ||
1198 | #define HC_HTXnTBLAc_TOPAp5 (HC_XTA_TOPAp5 << 0) | ||
1199 | #define HC_HTXnTBLAc_Adif (HC_XTA_Adif << 0) | ||
1200 | #define HC_HTXnTBLAc_Fog (HC_XTA_Fog << 0) | ||
1201 | #define HC_HTXnTBLAc_Acur (HC_XTA_Acur << 0) | ||
1202 | #define HC_HTXnTBLAc_HTXnTBLRA (HC_XTA_HTXnTBLRA << 0) | ||
1203 | #define HC_HTXnTBLAc_Atex (HC_XTA_Atex << 0) | ||
1204 | #define HC_HTXnTBLAc_Atexnext (HC_XTA_Atexnext << 0) | ||
1205 | /* HC_SubA_HTXnTBLRAa 0x0089 | ||
1206 | */ | ||
1207 | #define HC_HTXnTBLRAa_MASK 0x00ff0000 | ||
1208 | #define HC_HTXnTBLRAb_MASK 0x0000ff00 | ||
1209 | #define HC_HTXnTBLRAc_MASK 0x000000ff | ||
1210 | #define HC_HTXnTBLRAa_SHIFT 16 | ||
1211 | #define HC_HTXnTBLRAb_SHIFT 8 | ||
1212 | #define HC_HTXnTBLRAc_SHIFT 0 | ||
1213 | /* HC_SubA_HTXnTBLRFog 0x008a | ||
1214 | */ | ||
1215 | #define HC_HTXnTBLRFog_MASK 0x0000ff00 | ||
1216 | #define HC_HTXnTBLRAbias_MASK 0x000000ff | ||
1217 | #define HC_HTXnTBLRFog_SHIFT 8 | ||
1218 | #define HC_HTXnTBLRAbias_SHIFT 0 | ||
1219 | /* HC_SubA_HTXnLScale 0x0094 | ||
1220 | */ | ||
1221 | #define HC_HTXnLScale_MASK 0x0007fc00 | ||
1222 | #define HC_HTXnLOff_MASK 0x000001ff | ||
1223 | #define HC_HTXnLScale_SHIFT 10 | ||
1224 | /* HC_SubA_HTXSMD 0x0000 | ||
1225 | */ | ||
1226 | #define HC_HTXSMD_MASK 0x00000080 | ||
1227 | #define HC_HTXTMD_MASK 0x00000040 | ||
1228 | #define HC_HTXNum_MASK 0x00000038 | ||
1229 | #define HC_HTXTRMD_MASK 0x00000006 | ||
1230 | #define HC_HTXCHCLR_MASK 0x00000001 | ||
1231 | #define HC_HTXNum_SHIFT 3 | ||
1232 | |||
1233 | /* Texture Palette n | ||
1234 | */ | ||
1235 | #define HC_SubType_TexPalette0 0x00000000 | ||
1236 | #define HC_SubType_TexPalette1 0x00000001 | ||
1237 | #define HC_SubType_FogTable 0x00000010 | ||
1238 | #define HC_SubType_Stipple 0x00000014 | ||
1239 | /* HC_SubA_TexPalette0 0x0000 | ||
1240 | */ | ||
1241 | #define HC_HTPnA_MASK 0xff000000 | ||
1242 | #define HC_HTPnR_MASK 0x00ff0000 | ||
1243 | #define HC_HTPnG_MASK 0x0000ff00 | ||
1244 | #define HC_HTPnB_MASK 0x000000ff | ||
1245 | /* HC_SubA_FogTable 0x0010 | ||
1246 | */ | ||
1247 | #define HC_HFPn3_MASK 0xff000000 | ||
1248 | #define HC_HFPn2_MASK 0x00ff0000 | ||
1249 | #define HC_HFPn1_MASK 0x0000ff00 | ||
1250 | #define HC_HFPn_MASK 0x000000ff | ||
1251 | #define HC_HFPn3_SHIFT 24 | ||
1252 | #define HC_HFPn2_SHIFT 16 | ||
1253 | #define HC_HFPn1_SHIFT 8 | ||
1254 | |||
1255 | /* Auto Testing & Security | ||
1256 | */ | ||
1257 | #define HC_SubA_HenFIFOAT 0x0000 | ||
1258 | #define HC_SubA_HFBDrawFirst 0x0004 | ||
1259 | #define HC_SubA_HFBBasL 0x0005 | ||
1260 | #define HC_SubA_HFBDst 0x0006 | ||
1261 | /* HC_SubA_HenFIFOAT 0x0000 | ||
1262 | */ | ||
1263 | #define HC_HenFIFOAT_MASK 0x00000020 | ||
1264 | #define HC_HenGEMILock_MASK 0x00000010 | ||
1265 | #define HC_HenFBASwap_MASK 0x00000008 | ||
1266 | #define HC_HenOT_MASK 0x00000004 | ||
1267 | #define HC_HenCMDQ_MASK 0x00000002 | ||
1268 | #define HC_HenTXCTSU_MASK 0x00000001 | ||
1269 | /* HC_SubA_HFBDrawFirst 0x0004 | ||
1270 | */ | ||
1271 | #define HC_HFBDrawFirst_MASK 0x00000800 | ||
1272 | #define HC_HFBQueue_MASK 0x00000400 | ||
1273 | #define HC_HFBLock_MASK 0x00000200 | ||
1274 | #define HC_HEOF_MASK 0x00000100 | ||
1275 | #define HC_HFBBasH_MASK 0x000000ff | ||
1276 | |||
1277 | /* GEMI Setting | ||
1278 | */ | ||
1279 | #define HC_SubA_HTArbRCM 0x0008 | ||
1280 | #define HC_SubA_HTArbRZ 0x000a | ||
1281 | #define HC_SubA_HTArbWZ 0x000b | ||
1282 | #define HC_SubA_HTArbRTX 0x000c | ||
1283 | #define HC_SubA_HTArbRCW 0x000d | ||
1284 | #define HC_SubA_HTArbE2 0x000e | ||
1285 | #define HC_SubA_HArbRQCM 0x0010 | ||
1286 | #define HC_SubA_HArbWQCM 0x0011 | ||
1287 | #define HC_SubA_HGEMITout 0x0020 | ||
1288 | #define HC_SubA_HFthRTXD 0x0040 | ||
1289 | #define HC_SubA_HFthRTXA 0x0044 | ||
1290 | #define HC_SubA_HCMDQstL 0x0050 | ||
1291 | #define HC_SubA_HCMDQendL 0x0051 | ||
1292 | #define HC_SubA_HCMDQLen 0x0052 | ||
1293 | /* HC_SubA_HTArbRCM 0x0008 | ||
1294 | */ | ||
1295 | #define HC_HTArbRCM_MASK 0x0000ffff | ||
1296 | /* HC_SubA_HTArbRZ 0x000a | ||
1297 | */ | ||
1298 | #define HC_HTArbRZ_MASK 0x0000ffff | ||
1299 | /* HC_SubA_HTArbWZ 0x000b | ||
1300 | */ | ||
1301 | #define HC_HTArbWZ_MASK 0x0000ffff | ||
1302 | /* HC_SubA_HTArbRTX 0x000c | ||
1303 | */ | ||
1304 | #define HC_HTArbRTX_MASK 0x0000ffff | ||
1305 | /* HC_SubA_HTArbRCW 0x000d | ||
1306 | */ | ||
1307 | #define HC_HTArbRCW_MASK 0x0000ffff | ||
1308 | /* HC_SubA_HTArbE2 0x000e | ||
1309 | */ | ||
1310 | #define HC_HTArbE2_MASK 0x0000ffff | ||
1311 | /* HC_SubA_HArbRQCM 0x0010 | ||
1312 | */ | ||
1313 | #define HC_HTArbRQCM_MASK 0x0000ffff | ||
1314 | /* HC_SubA_HArbWQCM 0x0011 | ||
1315 | */ | ||
1316 | #define HC_HArbWQCM_MASK 0x0000ffff | ||
1317 | /* HC_SubA_HGEMITout 0x0020 | ||
1318 | */ | ||
1319 | #define HC_HGEMITout_MASK 0x000f0000 | ||
1320 | #define HC_HNPArbZC_MASK 0x0000ffff | ||
1321 | #define HC_HGEMITout_SHIFT 16 | ||
1322 | /* HC_SubA_HFthRTXD 0x0040 | ||
1323 | */ | ||
1324 | #define HC_HFthRTXD_MASK 0x00ff0000 | ||
1325 | #define HC_HFthRZD_MASK 0x0000ff00 | ||
1326 | #define HC_HFthWZD_MASK 0x000000ff | ||
1327 | #define HC_HFthRTXD_SHIFT 16 | ||
1328 | #define HC_HFthRZD_SHIFT 8 | ||
1329 | /* HC_SubA_HFthRTXA 0x0044 | ||
1330 | */ | ||
1331 | #define HC_HFthRTXA_MASK 0x000000ff | ||
1332 | |||
1333 | /****************************************************************************** | ||
1334 | ** Define the Halcyon Internal register access constants. For simulator only. | ||
1335 | ******************************************************************************/ | ||
1336 | #define HC_SIMA_HAGPBstL 0x0000 | ||
1337 | #define HC_SIMA_HAGPBendL 0x0001 | ||
1338 | #define HC_SIMA_HAGPCMNT 0x0002 | ||
1339 | #define HC_SIMA_HAGPBpL 0x0003 | ||
1340 | #define HC_SIMA_HAGPBpH 0x0004 | ||
1341 | #define HC_SIMA_HClipTB 0x0005 | ||
1342 | #define HC_SIMA_HClipLR 0x0006 | ||
1343 | #define HC_SIMA_HFPClipTL 0x0007 | ||
1344 | #define HC_SIMA_HFPClipBL 0x0008 | ||
1345 | #define HC_SIMA_HFPClipLL 0x0009 | ||
1346 | #define HC_SIMA_HFPClipRL 0x000a | ||
1347 | #define HC_SIMA_HFPClipTBH 0x000b | ||
1348 | #define HC_SIMA_HFPClipLRH 0x000c | ||
1349 | #define HC_SIMA_HLP 0x000d | ||
1350 | #define HC_SIMA_HLPRF 0x000e | ||
1351 | #define HC_SIMA_HSolidCL 0x000f | ||
1352 | #define HC_SIMA_HPixGC 0x0010 | ||
1353 | #define HC_SIMA_HSPXYOS 0x0011 | ||
1354 | #define HC_SIMA_HCmdA 0x0012 | ||
1355 | #define HC_SIMA_HCmdB 0x0013 | ||
1356 | #define HC_SIMA_HEnable 0x0014 | ||
1357 | #define HC_SIMA_HZWBBasL 0x0015 | ||
1358 | #define HC_SIMA_HZWBBasH 0x0016 | ||
1359 | #define HC_SIMA_HZWBType 0x0017 | ||
1360 | #define HC_SIMA_HZBiasL 0x0018 | ||
1361 | #define HC_SIMA_HZWBend 0x0019 | ||
1362 | #define HC_SIMA_HZWTMD 0x001a | ||
1363 | #define HC_SIMA_HZWCDL 0x001b | ||
1364 | #define HC_SIMA_HZWCTAGnum 0x001c | ||
1365 | #define HC_SIMA_HZCYNum 0x001d | ||
1366 | #define HC_SIMA_HZWCFire 0x001e | ||
1367 | /* #define HC_SIMA_HSBBasL 0x001d */ | ||
1368 | /* #define HC_SIMA_HSBBasH 0x001e */ | ||
1369 | /* #define HC_SIMA_HSBFM 0x001f */ | ||
1370 | #define HC_SIMA_HSTREF 0x0020 | ||
1371 | #define HC_SIMA_HSTMD 0x0021 | ||
1372 | #define HC_SIMA_HABBasL 0x0022 | ||
1373 | #define HC_SIMA_HABBasH 0x0023 | ||
1374 | #define HC_SIMA_HABFM 0x0024 | ||
1375 | #define HC_SIMA_HATMD 0x0025 | ||
1376 | #define HC_SIMA_HABLCsat 0x0026 | ||
1377 | #define HC_SIMA_HABLCop 0x0027 | ||
1378 | #define HC_SIMA_HABLAsat 0x0028 | ||
1379 | #define HC_SIMA_HABLAop 0x0029 | ||
1380 | #define HC_SIMA_HABLRCa 0x002a | ||
1381 | #define HC_SIMA_HABLRFCa 0x002b | ||
1382 | #define HC_SIMA_HABLRCbias 0x002c | ||
1383 | #define HC_SIMA_HABLRCb 0x002d | ||
1384 | #define HC_SIMA_HABLRFCb 0x002e | ||
1385 | #define HC_SIMA_HABLRAa 0x002f | ||
1386 | #define HC_SIMA_HABLRAb 0x0030 | ||
1387 | #define HC_SIMA_HDBBasL 0x0031 | ||
1388 | #define HC_SIMA_HDBBasH 0x0032 | ||
1389 | #define HC_SIMA_HDBFM 0x0033 | ||
1390 | #define HC_SIMA_HFBBMSKL 0x0034 | ||
1391 | #define HC_SIMA_HROP 0x0035 | ||
1392 | #define HC_SIMA_HFogLF 0x0036 | ||
1393 | #define HC_SIMA_HFogCL 0x0037 | ||
1394 | #define HC_SIMA_HFogCH 0x0038 | ||
1395 | #define HC_SIMA_HFogStL 0x0039 | ||
1396 | #define HC_SIMA_HFogStH 0x003a | ||
1397 | #define HC_SIMA_HFogOOdMF 0x003b | ||
1398 | #define HC_SIMA_HFogOOdEF 0x003c | ||
1399 | #define HC_SIMA_HFogEndL 0x003d | ||
1400 | #define HC_SIMA_HFogDenst 0x003e | ||
1401 | /*---- start of texture 0 setting ---- | ||
1402 | */ | ||
1403 | #define HC_SIMA_HTX0L0BasL 0x0040 | ||
1404 | #define HC_SIMA_HTX0L1BasL 0x0041 | ||
1405 | #define HC_SIMA_HTX0L2BasL 0x0042 | ||
1406 | #define HC_SIMA_HTX0L3BasL 0x0043 | ||
1407 | #define HC_SIMA_HTX0L4BasL 0x0044 | ||
1408 | #define HC_SIMA_HTX0L5BasL 0x0045 | ||
1409 | #define HC_SIMA_HTX0L6BasL 0x0046 | ||
1410 | #define HC_SIMA_HTX0L7BasL 0x0047 | ||
1411 | #define HC_SIMA_HTX0L8BasL 0x0048 | ||
1412 | #define HC_SIMA_HTX0L9BasL 0x0049 | ||
1413 | #define HC_SIMA_HTX0LaBasL 0x004a | ||
1414 | #define HC_SIMA_HTX0LbBasL 0x004b | ||
1415 | #define HC_SIMA_HTX0LcBasL 0x004c | ||
1416 | #define HC_SIMA_HTX0LdBasL 0x004d | ||
1417 | #define HC_SIMA_HTX0LeBasL 0x004e | ||
1418 | #define HC_SIMA_HTX0LfBasL 0x004f | ||
1419 | #define HC_SIMA_HTX0L10BasL 0x0050 | ||
1420 | #define HC_SIMA_HTX0L11BasL 0x0051 | ||
1421 | #define HC_SIMA_HTX0L012BasH 0x0052 | ||
1422 | #define HC_SIMA_HTX0L345BasH 0x0053 | ||
1423 | #define HC_SIMA_HTX0L678BasH 0x0054 | ||
1424 | #define HC_SIMA_HTX0L9abBasH 0x0055 | ||
1425 | #define HC_SIMA_HTX0LcdeBasH 0x0056 | ||
1426 | #define HC_SIMA_HTX0Lf1011BasH 0x0057 | ||
1427 | #define HC_SIMA_HTX0L0Pit 0x0058 | ||
1428 | #define HC_SIMA_HTX0L1Pit 0x0059 | ||
1429 | #define HC_SIMA_HTX0L2Pit 0x005a | ||
1430 | #define HC_SIMA_HTX0L3Pit 0x005b | ||
1431 | #define HC_SIMA_HTX0L4Pit 0x005c | ||
1432 | #define HC_SIMA_HTX0L5Pit 0x005d | ||
1433 | #define HC_SIMA_HTX0L6Pit 0x005e | ||
1434 | #define HC_SIMA_HTX0L7Pit 0x005f | ||
1435 | #define HC_SIMA_HTX0L8Pit 0x0060 | ||
1436 | #define HC_SIMA_HTX0L9Pit 0x0061 | ||
1437 | #define HC_SIMA_HTX0LaPit 0x0062 | ||
1438 | #define HC_SIMA_HTX0LbPit 0x0063 | ||
1439 | #define HC_SIMA_HTX0LcPit 0x0064 | ||
1440 | #define HC_SIMA_HTX0LdPit 0x0065 | ||
1441 | #define HC_SIMA_HTX0LePit 0x0066 | ||
1442 | #define HC_SIMA_HTX0LfPit 0x0067 | ||
1443 | #define HC_SIMA_HTX0L10Pit 0x0068 | ||
1444 | #define HC_SIMA_HTX0L11Pit 0x0069 | ||
1445 | #define HC_SIMA_HTX0L0_5WE 0x006a | ||
1446 | #define HC_SIMA_HTX0L6_bWE 0x006b | ||
1447 | #define HC_SIMA_HTX0Lc_11WE 0x006c | ||
1448 | #define HC_SIMA_HTX0L0_5HE 0x006d | ||
1449 | #define HC_SIMA_HTX0L6_bHE 0x006e | ||
1450 | #define HC_SIMA_HTX0Lc_11HE 0x006f | ||
1451 | #define HC_SIMA_HTX0L0OS 0x0070 | ||
1452 | #define HC_SIMA_HTX0TB 0x0071 | ||
1453 | #define HC_SIMA_HTX0MPMD 0x0072 | ||
1454 | #define HC_SIMA_HTX0CLODu 0x0073 | ||
1455 | #define HC_SIMA_HTX0FM 0x0074 | ||
1456 | #define HC_SIMA_HTX0TRCH 0x0075 | ||
1457 | #define HC_SIMA_HTX0TRCL 0x0076 | ||
1458 | #define HC_SIMA_HTX0TBC 0x0077 | ||
1459 | #define HC_SIMA_HTX0TRAH 0x0078 | ||
1460 | #define HC_SIMA_HTX0TBLCsat 0x0079 | ||
1461 | #define HC_SIMA_HTX0TBLCop 0x007a | ||
1462 | #define HC_SIMA_HTX0TBLMPfog 0x007b | ||
1463 | #define HC_SIMA_HTX0TBLAsat 0x007c | ||
1464 | #define HC_SIMA_HTX0TBLRCa 0x007d | ||
1465 | #define HC_SIMA_HTX0TBLRCb 0x007e | ||
1466 | #define HC_SIMA_HTX0TBLRCc 0x007f | ||
1467 | #define HC_SIMA_HTX0TBLRCbias 0x0080 | ||
1468 | #define HC_SIMA_HTX0TBLRAa 0x0081 | ||
1469 | #define HC_SIMA_HTX0TBLRFog 0x0082 | ||
1470 | #define HC_SIMA_HTX0BumpM00 0x0083 | ||
1471 | #define HC_SIMA_HTX0BumpM01 0x0084 | ||
1472 | #define HC_SIMA_HTX0BumpM10 0x0085 | ||
1473 | #define HC_SIMA_HTX0BumpM11 0x0086 | ||
1474 | #define HC_SIMA_HTX0LScale 0x0087 | ||
1475 | /*---- end of texture 0 setting ---- 0x008f | ||
1476 | */ | ||
1477 | #define HC_SIMA_TX0TX1_OFF 0x0050 | ||
1478 | /*---- start of texture 1 setting ---- | ||
1479 | */ | ||
1480 | #define HC_SIMA_HTX1L0BasL (HC_SIMA_HTX0L0BasL + HC_SIMA_TX0TX1_OFF) | ||
1481 | #define HC_SIMA_HTX1L1BasL (HC_SIMA_HTX0L1BasL + HC_SIMA_TX0TX1_OFF) | ||
1482 | #define HC_SIMA_HTX1L2BasL (HC_SIMA_HTX0L2BasL + HC_SIMA_TX0TX1_OFF) | ||
1483 | #define HC_SIMA_HTX1L3BasL (HC_SIMA_HTX0L3BasL + HC_SIMA_TX0TX1_OFF) | ||
1484 | #define HC_SIMA_HTX1L4BasL (HC_SIMA_HTX0L4BasL + HC_SIMA_TX0TX1_OFF) | ||
1485 | #define HC_SIMA_HTX1L5BasL (HC_SIMA_HTX0L5BasL + HC_SIMA_TX0TX1_OFF) | ||
1486 | #define HC_SIMA_HTX1L6BasL (HC_SIMA_HTX0L6BasL + HC_SIMA_TX0TX1_OFF) | ||
1487 | #define HC_SIMA_HTX1L7BasL (HC_SIMA_HTX0L7BasL + HC_SIMA_TX0TX1_OFF) | ||
1488 | #define HC_SIMA_HTX1L8BasL (HC_SIMA_HTX0L8BasL + HC_SIMA_TX0TX1_OFF) | ||
1489 | #define HC_SIMA_HTX1L9BasL (HC_SIMA_HTX0L9BasL + HC_SIMA_TX0TX1_OFF) | ||
1490 | #define HC_SIMA_HTX1LaBasL (HC_SIMA_HTX0LaBasL + HC_SIMA_TX0TX1_OFF) | ||
1491 | #define HC_SIMA_HTX1LbBasL (HC_SIMA_HTX0LbBasL + HC_SIMA_TX0TX1_OFF) | ||
1492 | #define HC_SIMA_HTX1LcBasL (HC_SIMA_HTX0LcBasL + HC_SIMA_TX0TX1_OFF) | ||
1493 | #define HC_SIMA_HTX1LdBasL (HC_SIMA_HTX0LdBasL + HC_SIMA_TX0TX1_OFF) | ||
1494 | #define HC_SIMA_HTX1LeBasL (HC_SIMA_HTX0LeBasL + HC_SIMA_TX0TX1_OFF) | ||
1495 | #define HC_SIMA_HTX1LfBasL (HC_SIMA_HTX0LfBasL + HC_SIMA_TX0TX1_OFF) | ||
1496 | #define HC_SIMA_HTX1L10BasL (HC_SIMA_HTX0L10BasL + HC_SIMA_TX0TX1_OFF) | ||
1497 | #define HC_SIMA_HTX1L11BasL (HC_SIMA_HTX0L11BasL + HC_SIMA_TX0TX1_OFF) | ||
1498 | #define HC_SIMA_HTX1L012BasH (HC_SIMA_HTX0L012BasH + HC_SIMA_TX0TX1_OFF) | ||
1499 | #define HC_SIMA_HTX1L345BasH (HC_SIMA_HTX0L345BasH + HC_SIMA_TX0TX1_OFF) | ||
1500 | #define HC_SIMA_HTX1L678BasH (HC_SIMA_HTX0L678BasH + HC_SIMA_TX0TX1_OFF) | ||
1501 | #define HC_SIMA_HTX1L9abBasH (HC_SIMA_HTX0L9abBasH + HC_SIMA_TX0TX1_OFF) | ||
1502 | #define HC_SIMA_HTX1LcdeBasH (HC_SIMA_HTX0LcdeBasH + HC_SIMA_TX0TX1_OFF) | ||
1503 | #define HC_SIMA_HTX1Lf1011BasH (HC_SIMA_HTX0Lf1011BasH + HC_SIMA_TX0TX1_OFF) | ||
1504 | #define HC_SIMA_HTX1L0Pit (HC_SIMA_HTX0L0Pit + HC_SIMA_TX0TX1_OFF) | ||
1505 | #define HC_SIMA_HTX1L1Pit (HC_SIMA_HTX0L1Pit + HC_SIMA_TX0TX1_OFF) | ||
1506 | #define HC_SIMA_HTX1L2Pit (HC_SIMA_HTX0L2Pit + HC_SIMA_TX0TX1_OFF) | ||
1507 | #define HC_SIMA_HTX1L3Pit (HC_SIMA_HTX0L3Pit + HC_SIMA_TX0TX1_OFF) | ||
1508 | #define HC_SIMA_HTX1L4Pit (HC_SIMA_HTX0L4Pit + HC_SIMA_TX0TX1_OFF) | ||
1509 | #define HC_SIMA_HTX1L5Pit (HC_SIMA_HTX0L5Pit + HC_SIMA_TX0TX1_OFF) | ||
1510 | #define HC_SIMA_HTX1L6Pit (HC_SIMA_HTX0L6Pit + HC_SIMA_TX0TX1_OFF) | ||
1511 | #define HC_SIMA_HTX1L7Pit (HC_SIMA_HTX0L7Pit + HC_SIMA_TX0TX1_OFF) | ||
1512 | #define HC_SIMA_HTX1L8Pit (HC_SIMA_HTX0L8Pit + HC_SIMA_TX0TX1_OFF) | ||
1513 | #define HC_SIMA_HTX1L9Pit (HC_SIMA_HTX0L9Pit + HC_SIMA_TX0TX1_OFF) | ||
1514 | #define HC_SIMA_HTX1LaPit (HC_SIMA_HTX0LaPit + HC_SIMA_TX0TX1_OFF) | ||
1515 | #define HC_SIMA_HTX1LbPit (HC_SIMA_HTX0LbPit + HC_SIMA_TX0TX1_OFF) | ||
1516 | #define HC_SIMA_HTX1LcPit (HC_SIMA_HTX0LcPit + HC_SIMA_TX0TX1_OFF) | ||
1517 | #define HC_SIMA_HTX1LdPit (HC_SIMA_HTX0LdPit + HC_SIMA_TX0TX1_OFF) | ||
1518 | #define HC_SIMA_HTX1LePit (HC_SIMA_HTX0LePit + HC_SIMA_TX0TX1_OFF) | ||
1519 | #define HC_SIMA_HTX1LfPit (HC_SIMA_HTX0LfPit + HC_SIMA_TX0TX1_OFF) | ||
1520 | #define HC_SIMA_HTX1L10Pit (HC_SIMA_HTX0L10Pit + HC_SIMA_TX0TX1_OFF) | ||
1521 | #define HC_SIMA_HTX1L11Pit (HC_SIMA_HTX0L11Pit + HC_SIMA_TX0TX1_OFF) | ||
1522 | #define HC_SIMA_HTX1L0_5WE (HC_SIMA_HTX0L0_5WE + HC_SIMA_TX0TX1_OFF) | ||
1523 | #define HC_SIMA_HTX1L6_bWE (HC_SIMA_HTX0L6_bWE + HC_SIMA_TX0TX1_OFF) | ||
1524 | #define HC_SIMA_HTX1Lc_11WE (HC_SIMA_HTX0Lc_11WE + HC_SIMA_TX0TX1_OFF) | ||
1525 | #define HC_SIMA_HTX1L0_5HE (HC_SIMA_HTX0L0_5HE + HC_SIMA_TX0TX1_OFF) | ||
1526 | #define HC_SIMA_HTX1L6_bHE (HC_SIMA_HTX0L6_bHE + HC_SIMA_TX0TX1_OFF) | ||
1527 | #define HC_SIMA_HTX1Lc_11HE (HC_SIMA_HTX0Lc_11HE + HC_SIMA_TX0TX1_OFF) | ||
1528 | #define HC_SIMA_HTX1L0OS (HC_SIMA_HTX0L0OS + HC_SIMA_TX0TX1_OFF) | ||
1529 | #define HC_SIMA_HTX1TB (HC_SIMA_HTX0TB + HC_SIMA_TX0TX1_OFF) | ||
1530 | #define HC_SIMA_HTX1MPMD (HC_SIMA_HTX0MPMD + HC_SIMA_TX0TX1_OFF) | ||
1531 | #define HC_SIMA_HTX1CLODu (HC_SIMA_HTX0CLODu + HC_SIMA_TX0TX1_OFF) | ||
1532 | #define HC_SIMA_HTX1FM (HC_SIMA_HTX0FM + HC_SIMA_TX0TX1_OFF) | ||
1533 | #define HC_SIMA_HTX1TRCH (HC_SIMA_HTX0TRCH + HC_SIMA_TX0TX1_OFF) | ||
1534 | #define HC_SIMA_HTX1TRCL (HC_SIMA_HTX0TRCL + HC_SIMA_TX0TX1_OFF) | ||
1535 | #define HC_SIMA_HTX1TBC (HC_SIMA_HTX0TBC + HC_SIMA_TX0TX1_OFF) | ||
1536 | #define HC_SIMA_HTX1TRAH (HC_SIMA_HTX0TRAH + HC_SIMA_TX0TX1_OFF) | ||
1537 | #define HC_SIMA_HTX1LTC (HC_SIMA_HTX0LTC + HC_SIMA_TX0TX1_OFF) | ||
1538 | #define HC_SIMA_HTX1LTA (HC_SIMA_HTX0LTA + HC_SIMA_TX0TX1_OFF) | ||
1539 | #define HC_SIMA_HTX1TBLCsat (HC_SIMA_HTX0TBLCsat + HC_SIMA_TX0TX1_OFF) | ||
1540 | #define HC_SIMA_HTX1TBLCop (HC_SIMA_HTX0TBLCop + HC_SIMA_TX0TX1_OFF) | ||
1541 | #define HC_SIMA_HTX1TBLMPfog (HC_SIMA_HTX0TBLMPfog + HC_SIMA_TX0TX1_OFF) | ||
1542 | #define HC_SIMA_HTX1TBLAsat (HC_SIMA_HTX0TBLAsat + HC_SIMA_TX0TX1_OFF) | ||
1543 | #define HC_SIMA_HTX1TBLRCa (HC_SIMA_HTX0TBLRCa + HC_SIMA_TX0TX1_OFF) | ||
1544 | #define HC_SIMA_HTX1TBLRCb (HC_SIMA_HTX0TBLRCb + HC_SIMA_TX0TX1_OFF) | ||
1545 | #define HC_SIMA_HTX1TBLRCc (HC_SIMA_HTX0TBLRCc + HC_SIMA_TX0TX1_OFF) | ||
1546 | #define HC_SIMA_HTX1TBLRCbias (HC_SIMA_HTX0TBLRCbias + HC_SIMA_TX0TX1_OFF) | ||
1547 | #define HC_SIMA_HTX1TBLRAa (HC_SIMA_HTX0TBLRAa + HC_SIMA_TX0TX1_OFF) | ||
1548 | #define HC_SIMA_HTX1TBLRFog (HC_SIMA_HTX0TBLRFog + HC_SIMA_TX0TX1_OFF) | ||
1549 | #define HC_SIMA_HTX1BumpM00 (HC_SIMA_HTX0BumpM00 + HC_SIMA_TX0TX1_OFF) | ||
1550 | #define HC_SIMA_HTX1BumpM01 (HC_SIMA_HTX0BumpM01 + HC_SIMA_TX0TX1_OFF) | ||
1551 | #define HC_SIMA_HTX1BumpM10 (HC_SIMA_HTX0BumpM10 + HC_SIMA_TX0TX1_OFF) | ||
1552 | #define HC_SIMA_HTX1BumpM11 (HC_SIMA_HTX0BumpM11 + HC_SIMA_TX0TX1_OFF) | ||
1553 | #define HC_SIMA_HTX1LScale (HC_SIMA_HTX0LScale + HC_SIMA_TX0TX1_OFF) | ||
1554 | /*---- end of texture 1 setting ---- 0xaf | ||
1555 | */ | ||
1556 | #define HC_SIMA_HTXSMD 0x00b0 | ||
1557 | #define HC_SIMA_HenFIFOAT 0x00b1 | ||
1558 | #define HC_SIMA_HFBDrawFirst 0x00b2 | ||
1559 | #define HC_SIMA_HFBBasL 0x00b3 | ||
1560 | #define HC_SIMA_HTArbRCM 0x00b4 | ||
1561 | #define HC_SIMA_HTArbRZ 0x00b5 | ||
1562 | #define HC_SIMA_HTArbWZ 0x00b6 | ||
1563 | #define HC_SIMA_HTArbRTX 0x00b7 | ||
1564 | #define HC_SIMA_HTArbRCW 0x00b8 | ||
1565 | #define HC_SIMA_HTArbE2 0x00b9 | ||
1566 | #define HC_SIMA_HGEMITout 0x00ba | ||
1567 | #define HC_SIMA_HFthRTXD 0x00bb | ||
1568 | #define HC_SIMA_HFthRTXA 0x00bc | ||
1569 | /* Define the texture palette 0 | ||
1570 | */ | ||
1571 | #define HC_SIMA_HTP0 0x0100 | ||
1572 | #define HC_SIMA_HTP1 0x0200 | ||
1573 | #define HC_SIMA_FOGTABLE 0x0300 | ||
1574 | #define HC_SIMA_STIPPLE 0x0400 | ||
1575 | #define HC_SIMA_HE3Fire 0x0440 | ||
1576 | #define HC_SIMA_TRANS_SET 0x0441 | ||
1577 | #define HC_SIMA_HREngSt 0x0442 | ||
1578 | #define HC_SIMA_HRFIFOempty 0x0443 | ||
1579 | #define HC_SIMA_HRFIFOfull 0x0444 | ||
1580 | #define HC_SIMA_HRErr 0x0445 | ||
1581 | #define HC_SIMA_FIFOstatus 0x0446 | ||
1582 | |||
1583 | /****************************************************************************** | ||
1584 | ** Define the AGP command header. | ||
1585 | ******************************************************************************/ | ||
1586 | #define HC_ACMD_MASK 0xfe000000 | ||
1587 | #define HC_ACMD_SUB_MASK 0x0c000000 | ||
1588 | #define HC_ACMD_HCmdA 0xee000000 | ||
1589 | #define HC_ACMD_HCmdB 0xec000000 | ||
1590 | #define HC_ACMD_HCmdC 0xea000000 | ||
1591 | #define HC_ACMD_H1 0xf0000000 | ||
1592 | #define HC_ACMD_H2 0xf2000000 | ||
1593 | #define HC_ACMD_H3 0xf4000000 | ||
1594 | #define HC_ACMD_H4 0xf6000000 | ||
1595 | |||
1596 | #define HC_ACMD_H1IO_MASK 0x000001ff | ||
1597 | #define HC_ACMD_H2IO1_MASK 0x001ff000 | ||
1598 | #define HC_ACMD_H2IO2_MASK 0x000001ff | ||
1599 | #define HC_ACMD_H2IO1_SHIFT 12 | ||
1600 | #define HC_ACMD_H2IO2_SHIFT 0 | ||
1601 | #define HC_ACMD_H3IO_MASK 0x000001ff | ||
1602 | #define HC_ACMD_H3COUNT_MASK 0x01fff000 | ||
1603 | #define HC_ACMD_H3COUNT_SHIFT 12 | ||
1604 | #define HC_ACMD_H4ID_MASK 0x000001ff | ||
1605 | #define HC_ACMD_H4COUNT_MASK 0x01fffe00 | ||
1606 | #define HC_ACMD_H4COUNT_SHIFT 9 | ||
1607 | |||
1608 | /******************************************************************************** | ||
1609 | ** Define Header | ||
1610 | ********************************************************************************/ | ||
1611 | #define HC_HEADER2 0xF210F110 | ||
1612 | |||
1613 | /******************************************************************************** | ||
1614 | ** Define Dummy Value | ||
1615 | ********************************************************************************/ | ||
1616 | #define HC_DUMMY 0xCCCCCCCC | ||
1617 | /******************************************************************************** | ||
1618 | ** Define for DMA use | ||
1619 | ********************************************************************************/ | ||
1620 | #define HALCYON_HEADER2 0XF210F110 | ||
1621 | #define HALCYON_FIRECMD 0XEE100000 | ||
1622 | #define HALCYON_FIREMASK 0XFFF00000 | ||
1623 | #define HALCYON_CMDB 0XEC000000 | ||
1624 | #define HALCYON_CMDBMASK 0XFFFE0000 | ||
1625 | #define HALCYON_SUB_ADDR0 0X00000000 | ||
1626 | #define HALCYON_HEADER1MASK 0XFFFFFC00 | ||
1627 | #define HALCYON_HEADER1 0XF0000000 | ||
1628 | #define HC_SubA_HAGPBstL 0x0060 | ||
1629 | #define HC_SubA_HAGPBendL 0x0061 | ||
1630 | #define HC_SubA_HAGPCMNT 0x0062 | ||
1631 | #define HC_SubA_HAGPBpL 0x0063 | ||
1632 | #define HC_SubA_HAGPBpH 0x0064 | ||
1633 | #define HC_HAGPCMNT_MASK 0x00800000 | ||
1634 | #define HC_HCmdErrClr_MASK 0x00400000 | ||
1635 | #define HC_HAGPBendH_MASK 0x0000ff00 | ||
1636 | #define HC_HAGPBstH_MASK 0x000000ff | ||
1637 | #define HC_HAGPBendH_SHIFT 8 | ||
1638 | #define HC_HAGPBstH_SHIFT 0 | ||
1639 | #define HC_HAGPBpL_MASK 0x00fffffc | ||
1640 | #define HC_HAGPBpID_MASK 0x00000003 | ||
1641 | #define HC_HAGPBpID_PAUSE 0x00000000 | ||
1642 | #define HC_HAGPBpID_JUMP 0x00000001 | ||
1643 | #define HC_HAGPBpID_STOP 0x00000002 | ||
1644 | #define HC_HAGPBpH_MASK 0x00ffffff | ||
1645 | |||
1646 | |||
1647 | #define VIA_VIDEO_HEADER5 0xFE040000 | ||
1648 | #define VIA_VIDEO_HEADER6 0xFE050000 | ||
1649 | #define VIA_VIDEO_HEADER7 0xFE060000 | ||
1650 | #define VIA_VIDEOMASK 0xFFFF0000 | ||
1651 | #endif | ||
diff --git a/drivers/char/drm/via_dma.c b/drivers/char/drm/via_dma.c new file mode 100644 index 000000000000..82f839451622 --- /dev/null +++ b/drivers/char/drm/via_dma.c | |||
@@ -0,0 +1,741 @@ | |||
1 | /* via_dma.c -- DMA support for the VIA Unichrome/Pro | ||
2 | * | ||
3 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. | ||
4 | * All Rights Reserved. | ||
5 | * | ||
6 | * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A. | ||
7 | * All Rights Reserved. | ||
8 | * | ||
9 | * Copyright 2004 The Unichrome project. | ||
10 | * All Rights Reserved. | ||
11 | * | ||
12 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
13 | * copy of this software and associated documentation files (the "Software"), | ||
14 | * to deal in the Software without restriction, including without limitation | ||
15 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
16 | * and/or sell copies of the Software, and to permit persons to whom the | ||
17 | * Software is furnished to do so, subject to the following conditions: | ||
18 | * | ||
19 | * The above copyright notice and this permission notice (including the | ||
20 | * next paragraph) shall be included in all copies or substantial portions | ||
21 | * of the Software. | ||
22 | * | ||
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
24 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
25 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
26 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | ||
27 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | ||
28 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | ||
29 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | ||
30 | * | ||
31 | * Authors: | ||
32 | * Tungsten Graphics, | ||
33 | * Erdi Chen, | ||
34 | * Thomas Hellstrom. | ||
35 | */ | ||
36 | |||
37 | #include "drmP.h" | ||
38 | #include "drm.h" | ||
39 | #include "via_drm.h" | ||
40 | #include "via_drv.h" | ||
41 | #include "via_3d_reg.h" | ||
42 | |||
43 | #define CMDBUF_ALIGNMENT_SIZE (0x100) | ||
44 | #define CMDBUF_ALIGNMENT_MASK (0x0ff) | ||
45 | |||
46 | /* defines for VIA 3D registers */ | ||
47 | #define VIA_REG_STATUS 0x400 | ||
48 | #define VIA_REG_TRANSET 0x43C | ||
49 | #define VIA_REG_TRANSPACE 0x440 | ||
50 | |||
51 | /* VIA_REG_STATUS(0x400): Engine Status */ | ||
52 | #define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */ | ||
53 | #define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */ | ||
54 | #define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */ | ||
55 | #define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */ | ||
56 | |||
57 | #define SetReg2DAGP(nReg, nData) { \ | ||
58 | *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \ | ||
59 | *((uint32_t *)(vb) + 1) = (nData); \ | ||
60 | vb = ((uint32_t *)vb) + 2; \ | ||
61 | dev_priv->dma_low +=8; \ | ||
62 | } | ||
63 | |||
64 | #define via_flush_write_combine() DRM_MEMORYBARRIER() | ||
65 | |||
66 | #define VIA_OUT_RING_QW(w1,w2) \ | ||
67 | *vb++ = (w1); \ | ||
68 | *vb++ = (w2); \ | ||
69 | dev_priv->dma_low += 8; | ||
70 | |||
71 | static void via_cmdbuf_start(drm_via_private_t * dev_priv); | ||
72 | static void via_cmdbuf_pause(drm_via_private_t * dev_priv); | ||
73 | static void via_cmdbuf_reset(drm_via_private_t * dev_priv); | ||
74 | static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); | ||
75 | static int via_wait_idle(drm_via_private_t * dev_priv); | ||
76 | static void via_pad_cache(drm_via_private_t *dev_priv, int qwords); | ||
77 | |||
78 | |||
79 | /* | ||
80 | * Free space in command buffer. | ||
81 | */ | ||
82 | |||
83 | static uint32_t | ||
84 | via_cmdbuf_space(drm_via_private_t *dev_priv) | ||
85 | { | ||
86 | uint32_t agp_base = dev_priv->dma_offset + | ||
87 | (uint32_t) dev_priv->agpAddr; | ||
88 | uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; | ||
89 | |||
90 | return ((hw_addr <= dev_priv->dma_low) ? | ||
91 | (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : | ||
92 | (hw_addr - dev_priv->dma_low)); | ||
93 | } | ||
94 | |||
95 | /* | ||
96 | * How much does the command regulator lag behind? | ||
97 | */ | ||
98 | |||
99 | static uint32_t | ||
100 | via_cmdbuf_lag(drm_via_private_t *dev_priv) | ||
101 | { | ||
102 | uint32_t agp_base = dev_priv->dma_offset + | ||
103 | (uint32_t) dev_priv->agpAddr; | ||
104 | uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; | ||
105 | |||
106 | return ((hw_addr <= dev_priv->dma_low) ? | ||
107 | (dev_priv->dma_low - hw_addr) : | ||
108 | (dev_priv->dma_wrap + dev_priv->dma_low - hw_addr)); | ||
109 | } | ||
110 | |||
111 | /* | ||
112 | * Check that the given size fits in the buffer, otherwise wait. | ||
113 | */ | ||
114 | |||
115 | static inline int | ||
116 | via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) | ||
117 | { | ||
118 | uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; | ||
119 | uint32_t cur_addr, hw_addr, next_addr; | ||
120 | volatile uint32_t *hw_addr_ptr; | ||
121 | uint32_t count; | ||
122 | hw_addr_ptr = dev_priv->hw_addr_ptr; | ||
123 | cur_addr = dev_priv->dma_low; | ||
124 | next_addr = cur_addr + size + 512*1024; | ||
125 | count = 1000000; | ||
126 | do { | ||
127 | hw_addr = *hw_addr_ptr - agp_base; | ||
128 | if (count-- == 0) { | ||
129 | DRM_ERROR("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n", | ||
130 | hw_addr, cur_addr, next_addr); | ||
131 | return -1; | ||
132 | } | ||
133 | } while ((cur_addr < hw_addr) && (next_addr >= hw_addr)); | ||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | |||
138 | /* | ||
139 | * Checks whether buffer head has reach the end. Rewind the ring buffer | ||
140 | * when necessary. | ||
141 | * | ||
142 | * Returns virtual pointer to ring buffer. | ||
143 | */ | ||
144 | |||
145 | static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv, | ||
146 | unsigned int size) | ||
147 | { | ||
148 | if ((dev_priv->dma_low + size + 4*CMDBUF_ALIGNMENT_SIZE) > dev_priv->dma_high) { | ||
149 | via_cmdbuf_rewind(dev_priv); | ||
150 | } | ||
151 | if (via_cmdbuf_wait(dev_priv, size) != 0) { | ||
152 | return NULL; | ||
153 | } | ||
154 | |||
155 | return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); | ||
156 | } | ||
157 | |||
158 | int via_dma_cleanup(drm_device_t * dev) | ||
159 | { | ||
160 | if (dev->dev_private) { | ||
161 | drm_via_private_t *dev_priv = | ||
162 | (drm_via_private_t *) dev->dev_private; | ||
163 | |||
164 | if (dev_priv->ring.virtual_start) { | ||
165 | via_cmdbuf_reset(dev_priv); | ||
166 | |||
167 | drm_core_ioremapfree(&dev_priv->ring.map, dev); | ||
168 | dev_priv->ring.virtual_start = NULL; | ||
169 | } | ||
170 | |||
171 | } | ||
172 | |||
173 | return 0; | ||
174 | } | ||
175 | |||
176 | static int via_initialize(drm_device_t * dev, | ||
177 | drm_via_private_t * dev_priv, | ||
178 | drm_via_dma_init_t * init) | ||
179 | { | ||
180 | if (!dev_priv || !dev_priv->mmio) { | ||
181 | DRM_ERROR("via_dma_init called before via_map_init\n"); | ||
182 | return DRM_ERR(EFAULT); | ||
183 | } | ||
184 | |||
185 | if (dev_priv->ring.virtual_start != NULL) { | ||
186 | DRM_ERROR("%s called again without calling cleanup\n", | ||
187 | __FUNCTION__); | ||
188 | return DRM_ERR(EFAULT); | ||
189 | } | ||
190 | |||
191 | if (!dev->agp || !dev->agp->base) { | ||
192 | DRM_ERROR("%s called with no agp memory available\n", | ||
193 | __FUNCTION__); | ||
194 | return DRM_ERR(EFAULT); | ||
195 | } | ||
196 | |||
197 | dev_priv->ring.map.offset = dev->agp->base + init->offset; | ||
198 | dev_priv->ring.map.size = init->size; | ||
199 | dev_priv->ring.map.type = 0; | ||
200 | dev_priv->ring.map.flags = 0; | ||
201 | dev_priv->ring.map.mtrr = 0; | ||
202 | |||
203 | drm_core_ioremap(&dev_priv->ring.map, dev); | ||
204 | |||
205 | if (dev_priv->ring.map.handle == NULL) { | ||
206 | via_dma_cleanup(dev); | ||
207 | DRM_ERROR("can not ioremap virtual address for" | ||
208 | " ring buffer\n"); | ||
209 | return DRM_ERR(ENOMEM); | ||
210 | } | ||
211 | |||
212 | dev_priv->ring.virtual_start = dev_priv->ring.map.handle; | ||
213 | |||
214 | dev_priv->dma_ptr = dev_priv->ring.virtual_start; | ||
215 | dev_priv->dma_low = 0; | ||
216 | dev_priv->dma_high = init->size; | ||
217 | dev_priv->dma_wrap = init->size; | ||
218 | dev_priv->dma_offset = init->offset; | ||
219 | dev_priv->last_pause_ptr = NULL; | ||
220 | dev_priv->hw_addr_ptr = dev_priv->mmio->handle + init->reg_pause_addr; | ||
221 | |||
222 | via_cmdbuf_start(dev_priv); | ||
223 | |||
224 | return 0; | ||
225 | } | ||
226 | |||
227 | int via_dma_init(DRM_IOCTL_ARGS) | ||
228 | { | ||
229 | DRM_DEVICE; | ||
230 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
231 | drm_via_dma_init_t init; | ||
232 | int retcode = 0; | ||
233 | |||
234 | DRM_COPY_FROM_USER_IOCTL(init, (drm_via_dma_init_t *) data, | ||
235 | sizeof(init)); | ||
236 | |||
237 | switch (init.func) { | ||
238 | case VIA_INIT_DMA: | ||
239 | if (!capable(CAP_SYS_ADMIN)) | ||
240 | retcode = DRM_ERR(EPERM); | ||
241 | else | ||
242 | retcode = via_initialize(dev, dev_priv, &init); | ||
243 | break; | ||
244 | case VIA_CLEANUP_DMA: | ||
245 | if (!capable(CAP_SYS_ADMIN)) | ||
246 | retcode = DRM_ERR(EPERM); | ||
247 | else | ||
248 | retcode = via_dma_cleanup(dev); | ||
249 | break; | ||
250 | case VIA_DMA_INITIALIZED: | ||
251 | retcode = (dev_priv->ring.virtual_start != NULL) ? | ||
252 | 0: DRM_ERR( EFAULT ); | ||
253 | break; | ||
254 | default: | ||
255 | retcode = DRM_ERR(EINVAL); | ||
256 | break; | ||
257 | } | ||
258 | |||
259 | return retcode; | ||
260 | } | ||
261 | |||
262 | |||
263 | |||
264 | static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd) | ||
265 | { | ||
266 | drm_via_private_t *dev_priv; | ||
267 | uint32_t *vb; | ||
268 | int ret; | ||
269 | |||
270 | dev_priv = (drm_via_private_t *) dev->dev_private; | ||
271 | |||
272 | if (dev_priv->ring.virtual_start == NULL) { | ||
273 | DRM_ERROR("%s called without initializing AGP ring buffer.\n", | ||
274 | __FUNCTION__); | ||
275 | return DRM_ERR(EFAULT); | ||
276 | } | ||
277 | |||
278 | if (cmd->size > VIA_PCI_BUF_SIZE) { | ||
279 | return DRM_ERR(ENOMEM); | ||
280 | } | ||
281 | |||
282 | |||
283 | if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) | ||
284 | return DRM_ERR(EFAULT); | ||
285 | |||
286 | /* | ||
287 | * Running this function on AGP memory is dead slow. Therefore | ||
288 | * we run it on a temporary cacheable system memory buffer and | ||
289 | * copy it to AGP memory when ready. | ||
290 | */ | ||
291 | |||
292 | |||
293 | if ((ret = via_verify_command_stream((uint32_t *)dev_priv->pci_buf, cmd->size, dev, 1))) { | ||
294 | return ret; | ||
295 | } | ||
296 | |||
297 | |||
298 | vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size); | ||
299 | if (vb == NULL) { | ||
300 | return DRM_ERR(EAGAIN); | ||
301 | } | ||
302 | |||
303 | memcpy(vb, dev_priv->pci_buf, cmd->size); | ||
304 | |||
305 | dev_priv->dma_low += cmd->size; | ||
306 | |||
307 | /* | ||
308 | * Small submissions somehow stalls the CPU. (AGP cache effects?) | ||
309 | * pad to greater size. | ||
310 | */ | ||
311 | |||
312 | if (cmd->size < 0x100) | ||
313 | via_pad_cache(dev_priv,(0x100 - cmd->size) >> 3); | ||
314 | via_cmdbuf_pause(dev_priv); | ||
315 | |||
316 | return 0; | ||
317 | } | ||
318 | |||
319 | int via_driver_dma_quiescent(drm_device_t * dev) | ||
320 | { | ||
321 | drm_via_private_t *dev_priv = dev->dev_private; | ||
322 | |||
323 | if (!via_wait_idle(dev_priv)) { | ||
324 | return DRM_ERR(EBUSY); | ||
325 | } | ||
326 | return 0; | ||
327 | } | ||
328 | |||
329 | int via_flush_ioctl(DRM_IOCTL_ARGS) | ||
330 | { | ||
331 | DRM_DEVICE; | ||
332 | |||
333 | LOCK_TEST_WITH_RETURN( dev, filp ); | ||
334 | |||
335 | return via_driver_dma_quiescent(dev); | ||
336 | } | ||
337 | |||
338 | int via_cmdbuffer(DRM_IOCTL_ARGS) | ||
339 | { | ||
340 | DRM_DEVICE; | ||
341 | drm_via_cmdbuffer_t cmdbuf; | ||
342 | int ret; | ||
343 | |||
344 | LOCK_TEST_WITH_RETURN( dev, filp ); | ||
345 | |||
346 | DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data, | ||
347 | sizeof(cmdbuf)); | ||
348 | |||
349 | DRM_DEBUG("via cmdbuffer, buf %p size %lu\n", cmdbuf.buf, cmdbuf.size); | ||
350 | |||
351 | ret = via_dispatch_cmdbuffer(dev, &cmdbuf); | ||
352 | if (ret) { | ||
353 | return ret; | ||
354 | } | ||
355 | |||
356 | return 0; | ||
357 | } | ||
358 | |||
359 | extern int | ||
360 | via_parse_command_stream(drm_device_t *dev, const uint32_t * buf, unsigned int size); | ||
361 | static int via_dispatch_pci_cmdbuffer(drm_device_t * dev, | ||
362 | drm_via_cmdbuffer_t * cmd) | ||
363 | { | ||
364 | drm_via_private_t *dev_priv = dev->dev_private; | ||
365 | int ret; | ||
366 | |||
367 | if (cmd->size > VIA_PCI_BUF_SIZE) { | ||
368 | return DRM_ERR(ENOMEM); | ||
369 | } | ||
370 | if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) | ||
371 | return DRM_ERR(EFAULT); | ||
372 | |||
373 | if ((ret = via_verify_command_stream((uint32_t *)dev_priv->pci_buf, cmd->size, dev, 0))) { | ||
374 | return ret; | ||
375 | } | ||
376 | |||
377 | ret = via_parse_command_stream(dev, (const uint32_t *)dev_priv->pci_buf, cmd->size); | ||
378 | return ret; | ||
379 | } | ||
380 | |||
381 | int via_pci_cmdbuffer(DRM_IOCTL_ARGS) | ||
382 | { | ||
383 | DRM_DEVICE; | ||
384 | drm_via_cmdbuffer_t cmdbuf; | ||
385 | int ret; | ||
386 | |||
387 | LOCK_TEST_WITH_RETURN( dev, filp ); | ||
388 | |||
389 | DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data, | ||
390 | sizeof(cmdbuf)); | ||
391 | |||
392 | DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf.buf, | ||
393 | cmdbuf.size); | ||
394 | |||
395 | ret = via_dispatch_pci_cmdbuffer(dev, &cmdbuf); | ||
396 | if (ret) { | ||
397 | return ret; | ||
398 | } | ||
399 | |||
400 | return 0; | ||
401 | } | ||
402 | |||
403 | |||
404 | static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, | ||
405 | uint32_t * vb, int qw_count) | ||
406 | { | ||
407 | for (; qw_count > 0; --qw_count) { | ||
408 | VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY); | ||
409 | } | ||
410 | return vb; | ||
411 | } | ||
412 | |||
413 | |||
414 | /* | ||
415 | * This function is used internally by ring buffer mangement code. | ||
416 | * | ||
417 | * Returns virtual pointer to ring buffer. | ||
418 | */ | ||
419 | static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv) | ||
420 | { | ||
421 | return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); | ||
422 | } | ||
423 | |||
424 | /* | ||
425 | * Hooks a segment of data into the tail of the ring-buffer by | ||
426 | * modifying the pause address stored in the buffer itself. If | ||
427 | * the regulator has already paused, restart it. | ||
428 | */ | ||
429 | static int via_hook_segment(drm_via_private_t *dev_priv, | ||
430 | uint32_t pause_addr_hi, uint32_t pause_addr_lo, | ||
431 | int no_pci_fire) | ||
432 | { | ||
433 | int paused, count; | ||
434 | volatile uint32_t *paused_at = dev_priv->last_pause_ptr; | ||
435 | |||
436 | via_flush_write_combine(); | ||
437 | while(! *(via_get_dma(dev_priv)-1)); | ||
438 | *dev_priv->last_pause_ptr = pause_addr_lo; | ||
439 | via_flush_write_combine(); | ||
440 | |||
441 | /* | ||
442 | * The below statement is inserted to really force the flush. | ||
443 | * Not sure it is needed. | ||
444 | */ | ||
445 | |||
446 | while(! *dev_priv->last_pause_ptr); | ||
447 | dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; | ||
448 | while(! *dev_priv->last_pause_ptr); | ||
449 | |||
450 | |||
451 | paused = 0; | ||
452 | count = 20; | ||
453 | |||
454 | while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--); | ||
455 | if ((count <= 8) && (count >= 0)) { | ||
456 | uint32_t rgtr, ptr; | ||
457 | rgtr = *(dev_priv->hw_addr_ptr); | ||
458 | ptr = ((char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) + | ||
459 | dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4 - | ||
460 | CMDBUF_ALIGNMENT_SIZE; | ||
461 | if (rgtr <= ptr) { | ||
462 | DRM_ERROR("Command regulator\npaused at count %d, address %x, " | ||
463 | "while current pause address is %x.\n" | ||
464 | "Please mail this message to " | ||
465 | "<unichrome-devel@lists.sourceforge.net>\n", | ||
466 | count, rgtr, ptr); | ||
467 | } | ||
468 | } | ||
469 | |||
470 | if (paused && !no_pci_fire) { | ||
471 | uint32_t rgtr,ptr; | ||
472 | uint32_t ptr_low; | ||
473 | |||
474 | count = 1000000; | ||
475 | while ((VIA_READ(VIA_REG_STATUS) & VIA_CMD_RGTR_BUSY) && count--); | ||
476 | |||
477 | rgtr = *(dev_priv->hw_addr_ptr); | ||
478 | ptr = ((char *)paused_at - dev_priv->dma_ptr) + | ||
479 | dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; | ||
480 | |||
481 | |||
482 | ptr_low = (ptr > 3*CMDBUF_ALIGNMENT_SIZE) ? | ||
483 | ptr - 3*CMDBUF_ALIGNMENT_SIZE : 0; | ||
484 | if (rgtr <= ptr && rgtr >= ptr_low) { | ||
485 | VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); | ||
486 | VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); | ||
487 | VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); | ||
488 | } | ||
489 | } | ||
490 | return paused; | ||
491 | } | ||
492 | |||
493 | |||
494 | |||
495 | static int via_wait_idle(drm_via_private_t * dev_priv) | ||
496 | { | ||
497 | int count = 10000000; | ||
498 | while (count-- && (VIA_READ(VIA_REG_STATUS) & | ||
499 | (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | | ||
500 | VIA_3D_ENG_BUSY))) ; | ||
501 | return count; | ||
502 | } | ||
503 | |||
504 | static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, | ||
505 | uint32_t addr, uint32_t *cmd_addr_hi, | ||
506 | uint32_t *cmd_addr_lo, | ||
507 | int skip_wait) | ||
508 | { | ||
509 | uint32_t agp_base; | ||
510 | uint32_t cmd_addr, addr_lo, addr_hi; | ||
511 | uint32_t *vb; | ||
512 | uint32_t qw_pad_count; | ||
513 | |||
514 | if (!skip_wait) | ||
515 | via_cmdbuf_wait(dev_priv, 2*CMDBUF_ALIGNMENT_SIZE); | ||
516 | |||
517 | vb = via_get_dma(dev_priv); | ||
518 | VIA_OUT_RING_QW( HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | | ||
519 | (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16); | ||
520 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; | ||
521 | qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - | ||
522 | ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); | ||
523 | |||
524 | |||
525 | cmd_addr = (addr) ? addr : | ||
526 | agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); | ||
527 | addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) | | ||
528 | (cmd_addr & HC_HAGPBpL_MASK)); | ||
529 | addr_hi = ((HC_SubA_HAGPBpH << 24) | (cmd_addr >> 24)); | ||
530 | |||
531 | vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1); | ||
532 | VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi, | ||
533 | *cmd_addr_lo = addr_lo); | ||
534 | return vb; | ||
535 | } | ||
536 | |||
537 | |||
538 | |||
539 | |||
540 | static void via_cmdbuf_start(drm_via_private_t * dev_priv) | ||
541 | { | ||
542 | uint32_t pause_addr_lo, pause_addr_hi; | ||
543 | uint32_t start_addr, start_addr_lo; | ||
544 | uint32_t end_addr, end_addr_lo; | ||
545 | uint32_t command; | ||
546 | uint32_t agp_base; | ||
547 | |||
548 | |||
549 | dev_priv->dma_low = 0; | ||
550 | |||
551 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; | ||
552 | start_addr = agp_base; | ||
553 | end_addr = agp_base + dev_priv->dma_high; | ||
554 | |||
555 | start_addr_lo = ((HC_SubA_HAGPBstL << 24) | (start_addr & 0xFFFFFF)); | ||
556 | end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF)); | ||
557 | command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | | ||
558 | ((end_addr & 0xff000000) >> 16)); | ||
559 | |||
560 | dev_priv->last_pause_ptr = | ||
561 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, | ||
562 | &pause_addr_hi, & pause_addr_lo, 1) - 1; | ||
563 | |||
564 | via_flush_write_combine(); | ||
565 | while(! *dev_priv->last_pause_ptr); | ||
566 | |||
567 | VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); | ||
568 | VIA_WRITE(VIA_REG_TRANSPACE, command); | ||
569 | VIA_WRITE(VIA_REG_TRANSPACE, start_addr_lo); | ||
570 | VIA_WRITE(VIA_REG_TRANSPACE, end_addr_lo); | ||
571 | |||
572 | VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); | ||
573 | VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); | ||
574 | |||
575 | VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); | ||
576 | } | ||
577 | |||
578 | static void via_pad_cache(drm_via_private_t *dev_priv, int qwords) | ||
579 | { | ||
580 | uint32_t *vb; | ||
581 | |||
582 | via_cmdbuf_wait(dev_priv, qwords + 2); | ||
583 | vb = via_get_dma(dev_priv); | ||
584 | VIA_OUT_RING_QW( HC_HEADER2, HC_ParaType_NotTex << 16); | ||
585 | via_align_buffer(dev_priv,vb,qwords); | ||
586 | } | ||
587 | |||
588 | static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) | ||
589 | { | ||
590 | uint32_t *vb = via_get_dma(dev_priv); | ||
591 | SetReg2DAGP(0x0C, (0 | (0 << 16))); | ||
592 | SetReg2DAGP(0x10, 0 | (0 << 16)); | ||
593 | SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); | ||
594 | } | ||
595 | |||
596 | |||
597 | static void via_cmdbuf_jump(drm_via_private_t * dev_priv) | ||
598 | { | ||
599 | uint32_t agp_base; | ||
600 | uint32_t pause_addr_lo, pause_addr_hi; | ||
601 | uint32_t jump_addr_lo, jump_addr_hi; | ||
602 | volatile uint32_t *last_pause_ptr; | ||
603 | uint32_t dma_low_save1, dma_low_save2; | ||
604 | |||
605 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; | ||
606 | via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi, | ||
607 | &jump_addr_lo, 0); | ||
608 | |||
609 | dev_priv->dma_wrap = dev_priv->dma_low; | ||
610 | |||
611 | |||
612 | /* | ||
613 | * Wrap command buffer to the beginning. | ||
614 | */ | ||
615 | |||
616 | dev_priv->dma_low = 0; | ||
617 | if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) { | ||
618 | DRM_ERROR("via_cmdbuf_jump failed\n"); | ||
619 | } | ||
620 | |||
621 | via_dummy_bitblt(dev_priv); | ||
622 | via_dummy_bitblt(dev_priv); | ||
623 | |||
624 | last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | ||
625 | &pause_addr_lo, 0) -1; | ||
626 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | ||
627 | &pause_addr_lo, 0); | ||
628 | |||
629 | *last_pause_ptr = pause_addr_lo; | ||
630 | dma_low_save1 = dev_priv->dma_low; | ||
631 | |||
632 | /* | ||
633 | * Now, set a trap that will pause the regulator if it tries to rerun the old | ||
634 | * command buffer. (Which may happen if via_hook_segment detecs a command regulator pause | ||
635 | * and reissues the jump command over PCI, while the regulator has already taken the jump | ||
636 | * and actually paused at the current buffer end). | ||
637 | * There appears to be no other way to detect this condition, since the hw_addr_pointer | ||
638 | * does not seem to get updated immediately when a jump occurs. | ||
639 | */ | ||
640 | |||
641 | last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | ||
642 | &pause_addr_lo, 0) -1; | ||
643 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | ||
644 | &pause_addr_lo, 0); | ||
645 | *last_pause_ptr = pause_addr_lo; | ||
646 | |||
647 | dma_low_save2 = dev_priv->dma_low; | ||
648 | dev_priv->dma_low = dma_low_save1; | ||
649 | via_hook_segment( dev_priv, jump_addr_hi, jump_addr_lo, 0); | ||
650 | dev_priv->dma_low = dma_low_save2; | ||
651 | via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0); | ||
652 | } | ||
653 | |||
654 | |||
655 | static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) | ||
656 | { | ||
657 | via_cmdbuf_jump(dev_priv); | ||
658 | } | ||
659 | |||
660 | static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) | ||
661 | { | ||
662 | uint32_t pause_addr_lo, pause_addr_hi; | ||
663 | |||
664 | via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0); | ||
665 | via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0); | ||
666 | } | ||
667 | |||
668 | |||
669 | static void via_cmdbuf_pause(drm_via_private_t * dev_priv) | ||
670 | { | ||
671 | via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE); | ||
672 | } | ||
673 | |||
674 | static void via_cmdbuf_reset(drm_via_private_t * dev_priv) | ||
675 | { | ||
676 | via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP); | ||
677 | via_wait_idle(dev_priv); | ||
678 | } | ||
679 | |||
680 | /* | ||
681 | * User interface to the space and lag functions. | ||
682 | */ | ||
683 | |||
684 | int | ||
685 | via_cmdbuf_size(DRM_IOCTL_ARGS) | ||
686 | { | ||
687 | DRM_DEVICE; | ||
688 | drm_via_cmdbuf_size_t d_siz; | ||
689 | int ret = 0; | ||
690 | uint32_t tmp_size, count; | ||
691 | drm_via_private_t *dev_priv; | ||
692 | |||
693 | DRM_DEBUG("via cmdbuf_size\n"); | ||
694 | LOCK_TEST_WITH_RETURN( dev, filp ); | ||
695 | |||
696 | dev_priv = (drm_via_private_t *) dev->dev_private; | ||
697 | |||
698 | if (dev_priv->ring.virtual_start == NULL) { | ||
699 | DRM_ERROR("%s called without initializing AGP ring buffer.\n", | ||
700 | __FUNCTION__); | ||
701 | return DRM_ERR(EFAULT); | ||
702 | } | ||
703 | |||
704 | DRM_COPY_FROM_USER_IOCTL(d_siz, (drm_via_cmdbuf_size_t *) data, | ||
705 | sizeof(d_siz)); | ||
706 | |||
707 | |||
708 | count = 1000000; | ||
709 | tmp_size = d_siz.size; | ||
710 | switch(d_siz.func) { | ||
711 | case VIA_CMDBUF_SPACE: | ||
712 | while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz.size) && count--) { | ||
713 | if (!d_siz.wait) { | ||
714 | break; | ||
715 | } | ||
716 | } | ||
717 | if (!count) { | ||
718 | DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n"); | ||
719 | ret = DRM_ERR(EAGAIN); | ||
720 | } | ||
721 | break; | ||
722 | case VIA_CMDBUF_LAG: | ||
723 | while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz.size) && count--) { | ||
724 | if (!d_siz.wait) { | ||
725 | break; | ||
726 | } | ||
727 | } | ||
728 | if (!count) { | ||
729 | DRM_ERROR("VIA_CMDBUF_LAG timed out.\n"); | ||
730 | ret = DRM_ERR(EAGAIN); | ||
731 | } | ||
732 | break; | ||
733 | default: | ||
734 | ret = DRM_ERR(EFAULT); | ||
735 | } | ||
736 | d_siz.size = tmp_size; | ||
737 | |||
738 | DRM_COPY_TO_USER_IOCTL((drm_via_cmdbuf_size_t *) data, d_siz, | ||
739 | sizeof(d_siz)); | ||
740 | return ret; | ||
741 | } | ||
diff --git a/drivers/char/drm/via_drm.h b/drivers/char/drm/via_drm.h new file mode 100644 index 000000000000..4588c9bd1816 --- /dev/null +++ b/drivers/char/drm/via_drm.h | |||
@@ -0,0 +1,243 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * | ||
5 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
6 | * copy of this software and associated documentation files (the "Software"), | ||
7 | * to deal in the Software without restriction, including without limitation | ||
8 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
9 | * and/or sell copies of the Software, and to permit persons to whom the | ||
10 | * Software is furnished to do so, subject to the following conditions: | ||
11 | * | ||
12 | * The above copyright notice and this permission notice (including the | ||
13 | * next paragraph) shall be included in all copies or substantial portions | ||
14 | * of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
19 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | #ifndef _VIA_DRM_H_ | ||
25 | #define _VIA_DRM_H_ | ||
26 | |||
27 | /* WARNING: These defines must be the same as what the Xserver uses. | ||
28 | * if you change them, you must change the defines in the Xserver. | ||
29 | */ | ||
30 | |||
31 | #ifndef _VIA_DEFINES_ | ||
32 | #define _VIA_DEFINES_ | ||
33 | |||
34 | #ifndef __KERNEL__ | ||
35 | #include "via_drmclient.h" | ||
36 | #endif | ||
37 | |||
38 | #define VIA_NR_SAREA_CLIPRECTS 8 | ||
39 | #define VIA_NR_XVMC_PORTS 10 | ||
40 | #define VIA_NR_XVMC_LOCKS 5 | ||
41 | #define VIA_MAX_CACHELINE_SIZE 64 | ||
42 | #define XVMCLOCKPTR(saPriv,lockNo) \ | ||
43 | ((volatile drm_hw_lock_t *)(((((unsigned long) (saPriv)->XvMCLockArea) + \ | ||
44 | (VIA_MAX_CACHELINE_SIZE - 1)) & \ | ||
45 | ~(VIA_MAX_CACHELINE_SIZE - 1)) + \ | ||
46 | VIA_MAX_CACHELINE_SIZE*(lockNo))) | ||
47 | |||
48 | /* Each region is a minimum of 64k, and there are at most 64 of them. | ||
49 | */ | ||
50 | #define VIA_NR_TEX_REGIONS 64 | ||
51 | #define VIA_LOG_MIN_TEX_REGION_SIZE 16 | ||
52 | #endif | ||
53 | |||
54 | #define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ | ||
55 | #define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ | ||
56 | #define VIA_UPLOAD_CTX 0x4 | ||
57 | #define VIA_UPLOAD_BUFFERS 0x8 | ||
58 | #define VIA_UPLOAD_TEX0 0x10 | ||
59 | #define VIA_UPLOAD_TEX1 0x20 | ||
60 | #define VIA_UPLOAD_CLIPRECTS 0x40 | ||
61 | #define VIA_UPLOAD_ALL 0xff | ||
62 | |||
63 | /* VIA specific ioctls */ | ||
64 | #define DRM_VIA_ALLOCMEM 0x00 | ||
65 | #define DRM_VIA_FREEMEM 0x01 | ||
66 | #define DRM_VIA_AGP_INIT 0x02 | ||
67 | #define DRM_VIA_FB_INIT 0x03 | ||
68 | #define DRM_VIA_MAP_INIT 0x04 | ||
69 | #define DRM_VIA_DEC_FUTEX 0x05 | ||
70 | #define NOT_USED | ||
71 | #define DRM_VIA_DMA_INIT 0x07 | ||
72 | #define DRM_VIA_CMDBUFFER 0x08 | ||
73 | #define DRM_VIA_FLUSH 0x09 | ||
74 | #define DRM_VIA_PCICMD 0x0a | ||
75 | #define DRM_VIA_CMDBUF_SIZE 0x0b | ||
76 | #define NOT_USED | ||
77 | #define DRM_VIA_WAIT_IRQ 0x0d | ||
78 | |||
79 | #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) | ||
80 | #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) | ||
81 | #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t) | ||
82 | #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) | ||
83 | #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) | ||
84 | #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) | ||
85 | #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) | ||
86 | #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) | ||
87 | #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) | ||
88 | #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t) | ||
89 | #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \ | ||
90 | drm_via_cmdbuf_size_t) | ||
91 | #define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t) | ||
92 | |||
93 | /* Indices into buf.Setup where various bits of state are mirrored per | ||
94 | * context and per buffer. These can be fired at the card as a unit, | ||
95 | * or in a piecewise fashion as required. | ||
96 | */ | ||
97 | |||
98 | #define VIA_TEX_SETUP_SIZE 8 | ||
99 | |||
100 | /* Flags for clear ioctl | ||
101 | */ | ||
102 | #define VIA_FRONT 0x1 | ||
103 | #define VIA_BACK 0x2 | ||
104 | #define VIA_DEPTH 0x4 | ||
105 | #define VIA_STENCIL 0x8 | ||
106 | #define VIDEO 0 | ||
107 | #define AGP 1 | ||
108 | typedef struct { | ||
109 | uint32_t offset; | ||
110 | uint32_t size; | ||
111 | } drm_via_agp_t; | ||
112 | |||
113 | typedef struct { | ||
114 | uint32_t offset; | ||
115 | uint32_t size; | ||
116 | } drm_via_fb_t; | ||
117 | |||
118 | typedef struct { | ||
119 | uint32_t context; | ||
120 | uint32_t type; | ||
121 | uint32_t size; | ||
122 | unsigned long index; | ||
123 | unsigned long offset; | ||
124 | } drm_via_mem_t; | ||
125 | |||
126 | typedef struct _drm_via_init { | ||
127 | enum { | ||
128 | VIA_INIT_MAP = 0x01, | ||
129 | VIA_CLEANUP_MAP = 0x02 | ||
130 | } func; | ||
131 | |||
132 | unsigned long sarea_priv_offset; | ||
133 | unsigned long fb_offset; | ||
134 | unsigned long mmio_offset; | ||
135 | unsigned long agpAddr; | ||
136 | } drm_via_init_t; | ||
137 | |||
138 | typedef struct _drm_via_futex { | ||
139 | enum { | ||
140 | VIA_FUTEX_WAIT = 0x00, | ||
141 | VIA_FUTEX_WAKE = 0X01 | ||
142 | } func; | ||
143 | uint32_t ms; | ||
144 | uint32_t lock; | ||
145 | uint32_t val; | ||
146 | } drm_via_futex_t; | ||
147 | |||
148 | typedef struct _drm_via_dma_init { | ||
149 | enum { | ||
150 | VIA_INIT_DMA = 0x01, | ||
151 | VIA_CLEANUP_DMA = 0x02, | ||
152 | VIA_DMA_INITIALIZED = 0x03 | ||
153 | } func; | ||
154 | |||
155 | unsigned long offset; | ||
156 | unsigned long size; | ||
157 | unsigned long reg_pause_addr; | ||
158 | } drm_via_dma_init_t; | ||
159 | |||
160 | typedef struct _drm_via_cmdbuffer { | ||
161 | char *buf; | ||
162 | unsigned long size; | ||
163 | } drm_via_cmdbuffer_t; | ||
164 | |||
165 | /* Warning: If you change the SAREA structure you must change the Xserver | ||
166 | * structure as well */ | ||
167 | |||
168 | typedef struct _drm_via_tex_region { | ||
169 | unsigned char next, prev; /* indices to form a circular LRU */ | ||
170 | unsigned char inUse; /* owned by a client, or free? */ | ||
171 | int age; /* tracked by clients to update local LRU's */ | ||
172 | } drm_via_tex_region_t; | ||
173 | |||
174 | typedef struct _drm_via_sarea { | ||
175 | unsigned int dirty; | ||
176 | unsigned int nbox; | ||
177 | drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS]; | ||
178 | drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1]; | ||
179 | int texAge; /* last time texture was uploaded */ | ||
180 | int ctxOwner; /* last context to upload state */ | ||
181 | int vertexPrim; | ||
182 | |||
183 | /* | ||
184 | * Below is for XvMC. | ||
185 | * We want the lock integers alone on, and aligned to, a cache line. | ||
186 | * Therefore this somewhat strange construct. | ||
187 | */ | ||
188 | |||
189 | char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)]; | ||
190 | |||
191 | unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS]; | ||
192 | unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS]; | ||
193 | unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */ | ||
194 | |||
195 | } drm_via_sarea_t; | ||
196 | |||
197 | typedef struct _drm_via_cmdbuf_size { | ||
198 | enum { | ||
199 | VIA_CMDBUF_SPACE = 0x01, | ||
200 | VIA_CMDBUF_LAG = 0x02 | ||
201 | } func; | ||
202 | int wait; | ||
203 | uint32_t size; | ||
204 | } drm_via_cmdbuf_size_t; | ||
205 | |||
206 | typedef enum { | ||
207 | VIA_IRQ_ABSOLUTE = 0x0, | ||
208 | VIA_IRQ_RELATIVE = 0x1, | ||
209 | VIA_IRQ_SIGNAL = 0x10000000, | ||
210 | VIA_IRQ_FORCE_SEQUENCE = 0x20000000 | ||
211 | } via_irq_seq_type_t; | ||
212 | |||
213 | #define VIA_IRQ_FLAGS_MASK 0xF0000000 | ||
214 | |||
215 | struct drm_via_wait_irq_request{ | ||
216 | unsigned irq; | ||
217 | via_irq_seq_type_t type; | ||
218 | uint32_t sequence; | ||
219 | uint32_t signal; | ||
220 | }; | ||
221 | |||
222 | typedef union drm_via_irqwait { | ||
223 | struct drm_via_wait_irq_request request; | ||
224 | struct drm_wait_vblank_reply reply; | ||
225 | } drm_via_irqwait_t; | ||
226 | |||
227 | #ifdef __KERNEL__ | ||
228 | |||
229 | int via_fb_init(DRM_IOCTL_ARGS); | ||
230 | int via_mem_alloc(DRM_IOCTL_ARGS); | ||
231 | int via_mem_free(DRM_IOCTL_ARGS); | ||
232 | int via_agp_init(DRM_IOCTL_ARGS); | ||
233 | int via_map_init(DRM_IOCTL_ARGS); | ||
234 | int via_decoder_futex(DRM_IOCTL_ARGS); | ||
235 | int via_dma_init(DRM_IOCTL_ARGS); | ||
236 | int via_cmdbuffer(DRM_IOCTL_ARGS); | ||
237 | int via_flush_ioctl(DRM_IOCTL_ARGS); | ||
238 | int via_pci_cmdbuffer(DRM_IOCTL_ARGS); | ||
239 | int via_cmdbuf_size(DRM_IOCTL_ARGS); | ||
240 | int via_wait_irq(DRM_IOCTL_ARGS); | ||
241 | |||
242 | #endif | ||
243 | #endif /* _VIA_DRM_H_ */ | ||
diff --git a/drivers/char/drm/via_drv.c b/drivers/char/drm/via_drv.c new file mode 100644 index 000000000000..275eefc79221 --- /dev/null +++ b/drivers/char/drm/via_drv.c | |||
@@ -0,0 +1,126 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * | ||
5 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
6 | * copy of this software and associated documentation files (the "Software"), | ||
7 | * to deal in the Software without restriction, including without limitation | ||
8 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
9 | * and/or sell copies of the Software, and to permit persons to whom the | ||
10 | * Software is furnished to do so, subject to the following conditions: | ||
11 | * | ||
12 | * The above copyright notice and this permission notice (including the | ||
13 | * next paragraph) shall be included in all copies or substantial portions | ||
14 | * of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
19 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | |||
25 | #include <linux/config.h> | ||
26 | #include "drmP.h" | ||
27 | #include "via_drm.h" | ||
28 | #include "via_drv.h" | ||
29 | |||
30 | #include "drm_pciids.h" | ||
31 | |||
32 | static int postinit(struct drm_device *dev, unsigned long flags) | ||
33 | { | ||
34 | DRM_INFO("Initialized %s %d.%d.%d %s on minor %d: %s\n", | ||
35 | DRIVER_NAME, | ||
36 | DRIVER_MAJOR, | ||
37 | DRIVER_MINOR, | ||
38 | DRIVER_PATCHLEVEL, | ||
39 | DRIVER_DATE, dev->primary.minor, pci_pretty_name(dev->pdev) | ||
40 | ); | ||
41 | return 0; | ||
42 | } | ||
43 | |||
44 | static int version(drm_version_t * version) | ||
45 | { | ||
46 | int len; | ||
47 | |||
48 | version->version_major = DRIVER_MAJOR; | ||
49 | version->version_minor = DRIVER_MINOR; | ||
50 | version->version_patchlevel = DRIVER_PATCHLEVEL; | ||
51 | DRM_COPY(version->name, DRIVER_NAME); | ||
52 | DRM_COPY(version->date, DRIVER_DATE); | ||
53 | DRM_COPY(version->desc, DRIVER_DESC); | ||
54 | return 0; | ||
55 | } | ||
56 | |||
57 | static struct pci_device_id pciidlist[] = { | ||
58 | viadrv_PCI_IDS | ||
59 | }; | ||
60 | |||
61 | static drm_ioctl_desc_t ioctls[] = { | ||
62 | [DRM_IOCTL_NR(DRM_VIA_ALLOCMEM)] = {via_mem_alloc, 1, 0}, | ||
63 | [DRM_IOCTL_NR(DRM_VIA_FREEMEM)] = {via_mem_free, 1, 0}, | ||
64 | [DRM_IOCTL_NR(DRM_VIA_AGP_INIT)] = {via_agp_init, 1, 0}, | ||
65 | [DRM_IOCTL_NR(DRM_VIA_FB_INIT)] = {via_fb_init, 1, 0}, | ||
66 | [DRM_IOCTL_NR(DRM_VIA_MAP_INIT)] = {via_map_init, 1, 0}, | ||
67 | [DRM_IOCTL_NR(DRM_VIA_DEC_FUTEX)] = {via_decoder_futex, 1, 0}, | ||
68 | [DRM_IOCTL_NR(DRM_VIA_DMA_INIT)] = {via_dma_init, 1, 0}, | ||
69 | [DRM_IOCTL_NR(DRM_VIA_CMDBUFFER)] = {via_cmdbuffer, 1, 0}, | ||
70 | [DRM_IOCTL_NR(DRM_VIA_FLUSH)] = {via_flush_ioctl, 1, 0}, | ||
71 | [DRM_IOCTL_NR(DRM_VIA_PCICMD)] = {via_pci_cmdbuffer, 1, 0}, | ||
72 | [DRM_IOCTL_NR(DRM_VIA_CMDBUF_SIZE)] = {via_cmdbuf_size, 1, 0}, | ||
73 | [DRM_IOCTL_NR(DRM_VIA_WAIT_IRQ)] = {via_wait_irq, 1, 0} | ||
74 | }; | ||
75 | |||
76 | static struct drm_driver driver = { | ||
77 | .driver_features = | ||
78 | DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ | | ||
79 | DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL, | ||
80 | .context_ctor = via_init_context, | ||
81 | .context_dtor = via_final_context, | ||
82 | .vblank_wait = via_driver_vblank_wait, | ||
83 | .irq_preinstall = via_driver_irq_preinstall, | ||
84 | .irq_postinstall = via_driver_irq_postinstall, | ||
85 | .irq_uninstall = via_driver_irq_uninstall, | ||
86 | .irq_handler = via_driver_irq_handler, | ||
87 | .dma_quiescent = via_driver_dma_quiescent, | ||
88 | .reclaim_buffers = drm_core_reclaim_buffers, | ||
89 | .get_map_ofs = drm_core_get_map_ofs, | ||
90 | .get_reg_ofs = drm_core_get_reg_ofs, | ||
91 | .postinit = postinit, | ||
92 | .version = version, | ||
93 | .ioctls = ioctls, | ||
94 | .num_ioctls = DRM_ARRAY_SIZE(ioctls), | ||
95 | .fops = { | ||
96 | .owner = THIS_MODULE, | ||
97 | .open = drm_open, | ||
98 | .release = drm_release, | ||
99 | .ioctl = drm_ioctl, | ||
100 | .mmap = drm_mmap, | ||
101 | .poll = drm_poll, | ||
102 | .fasync = drm_fasync, | ||
103 | }, | ||
104 | .pci_driver = { | ||
105 | .name = DRIVER_NAME, | ||
106 | .id_table = pciidlist, | ||
107 | } | ||
108 | }; | ||
109 | |||
110 | static int __init via_init(void) | ||
111 | { | ||
112 | via_init_command_verifier(); | ||
113 | return drm_init(&driver); | ||
114 | } | ||
115 | |||
116 | static void __exit via_exit(void) | ||
117 | { | ||
118 | drm_exit(&driver); | ||
119 | } | ||
120 | |||
121 | module_init(via_init); | ||
122 | module_exit(via_exit); | ||
123 | |||
124 | MODULE_AUTHOR(DRIVER_AUTHOR); | ||
125 | MODULE_DESCRIPTION(DRIVER_DESC); | ||
126 | MODULE_LICENSE("GPL and additional rights"); | ||
diff --git a/drivers/char/drm/via_drv.h b/drivers/char/drm/via_drv.h new file mode 100644 index 000000000000..4eaa8b7c4c96 --- /dev/null +++ b/drivers/char/drm/via_drv.h | |||
@@ -0,0 +1,118 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * | ||
5 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
6 | * copy of this software and associated documentation files (the "Software"), | ||
7 | * to deal in the Software without restriction, including without limitation | ||
8 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
9 | * and/or sell copies of the Software, and to permit persons to whom the | ||
10 | * Software is furnished to do so, subject to the following conditions: | ||
11 | * | ||
12 | * The above copyright notice and this permission notice (including the | ||
13 | * next paragraph) shall be included in all copies or substantial portions | ||
14 | * of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
19 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | #ifndef _VIA_DRV_H_ | ||
25 | #define _VIA_DRV_H_ | ||
26 | |||
27 | #define DRIVER_AUTHOR "VIA" | ||
28 | |||
29 | #define DRIVER_NAME "via" | ||
30 | #define DRIVER_DESC "VIA Unichrome / Pro" | ||
31 | #define DRIVER_DATE "20050523" | ||
32 | |||
33 | #define DRIVER_MAJOR 2 | ||
34 | #define DRIVER_MINOR 6 | ||
35 | #define DRIVER_PATCHLEVEL 3 | ||
36 | |||
37 | #include "via_verifier.h" | ||
38 | |||
39 | #define VIA_PCI_BUF_SIZE 60000 | ||
40 | #define VIA_FIRE_BUF_SIZE 1024 | ||
41 | #define VIA_NUM_IRQS 2 | ||
42 | |||
43 | |||
44 | |||
45 | typedef struct drm_via_ring_buffer { | ||
46 | drm_map_t map; | ||
47 | char *virtual_start; | ||
48 | } drm_via_ring_buffer_t; | ||
49 | |||
50 | typedef uint32_t maskarray_t[5]; | ||
51 | |||
52 | typedef struct drm_via_irq { | ||
53 | atomic_t irq_received; | ||
54 | uint32_t pending_mask; | ||
55 | uint32_t enable_mask; | ||
56 | wait_queue_head_t irq_queue; | ||
57 | } drm_via_irq_t; | ||
58 | |||
59 | typedef struct drm_via_private { | ||
60 | drm_via_sarea_t *sarea_priv; | ||
61 | drm_map_t *sarea; | ||
62 | drm_map_t *fb; | ||
63 | drm_map_t *mmio; | ||
64 | unsigned long agpAddr; | ||
65 | wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS]; | ||
66 | char *dma_ptr; | ||
67 | unsigned int dma_low; | ||
68 | unsigned int dma_high; | ||
69 | unsigned int dma_offset; | ||
70 | uint32_t dma_wrap; | ||
71 | volatile uint32_t *last_pause_ptr; | ||
72 | volatile uint32_t *hw_addr_ptr; | ||
73 | drm_via_ring_buffer_t ring; | ||
74 | struct timeval last_vblank; | ||
75 | int last_vblank_valid; | ||
76 | unsigned usec_per_vblank; | ||
77 | drm_via_state_t hc_state; | ||
78 | char pci_buf[VIA_PCI_BUF_SIZE]; | ||
79 | const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE]; | ||
80 | uint32_t num_fire_offsets; | ||
81 | int pro_group_a; | ||
82 | drm_via_irq_t via_irqs[VIA_NUM_IRQS]; | ||
83 | unsigned num_irqs; | ||
84 | maskarray_t *irq_masks; | ||
85 | uint32_t irq_enable_mask; | ||
86 | uint32_t irq_pending_mask; | ||
87 | } drm_via_private_t; | ||
88 | |||
89 | /* VIA MMIO register access */ | ||
90 | #define VIA_BASE ((dev_priv->mmio)) | ||
91 | |||
92 | #define VIA_READ(reg) DRM_READ32(VIA_BASE, reg) | ||
93 | #define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val) | ||
94 | #define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg) | ||
95 | #define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val) | ||
96 | |||
97 | extern int via_init_context(drm_device_t * dev, int context); | ||
98 | extern int via_final_context(drm_device_t * dev, int context); | ||
99 | |||
100 | extern int via_do_cleanup_map(drm_device_t * dev); | ||
101 | extern int via_map_init(struct inode *inode, struct file *filp, | ||
102 | unsigned int cmd, unsigned long arg); | ||
103 | extern int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence); | ||
104 | |||
105 | extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS); | ||
106 | extern void via_driver_irq_preinstall(drm_device_t * dev); | ||
107 | extern void via_driver_irq_postinstall(drm_device_t * dev); | ||
108 | extern void via_driver_irq_uninstall(drm_device_t * dev); | ||
109 | |||
110 | extern int via_dma_cleanup(drm_device_t * dev); | ||
111 | extern void via_init_command_verifier(void); | ||
112 | extern int via_driver_dma_quiescent(drm_device_t * dev); | ||
113 | extern void via_init_futex(drm_via_private_t *dev_priv); | ||
114 | extern void via_cleanup_futex(drm_via_private_t *dev_priv); | ||
115 | extern void via_release_futex(drm_via_private_t *dev_priv, int context); | ||
116 | |||
117 | |||
118 | #endif | ||
diff --git a/drivers/char/drm/via_ds.c b/drivers/char/drm/via_ds.c new file mode 100644 index 000000000000..daf3df75a20e --- /dev/null +++ b/drivers/char/drm/via_ds.c | |||
@@ -0,0 +1,280 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice (including the | ||
14 | * next paragraph) shall be included in all copies or substantial portions | ||
15 | * of the Software. | ||
16 | * | ||
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
20 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
21 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
22 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
23 | * DEALINGS IN THE SOFTWARE. | ||
24 | */ | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/delay.h> | ||
27 | #include <linux/errno.h> | ||
28 | #include <linux/kernel.h> | ||
29 | #include <linux/slab.h> | ||
30 | #include <linux/poll.h> | ||
31 | #include <linux/pci.h> | ||
32 | #include <asm/io.h> | ||
33 | |||
34 | #include "via_ds.h" | ||
35 | extern unsigned int VIA_DEBUG; | ||
36 | |||
37 | set_t *via_setInit(void) | ||
38 | { | ||
39 | int i; | ||
40 | set_t *set; | ||
41 | set = (set_t *) drm_alloc(sizeof(set_t), DRM_MEM_DRIVER); | ||
42 | for (i = 0; i < SET_SIZE; i++) { | ||
43 | set->list[i].free_next = i + 1; | ||
44 | set->list[i].alloc_next = -1; | ||
45 | } | ||
46 | set->list[SET_SIZE - 1].free_next = -1; | ||
47 | set->free = 0; | ||
48 | set->alloc = -1; | ||
49 | set->trace = -1; | ||
50 | return set; | ||
51 | } | ||
52 | |||
53 | int via_setAdd(set_t * set, ITEM_TYPE item) | ||
54 | { | ||
55 | int free = set->free; | ||
56 | if (free != -1) { | ||
57 | set->list[free].val = item; | ||
58 | set->free = set->list[free].free_next; | ||
59 | } else { | ||
60 | return 0; | ||
61 | } | ||
62 | set->list[free].alloc_next = set->alloc; | ||
63 | set->alloc = free; | ||
64 | set->list[free].free_next = -1; | ||
65 | return 1; | ||
66 | } | ||
67 | |||
68 | int via_setDel(set_t * set, ITEM_TYPE item) | ||
69 | { | ||
70 | int alloc = set->alloc; | ||
71 | int prev = -1; | ||
72 | |||
73 | while (alloc != -1) { | ||
74 | if (set->list[alloc].val == item) { | ||
75 | if (prev != -1) | ||
76 | set->list[prev].alloc_next = | ||
77 | set->list[alloc].alloc_next; | ||
78 | else | ||
79 | set->alloc = set->list[alloc].alloc_next; | ||
80 | break; | ||
81 | } | ||
82 | prev = alloc; | ||
83 | alloc = set->list[alloc].alloc_next; | ||
84 | } | ||
85 | |||
86 | if (alloc == -1) | ||
87 | return 0; | ||
88 | |||
89 | set->list[alloc].free_next = set->free; | ||
90 | set->free = alloc; | ||
91 | set->list[alloc].alloc_next = -1; | ||
92 | |||
93 | return 1; | ||
94 | } | ||
95 | |||
96 | /* setFirst -> setAdd -> setNext is wrong */ | ||
97 | |||
98 | int via_setFirst(set_t * set, ITEM_TYPE * item) | ||
99 | { | ||
100 | if (set->alloc == -1) | ||
101 | return 0; | ||
102 | |||
103 | *item = set->list[set->alloc].val; | ||
104 | set->trace = set->list[set->alloc].alloc_next; | ||
105 | |||
106 | return 1; | ||
107 | } | ||
108 | |||
109 | int via_setNext(set_t * set, ITEM_TYPE * item) | ||
110 | { | ||
111 | if (set->trace == -1) | ||
112 | return 0; | ||
113 | |||
114 | *item = set->list[set->trace].val; | ||
115 | set->trace = set->list[set->trace].alloc_next; | ||
116 | |||
117 | return 1; | ||
118 | } | ||
119 | |||
120 | int via_setDestroy(set_t * set) | ||
121 | { | ||
122 | drm_free(set, sizeof(set_t), DRM_MEM_DRIVER); | ||
123 | |||
124 | return 1; | ||
125 | } | ||
126 | |||
127 | #define ISFREE(bptr) ((bptr)->free) | ||
128 | |||
129 | #define fprintf(fmt, arg...) do{}while(0) | ||
130 | |||
131 | memHeap_t *via_mmInit(int ofs, int size) | ||
132 | { | ||
133 | PMemBlock blocks; | ||
134 | |||
135 | if (size <= 0) | ||
136 | return 0; | ||
137 | |||
138 | blocks = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), DRM_MEM_DRIVER); | ||
139 | |||
140 | if (blocks) { | ||
141 | blocks->ofs = ofs; | ||
142 | blocks->size = size; | ||
143 | blocks->free = 1; | ||
144 | return (memHeap_t *) blocks; | ||
145 | } else | ||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | static TMemBlock *SliceBlock(TMemBlock * p, | ||
150 | int startofs, int size, | ||
151 | int reserved, int alignment) | ||
152 | { | ||
153 | TMemBlock *newblock; | ||
154 | |||
155 | /* break left */ | ||
156 | if (startofs > p->ofs) { | ||
157 | newblock = | ||
158 | (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), | ||
159 | DRM_MEM_DRIVER); | ||
160 | newblock->ofs = startofs; | ||
161 | newblock->size = p->size - (startofs - p->ofs); | ||
162 | newblock->free = 1; | ||
163 | newblock->next = p->next; | ||
164 | p->size -= newblock->size; | ||
165 | p->next = newblock; | ||
166 | p = newblock; | ||
167 | } | ||
168 | |||
169 | /* break right */ | ||
170 | if (size < p->size) { | ||
171 | newblock = | ||
172 | (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), | ||
173 | DRM_MEM_DRIVER); | ||
174 | newblock->ofs = startofs + size; | ||
175 | newblock->size = p->size - size; | ||
176 | newblock->free = 1; | ||
177 | newblock->next = p->next; | ||
178 | p->size = size; | ||
179 | p->next = newblock; | ||
180 | } | ||
181 | |||
182 | /* p = middle block */ | ||
183 | p->align = alignment; | ||
184 | p->free = 0; | ||
185 | p->reserved = reserved; | ||
186 | return p; | ||
187 | } | ||
188 | |||
189 | PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2, | ||
190 | int startSearch) | ||
191 | { | ||
192 | int mask, startofs, endofs; | ||
193 | TMemBlock *p; | ||
194 | |||
195 | if (!heap || align2 < 0 || size <= 0) | ||
196 | return NULL; | ||
197 | |||
198 | mask = (1 << align2) - 1; | ||
199 | startofs = 0; | ||
200 | p = (TMemBlock *) heap; | ||
201 | |||
202 | while (p) { | ||
203 | if (ISFREE(p)) { | ||
204 | startofs = (p->ofs + mask) & ~mask; | ||
205 | |||
206 | if (startofs < startSearch) | ||
207 | startofs = startSearch; | ||
208 | |||
209 | endofs = startofs + size; | ||
210 | |||
211 | if (endofs <= (p->ofs + p->size)) | ||
212 | break; | ||
213 | } | ||
214 | |||
215 | p = p->next; | ||
216 | } | ||
217 | |||
218 | if (!p) | ||
219 | return NULL; | ||
220 | |||
221 | p = SliceBlock(p, startofs, size, 0, mask + 1); | ||
222 | p->heap = heap; | ||
223 | |||
224 | return p; | ||
225 | } | ||
226 | |||
227 | static __inline__ int Join2Blocks(TMemBlock * p) | ||
228 | { | ||
229 | if (p->free && p->next && p->next->free) { | ||
230 | TMemBlock *q = p->next; | ||
231 | p->size += q->size; | ||
232 | p->next = q->next; | ||
233 | drm_free(q, sizeof(TMemBlock), DRM_MEM_DRIVER); | ||
234 | |||
235 | return 1; | ||
236 | } | ||
237 | |||
238 | return 0; | ||
239 | } | ||
240 | |||
241 | int via_mmFreeMem(PMemBlock b) | ||
242 | { | ||
243 | TMemBlock *p, *prev; | ||
244 | |||
245 | if (!b) | ||
246 | return 0; | ||
247 | |||
248 | if (!b->heap) { | ||
249 | fprintf(stderr, "no heap\n"); | ||
250 | |||
251 | return -1; | ||
252 | } | ||
253 | |||
254 | p = b->heap; | ||
255 | prev = NULL; | ||
256 | |||
257 | while (p && p != b) { | ||
258 | prev = p; | ||
259 | p = p->next; | ||
260 | } | ||
261 | |||
262 | if (!p || p->free || p->reserved) { | ||
263 | if (!p) | ||
264 | fprintf(stderr, "block not found in heap\n"); | ||
265 | else if (p->free) | ||
266 | fprintf(stderr, "block already free\n"); | ||
267 | else | ||
268 | fprintf(stderr, "block is reserved\n"); | ||
269 | |||
270 | return -1; | ||
271 | } | ||
272 | |||
273 | p->free = 1; | ||
274 | Join2Blocks(p); | ||
275 | |||
276 | if (prev) | ||
277 | Join2Blocks(prev); | ||
278 | |||
279 | return 0; | ||
280 | } | ||
diff --git a/drivers/char/drm/via_ds.h b/drivers/char/drm/via_ds.h new file mode 100644 index 000000000000..be9c7f9f1aee --- /dev/null +++ b/drivers/char/drm/via_ds.h | |||
@@ -0,0 +1,104 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
8 | * copy of this software and associated documentation files (the "Software"), | ||
9 | * to deal in the Software without restriction, including without limitation | ||
10 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
11 | * and/or sell copies of the Software, and to permit persons to whom the | ||
12 | * Software is furnished to do so, subject to the following conditions: | ||
13 | * | ||
14 | * The above copyright notice and this permission notice (including the | ||
15 | * next paragraph) shall be included in all copies or substantial portions | ||
16 | * of the Software. | ||
17 | * | ||
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
21 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
22 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
23 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
24 | * DEALINGS IN THE SOFTWARE. | ||
25 | */ | ||
26 | #ifndef _via_ds_h_ | ||
27 | #define _via_ds_h_ | ||
28 | |||
29 | #include "drmP.h" | ||
30 | |||
31 | /* Set Data Structure */ | ||
32 | #define SET_SIZE 5000 | ||
33 | typedef unsigned long ITEM_TYPE; | ||
34 | |||
35 | typedef struct { | ||
36 | ITEM_TYPE val; | ||
37 | int alloc_next, free_next; | ||
38 | } list_item_t; | ||
39 | |||
40 | typedef struct { | ||
41 | int alloc; | ||
42 | int free; | ||
43 | int trace; | ||
44 | list_item_t list[SET_SIZE]; | ||
45 | } set_t; | ||
46 | |||
47 | set_t *via_setInit(void); | ||
48 | int via_setAdd(set_t * set, ITEM_TYPE item); | ||
49 | int via_setDel(set_t * set, ITEM_TYPE item); | ||
50 | int via_setFirst(set_t * set, ITEM_TYPE * item); | ||
51 | int via_setNext(set_t * set, ITEM_TYPE * item); | ||
52 | int via_setDestroy(set_t * set); | ||
53 | |||
54 | #endif | ||
55 | |||
56 | #ifndef MM_INC | ||
57 | #define MM_INC | ||
58 | |||
59 | struct mem_block_t { | ||
60 | struct mem_block_t *next; | ||
61 | struct mem_block_t *heap; | ||
62 | int ofs, size; | ||
63 | int align; | ||
64 | int free:1; | ||
65 | int reserved:1; | ||
66 | }; | ||
67 | typedef struct mem_block_t TMemBlock; | ||
68 | typedef struct mem_block_t *PMemBlock; | ||
69 | |||
70 | /* a heap is just the first block in a chain */ | ||
71 | typedef struct mem_block_t memHeap_t; | ||
72 | |||
73 | static __inline__ int mmBlockSize(PMemBlock b) | ||
74 | { | ||
75 | return b->size; | ||
76 | } | ||
77 | |||
78 | static __inline__ int mmOffset(PMemBlock b) | ||
79 | { | ||
80 | return b->ofs; | ||
81 | } | ||
82 | |||
83 | static __inline__ void mmMarkReserved(PMemBlock b) | ||
84 | { | ||
85 | b->reserved = 1; | ||
86 | } | ||
87 | |||
88 | /* | ||
89 | * input: total size in bytes | ||
90 | * return: a heap pointer if OK, NULL if error | ||
91 | */ | ||
92 | memHeap_t *via_mmInit(int ofs, int size); | ||
93 | |||
94 | PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2, | ||
95 | int startSearch); | ||
96 | |||
97 | /* | ||
98 | * Free block starts at offset | ||
99 | * input: pointer to a block | ||
100 | * return: 0 if OK, -1 if error | ||
101 | */ | ||
102 | int via_mmFreeMem(PMemBlock b); | ||
103 | |||
104 | #endif | ||
diff --git a/drivers/char/drm/via_irq.c b/drivers/char/drm/via_irq.c new file mode 100644 index 000000000000..e8027f3a93b0 --- /dev/null +++ b/drivers/char/drm/via_irq.c | |||
@@ -0,0 +1,339 @@ | |||
1 | /* via_irq.c | ||
2 | * | ||
3 | * Copyright 2004 BEAM Ltd. | ||
4 | * Copyright 2002 Tungsten Graphics, Inc. | ||
5 | * Copyright 2005 Thomas Hellstrom. | ||
6 | * All Rights Reserved. | ||
7 | * | ||
8 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
9 | * copy of this software and associated documentation files (the "Software"), | ||
10 | * to deal in the Software without restriction, including without limitation | ||
11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
12 | * and/or sell copies of the Software, and to permit persons to whom the | ||
13 | * Software is furnished to do so, subject to the following conditions: | ||
14 | * | ||
15 | * The above copyright notice and this permission notice (including the next | ||
16 | * paragraph) shall be included in all copies or substantial portions of the | ||
17 | * Software. | ||
18 | * | ||
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
22 | * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | ||
23 | * DAMAGES OR | ||
24 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
25 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
26 | * DEALINGS IN THE SOFTWARE. | ||
27 | * | ||
28 | * Authors: | ||
29 | * Terry Barnaby <terry1@beam.ltd.uk> | ||
30 | * Keith Whitwell <keith@tungstengraphics.com> | ||
31 | * Thomas Hellstrom <unichrome@shipmail.org> | ||
32 | * | ||
33 | * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank | ||
34 | * interrupt, as well as an infrastructure to handle other interrupts of the chip. | ||
35 | * The refresh rate is also calculated for video playback sync purposes. | ||
36 | */ | ||
37 | |||
38 | #include "drmP.h" | ||
39 | #include "drm.h" | ||
40 | #include "via_drm.h" | ||
41 | #include "via_drv.h" | ||
42 | |||
43 | #define VIA_REG_INTERRUPT 0x200 | ||
44 | |||
45 | /* VIA_REG_INTERRUPT */ | ||
46 | #define VIA_IRQ_GLOBAL (1 << 31) | ||
47 | #define VIA_IRQ_VBLANK_ENABLE (1 << 19) | ||
48 | #define VIA_IRQ_VBLANK_PENDING (1 << 3) | ||
49 | #define VIA_IRQ_HQV0_ENABLE (1 << 11) | ||
50 | #define VIA_IRQ_HQV1_ENABLE (1 << 25) | ||
51 | #define VIA_IRQ_HQV0_PENDING (1 << 9) | ||
52 | #define VIA_IRQ_HQV1_PENDING (1 << 10) | ||
53 | |||
54 | /* | ||
55 | * Device-specific IRQs go here. This type might need to be extended with | ||
56 | * the register if there are multiple IRQ control registers. | ||
57 | * Currently we activate the HQV interrupts of Unichrome Pro group A. | ||
58 | */ | ||
59 | |||
60 | static maskarray_t via_pro_group_a_irqs[] = { | ||
61 | {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010, 0x00000000 }, | ||
62 | {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010, 0x00000000 }}; | ||
63 | static int via_num_pro_group_a = sizeof(via_pro_group_a_irqs)/sizeof(maskarray_t); | ||
64 | |||
65 | static maskarray_t via_unichrome_irqs[] = {}; | ||
66 | static int via_num_unichrome = sizeof(via_unichrome_irqs)/sizeof(maskarray_t); | ||
67 | |||
68 | |||
69 | static unsigned time_diff(struct timeval *now,struct timeval *then) | ||
70 | { | ||
71 | return (now->tv_usec >= then->tv_usec) ? | ||
72 | now->tv_usec - then->tv_usec : | ||
73 | 1000000 - (then->tv_usec - now->tv_usec); | ||
74 | } | ||
75 | |||
76 | irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS) | ||
77 | { | ||
78 | drm_device_t *dev = (drm_device_t *) arg; | ||
79 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
80 | u32 status; | ||
81 | int handled = 0; | ||
82 | struct timeval cur_vblank; | ||
83 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | ||
84 | int i; | ||
85 | |||
86 | status = VIA_READ(VIA_REG_INTERRUPT); | ||
87 | if (status & VIA_IRQ_VBLANK_PENDING) { | ||
88 | atomic_inc(&dev->vbl_received); | ||
89 | if (!(atomic_read(&dev->vbl_received) & 0x0F)) { | ||
90 | do_gettimeofday(&cur_vblank); | ||
91 | if (dev_priv->last_vblank_valid) { | ||
92 | dev_priv->usec_per_vblank = | ||
93 | time_diff( &cur_vblank,&dev_priv->last_vblank) >> 4; | ||
94 | } | ||
95 | dev_priv->last_vblank = cur_vblank; | ||
96 | dev_priv->last_vblank_valid = 1; | ||
97 | } | ||
98 | if (!(atomic_read(&dev->vbl_received) & 0xFF)) { | ||
99 | DRM_DEBUG("US per vblank is: %u\n", | ||
100 | dev_priv->usec_per_vblank); | ||
101 | } | ||
102 | DRM_WAKEUP(&dev->vbl_queue); | ||
103 | drm_vbl_send_signals(dev); | ||
104 | handled = 1; | ||
105 | } | ||
106 | |||
107 | |||
108 | for (i=0; i<dev_priv->num_irqs; ++i) { | ||
109 | if (status & cur_irq->pending_mask) { | ||
110 | atomic_inc( &cur_irq->irq_received ); | ||
111 | DRM_WAKEUP( &cur_irq->irq_queue ); | ||
112 | handled = 1; | ||
113 | } | ||
114 | cur_irq++; | ||
115 | } | ||
116 | |||
117 | /* Acknowlege interrupts */ | ||
118 | VIA_WRITE(VIA_REG_INTERRUPT, status); | ||
119 | |||
120 | |||
121 | if (handled) | ||
122 | return IRQ_HANDLED; | ||
123 | else | ||
124 | return IRQ_NONE; | ||
125 | } | ||
126 | |||
127 | static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) | ||
128 | { | ||
129 | u32 status; | ||
130 | |||
131 | if (dev_priv) { | ||
132 | /* Acknowlege interrupts */ | ||
133 | status = VIA_READ(VIA_REG_INTERRUPT); | ||
134 | VIA_WRITE(VIA_REG_INTERRUPT, status | | ||
135 | dev_priv->irq_pending_mask); | ||
136 | } | ||
137 | } | ||
138 | |||
139 | int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence) | ||
140 | { | ||
141 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
142 | unsigned int cur_vblank; | ||
143 | int ret = 0; | ||
144 | |||
145 | DRM_DEBUG("viadrv_vblank_wait\n"); | ||
146 | if (!dev_priv) { | ||
147 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | ||
148 | return -EINVAL; | ||
149 | } | ||
150 | |||
151 | viadrv_acknowledge_irqs(dev_priv); | ||
152 | |||
153 | /* Assume that the user has missed the current sequence number | ||
154 | * by about a day rather than she wants to wait for years | ||
155 | * using vertical blanks... | ||
156 | */ | ||
157 | |||
158 | DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, | ||
159 | (((cur_vblank = atomic_read(&dev->vbl_received)) - | ||
160 | *sequence) <= (1 << 23))); | ||
161 | |||
162 | *sequence = cur_vblank; | ||
163 | return ret; | ||
164 | } | ||
165 | |||
166 | static int | ||
167 | via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence, | ||
168 | unsigned int *sequence) | ||
169 | { | ||
170 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
171 | unsigned int cur_irq_sequence; | ||
172 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | ||
173 | int ret = 0; | ||
174 | maskarray_t *masks = dev_priv->irq_masks; | ||
175 | |||
176 | DRM_DEBUG("%s\n", __FUNCTION__); | ||
177 | |||
178 | if (!dev_priv) { | ||
179 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | ||
180 | return DRM_ERR(EINVAL); | ||
181 | } | ||
182 | |||
183 | if (irq >= dev_priv->num_irqs ) { | ||
184 | DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, irq); | ||
185 | return DRM_ERR(EINVAL); | ||
186 | } | ||
187 | |||
188 | cur_irq += irq; | ||
189 | |||
190 | if (masks[irq][2] && !force_sequence) { | ||
191 | DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, | ||
192 | ((VIA_READ(masks[irq][2]) & masks[irq][3]) == masks[irq][4])); | ||
193 | cur_irq_sequence = atomic_read(&cur_irq->irq_received); | ||
194 | } else { | ||
195 | DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, | ||
196 | (((cur_irq_sequence = atomic_read(&cur_irq->irq_received)) - | ||
197 | *sequence) <= (1 << 23))); | ||
198 | } | ||
199 | *sequence = cur_irq_sequence; | ||
200 | return ret; | ||
201 | } | ||
202 | |||
203 | |||
204 | /* | ||
205 | * drm_dma.h hooks | ||
206 | */ | ||
207 | |||
208 | void via_driver_irq_preinstall(drm_device_t * dev) | ||
209 | { | ||
210 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
211 | u32 status; | ||
212 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | ||
213 | int i; | ||
214 | |||
215 | DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv); | ||
216 | if (dev_priv) { | ||
217 | |||
218 | dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; | ||
219 | dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING; | ||
220 | |||
221 | dev_priv->irq_masks = (dev_priv->pro_group_a) ? | ||
222 | via_pro_group_a_irqs : via_unichrome_irqs; | ||
223 | dev_priv->num_irqs = (dev_priv->pro_group_a) ? | ||
224 | via_num_pro_group_a : via_num_unichrome; | ||
225 | |||
226 | for(i=0; i < dev_priv->num_irqs; ++i) { | ||
227 | atomic_set(&cur_irq->irq_received, 0); | ||
228 | cur_irq->enable_mask = dev_priv->irq_masks[i][0]; | ||
229 | cur_irq->pending_mask = dev_priv->irq_masks[i][1]; | ||
230 | DRM_INIT_WAITQUEUE( &cur_irq->irq_queue ); | ||
231 | dev_priv->irq_enable_mask |= cur_irq->enable_mask; | ||
232 | dev_priv->irq_pending_mask |= cur_irq->pending_mask; | ||
233 | cur_irq++; | ||
234 | |||
235 | DRM_DEBUG("Initializing IRQ %d\n", i); | ||
236 | } | ||
237 | |||
238 | dev_priv->last_vblank_valid = 0; | ||
239 | |||
240 | // Clear VSync interrupt regs | ||
241 | status = VIA_READ(VIA_REG_INTERRUPT); | ||
242 | VIA_WRITE(VIA_REG_INTERRUPT, status & | ||
243 | ~(dev_priv->irq_enable_mask)); | ||
244 | |||
245 | /* Clear bits if they're already high */ | ||
246 | viadrv_acknowledge_irqs(dev_priv); | ||
247 | } | ||
248 | } | ||
249 | |||
250 | void via_driver_irq_postinstall(drm_device_t * dev) | ||
251 | { | ||
252 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
253 | u32 status; | ||
254 | |||
255 | DRM_DEBUG("via_driver_irq_postinstall\n"); | ||
256 | if (dev_priv) { | ||
257 | status = VIA_READ(VIA_REG_INTERRUPT); | ||
258 | VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL | ||
259 | | dev_priv->irq_enable_mask); | ||
260 | |||
261 | /* Some magic, oh for some data sheets ! */ | ||
262 | |||
263 | VIA_WRITE8(0x83d4, 0x11); | ||
264 | VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); | ||
265 | |||
266 | } | ||
267 | } | ||
268 | |||
269 | void via_driver_irq_uninstall(drm_device_t * dev) | ||
270 | { | ||
271 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
272 | u32 status; | ||
273 | |||
274 | DRM_DEBUG("driver_irq_uninstall)\n"); | ||
275 | if (dev_priv) { | ||
276 | |||
277 | /* Some more magic, oh for some data sheets ! */ | ||
278 | |||
279 | VIA_WRITE8(0x83d4, 0x11); | ||
280 | VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); | ||
281 | |||
282 | status = VIA_READ(VIA_REG_INTERRUPT); | ||
283 | VIA_WRITE(VIA_REG_INTERRUPT, status & | ||
284 | ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); | ||
285 | } | ||
286 | } | ||
287 | |||
288 | int via_wait_irq(DRM_IOCTL_ARGS) | ||
289 | { | ||
290 | drm_file_t *priv = filp->private_data; | ||
291 | drm_device_t *dev = priv->head->dev; | ||
292 | drm_via_irqwait_t __user *argp = (void __user *)data; | ||
293 | drm_via_irqwait_t irqwait; | ||
294 | struct timeval now; | ||
295 | int ret = 0; | ||
296 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
297 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | ||
298 | int force_sequence; | ||
299 | |||
300 | if (!dev->irq) | ||
301 | return DRM_ERR(EINVAL); | ||
302 | |||
303 | DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait)); | ||
304 | if (irqwait.request.irq >= dev_priv->num_irqs) { | ||
305 | DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, | ||
306 | irqwait.request.irq); | ||
307 | return DRM_ERR(EINVAL); | ||
308 | } | ||
309 | |||
310 | cur_irq += irqwait.request.irq; | ||
311 | |||
312 | switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) { | ||
313 | case VIA_IRQ_RELATIVE: | ||
314 | irqwait.request.sequence += atomic_read(&cur_irq->irq_received); | ||
315 | irqwait.request.type &= ~_DRM_VBLANK_RELATIVE; | ||
316 | case VIA_IRQ_ABSOLUTE: | ||
317 | break; | ||
318 | default: | ||
319 | return DRM_ERR(EINVAL); | ||
320 | } | ||
321 | |||
322 | if (irqwait.request.type & VIA_IRQ_SIGNAL) { | ||
323 | DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n", | ||
324 | __FUNCTION__); | ||
325 | return DRM_ERR(EINVAL); | ||
326 | } | ||
327 | |||
328 | force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE); | ||
329 | |||
330 | ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence, | ||
331 | &irqwait.request.sequence); | ||
332 | do_gettimeofday(&now); | ||
333 | irqwait.reply.tval_sec = now.tv_sec; | ||
334 | irqwait.reply.tval_usec = now.tv_usec; | ||
335 | |||
336 | DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait)); | ||
337 | |||
338 | return ret; | ||
339 | } | ||
diff --git a/drivers/char/drm/via_map.c b/drivers/char/drm/via_map.c new file mode 100644 index 000000000000..0be829b6ec65 --- /dev/null +++ b/drivers/char/drm/via_map.c | |||
@@ -0,0 +1,110 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * | ||
5 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
6 | * copy of this software and associated documentation files (the "Software"), | ||
7 | * to deal in the Software without restriction, including without limitation | ||
8 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
9 | * and/or sell copies of the Software, and to permit persons to whom the | ||
10 | * Software is furnished to do so, subject to the following conditions: | ||
11 | * | ||
12 | * The above copyright notice and this permission notice (including the | ||
13 | * next paragraph) shall be included in all copies or substantial portions | ||
14 | * of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
19 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | #include "drmP.h" | ||
25 | #include "via_drm.h" | ||
26 | #include "via_drv.h" | ||
27 | |||
28 | static int via_do_init_map(drm_device_t * dev, drm_via_init_t * init) | ||
29 | { | ||
30 | drm_via_private_t *dev_priv; | ||
31 | |||
32 | DRM_DEBUG("%s\n", __FUNCTION__); | ||
33 | |||
34 | dev_priv = drm_alloc(sizeof(drm_via_private_t), DRM_MEM_DRIVER); | ||
35 | if (dev_priv == NULL) | ||
36 | return -ENOMEM; | ||
37 | |||
38 | memset(dev_priv, 0, sizeof(drm_via_private_t)); | ||
39 | |||
40 | DRM_GETSAREA(); | ||
41 | if (!dev_priv->sarea) { | ||
42 | DRM_ERROR("could not find sarea!\n"); | ||
43 | dev->dev_private = (void *)dev_priv; | ||
44 | via_do_cleanup_map(dev); | ||
45 | return -EINVAL; | ||
46 | } | ||
47 | |||
48 | dev_priv->fb = drm_core_findmap(dev, init->fb_offset); | ||
49 | if (!dev_priv->fb) { | ||
50 | DRM_ERROR("could not find framebuffer!\n"); | ||
51 | dev->dev_private = (void *)dev_priv; | ||
52 | via_do_cleanup_map(dev); | ||
53 | return -EINVAL; | ||
54 | } | ||
55 | dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); | ||
56 | if (!dev_priv->mmio) { | ||
57 | DRM_ERROR("could not find mmio region!\n"); | ||
58 | dev->dev_private = (void *)dev_priv; | ||
59 | via_do_cleanup_map(dev); | ||
60 | return -EINVAL; | ||
61 | } | ||
62 | |||
63 | dev_priv->sarea_priv = | ||
64 | (drm_via_sarea_t *) ((u8 *) dev_priv->sarea->handle + | ||
65 | init->sarea_priv_offset); | ||
66 | |||
67 | dev_priv->agpAddr = init->agpAddr; | ||
68 | |||
69 | via_init_futex( dev_priv ); | ||
70 | dev_priv->pro_group_a = (dev->pdev->device == 0x3118); | ||
71 | |||
72 | dev->dev_private = (void *)dev_priv; | ||
73 | return 0; | ||
74 | } | ||
75 | |||
76 | int via_do_cleanup_map(drm_device_t * dev) | ||
77 | { | ||
78 | if (dev->dev_private) { | ||
79 | |||
80 | drm_via_private_t *dev_priv = dev->dev_private; | ||
81 | |||
82 | via_dma_cleanup(dev); | ||
83 | |||
84 | drm_free(dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER); | ||
85 | dev->dev_private = NULL; | ||
86 | } | ||
87 | |||
88 | return 0; | ||
89 | } | ||
90 | |||
91 | int via_map_init(DRM_IOCTL_ARGS) | ||
92 | { | ||
93 | DRM_DEVICE; | ||
94 | drm_via_init_t init; | ||
95 | |||
96 | DRM_DEBUG("%s\n", __FUNCTION__); | ||
97 | |||
98 | DRM_COPY_FROM_USER_IOCTL(init, (drm_via_init_t *) data, sizeof(init)); | ||
99 | |||
100 | switch (init.func) { | ||
101 | case VIA_INIT_MAP: | ||
102 | return via_do_init_map(dev, &init); | ||
103 | case VIA_CLEANUP_MAP: | ||
104 | return via_do_cleanup_map(dev); | ||
105 | } | ||
106 | |||
107 | return -EINVAL; | ||
108 | } | ||
109 | |||
110 | |||
diff --git a/drivers/char/drm/via_mm.c b/drivers/char/drm/via_mm.c new file mode 100644 index 000000000000..c22712f44d42 --- /dev/null +++ b/drivers/char/drm/via_mm.c | |||
@@ -0,0 +1,358 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * | ||
5 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
6 | * copy of this software and associated documentation files (the "Software"), | ||
7 | * to deal in the Software without restriction, including without limitation | ||
8 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
9 | * and/or sell copies of the Software, and to permit persons to whom the | ||
10 | * Software is furnished to do so, subject to the following conditions: | ||
11 | * | ||
12 | * The above copyright notice and this permission notice (including the | ||
13 | * next paragraph) shall be included in all copies or substantial portions | ||
14 | * of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
19 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | #include "drmP.h" | ||
25 | #include "via_drm.h" | ||
26 | #include "via_drv.h" | ||
27 | #include "via_ds.h" | ||
28 | #include "via_mm.h" | ||
29 | |||
30 | #define MAX_CONTEXT 100 | ||
31 | |||
32 | typedef struct { | ||
33 | int used; | ||
34 | int context; | ||
35 | set_t *sets[2]; /* 0 for frame buffer, 1 for AGP , 2 for System */ | ||
36 | } via_context_t; | ||
37 | |||
38 | static via_context_t global_ppriv[MAX_CONTEXT]; | ||
39 | |||
40 | static int via_agp_alloc(drm_via_mem_t * mem); | ||
41 | static int via_agp_free(drm_via_mem_t * mem); | ||
42 | static int via_fb_alloc(drm_via_mem_t * mem); | ||
43 | static int via_fb_free(drm_via_mem_t * mem); | ||
44 | |||
45 | static int add_alloc_set(int context, int type, unsigned int val) | ||
46 | { | ||
47 | int i, retval = 0; | ||
48 | |||
49 | for (i = 0; i < MAX_CONTEXT; i++) { | ||
50 | if (global_ppriv[i].used && global_ppriv[i].context == context) { | ||
51 | retval = via_setAdd(global_ppriv[i].sets[type], val); | ||
52 | break; | ||
53 | } | ||
54 | } | ||
55 | |||
56 | return retval; | ||
57 | } | ||
58 | |||
59 | static int del_alloc_set(int context, int type, unsigned int val) | ||
60 | { | ||
61 | int i, retval = 0; | ||
62 | |||
63 | for (i = 0; i < MAX_CONTEXT; i++) | ||
64 | if (global_ppriv[i].used && global_ppriv[i].context == context) { | ||
65 | retval = via_setDel(global_ppriv[i].sets[type], val); | ||
66 | break; | ||
67 | } | ||
68 | |||
69 | return retval; | ||
70 | } | ||
71 | |||
72 | /* agp memory management */ | ||
73 | static memHeap_t *AgpHeap = NULL; | ||
74 | |||
75 | int via_agp_init(DRM_IOCTL_ARGS) | ||
76 | { | ||
77 | drm_via_agp_t agp; | ||
78 | |||
79 | DRM_COPY_FROM_USER_IOCTL(agp, (drm_via_agp_t *) data, sizeof(agp)); | ||
80 | |||
81 | AgpHeap = via_mmInit(agp.offset, agp.size); | ||
82 | |||
83 | DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)agp.offset, (unsigned long)agp.size); | ||
84 | |||
85 | return 0; | ||
86 | } | ||
87 | |||
88 | /* fb memory management */ | ||
89 | static memHeap_t *FBHeap = NULL; | ||
90 | |||
91 | int via_fb_init(DRM_IOCTL_ARGS) | ||
92 | { | ||
93 | drm_via_fb_t fb; | ||
94 | |||
95 | DRM_COPY_FROM_USER_IOCTL(fb, (drm_via_fb_t *) data, sizeof(fb)); | ||
96 | |||
97 | FBHeap = via_mmInit(fb.offset, fb.size); | ||
98 | |||
99 | DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)fb.offset, (unsigned long)fb.size); | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
104 | int via_init_context(struct drm_device *dev, int context) | ||
105 | { | ||
106 | int i; | ||
107 | |||
108 | for (i = 0; i < MAX_CONTEXT; i++) | ||
109 | if (global_ppriv[i].used && | ||
110 | (global_ppriv[i].context == context)) | ||
111 | break; | ||
112 | |||
113 | if (i >= MAX_CONTEXT) { | ||
114 | for (i = 0; i < MAX_CONTEXT; i++) { | ||
115 | if (!global_ppriv[i].used) { | ||
116 | global_ppriv[i].context = context; | ||
117 | global_ppriv[i].used = 1; | ||
118 | global_ppriv[i].sets[0] = via_setInit(); | ||
119 | global_ppriv[i].sets[1] = via_setInit(); | ||
120 | DRM_DEBUG("init allocation set, socket=%d," | ||
121 | " context = %d\n", i, context); | ||
122 | break; | ||
123 | } | ||
124 | } | ||
125 | |||
126 | if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) || | ||
127 | (global_ppriv[i].sets[1] == NULL)) { | ||
128 | return 0; | ||
129 | } | ||
130 | } | ||
131 | |||
132 | return 1; | ||
133 | } | ||
134 | |||
135 | int via_final_context(struct drm_device *dev, int context) | ||
136 | { | ||
137 | int i; | ||
138 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
139 | |||
140 | for (i = 0; i < MAX_CONTEXT; i++) | ||
141 | if (global_ppriv[i].used && | ||
142 | (global_ppriv[i].context == context)) | ||
143 | break; | ||
144 | |||
145 | if (i < MAX_CONTEXT) { | ||
146 | set_t *set; | ||
147 | ITEM_TYPE item; | ||
148 | int retval; | ||
149 | |||
150 | DRM_DEBUG("find socket %d, context = %d\n", i, context); | ||
151 | |||
152 | /* Video Memory */ | ||
153 | set = global_ppriv[i].sets[0]; | ||
154 | retval = via_setFirst(set, &item); | ||
155 | while (retval) { | ||
156 | DRM_DEBUG("free video memory 0x%lx\n", item); | ||
157 | via_mmFreeMem((PMemBlock) item); | ||
158 | retval = via_setNext(set, &item); | ||
159 | } | ||
160 | via_setDestroy(set); | ||
161 | |||
162 | /* AGP Memory */ | ||
163 | set = global_ppriv[i].sets[1]; | ||
164 | retval = via_setFirst(set, &item); | ||
165 | while (retval) { | ||
166 | DRM_DEBUG("free agp memory 0x%lx\n", item); | ||
167 | via_mmFreeMem((PMemBlock) item); | ||
168 | retval = via_setNext(set, &item); | ||
169 | } | ||
170 | via_setDestroy(set); | ||
171 | global_ppriv[i].used = 0; | ||
172 | } | ||
173 | via_release_futex(dev_priv, context); | ||
174 | |||
175 | |||
176 | #if defined(__linux__) | ||
177 | /* Linux specific until context tracking code gets ported to BSD */ | ||
178 | /* Last context, perform cleanup */ | ||
179 | if (dev->ctx_count == 1 && dev->dev_private) { | ||
180 | DRM_DEBUG("Last Context\n"); | ||
181 | if (dev->irq) | ||
182 | drm_irq_uninstall(dev); | ||
183 | |||
184 | via_cleanup_futex(dev_priv); | ||
185 | via_do_cleanup_map(dev); | ||
186 | } | ||
187 | #endif | ||
188 | |||
189 | return 1; | ||
190 | } | ||
191 | |||
192 | int via_mem_alloc(DRM_IOCTL_ARGS) | ||
193 | { | ||
194 | drm_via_mem_t mem; | ||
195 | |||
196 | DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *) data, sizeof(mem)); | ||
197 | |||
198 | switch (mem.type) { | ||
199 | case VIDEO: | ||
200 | if (via_fb_alloc(&mem) < 0) | ||
201 | return -EFAULT; | ||
202 | DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *) data, mem, | ||
203 | sizeof(mem)); | ||
204 | return 0; | ||
205 | case AGP: | ||
206 | if (via_agp_alloc(&mem) < 0) | ||
207 | return -EFAULT; | ||
208 | DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *) data, mem, | ||
209 | sizeof(mem)); | ||
210 | return 0; | ||
211 | } | ||
212 | |||
213 | return -EFAULT; | ||
214 | } | ||
215 | |||
216 | static int via_fb_alloc(drm_via_mem_t * mem) | ||
217 | { | ||
218 | drm_via_mm_t fb; | ||
219 | PMemBlock block; | ||
220 | int retval = 0; | ||
221 | |||
222 | if (!FBHeap) | ||
223 | return -1; | ||
224 | |||
225 | fb.size = mem->size; | ||
226 | fb.context = mem->context; | ||
227 | |||
228 | block = via_mmAllocMem(FBHeap, fb.size, 5, 0); | ||
229 | if (block) { | ||
230 | fb.offset = block->ofs; | ||
231 | fb.free = (unsigned long)block; | ||
232 | if (!add_alloc_set(fb.context, VIDEO, fb.free)) { | ||
233 | DRM_DEBUG("adding to allocation set fails\n"); | ||
234 | via_mmFreeMem((PMemBlock) fb.free); | ||
235 | retval = -1; | ||
236 | } | ||
237 | } else { | ||
238 | fb.offset = 0; | ||
239 | fb.size = 0; | ||
240 | fb.free = 0; | ||
241 | retval = -1; | ||
242 | } | ||
243 | |||
244 | mem->offset = fb.offset; | ||
245 | mem->index = fb.free; | ||
246 | |||
247 | DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size, | ||
248 | (int)fb.offset); | ||
249 | |||
250 | return retval; | ||
251 | } | ||
252 | |||
253 | static int via_agp_alloc(drm_via_mem_t * mem) | ||
254 | { | ||
255 | drm_via_mm_t agp; | ||
256 | PMemBlock block; | ||
257 | int retval = 0; | ||
258 | |||
259 | if (!AgpHeap) | ||
260 | return -1; | ||
261 | |||
262 | agp.size = mem->size; | ||
263 | agp.context = mem->context; | ||
264 | |||
265 | block = via_mmAllocMem(AgpHeap, agp.size, 5, 0); | ||
266 | if (block) { | ||
267 | agp.offset = block->ofs; | ||
268 | agp.free = (unsigned long)block; | ||
269 | if (!add_alloc_set(agp.context, AGP, agp.free)) { | ||
270 | DRM_DEBUG("adding to allocation set fails\n"); | ||
271 | via_mmFreeMem((PMemBlock) agp.free); | ||
272 | retval = -1; | ||
273 | } | ||
274 | } else { | ||
275 | agp.offset = 0; | ||
276 | agp.size = 0; | ||
277 | agp.free = 0; | ||
278 | } | ||
279 | |||
280 | mem->offset = agp.offset; | ||
281 | mem->index = agp.free; | ||
282 | |||
283 | DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size, | ||
284 | (unsigned int)agp.offset); | ||
285 | return retval; | ||
286 | } | ||
287 | |||
288 | int via_mem_free(DRM_IOCTL_ARGS) | ||
289 | { | ||
290 | drm_via_mem_t mem; | ||
291 | |||
292 | DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *) data, sizeof(mem)); | ||
293 | |||
294 | switch (mem.type) { | ||
295 | |||
296 | case VIDEO: | ||
297 | if (via_fb_free(&mem) == 0) | ||
298 | return 0; | ||
299 | break; | ||
300 | case AGP: | ||
301 | if (via_agp_free(&mem) == 0) | ||
302 | return 0; | ||
303 | break; | ||
304 | } | ||
305 | |||
306 | return -EFAULT; | ||
307 | } | ||
308 | |||
309 | static int via_fb_free(drm_via_mem_t * mem) | ||
310 | { | ||
311 | drm_via_mm_t fb; | ||
312 | int retval = 0; | ||
313 | |||
314 | if (!FBHeap) { | ||
315 | return -1; | ||
316 | } | ||
317 | |||
318 | fb.free = mem->index; | ||
319 | fb.context = mem->context; | ||
320 | |||
321 | if (!fb.free) { | ||
322 | return -1; | ||
323 | |||
324 | } | ||
325 | |||
326 | via_mmFreeMem((PMemBlock) fb.free); | ||
327 | |||
328 | if (!del_alloc_set(fb.context, VIDEO, fb.free)) { | ||
329 | retval = -1; | ||
330 | } | ||
331 | |||
332 | DRM_DEBUG("free fb, free = %ld\n", fb.free); | ||
333 | |||
334 | return retval; | ||
335 | } | ||
336 | |||
337 | static int via_agp_free(drm_via_mem_t * mem) | ||
338 | { | ||
339 | drm_via_mm_t agp; | ||
340 | |||
341 | int retval = 0; | ||
342 | |||
343 | agp.free = mem->index; | ||
344 | agp.context = mem->context; | ||
345 | |||
346 | if (!agp.free) | ||
347 | return -1; | ||
348 | |||
349 | via_mmFreeMem((PMemBlock) agp.free); | ||
350 | |||
351 | if (!del_alloc_set(agp.context, AGP, agp.free)) { | ||
352 | retval = -1; | ||
353 | } | ||
354 | |||
355 | DRM_DEBUG("free agp, free = %ld\n", agp.free); | ||
356 | |||
357 | return retval; | ||
358 | } | ||
diff --git a/drivers/char/drm/via_mm.h b/drivers/char/drm/via_mm.h new file mode 100644 index 000000000000..d57efda57c76 --- /dev/null +++ b/drivers/char/drm/via_mm.h | |||
@@ -0,0 +1,40 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. | ||
4 | * | ||
5 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
6 | * copy of this software and associated documentation files (the "Software"), | ||
7 | * to deal in the Software without restriction, including without limitation | ||
8 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
9 | * and/or sell copies of the Software, and to permit persons to whom the | ||
10 | * Software is furnished to do so, subject to the following conditions: | ||
11 | * | ||
12 | * The above copyright notice and this permission notice (including the | ||
13 | * next paragraph) shall be included in all copies or substantial portions | ||
14 | * of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
19 | * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | #ifndef _via_drm_mm_h_ | ||
25 | #define _via_drm_mm_h_ | ||
26 | |||
27 | typedef struct { | ||
28 | unsigned int context; | ||
29 | unsigned int size; | ||
30 | unsigned long offset; | ||
31 | unsigned long free; | ||
32 | } drm_via_mm_t; | ||
33 | |||
34 | typedef struct { | ||
35 | unsigned int size; | ||
36 | unsigned long handle; | ||
37 | void *virtual; | ||
38 | } drm_via_dma_t; | ||
39 | |||
40 | #endif | ||
diff --git a/drivers/char/drm/via_verifier.c b/drivers/char/drm/via_verifier.c new file mode 100644 index 000000000000..07923b0c7a97 --- /dev/null +++ b/drivers/char/drm/via_verifier.c | |||
@@ -0,0 +1,1061 @@ | |||
1 | /* | ||
2 | * Copyright 2004 The Unichrome Project. All Rights Reserved. | ||
3 | * Copyright 2005 Thomas Hellstrom. All Rights Reserved. | ||
4 | * | ||
5 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
6 | * copy of this software and associated documentation files (the "Software"), | ||
7 | * to deal in the Software without restriction, including without limitation | ||
8 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
9 | * and/or sell copies of the Software, and to permit persons to whom the | ||
10 | * Software is furnished to do so, subject to the following conditions: | ||
11 | * | ||
12 | * The above copyright notice and this permission notice (including the | ||
13 | * next paragraph) shall be included in all copies or substantial portions | ||
14 | * of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | * | ||
24 | * Author: Thomas Hellstrom 2004, 2005. | ||
25 | * This code was written using docs obtained under NDA from VIA Inc. | ||
26 | * | ||
27 | * Don't run this code directly on an AGP buffer. Due to cache problems it will | ||
28 | * be very slow. | ||
29 | */ | ||
30 | |||
31 | |||
32 | #include "via_3d_reg.h" | ||
33 | #include "drmP.h" | ||
34 | #include "drm.h" | ||
35 | #include "via_drm.h" | ||
36 | #include "via_verifier.h" | ||
37 | #include "via_drv.h" | ||
38 | |||
39 | typedef enum{ | ||
40 | state_command, | ||
41 | state_header2, | ||
42 | state_header1, | ||
43 | state_vheader5, | ||
44 | state_vheader6, | ||
45 | state_error | ||
46 | } verifier_state_t; | ||
47 | |||
48 | |||
49 | typedef enum{ | ||
50 | no_check = 0, | ||
51 | check_for_header2, | ||
52 | check_for_header1, | ||
53 | check_for_header2_err, | ||
54 | check_for_header1_err, | ||
55 | check_for_fire, | ||
56 | check_z_buffer_addr0, | ||
57 | check_z_buffer_addr1, | ||
58 | check_z_buffer_addr_mode, | ||
59 | check_destination_addr0, | ||
60 | check_destination_addr1, | ||
61 | check_destination_addr_mode, | ||
62 | check_for_dummy, | ||
63 | check_for_dd, | ||
64 | check_texture_addr0, | ||
65 | check_texture_addr1, | ||
66 | check_texture_addr2, | ||
67 | check_texture_addr3, | ||
68 | check_texture_addr4, | ||
69 | check_texture_addr5, | ||
70 | check_texture_addr6, | ||
71 | check_texture_addr7, | ||
72 | check_texture_addr8, | ||
73 | check_texture_addr_mode, | ||
74 | check_for_vertex_count, | ||
75 | check_number_texunits, | ||
76 | forbidden_command | ||
77 | }hazard_t; | ||
78 | |||
79 | /* | ||
80 | * Associates each hazard above with a possible multi-command | ||
81 | * sequence. For example an address that is split over multiple | ||
82 | * commands and that needs to be checked at the first command | ||
83 | * that does not include any part of the address. | ||
84 | */ | ||
85 | |||
86 | static drm_via_sequence_t seqs[] = { | ||
87 | no_sequence, | ||
88 | no_sequence, | ||
89 | no_sequence, | ||
90 | no_sequence, | ||
91 | no_sequence, | ||
92 | no_sequence, | ||
93 | z_address, | ||
94 | z_address, | ||
95 | z_address, | ||
96 | dest_address, | ||
97 | dest_address, | ||
98 | dest_address, | ||
99 | no_sequence, | ||
100 | no_sequence, | ||
101 | tex_address, | ||
102 | tex_address, | ||
103 | tex_address, | ||
104 | tex_address, | ||
105 | tex_address, | ||
106 | tex_address, | ||
107 | tex_address, | ||
108 | tex_address, | ||
109 | tex_address, | ||
110 | tex_address, | ||
111 | no_sequence | ||
112 | }; | ||
113 | |||
114 | typedef struct{ | ||
115 | unsigned int code; | ||
116 | hazard_t hz; | ||
117 | } hz_init_t; | ||
118 | |||
119 | |||
120 | |||
121 | static hz_init_t init_table1[] = { | ||
122 | {0xf2, check_for_header2_err}, | ||
123 | {0xf0, check_for_header1_err}, | ||
124 | {0xee, check_for_fire}, | ||
125 | {0xcc, check_for_dummy}, | ||
126 | {0xdd, check_for_dd}, | ||
127 | {0x00, no_check}, | ||
128 | {0x10, check_z_buffer_addr0}, | ||
129 | {0x11, check_z_buffer_addr1}, | ||
130 | {0x12, check_z_buffer_addr_mode}, | ||
131 | {0x13, no_check}, | ||
132 | {0x14, no_check}, | ||
133 | {0x15, no_check}, | ||
134 | {0x23, no_check}, | ||
135 | {0x24, no_check}, | ||
136 | {0x33, no_check}, | ||
137 | {0x34, no_check}, | ||
138 | {0x35, no_check}, | ||
139 | {0x36, no_check}, | ||
140 | {0x37, no_check}, | ||
141 | {0x38, no_check}, | ||
142 | {0x39, no_check}, | ||
143 | {0x3A, no_check}, | ||
144 | {0x3B, no_check}, | ||
145 | {0x3C, no_check}, | ||
146 | {0x3D, no_check}, | ||
147 | {0x3E, no_check}, | ||
148 | {0x40, check_destination_addr0}, | ||
149 | {0x41, check_destination_addr1}, | ||
150 | {0x42, check_destination_addr_mode}, | ||
151 | {0x43, no_check}, | ||
152 | {0x44, no_check}, | ||
153 | {0x50, no_check}, | ||
154 | {0x51, no_check}, | ||
155 | {0x52, no_check}, | ||
156 | {0x53, no_check}, | ||
157 | {0x54, no_check}, | ||
158 | {0x55, no_check}, | ||
159 | {0x56, no_check}, | ||
160 | {0x57, no_check}, | ||
161 | {0x58, no_check}, | ||
162 | {0x70, no_check}, | ||
163 | {0x71, no_check}, | ||
164 | {0x78, no_check}, | ||
165 | {0x79, no_check}, | ||
166 | {0x7A, no_check}, | ||
167 | {0x7B, no_check}, | ||
168 | {0x7C, no_check}, | ||
169 | {0x7D, check_for_vertex_count} | ||
170 | }; | ||
171 | |||
172 | |||
173 | |||
174 | static hz_init_t init_table2[] = { | ||
175 | {0xf2, check_for_header2_err}, | ||
176 | {0xf0, check_for_header1_err}, | ||
177 | {0xee, check_for_fire}, | ||
178 | {0xcc, check_for_dummy}, | ||
179 | {0x00, check_texture_addr0}, | ||
180 | {0x01, check_texture_addr0}, | ||
181 | {0x02, check_texture_addr0}, | ||
182 | {0x03, check_texture_addr0}, | ||
183 | {0x04, check_texture_addr0}, | ||
184 | {0x05, check_texture_addr0}, | ||
185 | {0x06, check_texture_addr0}, | ||
186 | {0x07, check_texture_addr0}, | ||
187 | {0x08, check_texture_addr0}, | ||
188 | {0x09, check_texture_addr0}, | ||
189 | {0x20, check_texture_addr1}, | ||
190 | {0x21, check_texture_addr1}, | ||
191 | {0x22, check_texture_addr1}, | ||
192 | {0x23, check_texture_addr4}, | ||
193 | {0x2B, check_texture_addr3}, | ||
194 | {0x2C, check_texture_addr3}, | ||
195 | {0x2D, check_texture_addr3}, | ||
196 | {0x2E, check_texture_addr3}, | ||
197 | {0x2F, check_texture_addr3}, | ||
198 | {0x30, check_texture_addr3}, | ||
199 | {0x31, check_texture_addr3}, | ||
200 | {0x32, check_texture_addr3}, | ||
201 | {0x33, check_texture_addr3}, | ||
202 | {0x34, check_texture_addr3}, | ||
203 | {0x4B, check_texture_addr5}, | ||
204 | {0x4C, check_texture_addr6}, | ||
205 | {0x51, check_texture_addr7}, | ||
206 | {0x52, check_texture_addr8}, | ||
207 | {0x77, check_texture_addr2}, | ||
208 | {0x78, no_check}, | ||
209 | {0x79, no_check}, | ||
210 | {0x7A, no_check}, | ||
211 | {0x7B, check_texture_addr_mode}, | ||
212 | {0x7C, no_check}, | ||
213 | {0x7D, no_check}, | ||
214 | {0x7E, no_check}, | ||
215 | {0x7F, no_check}, | ||
216 | {0x80, no_check}, | ||
217 | {0x81, no_check}, | ||
218 | {0x82, no_check}, | ||
219 | {0x83, no_check}, | ||
220 | {0x85, no_check}, | ||
221 | {0x86, no_check}, | ||
222 | {0x87, no_check}, | ||
223 | {0x88, no_check}, | ||
224 | {0x89, no_check}, | ||
225 | {0x8A, no_check}, | ||
226 | {0x90, no_check}, | ||
227 | {0x91, no_check}, | ||
228 | {0x92, no_check}, | ||
229 | {0x93, no_check} | ||
230 | }; | ||
231 | |||
232 | static hz_init_t init_table3[] = { | ||
233 | {0xf2, check_for_header2_err}, | ||
234 | {0xf0, check_for_header1_err}, | ||
235 | {0xcc, check_for_dummy}, | ||
236 | {0x00, check_number_texunits} | ||
237 | }; | ||
238 | |||
239 | |||
240 | static hazard_t table1[256]; | ||
241 | static hazard_t table2[256]; | ||
242 | static hazard_t table3[256]; | ||
243 | |||
244 | |||
245 | |||
246 | static __inline__ int | ||
247 | eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words) | ||
248 | { | ||
249 | if ((*buf - buf_end) >= num_words) { | ||
250 | *buf += num_words; | ||
251 | return 0; | ||
252 | } | ||
253 | DRM_ERROR("Illegal termination of DMA command buffer\n"); | ||
254 | return 1; | ||
255 | } | ||
256 | |||
257 | |||
258 | /* | ||
259 | * Partially stolen from drm_memory.h | ||
260 | */ | ||
261 | |||
262 | static __inline__ drm_map_t * | ||
263 | via_drm_lookup_agp_map (drm_via_state_t *seq, unsigned long offset, unsigned long size, | ||
264 | drm_device_t *dev) | ||
265 | { | ||
266 | struct list_head *list; | ||
267 | drm_map_list_t *r_list; | ||
268 | drm_map_t *map = seq->map_cache; | ||
269 | |||
270 | if (map && map->offset <= offset && (offset + size) <= (map->offset + map->size)) { | ||
271 | return map; | ||
272 | } | ||
273 | |||
274 | list_for_each(list, &dev->maplist->head) { | ||
275 | r_list = (drm_map_list_t *) list; | ||
276 | map = r_list->map; | ||
277 | if (!map) | ||
278 | continue; | ||
279 | if (map->offset <= offset && (offset + size) <= (map->offset + map->size) && | ||
280 | !(map->flags & _DRM_RESTRICTED) && (map->type == _DRM_AGP)) { | ||
281 | seq->map_cache = map; | ||
282 | return map; | ||
283 | } | ||
284 | } | ||
285 | return NULL; | ||
286 | } | ||
287 | |||
288 | |||
289 | /* | ||
290 | * Require that all AGP texture levels reside in the same AGP map which should | ||
291 | * be mappable by the client. This is not a big restriction. | ||
292 | * FIXME: To actually enforce this security policy strictly, drm_rmmap | ||
293 | * would have to wait for dma quiescent before removing an AGP map. | ||
294 | * The via_drm_lookup_agp_map call in reality seems to take | ||
295 | * very little CPU time. | ||
296 | */ | ||
297 | |||
298 | |||
299 | static __inline__ int | ||
300 | finish_current_sequence(drm_via_state_t *cur_seq) | ||
301 | { | ||
302 | switch(cur_seq->unfinished) { | ||
303 | case z_address: | ||
304 | DRM_DEBUG("Z Buffer start address is 0x%x\n", cur_seq->z_addr); | ||
305 | break; | ||
306 | case dest_address: | ||
307 | DRM_DEBUG("Destination start address is 0x%x\n", cur_seq->d_addr); | ||
308 | break; | ||
309 | case tex_address: | ||
310 | if (cur_seq->agp_texture) { | ||
311 | unsigned start = cur_seq->tex_level_lo[cur_seq->texture]; | ||
312 | unsigned end = cur_seq->tex_level_hi[cur_seq->texture]; | ||
313 | unsigned long lo=~0, hi=0, tmp; | ||
314 | uint32_t *addr, *pitch, *height, tex; | ||
315 | unsigned i; | ||
316 | |||
317 | if (end > 9) end = 9; | ||
318 | if (start > 9) start = 9; | ||
319 | |||
320 | addr =&(cur_seq->t_addr[tex = cur_seq->texture][start]); | ||
321 | pitch = &(cur_seq->pitch[tex][start]); | ||
322 | height = &(cur_seq->height[tex][start]); | ||
323 | |||
324 | for (i=start; i<= end; ++i) { | ||
325 | tmp = *addr++; | ||
326 | if (tmp < lo) lo = tmp; | ||
327 | tmp += (*height++ << *pitch++); | ||
328 | if (tmp > hi) hi = tmp; | ||
329 | } | ||
330 | |||
331 | if (! via_drm_lookup_agp_map (cur_seq, lo, hi - lo, cur_seq->dev)) { | ||
332 | DRM_ERROR("AGP texture is not in allowed map\n"); | ||
333 | return 2; | ||
334 | } | ||
335 | } | ||
336 | break; | ||
337 | default: | ||
338 | break; | ||
339 | } | ||
340 | cur_seq->unfinished = no_sequence; | ||
341 | return 0; | ||
342 | } | ||
343 | |||
344 | static __inline__ int | ||
345 | investigate_hazard( uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq) | ||
346 | { | ||
347 | register uint32_t tmp, *tmp_addr; | ||
348 | |||
349 | if (cur_seq->unfinished && (cur_seq->unfinished != seqs[hz])) { | ||
350 | int ret; | ||
351 | if ((ret = finish_current_sequence(cur_seq))) return ret; | ||
352 | } | ||
353 | |||
354 | switch(hz) { | ||
355 | case check_for_header2: | ||
356 | if (cmd == HALCYON_HEADER2) return 1; | ||
357 | return 0; | ||
358 | case check_for_header1: | ||
359 | if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) return 1; | ||
360 | return 0; | ||
361 | case check_for_header2_err: | ||
362 | if (cmd == HALCYON_HEADER2) return 1; | ||
363 | DRM_ERROR("Illegal DMA HALCYON_HEADER2 command\n"); | ||
364 | break; | ||
365 | case check_for_header1_err: | ||
366 | if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) return 1; | ||
367 | DRM_ERROR("Illegal DMA HALCYON_HEADER1 command\n"); | ||
368 | break; | ||
369 | case check_for_fire: | ||
370 | if ((cmd & HALCYON_FIREMASK) == HALCYON_FIRECMD) return 1; | ||
371 | DRM_ERROR("Illegal DMA HALCYON_FIRECMD command\n"); | ||
372 | break; | ||
373 | case check_for_dummy: | ||
374 | if (HC_DUMMY == cmd) return 0; | ||
375 | DRM_ERROR("Illegal DMA HC_DUMMY command\n"); | ||
376 | break; | ||
377 | case check_for_dd: | ||
378 | if (0xdddddddd == cmd) return 0; | ||
379 | DRM_ERROR("Illegal DMA 0xdddddddd command\n"); | ||
380 | break; | ||
381 | case check_z_buffer_addr0: | ||
382 | cur_seq->unfinished = z_address; | ||
383 | cur_seq->z_addr = (cur_seq->z_addr & 0xFF000000) | | ||
384 | (cmd & 0x00FFFFFF); | ||
385 | return 0; | ||
386 | case check_z_buffer_addr1: | ||
387 | cur_seq->unfinished = z_address; | ||
388 | cur_seq->z_addr = (cur_seq->z_addr & 0x00FFFFFF) | | ||
389 | ((cmd & 0xFF) << 24); | ||
390 | return 0; | ||
391 | case check_z_buffer_addr_mode: | ||
392 | cur_seq->unfinished = z_address; | ||
393 | if ((cmd & 0x0000C000) == 0) return 0; | ||
394 | DRM_ERROR("Attempt to place Z buffer in system memory\n"); | ||
395 | return 2; | ||
396 | case check_destination_addr0: | ||
397 | cur_seq->unfinished = dest_address; | ||
398 | cur_seq->d_addr = (cur_seq->d_addr & 0xFF000000) | | ||
399 | (cmd & 0x00FFFFFF); | ||
400 | return 0; | ||
401 | case check_destination_addr1: | ||
402 | cur_seq->unfinished = dest_address; | ||
403 | cur_seq->d_addr = (cur_seq->d_addr & 0x00FFFFFF) | | ||
404 | ((cmd & 0xFF) << 24); | ||
405 | return 0; | ||
406 | case check_destination_addr_mode: | ||
407 | cur_seq->unfinished = dest_address; | ||
408 | if ((cmd & 0x0000C000) == 0) return 0; | ||
409 | DRM_ERROR("Attempt to place 3D drawing buffer in system memory\n"); | ||
410 | return 2; | ||
411 | case check_texture_addr0: | ||
412 | cur_seq->unfinished = tex_address; | ||
413 | tmp = (cmd >> 24); | ||
414 | tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp]; | ||
415 | *tmp_addr = (*tmp_addr & 0xFF000000) | (cmd & 0x00FFFFFF); | ||
416 | return 0; | ||
417 | case check_texture_addr1: | ||
418 | cur_seq->unfinished = tex_address; | ||
419 | tmp = ((cmd >> 24) - 0x20); | ||
420 | tmp += tmp << 1; | ||
421 | tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp]; | ||
422 | *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24); | ||
423 | tmp_addr++; | ||
424 | *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF00) << 16); | ||
425 | tmp_addr++; | ||
426 | *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF0000) << 8); | ||
427 | return 0; | ||
428 | case check_texture_addr2: | ||
429 | cur_seq->unfinished = tex_address; | ||
430 | cur_seq->tex_level_lo[tmp = cur_seq->texture] = cmd & 0x3F; | ||
431 | cur_seq->tex_level_hi[tmp] = (cmd & 0xFC0) >> 6; | ||
432 | return 0; | ||
433 | case check_texture_addr3: | ||
434 | cur_seq->unfinished = tex_address; | ||
435 | tmp = ((cmd >> 24) - 0x2B); | ||
436 | cur_seq->pitch[cur_seq->texture][tmp] = (cmd & 0x00F00000) >> 20; | ||
437 | if (!tmp && (cmd & 0x000FFFFF)) { | ||
438 | DRM_ERROR("Unimplemented texture level 0 pitch mode.\n"); | ||
439 | return 2; | ||
440 | } | ||
441 | return 0; | ||
442 | case check_texture_addr4: | ||
443 | cur_seq->unfinished = tex_address; | ||
444 | tmp_addr = &cur_seq->t_addr[cur_seq->texture][9]; | ||
445 | *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24); | ||
446 | return 0; | ||
447 | case check_texture_addr5: | ||
448 | case check_texture_addr6: | ||
449 | cur_seq->unfinished = tex_address; | ||
450 | /* | ||
451 | * Texture width. We don't care since we have the pitch. | ||
452 | */ | ||
453 | return 0; | ||
454 | case check_texture_addr7: | ||
455 | cur_seq->unfinished = tex_address; | ||
456 | tmp_addr = &(cur_seq->height[cur_seq->texture][0]); | ||
457 | tmp_addr[5] = 1 << ((cmd & 0x00F00000) >> 20); | ||
458 | tmp_addr[4] = 1 << ((cmd & 0x000F0000) >> 16); | ||
459 | tmp_addr[3] = 1 << ((cmd & 0x0000F000) >> 12); | ||
460 | tmp_addr[2] = 1 << ((cmd & 0x00000F00) >> 8); | ||
461 | tmp_addr[1] = 1 << ((cmd & 0x000000F0) >> 4); | ||
462 | tmp_addr[0] = 1 << (cmd & 0x0000000F); | ||
463 | return 0; | ||
464 | case check_texture_addr8: | ||
465 | cur_seq->unfinished = tex_address; | ||
466 | tmp_addr = &(cur_seq->height[cur_seq->texture][0]); | ||
467 | tmp_addr[9] = 1 << ((cmd & 0x0000F000) >> 12); | ||
468 | tmp_addr[8] = 1 << ((cmd & 0x00000F00) >> 8); | ||
469 | tmp_addr[7] = 1 << ((cmd & 0x000000F0) >> 4); | ||
470 | tmp_addr[6] = 1 << (cmd & 0x0000000F); | ||
471 | return 0; | ||
472 | case check_texture_addr_mode: | ||
473 | cur_seq->unfinished = tex_address; | ||
474 | if ( 2 == (tmp = cmd & 0x00000003)) { | ||
475 | DRM_ERROR("Attempt to fetch texture from system memory.\n"); | ||
476 | return 2; | ||
477 | } | ||
478 | cur_seq->agp_texture = (tmp == 3); | ||
479 | cur_seq->tex_palette_size[cur_seq->texture] = | ||
480 | (cmd >> 16) & 0x000000007; | ||
481 | return 0; | ||
482 | case check_for_vertex_count: | ||
483 | cur_seq->vertex_count = cmd & 0x0000FFFF; | ||
484 | return 0; | ||
485 | case check_number_texunits: | ||
486 | cur_seq->multitex = (cmd >> 3) & 1; | ||
487 | return 0; | ||
488 | default: | ||
489 | DRM_ERROR("Illegal DMA data: 0x%x\n", cmd); | ||
490 | return 2; | ||
491 | } | ||
492 | return 2; | ||
493 | } | ||
494 | |||
495 | |||
496 | static __inline__ int | ||
497 | via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end, | ||
498 | drm_via_state_t *cur_seq) | ||
499 | { | ||
500 | drm_via_private_t *dev_priv = (drm_via_private_t *) cur_seq->dev->dev_private; | ||
501 | uint32_t a_fire, bcmd , dw_count; | ||
502 | int ret = 0; | ||
503 | int have_fire; | ||
504 | const uint32_t *buf = *buffer; | ||
505 | |||
506 | while(buf < buf_end) { | ||
507 | have_fire = 0; | ||
508 | if ((buf_end - buf) < 2) { | ||
509 | DRM_ERROR("Unexpected termination of primitive list.\n"); | ||
510 | ret = 1; | ||
511 | break; | ||
512 | } | ||
513 | if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdB) break; | ||
514 | bcmd = *buf++; | ||
515 | if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdA) { | ||
516 | DRM_ERROR("Expected Vertex List A command, got 0x%x\n", | ||
517 | *buf); | ||
518 | ret = 1; | ||
519 | break; | ||
520 | } | ||
521 | a_fire = *buf++ | HC_HPLEND_MASK | HC_HPMValidN_MASK | HC_HE3Fire_MASK; | ||
522 | |||
523 | /* | ||
524 | * How many dwords per vertex ? | ||
525 | */ | ||
526 | |||
527 | if (cur_seq->agp && ((bcmd & (0xF << 11)) == 0)) { | ||
528 | DRM_ERROR("Illegal B command vertex data for AGP.\n"); | ||
529 | ret = 1; | ||
530 | break; | ||
531 | } | ||
532 | |||
533 | dw_count = 0; | ||
534 | if (bcmd & (1 << 7)) dw_count += (cur_seq->multitex) ? 2:1; | ||
535 | if (bcmd & (1 << 8)) dw_count += (cur_seq->multitex) ? 2:1; | ||
536 | if (bcmd & (1 << 9)) dw_count++; | ||
537 | if (bcmd & (1 << 10)) dw_count++; | ||
538 | if (bcmd & (1 << 11)) dw_count++; | ||
539 | if (bcmd & (1 << 12)) dw_count++; | ||
540 | if (bcmd & (1 << 13)) dw_count++; | ||
541 | if (bcmd & (1 << 14)) dw_count++; | ||
542 | |||
543 | while(buf < buf_end) { | ||
544 | if (*buf == a_fire) { | ||
545 | if (dev_priv->num_fire_offsets >= VIA_FIRE_BUF_SIZE) { | ||
546 | DRM_ERROR("Fire offset buffer full.\n"); | ||
547 | ret = 1; | ||
548 | break; | ||
549 | } | ||
550 | dev_priv->fire_offsets[dev_priv->num_fire_offsets++] = buf; | ||
551 | have_fire = 1; | ||
552 | buf++; | ||
553 | if (buf < buf_end && *buf == a_fire) | ||
554 | buf++; | ||
555 | break; | ||
556 | } | ||
557 | if ((*buf == HALCYON_HEADER2) || | ||
558 | ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) { | ||
559 | DRM_ERROR("Missing Vertex Fire command, " | ||
560 | "Stray Vertex Fire command or verifier " | ||
561 | "lost sync.\n"); | ||
562 | ret = 1; | ||
563 | break; | ||
564 | } | ||
565 | if ((ret = eat_words(&buf, buf_end, dw_count))) | ||
566 | break; | ||
567 | } | ||
568 | if (buf >= buf_end && !have_fire) { | ||
569 | DRM_ERROR("Missing Vertex Fire command or verifier " | ||
570 | "lost sync.\n"); | ||
571 | ret = 1; | ||
572 | break; | ||
573 | } | ||
574 | if (cur_seq->agp && ((buf - cur_seq->buf_start) & 0x01)) { | ||
575 | DRM_ERROR("AGP Primitive list end misaligned.\n"); | ||
576 | ret = 1; | ||
577 | break; | ||
578 | } | ||
579 | } | ||
580 | *buffer = buf; | ||
581 | return ret; | ||
582 | } | ||
583 | |||
584 | |||
585 | |||
586 | |||
587 | |||
588 | static __inline__ verifier_state_t | ||
589 | via_check_header2( uint32_t const **buffer, const uint32_t *buf_end, | ||
590 | drm_via_state_t *hc_state) | ||
591 | { | ||
592 | uint32_t cmd; | ||
593 | int hz_mode; | ||
594 | hazard_t hz; | ||
595 | const uint32_t *buf = *buffer; | ||
596 | const hazard_t *hz_table; | ||
597 | |||
598 | |||
599 | if ((buf_end - buf) < 2) { | ||
600 | DRM_ERROR("Illegal termination of DMA HALCYON_HEADER2 sequence.\n"); | ||
601 | return state_error; | ||
602 | } | ||
603 | buf++; | ||
604 | cmd = (*buf++ & 0xFFFF0000) >> 16; | ||
605 | |||
606 | switch(cmd) { | ||
607 | case HC_ParaType_CmdVdata: | ||
608 | if (via_check_prim_list(&buf, buf_end, hc_state )) | ||
609 | return state_error; | ||
610 | *buffer = buf; | ||
611 | return state_command; | ||
612 | case HC_ParaType_NotTex: | ||
613 | hz_table = table1; | ||
614 | break; | ||
615 | case HC_ParaType_Tex: | ||
616 | hc_state->texture = 0; | ||
617 | hz_table = table2; | ||
618 | break; | ||
619 | case (HC_ParaType_Tex | (HC_SubType_Tex1 << 8)): | ||
620 | hc_state->texture = 1; | ||
621 | hz_table = table2; | ||
622 | break; | ||
623 | case (HC_ParaType_Tex | (HC_SubType_TexGeneral << 8)): | ||
624 | hz_table = table3; | ||
625 | break; | ||
626 | case HC_ParaType_Auto: | ||
627 | if (eat_words(&buf, buf_end, 2)) | ||
628 | return state_error; | ||
629 | *buffer = buf; | ||
630 | return state_command; | ||
631 | case (HC_ParaType_Palette | (HC_SubType_Stipple << 8)): | ||
632 | if (eat_words(&buf, buf_end, 32)) | ||
633 | return state_error; | ||
634 | *buffer = buf; | ||
635 | return state_command; | ||
636 | case (HC_ParaType_Palette | (HC_SubType_TexPalette0 << 8)): | ||
637 | case (HC_ParaType_Palette | (HC_SubType_TexPalette1 << 8)): | ||
638 | DRM_ERROR("Texture palettes are rejected because of " | ||
639 | "lack of info how to determine their size.\n"); | ||
640 | return state_error; | ||
641 | case (HC_ParaType_Palette | (HC_SubType_FogTable << 8)): | ||
642 | DRM_ERROR("Fog factor palettes are rejected because of " | ||
643 | "lack of info how to determine their size.\n"); | ||
644 | return state_error; | ||
645 | default: | ||
646 | |||
647 | /* | ||
648 | * There are some unimplemented HC_ParaTypes here, that | ||
649 | * need to be implemented if the Mesa driver is extended. | ||
650 | */ | ||
651 | |||
652 | DRM_ERROR("Invalid or unimplemented HALCYON_HEADER2 " | ||
653 | "DMA subcommand: 0x%x. Previous dword: 0x%x\n", | ||
654 | cmd, *(buf -2)); | ||
655 | *buffer = buf; | ||
656 | return state_error; | ||
657 | } | ||
658 | |||
659 | while(buf < buf_end) { | ||
660 | cmd = *buf++; | ||
661 | if ((hz = hz_table[cmd >> 24])) { | ||
662 | if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) { | ||
663 | if (hz_mode == 1) { | ||
664 | buf--; | ||
665 | break; | ||
666 | } | ||
667 | return state_error; | ||
668 | } | ||
669 | } else if (hc_state->unfinished && | ||
670 | finish_current_sequence(hc_state)) { | ||
671 | return state_error; | ||
672 | } | ||
673 | } | ||
674 | if (hc_state->unfinished && finish_current_sequence(hc_state)) { | ||
675 | return state_error; | ||
676 | } | ||
677 | *buffer = buf; | ||
678 | return state_command; | ||
679 | } | ||
680 | |||
681 | static __inline__ verifier_state_t | ||
682 | via_parse_header2( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end, | ||
683 | int *fire_count) | ||
684 | { | ||
685 | uint32_t cmd; | ||
686 | const uint32_t *buf = *buffer; | ||
687 | const uint32_t *next_fire; | ||
688 | int burst = 0; | ||
689 | |||
690 | next_fire = dev_priv->fire_offsets[*fire_count]; | ||
691 | buf++; | ||
692 | cmd = (*buf & 0xFFFF0000) >> 16; | ||
693 | VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *buf++); | ||
694 | switch(cmd) { | ||
695 | case HC_ParaType_CmdVdata: | ||
696 | while ((buf < buf_end) && | ||
697 | (*fire_count < dev_priv->num_fire_offsets) && | ||
698 | (*buf & HC_ACMD_MASK) == HC_ACMD_HCmdB ) { | ||
699 | while(buf <= next_fire) { | ||
700 | VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + (burst & 63), *buf++); | ||
701 | burst += 4; | ||
702 | } | ||
703 | if ( ( buf < buf_end ) && ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) | ||
704 | buf++; | ||
705 | |||
706 | if (++(*fire_count) < dev_priv->num_fire_offsets) | ||
707 | next_fire = dev_priv->fire_offsets[*fire_count]; | ||
708 | } | ||
709 | break; | ||
710 | default: | ||
711 | while(buf < buf_end) { | ||
712 | |||
713 | if ( *buf == HC_HEADER2 || | ||
714 | (*buf & HALCYON_HEADER1MASK) == HALCYON_HEADER1 || | ||
715 | (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5 || | ||
716 | (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6 ) break; | ||
717 | |||
718 | VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + (burst & 63), *buf++); | ||
719 | burst +=4; | ||
720 | } | ||
721 | } | ||
722 | *buffer = buf; | ||
723 | return state_command; | ||
724 | } | ||
725 | |||
726 | |||
727 | |||
728 | static __inline__ int | ||
729 | verify_mmio_address( uint32_t address) | ||
730 | { | ||
731 | if ((address > 0x3FF) && (address < 0xC00 )) { | ||
732 | DRM_ERROR("Invalid VIDEO DMA command. " | ||
733 | "Attempt to access 3D- or command burst area.\n"); | ||
734 | return 1; | ||
735 | } else if ((address > 0xCFF) && (address < 0x1300)) { | ||
736 | DRM_ERROR("Invalid VIDEO DMA command. " | ||
737 | "Attempt to access PCI DMA area.\n"); | ||
738 | return 1; | ||
739 | } else if (address > 0x13FF ) { | ||
740 | DRM_ERROR("Invalid VIDEO DMA command. " | ||
741 | "Attempt to access VGA registers.\n"); | ||
742 | return 1; | ||
743 | } | ||
744 | return 0; | ||
745 | } | ||
746 | |||
747 | static __inline__ int | ||
748 | verify_video_tail( uint32_t const **buffer, const uint32_t *buf_end, uint32_t dwords) | ||
749 | { | ||
750 | const uint32_t *buf = *buffer; | ||
751 | |||
752 | if (buf_end - buf < dwords) { | ||
753 | DRM_ERROR("Illegal termination of video command.\n"); | ||
754 | return 1; | ||
755 | } | ||
756 | while (dwords--) { | ||
757 | if (*buf++) { | ||
758 | DRM_ERROR("Illegal video command tail.\n"); | ||
759 | return 1; | ||
760 | } | ||
761 | } | ||
762 | *buffer = buf; | ||
763 | return 0; | ||
764 | } | ||
765 | |||
766 | |||
767 | static __inline__ verifier_state_t | ||
768 | via_check_header1( uint32_t const **buffer, const uint32_t *buf_end ) | ||
769 | { | ||
770 | uint32_t cmd; | ||
771 | const uint32_t *buf = *buffer; | ||
772 | verifier_state_t ret = state_command; | ||
773 | |||
774 | while (buf < buf_end) { | ||
775 | cmd = *buf; | ||
776 | if ((cmd > ((0x3FF >> 2) | HALCYON_HEADER1)) && | ||
777 | (cmd < ((0xC00 >> 2) | HALCYON_HEADER1))) { | ||
778 | if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) | ||
779 | break; | ||
780 | DRM_ERROR("Invalid HALCYON_HEADER1 command. " | ||
781 | "Attempt to access 3D- or command burst area.\n"); | ||
782 | ret = state_error; | ||
783 | break; | ||
784 | } else if (cmd > ((0xCFF >> 2) | HALCYON_HEADER1)) { | ||
785 | if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) | ||
786 | break; | ||
787 | DRM_ERROR("Invalid HALCYON_HEADER1 command. " | ||
788 | "Attempt to access VGA registers.\n"); | ||
789 | ret = state_error; | ||
790 | break; | ||
791 | } else { | ||
792 | buf += 2; | ||
793 | } | ||
794 | } | ||
795 | *buffer = buf; | ||
796 | return ret; | ||
797 | } | ||
798 | |||
799 | static __inline__ verifier_state_t | ||
800 | via_parse_header1( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end ) | ||
801 | { | ||
802 | register uint32_t cmd; | ||
803 | const uint32_t *buf = *buffer; | ||
804 | |||
805 | while (buf < buf_end) { | ||
806 | cmd = *buf; | ||
807 | if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) break; | ||
808 | VIA_WRITE( (cmd & ~HALCYON_HEADER1MASK) << 2, *++buf); | ||
809 | buf++; | ||
810 | } | ||
811 | *buffer = buf; | ||
812 | return state_command; | ||
813 | } | ||
814 | |||
815 | static __inline__ verifier_state_t | ||
816 | via_check_vheader5( uint32_t const **buffer, const uint32_t *buf_end ) | ||
817 | { | ||
818 | uint32_t data; | ||
819 | const uint32_t *buf = *buffer; | ||
820 | |||
821 | if (buf_end - buf < 4) { | ||
822 | DRM_ERROR("Illegal termination of video header5 command\n"); | ||
823 | return state_error; | ||
824 | } | ||
825 | |||
826 | data = *buf++ & ~VIA_VIDEOMASK; | ||
827 | if (verify_mmio_address(data)) | ||
828 | return state_error; | ||
829 | |||
830 | data = *buf++; | ||
831 | if (*buf++ != 0x00F50000) { | ||
832 | DRM_ERROR("Illegal header5 header data\n"); | ||
833 | return state_error; | ||
834 | } | ||
835 | if (*buf++ != 0x00000000) { | ||
836 | DRM_ERROR("Illegal header5 header data\n"); | ||
837 | return state_error; | ||
838 | } | ||
839 | if (eat_words(&buf, buf_end, data)) | ||
840 | return state_error; | ||
841 | if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3))) | ||
842 | return state_error; | ||
843 | *buffer = buf; | ||
844 | return state_command; | ||
845 | |||
846 | } | ||
847 | |||
848 | static __inline__ verifier_state_t | ||
849 | via_parse_vheader5( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end ) | ||
850 | { | ||
851 | uint32_t addr, count, i; | ||
852 | const uint32_t *buf = *buffer; | ||
853 | |||
854 | addr = *buf++ & ~VIA_VIDEOMASK; | ||
855 | i = count = *buf; | ||
856 | buf += 3; | ||
857 | while(i--) { | ||
858 | VIA_WRITE(addr, *buf++); | ||
859 | } | ||
860 | if (count & 3) buf += 4 - (count & 3); | ||
861 | *buffer = buf; | ||
862 | return state_command; | ||
863 | } | ||
864 | |||
865 | |||
866 | static __inline__ verifier_state_t | ||
867 | via_check_vheader6( uint32_t const **buffer, const uint32_t *buf_end ) | ||
868 | { | ||
869 | uint32_t data; | ||
870 | const uint32_t *buf = *buffer; | ||
871 | uint32_t i; | ||
872 | |||
873 | |||
874 | if (buf_end - buf < 4) { | ||
875 | DRM_ERROR("Illegal termination of video header6 command\n"); | ||
876 | return state_error; | ||
877 | } | ||
878 | buf++; | ||
879 | data = *buf++; | ||
880 | if (*buf++ != 0x00F60000) { | ||
881 | DRM_ERROR("Illegal header6 header data\n"); | ||
882 | return state_error; | ||
883 | } | ||
884 | if (*buf++ != 0x00000000) { | ||
885 | DRM_ERROR("Illegal header6 header data\n"); | ||
886 | return state_error; | ||
887 | } | ||
888 | if ((buf_end - buf) < (data << 1)) { | ||
889 | DRM_ERROR("Illegal termination of video header6 command\n"); | ||
890 | return state_error; | ||
891 | } | ||
892 | for (i=0; i<data; ++i) { | ||
893 | if (verify_mmio_address(*buf++)) | ||
894 | return state_error; | ||
895 | buf++; | ||
896 | } | ||
897 | data <<= 1; | ||
898 | if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3))) | ||
899 | return state_error; | ||
900 | *buffer = buf; | ||
901 | return state_command; | ||
902 | } | ||
903 | |||
904 | static __inline__ verifier_state_t | ||
905 | via_parse_vheader6( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end ) | ||
906 | { | ||
907 | |||
908 | uint32_t addr, count, i; | ||
909 | const uint32_t *buf = *buffer; | ||
910 | |||
911 | i = count = *++buf; | ||
912 | buf += 3; | ||
913 | while(i--) { | ||
914 | addr = *buf++; | ||
915 | VIA_WRITE(addr, *buf++); | ||
916 | } | ||
917 | count <<= 1; | ||
918 | if (count & 3) buf += 4 - (count & 3); | ||
919 | *buffer = buf; | ||
920 | return state_command; | ||
921 | } | ||
922 | |||
923 | |||
924 | |||
925 | int | ||
926 | via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t *dev, | ||
927 | int agp) | ||
928 | { | ||
929 | |||
930 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
931 | drm_via_state_t *hc_state = &dev_priv->hc_state; | ||
932 | drm_via_state_t saved_state = *hc_state; | ||
933 | uint32_t cmd; | ||
934 | const uint32_t *buf_end = buf + ( size >> 2 ); | ||
935 | verifier_state_t state = state_command; | ||
936 | int pro_group_a = dev_priv->pro_group_a; | ||
937 | |||
938 | hc_state->dev = dev; | ||
939 | hc_state->unfinished = no_sequence; | ||
940 | hc_state->map_cache = NULL; | ||
941 | hc_state->agp = agp; | ||
942 | hc_state->buf_start = buf; | ||
943 | dev_priv->num_fire_offsets = 0; | ||
944 | |||
945 | while (buf < buf_end) { | ||
946 | |||
947 | switch (state) { | ||
948 | case state_header2: | ||
949 | state = via_check_header2( &buf, buf_end, hc_state ); | ||
950 | break; | ||
951 | case state_header1: | ||
952 | state = via_check_header1( &buf, buf_end ); | ||
953 | break; | ||
954 | case state_vheader5: | ||
955 | state = via_check_vheader5( &buf, buf_end ); | ||
956 | break; | ||
957 | case state_vheader6: | ||
958 | state = via_check_vheader6( &buf, buf_end ); | ||
959 | break; | ||
960 | case state_command: | ||
961 | if (HALCYON_HEADER2 == (cmd = *buf)) | ||
962 | state = state_header2; | ||
963 | else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) | ||
964 | state = state_header1; | ||
965 | else if (pro_group_a && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5) | ||
966 | state = state_vheader5; | ||
967 | else if (pro_group_a && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) | ||
968 | state = state_vheader6; | ||
969 | else { | ||
970 | DRM_ERROR("Invalid / Unimplemented DMA HEADER command. 0x%x\n", | ||
971 | cmd); | ||
972 | state = state_error; | ||
973 | } | ||
974 | break; | ||
975 | case state_error: | ||
976 | default: | ||
977 | *hc_state = saved_state; | ||
978 | return DRM_ERR(EINVAL); | ||
979 | } | ||
980 | } | ||
981 | if (state == state_error) { | ||
982 | *hc_state = saved_state; | ||
983 | return DRM_ERR(EINVAL); | ||
984 | } | ||
985 | return 0; | ||
986 | } | ||
987 | |||
988 | int | ||
989 | via_parse_command_stream(drm_device_t *dev, const uint32_t * buf, unsigned int size) | ||
990 | { | ||
991 | |||
992 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
993 | uint32_t cmd; | ||
994 | const uint32_t *buf_end = buf + ( size >> 2 ); | ||
995 | verifier_state_t state = state_command; | ||
996 | int fire_count = 0; | ||
997 | |||
998 | while (buf < buf_end) { | ||
999 | |||
1000 | switch (state) { | ||
1001 | case state_header2: | ||
1002 | state = via_parse_header2( dev_priv, &buf, buf_end, &fire_count ); | ||
1003 | break; | ||
1004 | case state_header1: | ||
1005 | state = via_parse_header1( dev_priv, &buf, buf_end ); | ||
1006 | break; | ||
1007 | case state_vheader5: | ||
1008 | state = via_parse_vheader5( dev_priv, &buf, buf_end ); | ||
1009 | break; | ||
1010 | case state_vheader6: | ||
1011 | state = via_parse_vheader6( dev_priv, &buf, buf_end ); | ||
1012 | break; | ||
1013 | case state_command: | ||
1014 | if (HALCYON_HEADER2 == (cmd = *buf)) | ||
1015 | state = state_header2; | ||
1016 | else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) | ||
1017 | state = state_header1; | ||
1018 | else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5) | ||
1019 | state = state_vheader5; | ||
1020 | else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) | ||
1021 | state = state_vheader6; | ||
1022 | else { | ||
1023 | DRM_ERROR("Invalid / Unimplemented DMA HEADER command. 0x%x\n", | ||
1024 | cmd); | ||
1025 | state = state_error; | ||
1026 | } | ||
1027 | break; | ||
1028 | case state_error: | ||
1029 | default: | ||
1030 | return DRM_ERR(EINVAL); | ||
1031 | } | ||
1032 | } | ||
1033 | if (state == state_error) { | ||
1034 | return DRM_ERR(EINVAL); | ||
1035 | } | ||
1036 | return 0; | ||
1037 | } | ||
1038 | |||
1039 | |||
1040 | |||
1041 | static void | ||
1042 | setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size) | ||
1043 | { | ||
1044 | int i; | ||
1045 | |||
1046 | for(i=0; i<256; ++i) { | ||
1047 | table[i] = forbidden_command; | ||
1048 | } | ||
1049 | |||
1050 | for(i=0; i<size; ++i) { | ||
1051 | table[init_table[i].code] = init_table[i].hz; | ||
1052 | } | ||
1053 | } | ||
1054 | |||
1055 | void | ||
1056 | via_init_command_verifier( void ) | ||
1057 | { | ||
1058 | setup_hazard_table(init_table1, table1, sizeof(init_table1) / sizeof(hz_init_t)); | ||
1059 | setup_hazard_table(init_table2, table2, sizeof(init_table2) / sizeof(hz_init_t)); | ||
1060 | setup_hazard_table(init_table3, table3, sizeof(init_table3) / sizeof(hz_init_t)); | ||
1061 | } | ||
diff --git a/drivers/char/drm/via_verifier.h b/drivers/char/drm/via_verifier.h new file mode 100644 index 000000000000..a8e13592620f --- /dev/null +++ b/drivers/char/drm/via_verifier.h | |||
@@ -0,0 +1,61 @@ | |||
1 | /* | ||
2 | * Copyright 2004 The Unichrome Project. All Rights Reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice (including the | ||
12 | * next paragraph) shall be included in all copies or substantial portions | ||
13 | * of the Software. | ||
14 | * | ||
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
18 | * THE UNICHROME PROJECT, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
21 | * DEALINGS IN THE SOFTWARE. | ||
22 | * | ||
23 | * Author: Thomas Hellström 2004. | ||
24 | */ | ||
25 | |||
26 | #ifndef _VIA_VERIFIER_H_ | ||
27 | #define _VIA_VERIFIER_H_ | ||
28 | |||
29 | typedef enum{ | ||
30 | no_sequence = 0, | ||
31 | z_address, | ||
32 | dest_address, | ||
33 | tex_address | ||
34 | }drm_via_sequence_t; | ||
35 | |||
36 | |||
37 | |||
38 | typedef struct{ | ||
39 | unsigned texture; | ||
40 | uint32_t z_addr; | ||
41 | uint32_t d_addr; | ||
42 | uint32_t t_addr[2][10]; | ||
43 | uint32_t pitch[2][10]; | ||
44 | uint32_t height[2][10]; | ||
45 | uint32_t tex_level_lo[2]; | ||
46 | uint32_t tex_level_hi[2]; | ||
47 | uint32_t tex_palette_size[2]; | ||
48 | drm_via_sequence_t unfinished; | ||
49 | int agp_texture; | ||
50 | int multitex; | ||
51 | drm_device_t *dev; | ||
52 | drm_map_t *map_cache; | ||
53 | uint32_t vertex_count; | ||
54 | int agp; | ||
55 | const uint32_t *buf_start; | ||
56 | } drm_via_state_t; | ||
57 | |||
58 | extern int via_verify_command_stream(const uint32_t * buf, unsigned int size, | ||
59 | drm_device_t *dev, int agp); | ||
60 | |||
61 | #endif | ||
diff --git a/drivers/char/drm/via_video.c b/drivers/char/drm/via_video.c new file mode 100644 index 000000000000..37a61c67b292 --- /dev/null +++ b/drivers/char/drm/via_video.c | |||
@@ -0,0 +1,97 @@ | |||
1 | /* | ||
2 | * Copyright 2005 Thomas Hellstrom. All Rights Reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice (including the | ||
12 | * next paragraph) shall be included in all copies or substantial portions | ||
13 | * of the Software. | ||
14 | * | ||
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
18 | * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
21 | * DEALINGS IN THE SOFTWARE. | ||
22 | * | ||
23 | * Author: Thomas Hellstrom 2005. | ||
24 | * | ||
25 | * Video and XvMC related functions. | ||
26 | */ | ||
27 | |||
28 | #include "drmP.h" | ||
29 | #include "via_drm.h" | ||
30 | #include "via_drv.h" | ||
31 | |||
32 | void | ||
33 | via_init_futex(drm_via_private_t *dev_priv) | ||
34 | { | ||
35 | unsigned int i; | ||
36 | |||
37 | DRM_DEBUG("%s\n", __FUNCTION__); | ||
38 | |||
39 | for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) { | ||
40 | DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i])); | ||
41 | XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0; | ||
42 | } | ||
43 | } | ||
44 | |||
45 | void | ||
46 | via_cleanup_futex(drm_via_private_t *dev_priv) | ||
47 | { | ||
48 | } | ||
49 | |||
50 | void | ||
51 | via_release_futex(drm_via_private_t *dev_priv, int context) | ||
52 | { | ||
53 | unsigned int i; | ||
54 | volatile int *lock; | ||
55 | |||
56 | for (i=0; i < VIA_NR_XVMC_LOCKS; ++i) { | ||
57 | lock = (int *) XVMCLOCKPTR(dev_priv->sarea_priv, i); | ||
58 | if ( (_DRM_LOCKING_CONTEXT( *lock ) == context)) { | ||
59 | if (_DRM_LOCK_IS_HELD( *lock ) && (*lock & _DRM_LOCK_CONT)) { | ||
60 | DRM_WAKEUP( &(dev_priv->decoder_queue[i])); | ||
61 | } | ||
62 | *lock = 0; | ||
63 | } | ||
64 | } | ||
65 | } | ||
66 | |||
67 | int | ||
68 | via_decoder_futex(DRM_IOCTL_ARGS) | ||
69 | { | ||
70 | DRM_DEVICE; | ||
71 | drm_via_futex_t fx; | ||
72 | volatile int *lock; | ||
73 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | ||
74 | drm_via_sarea_t *sAPriv = dev_priv->sarea_priv; | ||
75 | int ret = 0; | ||
76 | |||
77 | DRM_DEBUG("%s\n", __FUNCTION__); | ||
78 | |||
79 | DRM_COPY_FROM_USER_IOCTL(fx, (drm_via_futex_t *) data, sizeof(fx)); | ||
80 | |||
81 | if (fx.lock > VIA_NR_XVMC_LOCKS) | ||
82 | return -EFAULT; | ||
83 | |||
84 | lock = (int *)XVMCLOCKPTR(sAPriv, fx.lock); | ||
85 | |||
86 | switch (fx.func) { | ||
87 | case VIA_FUTEX_WAIT: | ||
88 | DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx.lock], | ||
89 | (fx.ms / 10) * (DRM_HZ / 100), *lock != fx.val); | ||
90 | return ret; | ||
91 | case VIA_FUTEX_WAKE: | ||
92 | DRM_WAKEUP(&(dev_priv->decoder_queue[fx.lock])); | ||
93 | return 0; | ||
94 | } | ||
95 | return 0; | ||
96 | } | ||
97 | |||
diff --git a/drivers/ieee1394/Kconfig b/drivers/ieee1394/Kconfig index 7d58af1ae306..25103a0ef9b3 100644 --- a/drivers/ieee1394/Kconfig +++ b/drivers/ieee1394/Kconfig | |||
@@ -66,6 +66,18 @@ config IEEE1394_CONFIG_ROM_IP1394 | |||
66 | with MacOSX and WinXP IP-over-1394), enable this option and the | 66 | with MacOSX and WinXP IP-over-1394), enable this option and the |
67 | eth1394 option below. | 67 | eth1394 option below. |
68 | 68 | ||
69 | config IEEE1394_EXPORT_FULL_API | ||
70 | bool "Export all symbols of ieee1394's API" | ||
71 | depends on IEEE1394 | ||
72 | default n | ||
73 | help | ||
74 | Export all symbols of ieee1394's driver programming interface, even | ||
75 | those that are not currently used by the standard IEEE 1394 drivers. | ||
76 | |||
77 | This option does not affect the interface to userspace applications. | ||
78 | Say Y here if you want to compile externally developed drivers that | ||
79 | make extended use of ieee1394's API. It is otherwise safe to say N. | ||
80 | |||
69 | comment "Device Drivers" | 81 | comment "Device Drivers" |
70 | depends on IEEE1394 | 82 | depends on IEEE1394 |
71 | 83 | ||
diff --git a/drivers/ieee1394/csr.c b/drivers/ieee1394/csr.c index 1b98684aebcd..149573db91c5 100644 --- a/drivers/ieee1394/csr.c +++ b/drivers/ieee1394/csr.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include "hosts.h" | 28 | #include "hosts.h" |
29 | #include "ieee1394.h" | 29 | #include "ieee1394.h" |
30 | #include "highlevel.h" | 30 | #include "highlevel.h" |
31 | #include "ieee1394_core.h" | ||
31 | 32 | ||
32 | /* Module Parameters */ | 33 | /* Module Parameters */ |
33 | /* this module parameter can be used to disable mapping of the FCP registers */ | 34 | /* this module parameter can be used to disable mapping of the FCP registers */ |
@@ -232,7 +233,7 @@ static void add_host(struct hpsb_host *host) | |||
232 | host->csr.generation = 2; | 233 | host->csr.generation = 2; |
233 | 234 | ||
234 | bus_info[1] = __constant_cpu_to_be32(0x31333934); | 235 | bus_info[1] = __constant_cpu_to_be32(0x31333934); |
235 | bus_info[2] = cpu_to_be32((1 << CSR_IRMC_SHIFT) | | 236 | bus_info[2] = cpu_to_be32((hpsb_disable_irm ? 0 : 1 << CSR_IRMC_SHIFT) | |
236 | (1 << CSR_CMC_SHIFT) | | 237 | (1 << CSR_CMC_SHIFT) | |
237 | (1 << CSR_ISC_SHIFT) | | 238 | (1 << CSR_ISC_SHIFT) | |
238 | (0 << CSR_BMC_SHIFT) | | 239 | (0 << CSR_BMC_SHIFT) | |
diff --git a/drivers/ieee1394/csr1212.c b/drivers/ieee1394/csr1212.c index 7c4330e2e875..61ddd5d37eff 100644 --- a/drivers/ieee1394/csr1212.c +++ b/drivers/ieee1394/csr1212.c | |||
@@ -209,7 +209,15 @@ void csr1212_init_local_csr(struct csr1212_csr *csr, | |||
209 | { | 209 | { |
210 | static const int mr_map[] = { 4, 64, 1024, 0 }; | 210 | static const int mr_map[] = { 4, 64, 1024, 0 }; |
211 | 211 | ||
212 | #ifdef __KERNEL__ | ||
213 | BUG_ON(max_rom & ~0x3); | ||
212 | csr->max_rom = mr_map[max_rom]; | 214 | csr->max_rom = mr_map[max_rom]; |
215 | #else | ||
216 | if (max_rom & ~0x3) /* caller supplied invalid argument */ | ||
217 | csr->max_rom = 0; | ||
218 | else | ||
219 | csr->max_rom = mr_map[max_rom]; | ||
220 | #endif | ||
213 | memcpy(csr->bus_info_data, bus_info_data, csr->bus_info_len); | 221 | memcpy(csr->bus_info_data, bus_info_data, csr->bus_info_len); |
214 | } | 222 | } |
215 | 223 | ||
@@ -533,12 +541,15 @@ struct csr1212_keyval *csr1212_new_icon_descriptor_leaf(u_int32_t version, | |||
533 | static const int pd[4] = { 0, 4, 16, 256 }; | 541 | static const int pd[4] = { 0, 4, 16, 256 }; |
534 | static const int cs[16] = { 4, 2 }; | 542 | static const int cs[16] = { 4, 2 }; |
535 | struct csr1212_keyval *kv; | 543 | struct csr1212_keyval *kv; |
536 | int palette_size = pd[palette_depth] * cs[color_space]; | 544 | int palette_size; |
537 | int pixel_size = (hscan * vscan + 3) & ~0x3; | 545 | int pixel_size = (hscan * vscan + 3) & ~0x3; |
538 | 546 | ||
539 | if ((palette_depth && !palette) || !pixels) | 547 | if (!pixels || (!palette && palette_depth) || |
548 | (palette_depth & ~0x3) || (color_space & ~0xf)) | ||
540 | return NULL; | 549 | return NULL; |
541 | 550 | ||
551 | palette_size = pd[palette_depth] * cs[color_space]; | ||
552 | |||
542 | kv = csr1212_new_descriptor_leaf(1, 0, NULL, | 553 | kv = csr1212_new_descriptor_leaf(1, 0, NULL, |
543 | palette_size + pixel_size + | 554 | palette_size + pixel_size + |
544 | CSR1212_ICON_DESCRIPTOR_LEAF_OVERHEAD); | 555 | CSR1212_ICON_DESCRIPTOR_LEAF_OVERHEAD); |
@@ -760,9 +771,9 @@ static int csr1212_append_new_cache(struct csr1212_csr *csr, size_t romsize) | |||
760 | struct csr1212_csr_rom_cache *cache; | 771 | struct csr1212_csr_rom_cache *cache; |
761 | u_int64_t csr_addr; | 772 | u_int64_t csr_addr; |
762 | 773 | ||
763 | if (!csr || !csr->ops->allocate_addr_range || | 774 | if (!csr || !csr->ops || !csr->ops->allocate_addr_range || |
764 | !csr->ops->release_addr) | 775 | !csr->ops->release_addr || csr->max_rom < 1) |
765 | return CSR1212_ENOMEM; | 776 | return CSR1212_EINVAL; |
766 | 777 | ||
767 | /* ROM size must be a multiple of csr->max_rom */ | 778 | /* ROM size must be a multiple of csr->max_rom */ |
768 | romsize = (romsize + (csr->max_rom - 1)) & ~(csr->max_rom - 1); | 779 | romsize = (romsize + (csr->max_rom - 1)) & ~(csr->max_rom - 1); |
@@ -1145,6 +1156,8 @@ int csr1212_generate_csr_image(struct csr1212_csr *csr) | |||
1145 | 1156 | ||
1146 | /* Make sure the Extended ROM leaf is a multiple of | 1157 | /* Make sure the Extended ROM leaf is a multiple of |
1147 | * max_rom in size. */ | 1158 | * max_rom in size. */ |
1159 | if (csr->max_rom < 1) | ||
1160 | return CSR1212_EINVAL; | ||
1148 | leaf_size = (cache->len + (csr->max_rom - 1)) & | 1161 | leaf_size = (cache->len + (csr->max_rom - 1)) & |
1149 | ~(csr->max_rom - 1); | 1162 | ~(csr->max_rom - 1); |
1150 | 1163 | ||
@@ -1409,7 +1422,7 @@ int _csr1212_read_keyval(struct csr1212_csr *csr, struct csr1212_keyval *kv) | |||
1409 | u_int32_t *cache_ptr; | 1422 | u_int32_t *cache_ptr; |
1410 | u_int16_t kv_len = 0; | 1423 | u_int16_t kv_len = 0; |
1411 | 1424 | ||
1412 | if (!csr || !kv) | 1425 | if (!csr || !kv || csr->max_rom < 1) |
1413 | return CSR1212_EINVAL; | 1426 | return CSR1212_EINVAL; |
1414 | 1427 | ||
1415 | /* First find which cache the data should be in (or go in if not read | 1428 | /* First find which cache the data should be in (or go in if not read |
@@ -1572,7 +1585,7 @@ int csr1212_parse_csr(struct csr1212_csr *csr) | |||
1572 | struct csr1212_dentry *dentry; | 1585 | struct csr1212_dentry *dentry; |
1573 | int ret; | 1586 | int ret; |
1574 | 1587 | ||
1575 | if (!csr || !csr->ops->bus_read) | 1588 | if (!csr || !csr->ops || !csr->ops->bus_read) |
1576 | return CSR1212_EINVAL; | 1589 | return CSR1212_EINVAL; |
1577 | 1590 | ||
1578 | ret = csr1212_parse_bus_info_block(csr); | 1591 | ret = csr1212_parse_bus_info_block(csr); |
@@ -1581,9 +1594,13 @@ int csr1212_parse_csr(struct csr1212_csr *csr) | |||
1581 | 1594 | ||
1582 | if (!csr->ops->get_max_rom) | 1595 | if (!csr->ops->get_max_rom) |
1583 | csr->max_rom = mr_map[0]; /* default value */ | 1596 | csr->max_rom = mr_map[0]; /* default value */ |
1584 | else | 1597 | else { |
1585 | csr->max_rom = mr_map[csr->ops->get_max_rom(csr->bus_info_data, | 1598 | int i = csr->ops->get_max_rom(csr->bus_info_data, |
1586 | csr->private)]; | 1599 | csr->private); |
1600 | if (i & ~0x3) | ||
1601 | return CSR1212_EINVAL; | ||
1602 | csr->max_rom = mr_map[i]; | ||
1603 | } | ||
1587 | 1604 | ||
1588 | csr->cache_head->layout_head = csr->root_kv; | 1605 | csr->cache_head->layout_head = csr->root_kv; |
1589 | csr->cache_head->layout_tail = csr->root_kv; | 1606 | csr->cache_head->layout_tail = csr->root_kv; |
diff --git a/drivers/ieee1394/dma.c b/drivers/ieee1394/dma.c index 758819d1999d..b79ddb43e746 100644 --- a/drivers/ieee1394/dma.c +++ b/drivers/ieee1394/dma.c | |||
@@ -158,7 +158,7 @@ static inline int dma_region_find(struct dma_region *dma, unsigned long offset, | |||
158 | 158 | ||
159 | dma_addr_t dma_region_offset_to_bus(struct dma_region *dma, unsigned long offset) | 159 | dma_addr_t dma_region_offset_to_bus(struct dma_region *dma, unsigned long offset) |
160 | { | 160 | { |
161 | unsigned long rem; | 161 | unsigned long rem = 0; |
162 | 162 | ||
163 | struct scatterlist *sg = &dma->sglist[dma_region_find(dma, offset, &rem)]; | 163 | struct scatterlist *sg = &dma->sglist[dma_region_find(dma, offset, &rem)]; |
164 | return sg_dma_address(sg) + rem; | 164 | return sg_dma_address(sg) + rem; |
diff --git a/drivers/ieee1394/eth1394.c b/drivers/ieee1394/eth1394.c index 654da76bf811..cd53c174ced1 100644 --- a/drivers/ieee1394/eth1394.c +++ b/drivers/ieee1394/eth1394.c | |||
@@ -89,7 +89,7 @@ | |||
89 | #define TRACE() printk(KERN_ERR "%s:%s[%d] ---- TRACE\n", driver_name, __FUNCTION__, __LINE__) | 89 | #define TRACE() printk(KERN_ERR "%s:%s[%d] ---- TRACE\n", driver_name, __FUNCTION__, __LINE__) |
90 | 90 | ||
91 | static char version[] __devinitdata = | 91 | static char version[] __devinitdata = |
92 | "$Rev: 1247 $ Ben Collins <bcollins@debian.org>"; | 92 | "$Rev: 1264 $ Ben Collins <bcollins@debian.org>"; |
93 | 93 | ||
94 | struct fragment_info { | 94 | struct fragment_info { |
95 | struct list_head list; | 95 | struct list_head list; |
@@ -706,7 +706,7 @@ static void ether1394_host_reset (struct hpsb_host *host) | |||
706 | return; | 706 | return; |
707 | 707 | ||
708 | dev = hi->dev; | 708 | dev = hi->dev; |
709 | priv = netdev_priv(dev); | 709 | priv = (struct eth1394_priv *)netdev_priv(dev); |
710 | 710 | ||
711 | /* Reset our private host data, but not our mtu */ | 711 | /* Reset our private host data, but not our mtu */ |
712 | netif_stop_queue (dev); | 712 | netif_stop_queue (dev); |
@@ -1770,7 +1770,7 @@ fail: | |||
1770 | static void ether1394_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | 1770 | static void ether1394_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
1771 | { | 1771 | { |
1772 | strcpy (info->driver, driver_name); | 1772 | strcpy (info->driver, driver_name); |
1773 | strcpy (info->version, "$Rev: 1247 $"); | 1773 | strcpy (info->version, "$Rev: 1264 $"); |
1774 | /* FIXME XXX provide sane businfo */ | 1774 | /* FIXME XXX provide sane businfo */ |
1775 | strcpy (info->bus_info, "ieee1394"); | 1775 | strcpy (info->bus_info, "ieee1394"); |
1776 | } | 1776 | } |
diff --git a/drivers/ieee1394/ieee1394_core.c b/drivers/ieee1394/ieee1394_core.c index 629070b83a33..b248d89de8b4 100644 --- a/drivers/ieee1394/ieee1394_core.c +++ b/drivers/ieee1394/ieee1394_core.c | |||
@@ -52,7 +52,7 @@ | |||
52 | /* | 52 | /* |
53 | * Disable the nodemgr detection and config rom reading functionality. | 53 | * Disable the nodemgr detection and config rom reading functionality. |
54 | */ | 54 | */ |
55 | static int disable_nodemgr = 0; | 55 | static int disable_nodemgr; |
56 | module_param(disable_nodemgr, int, 0444); | 56 | module_param(disable_nodemgr, int, 0444); |
57 | MODULE_PARM_DESC(disable_nodemgr, "Disable nodemgr functionality."); | 57 | MODULE_PARM_DESC(disable_nodemgr, "Disable nodemgr functionality."); |
58 | 58 | ||
@@ -520,6 +520,9 @@ int hpsb_send_packet(struct hpsb_packet *packet) | |||
520 | 520 | ||
521 | if (!packet->no_waiter || packet->expect_response) { | 521 | if (!packet->no_waiter || packet->expect_response) { |
522 | atomic_inc(&packet->refcnt); | 522 | atomic_inc(&packet->refcnt); |
523 | /* Set the initial "sendtime" to 10 seconds from now, to | ||
524 | prevent premature expiry. If a packet takes more than | ||
525 | 10 seconds to hit the wire, we have bigger problems :) */ | ||
523 | packet->sendtime = jiffies + 10 * HZ; | 526 | packet->sendtime = jiffies + 10 * HZ; |
524 | skb_queue_tail(&host->pending_packet_queue, packet->skb); | 527 | skb_queue_tail(&host->pending_packet_queue, packet->skb); |
525 | } | 528 | } |
@@ -1223,9 +1226,7 @@ EXPORT_SYMBOL(hpsb_protocol_class); | |||
1223 | EXPORT_SYMBOL(hpsb_set_packet_complete_task); | 1226 | EXPORT_SYMBOL(hpsb_set_packet_complete_task); |
1224 | EXPORT_SYMBOL(hpsb_alloc_packet); | 1227 | EXPORT_SYMBOL(hpsb_alloc_packet); |
1225 | EXPORT_SYMBOL(hpsb_free_packet); | 1228 | EXPORT_SYMBOL(hpsb_free_packet); |
1226 | EXPORT_SYMBOL(hpsb_send_phy_config); | ||
1227 | EXPORT_SYMBOL(hpsb_send_packet); | 1229 | EXPORT_SYMBOL(hpsb_send_packet); |
1228 | EXPORT_SYMBOL(hpsb_send_packet_and_wait); | ||
1229 | EXPORT_SYMBOL(hpsb_reset_bus); | 1230 | EXPORT_SYMBOL(hpsb_reset_bus); |
1230 | EXPORT_SYMBOL(hpsb_bus_reset); | 1231 | EXPORT_SYMBOL(hpsb_bus_reset); |
1231 | EXPORT_SYMBOL(hpsb_selfid_received); | 1232 | EXPORT_SYMBOL(hpsb_selfid_received); |
@@ -1233,6 +1234,10 @@ EXPORT_SYMBOL(hpsb_selfid_complete); | |||
1233 | EXPORT_SYMBOL(hpsb_packet_sent); | 1234 | EXPORT_SYMBOL(hpsb_packet_sent); |
1234 | EXPORT_SYMBOL(hpsb_packet_received); | 1235 | EXPORT_SYMBOL(hpsb_packet_received); |
1235 | EXPORT_SYMBOL_GPL(hpsb_disable_irm); | 1236 | EXPORT_SYMBOL_GPL(hpsb_disable_irm); |
1237 | #ifdef CONFIG_IEEE1394_EXPORT_FULL_API | ||
1238 | EXPORT_SYMBOL(hpsb_send_phy_config); | ||
1239 | EXPORT_SYMBOL(hpsb_send_packet_and_wait); | ||
1240 | #endif | ||
1236 | 1241 | ||
1237 | /** ieee1394_transactions.c **/ | 1242 | /** ieee1394_transactions.c **/ |
1238 | EXPORT_SYMBOL(hpsb_get_tlabel); | 1243 | EXPORT_SYMBOL(hpsb_get_tlabel); |
@@ -1262,9 +1267,11 @@ EXPORT_SYMBOL(hpsb_destroy_hostinfo); | |||
1262 | EXPORT_SYMBOL(hpsb_set_hostinfo_key); | 1267 | EXPORT_SYMBOL(hpsb_set_hostinfo_key); |
1263 | EXPORT_SYMBOL(hpsb_get_hostinfo_bykey); | 1268 | EXPORT_SYMBOL(hpsb_get_hostinfo_bykey); |
1264 | EXPORT_SYMBOL(hpsb_set_hostinfo); | 1269 | EXPORT_SYMBOL(hpsb_set_hostinfo); |
1270 | EXPORT_SYMBOL(highlevel_host_reset); | ||
1271 | #ifdef CONFIG_IEEE1394_EXPORT_FULL_API | ||
1265 | EXPORT_SYMBOL(highlevel_add_host); | 1272 | EXPORT_SYMBOL(highlevel_add_host); |
1266 | EXPORT_SYMBOL(highlevel_remove_host); | 1273 | EXPORT_SYMBOL(highlevel_remove_host); |
1267 | EXPORT_SYMBOL(highlevel_host_reset); | 1274 | #endif |
1268 | 1275 | ||
1269 | /** nodemgr.c **/ | 1276 | /** nodemgr.c **/ |
1270 | EXPORT_SYMBOL(hpsb_node_fill_packet); | 1277 | EXPORT_SYMBOL(hpsb_node_fill_packet); |
@@ -1272,7 +1279,9 @@ EXPORT_SYMBOL(hpsb_node_write); | |||
1272 | EXPORT_SYMBOL(hpsb_register_protocol); | 1279 | EXPORT_SYMBOL(hpsb_register_protocol); |
1273 | EXPORT_SYMBOL(hpsb_unregister_protocol); | 1280 | EXPORT_SYMBOL(hpsb_unregister_protocol); |
1274 | EXPORT_SYMBOL(ieee1394_bus_type); | 1281 | EXPORT_SYMBOL(ieee1394_bus_type); |
1282 | #ifdef CONFIG_IEEE1394_EXPORT_FULL_API | ||
1275 | EXPORT_SYMBOL(nodemgr_for_each_host); | 1283 | EXPORT_SYMBOL(nodemgr_for_each_host); |
1284 | #endif | ||
1276 | 1285 | ||
1277 | /** csr.c **/ | 1286 | /** csr.c **/ |
1278 | EXPORT_SYMBOL(hpsb_update_config_rom); | 1287 | EXPORT_SYMBOL(hpsb_update_config_rom); |
@@ -1309,19 +1318,21 @@ EXPORT_SYMBOL(hpsb_iso_wake); | |||
1309 | EXPORT_SYMBOL(hpsb_iso_recv_flush); | 1318 | EXPORT_SYMBOL(hpsb_iso_recv_flush); |
1310 | 1319 | ||
1311 | /** csr1212.c **/ | 1320 | /** csr1212.c **/ |
1312 | EXPORT_SYMBOL(csr1212_create_csr); | ||
1313 | EXPORT_SYMBOL(csr1212_init_local_csr); | ||
1314 | EXPORT_SYMBOL(csr1212_new_immediate); | ||
1315 | EXPORT_SYMBOL(csr1212_new_directory); | 1321 | EXPORT_SYMBOL(csr1212_new_directory); |
1316 | EXPORT_SYMBOL(csr1212_associate_keyval); | ||
1317 | EXPORT_SYMBOL(csr1212_attach_keyval_to_directory); | 1322 | EXPORT_SYMBOL(csr1212_attach_keyval_to_directory); |
1318 | EXPORT_SYMBOL(csr1212_new_string_descriptor_leaf); | ||
1319 | EXPORT_SYMBOL(csr1212_detach_keyval_from_directory); | 1323 | EXPORT_SYMBOL(csr1212_detach_keyval_from_directory); |
1320 | EXPORT_SYMBOL(csr1212_release_keyval); | 1324 | EXPORT_SYMBOL(csr1212_release_keyval); |
1321 | EXPORT_SYMBOL(csr1212_destroy_csr); | ||
1322 | EXPORT_SYMBOL(csr1212_read); | 1325 | EXPORT_SYMBOL(csr1212_read); |
1323 | EXPORT_SYMBOL(csr1212_generate_csr_image); | ||
1324 | EXPORT_SYMBOL(csr1212_parse_keyval); | 1326 | EXPORT_SYMBOL(csr1212_parse_keyval); |
1325 | EXPORT_SYMBOL(csr1212_parse_csr); | ||
1326 | EXPORT_SYMBOL(_csr1212_read_keyval); | 1327 | EXPORT_SYMBOL(_csr1212_read_keyval); |
1327 | EXPORT_SYMBOL(_csr1212_destroy_keyval); | 1328 | EXPORT_SYMBOL(_csr1212_destroy_keyval); |
1329 | #ifdef CONFIG_IEEE1394_EXPORT_FULL_API | ||
1330 | EXPORT_SYMBOL(csr1212_create_csr); | ||
1331 | EXPORT_SYMBOL(csr1212_init_local_csr); | ||
1332 | EXPORT_SYMBOL(csr1212_new_immediate); | ||
1333 | EXPORT_SYMBOL(csr1212_associate_keyval); | ||
1334 | EXPORT_SYMBOL(csr1212_new_string_descriptor_leaf); | ||
1335 | EXPORT_SYMBOL(csr1212_destroy_csr); | ||
1336 | EXPORT_SYMBOL(csr1212_generate_csr_image); | ||
1337 | EXPORT_SYMBOL(csr1212_parse_csr); | ||
1338 | #endif | ||
diff --git a/drivers/ieee1394/iso.c b/drivers/ieee1394/iso.c index f05759107f7e..615541b8b90f 100644 --- a/drivers/ieee1394/iso.c +++ b/drivers/ieee1394/iso.c | |||
@@ -62,10 +62,10 @@ static struct hpsb_iso* hpsb_iso_common_init(struct hpsb_host *host, enum hpsb_i | |||
62 | if ((dma_mode < HPSB_ISO_DMA_DEFAULT) || (dma_mode > HPSB_ISO_DMA_PACKET_PER_BUFFER)) | 62 | if ((dma_mode < HPSB_ISO_DMA_DEFAULT) || (dma_mode > HPSB_ISO_DMA_PACKET_PER_BUFFER)) |
63 | dma_mode=HPSB_ISO_DMA_DEFAULT; | 63 | dma_mode=HPSB_ISO_DMA_DEFAULT; |
64 | 64 | ||
65 | if ((irq_interval < 0) || (irq_interval > buf_packets / 4)) | ||
66 | irq_interval = buf_packets / 4; | ||
65 | if (irq_interval == 0) /* really interrupt for each packet*/ | 67 | if (irq_interval == 0) /* really interrupt for each packet*/ |
66 | irq_interval = 1; | 68 | irq_interval = 1; |
67 | else if ((irq_interval < 0) || (irq_interval > buf_packets / 4)) | ||
68 | irq_interval = buf_packets / 4; | ||
69 | 69 | ||
70 | if (channel < -1 || channel >= 64) | 70 | if (channel < -1 || channel >= 64) |
71 | return NULL; | 71 | return NULL; |
@@ -106,6 +106,7 @@ static struct hpsb_iso* hpsb_iso_common_init(struct hpsb_host *host, enum hpsb_i | |||
106 | } | 106 | } |
107 | 107 | ||
108 | atomic_set(&iso->overflows, 0); | 108 | atomic_set(&iso->overflows, 0); |
109 | iso->bytes_discarded = 0; | ||
109 | iso->flags = 0; | 110 | iso->flags = 0; |
110 | iso->prebuffer = 0; | 111 | iso->prebuffer = 0; |
111 | 112 | ||
@@ -241,12 +242,12 @@ int hpsb_iso_xmit_start(struct hpsb_iso *iso, int cycle, int prebuffer) | |||
241 | iso->xmit_cycle = cycle; | 242 | iso->xmit_cycle = cycle; |
242 | 243 | ||
243 | if (prebuffer < 0) | 244 | if (prebuffer < 0) |
244 | prebuffer = iso->buf_packets; | 245 | prebuffer = iso->buf_packets - 1; |
245 | else if (prebuffer == 0) | 246 | else if (prebuffer == 0) |
246 | prebuffer = 1; | 247 | prebuffer = 1; |
247 | 248 | ||
248 | if (prebuffer > iso->buf_packets) | 249 | if (prebuffer >= iso->buf_packets) |
249 | prebuffer = iso->buf_packets; | 250 | prebuffer = iso->buf_packets - 1; |
250 | 251 | ||
251 | iso->prebuffer = prebuffer; | 252 | iso->prebuffer = prebuffer; |
252 | 253 | ||
@@ -395,7 +396,7 @@ void hpsb_iso_packet_sent(struct hpsb_iso *iso, int cycle, int error) | |||
395 | } | 396 | } |
396 | 397 | ||
397 | void hpsb_iso_packet_received(struct hpsb_iso *iso, u32 offset, u16 len, | 398 | void hpsb_iso_packet_received(struct hpsb_iso *iso, u32 offset, u16 len, |
398 | u16 cycle, u8 channel, u8 tag, u8 sy) | 399 | u16 total_len, u16 cycle, u8 channel, u8 tag, u8 sy) |
399 | { | 400 | { |
400 | unsigned long flags; | 401 | unsigned long flags; |
401 | spin_lock_irqsave(&iso->lock, flags); | 402 | spin_lock_irqsave(&iso->lock, flags); |
@@ -403,10 +404,13 @@ void hpsb_iso_packet_received(struct hpsb_iso *iso, u32 offset, u16 len, | |||
403 | if (iso->n_ready_packets == iso->buf_packets) { | 404 | if (iso->n_ready_packets == iso->buf_packets) { |
404 | /* overflow! */ | 405 | /* overflow! */ |
405 | atomic_inc(&iso->overflows); | 406 | atomic_inc(&iso->overflows); |
407 | /* Record size of this discarded packet */ | ||
408 | iso->bytes_discarded += total_len; | ||
406 | } else { | 409 | } else { |
407 | struct hpsb_iso_packet_info *info = &iso->infos[iso->pkt_dma]; | 410 | struct hpsb_iso_packet_info *info = &iso->infos[iso->pkt_dma]; |
408 | info->offset = offset; | 411 | info->offset = offset; |
409 | info->len = len; | 412 | info->len = len; |
413 | info->total_len = total_len; | ||
410 | info->cycle = cycle; | 414 | info->cycle = cycle; |
411 | info->channel = channel; | 415 | info->channel = channel; |
412 | info->tag = tag; | 416 | info->tag = tag; |
@@ -437,6 +441,17 @@ int hpsb_iso_recv_release_packets(struct hpsb_iso *iso, unsigned int n_packets) | |||
437 | 441 | ||
438 | iso->first_packet = (iso->first_packet+1) % iso->buf_packets; | 442 | iso->first_packet = (iso->first_packet+1) % iso->buf_packets; |
439 | iso->n_ready_packets--; | 443 | iso->n_ready_packets--; |
444 | |||
445 | /* release memory from packets discarded when queue was full */ | ||
446 | if (iso->n_ready_packets == 0) { /* Release only after all prior packets handled */ | ||
447 | if (iso->bytes_discarded != 0) { | ||
448 | struct hpsb_iso_packet_info inf; | ||
449 | inf.total_len = iso->bytes_discarded; | ||
450 | iso->host->driver->isoctl(iso, RECV_RELEASE, | ||
451 | (unsigned long) &inf); | ||
452 | iso->bytes_discarded = 0; | ||
453 | } | ||
454 | } | ||
440 | } | 455 | } |
441 | spin_unlock_irqrestore(&iso->lock, flags); | 456 | spin_unlock_irqrestore(&iso->lock, flags); |
442 | return rv; | 457 | return rv; |
diff --git a/drivers/ieee1394/iso.h b/drivers/ieee1394/iso.h index fb654d9639a7..3efc60b33a88 100644 --- a/drivers/ieee1394/iso.h +++ b/drivers/ieee1394/iso.h | |||
@@ -47,6 +47,14 @@ struct hpsb_iso_packet_info { | |||
47 | /* 2-bit 'tag' and 4-bit 'sy' fields of the isochronous header */ | 47 | /* 2-bit 'tag' and 4-bit 'sy' fields of the isochronous header */ |
48 | __u8 tag; | 48 | __u8 tag; |
49 | __u8 sy; | 49 | __u8 sy; |
50 | |||
51 | /* | ||
52 | * length in bytes of the packet including header/trailer. | ||
53 | * MUST be at structure end, since the first part of this structure is also | ||
54 | * defined in raw1394.h (i.e. struct raw1394_iso_packet_info), is copied to | ||
55 | * userspace and is accessed there through libraw1394. | ||
56 | */ | ||
57 | __u16 total_len; | ||
50 | }; | 58 | }; |
51 | 59 | ||
52 | enum hpsb_iso_type { HPSB_ISO_RECV = 0, HPSB_ISO_XMIT = 1 }; | 60 | enum hpsb_iso_type { HPSB_ISO_RECV = 0, HPSB_ISO_XMIT = 1 }; |
@@ -111,6 +119,9 @@ struct hpsb_iso { | |||
111 | /* how many times the buffer has overflowed or underflowed */ | 119 | /* how many times the buffer has overflowed or underflowed */ |
112 | atomic_t overflows; | 120 | atomic_t overflows; |
113 | 121 | ||
122 | /* Current number of bytes lost in discarded packets */ | ||
123 | int bytes_discarded; | ||
124 | |||
114 | /* private flags to track initialization progress */ | 125 | /* private flags to track initialization progress */ |
115 | #define HPSB_ISO_DRIVER_INIT (1<<0) | 126 | #define HPSB_ISO_DRIVER_INIT (1<<0) |
116 | #define HPSB_ISO_DRIVER_STARTED (1<<1) | 127 | #define HPSB_ISO_DRIVER_STARTED (1<<1) |
@@ -193,7 +204,7 @@ void hpsb_iso_packet_sent(struct hpsb_iso *iso, int cycle, int error); | |||
193 | 204 | ||
194 | /* call after a packet has been received (interrupt context OK) */ | 205 | /* call after a packet has been received (interrupt context OK) */ |
195 | void hpsb_iso_packet_received(struct hpsb_iso *iso, u32 offset, u16 len, | 206 | void hpsb_iso_packet_received(struct hpsb_iso *iso, u32 offset, u16 len, |
196 | u16 cycle, u8 channel, u8 tag, u8 sy); | 207 | u16 total_len, u16 cycle, u8 channel, u8 tag, u8 sy); |
197 | 208 | ||
198 | /* call to wake waiting processes after buffer space has opened up. */ | 209 | /* call to wake waiting processes after buffer space has opened up. */ |
199 | void hpsb_iso_wake(struct hpsb_iso *iso); | 210 | void hpsb_iso_wake(struct hpsb_iso *iso); |
diff --git a/drivers/ieee1394/nodemgr.c b/drivers/ieee1394/nodemgr.c index 9a46c3b44bf8..bebcc47ab06c 100644 --- a/drivers/ieee1394/nodemgr.c +++ b/drivers/ieee1394/nodemgr.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #include "csr.h" | 30 | #include "csr.h" |
31 | #include "nodemgr.h" | 31 | #include "nodemgr.h" |
32 | 32 | ||
33 | static int ignore_drivers = 0; | 33 | static int ignore_drivers; |
34 | module_param(ignore_drivers, int, 0444); | 34 | module_param(ignore_drivers, int, 0444); |
35 | MODULE_PARM_DESC(ignore_drivers, "Disable automatic probing for drivers."); | 35 | MODULE_PARM_DESC(ignore_drivers, "Disable automatic probing for drivers."); |
36 | 36 | ||
diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c index b3d3d22fde64..a485f47bb21e 100644 --- a/drivers/ieee1394/ohci1394.c +++ b/drivers/ieee1394/ohci1394.c | |||
@@ -162,7 +162,7 @@ printk(level "%s: " fmt "\n" , OHCI1394_DRIVER_NAME , ## args) | |||
162 | printk(level "%s: fw-host%d: " fmt "\n" , OHCI1394_DRIVER_NAME, ohci->host->id , ## args) | 162 | printk(level "%s: fw-host%d: " fmt "\n" , OHCI1394_DRIVER_NAME, ohci->host->id , ## args) |
163 | 163 | ||
164 | static char version[] __devinitdata = | 164 | static char version[] __devinitdata = |
165 | "$Rev: 1250 $ Ben Collins <bcollins@debian.org>"; | 165 | "$Rev: 1299 $ Ben Collins <bcollins@debian.org>"; |
166 | 166 | ||
167 | /* Module Parameters */ | 167 | /* Module Parameters */ |
168 | static int phys_dma = 1; | 168 | static int phys_dma = 1; |
@@ -483,7 +483,9 @@ static void ohci_initialize(struct ti_ohci *ohci) | |||
483 | /* Put some defaults to these undefined bus options */ | 483 | /* Put some defaults to these undefined bus options */ |
484 | buf = reg_read(ohci, OHCI1394_BusOptions); | 484 | buf = reg_read(ohci, OHCI1394_BusOptions); |
485 | buf |= 0x60000000; /* Enable CMC and ISC */ | 485 | buf |= 0x60000000; /* Enable CMC and ISC */ |
486 | if (!hpsb_disable_irm) | 486 | if (hpsb_disable_irm) |
487 | buf &= ~0x80000000; | ||
488 | else | ||
487 | buf |= 0x80000000; /* Enable IRMC */ | 489 | buf |= 0x80000000; /* Enable IRMC */ |
488 | buf &= ~0x00ff0000; /* XXX: Set cyc_clk_acc to zero for now */ | 490 | buf &= ~0x00ff0000; /* XXX: Set cyc_clk_acc to zero for now */ |
489 | buf &= ~0x18000000; /* Disable PMC and BMC */ | 491 | buf &= ~0x18000000; /* Disable PMC and BMC */ |
@@ -503,8 +505,12 @@ static void ohci_initialize(struct ti_ohci *ohci) | |||
503 | reg_write(ohci, OHCI1394_LinkControlSet, | 505 | reg_write(ohci, OHCI1394_LinkControlSet, |
504 | OHCI1394_LinkControl_CycleTimerEnable | | 506 | OHCI1394_LinkControl_CycleTimerEnable | |
505 | OHCI1394_LinkControl_CycleMaster); | 507 | OHCI1394_LinkControl_CycleMaster); |
506 | set_phy_reg_mask(ohci, 4, PHY_04_LCTRL | | 508 | i = get_phy_reg(ohci, 4) | PHY_04_LCTRL; |
507 | (hpsb_disable_irm ? 0 : PHY_04_CONTENDER)); | 509 | if (hpsb_disable_irm) |
510 | i &= ~PHY_04_CONTENDER; | ||
511 | else | ||
512 | i |= PHY_04_CONTENDER; | ||
513 | set_phy_reg(ohci, 4, i); | ||
508 | 514 | ||
509 | /* Set up self-id dma buffer */ | 515 | /* Set up self-id dma buffer */ |
510 | reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->selfid_buf_bus); | 516 | reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->selfid_buf_bus); |
@@ -1566,6 +1572,10 @@ static void ohci_iso_recv_release_block(struct ohci_iso_recv *recv, int block) | |||
1566 | 1572 | ||
1567 | struct dma_cmd *next = &recv->block[next_i]; | 1573 | struct dma_cmd *next = &recv->block[next_i]; |
1568 | struct dma_cmd *prev = &recv->block[prev_i]; | 1574 | struct dma_cmd *prev = &recv->block[prev_i]; |
1575 | |||
1576 | /* ignore out-of-range requests */ | ||
1577 | if ((block < 0) || (block > recv->nblocks)) | ||
1578 | return; | ||
1569 | 1579 | ||
1570 | /* 'next' becomes the new end of the DMA chain, | 1580 | /* 'next' becomes the new end of the DMA chain, |
1571 | so disable branch and enable interrupt */ | 1581 | so disable branch and enable interrupt */ |
@@ -1593,19 +1603,8 @@ static void ohci_iso_recv_release_block(struct ohci_iso_recv *recv, int block) | |||
1593 | static void ohci_iso_recv_bufferfill_release(struct ohci_iso_recv *recv, | 1603 | static void ohci_iso_recv_bufferfill_release(struct ohci_iso_recv *recv, |
1594 | struct hpsb_iso_packet_info *info) | 1604 | struct hpsb_iso_packet_info *info) |
1595 | { | 1605 | { |
1596 | int len; | ||
1597 | |||
1598 | /* release the memory where the packet was */ | 1606 | /* release the memory where the packet was */ |
1599 | len = info->len; | 1607 | recv->released_bytes += info->total_len; |
1600 | |||
1601 | /* add the wasted space for padding to 4 bytes */ | ||
1602 | if (len % 4) | ||
1603 | len += 4 - (len % 4); | ||
1604 | |||
1605 | /* add 8 bytes for the OHCI DMA data format overhead */ | ||
1606 | len += 8; | ||
1607 | |||
1608 | recv->released_bytes += len; | ||
1609 | 1608 | ||
1610 | /* have we released enough memory for one block? */ | 1609 | /* have we released enough memory for one block? */ |
1611 | while (recv->released_bytes > recv->buf_stride) { | 1610 | while (recv->released_bytes > recv->buf_stride) { |
@@ -1637,7 +1636,7 @@ static void ohci_iso_recv_bufferfill_parse(struct hpsb_iso *iso, struct ohci_iso | |||
1637 | /* note: packet layout is as shown in section 10.6.1.1 of the OHCI spec */ | 1636 | /* note: packet layout is as shown in section 10.6.1.1 of the OHCI spec */ |
1638 | 1637 | ||
1639 | unsigned int offset; | 1638 | unsigned int offset; |
1640 | unsigned short len, cycle; | 1639 | unsigned short len, cycle, total_len; |
1641 | unsigned char channel, tag, sy; | 1640 | unsigned char channel, tag, sy; |
1642 | 1641 | ||
1643 | unsigned char *p = iso->data_buf.kvirt; | 1642 | unsigned char *p = iso->data_buf.kvirt; |
@@ -1688,9 +1687,11 @@ static void ohci_iso_recv_bufferfill_parse(struct hpsb_iso *iso, struct ohci_iso | |||
1688 | /* advance to xferStatus/timeStamp */ | 1687 | /* advance to xferStatus/timeStamp */ |
1689 | recv->dma_offset += len; | 1688 | recv->dma_offset += len; |
1690 | 1689 | ||
1690 | total_len = len + 8; /* 8 bytes header+trailer in OHCI packet */ | ||
1691 | /* payload is padded to 4 bytes */ | 1691 | /* payload is padded to 4 bytes */ |
1692 | if (len % 4) { | 1692 | if (len % 4) { |
1693 | recv->dma_offset += 4 - (len%4); | 1693 | recv->dma_offset += 4 - (len%4); |
1694 | total_len += 4 - (len%4); | ||
1694 | } | 1695 | } |
1695 | 1696 | ||
1696 | /* check for wrap-around */ | 1697 | /* check for wrap-around */ |
@@ -1724,7 +1725,7 @@ static void ohci_iso_recv_bufferfill_parse(struct hpsb_iso *iso, struct ohci_iso | |||
1724 | recv->dma_offset -= recv->buf_stride*recv->nblocks; | 1725 | recv->dma_offset -= recv->buf_stride*recv->nblocks; |
1725 | } | 1726 | } |
1726 | 1727 | ||
1727 | hpsb_iso_packet_received(iso, offset, len, cycle, channel, tag, sy); | 1728 | hpsb_iso_packet_received(iso, offset, len, total_len, cycle, channel, tag, sy); |
1728 | } | 1729 | } |
1729 | 1730 | ||
1730 | if (wake) | 1731 | if (wake) |
@@ -1850,7 +1851,8 @@ static void ohci_iso_recv_packetperbuf_task(struct hpsb_iso *iso, struct ohci_is | |||
1850 | tag = hdr[5] >> 6; | 1851 | tag = hdr[5] >> 6; |
1851 | sy = hdr[4] & 0xF; | 1852 | sy = hdr[4] & 0xF; |
1852 | 1853 | ||
1853 | hpsb_iso_packet_received(iso, offset, packet_len, cycle, channel, tag, sy); | 1854 | hpsb_iso_packet_received(iso, offset, packet_len, |
1855 | recv->buf_stride, cycle, channel, tag, sy); | ||
1854 | } | 1856 | } |
1855 | 1857 | ||
1856 | /* reset the DMA descriptor */ | 1858 | /* reset the DMA descriptor */ |
diff --git a/drivers/ieee1394/pcilynx.c b/drivers/ieee1394/pcilynx.c index bdb3a85cafa6..36074e6eeebb 100644 --- a/drivers/ieee1394/pcilynx.c +++ b/drivers/ieee1394/pcilynx.c | |||
@@ -76,7 +76,7 @@ | |||
76 | 76 | ||
77 | 77 | ||
78 | /* Module Parameters */ | 78 | /* Module Parameters */ |
79 | static int skip_eeprom = 0; | 79 | static int skip_eeprom; |
80 | module_param(skip_eeprom, int, 0444); | 80 | module_param(skip_eeprom, int, 0444); |
81 | MODULE_PARM_DESC(skip_eeprom, "Use generic bus info block instead of serial eeprom (default = 0)."); | 81 | MODULE_PARM_DESC(skip_eeprom, "Use generic bus info block instead of serial eeprom (default = 0)."); |
82 | 82 | ||
@@ -1422,7 +1422,7 @@ static int __devinit add_card(struct pci_dev *dev, | |||
1422 | i = get_phy_reg(lynx, 4); | 1422 | i = get_phy_reg(lynx, 4); |
1423 | i |= PHY_04_LCTRL; | 1423 | i |= PHY_04_LCTRL; |
1424 | if (hpsb_disable_irm) | 1424 | if (hpsb_disable_irm) |
1425 | i &= !PHY_04_CONTENDER; | 1425 | i &= ~PHY_04_CONTENDER; |
1426 | else | 1426 | else |
1427 | i |= PHY_04_CONTENDER; | 1427 | i |= PHY_04_CONTENDER; |
1428 | if (i != -1) set_phy_reg(lynx, 4, i); | 1428 | if (i != -1) set_phy_reg(lynx, 4, i); |
diff --git a/drivers/ieee1394/raw1394.c b/drivers/ieee1394/raw1394.c index 7419af450bd1..b4fa14793fe5 100644 --- a/drivers/ieee1394/raw1394.c +++ b/drivers/ieee1394/raw1394.c | |||
@@ -98,7 +98,7 @@ static struct hpsb_address_ops arm_ops = { | |||
98 | 98 | ||
99 | static void queue_complete_cb(struct pending_request *req); | 99 | static void queue_complete_cb(struct pending_request *req); |
100 | 100 | ||
101 | static struct pending_request *__alloc_pending_request(int flags) | 101 | static struct pending_request *__alloc_pending_request(unsigned int __nocast flags) |
102 | { | 102 | { |
103 | struct pending_request *req; | 103 | struct pending_request *req; |
104 | 104 | ||
@@ -2506,9 +2506,12 @@ static int raw1394_iso_send_packets(struct file_info *fi, void __user * uaddr) | |||
2506 | if (copy_from_user(&upackets, uaddr, sizeof(upackets))) | 2506 | if (copy_from_user(&upackets, uaddr, sizeof(upackets))) |
2507 | return -EFAULT; | 2507 | return -EFAULT; |
2508 | 2508 | ||
2509 | if (upackets.n_packets > hpsb_iso_n_ready(fi->iso_handle)) | 2509 | if (upackets.n_packets >= fi->iso_handle->buf_packets) |
2510 | return -EINVAL; | 2510 | return -EINVAL; |
2511 | 2511 | ||
2512 | if (upackets.n_packets >= hpsb_iso_n_ready(fi->iso_handle)) | ||
2513 | return -EAGAIN; | ||
2514 | |||
2512 | /* ensure user-supplied buffer is accessible and big enough */ | 2515 | /* ensure user-supplied buffer is accessible and big enough */ |
2513 | if (!access_ok(VERIFY_READ, upackets.infos, | 2516 | if (!access_ok(VERIFY_READ, upackets.infos, |
2514 | upackets.n_packets * | 2517 | upackets.n_packets * |
diff --git a/drivers/ieee1394/sbp2.c b/drivers/ieee1394/sbp2.c index 32368f3428ec..fe3e1703fa61 100644 --- a/drivers/ieee1394/sbp2.c +++ b/drivers/ieee1394/sbp2.c | |||
@@ -81,7 +81,7 @@ | |||
81 | #include "sbp2.h" | 81 | #include "sbp2.h" |
82 | 82 | ||
83 | static char version[] __devinitdata = | 83 | static char version[] __devinitdata = |
84 | "$Rev: 1219 $ Ben Collins <bcollins@debian.org>"; | 84 | "$Rev: 1306 $ Ben Collins <bcollins@debian.org>"; |
85 | 85 | ||
86 | /* | 86 | /* |
87 | * Module load parameter definitions | 87 | * Module load parameter definitions |
@@ -104,7 +104,7 @@ MODULE_PARM_DESC(max_speed, "Force max speed (3 = 800mb, 2 = 400mb default, 1 = | |||
104 | * down to us at a time (debugging). This might be necessary for very | 104 | * down to us at a time (debugging). This might be necessary for very |
105 | * badly behaved sbp2 devices. | 105 | * badly behaved sbp2 devices. |
106 | */ | 106 | */ |
107 | static int serialize_io = 0; | 107 | static int serialize_io; |
108 | module_param(serialize_io, int, 0444); | 108 | module_param(serialize_io, int, 0444); |
109 | MODULE_PARM_DESC(serialize_io, "Serialize all I/O coming down from the scsi drivers (default = 0)"); | 109 | MODULE_PARM_DESC(serialize_io, "Serialize all I/O coming down from the scsi drivers (default = 0)"); |
110 | 110 | ||
@@ -145,7 +145,7 @@ MODULE_PARM_DESC(exclusive_login, "Exclusive login to sbp2 device (default = 1)" | |||
145 | * please submit the logged sbp2_firmware_revision value of this device to | 145 | * please submit the logged sbp2_firmware_revision value of this device to |
146 | * the linux1394-devel mailing list. | 146 | * the linux1394-devel mailing list. |
147 | */ | 147 | */ |
148 | static int force_inquiry_hack = 0; | 148 | static int force_inquiry_hack; |
149 | module_param(force_inquiry_hack, int, 0444); | 149 | module_param(force_inquiry_hack, int, 0444); |
150 | MODULE_PARM_DESC(force_inquiry_hack, "Force SCSI inquiry hack (default = 0)"); | 150 | MODULE_PARM_DESC(force_inquiry_hack, "Force SCSI inquiry hack (default = 0)"); |
151 | 151 | ||
@@ -2112,6 +2112,102 @@ static int sbp2_send_command(struct scsi_id_instance_data *scsi_id, | |||
2112 | */ | 2112 | */ |
2113 | static void sbp2_check_sbp2_command(struct scsi_id_instance_data *scsi_id, unchar *cmd) | 2113 | static void sbp2_check_sbp2_command(struct scsi_id_instance_data *scsi_id, unchar *cmd) |
2114 | { | 2114 | { |
2115 | unchar new_cmd[16]; | ||
2116 | u8 device_type = SBP2_DEVICE_TYPE (scsi_id->sbp2_device_type_and_lun); | ||
2117 | |||
2118 | SBP2_DEBUG("sbp2_check_sbp2_command"); | ||
2119 | |||
2120 | switch (*cmd) { | ||
2121 | |||
2122 | case READ_6: | ||
2123 | |||
2124 | if (sbp2_command_conversion_device_type(device_type)) { | ||
2125 | |||
2126 | SBP2_DEBUG("Convert READ_6 to READ_10"); | ||
2127 | |||
2128 | /* | ||
2129 | * Need to turn read_6 into read_10 | ||
2130 | */ | ||
2131 | new_cmd[0] = 0x28; | ||
2132 | new_cmd[1] = (cmd[1] & 0xe0); | ||
2133 | new_cmd[2] = 0x0; | ||
2134 | new_cmd[3] = (cmd[1] & 0x1f); | ||
2135 | new_cmd[4] = cmd[2]; | ||
2136 | new_cmd[5] = cmd[3]; | ||
2137 | new_cmd[6] = 0x0; | ||
2138 | new_cmd[7] = 0x0; | ||
2139 | new_cmd[8] = cmd[4]; | ||
2140 | new_cmd[9] = cmd[5]; | ||
2141 | |||
2142 | memcpy(cmd, new_cmd, 10); | ||
2143 | |||
2144 | } | ||
2145 | |||
2146 | break; | ||
2147 | |||
2148 | case WRITE_6: | ||
2149 | |||
2150 | if (sbp2_command_conversion_device_type(device_type)) { | ||
2151 | |||
2152 | SBP2_DEBUG("Convert WRITE_6 to WRITE_10"); | ||
2153 | |||
2154 | /* | ||
2155 | * Need to turn write_6 into write_10 | ||
2156 | */ | ||
2157 | new_cmd[0] = 0x2a; | ||
2158 | new_cmd[1] = (cmd[1] & 0xe0); | ||
2159 | new_cmd[2] = 0x0; | ||
2160 | new_cmd[3] = (cmd[1] & 0x1f); | ||
2161 | new_cmd[4] = cmd[2]; | ||
2162 | new_cmd[5] = cmd[3]; | ||
2163 | new_cmd[6] = 0x0; | ||
2164 | new_cmd[7] = 0x0; | ||
2165 | new_cmd[8] = cmd[4]; | ||
2166 | new_cmd[9] = cmd[5]; | ||
2167 | |||
2168 | memcpy(cmd, new_cmd, 10); | ||
2169 | |||
2170 | } | ||
2171 | |||
2172 | break; | ||
2173 | |||
2174 | case MODE_SENSE: | ||
2175 | |||
2176 | if (sbp2_command_conversion_device_type(device_type)) { | ||
2177 | |||
2178 | SBP2_DEBUG("Convert MODE_SENSE_6 to MODE_SENSE_10"); | ||
2179 | |||
2180 | /* | ||
2181 | * Need to turn mode_sense_6 into mode_sense_10 | ||
2182 | */ | ||
2183 | new_cmd[0] = 0x5a; | ||
2184 | new_cmd[1] = cmd[1]; | ||
2185 | new_cmd[2] = cmd[2]; | ||
2186 | new_cmd[3] = 0x0; | ||
2187 | new_cmd[4] = 0x0; | ||
2188 | new_cmd[5] = 0x0; | ||
2189 | new_cmd[6] = 0x0; | ||
2190 | new_cmd[7] = 0x0; | ||
2191 | new_cmd[8] = cmd[4]; | ||
2192 | new_cmd[9] = cmd[5]; | ||
2193 | |||
2194 | memcpy(cmd, new_cmd, 10); | ||
2195 | |||
2196 | } | ||
2197 | |||
2198 | break; | ||
2199 | |||
2200 | case MODE_SELECT: | ||
2201 | |||
2202 | /* | ||
2203 | * TODO. Probably need to change mode select to 10 byte version | ||
2204 | */ | ||
2205 | |||
2206 | default: | ||
2207 | break; | ||
2208 | } | ||
2209 | |||
2210 | return; | ||
2115 | } | 2211 | } |
2116 | 2212 | ||
2117 | /* | 2213 | /* |
@@ -2152,6 +2248,7 @@ static void sbp2_check_sbp2_response(struct scsi_id_instance_data *scsi_id, | |||
2152 | struct scsi_cmnd *SCpnt) | 2248 | struct scsi_cmnd *SCpnt) |
2153 | { | 2249 | { |
2154 | u8 *scsi_buf = SCpnt->request_buffer; | 2250 | u8 *scsi_buf = SCpnt->request_buffer; |
2251 | u8 device_type = SBP2_DEVICE_TYPE (scsi_id->sbp2_device_type_and_lun); | ||
2155 | 2252 | ||
2156 | SBP2_DEBUG("sbp2_check_sbp2_response"); | 2253 | SBP2_DEBUG("sbp2_check_sbp2_response"); |
2157 | 2254 | ||
@@ -2176,6 +2273,14 @@ static void sbp2_check_sbp2_response(struct scsi_id_instance_data *scsi_id, | |||
2176 | } | 2273 | } |
2177 | 2274 | ||
2178 | /* | 2275 | /* |
2276 | * Check for Simple Direct Access Device and change it to TYPE_DISK | ||
2277 | */ | ||
2278 | if ((scsi_buf[0] & 0x1f) == TYPE_RBC) { | ||
2279 | SBP2_DEBUG("Changing TYPE_RBC to TYPE_DISK"); | ||
2280 | scsi_buf[0] &= 0xe0; | ||
2281 | } | ||
2282 | |||
2283 | /* | ||
2179 | * Fix ansi revision and response data format | 2284 | * Fix ansi revision and response data format |
2180 | */ | 2285 | */ |
2181 | scsi_buf[2] |= 2; | 2286 | scsi_buf[2] |= 2; |
@@ -2183,6 +2288,27 @@ static void sbp2_check_sbp2_response(struct scsi_id_instance_data *scsi_id, | |||
2183 | 2288 | ||
2184 | break; | 2289 | break; |
2185 | 2290 | ||
2291 | case MODE_SENSE: | ||
2292 | |||
2293 | if (sbp2_command_conversion_device_type(device_type)) { | ||
2294 | |||
2295 | SBP2_DEBUG("Modify mode sense response (10 byte version)"); | ||
2296 | |||
2297 | scsi_buf[0] = scsi_buf[1]; /* Mode data length */ | ||
2298 | scsi_buf[1] = scsi_buf[2]; /* Medium type */ | ||
2299 | scsi_buf[2] = scsi_buf[3]; /* Device specific parameter */ | ||
2300 | scsi_buf[3] = scsi_buf[7]; /* Block descriptor length */ | ||
2301 | memcpy(scsi_buf + 4, scsi_buf + 8, scsi_buf[0]); | ||
2302 | } | ||
2303 | |||
2304 | break; | ||
2305 | |||
2306 | case MODE_SELECT: | ||
2307 | |||
2308 | /* | ||
2309 | * TODO. Probably need to change mode select to 10 byte version | ||
2310 | */ | ||
2311 | |||
2186 | default: | 2312 | default: |
2187 | break; | 2313 | break; |
2188 | } | 2314 | } |
@@ -2559,8 +2685,7 @@ static void sbp2scsi_complete_command(struct scsi_id_instance_data *scsi_id, | |||
2559 | static int sbp2scsi_slave_configure (struct scsi_device *sdev) | 2685 | static int sbp2scsi_slave_configure (struct scsi_device *sdev) |
2560 | { | 2686 | { |
2561 | blk_queue_dma_alignment(sdev->request_queue, (512 - 1)); | 2687 | blk_queue_dma_alignment(sdev->request_queue, (512 - 1)); |
2562 | sdev->use_10_for_rw = 1; | 2688 | |
2563 | sdev->use_10_for_ms = 1; | ||
2564 | return 0; | 2689 | return 0; |
2565 | } | 2690 | } |
2566 | 2691 | ||
diff --git a/drivers/isdn/hisax/isdnl1.c b/drivers/isdn/hisax/isdnl1.c index ac899503a74f..bab356886483 100644 --- a/drivers/isdn/hisax/isdnl1.c +++ b/drivers/isdn/hisax/isdnl1.c | |||
@@ -279,7 +279,8 @@ BChannel_proc_xmt(struct BCState *bcs) | |||
279 | if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags)) | 279 | if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags)) |
280 | st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); | 280 | st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); |
281 | if (!test_bit(BC_FLG_ACTIV, &bcs->Flag)) { | 281 | if (!test_bit(BC_FLG_ACTIV, &bcs->Flag)) { |
282 | if (!test_bit(BC_FLG_BUSY, &bcs->Flag) && (!skb_queue_len(&bcs->squeue))) { | 282 | if (!test_bit(BC_FLG_BUSY, &bcs->Flag) && |
283 | skb_queue_empty(&bcs->squeue)) { | ||
283 | st->l2.l2l1(st, PH_DEACTIVATE | CONFIRM, NULL); | 284 | st->l2.l2l1(st, PH_DEACTIVATE | CONFIRM, NULL); |
284 | } | 285 | } |
285 | } | 286 | } |
diff --git a/drivers/isdn/hisax/isdnl2.c b/drivers/isdn/hisax/isdnl2.c index 9022583fd6a0..1615c1a76ab8 100644 --- a/drivers/isdn/hisax/isdnl2.c +++ b/drivers/isdn/hisax/isdnl2.c | |||
@@ -108,7 +108,8 @@ static int l2addrsize(struct Layer2 *l2); | |||
108 | static void | 108 | static void |
109 | set_peer_busy(struct Layer2 *l2) { | 109 | set_peer_busy(struct Layer2 *l2) { |
110 | test_and_set_bit(FLG_PEER_BUSY, &l2->flag); | 110 | test_and_set_bit(FLG_PEER_BUSY, &l2->flag); |
111 | if (skb_queue_len(&l2->i_queue) || skb_queue_len(&l2->ui_queue)) | 111 | if (!skb_queue_empty(&l2->i_queue) || |
112 | !skb_queue_empty(&l2->ui_queue)) | ||
112 | test_and_set_bit(FLG_L2BLOCK, &l2->flag); | 113 | test_and_set_bit(FLG_L2BLOCK, &l2->flag); |
113 | } | 114 | } |
114 | 115 | ||
@@ -754,7 +755,7 @@ l2_restart_multi(struct FsmInst *fi, int event, void *arg) | |||
754 | st->l2.l2l3(st, DL_ESTABLISH | INDICATION, NULL); | 755 | st->l2.l2l3(st, DL_ESTABLISH | INDICATION, NULL); |
755 | 756 | ||
756 | if ((ST_L2_7==state) || (ST_L2_8 == state)) | 757 | if ((ST_L2_7==state) || (ST_L2_8 == state)) |
757 | if (skb_queue_len(&st->l2.i_queue) && cansend(st)) | 758 | if (!skb_queue_empty(&st->l2.i_queue) && cansend(st)) |
758 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); | 759 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); |
759 | } | 760 | } |
760 | 761 | ||
@@ -810,7 +811,7 @@ l2_connected(struct FsmInst *fi, int event, void *arg) | |||
810 | if (pr != -1) | 811 | if (pr != -1) |
811 | st->l2.l2l3(st, pr, NULL); | 812 | st->l2.l2l3(st, pr, NULL); |
812 | 813 | ||
813 | if (skb_queue_len(&st->l2.i_queue) && cansend(st)) | 814 | if (!skb_queue_empty(&st->l2.i_queue) && cansend(st)) |
814 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); | 815 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); |
815 | } | 816 | } |
816 | 817 | ||
@@ -1014,7 +1015,7 @@ l2_st7_got_super(struct FsmInst *fi, int event, void *arg) | |||
1014 | if(typ != RR) FsmDelTimer(&st->l2.t203, 9); | 1015 | if(typ != RR) FsmDelTimer(&st->l2.t203, 9); |
1015 | restart_t200(st, 12); | 1016 | restart_t200(st, 12); |
1016 | } | 1017 | } |
1017 | if (skb_queue_len(&st->l2.i_queue) && (typ == RR)) | 1018 | if (!skb_queue_empty(&st->l2.i_queue) && (typ == RR)) |
1018 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); | 1019 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); |
1019 | } else | 1020 | } else |
1020 | nrerrorrecovery(fi); | 1021 | nrerrorrecovery(fi); |
@@ -1120,7 +1121,7 @@ l2_got_iframe(struct FsmInst *fi, int event, void *arg) | |||
1120 | return; | 1121 | return; |
1121 | } | 1122 | } |
1122 | 1123 | ||
1123 | if (skb_queue_len(&st->l2.i_queue) && (fi->state == ST_L2_7)) | 1124 | if (!skb_queue_empty(&st->l2.i_queue) && (fi->state == ST_L2_7)) |
1124 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); | 1125 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); |
1125 | if (test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag)) | 1126 | if (test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag)) |
1126 | enquiry_cr(st, RR, RSP, 0); | 1127 | enquiry_cr(st, RR, RSP, 0); |
@@ -1138,7 +1139,7 @@ l2_got_tei(struct FsmInst *fi, int event, void *arg) | |||
1138 | test_and_set_bit(FLG_L3_INIT, &st->l2.flag); | 1139 | test_and_set_bit(FLG_L3_INIT, &st->l2.flag); |
1139 | } else | 1140 | } else |
1140 | FsmChangeState(fi, ST_L2_4); | 1141 | FsmChangeState(fi, ST_L2_4); |
1141 | if (skb_queue_len(&st->l2.ui_queue)) | 1142 | if (!skb_queue_empty(&st->l2.ui_queue)) |
1142 | tx_ui(st); | 1143 | tx_ui(st); |
1143 | } | 1144 | } |
1144 | 1145 | ||
@@ -1301,7 +1302,7 @@ l2_pull_iqueue(struct FsmInst *fi, int event, void *arg) | |||
1301 | FsmDelTimer(&st->l2.t203, 13); | 1302 | FsmDelTimer(&st->l2.t203, 13); |
1302 | FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 11); | 1303 | FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 11); |
1303 | } | 1304 | } |
1304 | if (skb_queue_len(&l2->i_queue) && cansend(st)) | 1305 | if (!skb_queue_empty(&l2->i_queue) && cansend(st)) |
1305 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); | 1306 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); |
1306 | } | 1307 | } |
1307 | 1308 | ||
@@ -1347,7 +1348,7 @@ l2_st8_got_super(struct FsmInst *fi, int event, void *arg) | |||
1347 | } | 1348 | } |
1348 | invoke_retransmission(st, nr); | 1349 | invoke_retransmission(st, nr); |
1349 | FsmChangeState(fi, ST_L2_7); | 1350 | FsmChangeState(fi, ST_L2_7); |
1350 | if (skb_queue_len(&l2->i_queue) && cansend(st)) | 1351 | if (!skb_queue_empty(&l2->i_queue) && cansend(st)) |
1351 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); | 1352 | st->l2.l2l1(st, PH_PULL | REQUEST, NULL); |
1352 | } else | 1353 | } else |
1353 | nrerrorrecovery(fi); | 1354 | nrerrorrecovery(fi); |
diff --git a/drivers/isdn/hisax/isdnl3.c b/drivers/isdn/hisax/isdnl3.c index abcc9530eb34..c9917cd2132b 100644 --- a/drivers/isdn/hisax/isdnl3.c +++ b/drivers/isdn/hisax/isdnl3.c | |||
@@ -302,7 +302,7 @@ release_l3_process(struct l3_process *p) | |||
302 | !test_bit(FLG_PTP, &p->st->l2.flag)) { | 302 | !test_bit(FLG_PTP, &p->st->l2.flag)) { |
303 | if (p->debug) | 303 | if (p->debug) |
304 | l3_debug(p->st, "release_l3_process: last process"); | 304 | l3_debug(p->st, "release_l3_process: last process"); |
305 | if (!skb_queue_len(&p->st->l3.squeue)) { | 305 | if (skb_queue_empty(&p->st->l3.squeue)) { |
306 | if (p->debug) | 306 | if (p->debug) |
307 | l3_debug(p->st, "release_l3_process: release link"); | 307 | l3_debug(p->st, "release_l3_process: release link"); |
308 | if (p->st->protocol != ISDN_PTYPE_NI1) | 308 | if (p->st->protocol != ISDN_PTYPE_NI1) |
diff --git a/drivers/isdn/i4l/isdn_tty.c b/drivers/isdn/i4l/isdn_tty.c index ad5aa38fb5a6..b37ef1f06b3d 100644 --- a/drivers/isdn/i4l/isdn_tty.c +++ b/drivers/isdn/i4l/isdn_tty.c | |||
@@ -1223,7 +1223,7 @@ isdn_tty_write(struct tty_struct *tty, const u_char * buf, int count) | |||
1223 | total += c; | 1223 | total += c; |
1224 | } | 1224 | } |
1225 | atomic_dec(&info->xmit_lock); | 1225 | atomic_dec(&info->xmit_lock); |
1226 | if ((info->xmit_count) || (skb_queue_len(&info->xmit_queue))) { | 1226 | if ((info->xmit_count) || !skb_queue_empty(&info->xmit_queue)) { |
1227 | if (m->mdmreg[REG_DXMT] & BIT_DXMT) { | 1227 | if (m->mdmreg[REG_DXMT] & BIT_DXMT) { |
1228 | isdn_tty_senddown(info); | 1228 | isdn_tty_senddown(info); |
1229 | isdn_tty_tint(info); | 1229 | isdn_tty_tint(info); |
@@ -1284,7 +1284,7 @@ isdn_tty_flush_chars(struct tty_struct *tty) | |||
1284 | 1284 | ||
1285 | if (isdn_tty_paranoia_check(info, tty->name, "isdn_tty_flush_chars")) | 1285 | if (isdn_tty_paranoia_check(info, tty->name, "isdn_tty_flush_chars")) |
1286 | return; | 1286 | return; |
1287 | if ((info->xmit_count) || (skb_queue_len(&info->xmit_queue))) | 1287 | if ((info->xmit_count) || !skb_queue_empty(&info->xmit_queue)) |
1288 | isdn_timer_ctrl(ISDN_TIMER_MODEMXMIT, 1); | 1288 | isdn_timer_ctrl(ISDN_TIMER_MODEMXMIT, 1); |
1289 | } | 1289 | } |
1290 | 1290 | ||
diff --git a/drivers/isdn/icn/icn.c b/drivers/isdn/icn/icn.c index 9fc0c1e03732..e0d1b01cc74c 100644 --- a/drivers/isdn/icn/icn.c +++ b/drivers/isdn/icn/icn.c | |||
@@ -304,12 +304,12 @@ icn_pollbchan_send(int channel, icn_card * card) | |||
304 | isdn_ctrl cmd; | 304 | isdn_ctrl cmd; |
305 | 305 | ||
306 | if (!(card->sndcount[channel] || card->xskb[channel] || | 306 | if (!(card->sndcount[channel] || card->xskb[channel] || |
307 | skb_queue_len(&card->spqueue[channel]))) | 307 | !skb_queue_empty(&card->spqueue[channel]))) |
308 | return; | 308 | return; |
309 | if (icn_trymaplock_channel(card, mch)) { | 309 | if (icn_trymaplock_channel(card, mch)) { |
310 | while (sbfree && | 310 | while (sbfree && |
311 | (card->sndcount[channel] || | 311 | (card->sndcount[channel] || |
312 | skb_queue_len(&card->spqueue[channel]) || | 312 | !skb_queue_empty(&card->spqueue[channel]) || |
313 | card->xskb[channel])) { | 313 | card->xskb[channel])) { |
314 | spin_lock_irqsave(&card->lock, flags); | 314 | spin_lock_irqsave(&card->lock, flags); |
315 | if (card->xmit_lock[channel]) { | 315 | if (card->xmit_lock[channel]) { |
diff --git a/drivers/net/hamradio/scc.c b/drivers/net/hamradio/scc.c index ece1b1a13186..c27e417f32bf 100644 --- a/drivers/net/hamradio/scc.c +++ b/drivers/net/hamradio/scc.c | |||
@@ -304,7 +304,7 @@ static inline void scc_discard_buffers(struct scc_channel *scc) | |||
304 | scc->tx_buff = NULL; | 304 | scc->tx_buff = NULL; |
305 | } | 305 | } |
306 | 306 | ||
307 | while (skb_queue_len(&scc->tx_queue)) | 307 | while (!skb_queue_empty(&scc->tx_queue)) |
308 | dev_kfree_skb(skb_dequeue(&scc->tx_queue)); | 308 | dev_kfree_skb(skb_dequeue(&scc->tx_queue)); |
309 | 309 | ||
310 | spin_unlock_irqrestore(&scc->lock, flags); | 310 | spin_unlock_irqrestore(&scc->lock, flags); |
@@ -1126,8 +1126,7 @@ static void t_dwait(unsigned long channel) | |||
1126 | 1126 | ||
1127 | if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */ | 1127 | if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */ |
1128 | { | 1128 | { |
1129 | if (skb_queue_len(&scc->tx_queue) == 0) /* nothing to send */ | 1129 | if (skb_queue_empty(&scc->tx_queue)) { /* nothing to send */ |
1130 | { | ||
1131 | scc->stat.tx_state = TXS_IDLE; | 1130 | scc->stat.tx_state = TXS_IDLE; |
1132 | netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */ | 1131 | netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */ |
1133 | return; | 1132 | return; |
diff --git a/drivers/net/ppp_async.c b/drivers/net/ppp_async.c index 5e48b9ab3045..59e8183c639e 100644 --- a/drivers/net/ppp_async.c +++ b/drivers/net/ppp_async.c | |||
@@ -364,7 +364,7 @@ ppp_asynctty_receive(struct tty_struct *tty, const unsigned char *buf, | |||
364 | spin_lock_irqsave(&ap->recv_lock, flags); | 364 | spin_lock_irqsave(&ap->recv_lock, flags); |
365 | ppp_async_input(ap, buf, cflags, count); | 365 | ppp_async_input(ap, buf, cflags, count); |
366 | spin_unlock_irqrestore(&ap->recv_lock, flags); | 366 | spin_unlock_irqrestore(&ap->recv_lock, flags); |
367 | if (skb_queue_len(&ap->rqueue)) | 367 | if (!skb_queue_empty(&ap->rqueue)) |
368 | tasklet_schedule(&ap->tsk); | 368 | tasklet_schedule(&ap->tsk); |
369 | ap_put(ap); | 369 | ap_put(ap); |
370 | if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) | 370 | if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) |
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c index ab726ab43798..a32668e88e09 100644 --- a/drivers/net/ppp_generic.c +++ b/drivers/net/ppp_generic.c | |||
@@ -1237,8 +1237,8 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb) | |||
1237 | pch = list_entry(list, struct channel, clist); | 1237 | pch = list_entry(list, struct channel, clist); |
1238 | navail += pch->avail = (pch->chan != NULL); | 1238 | navail += pch->avail = (pch->chan != NULL); |
1239 | if (pch->avail) { | 1239 | if (pch->avail) { |
1240 | if (skb_queue_len(&pch->file.xq) == 0 | 1240 | if (skb_queue_empty(&pch->file.xq) || |
1241 | || !pch->had_frag) { | 1241 | !pch->had_frag) { |
1242 | pch->avail = 2; | 1242 | pch->avail = 2; |
1243 | ++nfree; | 1243 | ++nfree; |
1244 | } | 1244 | } |
@@ -1374,8 +1374,8 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb) | |||
1374 | 1374 | ||
1375 | /* try to send it down the channel */ | 1375 | /* try to send it down the channel */ |
1376 | chan = pch->chan; | 1376 | chan = pch->chan; |
1377 | if (skb_queue_len(&pch->file.xq) | 1377 | if (!skb_queue_empty(&pch->file.xq) || |
1378 | || !chan->ops->start_xmit(chan, frag)) | 1378 | !chan->ops->start_xmit(chan, frag)) |
1379 | skb_queue_tail(&pch->file.xq, frag); | 1379 | skb_queue_tail(&pch->file.xq, frag); |
1380 | pch->had_frag = 1; | 1380 | pch->had_frag = 1; |
1381 | p += flen; | 1381 | p += flen; |
@@ -1412,7 +1412,7 @@ ppp_channel_push(struct channel *pch) | |||
1412 | 1412 | ||
1413 | spin_lock_bh(&pch->downl); | 1413 | spin_lock_bh(&pch->downl); |
1414 | if (pch->chan != 0) { | 1414 | if (pch->chan != 0) { |
1415 | while (skb_queue_len(&pch->file.xq) > 0) { | 1415 | while (!skb_queue_empty(&pch->file.xq)) { |
1416 | skb = skb_dequeue(&pch->file.xq); | 1416 | skb = skb_dequeue(&pch->file.xq); |
1417 | if (!pch->chan->ops->start_xmit(pch->chan, skb)) { | 1417 | if (!pch->chan->ops->start_xmit(pch->chan, skb)) { |
1418 | /* put the packet back and try again later */ | 1418 | /* put the packet back and try again later */ |
@@ -1426,7 +1426,7 @@ ppp_channel_push(struct channel *pch) | |||
1426 | } | 1426 | } |
1427 | spin_unlock_bh(&pch->downl); | 1427 | spin_unlock_bh(&pch->downl); |
1428 | /* see if there is anything from the attached unit to be sent */ | 1428 | /* see if there is anything from the attached unit to be sent */ |
1429 | if (skb_queue_len(&pch->file.xq) == 0) { | 1429 | if (skb_queue_empty(&pch->file.xq)) { |
1430 | read_lock_bh(&pch->upl); | 1430 | read_lock_bh(&pch->upl); |
1431 | ppp = pch->ppp; | 1431 | ppp = pch->ppp; |
1432 | if (ppp != 0) | 1432 | if (ppp != 0) |
diff --git a/drivers/net/ppp_synctty.c b/drivers/net/ppp_synctty.c index fd9f50180355..4d51c0c8023d 100644 --- a/drivers/net/ppp_synctty.c +++ b/drivers/net/ppp_synctty.c | |||
@@ -406,7 +406,7 @@ ppp_sync_receive(struct tty_struct *tty, const unsigned char *buf, | |||
406 | spin_lock_irqsave(&ap->recv_lock, flags); | 406 | spin_lock_irqsave(&ap->recv_lock, flags); |
407 | ppp_sync_input(ap, buf, cflags, count); | 407 | ppp_sync_input(ap, buf, cflags, count); |
408 | spin_unlock_irqrestore(&ap->recv_lock, flags); | 408 | spin_unlock_irqrestore(&ap->recv_lock, flags); |
409 | if (skb_queue_len(&ap->rqueue)) | 409 | if (!skb_queue_empty(&ap->rqueue)) |
410 | tasklet_schedule(&ap->tsk); | 410 | tasklet_schedule(&ap->tsk); |
411 | sp_put(ap); | 411 | sp_put(ap); |
412 | if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) | 412 | if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) |
diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 7bfee366297b..effab0b9adca 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c | |||
@@ -215,7 +215,7 @@ static unsigned int tun_chr_poll(struct file *file, poll_table * wait) | |||
215 | 215 | ||
216 | poll_wait(file, &tun->read_wait, wait); | 216 | poll_wait(file, &tun->read_wait, wait); |
217 | 217 | ||
218 | if (skb_queue_len(&tun->readq)) | 218 | if (!skb_queue_empty(&tun->readq)) |
219 | mask |= POLLIN | POLLRDNORM; | 219 | mask |= POLLIN | POLLRDNORM; |
220 | 220 | ||
221 | return mask; | 221 | return mask; |
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index c12648d8192b..47f3c5d0203d 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -2374,7 +2374,7 @@ void stop_airo_card( struct net_device *dev, int freeres ) | |||
2374 | /* | 2374 | /* |
2375 | * Clean out tx queue | 2375 | * Clean out tx queue |
2376 | */ | 2376 | */ |
2377 | if (test_bit(FLAG_MPI, &ai->flags) && skb_queue_len (&ai->txq) > 0) { | 2377 | if (test_bit(FLAG_MPI, &ai->flags) && !skb_queue_empty(&ai->txq)) { |
2378 | struct sk_buff *skb = NULL; | 2378 | struct sk_buff *skb = NULL; |
2379 | for (;(skb = skb_dequeue(&ai->txq));) | 2379 | for (;(skb = skb_dequeue(&ai->txq));) |
2380 | dev_kfree_skb(skb); | 2380 | dev_kfree_skb(skb); |
@@ -3287,7 +3287,7 @@ exitrx: | |||
3287 | if (status & EV_TXEXC) | 3287 | if (status & EV_TXEXC) |
3288 | get_tx_error(apriv, -1); | 3288 | get_tx_error(apriv, -1); |
3289 | spin_lock_irqsave(&apriv->aux_lock, flags); | 3289 | spin_lock_irqsave(&apriv->aux_lock, flags); |
3290 | if (skb_queue_len (&apriv->txq)) { | 3290 | if (!skb_queue_empty(&apriv->txq)) { |
3291 | spin_unlock_irqrestore(&apriv->aux_lock,flags); | 3291 | spin_unlock_irqrestore(&apriv->aux_lock,flags); |
3292 | mpi_send_packet (dev); | 3292 | mpi_send_packet (dev); |
3293 | } else { | 3293 | } else { |
diff --git a/drivers/s390/net/claw.c b/drivers/s390/net/claw.c index 60440dbe3a27..24c0af49c25c 100644 --- a/drivers/s390/net/claw.c +++ b/drivers/s390/net/claw.c | |||
@@ -428,7 +428,7 @@ claw_pack_skb(struct claw_privbk *privptr) | |||
428 | new_skb = NULL; /* assume no dice */ | 428 | new_skb = NULL; /* assume no dice */ |
429 | pkt_cnt = 0; | 429 | pkt_cnt = 0; |
430 | CLAW_DBF_TEXT(4,trace,"PackSKBe"); | 430 | CLAW_DBF_TEXT(4,trace,"PackSKBe"); |
431 | if (skb_queue_len(&p_ch->collect_queue) > 0) { | 431 | if (!skb_queue_empty(&p_ch->collect_queue)) { |
432 | /* some data */ | 432 | /* some data */ |
433 | held_skb = skb_dequeue(&p_ch->collect_queue); | 433 | held_skb = skb_dequeue(&p_ch->collect_queue); |
434 | if (p_env->packing != DO_PACKED) | 434 | if (p_env->packing != DO_PACKED) |
@@ -1254,7 +1254,7 @@ claw_write_next ( struct chbk * p_ch ) | |||
1254 | privptr = (struct claw_privbk *) dev->priv; | 1254 | privptr = (struct claw_privbk *) dev->priv; |
1255 | claw_free_wrt_buf( dev ); | 1255 | claw_free_wrt_buf( dev ); |
1256 | if ((privptr->write_free_count > 0) && | 1256 | if ((privptr->write_free_count > 0) && |
1257 | (skb_queue_len(&p_ch->collect_queue) > 0)) { | 1257 | !skb_queue_empty(&p_ch->collect_queue)) { |
1258 | pk_skb = claw_pack_skb(privptr); | 1258 | pk_skb = claw_pack_skb(privptr); |
1259 | while (pk_skb != NULL) { | 1259 | while (pk_skb != NULL) { |
1260 | rc = claw_hw_tx( pk_skb, dev,1); | 1260 | rc = claw_hw_tx( pk_skb, dev,1); |
diff --git a/drivers/s390/net/ctctty.c b/drivers/s390/net/ctctty.c index 3080393e823d..968f2c113efe 100644 --- a/drivers/s390/net/ctctty.c +++ b/drivers/s390/net/ctctty.c | |||
@@ -156,7 +156,7 @@ ctc_tty_readmodem(ctc_tty_info *info) | |||
156 | skb_queue_head(&info->rx_queue, skb); | 156 | skb_queue_head(&info->rx_queue, skb); |
157 | else { | 157 | else { |
158 | kfree_skb(skb); | 158 | kfree_skb(skb); |
159 | ret = skb_queue_len(&info->rx_queue); | 159 | ret = !skb_queue_empty(&info->rx_queue); |
160 | } | 160 | } |
161 | } | 161 | } |
162 | } | 162 | } |
@@ -530,7 +530,7 @@ ctc_tty_write(struct tty_struct *tty, const u_char * buf, int count) | |||
530 | total += c; | 530 | total += c; |
531 | count -= c; | 531 | count -= c; |
532 | } | 532 | } |
533 | if (skb_queue_len(&info->tx_queue)) { | 533 | if (!skb_queue_empty(&info->tx_queue)) { |
534 | info->lsr &= ~UART_LSR_TEMT; | 534 | info->lsr &= ~UART_LSR_TEMT; |
535 | tasklet_schedule(&info->tasklet); | 535 | tasklet_schedule(&info->tasklet); |
536 | } | 536 | } |
@@ -594,7 +594,7 @@ ctc_tty_flush_chars(struct tty_struct *tty) | |||
594 | return; | 594 | return; |
595 | if (ctc_tty_paranoia_check(info, tty->name, "ctc_tty_flush_chars")) | 595 | if (ctc_tty_paranoia_check(info, tty->name, "ctc_tty_flush_chars")) |
596 | return; | 596 | return; |
597 | if (tty->stopped || tty->hw_stopped || (!skb_queue_len(&info->tx_queue))) | 597 | if (tty->stopped || tty->hw_stopped || skb_queue_empty(&info->tx_queue)) |
598 | return; | 598 | return; |
599 | tasklet_schedule(&info->tasklet); | 599 | tasklet_schedule(&info->tasklet); |
600 | } | 600 | } |
diff --git a/drivers/usb/net/usbnet.c b/drivers/usb/net/usbnet.c index 8a945f4f3693..576f3b852fce 100644 --- a/drivers/usb/net/usbnet.c +++ b/drivers/usb/net/usbnet.c | |||
@@ -3227,9 +3227,9 @@ static int usbnet_stop (struct net_device *net) | |||
3227 | temp = unlink_urbs (dev, &dev->txq) + unlink_urbs (dev, &dev->rxq); | 3227 | temp = unlink_urbs (dev, &dev->txq) + unlink_urbs (dev, &dev->rxq); |
3228 | 3228 | ||
3229 | // maybe wait for deletions to finish. | 3229 | // maybe wait for deletions to finish. |
3230 | while (skb_queue_len (&dev->rxq) | 3230 | while (!skb_queue_empty(&dev->rxq) && |
3231 | && skb_queue_len (&dev->txq) | 3231 | !skb_queue_empty(&dev->txq) && |
3232 | && skb_queue_len (&dev->done)) { | 3232 | !skb_queue_empty(&dev->done)) { |
3233 | msleep(UNLINK_TIMEOUT_MS); | 3233 | msleep(UNLINK_TIMEOUT_MS); |
3234 | if (netif_msg_ifdown (dev)) | 3234 | if (netif_msg_ifdown (dev)) |
3235 | devdbg (dev, "waited for %d urb completions", temp); | 3235 | devdbg (dev, "waited for %d urb completions", temp); |
diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h index 52ded516ea5c..c0caf3e3e6fd 100644 --- a/include/asm-arm/arch-ixp2000/platform.h +++ b/include/asm-arm/arch-ixp2000/platform.h | |||
@@ -115,6 +115,7 @@ static inline unsigned int ixp2000_is_pcimaster(void) | |||
115 | } | 115 | } |
116 | 116 | ||
117 | void ixp2000_map_io(void); | 117 | void ixp2000_map_io(void); |
118 | void ixp2000_uart_init(void); | ||
118 | void ixp2000_init_irq(void); | 119 | void ixp2000_init_irq(void); |
119 | void ixp2000_init_time(unsigned long); | 120 | void ixp2000_init_time(unsigned long); |
120 | unsigned long ixp2000_gettimeoffset(void); | 121 | unsigned long ixp2000_gettimeoffset(void); |
diff --git a/include/asm-arm/arch-omap/board-h2.h b/include/asm-arm/arch-omap/board-h2.h index 60f002b72983..39ca5a31aeea 100644 --- a/include/asm-arm/arch-omap/board-h2.h +++ b/include/asm-arm/arch-omap/board-h2.h | |||
@@ -34,11 +34,6 @@ | |||
34 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ | 34 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ |
35 | #define OMAP1610_ETHR_START 0x04000300 | 35 | #define OMAP1610_ETHR_START 0x04000300 |
36 | 36 | ||
37 | /* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */ | ||
38 | #define OMAP_NOR_FLASH_SIZE SZ_32M | ||
39 | #define OMAP_NOR_FLASH_START1 0x0C000000 /* CS3 */ | ||
40 | #define OMAP_NOR_FLASH_START2 0x0A000000 /* CS2B */ | ||
41 | |||
42 | /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ | 37 | /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ |
43 | #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ | 38 | #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ |
44 | #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ | 39 | #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ |
diff --git a/include/asm-arm/arch-omap/board-h3.h b/include/asm-arm/arch-omap/board-h3.h index e4d1cd231731..1b12c1dcc2fa 100644 --- a/include/asm-arm/arch-omap/board-h3.h +++ b/include/asm-arm/arch-omap/board-h3.h | |||
@@ -30,11 +30,6 @@ | |||
30 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ | 30 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ |
31 | #define OMAP1710_ETHR_START 0x04000300 | 31 | #define OMAP1710_ETHR_START 0x04000300 |
32 | 32 | ||
33 | /* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */ | ||
34 | #define OMAP_NOR_FLASH_SIZE SZ_32M | ||
35 | #define OMAP_NOR_FLASH_START1 0x0C000000 /* CS3 */ | ||
36 | #define OMAP_NOR_FLASH_START2 0x0A000000 /* CS2B */ | ||
37 | |||
38 | /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ | 33 | /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ |
39 | #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ | 34 | #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ |
40 | #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ | 35 | #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ |
diff --git a/include/asm-arm/arch-omap/board-osk.h b/include/asm-arm/arch-omap/board-osk.h index aaa49a0fbd21..2b1a8a4fe44e 100644 --- a/include/asm-arm/arch-omap/board-osk.h +++ b/include/asm-arm/arch-omap/board-osk.h | |||
@@ -32,10 +32,5 @@ | |||
32 | /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ | 32 | /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ |
33 | #define OMAP_OSK_ETHR_START 0x04800300 | 33 | #define OMAP_OSK_ETHR_START 0x04800300 |
34 | 34 | ||
35 | /* Micron NOR flash at CS3 mapped to address 0x0 if BM bit is 1 */ | ||
36 | #define OMAP_OSK_NOR_FLASH_BASE 0xD8000000 | ||
37 | #define OMAP_OSK_NOR_FLASH_SIZE SZ_32M | ||
38 | #define OMAP_OSK_NOR_FLASH_START 0x00000000 | ||
39 | |||
40 | #endif /* __ASM_ARCH_OMAP_OSK_H */ | 35 | #endif /* __ASM_ARCH_OMAP_OSK_H */ |
41 | 36 | ||
diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index 1cefd60b6f2a..95bd625480c1 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h | |||
@@ -16,10 +16,11 @@ | |||
16 | /* Different peripheral ids */ | 16 | /* Different peripheral ids */ |
17 | #define OMAP_TAG_CLOCK 0x4f01 | 17 | #define OMAP_TAG_CLOCK 0x4f01 |
18 | #define OMAP_TAG_MMC 0x4f02 | 18 | #define OMAP_TAG_MMC 0x4f02 |
19 | #define OMAP_TAG_UART 0x4f03 | 19 | #define OMAP_TAG_SERIAL_CONSOLE 0x4f03 |
20 | #define OMAP_TAG_USB 0x4f04 | 20 | #define OMAP_TAG_USB 0x4f04 |
21 | #define OMAP_TAG_LCD 0x4f05 | 21 | #define OMAP_TAG_LCD 0x4f05 |
22 | #define OMAP_TAG_GPIO_SWITCH 0x4f06 | 22 | #define OMAP_TAG_GPIO_SWITCH 0x4f06 |
23 | #define OMAP_TAG_UART 0x4f07 | ||
23 | 24 | ||
24 | #define OMAP_TAG_BOOT_REASON 0x4f80 | 25 | #define OMAP_TAG_BOOT_REASON 0x4f80 |
25 | #define OMAP_TAG_FLASH_PART 0x4f81 | 26 | #define OMAP_TAG_FLASH_PART 0x4f81 |
@@ -35,7 +36,7 @@ struct omap_mmc_config { | |||
35 | s16 mmc1_switch_pin, mmc2_switch_pin; | 36 | s16 mmc1_switch_pin, mmc2_switch_pin; |
36 | }; | 37 | }; |
37 | 38 | ||
38 | struct omap_uart_config { | 39 | struct omap_serial_console_config { |
39 | u8 console_uart; | 40 | u8 console_uart; |
40 | u32 console_speed; | 41 | u32 console_speed; |
41 | }; | 42 | }; |
@@ -82,7 +83,8 @@ struct omap_lcd_config { | |||
82 | */ | 83 | */ |
83 | #define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000 | 84 | #define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000 |
84 | #define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001 | 85 | #define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001 |
85 | #define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 | 86 | #define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 |
87 | #define OMAP_GPIO_SWITCH_FLAG_OUTPUT 0x0002 | ||
86 | struct omap_gpio_switch_config { | 88 | struct omap_gpio_switch_config { |
87 | char name[12]; | 89 | char name[12]; |
88 | u16 gpio; | 90 | u16 gpio; |
@@ -99,6 +101,10 @@ struct omap_boot_reason_config { | |||
99 | char reason_str[12]; | 101 | char reason_str[12]; |
100 | }; | 102 | }; |
101 | 103 | ||
104 | struct omap_uart_config { | ||
105 | /* Bit field of UARTs present; bit 0 --> UART1 */ | ||
106 | unsigned int enabled_uarts; | ||
107 | }; | ||
102 | 108 | ||
103 | struct omap_board_config_entry { | 109 | struct omap_board_config_entry { |
104 | u16 tag; | 110 | u16 tag; |
diff --git a/arch/arm/mach-omap/common.h b/include/asm-arm/arch-omap/common.h index 9f62858c0df4..2a676b4f13b5 100644 --- a/arch/arm/mach-omap/common.h +++ b/include/asm-arm/arch-omap/common.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap/common.h | 2 | * linux/include/asm-arm/arch-omap/common.h |
3 | * | 3 | * |
4 | * Header for code common to all OMAP machines. | 4 | * Header for code common to all OMAP machines. |
5 | * | 5 | * |
@@ -29,7 +29,7 @@ | |||
29 | 29 | ||
30 | struct sys_timer; | 30 | struct sys_timer; |
31 | 31 | ||
32 | extern void omap_map_io(void); | 32 | extern void omap_map_common_io(void); |
33 | extern struct sys_timer omap_timer; | 33 | extern struct sys_timer omap_timer; |
34 | extern void omap_serial_init(int ports[]); | 34 | extern void omap_serial_init(int ports[]); |
35 | 35 | ||
diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h index d785248377db..ce114ce5af5d 100644 --- a/include/asm-arm/arch-omap/dma.h +++ b/include/asm-arm/arch-omap/dma.h | |||
@@ -241,6 +241,7 @@ extern void omap_dma_unlink_lch (int lch_head, int lch_queue); | |||
241 | extern dma_addr_t omap_get_dma_src_pos(int lch); | 241 | extern dma_addr_t omap_get_dma_src_pos(int lch); |
242 | extern dma_addr_t omap_get_dma_dst_pos(int lch); | 242 | extern dma_addr_t omap_get_dma_dst_pos(int lch); |
243 | extern void omap_clear_dma(int lch); | 243 | extern void omap_clear_dma(int lch); |
244 | extern int omap_dma_running(void); | ||
244 | 245 | ||
245 | /* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */ | 246 | /* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */ |
246 | extern int omap_dma_in_1510_mode(void); | 247 | extern int omap_dma_in_1510_mode(void); |
diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index 37e06c782bdf..48258c7f6541 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h | |||
@@ -54,6 +54,19 @@ | |||
54 | 54 | ||
55 | /* | 55 | /* |
56 | * ---------------------------------------------------------------------------- | 56 | * ---------------------------------------------------------------------------- |
57 | * Timers | ||
58 | * ---------------------------------------------------------------------------- | ||
59 | */ | ||
60 | #define OMAP_MPU_TIMER1_BASE (0xfffec500) | ||
61 | #define OMAP_MPU_TIMER2_BASE (0xfffec600) | ||
62 | #define OMAP_MPU_TIMER3_BASE (0xfffec700) | ||
63 | #define MPU_TIMER_FREE (1 << 6) | ||
64 | #define MPU_TIMER_CLOCK_ENABLE (1 << 5) | ||
65 | #define MPU_TIMER_AR (1 << 1) | ||
66 | #define MPU_TIMER_ST (1 << 0) | ||
67 | |||
68 | /* | ||
69 | * ---------------------------------------------------------------------------- | ||
57 | * Clocks | 70 | * Clocks |
58 | * ---------------------------------------------------------------------------- | 71 | * ---------------------------------------------------------------------------- |
59 | */ | 72 | */ |
@@ -78,6 +91,7 @@ | |||
78 | 91 | ||
79 | /* DSP clock control */ | 92 | /* DSP clock control */ |
80 | #define DSP_CONFIG_REG_BASE (0xe1008000) | 93 | #define DSP_CONFIG_REG_BASE (0xe1008000) |
94 | #define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) | ||
81 | #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) | 95 | #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) |
82 | #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) | 96 | #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) |
83 | 97 | ||
@@ -88,6 +102,7 @@ | |||
88 | */ | 102 | */ |
89 | #define ULPD_REG_BASE (0xfffe0800) | 103 | #define ULPD_REG_BASE (0xfffe0800) |
90 | #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) | 104 | #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) |
105 | #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) | ||
91 | #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) | 106 | #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) |
92 | # define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ | 107 | # define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ |
93 | # define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ | 108 | # define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ |
@@ -268,17 +283,10 @@ | |||
268 | * Processor specific defines | 283 | * Processor specific defines |
269 | * --------------------------------------------------------------------------- | 284 | * --------------------------------------------------------------------------- |
270 | */ | 285 | */ |
271 | #ifdef CONFIG_ARCH_OMAP730 | ||
272 | #include "omap730.h" | ||
273 | #endif | ||
274 | 286 | ||
275 | #ifdef CONFIG_ARCH_OMAP1510 | 287 | #include "omap730.h" |
276 | #include "omap1510.h" | 288 | #include "omap1510.h" |
277 | #endif | ||
278 | |||
279 | #ifdef CONFIG_ARCH_OMAP16XX | ||
280 | #include "omap16xx.h" | 289 | #include "omap16xx.h" |
281 | #endif | ||
282 | 290 | ||
283 | /* | 291 | /* |
284 | * --------------------------------------------------------------------------- | 292 | * --------------------------------------------------------------------------- |
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 6701fd9e5f9b..0d05a7c957d1 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h | |||
@@ -159,6 +159,7 @@ | |||
159 | #define INT_1610_GPIO_BANK3 (41 + IH2_BASE) | 159 | #define INT_1610_GPIO_BANK3 (41 + IH2_BASE) |
160 | #define INT_1610_MMC2 (42 + IH2_BASE) | 160 | #define INT_1610_MMC2 (42 + IH2_BASE) |
161 | #define INT_1610_CF (43 + IH2_BASE) | 161 | #define INT_1610_CF (43 + IH2_BASE) |
162 | #define INT_1610_WAKE_UP_REQ (46 + IH2_BASE) | ||
162 | #define INT_1610_GPIO_BANK4 (48 + IH2_BASE) | 163 | #define INT_1610_GPIO_BANK4 (48 + IH2_BASE) |
163 | #define INT_1610_SPI (49 + IH2_BASE) | 164 | #define INT_1610_SPI (49 + IH2_BASE) |
164 | #define INT_1610_DMA_CH6 (53 + IH2_BASE) | 165 | #define INT_1610_DMA_CH6 (53 + IH2_BASE) |
@@ -238,6 +239,8 @@ | |||
238 | #define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) | 239 | #define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) |
239 | #define IH_BOARD_BASE (16 + IH_MPUIO_BASE) | 240 | #define IH_BOARD_BASE (16 + IH_MPUIO_BASE) |
240 | 241 | ||
242 | #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) | ||
243 | |||
241 | #ifndef __ASSEMBLY__ | 244 | #ifndef __ASSEMBLY__ |
242 | extern void omap_init_irq(void); | 245 | extern void omap_init_irq(void); |
243 | #endif | 246 | #endif |
diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index 39f99decbb7b..5bd3f0097fc6 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h | |||
@@ -231,7 +231,7 @@ typedef enum { | |||
231 | J19_1610_ETM_D6, | 231 | J19_1610_ETM_D6, |
232 | J18_1610_ETM_D7, | 232 | J18_1610_ETM_D7, |
233 | 233 | ||
234 | /* OMAP-1610 GPIO */ | 234 | /* OMAP16XX GPIO */ |
235 | P20_1610_GPIO4, | 235 | P20_1610_GPIO4, |
236 | V9_1610_GPIO7, | 236 | V9_1610_GPIO7, |
237 | W8_1610_GPIO9, | 237 | W8_1610_GPIO9, |
@@ -241,6 +241,9 @@ typedef enum { | |||
241 | AA20_1610_GPIO_41, | 241 | AA20_1610_GPIO_41, |
242 | W19_1610_GPIO48, | 242 | W19_1610_GPIO48, |
243 | M7_1610_GPIO62, | 243 | M7_1610_GPIO62, |
244 | V14_16XX_GPIO37, | ||
245 | R9_16XX_GPIO18, | ||
246 | L14_16XX_GPIO49, | ||
244 | 247 | ||
245 | /* OMAP-1610 uWire */ | 248 | /* OMAP-1610 uWire */ |
246 | V19_1610_UWIRE_SCLK, | 249 | V19_1610_UWIRE_SCLK, |
@@ -285,12 +288,13 @@ typedef enum { | |||
285 | V6_USB2_TXD, | 288 | V6_USB2_TXD, |
286 | W5_USB2_SE0, | 289 | W5_USB2_SE0, |
287 | 290 | ||
288 | /* UART1 1610 */ | 291 | /* 16XX UART */ |
289 | |||
290 | R13_1610_UART1_TX, | 292 | R13_1610_UART1_TX, |
291 | V14_1610_UART1_RX, | 293 | V14_16XX_UART1_RX, |
292 | R14_1610_UART1_CTS, | 294 | R14_1610_UART1_CTS, |
293 | AA15_1610_UART1_RTS, | 295 | AA15_1610_UART1_RTS, |
296 | R9_16XX_UART2_RX, | ||
297 | L14_16XX_UART3_RX, | ||
294 | 298 | ||
295 | /* I2C OMAP-1610 */ | 299 | /* I2C OMAP-1610 */ |
296 | I2C_SCL, | 300 | I2C_SCL, |
@@ -332,7 +336,7 @@ typedef enum { | |||
332 | * Table of various FUNC_MUX and PULL_DWN combinations for each device. | 336 | * Table of various FUNC_MUX and PULL_DWN combinations for each device. |
333 | * See also reg_cfg_t above for the lookup table. | 337 | * See also reg_cfg_t above for the lookup table. |
334 | */ | 338 | */ |
335 | static reg_cfg_set __initdata_or_module | 339 | static const reg_cfg_set __initdata_or_module |
336 | reg_cfg_table[] = { | 340 | reg_cfg_table[] = { |
337 | /* | 341 | /* |
338 | * description mux mode mux pull pull pull pu_pd pu dbg | 342 | * description mux mode mux pull pull pull pu_pd pu dbg |
@@ -455,7 +459,7 @@ MUX_CFG("L19_1610_ETM_D0", 5, 18, 1, 0, 26, 0, 0, 0, 1) | |||
455 | MUX_CFG("J19_1610_ETM_D6", 5, 0, 1, 0, 20, 0, 0, 0, 1) | 459 | MUX_CFG("J19_1610_ETM_D6", 5, 0, 1, 0, 20, 0, 0, 0, 1) |
456 | MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1) | 460 | MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1) |
457 | 461 | ||
458 | /* OMAP-1610 GPIO */ | 462 | /* OMAP16XX GPIO */ |
459 | MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1) | 463 | MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1) |
460 | MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1) | 464 | MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1) |
461 | MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1) | 465 | MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1) |
@@ -465,6 +469,9 @@ MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1) | |||
465 | MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1) | 469 | MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1) |
466 | MUX_CFG("W19_1610_GPIO48", 8, 15, 7, 1, 23, 1, 1, 0, 1) | 470 | MUX_CFG("W19_1610_GPIO48", 8, 15, 7, 1, 23, 1, 1, 0, 1) |
467 | MUX_CFG("M7_1610_GPIO62", 10, 0, 0, 4, 24, 0, 4, 0, 1) | 471 | MUX_CFG("M7_1610_GPIO62", 10, 0, 0, 4, 24, 0, 4, 0, 1) |
472 | MUX_CFG("V14_16XX_GPIO37", 9, 18, 7, 2, 2, 0, 2, 2, 0) | ||
473 | MUX_CFG("R9_16XX_GPIO18", C, 18, 7, 3, 0, 0, 3, 0, 0) | ||
474 | MUX_CFG("L14_16XX_GPIO49", 6, 3, 7, 0, 31, 0, 0, 31, 0) | ||
468 | 475 | ||
469 | /* OMAP-1610 uWire */ | 476 | /* OMAP-1610 uWire */ |
470 | MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1) | 477 | MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1) |
@@ -503,16 +510,17 @@ MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1) | |||
503 | MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1) | 510 | MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1) |
504 | MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1) | 511 | MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1) |
505 | MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1) | 512 | MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1) |
506 | MUX_CFG("R8_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1) | 513 | MUX_CFG("R9_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1) |
507 | MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1) | 514 | MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1) |
508 | MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1) | 515 | MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1) |
509 | 516 | ||
510 | 517 | /* 16XX UART */ | |
511 | /* UART1 */ | ||
512 | MUX_CFG("R13_1610_UART1_TX", A, 12, 6, 2, 10, 0, 2, 10, 1) | 518 | MUX_CFG("R13_1610_UART1_TX", A, 12, 6, 2, 10, 0, 2, 10, 1) |
513 | MUX_CFG("V14_1610_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1) | 519 | MUX_CFG("V14_16XX_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1) |
514 | MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1) | 520 | MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1) |
515 | MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1) | 521 | MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1) |
522 | MUX_CFG("R9_16XX_UART2_RX", C, 18, 0, 3, 0, 0, 3, 0, 1) | ||
523 | MUX_CFG("L14_16XX_UART3_RX", 6, 3, 0, 0, 31, 0, 0, 31, 1) | ||
516 | 524 | ||
517 | /* I2C interface */ | 525 | /* I2C interface */ |
518 | MUX_CFG("I2C_SCL", 7, 24, 0, NA, 0, 0, NA, 0, 0) | 526 | MUX_CFG("I2C_SCL", 7, 24, 0, NA, 0, 0, NA, 0, 0) |
diff --git a/include/asm-arm/arch-omap/omap16xx.h b/include/asm-arm/arch-omap/omap16xx.h index 88b1fe43ae9e..38a9b95e6a33 100644 --- a/include/asm-arm/arch-omap/omap16xx.h +++ b/include/asm-arm/arch-omap/omap16xx.h | |||
@@ -183,5 +183,37 @@ | |||
183 | #define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00) | 183 | #define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00) |
184 | #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04) | 184 | #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04) |
185 | 185 | ||
186 | /* | ||
187 | * --------------------------------------------------------------------------- | ||
188 | * Watchdog timer | ||
189 | * --------------------------------------------------------------------------- | ||
190 | */ | ||
191 | |||
192 | /* 32-bit Watchdog timer in OMAP 16XX */ | ||
193 | #define OMAP_16XX_WATCHDOG_BASE (0xfffeb000) | ||
194 | #define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00) | ||
195 | #define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10) | ||
196 | #define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14) | ||
197 | #define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24) | ||
198 | #define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28) | ||
199 | #define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c) | ||
200 | #define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30) | ||
201 | #define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34) | ||
202 | #define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48) | ||
203 | |||
204 | #define WCLR_PRE_SHIFT 5 | ||
205 | #define WCLR_PTV_SHIFT 2 | ||
206 | |||
207 | #define WWPS_W_PEND_WSPR (1 << 4) | ||
208 | #define WWPS_W_PEND_WTGR (1 << 3) | ||
209 | #define WWPS_W_PEND_WLDR (1 << 2) | ||
210 | #define WWPS_W_PEND_WCRR (1 << 1) | ||
211 | #define WWPS_W_PEND_WCLR (1 << 0) | ||
212 | |||
213 | #define WSPR_ENABLE_0 (0x0000bbbb) | ||
214 | #define WSPR_ENABLE_1 (0x00004444) | ||
215 | #define WSPR_DISABLE_0 (0x0000aaaa) | ||
216 | #define WSPR_DISABLE_1 (0x00005555) | ||
217 | |||
186 | #endif /* __ASM_ARCH_OMAP16XX_H */ | 218 | #endif /* __ASM_ARCH_OMAP16XX_H */ |
187 | 219 | ||
diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h index 17a2c4825f07..ff37bc27e603 100644 --- a/include/asm-arm/arch-omap/system.h +++ b/include/asm-arm/arch-omap/system.h | |||
@@ -5,7 +5,9 @@ | |||
5 | #ifndef __ASM_ARCH_SYSTEM_H | 5 | #ifndef __ASM_ARCH_SYSTEM_H |
6 | #define __ASM_ARCH_SYSTEM_H | 6 | #define __ASM_ARCH_SYSTEM_H |
7 | #include <linux/config.h> | 7 | #include <linux/config.h> |
8 | #include <asm/mach-types.h> | ||
8 | #include <asm/arch/hardware.h> | 9 | #include <asm/arch/hardware.h> |
10 | #include <asm/mach-types.h> | ||
9 | 11 | ||
10 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
11 | { | 13 | { |
@@ -14,7 +16,24 @@ static inline void arch_idle(void) | |||
14 | 16 | ||
15 | static inline void arch_reset(char mode) | 17 | static inline void arch_reset(char mode) |
16 | { | 18 | { |
17 | omap_writew(1, ARM_RSTCT1); | 19 | |
20 | #ifdef CONFIG_ARCH_OMAP16XX | ||
21 | /* | ||
22 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 | ||
23 | * "Global Software Reset Affects Traffic Controller Frequency". | ||
24 | */ | ||
25 | if (cpu_is_omap5912()) { | ||
26 | omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), | ||
27 | DPLL_CTL); | ||
28 | omap_writew(0x8, ARM_RSTCT1); | ||
29 | } | ||
30 | #endif | ||
31 | #ifdef CONFIG_MACH_VOICEBLUE | ||
32 | if (machine_is_voiceblue()) | ||
33 | voiceblue_reset(); | ||
34 | else | ||
35 | #endif | ||
36 | omap_writew(1, ARM_RSTCT1); | ||
18 | } | 37 | } |
19 | 38 | ||
20 | #endif | 39 | #endif |
diff --git a/include/asm-sparc64/param.h b/include/asm-sparc64/param.h index 6a12f3ac0359..a1cd4974630b 100644 --- a/include/asm-sparc64/param.h +++ b/include/asm-sparc64/param.h | |||
@@ -1,9 +1,10 @@ | |||
1 | /* $Id: param.h,v 1.2 2000/10/30 21:01:41 davem Exp $ */ | ||
2 | #ifndef _ASMSPARC64_PARAM_H | 1 | #ifndef _ASMSPARC64_PARAM_H |
3 | #define _ASMSPARC64_PARAM_H | 2 | #define _ASMSPARC64_PARAM_H |
4 | 3 | ||
4 | #include <linux/config.h> | ||
5 | |||
5 | #ifdef __KERNEL__ | 6 | #ifdef __KERNEL__ |
6 | # define HZ 1000 /* Internal kernel timer frequency */ | 7 | # define HZ CONFIG_HZ /* Internal kernel timer frequency */ |
7 | # define USER_HZ 100 /* .. some user interfaces are in "ticks" */ | 8 | # define USER_HZ 100 /* .. some user interfaces are in "ticks" */ |
8 | # define CLOCKS_PER_SEC (USER_HZ) | 9 | # define CLOCKS_PER_SEC (USER_HZ) |
9 | #endif | 10 | #endif |
diff --git a/include/asm-xtensa/ipc.h b/include/asm-xtensa/ipc.h deleted file mode 100644 index a9eed4e21cb9..000000000000 --- a/include/asm-xtensa/ipc.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-xtensa/ipc.h | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General | ||
5 | * Public License. See the file "COPYING" in the main directory of | ||
6 | * this archive for more details. | ||
7 | * | ||
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | ||
9 | */ | ||
10 | |||
11 | #ifndef _XTENSA_IPC_H | ||
12 | #define _XTENSA_IPC_H | ||
13 | |||
14 | #include <asm-generic/ipc.h> | ||
15 | |||
16 | #endif /* _XTENSA_IPC_H */ | ||
diff --git a/include/linux/igmp.h b/include/linux/igmp.h index 390e760a96d3..0c31ef0b5bad 100644 --- a/include/linux/igmp.h +++ b/include/linux/igmp.h | |||
@@ -148,7 +148,6 @@ struct ip_sf_socklist | |||
148 | struct ip_mc_socklist | 148 | struct ip_mc_socklist |
149 | { | 149 | { |
150 | struct ip_mc_socklist *next; | 150 | struct ip_mc_socklist *next; |
151 | int count; | ||
152 | struct ip_mreqn multi; | 151 | struct ip_mreqn multi; |
153 | unsigned int sfmode; /* MCAST_{INCLUDE,EXCLUDE} */ | 152 | unsigned int sfmode; /* MCAST_{INCLUDE,EXCLUDE} */ |
154 | struct ip_sf_socklist *sflist; | 153 | struct ip_sf_socklist *sflist; |
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 14b950413495..5d4a990d5577 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h | |||
@@ -300,20 +300,26 @@ struct sk_buff { | |||
300 | #include <asm/system.h> | 300 | #include <asm/system.h> |
301 | 301 | ||
302 | extern void __kfree_skb(struct sk_buff *skb); | 302 | extern void __kfree_skb(struct sk_buff *skb); |
303 | extern struct sk_buff *alloc_skb(unsigned int size, int priority); | 303 | extern struct sk_buff *alloc_skb(unsigned int size, |
304 | unsigned int __nocast priority); | ||
304 | extern struct sk_buff *alloc_skb_from_cache(kmem_cache_t *cp, | 305 | extern struct sk_buff *alloc_skb_from_cache(kmem_cache_t *cp, |
305 | unsigned int size, int priority); | 306 | unsigned int size, |
307 | unsigned int __nocast priority); | ||
306 | extern void kfree_skbmem(struct sk_buff *skb); | 308 | extern void kfree_skbmem(struct sk_buff *skb); |
307 | extern struct sk_buff *skb_clone(struct sk_buff *skb, int priority); | 309 | extern struct sk_buff *skb_clone(struct sk_buff *skb, |
308 | extern struct sk_buff *skb_copy(const struct sk_buff *skb, int priority); | 310 | unsigned int __nocast priority); |
309 | extern struct sk_buff *pskb_copy(struct sk_buff *skb, int gfp_mask); | 311 | extern struct sk_buff *skb_copy(const struct sk_buff *skb, |
312 | unsigned int __nocast priority); | ||
313 | extern struct sk_buff *pskb_copy(struct sk_buff *skb, | ||
314 | unsigned int __nocast gfp_mask); | ||
310 | extern int pskb_expand_head(struct sk_buff *skb, | 315 | extern int pskb_expand_head(struct sk_buff *skb, |
311 | int nhead, int ntail, int gfp_mask); | 316 | int nhead, int ntail, |
317 | unsigned int __nocast gfp_mask); | ||
312 | extern struct sk_buff *skb_realloc_headroom(struct sk_buff *skb, | 318 | extern struct sk_buff *skb_realloc_headroom(struct sk_buff *skb, |
313 | unsigned int headroom); | 319 | unsigned int headroom); |
314 | extern struct sk_buff *skb_copy_expand(const struct sk_buff *skb, | 320 | extern struct sk_buff *skb_copy_expand(const struct sk_buff *skb, |
315 | int newheadroom, int newtailroom, | 321 | int newheadroom, int newtailroom, |
316 | int priority); | 322 | unsigned int __nocast priority); |
317 | extern struct sk_buff * skb_pad(struct sk_buff *skb, int pad); | 323 | extern struct sk_buff * skb_pad(struct sk_buff *skb, int pad); |
318 | #define dev_kfree_skb(a) kfree_skb(a) | 324 | #define dev_kfree_skb(a) kfree_skb(a) |
319 | extern void skb_over_panic(struct sk_buff *skb, int len, | 325 | extern void skb_over_panic(struct sk_buff *skb, int len, |
@@ -464,7 +470,8 @@ static inline int skb_shared(const struct sk_buff *skb) | |||
464 | * | 470 | * |
465 | * NULL is returned on a memory allocation failure. | 471 | * NULL is returned on a memory allocation failure. |
466 | */ | 472 | */ |
467 | static inline struct sk_buff *skb_share_check(struct sk_buff *skb, int pri) | 473 | static inline struct sk_buff *skb_share_check(struct sk_buff *skb, |
474 | unsigned int __nocast pri) | ||
468 | { | 475 | { |
469 | might_sleep_if(pri & __GFP_WAIT); | 476 | might_sleep_if(pri & __GFP_WAIT); |
470 | if (skb_shared(skb)) { | 477 | if (skb_shared(skb)) { |
@@ -1001,7 +1008,7 @@ static inline void __skb_queue_purge(struct sk_buff_head *list) | |||
1001 | * %NULL is returned in there is no free memory. | 1008 | * %NULL is returned in there is no free memory. |
1002 | */ | 1009 | */ |
1003 | static inline struct sk_buff *__dev_alloc_skb(unsigned int length, | 1010 | static inline struct sk_buff *__dev_alloc_skb(unsigned int length, |
1004 | int gfp_mask) | 1011 | unsigned int __nocast gfp_mask) |
1005 | { | 1012 | { |
1006 | struct sk_buff *skb = alloc_skb(length + 16, gfp_mask); | 1013 | struct sk_buff *skb = alloc_skb(length + 16, gfp_mask); |
1007 | if (likely(skb)) | 1014 | if (likely(skb)) |
@@ -1114,8 +1121,8 @@ static inline int skb_can_coalesce(struct sk_buff *skb, int i, | |||
1114 | * If there is no free memory -ENOMEM is returned, otherwise zero | 1121 | * If there is no free memory -ENOMEM is returned, otherwise zero |
1115 | * is returned and the old skb data released. | 1122 | * is returned and the old skb data released. |
1116 | */ | 1123 | */ |
1117 | extern int __skb_linearize(struct sk_buff *skb, int gfp); | 1124 | extern int __skb_linearize(struct sk_buff *skb, unsigned int __nocast gfp); |
1118 | static inline int skb_linearize(struct sk_buff *skb, int gfp) | 1125 | static inline int skb_linearize(struct sk_buff *skb, unsigned int __nocast gfp) |
1119 | { | 1126 | { |
1120 | return __skb_linearize(skb, gfp); | 1127 | return __skb_linearize(skb, gfp); |
1121 | } | 1128 | } |
diff --git a/include/net/irda/irda_device.h b/include/net/irda/irda_device.h index 71d6af83b631..92c828029cd8 100644 --- a/include/net/irda/irda_device.h +++ b/include/net/irda/irda_device.h | |||
@@ -224,7 +224,7 @@ int irda_device_is_receiving(struct net_device *dev); | |||
224 | /* Interface for internal use */ | 224 | /* Interface for internal use */ |
225 | static inline int irda_device_txqueue_empty(const struct net_device *dev) | 225 | static inline int irda_device_txqueue_empty(const struct net_device *dev) |
226 | { | 226 | { |
227 | return (skb_queue_len(&dev->qdisc->q) == 0); | 227 | return skb_queue_empty(&dev->qdisc->q); |
228 | } | 228 | } |
229 | int irda_device_set_raw_mode(struct net_device* self, int status); | 229 | int irda_device_set_raw_mode(struct net_device* self, int status); |
230 | struct net_device *alloc_irdadev(int sizeof_priv); | 230 | struct net_device *alloc_irdadev(int sizeof_priv); |
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index 47727c7cc628..7435528a1747 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h | |||
@@ -582,7 +582,6 @@ void sctp_datamsg_track(struct sctp_chunk *); | |||
582 | void sctp_chunk_fail(struct sctp_chunk *, int error); | 582 | void sctp_chunk_fail(struct sctp_chunk *, int error); |
583 | int sctp_chunk_abandoned(struct sctp_chunk *); | 583 | int sctp_chunk_abandoned(struct sctp_chunk *); |
584 | 584 | ||
585 | |||
586 | /* RFC2960 1.4 Key Terms | 585 | /* RFC2960 1.4 Key Terms |
587 | * | 586 | * |
588 | * o Chunk: A unit of information within an SCTP packet, consisting of | 587 | * o Chunk: A unit of information within an SCTP packet, consisting of |
@@ -592,13 +591,8 @@ int sctp_chunk_abandoned(struct sctp_chunk *); | |||
592 | * each chunk as well as a few other header pointers... | 591 | * each chunk as well as a few other header pointers... |
593 | */ | 592 | */ |
594 | struct sctp_chunk { | 593 | struct sctp_chunk { |
595 | /* These first three elements MUST PRECISELY match the first | 594 | struct list_head list; |
596 | * three elements of struct sk_buff. This allows us to reuse | 595 | |
597 | * all the skb_* queue management functions. | ||
598 | */ | ||
599 | struct sctp_chunk *next; | ||
600 | struct sctp_chunk *prev; | ||
601 | struct sk_buff_head *list; | ||
602 | atomic_t refcnt; | 596 | atomic_t refcnt; |
603 | 597 | ||
604 | /* This is our link to the per-transport transmitted list. */ | 598 | /* This is our link to the per-transport transmitted list. */ |
@@ -717,7 +711,7 @@ struct sctp_packet { | |||
717 | __u32 vtag; | 711 | __u32 vtag; |
718 | 712 | ||
719 | /* This contains the payload chunks. */ | 713 | /* This contains the payload chunks. */ |
720 | struct sk_buff_head chunks; | 714 | struct list_head chunk_list; |
721 | 715 | ||
722 | /* This is the overhead of the sctp and ip headers. */ | 716 | /* This is the overhead of the sctp and ip headers. */ |
723 | size_t overhead; | 717 | size_t overhead; |
@@ -974,7 +968,7 @@ struct sctp_inq { | |||
974 | /* This is actually a queue of sctp_chunk each | 968 | /* This is actually a queue of sctp_chunk each |
975 | * containing a partially decoded packet. | 969 | * containing a partially decoded packet. |
976 | */ | 970 | */ |
977 | struct sk_buff_head in; | 971 | struct list_head in_chunk_list; |
978 | /* This is the packet which is currently off the in queue and is | 972 | /* This is the packet which is currently off the in queue and is |
979 | * being worked on through the inbound chunk processing. | 973 | * being worked on through the inbound chunk processing. |
980 | */ | 974 | */ |
@@ -1017,7 +1011,7 @@ struct sctp_outq { | |||
1017 | struct sctp_association *asoc; | 1011 | struct sctp_association *asoc; |
1018 | 1012 | ||
1019 | /* Data pending that has never been transmitted. */ | 1013 | /* Data pending that has never been transmitted. */ |
1020 | struct sk_buff_head out; | 1014 | struct list_head out_chunk_list; |
1021 | 1015 | ||
1022 | unsigned out_qlen; /* Total length of queued data chunks. */ | 1016 | unsigned out_qlen; /* Total length of queued data chunks. */ |
1023 | 1017 | ||
@@ -1025,7 +1019,7 @@ struct sctp_outq { | |||
1025 | unsigned error; | 1019 | unsigned error; |
1026 | 1020 | ||
1027 | /* These are control chunks we want to send. */ | 1021 | /* These are control chunks we want to send. */ |
1028 | struct sk_buff_head control; | 1022 | struct list_head control_chunk_list; |
1029 | 1023 | ||
1030 | /* These are chunks that have been sacked but are above the | 1024 | /* These are chunks that have been sacked but are above the |
1031 | * CTSN, or cumulative tsn ack point. | 1025 | * CTSN, or cumulative tsn ack point. |
@@ -1672,7 +1666,7 @@ struct sctp_association { | |||
1672 | * which already resides in sctp_outq. Please move this | 1666 | * which already resides in sctp_outq. Please move this |
1673 | * queue and its supporting logic down there. --piggy] | 1667 | * queue and its supporting logic down there. --piggy] |
1674 | */ | 1668 | */ |
1675 | struct sk_buff_head addip_chunks; | 1669 | struct list_head addip_chunk_list; |
1676 | 1670 | ||
1677 | /* ADDIP Section 4.1 ASCONF Chunk Procedures | 1671 | /* ADDIP Section 4.1 ASCONF Chunk Procedures |
1678 | * | 1672 | * |
diff --git a/include/net/sock.h b/include/net/sock.h index 7b76f891ae2d..a1042d08becd 100644 --- a/include/net/sock.h +++ b/include/net/sock.h | |||
@@ -684,16 +684,17 @@ extern void FASTCALL(release_sock(struct sock *sk)); | |||
684 | #define bh_lock_sock(__sk) spin_lock(&((__sk)->sk_lock.slock)) | 684 | #define bh_lock_sock(__sk) spin_lock(&((__sk)->sk_lock.slock)) |
685 | #define bh_unlock_sock(__sk) spin_unlock(&((__sk)->sk_lock.slock)) | 685 | #define bh_unlock_sock(__sk) spin_unlock(&((__sk)->sk_lock.slock)) |
686 | 686 | ||
687 | extern struct sock *sk_alloc(int family, int priority, | 687 | extern struct sock *sk_alloc(int family, |
688 | unsigned int __nocast priority, | ||
688 | struct proto *prot, int zero_it); | 689 | struct proto *prot, int zero_it); |
689 | extern void sk_free(struct sock *sk); | 690 | extern void sk_free(struct sock *sk); |
690 | 691 | ||
691 | extern struct sk_buff *sock_wmalloc(struct sock *sk, | 692 | extern struct sk_buff *sock_wmalloc(struct sock *sk, |
692 | unsigned long size, int force, | 693 | unsigned long size, int force, |
693 | int priority); | 694 | unsigned int __nocast priority); |
694 | extern struct sk_buff *sock_rmalloc(struct sock *sk, | 695 | extern struct sk_buff *sock_rmalloc(struct sock *sk, |
695 | unsigned long size, int force, | 696 | unsigned long size, int force, |
696 | int priority); | 697 | unsigned int __nocast priority); |
697 | extern void sock_wfree(struct sk_buff *skb); | 698 | extern void sock_wfree(struct sk_buff *skb); |
698 | extern void sock_rfree(struct sk_buff *skb); | 699 | extern void sock_rfree(struct sk_buff *skb); |
699 | 700 | ||
@@ -708,7 +709,8 @@ extern struct sk_buff *sock_alloc_send_skb(struct sock *sk, | |||
708 | unsigned long size, | 709 | unsigned long size, |
709 | int noblock, | 710 | int noblock, |
710 | int *errcode); | 711 | int *errcode); |
711 | extern void *sock_kmalloc(struct sock *sk, int size, int priority); | 712 | extern void *sock_kmalloc(struct sock *sk, int size, |
713 | unsigned int __nocast priority); | ||
712 | extern void sock_kfree_s(struct sock *sk, void *mem, int size); | 714 | extern void sock_kfree_s(struct sock *sk, void *mem, int size); |
713 | extern void sk_send_sigurg(struct sock *sk); | 715 | extern void sk_send_sigurg(struct sock *sk); |
714 | 716 | ||
@@ -1132,7 +1134,8 @@ static inline void sk_stream_moderate_sndbuf(struct sock *sk) | |||
1132 | } | 1134 | } |
1133 | 1135 | ||
1134 | static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk, | 1136 | static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk, |
1135 | int size, int mem, int gfp) | 1137 | int size, int mem, |
1138 | unsigned int __nocast gfp) | ||
1136 | { | 1139 | { |
1137 | struct sk_buff *skb; | 1140 | struct sk_buff *skb; |
1138 | int hdr_len; | 1141 | int hdr_len; |
@@ -1155,7 +1158,8 @@ static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk, | |||
1155 | } | 1158 | } |
1156 | 1159 | ||
1157 | static inline struct sk_buff *sk_stream_alloc_skb(struct sock *sk, | 1160 | static inline struct sk_buff *sk_stream_alloc_skb(struct sock *sk, |
1158 | int size, int gfp) | 1161 | int size, |
1162 | unsigned int __nocast gfp) | ||
1159 | { | 1163 | { |
1160 | return sk_stream_alloc_pskb(sk, size, 0, gfp); | 1164 | return sk_stream_alloc_pskb(sk, size, 0, gfp); |
1161 | } | 1165 | } |
@@ -1188,7 +1192,7 @@ static inline int sock_writeable(const struct sock *sk) | |||
1188 | return atomic_read(&sk->sk_wmem_alloc) < (sk->sk_sndbuf / 2); | 1192 | return atomic_read(&sk->sk_wmem_alloc) < (sk->sk_sndbuf / 2); |
1189 | } | 1193 | } |
1190 | 1194 | ||
1191 | static inline int gfp_any(void) | 1195 | static inline unsigned int __nocast gfp_any(void) |
1192 | { | 1196 | { |
1193 | return in_softirq() ? GFP_ATOMIC : GFP_KERNEL; | 1197 | return in_softirq() ? GFP_ATOMIC : GFP_KERNEL; |
1194 | } | 1198 | } |
diff --git a/include/net/tcp.h b/include/net/tcp.h index a166918ca56d..f4f9aba07ac2 100644 --- a/include/net/tcp.h +++ b/include/net/tcp.h | |||
@@ -860,7 +860,8 @@ extern void tcp_send_probe0(struct sock *); | |||
860 | extern void tcp_send_partial(struct sock *); | 860 | extern void tcp_send_partial(struct sock *); |
861 | extern int tcp_write_wakeup(struct sock *); | 861 | extern int tcp_write_wakeup(struct sock *); |
862 | extern void tcp_send_fin(struct sock *sk); | 862 | extern void tcp_send_fin(struct sock *sk); |
863 | extern void tcp_send_active_reset(struct sock *sk, int priority); | 863 | extern void tcp_send_active_reset(struct sock *sk, |
864 | unsigned int __nocast priority); | ||
864 | extern int tcp_send_synack(struct sock *); | 865 | extern int tcp_send_synack(struct sock *); |
865 | extern void tcp_push_one(struct sock *, unsigned int mss_now); | 866 | extern void tcp_push_one(struct sock *, unsigned int mss_now); |
866 | extern void tcp_send_ack(struct sock *sk); | 867 | extern void tcp_send_ack(struct sock *sk); |
@@ -991,7 +992,7 @@ static __inline__ void tcp_fast_path_on(struct tcp_sock *tp) | |||
991 | 992 | ||
992 | static inline void tcp_fast_path_check(struct sock *sk, struct tcp_sock *tp) | 993 | static inline void tcp_fast_path_check(struct sock *sk, struct tcp_sock *tp) |
993 | { | 994 | { |
994 | if (skb_queue_len(&tp->out_of_order_queue) == 0 && | 995 | if (skb_queue_empty(&tp->out_of_order_queue) && |
995 | tp->rcv_wnd && | 996 | tp->rcv_wnd && |
996 | atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf && | 997 | atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf && |
997 | !tp->urg_data) | 998 | !tp->urg_data) |
diff --git a/net/bluetooth/cmtp/core.c b/net/bluetooth/cmtp/core.c index 2e341de3e763..901eff7ebe74 100644 --- a/net/bluetooth/cmtp/core.c +++ b/net/bluetooth/cmtp/core.c | |||
@@ -213,7 +213,7 @@ static int cmtp_send_frame(struct cmtp_session *session, unsigned char *data, in | |||
213 | return kernel_sendmsg(sock, &msg, &iv, 1, len); | 213 | return kernel_sendmsg(sock, &msg, &iv, 1, len); |
214 | } | 214 | } |
215 | 215 | ||
216 | static int cmtp_process_transmit(struct cmtp_session *session) | 216 | static void cmtp_process_transmit(struct cmtp_session *session) |
217 | { | 217 | { |
218 | struct sk_buff *skb, *nskb; | 218 | struct sk_buff *skb, *nskb; |
219 | unsigned char *hdr; | 219 | unsigned char *hdr; |
@@ -223,7 +223,7 @@ static int cmtp_process_transmit(struct cmtp_session *session) | |||
223 | 223 | ||
224 | if (!(nskb = alloc_skb(session->mtu, GFP_ATOMIC))) { | 224 | if (!(nskb = alloc_skb(session->mtu, GFP_ATOMIC))) { |
225 | BT_ERR("Can't allocate memory for new frame"); | 225 | BT_ERR("Can't allocate memory for new frame"); |
226 | return -ENOMEM; | 226 | return; |
227 | } | 227 | } |
228 | 228 | ||
229 | while ((skb = skb_dequeue(&session->transmit))) { | 229 | while ((skb = skb_dequeue(&session->transmit))) { |
@@ -275,8 +275,6 @@ static int cmtp_process_transmit(struct cmtp_session *session) | |||
275 | cmtp_send_frame(session, nskb->data, nskb->len); | 275 | cmtp_send_frame(session, nskb->data, nskb->len); |
276 | 276 | ||
277 | kfree_skb(nskb); | 277 | kfree_skb(nskb); |
278 | |||
279 | return skb_queue_len(&session->transmit); | ||
280 | } | 278 | } |
281 | 279 | ||
282 | static int cmtp_session(void *arg) | 280 | static int cmtp_session(void *arg) |
diff --git a/net/bluetooth/hidp/core.c b/net/bluetooth/hidp/core.c index affbc55462e8..de8af5f42394 100644 --- a/net/bluetooth/hidp/core.c +++ b/net/bluetooth/hidp/core.c | |||
@@ -428,7 +428,7 @@ static int hidp_send_frame(struct socket *sock, unsigned char *data, int len) | |||
428 | return kernel_sendmsg(sock, &msg, &iv, 1, len); | 428 | return kernel_sendmsg(sock, &msg, &iv, 1, len); |
429 | } | 429 | } |
430 | 430 | ||
431 | static int hidp_process_transmit(struct hidp_session *session) | 431 | static void hidp_process_transmit(struct hidp_session *session) |
432 | { | 432 | { |
433 | struct sk_buff *skb; | 433 | struct sk_buff *skb; |
434 | 434 | ||
@@ -453,9 +453,6 @@ static int hidp_process_transmit(struct hidp_session *session) | |||
453 | hidp_set_timer(session); | 453 | hidp_set_timer(session); |
454 | kfree_skb(skb); | 454 | kfree_skb(skb); |
455 | } | 455 | } |
456 | |||
457 | return skb_queue_len(&session->ctrl_transmit) + | ||
458 | skb_queue_len(&session->intr_transmit); | ||
459 | } | 456 | } |
460 | 457 | ||
461 | static int hidp_session(void *arg) | 458 | static int hidp_session(void *arg) |
diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c index f3f6355a2786..63a123c5c41b 100644 --- a/net/bluetooth/rfcomm/sock.c +++ b/net/bluetooth/rfcomm/sock.c | |||
@@ -590,8 +590,11 @@ static long rfcomm_sock_data_wait(struct sock *sk, long timeo) | |||
590 | for (;;) { | 590 | for (;;) { |
591 | set_current_state(TASK_INTERRUPTIBLE); | 591 | set_current_state(TASK_INTERRUPTIBLE); |
592 | 592 | ||
593 | if (skb_queue_len(&sk->sk_receive_queue) || sk->sk_err || (sk->sk_shutdown & RCV_SHUTDOWN) || | 593 | if (!skb_queue_empty(&sk->sk_receive_queue) || |
594 | signal_pending(current) || !timeo) | 594 | sk->sk_err || |
595 | (sk->sk_shutdown & RCV_SHUTDOWN) || | ||
596 | signal_pending(current) || | ||
597 | !timeo) | ||
595 | break; | 598 | break; |
596 | 599 | ||
597 | set_bit(SOCK_ASYNC_WAITDATA, &sk->sk_socket->flags); | 600 | set_bit(SOCK_ASYNC_WAITDATA, &sk->sk_socket->flags); |
diff --git a/net/bluetooth/rfcomm/tty.c b/net/bluetooth/rfcomm/tty.c index 6d689200bcf3..6304590fd36a 100644 --- a/net/bluetooth/rfcomm/tty.c +++ b/net/bluetooth/rfcomm/tty.c | |||
@@ -781,7 +781,7 @@ static int rfcomm_tty_chars_in_buffer(struct tty_struct *tty) | |||
781 | 781 | ||
782 | BT_DBG("tty %p dev %p", tty, dev); | 782 | BT_DBG("tty %p dev %p", tty, dev); |
783 | 783 | ||
784 | if (skb_queue_len(&dlc->tx_queue)) | 784 | if (!skb_queue_empty(&dlc->tx_queue)) |
785 | return dlc->mtu; | 785 | return dlc->mtu; |
786 | 786 | ||
787 | return 0; | 787 | return 0; |
diff --git a/net/core/dev.c b/net/core/dev.c index 7f5f62c65115..ff9dc029233a 100644 --- a/net/core/dev.c +++ b/net/core/dev.c | |||
@@ -1127,7 +1127,7 @@ static inline int illegal_highdma(struct net_device *dev, struct sk_buff *skb) | |||
1127 | extern void skb_release_data(struct sk_buff *); | 1127 | extern void skb_release_data(struct sk_buff *); |
1128 | 1128 | ||
1129 | /* Keep head the same: replace data */ | 1129 | /* Keep head the same: replace data */ |
1130 | int __skb_linearize(struct sk_buff *skb, int gfp_mask) | 1130 | int __skb_linearize(struct sk_buff *skb, unsigned int __nocast gfp_mask) |
1131 | { | 1131 | { |
1132 | unsigned int size; | 1132 | unsigned int size; |
1133 | u8 *data; | 1133 | u8 *data; |
diff --git a/net/core/skbuff.c b/net/core/skbuff.c index 733deee24b9f..d9f7b06fe886 100644 --- a/net/core/skbuff.c +++ b/net/core/skbuff.c | |||
@@ -129,7 +129,7 @@ void skb_under_panic(struct sk_buff *skb, int sz, void *here) | |||
129 | * Buffers may only be allocated from interrupts using a @gfp_mask of | 129 | * Buffers may only be allocated from interrupts using a @gfp_mask of |
130 | * %GFP_ATOMIC. | 130 | * %GFP_ATOMIC. |
131 | */ | 131 | */ |
132 | struct sk_buff *alloc_skb(unsigned int size, int gfp_mask) | 132 | struct sk_buff *alloc_skb(unsigned int size, unsigned int __nocast gfp_mask) |
133 | { | 133 | { |
134 | struct sk_buff *skb; | 134 | struct sk_buff *skb; |
135 | u8 *data; | 135 | u8 *data; |
@@ -182,7 +182,8 @@ nodata: | |||
182 | * %GFP_ATOMIC. | 182 | * %GFP_ATOMIC. |
183 | */ | 183 | */ |
184 | struct sk_buff *alloc_skb_from_cache(kmem_cache_t *cp, | 184 | struct sk_buff *alloc_skb_from_cache(kmem_cache_t *cp, |
185 | unsigned int size, int gfp_mask) | 185 | unsigned int size, |
186 | unsigned int __nocast gfp_mask) | ||
186 | { | 187 | { |
187 | struct sk_buff *skb; | 188 | struct sk_buff *skb; |
188 | u8 *data; | 189 | u8 *data; |
@@ -322,7 +323,7 @@ void __kfree_skb(struct sk_buff *skb) | |||
322 | * %GFP_ATOMIC. | 323 | * %GFP_ATOMIC. |
323 | */ | 324 | */ |
324 | 325 | ||
325 | struct sk_buff *skb_clone(struct sk_buff *skb, int gfp_mask) | 326 | struct sk_buff *skb_clone(struct sk_buff *skb, unsigned int __nocast gfp_mask) |
326 | { | 327 | { |
327 | struct sk_buff *n = kmem_cache_alloc(skbuff_head_cache, gfp_mask); | 328 | struct sk_buff *n = kmem_cache_alloc(skbuff_head_cache, gfp_mask); |
328 | 329 | ||
@@ -460,7 +461,7 @@ static void copy_skb_header(struct sk_buff *new, const struct sk_buff *old) | |||
460 | * header is going to be modified. Use pskb_copy() instead. | 461 | * header is going to be modified. Use pskb_copy() instead. |
461 | */ | 462 | */ |
462 | 463 | ||
463 | struct sk_buff *skb_copy(const struct sk_buff *skb, int gfp_mask) | 464 | struct sk_buff *skb_copy(const struct sk_buff *skb, unsigned int __nocast gfp_mask) |
464 | { | 465 | { |
465 | int headerlen = skb->data - skb->head; | 466 | int headerlen = skb->data - skb->head; |
466 | /* | 467 | /* |
@@ -499,7 +500,7 @@ struct sk_buff *skb_copy(const struct sk_buff *skb, int gfp_mask) | |||
499 | * The returned buffer has a reference count of 1. | 500 | * The returned buffer has a reference count of 1. |
500 | */ | 501 | */ |
501 | 502 | ||
502 | struct sk_buff *pskb_copy(struct sk_buff *skb, int gfp_mask) | 503 | struct sk_buff *pskb_copy(struct sk_buff *skb, unsigned int __nocast gfp_mask) |
503 | { | 504 | { |
504 | /* | 505 | /* |
505 | * Allocate the copy buffer | 506 | * Allocate the copy buffer |
@@ -557,7 +558,8 @@ out: | |||
557 | * reloaded after call to this function. | 558 | * reloaded after call to this function. |
558 | */ | 559 | */ |
559 | 560 | ||
560 | int pskb_expand_head(struct sk_buff *skb, int nhead, int ntail, int gfp_mask) | 561 | int pskb_expand_head(struct sk_buff *skb, int nhead, int ntail, |
562 | unsigned int __nocast gfp_mask) | ||
561 | { | 563 | { |
562 | int i; | 564 | int i; |
563 | u8 *data; | 565 | u8 *data; |
@@ -647,7 +649,8 @@ struct sk_buff *skb_realloc_headroom(struct sk_buff *skb, unsigned int headroom) | |||
647 | * only by netfilter in the cases when checksum is recalculated? --ANK | 649 | * only by netfilter in the cases when checksum is recalculated? --ANK |
648 | */ | 650 | */ |
649 | struct sk_buff *skb_copy_expand(const struct sk_buff *skb, | 651 | struct sk_buff *skb_copy_expand(const struct sk_buff *skb, |
650 | int newheadroom, int newtailroom, int gfp_mask) | 652 | int newheadroom, int newtailroom, |
653 | unsigned int __nocast gfp_mask) | ||
651 | { | 654 | { |
652 | /* | 655 | /* |
653 | * Allocate the copy buffer | 656 | * Allocate the copy buffer |
diff --git a/net/core/sock.c b/net/core/sock.c index a6ec3ada7f9e..8b35ccdc2b3b 100644 --- a/net/core/sock.c +++ b/net/core/sock.c | |||
@@ -622,7 +622,8 @@ lenout: | |||
622 | * @prot: struct proto associated with this new sock instance | 622 | * @prot: struct proto associated with this new sock instance |
623 | * @zero_it: if we should zero the newly allocated sock | 623 | * @zero_it: if we should zero the newly allocated sock |
624 | */ | 624 | */ |
625 | struct sock *sk_alloc(int family, int priority, struct proto *prot, int zero_it) | 625 | struct sock *sk_alloc(int family, unsigned int __nocast priority, |
626 | struct proto *prot, int zero_it) | ||
626 | { | 627 | { |
627 | struct sock *sk = NULL; | 628 | struct sock *sk = NULL; |
628 | kmem_cache_t *slab = prot->slab; | 629 | kmem_cache_t *slab = prot->slab; |
@@ -750,7 +751,8 @@ unsigned long sock_i_ino(struct sock *sk) | |||
750 | /* | 751 | /* |
751 | * Allocate a skb from the socket's send buffer. | 752 | * Allocate a skb from the socket's send buffer. |
752 | */ | 753 | */ |
753 | struct sk_buff *sock_wmalloc(struct sock *sk, unsigned long size, int force, int priority) | 754 | struct sk_buff *sock_wmalloc(struct sock *sk, unsigned long size, int force, |
755 | unsigned int __nocast priority) | ||
754 | { | 756 | { |
755 | if (force || atomic_read(&sk->sk_wmem_alloc) < sk->sk_sndbuf) { | 757 | if (force || atomic_read(&sk->sk_wmem_alloc) < sk->sk_sndbuf) { |
756 | struct sk_buff * skb = alloc_skb(size, priority); | 758 | struct sk_buff * skb = alloc_skb(size, priority); |
@@ -765,7 +767,8 @@ struct sk_buff *sock_wmalloc(struct sock *sk, unsigned long size, int force, int | |||
765 | /* | 767 | /* |
766 | * Allocate a skb from the socket's receive buffer. | 768 | * Allocate a skb from the socket's receive buffer. |
767 | */ | 769 | */ |
768 | struct sk_buff *sock_rmalloc(struct sock *sk, unsigned long size, int force, int priority) | 770 | struct sk_buff *sock_rmalloc(struct sock *sk, unsigned long size, int force, |
771 | unsigned int __nocast priority) | ||
769 | { | 772 | { |
770 | if (force || atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf) { | 773 | if (force || atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf) { |
771 | struct sk_buff *skb = alloc_skb(size, priority); | 774 | struct sk_buff *skb = alloc_skb(size, priority); |
@@ -780,7 +783,7 @@ struct sk_buff *sock_rmalloc(struct sock *sk, unsigned long size, int force, int | |||
780 | /* | 783 | /* |
781 | * Allocate a memory block from the socket's option memory buffer. | 784 | * Allocate a memory block from the socket's option memory buffer. |
782 | */ | 785 | */ |
783 | void *sock_kmalloc(struct sock *sk, int size, int priority) | 786 | void *sock_kmalloc(struct sock *sk, int size, unsigned int __nocast priority) |
784 | { | 787 | { |
785 | if ((unsigned)size <= sysctl_optmem_max && | 788 | if ((unsigned)size <= sysctl_optmem_max && |
786 | atomic_read(&sk->sk_omem_alloc) + size < sysctl_optmem_max) { | 789 | atomic_read(&sk->sk_omem_alloc) + size < sysctl_optmem_max) { |
diff --git a/net/decnet/af_decnet.c b/net/decnet/af_decnet.c index 29bb3cd21965..96a02800cd28 100644 --- a/net/decnet/af_decnet.c +++ b/net/decnet/af_decnet.c | |||
@@ -536,7 +536,7 @@ static void dn_keepalive(struct sock *sk) | |||
536 | * we are double checking that we are not sending too | 536 | * we are double checking that we are not sending too |
537 | * many of these keepalive frames. | 537 | * many of these keepalive frames. |
538 | */ | 538 | */ |
539 | if (skb_queue_len(&scp->other_xmit_queue) == 0) | 539 | if (skb_queue_empty(&scp->other_xmit_queue)) |
540 | dn_nsp_send_link(sk, DN_NOCHANGE, 0); | 540 | dn_nsp_send_link(sk, DN_NOCHANGE, 0); |
541 | } | 541 | } |
542 | 542 | ||
@@ -1191,7 +1191,7 @@ static unsigned int dn_poll(struct file *file, struct socket *sock, poll_table | |||
1191 | struct dn_scp *scp = DN_SK(sk); | 1191 | struct dn_scp *scp = DN_SK(sk); |
1192 | int mask = datagram_poll(file, sock, wait); | 1192 | int mask = datagram_poll(file, sock, wait); |
1193 | 1193 | ||
1194 | if (skb_queue_len(&scp->other_receive_queue)) | 1194 | if (!skb_queue_empty(&scp->other_receive_queue)) |
1195 | mask |= POLLRDBAND; | 1195 | mask |= POLLRDBAND; |
1196 | 1196 | ||
1197 | return mask; | 1197 | return mask; |
@@ -1214,7 +1214,7 @@ static int dn_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg) | |||
1214 | 1214 | ||
1215 | case SIOCATMARK: | 1215 | case SIOCATMARK: |
1216 | lock_sock(sk); | 1216 | lock_sock(sk); |
1217 | val = (skb_queue_len(&scp->other_receive_queue) != 0); | 1217 | val = !skb_queue_empty(&scp->other_receive_queue); |
1218 | if (scp->state != DN_RUN) | 1218 | if (scp->state != DN_RUN) |
1219 | val = -ENOTCONN; | 1219 | val = -ENOTCONN; |
1220 | release_sock(sk); | 1220 | release_sock(sk); |
@@ -1630,7 +1630,7 @@ static int dn_data_ready(struct sock *sk, struct sk_buff_head *q, int flags, int | |||
1630 | int len = 0; | 1630 | int len = 0; |
1631 | 1631 | ||
1632 | if (flags & MSG_OOB) | 1632 | if (flags & MSG_OOB) |
1633 | return skb_queue_len(q) ? 1 : 0; | 1633 | return !skb_queue_empty(q) ? 1 : 0; |
1634 | 1634 | ||
1635 | while(skb != (struct sk_buff *)q) { | 1635 | while(skb != (struct sk_buff *)q) { |
1636 | struct dn_skb_cb *cb = DN_SKB_CB(skb); | 1636 | struct dn_skb_cb *cb = DN_SKB_CB(skb); |
@@ -1707,7 +1707,7 @@ static int dn_recvmsg(struct kiocb *iocb, struct socket *sock, | |||
1707 | if (sk->sk_err) | 1707 | if (sk->sk_err) |
1708 | goto out; | 1708 | goto out; |
1709 | 1709 | ||
1710 | if (skb_queue_len(&scp->other_receive_queue)) { | 1710 | if (!skb_queue_empty(&scp->other_receive_queue)) { |
1711 | if (!(flags & MSG_OOB)) { | 1711 | if (!(flags & MSG_OOB)) { |
1712 | msg->msg_flags |= MSG_OOB; | 1712 | msg->msg_flags |= MSG_OOB; |
1713 | if (!scp->other_report) { | 1713 | if (!scp->other_report) { |
diff --git a/net/decnet/dn_nsp_out.c b/net/decnet/dn_nsp_out.c index 42abbf3f524f..8cce1fdbda90 100644 --- a/net/decnet/dn_nsp_out.c +++ b/net/decnet/dn_nsp_out.c | |||
@@ -342,7 +342,8 @@ int dn_nsp_xmit_timeout(struct sock *sk) | |||
342 | 342 | ||
343 | dn_nsp_output(sk); | 343 | dn_nsp_output(sk); |
344 | 344 | ||
345 | if (skb_queue_len(&scp->data_xmit_queue) || skb_queue_len(&scp->other_xmit_queue)) | 345 | if (!skb_queue_empty(&scp->data_xmit_queue) || |
346 | !skb_queue_empty(&scp->other_xmit_queue)) | ||
346 | scp->persist = dn_nsp_persist(sk); | 347 | scp->persist = dn_nsp_persist(sk); |
347 | 348 | ||
348 | return 0; | 349 | return 0; |
diff --git a/net/ipv4/icmp.c b/net/ipv4/icmp.c index cb759484979d..279f57abfecb 100644 --- a/net/ipv4/icmp.c +++ b/net/ipv4/icmp.c | |||
@@ -970,7 +970,8 @@ int icmp_rcv(struct sk_buff *skb) | |||
970 | * RFC 1122: 3.2.2.8 An ICMP_TIMESTAMP MAY be silently | 970 | * RFC 1122: 3.2.2.8 An ICMP_TIMESTAMP MAY be silently |
971 | * discarded if to broadcast/multicast. | 971 | * discarded if to broadcast/multicast. |
972 | */ | 972 | */ |
973 | if (icmph->type == ICMP_ECHO && | 973 | if ((icmph->type == ICMP_ECHO || |
974 | icmph->type == ICMP_TIMESTAMP) && | ||
974 | sysctl_icmp_echo_ignore_broadcasts) { | 975 | sysctl_icmp_echo_ignore_broadcasts) { |
975 | goto error; | 976 | goto error; |
976 | } | 977 | } |
diff --git a/net/ipv4/igmp.c b/net/ipv4/igmp.c index 1f3183168a90..5088f90835ae 100644 --- a/net/ipv4/igmp.c +++ b/net/ipv4/igmp.c | |||
@@ -1615,9 +1615,10 @@ int ip_mc_join_group(struct sock *sk , struct ip_mreqn *imr) | |||
1615 | { | 1615 | { |
1616 | int err; | 1616 | int err; |
1617 | u32 addr = imr->imr_multiaddr.s_addr; | 1617 | u32 addr = imr->imr_multiaddr.s_addr; |
1618 | struct ip_mc_socklist *iml, *i; | 1618 | struct ip_mc_socklist *iml=NULL, *i; |
1619 | struct in_device *in_dev; | 1619 | struct in_device *in_dev; |
1620 | struct inet_sock *inet = inet_sk(sk); | 1620 | struct inet_sock *inet = inet_sk(sk); |
1621 | int ifindex; | ||
1621 | int count = 0; | 1622 | int count = 0; |
1622 | 1623 | ||
1623 | if (!MULTICAST(addr)) | 1624 | if (!MULTICAST(addr)) |
@@ -1633,37 +1634,30 @@ int ip_mc_join_group(struct sock *sk , struct ip_mreqn *imr) | |||
1633 | goto done; | 1634 | goto done; |
1634 | } | 1635 | } |
1635 | 1636 | ||
1636 | iml = (struct ip_mc_socklist *)sock_kmalloc(sk, sizeof(*iml), GFP_KERNEL); | ||
1637 | |||
1638 | err = -EADDRINUSE; | 1637 | err = -EADDRINUSE; |
1638 | ifindex = imr->imr_ifindex; | ||
1639 | for (i = inet->mc_list; i; i = i->next) { | 1639 | for (i = inet->mc_list; i; i = i->next) { |
1640 | if (memcmp(&i->multi, imr, sizeof(*imr)) == 0) { | 1640 | if (i->multi.imr_multiaddr.s_addr == addr && |
1641 | /* New style additions are reference counted */ | 1641 | i->multi.imr_ifindex == ifindex) |
1642 | if (imr->imr_address.s_addr == 0) { | ||
1643 | i->count++; | ||
1644 | err = 0; | ||
1645 | } | ||
1646 | goto done; | 1642 | goto done; |
1647 | } | ||
1648 | count++; | 1643 | count++; |
1649 | } | 1644 | } |
1650 | err = -ENOBUFS; | 1645 | err = -ENOBUFS; |
1651 | if (iml == NULL || count >= sysctl_igmp_max_memberships) | 1646 | if (count >= sysctl_igmp_max_memberships) |
1647 | goto done; | ||
1648 | iml = (struct ip_mc_socklist *)sock_kmalloc(sk,sizeof(*iml),GFP_KERNEL); | ||
1649 | if (iml == NULL) | ||
1652 | goto done; | 1650 | goto done; |
1651 | |||
1653 | memcpy(&iml->multi, imr, sizeof(*imr)); | 1652 | memcpy(&iml->multi, imr, sizeof(*imr)); |
1654 | iml->next = inet->mc_list; | 1653 | iml->next = inet->mc_list; |
1655 | iml->count = 1; | ||
1656 | iml->sflist = NULL; | 1654 | iml->sflist = NULL; |
1657 | iml->sfmode = MCAST_EXCLUDE; | 1655 | iml->sfmode = MCAST_EXCLUDE; |
1658 | inet->mc_list = iml; | 1656 | inet->mc_list = iml; |
1659 | ip_mc_inc_group(in_dev, addr); | 1657 | ip_mc_inc_group(in_dev, addr); |
1660 | iml = NULL; | ||
1661 | err = 0; | 1658 | err = 0; |
1662 | |||
1663 | done: | 1659 | done: |
1664 | rtnl_shunlock(); | 1660 | rtnl_shunlock(); |
1665 | if (iml) | ||
1666 | sock_kfree_s(sk, iml, sizeof(*iml)); | ||
1667 | return err; | 1661 | return err; |
1668 | } | 1662 | } |
1669 | 1663 | ||
@@ -1693,30 +1687,25 @@ int ip_mc_leave_group(struct sock *sk, struct ip_mreqn *imr) | |||
1693 | { | 1687 | { |
1694 | struct inet_sock *inet = inet_sk(sk); | 1688 | struct inet_sock *inet = inet_sk(sk); |
1695 | struct ip_mc_socklist *iml, **imlp; | 1689 | struct ip_mc_socklist *iml, **imlp; |
1690 | struct in_device *in_dev; | ||
1691 | u32 group = imr->imr_multiaddr.s_addr; | ||
1692 | u32 ifindex; | ||
1696 | 1693 | ||
1697 | rtnl_lock(); | 1694 | rtnl_lock(); |
1695 | in_dev = ip_mc_find_dev(imr); | ||
1696 | if (!in_dev) { | ||
1697 | rtnl_unlock(); | ||
1698 | return -ENODEV; | ||
1699 | } | ||
1700 | ifindex = imr->imr_ifindex; | ||
1698 | for (imlp = &inet->mc_list; (iml = *imlp) != NULL; imlp = &iml->next) { | 1701 | for (imlp = &inet->mc_list; (iml = *imlp) != NULL; imlp = &iml->next) { |
1699 | if (iml->multi.imr_multiaddr.s_addr==imr->imr_multiaddr.s_addr && | 1702 | if (iml->multi.imr_multiaddr.s_addr == group && |
1700 | iml->multi.imr_address.s_addr==imr->imr_address.s_addr && | 1703 | iml->multi.imr_ifindex == ifindex) { |
1701 | (!imr->imr_ifindex || iml->multi.imr_ifindex==imr->imr_ifindex)) { | 1704 | (void) ip_mc_leave_src(sk, iml, in_dev); |
1702 | struct in_device *in_dev; | ||
1703 | |||
1704 | in_dev = inetdev_by_index(iml->multi.imr_ifindex); | ||
1705 | if (in_dev) | ||
1706 | (void) ip_mc_leave_src(sk, iml, in_dev); | ||
1707 | if (--iml->count) { | ||
1708 | rtnl_unlock(); | ||
1709 | if (in_dev) | ||
1710 | in_dev_put(in_dev); | ||
1711 | return 0; | ||
1712 | } | ||
1713 | 1705 | ||
1714 | *imlp = iml->next; | 1706 | *imlp = iml->next; |
1715 | 1707 | ||
1716 | if (in_dev) { | 1708 | ip_mc_dec_group(in_dev, group); |
1717 | ip_mc_dec_group(in_dev, imr->imr_multiaddr.s_addr); | ||
1718 | in_dev_put(in_dev); | ||
1719 | } | ||
1720 | rtnl_unlock(); | 1709 | rtnl_unlock(); |
1721 | sock_kfree_s(sk, iml, sizeof(*iml)); | 1710 | sock_kfree_s(sk, iml, sizeof(*iml)); |
1722 | return 0; | 1711 | return 0; |
@@ -1736,6 +1725,7 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct | |||
1736 | struct in_device *in_dev = NULL; | 1725 | struct in_device *in_dev = NULL; |
1737 | struct inet_sock *inet = inet_sk(sk); | 1726 | struct inet_sock *inet = inet_sk(sk); |
1738 | struct ip_sf_socklist *psl; | 1727 | struct ip_sf_socklist *psl; |
1728 | int leavegroup = 0; | ||
1739 | int i, j, rv; | 1729 | int i, j, rv; |
1740 | 1730 | ||
1741 | if (!MULTICAST(addr)) | 1731 | if (!MULTICAST(addr)) |
@@ -1755,15 +1745,20 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct | |||
1755 | err = -EADDRNOTAVAIL; | 1745 | err = -EADDRNOTAVAIL; |
1756 | 1746 | ||
1757 | for (pmc=inet->mc_list; pmc; pmc=pmc->next) { | 1747 | for (pmc=inet->mc_list; pmc; pmc=pmc->next) { |
1758 | if (memcmp(&pmc->multi, mreqs, 2*sizeof(__u32)) == 0) | 1748 | if (pmc->multi.imr_multiaddr.s_addr == imr.imr_multiaddr.s_addr |
1749 | && pmc->multi.imr_ifindex == imr.imr_ifindex) | ||
1759 | break; | 1750 | break; |
1760 | } | 1751 | } |
1761 | if (!pmc) /* must have a prior join */ | 1752 | if (!pmc) { /* must have a prior join */ |
1753 | err = -EINVAL; | ||
1762 | goto done; | 1754 | goto done; |
1755 | } | ||
1763 | /* if a source filter was set, must be the same mode as before */ | 1756 | /* if a source filter was set, must be the same mode as before */ |
1764 | if (pmc->sflist) { | 1757 | if (pmc->sflist) { |
1765 | if (pmc->sfmode != omode) | 1758 | if (pmc->sfmode != omode) { |
1759 | err = -EINVAL; | ||
1766 | goto done; | 1760 | goto done; |
1761 | } | ||
1767 | } else if (pmc->sfmode != omode) { | 1762 | } else if (pmc->sfmode != omode) { |
1768 | /* allow mode switches for empty-set filters */ | 1763 | /* allow mode switches for empty-set filters */ |
1769 | ip_mc_add_src(in_dev, &mreqs->imr_multiaddr, omode, 0, NULL, 0); | 1764 | ip_mc_add_src(in_dev, &mreqs->imr_multiaddr, omode, 0, NULL, 0); |
@@ -1775,7 +1770,7 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct | |||
1775 | psl = pmc->sflist; | 1770 | psl = pmc->sflist; |
1776 | if (!add) { | 1771 | if (!add) { |
1777 | if (!psl) | 1772 | if (!psl) |
1778 | goto done; | 1773 | goto done; /* err = -EADDRNOTAVAIL */ |
1779 | rv = !0; | 1774 | rv = !0; |
1780 | for (i=0; i<psl->sl_count; i++) { | 1775 | for (i=0; i<psl->sl_count; i++) { |
1781 | rv = memcmp(&psl->sl_addr[i], &mreqs->imr_sourceaddr, | 1776 | rv = memcmp(&psl->sl_addr[i], &mreqs->imr_sourceaddr, |
@@ -1784,7 +1779,13 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct | |||
1784 | break; | 1779 | break; |
1785 | } | 1780 | } |
1786 | if (rv) /* source not found */ | 1781 | if (rv) /* source not found */ |
1782 | goto done; /* err = -EADDRNOTAVAIL */ | ||
1783 | |||
1784 | /* special case - (INCLUDE, empty) == LEAVE_GROUP */ | ||
1785 | if (psl->sl_count == 1 && omode == MCAST_INCLUDE) { | ||
1786 | leavegroup = 1; | ||
1787 | goto done; | 1787 | goto done; |
1788 | } | ||
1788 | 1789 | ||
1789 | /* update the interface filter */ | 1790 | /* update the interface filter */ |
1790 | ip_mc_del_src(in_dev, &mreqs->imr_multiaddr, omode, 1, | 1791 | ip_mc_del_src(in_dev, &mreqs->imr_multiaddr, omode, 1, |
@@ -1842,18 +1843,21 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct | |||
1842 | &mreqs->imr_sourceaddr, 1); | 1843 | &mreqs->imr_sourceaddr, 1); |
1843 | done: | 1844 | done: |
1844 | rtnl_shunlock(); | 1845 | rtnl_shunlock(); |
1846 | if (leavegroup) | ||
1847 | return ip_mc_leave_group(sk, &imr); | ||
1845 | return err; | 1848 | return err; |
1846 | } | 1849 | } |
1847 | 1850 | ||
1848 | int ip_mc_msfilter(struct sock *sk, struct ip_msfilter *msf, int ifindex) | 1851 | int ip_mc_msfilter(struct sock *sk, struct ip_msfilter *msf, int ifindex) |
1849 | { | 1852 | { |
1850 | int err; | 1853 | int err = 0; |
1851 | struct ip_mreqn imr; | 1854 | struct ip_mreqn imr; |
1852 | u32 addr = msf->imsf_multiaddr; | 1855 | u32 addr = msf->imsf_multiaddr; |
1853 | struct ip_mc_socklist *pmc; | 1856 | struct ip_mc_socklist *pmc; |
1854 | struct in_device *in_dev; | 1857 | struct in_device *in_dev; |
1855 | struct inet_sock *inet = inet_sk(sk); | 1858 | struct inet_sock *inet = inet_sk(sk); |
1856 | struct ip_sf_socklist *newpsl, *psl; | 1859 | struct ip_sf_socklist *newpsl, *psl; |
1860 | int leavegroup = 0; | ||
1857 | 1861 | ||
1858 | if (!MULTICAST(addr)) | 1862 | if (!MULTICAST(addr)) |
1859 | return -EINVAL; | 1863 | return -EINVAL; |
@@ -1872,15 +1876,22 @@ int ip_mc_msfilter(struct sock *sk, struct ip_msfilter *msf, int ifindex) | |||
1872 | err = -ENODEV; | 1876 | err = -ENODEV; |
1873 | goto done; | 1877 | goto done; |
1874 | } | 1878 | } |
1875 | err = -EADDRNOTAVAIL; | 1879 | |
1880 | /* special case - (INCLUDE, empty) == LEAVE_GROUP */ | ||
1881 | if (msf->imsf_fmode == MCAST_INCLUDE && msf->imsf_numsrc == 0) { | ||
1882 | leavegroup = 1; | ||
1883 | goto done; | ||
1884 | } | ||
1876 | 1885 | ||
1877 | for (pmc=inet->mc_list; pmc; pmc=pmc->next) { | 1886 | for (pmc=inet->mc_list; pmc; pmc=pmc->next) { |
1878 | if (pmc->multi.imr_multiaddr.s_addr == msf->imsf_multiaddr && | 1887 | if (pmc->multi.imr_multiaddr.s_addr == msf->imsf_multiaddr && |
1879 | pmc->multi.imr_ifindex == imr.imr_ifindex) | 1888 | pmc->multi.imr_ifindex == imr.imr_ifindex) |
1880 | break; | 1889 | break; |
1881 | } | 1890 | } |
1882 | if (!pmc) /* must have a prior join */ | 1891 | if (!pmc) { /* must have a prior join */ |
1892 | err = -EINVAL; | ||
1883 | goto done; | 1893 | goto done; |
1894 | } | ||
1884 | if (msf->imsf_numsrc) { | 1895 | if (msf->imsf_numsrc) { |
1885 | newpsl = (struct ip_sf_socklist *)sock_kmalloc(sk, | 1896 | newpsl = (struct ip_sf_socklist *)sock_kmalloc(sk, |
1886 | IP_SFLSIZE(msf->imsf_numsrc), GFP_KERNEL); | 1897 | IP_SFLSIZE(msf->imsf_numsrc), GFP_KERNEL); |
@@ -1909,8 +1920,11 @@ int ip_mc_msfilter(struct sock *sk, struct ip_msfilter *msf, int ifindex) | |||
1909 | 0, NULL, 0); | 1920 | 0, NULL, 0); |
1910 | pmc->sflist = newpsl; | 1921 | pmc->sflist = newpsl; |
1911 | pmc->sfmode = msf->imsf_fmode; | 1922 | pmc->sfmode = msf->imsf_fmode; |
1923 | err = 0; | ||
1912 | done: | 1924 | done: |
1913 | rtnl_shunlock(); | 1925 | rtnl_shunlock(); |
1926 | if (leavegroup) | ||
1927 | err = ip_mc_leave_group(sk, &imr); | ||
1914 | return err; | 1928 | return err; |
1915 | } | 1929 | } |
1916 | 1930 | ||
diff --git a/net/ipv4/ip_sockglue.c b/net/ipv4/ip_sockglue.c index f8b172f89811..fc7c481d0d79 100644 --- a/net/ipv4/ip_sockglue.c +++ b/net/ipv4/ip_sockglue.c | |||
@@ -677,11 +677,11 @@ int ip_setsockopt(struct sock *sk, int level, int optname, char __user *optval, | |||
677 | mreq.imr_address.s_addr = mreqs.imr_interface; | 677 | mreq.imr_address.s_addr = mreqs.imr_interface; |
678 | mreq.imr_ifindex = 0; | 678 | mreq.imr_ifindex = 0; |
679 | err = ip_mc_join_group(sk, &mreq); | 679 | err = ip_mc_join_group(sk, &mreq); |
680 | if (err) | 680 | if (err && err != -EADDRINUSE) |
681 | break; | 681 | break; |
682 | omode = MCAST_INCLUDE; | 682 | omode = MCAST_INCLUDE; |
683 | add = 1; | 683 | add = 1; |
684 | } else /*IP_DROP_SOURCE_MEMBERSHIP */ { | 684 | } else /* IP_DROP_SOURCE_MEMBERSHIP */ { |
685 | omode = MCAST_INCLUDE; | 685 | omode = MCAST_INCLUDE; |
686 | add = 0; | 686 | add = 0; |
687 | } | 687 | } |
@@ -754,7 +754,7 @@ int ip_setsockopt(struct sock *sk, int level, int optname, char __user *optval, | |||
754 | mreq.imr_address.s_addr = 0; | 754 | mreq.imr_address.s_addr = 0; |
755 | mreq.imr_ifindex = greqs.gsr_interface; | 755 | mreq.imr_ifindex = greqs.gsr_interface; |
756 | err = ip_mc_join_group(sk, &mreq); | 756 | err = ip_mc_join_group(sk, &mreq); |
757 | if (err) | 757 | if (err && err != -EADDRINUSE) |
758 | break; | 758 | break; |
759 | greqs.gsr_interface = mreq.imr_ifindex; | 759 | greqs.gsr_interface = mreq.imr_ifindex; |
760 | omode = MCAST_INCLUDE; | 760 | omode = MCAST_INCLUDE; |
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c index 29894c749163..ddb6ce4ecff2 100644 --- a/net/ipv4/tcp.c +++ b/net/ipv4/tcp.c | |||
@@ -1105,7 +1105,7 @@ static void tcp_prequeue_process(struct sock *sk) | |||
1105 | struct sk_buff *skb; | 1105 | struct sk_buff *skb; |
1106 | struct tcp_sock *tp = tcp_sk(sk); | 1106 | struct tcp_sock *tp = tcp_sk(sk); |
1107 | 1107 | ||
1108 | NET_ADD_STATS_USER(LINUX_MIB_TCPPREQUEUED, skb_queue_len(&tp->ucopy.prequeue)); | 1108 | NET_INC_STATS_USER(LINUX_MIB_TCPPREQUEUED); |
1109 | 1109 | ||
1110 | /* RX process wants to run with disabled BHs, though it is not | 1110 | /* RX process wants to run with disabled BHs, though it is not |
1111 | * necessary */ | 1111 | * necessary */ |
@@ -1369,7 +1369,7 @@ int tcp_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg, | |||
1369 | * is not empty. It is more elegant, but eats cycles, | 1369 | * is not empty. It is more elegant, but eats cycles, |
1370 | * unfortunately. | 1370 | * unfortunately. |
1371 | */ | 1371 | */ |
1372 | if (skb_queue_len(&tp->ucopy.prequeue)) | 1372 | if (!skb_queue_empty(&tp->ucopy.prequeue)) |
1373 | goto do_prequeue; | 1373 | goto do_prequeue; |
1374 | 1374 | ||
1375 | /* __ Set realtime policy in scheduler __ */ | 1375 | /* __ Set realtime policy in scheduler __ */ |
@@ -1394,7 +1394,7 @@ int tcp_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg, | |||
1394 | } | 1394 | } |
1395 | 1395 | ||
1396 | if (tp->rcv_nxt == tp->copied_seq && | 1396 | if (tp->rcv_nxt == tp->copied_seq && |
1397 | skb_queue_len(&tp->ucopy.prequeue)) { | 1397 | !skb_queue_empty(&tp->ucopy.prequeue)) { |
1398 | do_prequeue: | 1398 | do_prequeue: |
1399 | tcp_prequeue_process(sk); | 1399 | tcp_prequeue_process(sk); |
1400 | 1400 | ||
@@ -1476,7 +1476,7 @@ skip_copy: | |||
1476 | } while (len > 0); | 1476 | } while (len > 0); |
1477 | 1477 | ||
1478 | if (user_recv) { | 1478 | if (user_recv) { |
1479 | if (skb_queue_len(&tp->ucopy.prequeue)) { | 1479 | if (!skb_queue_empty(&tp->ucopy.prequeue)) { |
1480 | int chunk; | 1480 | int chunk; |
1481 | 1481 | ||
1482 | tp->ucopy.len = copied > 0 ? len : 0; | 1482 | tp->ucopy.len = copied > 0 ? len : 0; |
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c index 8de2f1071c2b..53a8a5399f1e 100644 --- a/net/ipv4/tcp_input.c +++ b/net/ipv4/tcp_input.c | |||
@@ -2802,7 +2802,7 @@ static void tcp_sack_remove(struct tcp_sock *tp) | |||
2802 | int this_sack; | 2802 | int this_sack; |
2803 | 2803 | ||
2804 | /* Empty ofo queue, hence, all the SACKs are eaten. Clear. */ | 2804 | /* Empty ofo queue, hence, all the SACKs are eaten. Clear. */ |
2805 | if (skb_queue_len(&tp->out_of_order_queue) == 0) { | 2805 | if (skb_queue_empty(&tp->out_of_order_queue)) { |
2806 | tp->rx_opt.num_sacks = 0; | 2806 | tp->rx_opt.num_sacks = 0; |
2807 | tp->rx_opt.eff_sacks = tp->rx_opt.dsack; | 2807 | tp->rx_opt.eff_sacks = tp->rx_opt.dsack; |
2808 | return; | 2808 | return; |
@@ -2935,13 +2935,13 @@ queue_and_out: | |||
2935 | if(th->fin) | 2935 | if(th->fin) |
2936 | tcp_fin(skb, sk, th); | 2936 | tcp_fin(skb, sk, th); |
2937 | 2937 | ||
2938 | if (skb_queue_len(&tp->out_of_order_queue)) { | 2938 | if (!skb_queue_empty(&tp->out_of_order_queue)) { |
2939 | tcp_ofo_queue(sk); | 2939 | tcp_ofo_queue(sk); |
2940 | 2940 | ||
2941 | /* RFC2581. 4.2. SHOULD send immediate ACK, when | 2941 | /* RFC2581. 4.2. SHOULD send immediate ACK, when |
2942 | * gap in queue is filled. | 2942 | * gap in queue is filled. |
2943 | */ | 2943 | */ |
2944 | if (!skb_queue_len(&tp->out_of_order_queue)) | 2944 | if (skb_queue_empty(&tp->out_of_order_queue)) |
2945 | tp->ack.pingpong = 0; | 2945 | tp->ack.pingpong = 0; |
2946 | } | 2946 | } |
2947 | 2947 | ||
@@ -3249,9 +3249,8 @@ static int tcp_prune_queue(struct sock *sk) | |||
3249 | * This must not ever occur. */ | 3249 | * This must not ever occur. */ |
3250 | 3250 | ||
3251 | /* First, purge the out_of_order queue. */ | 3251 | /* First, purge the out_of_order queue. */ |
3252 | if (skb_queue_len(&tp->out_of_order_queue)) { | 3252 | if (!skb_queue_empty(&tp->out_of_order_queue)) { |
3253 | NET_ADD_STATS_BH(LINUX_MIB_OFOPRUNED, | 3253 | NET_INC_STATS_BH(LINUX_MIB_OFOPRUNED); |
3254 | skb_queue_len(&tp->out_of_order_queue)); | ||
3255 | __skb_queue_purge(&tp->out_of_order_queue); | 3254 | __skb_queue_purge(&tp->out_of_order_queue); |
3256 | 3255 | ||
3257 | /* Reset SACK state. A conforming SACK implementation will | 3256 | /* Reset SACK state. A conforming SACK implementation will |
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c index e041d057ec86..e3f8ea1bfa9c 100644 --- a/net/ipv4/tcp_output.c +++ b/net/ipv4/tcp_output.c | |||
@@ -1613,7 +1613,7 @@ void tcp_send_fin(struct sock *sk) | |||
1613 | * was unread data in the receive queue. This behavior is recommended | 1613 | * was unread data in the receive queue. This behavior is recommended |
1614 | * by draft-ietf-tcpimpl-prob-03.txt section 3.10. -DaveM | 1614 | * by draft-ietf-tcpimpl-prob-03.txt section 3.10. -DaveM |
1615 | */ | 1615 | */ |
1616 | void tcp_send_active_reset(struct sock *sk, int priority) | 1616 | void tcp_send_active_reset(struct sock *sk, unsigned int __nocast priority) |
1617 | { | 1617 | { |
1618 | struct tcp_sock *tp = tcp_sk(sk); | 1618 | struct tcp_sock *tp = tcp_sk(sk); |
1619 | struct sk_buff *skb; | 1619 | struct sk_buff *skb; |
diff --git a/net/ipv4/tcp_timer.c b/net/ipv4/tcp_timer.c index b127b4498565..0084227438c2 100644 --- a/net/ipv4/tcp_timer.c +++ b/net/ipv4/tcp_timer.c | |||
@@ -231,11 +231,10 @@ static void tcp_delack_timer(unsigned long data) | |||
231 | } | 231 | } |
232 | tp->ack.pending &= ~TCP_ACK_TIMER; | 232 | tp->ack.pending &= ~TCP_ACK_TIMER; |
233 | 233 | ||
234 | if (skb_queue_len(&tp->ucopy.prequeue)) { | 234 | if (!skb_queue_empty(&tp->ucopy.prequeue)) { |
235 | struct sk_buff *skb; | 235 | struct sk_buff *skb; |
236 | 236 | ||
237 | NET_ADD_STATS_BH(LINUX_MIB_TCPSCHEDULERFAILED, | 237 | NET_INC_STATS_BH(LINUX_MIB_TCPSCHEDULERFAILED); |
238 | skb_queue_len(&tp->ucopy.prequeue)); | ||
239 | 238 | ||
240 | while ((skb = __skb_dequeue(&tp->ucopy.prequeue)) != NULL) | 239 | while ((skb = __skb_dequeue(&tp->ucopy.prequeue)) != NULL) |
241 | sk->sk_backlog_rcv(sk, skb); | 240 | sk->sk_backlog_rcv(sk, skb); |
diff --git a/net/ipv6/mcast.c b/net/ipv6/mcast.c index 562fcd14fdea..29fed6e58d0a 100644 --- a/net/ipv6/mcast.c +++ b/net/ipv6/mcast.c | |||
@@ -281,7 +281,7 @@ int ipv6_sock_mc_drop(struct sock *sk, int ifindex, struct in6_addr *addr) | |||
281 | } | 281 | } |
282 | write_unlock_bh(&ipv6_sk_mc_lock); | 282 | write_unlock_bh(&ipv6_sk_mc_lock); |
283 | 283 | ||
284 | return -ENOENT; | 284 | return -EADDRNOTAVAIL; |
285 | } | 285 | } |
286 | 286 | ||
287 | static struct inet6_dev *ip6_mc_find_dev(struct in6_addr *group, int ifindex) | 287 | static struct inet6_dev *ip6_mc_find_dev(struct in6_addr *group, int ifindex) |
@@ -386,12 +386,16 @@ int ip6_mc_source(int add, int omode, struct sock *sk, | |||
386 | if (ipv6_addr_equal(&pmc->addr, group)) | 386 | if (ipv6_addr_equal(&pmc->addr, group)) |
387 | break; | 387 | break; |
388 | } | 388 | } |
389 | if (!pmc) /* must have a prior join */ | 389 | if (!pmc) { /* must have a prior join */ |
390 | err = -EINVAL; | ||
390 | goto done; | 391 | goto done; |
392 | } | ||
391 | /* if a source filter was set, must be the same mode as before */ | 393 | /* if a source filter was set, must be the same mode as before */ |
392 | if (pmc->sflist) { | 394 | if (pmc->sflist) { |
393 | if (pmc->sfmode != omode) | 395 | if (pmc->sfmode != omode) { |
396 | err = -EINVAL; | ||
394 | goto done; | 397 | goto done; |
398 | } | ||
395 | } else if (pmc->sfmode != omode) { | 399 | } else if (pmc->sfmode != omode) { |
396 | /* allow mode switches for empty-set filters */ | 400 | /* allow mode switches for empty-set filters */ |
397 | ip6_mc_add_src(idev, group, omode, 0, NULL, 0); | 401 | ip6_mc_add_src(idev, group, omode, 0, NULL, 0); |
@@ -402,7 +406,7 @@ int ip6_mc_source(int add, int omode, struct sock *sk, | |||
402 | psl = pmc->sflist; | 406 | psl = pmc->sflist; |
403 | if (!add) { | 407 | if (!add) { |
404 | if (!psl) | 408 | if (!psl) |
405 | goto done; | 409 | goto done; /* err = -EADDRNOTAVAIL */ |
406 | rv = !0; | 410 | rv = !0; |
407 | for (i=0; i<psl->sl_count; i++) { | 411 | for (i=0; i<psl->sl_count; i++) { |
408 | rv = memcmp(&psl->sl_addr[i], source, | 412 | rv = memcmp(&psl->sl_addr[i], source, |
@@ -411,7 +415,7 @@ int ip6_mc_source(int add, int omode, struct sock *sk, | |||
411 | break; | 415 | break; |
412 | } | 416 | } |
413 | if (rv) /* source not found */ | 417 | if (rv) /* source not found */ |
414 | goto done; | 418 | goto done; /* err = -EADDRNOTAVAIL */ |
415 | 419 | ||
416 | /* special case - (INCLUDE, empty) == LEAVE_GROUP */ | 420 | /* special case - (INCLUDE, empty) == LEAVE_GROUP */ |
417 | if (psl->sl_count == 1 && omode == MCAST_INCLUDE) { | 421 | if (psl->sl_count == 1 && omode == MCAST_INCLUDE) { |
@@ -488,6 +492,7 @@ int ip6_mc_msfilter(struct sock *sk, struct group_filter *gsf) | |||
488 | struct inet6_dev *idev; | 492 | struct inet6_dev *idev; |
489 | struct ipv6_pinfo *inet6 = inet6_sk(sk); | 493 | struct ipv6_pinfo *inet6 = inet6_sk(sk); |
490 | struct ip6_sf_socklist *newpsl, *psl; | 494 | struct ip6_sf_socklist *newpsl, *psl; |
495 | int leavegroup = 0; | ||
491 | int i, err; | 496 | int i, err; |
492 | 497 | ||
493 | group = &((struct sockaddr_in6 *)&gsf->gf_group)->sin6_addr; | 498 | group = &((struct sockaddr_in6 *)&gsf->gf_group)->sin6_addr; |
@@ -503,7 +508,12 @@ int ip6_mc_msfilter(struct sock *sk, struct group_filter *gsf) | |||
503 | if (!idev) | 508 | if (!idev) |
504 | return -ENODEV; | 509 | return -ENODEV; |
505 | dev = idev->dev; | 510 | dev = idev->dev; |
506 | err = -EADDRNOTAVAIL; | 511 | |
512 | err = 0; | ||
513 | if (gsf->gf_fmode == MCAST_INCLUDE && gsf->gf_numsrc == 0) { | ||
514 | leavegroup = 1; | ||
515 | goto done; | ||
516 | } | ||
507 | 517 | ||
508 | for (pmc=inet6->ipv6_mc_list; pmc; pmc=pmc->next) { | 518 | for (pmc=inet6->ipv6_mc_list; pmc; pmc=pmc->next) { |
509 | if (pmc->ifindex != gsf->gf_interface) | 519 | if (pmc->ifindex != gsf->gf_interface) |
@@ -511,8 +521,10 @@ int ip6_mc_msfilter(struct sock *sk, struct group_filter *gsf) | |||
511 | if (ipv6_addr_equal(&pmc->addr, group)) | 521 | if (ipv6_addr_equal(&pmc->addr, group)) |
512 | break; | 522 | break; |
513 | } | 523 | } |
514 | if (!pmc) /* must have a prior join */ | 524 | if (!pmc) { /* must have a prior join */ |
525 | err = -EINVAL; | ||
515 | goto done; | 526 | goto done; |
527 | } | ||
516 | if (gsf->gf_numsrc) { | 528 | if (gsf->gf_numsrc) { |
517 | newpsl = (struct ip6_sf_socklist *)sock_kmalloc(sk, | 529 | newpsl = (struct ip6_sf_socklist *)sock_kmalloc(sk, |
518 | IP6_SFLSIZE(gsf->gf_numsrc), GFP_ATOMIC); | 530 | IP6_SFLSIZE(gsf->gf_numsrc), GFP_ATOMIC); |
@@ -544,10 +556,13 @@ int ip6_mc_msfilter(struct sock *sk, struct group_filter *gsf) | |||
544 | (void) ip6_mc_del_src(idev, group, pmc->sfmode, 0, NULL, 0); | 556 | (void) ip6_mc_del_src(idev, group, pmc->sfmode, 0, NULL, 0); |
545 | pmc->sflist = newpsl; | 557 | pmc->sflist = newpsl; |
546 | pmc->sfmode = gsf->gf_fmode; | 558 | pmc->sfmode = gsf->gf_fmode; |
559 | err = 0; | ||
547 | done: | 560 | done: |
548 | read_unlock_bh(&idev->lock); | 561 | read_unlock_bh(&idev->lock); |
549 | in6_dev_put(idev); | 562 | in6_dev_put(idev); |
550 | dev_put(dev); | 563 | dev_put(dev); |
564 | if (leavegroup) | ||
565 | err = ipv6_sock_mc_drop(sk, gsf->gf_interface, group); | ||
551 | return err; | 566 | return err; |
552 | } | 567 | } |
553 | 568 | ||
diff --git a/net/irda/irlap.c b/net/irda/irlap.c index 046ad0750e48..7029618f5719 100644 --- a/net/irda/irlap.c +++ b/net/irda/irlap.c | |||
@@ -445,9 +445,8 @@ void irlap_disconnect_request(struct irlap_cb *self) | |||
445 | IRDA_ASSERT(self->magic == LAP_MAGIC, return;); | 445 | IRDA_ASSERT(self->magic == LAP_MAGIC, return;); |
446 | 446 | ||
447 | /* Don't disconnect until all data frames are successfully sent */ | 447 | /* Don't disconnect until all data frames are successfully sent */ |
448 | if (skb_queue_len(&self->txq) > 0) { | 448 | if (!skb_queue_empty(&self->txq)) { |
449 | self->disconnect_pending = TRUE; | 449 | self->disconnect_pending = TRUE; |
450 | |||
451 | return; | 450 | return; |
452 | } | 451 | } |
453 | 452 | ||
diff --git a/net/irda/irlap_event.c b/net/irda/irlap_event.c index 1cd89f5f3b75..a505b5457608 100644 --- a/net/irda/irlap_event.c +++ b/net/irda/irlap_event.c | |||
@@ -191,7 +191,7 @@ static void irlap_start_poll_timer(struct irlap_cb *self, int timeout) | |||
191 | * Send out the RR frames faster if our own transmit queue is empty, or | 191 | * Send out the RR frames faster if our own transmit queue is empty, or |
192 | * if the peer is busy. The effect is a much faster conversation | 192 | * if the peer is busy. The effect is a much faster conversation |
193 | */ | 193 | */ |
194 | if ((skb_queue_len(&self->txq) == 0) || (self->remote_busy)) { | 194 | if (skb_queue_empty(&self->txq) || self->remote_busy) { |
195 | if (self->fast_RR == TRUE) { | 195 | if (self->fast_RR == TRUE) { |
196 | /* | 196 | /* |
197 | * Assert that the fast poll timer has not reached the | 197 | * Assert that the fast poll timer has not reached the |
@@ -263,7 +263,7 @@ void irlap_do_event(struct irlap_cb *self, IRLAP_EVENT event, | |||
263 | IRDA_DEBUG(2, "%s() : queue len = %d\n", __FUNCTION__, | 263 | IRDA_DEBUG(2, "%s() : queue len = %d\n", __FUNCTION__, |
264 | skb_queue_len(&self->txq)); | 264 | skb_queue_len(&self->txq)); |
265 | 265 | ||
266 | if (skb_queue_len(&self->txq)) { | 266 | if (!skb_queue_empty(&self->txq)) { |
267 | /* Prevent race conditions with irlap_data_request() */ | 267 | /* Prevent race conditions with irlap_data_request() */ |
268 | self->local_busy = TRUE; | 268 | self->local_busy = TRUE; |
269 | 269 | ||
@@ -1074,7 +1074,7 @@ static int irlap_state_xmit_p(struct irlap_cb *self, IRLAP_EVENT event, | |||
1074 | #else /* CONFIG_IRDA_DYNAMIC_WINDOW */ | 1074 | #else /* CONFIG_IRDA_DYNAMIC_WINDOW */ |
1075 | /* Window has been adjusted for the max packet | 1075 | /* Window has been adjusted for the max packet |
1076 | * size, so much simpler... - Jean II */ | 1076 | * size, so much simpler... - Jean II */ |
1077 | nextfit = (skb_queue_len(&self->txq) > 0); | 1077 | nextfit = !skb_queue_empty(&self->txq); |
1078 | #endif /* CONFIG_IRDA_DYNAMIC_WINDOW */ | 1078 | #endif /* CONFIG_IRDA_DYNAMIC_WINDOW */ |
1079 | /* | 1079 | /* |
1080 | * Send data with poll bit cleared only if window > 1 | 1080 | * Send data with poll bit cleared only if window > 1 |
@@ -1814,7 +1814,7 @@ static int irlap_state_xmit_s(struct irlap_cb *self, IRLAP_EVENT event, | |||
1814 | #else /* CONFIG_IRDA_DYNAMIC_WINDOW */ | 1814 | #else /* CONFIG_IRDA_DYNAMIC_WINDOW */ |
1815 | /* Window has been adjusted for the max packet | 1815 | /* Window has been adjusted for the max packet |
1816 | * size, so much simpler... - Jean II */ | 1816 | * size, so much simpler... - Jean II */ |
1817 | nextfit = (skb_queue_len(&self->txq) > 0); | 1817 | nextfit = !skb_queue_empty(&self->txq); |
1818 | #endif /* CONFIG_IRDA_DYNAMIC_WINDOW */ | 1818 | #endif /* CONFIG_IRDA_DYNAMIC_WINDOW */ |
1819 | /* | 1819 | /* |
1820 | * Send data with final bit cleared only if window > 1 | 1820 | * Send data with final bit cleared only if window > 1 |
@@ -1937,7 +1937,7 @@ static int irlap_state_nrm_s(struct irlap_cb *self, IRLAP_EVENT event, | |||
1937 | irlap_data_indication(self, skb, FALSE); | 1937 | irlap_data_indication(self, skb, FALSE); |
1938 | 1938 | ||
1939 | /* Any pending data requests? */ | 1939 | /* Any pending data requests? */ |
1940 | if ((skb_queue_len(&self->txq) > 0) && | 1940 | if (!skb_queue_empty(&self->txq) && |
1941 | (self->window > 0)) | 1941 | (self->window > 0)) |
1942 | { | 1942 | { |
1943 | self->ack_required = TRUE; | 1943 | self->ack_required = TRUE; |
@@ -2038,7 +2038,7 @@ static int irlap_state_nrm_s(struct irlap_cb *self, IRLAP_EVENT event, | |||
2038 | /* | 2038 | /* |
2039 | * Any pending data requests? | 2039 | * Any pending data requests? |
2040 | */ | 2040 | */ |
2041 | if ((skb_queue_len(&self->txq) > 0) && | 2041 | if (!skb_queue_empty(&self->txq) && |
2042 | (self->window > 0) && !self->remote_busy) | 2042 | (self->window > 0) && !self->remote_busy) |
2043 | { | 2043 | { |
2044 | irlap_data_indication(self, skb, TRUE); | 2044 | irlap_data_indication(self, skb, TRUE); |
@@ -2069,7 +2069,7 @@ static int irlap_state_nrm_s(struct irlap_cb *self, IRLAP_EVENT event, | |||
2069 | */ | 2069 | */ |
2070 | nr_status = irlap_validate_nr_received(self, info->nr); | 2070 | nr_status = irlap_validate_nr_received(self, info->nr); |
2071 | if (nr_status == NR_EXPECTED) { | 2071 | if (nr_status == NR_EXPECTED) { |
2072 | if ((skb_queue_len( &self->txq) > 0) && | 2072 | if (!skb_queue_empty(&self->txq) && |
2073 | (self->window > 0)) { | 2073 | (self->window > 0)) { |
2074 | self->remote_busy = FALSE; | 2074 | self->remote_busy = FALSE; |
2075 | 2075 | ||
diff --git a/net/irda/irlap_frame.c b/net/irda/irlap_frame.c index 040abe714aa3..6dafbb43b529 100644 --- a/net/irda/irlap_frame.c +++ b/net/irda/irlap_frame.c | |||
@@ -1018,11 +1018,10 @@ void irlap_resend_rejected_frames(struct irlap_cb *self, int command) | |||
1018 | /* | 1018 | /* |
1019 | * We can now fill the window with additional data frames | 1019 | * We can now fill the window with additional data frames |
1020 | */ | 1020 | */ |
1021 | while (skb_queue_len( &self->txq) > 0) { | 1021 | while (!skb_queue_empty(&self->txq)) { |
1022 | 1022 | ||
1023 | IRDA_DEBUG(0, "%s(), sending additional frames!\n", __FUNCTION__); | 1023 | IRDA_DEBUG(0, "%s(), sending additional frames!\n", __FUNCTION__); |
1024 | if ((skb_queue_len( &self->txq) > 0) && | 1024 | if (self->window > 0) { |
1025 | (self->window > 0)) { | ||
1026 | skb = skb_dequeue( &self->txq); | 1025 | skb = skb_dequeue( &self->txq); |
1027 | IRDA_ASSERT(skb != NULL, return;); | 1026 | IRDA_ASSERT(skb != NULL, return;); |
1028 | 1027 | ||
@@ -1031,8 +1030,7 @@ void irlap_resend_rejected_frames(struct irlap_cb *self, int command) | |||
1031 | * bit cleared | 1030 | * bit cleared |
1032 | */ | 1031 | */ |
1033 | if ((self->window > 1) && | 1032 | if ((self->window > 1) && |
1034 | skb_queue_len(&self->txq) > 0) | 1033 | !skb_queue_empty(&self->txq)) { |
1035 | { | ||
1036 | irlap_send_data_primary(self, skb); | 1034 | irlap_send_data_primary(self, skb); |
1037 | } else { | 1035 | } else { |
1038 | irlap_send_data_primary_poll(self, skb); | 1036 | irlap_send_data_primary_poll(self, skb); |
diff --git a/net/irda/irttp.c b/net/irda/irttp.c index d091ccf773b3..6602d901f8b1 100644 --- a/net/irda/irttp.c +++ b/net/irda/irttp.c | |||
@@ -1513,7 +1513,7 @@ int irttp_disconnect_request(struct tsap_cb *self, struct sk_buff *userdata, | |||
1513 | /* | 1513 | /* |
1514 | * Check if there is still data segments in the transmit queue | 1514 | * Check if there is still data segments in the transmit queue |
1515 | */ | 1515 | */ |
1516 | if (skb_queue_len(&self->tx_queue) > 0) { | 1516 | if (!skb_queue_empty(&self->tx_queue)) { |
1517 | if (priority == P_HIGH) { | 1517 | if (priority == P_HIGH) { |
1518 | /* | 1518 | /* |
1519 | * No need to send the queued data, if we are | 1519 | * No need to send the queued data, if we are |
diff --git a/net/llc/llc_c_ev.c b/net/llc/llc_c_ev.c index cd130c3b72bc..d5bdb53a348f 100644 --- a/net/llc/llc_c_ev.c +++ b/net/llc/llc_c_ev.c | |||
@@ -84,7 +84,7 @@ static u16 llc_util_nr_inside_tx_window(struct sock *sk, u8 nr) | |||
84 | if (llc->dev->flags & IFF_LOOPBACK) | 84 | if (llc->dev->flags & IFF_LOOPBACK) |
85 | goto out; | 85 | goto out; |
86 | rc = 1; | 86 | rc = 1; |
87 | if (!skb_queue_len(&llc->pdu_unack_q)) | 87 | if (skb_queue_empty(&llc->pdu_unack_q)) |
88 | goto out; | 88 | goto out; |
89 | skb = skb_peek(&llc->pdu_unack_q); | 89 | skb = skb_peek(&llc->pdu_unack_q); |
90 | pdu = llc_pdu_sn_hdr(skb); | 90 | pdu = llc_pdu_sn_hdr(skb); |
diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c index fc456a7aaec3..3405fdf41b93 100644 --- a/net/netlink/af_netlink.c +++ b/net/netlink/af_netlink.c | |||
@@ -858,7 +858,7 @@ static inline void netlink_rcv_wake(struct sock *sk) | |||
858 | { | 858 | { |
859 | struct netlink_sock *nlk = nlk_sk(sk); | 859 | struct netlink_sock *nlk = nlk_sk(sk); |
860 | 860 | ||
861 | if (!skb_queue_len(&sk->sk_receive_queue)) | 861 | if (skb_queue_empty(&sk->sk_receive_queue)) |
862 | clear_bit(0, &nlk->state); | 862 | clear_bit(0, &nlk->state); |
863 | if (!test_bit(0, &nlk->state)) | 863 | if (!test_bit(0, &nlk->state)) |
864 | wake_up_interruptible(&nlk->wait); | 864 | wake_up_interruptible(&nlk->wait); |
diff --git a/net/sched/sch_red.c b/net/sched/sch_red.c index 664d0e47374f..7845d045eec4 100644 --- a/net/sched/sch_red.c +++ b/net/sched/sch_red.c | |||
@@ -385,7 +385,7 @@ static int red_change(struct Qdisc *sch, struct rtattr *opt) | |||
385 | memcpy(q->Stab, RTA_DATA(tb[TCA_RED_STAB-1]), 256); | 385 | memcpy(q->Stab, RTA_DATA(tb[TCA_RED_STAB-1]), 256); |
386 | 386 | ||
387 | q->qcount = -1; | 387 | q->qcount = -1; |
388 | if (skb_queue_len(&sch->q) == 0) | 388 | if (skb_queue_empty(&sch->q)) |
389 | PSCHED_SET_PASTPERFECT(q->qidlestart); | 389 | PSCHED_SET_PASTPERFECT(q->qidlestart); |
390 | sch_tree_unlock(sch); | 390 | sch_tree_unlock(sch); |
391 | return 0; | 391 | return 0; |
diff --git a/net/sctp/associola.c b/net/sctp/associola.c index 7ae6aa772dab..4b47dd6f2485 100644 --- a/net/sctp/associola.c +++ b/net/sctp/associola.c | |||
@@ -203,7 +203,7 @@ static struct sctp_association *sctp_association_init(struct sctp_association *a | |||
203 | */ | 203 | */ |
204 | asoc->addip_serial = asoc->c.initial_tsn; | 204 | asoc->addip_serial = asoc->c.initial_tsn; |
205 | 205 | ||
206 | skb_queue_head_init(&asoc->addip_chunks); | 206 | INIT_LIST_HEAD(&asoc->addip_chunk_list); |
207 | 207 | ||
208 | /* Make an empty list of remote transport addresses. */ | 208 | /* Make an empty list of remote transport addresses. */ |
209 | INIT_LIST_HEAD(&asoc->peer.transport_addr_list); | 209 | INIT_LIST_HEAD(&asoc->peer.transport_addr_list); |
diff --git a/net/sctp/input.c b/net/sctp/input.c index 339f7acfdb64..5e085e041a6e 100644 --- a/net/sctp/input.c +++ b/net/sctp/input.c | |||
@@ -115,6 +115,17 @@ static void sctp_rcv_set_owner_r(struct sk_buff *skb, struct sock *sk) | |||
115 | atomic_add(sizeof(struct sctp_chunk),&sk->sk_rmem_alloc); | 115 | atomic_add(sizeof(struct sctp_chunk),&sk->sk_rmem_alloc); |
116 | } | 116 | } |
117 | 117 | ||
118 | struct sctp_input_cb { | ||
119 | union { | ||
120 | struct inet_skb_parm h4; | ||
121 | #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) | ||
122 | struct inet6_skb_parm h6; | ||
123 | #endif | ||
124 | } header; | ||
125 | struct sctp_chunk *chunk; | ||
126 | }; | ||
127 | #define SCTP_INPUT_CB(__skb) ((struct sctp_input_cb *)&((__skb)->cb[0])) | ||
128 | |||
118 | /* | 129 | /* |
119 | * This is the routine which IP calls when receiving an SCTP packet. | 130 | * This is the routine which IP calls when receiving an SCTP packet. |
120 | */ | 131 | */ |
@@ -243,6 +254,7 @@ int sctp_rcv(struct sk_buff *skb) | |||
243 | ret = -ENOMEM; | 254 | ret = -ENOMEM; |
244 | goto discard_release; | 255 | goto discard_release; |
245 | } | 256 | } |
257 | SCTP_INPUT_CB(skb)->chunk = chunk; | ||
246 | 258 | ||
247 | sctp_rcv_set_owner_r(skb,sk); | 259 | sctp_rcv_set_owner_r(skb,sk); |
248 | 260 | ||
@@ -265,9 +277,9 @@ int sctp_rcv(struct sk_buff *skb) | |||
265 | sctp_bh_lock_sock(sk); | 277 | sctp_bh_lock_sock(sk); |
266 | 278 | ||
267 | if (sock_owned_by_user(sk)) | 279 | if (sock_owned_by_user(sk)) |
268 | sk_add_backlog(sk, (struct sk_buff *) chunk); | 280 | sk_add_backlog(sk, skb); |
269 | else | 281 | else |
270 | sctp_backlog_rcv(sk, (struct sk_buff *) chunk); | 282 | sctp_backlog_rcv(sk, skb); |
271 | 283 | ||
272 | /* Release the sock and any reference counts we took in the | 284 | /* Release the sock and any reference counts we took in the |
273 | * lookup calls. | 285 | * lookup calls. |
@@ -302,14 +314,8 @@ discard_release: | |||
302 | */ | 314 | */ |
303 | int sctp_backlog_rcv(struct sock *sk, struct sk_buff *skb) | 315 | int sctp_backlog_rcv(struct sock *sk, struct sk_buff *skb) |
304 | { | 316 | { |
305 | struct sctp_chunk *chunk; | 317 | struct sctp_chunk *chunk = SCTP_INPUT_CB(skb)->chunk; |
306 | struct sctp_inq *inqueue; | 318 | struct sctp_inq *inqueue = &chunk->rcvr->inqueue; |
307 | |||
308 | /* One day chunk will live inside the skb, but for | ||
309 | * now this works. | ||
310 | */ | ||
311 | chunk = (struct sctp_chunk *) skb; | ||
312 | inqueue = &chunk->rcvr->inqueue; | ||
313 | 319 | ||
314 | sctp_inq_push(inqueue, chunk); | 320 | sctp_inq_push(inqueue, chunk); |
315 | return 0; | 321 | return 0; |
diff --git a/net/sctp/inqueue.c b/net/sctp/inqueue.c index cedf4351556c..2d33922c044b 100644 --- a/net/sctp/inqueue.c +++ b/net/sctp/inqueue.c | |||
@@ -50,7 +50,7 @@ | |||
50 | /* Initialize an SCTP inqueue. */ | 50 | /* Initialize an SCTP inqueue. */ |
51 | void sctp_inq_init(struct sctp_inq *queue) | 51 | void sctp_inq_init(struct sctp_inq *queue) |
52 | { | 52 | { |
53 | skb_queue_head_init(&queue->in); | 53 | INIT_LIST_HEAD(&queue->in_chunk_list); |
54 | queue->in_progress = NULL; | 54 | queue->in_progress = NULL; |
55 | 55 | ||
56 | /* Create a task for delivering data. */ | 56 | /* Create a task for delivering data. */ |
@@ -62,11 +62,13 @@ void sctp_inq_init(struct sctp_inq *queue) | |||
62 | /* Release the memory associated with an SCTP inqueue. */ | 62 | /* Release the memory associated with an SCTP inqueue. */ |
63 | void sctp_inq_free(struct sctp_inq *queue) | 63 | void sctp_inq_free(struct sctp_inq *queue) |
64 | { | 64 | { |
65 | struct sctp_chunk *chunk; | 65 | struct sctp_chunk *chunk, *tmp; |
66 | 66 | ||
67 | /* Empty the queue. */ | 67 | /* Empty the queue. */ |
68 | while ((chunk = (struct sctp_chunk *) skb_dequeue(&queue->in)) != NULL) | 68 | list_for_each_entry_safe(chunk, tmp, &queue->in_chunk_list, list) { |
69 | list_del_init(&chunk->list); | ||
69 | sctp_chunk_free(chunk); | 70 | sctp_chunk_free(chunk); |
71 | } | ||
70 | 72 | ||
71 | /* If there is a packet which is currently being worked on, | 73 | /* If there is a packet which is currently being worked on, |
72 | * free it as well. | 74 | * free it as well. |
@@ -92,7 +94,7 @@ void sctp_inq_push(struct sctp_inq *q, struct sctp_chunk *packet) | |||
92 | * Eventually, we should clean up inqueue to not rely | 94 | * Eventually, we should clean up inqueue to not rely |
93 | * on the BH related data structures. | 95 | * on the BH related data structures. |
94 | */ | 96 | */ |
95 | skb_queue_tail(&(q->in), (struct sk_buff *) packet); | 97 | list_add_tail(&packet->list, &q->in_chunk_list); |
96 | q->immediate.func(q->immediate.data); | 98 | q->immediate.func(q->immediate.data); |
97 | } | 99 | } |
98 | 100 | ||
@@ -131,12 +133,16 @@ struct sctp_chunk *sctp_inq_pop(struct sctp_inq *queue) | |||
131 | 133 | ||
132 | /* Do we need to take the next packet out of the queue to process? */ | 134 | /* Do we need to take the next packet out of the queue to process? */ |
133 | if (!chunk) { | 135 | if (!chunk) { |
136 | struct list_head *entry; | ||
137 | |||
134 | /* Is the queue empty? */ | 138 | /* Is the queue empty? */ |
135 | if (skb_queue_empty(&queue->in)) | 139 | if (list_empty(&queue->in_chunk_list)) |
136 | return NULL; | 140 | return NULL; |
137 | 141 | ||
142 | entry = queue->in_chunk_list.next; | ||
138 | chunk = queue->in_progress = | 143 | chunk = queue->in_progress = |
139 | (struct sctp_chunk *) skb_dequeue(&queue->in); | 144 | list_entry(entry, struct sctp_chunk, list); |
145 | list_del_init(entry); | ||
140 | 146 | ||
141 | /* This is the first chunk in the packet. */ | 147 | /* This is the first chunk in the packet. */ |
142 | chunk->singleton = 1; | 148 | chunk->singleton = 1; |
diff --git a/net/sctp/output.c b/net/sctp/output.c index 84b5b370b09d..931371633464 100644 --- a/net/sctp/output.c +++ b/net/sctp/output.c | |||
@@ -108,7 +108,7 @@ struct sctp_packet *sctp_packet_init(struct sctp_packet *packet, | |||
108 | packet->transport = transport; | 108 | packet->transport = transport; |
109 | packet->source_port = sport; | 109 | packet->source_port = sport; |
110 | packet->destination_port = dport; | 110 | packet->destination_port = dport; |
111 | skb_queue_head_init(&packet->chunks); | 111 | INIT_LIST_HEAD(&packet->chunk_list); |
112 | if (asoc) { | 112 | if (asoc) { |
113 | struct sctp_sock *sp = sctp_sk(asoc->base.sk); | 113 | struct sctp_sock *sp = sctp_sk(asoc->base.sk); |
114 | overhead = sp->pf->af->net_header_len; | 114 | overhead = sp->pf->af->net_header_len; |
@@ -129,12 +129,14 @@ struct sctp_packet *sctp_packet_init(struct sctp_packet *packet, | |||
129 | /* Free a packet. */ | 129 | /* Free a packet. */ |
130 | void sctp_packet_free(struct sctp_packet *packet) | 130 | void sctp_packet_free(struct sctp_packet *packet) |
131 | { | 131 | { |
132 | struct sctp_chunk *chunk; | 132 | struct sctp_chunk *chunk, *tmp; |
133 | 133 | ||
134 | SCTP_DEBUG_PRINTK("%s: packet:%p\n", __FUNCTION__, packet); | 134 | SCTP_DEBUG_PRINTK("%s: packet:%p\n", __FUNCTION__, packet); |
135 | 135 | ||
136 | while ((chunk = (struct sctp_chunk *)__skb_dequeue(&packet->chunks)) != NULL) | 136 | list_for_each_entry_safe(chunk, tmp, &packet->chunk_list, list) { |
137 | list_del_init(&chunk->list); | ||
137 | sctp_chunk_free(chunk); | 138 | sctp_chunk_free(chunk); |
139 | } | ||
138 | 140 | ||
139 | if (packet->malloced) | 141 | if (packet->malloced) |
140 | kfree(packet); | 142 | kfree(packet); |
@@ -276,7 +278,7 @@ append: | |||
276 | packet->has_sack = 1; | 278 | packet->has_sack = 1; |
277 | 279 | ||
278 | /* It is OK to send this chunk. */ | 280 | /* It is OK to send this chunk. */ |
279 | __skb_queue_tail(&packet->chunks, (struct sk_buff *)chunk); | 281 | list_add_tail(&chunk->list, &packet->chunk_list); |
280 | packet->size += chunk_len; | 282 | packet->size += chunk_len; |
281 | chunk->transport = packet->transport; | 283 | chunk->transport = packet->transport; |
282 | finish: | 284 | finish: |
@@ -295,7 +297,7 @@ int sctp_packet_transmit(struct sctp_packet *packet) | |||
295 | struct sctphdr *sh; | 297 | struct sctphdr *sh; |
296 | __u32 crc32; | 298 | __u32 crc32; |
297 | struct sk_buff *nskb; | 299 | struct sk_buff *nskb; |
298 | struct sctp_chunk *chunk; | 300 | struct sctp_chunk *chunk, *tmp; |
299 | struct sock *sk; | 301 | struct sock *sk; |
300 | int err = 0; | 302 | int err = 0; |
301 | int padding; /* How much padding do we need? */ | 303 | int padding; /* How much padding do we need? */ |
@@ -305,11 +307,11 @@ int sctp_packet_transmit(struct sctp_packet *packet) | |||
305 | SCTP_DEBUG_PRINTK("%s: packet:%p\n", __FUNCTION__, packet); | 307 | SCTP_DEBUG_PRINTK("%s: packet:%p\n", __FUNCTION__, packet); |
306 | 308 | ||
307 | /* Do NOT generate a chunkless packet. */ | 309 | /* Do NOT generate a chunkless packet. */ |
308 | chunk = (struct sctp_chunk *)skb_peek(&packet->chunks); | 310 | if (list_empty(&packet->chunk_list)) |
309 | if (unlikely(!chunk)) | ||
310 | return err; | 311 | return err; |
311 | 312 | ||
312 | /* Set up convenience variables... */ | 313 | /* Set up convenience variables... */ |
314 | chunk = list_entry(packet->chunk_list.next, struct sctp_chunk, list); | ||
313 | sk = chunk->skb->sk; | 315 | sk = chunk->skb->sk; |
314 | 316 | ||
315 | /* Allocate the new skb. */ | 317 | /* Allocate the new skb. */ |
@@ -370,7 +372,8 @@ int sctp_packet_transmit(struct sctp_packet *packet) | |||
370 | * [This whole comment explains WORD_ROUND() below.] | 372 | * [This whole comment explains WORD_ROUND() below.] |
371 | */ | 373 | */ |
372 | SCTP_DEBUG_PRINTK("***sctp_transmit_packet***\n"); | 374 | SCTP_DEBUG_PRINTK("***sctp_transmit_packet***\n"); |
373 | while ((chunk = (struct sctp_chunk *)__skb_dequeue(&packet->chunks)) != NULL) { | 375 | list_for_each_entry_safe(chunk, tmp, &packet->chunk_list, list) { |
376 | list_del_init(&chunk->list); | ||
374 | if (sctp_chunk_is_data(chunk)) { | 377 | if (sctp_chunk_is_data(chunk)) { |
375 | 378 | ||
376 | if (!chunk->has_tsn) { | 379 | if (!chunk->has_tsn) { |
@@ -511,7 +514,8 @@ err: | |||
511 | * will get resent or dropped later. | 514 | * will get resent or dropped later. |
512 | */ | 515 | */ |
513 | 516 | ||
514 | while ((chunk = (struct sctp_chunk *)__skb_dequeue(&packet->chunks)) != NULL) { | 517 | list_for_each_entry_safe(chunk, tmp, &packet->chunk_list, list) { |
518 | list_del_init(&chunk->list); | ||
515 | if (!sctp_chunk_is_data(chunk)) | 519 | if (!sctp_chunk_is_data(chunk)) |
516 | sctp_chunk_free(chunk); | 520 | sctp_chunk_free(chunk); |
517 | } | 521 | } |
diff --git a/net/sctp/outqueue.c b/net/sctp/outqueue.c index 4eb81a1407b7..efb72faba20c 100644 --- a/net/sctp/outqueue.c +++ b/net/sctp/outqueue.c | |||
@@ -75,7 +75,7 @@ static void sctp_generate_fwdtsn(struct sctp_outq *q, __u32 sack_ctsn); | |||
75 | static inline void sctp_outq_head_data(struct sctp_outq *q, | 75 | static inline void sctp_outq_head_data(struct sctp_outq *q, |
76 | struct sctp_chunk *ch) | 76 | struct sctp_chunk *ch) |
77 | { | 77 | { |
78 | __skb_queue_head(&q->out, (struct sk_buff *)ch); | 78 | list_add(&ch->list, &q->out_chunk_list); |
79 | q->out_qlen += ch->skb->len; | 79 | q->out_qlen += ch->skb->len; |
80 | return; | 80 | return; |
81 | } | 81 | } |
@@ -83,17 +83,22 @@ static inline void sctp_outq_head_data(struct sctp_outq *q, | |||
83 | /* Take data from the front of the queue. */ | 83 | /* Take data from the front of the queue. */ |
84 | static inline struct sctp_chunk *sctp_outq_dequeue_data(struct sctp_outq *q) | 84 | static inline struct sctp_chunk *sctp_outq_dequeue_data(struct sctp_outq *q) |
85 | { | 85 | { |
86 | struct sctp_chunk *ch; | 86 | struct sctp_chunk *ch = NULL; |
87 | ch = (struct sctp_chunk *)__skb_dequeue(&q->out); | 87 | |
88 | if (ch) | 88 | if (!list_empty(&q->out_chunk_list)) { |
89 | struct list_head *entry = q->out_chunk_list.next; | ||
90 | |||
91 | ch = list_entry(entry, struct sctp_chunk, list); | ||
92 | list_del_init(entry); | ||
89 | q->out_qlen -= ch->skb->len; | 93 | q->out_qlen -= ch->skb->len; |
94 | } | ||
90 | return ch; | 95 | return ch; |
91 | } | 96 | } |
92 | /* Add data chunk to the end of the queue. */ | 97 | /* Add data chunk to the end of the queue. */ |
93 | static inline void sctp_outq_tail_data(struct sctp_outq *q, | 98 | static inline void sctp_outq_tail_data(struct sctp_outq *q, |
94 | struct sctp_chunk *ch) | 99 | struct sctp_chunk *ch) |
95 | { | 100 | { |
96 | __skb_queue_tail(&q->out, (struct sk_buff *)ch); | 101 | list_add_tail(&ch->list, &q->out_chunk_list); |
97 | q->out_qlen += ch->skb->len; | 102 | q->out_qlen += ch->skb->len; |
98 | return; | 103 | return; |
99 | } | 104 | } |
@@ -197,8 +202,8 @@ static inline int sctp_cacc_skip(struct sctp_transport *primary, | |||
197 | void sctp_outq_init(struct sctp_association *asoc, struct sctp_outq *q) | 202 | void sctp_outq_init(struct sctp_association *asoc, struct sctp_outq *q) |
198 | { | 203 | { |
199 | q->asoc = asoc; | 204 | q->asoc = asoc; |
200 | skb_queue_head_init(&q->out); | 205 | INIT_LIST_HEAD(&q->out_chunk_list); |
201 | skb_queue_head_init(&q->control); | 206 | INIT_LIST_HEAD(&q->control_chunk_list); |
202 | INIT_LIST_HEAD(&q->retransmit); | 207 | INIT_LIST_HEAD(&q->retransmit); |
203 | INIT_LIST_HEAD(&q->sacked); | 208 | INIT_LIST_HEAD(&q->sacked); |
204 | INIT_LIST_HEAD(&q->abandoned); | 209 | INIT_LIST_HEAD(&q->abandoned); |
@@ -217,7 +222,7 @@ void sctp_outq_teardown(struct sctp_outq *q) | |||
217 | { | 222 | { |
218 | struct sctp_transport *transport; | 223 | struct sctp_transport *transport; |
219 | struct list_head *lchunk, *pos, *temp; | 224 | struct list_head *lchunk, *pos, *temp; |
220 | struct sctp_chunk *chunk; | 225 | struct sctp_chunk *chunk, *tmp; |
221 | 226 | ||
222 | /* Throw away unacknowledged chunks. */ | 227 | /* Throw away unacknowledged chunks. */ |
223 | list_for_each(pos, &q->asoc->peer.transport_addr_list) { | 228 | list_for_each(pos, &q->asoc->peer.transport_addr_list) { |
@@ -269,8 +274,10 @@ void sctp_outq_teardown(struct sctp_outq *q) | |||
269 | q->error = 0; | 274 | q->error = 0; |
270 | 275 | ||
271 | /* Throw away any leftover control chunks. */ | 276 | /* Throw away any leftover control chunks. */ |
272 | while ((chunk = (struct sctp_chunk *) skb_dequeue(&q->control)) != NULL) | 277 | list_for_each_entry_safe(chunk, tmp, &q->control_chunk_list, list) { |
278 | list_del_init(&chunk->list); | ||
273 | sctp_chunk_free(chunk); | 279 | sctp_chunk_free(chunk); |
280 | } | ||
274 | } | 281 | } |
275 | 282 | ||
276 | /* Free the outqueue structure and any related pending chunks. */ | 283 | /* Free the outqueue structure and any related pending chunks. */ |
@@ -333,7 +340,7 @@ int sctp_outq_tail(struct sctp_outq *q, struct sctp_chunk *chunk) | |||
333 | break; | 340 | break; |
334 | }; | 341 | }; |
335 | } else { | 342 | } else { |
336 | __skb_queue_tail(&q->control, (struct sk_buff *) chunk); | 343 | list_add_tail(&chunk->list, &q->control_chunk_list); |
337 | SCTP_INC_STATS(SCTP_MIB_OUTCTRLCHUNKS); | 344 | SCTP_INC_STATS(SCTP_MIB_OUTCTRLCHUNKS); |
338 | } | 345 | } |
339 | 346 | ||
@@ -650,10 +657,9 @@ int sctp_outq_flush(struct sctp_outq *q, int rtx_timeout) | |||
650 | __u16 sport = asoc->base.bind_addr.port; | 657 | __u16 sport = asoc->base.bind_addr.port; |
651 | __u16 dport = asoc->peer.port; | 658 | __u16 dport = asoc->peer.port; |
652 | __u32 vtag = asoc->peer.i.init_tag; | 659 | __u32 vtag = asoc->peer.i.init_tag; |
653 | struct sk_buff_head *queue; | ||
654 | struct sctp_transport *transport = NULL; | 660 | struct sctp_transport *transport = NULL; |
655 | struct sctp_transport *new_transport; | 661 | struct sctp_transport *new_transport; |
656 | struct sctp_chunk *chunk; | 662 | struct sctp_chunk *chunk, *tmp; |
657 | sctp_xmit_t status; | 663 | sctp_xmit_t status; |
658 | int error = 0; | 664 | int error = 0; |
659 | int start_timer = 0; | 665 | int start_timer = 0; |
@@ -675,8 +681,9 @@ int sctp_outq_flush(struct sctp_outq *q, int rtx_timeout) | |||
675 | * ... | 681 | * ... |
676 | */ | 682 | */ |
677 | 683 | ||
678 | queue = &q->control; | 684 | list_for_each_entry_safe(chunk, tmp, &q->control_chunk_list, list) { |
679 | while ((chunk = (struct sctp_chunk *)skb_dequeue(queue)) != NULL) { | 685 | list_del_init(&chunk->list); |
686 | |||
680 | /* Pick the right transport to use. */ | 687 | /* Pick the right transport to use. */ |
681 | new_transport = chunk->transport; | 688 | new_transport = chunk->transport; |
682 | 689 | ||
@@ -814,8 +821,6 @@ int sctp_outq_flush(struct sctp_outq *q, int rtx_timeout) | |||
814 | 821 | ||
815 | /* Finally, transmit new packets. */ | 822 | /* Finally, transmit new packets. */ |
816 | start_timer = 0; | 823 | start_timer = 0; |
817 | queue = &q->out; | ||
818 | |||
819 | while ((chunk = sctp_outq_dequeue_data(q)) != NULL) { | 824 | while ((chunk = sctp_outq_dequeue_data(q)) != NULL) { |
820 | /* RFC 2960 6.5 Every DATA chunk MUST carry a valid | 825 | /* RFC 2960 6.5 Every DATA chunk MUST carry a valid |
821 | * stream identifier. | 826 | * stream identifier. |
@@ -1149,8 +1154,9 @@ int sctp_outq_sack(struct sctp_outq *q, struct sctp_sackhdr *sack) | |||
1149 | /* See if all chunks are acked. | 1154 | /* See if all chunks are acked. |
1150 | * Make sure the empty queue handler will get run later. | 1155 | * Make sure the empty queue handler will get run later. |
1151 | */ | 1156 | */ |
1152 | q->empty = skb_queue_empty(&q->out) && skb_queue_empty(&q->control) && | 1157 | q->empty = (list_empty(&q->out_chunk_list) && |
1153 | list_empty(&q->retransmit); | 1158 | list_empty(&q->control_chunk_list) && |
1159 | list_empty(&q->retransmit)); | ||
1154 | if (!q->empty) | 1160 | if (!q->empty) |
1155 | goto finish; | 1161 | goto finish; |
1156 | 1162 | ||
@@ -1679,9 +1685,9 @@ static void sctp_generate_fwdtsn(struct sctp_outq *q, __u32 ctsn) | |||
1679 | if (TSN_lte(tsn, ctsn)) { | 1685 | if (TSN_lte(tsn, ctsn)) { |
1680 | list_del_init(lchunk); | 1686 | list_del_init(lchunk); |
1681 | if (!chunk->tsn_gap_acked) { | 1687 | if (!chunk->tsn_gap_acked) { |
1682 | chunk->transport->flight_size -= | 1688 | chunk->transport->flight_size -= |
1683 | sctp_data_size(chunk); | 1689 | sctp_data_size(chunk); |
1684 | q->outstanding_bytes -= sctp_data_size(chunk); | 1690 | q->outstanding_bytes -= sctp_data_size(chunk); |
1685 | } | 1691 | } |
1686 | sctp_chunk_free(chunk); | 1692 | sctp_chunk_free(chunk); |
1687 | } else { | 1693 | } else { |
@@ -1729,7 +1735,7 @@ static void sctp_generate_fwdtsn(struct sctp_outq *q, __u32 ctsn) | |||
1729 | nskips, &ftsn_skip_arr[0]); | 1735 | nskips, &ftsn_skip_arr[0]); |
1730 | 1736 | ||
1731 | if (ftsn_chunk) { | 1737 | if (ftsn_chunk) { |
1732 | __skb_queue_tail(&q->control, (struct sk_buff *)ftsn_chunk); | 1738 | list_add_tail(&ftsn_chunk->list, &q->control_chunk_list); |
1733 | SCTP_INC_STATS(SCTP_MIB_OUTCTRLCHUNKS); | 1739 | SCTP_INC_STATS(SCTP_MIB_OUTCTRLCHUNKS); |
1734 | } | 1740 | } |
1735 | } | 1741 | } |
diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c index 5baed9bb7de5..773cd93fa3d0 100644 --- a/net/sctp/sm_make_chunk.c +++ b/net/sctp/sm_make_chunk.c | |||
@@ -1003,6 +1003,7 @@ struct sctp_chunk *sctp_chunkify(struct sk_buff *skb, | |||
1003 | SCTP_DEBUG_PRINTK("chunkifying skb %p w/o an sk\n", skb); | 1003 | SCTP_DEBUG_PRINTK("chunkifying skb %p w/o an sk\n", skb); |
1004 | } | 1004 | } |
1005 | 1005 | ||
1006 | INIT_LIST_HEAD(&retval->list); | ||
1006 | retval->skb = skb; | 1007 | retval->skb = skb; |
1007 | retval->asoc = (struct sctp_association *)asoc; | 1008 | retval->asoc = (struct sctp_association *)asoc; |
1008 | retval->resent = 0; | 1009 | retval->resent = 0; |
@@ -1116,8 +1117,7 @@ static void sctp_chunk_destroy(struct sctp_chunk *chunk) | |||
1116 | /* Possibly, free the chunk. */ | 1117 | /* Possibly, free the chunk. */ |
1117 | void sctp_chunk_free(struct sctp_chunk *chunk) | 1118 | void sctp_chunk_free(struct sctp_chunk *chunk) |
1118 | { | 1119 | { |
1119 | /* Make sure that we are not on any list. */ | 1120 | BUG_ON(!list_empty(&chunk->list)); |
1120 | skb_unlink((struct sk_buff *) chunk); | ||
1121 | list_del_init(&chunk->transmitted_list); | 1121 | list_del_init(&chunk->transmitted_list); |
1122 | 1122 | ||
1123 | /* Release our reference on the message tracker. */ | 1123 | /* Release our reference on the message tracker. */ |
@@ -2739,8 +2739,12 @@ int sctp_process_asconf_ack(struct sctp_association *asoc, | |||
2739 | asoc->addip_last_asconf = NULL; | 2739 | asoc->addip_last_asconf = NULL; |
2740 | 2740 | ||
2741 | /* Send the next asconf chunk from the addip chunk queue. */ | 2741 | /* Send the next asconf chunk from the addip chunk queue. */ |
2742 | asconf = (struct sctp_chunk *)__skb_dequeue(&asoc->addip_chunks); | 2742 | if (!list_empty(&asoc->addip_chunk_list)) { |
2743 | if (asconf) { | 2743 | struct list_head *entry = asoc->addip_chunk_list.next; |
2744 | asconf = list_entry(entry, struct sctp_chunk, list); | ||
2745 | |||
2746 | list_del_init(entry); | ||
2747 | |||
2744 | /* Hold the chunk until an ASCONF_ACK is received. */ | 2748 | /* Hold the chunk until an ASCONF_ACK is received. */ |
2745 | sctp_chunk_hold(asconf); | 2749 | sctp_chunk_hold(asconf); |
2746 | if (sctp_primitive_ASCONF(asoc, asconf)) | 2750 | if (sctp_primitive_ASCONF(asoc, asconf)) |
diff --git a/net/sctp/socket.c b/net/sctp/socket.c index aad55dc3792b..091a66f06a35 100644 --- a/net/sctp/socket.c +++ b/net/sctp/socket.c | |||
@@ -406,7 +406,7 @@ static int sctp_send_asconf(struct sctp_association *asoc, | |||
406 | * transmission. | 406 | * transmission. |
407 | */ | 407 | */ |
408 | if (asoc->addip_last_asconf) { | 408 | if (asoc->addip_last_asconf) { |
409 | __skb_queue_tail(&asoc->addip_chunks, (struct sk_buff *)chunk); | 409 | list_add_tail(&chunk->list, &asoc->addip_chunk_list); |
410 | goto out; | 410 | goto out; |
411 | } | 411 | } |
412 | 412 | ||
diff --git a/net/unix/af_unix.c b/net/unix/af_unix.c index c420eba4876b..d403e34088ad 100644 --- a/net/unix/af_unix.c +++ b/net/unix/af_unix.c | |||
@@ -302,7 +302,7 @@ static void unix_write_space(struct sock *sk) | |||
302 | * may receive messages only from that peer. */ | 302 | * may receive messages only from that peer. */ |
303 | static void unix_dgram_disconnected(struct sock *sk, struct sock *other) | 303 | static void unix_dgram_disconnected(struct sock *sk, struct sock *other) |
304 | { | 304 | { |
305 | if (skb_queue_len(&sk->sk_receive_queue)) { | 305 | if (!skb_queue_empty(&sk->sk_receive_queue)) { |
306 | skb_queue_purge(&sk->sk_receive_queue); | 306 | skb_queue_purge(&sk->sk_receive_queue); |
307 | wake_up_interruptible_all(&unix_sk(sk)->peer_wait); | 307 | wake_up_interruptible_all(&unix_sk(sk)->peer_wait); |
308 | 308 | ||
@@ -1619,7 +1619,7 @@ static long unix_stream_data_wait(struct sock * sk, long timeo) | |||
1619 | for (;;) { | 1619 | for (;;) { |
1620 | prepare_to_wait(sk->sk_sleep, &wait, TASK_INTERRUPTIBLE); | 1620 | prepare_to_wait(sk->sk_sleep, &wait, TASK_INTERRUPTIBLE); |
1621 | 1621 | ||
1622 | if (skb_queue_len(&sk->sk_receive_queue) || | 1622 | if (!skb_queue_empty(&sk->sk_receive_queue) || |
1623 | sk->sk_err || | 1623 | sk->sk_err || |
1624 | (sk->sk_shutdown & RCV_SHUTDOWN) || | 1624 | (sk->sk_shutdown & RCV_SHUTDOWN) || |
1625 | signal_pending(current) || | 1625 | signal_pending(current) || |