diff options
author | Ben Hutchings <bhutchings@solarflare.com> | 2009-11-28 00:36:04 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-29 02:58:54 -0500 |
commit | daeda6309e1382819a8f8bab548560742ac26cc2 (patch) | |
tree | 164dbcb3c1e96662c7efbe4b22a39630de9ede3c | |
parent | 299f8d69f3590fdbd7b22880234196de3b39ceca (diff) |
sfc: Decouple NIC revision number from Falcon PCI revision number
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/sfc/efx.c | 4 | ||||
-rw-r--r-- | drivers/net/sfc/ethtool.c | 2 | ||||
-rw-r--r-- | drivers/net/sfc/falcon.c | 68 | ||||
-rw-r--r-- | drivers/net/sfc/falcon.h | 16 | ||||
-rw-r--r-- | drivers/net/sfc/falcon_xmac.c | 2 | ||||
-rw-r--r-- | drivers/net/sfc/net_driver.h | 2 | ||||
-rw-r--r-- | drivers/net/sfc/selftest.c | 2 | ||||
-rw-r--r-- | drivers/net/sfc/workarounds.h | 4 |
8 files changed, 48 insertions, 52 deletions
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c index bed45a599874..f5e81114270a 100644 --- a/drivers/net/sfc/efx.c +++ b/drivers/net/sfc/efx.c | |||
@@ -1863,9 +1863,9 @@ void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) | |||
1863 | /* PCI device ID table */ | 1863 | /* PCI device ID table */ |
1864 | static struct pci_device_id efx_pci_table[] __devinitdata = { | 1864 | static struct pci_device_id efx_pci_table[] __devinitdata = { |
1865 | {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID), | 1865 | {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID), |
1866 | .driver_data = (unsigned long) &falcon_a_nic_type}, | 1866 | .driver_data = (unsigned long) &falcon_a1_nic_type}, |
1867 | {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID), | 1867 | {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID), |
1868 | .driver_data = (unsigned long) &falcon_b_nic_type}, | 1868 | .driver_data = (unsigned long) &falcon_b0_nic_type}, |
1869 | {0} /* end of list */ | 1869 | {0} /* end of list */ |
1870 | }; | 1870 | }; |
1871 | 1871 | ||
diff --git a/drivers/net/sfc/ethtool.c b/drivers/net/sfc/ethtool.c index 6515b8a4b38b..5d2e186e6710 100644 --- a/drivers/net/sfc/ethtool.c +++ b/drivers/net/sfc/ethtool.c | |||
@@ -683,7 +683,7 @@ static int efx_ethtool_set_pauseparam(struct net_device *net_dev, | |||
683 | * and fix it be cycling transmit flow control on this end. */ | 683 | * and fix it be cycling transmit flow control on this end. */ |
684 | reset = (wanted_fc & EFX_FC_TX) && !(efx->wanted_fc & EFX_FC_TX); | 684 | reset = (wanted_fc & EFX_FC_TX) && !(efx->wanted_fc & EFX_FC_TX); |
685 | if (EFX_WORKAROUND_11482(efx) && reset) { | 685 | if (EFX_WORKAROUND_11482(efx) && reset) { |
686 | if (falcon_rev(efx) == FALCON_REV_B0) { | 686 | if (efx_nic_rev(efx) == EFX_REV_FALCON_B0) { |
687 | /* Recover by resetting the EM block */ | 687 | /* Recover by resetting the EM block */ |
688 | if (efx->link_state.up) | 688 | if (efx->link_state.up) |
689 | falcon_drain_tx_fifo(efx); | 689 | falcon_drain_tx_fifo(efx); |
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index b186fd2c9b6f..7c9c9c935957 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c | |||
@@ -111,7 +111,7 @@ MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold"); | |||
111 | #define FALCON_RX_FLUSH_COUNT 4 | 111 | #define FALCON_RX_FLUSH_COUNT 4 |
112 | 112 | ||
113 | #define FALCON_IS_DUAL_FUNC(efx) \ | 113 | #define FALCON_IS_DUAL_FUNC(efx) \ |
114 | (falcon_rev(efx) < FALCON_REV_B0) | 114 | (efx_nic_rev(efx) < EFX_REV_FALCON_B0) |
115 | 115 | ||
116 | /************************************************************************** | 116 | /************************************************************************** |
117 | * | 117 | * |
@@ -447,7 +447,7 @@ void falcon_init_tx(struct efx_tx_queue *tx_queue) | |||
447 | FRF_AZ_TX_DESCQ_TYPE, 0, | 447 | FRF_AZ_TX_DESCQ_TYPE, 0, |
448 | FRF_BZ_TX_NON_IP_DROP_DIS, 1); | 448 | FRF_BZ_TX_NON_IP_DROP_DIS, 1); |
449 | 449 | ||
450 | if (falcon_rev(efx) >= FALCON_REV_B0) { | 450 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { |
451 | int csum = tx_queue->queue == EFX_TX_QUEUE_OFFLOAD_CSUM; | 451 | int csum = tx_queue->queue == EFX_TX_QUEUE_OFFLOAD_CSUM; |
452 | EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_IP_CHKSM_DIS, !csum); | 452 | EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_IP_CHKSM_DIS, !csum); |
453 | EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_TCP_CHKSM_DIS, | 453 | EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_TCP_CHKSM_DIS, |
@@ -457,7 +457,7 @@ void falcon_init_tx(struct efx_tx_queue *tx_queue) | |||
457 | efx_writeo_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base, | 457 | efx_writeo_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base, |
458 | tx_queue->queue); | 458 | tx_queue->queue); |
459 | 459 | ||
460 | if (falcon_rev(efx) < FALCON_REV_B0) { | 460 | if (efx_nic_rev(efx) < EFX_REV_FALCON_B0) { |
461 | efx_oword_t reg; | 461 | efx_oword_t reg; |
462 | 462 | ||
463 | /* Only 128 bits in this register */ | 463 | /* Only 128 bits in this register */ |
@@ -574,7 +574,7 @@ void falcon_init_rx(struct efx_rx_queue *rx_queue) | |||
574 | { | 574 | { |
575 | efx_oword_t rx_desc_ptr; | 575 | efx_oword_t rx_desc_ptr; |
576 | struct efx_nic *efx = rx_queue->efx; | 576 | struct efx_nic *efx = rx_queue->efx; |
577 | bool is_b0 = falcon_rev(efx) >= FALCON_REV_B0; | 577 | bool is_b0 = efx_nic_rev(efx) >= EFX_REV_FALCON_B0; |
578 | bool iscsi_digest_en = is_b0; | 578 | bool iscsi_digest_en = is_b0; |
579 | 579 | ||
580 | EFX_LOG(efx, "RX queue %d ring in special buffers %d-%d\n", | 580 | EFX_LOG(efx, "RX queue %d ring in special buffers %d-%d\n", |
@@ -752,7 +752,7 @@ static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue, | |||
752 | FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR); | 752 | FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR); |
753 | rx_ev_eth_crc_err = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_ETH_CRC_ERR); | 753 | rx_ev_eth_crc_err = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_ETH_CRC_ERR); |
754 | rx_ev_frm_trunc = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_FRM_TRUNC); | 754 | rx_ev_frm_trunc = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_FRM_TRUNC); |
755 | rx_ev_drib_nib = ((falcon_rev(efx) >= FALCON_REV_B0) ? | 755 | rx_ev_drib_nib = ((efx_nic_rev(efx) >= EFX_REV_FALCON_B0) ? |
756 | 0 : EFX_QWORD_FIELD(*event, FSF_AA_RX_EV_DRIB_NIB)); | 756 | 0 : EFX_QWORD_FIELD(*event, FSF_AA_RX_EV_DRIB_NIB)); |
757 | rx_ev_pause_frm = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_PAUSE_FRM_ERR); | 757 | rx_ev_pause_frm = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_PAUSE_FRM_ERR); |
758 | 758 | ||
@@ -897,13 +897,13 @@ static void falcon_handle_global_event(struct efx_channel *channel, | |||
897 | handled = true; | 897 | handled = true; |
898 | } | 898 | } |
899 | 899 | ||
900 | if ((falcon_rev(efx) >= FALCON_REV_B0) && | 900 | if ((efx_nic_rev(efx) >= EFX_REV_FALCON_B0) && |
901 | EFX_QWORD_FIELD(*event, FSF_BB_GLB_EV_XG_MGT_INTR)) { | 901 | EFX_QWORD_FIELD(*event, FSF_BB_GLB_EV_XG_MGT_INTR)) { |
902 | efx->xmac_poll_required = true; | 902 | efx->xmac_poll_required = true; |
903 | handled = true; | 903 | handled = true; |
904 | } | 904 | } |
905 | 905 | ||
906 | if (falcon_rev(efx) <= FALCON_REV_A1 ? | 906 | if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1 ? |
907 | EFX_QWORD_FIELD(*event, FSF_AA_GLB_EV_RX_RECOVERY) : | 907 | EFX_QWORD_FIELD(*event, FSF_AA_GLB_EV_RX_RECOVERY) : |
908 | EFX_QWORD_FIELD(*event, FSF_BB_GLB_EV_RX_RECOVERY)) { | 908 | EFX_QWORD_FIELD(*event, FSF_BB_GLB_EV_RX_RECOVERY)) { |
909 | EFX_ERR(efx, "channel %d seen global RX_RESET " | 909 | EFX_ERR(efx, "channel %d seen global RX_RESET " |
@@ -1531,7 +1531,7 @@ static void falcon_setup_rss_indir_table(struct efx_nic *efx) | |||
1531 | unsigned long offset; | 1531 | unsigned long offset; |
1532 | efx_dword_t dword; | 1532 | efx_dword_t dword; |
1533 | 1533 | ||
1534 | if (falcon_rev(efx) < FALCON_REV_B0) | 1534 | if (efx_nic_rev(efx) < EFX_REV_FALCON_B0) |
1535 | return; | 1535 | return; |
1536 | 1536 | ||
1537 | for (offset = FR_BZ_RX_INDIRECTION_TBL; | 1537 | for (offset = FR_BZ_RX_INDIRECTION_TBL; |
@@ -1554,7 +1554,7 @@ int falcon_init_interrupt(struct efx_nic *efx) | |||
1554 | 1554 | ||
1555 | if (!EFX_INT_MODE_USE_MSI(efx)) { | 1555 | if (!EFX_INT_MODE_USE_MSI(efx)) { |
1556 | irq_handler_t handler; | 1556 | irq_handler_t handler; |
1557 | if (falcon_rev(efx) >= FALCON_REV_B0) | 1557 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) |
1558 | handler = falcon_legacy_interrupt_b0; | 1558 | handler = falcon_legacy_interrupt_b0; |
1559 | else | 1559 | else |
1560 | handler = falcon_legacy_interrupt_a1; | 1560 | handler = falcon_legacy_interrupt_a1; |
@@ -1601,7 +1601,7 @@ void falcon_fini_interrupt(struct efx_nic *efx) | |||
1601 | } | 1601 | } |
1602 | 1602 | ||
1603 | /* ACK legacy interrupt */ | 1603 | /* ACK legacy interrupt */ |
1604 | if (falcon_rev(efx) >= FALCON_REV_B0) | 1604 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) |
1605 | efx_reado(efx, ®, FR_BZ_INT_ISR0); | 1605 | efx_reado(efx, ®, FR_BZ_INT_ISR0); |
1606 | else | 1606 | else |
1607 | falcon_irq_ack_a1(efx); | 1607 | falcon_irq_ack_a1(efx); |
@@ -1841,7 +1841,7 @@ static int falcon_reset_macs(struct efx_nic *efx) | |||
1841 | efx_oword_t reg; | 1841 | efx_oword_t reg; |
1842 | int count; | 1842 | int count; |
1843 | 1843 | ||
1844 | if (falcon_rev(efx) < FALCON_REV_B0) { | 1844 | if (efx_nic_rev(efx) < EFX_REV_FALCON_B0) { |
1845 | /* It's not safe to use GLB_CTL_REG to reset the | 1845 | /* It's not safe to use GLB_CTL_REG to reset the |
1846 | * macs, so instead use the internal MAC resets | 1846 | * macs, so instead use the internal MAC resets |
1847 | */ | 1847 | */ |
@@ -1917,7 +1917,7 @@ void falcon_drain_tx_fifo(struct efx_nic *efx) | |||
1917 | { | 1917 | { |
1918 | efx_oword_t reg; | 1918 | efx_oword_t reg; |
1919 | 1919 | ||
1920 | if ((falcon_rev(efx) < FALCON_REV_B0) || | 1920 | if ((efx_nic_rev(efx) < EFX_REV_FALCON_B0) || |
1921 | (efx->loopback_mode != LOOPBACK_NONE)) | 1921 | (efx->loopback_mode != LOOPBACK_NONE)) |
1922 | return; | 1922 | return; |
1923 | 1923 | ||
@@ -1933,7 +1933,7 @@ void falcon_deconfigure_mac_wrapper(struct efx_nic *efx) | |||
1933 | { | 1933 | { |
1934 | efx_oword_t reg; | 1934 | efx_oword_t reg; |
1935 | 1935 | ||
1936 | if (falcon_rev(efx) < FALCON_REV_B0) | 1936 | if (efx_nic_rev(efx) < EFX_REV_FALCON_B0) |
1937 | return; | 1937 | return; |
1938 | 1938 | ||
1939 | /* Isolate the MAC -> RX */ | 1939 | /* Isolate the MAC -> RX */ |
@@ -1970,7 +1970,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) | |||
1970 | FRF_AB_MAC_SPEED, link_speed); | 1970 | FRF_AB_MAC_SPEED, link_speed); |
1971 | /* On B0, MAC backpressure can be disabled and packets get | 1971 | /* On B0, MAC backpressure can be disabled and packets get |
1972 | * discarded. */ | 1972 | * discarded. */ |
1973 | if (falcon_rev(efx) >= FALCON_REV_B0) { | 1973 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { |
1974 | EFX_SET_OWORD_FIELD(reg, FRF_BB_TXFIFO_DRAIN_EN, | 1974 | EFX_SET_OWORD_FIELD(reg, FRF_BB_TXFIFO_DRAIN_EN, |
1975 | !link_state->up); | 1975 | !link_state->up); |
1976 | } | 1976 | } |
@@ -1988,7 +1988,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) | |||
1988 | EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, tx_fc); | 1988 | EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, tx_fc); |
1989 | 1989 | ||
1990 | /* Unisolate the MAC -> RX */ | 1990 | /* Unisolate the MAC -> RX */ |
1991 | if (falcon_rev(efx) >= FALCON_REV_B0) | 1991 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) |
1992 | EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1); | 1992 | EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1); |
1993 | efx_writeo(efx, ®, FR_AZ_RX_CFG); | 1993 | efx_writeo(efx, ®, FR_AZ_RX_CFG); |
1994 | } | 1994 | } |
@@ -2207,7 +2207,7 @@ static void falcon_clock_mac(struct efx_nic *efx) | |||
2207 | /* Configure the NIC generated MAC clock correctly */ | 2207 | /* Configure the NIC generated MAC clock correctly */ |
2208 | efx_reado(efx, &nic_stat, FR_AB_NIC_STAT); | 2208 | efx_reado(efx, &nic_stat, FR_AB_NIC_STAT); |
2209 | strap_val = EFX_IS10G(efx) ? 5 : 3; | 2209 | strap_val = EFX_IS10G(efx) ? 5 : 3; |
2210 | if (falcon_rev(efx) >= FALCON_REV_B0) { | 2210 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { |
2211 | EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP_EN, 1); | 2211 | EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP_EN, 1); |
2212 | EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP, strap_val); | 2212 | EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP, strap_val); |
2213 | efx_writeo(efx, &nic_stat, FR_AB_NIC_STAT); | 2213 | efx_writeo(efx, &nic_stat, FR_AB_NIC_STAT); |
@@ -2296,7 +2296,7 @@ int falcon_probe_port(struct efx_nic *efx) | |||
2296 | efx->link_state.fd = true; | 2296 | efx->link_state.fd = true; |
2297 | 2297 | ||
2298 | /* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */ | 2298 | /* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */ |
2299 | if (falcon_rev(efx) >= FALCON_REV_B0) | 2299 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) |
2300 | efx->wanted_fc = EFX_FC_RX | EFX_FC_TX; | 2300 | efx->wanted_fc = EFX_FC_RX | EFX_FC_TX; |
2301 | else | 2301 | else |
2302 | efx->wanted_fc = EFX_FC_RX; | 2302 | efx->wanted_fc = EFX_FC_RX; |
@@ -2806,13 +2806,13 @@ static int falcon_probe_nic_variant(struct efx_nic *efx) | |||
2806 | 2806 | ||
2807 | efx_reado(efx, &nic_stat, FR_AB_NIC_STAT); | 2807 | efx_reado(efx, &nic_stat, FR_AB_NIC_STAT); |
2808 | 2808 | ||
2809 | switch (falcon_rev(efx)) { | 2809 | if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) { |
2810 | case FALCON_REV_A0: | 2810 | u8 pci_rev = efx->pci_dev->revision; |
2811 | case 0xff: | ||
2812 | EFX_ERR(efx, "Falcon rev A0 not supported\n"); | ||
2813 | return -ENODEV; | ||
2814 | 2811 | ||
2815 | case FALCON_REV_A1: | 2812 | if ((pci_rev == 0xff) || (pci_rev == 0)) { |
2813 | EFX_ERR(efx, "Falcon rev A0 not supported\n"); | ||
2814 | return -ENODEV; | ||
2815 | } | ||
2816 | if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) { | 2816 | if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) { |
2817 | EFX_ERR(efx, "Falcon rev A1 1G not supported\n"); | 2817 | EFX_ERR(efx, "Falcon rev A1 1G not supported\n"); |
2818 | return -ENODEV; | 2818 | return -ENODEV; |
@@ -2821,14 +2821,6 @@ static int falcon_probe_nic_variant(struct efx_nic *efx) | |||
2821 | EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n"); | 2821 | EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n"); |
2822 | return -ENODEV; | 2822 | return -ENODEV; |
2823 | } | 2823 | } |
2824 | break; | ||
2825 | |||
2826 | case FALCON_REV_B0: | ||
2827 | break; | ||
2828 | |||
2829 | default: | ||
2830 | EFX_ERR(efx, "Unknown Falcon rev %d\n", falcon_rev(efx)); | ||
2831 | return -ENODEV; | ||
2832 | } | 2824 | } |
2833 | 2825 | ||
2834 | return 0; | 2826 | return 0; |
@@ -2991,7 +2983,7 @@ static void falcon_init_rx_cfg(struct efx_nic *efx) | |||
2991 | efx_oword_t reg; | 2983 | efx_oword_t reg; |
2992 | 2984 | ||
2993 | efx_reado(efx, ®, FR_AZ_RX_CFG); | 2985 | efx_reado(efx, ®, FR_AZ_RX_CFG); |
2994 | if (falcon_rev(efx) <= FALCON_REV_A1) { | 2986 | if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) { |
2995 | /* Data FIFO size is 5.5K */ | 2987 | /* Data FIFO size is 5.5K */ |
2996 | if (data_xon_thr < 0) | 2988 | if (data_xon_thr < 0) |
2997 | data_xon_thr = 512 >> 8; | 2989 | data_xon_thr = 512 >> 8; |
@@ -3037,7 +3029,7 @@ int falcon_init_nic(struct efx_nic *efx) | |||
3037 | efx_writeo(efx, &temp, FR_AB_NIC_STAT); | 3029 | efx_writeo(efx, &temp, FR_AB_NIC_STAT); |
3038 | 3030 | ||
3039 | /* Set the source of the GMAC clock */ | 3031 | /* Set the source of the GMAC clock */ |
3040 | if (falcon_rev(efx) == FALCON_REV_B0) { | 3032 | if (efx_nic_rev(efx) == EFX_REV_FALCON_B0) { |
3041 | efx_reado(efx, &temp, FR_AB_GPIO_CTL); | 3033 | efx_reado(efx, &temp, FR_AB_GPIO_CTL); |
3042 | EFX_SET_OWORD_FIELD(temp, FRF_AB_USE_NIC_CLK, true); | 3034 | EFX_SET_OWORD_FIELD(temp, FRF_AB_USE_NIC_CLK, true); |
3043 | efx_writeo(efx, &temp, FR_AB_GPIO_CTL); | 3035 | efx_writeo(efx, &temp, FR_AB_GPIO_CTL); |
@@ -3128,7 +3120,7 @@ int falcon_init_nic(struct efx_nic *efx) | |||
3128 | /* Prefetch threshold 2 => fetch when descriptor cache half empty */ | 3120 | /* Prefetch threshold 2 => fetch when descriptor cache half empty */ |
3129 | EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_PREF_THRESHOLD, 2); | 3121 | EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_PREF_THRESHOLD, 2); |
3130 | /* Squash TX of packets of 16 bytes or less */ | 3122 | /* Squash TX of packets of 16 bytes or less */ |
3131 | if (falcon_rev(efx) >= FALCON_REV_B0) | 3123 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) |
3132 | EFX_SET_OWORD_FIELD(temp, FRF_BZ_TX_FLUSH_MIN_LEN_EN, 1); | 3124 | EFX_SET_OWORD_FIELD(temp, FRF_BZ_TX_FLUSH_MIN_LEN_EN, 1); |
3133 | efx_writeo(efx, &temp, FR_AZ_TX_RESERVED); | 3125 | efx_writeo(efx, &temp, FR_AZ_TX_RESERVED); |
3134 | 3126 | ||
@@ -3142,7 +3134,7 @@ int falcon_init_nic(struct efx_nic *efx) | |||
3142 | falcon_init_rx_cfg(efx); | 3134 | falcon_init_rx_cfg(efx); |
3143 | 3135 | ||
3144 | /* Set destination of both TX and RX Flush events */ | 3136 | /* Set destination of both TX and RX Flush events */ |
3145 | if (falcon_rev(efx) >= FALCON_REV_B0) { | 3137 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { |
3146 | EFX_POPULATE_OWORD_1(temp, FRF_BZ_FLS_EVQ_ID, 0); | 3138 | EFX_POPULATE_OWORD_1(temp, FRF_BZ_FLS_EVQ_ID, 0); |
3147 | efx_writeo(efx, &temp, FR_BZ_DP_CTRL); | 3139 | efx_writeo(efx, &temp, FR_BZ_DP_CTRL); |
3148 | } | 3140 | } |
@@ -3242,9 +3234,10 @@ void falcon_stop_nic_stats(struct efx_nic *efx) | |||
3242 | ************************************************************************** | 3234 | ************************************************************************** |
3243 | */ | 3235 | */ |
3244 | 3236 | ||
3245 | struct efx_nic_type falcon_a_nic_type = { | 3237 | struct efx_nic_type falcon_a1_nic_type = { |
3246 | .default_mac_ops = &falcon_xmac_operations, | 3238 | .default_mac_ops = &falcon_xmac_operations, |
3247 | 3239 | ||
3240 | .revision = EFX_REV_FALCON_A1, | ||
3248 | .mem_map_size = 0x20000, | 3241 | .mem_map_size = 0x20000, |
3249 | .txd_ptr_tbl_base = FR_AA_TX_DESC_PTR_TBL_KER, | 3242 | .txd_ptr_tbl_base = FR_AA_TX_DESC_PTR_TBL_KER, |
3250 | .rxd_ptr_tbl_base = FR_AA_RX_DESC_PTR_TBL_KER, | 3243 | .rxd_ptr_tbl_base = FR_AA_RX_DESC_PTR_TBL_KER, |
@@ -3257,9 +3250,10 @@ struct efx_nic_type falcon_a_nic_type = { | |||
3257 | .phys_addr_channels = 4, | 3250 | .phys_addr_channels = 4, |
3258 | }; | 3251 | }; |
3259 | 3252 | ||
3260 | struct efx_nic_type falcon_b_nic_type = { | 3253 | struct efx_nic_type falcon_b0_nic_type = { |
3261 | .default_mac_ops = &falcon_xmac_operations, | 3254 | .default_mac_ops = &falcon_xmac_operations, |
3262 | 3255 | ||
3256 | .revision = EFX_REV_FALCON_B0, | ||
3263 | /* Map everything up to and including the RSS indirection | 3257 | /* Map everything up to and including the RSS indirection |
3264 | * table. Don't map MSI-X table, MSI-X PBA since Linux | 3258 | * table. Don't map MSI-X table, MSI-X PBA since Linux |
3265 | * requires that they not be mapped. */ | 3259 | * requires that they not be mapped. */ |
diff --git a/drivers/net/sfc/falcon.h b/drivers/net/sfc/falcon.h index a561f6758bc6..81196a0fb504 100644 --- a/drivers/net/sfc/falcon.h +++ b/drivers/net/sfc/falcon.h | |||
@@ -19,15 +19,15 @@ | |||
19 | * Falcon hardware control | 19 | * Falcon hardware control |
20 | */ | 20 | */ |
21 | 21 | ||
22 | enum falcon_revision { | 22 | enum { |
23 | FALCON_REV_A0 = 0, | 23 | EFX_REV_FALCON_A0 = 0, |
24 | FALCON_REV_A1 = 1, | 24 | EFX_REV_FALCON_A1 = 1, |
25 | FALCON_REV_B0 = 2, | 25 | EFX_REV_FALCON_B0 = 2, |
26 | }; | 26 | }; |
27 | 27 | ||
28 | static inline int falcon_rev(struct efx_nic *efx) | 28 | static inline int efx_nic_rev(struct efx_nic *efx) |
29 | { | 29 | { |
30 | return efx->pci_dev->revision; | 30 | return efx->type->revision; |
31 | } | 31 | } |
32 | 32 | ||
33 | /** | 33 | /** |
@@ -95,8 +95,8 @@ static inline struct falcon_board *falcon_board(struct efx_nic *efx) | |||
95 | return &data->board; | 95 | return &data->board; |
96 | } | 96 | } |
97 | 97 | ||
98 | extern struct efx_nic_type falcon_a_nic_type; | 98 | extern struct efx_nic_type falcon_a1_nic_type; |
99 | extern struct efx_nic_type falcon_b_nic_type; | 99 | extern struct efx_nic_type falcon_b0_nic_type; |
100 | 100 | ||
101 | /************************************************************************** | 101 | /************************************************************************** |
102 | * | 102 | * |
diff --git a/drivers/net/sfc/falcon_xmac.c b/drivers/net/sfc/falcon_xmac.c index 784260f63d4c..1523efdcefe6 100644 --- a/drivers/net/sfc/falcon_xmac.c +++ b/drivers/net/sfc/falcon_xmac.c | |||
@@ -89,7 +89,7 @@ static void falcon_mask_status_intr(struct efx_nic *efx, bool enable) | |||
89 | { | 89 | { |
90 | efx_oword_t reg; | 90 | efx_oword_t reg; |
91 | 91 | ||
92 | if ((falcon_rev(efx) != FALCON_REV_B0) || LOOPBACK_INTERNAL(efx)) | 92 | if ((efx_nic_rev(efx) != EFX_REV_FALCON_B0) || LOOPBACK_INTERNAL(efx)) |
93 | return; | 93 | return; |
94 | 94 | ||
95 | /* We expect xgmii faults if the wireside link is up */ | 95 | /* We expect xgmii faults if the wireside link is up */ |
diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h index ca7dff2269d4..a42a0516d044 100644 --- a/drivers/net/sfc/net_driver.h +++ b/drivers/net/sfc/net_driver.h | |||
@@ -844,6 +844,7 @@ static inline const char *efx_dev_name(struct efx_nic *efx) | |||
844 | /** | 844 | /** |
845 | * struct efx_nic_type - Efx device type definition | 845 | * struct efx_nic_type - Efx device type definition |
846 | * @default_mac_ops: efx_mac_operations to set at startup | 846 | * @default_mac_ops: efx_mac_operations to set at startup |
847 | * @revision: Hardware architecture revision | ||
847 | * @mem_map_size: Memory BAR mapped size | 848 | * @mem_map_size: Memory BAR mapped size |
848 | * @txd_ptr_tbl_base: TX descriptor ring base address | 849 | * @txd_ptr_tbl_base: TX descriptor ring base address |
849 | * @rxd_ptr_tbl_base: RX descriptor ring base address | 850 | * @rxd_ptr_tbl_base: RX descriptor ring base address |
@@ -860,6 +861,7 @@ static inline const char *efx_dev_name(struct efx_nic *efx) | |||
860 | struct efx_nic_type { | 861 | struct efx_nic_type { |
861 | struct efx_mac_operations *default_mac_ops; | 862 | struct efx_mac_operations *default_mac_ops; |
862 | 863 | ||
864 | int revision; | ||
863 | unsigned int mem_map_size; | 865 | unsigned int mem_map_size; |
864 | unsigned int txd_ptr_tbl_base; | 866 | unsigned int txd_ptr_tbl_base; |
865 | unsigned int rxd_ptr_tbl_base; | 867 | unsigned int rxd_ptr_tbl_base; |
diff --git a/drivers/net/sfc/selftest.c b/drivers/net/sfc/selftest.c index 15806078971b..74e84afd5b6b 100644 --- a/drivers/net/sfc/selftest.c +++ b/drivers/net/sfc/selftest.c | |||
@@ -125,7 +125,7 @@ static int efx_test_chip(struct efx_nic *efx, struct efx_self_tests *tests) | |||
125 | int rc; | 125 | int rc; |
126 | 126 | ||
127 | /* Not supported on A-series silicon */ | 127 | /* Not supported on A-series silicon */ |
128 | if (falcon_rev(efx) < FALCON_REV_B0) | 128 | if (efx_nic_rev(efx) < EFX_REV_FALCON_B0) |
129 | return 0; | 129 | return 0; |
130 | 130 | ||
131 | rc = falcon_test_registers(efx); | 131 | rc = falcon_test_registers(efx); |
diff --git a/drivers/net/sfc/workarounds.h b/drivers/net/sfc/workarounds.h index 209ee1e90946..021d0d2d97f3 100644 --- a/drivers/net/sfc/workarounds.h +++ b/drivers/net/sfc/workarounds.h | |||
@@ -16,8 +16,8 @@ | |||
16 | */ | 16 | */ |
17 | 17 | ||
18 | #define EFX_WORKAROUND_ALWAYS(efx) 1 | 18 | #define EFX_WORKAROUND_ALWAYS(efx) 1 |
19 | #define EFX_WORKAROUND_FALCON_A(efx) (falcon_rev(efx) <= FALCON_REV_A1) | 19 | #define EFX_WORKAROUND_FALCON_A(efx) (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) |
20 | #define EFX_WORKAROUND_FALCON_AB(efx) (falcon_rev(efx) <= FALCON_REV_B0) | 20 | #define EFX_WORKAROUND_FALCON_AB(efx) (efx_nic_rev(efx) <= EFX_REV_FALCON_B0) |
21 | #define EFX_WORKAROUND_10G(efx) EFX_IS10G(efx) | 21 | #define EFX_WORKAROUND_10G(efx) EFX_IS10G(efx) |
22 | #define EFX_WORKAROUND_SFT9001(efx) ((efx)->phy_type == PHY_TYPE_SFT9001A || \ | 22 | #define EFX_WORKAROUND_SFT9001(efx) ((efx)->phy_type == PHY_TYPE_SFT9001A || \ |
23 | (efx)->phy_type == PHY_TYPE_SFT9001B) | 23 | (efx)->phy_type == PHY_TYPE_SFT9001B) |