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authorRoy Zang <tie-fei.zang@freescale.com>2007-06-13 05:13:42 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-07-03 03:04:29 -0400
commit68fb0d203f4f62c8d1ac24d8ef2473582d8ea9db (patch)
tree616a6293121cafd2dc2ba83f46399cadf9f9dc5e
parenta4ecababf4f007940300374ff68ac10b96733586 (diff)
[POWERPC] 85xx: Fix 8548CDS reset bug
Begin with MPC8548 a new reset control register is added that asserts HRESET_REQ to board logic. This register is used for chip reset. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts6
-rw-r--r--arch/powerpc/platforms/85xx/misc.c32
2 files changed, 38 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index ad96381033c0..0550a3c391aa 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -177,6 +177,12 @@
177 interrupt-parent = <&mpic>; 177 interrupt-parent = <&mpic>;
178 }; 178 };
179 179
180 global-utilities@e0000 { //global utilities reg
181 compatible = "fsl,mpc8548-guts";
182 reg = <e0000 1000>;
183 fsl,has-rstcr;
184 };
185
180 pci1: pci@8000 { 186 pci1: pci@8000 {
181 interrupt-map-mask = <1f800 0 0 7>; 187 interrupt-map-mask = <1f800 0 0 7>;
182 interrupt-map = < 188 interrupt-map = <
diff --git a/arch/powerpc/platforms/85xx/misc.c b/arch/powerpc/platforms/85xx/misc.c
index 3e62fcb04c1c..4fe376e9c3b6 100644
--- a/arch/powerpc/platforms/85xx/misc.c
+++ b/arch/powerpc/platforms/85xx/misc.c
@@ -13,11 +13,43 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <asm/irq.h> 15#include <asm/irq.h>
16#include <asm/io.h>
17#include <asm/prom.h>
18#include <sysdev/fsl_soc.h>
19
20static __be32 __iomem *rstcr;
16 21
17extern void abort(void); 22extern void abort(void);
18 23
24static int __init mpc85xx_rstcr(void)
25{
26 struct device_node *np;
27 np = of_find_node_by_name(NULL, "global-utilities");
28 if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
29 const u32 *prop = of_get_property(np, "reg", NULL);
30 if (prop) {
31 /* map reset control register
32 * 0xE00B0 is offset of reset control register
33 */
34 rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
35 if (!rstcr)
36 printk (KERN_EMERG "Error: reset control "
37 "register not mapped!\n");
38 }
39 } else
40 printk (KERN_INFO "rstcr compatible register does not exist!\n");
41 if (np)
42 of_node_put(np);
43 return 0;
44}
45
46arch_initcall(mpc85xx_rstcr);
47
19void mpc85xx_restart(char *cmd) 48void mpc85xx_restart(char *cmd)
20{ 49{
21 local_irq_disable(); 50 local_irq_disable();
51 if (rstcr)
52 /* set reset control register */
53 out_be32(rstcr, 0x2); /* HRESET_REQ */
22 abort(); 54 abort();
23} 55}