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authorGiuseppe CAVALLARO <peppe.cavallaro@st.com>2010-04-13 16:21:13 -0400
committerDavid S. Miller <davem@davemloft.net>2010-04-14 07:49:51 -0400
commit688911c2f5e5e4f33b5a1c32839184f1fdf814ee (patch)
tree8fc98665157406601001822c5cd8d65f4c5ce457
parent56b106ae7b1f6b7cef4ef7e79a03b59cfc940923 (diff)
stmmac: fix Transmit FIFO flush operation
Fix the Transmit FIFO flush operation; it was disabled while reworking the descriptor structures. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/stmmac/common.h1
-rw-r--r--drivers/net/stmmac/dwmac1000.h1
-rw-r--r--drivers/net/stmmac/dwmac1000_dma.c9
-rw-r--r--drivers/net/stmmac/dwmac_dma.h1
-rw-r--r--drivers/net/stmmac/dwmac_lib.c7
-rw-r--r--drivers/net/stmmac/enh_desc.c6
6 files changed, 12 insertions, 13 deletions
diff --git a/drivers/net/stmmac/common.h b/drivers/net/stmmac/common.h
index bd3b78510706..27a05b443ec3 100644
--- a/drivers/net/stmmac/common.h
+++ b/drivers/net/stmmac/common.h
@@ -244,3 +244,4 @@ extern void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6],
244 unsigned int high, unsigned int low); 244 unsigned int high, unsigned int low);
245extern void stmmac_get_mac_addr(unsigned long ioaddr, unsigned char *addr, 245extern void stmmac_get_mac_addr(unsigned long ioaddr, unsigned char *addr,
246 unsigned int high, unsigned int low); 246 unsigned int high, unsigned int low);
247extern void dwmac_dma_flush_tx_fifo(unsigned long ioaddr);
diff --git a/drivers/net/stmmac/dwmac1000.h b/drivers/net/stmmac/dwmac1000.h
index 3b784fc9320b..d8d0f3553770 100644
--- a/drivers/net/stmmac/dwmac1000.h
+++ b/drivers/net/stmmac/dwmac1000.h
@@ -172,7 +172,6 @@ enum rfd {
172 deac_full_minus_4 = 0x00401800, 172 deac_full_minus_4 = 0x00401800,
173}; 173};
174#define DMA_CONTROL_TSF 0x00200000 /* Transmit Store and Forward */ 174#define DMA_CONTROL_TSF 0x00200000 /* Transmit Store and Forward */
175#define DMA_CONTROL_FTF 0x00100000 /* Flush transmit FIFO */
176 175
177enum ttc_control { 176enum ttc_control {
178 DMA_CONTROL_TTC_64 = 0x00000000, 177 DMA_CONTROL_TTC_64 = 0x00000000,
diff --git a/drivers/net/stmmac/dwmac1000_dma.c b/drivers/net/stmmac/dwmac1000_dma.c
index 8d3ea99d8adf..a547aa99e114 100644
--- a/drivers/net/stmmac/dwmac1000_dma.c
+++ b/drivers/net/stmmac/dwmac1000_dma.c
@@ -58,15 +58,6 @@ static int dwmac1000_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx,
58 return 0; 58 return 0;
59} 59}
60 60
61/* Transmit FIFO flush operation */
62static void dwmac1000_flush_tx_fifo(unsigned long ioaddr)
63{
64 u32 csr6 = readl(ioaddr + DMA_CONTROL);
65 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);
66
67 do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF));
68}
69
70static void dwmac1000_dma_operation_mode(unsigned long ioaddr, int txmode, 61static void dwmac1000_dma_operation_mode(unsigned long ioaddr, int txmode,
71 int rxmode) 62 int rxmode)
72{ 63{
diff --git a/drivers/net/stmmac/dwmac_dma.h b/drivers/net/stmmac/dwmac_dma.h
index de848d9f6060..7b815a1b7b8c 100644
--- a/drivers/net/stmmac/dwmac_dma.h
+++ b/drivers/net/stmmac/dwmac_dma.h
@@ -95,6 +95,7 @@
95#define DMA_STATUS_TU 0x00000004 /* Transmit Buffer Unavailable */ 95#define DMA_STATUS_TU 0x00000004 /* Transmit Buffer Unavailable */
96#define DMA_STATUS_TPS 0x00000002 /* Transmit Process Stopped */ 96#define DMA_STATUS_TPS 0x00000002 /* Transmit Process Stopped */
97#define DMA_STATUS_TI 0x00000001 /* Transmit Interrupt */ 97#define DMA_STATUS_TI 0x00000001 /* Transmit Interrupt */
98#define DMA_CONTROL_FTF 0x00100000 /* Flush transmit FIFO */
98 99
99extern void dwmac_enable_dma_transmission(unsigned long ioaddr); 100extern void dwmac_enable_dma_transmission(unsigned long ioaddr);
100extern void dwmac_enable_dma_irq(unsigned long ioaddr); 101extern void dwmac_enable_dma_irq(unsigned long ioaddr);
diff --git a/drivers/net/stmmac/dwmac_lib.c b/drivers/net/stmmac/dwmac_lib.c
index d4adb1eaa447..0a504adb7eb3 100644
--- a/drivers/net/stmmac/dwmac_lib.c
+++ b/drivers/net/stmmac/dwmac_lib.c
@@ -227,6 +227,13 @@ int dwmac_dma_interrupt(unsigned long ioaddr,
227 return ret; 227 return ret;
228} 228}
229 229
230void dwmac_dma_flush_tx_fifo(unsigned long ioaddr)
231{
232 u32 csr6 = readl(ioaddr + DMA_CONTROL);
233 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);
234
235 do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF));
236}
230 237
231void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6], 238void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6],
232 unsigned int high, unsigned int low) 239 unsigned int high, unsigned int low)
diff --git a/drivers/net/stmmac/enh_desc.c b/drivers/net/stmmac/enh_desc.c
index e5ac2593dc68..eb5684a1f713 100644
--- a/drivers/net/stmmac/enh_desc.c
+++ b/drivers/net/stmmac/enh_desc.c
@@ -40,7 +40,7 @@ static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x,
40 if (unlikely(p->des01.etx.frame_flushed)) { 40 if (unlikely(p->des01.etx.frame_flushed)) {
41 CHIP_DBG(KERN_ERR "\tframe_flushed error\n"); 41 CHIP_DBG(KERN_ERR "\tframe_flushed error\n");
42 x->tx_frame_flushed++; 42 x->tx_frame_flushed++;
43 /*enh_desc_flush_tx_fifo(ioaddr);*/ 43 dwmac_dma_flush_tx_fifo(ioaddr);
44 } 44 }
45 45
46 if (unlikely(p->des01.etx.loss_carrier)) { 46 if (unlikely(p->des01.etx.loss_carrier)) {
@@ -68,7 +68,7 @@ static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x,
68 68
69 if (unlikely(p->des01.etx.underflow_error)) { 69 if (unlikely(p->des01.etx.underflow_error)) {
70 CHIP_DBG(KERN_ERR "\tunderflow error\n"); 70 CHIP_DBG(KERN_ERR "\tunderflow error\n");
71 /*enh_desc_flush_tx_fifo(ioaddr);*/ 71 dwmac_dma_flush_tx_fifo(ioaddr);
72 x->tx_underflow++; 72 x->tx_underflow++;
73 } 73 }
74 74
@@ -80,7 +80,7 @@ static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x,
80 if (unlikely(p->des01.etx.payload_error)) { 80 if (unlikely(p->des01.etx.payload_error)) {
81 CHIP_DBG(KERN_ERR "\tAddr/Payload csum error\n"); 81 CHIP_DBG(KERN_ERR "\tAddr/Payload csum error\n");
82 x->tx_payload_error++; 82 x->tx_payload_error++;
83 /*enh_desc_flush_tx_fifo(ioaddr);*/ 83 dwmac_dma_flush_tx_fifo(ioaddr);
84 } 84 }
85 85
86 ret = -1; 86 ret = -1;