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authorSandeep Paulraj <s-paulraj@ti.com>2009-06-20 14:15:51 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-08-26 03:56:59 -0400
commit37b798da5df377521a8cd32a82467aa2d431f33e (patch)
treee06ada47d5397cd3a7d57dc0ce030ff56953a3ff
parenta45c8ba30bca0c3257785cae28680781fd356a85 (diff)
davinci: dm365: add NAND support to EVM board
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c84
1 files changed, 84 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index e62d1ab3bb2a..3675e844b9b1 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -20,6 +20,9 @@
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/i2c/at24.h> 22#include <linux/i2c/at24.h>
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/partitions.h>
25#include <linux/mtd/nand.h>
23#include <asm/setup.h> 26#include <asm/setup.h>
24#include <asm/mach-types.h> 27#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
@@ -34,10 +37,84 @@
34#include <mach/serial.h> 37#include <mach/serial.h>
35#include <mach/common.h> 38#include <mach/common.h>
36#include <mach/mmc.h> 39#include <mach/mmc.h>
40#include <mach/nand.h>
41
42#define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000
43#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
37 44
38#define DM365_EVM_PHY_MASK (0x2) 45#define DM365_EVM_PHY_MASK (0x2)
39#define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ 46#define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
40 47
48/* NOTE: this is geared for the standard config, with a socketed
49 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
50 * swap chips with a different block size, partitioning will
51 * need to be changed. This NAND chip MT29F16G08FAA is the default
52 * NAND shipped with the Spectrum Digital DM365 EVM
53 */
54#define NAND_BLOCK_SIZE SZ_128K
55
56static struct mtd_partition davinci_nand_partitions[] = {
57 {
58 /* UBL (a few copies) plus U-Boot */
59 .name = "bootloader",
60 .offset = 0,
61 .size = 28 * NAND_BLOCK_SIZE,
62 .mask_flags = MTD_WRITEABLE, /* force read-only */
63 }, {
64 /* U-Boot environment */
65 .name = "params",
66 .offset = MTDPART_OFS_APPEND,
67 .size = 2 * NAND_BLOCK_SIZE,
68 .mask_flags = 0,
69 }, {
70 .name = "kernel",
71 .offset = MTDPART_OFS_APPEND,
72 .size = SZ_4M,
73 .mask_flags = 0,
74 }, {
75 .name = "filesystem1",
76 .offset = MTDPART_OFS_APPEND,
77 .size = SZ_512M,
78 .mask_flags = 0,
79 }, {
80 .name = "filesystem2",
81 .offset = MTDPART_OFS_APPEND,
82 .size = MTDPART_SIZ_FULL,
83 .mask_flags = 0,
84 }
85 /* two blocks with bad block table (and mirror) at the end */
86};
87
88static struct davinci_nand_pdata davinci_nand_data = {
89 .mask_chipsel = BIT(14),
90 .parts = davinci_nand_partitions,
91 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
92 .ecc_mode = NAND_ECC_HW,
93 .options = NAND_USE_FLASH_BBT,
94};
95
96static struct resource davinci_nand_resources[] = {
97 {
98 .start = DM365_ASYNC_EMIF_DATA_CE0_BASE,
99 .end = DM365_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = DM365_ASYNC_EMIF_CONTROL_BASE,
103 .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
104 .flags = IORESOURCE_MEM,
105 },
106};
107
108static struct platform_device davinci_nand_device = {
109 .name = "davinci_nand",
110 .id = 0,
111 .num_resources = ARRAY_SIZE(davinci_nand_resources),
112 .resource = davinci_nand_resources,
113 .dev = {
114 .platform_data = &davinci_nand_data,
115 },
116};
117
41static struct at24_platform_data eeprom_info = { 118static struct at24_platform_data eeprom_info = {
42 .byte_len = (256*1024) / 8, 119 .byte_len = (256*1024) / 8,
43 .page_size = 64, 120 .page_size = 64,
@@ -122,6 +199,10 @@ static void __init evm_init_i2c(void)
122 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); 199 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
123} 200}
124 201
202static struct platform_device *dm365_evm_devices[] __initdata = {
203 &davinci_nand_device,
204};
205
125static struct davinci_uart_config uart_config __initdata = { 206static struct davinci_uart_config uart_config __initdata = {
126 .enabled_uarts = (1 << 0), 207 .enabled_uarts = (1 << 0),
127}; 208};
@@ -135,6 +216,9 @@ static __init void dm365_evm_init(void)
135{ 216{
136 struct davinci_soc_info *soc_info = &davinci_soc_info; 217 struct davinci_soc_info *soc_info = &davinci_soc_info;
137 218
219 platform_add_devices(dm365_evm_devices,
220 ARRAY_SIZE(dm365_evm_devices));
221
138 evm_init_i2c(); 222 evm_init_i2c();
139 davinci_serial_init(&uart_config); 223 davinci_serial_init(&uart_config);
140 224