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authorSonic Zhang <sonic.zhang@analog.com>2009-07-20 11:05:37 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-07-20 19:38:44 -0400
commit0ecf24ef49d4f46ff5d6af357c3b9ec8d798160d (patch)
treed223050f828261457c17204bc830fe1c6b12c24e
parent23198fda7182969b619613a555f8645fdc3dc334 (diff)
blackfin: fix wrong CTS inversion
The Blackfin serial headers were inverting the CTS value leading to wrong handling of the CTS line which broke CTS/RTS handling completely. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat
-rw-r--r--arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h2
6 files changed, 6 insertions, 6 deletions
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
index 0fb2ce5d840e..dbade93395eb 100644
--- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
index a625659dd67f..ebd6cebc1fbc 100644
--- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
index a3789d7ccf8c..4062e24e759b 100644
--- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
index b86662fb9de7..e95d54f9af6c 100644
--- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
index c536551eb4b8..999f239fe1a6 100644
--- a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
index a1b50878553f..fd5e8878b8c4 100644
--- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 23:01:12 -0500