diff options
author | David Woodhouse <dwmw2@infradead.org> | 2007-03-23 06:40:04 -0400 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2007-03-23 06:40:04 -0400 |
commit | 8e5368a1e230a87220ef0d238584002e4a429ce3 (patch) | |
tree | 0831aeec53b5f22592864d3449bd1e0915bee2a1 | |
parent | 3a6effe81fa0bd2fb9c6c5ecde665492536733e3 (diff) |
[MTD] [NAND] Remember timing settings for CAFÉ NAND controller.
We'll need them for suspend/resume.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
-rw-r--r-- | drivers/mtd/nand/cafe.c | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/drivers/mtd/nand/cafe.c b/drivers/mtd/nand/cafe.c index fd6bb3ed40df..c328a7514510 100644 --- a/drivers/mtd/nand/cafe.c +++ b/drivers/mtd/nand/cafe.c | |||
@@ -530,7 +530,6 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev, | |||
530 | { | 530 | { |
531 | struct mtd_info *mtd; | 531 | struct mtd_info *mtd; |
532 | struct cafe_priv *cafe; | 532 | struct cafe_priv *cafe; |
533 | uint32_t timing1, timing2, timing3; | ||
534 | uint32_t ctrl; | 533 | uint32_t ctrl; |
535 | int err = 0; | 534 | int err = 0; |
536 | 535 | ||
@@ -587,21 +586,19 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev, | |||
587 | } | 586 | } |
588 | 587 | ||
589 | if (numtimings == 3) { | 588 | if (numtimings == 3) { |
590 | timing1 = timing[0]; | ||
591 | timing2 = timing[1]; | ||
592 | timing3 = timing[2]; | ||
593 | cafe_dev_dbg(&cafe->pdev->dev, "Using provided timings (%08x %08x %08x)\n", | 589 | cafe_dev_dbg(&cafe->pdev->dev, "Using provided timings (%08x %08x %08x)\n", |
594 | timing1, timing2, timing3); | 590 | timing[0], timing[1], timing[2]); |
595 | } else { | 591 | } else { |
596 | timing1 = cafe_readl(cafe, NAND_TIMING1); | 592 | timing[0] = cafe_readl(cafe, NAND_TIMING1); |
597 | timing2 = cafe_readl(cafe, NAND_TIMING2); | 593 | timing[1] = cafe_readl(cafe, NAND_TIMING2); |
598 | timing3 = cafe_readl(cafe, NAND_TIMING3); | 594 | timing[2] = cafe_readl(cafe, NAND_TIMING3); |
599 | 595 | ||
600 | if (timing1 | timing2 | timing3) { | 596 | if (timing[0] | timing[1] | timing[2]) { |
601 | cafe_dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n", timing1, timing2, timing3); | 597 | cafe_dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n", |
598 | timing[0], timing[1], timing[2]); | ||
602 | } else { | 599 | } else { |
603 | dev_warn(&cafe->pdev->dev, "Timing registers unset; using most conservative defaults\n"); | 600 | dev_warn(&cafe->pdev->dev, "Timing registers unset; using most conservative defaults\n"); |
604 | timing1 = timing2 = timing3 = 0xffffffff; | 601 | timing[0] = timing[1] = timing[2] = 0xffffffff; |
605 | } | 602 | } |
606 | } | 603 | } |
607 | 604 | ||
@@ -609,9 +606,9 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev, | |||
609 | cafe_writel(cafe, 1, NAND_RESET); | 606 | cafe_writel(cafe, 1, NAND_RESET); |
610 | cafe_writel(cafe, 0, NAND_RESET); | 607 | cafe_writel(cafe, 0, NAND_RESET); |
611 | 608 | ||
612 | cafe_writel(cafe, timing1, NAND_TIMING1); | 609 | cafe_writel(cafe, timing[0], NAND_TIMING1); |
613 | cafe_writel(cafe, timing2, NAND_TIMING2); | 610 | cafe_writel(cafe, timing[1], NAND_TIMING2); |
614 | cafe_writel(cafe, timing3, NAND_TIMING3); | 611 | cafe_writel(cafe, timing[2], NAND_TIMING3); |
615 | 612 | ||
616 | cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK); | 613 | cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK); |
617 | err = request_irq(pdev->irq, &cafe_nand_interrupt, IRQF_SHARED, | 614 | err = request_irq(pdev->irq, &cafe_nand_interrupt, IRQF_SHARED, |