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authorChuck Ebbert <76306.1226@compuserve.com>2006-07-12 16:41:15 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-13 10:48:28 -0400
commitb43c7cec6bf9558336fb033d1217fc765d259c47 (patch)
treea1176161bcd7dcdf7a4b198402f45778ed5a5834
parente47f31787dee5bf57453e18edefff56e17fa44f9 (diff)
[PATCH] i386: system.h: remove extra semicolons and fix order
include/asm-i386/system.h has trailing semicolons in some of the macros that cause legitimate code to fail compilation, so remove them. Also remove extra blank lines within one group of macros. And put stts() and clts() back together; they got separated somehow. Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--include/asm-i386/system.h21
1 files changed, 10 insertions, 11 deletions
diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h
index db398d88b1d9..2db168ef949f 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-i386/system.h
@@ -82,10 +82,6 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
82#define savesegment(seg, value) \ 82#define savesegment(seg, value) \
83 asm volatile("mov %%" #seg ",%0":"=rm" (value)) 83 asm volatile("mov %%" #seg ",%0":"=rm" (value))
84 84
85/*
86 * Clear and set 'TS' bit respectively
87 */
88#define clts() __asm__ __volatile__ ("clts")
89#define read_cr0() ({ \ 85#define read_cr0() ({ \
90 unsigned int __dummy; \ 86 unsigned int __dummy; \
91 __asm__ __volatile__( \ 87 __asm__ __volatile__( \
@@ -94,7 +90,7 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
94 __dummy; \ 90 __dummy; \
95}) 91})
96#define write_cr0(x) \ 92#define write_cr0(x) \
97 __asm__ __volatile__("movl %0,%%cr0": :"r" (x)); 93 __asm__ __volatile__("movl %0,%%cr0": :"r" (x))
98 94
99#define read_cr2() ({ \ 95#define read_cr2() ({ \
100 unsigned int __dummy; \ 96 unsigned int __dummy; \
@@ -104,7 +100,7 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
104 __dummy; \ 100 __dummy; \
105}) 101})
106#define write_cr2(x) \ 102#define write_cr2(x) \
107 __asm__ __volatile__("movl %0,%%cr2": :"r" (x)); 103 __asm__ __volatile__("movl %0,%%cr2": :"r" (x))
108 104
109#define read_cr3() ({ \ 105#define read_cr3() ({ \
110 unsigned int __dummy; \ 106 unsigned int __dummy; \
@@ -114,7 +110,7 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
114 __dummy; \ 110 __dummy; \
115}) 111})
116#define write_cr3(x) \ 112#define write_cr3(x) \
117 __asm__ __volatile__("movl %0,%%cr3": :"r" (x)); 113 __asm__ __volatile__("movl %0,%%cr3": :"r" (x))
118 114
119#define read_cr4() ({ \ 115#define read_cr4() ({ \
120 unsigned int __dummy; \ 116 unsigned int __dummy; \
@@ -123,7 +119,6 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
123 :"=r" (__dummy)); \ 119 :"=r" (__dummy)); \
124 __dummy; \ 120 __dummy; \
125}) 121})
126
127#define read_cr4_safe() ({ \ 122#define read_cr4_safe() ({ \
128 unsigned int __dummy; \ 123 unsigned int __dummy; \
129 /* This could fault if %cr4 does not exist */ \ 124 /* This could fault if %cr4 does not exist */ \
@@ -135,15 +130,19 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
135 : "=r" (__dummy): "0" (0)); \ 130 : "=r" (__dummy): "0" (0)); \
136 __dummy; \ 131 __dummy; \
137}) 132})
138
139#define write_cr4(x) \ 133#define write_cr4(x) \
140 __asm__ __volatile__("movl %0,%%cr4": :"r" (x)); 134 __asm__ __volatile__("movl %0,%%cr4": :"r" (x))
135
136/*
137 * Clear and set 'TS' bit respectively
138 */
139#define clts() __asm__ __volatile__ ("clts")
141#define stts() write_cr0(8 | read_cr0()) 140#define stts() write_cr0(8 | read_cr0())
142 141
143#endif /* __KERNEL__ */ 142#endif /* __KERNEL__ */
144 143
145#define wbinvd() \ 144#define wbinvd() \
146 __asm__ __volatile__ ("wbinvd": : :"memory"); 145 __asm__ __volatile__ ("wbinvd": : :"memory")
147 146
148static inline unsigned long get_limit(unsigned long segment) 147static inline unsigned long get_limit(unsigned long segment)
149{ 148{