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authorVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:37:58 -0400
committerVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:37:58 -0400
commitfc8e50e349aa722d9f97ed9ba30e324ede8fa408 (patch)
tree8ed14947a5c448f697240006efab77aac60281b7
parent902f392d011d0a781ea4695c464345faa6664540 (diff)
POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr early, as well as places happily assuming that fact. This is more like the 2.4 legacy stuff, and is at least confusing and unclear now. To keep the world comfortable, a new mechanism is introduced: before accessing specific immr register/register set, one needs to map it, using cpm2_map(<reg>), for instance, access to CPM command register will look like volatile cpm_cpm2_t *cp = cpm2_map(im_cpm); keeping the code clear, yet without "already defined somewhere" cpm2_immr. So far, unmapping code is not implemented, but it's not a big deal to add it, if the whole idea makes sense. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
-rw-r--r--arch/powerpc/sysdev/cpm2_common.c19
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c34
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.h2
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c2
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.c130
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.h2
-rw-r--r--include/asm-powerpc/fs_pd.h18
-rw-r--r--include/asm-ppc/cpm2.h4
-rw-r--r--include/asm-ppc/fs_pd.h4
9 files changed, 148 insertions, 67 deletions
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index f7a04892400b..73376f9c1560 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -51,6 +51,7 @@ cpm_cpm2_t *cpmp; /* Pointer to comm processor space */
51 * the communication processor devices. 51 * the communication processor devices.
52 */ 52 */
53cpm2_map_t *cpm2_immr; 53cpm2_map_t *cpm2_immr;
54intctl_cpm2_t *cpm2_intctl;
54 55
55#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount 56#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount
56 of space for CPM as it is larger 57 of space for CPM as it is larger
@@ -60,6 +61,7 @@ void
60cpm2_reset(void) 61cpm2_reset(void)
61{ 62{
62 cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); 63 cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
64 cpm2_intctl = cpm2_map(im_intctl);
63 65
64 /* Reclaim the DP memory for our use. 66 /* Reclaim the DP memory for our use.
65 */ 67 */
@@ -94,13 +96,15 @@ cpm_setbrg(uint brg, uint rate)
94 /* This is good enough to get SMCs running..... 96 /* This is good enough to get SMCs running.....
95 */ 97 */
96 if (brg < 4) { 98 if (brg < 4) {
97 bp = (uint *)&cpm2_immr->im_brgc1; 99 bp = cpm2_map_size(im_brgc1, 16);
98 } else { 100 } else {
99 bp = (uint *)&cpm2_immr->im_brgc5; 101 bp = cpm2_map_size(im_brgc5, 16);
100 brg -= 4; 102 brg -= 4;
101 } 103 }
102 bp += brg; 104 bp += brg;
103 *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; 105 *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
106
107 cpm2_unmap(bp);
104} 108}
105 109
106/* This function is used to set high speed synchronous baud rate 110/* This function is used to set high speed synchronous baud rate
@@ -112,16 +116,18 @@ cpm2_fastbrg(uint brg, uint rate, int div16)
112 volatile uint *bp; 116 volatile uint *bp;
113 117
114 if (brg < 4) { 118 if (brg < 4) {
115 bp = (uint *)&cpm2_immr->im_brgc1; 119 bp = cpm2_map_size(im_brgc1, 16);
116 } 120 }
117 else { 121 else {
118 bp = (uint *)&cpm2_immr->im_brgc5; 122 bp = cpm2_map_size(im_brgc5, 16);
119 brg -= 4; 123 brg -= 4;
120 } 124 }
121 bp += brg; 125 bp += brg;
122 *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; 126 *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
123 if (div16) 127 if (div16)
124 *bp |= CPM_BRG_DIV16; 128 *bp |= CPM_BRG_DIV16;
129
130 cpm2_unmap(bp);
125} 131}
126 132
127/* 133/*
@@ -132,11 +138,14 @@ static spinlock_t cpm_dpmem_lock;
132 * until the memory subsystem goes up... */ 138 * until the memory subsystem goes up... */
133static rh_block_t cpm_boot_dpmem_rh_block[16]; 139static rh_block_t cpm_boot_dpmem_rh_block[16];
134static rh_info_t cpm_dpmem_info; 140static rh_info_t cpm_dpmem_info;
141static u8* im_dprambase;
135 142
136static void cpm2_dpinit(void) 143static void cpm2_dpinit(void)
137{ 144{
138 spin_lock_init(&cpm_dpmem_lock); 145 spin_lock_init(&cpm_dpmem_lock);
139 146
147 im_dprambase = ioremap(CPM_MAP_ADDR, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE);
148
140 /* initialize the info header */ 149 /* initialize the info header */
141 rh_init(&cpm_dpmem_info, 1, 150 rh_init(&cpm_dpmem_info, 1,
142 sizeof(cpm_boot_dpmem_rh_block) / 151 sizeof(cpm_boot_dpmem_rh_block) /
@@ -205,6 +214,6 @@ EXPORT_SYMBOL(cpm_dpdump);
205 214
206void *cpm_dpram_addr(uint offset) 215void *cpm_dpram_addr(uint offset)
207{ 216{
208 return (void *)&cpm2_immr->im_dprambase[offset]; 217 return (void *)(im_dprambase + offset);
209} 218}
210EXPORT_SYMBOL(cpm_dpram_addr); 219EXPORT_SYMBOL(cpm_dpram_addr);
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index c804475c07d3..51752990f7b9 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -78,7 +78,7 @@ static void cpm2_mask_irq(unsigned int irq_nr)
78 bit = irq_to_siubit[irq_nr]; 78 bit = irq_to_siubit[irq_nr];
79 word = irq_to_siureg[irq_nr]; 79 word = irq_to_siureg[irq_nr];
80 80
81 simr = &(cpm2_immr->im_intctl.ic_simrh); 81 simr = &(cpm2_intctl->ic_simrh);
82 ppc_cached_irq_mask[word] &= ~(1 << bit); 82 ppc_cached_irq_mask[word] &= ~(1 << bit);
83 simr[word] = ppc_cached_irq_mask[word]; 83 simr[word] = ppc_cached_irq_mask[word];
84} 84}
@@ -93,7 +93,7 @@ static void cpm2_unmask_irq(unsigned int irq_nr)
93 bit = irq_to_siubit[irq_nr]; 93 bit = irq_to_siubit[irq_nr];
94 word = irq_to_siureg[irq_nr]; 94 word = irq_to_siureg[irq_nr];
95 95
96 simr = &(cpm2_immr->im_intctl.ic_simrh); 96 simr = &(cpm2_intctl->ic_simrh);
97 ppc_cached_irq_mask[word] |= 1 << bit; 97 ppc_cached_irq_mask[word] |= 1 << bit;
98 simr[word] = ppc_cached_irq_mask[word]; 98 simr[word] = ppc_cached_irq_mask[word];
99} 99}
@@ -108,8 +108,8 @@ static void cpm2_mask_and_ack(unsigned int irq_nr)
108 bit = irq_to_siubit[irq_nr]; 108 bit = irq_to_siubit[irq_nr];
109 word = irq_to_siureg[irq_nr]; 109 word = irq_to_siureg[irq_nr];
110 110
111 simr = &(cpm2_immr->im_intctl.ic_simrh); 111 simr = &(cpm2_intctl->ic_simrh);
112 sipnr = &(cpm2_immr->im_intctl.ic_sipnrh); 112 sipnr = &(cpm2_intctl->ic_sipnrh);
113 ppc_cached_irq_mask[word] &= ~(1 << bit); 113 ppc_cached_irq_mask[word] &= ~(1 << bit);
114 simr[word] = ppc_cached_irq_mask[word]; 114 simr[word] = ppc_cached_irq_mask[word];
115 sipnr[word] = 1 << bit; 115 sipnr[word] = 1 << bit;
@@ -127,7 +127,7 @@ static void cpm2_end_irq(unsigned int irq_nr)
127 bit = irq_to_siubit[irq_nr]; 127 bit = irq_to_siubit[irq_nr];
128 word = irq_to_siureg[irq_nr]; 128 word = irq_to_siureg[irq_nr];
129 129
130 simr = &(cpm2_immr->im_intctl.ic_simrh); 130 simr = &(cpm2_intctl->ic_simrh);
131 ppc_cached_irq_mask[word] |= 1 << bit; 131 ppc_cached_irq_mask[word] |= 1 << bit;
132 simr[word] = ppc_cached_irq_mask[word]; 132 simr[word] = ppc_cached_irq_mask[word];
133 /* 133 /*
@@ -152,10 +152,10 @@ int cpm2_get_irq(struct pt_regs *regs)
152 int irq; 152 int irq;
153 unsigned long bits; 153 unsigned long bits;
154 154
155 /* For CPM2, read the SIVEC register and shift the bits down 155 /* For CPM2, read the SIVEC register and shift the bits down
156 * to get the irq number.*/ 156 * to get the irq number. */
157 bits = cpm2_immr->im_intctl.ic_sivec; 157 bits = cpm2_intctl->ic_sivec;
158 irq = bits >> 26; 158 irq = bits >> 26;
159 159
160 if (irq == 0) 160 if (irq == 0)
161 return(-1); 161 return(-1);
@@ -223,26 +223,26 @@ void cpm2_pic_init(struct device_node *node)
223 223
224 /* Mask out everything */ 224 /* Mask out everything */
225 225
226 cpm2_immr->im_intctl.ic_simrh = 0x00000000; 226 cpm2_intctl->ic_simrh = 0x00000000;
227 cpm2_immr->im_intctl.ic_simrl = 0x00000000; 227 cpm2_intctl->ic_simrl = 0x00000000;
228 228
229 wmb(); 229 wmb();
230 230
231 /* Ack everything */ 231 /* Ack everything */
232 cpm2_immr->im_intctl.ic_sipnrh = 0xffffffff; 232 cpm2_intctl->ic_sipnrh = 0xffffffff;
233 cpm2_immr->im_intctl.ic_sipnrl = 0xffffffff; 233 cpm2_intctl->ic_sipnrl = 0xffffffff;
234 wmb(); 234 wmb();
235 235
236 /* Dummy read of the vector */ 236 /* Dummy read of the vector */
237 i = cpm2_immr->im_intctl.ic_sivec; 237 i = cpm2_intctl->ic_sivec;
238 rmb(); 238 rmb();
239 239
240 /* Initialize the default interrupt mapping priorities, 240 /* Initialize the default interrupt mapping priorities,
241 * in case the boot rom changed something on us. 241 * in case the boot rom changed something on us.
242 */ 242 */
243 cpm2_immr->im_intctl.ic_sicr = 0; 243 cpm2_intctl->ic_sicr = 0;
244 cpm2_immr->im_intctl.ic_scprrh = 0x05309770; 244 cpm2_intctl->ic_scprrh = 0x05309770;
245 cpm2_immr->im_intctl.ic_scprrl = 0x05309770; 245 cpm2_intctl->ic_scprrl = 0x05309770;
246 246
247 /* create a legacy host */ 247 /* create a legacy host */
248 if (node) 248 if (node)
diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h
index 436cca77db64..d63e45d4df58 100644
--- a/arch/powerpc/sysdev/cpm2_pic.h
+++ b/arch/powerpc/sysdev/cpm2_pic.h
@@ -1,6 +1,8 @@
1#ifndef _PPC_KERNEL_CPM2_H 1#ifndef _PPC_KERNEL_CPM2_H
2#define _PPC_KERNEL_CPM2_H 2#define _PPC_KERNEL_CPM2_H
3 3
4extern intctl_cpm2_t *cpm2_intctl;
5
4extern int cpm2_get_irq(struct pt_regs *regs); 6extern int cpm2_get_irq(struct pt_regs *regs);
5 7
6extern void cpm2_pic_init(struct device_node*); 8extern void cpm2_pic_init(struct device_node*);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 0ed2aaee105c..0b8a03cc3042 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -633,7 +633,7 @@ static int __init fs_enet_of_init(void)
633 if (strstr(model, "FCC")) { 633 if (strstr(model, "FCC")) {
634 int fcc_index = fs_get_fcc_index(*id); 634 int fcc_index = fs_get_fcc_index(*id);
635 635
636 fs_enet_data.dpram_offset = (u32)cpm2_immr->im_dprambase; 636 fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
637 fs_enet_data.rx_ring = 32; 637 fs_enet_data.rx_ring = 32;
638 fs_enet_data.tx_ring = 32; 638 fs_enet_data.tx_ring = 32;
639 fs_enet_data.rx_copybreak = 240; 639 fs_enet_data.rx_copybreak = 240;
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index 02b9ef9abd3f..b691d3e14754 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -51,8 +51,9 @@
51 51
52void cpm_line_cr_cmd(int line, int cmd) 52void cpm_line_cr_cmd(int line, int cmd)
53{ 53{
54 volatile cpm_cpm2_t *cp = cpmp;
55 ulong val; 54 ulong val;
55 volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
56
56 57
57 switch (line) { 58 switch (line) {
58 case UART_SMC1: 59 case UART_SMC1:
@@ -85,11 +86,14 @@ void cpm_line_cr_cmd(int line, int cmd)
85 } 86 }
86 cp->cp_cpcr = val; 87 cp->cp_cpcr = val;
87 while (cp->cp_cpcr & CPM_CR_FLG) ; 88 while (cp->cp_cpcr & CPM_CR_FLG) ;
89
90 cpm2_unmap(cp);
88} 91}
89 92
90void smc1_lineif(struct uart_cpm_port *pinfo) 93void smc1_lineif(struct uart_cpm_port *pinfo)
91{ 94{
92 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 95 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
96 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
93 97
94 /* SMC1 is only on port D */ 98 /* SMC1 is only on port D */
95 io->iop_ppard |= 0x00c00000; 99 io->iop_ppard |= 0x00c00000;
@@ -98,13 +102,17 @@ void smc1_lineif(struct uart_cpm_port *pinfo)
98 io->iop_psord &= ~0x00c00000; 102 io->iop_psord &= ~0x00c00000;
99 103
100 /* Wire BRG1 to SMC1 */ 104 /* Wire BRG1 to SMC1 */
101 cpm2_immr->im_cpmux.cmx_smr &= 0x0f; 105 cpmux->cmx_smr &= 0x0f;
102 pinfo->brg = 1; 106 pinfo->brg = 1;
107
108 cpm2_unmap(cpmux);
109 cpm2_unmap(io);
103} 110}
104 111
105void smc2_lineif(struct uart_cpm_port *pinfo) 112void smc2_lineif(struct uart_cpm_port *pinfo)
106{ 113{
107 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 114 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
115 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
108 116
109 /* SMC2 is only on port A */ 117 /* SMC2 is only on port A */
110 io->iop_ppara |= 0x00c00000; 118 io->iop_ppara |= 0x00c00000;
@@ -113,13 +121,17 @@ void smc2_lineif(struct uart_cpm_port *pinfo)
113 io->iop_psora &= ~0x00c00000; 121 io->iop_psora &= ~0x00c00000;
114 122
115 /* Wire BRG2 to SMC2 */ 123 /* Wire BRG2 to SMC2 */
116 cpm2_immr->im_cpmux.cmx_smr &= 0xf0; 124 cpmux->cmx_smr &= 0xf0;
117 pinfo->brg = 2; 125 pinfo->brg = 2;
126
127 cpm2_unmap(cpmux);
128 cpm2_unmap(io);
118} 129}
119 130
120void scc1_lineif(struct uart_cpm_port *pinfo) 131void scc1_lineif(struct uart_cpm_port *pinfo)
121{ 132{
122 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 133 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
134 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
123 135
124 /* Use Port D for SCC1 instead of other functions. */ 136 /* Use Port D for SCC1 instead of other functions. */
125 io->iop_ppard |= 0x00000003; 137 io->iop_ppard |= 0x00000003;
@@ -129,9 +141,12 @@ void scc1_lineif(struct uart_cpm_port *pinfo)
129 io->iop_pdird |= 0x00000002; /* Tx */ 141 io->iop_pdird |= 0x00000002; /* Tx */
130 142
131 /* Wire BRG1 to SCC1 */ 143 /* Wire BRG1 to SCC1 */
132 cpm2_immr->im_cpmux.cmx_scr &= 0x00ffffff; 144 cpmux->cmx_scr &= 0x00ffffff;
133 cpm2_immr->im_cpmux.cmx_scr |= 0x00000000; 145 cpmux->cmx_scr |= 0x00000000;
134 pinfo->brg = 1; 146 pinfo->brg = 1;
147
148 cpm2_unmap(cpmux);
149 cpm2_unmap(io);
135} 150}
136 151
137void scc2_lineif(struct uart_cpm_port *pinfo) 152void scc2_lineif(struct uart_cpm_port *pinfo)
@@ -144,43 +159,57 @@ void scc2_lineif(struct uart_cpm_port *pinfo)
144 * be supported in a sane fashion. 159 * be supported in a sane fashion.
145 */ 160 */
146#ifndef CONFIG_STX_GP3 161#ifndef CONFIG_STX_GP3
147 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 162 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
163 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
164
148 io->iop_pparb |= 0x008b0000; 165 io->iop_pparb |= 0x008b0000;
149 io->iop_pdirb |= 0x00880000; 166 io->iop_pdirb |= 0x00880000;
150 io->iop_psorb |= 0x00880000; 167 io->iop_psorb |= 0x00880000;
151 io->iop_pdirb &= ~0x00030000; 168 io->iop_pdirb &= ~0x00030000;
152 io->iop_psorb &= ~0x00030000; 169 io->iop_psorb &= ~0x00030000;
153#endif 170#endif
154 cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff; 171 cpmux->cmx_scr &= 0xff00ffff;
155 cpm2_immr->im_cpmux.cmx_scr |= 0x00090000; 172 cpmux->cmx_scr |= 0x00090000;
156 pinfo->brg = 2; 173 pinfo->brg = 2;
174
175 cpm2_unmap(cpmux);
176 cpm2_unmap(io);
157} 177}
158 178
159void scc3_lineif(struct uart_cpm_port *pinfo) 179void scc3_lineif(struct uart_cpm_port *pinfo)
160{ 180{
161 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 181 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
182 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
183
162 io->iop_pparb |= 0x008b0000; 184 io->iop_pparb |= 0x008b0000;
163 io->iop_pdirb |= 0x00880000; 185 io->iop_pdirb |= 0x00880000;
164 io->iop_psorb |= 0x00880000; 186 io->iop_psorb |= 0x00880000;
165 io->iop_pdirb &= ~0x00030000; 187 io->iop_pdirb &= ~0x00030000;
166 io->iop_psorb &= ~0x00030000; 188 io->iop_psorb &= ~0x00030000;
167 cpm2_immr->im_cpmux.cmx_scr &= 0xffff00ff; 189 cpmux->cmx_scr &= 0xffff00ff;
168 cpm2_immr->im_cpmux.cmx_scr |= 0x00001200; 190 cpmux->cmx_scr |= 0x00001200;
169 pinfo->brg = 3; 191 pinfo->brg = 3;
192
193 cpm2_unmap(cpmux);
194 cpm2_unmap(io);
170} 195}
171 196
172void scc4_lineif(struct uart_cpm_port *pinfo) 197void scc4_lineif(struct uart_cpm_port *pinfo)
173{ 198{
174 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 199 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
200 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
175 201
176 io->iop_ppard |= 0x00000600; 202 io->iop_ppard |= 0x00000600;
177 io->iop_psord &= ~0x00000600; /* Tx/Rx */ 203 io->iop_psord &= ~0x00000600; /* Tx/Rx */
178 io->iop_pdird &= ~0x00000200; /* Rx */ 204 io->iop_pdird &= ~0x00000200; /* Rx */
179 io->iop_pdird |= 0x00000400; /* Tx */ 205 io->iop_pdird |= 0x00000400; /* Tx */
180 206
181 cpm2_immr->im_cpmux.cmx_scr &= 0xffffff00; 207 cpmux->cmx_scr &= 0xffffff00;
182 cpm2_immr->im_cpmux.cmx_scr |= 0x0000001b; 208 cpmux->cmx_scr |= 0x0000001b;
183 pinfo->brg = 4; 209 pinfo->brg = 4;
210
211 cpm2_unmap(cpmux);
212 cpm2_unmap(io);
184} 213}
185 214
186/* 215/*
@@ -255,16 +284,23 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
255/* Setup any dynamic params in the uart desc */ 284/* Setup any dynamic params in the uart desc */
256int cpm_uart_init_portdesc(void) 285int cpm_uart_init_portdesc(void)
257{ 286{
287#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2)
288 u32 addr;
289#endif
258 pr_debug("CPM uart[-]:init portdesc\n"); 290 pr_debug("CPM uart[-]:init portdesc\n");
259 291
260 cpm_uart_nr = 0; 292 cpm_uart_nr = 0;
261#ifdef CONFIG_SERIAL_CPM_SMC1 293#ifdef CONFIG_SERIAL_CPM_SMC1
262 cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0]; 294 cpm_uart_ports[UART_SMC1].smcp = (smc_t *) cpm2_map(im_smc[0]);
263 cpm_uart_ports[UART_SMC1].smcup =
264 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC1];
265 *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
266 cpm_uart_ports[UART_SMC1].port.mapbase = 295 cpm_uart_ports[UART_SMC1].port.mapbase =
267 (unsigned long)&cpm2_immr->im_smc[0]; 296 (unsigned long)cpm_uart_ports[UART_SMC1].smcp;
297
298 cpm_uart_ports[UART_SMC1].smcup =
299 (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC1], PROFF_SMC_SIZE);
300 addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC1_BASE], 2);
301 *addr = PROFF_SMC1;
302 cpm2_unmap(addr);
303
268 cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); 304 cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
269 cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); 305 cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
270 cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock(); 306 cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock();
@@ -272,12 +308,16 @@ int cpm_uart_init_portdesc(void)
272#endif 308#endif
273 309
274#ifdef CONFIG_SERIAL_CPM_SMC2 310#ifdef CONFIG_SERIAL_CPM_SMC2
275 cpm_uart_ports[UART_SMC2].smcp = (smc_t *) & cpm2_immr->im_smc[1]; 311 cpm_uart_ports[UART_SMC2].smcp = (smc_t *) cpm2_map(im_smc[1]);
276 cpm_uart_ports[UART_SMC2].smcup =
277 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC2];
278 *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2;
279 cpm_uart_ports[UART_SMC2].port.mapbase = 312 cpm_uart_ports[UART_SMC2].port.mapbase =
280 (unsigned long)&cpm2_immr->im_smc[1]; 313 (unsigned long)cpm_uart_ports[UART_SMC2].smcp;
314
315 cpm_uart_ports[UART_SMC2].smcup =
316 (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC2], PROFF_SMC_SIZE);
317 addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC2_BASE], 2);
318 *addr = PROFF_SMC2;
319 cpm2_unmap(addr);
320
281 cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); 321 cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
282 cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); 322 cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
283 cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock(); 323 cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock();
@@ -285,11 +325,12 @@ int cpm_uart_init_portdesc(void)
285#endif 325#endif
286 326
287#ifdef CONFIG_SERIAL_CPM_SCC1 327#ifdef CONFIG_SERIAL_CPM_SCC1
288 cpm_uart_ports[UART_SCC1].sccp = (scc_t *) & cpm2_immr->im_scc[0]; 328 cpm_uart_ports[UART_SCC1].sccp = (scc_t *) cpm2_map(im_scc[0]);
289 cpm_uart_ports[UART_SCC1].sccup =
290 (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC1];
291 cpm_uart_ports[UART_SCC1].port.mapbase = 329 cpm_uart_ports[UART_SCC1].port.mapbase =
292 (unsigned long)&cpm2_immr->im_scc[0]; 330 (unsigned long)cpm_uart_ports[UART_SCC1].sccp;
331 cpm_uart_ports[UART_SCC1].sccup =
332 (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC1], PROFF_SCC_SIZE);
333
293 cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= 334 cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
294 ~(UART_SCCM_TX | UART_SCCM_RX); 335 ~(UART_SCCM_TX | UART_SCCM_RX);
295 cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= 336 cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
@@ -299,11 +340,12 @@ int cpm_uart_init_portdesc(void)
299#endif 340#endif
300 341
301#ifdef CONFIG_SERIAL_CPM_SCC2 342#ifdef CONFIG_SERIAL_CPM_SCC2
302 cpm_uart_ports[UART_SCC2].sccp = (scc_t *) & cpm2_immr->im_scc[1]; 343 cpm_uart_ports[UART_SCC2].sccp = (scc_t *) cpm2_map(im_scc[1]);
303 cpm_uart_ports[UART_SCC2].sccup =
304 (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC2];
305 cpm_uart_ports[UART_SCC2].port.mapbase = 344 cpm_uart_ports[UART_SCC2].port.mapbase =
306 (unsigned long)&cpm2_immr->im_scc[1]; 345 (unsigned long)cpm_uart_ports[UART_SCC2].sccp;
346 cpm_uart_ports[UART_SCC2].sccup =
347 (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC2], PROFF_SCC_SIZE);
348
307 cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= 349 cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
308 ~(UART_SCCM_TX | UART_SCCM_RX); 350 ~(UART_SCCM_TX | UART_SCCM_RX);
309 cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= 351 cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
@@ -313,11 +355,12 @@ int cpm_uart_init_portdesc(void)
313#endif 355#endif
314 356
315#ifdef CONFIG_SERIAL_CPM_SCC3 357#ifdef CONFIG_SERIAL_CPM_SCC3
316 cpm_uart_ports[UART_SCC3].sccp = (scc_t *) & cpm2_immr->im_scc[2]; 358 cpm_uart_ports[UART_SCC3].sccp = (scc_t *) cpm2_map(im_scc[2]);
317 cpm_uart_ports[UART_SCC3].sccup =
318 (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC3];
319 cpm_uart_ports[UART_SCC3].port.mapbase = 359 cpm_uart_ports[UART_SCC3].port.mapbase =
320 (unsigned long)&cpm2_immr->im_scc[2]; 360 (unsigned long)cpm_uart_ports[UART_SCC3].sccp;
361 cpm_uart_ports[UART_SCC3].sccup =
362 (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC3], PROFF_SCC_SIZE);
363
321 cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= 364 cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
322 ~(UART_SCCM_TX | UART_SCCM_RX); 365 ~(UART_SCCM_TX | UART_SCCM_RX);
323 cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= 366 cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
@@ -327,11 +370,12 @@ int cpm_uart_init_portdesc(void)
327#endif 370#endif
328 371
329#ifdef CONFIG_SERIAL_CPM_SCC4 372#ifdef CONFIG_SERIAL_CPM_SCC4
330 cpm_uart_ports[UART_SCC4].sccp = (scc_t *) & cpm2_immr->im_scc[3]; 373 cpm_uart_ports[UART_SCC4].sccp = (scc_t *) cpm2_map(im_scc[3]);
331 cpm_uart_ports[UART_SCC4].sccup =
332 (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC4];
333 cpm_uart_ports[UART_SCC4].port.mapbase = 374 cpm_uart_ports[UART_SCC4].port.mapbase =
334 (unsigned long)&cpm2_immr->im_scc[3]; 375 (unsigned long)cpm_uart_ports[UART_SCC4].sccp;
376 cpm_uart_ports[UART_SCC4].sccup =
377 (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC4], PROFF_SCC_SIZE);
378
335 cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= 379 cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
336 ~(UART_SCCM_TX | UART_SCCM_RX); 380 ~(UART_SCCM_TX | UART_SCCM_RX);
337 cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= 381 cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/serial/cpm_uart/cpm_uart_cpm2.h
index 4793fecf8ece..a663300d3476 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.h
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.h
@@ -40,6 +40,6 @@ static inline void cpm_set_smc_fcr(volatile smc_uart_t * up)
40 up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB; 40 up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;
41} 41}
42 42
43#define DPRAM_BASE ((unsigned char *)&cpm2_immr->im_dprambase[0]) 43#define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0))
44 44
45#endif 45#endif
diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h
index d530f68b4eef..3d0e819d37f1 100644
--- a/include/asm-powerpc/fs_pd.h
+++ b/include/asm-powerpc/fs_pd.h
@@ -11,6 +11,7 @@
11 11
12#ifndef FS_PD_H 12#ifndef FS_PD_H
13#define FS_PD_H 13#define FS_PD_H
14#include <asm/cpm2.h>
14#include <sysdev/fsl_soc.h> 15#include <sysdev/fsl_soc.h>
15#include <asm/time.h> 16#include <asm/time.h>
16 17
@@ -24,4 +25,21 @@ static inline int uart_clock(void)
24 return ppc_proc_freq; 25 return ppc_proc_freq;
25} 26}
26 27
28#define cpm2_map(member) \
29({ \
30 u32 offset = offsetof(cpm2_map_t, member); \
31 void *addr = ioremap (CPM_MAP_ADDR + offset, \
32 sizeof( ((cpm2_map_t*)0)->member)); \
33 addr; \
34})
35
36#define cpm2_map_size(member, size) \
37({ \
38 u32 offset = offsetof(cpm2_map_t, member); \
39 void *addr = ioremap (CPM_MAP_ADDR + offset, size); \
40 addr; \
41})
42
43#define cpm2_unmap(addr) iounmap(addr)
44
27#endif 45#endif
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 876974e5412f..bd6623aed383 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -177,6 +177,10 @@ typedef struct cpm_buf_desc {
177#define PROFF_I2C_BASE ((uint)0x8afc) 177#define PROFF_I2C_BASE ((uint)0x8afc)
178#define PROFF_IDMA4_BASE ((uint)0x8afe) 178#define PROFF_IDMA4_BASE ((uint)0x8afe)
179 179
180#define PROFF_SCC_SIZE ((uint)0x100)
181#define PROFF_FCC_SIZE ((uint)0x100)
182#define PROFF_SMC_SIZE ((uint)64)
183
180/* The SMCs are relocated to any of the first eight DPRAM pages. 184/* The SMCs are relocated to any of the first eight DPRAM pages.
181 * We will fix these at the first locations of DPRAM, until we 185 * We will fix these at the first locations of DPRAM, until we
182 * get some microcode patches :-). 186 * get some microcode patches :-).
diff --git a/include/asm-ppc/fs_pd.h b/include/asm-ppc/fs_pd.h
index eed777834121..8691327653af 100644
--- a/include/asm-ppc/fs_pd.h
+++ b/include/asm-ppc/fs_pd.h
@@ -29,4 +29,8 @@ static inline int uart_clock(void)
29 return (((bd_t *) __res)->bi_intfreq); 29 return (((bd_t *) __res)->bi_intfreq);
30} 30}
31 31
32#define cpm2_map(member) (&cpm2_immr->member)
33#define cpm2_map_size(member, size) (&cpm2_immr->member)
34#define cpm2_unmap(addr) do {} while(0)
35
32#endif 36#endif