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authorNicolas Pitre <nico@cam.org>2006-11-20 16:17:09 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-11-30 07:52:44 -0500
commitbf46878c4ef4cf04a3564f0ff2e7daae353ee2e2 (patch)
tree5ea7ff12fea73f8352c1a4d630b15160e6709352
parent10dd5ce28d78e2440e8fa1135d17e33399d75340 (diff)
[ARM] 3939/1: don't reset SA11x0 clock counter
Don't reset OSCR to zero as this prevents us from having a contiguous time source. The value returned by sched_clock() is reset to zero in the middle of the boot process otherwise, making CONFIG_PRINTK_TIME rather messed up. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-sa1100/time.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 4284bd6f7a1f..29c89f9eb2ce 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -118,6 +118,7 @@ static struct irqaction sa1100_timer_irq = {
118static void __init sa1100_timer_init(void) 118static void __init sa1100_timer_init(void)
119{ 119{
120 struct timespec tv; 120 struct timespec tv;
121 unsigned long flags;
121 122
122 set_rtc = sa1100_set_rtc; 123 set_rtc = sa1100_set_rtc;
123 124
@@ -126,12 +127,12 @@ static void __init sa1100_timer_init(void)
126 do_settimeofday(&tv); 127 do_settimeofday(&tv);
127 128
128 OIER = 0; /* disable any timer interrupts */ 129 OIER = 0; /* disable any timer interrupts */
129 OSCR = LATCH*2; /* push OSCR out of the way */
130 OSMR0 = LATCH; /* set initial match */
131 OSSR = 0xf; /* clear status on all timers */ 130 OSSR = 0xf; /* clear status on all timers */
132 setup_irq(IRQ_OST0, &sa1100_timer_irq); 131 setup_irq(IRQ_OST0, &sa1100_timer_irq);
132 local_irq_save(flags);
133 OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ 133 OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
134 OSCR = 0; /* initialize free-running timer */ 134 OSMR0 = OSCR + LATCH; /* set initial match */
135 local_irq_restore(flags);
135} 136}
136 137
137#ifdef CONFIG_NO_IDLE_HZ 138#ifdef CONFIG_NO_IDLE_HZ