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authorLennert Buytenhek <buytenh@wantstofly.org>2006-09-18 18:18:16 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 05:25:42 -0400
commit48388b2a56ae5e0f1c422e84d536f31729469b17 (patch)
treeb3206175b8b7d884eb65be6e85236369466d3994
parent7e9740b11529a0a69789fbe92d324f293e6266f6 (diff)
[ARM] 3822/1: iop3xx: rewrite time handling
Merge and rewrite the iop32x/iop33x time code to do lost jiffy tracking properly, and put the result in plat-iop/time.c. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/plat-iop/Makefile2
-rw-r--r--arch/arm/plat-iop/time.c94
-rw-r--r--include/asm-arm/arch-iop32x/iop321.h6
-rw-r--r--include/asm-arm/arch-iop33x/iop331.h6
-rw-r--r--include/asm-arm/hardware/iop3xx.h20
5 files changed, 127 insertions, 1 deletions
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index efde7a513fb7..d20cdec3a944 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := i2c.o pci.o setup.o 5obj-y := i2c.o pci.o setup.o time.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
new file mode 100644
index 000000000000..5730a0d7ed67
--- /dev/null
+++ b/arch/arm/plat-iop/time.c
@@ -0,0 +1,94 @@
1/*
2 * arch/arm/plat-iop/time.c
3 *
4 * Timer code for IOP32x and IOP33x based systems
5 *
6 * Author: Deepak Saxena <dsaxena@mvista.com>
7 *
8 * Copyright 2002-2003 MontaVista Software Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/time.h>
19#include <linux/init.h>
20#include <linux/timex.h>
21#include <asm/hardware.h>
22#include <asm/io.h>
23#include <asm/irq.h>
24#include <asm/uaccess.h>
25#include <asm/mach/irq.h>
26#include <asm/mach/time.h>
27
28#ifdef CONFIG_ARCH_IOP32X
29#define IRQ_IOP3XX_TIMER0 IRQ_IOP321_TIMER0
30#else
31#ifdef CONFIG_ARCH_IOP33X
32#define IRQ_IOP3XX_TIMER0 IRQ_IOP331_TIMER0
33#endif
34#endif
35
36static unsigned long ticks_per_jiffy;
37static unsigned long ticks_per_usec;
38static unsigned long next_jiffy_time;
39
40unsigned long iop3xx_gettimeoffset(void)
41{
42 unsigned long offset;
43
44 offset = next_jiffy_time - *IOP3XX_TU_TCR1;
45
46 return offset / ticks_per_usec;
47}
48
49static irqreturn_t
50iop3xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
51{
52 write_seqlock(&xtime_lock);
53
54 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));
55
56 while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1)
57 >= ticks_per_jiffy) {
58 timer_tick(regs);
59 next_jiffy_time -= ticks_per_jiffy;
60 }
61
62 write_sequnlock(&xtime_lock);
63
64 return IRQ_HANDLED;
65}
66
67static struct irqaction iop3xx_timer_irq = {
68 .name = "IOP3XX Timer Tick",
69 .handler = iop3xx_timer_interrupt,
70 .flags = IRQF_DISABLED | IRQF_TIMER,
71};
72
73void __init iop3xx_init_time(unsigned long tick_rate)
74{
75 u32 timer_ctl;
76
77 ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
78 ticks_per_usec = tick_rate / 1000000;
79 next_jiffy_time = 0xffffffff;
80
81 timer_ctl = IOP3XX_TMR_EN | IOP3XX_TMR_PRIVILEGED |
82 IOP3XX_TMR_RELOAD | IOP3XX_TMR_RATIO_1_1;
83
84 /*
85 * We use timer 0 for our timer interrupt, and timer 1 as
86 * monotonic counter for tracking missed jiffies.
87 */
88 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));
89 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
90 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));
91 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));
92
93 setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq);
94}
diff --git a/include/asm-arm/arch-iop32x/iop321.h b/include/asm-arm/arch-iop32x/iop321.h
index e3c85a05e73a..bd96b8d55a76 100644
--- a/include/asm-arm/arch-iop32x/iop321.h
+++ b/include/asm-arm/arch-iop32x/iop321.h
@@ -233,6 +233,12 @@
233 233
234/* for I2C bit defs see drivers/i2c/i2c-iop3xx.h */ 234/* for I2C bit defs see drivers/i2c/i2c-iop3xx.h */
235 235
236/*
237 * Peripherals that are shared between the iop32x and iop33x but
238 * located at different addresses.
239 */
240#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
241
236#include <asm/hardware/iop3xx.h> 242#include <asm/hardware/iop3xx.h>
237 243
238 244
diff --git a/include/asm-arm/arch-iop33x/iop331.h b/include/asm-arm/arch-iop33x/iop331.h
index e85e1a2e1a86..b301ef8f7f32 100644
--- a/include/asm-arm/arch-iop33x/iop331.h
+++ b/include/asm-arm/arch-iop33x/iop331.h
@@ -238,6 +238,12 @@
238 238
239/* Reserved 0x0000178c through 0x000019ff */ 239/* Reserved 0x0000178c through 0x000019ff */
240 240
241/*
242 * Peripherals that are shared between the iop32x and iop33x but
243 * located at different addresses.
244 */
245#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
246
241#include <asm/hardware/iop3xx.h> 247#include <asm/hardware/iop3xx.h>
242 248
243 249
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h
index d488ced2e12d..b21ea41b149e 100644
--- a/include/asm-arm/hardware/iop3xx.h
+++ b/include/asm-arm/hardware/iop3xx.h
@@ -81,6 +81,24 @@
81#define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4) 81#define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4)
82#define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec) 82#define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec)
83 83
84/* Timers */
85#define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000)
86#define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004)
87#define IOP3XX_TU_TCR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0008)
88#define IOP3XX_TU_TCR1 (volatile u32 *)IOP3XX_TIMER_REG(0x000c)
89#define IOP3XX_TU_TRR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0010)
90#define IOP3XX_TU_TRR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0014)
91#define IOP3XX_TU_TISR (volatile u32 *)IOP3XX_TIMER_REG(0x0018)
92#define IOP3XX_TU_WDTCR (volatile u32 *)IOP3XX_TIMER_REG(0x001c)
93#define IOP3XX_TMR_TC 0x01
94#define IOP3XX_TMR_EN 0x02
95#define IOP3XX_TMR_RELOAD 0x04
96#define IOP3XX_TMR_PRIVILEGED 0x09
97#define IOP3XX_TMR_RATIO_1_1 0x00
98#define IOP3XX_TMR_RATIO_4_1 0x10
99#define IOP3XX_TMR_RATIO_8_1 0x20
100#define IOP3XX_TMR_RATIO_16_1 0x30
101
84/* I2C bus interface unit */ 102/* I2C bus interface unit */
85#define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680) 103#define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680)
86#define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684) 104#define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684)
@@ -109,6 +127,8 @@
109 127
110#ifndef __ASSEMBLY__ 128#ifndef __ASSEMBLY__
111void iop3xx_map_io(void); 129void iop3xx_map_io(void);
130void iop3xx_init_time(unsigned long);
131unsigned long iop3xx_gettimeoffset(void);
112 132
113extern struct platform_device iop3xx_i2c0_device; 133extern struct platform_device iop3xx_i2c0_device;
114extern struct platform_device iop3xx_i2c1_device; 134extern struct platform_device iop3xx_i2c1_device;
, 0x4095, 0, 0, timedia_4095a }, { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a }, { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u }, { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a }, { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u }, { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r }, { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s }, { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d }, { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e }, { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f }, { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a }, { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b }, { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c }, { 0, } /* terminate list */ }; MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl); /* * This table describes the serial "geometry" of these boards. Any * quirks for these can be found in drivers/serial/8250_pci.c * * Cards not tested are marked n/t * If you have one of these cards and it works for you, please tell me.. */ static struct pciserial_board pci_parport_serial_boards[] __devinitdata = { [titan_110l] = { .flags = FL_BASE1 | FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [titan_210l] = { .flags = FL_BASE1 | FL_BASE_BARS, .num_ports = 2, .base_baud = 921600, .uart_offset = 8, }, [netmos_9xx5_combo] = { .flags = FL_BASE0 | FL_BASE_BARS, .num_ports = 1, .base_baud = 115200, .uart_offset = 8, }, [netmos_9855] = { .flags = FL_BASE2 | FL_BASE_BARS, .num_ports = 1, .base_baud = 115200, .uart_offset = 8, }, [netmos_9855_2p] = { .flags = FL_BASE4 | FL_BASE_BARS, .num_ports = 1, .base_baud = 115200, .uart_offset = 8, }, [netmos_9900] = { /* n/t */ .flags = FL_BASE0 | FL_BASE_BARS, .num_ports = 1, .base_baud = 115200, .uart_offset = 8, }, [netmos_9900_2p] = { /* parallel only */ /* n/t */ .flags = FL_BASE0, .num_ports = 0, .base_baud = 115200, .uart_offset = 8, }, [netmos_99xx_1p] = { /* parallel only */ /* n/t */ .flags = FL_BASE0, .num_ports = 0, .base_baud = 115200, .uart_offset = 8, }, [avlab_1s1p] = { /* n/t */ .flags = FL_BASE0 | FL_BASE_BARS, .num_ports = 1, .base_baud = 115200, .uart_offset = 8, }, [avlab_1s2p] = { /* n/t */ .flags = FL_BASE0 | FL_BASE_BARS, .num_ports = 1, .base_baud = 115200, .uart_offset = 8, }, [avlab_2s1p] = { /* n/t */ .flags = FL_BASE0 | FL_BASE_BARS, .num_ports = 2, .base_baud = 115200, .uart_offset = 8, }, [siig_1s1p_10x] = { .flags = FL_BASE2, .num_ports = 1, .base_baud = 460800, .uart_offset = 8, }, [siig_2s1p_10x] = { .flags = FL_BASE2, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [siig_2p1s_20x] = { .flags = FL_BASE0, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [siig_1s1p_20x] = { .flags = FL_BASE0, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [siig_2s1p_20x] = { .flags = FL_BASE0, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4078a] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4079h] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4085h] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4088a] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4089a] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4095a] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4096a] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4078u] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4079a] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4085u] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4079r] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4079s] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4079d] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4079e] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_4079f] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_9079a] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_9079b] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, [timedia_9079c] = { .flags = FL_BASE0|FL_BASE_BARS, .num_ports = 1, .base_baud = 921600, .uart_offset = 8, }, }; struct parport_serial_private { struct serial_private *serial; int num_par; struct parport *port[PARPORT_MAX]; struct parport_pc_pci par; }; /* Register the serial port(s) of a PCI card. */ static int __devinit serial_register (struct pci_dev *dev, const struct pci_device_id *id) { struct parport_serial_private *priv = pci_get_drvdata (dev); struct pciserial_board *board; struct serial_private *serial; board = &pci_parport_serial_boards[id->driver_data]; if (board->num_ports == 0) return 0; serial = pciserial_init_ports(dev, board); if (IS_ERR(serial)) return PTR_ERR(serial); priv->serial = serial; return 0; } /* Register the parallel port(s) of a PCI card. */ static int __devinit parport_register (struct pci_dev *dev, const struct pci_device_id *id) { struct parport_pc_pci *card; struct parport_serial_private *priv = pci_get_drvdata (dev); int n, success = 0; priv->par = cards[id->driver_data]; card = &priv->par; if (card->preinit_hook && card->preinit_hook (dev, card, PARPORT_IRQ_NONE, PARPORT_DMA_NONE)) return -ENODEV; for (n = 0; n < card->numports; n++) { struct parport *port; int lo = card->addr[n].lo; int hi = card->addr[n].hi; unsigned long io_lo, io_hi; int irq; if (priv->num_par == ARRAY_SIZE (priv->port)) { printk (KERN_WARNING "parport_serial: %s: only %zu parallel ports " "supported (%d reported)\n", pci_name (dev), ARRAY_SIZE(priv->port), card->numports); break; } io_lo = pci_resource_start (dev, lo); io_hi = 0; if ((hi >= 0) && (hi <= 6)) io_hi = pci_resource_start (dev, hi); else if (hi > 6) io_lo += hi; /* Reinterpret the meaning of "hi" as an offset (see SYBA def.) */ /* TODO: test if sharing interrupts works */ irq = dev->irq; if (irq == IRQ_NONE) { dev_dbg(&dev->dev, "PCI parallel port detected: I/O at %#lx(%#lx)\n", io_lo, io_hi); irq = PARPORT_IRQ_NONE; } else { dev_dbg(&dev->dev, "PCI parallel port detected: I/O at %#lx(%#lx), IRQ %d\n", io_lo, io_hi, irq); } port = parport_pc_probe_port (io_lo, io_hi, irq, PARPORT_DMA_NONE, &dev->dev, IRQF_SHARED); if (port) { priv->port[priv->num_par++] = port; success = 1; } } if (card->postinit_hook) card->postinit_hook (dev, card, !success); return 0; } static int __devinit parport_serial_pci_probe (struct pci_dev *dev, const struct pci_device_id *id) { struct parport_serial_private *priv; int err; priv = kzalloc (sizeof *priv, GFP_KERNEL); if (!priv) return -ENOMEM; pci_set_drvdata (dev, priv); err = pci_enable_device (dev); if (err) { pci_set_drvdata (dev, NULL); kfree (priv); return err; } if (parport_register (dev, id)) { pci_set_drvdata (dev, NULL); kfree (priv); return -ENODEV; } if (serial_register (dev, id)) { int i; for (i = 0; i < priv->num_par; i++) parport_pc_unregister_port (priv->port[i]); pci_set_drvdata (dev, NULL); kfree (priv); return -ENODEV; } return 0; } static void __devexit parport_serial_pci_remove (struct pci_dev *dev) { struct parport_serial_private *priv = pci_get_drvdata (dev); int i; pci_set_drvdata(dev, NULL); // Serial ports if (priv->serial) pciserial_remove_ports(priv->serial); // Parallel ports for (i = 0; i < priv->num_par; i++) parport_pc_unregister_port (priv->port[i]); kfree (priv); return; } #ifdef CONFIG_PM static int parport_serial_pci_suspend(struct pci_dev *dev, pm_message_t state) { struct parport_serial_private *priv = pci_get_drvdata(dev); if (priv->serial) pciserial_suspend_ports(priv->serial); /* FIXME: What about parport? */ pci_save_state(dev); pci_set_power_state(dev, pci_choose_state(dev, state)); return 0; } static int parport_serial_pci_resume(struct pci_dev *dev) { struct parport_serial_private *priv = pci_get_drvdata(dev); int err; pci_set_power_state(dev, PCI_D0); pci_restore_state(dev); /* * The device may have been disabled. Re-enable it. */ err = pci_enable_device(dev); if (err) { printk(KERN_ERR "parport_serial: %s: error enabling " "device for resume (%d)\n", pci_name(dev), err); return err; } if (priv->serial) pciserial_resume_ports(priv->serial); /* FIXME: What about parport? */ return 0; } #endif static struct pci_driver parport_serial_pci_driver = { .name = "parport_serial", .id_table = parport_serial_pci_tbl, .probe = parport_serial_pci_probe, .remove = __devexit_p(parport_serial_pci_remove), #ifdef CONFIG_PM .suspend = parport_serial_pci_suspend, .resume = parport_serial_pci_resume, #endif }; static int __init parport_serial_init (void) { return pci_register_driver (&parport_serial_pci_driver); } static void __exit parport_serial_exit (void) { pci_unregister_driver (&parport_serial_pci_driver); return; } MODULE_AUTHOR("Tim Waugh <twaugh@redhat.com>"); MODULE_DESCRIPTION("Driver for common parallel+serial multi-I/O PCI cards"); MODULE_LICENSE("GPL"); module_init(parport_serial_init); module_exit(parport_serial_exit);