diff options
author | Akira Iguchi <akira2.iguchi@toshiba.co.jp> | 2007-02-09 02:53:59 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-02-12 23:35:51 -0500 |
commit | cbca567ea5b337eaa2685606cbb9183e79b8f97f (patch) | |
tree | eeedf3e47cfbf92f06f58d7a8c0dd8cc6811068d | |
parent | 1f1fec94589ed0b14c749eb9494bb690dbdf8d5a (diff) |
[POWERPC] Celleb: improve MMU hashtable locking
Disabling IRQ is required only in invalidation. This changes
"spin_lock_irqsave" to "spin_lock" in other ops.
Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Signed-off-by: Akira Iguchi <akira2.iguchi@toshiba.co.jp>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/powerpc/platforms/celleb/htab.c | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/arch/powerpc/platforms/celleb/htab.c b/arch/powerpc/platforms/celleb/htab.c index ffa7c2c2030d..279d7339e170 100644 --- a/arch/powerpc/platforms/celleb/htab.c +++ b/arch/powerpc/platforms/celleb/htab.c | |||
@@ -95,7 +95,6 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group, | |||
95 | unsigned long lpar_rc; | 95 | unsigned long lpar_rc; |
96 | unsigned long slot; | 96 | unsigned long slot; |
97 | unsigned long hpte_v, hpte_r; | 97 | unsigned long hpte_v, hpte_r; |
98 | unsigned long flags; | ||
99 | 98 | ||
100 | /* same as iseries */ | 99 | /* same as iseries */ |
101 | if (vflags & HPTE_V_SECONDARY) | 100 | if (vflags & HPTE_V_SECONDARY) |
@@ -115,17 +114,17 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group, | |||
115 | if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) | 114 | if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) |
116 | hpte_r &= ~_PAGE_COHERENT; | 115 | hpte_r &= ~_PAGE_COHERENT; |
117 | 116 | ||
118 | spin_lock_irqsave(&beat_htab_lock, flags); | 117 | spin_lock(&beat_htab_lock); |
119 | if ((lpar_rc = beat_read_mask(hpte_group)) == 0) { | 118 | if ((lpar_rc = beat_read_mask(hpte_group)) == 0) { |
120 | if (!(vflags & HPTE_V_BOLTED)) | 119 | if (!(vflags & HPTE_V_BOLTED)) |
121 | DBG_LOW(" full\n"); | 120 | DBG_LOW(" full\n"); |
122 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 121 | spin_unlock(&beat_htab_lock); |
123 | return -1; | 122 | return -1; |
124 | } | 123 | } |
125 | 124 | ||
126 | lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48, | 125 | lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48, |
127 | hpte_v, hpte_r, &slot); | 126 | hpte_v, hpte_r, &slot); |
128 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 127 | spin_unlock(&beat_htab_lock); |
129 | 128 | ||
130 | /* | 129 | /* |
131 | * Since we try and ioremap PHBs we don't own, the pte insert | 130 | * Since we try and ioremap PHBs we don't own, the pte insert |
@@ -189,7 +188,6 @@ static long beat_lpar_hpte_updatepp(unsigned long slot, | |||
189 | { | 188 | { |
190 | unsigned long lpar_rc; | 189 | unsigned long lpar_rc; |
191 | unsigned long dummy0, dummy1, want_v; | 190 | unsigned long dummy0, dummy1, want_v; |
192 | unsigned long flags; | ||
193 | 191 | ||
194 | want_v = hpte_encode_v(va, psize); | 192 | want_v = hpte_encode_v(va, psize); |
195 | 193 | ||
@@ -197,17 +195,17 @@ static long beat_lpar_hpte_updatepp(unsigned long slot, | |||
197 | "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ", | 195 | "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ", |
198 | want_v & HPTE_V_AVPN, slot, psize, newpp); | 196 | want_v & HPTE_V_AVPN, slot, psize, newpp); |
199 | 197 | ||
200 | spin_lock_irqsave(&beat_htab_lock, flags); | 198 | spin_lock(&beat_htab_lock); |
201 | dummy0 = beat_lpar_hpte_getword0(slot); | 199 | dummy0 = beat_lpar_hpte_getword0(slot); |
202 | if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) { | 200 | if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) { |
203 | DBG_LOW("not found !\n"); | 201 | DBG_LOW("not found !\n"); |
204 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 202 | spin_unlock(&beat_htab_lock); |
205 | return -1; | 203 | return -1; |
206 | } | 204 | } |
207 | 205 | ||
208 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0, | 206 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0, |
209 | &dummy1); | 207 | &dummy1); |
210 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 208 | spin_unlock(&beat_htab_lock); |
211 | if (lpar_rc != 0 || dummy0 == 0) { | 209 | if (lpar_rc != 0 || dummy0 == 0) { |
212 | DBG_LOW("not found !\n"); | 210 | DBG_LOW("not found !\n"); |
213 | return -1; | 211 | return -1; |
@@ -256,18 +254,17 @@ static void beat_lpar_hpte_updateboltedpp(unsigned long newpp, | |||
256 | int psize) | 254 | int psize) |
257 | { | 255 | { |
258 | unsigned long lpar_rc, slot, vsid, va, dummy0, dummy1; | 256 | unsigned long lpar_rc, slot, vsid, va, dummy0, dummy1; |
259 | unsigned long flags; | ||
260 | 257 | ||
261 | vsid = get_kernel_vsid(ea); | 258 | vsid = get_kernel_vsid(ea); |
262 | va = (vsid << 28) | (ea & 0x0fffffff); | 259 | va = (vsid << 28) | (ea & 0x0fffffff); |
263 | 260 | ||
264 | spin_lock_irqsave(&beat_htab_lock, flags); | 261 | spin_lock(&beat_htab_lock); |
265 | slot = beat_lpar_hpte_find(va, psize); | 262 | slot = beat_lpar_hpte_find(va, psize); |
266 | BUG_ON(slot == -1); | 263 | BUG_ON(slot == -1); |
267 | 264 | ||
268 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, | 265 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, |
269 | &dummy0, &dummy1); | 266 | &dummy0, &dummy1); |
270 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 267 | spin_unlock(&beat_htab_lock); |
271 | 268 | ||
272 | BUG_ON(lpar_rc != 0); | 269 | BUG_ON(lpar_rc != 0); |
273 | } | 270 | } |