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authorPavel Hofman <dustin@seznam.cz>2007-06-11 06:21:20 -0400
committerJaroslav Kysela <perex@suse.cz>2007-07-20 05:11:27 -0400
commit13d457094bc364e942884266036fd1b2ab74308b (patch)
tree5f56fec1dc9b66a34ba705ac7694d45130750e88
parent15cc4458c5c93bd5a616410815d5d165f0fe0900 (diff)
[ALSA] emu10k1 - EMU 1212 with 16 capture channels
* adding 8 more 32-bit capture channels (total of 16) for emu1010 cards * adding some code comments and card details description Signed-off-by: Pavel Hofman <dustin@seznam.cz> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
-rw-r--r--include/sound/emu10k1.h16
-rw-r--r--sound/pci/emu10k1/emu10k1_main.c52
-rw-r--r--sound/pci/emu10k1/emufx.c78
-rw-r--r--sound/pci/emu10k1/emumixer.c16
-rw-r--r--sound/pci/emu10k1/emupcm.c39
5 files changed, 188 insertions, 13 deletions
diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h
index 23e45a4cf0e4..529d0a564367 100644
--- a/include/sound/emu10k1.h
+++ b/include/sound/emu10k1.h
@@ -1120,6 +1120,16 @@
1120/************************************************************************************************/ 1120/************************************************************************************************/
1121/* EMU1010m HANA Destinations */ 1121/* EMU1010m HANA Destinations */
1122/************************************************************************************************/ 1122/************************************************************************************************/
1123/* 32-bit destinations of signal in the Hana FPGA. Destinations are either
1124 * physical outputs of Hana, or outputs going to Alice2 (audigy) for capture
1125 * - 16 x EMU_DST_ALICE2_EMU32_X.
1126 */
1127/* EMU32 = 32-bit serial channel between Alice2 (audigy) and Hana (FPGA) */
1128/* EMU_DST_ALICE2_EMU32_X - data channels from Hana to Alice2 used for capture.
1129 * Which data is fed into a EMU_DST_ALICE2_EMU32_X channel in Hana depends on
1130 * setup of mixer control for each destination - see emumixer.c -
1131 * snd_emu1010_output_enum_ctls[], snd_emu1010_input_enum_ctls[]
1132 */
1123#define EMU_DST_ALICE2_EMU32_0 0x000f /* 16 EMU32 channels to Alice2 +0 to +0xf */ 1133#define EMU_DST_ALICE2_EMU32_0 0x000f /* 16 EMU32 channels to Alice2 +0 to +0xf */
1124#define EMU_DST_ALICE2_EMU32_1 0x0000 /* 16 EMU32 channels to Alice2 +0 to +0xf */ 1134#define EMU_DST_ALICE2_EMU32_1 0x0000 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1125#define EMU_DST_ALICE2_EMU32_2 0x0001 /* 16 EMU32 channels to Alice2 +0 to +0xf */ 1135#define EMU_DST_ALICE2_EMU32_2 0x0001 /* 16 EMU32 channels to Alice2 +0 to +0xf */
@@ -1199,6 +1209,12 @@
1199/************************************************************************************************/ 1209/************************************************************************************************/
1200/* EMU1010m HANA Sources */ 1210/* EMU1010m HANA Sources */
1201/************************************************************************************************/ 1211/************************************************************************************************/
1212/* 32-bit sources of signal in the Hana FPGA. The sources are routed to
1213 * destinations using mixer control for each destination - see emumixer.c
1214 * Sources are either physical inputs of FPGA,
1215 * or outputs from Alice (audigy) - 16 x EMU_SRC_ALICE_EMU32A +
1216 * 16 x EMU_SRC_ALICE_EMU32B
1217 */
1202#define EMU_SRC_SILENCE 0x0000 /* Silence */ 1218#define EMU_SRC_SILENCE 0x0000 /* Silence */
1203#define EMU_SRC_DOCK_MIC_A1 0x0100 /* Audio Dock Mic A, 1st or 48kHz only */ 1219#define EMU_SRC_DOCK_MIC_A1 0x0100 /* Audio Dock Mic A, 1st or 48kHz only */
1204#define EMU_SRC_DOCK_MIC_A2 0x0101 /* Audio Dock Mic A, 2nd or 96kHz */ 1220#define EMU_SRC_DOCK_MIC_A2 0x0101 /* Audio Dock Mic A, 2nd or 96kHz */
diff --git a/sound/pci/emu10k1/emu10k1_main.c b/sound/pci/emu10k1/emu10k1_main.c
index 4a9b59ad8ab1..72367411ee6b 100644
--- a/sound/pci/emu10k1/emu10k1_main.c
+++ b/sound/pci/emu10k1/emu10k1_main.c
@@ -694,6 +694,37 @@ static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * file
694 return 0; 694 return 0;
695} 695}
696 696
697/*
698 * EMU-1010 - details found out from this driver, official MS Win drivers,
699 * testing the card:
700 *
701 * Audigy2 (aka Alice2):
702 * ---------------------
703 * * communication over PCI
704 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
705 * to 2 x 16-bit, using internal DSP instructions
706 * * slave mode, clock supplied by HANA
707 * * linked to HANA using:
708 * 32 x 32-bit serial EMU32 output channels
709 * 16 x EMU32 input channels
710 * (?) x I2S I/O channels (?)
711 *
712 * FPGA (aka HANA):
713 * ---------------
714 * * provides all (?) physical inputs and outputs of the card
715 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
716 * * provides clock signal for the card and Alice2
717 * * two crystals - for 44.1kHz and 48kHz multiples
718 * * provides internal routing of signal sources to signal destinations
719 * * inputs/outputs to Alice2 - see above
720 *
721 * Current status of the driver:
722 * ----------------------------
723 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
724 * * PCM device nb. 2:
725 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
726 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
727 */
697static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu) 728static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
698{ 729{
699 unsigned int i; 730 unsigned int i;
@@ -850,6 +881,27 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
850 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1); 881 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
851 snd_emu1010_fpga_link_dst_src_write(emu, 882 snd_emu1010_fpga_link_dst_src_write(emu,
852 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1); 883 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
884 /* Pavel Hofman - setting defaults for 8 more capture channels
885 * Defaults only, users will set their own values anyways, let's
886 * just copy/paste.
887 */
888
889 snd_emu1010_fpga_link_dst_src_write(emu,
890 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
891 snd_emu1010_fpga_link_dst_src_write(emu,
892 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
893 snd_emu1010_fpga_link_dst_src_write(emu,
894 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
895 snd_emu1010_fpga_link_dst_src_write(emu,
896 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
897 snd_emu1010_fpga_link_dst_src_write(emu,
898 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
899 snd_emu1010_fpga_link_dst_src_write(emu,
900 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
901 snd_emu1010_fpga_link_dst_src_write(emu,
902 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
903 snd_emu1010_fpga_link_dst_src_write(emu,
904 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
853#endif 905#endif
854#if 0 906#if 0
855 /* Original */ 907 /* Original */
diff --git a/sound/pci/emu10k1/emufx.c b/sound/pci/emu10k1/emufx.c
index c02012cccd8e..7206c0fa06f2 100644
--- a/sound/pci/emu10k1/emufx.c
+++ b/sound/pci/emu10k1/emufx.c
@@ -1123,6 +1123,11 @@ snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl
1123 ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF; 1123 ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
1124} 1124}
1125 1125
1126/*
1127 * Used for emu1010 - conversion from 32-bit capture inputs from HANA
1128 * to 2 x 16-bit registers in audigy - their values are read via DMA.
1129 * Conversion is performed by Audigy DSP instructions of FX8010.
1130 */
1126static int snd_emu10k1_audigy_dsp_convert_32_to_2x16( 1131static int snd_emu10k1_audigy_dsp_convert_32_to_2x16(
1127 struct snd_emu10k1_fx8010_code *icode, 1132 struct snd_emu10k1_fx8010_code *icode,
1128 u32 *ptr, int tmp, int bit_shifter16, 1133 u32 *ptr, int tmp, int bit_shifter16,
@@ -1193,7 +1198,11 @@ static int __devinit _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
1193 snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP); 1198 snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);
1194 1199
1195#if 1 1200#if 1
1196 /* PCM front Playback Volume (independent from stereo mix) */ 1201 /* PCM front Playback Volume (independent from stereo mix)
1202 * playback = 0 + ( gpr * FXBUS_PCM_LEFT_FRONT >> 31)
1203 * where gpr contains attenuation from corresponding mixer control
1204 * (snd_emu10k1_init_stereo_control)
1205 */
1197 A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT)); 1206 A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));
1198 A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT)); 1207 A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));
1199 snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100); 1208 snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
@@ -1549,7 +1558,7 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
1549 1558
1550 if (emu->card_capabilities->emu1010) { 1559 if (emu->card_capabilities->emu1010) {
1551 snd_printk("EMU inputs on\n"); 1560 snd_printk("EMU inputs on\n");
1552 /* Capture 8 channels of S32_LE sound */ 1561 /* Capture 16 (originally 8) channels of S32_LE sound */
1553 1562
1554 /* printk("emufx.c: gpr=0x%x, tmp=0x%x\n",gpr, tmp); */ 1563 /* printk("emufx.c: gpr=0x%x, tmp=0x%x\n",gpr, tmp); */
1555 /* For the EMU1010: How to get 32bit values from the DSP. High 16bits into L, low 16bits into R. */ 1564 /* For the EMU1010: How to get 32bit values from the DSP. High 16bits into L, low 16bits into R. */
@@ -1560,6 +1569,11 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
1560 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_P16VIN(0x0), A_FXBUS2(0) ); 1569 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_P16VIN(0x0), A_FXBUS2(0) );
1561 /* Right ADC in 1 of 2 */ 1570 /* Right ADC in 1 of 2 */
1562 gpr_map[gpr++] = 0x00000000; 1571 gpr_map[gpr++] = 0x00000000;
1572 /* Delaying by one sample: instead of copying the input
1573 * value A_P16VIN to output A_FXBUS2 as in the first channel,
1574 * we use an auxiliary register, delaying the value by one
1575 * sample
1576 */
1563 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(2) ); 1577 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(2) );
1564 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x1), A_C_00000000, A_C_00000000); 1578 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x1), A_C_00000000, A_C_00000000);
1565 gpr_map[gpr++] = 0x00000000; 1579 gpr_map[gpr++] = 0x00000000;
@@ -1583,6 +1597,66 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
1583 gpr_map[gpr++] = 0x00000000; 1597 gpr_map[gpr++] = 0x00000000;
1584 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xe) ); 1598 snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xe) );
1585 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x7), A_C_00000000, A_C_00000000); 1599 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x7), A_C_00000000, A_C_00000000);
1600 /* Pavel Hofman - we still have voices, A_FXBUS2s, and
1601 * A_P16VINs available -
1602 * let's add 8 more capture channels - total of 16
1603 */
1604 gpr_map[gpr++] = 0x00000000;
1605 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
1606 bit_shifter16,
1607 A_GPR(gpr - 1),
1608 A_FXBUS2(0x10));
1609 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x8),
1610 A_C_00000000, A_C_00000000);
1611 gpr_map[gpr++] = 0x00000000;
1612 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
1613 bit_shifter16,
1614 A_GPR(gpr - 1),
1615 A_FXBUS2(0x12));
1616 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x9),
1617 A_C_00000000, A_C_00000000);
1618 gpr_map[gpr++] = 0x00000000;
1619 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
1620 bit_shifter16,
1621 A_GPR(gpr - 1),
1622 A_FXBUS2(0x14));
1623 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xa),
1624 A_C_00000000, A_C_00000000);
1625 gpr_map[gpr++] = 0x00000000;
1626 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
1627 bit_shifter16,
1628 A_GPR(gpr - 1),
1629 A_FXBUS2(0x16));
1630 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xb),
1631 A_C_00000000, A_C_00000000);
1632 gpr_map[gpr++] = 0x00000000;
1633 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
1634 bit_shifter16,
1635 A_GPR(gpr - 1),
1636 A_FXBUS2(0x18));
1637 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xc),
1638 A_C_00000000, A_C_00000000);
1639 gpr_map[gpr++] = 0x00000000;
1640 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
1641 bit_shifter16,
1642 A_GPR(gpr - 1),
1643 A_FXBUS2(0x1a));
1644 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xd),
1645 A_C_00000000, A_C_00000000);
1646 gpr_map[gpr++] = 0x00000000;
1647 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
1648 bit_shifter16,
1649 A_GPR(gpr - 1),
1650 A_FXBUS2(0x1c));
1651 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xe),
1652 A_C_00000000, A_C_00000000);
1653 gpr_map[gpr++] = 0x00000000;
1654 snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
1655 bit_shifter16,
1656 A_GPR(gpr - 1),
1657 A_FXBUS2(0x1e));
1658 A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xf),
1659 A_C_00000000, A_C_00000000);
1586 1660
1587#if 0 1661#if 0
1588 for (z = 4; z < 8; z++) { 1662 for (z = 4; z < 8; z++) {
diff --git a/sound/pci/emu10k1/emumixer.c b/sound/pci/emu10k1/emumixer.c
index 4db6e1ca1665..7b2c1dcc5337 100644
--- a/sound/pci/emu10k1/emumixer.c
+++ b/sound/pci/emu10k1/emumixer.c
@@ -77,6 +77,10 @@ static int snd_emu10k1_spdif_get_mask(struct snd_kcontrol *kcontrol,
77 return 0; 77 return 0;
78} 78}
79 79
80/*
81 * Items labels in enum mixer controls assigning source data to
82 * each destination
83 */
80static char *emu1010_src_texts[] = { 84static char *emu1010_src_texts[] = {
81 "Silence", 85 "Silence",
82 "Dock Mic A", 86 "Dock Mic A",
@@ -133,6 +137,9 @@ static char *emu1010_src_texts[] = {
133 "DSP 31", 137 "DSP 31",
134}; 138};
135 139
140/*
141 * List of data sources available for each destination
142 */
136static unsigned int emu1010_src_regs[] = { 143static unsigned int emu1010_src_regs[] = {
137 EMU_SRC_SILENCE,/* 0 */ 144 EMU_SRC_SILENCE,/* 0 */
138 EMU_SRC_DOCK_MIC_A1, /* 1 */ 145 EMU_SRC_DOCK_MIC_A1, /* 1 */
@@ -189,6 +196,10 @@ static unsigned int emu1010_src_regs[] = {
189 EMU_SRC_ALICE_EMU32B+0xf, /* 52 */ 196 EMU_SRC_ALICE_EMU32B+0xf, /* 52 */
190}; 197};
191 198
199/*
200 * Data destinations - physical EMU outputs.
201 * Each destination has an enum mixer control to choose a data source
202 */
192static unsigned int emu1010_output_dst[] = { 203static unsigned int emu1010_output_dst[] = {
193 EMU_DST_DOCK_DAC1_LEFT1, /* 0 */ 204 EMU_DST_DOCK_DAC1_LEFT1, /* 0 */
194 EMU_DST_DOCK_DAC1_RIGHT1, /* 1 */ 205 EMU_DST_DOCK_DAC1_RIGHT1, /* 1 */
@@ -216,6 +227,11 @@ static unsigned int emu1010_output_dst[] = {
216 EMU_DST_HANA_ADAT+7, /* 23 */ 227 EMU_DST_HANA_ADAT+7, /* 23 */
217}; 228};
218 229
230/*
231 * Data destinations - HANA outputs going to Alice2 (audigy) for
232 * capture (EMU32 + I2S links)
233 * Each destination has an enum mixer control to choose a data source
234 */
219static unsigned int emu1010_input_dst[] = { 235static unsigned int emu1010_input_dst[] = {
220 EMU_DST_ALICE2_EMU32_0, 236 EMU_DST_ALICE2_EMU32_0,
221 EMU_DST_ALICE2_EMU32_1, 237 EMU_DST_ALICE2_EMU32_1,
diff --git a/sound/pci/emu10k1/emupcm.c b/sound/pci/emu10k1/emupcm.c
index ab4f5df5241b..eda5cb373ded 100644
--- a/sound/pci/emu10k1/emupcm.c
+++ b/sound/pci/emu10k1/emupcm.c
@@ -1233,24 +1233,26 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream)
1233 runtime->hw.rate_min = runtime->hw.rate_max = 48000; 1233 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
1234 spin_lock_irq(&emu->reg_lock); 1234 spin_lock_irq(&emu->reg_lock);
1235 if (emu->card_capabilities->emu1010) { 1235 if (emu->card_capabilities->emu1010) {
1236 /* TODO 1236 /* Nb. of channels has been increased to 16 */
1237 /* TODO
1237 * SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE 1238 * SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE
1238 * SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | 1239 * SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
1239 * SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | 1240 * SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
1240 * SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000 1241 * SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000
1241 * rate_min = 44100, 1242 * rate_min = 44100,
1242 * rate_max = 192000, 1243 * rate_max = 192000,
1243 * channels_min = 8, 1244 * channels_min = 16,
1244 * channels_max = 8, 1245 * channels_max = 16,
1245 * Need to add mixer control to fix sample rate 1246 * Need to add mixer control to fix sample rate
1246 * 1247 *
1247 * There are 16 mono channels of 16bits each. 1248 * There are 32 mono channels of 16bits each.
1248 * 24bit Audio uses 2x channels over 16bit 1249 * 24bit Audio uses 2x channels over 16bit
1249 * 96kHz uses 2x channels over 48kHz 1250 * 96kHz uses 2x channels over 48kHz
1250 * 192kHz uses 4x channels over 48kHz 1251 * 192kHz uses 4x channels over 48kHz
1251 * So, for 48kHz 24bit, one has 8 channels 1252 * So, for 48kHz 24bit, one has 16 channels
1252 * for 96kHz 24bit, one has 4 channels 1253 * for 96kHz 24bit, one has 8 channels
1253 * for 192kHz 24bit, one has 2 channels 1254 * for 192kHz 24bit, one has 4 channels
1255 *
1254 */ 1256 */
1255#if 1 1257#if 1
1256 switch (emu->emu1010.internal_clock) { 1258 switch (emu->emu1010.internal_clock) {
@@ -1258,13 +1260,15 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream)
1258 /* For 44.1kHz */ 1260 /* For 44.1kHz */
1259 runtime->hw.rates = SNDRV_PCM_RATE_44100; 1261 runtime->hw.rates = SNDRV_PCM_RATE_44100;
1260 runtime->hw.rate_min = runtime->hw.rate_max = 44100; 1262 runtime->hw.rate_min = runtime->hw.rate_max = 44100;
1261 runtime->hw.channels_min = runtime->hw.channels_max = 8; 1263 runtime->hw.channels_min =
1264 runtime->hw.channels_max = 16;
1262 break; 1265 break;
1263 case 1: 1266 case 1:
1264 /* For 48kHz */ 1267 /* For 48kHz */
1265 runtime->hw.rates = SNDRV_PCM_RATE_48000; 1268 runtime->hw.rates = SNDRV_PCM_RATE_48000;
1266 runtime->hw.rate_min = runtime->hw.rate_max = 48000; 1269 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
1267 runtime->hw.channels_min = runtime->hw.channels_max = 8; 1270 runtime->hw.channels_min =
1271 runtime->hw.channels_max = 16;
1268 break; 1272 break;
1269 }; 1273 };
1270#endif 1274#endif
@@ -1282,7 +1286,7 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream)
1282#endif 1286#endif
1283 runtime->hw.formats = SNDRV_PCM_FMTBIT_S32_LE; 1287 runtime->hw.formats = SNDRV_PCM_FMTBIT_S32_LE;
1284 /* efx_voices_mask[0] is expected to be zero 1288 /* efx_voices_mask[0] is expected to be zero
1285 * efx_voices_mask[1] is expected to have 16bits set 1289 * efx_voices_mask[1] is expected to have 32bits set
1286 */ 1290 */
1287 } else { 1291 } else {
1288 runtime->hw.channels_min = runtime->hw.channels_max = 0; 1292 runtime->hw.channels_min = runtime->hw.channels_max = 0;
@@ -1787,11 +1791,24 @@ int __devinit snd_emu10k1_pcm_efx(struct snd_emu10k1 * emu, int device, struct s
1787 /* emu->efx_voices_mask[0] = FXWC_DEFAULTROUTE_C | FXWC_DEFAULTROUTE_A; */ 1791 /* emu->efx_voices_mask[0] = FXWC_DEFAULTROUTE_C | FXWC_DEFAULTROUTE_A; */
1788 if (emu->audigy) { 1792 if (emu->audigy) {
1789 emu->efx_voices_mask[0] = 0; 1793 emu->efx_voices_mask[0] = 0;
1790 emu->efx_voices_mask[1] = 0xffff; 1794 if (emu->card_capabilities->emu1010)
1795 /* Pavel Hofman - 32 voices will be used for
1796 * capture (write mode) -
1797 * each bit = corresponding voice
1798 */
1799 emu->efx_voices_mask[1] = 0xffffffff;
1800 else
1801 emu->efx_voices_mask[1] = 0xffff;
1791 } else { 1802 } else {
1792 emu->efx_voices_mask[0] = 0xffff0000; 1803 emu->efx_voices_mask[0] = 0xffff0000;
1793 emu->efx_voices_mask[1] = 0; 1804 emu->efx_voices_mask[1] = 0;
1794 } 1805 }
1806 /* For emu1010, the control has to set 32 upper bits (voices)
1807 * out of the 64 bits (voices) to true for the 16-channels capture
1808 * to work correctly. Correct A_FXWC2 initial value (0xffffffff)
1809 * is already defined but the snd_emu10k1_pcm_efx_voices_mask
1810 * control can override this register's value.
1811 */
1795 kctl = snd_ctl_new1(&snd_emu10k1_pcm_efx_voices_mask, emu); 1812 kctl = snd_ctl_new1(&snd_emu10k1_pcm_efx_voices_mask, emu);
1796 if (!kctl) 1813 if (!kctl)
1797 return -ENOMEM; 1814 return -ENOMEM;