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authorMichael Chan <mchan@broadcom.com>2006-01-23 19:11:42 -0500
committerDavid S. Miller <davem@davemloft.net>2006-01-23 19:11:42 -0500
commit1122db717ab5443ca9043fc0d23c1e862cfb3a61 (patch)
tree360da4ec3f5a29c5d3a3aa1e1677072e3852f26d
parent1269a8a64a37c8a06af672f4cff4fed16a478734 (diff)
[BNX2]: Fix nvram sizing
Add code to correctly determine nvram size. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/bnx2.c13
-rw-r--r--drivers/net/bnx2.h4
2 files changed, 14 insertions, 3 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 7b99cf26a129..4f613b0be140 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -2724,9 +2724,16 @@ bnx2_init_nvram(struct bnx2 *bp)
2724 if (j == entry_count) { 2724 if (j == entry_count) {
2725 bp->flash_info = NULL; 2725 bp->flash_info = NULL;
2726 printk(KERN_ALERT PFX "Unknown flash/EEPROM type.\n"); 2726 printk(KERN_ALERT PFX "Unknown flash/EEPROM type.\n");
2727 rc = -ENODEV; 2727 return -ENODEV;
2728 } 2728 }
2729 2729
2730 val = REG_RD_IND(bp, bp->shmem_base + BNX2_SHARED_HW_CFG_CONFIG2);
2731 val &= BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK;
2732 if (val)
2733 bp->flash_size = val;
2734 else
2735 bp->flash_size = bp->flash_info->total_size;
2736
2730 return rc; 2737 return rc;
2731} 2738}
2732 2739
@@ -4809,10 +4816,10 @@ bnx2_get_eeprom_len(struct net_device *dev)
4809{ 4816{
4810 struct bnx2 *bp = dev->priv; 4817 struct bnx2 *bp = dev->priv;
4811 4818
4812 if (bp->flash_info == 0) 4819 if (bp->flash_info == NULL)
4813 return 0; 4820 return 0;
4814 4821
4815 return (int) bp->flash_info->total_size; 4822 return (int) bp->flash_size;
4816} 4823}
4817 4824
4818static int 4825static int
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index ea70bbcd2542..ae17b63b98b4 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -4072,6 +4072,7 @@ struct bnx2 {
4072 struct net_device_stats net_stats; 4072 struct net_device_stats net_stats;
4073 4073
4074 struct flash_spec *flash_info; 4074 struct flash_spec *flash_info;
4075 u32 flash_size;
4075}; 4076};
4076 4077
4077static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset); 4078static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset);
@@ -4273,6 +4274,9 @@ struct fw_info {
4273#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1 0x100 4274#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1 0x100
4274#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2 0x200 4275#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2 0x200
4275 4276
4277#define BNX2_SHARED_HW_CFG_CONFIG2 0x00000040
4278#define BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK 0x00fff000
4279
4276#define BNX2_DEV_INFO_BC_REV 0x0000004c 4280#define BNX2_DEV_INFO_BC_REV 0x0000004c
4277 4281
4278#define BNX2_PORT_HW_CFG_MAC_UPPER 0x00000050 4282#define BNX2_PORT_HW_CFG_MAC_UPPER 0x00000050