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authorJohn W. Linville <linville@tuxdriver.com>2005-04-21 20:03:52 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2005-04-21 20:03:52 -0400
commit053d78000be4906fac6446ad517ca3897dc6cd84 (patch)
tree3ba4a5f488457ce6432d956b2363e3a3806396f6
parent1b440c568e28186956ef765c69ab124401088663 (diff)
[TG3]: add support for bcm5752 rev a1
Replace existing ASIC_REV_5752 definition with ASIC_REV_5752_A0, and add definition for ASIC_REV_5752_A1. Then, add ASIC_REV_5752_A1 to check for setting TG3_FLG2_5750_PLUS in tg3_get_invariants. Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/tg3.c3
-rw-r--r--drivers/net/tg3.h5
2 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 0951a9605577..c1881976927d 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -7929,7 +7929,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
7929 tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff; 7929 tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;
7930 7930
7931 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 || 7931 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
7932 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) 7932 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A0 ||
7933 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A1)
7933 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS; 7934 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
7934 7935
7935 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) || 7936 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 0cce4044530b..3a91a57a3205 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -125,6 +125,8 @@
125#define CHIPREV_ID_5750_A0 0x4000 125#define CHIPREV_ID_5750_A0 0x4000
126#define CHIPREV_ID_5750_A1 0x4001 126#define CHIPREV_ID_5750_A1 0x4001
127#define CHIPREV_ID_5750_A3 0x4003 127#define CHIPREV_ID_5750_A3 0x4003
128#define CHIPREV_ID_5752_A0 0x5000
129#define CHIPREV_ID_5752_A1 0x6001
128#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) 130#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
129#define ASIC_REV_5700 0x07 131#define ASIC_REV_5700 0x07
130#define ASIC_REV_5701 0x00 132#define ASIC_REV_5701 0x00
@@ -132,7 +134,8 @@
132#define ASIC_REV_5704 0x02 134#define ASIC_REV_5704 0x02
133#define ASIC_REV_5705 0x03 135#define ASIC_REV_5705 0x03
134#define ASIC_REV_5750 0x04 136#define ASIC_REV_5750 0x04
135#define ASIC_REV_5752 0x05 137#define ASIC_REV_5752_A0 0x05
138#define ASIC_REV_5752_A1 0x06
136#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 139#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
137#define CHIPREV_5700_AX 0x70 140#define CHIPREV_5700_AX 0x70
138#define CHIPREV_5700_BX 0x71 141#define CHIPREV_5700_BX 0x71