diff options
author | Patrick Boettcher <pb@linuxtv.org> | 2006-04-17 12:22:15 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2006-09-26 10:53:42 -0400 |
commit | 4de2730a1d2742aea67f24d1041bdc5e0bad37e3 (patch) | |
tree | 25cd8c6aa973e31fa5c1f5dc6f786493fe116794 | |
parent | d7357a53ef4d59724ad80560e47102e0095555b6 (diff) |
V4L/DVB (4451): MT2060: IF1 Offset from EEPROM, several updates
- AGC gain set to 3
- The tuning sequence has been changed to match the DibCom driver ( from I2C
spy captures )
- For LITE-ON adapters : The IF1 frequency is now tuned according to the
calibration values stored in EEPROM.
Signed-off-by: Patrick Boettcher <pb@linuxtv.org>
Signed-off-by: Olivier DANET <odanet@caramail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
-rw-r--r-- | drivers/media/dvb/dvb-usb/dibusb-common.c | 23 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/mt2060.c | 312 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/mt2060.h | 44 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/mt2060_priv.h | 95 |
4 files changed, 472 insertions, 2 deletions
diff --git a/drivers/media/dvb/dvb-usb/dibusb-common.c b/drivers/media/dvb/dvb-usb/dibusb-common.c index e079ba95d384..88062b219b91 100644 --- a/drivers/media/dvb/dvb-usb/dibusb-common.c +++ b/drivers/media/dvb/dvb-usb/dibusb-common.c | |||
@@ -234,12 +234,31 @@ EXPORT_SYMBOL(dibusb_dib3000mc_frontend_attach); | |||
234 | int dibusb_dib3000mc_tuner_attach (struct dvb_usb_device *d) | 234 | int dibusb_dib3000mc_tuner_attach (struct dvb_usb_device *d) |
235 | { | 235 | { |
236 | int ret; | 236 | int ret; |
237 | u8 a,b; | ||
238 | u16 if1=1220; | ||
237 | 239 | ||
238 | if (d->tuner_pass_ctrl) { | 240 | if (d->tuner_pass_ctrl) { |
239 | struct dibusb_state *st = d->priv; | 241 | struct dibusb_state *st = d->priv; |
240 | d->tuner_pass_ctrl(d->fe, 1, stk3000p_mt2060_config.i2c_address); | 242 | d->tuner_pass_ctrl(d->fe, 1, stk3000p_mt2060_config.i2c_address); |
241 | /* check for mt2060 */ | 243 | // First IF calibration for Liteon Sticks |
242 | if ((ret = mt2060_attach(&st->mt2060,&stk3000p_mt2060_config, &d->i2c_adap)) != 0) { | 244 | if (d->udev->descriptor.idVendor == USB_VID_LITEON && |
245 | d->udev->descriptor.idProduct == USB_PID_LITEON_DVB_T_WARM) { | ||
246 | dibusb_read_eeprom_byte(d,0x7E,&a); | ||
247 | dibusb_read_eeprom_byte(d,0x7F,&b); | ||
248 | if (a == 0xFF && b == 0xFF) { | ||
249 | if1 = 1220; | ||
250 | } else | ||
251 | if (a == 0x00) { | ||
252 | if1 = 1220+b; | ||
253 | } else | ||
254 | if (a == 0x80) { | ||
255 | if1 = 1220-b; | ||
256 | } else { | ||
257 | warn("LITE-ON DVB-T Tuner : Strange IF1 calibration :%2X %2X\n",(int)a,(int)b); | ||
258 | if1 = 1220; | ||
259 | } | ||
260 | } | ||
261 | if ((ret = mt2060_attach(&st->mt2060,&stk3000p_mt2060_config, &d->i2c_adap,if1)) != 0) { | ||
243 | /* not found - use panasonic pll parameters */ | 262 | /* not found - use panasonic pll parameters */ |
244 | d->pll_addr = 0x60; | 263 | d->pll_addr = 0x60; |
245 | d->pll_desc = &dvb_pll_env57h1xd5; | 264 | d->pll_desc = &dvb_pll_env57h1xd5; |
diff --git a/drivers/media/dvb/frontends/mt2060.c b/drivers/media/dvb/frontends/mt2060.c new file mode 100644 index 000000000000..aa92c1c51e6d --- /dev/null +++ b/drivers/media/dvb/frontends/mt2060.c | |||
@@ -0,0 +1,312 @@ | |||
1 | /* | ||
2 | * Driver for Microtune MT2060 "Single chip dual conversion broadband tuner" | ||
3 | * | ||
4 | * Copyright (c) 2006 Olivier DANET <odanet@caramail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.= | ||
20 | */ | ||
21 | |||
22 | /* See mt2060_priv.h for details */ | ||
23 | |||
24 | /* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */ | ||
25 | |||
26 | #include <linux/module.h> | ||
27 | #include <linux/moduleparam.h> | ||
28 | #include <linux/delay.h> | ||
29 | #include <linux/dvb/frontend.h> | ||
30 | #include "mt2060.h" | ||
31 | #include "mt2060_priv.h" | ||
32 | |||
33 | static int debug=0; | ||
34 | module_param(debug, int, 0644); | ||
35 | MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); | ||
36 | |||
37 | #define dprintk(args...) do { if (debug) printk(KERN_DEBUG "MT2060: " args); printk("\n"); } while (0) | ||
38 | |||
39 | // Reads a single register | ||
40 | static int mt2060_readreg(struct mt2060_state *state, u8 reg, u8 *val) | ||
41 | { | ||
42 | struct i2c_msg msg[2] = { | ||
43 | { .addr = state->config->i2c_address, .flags = 0, .buf = ®, .len = 1 }, | ||
44 | { .addr = state->config->i2c_address, .flags = I2C_M_RD, .buf = val, .len = 1 }, | ||
45 | }; | ||
46 | |||
47 | if (i2c_transfer(state->i2c, msg, 2) != 2) { | ||
48 | printk(KERN_WARNING "mt2060 I2C read failed\n"); | ||
49 | return -EREMOTEIO; | ||
50 | } | ||
51 | return 0; | ||
52 | } | ||
53 | |||
54 | // Writes a single register | ||
55 | static int mt2060_writereg(struct mt2060_state *state, u8 reg, u8 val) | ||
56 | { | ||
57 | u8 buf[2]; | ||
58 | struct i2c_msg msg = { | ||
59 | .addr = state->config->i2c_address, .flags = 0, .buf = buf, .len = 2 | ||
60 | }; | ||
61 | buf[0]=reg; | ||
62 | buf[1]=val; | ||
63 | |||
64 | if (i2c_transfer(state->i2c, &msg, 1) != 1) { | ||
65 | printk(KERN_WARNING "mt2060 I2C write failed\n"); | ||
66 | return -EREMOTEIO; | ||
67 | } | ||
68 | return 0; | ||
69 | } | ||
70 | |||
71 | // Writes a set of consecutive registers | ||
72 | static int mt2060_writeregs(struct mt2060_state *state,u8 *buf, u8 len) | ||
73 | { | ||
74 | struct i2c_msg msg = { | ||
75 | .addr = state->config->i2c_address, .flags = 0, .buf = buf, .len = len | ||
76 | }; | ||
77 | if (i2c_transfer(state->i2c, &msg, 1) != 1) { | ||
78 | printk(KERN_WARNING "mt2060 I2C write failed (len=%i)\n",(int)len); | ||
79 | return -EREMOTEIO; | ||
80 | } | ||
81 | return 0; | ||
82 | } | ||
83 | |||
84 | // Initialisation sequences | ||
85 | // LNABAND=3, NUM1=0x3C, DIV1=0x74, NUM2=0x1080, DIV2=0x49 | ||
86 | static u8 mt2060_config1[] = { | ||
87 | REG_LO1C1, | ||
88 | 0x3F, 0x74, 0x00, 0x08, 0x93 | ||
89 | }; | ||
90 | |||
91 | // FMCG=2, GP2=0, GP1=0 | ||
92 | static u8 mt2060_config2[] = { | ||
93 | REG_MISC_CTRL, | ||
94 | 0x20, 0x1E, 0x30, 0xff, 0x80, 0xff, 0x00, 0x2c, 0x42 | ||
95 | }; | ||
96 | |||
97 | // VGAG=3, V1CSE=1 | ||
98 | static u8 mt2060_config3[] = { | ||
99 | REG_VGAG, | ||
100 | 0x33 | ||
101 | }; | ||
102 | |||
103 | int mt2060_init(struct mt2060_state *state) | ||
104 | { | ||
105 | if (mt2060_writeregs(state,mt2060_config1,sizeof(mt2060_config1))) | ||
106 | return -EREMOTEIO; | ||
107 | if (mt2060_writeregs(state,mt2060_config3,sizeof(mt2060_config3))) | ||
108 | return -EREMOTEIO; | ||
109 | return 0; | ||
110 | } | ||
111 | EXPORT_SYMBOL(mt2060_init); | ||
112 | |||
113 | #ifdef MT2060_SPURCHECK | ||
114 | /* The function below calculates the frequency offset between the output frequency if2 | ||
115 | and the closer cross modulation subcarrier between lo1 and lo2 up to the tenth harmonic */ | ||
116 | static int mt2060_spurcalc(u32 lo1,u32 lo2,u32 if2) | ||
117 | { | ||
118 | int I,J; | ||
119 | int dia,diamin,diff; | ||
120 | diamin=1000000; | ||
121 | for (I = 1; I < 10; I++) { | ||
122 | J = ((2*I*lo1)/lo2+1)/2; | ||
123 | diff = I*(int)lo1-J*(int)lo2; | ||
124 | if (diff < 0) diff=-diff; | ||
125 | dia = (diff-(int)if2); | ||
126 | if (dia < 0) dia=-dia; | ||
127 | if (diamin > dia) diamin=dia; | ||
128 | } | ||
129 | return diamin; | ||
130 | } | ||
131 | |||
132 | #define BANDWIDTH 4000 // kHz | ||
133 | |||
134 | /* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */ | ||
135 | static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2) | ||
136 | { | ||
137 | u32 Spur,Sp1,Sp2; | ||
138 | int I,J; | ||
139 | I=0; | ||
140 | J=1000; | ||
141 | |||
142 | Spur=mt2060_spurcalc(lo1,lo2,if2); | ||
143 | if (Spur < BANDWIDTH) { | ||
144 | /* Potential spurs detected */ | ||
145 | dprintk("Spurs before : f_lo1: %d f_lo2: %d (kHz)", | ||
146 | (int)lo1,(int)lo2); | ||
147 | I=1000; | ||
148 | Sp1 = mt2060_spurcalc(lo1+I,lo2+I,if2); | ||
149 | Sp2 = mt2060_spurcalc(lo1-I,lo2-I,if2); | ||
150 | |||
151 | if (Sp1 < Sp2) { | ||
152 | J=-J; I=-I; Spur=Sp2; | ||
153 | } else | ||
154 | Spur=Sp1; | ||
155 | |||
156 | while (Spur < BANDWIDTH) { | ||
157 | I += J; | ||
158 | Spur = mt2060_spurcalc(lo1+I,lo2+I,if2); | ||
159 | } | ||
160 | dprintk("Spurs after : f_lo1: %d f_lo2: %d (kHz)", | ||
161 | (int)(lo1+I),(int)(lo2+I)); | ||
162 | } | ||
163 | return I; | ||
164 | } | ||
165 | #endif | ||
166 | |||
167 | #define IF2 36150 // IF2 frequency = 36.150 MHz | ||
168 | #define FREF 16000 // Quartz oscillator 16 MHz | ||
169 | |||
170 | int mt2060_set(struct mt2060_state *state, struct dvb_frontend_parameters *fep) | ||
171 | { | ||
172 | int ret=0; | ||
173 | int i=0; | ||
174 | u32 freq; | ||
175 | u8 lnaband; | ||
176 | u32 f_lo1,f_lo2; | ||
177 | u32 div1,num1,div2,num2; | ||
178 | u8 b[8]; | ||
179 | u32 if1; | ||
180 | |||
181 | if1 = state->if1_freq; | ||
182 | b[0] = REG_LO1B1; | ||
183 | b[1] = 0xFF; | ||
184 | mt2060_writeregs(state,b,2); | ||
185 | |||
186 | freq = fep->frequency / 1000; // Hz -> kHz | ||
187 | |||
188 | f_lo1 = freq + if1 * 1000; | ||
189 | f_lo1 = (f_lo1/250)*250; | ||
190 | f_lo2 = f_lo1 - freq - IF2; | ||
191 | f_lo2 = (f_lo2/50)*50; | ||
192 | |||
193 | #ifdef MT2060_SPURCHECK | ||
194 | // LO-related spurs detection and correction | ||
195 | num1 = mt2060_spurcheck(f_lo1,f_lo2,IF2); | ||
196 | f_lo1 += num1; | ||
197 | f_lo2 += num1; | ||
198 | #endif | ||
199 | //Frequency LO1 = 16MHz * (DIV1 + NUM1/64 ) | ||
200 | div1 = f_lo1 / FREF; | ||
201 | num1 = (64 * (f_lo1 % FREF) )/FREF; | ||
202 | |||
203 | // Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) | ||
204 | div2 = f_lo2 / FREF; | ||
205 | num2 = (16384 * (f_lo2 % FREF) /FREF +1)/2; | ||
206 | |||
207 | if (freq <= 95000) lnaband = 0xB0; else | ||
208 | if (freq <= 180000) lnaband = 0xA0; else | ||
209 | if (freq <= 260000) lnaband = 0x90; else | ||
210 | if (freq <= 335000) lnaband = 0x80; else | ||
211 | if (freq <= 425000) lnaband = 0x70; else | ||
212 | if (freq <= 480000) lnaband = 0x60; else | ||
213 | if (freq <= 570000) lnaband = 0x50; else | ||
214 | if (freq <= 645000) lnaband = 0x40; else | ||
215 | if (freq <= 730000) lnaband = 0x30; else | ||
216 | if (freq <= 810000) lnaband = 0x20; else lnaband = 0x10; | ||
217 | |||
218 | b[0] = REG_LO1C1; | ||
219 | b[1] = lnaband | ((num1 >>2) & 0x0F); | ||
220 | b[2] = div1; | ||
221 | b[3] = (num2 & 0x0F) | ((num1 & 3) << 4); | ||
222 | b[4] = num2 >> 4; | ||
223 | b[5] = ((num2 >>12) & 1) | (div2 << 1); | ||
224 | |||
225 | dprintk("IF1: %dMHz",(int)if1); | ||
226 | dprintk("PLL freq: %d f_lo1: %d f_lo2: %d (kHz)",(int)freq,(int)f_lo1,(int)f_lo2); | ||
227 | dprintk("PLL div1: %d num1: %d div2: %d num2: %d",(int)div1,(int)num1,(int)div2,(int)num2); | ||
228 | dprintk("PLL [1..5]: %2x %2x %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3],(int)b[4],(int)b[5]); | ||
229 | |||
230 | mt2060_writeregs(state,b,6); | ||
231 | |||
232 | //Waits for pll lock or timeout | ||
233 | i=0; | ||
234 | do { | ||
235 | mt2060_readreg(state,REG_LO_STATUS,b); | ||
236 | if ((b[0] & 0x88)==0x88) break; | ||
237 | msleep(4); | ||
238 | i++; | ||
239 | } while (i<10); | ||
240 | |||
241 | return ret; | ||
242 | } | ||
243 | EXPORT_SYMBOL(mt2060_set); | ||
244 | |||
245 | /* from usbsnoop.log */ | ||
246 | static void mt2060_calibrate(struct mt2060_state *state) | ||
247 | { | ||
248 | u8 b = 0; | ||
249 | int i = 0; | ||
250 | |||
251 | if (mt2060_writeregs(state,mt2060_config1,sizeof(mt2060_config1))) | ||
252 | return; | ||
253 | if (mt2060_writeregs(state,mt2060_config2,sizeof(mt2060_config2))) | ||
254 | return; | ||
255 | |||
256 | do { | ||
257 | b |= (1 << 6); // FM1SS; | ||
258 | mt2060_writereg(state, REG_LO2C1,b); | ||
259 | msleep(20); | ||
260 | |||
261 | if (i == 0) { | ||
262 | b |= (1 << 7); // FM1CA; | ||
263 | mt2060_writereg(state, REG_LO2C1,b); | ||
264 | b &= ~(1 << 7); // FM1CA; | ||
265 | msleep(20); | ||
266 | } | ||
267 | |||
268 | b &= ~(1 << 6); // FM1SS | ||
269 | mt2060_writereg(state, REG_LO2C1,b); | ||
270 | |||
271 | msleep(20); | ||
272 | i++; | ||
273 | } while (i < 9); | ||
274 | |||
275 | i = 0; | ||
276 | while (i++ < 10 && mt2060_readreg(state, REG_MISC_STAT, &b) == 0 && (b & (1 << 6)) == 0) | ||
277 | msleep(20); | ||
278 | |||
279 | if (i < 10) { | ||
280 | mt2060_readreg(state, REG_FM_FREQ, &state->fmfreq); // now find out, what is fmreq used for :) | ||
281 | dprintk("calibration was successful: %d",state->fmfreq); | ||
282 | } else | ||
283 | dprintk("FMCAL timed out"); | ||
284 | } | ||
285 | |||
286 | /* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */ | ||
287 | int mt2060_attach(struct mt2060_state *state, struct mt2060_config *config, struct i2c_adapter *i2c,u16 if1) | ||
288 | { | ||
289 | u8 id = 0; | ||
290 | memset(state,0,sizeof(struct mt2060_state)); | ||
291 | |||
292 | state->config = config; | ||
293 | state->i2c = i2c; | ||
294 | state->if1_freq = if1; | ||
295 | |||
296 | if (mt2060_readreg(state,REG_PART_REV,&id) != 0) | ||
297 | return -ENODEV; | ||
298 | |||
299 | if (id != PART_REV) | ||
300 | return -ENODEV; | ||
301 | |||
302 | printk(KERN_INFO "MT2060: successfully identified\n"); | ||
303 | |||
304 | mt2060_calibrate(state); | ||
305 | |||
306 | return 0; | ||
307 | } | ||
308 | EXPORT_SYMBOL(mt2060_attach); | ||
309 | |||
310 | MODULE_AUTHOR("Olivier DANET"); | ||
311 | MODULE_DESCRIPTION("Microtune MT2060 silicon tuner driver"); | ||
312 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/dvb/frontends/mt2060.h b/drivers/media/dvb/frontends/mt2060.h new file mode 100644 index 000000000000..d5dae102f96f --- /dev/null +++ b/drivers/media/dvb/frontends/mt2060.h | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * Driver for Microtune MT2060 "Single chip dual conversion broadband tuner" | ||
3 | * | ||
4 | * Copyright (c) 2006 Olivier DANET <odanet@caramail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.= | ||
20 | */ | ||
21 | |||
22 | #ifndef MT2060_H | ||
23 | #define MT2060_H | ||
24 | |||
25 | #include <linux/i2c.h> | ||
26 | #include <linux/dvb/frontend.h> | ||
27 | |||
28 | struct mt2060_config { | ||
29 | u8 i2c_address; | ||
30 | /* Shall we add settings for the discrete outputs ? */ | ||
31 | }; | ||
32 | |||
33 | struct mt2060_state { | ||
34 | struct mt2060_config *config; | ||
35 | struct i2c_adapter *i2c; | ||
36 | u16 if1_freq; | ||
37 | u8 fmfreq; | ||
38 | }; | ||
39 | |||
40 | extern int mt2060_init(struct mt2060_state *state); | ||
41 | extern int mt2060_set(struct mt2060_state *state, struct dvb_frontend_parameters *fep); | ||
42 | extern int mt2060_attach(struct mt2060_state *state, struct mt2060_config *config, struct i2c_adapter *i2c,u16 if1); | ||
43 | |||
44 | #endif | ||
diff --git a/drivers/media/dvb/frontends/mt2060_priv.h b/drivers/media/dvb/frontends/mt2060_priv.h new file mode 100644 index 000000000000..47e691e44b7b --- /dev/null +++ b/drivers/media/dvb/frontends/mt2060_priv.h | |||
@@ -0,0 +1,95 @@ | |||
1 | /* | ||
2 | * Driver for Microtune MT2060 "Single chip dual conversion broadband tuner" | ||
3 | * | ||
4 | * Copyright (c) 2006 Olivier DANET <odanet@caramail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.= | ||
20 | */ | ||
21 | |||
22 | #ifndef MT2060_PRIV_H | ||
23 | #define MT2060_PRIV_H | ||
24 | |||
25 | // Uncomment the #define below to enable spurs checking. The results where quite unconvincing. | ||
26 | // #define MT2060_SPURCHECK | ||
27 | |||
28 | /* This driver is based on the information available in the datasheet of the | ||
29 | "Comtech SDVBT-3K6M" tuner ( K1000737843.pdf ) which features the MT2060 register map : | ||
30 | |||
31 | I2C Address : 0x60 | ||
32 | |||
33 | Reg.No | B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 | ( defaults ) | ||
34 | -------------------------------------------------------------------------------- | ||
35 | 00 | [ PART ] | [ REV ] | R = 0x63 | ||
36 | 01 | [ LNABAND ] | [ NUM1(5:2) ] | RW = 0x3F | ||
37 | 02 | [ DIV1 ] | RW = 0x74 | ||
38 | 03 | FM1CA | FM1SS | [ NUM1(1:0) ] | [ NUM2(3:0) ] | RW = 0x00 | ||
39 | 04 | NUM2(11:4) ] | RW = 0x08 | ||
40 | 05 | [ DIV2 ] |NUM2(12)| RW = 0x93 | ||
41 | 06 | L1LK | [ TAD1 ] | L2LK | [ TAD2 ] | R | ||
42 | 07 | [ FMF ] | R | ||
43 | 08 | ? | FMCAL | ? | ? | ? | ? | ? | TEMP | R | ||
44 | 09 | 0 | 0 | [ FMGC ] | 0 | GP02 | GP01 | 0 | RW = 0x20 | ||
45 | 0A | ?? | ||
46 | 0B | 0 | 0 | 1 | 1 | 0 | 0 | [ VGAG ] | RW = 0x30 | ||
47 | 0C | V1CSE | 1 | 1 | 1 | 1 | 1 | 1 | 1 | RW = 0xFF | ||
48 | 0D | 1 | 0 | [ V1CS ] | RW = 0xB0 | ||
49 | 0E | ?? | ||
50 | 0F | ?? | ||
51 | 10 | ?? | ||
52 | 11 | [ LOTO ] | 0 | 0 | 1 | 0 | RW = 0x42 | ||
53 | |||
54 | PART : Part code : 6 for MT2060 | ||
55 | REV : Revision code : 3 for current revision | ||
56 | LNABAND : Input frequency range : ( See code for details ) | ||
57 | NUM1 / DIV1 / NUM2 / DIV2 : Frequencies programming ( See code for details ) | ||
58 | FM1CA : Calibration Start Bit | ||
59 | FM1SS : Calibration Single Step bit | ||
60 | L1LK : LO1 Lock Detect | ||
61 | TAD1 : Tune Line ADC ( ? ) | ||
62 | L2LK : LO2 Lock Detect | ||
63 | TAD2 : Tune Line ADC ( ? ) | ||
64 | FMF : Estimated first IF Center frequency Offset ( ? ) | ||
65 | FM1CAL : Calibration done bit | ||
66 | TEMP : On chip temperature sensor | ||
67 | FMCG : Mixer 1 Cap Gain ( ? ) | ||
68 | GP01 / GP02 : Programmable digital outputs. Unconnected pins ? | ||
69 | V1CSE : LO1 VCO Automatic Capacitor Select Enable ( ? ) | ||
70 | V1CS : LO1 Capacitor Selection Value ( ? ) | ||
71 | LOTO : LO Timeout ( ? ) | ||
72 | VGAG : Tuner Output gain | ||
73 | */ | ||
74 | |||
75 | #define I2C_ADDRESS 0x60 | ||
76 | |||
77 | #define REG_PART_REV 0 | ||
78 | #define REG_LO1C1 1 | ||
79 | #define REG_LO1C2 2 | ||
80 | #define REG_LO2C1 3 | ||
81 | #define REG_LO2C2 4 | ||
82 | #define REG_LO2C3 5 | ||
83 | #define REG_LO_STATUS 6 | ||
84 | #define REG_FM_FREQ 7 | ||
85 | #define REG_MISC_STAT 8 | ||
86 | #define REG_MISC_CTRL 9 | ||
87 | #define REG_RESERVED_A 0x0A | ||
88 | #define REG_VGAG 0x0B | ||
89 | #define REG_LO1B1 0x0C | ||
90 | #define REG_LO1B2 0x0D | ||
91 | #define REG_LOTO 0x11 | ||
92 | |||
93 | #define PART_REV 0x63 // The current driver works only with PART=6 and REV=3 chips | ||
94 | |||
95 | #endif | ||