diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-24 13:51:21 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-24 13:51:21 -0500 |
commit | 1e6c5c4e4c98af5f9e905b860f4536dcc8e92402 (patch) | |
tree | a556273ceeded366a3343b078943aa4f11c4a9fa | |
parent | 46fe24389a44527377077e3ff52206709f0387af (diff) | |
parent | 5fd4514bb351b5ecb0da3692fff70741e5ed200c (diff) |
Merge branch 'urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* 'urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:
parisc: Set PCI CLS early in boot.
-rw-r--r-- | arch/parisc/kernel/pci.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index f7064abc3bb6..9e74bfe071dc 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c | |||
@@ -18,7 +18,6 @@ | |||
18 | 18 | ||
19 | #include <asm/io.h> | 19 | #include <asm/io.h> |
20 | #include <asm/system.h> | 20 | #include <asm/system.h> |
21 | #include <asm/cache.h> /* for L1_CACHE_BYTES */ | ||
22 | #include <asm/superio.h> | 21 | #include <asm/superio.h> |
23 | 22 | ||
24 | #define DEBUG_RESOURCES 0 | 23 | #define DEBUG_RESOURCES 0 |
@@ -123,6 +122,10 @@ static int __init pcibios_init(void) | |||
123 | } else { | 122 | } else { |
124 | printk(KERN_WARNING "pci_bios != NULL but init() is!\n"); | 123 | printk(KERN_WARNING "pci_bios != NULL but init() is!\n"); |
125 | } | 124 | } |
125 | |||
126 | /* Set the CLS for PCI as early as possible. */ | ||
127 | pci_cache_line_size = pci_dfl_cache_line_size; | ||
128 | |||
126 | return 0; | 129 | return 0; |
127 | } | 130 | } |
128 | 131 | ||
@@ -171,7 +174,7 @@ void pcibios_set_master(struct pci_dev *dev) | |||
171 | ** upper byte is PCI_LATENCY_TIMER. | 174 | ** upper byte is PCI_LATENCY_TIMER. |
172 | */ | 175 | */ |
173 | pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, | 176 | pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, |
174 | (0x80 << 8) | (L1_CACHE_BYTES / sizeof(u32))); | 177 | (0x80 << 8) | pci_cache_line_size); |
175 | } | 178 | } |
176 | 179 | ||
177 | 180 | ||