diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2008-05-02 19:48:36 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-05-02 19:48:36 -0400 |
commit | fd1122a2593d0bbe19856e3943c859ebfe563583 (patch) | |
tree | 75be50b8a959ef7f772612643d5d60104e9ccceb | |
parent | 8ef214288622bf523a3b3096958292a1c63132ad (diff) |
tg3: Fix 5761 NVRAM sizes
The 5761 NVRAM sizes assigned to the nvram_size member are half as big
as they should be. This patch corrects the NVRAM sizes and replaces
the hardcoded constants with preprocessor constants for readability.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/tg3.c | 31 | ||||
-rw-r--r-- | drivers/net/tg3.h | 11 |
2 files changed, 29 insertions, 13 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index e0dc31fdf844..b17812491b8a 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -9894,7 +9894,7 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp) | |||
9894 | return; | 9894 | return; |
9895 | } | 9895 | } |
9896 | } | 9896 | } |
9897 | tp->nvram_size = 0x80000; | 9897 | tp->nvram_size = TG3_NVRAM_SIZE_512KB; |
9898 | } | 9898 | } |
9899 | 9899 | ||
9900 | static void __devinit tg3_get_nvram_info(struct tg3 *tp) | 9900 | static void __devinit tg3_get_nvram_info(struct tg3 *tp) |
@@ -10035,11 +10035,14 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) | |||
10035 | tp->nvram_pagesize = 264; | 10035 | tp->nvram_pagesize = 264; |
10036 | if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 || | 10036 | if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 || |
10037 | nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5) | 10037 | nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5) |
10038 | tp->nvram_size = (protect ? 0x3e200 : 0x80000); | 10038 | tp->nvram_size = (protect ? 0x3e200 : |
10039 | TG3_NVRAM_SIZE_512KB); | ||
10039 | else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2) | 10040 | else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2) |
10040 | tp->nvram_size = (protect ? 0x1f200 : 0x40000); | 10041 | tp->nvram_size = (protect ? 0x1f200 : |
10042 | TG3_NVRAM_SIZE_256KB); | ||
10041 | else | 10043 | else |
10042 | tp->nvram_size = (protect ? 0x1f200 : 0x20000); | 10044 | tp->nvram_size = (protect ? 0x1f200 : |
10045 | TG3_NVRAM_SIZE_128KB); | ||
10043 | break; | 10046 | break; |
10044 | case FLASH_5752VENDOR_ST_M45PE10: | 10047 | case FLASH_5752VENDOR_ST_M45PE10: |
10045 | case FLASH_5752VENDOR_ST_M45PE20: | 10048 | case FLASH_5752VENDOR_ST_M45PE20: |
@@ -10049,11 +10052,17 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) | |||
10049 | tp->tg3_flags2 |= TG3_FLG2_FLASH; | 10052 | tp->tg3_flags2 |= TG3_FLG2_FLASH; |
10050 | tp->nvram_pagesize = 256; | 10053 | tp->nvram_pagesize = 256; |
10051 | if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10) | 10054 | if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10) |
10052 | tp->nvram_size = (protect ? 0x10000 : 0x20000); | 10055 | tp->nvram_size = (protect ? |
10056 | TG3_NVRAM_SIZE_64KB : | ||
10057 | TG3_NVRAM_SIZE_128KB); | ||
10053 | else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20) | 10058 | else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20) |
10054 | tp->nvram_size = (protect ? 0x10000 : 0x40000); | 10059 | tp->nvram_size = (protect ? |
10060 | TG3_NVRAM_SIZE_64KB : | ||
10061 | TG3_NVRAM_SIZE_256KB); | ||
10055 | else | 10062 | else |
10056 | tp->nvram_size = (protect ? 0x20000 : 0x80000); | 10063 | tp->nvram_size = (protect ? |
10064 | TG3_NVRAM_SIZE_128KB : | ||
10065 | TG3_NVRAM_SIZE_512KB); | ||
10057 | break; | 10066 | break; |
10058 | } | 10067 | } |
10059 | } | 10068 | } |
@@ -10147,25 +10156,25 @@ static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp) | |||
10147 | case FLASH_5761VENDOR_ATMEL_MDB161D: | 10156 | case FLASH_5761VENDOR_ATMEL_MDB161D: |
10148 | case FLASH_5761VENDOR_ST_A_M45PE16: | 10157 | case FLASH_5761VENDOR_ST_A_M45PE16: |
10149 | case FLASH_5761VENDOR_ST_M_M45PE16: | 10158 | case FLASH_5761VENDOR_ST_M_M45PE16: |
10150 | tp->nvram_size = 0x100000; | 10159 | tp->nvram_size = TG3_NVRAM_SIZE_2MB; |
10151 | break; | 10160 | break; |
10152 | case FLASH_5761VENDOR_ATMEL_ADB081D: | 10161 | case FLASH_5761VENDOR_ATMEL_ADB081D: |
10153 | case FLASH_5761VENDOR_ATMEL_MDB081D: | 10162 | case FLASH_5761VENDOR_ATMEL_MDB081D: |
10154 | case FLASH_5761VENDOR_ST_A_M45PE80: | 10163 | case FLASH_5761VENDOR_ST_A_M45PE80: |
10155 | case FLASH_5761VENDOR_ST_M_M45PE80: | 10164 | case FLASH_5761VENDOR_ST_M_M45PE80: |
10156 | tp->nvram_size = 0x80000; | 10165 | tp->nvram_size = TG3_NVRAM_SIZE_1MB; |
10157 | break; | 10166 | break; |
10158 | case FLASH_5761VENDOR_ATMEL_ADB041D: | 10167 | case FLASH_5761VENDOR_ATMEL_ADB041D: |
10159 | case FLASH_5761VENDOR_ATMEL_MDB041D: | 10168 | case FLASH_5761VENDOR_ATMEL_MDB041D: |
10160 | case FLASH_5761VENDOR_ST_A_M45PE40: | 10169 | case FLASH_5761VENDOR_ST_A_M45PE40: |
10161 | case FLASH_5761VENDOR_ST_M_M45PE40: | 10170 | case FLASH_5761VENDOR_ST_M_M45PE40: |
10162 | tp->nvram_size = 0x40000; | 10171 | tp->nvram_size = TG3_NVRAM_SIZE_512KB; |
10163 | break; | 10172 | break; |
10164 | case FLASH_5761VENDOR_ATMEL_ADB021D: | 10173 | case FLASH_5761VENDOR_ATMEL_ADB021D: |
10165 | case FLASH_5761VENDOR_ATMEL_MDB021D: | 10174 | case FLASH_5761VENDOR_ATMEL_MDB021D: |
10166 | case FLASH_5761VENDOR_ST_A_M45PE20: | 10175 | case FLASH_5761VENDOR_ST_A_M45PE20: |
10167 | case FLASH_5761VENDOR_ST_M_M45PE20: | 10176 | case FLASH_5761VENDOR_ST_M_M45PE20: |
10168 | tp->nvram_size = 0x20000; | 10177 | tp->nvram_size = TG3_NVRAM_SIZE_256KB; |
10169 | break; | 10178 | break; |
10170 | } | 10179 | } |
10171 | } | 10180 | } |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index ce2be3a96175..bf387ff9bc15 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -2576,6 +2576,13 @@ struct tg3 { | |||
2576 | 2576 | ||
2577 | int nvram_lock_cnt; | 2577 | int nvram_lock_cnt; |
2578 | u32 nvram_size; | 2578 | u32 nvram_size; |
2579 | #define TG3_NVRAM_SIZE_64KB 0x00010000 | ||
2580 | #define TG3_NVRAM_SIZE_128KB 0x00020000 | ||
2581 | #define TG3_NVRAM_SIZE_256KB 0x00040000 | ||
2582 | #define TG3_NVRAM_SIZE_512KB 0x00080000 | ||
2583 | #define TG3_NVRAM_SIZE_1MB 0x00100000 | ||
2584 | #define TG3_NVRAM_SIZE_2MB 0x00200000 | ||
2585 | |||
2579 | u32 nvram_pagesize; | 2586 | u32 nvram_pagesize; |
2580 | u32 nvram_jedecnum; | 2587 | u32 nvram_jedecnum; |
2581 | 2588 | ||
@@ -2584,10 +2591,10 @@ struct tg3 { | |||
2584 | #define JEDEC_SAIFUN 0x4f | 2591 | #define JEDEC_SAIFUN 0x4f |
2585 | #define JEDEC_SST 0xbf | 2592 | #define JEDEC_SST 0xbf |
2586 | 2593 | ||
2587 | #define ATMEL_AT24C64_CHIP_SIZE (64 * 1024) | 2594 | #define ATMEL_AT24C64_CHIP_SIZE TG3_NVRAM_SIZE_64KB |
2588 | #define ATMEL_AT24C64_PAGE_SIZE (32) | 2595 | #define ATMEL_AT24C64_PAGE_SIZE (32) |
2589 | 2596 | ||
2590 | #define ATMEL_AT24C512_CHIP_SIZE (512 * 1024) | 2597 | #define ATMEL_AT24C512_CHIP_SIZE TG3_NVRAM_SIZE_512KB |
2591 | #define ATMEL_AT24C512_PAGE_SIZE (128) | 2598 | #define ATMEL_AT24C512_PAGE_SIZE (128) |
2592 | 2599 | ||
2593 | #define ATMEL_AT45DB0X1B_PAGE_POS 9 | 2600 | #define ATMEL_AT45DB0X1B_PAGE_POS 9 |