diff options
author | Yoichi Yuasa <yuasa@hh.iij4u.or.jp> | 2005-05-17 00:53:53 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-05-17 10:59:20 -0400 |
commit | 3407c0fec3456325826c31792e77a80a6dec0e20 (patch) | |
tree | 782e7c46235b6de7c775287a786ea7e454058472 | |
parent | 4c443d1b558b21520bd8fd6140b85cee0756becd (diff) |
[PATCH] mips: add resource management to pmu
This patch had added resource management to vr41xx's pmu.
Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r-- | arch/mips/vr41xx/common/pmu.c | 55 |
1 files changed, 48 insertions, 7 deletions
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c index c5f1043de938..53166f3598b2 100644 --- a/arch/mips/vr41xx/common/pmu.c +++ b/arch/mips/vr41xx/common/pmu.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * pmu.c, Power Management Unit routines for NEC VR4100 series. | 2 | * pmu.c, Power Management Unit routines for NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> | 4 | * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -17,7 +17,9 @@ | |||
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | */ | 19 | */ |
20 | #include <linux/errno.h> | ||
20 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/ioport.h> | ||
21 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
22 | #include <linux/smp.h> | 24 | #include <linux/smp.h> |
23 | #include <linux/types.h> | 25 | #include <linux/types.h> |
@@ -27,20 +29,31 @@ | |||
27 | #include <asm/reboot.h> | 29 | #include <asm/reboot.h> |
28 | #include <asm/system.h> | 30 | #include <asm/system.h> |
29 | 31 | ||
30 | #define PMUCNT2REG KSEG1ADDR(0x0f0000c6) | 32 | #define PMU_TYPE1_BASE 0x0b0000a0UL |
33 | #define PMU_TYPE1_SIZE 0x0eUL | ||
34 | |||
35 | #define PMU_TYPE2_BASE 0x0f0000c0UL | ||
36 | #define PMU_TYPE2_SIZE 0x10UL | ||
37 | |||
38 | #define PMUCNT2REG 0x06 | ||
31 | #define SOFTRST 0x0010 | 39 | #define SOFTRST 0x0010 |
32 | 40 | ||
41 | static void __iomem *pmu_base; | ||
42 | |||
43 | #define pmu_read(offset) readw(pmu_base + (offset)) | ||
44 | #define pmu_write(offset, value) writew((value), pmu_base + (offset)) | ||
45 | |||
33 | static inline void software_reset(void) | 46 | static inline void software_reset(void) |
34 | { | 47 | { |
35 | uint16_t val; | 48 | uint16_t pmucnt2; |
36 | 49 | ||
37 | switch (current_cpu_data.cputype) { | 50 | switch (current_cpu_data.cputype) { |
38 | case CPU_VR4122: | 51 | case CPU_VR4122: |
39 | case CPU_VR4131: | 52 | case CPU_VR4131: |
40 | case CPU_VR4133: | 53 | case CPU_VR4133: |
41 | val = readw(PMUCNT2REG); | 54 | pmucnt2 = pmu_read(PMUCNT2REG); |
42 | val |= SOFTRST; | 55 | pmucnt2 |= SOFTRST; |
43 | writew(val, PMUCNT2REG); | 56 | pmu_write(PMUCNT2REG, pmucnt2); |
44 | break; | 57 | break; |
45 | default: | 58 | default: |
46 | break; | 59 | break; |
@@ -71,6 +84,34 @@ static void vr41xx_power_off(void) | |||
71 | 84 | ||
72 | static int __init vr41xx_pmu_init(void) | 85 | static int __init vr41xx_pmu_init(void) |
73 | { | 86 | { |
87 | unsigned long start, size; | ||
88 | |||
89 | switch (current_cpu_data.cputype) { | ||
90 | case CPU_VR4111: | ||
91 | case CPU_VR4121: | ||
92 | start = PMU_TYPE1_BASE; | ||
93 | size = PMU_TYPE1_SIZE; | ||
94 | break; | ||
95 | case CPU_VR4122: | ||
96 | case CPU_VR4131: | ||
97 | case CPU_VR4133: | ||
98 | start = PMU_TYPE2_BASE; | ||
99 | size = PMU_TYPE2_SIZE; | ||
100 | break; | ||
101 | default: | ||
102 | printk("Unexpected CPU of NEC VR4100 series\n"); | ||
103 | return -ENODEV; | ||
104 | } | ||
105 | |||
106 | if (request_mem_region(start, size, "PMU") == NULL) | ||
107 | return -EBUSY; | ||
108 | |||
109 | pmu_base = ioremap(start, size); | ||
110 | if (pmu_base == NULL) { | ||
111 | release_mem_region(start, size); | ||
112 | return -EBUSY; | ||
113 | } | ||
114 | |||
74 | _machine_restart = vr41xx_restart; | 115 | _machine_restart = vr41xx_restart; |
75 | _machine_halt = vr41xx_halt; | 116 | _machine_halt = vr41xx_halt; |
76 | _machine_power_off = vr41xx_power_off; | 117 | _machine_power_off = vr41xx_power_off; |
@@ -78,4 +119,4 @@ static int __init vr41xx_pmu_init(void) | |||
78 | return 0; | 119 | return 0; |
79 | } | 120 | } |
80 | 121 | ||
81 | early_initcall(vr41xx_pmu_init); | 122 | core_initcall(vr41xx_pmu_init); |