[AVR32] GPIO API implementation

Arch-neutral GPIO calls for AVR32. GPIO IRQ support written by
David Brownell.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>

8 files changed, 278 insertions, 21 deletions

diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
index f62eb6915510..b21bea9af8b1 100644
--- a/arch/avr32/mach-at32ap/Makefile
+++ b/arch/avr32/mach-at32ap/Makefile
@@ -1,2 +1,2 @@
-obj-y                           += at32ap.o clock.o pio.o intc.o extint.o hsmc.o
+obj-y                           += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
 obj-$(CONFIG_CPU_AT32AP7000)    += at32ap7000.o
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index 175853a3c32b..21561ab60471 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -498,7 +498,7 @@ DEV_CLK(mck, pio3, pba, 13);
 
 void __init at32_add_system_devices(void)
 {
-        system_manager.eim_first_irq = NR_INTERNAL_IRQS;
+        system_manager.eim_first_irq = EIM_IRQ_BASE;
 
         platform_device_register(&at32_sm_device);
         platform_device_register(&at32_intc0_device);
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index f1280ed8ed6d..17e835de95cb 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -12,7 +12,9 @@
 #include <linux/debugfs.h>
 #include <linux/fs.h>
 #include <linux/platform_device.h>
+#include <linux/irq.h>
 
+#include <asm/gpio.h>
 #include <asm/io.h>
 
 #include <asm/arch/portmux.h>
@@ -26,7 +28,8 @@ struct pio_device {
         const struct platform_device *pdev;
         struct clk *clk;
         u32 pinmux_mask;
-        char name[32];
+        u32 gpio_mask;
+        char name[8];
 };
 
 static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
@@ -76,6 +79,9 @@ void __init at32_select_periph(unsigned int pin, unsigned int periph,
         if (!(flags & AT32_GPIOF_PULLUP))
                 pio_writel(pio, PUDR, mask);
 
+        /* gpio_request NOT allowed */
+        set_bit(pin_index, &pio->gpio_mask);
+
         return;
 
 fail:
@@ -99,19 +105,29 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
                 goto fail;
         }
 
-        pio_writel(pio, PUER, mask);
-        if (flags & AT32_GPIOF_HIGH)
-                pio_writel(pio, SODR, mask);
-        else
-                pio_writel(pio, CODR, mask);
-        if (flags & AT32_GPIOF_OUTPUT)
+        if (flags & AT32_GPIOF_OUTPUT) {
+                if (flags & AT32_GPIOF_HIGH)
+                        pio_writel(pio, SODR, mask);
+                else
+                        pio_writel(pio, CODR, mask);
+                pio_writel(pio, PUDR, mask);
                 pio_writel(pio, OER, mask);
-        else
+        } else {
+                if (flags & AT32_GPIOF_PULLUP)
+                        pio_writel(pio, PUER, mask);
+                else
+                        pio_writel(pio, PUDR, mask);
+                if (flags & AT32_GPIOF_DEGLITCH)
+                        pio_writel(pio, IFER, mask);
+                else
+                        pio_writel(pio, IFDR, mask);
                 pio_writel(pio, ODR, mask);
+        }
 
         pio_writel(pio, PER, mask);
-        if (!(flags & AT32_GPIOF_PULLUP))
-                pio_writel(pio, PUDR, mask);
+
+        /* gpio_request now allowed */
+        clear_bit(pin_index, &pio->gpio_mask);
 
         return;
 
@@ -119,20 +135,199 @@ fail:
         dump_stack();
 }
 
+/*--------------------------------------------------------------------------*/
+
+/*--------------------------------------------------------------------------*/
+
+/* GPIO API */
+
+int gpio_request(unsigned int gpio, const char *label)
+{
+        struct pio_device *pio;
+        unsigned int pin;
+
+        pio = gpio_to_pio(gpio);
+        if (!pio)
+                return -ENODEV;
+
+        pin = gpio & 0x1f;
+        if (test_and_set_bit(pin, &pio->gpio_mask))
+                return -EBUSY;
+
+        return 0;
+}
+EXPORT_SYMBOL(gpio_request);
+
+void gpio_free(unsigned int gpio)
+{
+        struct pio_device *pio;
+        unsigned int pin;
+
+        pio = gpio_to_pio(gpio);
+        if (!pio) {
+                printk(KERN_ERR
+                       "gpio: attempted to free invalid pin %u\n", gpio);
+                return;
+        }
+
+        pin = gpio & 0x1f;
+        if (!test_and_clear_bit(pin, &pio->gpio_mask))
+                printk(KERN_ERR "gpio: freeing free or non-gpio pin %s-%u\n",
+                       pio->name, pin);
+}
+EXPORT_SYMBOL(gpio_free);
+
+int gpio_direction_input(unsigned int gpio)
+{
+        struct pio_device *pio;
+        unsigned int pin;
+
+        pio = gpio_to_pio(gpio);
+        if (!pio)
+                return -ENODEV;
+
+        pin = gpio & 0x1f;
+        pio_writel(pio, ODR, 1 << pin);
+
+        return 0;
+}
+EXPORT_SYMBOL(gpio_direction_input);
+
+int gpio_direction_output(unsigned int gpio)
+{
+        struct pio_device *pio;
+        unsigned int pin;
+
+        pio = gpio_to_pio(gpio);
+        if (!pio)
+                return -ENODEV;
+
+        pin = gpio & 0x1f;
+        pio_writel(pio, OER, 1 << pin);
+
+        return 0;
+}
+EXPORT_SYMBOL(gpio_direction_output);
+
+int gpio_get_value(unsigned int gpio)
+{
+        struct pio_device *pio = &pio_dev[gpio >> 5];
+
+        return (pio_readl(pio, PDSR) >> (gpio & 0x1f)) & 1;
+}
+EXPORT_SYMBOL(gpio_get_value);
+
+void gpio_set_value(unsigned int gpio, int value)
+{
+        struct pio_device *pio = &pio_dev[gpio >> 5];
+        u32 mask;
+
+        mask = 1 << (gpio & 0x1f);
+        if (value)
+                pio_writel(pio, SODR, mask);
+        else
+                pio_writel(pio, CODR, mask);
+}
+EXPORT_SYMBOL(gpio_set_value);
+
+/*--------------------------------------------------------------------------*/
+
+/* GPIO IRQ support */
+
+static void gpio_irq_mask(unsigned irq)
+{
+        unsigned                gpio = irq_to_gpio(irq);
+        struct pio_device       *pio = &pio_dev[gpio >> 5];
+
+        pio_writel(pio, IDR, 1 << (gpio & 0x1f));
+}
+
+static void gpio_irq_unmask(unsigned irq)
+{
+        unsigned                gpio = irq_to_gpio(irq);
+        struct pio_device       *pio = &pio_dev[gpio >> 5];
+
+        pio_writel(pio, IER, 1 << (gpio & 0x1f));
+}
+
+static int gpio_irq_type(unsigned irq, unsigned type)
+{
+        if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
+                return -EINVAL;
+
+        return 0;
+}
+
+static struct irq_chip gpio_irqchip = {
+        .name           = "gpio",
+        .mask           = gpio_irq_mask,
+        .unmask         = gpio_irq_unmask,
+        .set_type       = gpio_irq_type,
+};
+
+static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
+{
+        struct pio_device       *pio = get_irq_chip_data(irq);
+        unsigned                gpio_irq;
+
+        gpio_irq = (unsigned) get_irq_data(irq);
+        for (;;) {
+                u32             isr;
+                struct irq_desc *d;
+
+                /* ack pending GPIO interrupts */
+                isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
+                if (!isr)
+                        break;
+                do {
+                        int i;
+
+                        i = ffs(isr) - 1;
+                        isr &= ~(1 << i);
+
+                        i += gpio_irq;
+                        d = &irq_desc[i];
+
+                        d->handle_irq(i, d);
+                } while (isr);
+        }
+}
+
+static void __init
+gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
+{
+        unsigned        i;
+
+        set_irq_chip_data(irq, pio);
+        set_irq_data(irq, (void *) gpio_irq);
+
+        for (i = 0; i < 32; i++, gpio_irq++) {
+                set_irq_chip_data(gpio_irq, pio);
+                set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
+                                handle_simple_irq);
+        }
+
+        set_irq_chained_handler(irq, gpio_irq_handler);
+}
+
+/*--------------------------------------------------------------------------*/
+
 static int __init pio_probe(struct platform_device *pdev)
 {
         struct pio_device *pio = NULL;
+        int irq = platform_get_irq(pdev, 0);
+        int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
 
         BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
         pio = &pio_dev[pdev->id];
         BUG_ON(!pio->regs);
 
-        /* TODO: Interrupts */
+        gpio_irq_setup(pio, irq, gpio_irq_base);
 
         platform_set_drvdata(pdev, pio);
 
-        printk(KERN_INFO "%s: Atmel Port Multiplexer at 0x%p (irq %d)\n",
-               pio->name, pio->regs, platform_get_irq(pdev, 0));
+        printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
+               pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
 
         return 0;
 }
@@ -148,7 +343,7 @@ static int __init pio_init(void)
 {
         return platform_driver_register(&pio_driver);
 }
-subsys_initcall(pio_init);
+postcore_initcall(pio_init);
 
 void __init at32_init_pio(struct platform_device *pdev)
 {
@@ -184,6 +379,16 @@ void __init at32_init_pio(struct platform_device *pdev)
         pio->pdev = pdev;
         pio->regs = ioremap(regs->start, regs->end - regs->start + 1);
 
+        /*
+         * request_gpio() is only valid for pins that have been
+         * explicitly configured as GPIO and not previously requested
+         */
+        pio->gpio_mask = ~0UL;
+
         pio_writel(pio, ODR, ~0UL);
         pio_writel(pio, PER, ~0UL);
+
+        /* start with irqs disabled and acked */
+        pio_writel(pio, IDR, ~0UL);
+        (void) pio_readl(pio, ISR);
 }
diff --git a/include/asm-avr32/arch-at32ap/gpio.h b/include/asm-avr32/arch-at32ap/gpio.h
new file mode 100644
index 000000000000..fcb756bdaa8e
--- /dev/null
+++ b/include/asm-avr32/arch-at32ap/gpio.h
@@ -0,0 +1,27 @@
+#ifndef __ASM_AVR32_ARCH_GPIO_H
+#define __ASM_AVR32_ARCH_GPIO_H
+
+#include <linux/compiler.h>
+#include <asm/irq.h>
+
+
+/* Arch-neutral GPIO API */
+int __must_check gpio_request(unsigned int gpio, const char *label);
+void gpio_free(unsigned int gpio);
+
+int gpio_direction_input(unsigned int gpio);
+int gpio_direction_output(unsigned int gpio);
+int gpio_get_value(unsigned int gpio);
+void gpio_set_value(unsigned int gpio, int value);
+
+static inline int gpio_to_irq(unsigned int gpio)
+{
+        return gpio + GPIO_IRQ_BASE;
+}
+
+static inline int irq_to_gpio(unsigned int irq)
+{
+        return irq - GPIO_IRQ_BASE;
+}
+
+#endif /* __ASM_AVR32_ARCH_GPIO_H */
diff --git a/include/asm-avr32/arch-at32ap/irq.h b/include/asm-avr32/arch-at32ap/irq.h
new file mode 100644
index 000000000000..f8f7f4571e44
--- /dev/null
+++ b/include/asm-avr32/arch-at32ap/irq.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_AVR32_ARCH_IRQ_H
+#define __ASM_AVR32_ARCH_IRQ_H
+
+#define EIM_IRQ_BASE    NR_INTERNAL_IRQS
+#define NR_EIM_IRQS     32
+
+#define AT32_EXTINT(n)  (EIM_IRQ_BASE + (n))
+
+#define GPIO_IRQ_BASE   (EIM_IRQ_BASE + NR_EIM_IRQS)
+#define NR_GPIO_IRQS    (4 * 32)
+
+#define NR_IRQS         (GPIO_IRQ_BASE + NR_GPIO_IRQS)
+
+#endif /* __ASM_AVR32_ARCH_IRQ_H */
diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
index 83c690571322..2ba611e0e134 100644
--- a/include/asm-avr32/arch-at32ap/portmux.h
+++ b/include/asm-avr32/arch-at32ap/portmux.h
@@ -15,9 +15,10 @@
  *
  * The following flags determine the initial state of the pin.
  */
-#define AT32_GPIOF_PULLUP       0x00000001      /* Enable pull-up */
-#define AT32_GPIOF_OUTPUT       0x00000002      /* Enable output driver */
-#define AT32_GPIOF_HIGH         0x00000004      /* Set output high */
+#define AT32_GPIOF_PULLUP       0x00000001      /* (not-OUT) Enable pull-up */
+#define AT32_GPIOF_OUTPUT       0x00000002      /* (OUT) Enable output driver */
+#define AT32_GPIOF_HIGH         0x00000004      /* (OUT) Set output high */
+#define AT32_GPIOF_DEGLITCH     0x00000008      /* (IN) Filter glitches */
 
 void at32_select_periph(unsigned int pin, unsigned int periph,
                         unsigned long flags);
diff --git a/include/asm-avr32/gpio.h b/include/asm-avr32/gpio.h
new file mode 100644
index 000000000000..19e8ccc77db3
--- /dev/null
+++ b/include/asm-avr32/gpio.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_GPIO_H
+#define __ASM_AVR32_GPIO_H
+
+#include <asm/arch/gpio.h>
+
+#endif /* __ASM_AVR32_GPIO_H */
diff --git a/include/asm-avr32/irq.h b/include/asm-avr32/irq.h
index f7e725707dd7..83e6549d7783 100644
--- a/include/asm-avr32/irq.h
+++ b/include/asm-avr32/irq.h
@@ -2,8 +2,12 @@
 #define __ASM_AVR32_IRQ_H
 
 #define NR_INTERNAL_IRQS        64
-#define NR_EXTERNAL_IRQS        64
-#define NR_IRQS                 (NR_INTERNAL_IRQS + NR_EXTERNAL_IRQS)
+
+#include <asm/arch/irq.h>
+
+#ifndef NR_IRQS
+#define NR_IRQS                 (NR_INTERNAL_IRQS)
+#endif
 
 #define irq_canonicalize(i)     (i)