Add/Fix missing bit of R4600 hit cacheop workaround.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2 files changed, 2 insertions, 1 deletions

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 586baf29fe88..aa87ae552170 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -481,6 +481,7 @@ static inline void local_r4k_flush_icache_range(void *args)
                 if (end - start > dcache_size) {
                         r4k_blast_dcache();
                 } else {
+                        R4600_HIT_CACHEOP_WAR_IMPL;
                         addr = start & ~(dc_lsize - 1);
                         aend = (end - 1) & ~(dc_lsize - 1);
 
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index c9e6ee2a8a23..f51e180072e3 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -209,7 +209,7 @@ static inline void build_cdex_p(void)
         }
 
         if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
-                build_insn_word(0x8c200000);    /* lw      $zero, ($at) */
+                build_insn_word(0x3c01a000);    /* lui     $at, 0xa000  */
 
         mi.c_format.opcode     = cache_op;
         mi.c_format.rs         = 4;             /* $a0 */