diff options
author | Tony Lindgren <tony@atomide.com> | 2010-07-05 09:31:28 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-07-05 09:31:28 -0400 |
commit | dba638d22d5af5486a861e08ab46e57abef7049a (patch) | |
tree | 58866d6b2f93fc52c15e63ccdf5b8eb264061583 | |
parent | f40fd0e215b1bde4e43add1aacbe6faf6dbbea53 (diff) |
omap: Separate out omap2 FS USB platform init functions
We want to split old FS USB platform init code and stop doing pin multiplexing
under plat-omap. First move 24xx specific init code into omap2_usb[012]_init
functions.
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/plat-omap/usb.c | 252 |
1 files changed, 157 insertions, 95 deletions
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index d3bf17cd36f3..9c4929a33e52 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c | |||
@@ -115,15 +115,56 @@ static void omap2_usb2_enable_5pinunitll(void) | |||
115 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | 115 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); |
116 | } | 116 | } |
117 | 117 | ||
118 | static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device) | ||
119 | { | ||
120 | u32 syscon1 = 0; | ||
121 | |||
122 | omap2_usb_devconf_clear(0, USB_BIDIR_TLL); | ||
123 | |||
124 | if (nwires == 0) | ||
125 | return 0; | ||
126 | |||
127 | if (is_device) | ||
128 | omap_cfg_reg(J20_24XX_USB0_PUEN); | ||
129 | |||
130 | omap_cfg_reg(K18_24XX_USB0_DAT); | ||
131 | omap_cfg_reg(K19_24XX_USB0_TXEN); | ||
132 | omap_cfg_reg(J14_24XX_USB0_SE0); | ||
133 | if (nwires != 3) | ||
134 | omap_cfg_reg(J18_24XX_USB0_RCV); | ||
135 | |||
136 | switch (nwires) { | ||
137 | case 3: | ||
138 | syscon1 = 2; | ||
139 | omap2_usb_devconf_set(0, USB_BIDIR); | ||
140 | break; | ||
141 | case 4: | ||
142 | syscon1 = 1; | ||
143 | omap2_usb_devconf_set(0, USB_BIDIR); | ||
144 | break; | ||
145 | case 6: | ||
146 | syscon1 = 3; | ||
147 | omap_cfg_reg(J19_24XX_USB0_VP); | ||
148 | omap_cfg_reg(K20_24XX_USB0_VM); | ||
149 | omap2_usb_devconf_set(0, USB_UNIDIR); | ||
150 | break; | ||
151 | default: | ||
152 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
153 | 0, nwires); | ||
154 | } | ||
155 | |||
156 | return syscon1 << 16; | ||
157 | } | ||
158 | |||
118 | static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | 159 | static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) |
119 | { | 160 | { |
120 | u32 syscon1 = 0; | 161 | u32 syscon1 = 0; |
121 | 162 | ||
122 | if (cpu_is_omap24xx()) | 163 | if (cpu_is_omap24xx()) |
123 | omap2_usb_devconf_clear(0, USB_BIDIR_TLL); | 164 | return omap2_usb0_init(nwires, is_device); |
124 | 165 | ||
125 | if (nwires == 0) { | 166 | if (nwires == 0) { |
126 | if (cpu_class_is_omap1() && !cpu_is_omap15xx()) { | 167 | if (!cpu_is_omap15xx()) { |
127 | u32 l; | 168 | u32 l; |
128 | 169 | ||
129 | /* pulldown D+/D- */ | 170 | /* pulldown D+/D- */ |
@@ -135,9 +176,7 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | |||
135 | } | 176 | } |
136 | 177 | ||
137 | if (is_device) { | 178 | if (is_device) { |
138 | if (cpu_is_omap24xx()) | 179 | if (cpu_is_omap7xx()) { |
139 | omap_cfg_reg(J20_24XX_USB0_PUEN); | ||
140 | else if (cpu_is_omap7xx()) { | ||
141 | omap_cfg_reg(AA17_7XX_USB_DM); | 180 | omap_cfg_reg(AA17_7XX_USB_DM); |
142 | omap_cfg_reg(W16_7XX_USB_PU_EN); | 181 | omap_cfg_reg(W16_7XX_USB_PU_EN); |
143 | omap_cfg_reg(W17_7XX_USB_VBUSI); | 182 | omap_cfg_reg(W17_7XX_USB_VBUSI); |
@@ -147,8 +186,7 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | |||
147 | omap_cfg_reg(W4_USB_PUEN); | 186 | omap_cfg_reg(W4_USB_PUEN); |
148 | } | 187 | } |
149 | 188 | ||
150 | /* internal transceiver (unavailable on 17xx, 24xx) */ | 189 | if (nwires == 2) { |
151 | if (!cpu_class_is_omap2() && nwires == 2) { | ||
152 | u32 l; | 190 | u32 l; |
153 | 191 | ||
154 | // omap_cfg_reg(P9_USB_DP); | 192 | // omap_cfg_reg(P9_USB_DP); |
@@ -183,26 +221,18 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | |||
183 | return 0; | 221 | return 0; |
184 | } | 222 | } |
185 | 223 | ||
186 | if (cpu_is_omap24xx()) { | 224 | omap_cfg_reg(V6_USB0_TXD); |
187 | omap_cfg_reg(K18_24XX_USB0_DAT); | 225 | omap_cfg_reg(W9_USB0_TXEN); |
188 | omap_cfg_reg(K19_24XX_USB0_TXEN); | 226 | omap_cfg_reg(W5_USB0_SE0); |
189 | omap_cfg_reg(J14_24XX_USB0_SE0); | 227 | if (nwires != 3) |
190 | if (nwires != 3) | 228 | omap_cfg_reg(Y5_USB0_RCV); |
191 | omap_cfg_reg(J18_24XX_USB0_RCV); | ||
192 | } else { | ||
193 | omap_cfg_reg(V6_USB0_TXD); | ||
194 | omap_cfg_reg(W9_USB0_TXEN); | ||
195 | omap_cfg_reg(W5_USB0_SE0); | ||
196 | if (nwires != 3) | ||
197 | omap_cfg_reg(Y5_USB0_RCV); | ||
198 | } | ||
199 | 229 | ||
200 | /* NOTE: SPEED and SUSP aren't configured here. OTG hosts | 230 | /* NOTE: SPEED and SUSP aren't configured here. OTG hosts |
201 | * may be able to use I2C requests to set those bits along | 231 | * may be able to use I2C requests to set those bits along |
202 | * with VBUS switching and overcurrent detection. | 232 | * with VBUS switching and overcurrent detection. |
203 | */ | 233 | */ |
204 | 234 | ||
205 | if (cpu_class_is_omap1() && nwires != 6) { | 235 | if (nwires != 6) { |
206 | u32 l; | 236 | u32 l; |
207 | 237 | ||
208 | l = omap_readl(USB_TRANSCEIVER_CTRL); | 238 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
@@ -213,21 +243,13 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | |||
213 | switch (nwires) { | 243 | switch (nwires) { |
214 | case 3: | 244 | case 3: |
215 | syscon1 = 2; | 245 | syscon1 = 2; |
216 | if (cpu_is_omap24xx()) | ||
217 | omap2_usb_devconf_set(0, USB_BIDIR); | ||
218 | break; | 246 | break; |
219 | case 4: | 247 | case 4: |
220 | syscon1 = 1; | 248 | syscon1 = 1; |
221 | if (cpu_is_omap24xx()) | ||
222 | omap2_usb_devconf_set(0, USB_BIDIR); | ||
223 | break; | 249 | break; |
224 | case 6: | 250 | case 6: |
225 | syscon1 = 3; | 251 | syscon1 = 3; |
226 | if (cpu_is_omap24xx()) { | 252 | { |
227 | omap_cfg_reg(J19_24XX_USB0_VP); | ||
228 | omap_cfg_reg(K20_24XX_USB0_VM); | ||
229 | omap2_usb_devconf_set(0, USB_UNIDIR); | ||
230 | } else { | ||
231 | u32 l; | 253 | u32 l; |
232 | 254 | ||
233 | omap_cfg_reg(AA9_USB0_VP); | 255 | omap_cfg_reg(AA9_USB0_VP); |
@@ -244,30 +266,66 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | |||
244 | return syscon1 << 16; | 266 | return syscon1 << 16; |
245 | } | 267 | } |
246 | 268 | ||
269 | static u32 __init omap2_usb1_init(unsigned nwires) | ||
270 | { | ||
271 | u32 syscon1 = 0; | ||
272 | |||
273 | omap2_usb_devconf_clear(1, USB_BIDIR_TLL); | ||
274 | |||
275 | if (nwires == 0) | ||
276 | return 0; | ||
277 | |||
278 | /* NOTE: board-specific code must set up pin muxing for usb1, | ||
279 | * since each signal could come out on either of two balls. | ||
280 | */ | ||
281 | |||
282 | switch (nwires) { | ||
283 | case 2: | ||
284 | /* NOTE: board-specific code must override this setting if | ||
285 | * this TLL link is not using DP/DM | ||
286 | */ | ||
287 | syscon1 = 1; | ||
288 | omap2_usb_devconf_set(1, USB_BIDIR_TLL); | ||
289 | break; | ||
290 | case 3: | ||
291 | syscon1 = 2; | ||
292 | omap2_usb_devconf_set(1, USB_BIDIR); | ||
293 | break; | ||
294 | case 4: | ||
295 | syscon1 = 1; | ||
296 | omap2_usb_devconf_set(1, USB_BIDIR); | ||
297 | break; | ||
298 | case 6: | ||
299 | default: | ||
300 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
301 | 1, nwires); | ||
302 | } | ||
303 | |||
304 | return syscon1 << 20; | ||
305 | } | ||
306 | |||
247 | static u32 __init omap_usb1_init(unsigned nwires) | 307 | static u32 __init omap_usb1_init(unsigned nwires) |
248 | { | 308 | { |
249 | u32 syscon1 = 0; | 309 | u32 syscon1 = 0; |
250 | 310 | ||
251 | if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) { | 311 | if (cpu_is_omap24xx()) |
312 | return omap2_usb1_init(nwires); | ||
313 | |||
314 | if (!cpu_is_omap15xx() && nwires != 6) { | ||
252 | u32 l; | 315 | u32 l; |
253 | 316 | ||
254 | l = omap_readl(USB_TRANSCEIVER_CTRL); | 317 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
255 | l &= ~CONF_USB1_UNI_R; | 318 | l &= ~CONF_USB1_UNI_R; |
256 | omap_writel(l, USB_TRANSCEIVER_CTRL); | 319 | omap_writel(l, USB_TRANSCEIVER_CTRL); |
257 | } | 320 | } |
258 | if (cpu_is_omap24xx()) | ||
259 | omap2_usb_devconf_clear(1, USB_BIDIR_TLL); | ||
260 | |||
261 | if (nwires == 0) | 321 | if (nwires == 0) |
262 | return 0; | 322 | return 0; |
263 | 323 | ||
264 | /* external transceiver */ | 324 | /* external transceiver */ |
265 | if (cpu_class_is_omap1()) { | 325 | omap_cfg_reg(USB1_TXD); |
266 | omap_cfg_reg(USB1_TXD); | 326 | omap_cfg_reg(USB1_TXEN); |
267 | omap_cfg_reg(USB1_TXEN); | 327 | if (nwires != 3) |
268 | if (nwires != 3) | 328 | omap_cfg_reg(USB1_RCV); |
269 | omap_cfg_reg(USB1_RCV); | ||
270 | } | ||
271 | 329 | ||
272 | if (cpu_is_omap15xx()) { | 330 | if (cpu_is_omap15xx()) { |
273 | omap_cfg_reg(USB1_SEO); | 331 | omap_cfg_reg(USB1_SEO); |
@@ -280,10 +338,6 @@ static u32 __init omap_usb1_init(unsigned nwires) | |||
280 | } else if (cpu_is_omap1710()) { | 338 | } else if (cpu_is_omap1710()) { |
281 | omap_cfg_reg(R13_1710_USB1_SE0); | 339 | omap_cfg_reg(R13_1710_USB1_SE0); |
282 | // SUSP | 340 | // SUSP |
283 | } else if (cpu_is_omap24xx()) { | ||
284 | /* NOTE: board-specific code must set up pin muxing for usb1, | ||
285 | * since each signal could come out on either of two balls. | ||
286 | */ | ||
287 | } else { | 341 | } else { |
288 | pr_debug("usb%d cpu unrecognized\n", 1); | 342 | pr_debug("usb%d cpu unrecognized\n", 1); |
289 | return 0; | 343 | return 0; |
@@ -291,27 +345,14 @@ static u32 __init omap_usb1_init(unsigned nwires) | |||
291 | 345 | ||
292 | switch (nwires) { | 346 | switch (nwires) { |
293 | case 2: | 347 | case 2: |
294 | if (!cpu_is_omap24xx()) | 348 | goto bad; |
295 | goto bad; | ||
296 | /* NOTE: board-specific code must override this setting if | ||
297 | * this TLL link is not using DP/DM | ||
298 | */ | ||
299 | syscon1 = 1; | ||
300 | omap2_usb_devconf_set(1, USB_BIDIR_TLL); | ||
301 | break; | ||
302 | case 3: | 349 | case 3: |
303 | syscon1 = 2; | 350 | syscon1 = 2; |
304 | if (cpu_is_omap24xx()) | ||
305 | omap2_usb_devconf_set(1, USB_BIDIR); | ||
306 | break; | 351 | break; |
307 | case 4: | 352 | case 4: |
308 | syscon1 = 1; | 353 | syscon1 = 1; |
309 | if (cpu_is_omap24xx()) | ||
310 | omap2_usb_devconf_set(1, USB_BIDIR); | ||
311 | break; | 354 | break; |
312 | case 6: | 355 | case 6: |
313 | if (cpu_is_omap24xx()) | ||
314 | goto bad; | ||
315 | syscon1 = 3; | 356 | syscon1 = 3; |
316 | omap_cfg_reg(USB1_VP); | 357 | omap_cfg_reg(USB1_VP); |
317 | omap_cfg_reg(USB1_VM); | 358 | omap_cfg_reg(USB1_VM); |
@@ -331,20 +372,70 @@ bad: | |||
331 | return syscon1 << 20; | 372 | return syscon1 << 20; |
332 | } | 373 | } |
333 | 374 | ||
334 | static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup) | 375 | static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup) |
335 | { | 376 | { |
336 | u32 syscon1 = 0; | 377 | u32 syscon1 = 0; |
337 | 378 | ||
338 | if (cpu_is_omap24xx()) { | 379 | omap2_usb2_disable_5pinbitll(); |
339 | omap2_usb2_disable_5pinbitll(); | 380 | alt_pingroup = 0; |
340 | alt_pingroup = 0; | 381 | |
382 | /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ | ||
383 | if (alt_pingroup || nwires == 0) | ||
384 | return 0; | ||
385 | |||
386 | omap_cfg_reg(Y11_24XX_USB2_DAT); | ||
387 | omap_cfg_reg(AA10_24XX_USB2_SE0); | ||
388 | if (nwires > 2) | ||
389 | omap_cfg_reg(AA12_24XX_USB2_TXEN); | ||
390 | if (nwires > 3) | ||
391 | omap_cfg_reg(AA6_24XX_USB2_RCV); | ||
392 | |||
393 | switch (nwires) { | ||
394 | case 2: | ||
395 | /* NOTE: board-specific code must override this setting if | ||
396 | * this TLL link is not using DP/DM | ||
397 | */ | ||
398 | syscon1 = 1; | ||
399 | omap2_usb_devconf_set(2, USB_BIDIR_TLL); | ||
400 | break; | ||
401 | case 3: | ||
402 | syscon1 = 2; | ||
403 | omap2_usb_devconf_set(2, USB_BIDIR); | ||
404 | break; | ||
405 | case 4: | ||
406 | syscon1 = 1; | ||
407 | omap2_usb_devconf_set(2, USB_BIDIR); | ||
408 | break; | ||
409 | case 5: | ||
410 | omap_cfg_reg(AA4_24XX_USB2_TLLSE0); | ||
411 | /* NOTE: board-specific code must override this setting if | ||
412 | * this TLL link is not using DP/DM. Something must also | ||
413 | * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} | ||
414 | */ | ||
415 | syscon1 = 3; | ||
416 | omap2_usb2_enable_5pinunitll(); | ||
417 | break; | ||
418 | case 6: | ||
419 | default: | ||
420 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
421 | 2, nwires); | ||
341 | } | 422 | } |
342 | 423 | ||
424 | return syscon1 << 24; | ||
425 | } | ||
426 | |||
427 | static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup) | ||
428 | { | ||
429 | u32 syscon1 = 0; | ||
430 | |||
431 | if (cpu_is_omap24xx()) | ||
432 | return omap2_usb2_init(nwires, alt_pingroup); | ||
433 | |||
343 | /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ | 434 | /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ |
344 | if (alt_pingroup || nwires == 0) | 435 | if (alt_pingroup || nwires == 0) |
345 | return 0; | 436 | return 0; |
346 | 437 | ||
347 | if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) { | 438 | if (!cpu_is_omap15xx() && nwires != 6) { |
348 | u32 l; | 439 | u32 l; |
349 | 440 | ||
350 | l = omap_readl(USB_TRANSCEIVER_CTRL); | 441 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
@@ -367,53 +458,24 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup) | |||
367 | if (nwires != 3) | 458 | if (nwires != 3) |
368 | omap_cfg_reg(Y5_USB2_RCV); | 459 | omap_cfg_reg(Y5_USB2_RCV); |
369 | // FIXME omap_cfg_reg(USB2_SPEED); | 460 | // FIXME omap_cfg_reg(USB2_SPEED); |
370 | } else if (cpu_is_omap24xx()) { | ||
371 | omap_cfg_reg(Y11_24XX_USB2_DAT); | ||
372 | omap_cfg_reg(AA10_24XX_USB2_SE0); | ||
373 | if (nwires > 2) | ||
374 | omap_cfg_reg(AA12_24XX_USB2_TXEN); | ||
375 | if (nwires > 3) | ||
376 | omap_cfg_reg(AA6_24XX_USB2_RCV); | ||
377 | } else { | 461 | } else { |
378 | pr_debug("usb%d cpu unrecognized\n", 1); | 462 | pr_debug("usb%d cpu unrecognized\n", 1); |
379 | return 0; | 463 | return 0; |
380 | } | 464 | } |
381 | // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP); | 465 | // omap_cfg_reg(USB2_SUSP); |
382 | 466 | ||
383 | switch (nwires) { | 467 | switch (nwires) { |
384 | case 2: | 468 | case 2: |
385 | if (!cpu_is_omap24xx()) | 469 | goto bad; |
386 | goto bad; | ||
387 | /* NOTE: board-specific code must override this setting if | ||
388 | * this TLL link is not using DP/DM | ||
389 | */ | ||
390 | syscon1 = 1; | ||
391 | omap2_usb_devconf_set(2, USB_BIDIR_TLL); | ||
392 | break; | ||
393 | case 3: | 470 | case 3: |
394 | syscon1 = 2; | 471 | syscon1 = 2; |
395 | if (cpu_is_omap24xx()) | ||
396 | omap2_usb_devconf_set(2, USB_BIDIR); | ||
397 | break; | 472 | break; |
398 | case 4: | 473 | case 4: |
399 | syscon1 = 1; | 474 | syscon1 = 1; |
400 | if (cpu_is_omap24xx()) | ||
401 | omap2_usb_devconf_set(2, USB_BIDIR); | ||
402 | break; | 475 | break; |
403 | case 5: | 476 | case 5: |
404 | if (!cpu_is_omap24xx()) | 477 | goto bad; |
405 | goto bad; | ||
406 | omap_cfg_reg(AA4_24XX_USB2_TLLSE0); | ||
407 | /* NOTE: board-specific code must override this setting if | ||
408 | * this TLL link is not using DP/DM. Something must also | ||
409 | * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} | ||
410 | */ | ||
411 | syscon1 = 3; | ||
412 | omap2_usb2_enable_5pinunitll(); | ||
413 | break; | ||
414 | case 6: | 478 | case 6: |
415 | if (cpu_is_omap24xx()) | ||
416 | goto bad; | ||
417 | syscon1 = 3; | 479 | syscon1 = 3; |
418 | if (cpu_is_omap15xx()) { | 480 | if (cpu_is_omap15xx()) { |
419 | omap_cfg_reg(USB2_VP); | 481 | omap_cfg_reg(USB2_VP); |