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authorTony Lindgren <tony@atomide.com>2010-12-22 14:30:12 -0500
committerTony Lindgren <tony@atomide.com>2010-12-22 14:30:12 -0500
commitc10abbb26513f4ccff89c4d80912cb4d36fcd3e8 (patch)
treeb2a44e08e9e683078e9d20d6072a513798788314
parent4931445b94f49672028b81ace9d4eee8ddf19ab2 (diff)
parentda1f026b532ce944d74461497dc6d8c16456466e (diff)
Merge branches 'devel-gpmc' and 'devel-misc' into omap-for-linus
-rw-r--r--Documentation/arm/OMAP/omap_pm25
-rw-r--r--Documentation/kernel-parameters.txt5
-rw-r--r--Documentation/power/runtime_pm.txt4
-rw-r--r--Makefile2
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c98
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c82
-rw-r--r--arch/arm/mach-at91/clock.c2
-rw-r--r--arch/arm/mach-at91/include/mach/stamp9g20.h7
-rw-r--r--arch/arm/mach-omap1/Makefile2
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c128
-rw-r--r--arch/arm/mach-omap1/board-fsample.c67
-rw-r--r--arch/arm/mach-omap1/board-h2.c75
-rw-r--r--arch/arm/mach-omap1/board-h3.c75
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c98
-rw-r--r--arch/arm/mach-omap1/board-innovator.c21
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c29
-rw-r--r--arch/arm/mach-omap1/board-osk.c21
-rw-r--r--arch/arm/mach-omap1/board-palmte.c28
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c28
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c30
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c69
-rw-r--r--arch/arm/mach-omap1/board-sx1.c57
-rw-r--r--arch/arm/mach-omap1/dma.c390
-rw-r--r--arch/arm/mach-omap2/Kconfig4
-rw-r--r--arch/arm/mach-omap2/Makefile9
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c8
-rw-r--r--arch/arm/mach-omap2/board-h4.c63
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c1
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c22
-rw-r--r--arch/arm/mach-omap2/board-rx51-video.c20
-rw-r--r--arch/arm/mach-omap2/control.c22
-rw-r--r--arch/arm/mach-omap2/control.h11
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c36
-rw-r--r--arch/arm/mach-omap2/dma.c297
-rw-r--r--arch/arm/mach-omap2/io.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c86
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c86
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c97
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c102
-rw-r--r--arch/arm/mach-omap2/omap_opp_data.h72
-rw-r--r--arch/arm/mach-omap2/opp.c93
-rw-r--r--arch/arm/mach-omap2/opp3xxx_data.c107
-rw-r--r--arch/arm/mach-omap2/opp4xxx_data.c57
-rw-r--r--arch/arm/mach-omap2/pm.c2
-rw-r--r--arch/arm/mach-omap2/pm.h29
-rw-r--r--arch/arm/mach-omap2/pm24xx.c16
-rw-r--r--arch/arm/mach-omap2/pm34xx.c66
-rw-r--r--arch/arm/mach-omap2/pm44xx.c16
-rw-r--r--arch/arm/mach-omap2/sdrc.h1
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S832
-rw-r--r--arch/arm/mach-s3c2412/Kconfig7
-rw-r--r--arch/arm/mach-s3c2412/Makefile3
-rw-r--r--arch/arm/mach-s3c2416/Kconfig1
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c6
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c6
-rw-r--r--arch/arm/mach-shmobile/include/mach/entry-macro.S30
-rw-r--r--arch/arm/mach-shmobile/include/mach/vmalloc.h2
-rw-r--r--arch/arm/plat-omap/dma.c697
-rw-r--r--arch/arm/plat-omap/include/plat/dma.h232
-rw-r--r--arch/arm/plat-omap/include/plat/keypad.h35
-rw-r--r--arch/arm/plat-omap/include/plat/omap-pm.h31
-rw-r--r--arch/arm/plat-omap/include/plat/sram.h11
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h1
-rw-r--r--arch/arm/plat-omap/omap-pm-noop.c11
-rw-r--r--arch/arm/plat-omap/sram.c7
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig2
-rw-r--r--arch/mips/Kconfig38
-rw-r--r--arch/mips/alchemy/common/platform.c2
-rw-r--r--arch/mips/alchemy/devboards/prom.c5
-rw-r--r--arch/mips/ar7/clock.c9
-rw-r--r--arch/mips/ar7/time.c3
-rw-r--r--arch/mips/bcm47xx/setup.c153
-rw-r--r--arch/mips/include/asm/cpu.h4
-rw-r--r--arch/mips/include/asm/elf.h8
-rw-r--r--arch/mips/include/asm/io.h12
-rw-r--r--arch/mips/include/asm/mach-ar7/ar7.h3
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/nvram.h7
-rw-r--r--arch/mips/jz4740/board-qi_lb60.c4
-rw-r--r--arch/mips/jz4740/platform.c2
-rw-r--r--arch/mips/jz4740/prom.c2
-rw-r--r--arch/mips/kernel/cevt-r4k.c2
-rw-r--r--arch/mips/kernel/cpu-probe.c7
-rw-r--r--arch/mips/kernel/linux32.c13
-rw-r--r--arch/mips/kernel/process.c1
-rw-r--r--arch/mips/kernel/prom.c2
-rw-r--r--arch/mips/kernel/smp-mt.c2
-rw-r--r--arch/mips/kernel/traps.c44
-rw-r--r--arch/mips/kernel/vpe.c14
-rw-r--r--arch/mips/lib/memset.S4
-rw-r--r--arch/mips/loongson/common/env.c4
-rw-r--r--arch/mips/math-emu/cp1emu.c116
-rw-r--r--arch/mips/mm/dma-default.c4
-rw-r--r--arch/mips/mm/sc-mips.c4
-rw-r--r--arch/mips/pmc-sierra/yosemite/py-console.c12
-rw-r--r--arch/mips/sibyte/swarm/setup.c8
-rw-r--r--arch/mn10300/kernel/time.c10
-rw-r--r--arch/tile/include/asm/signal.h2
-rw-r--r--arch/tile/kernel/compat_signal.c6
-rw-r--r--arch/tile/kernel/intvec_32.S24
-rw-r--r--arch/tile/kernel/process.c8
-rw-r--r--arch/tile/kernel/signal.c10
-rw-r--r--arch/x86/boot/compressed/misc.c2
-rw-r--r--arch/x86/include/asm/e820.h3
-rw-r--r--arch/x86/include/asm/kvm_host.h2
-rw-r--r--arch/x86/kernel/Makefile1
-rw-r--r--arch/x86/kernel/apic/apic.c8
-rw-r--r--arch/x86/kernel/apic/io_apic.c4
-rw-r--r--arch/x86/kernel/apic/probe_64.c7
-rw-r--r--arch/x86/kernel/head_32.S16
-rw-r--r--arch/x86/kernel/hpet.c26
-rw-r--r--arch/x86/kernel/resource.c48
-rw-r--r--arch/x86/kernel/setup.c1
-rw-r--r--arch/x86/kernel/xsave.c3
-rw-r--r--arch/x86/kvm/svm.c4
-rw-r--r--arch/x86/kvm/vmx.c5
-rw-r--r--arch/x86/kvm/x86.c11
-rw-r--r--arch/x86/kvm/x86.h5
-rw-r--r--arch/x86/lguest/boot.c16
-rw-r--r--arch/x86/lguest/i386_head.S105
-rw-r--r--arch/x86/pci/i386.c18
-rw-r--r--arch/x86/vdso/Makefile4
-rw-r--r--block/blk-map.c5
-rw-r--r--block/blk-merge.c6
-rw-r--r--block/blk-settings.c51
-rw-r--r--block/blk-sysfs.c2
-rw-r--r--block/blk-throttle.c39
-rw-r--r--drivers/block/cciss.c2
-rw-r--r--drivers/block/drbd/drbd_receiver.c14
-rw-r--r--drivers/block/drbd/drbd_req.h3
-rw-r--r--drivers/block/drbd/drbd_worker.c10
-rw-r--r--drivers/clocksource/sh_cmt.c17
-rw-r--r--drivers/input/evdev.c113
-rw-r--r--drivers/input/keyboard/omap-keypad.c41
-rw-r--r--drivers/input/tablet/wacom_wac.c3
-rw-r--r--drivers/md/dm-table.c10
-rw-r--r--drivers/md/md.c3
-rw-r--r--drivers/media/common/saa7146_hlp.c8
-rw-r--r--drivers/media/common/saa7146_video.c16
-rw-r--r--drivers/media/radio/radio-aimslab.c16
-rw-r--r--drivers/media/radio/radio-aztech.c6
-rw-r--r--drivers/media/radio/radio-cadet.c12
-rw-r--r--drivers/media/radio/radio-gemtek-pci.c6
-rw-r--r--drivers/media/radio/radio-gemtek.c14
-rw-r--r--drivers/media/radio/radio-maestro.c14
-rw-r--r--drivers/media/radio/radio-maxiradio.c2
-rw-r--r--drivers/media/radio/radio-miropcm20.c6
-rw-r--r--drivers/media/radio/radio-rtrack2.c10
-rw-r--r--drivers/media/radio/radio-sf16fmi.c7
-rw-r--r--drivers/media/radio/radio-sf16fmr2.c11
-rw-r--r--drivers/media/radio/radio-si4713.c3
-rw-r--r--drivers/media/radio/radio-tea5764.c49
-rw-r--r--drivers/media/radio/radio-terratec.c8
-rw-r--r--drivers/media/radio/radio-timb.c5
-rw-r--r--drivers/media/radio/radio-trust.c18
-rw-r--r--drivers/media/radio/radio-typhoon.c16
-rw-r--r--drivers/media/radio/radio-zoltrix.c30
-rw-r--r--drivers/media/video/arv.c2
-rw-r--r--drivers/media/video/bt8xx/bttv-driver.c117
-rw-r--r--drivers/media/video/bw-qcam.c2
-rw-r--r--drivers/media/video/c-qcam.c2
-rw-r--r--drivers/media/video/cafe_ccic.c2
-rw-r--r--drivers/media/video/cx18/cx18-alsa-pcm.c8
-rw-r--r--drivers/media/video/cx18/cx18-streams.c2
-rw-r--r--drivers/media/video/et61x251/et61x251_core.c2
-rw-r--r--drivers/media/video/gspca/sonixj.c416
-rw-r--r--drivers/media/video/meye.c14
-rw-r--r--drivers/media/video/pms.c2
-rw-r--r--drivers/media/video/sh_vou.c13
-rw-r--r--drivers/media/video/sn9c102/sn9c102_core.c2
-rw-r--r--drivers/media/video/uvc/uvc_ctrl.c48
-rw-r--r--drivers/media/video/uvc/uvc_queue.c133
-rw-r--r--drivers/media/video/uvc/uvc_v4l2.c185
-rw-r--r--drivers/media/video/uvc/uvc_video.c3
-rw-r--r--drivers/media/video/uvc/uvcvideo.h10
-rw-r--r--drivers/media/video/v4l2-dev.c69
-rw-r--r--drivers/media/video/v4l2-device.c1
-rw-r--r--drivers/media/video/w9966.c2
-rw-r--r--drivers/pci/bus.c81
-rw-r--r--drivers/pci/dmar.c5
-rw-r--r--drivers/pci/quirks.c26
-rw-r--r--drivers/scsi/scsi_lib.c3
-rw-r--r--drivers/staging/cx25821/cx25821-video.c8
-rw-r--r--drivers/staging/cx25821/cx25821-video.h2
-rw-r--r--drivers/tty/n_gsm.c6
-rw-r--r--drivers/usb/core/Kconfig12
-rw-r--r--drivers/usb/gadget/composite.c18
-rw-r--r--drivers/usb/host/xhci-mem.c25
-rw-r--r--drivers/usb/misc/uss720.c4
-rw-r--r--drivers/usb/serial/ftdi_sio.c1
-rw-r--r--drivers/usb/serial/ftdi_sio_ids.h5
-rw-r--r--drivers/usb/storage/unusual_devs.h7
-rw-r--r--drivers/video/omap/Kconfig4
-rw-r--r--drivers/video/omap2/vram.c4
-rw-r--r--fs/btrfs/export.c2
-rw-r--r--fs/ceph/dir.c3
-rw-r--r--fs/ceph/file.c39
-rw-r--r--fs/namei.c3
-rw-r--r--fs/nilfs2/gcinode.c9
-rw-r--r--fs/nilfs2/ioctl.c12
-rw-r--r--fs/notify/fanotify/fanotify.c6
-rw-r--r--fs/notify/fanotify/fanotify_user.c81
-rw-r--r--fs/notify/inotify/inotify_user.c1
-rw-r--r--include/linux/blkdev.h10
-rw-r--r--include/linux/bootmem.h2
-rw-r--r--include/linux/ceph/libceph.h6
-rw-r--r--include/linux/cnt32_to_63.h20
-rw-r--r--include/linux/fanotify.h10
-rw-r--r--include/linux/fsnotify.h3
-rw-r--r--include/linux/fsnotify_backend.h2
-rw-r--r--include/linux/input.h6
-rw-r--r--include/linux/input/matrix_keypad.h2
-rw-r--r--include/linux/ioport.h2
-rw-r--r--include/linux/perf_event.h1
-rw-r--r--include/linux/pm_runtime.h3
-rw-r--r--include/linux/sched.h2
-rw-r--r--include/linux/ssb/ssb_driver_gige.h17
-rw-r--r--include/media/saa7146.h2
-rw-r--r--include/media/v4l2-device.h2
-rw-r--r--kernel/fork.c1
-rw-r--r--kernel/perf_event.c37
-rw-r--r--kernel/power/swap.c2
-rw-r--r--kernel/power/user.c2
-rw-r--r--kernel/resource.c104
-rw-r--r--kernel/sched.c287
-rw-r--r--kernel/timer.c8
-rw-r--r--kernel/trace/trace.c10
-rw-r--r--net/ceph/messenger.c8
-rw-r--r--net/ceph/pagevec.c15
-rw-r--r--scripts/recordmcount.h2
-rwxr-xr-xscripts/tags.sh4
-rw-r--r--sound/pci/hda/patch_realtek.c24
-rw-r--r--sound/soc/codecs/wm8580.c2
-rw-r--r--sound/soc/codecs/wm8904.c3
-rw-r--r--sound/soc/codecs/wm8955.c3
-rw-r--r--sound/soc/codecs/wm8960.c3
-rw-r--r--sound/soc/soc-dapm.c3
237 files changed, 4992 insertions, 3017 deletions
diff --git a/Documentation/arm/OMAP/omap_pm b/Documentation/arm/OMAP/omap_pm
index 5389440aade3..9012bb039094 100644
--- a/Documentation/arm/OMAP/omap_pm
+++ b/Documentation/arm/OMAP/omap_pm
@@ -127,3 +127,28 @@ implementation needs:
12710. (*pdata->cpu_set_freq)(unsigned long f) 12710. (*pdata->cpu_set_freq)(unsigned long f)
128 128
12911. (*pdata->cpu_get_freq)(void) 12911. (*pdata->cpu_get_freq)(void)
130
131Customizing OPP for platform
132============================
133Defining CONFIG_PM should enable OPP layer for the silicon
134and the registration of OPP table should take place automatically.
135However, in special cases, the default OPP table may need to be
136tweaked, for e.g.:
137 * enable default OPPs which are disabled by default, but which
138 could be enabled on a platform
139 * Disable an unsupported OPP on the platform
140 * Define and add a custom opp table entry
141in these cases, the board file needs to do additional steps as follows:
142arch/arm/mach-omapx/board-xyz.c
143 #include "pm.h"
144 ....
145 static void __init omap_xyz_init_irq(void)
146 {
147 ....
148 /* Initialize the default table */
149 omapx_opp_init();
150 /* Do customization to the defaults */
151 ....
152 }
153NOTE: omapx_opp_init will be omap3_opp_init or as required
154based on the omap family.
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index cdd2a6e8a3b7..8b61c9360999 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2175,11 +2175,6 @@ and is between 256 and 4096 characters. It is defined in the file
2175 reset_devices [KNL] Force drivers to reset the underlying device 2175 reset_devices [KNL] Force drivers to reset the underlying device
2176 during initialization. 2176 during initialization.
2177 2177
2178 resource_alloc_from_bottom
2179 Allocate new resources from the beginning of available
2180 space, not the end. If you need to use this, please
2181 report a bug.
2182
2183 resume= [SWSUSP] 2178 resume= [SWSUSP]
2184 Specify the partition device for software suspend 2179 Specify the partition device for software suspend
2185 2180
diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
index 489e9bacd165..41cc7b30d7dd 100644
--- a/Documentation/power/runtime_pm.txt
+++ b/Documentation/power/runtime_pm.txt
@@ -379,8 +379,8 @@ drivers/base/power/runtime.c and include/linux/pm_runtime.h:
379 zero) 379 zero)
380 380
381 bool pm_runtime_suspended(struct device *dev); 381 bool pm_runtime_suspended(struct device *dev);
382 - return true if the device's runtime PM status is 'suspended', or false 382 - return true if the device's runtime PM status is 'suspended' and its
383 otherwise 383 'power.disable_depth' field is equal to zero, or false otherwise
384 384
385 void pm_runtime_allow(struct device *dev); 385 void pm_runtime_allow(struct device *dev);
386 - set the power.runtime_auto flag for the device and decrease its usage 386 - set the power.runtime_auto flag for the device and decrease its usage
diff --git a/Makefile b/Makefile
index 5aa44278d956..77044b7918a5 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
1VERSION = 2 1VERSION = 2
2PATCHLEVEL = 6 2PATCHLEVEL = 6
3SUBLEVEL = 37 3SUBLEVEL = 37
4EXTRAVERSION = -rc6 4EXTRAVERSION = -rc7
5NAME = Flesh-Eating Bats with Fangs 5NAME = Flesh-Eating Bats with Fangs
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 62d686f0b426..d13add71f72a 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -65,7 +65,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
65obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o 65obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
66obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o 66obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
67obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o 67obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
68obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o 68obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o
69 69
70# AT91SAM9260/AT91SAM9G20 board-specific support 70# AT91SAM9260/AT91SAM9G20 board-specific support
71obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o 71obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index bba5a560e02b..feb65787c30b 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -31,6 +31,7 @@
31 31
32#include <mach/board.h> 32#include <mach/board.h>
33#include <mach/at91sam9_smc.h> 33#include <mach/at91sam9_smc.h>
34#include <mach/stamp9g20.h>
34 35
35#include "sam9_smc.h" 36#include "sam9_smc.h"
36#include "generic.h" 37#include "generic.h"
@@ -38,11 +39,7 @@
38 39
39static void __init pcontrol_g20_map_io(void) 40static void __init pcontrol_g20_map_io(void)
40{ 41{
41 /* Initialize processor: 18.432 MHz crystal */ 42 stamp9g20_map_io();
42 at91sam9260_initialize(18432000);
43
44 /* DGBU on ttyS0. (Rx, Tx) only TTL -> JTAG connector X7 17,19 ) */
45 at91_register_uart(0, 0, 0);
46 43
47 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ 44 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
48 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS 45 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
@@ -54,9 +51,6 @@ static void __init pcontrol_g20_map_io(void)
54 51
55 /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */ 52 /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
56 at91_register_uart(AT91SAM9260_ID_US4, 3, 0); 53 at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
57
58 /* set serial console to ttyS0 (ie, DBGU) */
59 at91_set_serial_console(0);
60} 54}
61 55
62 56
@@ -66,38 +60,6 @@ static void __init init_irq(void)
66} 60}
67 61
68 62
69/*
70 * NAND flash 512MiB 1,8V 8-bit, sector size 128 KiB
71 */
72static struct atmel_nand_data __initdata nand_data = {
73 .ale = 21,
74 .cle = 22,
75 .rdy_pin = AT91_PIN_PC13,
76 .enable_pin = AT91_PIN_PC14,
77};
78
79/*
80 * Bus timings; unit = 7.57ns
81 */
82static struct sam9_smc_config __initdata nand_smc_config = {
83 .ncs_read_setup = 0,
84 .nrd_setup = 2,
85 .ncs_write_setup = 0,
86 .nwe_setup = 2,
87
88 .ncs_read_pulse = 4,
89 .nrd_pulse = 4,
90 .ncs_write_pulse = 4,
91 .nwe_pulse = 4,
92
93 .read_cycle = 7,
94 .write_cycle = 7,
95
96 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
97 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
98 .tdf_cycles = 3,
99};
100
101static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { 63static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
102 .ncs_read_setup = 16, 64 .ncs_read_setup = 16,
103 .nrd_setup = 18, 65 .nrd_setup = 18,
@@ -138,14 +100,6 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
138 .tdf_cycles = 1, 100 .tdf_cycles = 1,
139} }; 101} };
140 102
141static void __init add_device_nand(void)
142{
143 /* configure chip-select 3 (NAND) */
144 sam9_smc_configure(3, &nand_smc_config);
145 at91_add_device_nand(&nand_data);
146}
147
148
149static void __init add_device_pcontrol(void) 103static void __init add_device_pcontrol(void)
150{ 104{
151 /* configure chip-select 4 (IO compatible to 8051 X4 ) */ 105 /* configure chip-select 4 (IO compatible to 8051 X4 ) */
@@ -156,23 +110,6 @@ static void __init add_device_pcontrol(void)
156 110
157 111
158/* 112/*
159 * MCI (SD/MMC)
160 * det_pin, wp_pin and vcc_pin are not connected
161 */
162#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
163static struct mci_platform_data __initdata mmc_data = {
164 .slot[0] = {
165 .bus_width = 4,
166 },
167};
168#else
169static struct at91_mmc_data __initdata mmc_data = {
170 .wire4 = 1,
171};
172#endif
173
174
175/*
176 * USB Host port 113 * USB Host port
177 */ 114 */
178static struct at91_usbh_data __initdata usbh_data = { 115static struct at91_usbh_data __initdata usbh_data = {
@@ -265,42 +202,13 @@ static struct spi_board_info pcontrol_g20_spi_devices[] = {
265}; 202};
266 203
267 204
268/*
269 * Dallas 1-Wire DS2431
270 */
271static struct w1_gpio_platform_data w1_gpio_pdata = {
272 .pin = AT91_PIN_PA29,
273 .is_open_drain = 1,
274};
275
276static struct platform_device w1_device = {
277 .name = "w1-gpio",
278 .id = -1,
279 .dev.platform_data = &w1_gpio_pdata,
280};
281
282static void add_wire1(void)
283{
284 at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
285 at91_set_multi_drive(w1_gpio_pdata.pin, 1);
286 platform_device_register(&w1_device);
287}
288
289
290static void __init pcontrol_g20_board_init(void) 205static void __init pcontrol_g20_board_init(void)
291{ 206{
292 at91_add_device_serial(); 207 stamp9g20_board_init();
293 add_device_nand();
294#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 at91_add_device_mci(0, &mmc_data);
296#else
297 at91_add_device_mmc(0, &mmc_data);
298#endif
299 at91_add_device_usbh(&usbh_data); 208 at91_add_device_usbh(&usbh_data);
300 at91_add_device_eth(&macb_data); 209 at91_add_device_eth(&macb_data);
301 at91_add_device_i2c(pcontrol_g20_i2c_devices, 210 at91_add_device_i2c(pcontrol_g20_i2c_devices,
302 ARRAY_SIZE(pcontrol_g20_i2c_devices)); 211 ARRAY_SIZE(pcontrol_g20_i2c_devices));
303 add_wire1();
304 add_device_pcontrol(); 212 add_device_pcontrol();
305 at91_add_device_spi(pcontrol_g20_spi_devices, 213 at91_add_device_spi(pcontrol_g20_spi_devices,
306 ARRAY_SIZE(pcontrol_g20_spi_devices)); 214 ARRAY_SIZE(pcontrol_g20_spi_devices));
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 5206eef4a67e..f8902b118960 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -32,7 +32,7 @@
32#include "generic.h" 32#include "generic.h"
33 33
34 34
35static void __init portuxg20_map_io(void) 35void __init stamp9g20_map_io(void)
36{ 36{
37 /* Initialize processor: 18.432 MHz crystal */ 37 /* Initialize processor: 18.432 MHz crystal */
38 at91sam9260_initialize(18432000); 38 at91sam9260_initialize(18432000);
@@ -40,6 +40,24 @@ static void __init portuxg20_map_io(void)
40 /* DGBU on ttyS0. (Rx & Tx only) */ 40 /* DGBU on ttyS0. (Rx & Tx only) */
41 at91_register_uart(0, 0, 0); 41 at91_register_uart(0, 0, 0);
42 42
43 /* set serial console to ttyS0 (ie, DBGU) */
44 at91_set_serial_console(0);
45}
46
47static void __init stamp9g20evb_map_io(void)
48{
49 stamp9g20_map_io();
50
51 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
52 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
53 | ATMEL_UART_DTR | ATMEL_UART_DSR
54 | ATMEL_UART_DCD | ATMEL_UART_RI);
55}
56
57static void __init portuxg20_map_io(void)
58{
59 stamp9g20_map_io();
60
43 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ 61 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
44 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS 62 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
45 | ATMEL_UART_DTR | ATMEL_UART_DSR 63 | ATMEL_UART_DTR | ATMEL_UART_DSR
@@ -56,26 +74,6 @@ static void __init portuxg20_map_io(void)
56 74
57 /* USART5 on ttyS6. (Rx, Tx only) */ 75 /* USART5 on ttyS6. (Rx, Tx only) */
58 at91_register_uart(AT91SAM9260_ID_US5, 6, 0); 76 at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
59
60 /* set serial console to ttyS0 (ie, DBGU) */
61 at91_set_serial_console(0);
62}
63
64static void __init stamp9g20_map_io(void)
65{
66 /* Initialize processor: 18.432 MHz crystal */
67 at91sam9260_initialize(18432000);
68
69 /* DGBU on ttyS0. (Rx & Tx only) */
70 at91_register_uart(0, 0, 0);
71
72 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
73 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
74 | ATMEL_UART_DTR | ATMEL_UART_DSR
75 | ATMEL_UART_DCD | ATMEL_UART_RI);
76
77 /* set serial console to ttyS0 (ie, DBGU) */
78 at91_set_serial_console(0);
79} 77}
80 78
81static void __init init_irq(void) 79static void __init init_irq(void)
@@ -156,7 +154,7 @@ static struct at91_udc_data __initdata portuxg20_udc_data = {
156 .pullup_pin = 0, /* pull-up driven by UDC */ 154 .pullup_pin = 0, /* pull-up driven by UDC */
157}; 155};
158 156
159static struct at91_udc_data __initdata stamp9g20_udc_data = { 157static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
160 .vbus_pin = AT91_PIN_PA22, 158 .vbus_pin = AT91_PIN_PA22,
161 .pullup_pin = 0, /* pull-up driven by UDC */ 159 .pullup_pin = 0, /* pull-up driven by UDC */
162}; 160};
@@ -190,7 +188,7 @@ static struct gpio_led portuxg20_leds[] = {
190 } 188 }
191}; 189};
192 190
193static struct gpio_led stamp9g20_leds[] = { 191static struct gpio_led stamp9g20evb_leds[] = {
194 { 192 {
195 .name = "D8", 193 .name = "D8",
196 .gpio = AT91_PIN_PB18, 194 .gpio = AT91_PIN_PB18,
@@ -250,7 +248,7 @@ void add_w1(void)
250} 248}
251 249
252 250
253static void __init generic_board_init(void) 251void __init stamp9g20_board_init(void)
254{ 252{
255 /* Serial */ 253 /* Serial */
256 at91_add_device_serial(); 254 at91_add_device_serial();
@@ -262,34 +260,40 @@ static void __init generic_board_init(void)
262#else 260#else
263 at91_add_device_mmc(0, &mmc_data); 261 at91_add_device_mmc(0, &mmc_data);
264#endif 262#endif
265 /* USB Host */
266 at91_add_device_usbh(&usbh_data);
267 /* Ethernet */
268 at91_add_device_eth(&macb_data);
269 /* I2C */
270 at91_add_device_i2c(NULL, 0);
271 /* W1 */ 263 /* W1 */
272 add_w1(); 264 add_w1();
273} 265}
274 266
275static void __init portuxg20_board_init(void) 267static void __init portuxg20_board_init(void)
276{ 268{
277 generic_board_init(); 269 stamp9g20_board_init();
278 /* SPI */ 270 /* USB Host */
279 at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices)); 271 at91_add_device_usbh(&usbh_data);
280 /* USB Device */ 272 /* USB Device */
281 at91_add_device_udc(&portuxg20_udc_data); 273 at91_add_device_udc(&portuxg20_udc_data);
274 /* Ethernet */
275 at91_add_device_eth(&macb_data);
276 /* I2C */
277 at91_add_device_i2c(NULL, 0);
278 /* SPI */
279 at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices));
282 /* LEDs */ 280 /* LEDs */
283 at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds)); 281 at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds));
284} 282}
285 283
286static void __init stamp9g20_board_init(void) 284static void __init stamp9g20evb_board_init(void)
287{ 285{
288 generic_board_init(); 286 stamp9g20_board_init();
287 /* USB Host */
288 at91_add_device_usbh(&usbh_data);
289 /* USB Device */ 289 /* USB Device */
290 at91_add_device_udc(&stamp9g20_udc_data); 290 at91_add_device_udc(&stamp9g20evb_udc_data);
291 /* Ethernet */
292 at91_add_device_eth(&macb_data);
293 /* I2C */
294 at91_add_device_i2c(NULL, 0);
291 /* LEDs */ 295 /* LEDs */
292 at91_gpio_leds(stamp9g20_leds, ARRAY_SIZE(stamp9g20_leds)); 296 at91_gpio_leds(stamp9g20evb_leds, ARRAY_SIZE(stamp9g20evb_leds));
293} 297}
294 298
295MACHINE_START(PORTUXG20, "taskit PortuxG20") 299MACHINE_START(PORTUXG20, "taskit PortuxG20")
@@ -305,7 +309,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")
305 /* Maintainer: taskit GmbH */ 309 /* Maintainer: taskit GmbH */
306 .boot_params = AT91_SDRAM_BASE + 0x100, 310 .boot_params = AT91_SDRAM_BASE + 0x100,
307 .timer = &at91sam926x_timer, 311 .timer = &at91sam926x_timer,
308 .map_io = stamp9g20_map_io, 312 .map_io = stamp9g20evb_map_io,
309 .init_irq = init_irq, 313 .init_irq = init_irq,
310 .init_machine = stamp9g20_board_init, 314 .init_machine = stamp9g20evb_board_init,
311MACHINE_END 315MACHINE_END
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 7525cee3983f..9113da6845f1 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -658,7 +658,7 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
658 /* Now set uhpck values */ 658 /* Now set uhpck values */
659 uhpck.parent = &utmi_clk; 659 uhpck.parent = &utmi_clk;
660 uhpck.pmc_mask = AT91SAM926x_PMC_UHP; 660 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
661 uhpck.rate_hz = utmi_clk.parent->rate_hz; 661 uhpck.rate_hz = utmi_clk.rate_hz;
662 uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); 662 uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
663} 663}
664 664
diff --git a/arch/arm/mach-at91/include/mach/stamp9g20.h b/arch/arm/mach-at91/include/mach/stamp9g20.h
new file mode 100644
index 000000000000..6120f9c46d59
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/stamp9g20.h
@@ -0,0 +1,7 @@
1#ifndef __MACH_STAMP9G20_H
2#define __MACH_STAMP9G20_H
3
4void stamp9g20_map_io(void);
5void stamp9g20_board_init(void);
6
7#endif
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 0b1c07ffa2f1..6ee19504845f 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o 6obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o
7obj-y += clock.o clock_data.o opp_data.o 7obj-y += clock.o clock_data.o opp_data.o
8 8
9obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 9obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index e1439506eba9..bd0495a9ac3b 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -43,84 +43,82 @@
43static u8 ams_delta_latch1_reg; 43static u8 ams_delta_latch1_reg;
44static u16 ams_delta_latch2_reg; 44static u16 ams_delta_latch2_reg;
45 45
46static int ams_delta_keymap[] = { 46static const unsigned int ams_delta_keymap[] = {
47 KEY(0, 0, KEY_F1), /* Advert */ 47 KEY(0, 0, KEY_F1), /* Advert */
48 48
49 KEY(3, 0, KEY_COFFEE), /* Games */ 49 KEY(0, 3, KEY_COFFEE), /* Games */
50 KEY(2, 0, KEY_QUESTION), /* Directory */ 50 KEY(0, 2, KEY_QUESTION), /* Directory */
51 KEY(3, 2, KEY_CONNECT), /* Internet */ 51 KEY(2, 3, KEY_CONNECT), /* Internet */
52 KEY(2, 1, KEY_SHOP), /* Services */ 52 KEY(1, 2, KEY_SHOP), /* Services */
53 KEY(1, 1, KEY_PHONE), /* VoiceMail */ 53 KEY(1, 1, KEY_PHONE), /* VoiceMail */
54 54
55 KEY(1, 0, KEY_DELETE), /* Delete */ 55 KEY(0, 1, KEY_DELETE), /* Delete */
56 KEY(2, 2, KEY_PLAY), /* Play */ 56 KEY(2, 2, KEY_PLAY), /* Play */
57 KEY(0, 1, KEY_PAGEUP), /* Up */ 57 KEY(1, 0, KEY_PAGEUP), /* Up */
58 KEY(3, 1, KEY_PAGEDOWN), /* Down */ 58 KEY(1, 3, KEY_PAGEDOWN), /* Down */
59 KEY(0, 2, KEY_EMAIL), /* ReadEmail */ 59 KEY(2, 0, KEY_EMAIL), /* ReadEmail */
60 KEY(1, 2, KEY_STOP), /* Stop */ 60 KEY(2, 1, KEY_STOP), /* Stop */
61 61
62 /* Numeric keypad portion */ 62 /* Numeric keypad portion */
63 KEY(7, 0, KEY_KP1), 63 KEY(0, 7, KEY_KP1),
64 KEY(6, 0, KEY_KP2), 64 KEY(0, 6, KEY_KP2),
65 KEY(5, 0, KEY_KP3), 65 KEY(0, 5, KEY_KP3),
66 KEY(7, 1, KEY_KP4), 66 KEY(1, 7, KEY_KP4),
67 KEY(6, 1, KEY_KP5), 67 KEY(1, 6, KEY_KP5),
68 KEY(5, 1, KEY_KP6), 68 KEY(1, 5, KEY_KP6),
69 KEY(7, 2, KEY_KP7), 69 KEY(2, 7, KEY_KP7),
70 KEY(6, 2, KEY_KP8), 70 KEY(2, 6, KEY_KP8),
71 KEY(5, 2, KEY_KP9), 71 KEY(2, 5, KEY_KP9),
72 KEY(6, 3, KEY_KP0), 72 KEY(3, 6, KEY_KP0),
73 KEY(7, 3, KEY_KPASTERISK), 73 KEY(3, 7, KEY_KPASTERISK),
74 KEY(5, 3, KEY_KPDOT), /* # key */ 74 KEY(3, 5, KEY_KPDOT), /* # key */
75 KEY(2, 7, KEY_NUMLOCK), /* Mute */ 75 KEY(7, 2, KEY_NUMLOCK), /* Mute */
76 KEY(1, 7, KEY_KPMINUS), /* Recall */ 76 KEY(7, 1, KEY_KPMINUS), /* Recall */
77 KEY(1, 6, KEY_KPPLUS), /* Redial */ 77 KEY(6, 1, KEY_KPPLUS), /* Redial */
78 KEY(6, 7, KEY_KPSLASH), /* Handsfree */ 78 KEY(7, 6, KEY_KPSLASH), /* Handsfree */
79 KEY(0, 6, KEY_ENTER), /* Video */ 79 KEY(6, 0, KEY_ENTER), /* Video */
80 80
81 KEY(4, 7, KEY_CAMERA), /* Photo */ 81 KEY(7, 4, KEY_CAMERA), /* Photo */
82 82
83 KEY(4, 0, KEY_F2), /* Home */ 83 KEY(0, 4, KEY_F2), /* Home */
84 KEY(4, 1, KEY_F3), /* Office */ 84 KEY(1, 4, KEY_F3), /* Office */
85 KEY(4, 2, KEY_F4), /* Mobile */ 85 KEY(2, 4, KEY_F4), /* Mobile */
86 KEY(7, 7, KEY_F5), /* SMS */ 86 KEY(7, 7, KEY_F5), /* SMS */
87 KEY(5, 7, KEY_F6), /* Email */ 87 KEY(7, 5, KEY_F6), /* Email */
88 88
89 /* QWERTY portion of keypad */ 89 /* QWERTY portion of keypad */
90 KEY(4, 3, KEY_Q), 90 KEY(3, 4, KEY_Q),
91 KEY(3, 3, KEY_W), 91 KEY(3, 3, KEY_W),
92 KEY(2, 3, KEY_E), 92 KEY(3, 2, KEY_E),
93 KEY(1, 3, KEY_R), 93 KEY(3, 1, KEY_R),
94 KEY(0, 3, KEY_T), 94 KEY(3, 0, KEY_T),
95 KEY(7, 4, KEY_Y), 95 KEY(4, 7, KEY_Y),
96 KEY(6, 4, KEY_U), 96 KEY(4, 6, KEY_U),
97 KEY(5, 4, KEY_I), 97 KEY(4, 5, KEY_I),
98 KEY(4, 4, KEY_O), 98 KEY(4, 4, KEY_O),
99 KEY(3, 4, KEY_P), 99 KEY(4, 3, KEY_P),
100 100
101 KEY(2, 4, KEY_A), 101 KEY(4, 2, KEY_A),
102 KEY(1, 4, KEY_S), 102 KEY(4, 1, KEY_S),
103 KEY(0, 4, KEY_D), 103 KEY(4, 0, KEY_D),
104 KEY(7, 5, KEY_F), 104 KEY(5, 7, KEY_F),
105 KEY(6, 5, KEY_G), 105 KEY(5, 6, KEY_G),
106 KEY(5, 5, KEY_H), 106 KEY(5, 5, KEY_H),
107 KEY(4, 5, KEY_J), 107 KEY(5, 4, KEY_J),
108 KEY(3, 5, KEY_K), 108 KEY(5, 3, KEY_K),
109 KEY(2, 5, KEY_L), 109 KEY(5, 2, KEY_L),
110 110
111 KEY(1, 5, KEY_Z), 111 KEY(5, 1, KEY_Z),
112 KEY(0, 5, KEY_X), 112 KEY(5, 0, KEY_X),
113 KEY(7, 6, KEY_C), 113 KEY(6, 7, KEY_C),
114 KEY(6, 6, KEY_V), 114 KEY(6, 6, KEY_V),
115 KEY(5, 6, KEY_B), 115 KEY(6, 5, KEY_B),
116 KEY(4, 6, KEY_N), 116 KEY(6, 4, KEY_N),
117 KEY(3, 6, KEY_M), 117 KEY(6, 3, KEY_M),
118 KEY(2, 6, KEY_SPACE), 118 KEY(6, 2, KEY_SPACE),
119 119
120 KEY(0, 7, KEY_LEFTSHIFT), /* Vol up */ 120 KEY(7, 0, KEY_LEFTSHIFT), /* Vol up */
121 KEY(3, 7, KEY_LEFTCTRL), /* Vol down */ 121 KEY(7, 3, KEY_LEFTCTRL), /* Vol down */
122
123 0
124}; 122};
125 123
126void ams_delta_latch1_write(u8 mask, u8 value) 124void ams_delta_latch1_write(u8 mask, u8 value)
@@ -189,11 +187,15 @@ static struct resource ams_delta_kp_resources[] = {
189 }, 187 },
190}; 188};
191 189
190static const struct matrix_keymap_data ams_delta_keymap_data = {
191 .keymap = ams_delta_keymap,
192 .keymap_size = ARRAY_SIZE(ams_delta_keymap),
193};
194
192static struct omap_kp_platform_data ams_delta_kp_data = { 195static struct omap_kp_platform_data ams_delta_kp_data = {
193 .rows = 8, 196 .rows = 8,
194 .cols = 8, 197 .cols = 8,
195 .keymap = ams_delta_keymap, 198 .keymap_data = &ams_delta_keymap_data,
196 .keymapsize = ARRAY_SIZE(ams_delta_keymap),
197 .delay = 9, 199 .delay = 9,
198}; 200};
199 201
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 0c3f396328bd..0efb9dbae44c 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -69,36 +69,35 @@
69#define fsample_cpld_clear(bit) \ 69#define fsample_cpld_clear(bit) \
70 fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) 70 fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
71 71
72static int fsample_keymap[] = { 72static const unsigned int fsample_keymap[] = {
73 KEY(0,0,KEY_UP), 73 KEY(0, 0, KEY_UP),
74 KEY(0,1,KEY_RIGHT), 74 KEY(1, 0, KEY_RIGHT),
75 KEY(0,2,KEY_LEFT), 75 KEY(2, 0, KEY_LEFT),
76 KEY(0,3,KEY_DOWN), 76 KEY(3, 0, KEY_DOWN),
77 KEY(0,4,KEY_ENTER), 77 KEY(4, 0, KEY_ENTER),
78 KEY(1,0,KEY_F10), 78 KEY(0, 1, KEY_F10),
79 KEY(1,1,KEY_SEND), 79 KEY(1, 1, KEY_SEND),
80 KEY(1,2,KEY_END), 80 KEY(2, 1, KEY_END),
81 KEY(1,3,KEY_VOLUMEDOWN), 81 KEY(3, 1, KEY_VOLUMEDOWN),
82 KEY(1,4,KEY_VOLUMEUP), 82 KEY(4, 1, KEY_VOLUMEUP),
83 KEY(1,5,KEY_RECORD), 83 KEY(5, 1, KEY_RECORD),
84 KEY(2,0,KEY_F9), 84 KEY(0, 2, KEY_F9),
85 KEY(2,1,KEY_3), 85 KEY(1, 2, KEY_3),
86 KEY(2,2,KEY_6), 86 KEY(2, 2, KEY_6),
87 KEY(2,3,KEY_9), 87 KEY(3, 2, KEY_9),
88 KEY(2,4,KEY_KPDOT), 88 KEY(4, 2, KEY_KPDOT),
89 KEY(3,0,KEY_BACK), 89 KEY(0, 3, KEY_BACK),
90 KEY(3,1,KEY_2), 90 KEY(1, 3, KEY_2),
91 KEY(3,2,KEY_5), 91 KEY(2, 3, KEY_5),
92 KEY(3,3,KEY_8), 92 KEY(3, 3, KEY_8),
93 KEY(3,4,KEY_0), 93 KEY(4, 3, KEY_0),
94 KEY(3,5,KEY_KPSLASH), 94 KEY(5, 3, KEY_KPSLASH),
95 KEY(4,0,KEY_HOME), 95 KEY(0, 4, KEY_HOME),
96 KEY(4,1,KEY_1), 96 KEY(1, 4, KEY_1),
97 KEY(4,2,KEY_4), 97 KEY(2, 4, KEY_4),
98 KEY(4,3,KEY_7), 98 KEY(3, 4, KEY_7),
99 KEY(4,4,KEY_KPASTERISK), 99 KEY(4, 4, KEY_KPASTERISK),
100 KEY(4,5,KEY_POWER), 100 KEY(5, 4, KEY_POWER),
101 0
102}; 101};
103 102
104static struct smc91x_platdata smc91x_info = { 103static struct smc91x_platdata smc91x_info = {
@@ -253,11 +252,15 @@ static struct resource kp_resources[] = {
253 }, 252 },
254}; 253};
255 254
255static const struct matrix_keymap_data fsample_keymap_data = {
256 .keymap = fsample_keymap,
257 .keymap_size = ARRAY_SIZE(fsample_keymap),
258};
259
256static struct omap_kp_platform_data kp_data = { 260static struct omap_kp_platform_data kp_data = {
257 .rows = 8, 261 .rows = 8,
258 .cols = 8, 262 .cols = 8,
259 .keymap = fsample_keymap, 263 .keymap_data = &fsample_keymap_data,
260 .keymapsize = ARRAY_SIZE(fsample_keymap),
261 .delay = 4, 264 .delay = 4,
262}; 265};
263 266
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 082a73ca5564..28b84aa9bdba 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -52,43 +52,42 @@
52/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 52/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
53#define OMAP1610_ETHR_START 0x04000300 53#define OMAP1610_ETHR_START 0x04000300
54 54
55static int h2_keymap[] = { 55static const unsigned int h2_keymap[] = {
56 KEY(0, 0, KEY_LEFT), 56 KEY(0, 0, KEY_LEFT),
57 KEY(0, 1, KEY_RIGHT), 57 KEY(1, 0, KEY_RIGHT),
58 KEY(0, 2, KEY_3), 58 KEY(2, 0, KEY_3),
59 KEY(0, 3, KEY_F10), 59 KEY(3, 0, KEY_F10),
60 KEY(0, 4, KEY_F5), 60 KEY(4, 0, KEY_F5),
61 KEY(0, 5, KEY_9), 61 KEY(5, 0, KEY_9),
62 KEY(1, 0, KEY_DOWN), 62 KEY(0, 1, KEY_DOWN),
63 KEY(1, 1, KEY_UP), 63 KEY(1, 1, KEY_UP),
64 KEY(1, 2, KEY_2), 64 KEY(2, 1, KEY_2),
65 KEY(1, 3, KEY_F9), 65 KEY(3, 1, KEY_F9),
66 KEY(1, 4, KEY_F7), 66 KEY(4, 1, KEY_F7),
67 KEY(1, 5, KEY_0), 67 KEY(5, 1, KEY_0),
68 KEY(2, 0, KEY_ENTER), 68 KEY(0, 2, KEY_ENTER),
69 KEY(2, 1, KEY_6), 69 KEY(1, 2, KEY_6),
70 KEY(2, 2, KEY_1), 70 KEY(2, 2, KEY_1),
71 KEY(2, 3, KEY_F2), 71 KEY(3, 2, KEY_F2),
72 KEY(2, 4, KEY_F6), 72 KEY(4, 2, KEY_F6),
73 KEY(2, 5, KEY_HOME), 73 KEY(5, 2, KEY_HOME),
74 KEY(3, 0, KEY_8), 74 KEY(0, 3, KEY_8),
75 KEY(3, 1, KEY_5), 75 KEY(1, 3, KEY_5),
76 KEY(3, 2, KEY_F12), 76 KEY(2, 3, KEY_F12),
77 KEY(3, 3, KEY_F3), 77 KEY(3, 3, KEY_F3),
78 KEY(3, 4, KEY_F8), 78 KEY(4, 3, KEY_F8),
79 KEY(3, 5, KEY_END), 79 KEY(5, 3, KEY_END),
80 KEY(4, 0, KEY_7), 80 KEY(0, 4, KEY_7),
81 KEY(4, 1, KEY_4), 81 KEY(1, 4, KEY_4),
82 KEY(4, 2, KEY_F11), 82 KEY(2, 4, KEY_F11),
83 KEY(4, 3, KEY_F1), 83 KEY(3, 4, KEY_F1),
84 KEY(4, 4, KEY_F4), 84 KEY(4, 4, KEY_F4),
85 KEY(4, 5, KEY_ESC), 85 KEY(5, 4, KEY_ESC),
86 KEY(5, 0, KEY_F13), 86 KEY(0, 5, KEY_F13),
87 KEY(5, 1, KEY_F14), 87 KEY(1, 5, KEY_F14),
88 KEY(5, 2, KEY_F15), 88 KEY(2, 5, KEY_F15),
89 KEY(5, 3, KEY_F16), 89 KEY(3, 5, KEY_F16),
90 KEY(5, 4, KEY_SLEEP), 90 KEY(4, 5, KEY_SLEEP),
91 0
92}; 91};
93 92
94static struct mtd_partition h2_nor_partitions[] = { 93static struct mtd_partition h2_nor_partitions[] = {
@@ -270,14 +269,18 @@ static struct resource h2_kp_resources[] = {
270 }, 269 },
271}; 270};
272 271
272static const struct matrix_keymap_data h2_keymap_data = {
273 .keymap = h2_keymap,
274 .keymap_size = ARRAY_SIZE(h2_keymap),
275};
276
273static struct omap_kp_platform_data h2_kp_data = { 277static struct omap_kp_platform_data h2_kp_data = {
274 .rows = 8, 278 .rows = 8,
275 .cols = 8, 279 .cols = 8,
276 .keymap = h2_keymap, 280 .keymap_data = &h2_keymap_data,
277 .keymapsize = ARRAY_SIZE(h2_keymap), 281 .rep = true,
278 .rep = 1,
279 .delay = 9, 282 .delay = 9,
280 .dbounce = 1, 283 .dbounce = true,
281}; 284};
282 285
283static struct platform_device h2_kp_device = { 286static struct platform_device h2_kp_device = {
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index d2cff5022fe5..dbc8b8d882ba 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -56,43 +56,42 @@
56 56
57#define H3_TS_GPIO 48 57#define H3_TS_GPIO 48
58 58
59static int h3_keymap[] = { 59static const unsigned int h3_keymap[] = {
60 KEY(0, 0, KEY_LEFT), 60 KEY(0, 0, KEY_LEFT),
61 KEY(0, 1, KEY_RIGHT), 61 KEY(1, 0, KEY_RIGHT),
62 KEY(0, 2, KEY_3), 62 KEY(2, 0, KEY_3),
63 KEY(0, 3, KEY_F10), 63 KEY(3, 0, KEY_F10),
64 KEY(0, 4, KEY_F5), 64 KEY(4, 0, KEY_F5),
65 KEY(0, 5, KEY_9), 65 KEY(5, 0, KEY_9),
66 KEY(1, 0, KEY_DOWN), 66 KEY(0, 1, KEY_DOWN),
67 KEY(1, 1, KEY_UP), 67 KEY(1, 1, KEY_UP),
68 KEY(1, 2, KEY_2), 68 KEY(2, 1, KEY_2),
69 KEY(1, 3, KEY_F9), 69 KEY(3, 1, KEY_F9),
70 KEY(1, 4, KEY_F7), 70 KEY(4, 1, KEY_F7),
71 KEY(1, 5, KEY_0), 71 KEY(5, 1, KEY_0),
72 KEY(2, 0, KEY_ENTER), 72 KEY(0, 2, KEY_ENTER),
73 KEY(2, 1, KEY_6), 73 KEY(1, 2, KEY_6),
74 KEY(2, 2, KEY_1), 74 KEY(2, 2, KEY_1),
75 KEY(2, 3, KEY_F2), 75 KEY(3, 2, KEY_F2),
76 KEY(2, 4, KEY_F6), 76 KEY(4, 2, KEY_F6),
77 KEY(2, 5, KEY_HOME), 77 KEY(5, 2, KEY_HOME),
78 KEY(3, 0, KEY_8), 78 KEY(0, 3, KEY_8),
79 KEY(3, 1, KEY_5), 79 KEY(1, 3, KEY_5),
80 KEY(3, 2, KEY_F12), 80 KEY(2, 3, KEY_F12),
81 KEY(3, 3, KEY_F3), 81 KEY(3, 3, KEY_F3),
82 KEY(3, 4, KEY_F8), 82 KEY(4, 3, KEY_F8),
83 KEY(3, 5, KEY_END), 83 KEY(5, 3, KEY_END),
84 KEY(4, 0, KEY_7), 84 KEY(0, 4, KEY_7),
85 KEY(4, 1, KEY_4), 85 KEY(1, 4, KEY_4),
86 KEY(4, 2, KEY_F11), 86 KEY(2, 4, KEY_F11),
87 KEY(4, 3, KEY_F1), 87 KEY(3, 4, KEY_F1),
88 KEY(4, 4, KEY_F4), 88 KEY(4, 4, KEY_F4),
89 KEY(4, 5, KEY_ESC), 89 KEY(5, 4, KEY_ESC),
90 KEY(5, 0, KEY_F13), 90 KEY(0, 5, KEY_F13),
91 KEY(5, 1, KEY_F14), 91 KEY(1, 5, KEY_F14),
92 KEY(5, 2, KEY_F15), 92 KEY(2, 5, KEY_F15),
93 KEY(5, 3, KEY_F16), 93 KEY(3, 5, KEY_F16),
94 KEY(5, 4, KEY_SLEEP), 94 KEY(4, 5, KEY_SLEEP),
95 0
96}; 95};
97 96
98 97
@@ -305,14 +304,18 @@ static struct resource h3_kp_resources[] = {
305 }, 304 },
306}; 305};
307 306
307static const struct matrix_keymap_data h3_keymap_data = {
308 .keymap = h3_keymap,
309 .keymap_size = ARRAY_SIZE(h3_keymap),
310};
311
308static struct omap_kp_platform_data h3_kp_data = { 312static struct omap_kp_platform_data h3_kp_data = {
309 .rows = 8, 313 .rows = 8,
310 .cols = 8, 314 .cols = 8,
311 .keymap = h3_keymap, 315 .keymap_data = &h3_keymap_data,
312 .keymapsize = ARRAY_SIZE(h3_keymap), 316 .rep = true,
313 .rep = 1,
314 .delay = 9, 317 .delay = 9,
315 .dbounce = 1, 318 .dbounce = true,
316}; 319};
317 320
318static struct platform_device h3_kp_device = { 321static struct platform_device h3_kp_device = {
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 742c6d107268..f2c5c585bc83 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -180,64 +180,68 @@
180 180
181/* Keyboard definition */ 181/* Keyboard definition */
182 182
183static int htc_herald_keymap[] = { 183static const unsigned int htc_herald_keymap[] = {
184 KEY(0, 0, KEY_RECORD), /* Mail button */ 184 KEY(0, 0, KEY_RECORD), /* Mail button */
185 KEY(0, 1, KEY_CAMERA), /* Camera */ 185 KEY(1, 0, KEY_CAMERA), /* Camera */
186 KEY(0, 2, KEY_PHONE), /* Send key */ 186 KEY(2, 0, KEY_PHONE), /* Send key */
187 KEY(0, 3, KEY_VOLUMEUP), /* Volume up */ 187 KEY(3, 0, KEY_VOLUMEUP), /* Volume up */
188 KEY(0, 4, KEY_F2), /* Right bar (landscape) */ 188 KEY(4, 0, KEY_F2), /* Right bar (landscape) */
189 KEY(0, 5, KEY_MAIL), /* Win key (portrait) */ 189 KEY(5, 0, KEY_MAIL), /* Win key (portrait) */
190 KEY(0, 6, KEY_DIRECTORY), /* Right bar (protrait) */ 190 KEY(6, 0, KEY_DIRECTORY), /* Right bar (protrait) */
191 KEY(1, 0, KEY_LEFTCTRL), /* Windows key */ 191 KEY(0, 1, KEY_LEFTCTRL), /* Windows key */
192 KEY(1, 1, KEY_COMMA), 192 KEY(1, 1, KEY_COMMA),
193 KEY(1, 2, KEY_M), 193 KEY(2, 1, KEY_M),
194 KEY(1, 3, KEY_K), 194 KEY(3, 1, KEY_K),
195 KEY(1, 4, KEY_SLASH), /* OK key */ 195 KEY(4, 1, KEY_SLASH), /* OK key */
196 KEY(1, 5, KEY_I), 196 KEY(5, 1, KEY_I),
197 KEY(1, 6, KEY_U), 197 KEY(6, 1, KEY_U),
198 KEY(2, 0, KEY_LEFTALT), 198 KEY(0, 2, KEY_LEFTALT),
199 KEY(2, 1, KEY_TAB), 199 KEY(1, 2, KEY_TAB),
200 KEY(2, 2, KEY_N), 200 KEY(2, 2, KEY_N),
201 KEY(2, 3, KEY_J), 201 KEY(3, 2, KEY_J),
202 KEY(2, 4, KEY_ENTER), 202 KEY(4, 2, KEY_ENTER),
203 KEY(2, 5, KEY_H), 203 KEY(5, 2, KEY_H),
204 KEY(2, 6, KEY_Y), 204 KEY(6, 2, KEY_Y),
205 KEY(3, 0, KEY_SPACE), 205 KEY(0, 3, KEY_SPACE),
206 KEY(3, 1, KEY_L), 206 KEY(1, 3, KEY_L),
207 KEY(3, 2, KEY_B), 207 KEY(2, 3, KEY_B),
208 KEY(3, 3, KEY_V), 208 KEY(3, 3, KEY_V),
209 KEY(3, 4, KEY_BACKSPACE), 209 KEY(4, 3, KEY_BACKSPACE),
210 KEY(3, 5, KEY_G), 210 KEY(5, 3, KEY_G),
211 KEY(3, 6, KEY_T), 211 KEY(6, 3, KEY_T),
212 KEY(4, 0, KEY_CAPSLOCK), /* Shift */ 212 KEY(0, 4, KEY_CAPSLOCK), /* Shift */
213 KEY(4, 1, KEY_C), 213 KEY(1, 4, KEY_C),
214 KEY(4, 2, KEY_F), 214 KEY(2, 4, KEY_F),
215 KEY(4, 3, KEY_R), 215 KEY(3, 4, KEY_R),
216 KEY(4, 4, KEY_O), 216 KEY(4, 4, KEY_O),
217 KEY(4, 5, KEY_E), 217 KEY(5, 4, KEY_E),
218 KEY(4, 6, KEY_D), 218 KEY(6, 4, KEY_D),
219 KEY(5, 0, KEY_X), 219 KEY(0, 5, KEY_X),
220 KEY(5, 1, KEY_Z), 220 KEY(1, 5, KEY_Z),
221 KEY(5, 2, KEY_S), 221 KEY(2, 5, KEY_S),
222 KEY(5, 3, KEY_W), 222 KEY(3, 5, KEY_W),
223 KEY(5, 4, KEY_P), 223 KEY(4, 5, KEY_P),
224 KEY(5, 5, KEY_Q), 224 KEY(5, 5, KEY_Q),
225 KEY(5, 6, KEY_A), 225 KEY(6, 5, KEY_A),
226 KEY(6, 0, KEY_CONNECT), /* Voice button */ 226 KEY(0, 6, KEY_CONNECT), /* Voice button */
227 KEY(6, 2, KEY_CANCEL), /* End key */ 227 KEY(2, 6, KEY_CANCEL), /* End key */
228 KEY(6, 3, KEY_VOLUMEDOWN), /* Volume down */ 228 KEY(3, 6, KEY_VOLUMEDOWN), /* Volume down */
229 KEY(6, 4, KEY_F1), /* Left bar (landscape) */ 229 KEY(4, 6, KEY_F1), /* Left bar (landscape) */
230 KEY(6, 5, KEY_WWW), /* OK button (portrait) */ 230 KEY(5, 6, KEY_WWW), /* OK button (portrait) */
231 KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */ 231 KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */
232 0
233}; 232};
234 233
235struct omap_kp_platform_data htcherald_kp_data = { 234static const struct matrix_keymap_data htc_herald_keymap_data = {
235 .keymap = htc_herald_keymap,
236 .keymap_size = ARRAY_SIZE(htc_herald_keymap),
237};
238
239static struct omap_kp_platform_data htcherald_kp_data = {
236 .rows = 7, 240 .rows = 7,
237 .cols = 7, 241 .cols = 7,
238 .delay = 20, 242 .delay = 20,
239 .rep = 1, 243 .rep = true,
240 .keymap = htc_herald_keymap, 244 .keymap_data = &htc_herald_keymap_data,
241}; 245};
242 246
243static struct resource kp_resources[] = { 247static struct resource kp_resources[] = {
@@ -278,7 +282,7 @@ static struct gpio_keys_button herald_gpio_keys_table[] = {
278static struct gpio_keys_platform_data herald_gpio_keys_data = { 282static struct gpio_keys_platform_data herald_gpio_keys_data = {
279 .buttons = herald_gpio_keys_table, 283 .buttons = herald_gpio_keys_table,
280 .nbuttons = ARRAY_SIZE(herald_gpio_keys_table), 284 .nbuttons = ARRAY_SIZE(herald_gpio_keys_table),
281 .rep = 1, 285 .rep = true,
282}; 286};
283 287
284static struct platform_device herald_gpiokeys_device = { 288static struct platform_device herald_gpiokeys_device = {
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 8d59b078fc2c..a36e6742bf9b 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -44,17 +44,16 @@
44/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 44/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
45#define INNOVATOR1610_ETHR_START 0x04000300 45#define INNOVATOR1610_ETHR_START 0x04000300
46 46
47static int innovator_keymap[] = { 47static const unsigned int innovator_keymap[] = {
48 KEY(0, 0, KEY_F1), 48 KEY(0, 0, KEY_F1),
49 KEY(0, 3, KEY_DOWN), 49 KEY(3, 0, KEY_DOWN),
50 KEY(1, 1, KEY_F2), 50 KEY(1, 1, KEY_F2),
51 KEY(1, 2, KEY_RIGHT), 51 KEY(2, 1, KEY_RIGHT),
52 KEY(2, 0, KEY_F3), 52 KEY(0, 2, KEY_F3),
53 KEY(2, 1, KEY_F4), 53 KEY(1, 2, KEY_F4),
54 KEY(2, 2, KEY_UP), 54 KEY(2, 2, KEY_UP),
55 KEY(3, 2, KEY_ENTER), 55 KEY(2, 3, KEY_ENTER),
56 KEY(3, 3, KEY_LEFT), 56 KEY(3, 3, KEY_LEFT),
57 0
58}; 57};
59 58
60static struct mtd_partition innovator_partitions[] = { 59static struct mtd_partition innovator_partitions[] = {
@@ -126,11 +125,15 @@ static struct resource innovator_kp_resources[] = {
126 }, 125 },
127}; 126};
128 127
128static const struct matrix_keymap_data innovator_keymap_data = {
129 .keymap = innovator_keymap,
130 .keymap_size = ARRAY_SIZE(innovator_keymap),
131};
132
129static struct omap_kp_platform_data innovator_kp_data = { 133static struct omap_kp_platform_data innovator_kp_data = {
130 .rows = 8, 134 .rows = 8,
131 .cols = 8, 135 .cols = 8,
132 .keymap = innovator_keymap, 136 .keymap_data = &innovator_keymap_data,
133 .keymapsize = ARRAY_SIZE(innovator_keymap),
134 .delay = 4, 137 .delay = 4,
135}; 138};
136 139
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 605495bbc583..d21f09dc78f4 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -54,19 +54,18 @@ static void __init omap_nokia770_init_irq(void)
54 omap_init_irq(); 54 omap_init_irq();
55} 55}
56 56
57static int nokia770_keymap[] = { 57static const unsigned int nokia770_keymap[] = {
58 KEY(0, 1, GROUP_0 | KEY_UP), 58 KEY(1, 0, GROUP_0 | KEY_UP),
59 KEY(0, 2, GROUP_1 | KEY_F5), 59 KEY(2, 0, GROUP_1 | KEY_F5),
60 KEY(1, 0, GROUP_0 | KEY_LEFT), 60 KEY(0, 1, GROUP_0 | KEY_LEFT),
61 KEY(1, 1, GROUP_0 | KEY_ENTER), 61 KEY(1, 1, GROUP_0 | KEY_ENTER),
62 KEY(1, 2, GROUP_0 | KEY_RIGHT), 62 KEY(2, 1, GROUP_0 | KEY_RIGHT),
63 KEY(2, 0, GROUP_1 | KEY_ESC), 63 KEY(0, 2, GROUP_1 | KEY_ESC),
64 KEY(2, 1, GROUP_0 | KEY_DOWN), 64 KEY(1, 2, GROUP_0 | KEY_DOWN),
65 KEY(2, 2, GROUP_1 | KEY_F4), 65 KEY(2, 2, GROUP_1 | KEY_F4),
66 KEY(3, 0, GROUP_2 | KEY_F7), 66 KEY(0, 3, GROUP_2 | KEY_F7),
67 KEY(3, 1, GROUP_2 | KEY_F8), 67 KEY(1, 3, GROUP_2 | KEY_F8),
68 KEY(3, 2, GROUP_2 | KEY_F6), 68 KEY(2, 3, GROUP_2 | KEY_F6),
69 0
70}; 69};
71 70
72static struct resource nokia770_kp_resources[] = { 71static struct resource nokia770_kp_resources[] = {
@@ -77,11 +76,15 @@ static struct resource nokia770_kp_resources[] = {
77 }, 76 },
78}; 77};
79 78
79static const struct matrix_keymap_data nokia770_keymap_data = {
80 .keymap = nokia770_keymap,
81 .keymap_size = ARRAY_SIZE(nokia770_keymap),
82};
83
80static struct omap_kp_platform_data nokia770_kp_data = { 84static struct omap_kp_platform_data nokia770_kp_data = {
81 .rows = 8, 85 .rows = 8,
82 .cols = 8, 86 .cols = 8,
83 .keymap = nokia770_keymap, 87 .keymap_data = &nokia770_keymap_data,
84 .keymapsize = ARRAY_SIZE(nokia770_keymap),
85 .delay = 4, 88 .delay = 4,
86}; 89};
87 90
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index d44e7172efc2..7c5e2112c776 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -338,25 +338,28 @@ static struct i2c_board_info __initdata mistral_i2c_board_info[] = {
338 */ 338 */
339}; 339};
340 340
341static const int osk_keymap[] = { 341static const unsigned int osk_keymap[] = {
342 /* KEY(col, row, code) */ 342 /* KEY(col, row, code) */
343 KEY(0, 0, KEY_F1), /* SW4 */ 343 KEY(0, 0, KEY_F1), /* SW4 */
344 KEY(0, 3, KEY_UP), /* (sw2/up) */ 344 KEY(3, 0, KEY_UP), /* (sw2/up) */
345 KEY(1, 1, KEY_LEFTCTRL), /* SW5 */ 345 KEY(1, 1, KEY_LEFTCTRL), /* SW5 */
346 KEY(1, 2, KEY_LEFT), /* (sw2/left) */ 346 KEY(2, 1, KEY_LEFT), /* (sw2/left) */
347 KEY(2, 0, KEY_SPACE), /* SW3 */ 347 KEY(0, 2, KEY_SPACE), /* SW3 */
348 KEY(2, 1, KEY_ESC), /* SW6 */ 348 KEY(1, 2, KEY_ESC), /* SW6 */
349 KEY(2, 2, KEY_DOWN), /* (sw2/down) */ 349 KEY(2, 2, KEY_DOWN), /* (sw2/down) */
350 KEY(3, 2, KEY_ENTER), /* (sw2/select) */ 350 KEY(2, 3, KEY_ENTER), /* (sw2/select) */
351 KEY(3, 3, KEY_RIGHT), /* (sw2/right) */ 351 KEY(3, 3, KEY_RIGHT), /* (sw2/right) */
352 0 352};
353
354static const struct matrix_keymap_data osk_keymap_data = {
355 .keymap = osk_keymap,
356 .keymap_size = ARRAY_SIZE(osk_keymap),
353}; 357};
354 358
355static struct omap_kp_platform_data osk_kp_data = { 359static struct omap_kp_platform_data osk_kp_data = {
356 .rows = 8, 360 .rows = 8,
357 .cols = 8, 361 .cols = 8,
358 .keymap = (int *) osk_keymap, 362 .keymap_data = &osk_keymap_data,
359 .keymapsize = ARRAY_SIZE(osk_keymap),
360 .delay = 9, 363 .delay = 9,
361}; 364};
362 365
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 994dc6f50729..fb51ce6123d8 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -65,25 +65,29 @@ static void __init omap_palmte_init_irq(void)
65 omap_init_irq(); 65 omap_init_irq();
66} 66}
67 67
68static const int palmte_keymap[] = { 68static const unsigned int palmte_keymap[] = {
69 KEY(0, 0, KEY_F1), /* Calendar */ 69 KEY(0, 0, KEY_F1), /* Calendar */
70 KEY(0, 1, KEY_F2), /* Contacts */ 70 KEY(1, 0, KEY_F2), /* Contacts */
71 KEY(0, 2, KEY_F3), /* Tasks List */ 71 KEY(2, 0, KEY_F3), /* Tasks List */
72 KEY(0, 3, KEY_F4), /* Note Pad */ 72 KEY(3, 0, KEY_F4), /* Note Pad */
73 KEY(0, 4, KEY_POWER), 73 KEY(4, 0, KEY_POWER),
74 KEY(1, 0, KEY_LEFT), 74 KEY(0, 1, KEY_LEFT),
75 KEY(1, 1, KEY_DOWN), 75 KEY(1, 1, KEY_DOWN),
76 KEY(1, 2, KEY_UP), 76 KEY(2, 1, KEY_UP),
77 KEY(1, 3, KEY_RIGHT), 77 KEY(3, 1, KEY_RIGHT),
78 KEY(1, 4, KEY_ENTER), 78 KEY(4, 1, KEY_ENTER),
79 0, 79};
80
81static const struct matrix_keymap_data palmte_keymap_data = {
82 .keymap = palmte_keymap,
83 .keymap_size = ARRAY_SIZE(palmte_keymap),
80}; 84};
81 85
82static struct omap_kp_platform_data palmte_kp_data = { 86static struct omap_kp_platform_data palmte_kp_data = {
83 .rows = 8, 87 .rows = 8,
84 .cols = 8, 88 .cols = 8,
85 .keymap = (int *) palmte_keymap, 89 .keymap_data = &palmte_keymap_data,
86 .rep = 1, 90 .rep = true,
87 .delay = 12, 91 .delay = 12,
88}; 92};
89 93
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index ed1400a67f75..f04f2d36e7d3 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -51,19 +51,18 @@
51#define PALMTT_MMC_WP_GPIO 8 51#define PALMTT_MMC_WP_GPIO 8
52#define PALMTT_HDQ_GPIO 11 52#define PALMTT_HDQ_GPIO 11
53 53
54static int palmtt_keymap[] = { 54static const unsigned int palmtt_keymap[] = {
55 KEY(0, 0, KEY_ESC), 55 KEY(0, 0, KEY_ESC),
56 KEY(0, 1, KEY_SPACE), 56 KEY(1, 0, KEY_SPACE),
57 KEY(0, 2, KEY_LEFTCTRL), 57 KEY(2, 0, KEY_LEFTCTRL),
58 KEY(0, 3, KEY_TAB), 58 KEY(3, 0, KEY_TAB),
59 KEY(0, 4, KEY_ENTER), 59 KEY(4, 0, KEY_ENTER),
60 KEY(1, 0, KEY_LEFT), 60 KEY(0, 1, KEY_LEFT),
61 KEY(1, 1, KEY_DOWN), 61 KEY(1, 1, KEY_DOWN),
62 KEY(1, 2, KEY_UP), 62 KEY(2, 1, KEY_UP),
63 KEY(1, 3, KEY_RIGHT), 63 KEY(3, 1, KEY_RIGHT),
64 KEY(2, 0, KEY_SLEEP), 64 KEY(0, 2, KEY_SLEEP),
65 KEY(2, 4, KEY_Y), 65 KEY(4, 2, KEY_Y),
66 0
67}; 66};
68 67
69static struct mtd_partition palmtt_partitions[] = { 68static struct mtd_partition palmtt_partitions[] = {
@@ -136,10 +135,15 @@ static struct resource palmtt_kp_resources[] = {
136 }, 135 },
137}; 136};
138 137
138static const struct matrix_keymap_data palmtt_keymap_data = {
139 .keymap = palmtt_keymap,
140 .keymap_size = ARRAY_SIZE(palmtt_keymap),
141};
142
139static struct omap_kp_platform_data palmtt_kp_data = { 143static struct omap_kp_platform_data palmtt_kp_data = {
140 .rows = 6, 144 .rows = 6,
141 .cols = 3, 145 .cols = 3,
142 .keymap = palmtt_keymap, 146 .keymap_data = &palmtt_keymap_data,
143}; 147};
144 148
145static struct platform_device palmtt_kp_device = { 149static struct platform_device palmtt_kp_device = {
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 2afac598baee..d7bbbe721a75 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -64,26 +64,30 @@ omap_palmz71_init_irq(void)
64 omap_init_irq(); 64 omap_init_irq();
65} 65}
66 66
67static int palmz71_keymap[] = { 67static const unsigned int palmz71_keymap[] = {
68 KEY(0, 0, KEY_F1), 68 KEY(0, 0, KEY_F1),
69 KEY(0, 1, KEY_F2), 69 KEY(1, 0, KEY_F2),
70 KEY(0, 2, KEY_F3), 70 KEY(2, 0, KEY_F3),
71 KEY(0, 3, KEY_F4), 71 KEY(3, 0, KEY_F4),
72 KEY(0, 4, KEY_POWER), 72 KEY(4, 0, KEY_POWER),
73 KEY(1, 0, KEY_LEFT), 73 KEY(0, 1, KEY_LEFT),
74 KEY(1, 1, KEY_DOWN), 74 KEY(1, 1, KEY_DOWN),
75 KEY(1, 2, KEY_UP), 75 KEY(2, 1, KEY_UP),
76 KEY(1, 3, KEY_RIGHT), 76 KEY(3, 1, KEY_RIGHT),
77 KEY(1, 4, KEY_ENTER), 77 KEY(4, 1, KEY_ENTER),
78 KEY(2, 0, KEY_CAMERA), 78 KEY(0, 2, KEY_CAMERA),
79 0, 79};
80
81static const struct matrix_keymap_data palmz71_keymap_data = {
82 .keymap = palmz71_keymap,
83 .keymap_size = ARRAY_SIZE(palmz71_keymap),
80}; 84};
81 85
82static struct omap_kp_platform_data palmz71_kp_data = { 86static struct omap_kp_platform_data palmz71_kp_data = {
83 .rows = 8, 87 .rows = 8,
84 .cols = 8, 88 .cols = 8,
85 .keymap = palmz71_keymap, 89 .keymap_data = &palmz71_keymap_data,
86 .rep = 1, 90 .rep = true,
87 .delay = 80, 91 .delay = 80,
88}; 92};
89 93
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 69fda218fb45..3c8ee8489458 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -36,36 +36,35 @@
36#include <plat/common.h> 36#include <plat/common.h>
37#include <plat/board.h> 37#include <plat/board.h>
38 38
39static int p2_keymap[] = { 39static const unsigned int p2_keymap[] = {
40 KEY(0,0,KEY_UP), 40 KEY(0, 0, KEY_UP),
41 KEY(0,1,KEY_RIGHT), 41 KEY(1, 0, KEY_RIGHT),
42 KEY(0,2,KEY_LEFT), 42 KEY(2, 0, KEY_LEFT),
43 KEY(0,3,KEY_DOWN), 43 KEY(3, 0, KEY_DOWN),
44 KEY(0,4,KEY_ENTER), 44 KEY(4, 0, KEY_ENTER),
45 KEY(1,0,KEY_F10), 45 KEY(0, 1, KEY_F10),
46 KEY(1,1,KEY_SEND), 46 KEY(1, 1, KEY_SEND),
47 KEY(1,2,KEY_END), 47 KEY(2, 1, KEY_END),
48 KEY(1,3,KEY_VOLUMEDOWN), 48 KEY(3, 1, KEY_VOLUMEDOWN),
49 KEY(1,4,KEY_VOLUMEUP), 49 KEY(4, 1, KEY_VOLUMEUP),
50 KEY(1,5,KEY_RECORD), 50 KEY(5, 1, KEY_RECORD),
51 KEY(2,0,KEY_F9), 51 KEY(0, 2, KEY_F9),
52 KEY(2,1,KEY_3), 52 KEY(1, 2, KEY_3),
53 KEY(2,2,KEY_6), 53 KEY(2, 2, KEY_6),
54 KEY(2,3,KEY_9), 54 KEY(3, 2, KEY_9),
55 KEY(2,4,KEY_KPDOT), 55 KEY(4, 2, KEY_KPDOT),
56 KEY(3,0,KEY_BACK), 56 KEY(0, 3, KEY_BACK),
57 KEY(3,1,KEY_2), 57 KEY(1, 3, KEY_2),
58 KEY(3,2,KEY_5), 58 KEY(2, 3, KEY_5),
59 KEY(3,3,KEY_8), 59 KEY(3, 3, KEY_8),
60 KEY(3,4,KEY_0), 60 KEY(4, 3, KEY_0),
61 KEY(3,5,KEY_KPSLASH), 61 KEY(5, 3, KEY_KPSLASH),
62 KEY(4,0,KEY_HOME), 62 KEY(0, 4, KEY_HOME),
63 KEY(4,1,KEY_1), 63 KEY(1, 4, KEY_1),
64 KEY(4,2,KEY_4), 64 KEY(2, 4, KEY_4),
65 KEY(4,3,KEY_7), 65 KEY(3, 4, KEY_7),
66 KEY(4,4,KEY_KPASTERISK), 66 KEY(4, 4, KEY_KPASTERISK),
67 KEY(4,5,KEY_POWER), 67 KEY(5, 4, KEY_POWER),
68 0
69}; 68};
70 69
71static struct smc91x_platdata smc91x_info = { 70static struct smc91x_platdata smc91x_info = {
@@ -211,13 +210,17 @@ static struct resource kp_resources[] = {
211 }, 210 },
212}; 211};
213 212
213static const struct matrix_keymap_data p2_keymap_data = {
214 .keymap = p2_keymap,
215 .keymap_size = ARRAY_SIZE(p2_keymap),
216};
217
214static struct omap_kp_platform_data kp_data = { 218static struct omap_kp_platform_data kp_data = {
215 .rows = 8, 219 .rows = 8,
216 .cols = 8, 220 .cols = 8,
217 .keymap = p2_keymap, 221 .keymap_data = &p2_keymap_data,
218 .keymapsize = ARRAY_SIZE(p2_keymap),
219 .delay = 4, 222 .delay = 4,
220 .dbounce = 1, 223 .dbounce = true,
221}; 224};
222 225
223static struct platform_device kp_device = { 226static struct platform_device kp_device = {
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 463862c67819..d41fe2d0616a 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -164,36 +164,35 @@ EXPORT_SYMBOL(sx1_setusbpower);
164 164
165/*----------- Keypad -------------------------*/ 165/*----------- Keypad -------------------------*/
166 166
167static int sx1_keymap[] = { 167static const unsigned int sx1_keymap[] = {
168 KEY(5, 3, GROUP_0 | 117), /* camera Qt::Key_F17 */ 168 KEY(3, 5, GROUP_0 | 117), /* camera Qt::Key_F17 */
169 KEY(0, 4, GROUP_0 | 114), /* voice memo Qt::Key_F14 */ 169 KEY(4, 0, GROUP_0 | 114), /* voice memo Qt::Key_F14 */
170 KEY(1, 4, GROUP_2 | 114), /* voice memo */ 170 KEY(4, 1, GROUP_2 | 114), /* voice memo */
171 KEY(2, 4, GROUP_3 | 114), /* voice memo */ 171 KEY(4, 2, GROUP_3 | 114), /* voice memo */
172 KEY(0, 0, GROUP_1 | KEY_F12), /* red button Qt::Key_Hangup */ 172 KEY(0, 0, GROUP_1 | KEY_F12), /* red button Qt::Key_Hangup */
173 KEY(4, 3, GROUP_1 | KEY_LEFT), 173 KEY(3, 4, GROUP_1 | KEY_LEFT),
174 KEY(2, 3, GROUP_1 | KEY_DOWN), 174 KEY(3, 2, GROUP_1 | KEY_DOWN),
175 KEY(1, 3, GROUP_1 | KEY_RIGHT), 175 KEY(3, 1, GROUP_1 | KEY_RIGHT),
176 KEY(0, 3, GROUP_1 | KEY_UP), 176 KEY(3, 0, GROUP_1 | KEY_UP),
177 KEY(3, 3, GROUP_1 | KEY_POWER), /* joystick press or Qt::Key_Select */ 177 KEY(3, 3, GROUP_1 | KEY_POWER), /* joystick press or Qt::Key_Select */
178 KEY(5, 0, GROUP_1 | KEY_1), 178 KEY(0, 5, GROUP_1 | KEY_1),
179 KEY(4, 0, GROUP_1 | KEY_2), 179 KEY(0, 4, GROUP_1 | KEY_2),
180 KEY(3, 0, GROUP_1 | KEY_3), 180 KEY(0, 3, GROUP_1 | KEY_3),
181 KEY(3, 4, GROUP_1 | KEY_4), 181 KEY(4, 3, GROUP_1 | KEY_4),
182 KEY(4, 4, GROUP_1 | KEY_5), 182 KEY(4, 4, GROUP_1 | KEY_5),
183 KEY(5, 4, GROUP_1 | KEY_KPASTERISK),/* "*" */ 183 KEY(4, 5, GROUP_1 | KEY_KPASTERISK),/* "*" */
184 KEY(4, 1, GROUP_1 | KEY_6), 184 KEY(1, 4, GROUP_1 | KEY_6),
185 KEY(5, 1, GROUP_1 | KEY_7), 185 KEY(1, 5, GROUP_1 | KEY_7),
186 KEY(3, 1, GROUP_1 | KEY_8), 186 KEY(1, 3, GROUP_1 | KEY_8),
187 KEY(3, 2, GROUP_1 | KEY_9), 187 KEY(2, 3, GROUP_1 | KEY_9),
188 KEY(5, 2, GROUP_1 | KEY_0), 188 KEY(2, 5, GROUP_1 | KEY_0),
189 KEY(4, 2, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */ 189 KEY(2, 4, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */
190 KEY(0, 1, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */ 190 KEY(1, 0, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */
191 KEY(1, 2, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */ 191 KEY(2, 1, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */
192 KEY(2, 2, GROUP_1 | KEY_F8), /* right soft Qt::Key_Back */ 192 KEY(2, 2, GROUP_1 | KEY_F8), /* right soft Qt::Key_Back */
193 KEY(2, 1, GROUP_1 | KEY_LEFTSHIFT), /* shift */ 193 KEY(1, 2, GROUP_1 | KEY_LEFTSHIFT), /* shift */
194 KEY(1, 1, GROUP_1 | KEY_BACKSPACE), /* C (clear) */ 194 KEY(1, 1, GROUP_1 | KEY_BACKSPACE), /* C (clear) */
195 KEY(0, 2, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */ 195 KEY(2, 0, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */
196 0
197}; 196};
198 197
199static struct resource sx1_kp_resources[] = { 198static struct resource sx1_kp_resources[] = {
@@ -204,11 +203,15 @@ static struct resource sx1_kp_resources[] = {
204 }, 203 },
205}; 204};
206 205
206static const struct matrix_keymap_data sx1_keymap_data = {
207 .keymap = sx1_keymap,
208 .keymap_size = ARRAY_SIZE(sx1_keymap),
209};
210
207static struct omap_kp_platform_data sx1_kp_data = { 211static struct omap_kp_platform_data sx1_kp_data = {
208 .rows = 6, 212 .rows = 6,
209 .cols = 6, 213 .cols = 6,
210 .keymap = sx1_keymap, 214 .keymap_data = &sx1_keymap_data,
211 .keymapsize = ARRAY_SIZE(sx1_keymap),
212 .delay = 80, 215 .delay = 80,
213}; 216};
214 217
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
new file mode 100644
index 000000000000..d8559344c6e2
--- /dev/null
+++ b/arch/arm/mach-omap1/dma.c
@@ -0,0 +1,390 @@
1/*
2 * OMAP1/OMAP7xx - specific DMA driver
3 *
4 * Copyright (C) 2003 - 2008 Nokia Corporation
5 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
6 * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
7 * Graphics DMA and LCD DMA graphics tranformations
8 * by Imre Deak <imre.deak@nokia.com>
9 * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
10 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
11 *
12 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
13 * Converted DMA library into platform driver
14 * - G, Manjunath Kondaiah <manjugk@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
21#include <linux/err.h>
22#include <linux/io.h>
23#include <linux/slab.h>
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/device.h>
27
28#include <plat/dma.h>
29#include <plat/tc.h>
30#include <plat/irqs.h>
31
32#define OMAP1_DMA_BASE (0xfffed800)
33#define OMAP1_LOGICAL_DMA_CH_COUNT 17
34#define OMAP1_DMA_STRIDE 0x40
35
36static u32 errata;
37static u32 enable_1510_mode;
38static u8 dma_stride;
39static enum omap_reg_offsets dma_common_ch_start, dma_common_ch_end;
40
41static u16 reg_map[] = {
42 [GCR] = 0x400,
43 [GSCR] = 0x404,
44 [GRST1] = 0x408,
45 [HW_ID] = 0x442,
46 [PCH2_ID] = 0x444,
47 [PCH0_ID] = 0x446,
48 [PCH1_ID] = 0x448,
49 [PCHG_ID] = 0x44a,
50 [PCHD_ID] = 0x44c,
51 [CAPS_0] = 0x44e,
52 [CAPS_1] = 0x452,
53 [CAPS_2] = 0x456,
54 [CAPS_3] = 0x458,
55 [CAPS_4] = 0x45a,
56 [PCH2_SR] = 0x460,
57 [PCH0_SR] = 0x480,
58 [PCH1_SR] = 0x482,
59 [PCHD_SR] = 0x4c0,
60
61 /* Common Registers */
62 [CSDP] = 0x00,
63 [CCR] = 0x02,
64 [CICR] = 0x04,
65 [CSR] = 0x06,
66 [CEN] = 0x10,
67 [CFN] = 0x12,
68 [CSFI] = 0x14,
69 [CSEI] = 0x16,
70 [CPC] = 0x18, /* 15xx only */
71 [CSAC] = 0x18,
72 [CDAC] = 0x1a,
73 [CDEI] = 0x1c,
74 [CDFI] = 0x1e,
75 [CLNK_CTRL] = 0x28,
76
77 /* Channel specific register offsets */
78 [CSSA] = 0x08,
79 [CDSA] = 0x0c,
80 [COLOR] = 0x20,
81 [CCR2] = 0x24,
82 [LCH_CTRL] = 0x2a,
83};
84
85static struct resource res[] __initdata = {
86 [0] = {
87 .start = OMAP1_DMA_BASE,
88 .end = OMAP1_DMA_BASE + SZ_2K - 1,
89 .flags = IORESOURCE_MEM,
90 },
91 [1] = {
92 .name = "0",
93 .start = INT_DMA_CH0_6,
94 .flags = IORESOURCE_IRQ,
95 },
96 [2] = {
97 .name = "1",
98 .start = INT_DMA_CH1_7,
99 .flags = IORESOURCE_IRQ,
100 },
101 [3] = {
102 .name = "2",
103 .start = INT_DMA_CH2_8,
104 .flags = IORESOURCE_IRQ,
105 },
106 [4] = {
107 .name = "3",
108 .start = INT_DMA_CH3,
109 .flags = IORESOURCE_IRQ,
110 },
111 [5] = {
112 .name = "4",
113 .start = INT_DMA_CH4,
114 .flags = IORESOURCE_IRQ,
115 },
116 [6] = {
117 .name = "5",
118 .start = INT_DMA_CH5,
119 .flags = IORESOURCE_IRQ,
120 },
121 /* Handled in lcd_dma.c */
122 [7] = {
123 .name = "6",
124 .start = INT_1610_DMA_CH6,
125 .flags = IORESOURCE_IRQ,
126 },
127 /* irq's for omap16xx and omap7xx */
128 [8] = {
129 .name = "7",
130 .start = INT_1610_DMA_CH7,
131 .flags = IORESOURCE_IRQ,
132 },
133 [9] = {
134 .name = "8",
135 .start = INT_1610_DMA_CH8,
136 .flags = IORESOURCE_IRQ,
137 },
138 [10] = {
139 .name = "9",
140 .start = INT_1610_DMA_CH9,
141 .flags = IORESOURCE_IRQ,
142 },
143 [11] = {
144 .name = "10",
145 .start = INT_1610_DMA_CH10,
146 .flags = IORESOURCE_IRQ,
147 },
148 [12] = {
149 .name = "11",
150 .start = INT_1610_DMA_CH11,
151 .flags = IORESOURCE_IRQ,
152 },
153 [13] = {
154 .name = "12",
155 .start = INT_1610_DMA_CH12,
156 .flags = IORESOURCE_IRQ,
157 },
158 [14] = {
159 .name = "13",
160 .start = INT_1610_DMA_CH13,
161 .flags = IORESOURCE_IRQ,
162 },
163 [15] = {
164 .name = "14",
165 .start = INT_1610_DMA_CH14,
166 .flags = IORESOURCE_IRQ,
167 },
168 [16] = {
169 .name = "15",
170 .start = INT_1610_DMA_CH15,
171 .flags = IORESOURCE_IRQ,
172 },
173 [17] = {
174 .name = "16",
175 .start = INT_DMA_LCD,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
180static void __iomem *dma_base;
181static inline void dma_write(u32 val, int reg, int lch)
182{
183 u8 stride;
184 u32 offset;
185
186 stride = (reg >= dma_common_ch_start) ? dma_stride : 0;
187 offset = reg_map[reg] + (stride * lch);
188
189 __raw_writew(val, dma_base + offset);
190 if ((reg > CLNK_CTRL && reg < CCEN) ||
191 (reg > PCHD_ID && reg < CAPS_2)) {
192 u32 offset2 = reg_map[reg] + 2 + (stride * lch);
193 __raw_writew(val >> 16, dma_base + offset2);
194 }
195}
196
197static inline u32 dma_read(int reg, int lch)
198{
199 u8 stride;
200 u32 offset, val;
201
202 stride = (reg >= dma_common_ch_start) ? dma_stride : 0;
203 offset = reg_map[reg] + (stride * lch);
204
205 val = __raw_readw(dma_base + offset);
206 if ((reg > CLNK_CTRL && reg < CCEN) ||
207 (reg > PCHD_ID && reg < CAPS_2)) {
208 u16 upper;
209 u32 offset2 = reg_map[reg] + 2 + (stride * lch);
210 upper = __raw_readw(dma_base + offset2);
211 val |= (upper << 16);
212 }
213 return val;
214}
215
216static void omap1_clear_lch_regs(int lch)
217{
218 int i = dma_common_ch_start;
219
220 for (; i <= dma_common_ch_end; i += 1)
221 dma_write(0, i, lch);
222}
223
224static void omap1_clear_dma(int lch)
225{
226 u32 l;
227
228 l = dma_read(CCR, lch);
229 l &= ~OMAP_DMA_CCR_EN;
230 dma_write(l, CCR, lch);
231
232 /* Clear pending interrupts */
233 l = dma_read(CSR, lch);
234}
235
236static void omap1_show_dma_caps(void)
237{
238 if (enable_1510_mode) {
239 printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
240 } else {
241 u16 w;
242 printk(KERN_INFO "OMAP DMA hardware version %d\n",
243 dma_read(HW_ID, 0));
244 printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n",
245 dma_read(CAPS_0, 0), dma_read(CAPS_1, 0),
246 dma_read(CAPS_2, 0), dma_read(CAPS_3, 0),
247 dma_read(CAPS_4, 0));
248
249 /* Disable OMAP 3.0/3.1 compatibility mode. */
250 w = dma_read(GSCR, 0);
251 w |= 1 << 3;
252 dma_write(w, GSCR, 0);
253 }
254 return;
255}
256
257static u32 configure_dma_errata(void)
258{
259
260 /*
261 * Erratum 3.2/3.3: sometimes 0 is returned if CSAC/CDAC is
262 * read before the DMA controller finished disabling the channel.
263 */
264 if (!cpu_is_omap15xx())
265 SET_DMA_ERRATA(DMA_ERRATA_3_3);
266
267 return errata;
268}
269
270static int __init omap1_system_dma_init(void)
271{
272 struct omap_system_dma_plat_info *p;
273 struct omap_dma_dev_attr *d;
274 struct platform_device *pdev;
275 int ret;
276
277 pdev = platform_device_alloc("omap_dma_system", 0);
278 if (!pdev) {
279 pr_err("%s: Unable to device alloc for dma\n",
280 __func__);
281 return -ENOMEM;
282 }
283
284 dma_base = ioremap(res[0].start, resource_size(&res[0]));
285 if (!dma_base) {
286 pr_err("%s: Unable to ioremap\n", __func__);
287 return -ENODEV;
288 }
289
290 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
291 if (ret) {
292 dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n",
293 __func__, pdev->name, pdev->id);
294 goto exit_device_del;
295 }
296
297 p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
298 if (!p) {
299 dev_err(&pdev->dev, "%s: Unable to allocate 'p' for %s\n",
300 __func__, pdev->name);
301 ret = -ENOMEM;
302 goto exit_device_put;
303 }
304
305 d = kzalloc(sizeof(struct omap_dma_dev_attr), GFP_KERNEL);
306 if (!d) {
307 dev_err(&pdev->dev, "%s: Unable to allocate 'd' for %s\n",
308 __func__, pdev->name);
309 ret = -ENOMEM;
310 goto exit_release_p;
311 }
312
313 d->lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
314
315 /* Valid attributes for omap1 plus processors */
316 if (cpu_is_omap15xx())
317 d->dev_caps = ENABLE_1510_MODE;
318 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
319
320 d->dev_caps |= SRC_PORT;
321 d->dev_caps |= DST_PORT;
322 d->dev_caps |= SRC_INDEX;
323 d->dev_caps |= DST_INDEX;
324 d->dev_caps |= IS_BURST_ONLY4;
325 d->dev_caps |= CLEAR_CSR_ON_READ;
326 d->dev_caps |= IS_WORD_16;
327
328
329 d->chan = kzalloc(sizeof(struct omap_dma_lch) *
330 (d->lch_count), GFP_KERNEL);
331 if (!d->chan) {
332 dev_err(&pdev->dev, "%s: Memory allocation failed"
333 "for d->chan!!!\n", __func__);
334 goto exit_release_d;
335 }
336
337 if (cpu_is_omap15xx())
338 d->chan_count = 9;
339 else if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
340 if (!(d->dev_caps & ENABLE_1510_MODE))
341 d->chan_count = 16;
342 else
343 d->chan_count = 9;
344 }
345
346 p->dma_attr = d;
347
348 p->show_dma_caps = omap1_show_dma_caps;
349 p->clear_lch_regs = omap1_clear_lch_regs;
350 p->clear_dma = omap1_clear_dma;
351 p->dma_write = dma_write;
352 p->dma_read = dma_read;
353 p->disable_irq_lch = NULL;
354
355 p->errata = configure_dma_errata();
356
357 ret = platform_device_add_data(pdev, p, sizeof(*p));
358 if (ret) {
359 dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n",
360 __func__, pdev->name, pdev->id);
361 goto exit_release_chan;
362 }
363
364 ret = platform_device_add(pdev);
365 if (ret) {
366 dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n",
367 __func__, pdev->name, pdev->id);
368 goto exit_release_chan;
369 }
370
371 dma_stride = OMAP1_DMA_STRIDE;
372 dma_common_ch_start = CPC;
373 dma_common_ch_end = COLOR;
374
375 return ret;
376
377exit_release_chan:
378 kfree(d->chan);
379exit_release_d:
380 kfree(d);
381exit_release_p:
382 kfree(p);
383exit_device_put:
384 platform_device_put(pdev);
385exit_device_del:
386 platform_device_del(pdev);
387
388 return ret;
389}
390arch_initcall(omap1_system_dma_init);
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 92b004ba5a10..3e8c9e859f98 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -35,6 +35,8 @@ config ARCH_OMAP3
35 select CPU_V7 35 select CPU_V7
36 select USB_ARCH_HAS_EHCI 36 select USB_ARCH_HAS_EHCI
37 select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4 37 select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4
38 select ARCH_HAS_OPP
39 select PM_OPP if PM
38 40
39config ARCH_OMAP4 41config ARCH_OMAP4
40 bool "TI OMAP4" 42 bool "TI OMAP4"
@@ -44,6 +46,8 @@ config ARCH_OMAP4
44 select ARM_GIC 46 select ARM_GIC
45 select PL310_ERRATA_588369 47 select PL310_ERRATA_588369
46 select ARM_ERRATA_720789 48 select ARM_ERRATA_720789
49 select ARCH_HAS_OPP
50 select PM_OPP if PM
47 51
48comment "OMAP Core Type" 52comment "OMAP Core Type"
49 depends on ARCH_OMAP2 53 depends on ARCH_OMAP2
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b86b06292388..1b699d3c6cb8 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \ 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
7 common.o gpio.o 7 common.o gpio.o dma.o
8 8
9omap-2-3-common = irq.o sdrc.o prm2xxx_3xxx.o 9omap-2-3-common = irq.o sdrc.o prm2xxx_3xxx.o
10hwmod-common = omap_hwmod.o \ 10hwmod-common = omap_hwmod.o \
@@ -49,6 +49,13 @@ obj-$(CONFIG_ARCH_OMAP4) += mux44xx.o
49obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o 49obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
50# obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o 50# obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o
51 51
52# OPP table initialization
53ifeq ($(CONFIG_PM_OPP),y)
54obj-y += opp.o
55obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o
56obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o
57endif
58
52# Power Management 59# Power Management
53ifeq ($(CONFIG_PM),y) 60ifeq ($(CONFIG_PM),y)
54obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o 61obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index a30a7fce8cbf..7392c67ce109 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -118,27 +118,27 @@ static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
118 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0); 118 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
119 119
120 if (gpio_is_valid(dssdev->reset_gpio)) 120 if (gpio_is_valid(dssdev->reset_gpio))
121 gpio_set_value(dssdev->reset_gpio, 1); 121 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
122 return 0; 122 return 0;
123} 123}
124 124
125static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev) 125static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
126{ 126{
127 if (gpio_is_valid(dssdev->reset_gpio)) 127 if (gpio_is_valid(dssdev->reset_gpio))
128 gpio_set_value(dssdev->reset_gpio, 0); 128 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
129} 129}
130 130
131static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev) 131static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
132{ 132{
133 if (gpio_is_valid(dssdev->reset_gpio)) 133 if (gpio_is_valid(dssdev->reset_gpio))
134 gpio_set_value(dssdev->reset_gpio, 1); 134 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
135 return 0; 135 return 0;
136} 136}
137 137
138static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev) 138static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
139{ 139{
140 if (gpio_is_valid(dssdev->reset_gpio)) 140 if (gpio_is_valid(dssdev->reset_gpio))
141 gpio_set_value(dssdev->reset_gpio, 0); 141 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
142} 142}
143 143
144static struct regulator_consumer_supply devkit8000_vmmc1_supply = 144static struct regulator_consumer_supply devkit8000_vmmc1_supply =
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0a2d73cf036f..b386a403c379 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -51,38 +51,37 @@
51static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; 51static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
52static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; 52static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
53 53
54static int h4_keymap[] = { 54static const unsigned int h4_keymap[] = {
55 KEY(0, 0, KEY_LEFT), 55 KEY(0, 0, KEY_LEFT),
56 KEY(0, 1, KEY_RIGHT), 56 KEY(1, 0, KEY_RIGHT),
57 KEY(0, 2, KEY_A), 57 KEY(2, 0, KEY_A),
58 KEY(0, 3, KEY_B), 58 KEY(3, 0, KEY_B),
59 KEY(0, 4, KEY_C), 59 KEY(4, 0, KEY_C),
60 KEY(1, 0, KEY_DOWN), 60 KEY(0, 1, KEY_DOWN),
61 KEY(1, 1, KEY_UP), 61 KEY(1, 1, KEY_UP),
62 KEY(1, 2, KEY_E), 62 KEY(2, 1, KEY_E),
63 KEY(1, 3, KEY_F), 63 KEY(3, 1, KEY_F),
64 KEY(1, 4, KEY_G), 64 KEY(4, 1, KEY_G),
65 KEY(2, 0, KEY_ENTER), 65 KEY(0, 2, KEY_ENTER),
66 KEY(2, 1, KEY_I), 66 KEY(1, 2, KEY_I),
67 KEY(2, 2, KEY_J), 67 KEY(2, 2, KEY_J),
68 KEY(2, 3, KEY_K), 68 KEY(3, 2, KEY_K),
69 KEY(2, 4, KEY_3), 69 KEY(4, 2, KEY_3),
70 KEY(3, 0, KEY_M), 70 KEY(0, 3, KEY_M),
71 KEY(3, 1, KEY_N), 71 KEY(1, 3, KEY_N),
72 KEY(3, 2, KEY_O), 72 KEY(2, 3, KEY_O),
73 KEY(3, 3, KEY_P), 73 KEY(3, 3, KEY_P),
74 KEY(3, 4, KEY_Q), 74 KEY(4, 3, KEY_Q),
75 KEY(4, 0, KEY_R), 75 KEY(0, 4, KEY_R),
76 KEY(4, 1, KEY_4), 76 KEY(1, 4, KEY_4),
77 KEY(4, 2, KEY_T), 77 KEY(2, 4, KEY_T),
78 KEY(4, 3, KEY_U), 78 KEY(3, 4, KEY_U),
79 KEY(4, 4, KEY_ENTER), 79 KEY(4, 4, KEY_ENTER),
80 KEY(5, 0, KEY_V), 80 KEY(0, 5, KEY_V),
81 KEY(5, 1, KEY_W), 81 KEY(1, 5, KEY_W),
82 KEY(5, 2, KEY_L), 82 KEY(2, 5, KEY_L),
83 KEY(5, 3, KEY_S), 83 KEY(3, 5, KEY_S),
84 KEY(5, 4, KEY_ENTER), 84 KEY(4, 5, KEY_ENTER),
85 0
86}; 85};
87 86
88static struct mtd_partition h4_partitions[] = { 87static struct mtd_partition h4_partitions[] = {
@@ -136,12 +135,16 @@ static struct platform_device h4_flash_device = {
136 .resource = &h4_flash_resource, 135 .resource = &h4_flash_resource,
137}; 136};
138 137
138static const struct matrix_keymap_data h4_keymap_data = {
139 .keymap = h4_keymap,
140 .keymap_size = ARRAY_SIZE(h4_keymap),
141};
142
139static struct omap_kp_platform_data h4_kp_data = { 143static struct omap_kp_platform_data h4_kp_data = {
140 .rows = 6, 144 .rows = 6,
141 .cols = 7, 145 .cols = 7,
142 .keymap = h4_keymap, 146 .keymap_data = &h4_keymap_data,
143 .keymapsize = ARRAY_SIZE(h4_keymap), 147 .rep = true,
144 .rep = 1,
145 .row_gpios = row_gpios, 148 .row_gpios = row_gpios,
146 .col_gpios = col_gpios, 149 .col_gpios = col_gpios,
147}; 150};
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index b82f2319a091..d4a9aa41e877 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -142,6 +142,7 @@ static struct omap2_hsmmc_info mmc[] = {
142 .mmc = 1, 142 .mmc = 1,
143 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 143 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
144 .gpio_wp = -EINVAL, 144 .gpio_wp = -EINVAL,
145 .gpio_cd = -EINVAL,
145 }, 146 },
146 {} /* Terminator */ 147 {} /* Terminator */
147}; 148};
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index fd95ccf8be5c..e75e240cad67 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -359,17 +359,12 @@ static struct regulator_consumer_supply rx51_vio_supplies[] = {
359 REGULATOR_SUPPLY("DVDD", "2-0019"), 359 REGULATOR_SUPPLY("DVDD", "2-0019"),
360}; 360};
361 361
362#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
363extern struct platform_device rx51_display_device;
364#endif
365
366static struct regulator_consumer_supply rx51_vaux1_consumers[] = { 362static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
367#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) 363 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
368 { 364};
369 .supply = "vdds_sdi", 365
370 .dev = &rx51_display_device.dev, 366static struct regulator_consumer_supply rx51_vdac_supply[] = {
371 }, 367 REGULATOR_SUPPLY("vdda_dac", "omapdss"),
372#endif
373}; 368};
374 369
375static struct regulator_init_data rx51_vaux1 = { 370static struct regulator_init_data rx51_vaux1 = {
@@ -489,14 +484,17 @@ static struct regulator_init_data rx51_vsim = {
489 484
490static struct regulator_init_data rx51_vdac = { 485static struct regulator_init_data rx51_vdac = {
491 .constraints = { 486 .constraints = {
487 .name = "VDAC",
492 .min_uV = 1800000, 488 .min_uV = 1800000,
493 .max_uV = 1800000, 489 .max_uV = 1800000,
490 .apply_uV = true,
494 .valid_modes_mask = REGULATOR_MODE_NORMAL 491 .valid_modes_mask = REGULATOR_MODE_NORMAL
495 | REGULATOR_MODE_STANDBY, 492 | REGULATOR_MODE_STANDBY,
496 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 493 .valid_ops_mask = REGULATOR_CHANGE_MODE
497 | REGULATOR_CHANGE_MODE
498 | REGULATOR_CHANGE_STATUS, 494 | REGULATOR_CHANGE_STATUS,
499 }, 495 },
496 .num_consumer_supplies = 1,
497 .consumer_supplies = rx51_vdac_supply,
500}; 498};
501 499
502static struct regulator_init_data rx51_vio = { 500static struct regulator_init_data rx51_vio = {
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c
index 9919581f3911..acd670054d9a 100644
--- a/arch/arm/mach-omap2/board-rx51-video.c
+++ b/arch/arm/mach-omap2/board-rx51-video.c
@@ -24,9 +24,6 @@
24#include "mux.h" 24#include "mux.h"
25 25
26#define RX51_LCD_RESET_GPIO 90 26#define RX51_LCD_RESET_GPIO 90
27/* REVISIT to verify with rx51.c at sound/soc/omap */
28#define RX51_TVOUT_SEL_GPIO 40
29
30 27
31#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) 28#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
32 29
@@ -41,17 +38,6 @@ static void rx51_lcd_disable(struct omap_dss_device *dssdev)
41 gpio_set_value(dssdev->reset_gpio, 0); 38 gpio_set_value(dssdev->reset_gpio, 0);
42} 39}
43 40
44static int rx51_tvout_enable(struct omap_dss_device *dssdev)
45{
46 gpio_set_value(dssdev->reset_gpio, 1);
47 return 0;
48}
49
50static void rx51_tvout_disable(struct omap_dss_device *dssdev)
51{
52 gpio_set_value(dssdev->reset_gpio, 0);
53}
54
55static struct omap_dss_device rx51_lcd_device = { 41static struct omap_dss_device rx51_lcd_device = {
56 .name = "lcd", 42 .name = "lcd",
57 .driver_name = "panel-acx565akm", 43 .driver_name = "panel-acx565akm",
@@ -67,9 +53,6 @@ static struct omap_dss_device rx51_tv_device = {
67 .type = OMAP_DISPLAY_TYPE_VENC, 53 .type = OMAP_DISPLAY_TYPE_VENC,
68 .driver_name = "venc", 54 .driver_name = "venc",
69 .phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE, 55 .phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE,
70 .reset_gpio = RX51_TVOUT_SEL_GPIO,
71 .platform_enable = rx51_tvout_enable,
72 .platform_disable = rx51_tvout_disable,
73}; 56};
74 57
75static struct omap_dss_device *rx51_dss_devices[] = { 58static struct omap_dss_device *rx51_dss_devices[] = {
@@ -112,9 +95,6 @@ static int __init rx51_video_init(void)
112 95
113 gpio_direction_output(RX51_LCD_RESET_GPIO, 1); 96 gpio_direction_output(RX51_LCD_RESET_GPIO, 1);
114 97
115 /* REVISIT to verify with rx51.c at sound/soc/omap */
116 gpio_direction_output(RX51_TVOUT_SEL_GPIO, 1);
117
118 platform_add_devices(rx51_video_devices, 98 platform_add_devices(rx51_video_devices,
119 ARRAY_SIZE(rx51_video_devices)); 99 ARRAY_SIZE(rx51_video_devices));
120 return 0; 100 return 0;
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 1fa3294b6048..0269bb055b69 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -239,9 +239,19 @@ void omap3_save_scratchpad_contents(void)
239 struct omap3_scratchpad_prcm_block prcm_block_contents; 239 struct omap3_scratchpad_prcm_block prcm_block_contents;
240 struct omap3_scratchpad_sdrc_block sdrc_block_contents; 240 struct omap3_scratchpad_sdrc_block sdrc_block_contents;
241 241
242 /* Populate the Scratchpad contents */ 242 /*
243 * Populate the Scratchpad contents
244 *
245 * The "get_*restore_pointer" functions are used to provide a
246 * physical restore address where the ROM code jumps while waking
247 * up from MPU OFF/OSWR state.
248 * The restore pointer is stored into the scratchpad.
249 */
243 scratchpad_contents.boot_config_ptr = 0x0; 250 scratchpad_contents.boot_config_ptr = 0x0;
244 if (omap_rev() != OMAP3430_REV_ES3_0 && 251 if (cpu_is_omap3630())
252 scratchpad_contents.public_restore_ptr =
253 virt_to_phys(get_omap3630_restore_pointer());
254 else if (omap_rev() != OMAP3430_REV_ES3_0 &&
245 omap_rev() != OMAP3430_REV_ES3_1) 255 omap_rev() != OMAP3430_REV_ES3_1)
246 scratchpad_contents.public_restore_ptr = 256 scratchpad_contents.public_restore_ptr =
247 virt_to_phys(get_restore_pointer()); 257 virt_to_phys(get_restore_pointer());
@@ -474,4 +484,12 @@ void omap3_control_restore_context(void)
474 omap_ctrl_writel(control_context.csi, OMAP343X_CONTROL_CSI); 484 omap_ctrl_writel(control_context.csi, OMAP343X_CONTROL_CSI);
475 return; 485 return;
476} 486}
487
488void omap3630_ctrl_disable_rta(void)
489{
490 if (!cpu_is_omap3630())
491 return;
492 omap_ctrl_writel(OMAP36XX_RTA_DISABLE, OMAP36XX_CONTROL_MEM_RTA_CTRL);
493}
494
477#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ 495#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index b6c6b7c450b3..ea20dc310522 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -204,6 +204,10 @@
204#define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014) 204#define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014)
205#define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018) 205#define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018)
206 206
207/* 36xx-only RTA - Retention till Accesss control registers and bits */
208#define OMAP36XX_CONTROL_MEM_RTA_CTRL 0x40C
209#define OMAP36XX_RTA_DISABLE 0x0
210
207/* 34xx D2D idle-related pins, handled by PM core */ 211/* 34xx D2D idle-related pins, handled by PM core */
208#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 212#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
209#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 213#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
@@ -270,6 +274,8 @@
270#define OMAP343X_SCRATCHPAD_ROM (OMAP343X_CTRL_BASE + 0x860) 274#define OMAP343X_SCRATCHPAD_ROM (OMAP343X_CTRL_BASE + 0x860)
271#define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910) 275#define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910)
272#define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C 276#define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C
277#define OMAP343X_SCRATCHPAD_REGADDR(reg) OMAP2_L4_IO_ADDRESS(\
278 OMAP343X_SCRATCHPAD + reg)
273 279
274/* AM35XX_CONTROL_IPSS_CLK_CTRL bits */ 280/* AM35XX_CONTROL_IPSS_CLK_CTRL bits */
275#define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0 281#define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0
@@ -309,7 +315,7 @@
309#define FEAT_SGX_NONE 2 315#define FEAT_SGX_NONE 2
310 316
311#define OMAP3_IVA_SHIFT 12 317#define OMAP3_IVA_SHIFT 12
312#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) 318#define OMAP3_IVA_MASK (1 << OMAP3_IVA_SHIFT)
313#define FEAT_IVA 0 319#define FEAT_IVA 0
314#define FEAT_IVA_NONE 1 320#define FEAT_IVA_NONE 1
315 321
@@ -347,10 +353,11 @@ extern void omap3_save_scratchpad_contents(void);
347extern void omap3_clear_scratchpad_contents(void); 353extern void omap3_clear_scratchpad_contents(void);
348extern u32 *get_restore_pointer(void); 354extern u32 *get_restore_pointer(void);
349extern u32 *get_es3_restore_pointer(void); 355extern u32 *get_es3_restore_pointer(void);
356extern u32 *get_omap3630_restore_pointer(void);
350extern u32 omap3_arm_context[128]; 357extern u32 omap3_arm_context[128];
351extern void omap3_control_save_context(void); 358extern void omap3_control_save_context(void);
352extern void omap3_control_restore_context(void); 359extern void omap3_control_restore_context(void);
353 360extern void omap3630_ctrl_disable_rta(void);
354#else 361#else
355#define omap_ctrl_base_get() 0 362#define omap_ctrl_base_get() 0
356#define omap_ctrl_readb(x) 0 363#define omap_ctrl_readb(x) 0
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 0d50b45d041c..0fb619c52588 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -293,25 +293,26 @@ select_state:
293DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); 293DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
294 294
295/** 295/**
296 * omap3_cpuidle_update_states - Update the cpuidle states. 296 * omap3_cpuidle_update_states() - Update the cpuidle states
297 * @mpu_deepest_state: Enable states upto and including this for mpu domain
298 * @core_deepest_state: Enable states upto and including this for core domain
297 * 299 *
298 * Currently, this function toggles the validity of idle states based upon 300 * This goes through the list of states available and enables and disables the
299 * the flag 'enable_off_mode'. When the flag is set all states are valid. 301 * validity of C states based on deepest state that can be achieved for the
300 * Else, states leading to OFF state set to be invalid. 302 * variable domain
301 */ 303 */
302void omap3_cpuidle_update_states(void) 304void omap3_cpuidle_update_states(u32 mpu_deepest_state, u32 core_deepest_state)
303{ 305{
304 int i; 306 int i;
305 307
306 for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { 308 for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) {
307 struct omap3_processor_cx *cx = &omap3_power_states[i]; 309 struct omap3_processor_cx *cx = &omap3_power_states[i];
308 310
309 if (enable_off_mode) { 311 if ((cx->mpu_state >= mpu_deepest_state) &&
312 (cx->core_state >= core_deepest_state)) {
310 cx->valid = 1; 313 cx->valid = 1;
311 } else { 314 } else {
312 if ((cx->mpu_state == PWRDM_POWER_OFF) || 315 cx->valid = 0;
313 (cx->core_state == PWRDM_POWER_OFF))
314 cx->valid = 0;
315 } 316 }
316 } 317 }
317} 318}
@@ -452,6 +453,18 @@ void omap_init_power_states(void)
452 omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF; 453 omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF;
453 omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID | 454 omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID |
454 CPUIDLE_FLAG_CHECK_BM; 455 CPUIDLE_FLAG_CHECK_BM;
456
457 /*
458 * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot
459 * enable OFF mode in a stable form for previous revisions.
460 * we disable C7 state as a result.
461 */
462 if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) {
463 omap3_power_states[OMAP3_STATE_C7].valid = 0;
464 cpuidle_params_table[OMAP3_STATE_C7].valid = 0;
465 WARN_ONCE(1, "%s: core off state C7 disabled due to i583\n",
466 __func__);
467 }
455} 468}
456 469
457struct cpuidle_driver omap3_idle_driver = { 470struct cpuidle_driver omap3_idle_driver = {
@@ -504,7 +517,10 @@ int __init omap3_idle_init(void)
504 return -EINVAL; 517 return -EINVAL;
505 dev->state_count = count; 518 dev->state_count = count;
506 519
507 omap3_cpuidle_update_states(); 520 if (enable_off_mode)
521 omap3_cpuidle_update_states(PWRDM_POWER_OFF, PWRDM_POWER_OFF);
522 else
523 omap3_cpuidle_update_states(PWRDM_POWER_RET, PWRDM_POWER_RET);
508 524
509 if (cpuidle_register_device(dev)) { 525 if (cpuidle_register_device(dev)) {
510 printk(KERN_ERR "%s: CPUidle register device failed\n", 526 printk(KERN_ERR "%s: CPUidle register device failed\n",
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
new file mode 100644
index 000000000000..d2f15f5cfd36
--- /dev/null
+++ b/arch/arm/mach-omap2/dma.c
@@ -0,0 +1,297 @@
1/*
2 * OMAP2+ DMA driver
3 *
4 * Copyright (C) 2003 - 2008 Nokia Corporation
5 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
6 * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
7 * Graphics DMA and LCD DMA graphics tranformations
8 * by Imre Deak <imre.deak@nokia.com>
9 * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
10 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
11 *
12 * Copyright (C) 2009 Texas Instruments
13 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14 *
15 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
16 * Converted DMA library into platform driver
17 * - G, Manjunath Kondaiah <manjugk@ti.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation.
22 */
23
24#include <linux/err.h>
25#include <linux/io.h>
26#include <linux/slab.h>
27#include <linux/module.h>
28#include <linux/init.h>
29#include <linux/device.h>
30
31#include <plat/omap_hwmod.h>
32#include <plat/omap_device.h>
33#include <plat/dma.h>
34
35#define OMAP2_DMA_STRIDE 0x60
36
37static u32 errata;
38static u8 dma_stride;
39
40static struct omap_dma_dev_attr *d;
41
42static enum omap_reg_offsets dma_common_ch_start, dma_common_ch_end;
43
44static u16 reg_map[] = {
45 [REVISION] = 0x00,
46 [GCR] = 0x78,
47 [IRQSTATUS_L0] = 0x08,
48 [IRQSTATUS_L1] = 0x0c,
49 [IRQSTATUS_L2] = 0x10,
50 [IRQSTATUS_L3] = 0x14,
51 [IRQENABLE_L0] = 0x18,
52 [IRQENABLE_L1] = 0x1c,
53 [IRQENABLE_L2] = 0x20,
54 [IRQENABLE_L3] = 0x24,
55 [SYSSTATUS] = 0x28,
56 [OCP_SYSCONFIG] = 0x2c,
57 [CAPS_0] = 0x64,
58 [CAPS_2] = 0x6c,
59 [CAPS_3] = 0x70,
60 [CAPS_4] = 0x74,
61
62 /* Common register offsets */
63 [CCR] = 0x80,
64 [CLNK_CTRL] = 0x84,
65 [CICR] = 0x88,
66 [CSR] = 0x8c,
67 [CSDP] = 0x90,
68 [CEN] = 0x94,
69 [CFN] = 0x98,
70 [CSEI] = 0xa4,
71 [CSFI] = 0xa8,
72 [CDEI] = 0xac,
73 [CDFI] = 0xb0,
74 [CSAC] = 0xb4,
75 [CDAC] = 0xb8,
76
77 /* Channel specific register offsets */
78 [CSSA] = 0x9c,
79 [CDSA] = 0xa0,
80 [CCEN] = 0xbc,
81 [CCFN] = 0xc0,
82 [COLOR] = 0xc4,
83
84 /* OMAP4 specific registers */
85 [CDP] = 0xd0,
86 [CNDP] = 0xd4,
87 [CCDN] = 0xd8,
88};
89
90static struct omap_device_pm_latency omap2_dma_latency[] = {
91 {
92 .deactivate_func = omap_device_idle_hwmods,
93 .activate_func = omap_device_enable_hwmods,
94 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
95 },
96};
97
98static void __iomem *dma_base;
99static inline void dma_write(u32 val, int reg, int lch)
100{
101 u8 stride;
102 u32 offset;
103
104 stride = (reg >= dma_common_ch_start) ? dma_stride : 0;
105 offset = reg_map[reg] + (stride * lch);
106 __raw_writel(val, dma_base + offset);
107}
108
109static inline u32 dma_read(int reg, int lch)
110{
111 u8 stride;
112 u32 offset, val;
113
114 stride = (reg >= dma_common_ch_start) ? dma_stride : 0;
115 offset = reg_map[reg] + (stride * lch);
116 val = __raw_readl(dma_base + offset);
117 return val;
118}
119
120static inline void omap2_disable_irq_lch(int lch)
121{
122 u32 val;
123
124 val = dma_read(IRQENABLE_L0, lch);
125 val &= ~(1 << lch);
126 dma_write(val, IRQENABLE_L0, lch);
127}
128
129static void omap2_clear_dma(int lch)
130{
131 int i = dma_common_ch_start;
132
133 for (; i <= dma_common_ch_end; i += 1)
134 dma_write(0, i, lch);
135}
136
137static void omap2_show_dma_caps(void)
138{
139 u8 revision = dma_read(REVISION, 0) & 0xff;
140 printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
141 revision >> 4, revision & 0xf);
142 return;
143}
144
145static u32 configure_dma_errata(void)
146{
147
148 /*
149 * Errata applicable for OMAP2430ES1.0 and all omap2420
150 *
151 * I.
152 * Erratum ID: Not Available
153 * Inter Frame DMA buffering issue DMA will wrongly
154 * buffer elements if packing and bursting is enabled. This might
155 * result in data gets stalled in FIFO at the end of the block.
156 * Workaround: DMA channels must have BUFFERING_DISABLED bit set to
157 * guarantee no data will stay in the DMA FIFO in case inter frame
158 * buffering occurs
159 *
160 * II.
161 * Erratum ID: Not Available
162 * DMA may hang when several channels are used in parallel
163 * In the following configuration, DMA channel hanging can occur:
164 * a. Channel i, hardware synchronized, is enabled
165 * b. Another channel (Channel x), software synchronized, is enabled.
166 * c. Channel i is disabled before end of transfer
167 * d. Channel i is reenabled.
168 * e. Steps 1 to 4 are repeated a certain number of times.
169 * f. A third channel (Channel y), software synchronized, is enabled.
170 * Channel x and Channel y may hang immediately after step 'f'.
171 * Workaround:
172 * For any channel used - make sure NextLCH_ID is set to the value j.
173 */
174 if (cpu_is_omap2420() || (cpu_is_omap2430() &&
175 (omap_type() == OMAP2430_REV_ES1_0))) {
176
177 SET_DMA_ERRATA(DMA_ERRATA_IFRAME_BUFFERING);
178 SET_DMA_ERRATA(DMA_ERRATA_PARALLEL_CHANNELS);
179 }
180
181 /*
182 * Erratum ID: i378: OMAP2+: sDMA Channel is not disabled
183 * after a transaction error.
184 * Workaround: SW should explicitely disable the channel.
185 */
186 if (cpu_class_is_omap2())
187 SET_DMA_ERRATA(DMA_ERRATA_i378);
188
189 /*
190 * Erratum ID: i541: sDMA FIFO draining does not finish
191 * If sDMA channel is disabled on the fly, sDMA enters standby even
192 * through FIFO Drain is still in progress
193 * Workaround: Put sDMA in NoStandby more before a logical channel is
194 * disabled, then put it back to SmartStandby right after the channel
195 * finishes FIFO draining.
196 */
197 if (cpu_is_omap34xx())
198 SET_DMA_ERRATA(DMA_ERRATA_i541);
199
200 /*
201 * Erratum ID: i88 : Special programming model needed to disable DMA
202 * before end of block.
203 * Workaround: software must ensure that the DMA is configured in No
204 * Standby mode(DMAx_OCP_SYSCONFIG.MIDLEMODE = "01")
205 */
206 if (omap_type() == OMAP3430_REV_ES1_0)
207 SET_DMA_ERRATA(DMA_ERRATA_i88);
208
209 /*
210 * Erratum 3.2/3.3: sometimes 0 is returned if CSAC/CDAC is
211 * read before the DMA controller finished disabling the channel.
212 */
213 SET_DMA_ERRATA(DMA_ERRATA_3_3);
214
215 /*
216 * Erratum ID: Not Available
217 * A bug in ROM code leaves IRQ status for channels 0 and 1 uncleared
218 * after secure sram context save and restore.
219 * Work around: Hence we need to manually clear those IRQs to avoid
220 * spurious interrupts. This affects only secure devices.
221 */
222 if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
223 SET_DMA_ERRATA(DMA_ROMCODE_BUG);
224
225 return errata;
226}
227
228/* One time initializations */
229static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
230{
231 struct omap_device *od;
232 struct omap_system_dma_plat_info *p;
233 struct resource *mem;
234 char *name = "omap_dma_system";
235
236 dma_stride = OMAP2_DMA_STRIDE;
237 dma_common_ch_start = CSDP;
238 if (cpu_is_omap3630() || cpu_is_omap4430())
239 dma_common_ch_end = CCDN;
240 else
241 dma_common_ch_end = CCFN;
242
243 p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
244 if (!p) {
245 pr_err("%s: Unable to allocate pdata for %s:%s\n",
246 __func__, name, oh->name);
247 return -ENOMEM;
248 }
249
250 p->dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
251 p->disable_irq_lch = omap2_disable_irq_lch;
252 p->show_dma_caps = omap2_show_dma_caps;
253 p->clear_dma = omap2_clear_dma;
254 p->dma_write = dma_write;
255 p->dma_read = dma_read;
256
257 p->clear_lch_regs = NULL;
258
259 p->errata = configure_dma_errata();
260
261 od = omap_device_build(name, 0, oh, p, sizeof(*p),
262 omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0);
263 kfree(p);
264 if (IS_ERR(od)) {
265 pr_err("%s: Cant build omap_device for %s:%s.\n",
266 __func__, name, oh->name);
267 return IS_ERR(od);
268 }
269
270 mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0);
271 if (!mem) {
272 dev_err(&od->pdev.dev, "%s: no mem resource\n", __func__);
273 return -EINVAL;
274 }
275 dma_base = ioremap(mem->start, resource_size(mem));
276 if (!dma_base) {
277 dev_err(&od->pdev.dev, "%s: ioremap fail\n", __func__);
278 return -ENOMEM;
279 }
280
281 d = oh->dev_attr;
282 d->chan = kzalloc(sizeof(struct omap_dma_lch) *
283 (d->lch_count), GFP_KERNEL);
284
285 if (!d->chan) {
286 dev_err(&od->pdev.dev, "%s: kzalloc fail\n", __func__);
287 return -ENOMEM;
288 }
289 return 0;
290}
291
292static int __init omap2_system_dma_init(void)
293{
294 return omap_hwmod_for_each_by_class("dma",
295 omap2_system_dma_init_dev, NULL);
296}
297arch_initcall(omap2_system_dma_init);
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4605d5073a9b..5577ab2faad2 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -347,8 +347,7 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
347 else if (cpu_is_omap44xx()) 347 else if (cpu_is_omap44xx())
348 omap44xx_hwmod_init(); 348 omap44xx_hwmod_init();
349 349
350 /* The OPP tables have to be registered before a clk init */ 350 omap_pm_if_early_init();
351 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
352 351
353 if (cpu_is_omap2420()) 352 if (cpu_is_omap2420())
354 omap2420_clk_init(); 353 omap2420_clk_init();
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index d95342599793..42606f6b0cdf 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -42,6 +42,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod;
42static struct omap_hwmod omap2420_gpio2_hwmod; 42static struct omap_hwmod omap2420_gpio2_hwmod;
43static struct omap_hwmod omap2420_gpio3_hwmod; 43static struct omap_hwmod omap2420_gpio3_hwmod;
44static struct omap_hwmod omap2420_gpio4_hwmod; 44static struct omap_hwmod omap2420_gpio4_hwmod;
45static struct omap_hwmod omap2420_dma_system_hwmod;
45 46
46/* L3 -> L4_CORE interface */ 47/* L3 -> L4_CORE interface */
47static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { 48static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
@@ -779,6 +780,88 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
779 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 780 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
780}; 781};
781 782
783/* system dma */
784static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
785 .rev_offs = 0x0000,
786 .sysc_offs = 0x002c,
787 .syss_offs = 0x0028,
788 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
789 SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
790 SYSC_HAS_AUTOIDLE),
791 .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
792 .sysc_fields = &omap_hwmod_sysc_type1,
793};
794
795static struct omap_hwmod_class omap2420_dma_hwmod_class = {
796 .name = "dma",
797 .sysc = &omap2420_dma_sysc,
798};
799
800/* dma attributes */
801static struct omap_dma_dev_attr dma_dev_attr = {
802 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
803 IS_CSSA_32 | IS_CDSA_32,
804 .lch_count = 32,
805};
806
807static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
808 { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
809 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
810 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
811 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
812};
813
814static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
815 {
816 .pa_start = 0x48056000,
817 .pa_end = 0x4a0560ff,
818 .flags = ADDR_TYPE_RT
819 },
820};
821
822/* dma_system -> L3 */
823static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
824 .master = &omap2420_dma_system_hwmod,
825 .slave = &omap2420_l3_main_hwmod,
826 .clk = "core_l3_ck",
827 .user = OCP_USER_MPU | OCP_USER_SDMA,
828};
829
830/* dma_system master ports */
831static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
832 &omap2420_dma_system__l3,
833};
834
835/* l4_core -> dma_system */
836static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
837 .master = &omap2420_l4_core_hwmod,
838 .slave = &omap2420_dma_system_hwmod,
839 .clk = "sdma_ick",
840 .addr = omap2420_dma_system_addrs,
841 .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs),
842 .user = OCP_USER_MPU | OCP_USER_SDMA,
843};
844
845/* dma_system slave ports */
846static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
847 &omap2420_l4_core__dma_system,
848};
849
850static struct omap_hwmod omap2420_dma_system_hwmod = {
851 .name = "dma",
852 .class = &omap2420_dma_hwmod_class,
853 .mpu_irqs = omap2420_dma_system_irqs,
854 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs),
855 .main_clk = "core_l3_ck",
856 .slaves = omap2420_dma_system_slaves,
857 .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
858 .masters = omap2420_dma_system_masters,
859 .masters_cnt = ARRAY_SIZE(omap2420_dma_system_masters),
860 .dev_attr = &dma_dev_attr,
861 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
862 .flags = HWMOD_NO_IDLEST,
863};
864
782static __initdata struct omap_hwmod *omap2420_hwmods[] = { 865static __initdata struct omap_hwmod *omap2420_hwmods[] = {
783 &omap2420_l3_main_hwmod, 866 &omap2420_l3_main_hwmod,
784 &omap2420_l4_core_hwmod, 867 &omap2420_l4_core_hwmod,
@@ -797,6 +880,9 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
797 &omap2420_gpio2_hwmod, 880 &omap2420_gpio2_hwmod,
798 &omap2420_gpio3_hwmod, 881 &omap2420_gpio3_hwmod,
799 &omap2420_gpio4_hwmod, 882 &omap2420_gpio4_hwmod,
883
884 /* dma_system class*/
885 &omap2420_dma_system_hwmod,
800 NULL, 886 NULL,
801}; 887};
802 888
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index ab1d662cb072..3315d241feef 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -43,6 +43,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod;
43static struct omap_hwmod omap2430_gpio3_hwmod; 43static struct omap_hwmod omap2430_gpio3_hwmod;
44static struct omap_hwmod omap2430_gpio4_hwmod; 44static struct omap_hwmod omap2430_gpio4_hwmod;
45static struct omap_hwmod omap2430_gpio5_hwmod; 45static struct omap_hwmod omap2430_gpio5_hwmod;
46static struct omap_hwmod omap2430_dma_system_hwmod;
46 47
47/* L3 -> L4_CORE interface */ 48/* L3 -> L4_CORE interface */
48static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { 49static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
@@ -838,6 +839,88 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
838 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 839 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
839}; 840};
840 841
842/* dma_system */
843static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
844 .rev_offs = 0x0000,
845 .sysc_offs = 0x002c,
846 .syss_offs = 0x0028,
847 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
848 SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
849 SYSC_HAS_AUTOIDLE),
850 .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
851 .sysc_fields = &omap_hwmod_sysc_type1,
852};
853
854static struct omap_hwmod_class omap2430_dma_hwmod_class = {
855 .name = "dma",
856 .sysc = &omap2430_dma_sysc,
857};
858
859/* dma attributes */
860static struct omap_dma_dev_attr dma_dev_attr = {
861 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
862 IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
863 .lch_count = 32,
864};
865
866static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
867 { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
868 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
869 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
870 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
871};
872
873static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
874 {
875 .pa_start = 0x48056000,
876 .pa_end = 0x4a0560ff,
877 .flags = ADDR_TYPE_RT
878 },
879};
880
881/* dma_system -> L3 */
882static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
883 .master = &omap2430_dma_system_hwmod,
884 .slave = &omap2430_l3_main_hwmod,
885 .clk = "core_l3_ck",
886 .user = OCP_USER_MPU | OCP_USER_SDMA,
887};
888
889/* dma_system master ports */
890static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
891 &omap2430_dma_system__l3,
892};
893
894/* l4_core -> dma_system */
895static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
896 .master = &omap2430_l4_core_hwmod,
897 .slave = &omap2430_dma_system_hwmod,
898 .clk = "sdma_ick",
899 .addr = omap2430_dma_system_addrs,
900 .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs),
901 .user = OCP_USER_MPU | OCP_USER_SDMA,
902};
903
904/* dma_system slave ports */
905static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
906 &omap2430_l4_core__dma_system,
907};
908
909static struct omap_hwmod omap2430_dma_system_hwmod = {
910 .name = "dma",
911 .class = &omap2430_dma_hwmod_class,
912 .mpu_irqs = omap2430_dma_system_irqs,
913 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs),
914 .main_clk = "core_l3_ck",
915 .slaves = omap2430_dma_system_slaves,
916 .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
917 .masters = omap2430_dma_system_masters,
918 .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters),
919 .dev_attr = &dma_dev_attr,
920 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
921 .flags = HWMOD_NO_IDLEST,
922};
923
841static __initdata struct omap_hwmod *omap2430_hwmods[] = { 924static __initdata struct omap_hwmod *omap2430_hwmods[] = {
842 &omap2430_l3_main_hwmod, 925 &omap2430_l3_main_hwmod,
843 &omap2430_l4_core_hwmod, 926 &omap2430_l4_core_hwmod,
@@ -857,6 +940,9 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
857 &omap2430_gpio3_hwmod, 940 &omap2430_gpio3_hwmod,
858 &omap2430_gpio4_hwmod, 941 &omap2430_gpio4_hwmod,
859 &omap2430_gpio5_hwmod, 942 &omap2430_gpio5_hwmod,
943
944 /* dma_system class*/
945 &omap2430_dma_system_hwmod,
860 NULL, 946 NULL,
861}; 947};
862 948
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 2687be10d7aa..d5acb63ba9e0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -52,6 +52,8 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod;
52static struct omap_hwmod omap3xxx_gpio5_hwmod; 52static struct omap_hwmod omap3xxx_gpio5_hwmod;
53static struct omap_hwmod omap3xxx_gpio6_hwmod; 53static struct omap_hwmod omap3xxx_gpio6_hwmod;
54 54
55static struct omap_hwmod omap3xxx_dma_system_hwmod;
56
55/* L3 -> L4_CORE interface */ 57/* L3 -> L4_CORE interface */
56static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { 58static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
57 .master = &omap3xxx_l3_main_hwmod, 59 .master = &omap3xxx_l3_main_hwmod,
@@ -1090,6 +1092,98 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
1090 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 1092 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1091}; 1093};
1092 1094
1095/* dma_system -> L3 */
1096static struct omap_hwmod_ocp_if omap3xxx_dma_system__l3 = {
1097 .master = &omap3xxx_dma_system_hwmod,
1098 .slave = &omap3xxx_l3_main_hwmod,
1099 .clk = "core_l3_ick",
1100 .user = OCP_USER_MPU | OCP_USER_SDMA,
1101};
1102
1103/* dma attributes */
1104static struct omap_dma_dev_attr dma_dev_attr = {
1105 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
1106 IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
1107 .lch_count = 32,
1108};
1109
1110static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = {
1111 .rev_offs = 0x0000,
1112 .sysc_offs = 0x002c,
1113 .syss_offs = 0x0028,
1114 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1115 SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
1116 SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
1117 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1118 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1119 .sysc_fields = &omap_hwmod_sysc_type1,
1120};
1121
1122static struct omap_hwmod_class omap3xxx_dma_hwmod_class = {
1123 .name = "dma",
1124 .sysc = &omap3xxx_dma_sysc,
1125};
1126
1127/* dma_system */
1128static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
1129 { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
1130 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
1131 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
1132 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
1133};
1134
1135static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
1136 {
1137 .pa_start = 0x48056000,
1138 .pa_end = 0x4a0560ff,
1139 .flags = ADDR_TYPE_RT
1140 },
1141};
1142
1143/* dma_system master ports */
1144static struct omap_hwmod_ocp_if *omap3xxx_dma_system_masters[] = {
1145 &omap3xxx_dma_system__l3,
1146};
1147
1148/* l4_cfg -> dma_system */
1149static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {
1150 .master = &omap3xxx_l4_core_hwmod,
1151 .slave = &omap3xxx_dma_system_hwmod,
1152 .clk = "core_l4_ick",
1153 .addr = omap3xxx_dma_system_addrs,
1154 .addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs),
1155 .user = OCP_USER_MPU | OCP_USER_SDMA,
1156};
1157
1158/* dma_system slave ports */
1159static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = {
1160 &omap3xxx_l4_core__dma_system,
1161};
1162
1163static struct omap_hwmod omap3xxx_dma_system_hwmod = {
1164 .name = "dma",
1165 .class = &omap3xxx_dma_hwmod_class,
1166 .mpu_irqs = omap3xxx_dma_system_irqs,
1167 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs),
1168 .main_clk = "core_l3_ick",
1169 .prcm = {
1170 .omap2 = {
1171 .module_offs = CORE_MOD,
1172 .prcm_reg_id = 1,
1173 .module_bit = OMAP3430_ST_SDMA_SHIFT,
1174 .idlest_reg_id = 1,
1175 .idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
1176 },
1177 },
1178 .slaves = omap3xxx_dma_system_slaves,
1179 .slaves_cnt = ARRAY_SIZE(omap3xxx_dma_system_slaves),
1180 .masters = omap3xxx_dma_system_masters,
1181 .masters_cnt = ARRAY_SIZE(omap3xxx_dma_system_masters),
1182 .dev_attr = &dma_dev_attr,
1183 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1184 .flags = HWMOD_NO_IDLEST,
1185};
1186
1093static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { 1187static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
1094 &omap3xxx_l3_main_hwmod, 1188 &omap3xxx_l3_main_hwmod,
1095 &omap3xxx_l4_core_hwmod, 1189 &omap3xxx_l4_core_hwmod,
@@ -1113,6 +1207,9 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
1113 &omap3xxx_gpio4_hwmod, 1207 &omap3xxx_gpio4_hwmod,
1114 &omap3xxx_gpio5_hwmod, 1208 &omap3xxx_gpio5_hwmod,
1115 &omap3xxx_gpio6_hwmod, 1209 &omap3xxx_gpio6_hwmod,
1210
1211 /* dma_system class*/
1212 &omap3xxx_dma_system_hwmod,
1116 NULL, 1213 NULL,
1117}; 1214};
1118 1215
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index d258936410fb..f9778fba8322 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -23,6 +23,7 @@
23#include <plat/omap_hwmod.h> 23#include <plat/omap_hwmod.h>
24#include <plat/cpu.h> 24#include <plat/cpu.h>
25#include <plat/gpio.h> 25#include <plat/gpio.h>
26#include <plat/dma.h>
26 27
27#include "omap_hwmod_common_data.h" 28#include "omap_hwmod_common_data.h"
28 29
@@ -36,6 +37,7 @@
36#define OMAP44XX_DMA_REQ_START 1 37#define OMAP44XX_DMA_REQ_START 1
37 38
38/* Backward references (IPs with Bus Master capability) */ 39/* Backward references (IPs with Bus Master capability) */
40static struct omap_hwmod omap44xx_dma_system_hwmod;
39static struct omap_hwmod omap44xx_dmm_hwmod; 41static struct omap_hwmod omap44xx_dmm_hwmod;
40static struct omap_hwmod omap44xx_emif_fw_hwmod; 42static struct omap_hwmod omap44xx_emif_fw_hwmod;
41static struct omap_hwmod omap44xx_l3_instr_hwmod; 43static struct omap_hwmod omap44xx_l3_instr_hwmod;
@@ -216,6 +218,14 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
216 .user = OCP_USER_MPU | OCP_USER_SDMA, 218 .user = OCP_USER_MPU | OCP_USER_SDMA,
217}; 219};
218 220
221/* dma_system -> l3_main_2 */
222static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
223 .master = &omap44xx_dma_system_hwmod,
224 .slave = &omap44xx_l3_main_2_hwmod,
225 .clk = "l3_div_ck",
226 .user = OCP_USER_MPU | OCP_USER_SDMA,
227};
228
219/* l4_cfg -> l3_main_2 */ 229/* l4_cfg -> l3_main_2 */
220static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = { 230static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
221 .master = &omap44xx_l4_cfg_hwmod, 231 .master = &omap44xx_l4_cfg_hwmod,
@@ -226,6 +236,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
226 236
227/* l3_main_2 slave ports */ 237/* l3_main_2 slave ports */
228static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = { 238static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
239 &omap44xx_dma_system__l3_main_2,
229 &omap44xx_l3_main_1__l3_main_2, 240 &omap44xx_l3_main_1__l3_main_2,
230 &omap44xx_l4_cfg__l3_main_2, 241 &omap44xx_l4_cfg__l3_main_2,
231}; 242};
@@ -1376,6 +1387,93 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
1376 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio6_slaves), 1387 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio6_slaves),
1377 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 1388 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1378}; 1389};
1390
1391/*
1392 * 'dma' class
1393 * dma controller for data exchange between memory to memory (i.e. internal or
1394 * external memory) and gp peripherals to memory or memory to gp peripherals
1395 */
1396
1397static struct omap_hwmod_class_sysconfig omap44xx_dma_sysc = {
1398 .rev_offs = 0x0000,
1399 .sysc_offs = 0x002c,
1400 .syss_offs = 0x0028,
1401 .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
1402 SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
1403 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1404 SYSS_HAS_RESET_STATUS),
1405 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1406 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1407 .sysc_fields = &omap_hwmod_sysc_type1,
1408};
1409
1410/* dma attributes */
1411static struct omap_dma_dev_attr dma_dev_attr = {
1412 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
1413 IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
1414 .lch_count = 32,
1415};
1416
1417static struct omap_hwmod_class omap44xx_dma_hwmod_class = {
1418 .name = "dma",
1419 .sysc = &omap44xx_dma_sysc,
1420};
1421
1422/* dma_system */
1423static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {
1424 { .name = "0", .irq = 12 + OMAP44XX_IRQ_GIC_START },
1425 { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START },
1426 { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START },
1427 { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START },
1428};
1429
1430/* dma_system master ports */
1431static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = {
1432 &omap44xx_dma_system__l3_main_2,
1433};
1434
1435static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
1436 {
1437 .pa_start = 0x4a056000,
1438 .pa_end = 0x4a0560ff,
1439 .flags = ADDR_TYPE_RT
1440 },
1441};
1442
1443/* l4_cfg -> dma_system */
1444static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {
1445 .master = &omap44xx_l4_cfg_hwmod,
1446 .slave = &omap44xx_dma_system_hwmod,
1447 .clk = "l4_div_ck",
1448 .addr = omap44xx_dma_system_addrs,
1449 .addr_cnt = ARRAY_SIZE(omap44xx_dma_system_addrs),
1450 .user = OCP_USER_MPU | OCP_USER_SDMA,
1451};
1452
1453/* dma_system slave ports */
1454static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = {
1455 &omap44xx_l4_cfg__dma_system,
1456};
1457
1458static struct omap_hwmod omap44xx_dma_system_hwmod = {
1459 .name = "dma_system",
1460 .class = &omap44xx_dma_hwmod_class,
1461 .mpu_irqs = omap44xx_dma_system_irqs,
1462 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs),
1463 .main_clk = "l3_div_ck",
1464 .prcm = {
1465 .omap4 = {
1466 .clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL,
1467 },
1468 },
1469 .slaves = omap44xx_dma_system_slaves,
1470 .slaves_cnt = ARRAY_SIZE(omap44xx_dma_system_slaves),
1471 .masters = omap44xx_dma_system_masters,
1472 .masters_cnt = ARRAY_SIZE(omap44xx_dma_system_masters),
1473 .dev_attr = &dma_dev_attr,
1474 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1475};
1476
1379static __initdata struct omap_hwmod *omap44xx_hwmods[] = { 1477static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
1380 /* dmm class */ 1478 /* dmm class */
1381 &omap44xx_dmm_hwmod, 1479 &omap44xx_dmm_hwmod,
@@ -1391,6 +1489,10 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
1391 &omap44xx_l4_cfg_hwmod, 1489 &omap44xx_l4_cfg_hwmod,
1392 &omap44xx_l4_per_hwmod, 1490 &omap44xx_l4_per_hwmod,
1393 &omap44xx_l4_wkup_hwmod, 1491 &omap44xx_l4_wkup_hwmod,
1492
1493 /* dma class */
1494 &omap44xx_dma_system_hwmod,
1495
1394 /* i2c class */ 1496 /* i2c class */
1395 &omap44xx_i2c1_hwmod, 1497 &omap44xx_i2c1_hwmod,
1396 &omap44xx_i2c2_hwmod, 1498 &omap44xx_i2c2_hwmod,
diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h
new file mode 100644
index 000000000000..46ac27dd6c84
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_opp_data.h
@@ -0,0 +1,72 @@
1/*
2 * OMAP SoC specific OPP Data helpers
3 *
4 * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon
6 * Kevin Hilman
7 * Copyright (C) 2010 Nokia Corporation.
8 * Eduardo Valentin
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
15 * kind, whether express or implied; without even the implied warranty
16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19#ifndef __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H
20#define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H
21
22#include <plat/omap_hwmod.h>
23
24/*
25 * *BIG FAT WARNING*:
26 * USE the following ONLY in opp data initialization common to an SoC.
27 * DO NOT USE these in board files/pm core etc.
28 */
29
30/**
31 * struct omap_opp_def - OMAP OPP Definition
32 * @hwmod_name: Name of the hwmod for this domain
33 * @freq: Frequency in hertz corresponding to this OPP
34 * @u_volt: Nominal voltage in microvolts corresponding to this OPP
35 * @default_available: True/false - is this OPP available by default
36 *
37 * OMAP SOCs have a standard set of tuples consisting of frequency and voltage
38 * pairs that the device will support per voltage domain. This is called
39 * Operating Points or OPP. The actual definitions of OMAP Operating Points
40 * varies over silicon within the same family of devices. For a specific
41 * domain, you can have a set of {frequency, voltage} pairs and this is denoted
42 * by an array of omap_opp_def. As the kernel boots and more information is
43 * available, a set of these are activated based on the precise nature of
44 * device the kernel boots up on. It is interesting to remember that each IP
45 * which belongs to a voltage domain may define their own set of OPPs on top
46 * of this - but this is handled by the appropriate driver.
47 */
48struct omap_opp_def {
49 char *hwmod_name;
50
51 unsigned long freq;
52 unsigned long u_volt;
53
54 bool default_available;
55};
56
57/*
58 * Initialization wrapper used to define an OPP for OMAP variants.
59 */
60#define OPP_INITIALIZER(_hwmod_name, _enabled, _freq, _uv) \
61{ \
62 .hwmod_name = _hwmod_name, \
63 .default_available = _enabled, \
64 .freq = _freq, \
65 .u_volt = _uv, \
66}
67
68/* Use this to initialize the default table */
69extern int __init omap_init_opp_table(struct omap_opp_def *opp_def,
70 u32 opp_def_size);
71
72#endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
new file mode 100644
index 000000000000..ab8b35b780b5
--- /dev/null
+++ b/arch/arm/mach-omap2/opp.c
@@ -0,0 +1,93 @@
1/*
2 * OMAP SoC specific OPP wrapper function
3 *
4 * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon
6 * Kevin Hilman
7 * Copyright (C) 2010 Nokia Corporation.
8 * Eduardo Valentin
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
15 * kind, whether express or implied; without even the implied warranty
16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19#include <linux/module.h>
20#include <linux/opp.h>
21
22#include <plat/omap_device.h>
23
24#include "omap_opp_data.h"
25
26/* Temp variable to allow multiple calls */
27static u8 __initdata omap_table_init;
28
29/**
30 * omap_init_opp_table() - Initialize opp table as per the CPU type
31 * @opp_def: opp default list for this silicon
32 * @opp_def_size: number of opp entries for this silicon
33 *
34 * Register the initial OPP table with the OPP library based on the CPU
35 * type. This is meant to be used only by SoC specific registration.
36 */
37int __init omap_init_opp_table(struct omap_opp_def *opp_def,
38 u32 opp_def_size)
39{
40 int i, r;
41
42 if (!opp_def || !opp_def_size) {
43 pr_err("%s: invalid params!\n", __func__);
44 return -EINVAL;
45 }
46
47 /*
48 * Initialize only if not already initialized even if the previous
49 * call failed, because, no reason we'd succeed again.
50 */
51 if (omap_table_init)
52 return -EEXIST;
53 omap_table_init = 1;
54
55 /* Lets now register with OPP library */
56 for (i = 0; i < opp_def_size; i++) {
57 struct omap_hwmod *oh;
58 struct device *dev;
59
60 if (!opp_def->hwmod_name) {
61 pr_err("%s: NULL name of omap_hwmod, failing [%d].\n",
62 __func__, i);
63 return -EINVAL;
64 }
65 oh = omap_hwmod_lookup(opp_def->hwmod_name);
66 if (!oh || !oh->od) {
67 pr_warn("%s: no hwmod or odev for %s, [%d] "
68 "cannot add OPPs.\n", __func__,
69 opp_def->hwmod_name, i);
70 return -EINVAL;
71 }
72 dev = &oh->od->pdev.dev;
73
74 r = opp_add(dev, opp_def->freq, opp_def->u_volt);
75 if (r) {
76 dev_err(dev, "%s: add OPP %ld failed for %s [%d] "
77 "result=%d\n",
78 __func__, opp_def->freq,
79 opp_def->hwmod_name, i, r);
80 } else {
81 if (!opp_def->default_available)
82 r = opp_disable(dev, opp_def->freq);
83 if (r)
84 dev_err(dev, "%s: disable %ld failed for %s "
85 "[%d] result=%d\n",
86 __func__, opp_def->freq,
87 opp_def->hwmod_name, i, r);
88 }
89 opp_def++;
90 }
91
92 return 0;
93}
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
new file mode 100644
index 000000000000..0486fce8a92c
--- /dev/null
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -0,0 +1,107 @@
1/*
2 * OMAP3 OPP table definitions.
3 *
4 * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon
6 * Kevin Hilman
7 * Copyright (C) 2010 Nokia Corporation.
8 * Eduardo Valentin
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
15 * kind, whether express or implied; without even the implied warranty
16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19#include <linux/module.h>
20
21#include <plat/cpu.h>
22
23#include "omap_opp_data.h"
24
25static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {
26 /* MPU OPP1 */
27 OPP_INITIALIZER("mpu", true, 125000000, 975000),
28 /* MPU OPP2 */
29 OPP_INITIALIZER("mpu", true, 250000000, 1075000),
30 /* MPU OPP3 */
31 OPP_INITIALIZER("mpu", true, 500000000, 1200000),
32 /* MPU OPP4 */
33 OPP_INITIALIZER("mpu", true, 550000000, 1270000),
34 /* MPU OPP5 */
35 OPP_INITIALIZER("mpu", true, 600000000, 1350000),
36
37 /*
38 * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
39 * almost the same than the one at 83MHz thus providing very little
40 * gain for the power point of view. In term of energy it will even
41 * increase the consumption due to the very negative performance
42 * impact that frequency will do to the MPU and the whole system in
43 * general.
44 */
45 OPP_INITIALIZER("l3_main", false, 41500000, 975000),
46 /* L3 OPP2 */
47 OPP_INITIALIZER("l3_main", true, 83000000, 1050000),
48 /* L3 OPP3 */
49 OPP_INITIALIZER("l3_main", true, 166000000, 1150000),
50
51 /* DSP OPP1 */
52 OPP_INITIALIZER("iva", true, 90000000, 975000),
53 /* DSP OPP2 */
54 OPP_INITIALIZER("iva", true, 180000000, 1075000),
55 /* DSP OPP3 */
56 OPP_INITIALIZER("iva", true, 360000000, 1200000),
57 /* DSP OPP4 */
58 OPP_INITIALIZER("iva", true, 400000000, 1270000),
59 /* DSP OPP5 */
60 OPP_INITIALIZER("iva", true, 430000000, 1350000),
61};
62
63static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
64 /* MPU OPP1 - OPP50 */
65 OPP_INITIALIZER("mpu", true, 300000000, 1012500),
66 /* MPU OPP2 - OPP100 */
67 OPP_INITIALIZER("mpu", true, 600000000, 1200000),
68 /* MPU OPP3 - OPP-Turbo */
69 OPP_INITIALIZER("mpu", false, 800000000, 1325000),
70 /* MPU OPP4 - OPP-SB */
71 OPP_INITIALIZER("mpu", false, 1000000000, 1375000),
72
73 /* L3 OPP1 - OPP50 */
74 OPP_INITIALIZER("l3_main", true, 100000000, 1000000),
75 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
76 OPP_INITIALIZER("l3_main", true, 200000000, 1200000),
77
78 /* DSP OPP1 - OPP50 */
79 OPP_INITIALIZER("iva", true, 260000000, 1012500),
80 /* DSP OPP2 - OPP100 */
81 OPP_INITIALIZER("iva", true, 520000000, 1200000),
82 /* DSP OPP3 - OPP-Turbo */
83 OPP_INITIALIZER("iva", false, 660000000, 1325000),
84 /* DSP OPP4 - OPP-SB */
85 OPP_INITIALIZER("iva", false, 800000000, 1375000),
86};
87
88/**
89 * omap3_opp_init() - initialize omap3 opp table
90 */
91static int __init omap3_opp_init(void)
92{
93 int r = -ENODEV;
94
95 if (!cpu_is_omap34xx())
96 return r;
97
98 if (cpu_is_omap3630())
99 r = omap_init_opp_table(omap36xx_opp_def_list,
100 ARRAY_SIZE(omap36xx_opp_def_list));
101 else
102 r = omap_init_opp_table(omap34xx_opp_def_list,
103 ARRAY_SIZE(omap34xx_opp_def_list));
104
105 return r;
106}
107device_initcall(omap3_opp_init);
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
new file mode 100644
index 000000000000..a11fa566d8ee
--- /dev/null
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -0,0 +1,57 @@
1/*
2 * OMAP4 OPP table definitions.
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon
6 * Kevin Hilman
7 * Thara Gopinath
8 * Copyright (C) 2010 Nokia Corporation.
9 * Eduardo Valentin
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
16 * kind, whether express or implied; without even the implied warranty
17 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 */
20#include <linux/module.h>
21
22#include <plat/cpu.h>
23
24#include "omap_opp_data.h"
25
26static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
27 /* MPU OPP1 - OPP50 */
28 OPP_INITIALIZER("mpu", true, 300000000, 1100000),
29 /* MPU OPP2 - OPP100 */
30 OPP_INITIALIZER("mpu", true, 600000000, 1200000),
31 /* MPU OPP3 - OPP-Turbo */
32 OPP_INITIALIZER("mpu", false, 800000000, 1260000),
33 /* MPU OPP4 - OPP-SB */
34 OPP_INITIALIZER("mpu", false, 1008000000, 1350000),
35 /* L3 OPP1 - OPP50 */
36 OPP_INITIALIZER("l3_main_1", true, 100000000, 930000),
37 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
38 OPP_INITIALIZER("l3_main_1", true, 200000000, 1100000),
39 /* TODO: add IVA, DSP, aess, fdif, gpu */
40};
41
42/**
43 * omap4_opp_init() - initialize omap4 opp table
44 */
45static int __init omap4_opp_init(void)
46{
47 int r = -ENODEV;
48
49 if (!cpu_is_omap44xx())
50 return r;
51
52 r = omap_init_opp_table(omap44xx_opp_def_list,
53 ARRAY_SIZE(omap44xx_opp_def_list));
54
55 return r;
56}
57device_initcall(omap4_opp_init);
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 59ca03b0e691..6ec2ee12272a 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -143,5 +143,5 @@ static int __init omap2_common_pm_init(void)
143 143
144 return 0; 144 return 0;
145} 145}
146device_initcall(omap2_common_pm_init); 146postcore_initcall(omap2_common_pm_init);
147 147
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 0d75bfd1fdbe..8b4f45eba1b5 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -20,6 +20,20 @@ extern int omap3_can_sleep(void);
20extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); 20extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
21extern int omap3_idle_init(void); 21extern int omap3_idle_init(void);
22 22
23#if defined(CONFIG_PM_OPP)
24extern int omap3_opp_init(void);
25extern int omap4_opp_init(void);
26#else
27static inline int omap3_opp_init(void)
28{
29 return -EINVAL;
30}
31static inline int omap4_opp_init(void)
32{
33 return -EINVAL;
34}
35#endif
36
23struct cpuidle_params { 37struct cpuidle_params {
24 u8 valid; 38 u8 valid;
25 u32 sleep_latency; 39 u32 sleep_latency;
@@ -58,7 +72,7 @@ extern u32 sleep_while_idle;
58#endif 72#endif
59 73
60#if defined(CONFIG_CPU_IDLE) 74#if defined(CONFIG_CPU_IDLE)
61extern void omap3_cpuidle_update_states(void); 75extern void omap3_cpuidle_update_states(u32, u32);
62#endif 76#endif
63 77
64#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) 78#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
@@ -80,9 +94,20 @@ extern void save_secure_ram_context(u32 *addr);
80extern void omap3_save_scratchpad_contents(void); 94extern void omap3_save_scratchpad_contents(void);
81 95
82extern unsigned int omap24xx_idle_loop_suspend_sz; 96extern unsigned int omap24xx_idle_loop_suspend_sz;
83extern unsigned int omap34xx_suspend_sz;
84extern unsigned int save_secure_ram_context_sz; 97extern unsigned int save_secure_ram_context_sz;
85extern unsigned int omap24xx_cpu_suspend_sz; 98extern unsigned int omap24xx_cpu_suspend_sz;
86extern unsigned int omap34xx_cpu_suspend_sz; 99extern unsigned int omap34xx_cpu_suspend_sz;
87 100
101#define PM_RTA_ERRATUM_i608 (1 << 0)
102#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
103
104#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
105extern u16 pm34xx_errata;
106#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
107extern void enable_omap3630_toggle_l2_on_restore(void);
108#else
109#define IS_PM34XX_ERRATUM(id) 0
110static inline void enable_omap3630_toggle_l2_on_restore(void) { }
111#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
112
88#endif 113#endif
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index aaeea49b9bdd..aea7ced9a2ff 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -301,14 +301,8 @@ out:
301 301
302static int omap2_pm_begin(suspend_state_t state) 302static int omap2_pm_begin(suspend_state_t state)
303{ 303{
304 suspend_state = state;
305 return 0;
306}
307
308static int omap2_pm_prepare(void)
309{
310 /* We cannot sleep in idle until we have resumed */
311 disable_hlt(); 304 disable_hlt();
305 suspend_state = state;
312 return 0; 306 return 0;
313} 307}
314 308
@@ -349,21 +343,15 @@ static int omap2_pm_enter(suspend_state_t state)
349 return ret; 343 return ret;
350} 344}
351 345
352static void omap2_pm_finish(void)
353{
354 enable_hlt();
355}
356
357static void omap2_pm_end(void) 346static void omap2_pm_end(void)
358{ 347{
359 suspend_state = PM_SUSPEND_ON; 348 suspend_state = PM_SUSPEND_ON;
349 enable_hlt();
360} 350}
361 351
362static struct platform_suspend_ops omap_pm_ops = { 352static struct platform_suspend_ops omap_pm_ops = {
363 .begin = omap2_pm_begin, 353 .begin = omap2_pm_begin,
364 .prepare = omap2_pm_prepare,
365 .enter = omap2_pm_enter, 354 .enter = omap2_pm_enter,
366 .finish = omap2_pm_finish,
367 .end = omap2_pm_end, 355 .end = omap2_pm_end,
368 .valid = suspend_valid_only_mem, 356 .valid = suspend_valid_only_mem,
369}; 357};
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 648b8c50d024..c45b4fa1deeb 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -68,6 +68,9 @@ static inline bool is_suspending(void)
68#define OMAP343X_TABLE_VALUE_OFFSET 0xc0 68#define OMAP343X_TABLE_VALUE_OFFSET 0xc0
69#define OMAP343X_CONTROL_REG_VALUE_OFFSET 0xc8 69#define OMAP343X_CONTROL_REG_VALUE_OFFSET 0xc8
70 70
71/* pm34xx errata defined in pm.h */
72u16 pm34xx_errata;
73
71struct power_state { 74struct power_state {
72 struct powerdomain *pwrdm; 75 struct powerdomain *pwrdm;
73 u32 next_state; 76 u32 next_state;
@@ -143,7 +146,7 @@ static void omap3_core_save_context(void)
143 146
144 /* 147 /*
145 * Force write last pad into memory, as this can fail in some 148 * Force write last pad into memory, as this can fail in some
146 * cases according to erratas 1.157, 1.185 149 * cases according to errata 1.157, 1.185
147 */ 150 */
148 omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14), 151 omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14),
149 OMAP343X_CONTROL_MEM_WKUP + 0x2a0); 152 OMAP343X_CONTROL_MEM_WKUP + 0x2a0);
@@ -430,7 +433,7 @@ void omap_sram_idle(void)
430 /* 433 /*
431 * On EMU/HS devices ROM code restores a SRDC value 434 * On EMU/HS devices ROM code restores a SRDC value
432 * from scratchpad which has automatic self refresh on timeout 435 * from scratchpad which has automatic self refresh on timeout
433 * of AUTO_CNT = 1 enabled. This takes care of errata 1.142. 436 * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
434 * Hence store/restore the SDRC_POWER register here. 437 * Hence store/restore the SDRC_POWER register here.
435 */ 438 */
436 if (omap_rev() >= OMAP3430_REV_ES3_0 && 439 if (omap_rev() >= OMAP3430_REV_ES3_0 &&
@@ -529,12 +532,6 @@ out:
529} 532}
530 533
531#ifdef CONFIG_SUSPEND 534#ifdef CONFIG_SUSPEND
532static int omap3_pm_prepare(void)
533{
534 disable_hlt();
535 return 0;
536}
537
538static int omap3_pm_suspend(void) 535static int omap3_pm_suspend(void)
539{ 536{
540 struct power_state *pwrst; 537 struct power_state *pwrst;
@@ -597,14 +594,10 @@ static int omap3_pm_enter(suspend_state_t unused)
597 return ret; 594 return ret;
598} 595}
599 596
600static void omap3_pm_finish(void)
601{
602 enable_hlt();
603}
604
605/* Hooks to enable / disable UART interrupts during suspend */ 597/* Hooks to enable / disable UART interrupts during suspend */
606static int omap3_pm_begin(suspend_state_t state) 598static int omap3_pm_begin(suspend_state_t state)
607{ 599{
600 disable_hlt();
608 suspend_state = state; 601 suspend_state = state;
609 omap_uart_enable_irqs(0); 602 omap_uart_enable_irqs(0);
610 return 0; 603 return 0;
@@ -614,15 +607,14 @@ static void omap3_pm_end(void)
614{ 607{
615 suspend_state = PM_SUSPEND_ON; 608 suspend_state = PM_SUSPEND_ON;
616 omap_uart_enable_irqs(1); 609 omap_uart_enable_irqs(1);
610 enable_hlt();
617 return; 611 return;
618} 612}
619 613
620static struct platform_suspend_ops omap_pm_ops = { 614static struct platform_suspend_ops omap_pm_ops = {
621 .begin = omap3_pm_begin, 615 .begin = omap3_pm_begin,
622 .end = omap3_pm_end, 616 .end = omap3_pm_end,
623 .prepare = omap3_pm_prepare,
624 .enter = omap3_pm_enter, 617 .enter = omap3_pm_enter,
625 .finish = omap3_pm_finish,
626 .valid = suspend_valid_only_mem, 618 .valid = suspend_valid_only_mem,
627}; 619};
628#endif /* CONFIG_SUSPEND */ 620#endif /* CONFIG_SUSPEND */
@@ -925,12 +917,29 @@ void omap3_pm_off_mode_enable(int enable)
925 state = PWRDM_POWER_RET; 917 state = PWRDM_POWER_RET;
926 918
927#ifdef CONFIG_CPU_IDLE 919#ifdef CONFIG_CPU_IDLE
928 omap3_cpuidle_update_states(); 920 /*
921 * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot
922 * enable OFF mode in a stable form for previous revisions, restrict
923 * instead to RET
924 */
925 if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583))
926 omap3_cpuidle_update_states(state, PWRDM_POWER_RET);
927 else
928 omap3_cpuidle_update_states(state, state);
929#endif 929#endif
930 930
931 list_for_each_entry(pwrst, &pwrst_list, node) { 931 list_for_each_entry(pwrst, &pwrst_list, node) {
932 pwrst->next_state = state; 932 if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583) &&
933 omap_set_pwrdm_state(pwrst->pwrdm, state); 933 pwrst->pwrdm == core_pwrdm &&
934 state == PWRDM_POWER_OFF) {
935 pwrst->next_state = PWRDM_POWER_RET;
936 WARN_ONCE(1,
937 "%s: Core OFF disabled due to errata i583\n",
938 __func__);
939 } else {
940 pwrst->next_state = state;
941 }
942 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
934 } 943 }
935} 944}
936 945
@@ -1002,6 +1011,17 @@ void omap_push_sram_idle(void)
1002 save_secure_ram_context_sz); 1011 save_secure_ram_context_sz);
1003} 1012}
1004 1013
1014static void __init pm_errata_configure(void)
1015{
1016 if (cpu_is_omap3630()) {
1017 pm34xx_errata |= PM_RTA_ERRATUM_i608;
1018 /* Enable the l2 cache toggling in sleep logic */
1019 enable_omap3630_toggle_l2_on_restore();
1020 if (omap_rev() < OMAP3630_REV_ES1_2)
1021 pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583;
1022 }
1023}
1024
1005static int __init omap3_pm_init(void) 1025static int __init omap3_pm_init(void)
1006{ 1026{
1007 struct power_state *pwrst, *tmp; 1027 struct power_state *pwrst, *tmp;
@@ -1011,6 +1031,8 @@ static int __init omap3_pm_init(void)
1011 if (!cpu_is_omap34xx()) 1031 if (!cpu_is_omap34xx())
1012 return -ENODEV; 1032 return -ENODEV;
1013 1033
1034 pm_errata_configure();
1035
1014 printk(KERN_ERR "Power Management for TI OMAP3.\n"); 1036 printk(KERN_ERR "Power Management for TI OMAP3.\n");
1015 1037
1016 /* XXX prcm_setup_regs needs to be before enabling hw 1038 /* XXX prcm_setup_regs needs to be before enabling hw
@@ -1058,6 +1080,14 @@ static int __init omap3_pm_init(void)
1058 pm_idle = omap3_pm_idle; 1080 pm_idle = omap3_pm_idle;
1059 omap3_idle_init(); 1081 omap3_idle_init();
1060 1082
1083 /*
1084 * RTA is disabled during initialization as per erratum i608
1085 * it is safer to disable RTA by the bootloader, but we would like
1086 * to be doubly sure here and prevent any mishaps.
1087 */
1088 if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608))
1089 omap3630_ctrl_disable_rta();
1090
1061 clkdm_add_wkdep(neon_clkdm, mpu_clkdm); 1091 clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
1062 if (omap_type() != OMAP2_DEVICE_TYPE_GP) { 1092 if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
1063 omap3_secure_ram_storage = 1093 omap3_secure_ram_storage =
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 54544b4fc76b..6aff9961e35d 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -31,12 +31,6 @@ struct power_state {
31static LIST_HEAD(pwrst_list); 31static LIST_HEAD(pwrst_list);
32 32
33#ifdef CONFIG_SUSPEND 33#ifdef CONFIG_SUSPEND
34static int omap4_pm_prepare(void)
35{
36 disable_hlt();
37 return 0;
38}
39
40static int omap4_pm_suspend(void) 34static int omap4_pm_suspend(void)
41{ 35{
42 do_wfi(); 36 do_wfi();
@@ -59,28 +53,22 @@ static int omap4_pm_enter(suspend_state_t suspend_state)
59 return ret; 53 return ret;
60} 54}
61 55
62static void omap4_pm_finish(void)
63{
64 enable_hlt();
65 return;
66}
67
68static int omap4_pm_begin(suspend_state_t state) 56static int omap4_pm_begin(suspend_state_t state)
69{ 57{
58 disable_hlt();
70 return 0; 59 return 0;
71} 60}
72 61
73static void omap4_pm_end(void) 62static void omap4_pm_end(void)
74{ 63{
64 enable_hlt();
75 return; 65 return;
76} 66}
77 67
78static struct platform_suspend_ops omap_pm_ops = { 68static struct platform_suspend_ops omap_pm_ops = {
79 .begin = omap4_pm_begin, 69 .begin = omap4_pm_begin,
80 .end = omap4_pm_end, 70 .end = omap4_pm_end,
81 .prepare = omap4_pm_prepare,
82 .enter = omap4_pm_enter, 71 .enter = omap4_pm_enter,
83 .finish = omap4_pm_finish,
84 .valid = suspend_valid_only_mem, 72 .valid = suspend_valid_only_mem,
85}; 73};
86#endif /* CONFIG_SUSPEND */ 74#endif /* CONFIG_SUSPEND */
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 68f57bb67fc5..b3f83799e6cf 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -74,5 +74,4 @@ static inline u32 sms_read_reg(u16 reg)
74 */ 74 */
75#define SDRC_MPURATE_LOOPS 96 75#define SDRC_MPURATE_LOOPS 96
76 76
77
78#endif 77#endif
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 2fb205a7f285..e3b5cd76c54c 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/sleep.S
3 *
4 * (C) Copyright 2007 2 * (C) Copyright 2007
5 * Texas Instruments 3 * Texas Instruments
6 * Karthik Dasu <karthik-dp@ti.com> 4 * Karthik Dasu <karthik-dp@ti.com>
@@ -26,6 +24,7 @@
26 */ 24 */
27#include <linux/linkage.h> 25#include <linux/linkage.h>
28#include <asm/assembler.h> 26#include <asm/assembler.h>
27#include <plat/sram.h>
29#include <mach/io.h> 28#include <mach/io.h>
30 29
31#include "cm.h" 30#include "cm.h"
@@ -33,21 +32,27 @@
33#include "sdrc.h" 32#include "sdrc.h"
34#include "control.h" 33#include "control.h"
35 34
36#define SDRC_SCRATCHPAD_SEM_V 0xfa00291c 35/*
37 36 * Registers access definitions
38#define PM_PREPWSTST_CORE_V OMAP34XX_PRM_REGADDR(CORE_MOD, \ 37 */
39 OMAP3430_PM_PREPWSTST) 38#define SDRC_SCRATCHPAD_SEM_OFFS 0xc
40#define PM_PREPWSTST_CORE_P 0x48306AE8 39#define SDRC_SCRATCHPAD_SEM_V OMAP343X_SCRATCHPAD_REGADDR\
41#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \ 40 (SDRC_SCRATCHPAD_SEM_OFFS)
42 OMAP3430_PM_PREPWSTST) 41#define PM_PREPWSTST_CORE_P OMAP3430_PRM_BASE + CORE_MOD +\
42 OMAP3430_PM_PREPWSTST
43#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL 43#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL
44#define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1) 44#define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)
45#define SRAM_BASE_P 0x40200000 45#define CM_IDLEST_CKGEN_V OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST)
46#define CONTROL_STAT 0x480022F0 46#define SRAM_BASE_P OMAP3_SRAM_PA
47#define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is 47#define CONTROL_STAT OMAP343X_CTRL_BASE + OMAP343X_CONTROL_STATUS
48 * available */ 48#define CONTROL_MEM_RTA_CTRL (OMAP343X_CTRL_BASE +\
49#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\ 49 OMAP36XX_CONTROL_MEM_RTA_CTRL)
50 + SCRATCHPAD_MEM_OFFS) 50
51/* Move this as correct place is available */
52#define SCRATCHPAD_MEM_OFFS 0x310
53#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE +\
54 OMAP343X_CONTROL_MEM_WKUP +\
55 SCRATCHPAD_MEM_OFFS)
51#define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER) 56#define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
52#define SDRC_SYSCONFIG_P (OMAP343X_SDRC_BASE + SDRC_SYSCONFIG) 57#define SDRC_SYSCONFIG_P (OMAP343X_SDRC_BASE + SDRC_SYSCONFIG)
53#define SDRC_MR_0_P (OMAP343X_SDRC_BASE + SDRC_MR_0) 58#define SDRC_MR_0_P (OMAP343X_SDRC_BASE + SDRC_MR_0)
@@ -59,48 +64,38 @@
59#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) 64#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
60#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) 65#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
61 66
62 .text 67
63/* Function to acquire the semaphore in scratchpad */ 68/*
64ENTRY(lock_scratchpad_sem) 69 * API functions
65 stmfd sp!, {lr} @ save registers on stack 70 */
66wait_sem: 71
67 mov r0,#1 72/*
68 ldr r1, sdrc_scratchpad_sem 73 * The "get_*restore_pointer" functions are used to provide a
69wait_loop: 74 * physical restore address where the ROM code jumps while waking
70 ldr r2, [r1] @ load the lock value 75 * up from MPU OFF/OSWR state.
71 cmp r2, r0 @ is the lock free ? 76 * The restore pointer is stored into the scratchpad.
72 beq wait_loop @ not free... 77 */
73 swp r2, r0, [r1] @ semaphore free so lock it and proceed
74 cmp r2, r0 @ did we succeed ?
75 beq wait_sem @ no - try again
76 ldmfd sp!, {pc} @ restore regs and return
77sdrc_scratchpad_sem:
78 .word SDRC_SCRATCHPAD_SEM_V
79ENTRY(lock_scratchpad_sem_sz)
80 .word . - lock_scratchpad_sem
81
82 .text
83/* Function to release the scratchpad semaphore */
84ENTRY(unlock_scratchpad_sem)
85 stmfd sp!, {lr} @ save registers on stack
86 ldr r3, sdrc_scratchpad_sem
87 mov r2,#0
88 str r2,[r3]
89 ldmfd sp!, {pc} @ restore regs and return
90ENTRY(unlock_scratchpad_sem_sz)
91 .word . - unlock_scratchpad_sem
92 78
93 .text 79 .text
94/* Function call to get the restore pointer for resume from OFF */ 80/* Function call to get the restore pointer for resume from OFF */
95ENTRY(get_restore_pointer) 81ENTRY(get_restore_pointer)
96 stmfd sp!, {lr} @ save registers on stack 82 stmfd sp!, {lr} @ save registers on stack
97 adr r0, restore 83 adr r0, restore
98 ldmfd sp!, {pc} @ restore regs and return 84 ldmfd sp!, {pc} @ restore regs and return
99ENTRY(get_restore_pointer_sz) 85ENTRY(get_restore_pointer_sz)
100 .word . - get_restore_pointer 86 .word . - get_restore_pointer
101 87
102 .text 88 .text
103/* Function call to get the restore pointer for for ES3 to resume from OFF */ 89/* Function call to get the restore pointer for 3630 resume from OFF */
90ENTRY(get_omap3630_restore_pointer)
91 stmfd sp!, {lr} @ save registers on stack
92 adr r0, restore_3630
93 ldmfd sp!, {pc} @ restore regs and return
94ENTRY(get_omap3630_restore_pointer_sz)
95 .word . - get_omap3630_restore_pointer
96
97 .text
98/* Function call to get the restore pointer for ES3 to resume from OFF */
104ENTRY(get_es3_restore_pointer) 99ENTRY(get_es3_restore_pointer)
105 stmfd sp!, {lr} @ save registers on stack 100 stmfd sp!, {lr} @ save registers on stack
106 adr r0, restore_es3 101 adr r0, restore_es3
@@ -108,54 +103,23 @@ ENTRY(get_es3_restore_pointer)
108ENTRY(get_es3_restore_pointer_sz) 103ENTRY(get_es3_restore_pointer_sz)
109 .word . - get_es3_restore_pointer 104 .word . - get_es3_restore_pointer
110 105
111ENTRY(es3_sdrc_fix) 106 .text
112 ldr r4, sdrc_syscfg @ get config addr 107/*
113 ldr r5, [r4] @ get value 108 * L2 cache needs to be toggled for stable OFF mode functionality on 3630.
114 tst r5, #0x100 @ is part access blocked 109 * This function sets up a flag that will allow for this toggling to take
115 it eq 110 * place on 3630. Hopefully some version in the future may not need this.
116 biceq r5, r5, #0x100 @ clear bit if set 111 */
117 str r5, [r4] @ write back change 112ENTRY(enable_omap3630_toggle_l2_on_restore)
118 ldr r4, sdrc_mr_0 @ get config addr 113 stmfd sp!, {lr} @ save registers on stack
119 ldr r5, [r4] @ get value 114 /* Setup so that we will disable and enable l2 */
120 str r5, [r4] @ write back change 115 mov r1, #0x1
121 ldr r4, sdrc_emr2_0 @ get config addr 116 str r1, l2dis_3630
122 ldr r5, [r4] @ get value 117 ldmfd sp!, {pc} @ restore regs and return
123 str r5, [r4] @ write back change
124 ldr r4, sdrc_manual_0 @ get config addr
125 mov r5, #0x2 @ autorefresh command
126 str r5, [r4] @ kick off refreshes
127 ldr r4, sdrc_mr_1 @ get config addr
128 ldr r5, [r4] @ get value
129 str r5, [r4] @ write back change
130 ldr r4, sdrc_emr2_1 @ get config addr
131 ldr r5, [r4] @ get value
132 str r5, [r4] @ write back change
133 ldr r4, sdrc_manual_1 @ get config addr
134 mov r5, #0x2 @ autorefresh command
135 str r5, [r4] @ kick off refreshes
136 bx lr
137sdrc_syscfg:
138 .word SDRC_SYSCONFIG_P
139sdrc_mr_0:
140 .word SDRC_MR_0_P
141sdrc_emr2_0:
142 .word SDRC_EMR2_0_P
143sdrc_manual_0:
144 .word SDRC_MANUAL_0_P
145sdrc_mr_1:
146 .word SDRC_MR_1_P
147sdrc_emr2_1:
148 .word SDRC_EMR2_1_P
149sdrc_manual_1:
150 .word SDRC_MANUAL_1_P
151ENTRY(es3_sdrc_fix_sz)
152 .word . - es3_sdrc_fix
153 118
119 .text
154/* Function to call rom code to save secure ram context */ 120/* Function to call rom code to save secure ram context */
155ENTRY(save_secure_ram_context) 121ENTRY(save_secure_ram_context)
156 stmfd sp!, {r1-r12, lr} @ save registers on stack 122 stmfd sp!, {r1-r12, lr} @ save registers on stack
157save_secure_ram_debug:
158 /* b save_secure_ram_debug */ @ enable to debug save code
159 adr r3, api_params @ r3 points to parameters 123 adr r3, api_params @ r3 points to parameters
160 str r0, [r3,#0x4] @ r0 has sdram address 124 str r0, [r3,#0x4] @ r0 has sdram address
161 ldr r12, high_mask 125 ldr r12, high_mask
@@ -185,35 +149,162 @@ ENTRY(save_secure_ram_context_sz)
185 .word . - save_secure_ram_context 149 .word . - save_secure_ram_context
186 150
187/* 151/*
152 * ======================
153 * == Idle entry point ==
154 * ======================
155 */
156
157/*
188 * Forces OMAP into idle state 158 * Forces OMAP into idle state
189 * 159 *
190 * omap34xx_suspend() - This bit of code just executes the WFI 160 * omap34xx_cpu_suspend() - This bit of code saves the CPU context if needed
191 * for normal idles. 161 * and executes the WFI instruction. Calling WFI effectively changes the
162 * power domains states to the desired target power states.
163 *
192 * 164 *
193 * Note: This code get's copied to internal SRAM at boot. When the OMAP 165 * Notes:
194 * wakes up it continues execution at the point it went to sleep. 166 * - this code gets copied to internal SRAM at boot and after wake-up
167 * from OFF mode. The execution pointer in SRAM is _omap_sram_idle.
168 * - when the OMAP wakes up it continues at different execution points
169 * depending on the low power mode (non-OFF vs OFF modes),
170 * cf. 'Resume path for xxx mode' comments.
195 */ 171 */
196ENTRY(omap34xx_cpu_suspend) 172ENTRY(omap34xx_cpu_suspend)
197 stmfd sp!, {r0-r12, lr} @ save registers on stack 173 stmfd sp!, {r0-r12, lr} @ save registers on stack
198loop:
199 /*b loop*/ @Enable to debug by stepping through code
200 /* r0 contains restore pointer in sdram */
201 /* r1 contains information about saving context */
202 ldr r4, sdrc_power @ read the SDRC_POWER register
203 ldr r5, [r4] @ read the contents of SDRC_POWER
204 orr r5, r5, #0x40 @ enable self refresh on idle req
205 str r5, [r4] @ write back to SDRC_POWER register
206 174
175 /*
176 * r0 contains restore pointer in sdram
177 * r1 contains information about saving context:
178 * 0 - No context lost
179 * 1 - Only L1 and logic lost
180 * 2 - Only L2 lost
181 * 3 - Both L1 and L2 lost
182 */
183
184 /* Directly jump to WFI is the context save is not required */
207 cmp r1, #0x0 185 cmp r1, #0x0
208 /* If context save is required, do that and execute wfi */ 186 beq omap3_do_wfi
209 bne save_context_wfi 187
188 /* Otherwise fall through to the save context code */
189save_context_wfi:
190 mov r8, r0 @ Store SDRAM address in r8
191 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
192 mov r4, #0x1 @ Number of parameters for restore call
193 stmia r8!, {r4-r5} @ Push parameters for restore call
194 mrc p15, 1, r5, c9, c0, 2 @ Read L2 AUX ctrl register
195 stmia r8!, {r4-r5} @ Push parameters for restore call
196
197 /* Check what that target sleep state is from r1 */
198 cmp r1, #0x2 @ Only L2 lost, no need to save context
199 beq clean_caches
200
201l1_logic_lost:
202 /* Store sp and spsr to SDRAM */
203 mov r4, sp
204 mrs r5, spsr
205 mov r6, lr
206 stmia r8!, {r4-r6}
207 /* Save all ARM registers */
208 /* Coprocessor access control register */
209 mrc p15, 0, r6, c1, c0, 2
210 stmia r8!, {r6}
211 /* TTBR0, TTBR1 and Translation table base control */
212 mrc p15, 0, r4, c2, c0, 0
213 mrc p15, 0, r5, c2, c0, 1
214 mrc p15, 0, r6, c2, c0, 2
215 stmia r8!, {r4-r6}
216 /*
217 * Domain access control register, data fault status register,
218 * and instruction fault status register
219 */
220 mrc p15, 0, r4, c3, c0, 0
221 mrc p15, 0, r5, c5, c0, 0
222 mrc p15, 0, r6, c5, c0, 1
223 stmia r8!, {r4-r6}
224 /*
225 * Data aux fault status register, instruction aux fault status,
226 * data fault address register and instruction fault address register
227 */
228 mrc p15, 0, r4, c5, c1, 0
229 mrc p15, 0, r5, c5, c1, 1
230 mrc p15, 0, r6, c6, c0, 0
231 mrc p15, 0, r7, c6, c0, 2
232 stmia r8!, {r4-r7}
233 /*
234 * user r/w thread and process ID, user r/o thread and process ID,
235 * priv only thread and process ID, cache size selection
236 */
237 mrc p15, 0, r4, c13, c0, 2
238 mrc p15, 0, r5, c13, c0, 3
239 mrc p15, 0, r6, c13, c0, 4
240 mrc p15, 2, r7, c0, c0, 0
241 stmia r8!, {r4-r7}
242 /* Data TLB lockdown, instruction TLB lockdown registers */
243 mrc p15, 0, r5, c10, c0, 0
244 mrc p15, 0, r6, c10, c0, 1
245 stmia r8!, {r5-r6}
246 /* Secure or non secure vector base address, FCSE PID, Context PID*/
247 mrc p15, 0, r4, c12, c0, 0
248 mrc p15, 0, r5, c13, c0, 0
249 mrc p15, 0, r6, c13, c0, 1
250 stmia r8!, {r4-r6}
251 /* Primary remap, normal remap registers */
252 mrc p15, 0, r4, c10, c2, 0
253 mrc p15, 0, r5, c10, c2, 1
254 stmia r8!,{r4-r5}
255
256 /* Store current cpsr*/
257 mrs r2, cpsr
258 stmia r8!, {r2}
259
260 mrc p15, 0, r4, c1, c0, 0
261 /* save control register */
262 stmia r8!, {r4}
263
264clean_caches:
265 /*
266 * Clean Data or unified cache to POU
267 * How to invalidate only L1 cache???? - #FIX_ME#
268 * mcr p15, 0, r11, c7, c11, 1
269 */
270 cmp r1, #0x1 @ Check whether L2 inval is required
271 beq omap3_do_wfi
272
273clean_l2:
274 /*
275 * jump out to kernel flush routine
276 * - reuse that code is better
277 * - it executes in a cached space so is faster than refetch per-block
278 * - should be faster and will change with kernel
279 * - 'might' have to copy address, load and jump to it
280 */
281 ldr r1, kernel_flush
282 mov lr, pc
283 bx r1
284
285omap3_do_wfi:
286 ldr r4, sdrc_power @ read the SDRC_POWER register
287 ldr r5, [r4] @ read the contents of SDRC_POWER
288 orr r5, r5, #0x40 @ enable self refresh on idle req
289 str r5, [r4] @ write back to SDRC_POWER register
290
210 /* Data memory barrier and Data sync barrier */ 291 /* Data memory barrier and Data sync barrier */
211 mov r1, #0 292 mov r1, #0
212 mcr p15, 0, r1, c7, c10, 4 293 mcr p15, 0, r1, c7, c10, 4
213 mcr p15, 0, r1, c7, c10, 5 294 mcr p15, 0, r1, c7, c10, 5
214 295
296/*
297 * ===================================
298 * == WFI instruction => Enter idle ==
299 * ===================================
300 */
215 wfi @ wait for interrupt 301 wfi @ wait for interrupt
216 302
303/*
304 * ===================================
305 * == Resume path for non-OFF modes ==
306 * ===================================
307 */
217 nop 308 nop
218 nop 309 nop
219 nop 310 nop
@@ -226,9 +317,30 @@ loop:
226 nop 317 nop
227 bl wait_sdrc_ok 318 bl wait_sdrc_ok
228 319
229 ldmfd sp!, {r0-r12, pc} @ restore regs and return 320/*
321 * ===================================
322 * == Exit point from non-OFF modes ==
323 * ===================================
324 */
325 ldmfd sp!, {r0-r12, pc} @ restore regs and return
326
327
328/*
329 * ==============================
330 * == Resume path for OFF mode ==
331 * ==============================
332 */
333
334/*
335 * The restore_* functions are called by the ROM code
336 * when back from WFI in OFF mode.
337 * Cf. the get_*restore_pointer functions.
338 *
339 * restore_es3: applies to 34xx >= ES3.0
340 * restore_3630: applies to 36xx
341 * restore: common code for 3xxx
342 */
230restore_es3: 343restore_es3:
231 /*b restore_es3*/ @ Enable to debug restore code
232 ldr r5, pm_prepwstst_core_p 344 ldr r5, pm_prepwstst_core_p
233 ldr r4, [r5] 345 ldr r4, [r5]
234 and r4, r4, #0x3 346 and r4, r4, #0x3
@@ -245,82 +357,117 @@ copy_to_sram:
245 bne copy_to_sram 357 bne copy_to_sram
246 ldr r1, sram_base 358 ldr r1, sram_base
247 blx r1 359 blx r1
360 b restore
361
362restore_3630:
363 ldr r1, pm_prepwstst_core_p
364 ldr r2, [r1]
365 and r2, r2, #0x3
366 cmp r2, #0x0 @ Check if previous power state of CORE is OFF
367 bne restore
368 /* Disable RTA before giving control */
369 ldr r1, control_mem_rta
370 mov r2, #OMAP36XX_RTA_DISABLE
371 str r2, [r1]
372
373 /* Fall through to common code for the remaining logic */
374
248restore: 375restore:
249 /* b restore*/ @ Enable to debug restore code 376 /*
250 /* Check what was the reason for mpu reset and store the reason in r9*/ 377 * Check what was the reason for mpu reset and store the reason in r9:
251 /* 1 - Only L1 and logic lost */ 378 * 0 - No context lost
252 /* 2 - Only L2 lost - In this case, we wont be here */ 379 * 1 - Only L1 and logic lost
253 /* 3 - Both L1 and L2 lost */ 380 * 2 - Only L2 lost - In this case, we wont be here
254 ldr r1, pm_pwstctrl_mpu 381 * 3 - Both L1 and L2 lost
382 */
383 ldr r1, pm_pwstctrl_mpu
255 ldr r2, [r1] 384 ldr r2, [r1]
256 and r2, r2, #0x3 385 and r2, r2, #0x3
257 cmp r2, #0x0 @ Check if target power state was OFF or RET 386 cmp r2, #0x0 @ Check if target power state was OFF or RET
258 moveq r9, #0x3 @ MPU OFF => L1 and L2 lost 387 moveq r9, #0x3 @ MPU OFF => L1 and L2 lost
259 movne r9, #0x1 @ Only L1 and L2 lost => avoid L2 invalidation 388 movne r9, #0x1 @ Only L1 and L2 lost => avoid L2 invalidation
260 bne logic_l1_restore 389 bne logic_l1_restore
390
391 ldr r0, l2dis_3630
392 cmp r0, #0x1 @ should we disable L2 on 3630?
393 bne skipl2dis
394 mrc p15, 0, r0, c1, c0, 1
395 bic r0, r0, #2 @ disable L2 cache
396 mcr p15, 0, r0, c1, c0, 1
397skipl2dis:
261 ldr r0, control_stat 398 ldr r0, control_stat
262 ldr r1, [r0] 399 ldr r1, [r0]
263 and r1, #0x700 400 and r1, #0x700
264 cmp r1, #0x300 401 cmp r1, #0x300
265 beq l2_inv_gp 402 beq l2_inv_gp
266 mov r0, #40 @ set service ID for PPA 403 mov r0, #40 @ set service ID for PPA
267 mov r12, r0 @ copy secure Service ID in r12 404 mov r12, r0 @ copy secure Service ID in r12
268 mov r1, #0 @ set task id for ROM code in r1 405 mov r1, #0 @ set task id for ROM code in r1
269 mov r2, #4 @ set some flags in r2, r6 406 mov r2, #4 @ set some flags in r2, r6
270 mov r6, #0xff 407 mov r6, #0xff
271 adr r3, l2_inv_api_params @ r3 points to dummy parameters 408 adr r3, l2_inv_api_params @ r3 points to dummy parameters
272 mcr p15, 0, r0, c7, c10, 4 @ data write barrier 409 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
273 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 410 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
274 .word 0xE1600071 @ call SMI monitor (smi #1) 411 .word 0xE1600071 @ call SMI monitor (smi #1)
275 /* Write to Aux control register to set some bits */ 412 /* Write to Aux control register to set some bits */
276 mov r0, #42 @ set service ID for PPA 413 mov r0, #42 @ set service ID for PPA
277 mov r12, r0 @ copy secure Service ID in r12 414 mov r12, r0 @ copy secure Service ID in r12
278 mov r1, #0 @ set task id for ROM code in r1 415 mov r1, #0 @ set task id for ROM code in r1
279 mov r2, #4 @ set some flags in r2, r6 416 mov r2, #4 @ set some flags in r2, r6
280 mov r6, #0xff 417 mov r6, #0xff
281 ldr r4, scratchpad_base 418 ldr r4, scratchpad_base
282 ldr r3, [r4, #0xBC] @ r3 points to parameters 419 ldr r3, [r4, #0xBC] @ r3 points to parameters
283 mcr p15, 0, r0, c7, c10, 4 @ data write barrier 420 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
284 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 421 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
285 .word 0xE1600071 @ call SMI monitor (smi #1) 422 .word 0xE1600071 @ call SMI monitor (smi #1)
286 423
287#ifdef CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE 424#ifdef CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE
288 /* Restore L2 aux control register */ 425 /* Restore L2 aux control register */
289 @ set service ID for PPA 426 @ set service ID for PPA
290 mov r0, #CONFIG_OMAP3_L2_AUX_SECURE_SERVICE_SET_ID 427 mov r0, #CONFIG_OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
291 mov r12, r0 @ copy service ID in r12 428 mov r12, r0 @ copy service ID in r12
292 mov r1, #0 @ set task ID for ROM code in r1 429 mov r1, #0 @ set task ID for ROM code in r1
293 mov r2, #4 @ set some flags in r2, r6 430 mov r2, #4 @ set some flags in r2, r6
294 mov r6, #0xff 431 mov r6, #0xff
295 ldr r4, scratchpad_base 432 ldr r4, scratchpad_base
296 ldr r3, [r4, #0xBC] 433 ldr r3, [r4, #0xBC]
297 adds r3, r3, #8 @ r3 points to parameters 434 adds r3, r3, #8 @ r3 points to parameters
298 mcr p15, 0, r0, c7, c10, 4 @ data write barrier 435 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
299 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 436 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
300 .word 0xE1600071 @ call SMI monitor (smi #1) 437 .word 0xE1600071 @ call SMI monitor (smi #1)
301#endif 438#endif
302 b logic_l1_restore 439 b logic_l1_restore
440
303l2_inv_api_params: 441l2_inv_api_params:
304 .word 0x1, 0x00 442 .word 0x1, 0x00
305l2_inv_gp: 443l2_inv_gp:
306 /* Execute smi to invalidate L2 cache */ 444 /* Execute smi to invalidate L2 cache */
307 mov r12, #0x1 @ set up to invalide L2 445 mov r12, #0x1 @ set up to invalidate L2
308smi: .word 0xE1600070 @ Call SMI monitor (smieq) 446 .word 0xE1600070 @ Call SMI monitor (smieq)
309 /* Write to Aux control register to set some bits */ 447 /* Write to Aux control register to set some bits */
310 ldr r4, scratchpad_base 448 ldr r4, scratchpad_base
311 ldr r3, [r4,#0xBC] 449 ldr r3, [r4,#0xBC]
312 ldr r0, [r3,#4] 450 ldr r0, [r3,#4]
313 mov r12, #0x3 451 mov r12, #0x3
314 .word 0xE1600070 @ Call SMI monitor (smieq) 452 .word 0xE1600070 @ Call SMI monitor (smieq)
315 ldr r4, scratchpad_base 453 ldr r4, scratchpad_base
316 ldr r3, [r4,#0xBC] 454 ldr r3, [r4,#0xBC]
317 ldr r0, [r3,#12] 455 ldr r0, [r3,#12]
318 mov r12, #0x2 456 mov r12, #0x2
319 .word 0xE1600070 @ Call SMI monitor (smieq) 457 .word 0xE1600070 @ Call SMI monitor (smieq)
320logic_l1_restore: 458logic_l1_restore:
459 ldr r1, l2dis_3630
460 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630
461 bne skipl2reen
462 mrc p15, 0, r1, c1, c0, 1
463 orr r1, r1, #2 @ re-enable L2 cache
464 mcr p15, 0, r1, c1, c0, 1
465skipl2reen:
321 mov r1, #0 466 mov r1, #0
322 /* Invalidate all instruction caches to PoU 467 /*
323 * and flush branch target cache */ 468 * Invalidate all instruction caches to PoU
469 * and flush branch target cache
470 */
324 mcr p15, 0, r1, c7, c5, 0 471 mcr p15, 0, r1, c7, c5, 0
325 472
326 ldr r4, scratchpad_base 473 ldr r4, scratchpad_base
@@ -341,33 +488,33 @@ logic_l1_restore:
341 MCR p15, 0, r6, c2, c0, 1 488 MCR p15, 0, r6, c2, c0, 1
342 /* Translation table base control register */ 489 /* Translation table base control register */
343 MCR p15, 0, r7, c2, c0, 2 490 MCR p15, 0, r7, c2, c0, 2
344 /*domain access Control Register */ 491 /* Domain access Control Register */
345 MCR p15, 0, r8, c3, c0, 0 492 MCR p15, 0, r8, c3, c0, 0
346 /* data fault status Register */ 493 /* Data fault status Register */
347 MCR p15, 0, r9, c5, c0, 0 494 MCR p15, 0, r9, c5, c0, 0
348 495
349 ldmia r3!,{r4-r8} 496 ldmia r3!,{r4-r8}
350 /* instruction fault status Register */ 497 /* Instruction fault status Register */
351 MCR p15, 0, r4, c5, c0, 1 498 MCR p15, 0, r4, c5, c0, 1
352 /*Data Auxiliary Fault Status Register */ 499 /* Data Auxiliary Fault Status Register */
353 MCR p15, 0, r5, c5, c1, 0 500 MCR p15, 0, r5, c5, c1, 0
354 /*Instruction Auxiliary Fault Status Register*/ 501 /* Instruction Auxiliary Fault Status Register*/
355 MCR p15, 0, r6, c5, c1, 1 502 MCR p15, 0, r6, c5, c1, 1
356 /*Data Fault Address Register */ 503 /* Data Fault Address Register */
357 MCR p15, 0, r7, c6, c0, 0 504 MCR p15, 0, r7, c6, c0, 0
358 /*Instruction Fault Address Register*/ 505 /* Instruction Fault Address Register*/
359 MCR p15, 0, r8, c6, c0, 2 506 MCR p15, 0, r8, c6, c0, 2
360 ldmia r3!,{r4-r7} 507 ldmia r3!,{r4-r7}
361 508
362 /* user r/w thread and process ID */ 509 /* User r/w thread and process ID */
363 MCR p15, 0, r4, c13, c0, 2 510 MCR p15, 0, r4, c13, c0, 2
364 /* user ro thread and process ID */ 511 /* User ro thread and process ID */
365 MCR p15, 0, r5, c13, c0, 3 512 MCR p15, 0, r5, c13, c0, 3
366 /*Privileged only thread and process ID */ 513 /* Privileged only thread and process ID */
367 MCR p15, 0, r6, c13, c0, 4 514 MCR p15, 0, r6, c13, c0, 4
368 /* cache size selection */ 515 /* Cache size selection */
369 MCR p15, 2, r7, c0, c0, 0 516 MCR p15, 2, r7, c0, c0, 0
370 ldmia r3!,{r4-r8} 517 ldmia r3!,{r4-r8}
371 /* Data TLB lockdown registers */ 518 /* Data TLB lockdown registers */
372 MCR p15, 0, r4, c10, c0, 0 519 MCR p15, 0, r4, c10, c0, 0
373 /* Instruction TLB lockdown registers */ 520 /* Instruction TLB lockdown registers */
@@ -379,26 +526,27 @@ logic_l1_restore:
379 /* Context PID */ 526 /* Context PID */
380 MCR p15, 0, r8, c13, c0, 1 527 MCR p15, 0, r8, c13, c0, 1
381 528
382 ldmia r3!,{r4-r5} 529 ldmia r3!,{r4-r5}
383 /* primary memory remap register */ 530 /* Primary memory remap register */
384 MCR p15, 0, r4, c10, c2, 0 531 MCR p15, 0, r4, c10, c2, 0
385 /*normal memory remap register */ 532 /* Normal memory remap register */
386 MCR p15, 0, r5, c10, c2, 1 533 MCR p15, 0, r5, c10, c2, 1
387 534
388 /* Restore cpsr */ 535 /* Restore cpsr */
389 ldmia r3!,{r4} /*load CPSR from SDRAM*/ 536 ldmia r3!,{r4} @ load CPSR from SDRAM
390 msr cpsr, r4 /*store cpsr */ 537 msr cpsr, r4 @ store cpsr
391 538
392 /* Enabling MMU here */ 539 /* Enabling MMU here */
393 mrc p15, 0, r7, c2, c0, 2 /* Read TTBRControl */ 540 mrc p15, 0, r7, c2, c0, 2 @ Read TTBRControl
394 /* Extract N (0:2) bits and decide whether to use TTBR0 or TTBR1*/ 541 /* Extract N (0:2) bits and decide whether to use TTBR0 or TTBR1 */
395 and r7, #0x7 542 and r7, #0x7
396 cmp r7, #0x0 543 cmp r7, #0x0
397 beq usettbr0 544 beq usettbr0
398ttbr_error: 545ttbr_error:
399 /* More work needs to be done to support N[0:2] value other than 0 546 /*
400 * So looping here so that the error can be detected 547 * More work needs to be done to support N[0:2] value other than 0
401 */ 548 * So looping here so that the error can be detected
549 */
402 b ttbr_error 550 b ttbr_error
403usettbr0: 551usettbr0:
404 mrc p15, 0, r2, c2, c0, 0 552 mrc p15, 0, r2, c2, c0, 0
@@ -406,21 +554,25 @@ usettbr0:
406 and r2, r5 554 and r2, r5
407 mov r4, pc 555 mov r4, pc
408 ldr r5, table_index_mask 556 ldr r5, table_index_mask
409 and r4, r5 /* r4 = 31 to 20 bits of pc */ 557 and r4, r5 @ r4 = 31 to 20 bits of pc
410 /* Extract the value to be written to table entry */ 558 /* Extract the value to be written to table entry */
411 ldr r1, table_entry 559 ldr r1, table_entry
412 add r1, r1, r4 /* r1 has value to be written to table entry*/ 560 /* r1 has the value to be written to table entry*/
561 add r1, r1, r4
413 /* Getting the address of table entry to modify */ 562 /* Getting the address of table entry to modify */
414 lsr r4, #18 563 lsr r4, #18
415 add r2, r4 /* r2 has the location which needs to be modified */ 564 /* r2 has the location which needs to be modified */
565 add r2, r4
416 /* Storing previous entry of location being modified */ 566 /* Storing previous entry of location being modified */
417 ldr r5, scratchpad_base 567 ldr r5, scratchpad_base
418 ldr r4, [r2] 568 ldr r4, [r2]
419 str r4, [r5, #0xC0] 569 str r4, [r5, #0xC0]
420 /* Modify the table entry */ 570 /* Modify the table entry */
421 str r1, [r2] 571 str r1, [r2]
422 /* Storing address of entry being modified 572 /*
423 * - will be restored after enabling MMU */ 573 * Storing address of entry being modified
574 * - will be restored after enabling MMU
575 */
424 ldr r5, scratchpad_base 576 ldr r5, scratchpad_base
425 str r2, [r5, #0xC4] 577 str r2, [r5, #0xC4]
426 578
@@ -429,8 +581,11 @@ usettbr0:
429 mcr p15, 0, r0, c7, c5, 6 @ Invalidate branch predictor array 581 mcr p15, 0, r0, c7, c5, 6 @ Invalidate branch predictor array
430 mcr p15, 0, r0, c8, c5, 0 @ Invalidate instruction TLB 582 mcr p15, 0, r0, c8, c5, 0 @ Invalidate instruction TLB
431 mcr p15, 0, r0, c8, c6, 0 @ Invalidate data TLB 583 mcr p15, 0, r0, c8, c6, 0 @ Invalidate data TLB
432 /* Restore control register but dont enable caches here*/ 584 /*
433 /* Caches will be enabled after restoring MMU table entry */ 585 * Restore control register. This enables the MMU.
586 * The caches and prediction are not enabled here, they
587 * will be enabled after restoring the MMU table entry.
588 */
434 ldmia r3!, {r4} 589 ldmia r3!, {r4}
435 /* Store previous value of control register in scratchpad */ 590 /* Store previous value of control register in scratchpad */
436 str r4, [r5, #0xC8] 591 str r4, [r5, #0xC8]
@@ -438,212 +593,144 @@ usettbr0:
438 and r4, r2 593 and r4, r2
439 mcr p15, 0, r4, c1, c0, 0 594 mcr p15, 0, r4, c1, c0, 0
440 595
441 ldmfd sp!, {r0-r12, pc} @ restore regs and return 596/*
442save_context_wfi: 597 * ==============================
443 /*b save_context_wfi*/ @ enable to debug save code 598 * == Exit point from OFF mode ==
444 mov r8, r0 /* Store SDRAM address in r8 */ 599 * ==============================
445 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register 600 */
446 mov r4, #0x1 @ Number of parameters for restore call 601 ldmfd sp!, {r0-r12, pc} @ restore regs and return
447 stmia r8!, {r4-r5} @ Push parameters for restore call
448 mrc p15, 1, r5, c9, c0, 2 @ Read L2 AUX ctrl register
449 stmia r8!, {r4-r5} @ Push parameters for restore call
450 /* Check what that target sleep state is:stored in r1*/
451 /* 1 - Only L1 and logic lost */
452 /* 2 - Only L2 lost */
453 /* 3 - Both L1 and L2 lost */
454 cmp r1, #0x2 /* Only L2 lost */
455 beq clean_l2
456 cmp r1, #0x1 /* L2 retained */
457 /* r9 stores whether to clean L2 or not*/
458 moveq r9, #0x0 /* Dont Clean L2 */
459 movne r9, #0x1 /* Clean L2 */
460l1_logic_lost:
461 /* Store sp and spsr to SDRAM */
462 mov r4, sp
463 mrs r5, spsr
464 mov r6, lr
465 stmia r8!, {r4-r6}
466 /* Save all ARM registers */
467 /* Coprocessor access control register */
468 mrc p15, 0, r6, c1, c0, 2
469 stmia r8!, {r6}
470 /* TTBR0, TTBR1 and Translation table base control */
471 mrc p15, 0, r4, c2, c0, 0
472 mrc p15, 0, r5, c2, c0, 1
473 mrc p15, 0, r6, c2, c0, 2
474 stmia r8!, {r4-r6}
475 /* Domain access control register, data fault status register,
476 and instruction fault status register */
477 mrc p15, 0, r4, c3, c0, 0
478 mrc p15, 0, r5, c5, c0, 0
479 mrc p15, 0, r6, c5, c0, 1
480 stmia r8!, {r4-r6}
481 /* Data aux fault status register, instruction aux fault status,
482 datat fault address register and instruction fault address register*/
483 mrc p15, 0, r4, c5, c1, 0
484 mrc p15, 0, r5, c5, c1, 1
485 mrc p15, 0, r6, c6, c0, 0
486 mrc p15, 0, r7, c6, c0, 2
487 stmia r8!, {r4-r7}
488 /* user r/w thread and process ID, user r/o thread and process ID,
489 priv only thread and process ID, cache size selection */
490 mrc p15, 0, r4, c13, c0, 2
491 mrc p15, 0, r5, c13, c0, 3
492 mrc p15, 0, r6, c13, c0, 4
493 mrc p15, 2, r7, c0, c0, 0
494 stmia r8!, {r4-r7}
495 /* Data TLB lockdown, instruction TLB lockdown registers */
496 mrc p15, 0, r5, c10, c0, 0
497 mrc p15, 0, r6, c10, c0, 1
498 stmia r8!, {r5-r6}
499 /* Secure or non secure vector base address, FCSE PID, Context PID*/
500 mrc p15, 0, r4, c12, c0, 0
501 mrc p15, 0, r5, c13, c0, 0
502 mrc p15, 0, r6, c13, c0, 1
503 stmia r8!, {r4-r6}
504 /* Primary remap, normal remap registers */
505 mrc p15, 0, r4, c10, c2, 0
506 mrc p15, 0, r5, c10, c2, 1
507 stmia r8!,{r4-r5}
508 602
509 /* Store current cpsr*/
510 mrs r2, cpsr
511 stmia r8!, {r2}
512 603
513 mrc p15, 0, r4, c1, c0, 0 604/*
514 /* save control register */ 605 * Internal functions
515 stmia r8!, {r4} 606 */
516clean_caches:
517 /* Clean Data or unified cache to POU*/
518 /* How to invalidate only L1 cache???? - #FIX_ME# */
519 /* mcr p15, 0, r11, c7, c11, 1 */
520 cmp r9, #1 /* Check whether L2 inval is required or not*/
521 bne skip_l2_inval
522clean_l2:
523 /* read clidr */
524 mrc p15, 1, r0, c0, c0, 1
525 /* extract loc from clidr */
526 ands r3, r0, #0x7000000
527 /* left align loc bit field */
528 mov r3, r3, lsr #23
529 /* if loc is 0, then no need to clean */
530 beq finished
531 /* start clean at cache level 0 */
532 mov r10, #0
533loop1:
534 /* work out 3x current cache level */
535 add r2, r10, r10, lsr #1
536 /* extract cache type bits from clidr*/
537 mov r1, r0, lsr r2
538 /* mask of the bits for current cache only */
539 and r1, r1, #7
540 /* see what cache we have at this level */
541 cmp r1, #2
542 /* skip if no cache, or just i-cache */
543 blt skip
544 /* select current cache level in cssr */
545 mcr p15, 2, r10, c0, c0, 0
546 /* isb to sych the new cssr&csidr */
547 isb
548 /* read the new csidr */
549 mrc p15, 1, r1, c0, c0, 0
550 /* extract the length of the cache lines */
551 and r2, r1, #7
552 /* add 4 (line length offset) */
553 add r2, r2, #4
554 ldr r4, assoc_mask
555 /* find maximum number on the way size */
556 ands r4, r4, r1, lsr #3
557 /* find bit position of way size increment */
558 clz r5, r4
559 ldr r7, numset_mask
560 /* extract max number of the index size*/
561 ands r7, r7, r1, lsr #13
562loop2:
563 mov r9, r4
564 /* create working copy of max way size*/
565loop3:
566 /* factor way and cache number into r11 */
567 orr r11, r10, r9, lsl r5
568 /* factor index number into r11 */
569 orr r11, r11, r7, lsl r2
570 /*clean & invalidate by set/way */
571 mcr p15, 0, r11, c7, c10, 2
572 /* decrement the way*/
573 subs r9, r9, #1
574 bge loop3
575 /*decrement the index */
576 subs r7, r7, #1
577 bge loop2
578skip:
579 add r10, r10, #2
580 /* increment cache number */
581 cmp r3, r10
582 bgt loop1
583finished:
584 /*swith back to cache level 0 */
585 mov r10, #0
586 /* select current cache level in cssr */
587 mcr p15, 2, r10, c0, c0, 0
588 isb
589skip_l2_inval:
590 /* Data memory barrier and Data sync barrier */
591 mov r1, #0
592 mcr p15, 0, r1, c7, c10, 4
593 mcr p15, 0, r1, c7, c10, 5
594 607
595 wfi @ wait for interrupt 608/* This function implements the erratum ID i443 WA, applies to 34xx >= ES3.0 */
596 nop 609 .text
597 nop 610ENTRY(es3_sdrc_fix)
598 nop 611 ldr r4, sdrc_syscfg @ get config addr
599 nop 612 ldr r5, [r4] @ get value
600 nop 613 tst r5, #0x100 @ is part access blocked
601 nop 614 it eq
602 nop 615 biceq r5, r5, #0x100 @ clear bit if set
603 nop 616 str r5, [r4] @ write back change
604 nop 617 ldr r4, sdrc_mr_0 @ get config addr
605 nop 618 ldr r5, [r4] @ get value
606 bl wait_sdrc_ok 619 str r5, [r4] @ write back change
607 /* restore regs and return */ 620 ldr r4, sdrc_emr2_0 @ get config addr
608 ldmfd sp!, {r0-r12, pc} 621 ldr r5, [r4] @ get value
622 str r5, [r4] @ write back change
623 ldr r4, sdrc_manual_0 @ get config addr
624 mov r5, #0x2 @ autorefresh command
625 str r5, [r4] @ kick off refreshes
626 ldr r4, sdrc_mr_1 @ get config addr
627 ldr r5, [r4] @ get value
628 str r5, [r4] @ write back change
629 ldr r4, sdrc_emr2_1 @ get config addr
630 ldr r5, [r4] @ get value
631 str r5, [r4] @ write back change
632 ldr r4, sdrc_manual_1 @ get config addr
633 mov r5, #0x2 @ autorefresh command
634 str r5, [r4] @ kick off refreshes
635 bx lr
636
637sdrc_syscfg:
638 .word SDRC_SYSCONFIG_P
639sdrc_mr_0:
640 .word SDRC_MR_0_P
641sdrc_emr2_0:
642 .word SDRC_EMR2_0_P
643sdrc_manual_0:
644 .word SDRC_MANUAL_0_P
645sdrc_mr_1:
646 .word SDRC_MR_1_P
647sdrc_emr2_1:
648 .word SDRC_EMR2_1_P
649sdrc_manual_1:
650 .word SDRC_MANUAL_1_P
651ENTRY(es3_sdrc_fix_sz)
652 .word . - es3_sdrc_fix
653
654/*
655 * This function implements the erratum ID i581 WA:
656 * SDRC state restore before accessing the SDRAM
657 *
658 * Only used at return from non-OFF mode. For OFF
659 * mode the ROM code configures the SDRC and
660 * the DPLL before calling the restore code directly
661 * from DDR.
662 */
609 663
610/* Make sure SDRC accesses are ok */ 664/* Make sure SDRC accesses are ok */
611wait_sdrc_ok: 665wait_sdrc_ok:
612 ldr r4, cm_idlest1_core 666
613 ldr r5, [r4] 667/* DPLL3 must be locked before accessing the SDRC. Maybe the HW ensures this */
614 and r5, r5, #0x2 668 ldr r4, cm_idlest_ckgen
615 cmp r5, #0 669wait_dpll3_lock:
616 bne wait_sdrc_ok 670 ldr r5, [r4]
617 ldr r4, sdrc_power 671 tst r5, #1
618 ldr r5, [r4] 672 beq wait_dpll3_lock
619 bic r5, r5, #0x40 673
620 str r5, [r4] 674 ldr r4, cm_idlest1_core
675wait_sdrc_ready:
676 ldr r5, [r4]
677 tst r5, #0x2
678 bne wait_sdrc_ready
679 /* allow DLL powerdown upon hw idle req */
680 ldr r4, sdrc_power
681 ldr r5, [r4]
682 bic r5, r5, #0x40
683 str r5, [r4]
684
685is_dll_in_lock_mode:
686 /* Is dll in lock mode? */
687 ldr r4, sdrc_dlla_ctrl
688 ldr r5, [r4]
689 tst r5, #0x4
690 bxne lr @ Return if locked
691 /* wait till dll locks */
692wait_dll_lock_timed:
693 ldr r4, wait_dll_lock_counter
694 add r4, r4, #1
695 str r4, wait_dll_lock_counter
696 ldr r4, sdrc_dlla_status
697 /* Wait 20uS for lock */
698 mov r6, #8
621wait_dll_lock: 699wait_dll_lock:
622 /* Is dll in lock mode? */ 700 subs r6, r6, #0x1
623 ldr r4, sdrc_dlla_ctrl 701 beq kick_dll
624 ldr r5, [r4] 702 ldr r5, [r4]
625 tst r5, #0x4 703 and r5, r5, #0x4
626 bxne lr 704 cmp r5, #0x4
627 /* wait till dll locks */ 705 bne wait_dll_lock
628 ldr r4, sdrc_dlla_status 706 bx lr @ Return when locked
629 ldr r5, [r4] 707
630 and r5, r5, #0x4 708 /* disable/reenable DLL if not locked */
631 cmp r5, #0x4 709kick_dll:
632 bne wait_dll_lock 710 ldr r4, sdrc_dlla_ctrl
633 bx lr 711 ldr r5, [r4]
712 mov r6, r5
713 bic r6, #(1<<3) @ disable dll
714 str r6, [r4]
715 dsb
716 orr r6, r6, #(1<<3) @ enable dll
717 str r6, [r4]
718 dsb
719 ldr r4, kick_counter
720 add r4, r4, #1
721 str r4, kick_counter
722 b wait_dll_lock_timed
634 723
635cm_idlest1_core: 724cm_idlest1_core:
636 .word CM_IDLEST1_CORE_V 725 .word CM_IDLEST1_CORE_V
726cm_idlest_ckgen:
727 .word CM_IDLEST_CKGEN_V
637sdrc_dlla_status: 728sdrc_dlla_status:
638 .word SDRC_DLLA_STATUS_V 729 .word SDRC_DLLA_STATUS_V
639sdrc_dlla_ctrl: 730sdrc_dlla_ctrl:
640 .word SDRC_DLLA_CTRL_V 731 .word SDRC_DLLA_CTRL_V
641pm_prepwstst_core:
642 .word PM_PREPWSTST_CORE_V
643pm_prepwstst_core_p: 732pm_prepwstst_core_p:
644 .word PM_PREPWSTST_CORE_P 733 .word PM_PREPWSTST_CORE_P
645pm_prepwstst_mpu:
646 .word PM_PREPWSTST_MPU_V
647pm_pwstctrl_mpu: 734pm_pwstctrl_mpu:
648 .word PM_PWSTCTRL_MPU_P 735 .word PM_PWSTCTRL_MPU_P
649scratchpad_base: 736scratchpad_base:
@@ -651,13 +738,7 @@ scratchpad_base:
651sram_base: 738sram_base:
652 .word SRAM_BASE_P + 0x8000 739 .word SRAM_BASE_P + 0x8000
653sdrc_power: 740sdrc_power:
654 .word SDRC_POWER_V 741 .word SDRC_POWER_V
655clk_stabilize_delay:
656 .word 0x000001FF
657assoc_mask:
658 .word 0x3ff
659numset_mask:
660 .word 0x7fff
661ttbrbit_mask: 742ttbrbit_mask:
662 .word 0xFFFFC000 743 .word 0xFFFFC000
663table_index_mask: 744table_index_mask:
@@ -668,5 +749,20 @@ cache_pred_disable_mask:
668 .word 0xFFFFE7FB 749 .word 0xFFFFE7FB
669control_stat: 750control_stat:
670 .word CONTROL_STAT 751 .word CONTROL_STAT
752control_mem_rta:
753 .word CONTROL_MEM_RTA_CTRL
754kernel_flush:
755 .word v7_flush_dcache_all
756l2dis_3630:
757 .word 0
758 /*
759 * When exporting to userspace while the counters are in SRAM,
760 * these 2 words need to be at the end to facilitate retrival!
761 */
762kick_counter:
763 .word 0
764wait_dll_lock_counter:
765 .word 0
766
671ENTRY(omap34xx_cpu_suspend_sz) 767ENTRY(omap34xx_cpu_suspend_sz)
672 .word . - omap34xx_cpu_suspend 768 .word . - omap34xx_cpu_suspend
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index fa2e5bffbb8e..6983cb4d4cae 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -28,9 +28,16 @@ config S3C2412_DMA
28 28
29config S3C2412_PM 29config S3C2412_PM
30 bool 30 bool
31 select S3C2412_PM_SLEEP
31 help 32 help
32 Internal config node to apply S3C2412 power management 33 Internal config node to apply S3C2412 power management
33 34
35config S3C2412_PM_SLEEP
36 bool
37 help
38 Internal config node to apply sleep for S3C2412 power management.
39 Can be selected by another SoCs with similar sleep procedure.
40
34# Note, the S3C2412 IOtiming support is in plat-s3c24xx 41# Note, the S3C2412 IOtiming support is in plat-s3c24xx
35 42
36config S3C2412_CPUFREQ 43config S3C2412_CPUFREQ
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile
index 530ec46cbaea..6c48a91ea39e 100644
--- a/arch/arm/mach-s3c2412/Makefile
+++ b/arch/arm/mach-s3c2412/Makefile
@@ -14,7 +14,8 @@ obj-$(CONFIG_CPU_S3C2412) += irq.o
14obj-$(CONFIG_CPU_S3C2412) += clock.o 14obj-$(CONFIG_CPU_S3C2412) += clock.o
15obj-$(CONFIG_CPU_S3C2412) += gpio.o 15obj-$(CONFIG_CPU_S3C2412) += gpio.o
16obj-$(CONFIG_S3C2412_DMA) += dma.o 16obj-$(CONFIG_S3C2412_DMA) += dma.o
17obj-$(CONFIG_S3C2412_PM) += pm.o sleep.o 17obj-$(CONFIG_S3C2412_PM) += pm.o
18obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o
18obj-$(CONFIG_S3C2412_CPUFREQ) += cpu-freq.o 19obj-$(CONFIG_S3C2412_CPUFREQ) += cpu-freq.o
19 20
20# Machine support 21# Machine support
diff --git a/arch/arm/mach-s3c2416/Kconfig b/arch/arm/mach-s3c2416/Kconfig
index 27b3e7c9d613..df8d14974c90 100644
--- a/arch/arm/mach-s3c2416/Kconfig
+++ b/arch/arm/mach-s3c2416/Kconfig
@@ -27,6 +27,7 @@ config S3C2416_DMA
27 27
28config S3C2416_PM 28config S3C2416_PM
29 bool 29 bool
30 select S3C2412_PM_SLEEP
30 help 31 help
31 Internal config node to apply S3C2416 power management 32 Internal config node to apply S3C2416 power management
32 33
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 28677caf3613..461aa035afc0 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -378,6 +378,12 @@ static struct max8998_regulator_data aquila_regulators[] = {
378static struct max8998_platform_data aquila_max8998_pdata = { 378static struct max8998_platform_data aquila_max8998_pdata = {
379 .num_regulators = ARRAY_SIZE(aquila_regulators), 379 .num_regulators = ARRAY_SIZE(aquila_regulators),
380 .regulators = aquila_regulators, 380 .regulators = aquila_regulators,
381 .buck1_set1 = S5PV210_GPH0(3),
382 .buck1_set2 = S5PV210_GPH0(4),
383 .buck2_set3 = S5PV210_GPH0(5),
384 .buck1_max_voltage1 = 1200000,
385 .buck1_max_voltage2 = 1200000,
386 .buck2_max_voltage = 1200000,
381}; 387};
382#endif 388#endif
383 389
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index b1dcf964a768..e22d5112fd44 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -518,6 +518,12 @@ static struct max8998_regulator_data goni_regulators[] = {
518static struct max8998_platform_data goni_max8998_pdata = { 518static struct max8998_platform_data goni_max8998_pdata = {
519 .num_regulators = ARRAY_SIZE(goni_regulators), 519 .num_regulators = ARRAY_SIZE(goni_regulators),
520 .regulators = goni_regulators, 520 .regulators = goni_regulators,
521 .buck1_set1 = S5PV210_GPH0(3),
522 .buck1_set2 = S5PV210_GPH0(4),
523 .buck2_set3 = S5PV210_GPH0(5),
524 .buck1_max_voltage1 = 1200000,
525 .buck1_max_voltage2 = 1200000,
526 .buck2_max_voltage = 1200000,
521}; 527};
522#endif 528#endif
523 529
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
index a285d13c7416..f428c4db2b60 100644
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -1,4 +1,5 @@
1/* 1/*
2 * Copyright (C) 2010 Magnus Damm
2 * Copyright (C) 2008 Renesas Solutions Corp. 3 * Copyright (C) 2008 Renesas Solutions Corp.
3 * 4 *
4 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
@@ -14,24 +15,45 @@
14 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
16 */ 17 */
17#include <mach/hardware.h>
18#include <mach/irqs.h> 18#include <mach/irqs.h>
19 19
20#define INTCA_BASE 0xe6980000
21#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
22#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
23#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
24#define INTLVLB_OFFS 0x00000034 /* previous priority level */
25
20 .macro disable_fiq 26 .macro disable_fiq
21 .endm 27 .endm
22 28
23 .macro get_irqnr_preamble, base, tmp 29 .macro get_irqnr_preamble, base, tmp
24 ldr \base, =INTFLGA 30 ldr \base, =INTCA_BASE
25 .endm 31 .endm
26 32
27 .macro arch_ret_to_user, tmp1, tmp2 33 .macro arch_ret_to_user, tmp1, tmp2
28 .endm 34 .endm
29 35
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 36 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 ldr \irqnr, [\base] 37 /* The single INTFLGA read access below results in the following:
38 *
39 * 1. INTLVLB is updated with old priority value from INTLVLA
40 * 2. Highest priority interrupt is accepted
41 * 3. INTLVLA is updated to contain priority of accepted interrupt
42 * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
43 */
44 ldr \irqnr, [\base, #INTFLGA_OFFS]
45
46 /* Restore INTLVLA with the value saved in INTLVLB.
47 * This is required to support interrupt priorities properly.
48 */
49 ldrb \tmp, [\base, #INTLVLB_OFFS]
50 strb \tmp, [\base, #INTLVLA_OFFS]
51
52 /* Handle invalid vector number case */
32 cmp \irqnr, #0 53 cmp \irqnr, #0
33 beq 1000f 54 beq 1000f
34 /* intevt to irq number */ 55
56 /* Convert vector to irq number, same as the evt2irq() macro */
35 lsr \irqnr, \irqnr, #0x5 57 lsr \irqnr, \irqnr, #0x5
36 subs \irqnr, \irqnr, #16 58 subs \irqnr, \irqnr, #16
37 59
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
index 4aecf6e3a859..2b8fd8b942fe 100644
--- a/arch/arm/mach-shmobile/include/mach/vmalloc.h
+++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h
@@ -2,6 +2,6 @@
2#define __ASM_MACH_VMALLOC_H 2#define __ASM_MACH_VMALLOC_H
3 3
4/* Vmalloc at ... - 0xe5ffffff */ 4/* Vmalloc at ... - 0xe5ffffff */
5#define VMALLOC_END 0xe6000000 5#define VMALLOC_END 0xe6000000UL
6 6
7#endif /* __ASM_MACH_VMALLOC_H */ 7#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index a863f5546a6b..c4b2b478b1a5 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -15,6 +15,10 @@
15 * 15 *
16 * Support functions for the OMAP internal DMA channels. 16 * Support functions for the OMAP internal DMA channels.
17 * 17 *
18 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
19 * Converted DMA library into DMA platform driver.
20 * - G, Manjunath Kondaiah <manjugk@ti.com>
21 *
18 * This program is free software; you can redistribute it and/or modify 22 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as 23 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation. 24 * published by the Free Software Foundation.
@@ -53,7 +57,11 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
53 57
54#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec) 58#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec)
55 59
60static struct omap_system_dma_plat_info *p;
61static struct omap_dma_dev_attr *d;
62
56static int enable_1510_mode; 63static int enable_1510_mode;
64static u32 errata;
57 65
58static struct omap_dma_global_context_registers { 66static struct omap_dma_global_context_registers {
59 u32 dma_irqenable_l0; 67 u32 dma_irqenable_l0;
@@ -61,27 +69,6 @@ static struct omap_dma_global_context_registers {
61 u32 dma_gcr; 69 u32 dma_gcr;
62} omap_dma_global_context; 70} omap_dma_global_context;
63 71
64struct omap_dma_lch {
65 int next_lch;
66 int dev_id;
67 u16 saved_csr;
68 u16 enabled_irqs;
69 const char *dev_name;
70 void (*callback)(int lch, u16 ch_status, void *data);
71 void *data;
72
73#ifndef CONFIG_ARCH_OMAP1
74 /* required for Dynamic chaining */
75 int prev_linked_ch;
76 int next_linked_ch;
77 int state;
78 int chain_id;
79
80 int status;
81#endif
82 long flags;
83};
84
85struct dma_link_info { 72struct dma_link_info {
86 int *linked_dmach_q; 73 int *linked_dmach_q;
87 int no_of_lchs_linked; 74 int no_of_lchs_linked;
@@ -137,15 +124,6 @@ static int omap_dma_reserve_channels;
137 124
138static spinlock_t dma_chan_lock; 125static spinlock_t dma_chan_lock;
139static struct omap_dma_lch *dma_chan; 126static struct omap_dma_lch *dma_chan;
140static void __iomem *omap_dma_base;
141
142static const u8 omap1_dma_irq[OMAP1_LOGICAL_DMA_CH_COUNT] = {
143 INT_DMA_CH0_6, INT_DMA_CH1_7, INT_DMA_CH2_8, INT_DMA_CH3,
144 INT_DMA_CH4, INT_DMA_CH5, INT_1610_DMA_CH6, INT_1610_DMA_CH7,
145 INT_1610_DMA_CH8, INT_1610_DMA_CH9, INT_1610_DMA_CH10,
146 INT_1610_DMA_CH11, INT_1610_DMA_CH12, INT_1610_DMA_CH13,
147 INT_1610_DMA_CH14, INT_1610_DMA_CH15, INT_DMA_LCD
148};
149 127
150static inline void disable_lnk(int lch); 128static inline void disable_lnk(int lch);
151static void omap_disable_channel_irq(int lch); 129static void omap_disable_channel_irq(int lch);
@@ -154,27 +132,9 @@ static inline void omap_enable_channel_irq(int lch);
154#define REVISIT_24XX() printk(KERN_ERR "FIXME: no %s on 24xx\n", \ 132#define REVISIT_24XX() printk(KERN_ERR "FIXME: no %s on 24xx\n", \
155 __func__); 133 __func__);
156 134
157#define dma_read(reg) \
158({ \
159 u32 __val; \
160 if (cpu_class_is_omap1()) \
161 __val = __raw_readw(omap_dma_base + OMAP1_DMA_##reg); \
162 else \
163 __val = __raw_readl(omap_dma_base + OMAP_DMA4_##reg); \
164 __val; \
165})
166
167#define dma_write(val, reg) \
168({ \
169 if (cpu_class_is_omap1()) \
170 __raw_writew((u16)(val), omap_dma_base + OMAP1_DMA_##reg); \
171 else \
172 __raw_writel((val), omap_dma_base + OMAP_DMA4_##reg); \
173})
174
175#ifdef CONFIG_ARCH_OMAP15XX 135#ifdef CONFIG_ARCH_OMAP15XX
176/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */ 136/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
177static int omap_dma_in_1510_mode(void) 137int omap_dma_in_1510_mode(void)
178{ 138{
179 return enable_1510_mode; 139 return enable_1510_mode;
180} 140}
@@ -206,16 +166,6 @@ static inline void set_gdma_dev(int req, int dev)
206#define set_gdma_dev(req, dev) do {} while (0) 166#define set_gdma_dev(req, dev) do {} while (0)
207#endif 167#endif
208 168
209/* Omap1 only */
210static void clear_lch_regs(int lch)
211{
212 int i;
213 void __iomem *lch_base = omap_dma_base + OMAP1_DMA_CH_BASE(lch);
214
215 for (i = 0; i < 0x2c; i += 2)
216 __raw_writew(0, lch_base + i);
217}
218
219void omap_set_dma_priority(int lch, int dst_port, int priority) 169void omap_set_dma_priority(int lch, int dst_port, int priority)
220{ 170{
221 unsigned long reg; 171 unsigned long reg;
@@ -248,12 +198,12 @@ void omap_set_dma_priority(int lch, int dst_port, int priority)
248 if (cpu_class_is_omap2()) { 198 if (cpu_class_is_omap2()) {
249 u32 ccr; 199 u32 ccr;
250 200
251 ccr = dma_read(CCR(lch)); 201 ccr = p->dma_read(CCR, lch);
252 if (priority) 202 if (priority)
253 ccr |= (1 << 6); 203 ccr |= (1 << 6);
254 else 204 else
255 ccr &= ~(1 << 6); 205 ccr &= ~(1 << 6);
256 dma_write(ccr, CCR(lch)); 206 p->dma_write(ccr, CCR, lch);
257 } 207 }
258} 208}
259EXPORT_SYMBOL(omap_set_dma_priority); 209EXPORT_SYMBOL(omap_set_dma_priority);
@@ -264,31 +214,31 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
264{ 214{
265 u32 l; 215 u32 l;
266 216
267 l = dma_read(CSDP(lch)); 217 l = p->dma_read(CSDP, lch);
268 l &= ~0x03; 218 l &= ~0x03;
269 l |= data_type; 219 l |= data_type;
270 dma_write(l, CSDP(lch)); 220 p->dma_write(l, CSDP, lch);
271 221
272 if (cpu_class_is_omap1()) { 222 if (cpu_class_is_omap1()) {
273 u16 ccr; 223 u16 ccr;
274 224
275 ccr = dma_read(CCR(lch)); 225 ccr = p->dma_read(CCR, lch);
276 ccr &= ~(1 << 5); 226 ccr &= ~(1 << 5);
277 if (sync_mode == OMAP_DMA_SYNC_FRAME) 227 if (sync_mode == OMAP_DMA_SYNC_FRAME)
278 ccr |= 1 << 5; 228 ccr |= 1 << 5;
279 dma_write(ccr, CCR(lch)); 229 p->dma_write(ccr, CCR, lch);
280 230
281 ccr = dma_read(CCR2(lch)); 231 ccr = p->dma_read(CCR2, lch);
282 ccr &= ~(1 << 2); 232 ccr &= ~(1 << 2);
283 if (sync_mode == OMAP_DMA_SYNC_BLOCK) 233 if (sync_mode == OMAP_DMA_SYNC_BLOCK)
284 ccr |= 1 << 2; 234 ccr |= 1 << 2;
285 dma_write(ccr, CCR2(lch)); 235 p->dma_write(ccr, CCR2, lch);
286 } 236 }
287 237
288 if (cpu_class_is_omap2() && dma_trigger) { 238 if (cpu_class_is_omap2() && dma_trigger) {
289 u32 val; 239 u32 val;
290 240
291 val = dma_read(CCR(lch)); 241 val = p->dma_read(CCR, lch);
292 242
293 /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */ 243 /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
294 val &= ~((1 << 23) | (3 << 19) | 0x1f); 244 val &= ~((1 << 23) | (3 << 19) | 0x1f);
@@ -313,11 +263,11 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
313 } else { 263 } else {
314 val &= ~(1 << 24); /* dest synch */ 264 val &= ~(1 << 24); /* dest synch */
315 } 265 }
316 dma_write(val, CCR(lch)); 266 p->dma_write(val, CCR, lch);
317 } 267 }
318 268
319 dma_write(elem_count, CEN(lch)); 269 p->dma_write(elem_count, CEN, lch);
320 dma_write(frame_count, CFN(lch)); 270 p->dma_write(frame_count, CFN, lch);
321} 271}
322EXPORT_SYMBOL(omap_set_dma_transfer_params); 272EXPORT_SYMBOL(omap_set_dma_transfer_params);
323 273
@@ -328,7 +278,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
328 if (cpu_class_is_omap1()) { 278 if (cpu_class_is_omap1()) {
329 u16 w; 279 u16 w;
330 280
331 w = dma_read(CCR2(lch)); 281 w = p->dma_read(CCR2, lch);
332 w &= ~0x03; 282 w &= ~0x03;
333 283
334 switch (mode) { 284 switch (mode) {
@@ -343,23 +293,22 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
343 default: 293 default:
344 BUG(); 294 BUG();
345 } 295 }
346 dma_write(w, CCR2(lch)); 296 p->dma_write(w, CCR2, lch);
347 297
348 w = dma_read(LCH_CTRL(lch)); 298 w = p->dma_read(LCH_CTRL, lch);
349 w &= ~0x0f; 299 w &= ~0x0f;
350 /* Default is channel type 2D */ 300 /* Default is channel type 2D */
351 if (mode) { 301 if (mode) {
352 dma_write((u16)color, COLOR_L(lch)); 302 p->dma_write(color, COLOR, lch);
353 dma_write((u16)(color >> 16), COLOR_U(lch));
354 w |= 1; /* Channel type G */ 303 w |= 1; /* Channel type G */
355 } 304 }
356 dma_write(w, LCH_CTRL(lch)); 305 p->dma_write(w, LCH_CTRL, lch);
357 } 306 }
358 307
359 if (cpu_class_is_omap2()) { 308 if (cpu_class_is_omap2()) {
360 u32 val; 309 u32 val;
361 310
362 val = dma_read(CCR(lch)); 311 val = p->dma_read(CCR, lch);
363 val &= ~((1 << 17) | (1 << 16)); 312 val &= ~((1 << 17) | (1 << 16));
364 313
365 switch (mode) { 314 switch (mode) {
@@ -374,10 +323,10 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
374 default: 323 default:
375 BUG(); 324 BUG();
376 } 325 }
377 dma_write(val, CCR(lch)); 326 p->dma_write(val, CCR, lch);
378 327
379 color &= 0xffffff; 328 color &= 0xffffff;
380 dma_write(color, COLOR(lch)); 329 p->dma_write(color, COLOR, lch);
381 } 330 }
382} 331}
383EXPORT_SYMBOL(omap_set_dma_color_mode); 332EXPORT_SYMBOL(omap_set_dma_color_mode);
@@ -387,10 +336,10 @@ void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode)
387 if (cpu_class_is_omap2()) { 336 if (cpu_class_is_omap2()) {
388 u32 csdp; 337 u32 csdp;
389 338
390 csdp = dma_read(CSDP(lch)); 339 csdp = p->dma_read(CSDP, lch);
391 csdp &= ~(0x3 << 16); 340 csdp &= ~(0x3 << 16);
392 csdp |= (mode << 16); 341 csdp |= (mode << 16);
393 dma_write(csdp, CSDP(lch)); 342 p->dma_write(csdp, CSDP, lch);
394 } 343 }
395} 344}
396EXPORT_SYMBOL(omap_set_dma_write_mode); 345EXPORT_SYMBOL(omap_set_dma_write_mode);
@@ -400,10 +349,10 @@ void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
400 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) { 349 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
401 u32 l; 350 u32 l;
402 351
403 l = dma_read(LCH_CTRL(lch)); 352 l = p->dma_read(LCH_CTRL, lch);
404 l &= ~0x7; 353 l &= ~0x7;
405 l |= mode; 354 l |= mode;
406 dma_write(l, LCH_CTRL(lch)); 355 p->dma_write(l, LCH_CTRL, lch);
407 } 356 }
408} 357}
409EXPORT_SYMBOL(omap_set_dma_channel_mode); 358EXPORT_SYMBOL(omap_set_dma_channel_mode);
@@ -418,27 +367,21 @@ void omap_set_dma_src_params(int lch, int src_port, int src_amode,
418 if (cpu_class_is_omap1()) { 367 if (cpu_class_is_omap1()) {
419 u16 w; 368 u16 w;
420 369
421 w = dma_read(CSDP(lch)); 370 w = p->dma_read(CSDP, lch);
422 w &= ~(0x1f << 2); 371 w &= ~(0x1f << 2);
423 w |= src_port << 2; 372 w |= src_port << 2;
424 dma_write(w, CSDP(lch)); 373 p->dma_write(w, CSDP, lch);
425 } 374 }
426 375
427 l = dma_read(CCR(lch)); 376 l = p->dma_read(CCR, lch);
428 l &= ~(0x03 << 12); 377 l &= ~(0x03 << 12);
429 l |= src_amode << 12; 378 l |= src_amode << 12;
430 dma_write(l, CCR(lch)); 379 p->dma_write(l, CCR, lch);
431
432 if (cpu_class_is_omap1()) {
433 dma_write(src_start >> 16, CSSA_U(lch));
434 dma_write((u16)src_start, CSSA_L(lch));
435 }
436 380
437 if (cpu_class_is_omap2()) 381 p->dma_write(src_start, CSSA, lch);
438 dma_write(src_start, CSSA(lch));
439 382
440 dma_write(src_ei, CSEI(lch)); 383 p->dma_write(src_ei, CSEI, lch);
441 dma_write(src_fi, CSFI(lch)); 384 p->dma_write(src_fi, CSFI, lch);
442} 385}
443EXPORT_SYMBOL(omap_set_dma_src_params); 386EXPORT_SYMBOL(omap_set_dma_src_params);
444 387
@@ -466,8 +409,8 @@ void omap_set_dma_src_index(int lch, int eidx, int fidx)
466 if (cpu_class_is_omap2()) 409 if (cpu_class_is_omap2())
467 return; 410 return;
468 411
469 dma_write(eidx, CSEI(lch)); 412 p->dma_write(eidx, CSEI, lch);
470 dma_write(fidx, CSFI(lch)); 413 p->dma_write(fidx, CSFI, lch);
471} 414}
472EXPORT_SYMBOL(omap_set_dma_src_index); 415EXPORT_SYMBOL(omap_set_dma_src_index);
473 416
@@ -475,11 +418,11 @@ void omap_set_dma_src_data_pack(int lch, int enable)
475{ 418{
476 u32 l; 419 u32 l;
477 420
478 l = dma_read(CSDP(lch)); 421 l = p->dma_read(CSDP, lch);
479 l &= ~(1 << 6); 422 l &= ~(1 << 6);
480 if (enable) 423 if (enable)
481 l |= (1 << 6); 424 l |= (1 << 6);
482 dma_write(l, CSDP(lch)); 425 p->dma_write(l, CSDP, lch);
483} 426}
484EXPORT_SYMBOL(omap_set_dma_src_data_pack); 427EXPORT_SYMBOL(omap_set_dma_src_data_pack);
485 428
@@ -488,7 +431,7 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
488 unsigned int burst = 0; 431 unsigned int burst = 0;
489 u32 l; 432 u32 l;
490 433
491 l = dma_read(CSDP(lch)); 434 l = p->dma_read(CSDP, lch);
492 l &= ~(0x03 << 7); 435 l &= ~(0x03 << 7);
493 436
494 switch (burst_mode) { 437 switch (burst_mode) {
@@ -524,7 +467,7 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
524 } 467 }
525 468
526 l |= (burst << 7); 469 l |= (burst << 7);
527 dma_write(l, CSDP(lch)); 470 p->dma_write(l, CSDP, lch);
528} 471}
529EXPORT_SYMBOL(omap_set_dma_src_burst_mode); 472EXPORT_SYMBOL(omap_set_dma_src_burst_mode);
530 473
@@ -536,27 +479,21 @@ void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
536 u32 l; 479 u32 l;
537 480
538 if (cpu_class_is_omap1()) { 481 if (cpu_class_is_omap1()) {
539 l = dma_read(CSDP(lch)); 482 l = p->dma_read(CSDP, lch);
540 l &= ~(0x1f << 9); 483 l &= ~(0x1f << 9);
541 l |= dest_port << 9; 484 l |= dest_port << 9;
542 dma_write(l, CSDP(lch)); 485 p->dma_write(l, CSDP, lch);
543 } 486 }
544 487
545 l = dma_read(CCR(lch)); 488 l = p->dma_read(CCR, lch);
546 l &= ~(0x03 << 14); 489 l &= ~(0x03 << 14);
547 l |= dest_amode << 14; 490 l |= dest_amode << 14;
548 dma_write(l, CCR(lch)); 491 p->dma_write(l, CCR, lch);
549
550 if (cpu_class_is_omap1()) {
551 dma_write(dest_start >> 16, CDSA_U(lch));
552 dma_write(dest_start, CDSA_L(lch));
553 }
554 492
555 if (cpu_class_is_omap2()) 493 p->dma_write(dest_start, CDSA, lch);
556 dma_write(dest_start, CDSA(lch));
557 494
558 dma_write(dst_ei, CDEI(lch)); 495 p->dma_write(dst_ei, CDEI, lch);
559 dma_write(dst_fi, CDFI(lch)); 496 p->dma_write(dst_fi, CDFI, lch);
560} 497}
561EXPORT_SYMBOL(omap_set_dma_dest_params); 498EXPORT_SYMBOL(omap_set_dma_dest_params);
562 499
@@ -565,8 +502,8 @@ void omap_set_dma_dest_index(int lch, int eidx, int fidx)
565 if (cpu_class_is_omap2()) 502 if (cpu_class_is_omap2())
566 return; 503 return;
567 504
568 dma_write(eidx, CDEI(lch)); 505 p->dma_write(eidx, CDEI, lch);
569 dma_write(fidx, CDFI(lch)); 506 p->dma_write(fidx, CDFI, lch);
570} 507}
571EXPORT_SYMBOL(omap_set_dma_dest_index); 508EXPORT_SYMBOL(omap_set_dma_dest_index);
572 509
@@ -574,11 +511,11 @@ void omap_set_dma_dest_data_pack(int lch, int enable)
574{ 511{
575 u32 l; 512 u32 l;
576 513
577 l = dma_read(CSDP(lch)); 514 l = p->dma_read(CSDP, lch);
578 l &= ~(1 << 13); 515 l &= ~(1 << 13);
579 if (enable) 516 if (enable)
580 l |= 1 << 13; 517 l |= 1 << 13;
581 dma_write(l, CSDP(lch)); 518 p->dma_write(l, CSDP, lch);
582} 519}
583EXPORT_SYMBOL(omap_set_dma_dest_data_pack); 520EXPORT_SYMBOL(omap_set_dma_dest_data_pack);
584 521
@@ -587,7 +524,7 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
587 unsigned int burst = 0; 524 unsigned int burst = 0;
588 u32 l; 525 u32 l;
589 526
590 l = dma_read(CSDP(lch)); 527 l = p->dma_read(CSDP, lch);
591 l &= ~(0x03 << 14); 528 l &= ~(0x03 << 14);
592 529
593 switch (burst_mode) { 530 switch (burst_mode) {
@@ -620,7 +557,7 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
620 return; 557 return;
621 } 558 }
622 l |= (burst << 14); 559 l |= (burst << 14);
623 dma_write(l, CSDP(lch)); 560 p->dma_write(l, CSDP, lch);
624} 561}
625EXPORT_SYMBOL(omap_set_dma_dest_burst_mode); 562EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
626 563
@@ -630,18 +567,18 @@ static inline void omap_enable_channel_irq(int lch)
630 567
631 /* Clear CSR */ 568 /* Clear CSR */
632 if (cpu_class_is_omap1()) 569 if (cpu_class_is_omap1())
633 status = dma_read(CSR(lch)); 570 status = p->dma_read(CSR, lch);
634 else if (cpu_class_is_omap2()) 571 else if (cpu_class_is_omap2())
635 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch)); 572 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
636 573
637 /* Enable some nice interrupts. */ 574 /* Enable some nice interrupts. */
638 dma_write(dma_chan[lch].enabled_irqs, CICR(lch)); 575 p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);
639} 576}
640 577
641static void omap_disable_channel_irq(int lch) 578static void omap_disable_channel_irq(int lch)
642{ 579{
643 if (cpu_class_is_omap2()) 580 if (cpu_class_is_omap2())
644 dma_write(0, CICR(lch)); 581 p->dma_write(0, CICR, lch);
645} 582}
646 583
647void omap_enable_dma_irq(int lch, u16 bits) 584void omap_enable_dma_irq(int lch, u16 bits)
@@ -660,7 +597,7 @@ static inline void enable_lnk(int lch)
660{ 597{
661 u32 l; 598 u32 l;
662 599
663 l = dma_read(CLNK_CTRL(lch)); 600 l = p->dma_read(CLNK_CTRL, lch);
664 601
665 if (cpu_class_is_omap1()) 602 if (cpu_class_is_omap1())
666 l &= ~(1 << 14); 603 l &= ~(1 << 14);
@@ -675,18 +612,18 @@ static inline void enable_lnk(int lch)
675 l = dma_chan[lch].next_linked_ch | (1 << 15); 612 l = dma_chan[lch].next_linked_ch | (1 << 15);
676#endif 613#endif
677 614
678 dma_write(l, CLNK_CTRL(lch)); 615 p->dma_write(l, CLNK_CTRL, lch);
679} 616}
680 617
681static inline void disable_lnk(int lch) 618static inline void disable_lnk(int lch)
682{ 619{
683 u32 l; 620 u32 l;
684 621
685 l = dma_read(CLNK_CTRL(lch)); 622 l = p->dma_read(CLNK_CTRL, lch);
686 623
687 /* Disable interrupts */ 624 /* Disable interrupts */
688 if (cpu_class_is_omap1()) { 625 if (cpu_class_is_omap1()) {
689 dma_write(0, CICR(lch)); 626 p->dma_write(0, CICR, lch);
690 /* Set the STOP_LNK bit */ 627 /* Set the STOP_LNK bit */
691 l |= 1 << 14; 628 l |= 1 << 14;
692 } 629 }
@@ -697,7 +634,7 @@ static inline void disable_lnk(int lch)
697 l &= ~(1 << 15); 634 l &= ~(1 << 15);
698 } 635 }
699 636
700 dma_write(l, CLNK_CTRL(lch)); 637 p->dma_write(l, CLNK_CTRL, lch);
701 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE; 638 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
702} 639}
703 640
@@ -710,9 +647,9 @@ static inline void omap2_enable_irq_lch(int lch)
710 return; 647 return;
711 648
712 spin_lock_irqsave(&dma_chan_lock, flags); 649 spin_lock_irqsave(&dma_chan_lock, flags);
713 val = dma_read(IRQENABLE_L0); 650 val = p->dma_read(IRQENABLE_L0, lch);
714 val |= 1 << lch; 651 val |= 1 << lch;
715 dma_write(val, IRQENABLE_L0); 652 p->dma_write(val, IRQENABLE_L0, lch);
716 spin_unlock_irqrestore(&dma_chan_lock, flags); 653 spin_unlock_irqrestore(&dma_chan_lock, flags);
717} 654}
718 655
@@ -725,9 +662,9 @@ static inline void omap2_disable_irq_lch(int lch)
725 return; 662 return;
726 663
727 spin_lock_irqsave(&dma_chan_lock, flags); 664 spin_lock_irqsave(&dma_chan_lock, flags);
728 val = dma_read(IRQENABLE_L0); 665 val = p->dma_read(IRQENABLE_L0, lch);
729 val &= ~(1 << lch); 666 val &= ~(1 << lch);
730 dma_write(val, IRQENABLE_L0); 667 p->dma_write(val, IRQENABLE_L0, lch);
731 spin_unlock_irqrestore(&dma_chan_lock, flags); 668 spin_unlock_irqrestore(&dma_chan_lock, flags);
732} 669}
733 670
@@ -754,8 +691,8 @@ int omap_request_dma(int dev_id, const char *dev_name,
754 chan = dma_chan + free_ch; 691 chan = dma_chan + free_ch;
755 chan->dev_id = dev_id; 692 chan->dev_id = dev_id;
756 693
757 if (cpu_class_is_omap1()) 694 if (p->clear_lch_regs)
758 clear_lch_regs(free_ch); 695 p->clear_lch_regs(free_ch);
759 696
760 if (cpu_class_is_omap2()) 697 if (cpu_class_is_omap2())
761 omap_clear_dma(free_ch); 698 omap_clear_dma(free_ch);
@@ -792,17 +729,17 @@ int omap_request_dma(int dev_id, const char *dev_name,
792 * Disable the 1510 compatibility mode and set the sync device 729 * Disable the 1510 compatibility mode and set the sync device
793 * id. 730 * id.
794 */ 731 */
795 dma_write(dev_id | (1 << 10), CCR(free_ch)); 732 p->dma_write(dev_id | (1 << 10), CCR, free_ch);
796 } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) { 733 } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) {
797 dma_write(dev_id, CCR(free_ch)); 734 p->dma_write(dev_id, CCR, free_ch);
798 } 735 }
799 736
800 if (cpu_class_is_omap2()) { 737 if (cpu_class_is_omap2()) {
801 omap2_enable_irq_lch(free_ch); 738 omap2_enable_irq_lch(free_ch);
802 omap_enable_channel_irq(free_ch); 739 omap_enable_channel_irq(free_ch);
803 /* Clear the CSR register and IRQ status register */ 740 /* Clear the CSR register and IRQ status register */
804 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(free_ch)); 741 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, free_ch);
805 dma_write(1 << free_ch, IRQSTATUS_L0); 742 p->dma_write(1 << free_ch, IRQSTATUS_L0, 0);
806 } 743 }
807 744
808 *dma_ch_out = free_ch; 745 *dma_ch_out = free_ch;
@@ -823,23 +760,23 @@ void omap_free_dma(int lch)
823 760
824 if (cpu_class_is_omap1()) { 761 if (cpu_class_is_omap1()) {
825 /* Disable all DMA interrupts for the channel. */ 762 /* Disable all DMA interrupts for the channel. */
826 dma_write(0, CICR(lch)); 763 p->dma_write(0, CICR, lch);
827 /* Make sure the DMA transfer is stopped. */ 764 /* Make sure the DMA transfer is stopped. */
828 dma_write(0, CCR(lch)); 765 p->dma_write(0, CCR, lch);
829 } 766 }
830 767
831 if (cpu_class_is_omap2()) { 768 if (cpu_class_is_omap2()) {
832 omap2_disable_irq_lch(lch); 769 omap2_disable_irq_lch(lch);
833 770
834 /* Clear the CSR register and IRQ status register */ 771 /* Clear the CSR register and IRQ status register */
835 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch)); 772 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
836 dma_write(1 << lch, IRQSTATUS_L0); 773 p->dma_write(1 << lch, IRQSTATUS_L0, lch);
837 774
838 /* Disable all DMA interrupts for the channel. */ 775 /* Disable all DMA interrupts for the channel. */
839 dma_write(0, CICR(lch)); 776 p->dma_write(0, CICR, lch);
840 777
841 /* Make sure the DMA transfer is stopped. */ 778 /* Make sure the DMA transfer is stopped. */
842 dma_write(0, CCR(lch)); 779 p->dma_write(0, CCR, lch);
843 omap_clear_dma(lch); 780 omap_clear_dma(lch);
844 } 781 }
845 782
@@ -880,7 +817,7 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
880 reg |= (0x3 & tparams) << 12; 817 reg |= (0x3 & tparams) << 12;
881 reg |= (arb_rate & 0xff) << 16; 818 reg |= (arb_rate & 0xff) << 16;
882 819
883 dma_write(reg, GCR); 820 p->dma_write(reg, GCR, 0);
884} 821}
885EXPORT_SYMBOL(omap_dma_set_global_params); 822EXPORT_SYMBOL(omap_dma_set_global_params);
886 823
@@ -903,14 +840,14 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
903 printk(KERN_ERR "Invalid channel id\n"); 840 printk(KERN_ERR "Invalid channel id\n");
904 return -EINVAL; 841 return -EINVAL;
905 } 842 }
906 l = dma_read(CCR(lch)); 843 l = p->dma_read(CCR, lch);
907 l &= ~((1 << 6) | (1 << 26)); 844 l &= ~((1 << 6) | (1 << 26));
908 if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) 845 if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
909 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26); 846 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
910 else 847 else
911 l |= ((read_prio & 0x1) << 6); 848 l |= ((read_prio & 0x1) << 6);
912 849
913 dma_write(l, CCR(lch)); 850 p->dma_write(l, CCR, lch);
914 851
915 return 0; 852 return 0;
916} 853}
@@ -925,25 +862,7 @@ void omap_clear_dma(int lch)
925 unsigned long flags; 862 unsigned long flags;
926 863
927 local_irq_save(flags); 864 local_irq_save(flags);
928 865 p->clear_dma(lch);
929 if (cpu_class_is_omap1()) {
930 u32 l;
931
932 l = dma_read(CCR(lch));
933 l &= ~OMAP_DMA_CCR_EN;
934 dma_write(l, CCR(lch));
935
936 /* Clear pending interrupts */
937 l = dma_read(CSR(lch));
938 }
939
940 if (cpu_class_is_omap2()) {
941 int i;
942 void __iomem *lch_base = omap_dma_base + OMAP_DMA4_CH_BASE(lch);
943 for (i = 0; i < 0x44; i += 4)
944 __raw_writel(0, lch_base + i);
945 }
946
947 local_irq_restore(flags); 866 local_irq_restore(flags);
948} 867}
949EXPORT_SYMBOL(omap_clear_dma); 868EXPORT_SYMBOL(omap_clear_dma);
@@ -957,13 +876,13 @@ void omap_start_dma(int lch)
957 * before starting dma transfer. 876 * before starting dma transfer.
958 */ 877 */
959 if (cpu_is_omap15xx()) 878 if (cpu_is_omap15xx())
960 dma_write(0, CPC(lch)); 879 p->dma_write(0, CPC, lch);
961 else 880 else
962 dma_write(0, CDAC(lch)); 881 p->dma_write(0, CDAC, lch);
963 882
964 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 883 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
965 int next_lch, cur_lch; 884 int next_lch, cur_lch;
966 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT]; 885 char dma_chan_link_map[dma_lch_count];
967 886
968 dma_chan_link_map[lch] = 1; 887 dma_chan_link_map[lch] = 1;
969 /* Set the link register of the first channel */ 888 /* Set the link register of the first channel */
@@ -985,32 +904,18 @@ void omap_start_dma(int lch)
985 904
986 cur_lch = next_lch; 905 cur_lch = next_lch;
987 } while (next_lch != -1); 906 } while (next_lch != -1);
988 } else if (cpu_is_omap242x() || 907 } else if (IS_DMA_ERRATA(DMA_ERRATA_PARALLEL_CHANNELS))
989 (cpu_is_omap243x() && omap_type() <= OMAP2430_REV_ES1_0)) { 908 p->dma_write(lch, CLNK_CTRL, lch);
990
991 /* Errata: Need to write lch even if not using chaining */
992 dma_write(lch, CLNK_CTRL(lch));
993 }
994 909
995 omap_enable_channel_irq(lch); 910 omap_enable_channel_irq(lch);
996 911
997 l = dma_read(CCR(lch)); 912 l = p->dma_read(CCR, lch);
998
999 /*
1000 * Errata: Inter Frame DMA buffering issue (All OMAP2420 and
1001 * OMAP2430ES1.0): DMA will wrongly buffer elements if packing and
1002 * bursting is enabled. This might result in data gets stalled in
1003 * FIFO at the end of the block.
1004 * Workaround: DMA channels must have BUFFERING_DISABLED bit set to
1005 * guarantee no data will stay in the DMA FIFO in case inter frame
1006 * buffering occurs.
1007 */
1008 if (cpu_is_omap2420() ||
1009 (cpu_is_omap2430() && (omap_type() == OMAP2430_REV_ES1_0)))
1010 l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
1011 913
914 if (IS_DMA_ERRATA(DMA_ERRATA_IFRAME_BUFFERING))
915 l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
1012 l |= OMAP_DMA_CCR_EN; 916 l |= OMAP_DMA_CCR_EN;
1013 dma_write(l, CCR(lch)); 917
918 p->dma_write(l, CCR, lch);
1014 919
1015 dma_chan[lch].flags |= OMAP_DMA_ACTIVE; 920 dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
1016} 921}
@@ -1022,46 +927,46 @@ void omap_stop_dma(int lch)
1022 927
1023 /* Disable all interrupts on the channel */ 928 /* Disable all interrupts on the channel */
1024 if (cpu_class_is_omap1()) 929 if (cpu_class_is_omap1())
1025 dma_write(0, CICR(lch)); 930 p->dma_write(0, CICR, lch);
1026 931
1027 l = dma_read(CCR(lch)); 932 l = p->dma_read(CCR, lch);
1028 /* OMAP3 Errata i541: sDMA FIFO draining does not finish */ 933 if (IS_DMA_ERRATA(DMA_ERRATA_i541) &&
1029 if (cpu_is_omap34xx() && (l & OMAP_DMA_CCR_SEL_SRC_DST_SYNC)) { 934 (l & OMAP_DMA_CCR_SEL_SRC_DST_SYNC)) {
1030 int i = 0; 935 int i = 0;
1031 u32 sys_cf; 936 u32 sys_cf;
1032 937
1033 /* Configure No-Standby */ 938 /* Configure No-Standby */
1034 l = dma_read(OCP_SYSCONFIG); 939 l = p->dma_read(OCP_SYSCONFIG, lch);
1035 sys_cf = l; 940 sys_cf = l;
1036 l &= ~DMA_SYSCONFIG_MIDLEMODE_MASK; 941 l &= ~DMA_SYSCONFIG_MIDLEMODE_MASK;
1037 l |= DMA_SYSCONFIG_MIDLEMODE(DMA_IDLEMODE_NO_IDLE); 942 l |= DMA_SYSCONFIG_MIDLEMODE(DMA_IDLEMODE_NO_IDLE);
1038 dma_write(l , OCP_SYSCONFIG); 943 p->dma_write(l , OCP_SYSCONFIG, 0);
1039 944
1040 l = dma_read(CCR(lch)); 945 l = p->dma_read(CCR, lch);
1041 l &= ~OMAP_DMA_CCR_EN; 946 l &= ~OMAP_DMA_CCR_EN;
1042 dma_write(l, CCR(lch)); 947 p->dma_write(l, CCR, lch);
1043 948
1044 /* Wait for sDMA FIFO drain */ 949 /* Wait for sDMA FIFO drain */
1045 l = dma_read(CCR(lch)); 950 l = p->dma_read(CCR, lch);
1046 while (i < 100 && (l & (OMAP_DMA_CCR_RD_ACTIVE | 951 while (i < 100 && (l & (OMAP_DMA_CCR_RD_ACTIVE |
1047 OMAP_DMA_CCR_WR_ACTIVE))) { 952 OMAP_DMA_CCR_WR_ACTIVE))) {
1048 udelay(5); 953 udelay(5);
1049 i++; 954 i++;
1050 l = dma_read(CCR(lch)); 955 l = p->dma_read(CCR, lch);
1051 } 956 }
1052 if (i >= 100) 957 if (i >= 100)
1053 printk(KERN_ERR "DMA drain did not complete on " 958 printk(KERN_ERR "DMA drain did not complete on "
1054 "lch %d\n", lch); 959 "lch %d\n", lch);
1055 /* Restore OCP_SYSCONFIG */ 960 /* Restore OCP_SYSCONFIG */
1056 dma_write(sys_cf, OCP_SYSCONFIG); 961 p->dma_write(sys_cf, OCP_SYSCONFIG, lch);
1057 } else { 962 } else {
1058 l &= ~OMAP_DMA_CCR_EN; 963 l &= ~OMAP_DMA_CCR_EN;
1059 dma_write(l, CCR(lch)); 964 p->dma_write(l, CCR, lch);
1060 } 965 }
1061 966
1062 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 967 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
1063 int next_lch, cur_lch = lch; 968 int next_lch, cur_lch = lch;
1064 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT]; 969 char dma_chan_link_map[dma_lch_count];
1065 970
1066 memset(dma_chan_link_map, 0, sizeof(dma_chan_link_map)); 971 memset(dma_chan_link_map, 0, sizeof(dma_chan_link_map));
1067 do { 972 do {
@@ -1122,19 +1027,15 @@ dma_addr_t omap_get_dma_src_pos(int lch)
1122 dma_addr_t offset = 0; 1027 dma_addr_t offset = 0;
1123 1028
1124 if (cpu_is_omap15xx()) 1029 if (cpu_is_omap15xx())
1125 offset = dma_read(CPC(lch)); 1030 offset = p->dma_read(CPC, lch);
1126 else 1031 else
1127 offset = dma_read(CSAC(lch)); 1032 offset = p->dma_read(CSAC, lch);
1128 1033
1129 /* 1034 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
1130 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is 1035 offset = p->dma_read(CSAC, lch);
1131 * read before the DMA controller finished disabling the channel.
1132 */
1133 if (!cpu_is_omap15xx() && offset == 0)
1134 offset = dma_read(CSAC(lch));
1135 1036
1136 if (cpu_class_is_omap1()) 1037 if (cpu_class_is_omap1())
1137 offset |= (dma_read(CSSA_U(lch)) << 16); 1038 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
1138 1039
1139 return offset; 1040 return offset;
1140} 1041}
@@ -1153,19 +1054,19 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
1153 dma_addr_t offset = 0; 1054 dma_addr_t offset = 0;
1154 1055
1155 if (cpu_is_omap15xx()) 1056 if (cpu_is_omap15xx())
1156 offset = dma_read(CPC(lch)); 1057 offset = p->dma_read(CPC, lch);
1157 else 1058 else
1158 offset = dma_read(CDAC(lch)); 1059 offset = p->dma_read(CDAC, lch);
1159 1060
1160 /* 1061 /*
1161 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is 1062 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
1162 * read before the DMA controller finished disabling the channel. 1063 * read before the DMA controller finished disabling the channel.
1163 */ 1064 */
1164 if (!cpu_is_omap15xx() && offset == 0) 1065 if (!cpu_is_omap15xx() && offset == 0)
1165 offset = dma_read(CDAC(lch)); 1066 offset = p->dma_read(CDAC, lch);
1166 1067
1167 if (cpu_class_is_omap1()) 1068 if (cpu_class_is_omap1())
1168 offset |= (dma_read(CDSA_U(lch)) << 16); 1069 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
1169 1070
1170 return offset; 1071 return offset;
1171} 1072}
@@ -1173,7 +1074,7 @@ EXPORT_SYMBOL(omap_get_dma_dst_pos);
1173 1074
1174int omap_get_dma_active_status(int lch) 1075int omap_get_dma_active_status(int lch)
1175{ 1076{
1176 return (dma_read(CCR(lch)) & OMAP_DMA_CCR_EN) != 0; 1077 return (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) != 0;
1177} 1078}
1178EXPORT_SYMBOL(omap_get_dma_active_status); 1079EXPORT_SYMBOL(omap_get_dma_active_status);
1179 1080
@@ -1186,7 +1087,7 @@ int omap_dma_running(void)
1186 return 1; 1087 return 1;
1187 1088
1188 for (lch = 0; lch < dma_chan_count; lch++) 1089 for (lch = 0; lch < dma_chan_count; lch++)
1189 if (dma_read(CCR(lch)) & OMAP_DMA_CCR_EN) 1090 if (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN)
1190 return 1; 1091 return 1;
1191 1092
1192 return 0; 1093 return 0;
@@ -1201,8 +1102,8 @@ void omap_dma_link_lch(int lch_head, int lch_queue)
1201{ 1102{
1202 if (omap_dma_in_1510_mode()) { 1103 if (omap_dma_in_1510_mode()) {
1203 if (lch_head == lch_queue) { 1104 if (lch_head == lch_queue) {
1204 dma_write(dma_read(CCR(lch_head)) | (3 << 8), 1105 p->dma_write(p->dma_read(CCR, lch_head) | (3 << 8),
1205 CCR(lch_head)); 1106 CCR, lch_head);
1206 return; 1107 return;
1207 } 1108 }
1208 printk(KERN_ERR "DMA linking is not supported in 1510 mode\n"); 1109 printk(KERN_ERR "DMA linking is not supported in 1510 mode\n");
@@ -1228,8 +1129,8 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue)
1228{ 1129{
1229 if (omap_dma_in_1510_mode()) { 1130 if (omap_dma_in_1510_mode()) {
1230 if (lch_head == lch_queue) { 1131 if (lch_head == lch_queue) {
1231 dma_write(dma_read(CCR(lch_head)) & ~(3 << 8), 1132 p->dma_write(p->dma_read(CCR, lch_head) & ~(3 << 8),
1232 CCR(lch_head)); 1133 CCR, lch_head);
1233 return; 1134 return;
1234 } 1135 }
1235 printk(KERN_ERR "DMA linking is not supported in 1510 mode\n"); 1136 printk(KERN_ERR "DMA linking is not supported in 1510 mode\n");
@@ -1255,8 +1156,6 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue)
1255} 1156}
1256EXPORT_SYMBOL(omap_dma_unlink_lch); 1157EXPORT_SYMBOL(omap_dma_unlink_lch);
1257 1158
1258/*----------------------------------------------------------------------------*/
1259
1260#ifndef CONFIG_ARCH_OMAP1 1159#ifndef CONFIG_ARCH_OMAP1
1261/* Create chain of DMA channesls */ 1160/* Create chain of DMA channesls */
1262static void create_dma_lch_chain(int lch_head, int lch_queue) 1161static void create_dma_lch_chain(int lch_head, int lch_queue)
@@ -1281,15 +1180,15 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
1281 lch_queue; 1180 lch_queue;
1282 } 1181 }
1283 1182
1284 l = dma_read(CLNK_CTRL(lch_head)); 1183 l = p->dma_read(CLNK_CTRL, lch_head);
1285 l &= ~(0x1f); 1184 l &= ~(0x1f);
1286 l |= lch_queue; 1185 l |= lch_queue;
1287 dma_write(l, CLNK_CTRL(lch_head)); 1186 p->dma_write(l, CLNK_CTRL, lch_head);
1288 1187
1289 l = dma_read(CLNK_CTRL(lch_queue)); 1188 l = p->dma_read(CLNK_CTRL, lch_queue);
1290 l &= ~(0x1f); 1189 l &= ~(0x1f);
1291 l |= (dma_chan[lch_queue].next_linked_ch); 1190 l |= (dma_chan[lch_queue].next_linked_ch);
1292 dma_write(l, CLNK_CTRL(lch_queue)); 1191 p->dma_write(l, CLNK_CTRL, lch_queue);
1293} 1192}
1294 1193
1295/** 1194/**
@@ -1565,13 +1464,13 @@ int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
1565 1464
1566 /* Set the params to the free channel */ 1465 /* Set the params to the free channel */
1567 if (src_start != 0) 1466 if (src_start != 0)
1568 dma_write(src_start, CSSA(lch)); 1467 p->dma_write(src_start, CSSA, lch);
1569 if (dest_start != 0) 1468 if (dest_start != 0)
1570 dma_write(dest_start, CDSA(lch)); 1469 p->dma_write(dest_start, CDSA, lch);
1571 1470
1572 /* Write the buffer size */ 1471 /* Write the buffer size */
1573 dma_write(elem_count, CEN(lch)); 1472 p->dma_write(elem_count, CEN, lch);
1574 dma_write(frame_count, CFN(lch)); 1473 p->dma_write(frame_count, CFN, lch);
1575 1474
1576 /* 1475 /*
1577 * If the chain is dynamically linked, 1476 * If the chain is dynamically linked,
@@ -1604,8 +1503,8 @@ int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
1604 enable_lnk(dma_chan[lch].prev_linked_ch); 1503 enable_lnk(dma_chan[lch].prev_linked_ch);
1605 dma_chan[lch].state = DMA_CH_QUEUED; 1504 dma_chan[lch].state = DMA_CH_QUEUED;
1606 start_dma = 0; 1505 start_dma = 0;
1607 if (0 == ((1 << 7) & dma_read( 1506 if (0 == ((1 << 7) & p->dma_read(
1608 CCR(dma_chan[lch].prev_linked_ch)))) { 1507 CCR, dma_chan[lch].prev_linked_ch))) {
1609 disable_lnk(dma_chan[lch]. 1508 disable_lnk(dma_chan[lch].
1610 prev_linked_ch); 1509 prev_linked_ch);
1611 pr_debug("\n prev ch is stopped\n"); 1510 pr_debug("\n prev ch is stopped\n");
@@ -1621,7 +1520,7 @@ int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
1621 } 1520 }
1622 omap_enable_channel_irq(lch); 1521 omap_enable_channel_irq(lch);
1623 1522
1624 l = dma_read(CCR(lch)); 1523 l = p->dma_read(CCR, lch);
1625 1524
1626 if ((0 == (l & (1 << 24)))) 1525 if ((0 == (l & (1 << 24))))
1627 l &= ~(1 << 25); 1526 l &= ~(1 << 25);
@@ -1632,12 +1531,12 @@ int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
1632 l |= (1 << 7); 1531 l |= (1 << 7);
1633 dma_chan[lch].state = DMA_CH_STARTED; 1532 dma_chan[lch].state = DMA_CH_STARTED;
1634 pr_debug("starting %d\n", lch); 1533 pr_debug("starting %d\n", lch);
1635 dma_write(l, CCR(lch)); 1534 p->dma_write(l, CCR, lch);
1636 } else 1535 } else
1637 start_dma = 0; 1536 start_dma = 0;
1638 } else { 1537 } else {
1639 if (0 == (l & (1 << 7))) 1538 if (0 == (l & (1 << 7)))
1640 dma_write(l, CCR(lch)); 1539 p->dma_write(l, CCR, lch);
1641 } 1540 }
1642 dma_chan[lch].flags |= OMAP_DMA_ACTIVE; 1541 dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
1643 } 1542 }
@@ -1682,7 +1581,7 @@ int omap_start_dma_chain_transfers(int chain_id)
1682 omap_enable_channel_irq(channels[0]); 1581 omap_enable_channel_irq(channels[0]);
1683 } 1582 }
1684 1583
1685 l = dma_read(CCR(channels[0])); 1584 l = p->dma_read(CCR, channels[0]);
1686 l |= (1 << 7); 1585 l |= (1 << 7);
1687 dma_linked_lch[chain_id].chain_state = DMA_CHAIN_STARTED; 1586 dma_linked_lch[chain_id].chain_state = DMA_CHAIN_STARTED;
1688 dma_chan[channels[0]].state = DMA_CH_STARTED; 1587 dma_chan[channels[0]].state = DMA_CH_STARTED;
@@ -1691,7 +1590,7 @@ int omap_start_dma_chain_transfers(int chain_id)
1691 l &= ~(1 << 25); 1590 l &= ~(1 << 25);
1692 else 1591 else
1693 l |= (1 << 25); 1592 l |= (1 << 25);
1694 dma_write(l, CCR(channels[0])); 1593 p->dma_write(l, CCR, channels[0]);
1695 1594
1696 dma_chan[channels[0]].flags |= OMAP_DMA_ACTIVE; 1595 dma_chan[channels[0]].flags |= OMAP_DMA_ACTIVE;
1697 1596
@@ -1711,7 +1610,7 @@ int omap_stop_dma_chain_transfers(int chain_id)
1711{ 1610{
1712 int *channels; 1611 int *channels;
1713 u32 l, i; 1612 u32 l, i;
1714 u32 sys_cf; 1613 u32 sys_cf = 0;
1715 1614
1716 /* Check for input params */ 1615 /* Check for input params */
1717 if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) { 1616 if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) {
@@ -1726,22 +1625,20 @@ int omap_stop_dma_chain_transfers(int chain_id)
1726 } 1625 }
1727 channels = dma_linked_lch[chain_id].linked_dmach_q; 1626 channels = dma_linked_lch[chain_id].linked_dmach_q;
1728 1627
1729 /* 1628 if (IS_DMA_ERRATA(DMA_ERRATA_i88)) {
1730 * DMA Errata: 1629 sys_cf = p->dma_read(OCP_SYSCONFIG, 0);
1731 * Special programming model needed to disable DMA before end of block 1630 l = sys_cf;
1732 */ 1631 /* Middle mode reg set no Standby */
1733 sys_cf = dma_read(OCP_SYSCONFIG); 1632 l &= ~((1 << 12)|(1 << 13));
1734 l = sys_cf; 1633 p->dma_write(l, OCP_SYSCONFIG, 0);
1735 /* Middle mode reg set no Standby */ 1634 }
1736 l &= ~((1 << 12)|(1 << 13));
1737 dma_write(l, OCP_SYSCONFIG);
1738 1635
1739 for (i = 0; i < dma_linked_lch[chain_id].no_of_lchs_linked; i++) { 1636 for (i = 0; i < dma_linked_lch[chain_id].no_of_lchs_linked; i++) {
1740 1637
1741 /* Stop the Channel transmission */ 1638 /* Stop the Channel transmission */
1742 l = dma_read(CCR(channels[i])); 1639 l = p->dma_read(CCR, channels[i]);
1743 l &= ~(1 << 7); 1640 l &= ~(1 << 7);
1744 dma_write(l, CCR(channels[i])); 1641 p->dma_write(l, CCR, channels[i]);
1745 1642
1746 /* Disable the link in all the channels */ 1643 /* Disable the link in all the channels */
1747 disable_lnk(channels[i]); 1644 disable_lnk(channels[i]);
@@ -1753,8 +1650,8 @@ int omap_stop_dma_chain_transfers(int chain_id)
1753 /* Reset the Queue pointers */ 1650 /* Reset the Queue pointers */
1754 OMAP_DMA_CHAIN_QINIT(chain_id); 1651 OMAP_DMA_CHAIN_QINIT(chain_id);
1755 1652
1756 /* Errata - put in the old value */ 1653 if (IS_DMA_ERRATA(DMA_ERRATA_i88))
1757 dma_write(sys_cf, OCP_SYSCONFIG); 1654 p->dma_write(sys_cf, OCP_SYSCONFIG, 0);
1758 1655
1759 return 0; 1656 return 0;
1760} 1657}
@@ -1796,8 +1693,8 @@ int omap_get_dma_chain_index(int chain_id, int *ei, int *fi)
1796 /* Get the current channel */ 1693 /* Get the current channel */
1797 lch = channels[dma_linked_lch[chain_id].q_head]; 1694 lch = channels[dma_linked_lch[chain_id].q_head];
1798 1695
1799 *ei = dma_read(CCEN(lch)); 1696 *ei = p->dma_read(CCEN, lch);
1800 *fi = dma_read(CCFN(lch)); 1697 *fi = p->dma_read(CCFN, lch);
1801 1698
1802 return 0; 1699 return 0;
1803} 1700}
@@ -1834,7 +1731,7 @@ int omap_get_dma_chain_dst_pos(int chain_id)
1834 /* Get the current channel */ 1731 /* Get the current channel */
1835 lch = channels[dma_linked_lch[chain_id].q_head]; 1732 lch = channels[dma_linked_lch[chain_id].q_head];
1836 1733
1837 return dma_read(CDAC(lch)); 1734 return p->dma_read(CDAC, lch);
1838} 1735}
1839EXPORT_SYMBOL(omap_get_dma_chain_dst_pos); 1736EXPORT_SYMBOL(omap_get_dma_chain_dst_pos);
1840 1737
@@ -1868,7 +1765,7 @@ int omap_get_dma_chain_src_pos(int chain_id)
1868 /* Get the current channel */ 1765 /* Get the current channel */
1869 lch = channels[dma_linked_lch[chain_id].q_head]; 1766 lch = channels[dma_linked_lch[chain_id].q_head];
1870 1767
1871 return dma_read(CSAC(lch)); 1768 return p->dma_read(CSAC, lch);
1872} 1769}
1873EXPORT_SYMBOL(omap_get_dma_chain_src_pos); 1770EXPORT_SYMBOL(omap_get_dma_chain_src_pos);
1874#endif /* ifndef CONFIG_ARCH_OMAP1 */ 1771#endif /* ifndef CONFIG_ARCH_OMAP1 */
@@ -1885,7 +1782,7 @@ static int omap1_dma_handle_ch(int ch)
1885 csr = dma_chan[ch].saved_csr; 1782 csr = dma_chan[ch].saved_csr;
1886 dma_chan[ch].saved_csr = 0; 1783 dma_chan[ch].saved_csr = 0;
1887 } else 1784 } else
1888 csr = dma_read(CSR(ch)); 1785 csr = p->dma_read(CSR, ch);
1889 if (enable_1510_mode && ch <= 2 && (csr >> 7) != 0) { 1786 if (enable_1510_mode && ch <= 2 && (csr >> 7) != 0) {
1890 dma_chan[ch + 6].saved_csr = csr >> 7; 1787 dma_chan[ch + 6].saved_csr = csr >> 7;
1891 csr &= 0x7f; 1788 csr &= 0x7f;
@@ -1938,13 +1835,13 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
1938 1835
1939static int omap2_dma_handle_ch(int ch) 1836static int omap2_dma_handle_ch(int ch)
1940{ 1837{
1941 u32 status = dma_read(CSR(ch)); 1838 u32 status = p->dma_read(CSR, ch);
1942 1839
1943 if (!status) { 1840 if (!status) {
1944 if (printk_ratelimit()) 1841 if (printk_ratelimit())
1945 printk(KERN_WARNING "Spurious DMA IRQ for lch %d\n", 1842 printk(KERN_WARNING "Spurious DMA IRQ for lch %d\n",
1946 ch); 1843 ch);
1947 dma_write(1 << ch, IRQSTATUS_L0); 1844 p->dma_write(1 << ch, IRQSTATUS_L0, ch);
1948 return 0; 1845 return 0;
1949 } 1846 }
1950 if (unlikely(dma_chan[ch].dev_id == -1)) { 1847 if (unlikely(dma_chan[ch].dev_id == -1)) {
@@ -1960,17 +1857,12 @@ static int omap2_dma_handle_ch(int ch)
1960 if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ)) { 1857 if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ)) {
1961 printk(KERN_INFO "DMA transaction error with device %d\n", 1858 printk(KERN_INFO "DMA transaction error with device %d\n",
1962 dma_chan[ch].dev_id); 1859 dma_chan[ch].dev_id);
1963 if (cpu_class_is_omap2()) { 1860 if (IS_DMA_ERRATA(DMA_ERRATA_i378)) {
1964 /*
1965 * Errata: sDMA Channel is not disabled
1966 * after a transaction error. So we explicitely
1967 * disable the channel
1968 */
1969 u32 ccr; 1861 u32 ccr;
1970 1862
1971 ccr = dma_read(CCR(ch)); 1863 ccr = p->dma_read(CCR, ch);
1972 ccr &= ~OMAP_DMA_CCR_EN; 1864 ccr &= ~OMAP_DMA_CCR_EN;
1973 dma_write(ccr, CCR(ch)); 1865 p->dma_write(ccr, CCR, ch);
1974 dma_chan[ch].flags &= ~OMAP_DMA_ACTIVE; 1866 dma_chan[ch].flags &= ~OMAP_DMA_ACTIVE;
1975 } 1867 }
1976 } 1868 }
@@ -1981,16 +1873,16 @@ static int omap2_dma_handle_ch(int ch)
1981 printk(KERN_INFO "DMA misaligned error with device %d\n", 1873 printk(KERN_INFO "DMA misaligned error with device %d\n",
1982 dma_chan[ch].dev_id); 1874 dma_chan[ch].dev_id);
1983 1875
1984 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch)); 1876 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, ch);
1985 dma_write(1 << ch, IRQSTATUS_L0); 1877 p->dma_write(1 << ch, IRQSTATUS_L0, ch);
1986 /* read back the register to flush the write */ 1878 /* read back the register to flush the write */
1987 dma_read(IRQSTATUS_L0); 1879 p->dma_read(IRQSTATUS_L0, ch);
1988 1880
1989 /* If the ch is not chained then chain_id will be -1 */ 1881 /* If the ch is not chained then chain_id will be -1 */
1990 if (dma_chan[ch].chain_id != -1) { 1882 if (dma_chan[ch].chain_id != -1) {
1991 int chain_id = dma_chan[ch].chain_id; 1883 int chain_id = dma_chan[ch].chain_id;
1992 dma_chan[ch].state = DMA_CH_NOTSTARTED; 1884 dma_chan[ch].state = DMA_CH_NOTSTARTED;
1993 if (dma_read(CLNK_CTRL(ch)) & (1 << 15)) 1885 if (p->dma_read(CLNK_CTRL, ch) & (1 << 15))
1994 dma_chan[dma_chan[ch].next_linked_ch].state = 1886 dma_chan[dma_chan[ch].next_linked_ch].state =
1995 DMA_CH_STARTED; 1887 DMA_CH_STARTED;
1996 if (dma_linked_lch[chain_id].chain_mode == 1888 if (dma_linked_lch[chain_id].chain_mode ==
@@ -2000,10 +1892,10 @@ static int omap2_dma_handle_ch(int ch)
2000 if (!OMAP_DMA_CHAIN_QEMPTY(chain_id)) 1892 if (!OMAP_DMA_CHAIN_QEMPTY(chain_id))
2001 OMAP_DMA_CHAIN_INCQHEAD(chain_id); 1893 OMAP_DMA_CHAIN_INCQHEAD(chain_id);
2002 1894
2003 status = dma_read(CSR(ch)); 1895 status = p->dma_read(CSR, ch);
2004 } 1896 }
2005 1897
2006 dma_write(status, CSR(ch)); 1898 p->dma_write(status, CSR, ch);
2007 1899
2008 if (likely(dma_chan[ch].callback != NULL)) 1900 if (likely(dma_chan[ch].callback != NULL))
2009 dma_chan[ch].callback(ch, status, dma_chan[ch].data); 1901 dma_chan[ch].callback(ch, status, dma_chan[ch].data);
@@ -2017,13 +1909,13 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
2017 u32 val, enable_reg; 1909 u32 val, enable_reg;
2018 int i; 1910 int i;
2019 1911
2020 val = dma_read(IRQSTATUS_L0); 1912 val = p->dma_read(IRQSTATUS_L0, 0);
2021 if (val == 0) { 1913 if (val == 0) {
2022 if (printk_ratelimit()) 1914 if (printk_ratelimit())
2023 printk(KERN_WARNING "Spurious DMA IRQ\n"); 1915 printk(KERN_WARNING "Spurious DMA IRQ\n");
2024 return IRQ_HANDLED; 1916 return IRQ_HANDLED;
2025 } 1917 }
2026 enable_reg = dma_read(IRQENABLE_L0); 1918 enable_reg = p->dma_read(IRQENABLE_L0, 0);
2027 val &= enable_reg; /* Dispatch only relevant interrupts */ 1919 val &= enable_reg; /* Dispatch only relevant interrupts */
2028 for (i = 0; i < dma_lch_count && val != 0; i++) { 1920 for (i = 0; i < dma_lch_count && val != 0; i++) {
2029 if (val & 1) 1921 if (val & 1)
@@ -2049,119 +1941,66 @@ static struct irqaction omap24xx_dma_irq;
2049void omap_dma_global_context_save(void) 1941void omap_dma_global_context_save(void)
2050{ 1942{
2051 omap_dma_global_context.dma_irqenable_l0 = 1943 omap_dma_global_context.dma_irqenable_l0 =
2052 dma_read(IRQENABLE_L0); 1944 p->dma_read(IRQENABLE_L0, 0);
2053 omap_dma_global_context.dma_ocp_sysconfig = 1945 omap_dma_global_context.dma_ocp_sysconfig =
2054 dma_read(OCP_SYSCONFIG); 1946 p->dma_read(OCP_SYSCONFIG, 0);
2055 omap_dma_global_context.dma_gcr = dma_read(GCR); 1947 omap_dma_global_context.dma_gcr = p->dma_read(GCR, 0);
2056} 1948}
2057 1949
2058void omap_dma_global_context_restore(void) 1950void omap_dma_global_context_restore(void)
2059{ 1951{
2060 int ch; 1952 int ch;
2061 1953
2062 dma_write(omap_dma_global_context.dma_gcr, GCR); 1954 p->dma_write(omap_dma_global_context.dma_gcr, GCR, 0);
2063 dma_write(omap_dma_global_context.dma_ocp_sysconfig, 1955 p->dma_write(omap_dma_global_context.dma_ocp_sysconfig,
2064 OCP_SYSCONFIG); 1956 OCP_SYSCONFIG, 0);
2065 dma_write(omap_dma_global_context.dma_irqenable_l0, 1957 p->dma_write(omap_dma_global_context.dma_irqenable_l0,
2066 IRQENABLE_L0); 1958 IRQENABLE_L0, 0);
2067 1959
2068 /* 1960 if (IS_DMA_ERRATA(DMA_ROMCODE_BUG))
2069 * A bug in ROM code leaves IRQ status for channels 0 and 1 uncleared 1961 p->dma_write(0x3 , IRQSTATUS_L0, 0);
2070 * after secure sram context save and restore. Hence we need to
2071 * manually clear those IRQs to avoid spurious interrupts. This
2072 * affects only secure devices.
2073 */
2074 if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
2075 dma_write(0x3 , IRQSTATUS_L0);
2076 1962
2077 for (ch = 0; ch < dma_chan_count; ch++) 1963 for (ch = 0; ch < dma_chan_count; ch++)
2078 if (dma_chan[ch].dev_id != -1) 1964 if (dma_chan[ch].dev_id != -1)
2079 omap_clear_dma(ch); 1965 omap_clear_dma(ch);
2080} 1966}
2081 1967
2082/*----------------------------------------------------------------------------*/ 1968static int __devinit omap_system_dma_probe(struct platform_device *pdev)
2083
2084static int __init omap_init_dma(void)
2085{ 1969{
2086 unsigned long base; 1970 int ch, ret = 0;
2087 int ch, r; 1971 int dma_irq;
2088 1972 char irq_name[4];
2089 if (cpu_class_is_omap1()) { 1973 int irq_rel;
2090 base = OMAP1_DMA_BASE; 1974
2091 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; 1975 p = pdev->dev.platform_data;
2092 } else if (cpu_is_omap24xx()) { 1976 if (!p) {
2093 base = OMAP24XX_DMA4_BASE; 1977 dev_err(&pdev->dev, "%s: System DMA initialized without"
2094 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 1978 "platform data\n", __func__);
2095 } else if (cpu_is_omap34xx()) { 1979 return -EINVAL;
2096 base = OMAP34XX_DMA4_BASE;
2097 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2098 } else if (cpu_is_omap44xx()) {
2099 base = OMAP44XX_DMA4_BASE;
2100 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2101 } else {
2102 pr_err("DMA init failed for unsupported omap\n");
2103 return -ENODEV;
2104 } 1980 }
2105 1981
2106 omap_dma_base = ioremap(base, SZ_4K); 1982 d = p->dma_attr;
2107 BUG_ON(!omap_dma_base); 1983 errata = p->errata;
2108 1984
2109 if (cpu_class_is_omap2() && omap_dma_reserve_channels 1985 if ((d->dev_caps & RESERVE_CHANNEL) && omap_dma_reserve_channels
2110 && (omap_dma_reserve_channels <= dma_lch_count)) 1986 && (omap_dma_reserve_channels <= dma_lch_count))
2111 dma_lch_count = omap_dma_reserve_channels; 1987 d->lch_count = omap_dma_reserve_channels;
2112 1988
2113 dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count, 1989 dma_lch_count = d->lch_count;
2114 GFP_KERNEL); 1990 dma_chan_count = dma_lch_count;
2115 if (!dma_chan) { 1991 dma_chan = d->chan;
2116 r = -ENOMEM; 1992 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
2117 goto out_unmap;
2118 }
2119 1993
2120 if (cpu_class_is_omap2()) { 1994 if (cpu_class_is_omap2()) {
2121 dma_linked_lch = kzalloc(sizeof(struct dma_link_info) * 1995 dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
2122 dma_lch_count, GFP_KERNEL); 1996 dma_lch_count, GFP_KERNEL);
2123 if (!dma_linked_lch) { 1997 if (!dma_linked_lch) {
2124 r = -ENOMEM; 1998 ret = -ENOMEM;
2125 goto out_free; 1999 goto exit_dma_lch_fail;
2126 } 2000 }
2127 } 2001 }
2128 2002
2129 if (cpu_is_omap15xx()) {
2130 printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
2131 dma_chan_count = 9;
2132 enable_1510_mode = 1;
2133 } else if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
2134 printk(KERN_INFO "OMAP DMA hardware version %d\n",
2135 dma_read(HW_ID));
2136 printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n",
2137 (dma_read(CAPS_0_U) << 16) |
2138 dma_read(CAPS_0_L),
2139 (dma_read(CAPS_1_U) << 16) |
2140 dma_read(CAPS_1_L),
2141 dma_read(CAPS_2), dma_read(CAPS_3),
2142 dma_read(CAPS_4));
2143 if (!enable_1510_mode) {
2144 u16 w;
2145
2146 /* Disable OMAP 3.0/3.1 compatibility mode. */
2147 w = dma_read(GSCR);
2148 w |= 1 << 3;
2149 dma_write(w, GSCR);
2150 dma_chan_count = 16;
2151 } else
2152 dma_chan_count = 9;
2153 } else if (cpu_class_is_omap2()) {
2154 u8 revision = dma_read(REVISION) & 0xff;
2155 printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
2156 revision >> 4, revision & 0xf);
2157 dma_chan_count = dma_lch_count;
2158 } else {
2159 dma_chan_count = 0;
2160 return 0;
2161 }
2162
2163 spin_lock_init(&dma_chan_lock); 2003 spin_lock_init(&dma_chan_lock);
2164
2165 for (ch = 0; ch < dma_chan_count; ch++) { 2004 for (ch = 0; ch < dma_chan_count; ch++) {
2166 omap_clear_dma(ch); 2005 omap_clear_dma(ch);
2167 if (cpu_class_is_omap2()) 2006 if (cpu_class_is_omap2())
@@ -2178,20 +2017,23 @@ static int __init omap_init_dma(void)
2178 * request_irq() doesn't like dev_id (ie. ch) being 2017 * request_irq() doesn't like dev_id (ie. ch) being
2179 * zero, so we have to kludge around this. 2018 * zero, so we have to kludge around this.
2180 */ 2019 */
2181 r = request_irq(omap1_dma_irq[ch], 2020 sprintf(&irq_name[0], "%d", ch);
2021 dma_irq = platform_get_irq_byname(pdev, irq_name);
2022
2023 if (dma_irq < 0) {
2024 ret = dma_irq;
2025 goto exit_dma_irq_fail;
2026 }
2027
2028 /* INT_DMA_LCD is handled in lcd_dma.c */
2029 if (dma_irq == INT_DMA_LCD)
2030 continue;
2031
2032 ret = request_irq(dma_irq,
2182 omap1_dma_irq_handler, 0, "DMA", 2033 omap1_dma_irq_handler, 0, "DMA",
2183 (void *) (ch + 1)); 2034 (void *) (ch + 1));
2184 if (r != 0) { 2035 if (ret != 0)
2185 int i; 2036 goto exit_dma_irq_fail;
2186
2187 printk(KERN_ERR "unable to request IRQ %d "
2188 "for DMA (error %d)\n",
2189 omap1_dma_irq[ch], r);
2190 for (i = 0; i < ch; i++)
2191 free_irq(omap1_dma_irq[i],
2192 (void *) (i + 1));
2193 goto out_free;
2194 }
2195 } 2037 }
2196 } 2038 }
2197 2039
@@ -2200,46 +2042,91 @@ static int __init omap_init_dma(void)
2200 DMA_DEFAULT_FIFO_DEPTH, 0); 2042 DMA_DEFAULT_FIFO_DEPTH, 0);
2201 2043
2202 if (cpu_class_is_omap2()) { 2044 if (cpu_class_is_omap2()) {
2203 int irq; 2045 strcpy(irq_name, "0");
2204 if (cpu_is_omap44xx()) 2046 dma_irq = platform_get_irq_byname(pdev, irq_name);
2205 irq = OMAP44XX_IRQ_SDMA_0; 2047 if (dma_irq < 0) {
2206 else 2048 dev_err(&pdev->dev, "failed: request IRQ %d", dma_irq);
2207 irq = INT_24XX_SDMA_IRQ0; 2049 goto exit_dma_lch_fail;
2208 setup_irq(irq, &omap24xx_dma_irq); 2050 }
2209 } 2051 ret = setup_irq(dma_irq, &omap24xx_dma_irq);
2210 2052 if (ret) {
2211 if (cpu_is_omap34xx() || cpu_is_omap44xx()) { 2053 dev_err(&pdev->dev, "set_up failed for IRQ %d"
2212 /* Enable smartidle idlemodes and autoidle */ 2054 "for DMA (error %d)\n", dma_irq, ret);
2213 u32 v = dma_read(OCP_SYSCONFIG); 2055 goto exit_dma_lch_fail;
2214 v &= ~(DMA_SYSCONFIG_MIDLEMODE_MASK |
2215 DMA_SYSCONFIG_SIDLEMODE_MASK |
2216 DMA_SYSCONFIG_AUTOIDLE);
2217 v |= (DMA_SYSCONFIG_MIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
2218 DMA_SYSCONFIG_SIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
2219 DMA_SYSCONFIG_AUTOIDLE);
2220 dma_write(v , OCP_SYSCONFIG);
2221 /* reserve dma channels 0 and 1 in high security devices */
2222 if (cpu_is_omap34xx() &&
2223 (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
2224 printk(KERN_INFO "Reserving DMA channels 0 and 1 for "
2225 "HS ROM code\n");
2226 dma_chan[0].dev_id = 0;
2227 dma_chan[1].dev_id = 1;
2228 } 2056 }
2229 } 2057 }
2230 2058
2059 /* reserve dma channels 0 and 1 in high security devices */
2060 if (cpu_is_omap34xx() &&
2061 (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
2062 printk(KERN_INFO "Reserving DMA channels 0 and 1 for "
2063 "HS ROM code\n");
2064 dma_chan[0].dev_id = 0;
2065 dma_chan[1].dev_id = 1;
2066 }
2067 p->show_dma_caps();
2231 return 0; 2068 return 0;
2232 2069
2233out_free: 2070exit_dma_irq_fail:
2071 dev_err(&pdev->dev, "unable to request IRQ %d"
2072 "for DMA (error %d)\n", dma_irq, ret);
2073 for (irq_rel = 0; irq_rel < ch; irq_rel++) {
2074 dma_irq = platform_get_irq(pdev, irq_rel);
2075 free_irq(dma_irq, (void *)(irq_rel + 1));
2076 }
2077
2078exit_dma_lch_fail:
2079 kfree(p);
2080 kfree(d);
2234 kfree(dma_chan); 2081 kfree(dma_chan);
2082 return ret;
2083}
2235 2084
2236out_unmap: 2085static int __devexit omap_system_dma_remove(struct platform_device *pdev)
2237 iounmap(omap_dma_base); 2086{
2087 int dma_irq;
2238 2088
2239 return r; 2089 if (cpu_class_is_omap2()) {
2090 char irq_name[4];
2091 strcpy(irq_name, "0");
2092 dma_irq = platform_get_irq_byname(pdev, irq_name);
2093 remove_irq(dma_irq, &omap24xx_dma_irq);
2094 } else {
2095 int irq_rel = 0;
2096 for ( ; irq_rel < dma_chan_count; irq_rel++) {
2097 dma_irq = platform_get_irq(pdev, irq_rel);
2098 free_irq(dma_irq, (void *)(irq_rel + 1));
2099 }
2100 }
2101 kfree(p);
2102 kfree(d);
2103 kfree(dma_chan);
2104 return 0;
2105}
2106
2107static struct platform_driver omap_system_dma_driver = {
2108 .probe = omap_system_dma_probe,
2109 .remove = omap_system_dma_remove,
2110 .driver = {
2111 .name = "omap_dma_system"
2112 },
2113};
2114
2115static int __init omap_system_dma_init(void)
2116{
2117 return platform_driver_register(&omap_system_dma_driver);
2118}
2119arch_initcall(omap_system_dma_init);
2120
2121static void __exit omap_system_dma_exit(void)
2122{
2123 platform_driver_unregister(&omap_system_dma_driver);
2240} 2124}
2241 2125
2242arch_initcall(omap_init_dma); 2126MODULE_DESCRIPTION("OMAP SYSTEM DMA DRIVER");
2127MODULE_LICENSE("GPL");
2128MODULE_ALIAS("platform:" DRIVER_NAME);
2129MODULE_AUTHOR("Texas Instruments Inc");
2243 2130
2244/* 2131/*
2245 * Reserve the omap SDMA channels using cmdline bootarg 2132 * Reserve the omap SDMA channels using cmdline bootarg
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index 0cce4ca83aa0..d1c916fcf770 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -21,141 +21,15 @@
21#ifndef __ASM_ARCH_DMA_H 21#ifndef __ASM_ARCH_DMA_H
22#define __ASM_ARCH_DMA_H 22#define __ASM_ARCH_DMA_H
23 23
24/* Move omap4 specific defines to dma-44xx.h */ 24#include <linux/platform_device.h>
25#include "dma-44xx.h"
26 25
27/* Hardware registers for omap1 */ 26/*
28#define OMAP1_DMA_BASE (0xfffed800) 27 * TODO: These dma channel defines should go away once all
29 28 * the omap drivers hwmod adapted.
30#define OMAP1_DMA_GCR 0x400 29 */
31#define OMAP1_DMA_GSCR 0x404
32#define OMAP1_DMA_GRST 0x408
33#define OMAP1_DMA_HW_ID 0x442
34#define OMAP1_DMA_PCH2_ID 0x444
35#define OMAP1_DMA_PCH0_ID 0x446
36#define OMAP1_DMA_PCH1_ID 0x448
37#define OMAP1_DMA_PCHG_ID 0x44a
38#define OMAP1_DMA_PCHD_ID 0x44c
39#define OMAP1_DMA_CAPS_0_U 0x44e
40#define OMAP1_DMA_CAPS_0_L 0x450
41#define OMAP1_DMA_CAPS_1_U 0x452
42#define OMAP1_DMA_CAPS_1_L 0x454
43#define OMAP1_DMA_CAPS_2 0x456
44#define OMAP1_DMA_CAPS_3 0x458
45#define OMAP1_DMA_CAPS_4 0x45a
46#define OMAP1_DMA_PCH2_SR 0x460
47#define OMAP1_DMA_PCH0_SR 0x480
48#define OMAP1_DMA_PCH1_SR 0x482
49#define OMAP1_DMA_PCHD_SR 0x4c0
50
51/* Hardware registers for omap2 and omap3 */
52#define OMAP24XX_DMA4_BASE (L4_24XX_BASE + 0x56000)
53#define OMAP34XX_DMA4_BASE (L4_34XX_BASE + 0x56000)
54#define OMAP44XX_DMA4_BASE (L4_44XX_BASE + 0x56000)
55
56#define OMAP_DMA4_REVISION 0x00
57#define OMAP_DMA4_GCR 0x78
58#define OMAP_DMA4_IRQSTATUS_L0 0x08
59#define OMAP_DMA4_IRQSTATUS_L1 0x0c
60#define OMAP_DMA4_IRQSTATUS_L2 0x10
61#define OMAP_DMA4_IRQSTATUS_L3 0x14
62#define OMAP_DMA4_IRQENABLE_L0 0x18
63#define OMAP_DMA4_IRQENABLE_L1 0x1c
64#define OMAP_DMA4_IRQENABLE_L2 0x20
65#define OMAP_DMA4_IRQENABLE_L3 0x24
66#define OMAP_DMA4_SYSSTATUS 0x28
67#define OMAP_DMA4_OCP_SYSCONFIG 0x2c
68#define OMAP_DMA4_CAPS_0 0x64
69#define OMAP_DMA4_CAPS_2 0x6c
70#define OMAP_DMA4_CAPS_3 0x70
71#define OMAP_DMA4_CAPS_4 0x74
72
73#define OMAP1_LOGICAL_DMA_CH_COUNT 17
74#define OMAP_DMA4_LOGICAL_DMA_CH_COUNT 32 /* REVISIT: Is this 32 + 2? */
75
76/* Common channel specific registers for omap1 */
77#define OMAP1_DMA_CH_BASE(n) (0x40 * (n) + 0x00)
78#define OMAP1_DMA_CSDP(n) (0x40 * (n) + 0x00)
79#define OMAP1_DMA_CCR(n) (0x40 * (n) + 0x02)
80#define OMAP1_DMA_CICR(n) (0x40 * (n) + 0x04)
81#define OMAP1_DMA_CSR(n) (0x40 * (n) + 0x06)
82#define OMAP1_DMA_CEN(n) (0x40 * (n) + 0x10)
83#define OMAP1_DMA_CFN(n) (0x40 * (n) + 0x12)
84#define OMAP1_DMA_CSFI(n) (0x40 * (n) + 0x14)
85#define OMAP1_DMA_CSEI(n) (0x40 * (n) + 0x16)
86#define OMAP1_DMA_CPC(n) (0x40 * (n) + 0x18) /* 15xx only */
87#define OMAP1_DMA_CSAC(n) (0x40 * (n) + 0x18)
88#define OMAP1_DMA_CDAC(n) (0x40 * (n) + 0x1a)
89#define OMAP1_DMA_CDEI(n) (0x40 * (n) + 0x1c)
90#define OMAP1_DMA_CDFI(n) (0x40 * (n) + 0x1e)
91#define OMAP1_DMA_CLNK_CTRL(n) (0x40 * (n) + 0x28)
92
93/* Common channel specific registers for omap2 */
94#define OMAP_DMA4_CH_BASE(n) (0x60 * (n) + 0x80)
95#define OMAP_DMA4_CCR(n) (0x60 * (n) + 0x80)
96#define OMAP_DMA4_CLNK_CTRL(n) (0x60 * (n) + 0x84)
97#define OMAP_DMA4_CICR(n) (0x60 * (n) + 0x88)
98#define OMAP_DMA4_CSR(n) (0x60 * (n) + 0x8c)
99#define OMAP_DMA4_CSDP(n) (0x60 * (n) + 0x90)
100#define OMAP_DMA4_CEN(n) (0x60 * (n) + 0x94)
101#define OMAP_DMA4_CFN(n) (0x60 * (n) + 0x98)
102#define OMAP_DMA4_CSEI(n) (0x60 * (n) + 0xa4)
103#define OMAP_DMA4_CSFI(n) (0x60 * (n) + 0xa8)
104#define OMAP_DMA4_CDEI(n) (0x60 * (n) + 0xac)
105#define OMAP_DMA4_CDFI(n) (0x60 * (n) + 0xb0)
106#define OMAP_DMA4_CSAC(n) (0x60 * (n) + 0xb4)
107#define OMAP_DMA4_CDAC(n) (0x60 * (n) + 0xb8)
108
109/* Channel specific registers only on omap1 */
110#define OMAP1_DMA_CSSA_L(n) (0x40 * (n) + 0x08)
111#define OMAP1_DMA_CSSA_U(n) (0x40 * (n) + 0x0a)
112#define OMAP1_DMA_CDSA_L(n) (0x40 * (n) + 0x0c)
113#define OMAP1_DMA_CDSA_U(n) (0x40 * (n) + 0x0e)
114#define OMAP1_DMA_COLOR_L(n) (0x40 * (n) + 0x20)
115#define OMAP1_DMA_COLOR_U(n) (0x40 * (n) + 0x22)
116#define OMAP1_DMA_CCR2(n) (0x40 * (n) + 0x24)
117#define OMAP1_DMA_LCH_CTRL(n) (0x40 * (n) + 0x2a) /* not on 15xx */
118#define OMAP1_DMA_CCEN(n) 0
119#define OMAP1_DMA_CCFN(n) 0
120
121/* Channel specific registers only on omap2 */
122#define OMAP_DMA4_CSSA(n) (0x60 * (n) + 0x9c)
123#define OMAP_DMA4_CDSA(n) (0x60 * (n) + 0xa0)
124#define OMAP_DMA4_CCEN(n) (0x60 * (n) + 0xbc)
125#define OMAP_DMA4_CCFN(n) (0x60 * (n) + 0xc0)
126#define OMAP_DMA4_COLOR(n) (0x60 * (n) + 0xc4)
127
128/* Additional registers available on OMAP4 */
129#define OMAP_DMA4_CDP(n) (0x60 * (n) + 0xd0)
130#define OMAP_DMA4_CNDP(n) (0x60 * (n) + 0xd4)
131#define OMAP_DMA4_CCDN(n) (0x60 * (n) + 0xd8)
132
133/* Dummy defines to keep multi-omap compiles happy */
134#define OMAP1_DMA_REVISION 0
135#define OMAP1_DMA_IRQSTATUS_L0 0
136#define OMAP1_DMA_IRQENABLE_L0 0
137#define OMAP1_DMA_OCP_SYSCONFIG 0
138#define OMAP_DMA4_HW_ID 0
139#define OMAP_DMA4_CAPS_0_L 0
140#define OMAP_DMA4_CAPS_0_U 0
141#define OMAP_DMA4_CAPS_1_L 0
142#define OMAP_DMA4_CAPS_1_U 0
143#define OMAP_DMA4_GSCR 0
144#define OMAP_DMA4_CPC(n) 0
145
146#define OMAP_DMA4_LCH_CTRL(n) 0
147#define OMAP_DMA4_COLOR_L(n) 0
148#define OMAP_DMA4_COLOR_U(n) 0
149#define OMAP_DMA4_CCR2(n) 0
150#define OMAP1_DMA_CSSA(n) 0
151#define OMAP1_DMA_CDSA(n) 0
152#define OMAP_DMA4_CSSA_L(n) 0
153#define OMAP_DMA4_CSSA_U(n) 0
154#define OMAP_DMA4_CDSA_L(n) 0
155#define OMAP_DMA4_CDSA_U(n) 0
156#define OMAP1_DMA_COLOR(n) 0
157 30
158/*----------------------------------------------------------------------------*/ 31/* Move omap4 specific defines to dma-44xx.h */
32#include "dma-44xx.h"
159 33
160/* DMA channels for omap1 */ 34/* DMA channels for omap1 */
161#define OMAP_DMA_NO_DEVICE 0 35#define OMAP_DMA_NO_DEVICE 0
@@ -405,6 +279,63 @@
405#define DMA_CH_PRIO_HIGH 0x1 279#define DMA_CH_PRIO_HIGH 0x1
406#define DMA_CH_PRIO_LOW 0x0 /* Def */ 280#define DMA_CH_PRIO_LOW 0x0 /* Def */
407 281
282/* Errata handling */
283#define IS_DMA_ERRATA(id) (errata & (id))
284#define SET_DMA_ERRATA(id) (errata |= (id))
285
286#define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0)
287#define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1)
288#define DMA_ERRATA_i378 BIT(0x2)
289#define DMA_ERRATA_i541 BIT(0x3)
290#define DMA_ERRATA_i88 BIT(0x4)
291#define DMA_ERRATA_3_3 BIT(0x5)
292#define DMA_ROMCODE_BUG BIT(0x6)
293
294/* Attributes for OMAP DMA Contrller */
295#define DMA_LINKED_LCH BIT(0x0)
296#define GLOBAL_PRIORITY BIT(0x1)
297#define RESERVE_CHANNEL BIT(0x2)
298#define IS_CSSA_32 BIT(0x3)
299#define IS_CDSA_32 BIT(0x4)
300#define IS_RW_PRIORITY BIT(0x5)
301#define ENABLE_1510_MODE BIT(0x6)
302#define SRC_PORT BIT(0x7)
303#define DST_PORT BIT(0x8)
304#define SRC_INDEX BIT(0x9)
305#define DST_INDEX BIT(0xA)
306#define IS_BURST_ONLY4 BIT(0xB)
307#define CLEAR_CSR_ON_READ BIT(0xC)
308#define IS_WORD_16 BIT(0xD)
309
310enum omap_reg_offsets {
311
312GCR, GSCR, GRST1, HW_ID,
313PCH2_ID, PCH0_ID, PCH1_ID, PCHG_ID,
314PCHD_ID, CAPS_0, CAPS_1, CAPS_2,
315CAPS_3, CAPS_4, PCH2_SR, PCH0_SR,
316PCH1_SR, PCHD_SR, REVISION, IRQSTATUS_L0,
317IRQSTATUS_L1, IRQSTATUS_L2, IRQSTATUS_L3, IRQENABLE_L0,
318IRQENABLE_L1, IRQENABLE_L2, IRQENABLE_L3, SYSSTATUS,
319OCP_SYSCONFIG,
320
321/* omap1+ specific */
322CPC, CCR2, LCH_CTRL,
323
324/* Common registers for all omap's */
325CSDP, CCR, CICR, CSR,
326CEN, CFN, CSFI, CSEI,
327CSAC, CDAC, CDEI,
328CDFI, CLNK_CTRL,
329
330/* Channel specific registers */
331CSSA, CDSA, COLOR,
332CCEN, CCFN,
333
334/* omap3630 and omap4 specific */
335CDP, CNDP, CCDN,
336
337};
338
408enum omap_dma_burst_mode { 339enum omap_dma_burst_mode {
409 OMAP_DMA_DATA_BURST_DIS = 0, 340 OMAP_DMA_DATA_BURST_DIS = 0,
410 OMAP_DMA_DATA_BURST_4, 341 OMAP_DMA_DATA_BURST_4,
@@ -470,6 +401,41 @@ struct omap_dma_channel_params {
470#endif 401#endif
471}; 402};
472 403
404struct omap_dma_lch {
405 int next_lch;
406 int dev_id;
407 u16 saved_csr;
408 u16 enabled_irqs;
409 const char *dev_name;
410 void (*callback)(int lch, u16 ch_status, void *data);
411 void *data;
412 long flags;
413 /* required for Dynamic chaining */
414 int prev_linked_ch;
415 int next_linked_ch;
416 int state;
417 int chain_id;
418 int status;
419};
420
421struct omap_dma_dev_attr {
422 u32 dev_caps;
423 u16 lch_count;
424 u16 chan_count;
425 struct omap_dma_lch *chan;
426};
427
428/* System DMA platform data structure */
429struct omap_system_dma_plat_info {
430 struct omap_dma_dev_attr *dma_attr;
431 u32 errata;
432 void (*disable_irq_lch)(int lch);
433 void (*show_dma_caps)(void);
434 void (*clear_lch_regs)(int lch);
435 void (*clear_dma)(int lch);
436 void (*dma_write)(u32 val, int reg, int lch);
437 u32 (*dma_read)(int reg, int lch);
438};
473 439
474extern void omap_set_dma_priority(int lch, int dst_port, int priority); 440extern void omap_set_dma_priority(int lch, int dst_port, int priority);
475extern int omap_request_dma(int dev_id, const char *dev_name, 441extern int omap_request_dma(int dev_id, const char *dev_name,
diff --git a/arch/arm/plat-omap/include/plat/keypad.h b/arch/arm/plat-omap/include/plat/keypad.h
index 3ae52ccc793c..793ce9d53294 100644
--- a/arch/arm/plat-omap/include/plat/keypad.h
+++ b/arch/arm/plat-omap/include/plat/keypad.h
@@ -10,16 +10,18 @@
10#ifndef ASMARM_ARCH_KEYPAD_H 10#ifndef ASMARM_ARCH_KEYPAD_H
11#define ASMARM_ARCH_KEYPAD_H 11#define ASMARM_ARCH_KEYPAD_H
12 12
13#warning: Please update the board to use matrix_keypad.h instead 13#ifndef CONFIG_ARCH_OMAP1
14#warning Please update the board to use matrix-keypad driver
15#endif
16#include <linux/input/matrix_keypad.h>
14 17
15struct omap_kp_platform_data { 18struct omap_kp_platform_data {
16 int rows; 19 int rows;
17 int cols; 20 int cols;
18 int *keymap; 21 const struct matrix_keymap_data *keymap_data;
19 unsigned int keymapsize; 22 bool rep;
20 unsigned int rep:1;
21 unsigned long delay; 23 unsigned long delay;
22 unsigned int dbounce:1; 24 bool dbounce;
23 /* specific to OMAP242x*/ 25 /* specific to OMAP242x*/
24 unsigned int *row_gpios; 26 unsigned int *row_gpios;
25 unsigned int *col_gpios; 27 unsigned int *col_gpios;
@@ -28,18 +30,21 @@ struct omap_kp_platform_data {
28/* Group (0..3) -- when multiple keys are pressed, only the 30/* Group (0..3) -- when multiple keys are pressed, only the
29 * keys pressed in the same group are considered as pressed. This is 31 * keys pressed in the same group are considered as pressed. This is
30 * in order to workaround certain crappy HW designs that produce ghost 32 * in order to workaround certain crappy HW designs that produce ghost
31 * keypresses. */ 33 * keypresses. Two free bits, not used by neither row/col nor keynum,
32#define GROUP_0 (0 << 16) 34 * must be available for use as group bits. The below GROUP_SHIFT
33#define GROUP_1 (1 << 16) 35 * macro definition is based on some prior knowledge of the
34#define GROUP_2 (2 << 16) 36 * matrix_keypad defined KEY() macro internals.
35#define GROUP_3 (3 << 16) 37 */
38#define GROUP_SHIFT 14
39#define GROUP_0 (0 << GROUP_SHIFT)
40#define GROUP_1 (1 << GROUP_SHIFT)
41#define GROUP_2 (2 << GROUP_SHIFT)
42#define GROUP_3 (3 << GROUP_SHIFT)
36#define GROUP_MASK GROUP_3 43#define GROUP_MASK GROUP_3
44#if KEY_MAX & GROUP_MASK
45#error Group bits in conflict with keynum bits
46#endif
37 47
38#define KEY_PERSISTENT 0x00800000
39#define KEYNUM_MASK 0x00EFFFFF
40#define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val))
41#define PERSISTENT_KEY(col, row) (((col) << 28) | ((row) << 24) | \
42 KEY_PERSISTENT)
43 48
44#endif 49#endif
45 50
diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h
index 728fbb9dd549..62c3fe918ab2 100644
--- a/arch/arm/plat-omap/include/plat/omap-pm.h
+++ b/arch/arm/plat-omap/include/plat/omap-pm.h
@@ -17,27 +17,10 @@
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/cpufreq.h> 18#include <linux/cpufreq.h>
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <linux/opp.h>
20 21
21#include "powerdomain.h" 22#include "powerdomain.h"
22 23
23/**
24 * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
25 * @rate: target clock rate
26 * @opp_id: OPP ID
27 * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
28 *
29 * Operating performance point data. Can vary by OMAP chip and board.
30 */
31struct omap_opp {
32 unsigned long rate;
33 u8 opp_id;
34 u16 min_vdd;
35};
36
37extern struct omap_opp *mpu_opps;
38extern struct omap_opp *dsp_opps;
39extern struct omap_opp *l3_opps;
40
41/* 24/*
42 * agent_id values for use with omap_pm_set_min_bus_tput(): 25 * agent_id values for use with omap_pm_set_min_bus_tput():
43 * 26 *
@@ -59,9 +42,11 @@ extern struct omap_opp *l3_opps;
59 * framework starts. The "_if_" is to avoid name collisions with the 42 * framework starts. The "_if_" is to avoid name collisions with the
60 * PM idle-loop code. 43 * PM idle-loop code.
61 */ 44 */
62int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table, 45#ifdef CONFIG_OMAP_PM_NONE
63 struct omap_opp *dsp_opp_table, 46#define omap_pm_if_early_init() 0
64 struct omap_opp *l3_opp_table); 47#else
48int __init omap_pm_if_early_init(void);
49#endif
65 50
66/** 51/**
67 * omap_pm_if_init - OMAP PM init code called after clock fw init 52 * omap_pm_if_init - OMAP PM init code called after clock fw init
@@ -69,7 +54,11 @@ int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
69 * The main initialization code. OPP tables are passed in here. The 54 * The main initialization code. OPP tables are passed in here. The
70 * "_if_" is to avoid name collisions with the PM idle-loop code. 55 * "_if_" is to avoid name collisions with the PM idle-loop code.
71 */ 56 */
57#ifdef CONFIG_OMAP_PM_NONE
58#define omap_pm_if_init() 0
59#else
72int __init omap_pm_if_init(void); 60int __init omap_pm_if_init(void);
61#endif
73 62
74/** 63/**
75 * omap_pm_if_exit - OMAP PM exit code 64 * omap_pm_if_exit - OMAP PM exit code
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index 5905100b29a1..9967d5e855c7 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -11,6 +11,7 @@
11#ifndef __ARCH_ARM_OMAP_SRAM_H 11#ifndef __ARCH_ARM_OMAP_SRAM_H
12#define __ARCH_ARM_OMAP_SRAM_H 12#define __ARCH_ARM_OMAP_SRAM_H
13 13
14#ifndef __ASSEMBLY__
14extern void * omap_sram_push(void * start, unsigned long size); 15extern void * omap_sram_push(void * start, unsigned long size);
15extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); 16extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
16 17
@@ -74,4 +75,14 @@ extern void omap_push_sram_idle(void);
74static inline void omap_push_sram_idle(void) {} 75static inline void omap_push_sram_idle(void) {}
75#endif /* CONFIG_PM */ 76#endif /* CONFIG_PM */
76 77
78#endif /* __ASSEMBLY__ */
79
80/*
81 * OMAP2+: define the SRAM PA addresses.
82 * Used by the SRAM management code and the idle sleep code.
83 */
84#define OMAP2_SRAM_PA 0x40200000
85#define OMAP3_SRAM_PA 0x40200000
86#define OMAP4_SRAM_PA 0x40300000
87
77#endif 88#endif
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 7bbc0740cb46..ad98b85cae21 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -146,6 +146,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
146 DEBUG_LL_OMAP3(3, cm_t35); 146 DEBUG_LL_OMAP3(3, cm_t35);
147 DEBUG_LL_OMAP3(3, cm_t3517); 147 DEBUG_LL_OMAP3(3, cm_t3517);
148 DEBUG_LL_OMAP3(3, craneboard); 148 DEBUG_LL_OMAP3(3, craneboard);
149 DEBUG_LL_OMAP3(3, devkit8000);
149 DEBUG_LL_OMAP3(3, igep0020); 150 DEBUG_LL_OMAP3(3, igep0020);
150 DEBUG_LL_OMAP3(3, igep0030); 151 DEBUG_LL_OMAP3(3, igep0030);
151 DEBUG_LL_OMAP3(3, nokia_rm680); 152 DEBUG_LL_OMAP3(3, nokia_rm680);
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
index e129ce80c53b..ca75abb18068 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -26,10 +26,6 @@
26 26
27#include <plat/powerdomain.h> 27#include <plat/powerdomain.h>
28 28
29struct omap_opp *dsp_opps;
30struct omap_opp *mpu_opps;
31struct omap_opp *l3_opps;
32
33/* 29/*
34 * Device-driver-originated constraints (via board-*.c files) 30 * Device-driver-originated constraints (via board-*.c files)
35 */ 31 */
@@ -308,13 +304,8 @@ int omap_pm_get_dev_context_loss_count(struct device *dev)
308 304
309 305
310/* Should be called before clk framework init */ 306/* Should be called before clk framework init */
311int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table, 307int __init omap_pm_if_early_init(void)
312 struct omap_opp *dsp_opp_table,
313 struct omap_opp *l3_opp_table)
314{ 308{
315 mpu_opps = mpu_opp_table;
316 dsp_opps = dsp_opp_table;
317 l3_opps = l3_opp_table;
318 return 0; 309 return 0;
319} 310}
320 311
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 819ea0cfb81a..1a686c89d8dd 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -41,15 +41,12 @@
41 41
42#define OMAP1_SRAM_PA 0x20000000 42#define OMAP1_SRAM_PA 0x20000000
43#define OMAP1_SRAM_VA VMALLOC_END 43#define OMAP1_SRAM_VA VMALLOC_END
44#define OMAP2_SRAM_PA 0x40200000 44#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
45#define OMAP2_SRAM_PUB_PA 0x4020f800
46#define OMAP2_SRAM_VA 0xfe400000 45#define OMAP2_SRAM_VA 0xfe400000
47#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) 46#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800)
48#define OMAP3_SRAM_PA 0x40200000
49#define OMAP3_SRAM_VA 0xfe400000 47#define OMAP3_SRAM_VA 0xfe400000
50#define OMAP3_SRAM_PUB_PA 0x40208000 48#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
51#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000) 49#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000)
52#define OMAP4_SRAM_PA 0x40300000
53#define OMAP4_SRAM_VA 0xfe400000 50#define OMAP4_SRAM_VA 0xfe400000
54#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) 51#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
55#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000) 52#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000)
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 5a27b1b538f2..eb105e61c746 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -8,7 +8,7 @@ config PLAT_S3C24XX
8 default y 8 default y
9 select NO_IOPORT 9 select NO_IOPORT
10 select ARCH_REQUIRE_GPIOLIB 10 select ARCH_REQUIRE_GPIOLIB
11 select S3C_DEVICE_NAND 11 select S3C_DEV_NAND
12 select S3C_GPIO_CFG_S3C24XX 12 select S3C_GPIO_CFG_S3C24XX
13 help 13 help
14 Base platform code for any Samsung S3C24XX device 14 Base platform code for any Samsung S3C24XX device
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 67a2fa2caa49..0a9b5b8b2a19 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -19,6 +19,8 @@ config MIPS
19 select GENERIC_ATOMIC64 if !64BIT 19 select GENERIC_ATOMIC64 if !64BIT
20 select HAVE_DMA_ATTRS 20 select HAVE_DMA_ATTRS
21 select HAVE_DMA_API_DEBUG 21 select HAVE_DMA_API_DEBUG
22 select HAVE_GENERIC_HARDIRQS
23 select GENERIC_IRQ_PROBE
22 24
23menu "Machine selection" 25menu "Machine selection"
24 26
@@ -1664,6 +1666,28 @@ config PAGE_SIZE_64KB
1664 1666
1665endchoice 1667endchoice
1666 1668
1669config FORCE_MAX_ZONEORDER
1670 int "Maximum zone order"
1671 range 13 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
1672 default "13" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
1673 range 12 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
1674 default "12" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
1675 range 11 64
1676 default "11"
1677 help
1678 The kernel memory allocator divides physically contiguous memory
1679 blocks into "zones", where each zone is a power of two number of
1680 pages. This option selects the largest power of two that the kernel
1681 keeps in the memory allocator. If you need to allocate very large
1682 blocks of physically contiguous memory, then you may need to
1683 increase this value.
1684
1685 This config option is actually maximum order plus one. For example,
1686 a value of 11 means that the largest free memory block is 2^10 pages.
1687
1688 The page size is not necessarily 4KB. Keep this in mind
1689 when choosing a value for this option.
1690
1667config BOARD_SCACHE 1691config BOARD_SCACHE
1668 bool 1692 bool
1669 1693
@@ -1922,20 +1946,6 @@ config CPU_R4400_WORKAROUNDS
1922 bool 1946 bool
1923 1947
1924# 1948#
1925# Use the generic interrupt handling code in kernel/irq/:
1926#
1927config GENERIC_HARDIRQS
1928 bool
1929 default y
1930
1931config GENERIC_IRQ_PROBE
1932 bool
1933 default y
1934
1935config IRQ_PER_CPU
1936 bool
1937
1938#
1939# - Highmem only makes sense for the 32-bit kernel. 1949# - Highmem only makes sense for the 32-bit kernel.
1940# - The current highmem code will only work properly on physically indexed 1950# - The current highmem code will only work properly on physically indexed
1941# caches such as R3000, SB1, R7000 or those that look like they're virtually 1951# caches such as R3000, SB1, R7000 or those that look like they're virtually
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 3691630931d6..9e7814db3d03 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -27,6 +27,7 @@
27static void alchemy_8250_pm(struct uart_port *port, unsigned int state, 27static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
28 unsigned int old_state) 28 unsigned int old_state)
29{ 29{
30#ifdef CONFIG_SERIAL_8250
30 switch (state) { 31 switch (state) {
31 case 0: 32 case 0:
32 if ((__raw_readl(port->membase + UART_MOD_CNTRL) & 3) != 3) { 33 if ((__raw_readl(port->membase + UART_MOD_CNTRL) & 3) != 3) {
@@ -49,6 +50,7 @@ static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
49 serial8250_do_pm(port, state, old_state); 50 serial8250_do_pm(port, state, old_state);
50 break; 51 break;
51 } 52 }
53#endif
52} 54}
53 55
54#define PORT(_base, _irq) \ 56#define PORT(_base, _irq) \
diff --git a/arch/mips/alchemy/devboards/prom.c b/arch/mips/alchemy/devboards/prom.c
index b30df5c97ad3..baeb21385058 100644
--- a/arch/mips/alchemy/devboards/prom.c
+++ b/arch/mips/alchemy/devboards/prom.c
@@ -54,10 +54,9 @@ void __init prom_init(void)
54 54
55 prom_init_cmdline(); 55 prom_init_cmdline();
56 memsize_str = prom_getenv("memsize"); 56 memsize_str = prom_getenv("memsize");
57 if (!memsize_str) 57 if (!memsize_str || strict_strtoul(memsize_str, 0, &memsize))
58 memsize = ALCHEMY_BOARD_DEFAULT_MEMSIZE; 58 memsize = ALCHEMY_BOARD_DEFAULT_MEMSIZE;
59 else 59
60 strict_strtoul(memsize_str, 0, &memsize);
61 add_memory_region(0, memsize, BOOT_MEM_RAM); 60 add_memory_region(0, memsize, BOOT_MEM_RAM);
62} 61}
63 62
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
index fc0e7154e8d6..2ca4ada1c291 100644
--- a/arch/mips/ar7/clock.c
+++ b/arch/mips/ar7/clock.c
@@ -239,12 +239,12 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
239 calculate(base_clock, frequency, &prediv, &postdiv, &mul); 239 calculate(base_clock, frequency, &prediv, &postdiv, &mul);
240 240
241 writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl); 241 writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
242 msleep(1); 242 mdelay(1);
243 writel(4, &clock->pll); 243 writel(4, &clock->pll);
244 while (readl(&clock->pll) & PLL_STATUS) 244 while (readl(&clock->pll) & PLL_STATUS)
245 ; 245 ;
246 writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); 246 writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
247 msleep(75); 247 mdelay(75);
248} 248}
249 249
250static void __init tnetd7300_init_clocks(void) 250static void __init tnetd7300_init_clocks(void)
@@ -456,7 +456,7 @@ void clk_put(struct clk *clk)
456} 456}
457EXPORT_SYMBOL(clk_put); 457EXPORT_SYMBOL(clk_put);
458 458
459int __init ar7_init_clocks(void) 459void __init ar7_init_clocks(void)
460{ 460{
461 switch (ar7_chip_id()) { 461 switch (ar7_chip_id()) {
462 case AR7_CHIP_7100: 462 case AR7_CHIP_7100:
@@ -472,7 +472,4 @@ int __init ar7_init_clocks(void)
472 } 472 }
473 /* adjust vbus clock rate */ 473 /* adjust vbus clock rate */
474 vbus_clk.rate = bus_clk.rate / 2; 474 vbus_clk.rate = bus_clk.rate / 2;
475
476 return 0;
477} 475}
478arch_initcall(ar7_init_clocks);
diff --git a/arch/mips/ar7/time.c b/arch/mips/ar7/time.c
index 5fb8a0134085..22c93213b233 100644
--- a/arch/mips/ar7/time.c
+++ b/arch/mips/ar7/time.c
@@ -30,6 +30,9 @@ void __init plat_time_init(void)
30{ 30{
31 struct clk *cpu_clk; 31 struct clk *cpu_clk;
32 32
33 /* Initialize ar7 clocks so the CPU clock frequency is correct */
34 ar7_init_clocks();
35
33 cpu_clk = clk_get(NULL, "cpu"); 36 cpu_clk = clk_get(NULL, "cpu");
34 if (IS_ERR(cpu_clk)) { 37 if (IS_ERR(cpu_clk)) {
35 printk(KERN_ERR "unable to get cpu clock\n"); 38 printk(KERN_ERR "unable to get cpu clock\n");
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index b1aee33efd11..c95f90bf734c 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -32,7 +32,6 @@
32#include <asm/reboot.h> 32#include <asm/reboot.h>
33#include <asm/time.h> 33#include <asm/time.h>
34#include <bcm47xx.h> 34#include <bcm47xx.h>
35#include <asm/fw/cfe/cfe_api.h>
36#include <asm/mach-bcm47xx/nvram.h> 35#include <asm/mach-bcm47xx/nvram.h>
37 36
38struct ssb_bus ssb_bcm47xx; 37struct ssb_bus ssb_bcm47xx;
@@ -57,68 +56,112 @@ static void bcm47xx_machine_halt(void)
57 cpu_relax(); 56 cpu_relax();
58} 57}
59 58
60static void str2eaddr(char *str, char *dest) 59#define READ_FROM_NVRAM(_outvar, name, buf) \
61{ 60 if (nvram_getenv(name, buf, sizeof(buf)) >= 0)\
62 int i = 0; 61 sprom->_outvar = simple_strtoul(buf, NULL, 0);
63 62
64 if (str == NULL) { 63static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
65 memset(dest, 0, 6); 64{
66 return; 65 char buf[100];
66 u32 boardflags;
67
68 memset(sprom, 0, sizeof(struct ssb_sprom));
69
70 sprom->revision = 1; /* Fallback: Old hardware does not define this. */
71 READ_FROM_NVRAM(revision, "sromrev", buf);
72 if (nvram_getenv("il0macaddr", buf, sizeof(buf)) >= 0)
73 nvram_parse_macaddr(buf, sprom->il0mac);
74 if (nvram_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
75 nvram_parse_macaddr(buf, sprom->et0mac);
76 if (nvram_getenv("et1macaddr", buf, sizeof(buf)) >= 0)
77 nvram_parse_macaddr(buf, sprom->et1mac);
78 READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
79 READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
80 READ_FROM_NVRAM(et0mdcport, "et0mdcport", buf);
81 READ_FROM_NVRAM(et1mdcport, "et1mdcport", buf);
82 READ_FROM_NVRAM(board_rev, "boardrev", buf);
83 READ_FROM_NVRAM(country_code, "ccode", buf);
84 READ_FROM_NVRAM(ant_available_a, "aa5g", buf);
85 READ_FROM_NVRAM(ant_available_bg, "aa2g", buf);
86 READ_FROM_NVRAM(pa0b0, "pa0b0", buf);
87 READ_FROM_NVRAM(pa0b1, "pa0b1", buf);
88 READ_FROM_NVRAM(pa0b2, "pa0b2", buf);
89 READ_FROM_NVRAM(pa1b0, "pa1b0", buf);
90 READ_FROM_NVRAM(pa1b1, "pa1b1", buf);
91 READ_FROM_NVRAM(pa1b2, "pa1b2", buf);
92 READ_FROM_NVRAM(pa1lob0, "pa1lob0", buf);
93 READ_FROM_NVRAM(pa1lob2, "pa1lob1", buf);
94 READ_FROM_NVRAM(pa1lob1, "pa1lob2", buf);
95 READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
96 READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
97 READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
98 READ_FROM_NVRAM(gpio0, "wl0gpio0", buf);
99 READ_FROM_NVRAM(gpio1, "wl0gpio1", buf);
100 READ_FROM_NVRAM(gpio2, "wl0gpio2", buf);
101 READ_FROM_NVRAM(gpio3, "wl0gpio3", buf);
102 READ_FROM_NVRAM(maxpwr_bg, "pa0maxpwr", buf);
103 READ_FROM_NVRAM(maxpwr_al, "pa1lomaxpwr", buf);
104 READ_FROM_NVRAM(maxpwr_a, "pa1maxpwr", buf);
105 READ_FROM_NVRAM(maxpwr_ah, "pa1himaxpwr", buf);
106 READ_FROM_NVRAM(itssi_a, "pa1itssit", buf);
107 READ_FROM_NVRAM(itssi_bg, "pa0itssit", buf);
108 READ_FROM_NVRAM(tri2g, "tri2g", buf);
109 READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
110 READ_FROM_NVRAM(tri5g, "tri5g", buf);
111 READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
112 READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
113 READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
114 READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
115 READ_FROM_NVRAM(rssismc2g, "rssismc2g", buf);
116 READ_FROM_NVRAM(rssismf2g, "rssismf2g", buf);
117 READ_FROM_NVRAM(bxa2g, "bxa2g", buf);
118 READ_FROM_NVRAM(rssisav5g, "rssisav5g", buf);
119 READ_FROM_NVRAM(rssismc5g, "rssismc5g", buf);
120 READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
121 READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
122 READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
123 READ_FROM_NVRAM(ofdm2gpo, "ofdm2gpo", buf);
124 READ_FROM_NVRAM(ofdm5glpo, "ofdm5glpo", buf);
125 READ_FROM_NVRAM(ofdm5gpo, "ofdm5gpo", buf);
126 READ_FROM_NVRAM(ofdm5ghpo, "ofdm5ghpo", buf);
127
128 if (nvram_getenv("boardflags", buf, sizeof(buf)) >= 0) {
129 boardflags = simple_strtoul(buf, NULL, 0);
130 if (boardflags) {
131 sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
132 sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
133 }
67 } 134 }
68 135 if (nvram_getenv("boardflags2", buf, sizeof(buf)) >= 0) {
69 for (;;) { 136 boardflags = simple_strtoul(buf, NULL, 0);
70 dest[i++] = (char) simple_strtoul(str, NULL, 16); 137 if (boardflags) {
71 str += 2; 138 sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
72 if (!*str++ || i == 6) 139 sprom->boardflags2_hi = (boardflags & 0xFFFF0000U) >> 16;
73 break; 140 }
74 } 141 }
75} 142}
76 143
77static int bcm47xx_get_invariants(struct ssb_bus *bus, 144static int bcm47xx_get_invariants(struct ssb_bus *bus,
78 struct ssb_init_invariants *iv) 145 struct ssb_init_invariants *iv)
79{ 146{
80 char buf[100]; 147 char buf[20];
81 148
82 /* Fill boardinfo structure */ 149 /* Fill boardinfo structure */
83 memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo)); 150 memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
84 151
85 if (cfe_getenv("boardvendor", buf, sizeof(buf)) >= 0 || 152 if (nvram_getenv("boardvendor", buf, sizeof(buf)) >= 0)
86 nvram_getenv("boardvendor", buf, sizeof(buf)) >= 0) 153 iv->boardinfo.vendor = (u16)simple_strtoul(buf, NULL, 0);
87 iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0); 154 else
88 if (cfe_getenv("boardtype", buf, sizeof(buf)) >= 0 || 155 iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
89 nvram_getenv("boardtype", buf, sizeof(buf)) >= 0) 156 if (nvram_getenv("boardtype", buf, sizeof(buf)) >= 0)
90 iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0); 157 iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
91 if (cfe_getenv("boardrev", buf, sizeof(buf)) >= 0 || 158 if (nvram_getenv("boardrev", buf, sizeof(buf)) >= 0)
92 nvram_getenv("boardrev", buf, sizeof(buf)) >= 0)
93 iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0); 159 iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
94 160
95 /* Fill sprom structure */ 161 bcm47xx_fill_sprom(&iv->sprom);
96 memset(&(iv->sprom), 0, sizeof(struct ssb_sprom));
97 iv->sprom.revision = 3;
98
99 if (cfe_getenv("et0macaddr", buf, sizeof(buf)) >= 0 ||
100 nvram_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
101 str2eaddr(buf, iv->sprom.et0mac);
102 162
103 if (cfe_getenv("et1macaddr", buf, sizeof(buf)) >= 0 || 163 if (nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
104 nvram_getenv("et1macaddr", buf, sizeof(buf)) >= 0) 164 iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
105 str2eaddr(buf, iv->sprom.et1mac);
106
107 if (cfe_getenv("et0phyaddr", buf, sizeof(buf)) >= 0 ||
108 nvram_getenv("et0phyaddr", buf, sizeof(buf)) >= 0)
109 iv->sprom.et0phyaddr = simple_strtoul(buf, NULL, 0);
110
111 if (cfe_getenv("et1phyaddr", buf, sizeof(buf)) >= 0 ||
112 nvram_getenv("et1phyaddr", buf, sizeof(buf)) >= 0)
113 iv->sprom.et1phyaddr = simple_strtoul(buf, NULL, 0);
114
115 if (cfe_getenv("et0mdcport", buf, sizeof(buf)) >= 0 ||
116 nvram_getenv("et0mdcport", buf, sizeof(buf)) >= 0)
117 iv->sprom.et0mdcport = simple_strtoul(buf, NULL, 10);
118
119 if (cfe_getenv("et1mdcport", buf, sizeof(buf)) >= 0 ||
120 nvram_getenv("et1mdcport", buf, sizeof(buf)) >= 0)
121 iv->sprom.et1mdcport = simple_strtoul(buf, NULL, 10);
122 165
123 return 0; 166 return 0;
124} 167}
@@ -126,12 +169,28 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
126void __init plat_mem_setup(void) 169void __init plat_mem_setup(void)
127{ 170{
128 int err; 171 int err;
172 char buf[100];
173 struct ssb_mipscore *mcore;
129 174
130 err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE, 175 err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
131 bcm47xx_get_invariants); 176 bcm47xx_get_invariants);
132 if (err) 177 if (err)
133 panic("Failed to initialize SSB bus (err %d)\n", err); 178 panic("Failed to initialize SSB bus (err %d)\n", err);
134 179
180 mcore = &ssb_bcm47xx.mipscore;
181 if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
182 if (strstr(buf, "console=ttyS1")) {
183 struct ssb_serial_port port;
184
185 printk(KERN_DEBUG "Swapping serial ports!\n");
186 /* swap serial ports */
187 memcpy(&port, &mcore->serial_ports[0], sizeof(port));
188 memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
189 sizeof(port));
190 memcpy(&mcore->serial_ports[1], &port, sizeof(port));
191 }
192 }
193
135 _machine_restart = bcm47xx_machine_restart; 194 _machine_restart = bcm47xx_machine_restart;
136 _machine_halt = bcm47xx_machine_halt; 195 _machine_halt = bcm47xx_machine_halt;
137 pm_power_off = bcm47xx_machine_halt; 196 pm_power_off = bcm47xx_machine_halt;
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 06d59dcbe243..86877539c6e8 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -111,8 +111,8 @@
111 * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM 111 * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
112 */ 112 */
113 113
114#define PRID_IMP_BMIPS4KC 0x4000 114#define PRID_IMP_BMIPS32_REV4 0x4000
115#define PRID_IMP_BMIPS32 0x8000 115#define PRID_IMP_BMIPS32_REV8 0x8000
116#define PRID_IMP_BMIPS3300 0x9000 116#define PRID_IMP_BMIPS3300 0x9000
117#define PRID_IMP_BMIPS3300_ALT 0x9100 117#define PRID_IMP_BMIPS3300_ALT 0x9100
118#define PRID_IMP_BMIPS3300_BUG 0x0000 118#define PRID_IMP_BMIPS3300_BUG 0x0000
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index fd1d39eb7431..455c0ac7d4ea 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -249,7 +249,8 @@ extern struct mips_abi mips_abi_n32;
249 249
250#define SET_PERSONALITY(ex) \ 250#define SET_PERSONALITY(ex) \
251do { \ 251do { \
252 set_personality(PER_LINUX); \ 252 if (personality(current->personality) != PER_LINUX) \
253 set_personality(PER_LINUX); \
253 \ 254 \
254 current->thread.abi = &mips_abi; \ 255 current->thread.abi = &mips_abi; \
255} while (0) 256} while (0)
@@ -296,6 +297,8 @@ do { \
296 297
297#define SET_PERSONALITY(ex) \ 298#define SET_PERSONALITY(ex) \
298do { \ 299do { \
300 unsigned int p; \
301 \
299 clear_thread_flag(TIF_32BIT_REGS); \ 302 clear_thread_flag(TIF_32BIT_REGS); \
300 clear_thread_flag(TIF_32BIT_ADDR); \ 303 clear_thread_flag(TIF_32BIT_ADDR); \
301 \ 304 \
@@ -304,7 +307,8 @@ do { \
304 else \ 307 else \
305 current->thread.abi = &mips_abi; \ 308 current->thread.abi = &mips_abi; \
306 \ 309 \
307 if (current->personality != PER_LINUX32) \ 310 p = personality(current->personality); \
311 if (p != PER_LINUX32 && p != PER_LINUX) \
308 set_personality(PER_LINUX); \ 312 set_personality(PER_LINUX); \
309} while (0) 313} while (0)
310 314
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index c98bf514ec7d..5b017f23e243 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -329,10 +329,14 @@ static inline void pfx##write##bwlq(type val, \
329 "dsrl32 %L0, %L0, 0" "\n\t" \ 329 "dsrl32 %L0, %L0, 0" "\n\t" \
330 "dsll32 %M0, %M0, 0" "\n\t" \ 330 "dsll32 %M0, %M0, 0" "\n\t" \
331 "or %L0, %L0, %M0" "\n\t" \ 331 "or %L0, %L0, %M0" "\n\t" \
332 ".set push" "\n\t" \
333 ".set noreorder" "\n\t" \
334 ".set nomacro" "\n\t" \
332 "sd %L0, %2" "\n\t" \ 335 "sd %L0, %2" "\n\t" \
336 ".set pop" "\n\t" \
333 ".set mips0" "\n" \ 337 ".set mips0" "\n" \
334 : "=r" (__tmp) \ 338 : "=r" (__tmp) \
335 : "0" (__val), "m" (*__mem)); \ 339 : "0" (__val), "R" (*__mem)); \
336 if (irq) \ 340 if (irq) \
337 local_irq_restore(__flags); \ 341 local_irq_restore(__flags); \
338 } else \ 342 } else \
@@ -355,12 +359,16 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \
355 local_irq_save(__flags); \ 359 local_irq_save(__flags); \
356 __asm__ __volatile__( \ 360 __asm__ __volatile__( \
357 ".set mips3" "\t\t# __readq" "\n\t" \ 361 ".set mips3" "\t\t# __readq" "\n\t" \
362 ".set push" "\n\t" \
363 ".set noreorder" "\n\t" \
364 ".set nomacro" "\n\t" \
358 "ld %L0, %1" "\n\t" \ 365 "ld %L0, %1" "\n\t" \
366 ".set pop" "\n\t" \
359 "dsra32 %M0, %L0, 0" "\n\t" \ 367 "dsra32 %M0, %L0, 0" "\n\t" \
360 "sll %L0, %L0, 0" "\n\t" \ 368 "sll %L0, %L0, 0" "\n\t" \
361 ".set mips0" "\n" \ 369 ".set mips0" "\n" \
362 : "=r" (__val) \ 370 : "=r" (__val) \
363 : "m" (*__mem)); \ 371 : "R" (*__mem)); \
364 if (irq) \ 372 if (irq) \
365 local_irq_restore(__flags); \ 373 local_irq_restore(__flags); \
366 } else { \ 374 } else { \
diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h
index 7919d76186bf..07d3fadb2443 100644
--- a/arch/mips/include/asm/mach-ar7/ar7.h
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -201,7 +201,6 @@ static inline void ar7_device_off(u32 bit)
201} 201}
202 202
203int __init ar7_gpio_init(void); 203int __init ar7_gpio_init(void);
204 204void __init ar7_init_clocks(void);
205int __init ar7_gpio_init(void);
206 205
207#endif /* __AR7_H__ */ 206#endif /* __AR7_H__ */
diff --git a/arch/mips/include/asm/mach-bcm47xx/nvram.h b/arch/mips/include/asm/mach-bcm47xx/nvram.h
index c58ebd8bc155..9759588ba3cf 100644
--- a/arch/mips/include/asm/mach-bcm47xx/nvram.h
+++ b/arch/mips/include/asm/mach-bcm47xx/nvram.h
@@ -12,6 +12,7 @@
12#define __NVRAM_H 12#define __NVRAM_H
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/kernel.h>
15 16
16struct nvram_header { 17struct nvram_header {
17 u32 magic; 18 u32 magic;
@@ -36,4 +37,10 @@ struct nvram_header {
36 37
37extern int nvram_getenv(char *name, char *val, size_t val_len); 38extern int nvram_getenv(char *name, char *val, size_t val_len);
38 39
40static inline void nvram_parse_macaddr(char *buf, u8 *macaddr)
41{
42 sscanf(buf, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &macaddr[0], &macaddr[1],
43 &macaddr[2], &macaddr[3], &macaddr[4], &macaddr[5]);
44}
45
39#endif 46#endif
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 5742bb4d78f4..5c0a3575877c 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -5,7 +5,7 @@
5 * 5 *
6 * Copyright (c) 2009 Qi Hardware inc., 6 * Copyright (c) 2009 Qi Hardware inc.,
7 * Author: Xiangfu Liu <xiangfu@qi-hardware.com> 7 * Author: Xiangfu Liu <xiangfu@qi-hardware.com>
8 * Copyright 2010, Lars-Petrer Clausen <lars@metafoo.de> 8 * Copyright 2010, Lars-Peter Clausen <lars@metafoo.de>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 or later 11 * it under the terms of the GNU General Public License version 2 or later
@@ -235,7 +235,7 @@ static const unsigned int qi_lb60_keypad_rows[] = {
235 QI_LB60_GPIO_KEYIN(3), 235 QI_LB60_GPIO_KEYIN(3),
236 QI_LB60_GPIO_KEYIN(4), 236 QI_LB60_GPIO_KEYIN(4),
237 QI_LB60_GPIO_KEYIN(5), 237 QI_LB60_GPIO_KEYIN(5),
238 QI_LB60_GPIO_KEYIN(7), 238 QI_LB60_GPIO_KEYIN(6),
239 QI_LB60_GPIO_KEYIN8, 239 QI_LB60_GPIO_KEYIN8,
240}; 240};
241 241
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index 95bc2b5b14f1..1cc9e544d16b 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -208,7 +208,7 @@ struct platform_device jz4740_i2s_device = {
208 208
209/* PCM */ 209/* PCM */
210struct platform_device jz4740_pcm_device = { 210struct platform_device jz4740_pcm_device = {
211 .name = "jz4740-pcm", 211 .name = "jz4740-pcm-audio",
212 .id = -1, 212 .id = -1,
213}; 213};
214 214
diff --git a/arch/mips/jz4740/prom.c b/arch/mips/jz4740/prom.c
index cfeac15eb2e4..4a70407f55bb 100644
--- a/arch/mips/jz4740/prom.c
+++ b/arch/mips/jz4740/prom.c
@@ -23,7 +23,7 @@
23#include <asm/bootinfo.h> 23#include <asm/bootinfo.h>
24#include <asm/mach-jz4740/base.h> 24#include <asm/mach-jz4740/base.h>
25 25
26void jz4740_init_cmdline(int argc, char *argv[]) 26static __init void jz4740_init_cmdline(int argc, char *argv[])
27{ 27{
28 unsigned int count = COMMAND_LINE_SIZE - 1; 28 unsigned int count = COMMAND_LINE_SIZE - 1;
29 int i; 29 int i;
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 2f4d7a99bcc2..98c5a9737c14 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -32,7 +32,7 @@ static int mips_next_event(unsigned long delta,
32 cnt = read_c0_count(); 32 cnt = read_c0_count();
33 cnt += delta; 33 cnt += delta;
34 write_c0_compare(cnt); 34 write_c0_compare(cnt);
35 res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0; 35 res = ((int)(read_c0_count() - cnt) >= 0) ? -ETIME : 0;
36 return res; 36 return res;
37} 37}
38 38
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 71620e19827a..68dae7b6b5db 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -905,7 +905,8 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
905{ 905{
906 decode_configs(c); 906 decode_configs(c);
907 switch (c->processor_id & 0xff00) { 907 switch (c->processor_id & 0xff00) {
908 case PRID_IMP_BMIPS32: 908 case PRID_IMP_BMIPS32_REV4:
909 case PRID_IMP_BMIPS32_REV8:
909 c->cputype = CPU_BMIPS32; 910 c->cputype = CPU_BMIPS32;
910 __cpu_name[cpu] = "Broadcom BMIPS32"; 911 __cpu_name[cpu] = "Broadcom BMIPS32";
911 break; 912 break;
@@ -933,10 +934,6 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
933 __cpu_name[cpu] = "Broadcom BMIPS5000"; 934 __cpu_name[cpu] = "Broadcom BMIPS5000";
934 c->options |= MIPS_CPU_ULRI; 935 c->options |= MIPS_CPU_ULRI;
935 break; 936 break;
936 case PRID_IMP_BMIPS4KC:
937 c->cputype = CPU_4KC;
938 __cpu_name[cpu] = "MIPS 4Kc";
939 break;
940 } 937 }
941} 938}
942 939
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 6343b4a5b835..876a75cc376f 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -251,14 +251,15 @@ SYSCALL_DEFINE5(n32_msgrcv, int, msqid, u32, msgp, size_t, msgsz,
251 251
252SYSCALL_DEFINE1(32_personality, unsigned long, personality) 252SYSCALL_DEFINE1(32_personality, unsigned long, personality)
253{ 253{
254 unsigned int p = personality & 0xffffffff;
254 int ret; 255 int ret;
255 personality &= 0xffffffff; 256
256 if (personality(current->personality) == PER_LINUX32 && 257 if (personality(current->personality) == PER_LINUX32 &&
257 personality == PER_LINUX) 258 personality(p) == PER_LINUX)
258 personality = PER_LINUX32; 259 p = (p & ~PER_MASK) | PER_LINUX32;
259 ret = sys_personality(personality); 260 ret = sys_personality(p);
260 if (ret == PER_LINUX32) 261 if (ret != -1 && personality(ret) == PER_LINUX32)
261 ret = PER_LINUX; 262 ret = (ret & ~PER_MASK) | PER_LINUX;
262 return ret; 263 return ret;
263} 264}
264 265
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 99960940d4a4..ae167df73ddd 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -142,7 +142,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
142 childregs->regs[7] = 0; /* Clear error flag */ 142 childregs->regs[7] = 0; /* Clear error flag */
143 143
144 childregs->regs[2] = 0; /* Child gets zero as return value */ 144 childregs->regs[2] = 0; /* Child gets zero as return value */
145 regs->regs[2] = p->pid;
146 145
147 if (childregs->cp0_status & ST0_CU0) { 146 if (childregs->cp0_status & ST0_CU0) {
148 childregs->regs[28] = (unsigned long) ti; 147 childregs->regs[28] = (unsigned long) ti;
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c
index e000b278f024..9dbe58368953 100644
--- a/arch/mips/kernel/prom.c
+++ b/arch/mips/kernel/prom.c
@@ -100,7 +100,7 @@ void __init device_tree_init(void)
100 return; 100 return;
101 101
102 base = virt_to_phys((void *)initial_boot_params); 102 base = virt_to_phys((void *)initial_boot_params);
103 size = initial_boot_params->totalsize; 103 size = be32_to_cpu(initial_boot_params->totalsize);
104 104
105 /* Before we do anything, lets reserve the dt blob */ 105 /* Before we do anything, lets reserve the dt blob */
106 reserve_mem_mach(base, size); 106 reserve_mem_mach(base, size);
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 43e7cdc5ded2..c0e81418ba21 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -153,7 +153,7 @@ static void __cpuinit vsmp_init_secondary(void)
153{ 153{
154 extern int gic_present; 154 extern int gic_present;
155 155
156 /* This is Malta specific: IPI,performance and timer inetrrupts */ 156 /* This is Malta specific: IPI,performance and timer interrupts */
157 if (gic_present) 157 if (gic_present)
158 change_c0_status(ST0_IM, STATUSF_IP3 | STATUSF_IP4 | 158 change_c0_status(ST0_IM, STATUSF_IP3 | STATUSF_IP4 |
159 STATUSF_IP6 | STATUSF_IP7); 159 STATUSF_IP6 | STATUSF_IP7);
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 8e9fbe75894e..e97104302541 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -83,7 +83,8 @@ extern asmlinkage void handle_mcheck(void);
83extern asmlinkage void handle_reserved(void); 83extern asmlinkage void handle_reserved(void);
84 84
85extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, 85extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
86 struct mips_fpu_struct *ctx, int has_fpu); 86 struct mips_fpu_struct *ctx, int has_fpu,
87 void *__user *fault_addr);
87 88
88void (*board_be_init)(void); 89void (*board_be_init)(void);
89int (*board_be_handler)(struct pt_regs *regs, int is_fixup); 90int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
@@ -661,12 +662,36 @@ asmlinkage void do_ov(struct pt_regs *regs)
661 force_sig_info(SIGFPE, &info, current); 662 force_sig_info(SIGFPE, &info, current);
662} 663}
663 664
665static int process_fpemu_return(int sig, void __user *fault_addr)
666{
667 if (sig == SIGSEGV || sig == SIGBUS) {
668 struct siginfo si = {0};
669 si.si_addr = fault_addr;
670 si.si_signo = sig;
671 if (sig == SIGSEGV) {
672 if (find_vma(current->mm, (unsigned long)fault_addr))
673 si.si_code = SEGV_ACCERR;
674 else
675 si.si_code = SEGV_MAPERR;
676 } else {
677 si.si_code = BUS_ADRERR;
678 }
679 force_sig_info(sig, &si, current);
680 return 1;
681 } else if (sig) {
682 force_sig(sig, current);
683 return 1;
684 } else {
685 return 0;
686 }
687}
688
664/* 689/*
665 * XXX Delayed fp exceptions when doing a lazy ctx switch XXX 690 * XXX Delayed fp exceptions when doing a lazy ctx switch XXX
666 */ 691 */
667asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) 692asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
668{ 693{
669 siginfo_t info; 694 siginfo_t info = {0};
670 695
671 if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs), SIGFPE) 696 if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs), SIGFPE)
672 == NOTIFY_STOP) 697 == NOTIFY_STOP)
@@ -675,6 +700,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
675 700
676 if (fcr31 & FPU_CSR_UNI_X) { 701 if (fcr31 & FPU_CSR_UNI_X) {
677 int sig; 702 int sig;
703 void __user *fault_addr = NULL;
678 704
679 /* 705 /*
680 * Unimplemented operation exception. If we've got the full 706 * Unimplemented operation exception. If we've got the full
@@ -690,7 +716,8 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
690 lose_fpu(1); 716 lose_fpu(1);
691 717
692 /* Run the emulator */ 718 /* Run the emulator */
693 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1); 719 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1,
720 &fault_addr);
694 721
695 /* 722 /*
696 * We can't allow the emulated instruction to leave any of 723 * We can't allow the emulated instruction to leave any of
@@ -702,8 +729,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
702 own_fpu(1); /* Using the FPU again. */ 729 own_fpu(1); /* Using the FPU again. */
703 730
704 /* If something went wrong, signal */ 731 /* If something went wrong, signal */
705 if (sig) 732 process_fpemu_return(sig, fault_addr);
706 force_sig(sig, current);
707 733
708 return; 734 return;
709 } else if (fcr31 & FPU_CSR_INV_X) 735 } else if (fcr31 & FPU_CSR_INV_X)
@@ -996,11 +1022,11 @@ asmlinkage void do_cpu(struct pt_regs *regs)
996 1022
997 if (!raw_cpu_has_fpu) { 1023 if (!raw_cpu_has_fpu) {
998 int sig; 1024 int sig;
1025 void __user *fault_addr = NULL;
999 sig = fpu_emulator_cop1Handler(regs, 1026 sig = fpu_emulator_cop1Handler(regs,
1000 &current->thread.fpu, 0); 1027 &current->thread.fpu,
1001 if (sig) 1028 0, &fault_addr);
1002 force_sig(sig, current); 1029 if (!process_fpemu_return(sig, fault_addr))
1003 else
1004 mt_ase_fp_affinity(); 1030 mt_ase_fp_affinity();
1005 } 1031 }
1006 1032
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 3eb3cde2f661..6a1fdfef8fde 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -1092,6 +1092,10 @@ static int vpe_open(struct inode *inode, struct file *filp)
1092 1092
1093 /* this of-course trashes what was there before... */ 1093 /* this of-course trashes what was there before... */
1094 v->pbuffer = vmalloc(P_SIZE); 1094 v->pbuffer = vmalloc(P_SIZE);
1095 if (!v->pbuffer) {
1096 pr_warning("VPE loader: unable to allocate memory\n");
1097 return -ENOMEM;
1098 }
1095 v->plen = P_SIZE; 1099 v->plen = P_SIZE;
1096 v->load_addr = NULL; 1100 v->load_addr = NULL;
1097 v->len = 0; 1101 v->len = 0;
@@ -1149,10 +1153,9 @@ static int vpe_release(struct inode *inode, struct file *filp)
1149 if (ret < 0) 1153 if (ret < 0)
1150 v->shared_ptr = NULL; 1154 v->shared_ptr = NULL;
1151 1155
1152 // cleanup any temp buffers 1156 vfree(v->pbuffer);
1153 if (v->pbuffer)
1154 vfree(v->pbuffer);
1155 v->plen = 0; 1157 v->plen = 0;
1158
1156 return ret; 1159 return ret;
1157} 1160}
1158 1161
@@ -1169,11 +1172,6 @@ static ssize_t vpe_write(struct file *file, const char __user * buffer,
1169 if (v == NULL) 1172 if (v == NULL)
1170 return -ENODEV; 1173 return -ENODEV;
1171 1174
1172 if (v->pbuffer == NULL) {
1173 printk(KERN_ERR "VPE loader: no buffer for program\n");
1174 return -ENOMEM;
1175 }
1176
1177 if ((count + v->len) > v->plen) { 1175 if ((count + v->len) > v->plen) {
1178 printk(KERN_WARNING 1176 printk(KERN_WARNING
1179 "VPE loader: elf size too big. Perhaps strip uneeded symbols\n"); 1177 "VPE loader: elf size too big. Perhaps strip uneeded symbols\n");
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 77dc3b20110a..606c8a9efe3b 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -161,16 +161,16 @@ FEXPORT(__bzero)
161 161
162.Lfwd_fixup: 162.Lfwd_fixup:
163 PTR_L t0, TI_TASK($28) 163 PTR_L t0, TI_TASK($28)
164 LONG_L t0, THREAD_BUADDR(t0)
165 andi a2, 0x3f 164 andi a2, 0x3f
165 LONG_L t0, THREAD_BUADDR(t0)
166 LONG_ADDU a2, t1 166 LONG_ADDU a2, t1
167 jr ra 167 jr ra
168 LONG_SUBU a2, t0 168 LONG_SUBU a2, t0
169 169
170.Lpartial_fixup: 170.Lpartial_fixup:
171 PTR_L t0, TI_TASK($28) 171 PTR_L t0, TI_TASK($28)
172 LONG_L t0, THREAD_BUADDR(t0)
173 andi a2, LONGMASK 172 andi a2, LONGMASK
173 LONG_L t0, THREAD_BUADDR(t0)
174 LONG_ADDU a2, t1 174 LONG_ADDU a2, t1
175 jr ra 175 jr ra
176 LONG_SUBU a2, t0 176 LONG_SUBU a2, t0
diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c
index ae4cff97a56c..11b193f848f8 100644
--- a/arch/mips/loongson/common/env.c
+++ b/arch/mips/loongson/common/env.c
@@ -29,9 +29,9 @@ unsigned long memsize, highmemsize;
29 29
30#define parse_even_earlier(res, option, p) \ 30#define parse_even_earlier(res, option, p) \
31do { \ 31do { \
32 int ret; \
32 if (strncmp(option, (char *)p, strlen(option)) == 0) \ 33 if (strncmp(option, (char *)p, strlen(option)) == 0) \
33 strict_strtol((char *)p + strlen(option"="), \ 34 ret = strict_strtol((char *)p + strlen(option"="), 10, &res); \
34 10, &res); \
35} while (0) 35} while (0)
36 36
37void __init prom_init_env(void) 37void __init prom_init_env(void)
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index b2ad1b0910ff..d32cb0503110 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -64,7 +64,7 @@ static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
64 64
65#if __mips >= 4 && __mips != 32 65#if __mips >= 4 && __mips != 32
66static int fpux_emu(struct pt_regs *, 66static int fpux_emu(struct pt_regs *,
67 struct mips_fpu_struct *, mips_instruction); 67 struct mips_fpu_struct *, mips_instruction, void *__user *);
68#endif 68#endif
69 69
70/* Further private data for which no space exists in mips_fpu_struct */ 70/* Further private data for which no space exists in mips_fpu_struct */
@@ -208,16 +208,23 @@ static inline int cop1_64bit(struct pt_regs *xcp)
208 * Two instructions if the instruction is in a branch delay slot. 208 * Two instructions if the instruction is in a branch delay slot.
209 */ 209 */
210 210
211static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) 211static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
212 void *__user *fault_addr)
212{ 213{
213 mips_instruction ir; 214 mips_instruction ir;
214 unsigned long emulpc, contpc; 215 unsigned long emulpc, contpc;
215 unsigned int cond; 216 unsigned int cond;
216 217
217 if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) { 218 if (!access_ok(VERIFY_READ, xcp->cp0_epc, sizeof(mips_instruction))) {
218 MIPS_FPU_EMU_INC_STATS(errors); 219 MIPS_FPU_EMU_INC_STATS(errors);
220 *fault_addr = (mips_instruction __user *)xcp->cp0_epc;
219 return SIGBUS; 221 return SIGBUS;
220 } 222 }
223 if (__get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) {
224 MIPS_FPU_EMU_INC_STATS(errors);
225 *fault_addr = (mips_instruction __user *)xcp->cp0_epc;
226 return SIGSEGV;
227 }
221 228
222 /* XXX NEC Vr54xx bug workaround */ 229 /* XXX NEC Vr54xx bug workaround */
223 if ((xcp->cp0_cause & CAUSEF_BD) && !isBranchInstr(&ir)) 230 if ((xcp->cp0_cause & CAUSEF_BD) && !isBranchInstr(&ir))
@@ -245,10 +252,16 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
245#endif 252#endif
246 return SIGILL; 253 return SIGILL;
247 } 254 }
248 if (get_user(ir, (mips_instruction __user *) emulpc)) { 255 if (!access_ok(VERIFY_READ, emulpc, sizeof(mips_instruction))) {
249 MIPS_FPU_EMU_INC_STATS(errors); 256 MIPS_FPU_EMU_INC_STATS(errors);
257 *fault_addr = (mips_instruction __user *)emulpc;
250 return SIGBUS; 258 return SIGBUS;
251 } 259 }
260 if (__get_user(ir, (mips_instruction __user *) emulpc)) {
261 MIPS_FPU_EMU_INC_STATS(errors);
262 *fault_addr = (mips_instruction __user *)emulpc;
263 return SIGSEGV;
264 }
252 /* __compute_return_epc() will have updated cp0_epc */ 265 /* __compute_return_epc() will have updated cp0_epc */
253 contpc = xcp->cp0_epc; 266 contpc = xcp->cp0_epc;
254 /* In order not to confuse ptrace() et al, tweak context */ 267 /* In order not to confuse ptrace() et al, tweak context */
@@ -269,10 +282,17 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
269 u64 val; 282 u64 val;
270 283
271 MIPS_FPU_EMU_INC_STATS(loads); 284 MIPS_FPU_EMU_INC_STATS(loads);
272 if (get_user(val, va)) { 285
286 if (!access_ok(VERIFY_READ, va, sizeof(u64))) {
273 MIPS_FPU_EMU_INC_STATS(errors); 287 MIPS_FPU_EMU_INC_STATS(errors);
288 *fault_addr = va;
274 return SIGBUS; 289 return SIGBUS;
275 } 290 }
291 if (__get_user(val, va)) {
292 MIPS_FPU_EMU_INC_STATS(errors);
293 *fault_addr = va;
294 return SIGSEGV;
295 }
276 DITOREG(val, MIPSInst_RT(ir)); 296 DITOREG(val, MIPSInst_RT(ir));
277 break; 297 break;
278 } 298 }
@@ -284,10 +304,16 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
284 304
285 MIPS_FPU_EMU_INC_STATS(stores); 305 MIPS_FPU_EMU_INC_STATS(stores);
286 DIFROMREG(val, MIPSInst_RT(ir)); 306 DIFROMREG(val, MIPSInst_RT(ir));
287 if (put_user(val, va)) { 307 if (!access_ok(VERIFY_WRITE, va, sizeof(u64))) {
288 MIPS_FPU_EMU_INC_STATS(errors); 308 MIPS_FPU_EMU_INC_STATS(errors);
309 *fault_addr = va;
289 return SIGBUS; 310 return SIGBUS;
290 } 311 }
312 if (__put_user(val, va)) {
313 MIPS_FPU_EMU_INC_STATS(errors);
314 *fault_addr = va;
315 return SIGSEGV;
316 }
291 break; 317 break;
292 } 318 }
293 319
@@ -297,10 +323,16 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
297 u32 val; 323 u32 val;
298 324
299 MIPS_FPU_EMU_INC_STATS(loads); 325 MIPS_FPU_EMU_INC_STATS(loads);
300 if (get_user(val, va)) { 326 if (!access_ok(VERIFY_READ, va, sizeof(u32))) {
301 MIPS_FPU_EMU_INC_STATS(errors); 327 MIPS_FPU_EMU_INC_STATS(errors);
328 *fault_addr = va;
302 return SIGBUS; 329 return SIGBUS;
303 } 330 }
331 if (__get_user(val, va)) {
332 MIPS_FPU_EMU_INC_STATS(errors);
333 *fault_addr = va;
334 return SIGSEGV;
335 }
304 SITOREG(val, MIPSInst_RT(ir)); 336 SITOREG(val, MIPSInst_RT(ir));
305 break; 337 break;
306 } 338 }
@@ -312,10 +344,16 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
312 344
313 MIPS_FPU_EMU_INC_STATS(stores); 345 MIPS_FPU_EMU_INC_STATS(stores);
314 SIFROMREG(val, MIPSInst_RT(ir)); 346 SIFROMREG(val, MIPSInst_RT(ir));
315 if (put_user(val, va)) { 347 if (!access_ok(VERIFY_WRITE, va, sizeof(u32))) {
316 MIPS_FPU_EMU_INC_STATS(errors); 348 MIPS_FPU_EMU_INC_STATS(errors);
349 *fault_addr = va;
317 return SIGBUS; 350 return SIGBUS;
318 } 351 }
352 if (__put_user(val, va)) {
353 MIPS_FPU_EMU_INC_STATS(errors);
354 *fault_addr = va;
355 return SIGSEGV;
356 }
319 break; 357 break;
320 } 358 }
321 359
@@ -440,11 +478,18 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
440 contpc = (xcp->cp0_epc + 478 contpc = (xcp->cp0_epc +
441 (MIPSInst_SIMM(ir) << 2)); 479 (MIPSInst_SIMM(ir) << 2));
442 480
443 if (get_user(ir, 481 if (!access_ok(VERIFY_READ, xcp->cp0_epc,
444 (mips_instruction __user *) xcp->cp0_epc)) { 482 sizeof(mips_instruction))) {
445 MIPS_FPU_EMU_INC_STATS(errors); 483 MIPS_FPU_EMU_INC_STATS(errors);
484 *fault_addr = (mips_instruction __user *)xcp->cp0_epc;
446 return SIGBUS; 485 return SIGBUS;
447 } 486 }
487 if (__get_user(ir,
488 (mips_instruction __user *) xcp->cp0_epc)) {
489 MIPS_FPU_EMU_INC_STATS(errors);
490 *fault_addr = (mips_instruction __user *)xcp->cp0_epc;
491 return SIGSEGV;
492 }
448 493
449 switch (MIPSInst_OPCODE(ir)) { 494 switch (MIPSInst_OPCODE(ir)) {
450 case lwc1_op: 495 case lwc1_op:
@@ -506,9 +551,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
506 551
507#if __mips >= 4 && __mips != 32 552#if __mips >= 4 && __mips != 32
508 case cop1x_op:{ 553 case cop1x_op:{
509 int sig; 554 int sig = fpux_emu(xcp, ctx, ir, fault_addr);
510 555 if (sig)
511 if ((sig = fpux_emu(xcp, ctx, ir)))
512 return sig; 556 return sig;
513 break; 557 break;
514 } 558 }
@@ -604,7 +648,7 @@ DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
604DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg); 648DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
605 649
606static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 650static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
607 mips_instruction ir) 651 mips_instruction ir, void *__user *fault_addr)
608{ 652{
609 unsigned rcsr = 0; /* resulting csr */ 653 unsigned rcsr = 0; /* resulting csr */
610 654
@@ -624,10 +668,16 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
624 xcp->regs[MIPSInst_FT(ir)]); 668 xcp->regs[MIPSInst_FT(ir)]);
625 669
626 MIPS_FPU_EMU_INC_STATS(loads); 670 MIPS_FPU_EMU_INC_STATS(loads);
627 if (get_user(val, va)) { 671 if (!access_ok(VERIFY_READ, va, sizeof(u32))) {
628 MIPS_FPU_EMU_INC_STATS(errors); 672 MIPS_FPU_EMU_INC_STATS(errors);
673 *fault_addr = va;
629 return SIGBUS; 674 return SIGBUS;
630 } 675 }
676 if (__get_user(val, va)) {
677 MIPS_FPU_EMU_INC_STATS(errors);
678 *fault_addr = va;
679 return SIGSEGV;
680 }
631 SITOREG(val, MIPSInst_FD(ir)); 681 SITOREG(val, MIPSInst_FD(ir));
632 break; 682 break;
633 683
@@ -638,10 +688,16 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
638 MIPS_FPU_EMU_INC_STATS(stores); 688 MIPS_FPU_EMU_INC_STATS(stores);
639 689
640 SIFROMREG(val, MIPSInst_FS(ir)); 690 SIFROMREG(val, MIPSInst_FS(ir));
641 if (put_user(val, va)) { 691 if (!access_ok(VERIFY_WRITE, va, sizeof(u32))) {
642 MIPS_FPU_EMU_INC_STATS(errors); 692 MIPS_FPU_EMU_INC_STATS(errors);
693 *fault_addr = va;
643 return SIGBUS; 694 return SIGBUS;
644 } 695 }
696 if (put_user(val, va)) {
697 MIPS_FPU_EMU_INC_STATS(errors);
698 *fault_addr = va;
699 return SIGSEGV;
700 }
645 break; 701 break;
646 702
647 case madd_s_op: 703 case madd_s_op:
@@ -701,10 +757,16 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
701 xcp->regs[MIPSInst_FT(ir)]); 757 xcp->regs[MIPSInst_FT(ir)]);
702 758
703 MIPS_FPU_EMU_INC_STATS(loads); 759 MIPS_FPU_EMU_INC_STATS(loads);
704 if (get_user(val, va)) { 760 if (!access_ok(VERIFY_READ, va, sizeof(u64))) {
705 MIPS_FPU_EMU_INC_STATS(errors); 761 MIPS_FPU_EMU_INC_STATS(errors);
762 *fault_addr = va;
706 return SIGBUS; 763 return SIGBUS;
707 } 764 }
765 if (__get_user(val, va)) {
766 MIPS_FPU_EMU_INC_STATS(errors);
767 *fault_addr = va;
768 return SIGSEGV;
769 }
708 DITOREG(val, MIPSInst_FD(ir)); 770 DITOREG(val, MIPSInst_FD(ir));
709 break; 771 break;
710 772
@@ -714,10 +776,16 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
714 776
715 MIPS_FPU_EMU_INC_STATS(stores); 777 MIPS_FPU_EMU_INC_STATS(stores);
716 DIFROMREG(val, MIPSInst_FS(ir)); 778 DIFROMREG(val, MIPSInst_FS(ir));
717 if (put_user(val, va)) { 779 if (!access_ok(VERIFY_WRITE, va, sizeof(u64))) {
718 MIPS_FPU_EMU_INC_STATS(errors); 780 MIPS_FPU_EMU_INC_STATS(errors);
781 *fault_addr = va;
719 return SIGBUS; 782 return SIGBUS;
720 } 783 }
784 if (__put_user(val, va)) {
785 MIPS_FPU_EMU_INC_STATS(errors);
786 *fault_addr = va;
787 return SIGSEGV;
788 }
721 break; 789 break;
722 790
723 case madd_d_op: 791 case madd_d_op:
@@ -1242,7 +1310,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1242} 1310}
1243 1311
1244int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 1312int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1245 int has_fpu) 1313 int has_fpu, void *__user *fault_addr)
1246{ 1314{
1247 unsigned long oldepc, prevepc; 1315 unsigned long oldepc, prevepc;
1248 mips_instruction insn; 1316 mips_instruction insn;
@@ -1252,10 +1320,16 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1252 do { 1320 do {
1253 prevepc = xcp->cp0_epc; 1321 prevepc = xcp->cp0_epc;
1254 1322
1255 if (get_user(insn, (mips_instruction __user *) xcp->cp0_epc)) { 1323 if (!access_ok(VERIFY_READ, xcp->cp0_epc, sizeof(mips_instruction))) {
1256 MIPS_FPU_EMU_INC_STATS(errors); 1324 MIPS_FPU_EMU_INC_STATS(errors);
1325 *fault_addr = (mips_instruction __user *)xcp->cp0_epc;
1257 return SIGBUS; 1326 return SIGBUS;
1258 } 1327 }
1328 if (__get_user(insn, (mips_instruction __user *) xcp->cp0_epc)) {
1329 MIPS_FPU_EMU_INC_STATS(errors);
1330 *fault_addr = (mips_instruction __user *)xcp->cp0_epc;
1331 return SIGSEGV;
1332 }
1259 if (insn == 0) 1333 if (insn == 0)
1260 xcp->cp0_epc += 4; /* skip nops */ 1334 xcp->cp0_epc += 4; /* skip nops */
1261 else { 1335 else {
@@ -1267,7 +1341,7 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1267 */ 1341 */
1268 /* convert to ieee library modes */ 1342 /* convert to ieee library modes */
1269 ieee754_csr.rm = ieee_rm[ieee754_csr.rm]; 1343 ieee754_csr.rm = ieee_rm[ieee754_csr.rm];
1270 sig = cop1Emulate(xcp, ctx); 1344 sig = cop1Emulate(xcp, ctx, fault_addr);
1271 /* revert to mips rounding mode */ 1345 /* revert to mips rounding mode */
1272 ieee754_csr.rm = mips_rm[ieee754_csr.rm]; 1346 ieee754_csr.rm = mips_rm[ieee754_csr.rm];
1273 } 1347 }
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 4fc1a0fbe007..21ea14efb837 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -288,7 +288,7 @@ int mips_dma_supported(struct device *dev, u64 mask)
288 return plat_dma_supported(dev, mask); 288 return plat_dma_supported(dev, mask);
289} 289}
290 290
291void mips_dma_cache_sync(struct device *dev, void *vaddr, size_t size, 291void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
292 enum dma_data_direction direction) 292 enum dma_data_direction direction)
293{ 293{
294 BUG_ON(direction == DMA_NONE); 294 BUG_ON(direction == DMA_NONE);
@@ -298,6 +298,8 @@ void mips_dma_cache_sync(struct device *dev, void *vaddr, size_t size,
298 __dma_sync((unsigned long)vaddr, size, direction); 298 __dma_sync((unsigned long)vaddr, size, direction);
299} 299}
300 300
301EXPORT_SYMBOL(dma_cache_sync);
302
301static struct dma_map_ops mips_default_dma_map_ops = { 303static struct dma_map_ops mips_default_dma_map_ops = {
302 .alloc_coherent = mips_dma_alloc_coherent, 304 .alloc_coherent = mips_dma_alloc_coherent,
303 .free_coherent = mips_dma_free_coherent, 305 .free_coherent = mips_dma_free_coherent,
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 505fecad4684..9cca8de00545 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -68,6 +68,9 @@ static struct bcache_ops mips_sc_ops = {
68 */ 68 */
69static inline int mips_sc_is_activated(struct cpuinfo_mips *c) 69static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
70{ 70{
71 unsigned int config2 = read_c0_config2();
72 unsigned int tmp;
73
71 /* Check the bypass bit (L2B) */ 74 /* Check the bypass bit (L2B) */
72 switch (c->cputype) { 75 switch (c->cputype) {
73 case CPU_34K: 76 case CPU_34K:
@@ -83,6 +86,7 @@ static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
83 c->scache.linesz = 2 << tmp; 86 c->scache.linesz = 2 << tmp;
84 else 87 else
85 return 0; 88 return 0;
89 return 1;
86} 90}
87 91
88static inline int __init mips_sc_probe(void) 92static inline int __init mips_sc_probe(void)
diff --git a/arch/mips/pmc-sierra/yosemite/py-console.c b/arch/mips/pmc-sierra/yosemite/py-console.c
index b7f1d9c4a8a3..434d7b1a8c6a 100644
--- a/arch/mips/pmc-sierra/yosemite/py-console.c
+++ b/arch/mips/pmc-sierra/yosemite/py-console.c
@@ -65,11 +65,15 @@ static unsigned char readb_outer_space(unsigned long long phys)
65 65
66 __asm__ __volatile__ ( 66 __asm__ __volatile__ (
67 " .set mips3 \n" 67 " .set mips3 \n"
68 " .set push \n"
69 " .set noreorder \n"
70 " .set nomacro \n"
68 " ld %0, %1 \n" 71 " ld %0, %1 \n"
72 " .set pop \n"
69 " lbu %0, (%0) \n" 73 " lbu %0, (%0) \n"
70 " .set mips0 \n" 74 " .set mips0 \n"
71 : "=r" (res) 75 : "=r" (res)
72 : "m" (vaddr)); 76 : "R" (vaddr));
73 77
74 write_c0_status(sr); 78 write_c0_status(sr);
75 ssnop_4(); 79 ssnop_4();
@@ -89,11 +93,15 @@ static void writeb_outer_space(unsigned long long phys, unsigned char c)
89 93
90 __asm__ __volatile__ ( 94 __asm__ __volatile__ (
91 " .set mips3 \n" 95 " .set mips3 \n"
96 " .set push \n"
97 " .set noreorder \n"
98 " .set nomacro \n"
92 " ld %0, %1 \n" 99 " ld %0, %1 \n"
100 " .set pop \n"
93 " sb %2, (%0) \n" 101 " sb %2, (%0) \n"
94 " .set mips0 \n" 102 " .set mips0 \n"
95 : "=&r" (tmp) 103 : "=&r" (tmp)
96 : "m" (vaddr), "r" (c)); 104 : "R" (vaddr), "r" (c));
97 105
98 write_c0_status(sr); 106 write_c0_status(sr);
99 ssnop_4(); 107 ssnop_4();
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index c308989fc464..41707a245dea 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -82,7 +82,7 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup)
82enum swarm_rtc_type { 82enum swarm_rtc_type {
83 RTC_NONE, 83 RTC_NONE,
84 RTC_XICOR, 84 RTC_XICOR,
85 RTC_M4LT81 85 RTC_M41T81,
86}; 86};
87 87
88enum swarm_rtc_type swarm_rtc_type; 88enum swarm_rtc_type swarm_rtc_type;
@@ -96,7 +96,7 @@ void read_persistent_clock(struct timespec *ts)
96 sec = xicor_get_time(); 96 sec = xicor_get_time();
97 break; 97 break;
98 98
99 case RTC_M4LT81: 99 case RTC_M41T81:
100 sec = m41t81_get_time(); 100 sec = m41t81_get_time();
101 break; 101 break;
102 102
@@ -115,7 +115,7 @@ int rtc_mips_set_time(unsigned long sec)
115 case RTC_XICOR: 115 case RTC_XICOR:
116 return xicor_set_time(sec); 116 return xicor_set_time(sec);
117 117
118 case RTC_M4LT81: 118 case RTC_M41T81:
119 return m41t81_set_time(sec); 119 return m41t81_set_time(sec);
120 120
121 case RTC_NONE: 121 case RTC_NONE:
@@ -141,7 +141,7 @@ void __init plat_mem_setup(void)
141 if (xicor_probe()) 141 if (xicor_probe())
142 swarm_rtc_type = RTC_XICOR; 142 swarm_rtc_type = RTC_XICOR;
143 if (m41t81_probe()) 143 if (m41t81_probe())
144 swarm_rtc_type = RTC_M4LT81; 144 swarm_rtc_type = RTC_M41T81;
145 145
146#ifdef CONFIG_VT 146#ifdef CONFIG_VT
147 screen_info = (struct screen_info) { 147 screen_info = (struct screen_info) {
diff --git a/arch/mn10300/kernel/time.c b/arch/mn10300/kernel/time.c
index f860a340acc9..75da468090b9 100644
--- a/arch/mn10300/kernel/time.c
+++ b/arch/mn10300/kernel/time.c
@@ -40,21 +40,17 @@ unsigned long long sched_clock(void)
40 unsigned long long ll; 40 unsigned long long ll;
41 unsigned l[2]; 41 unsigned l[2];
42 } tsc64, result; 42 } tsc64, result;
43 unsigned long tsc, tmp; 43 unsigned long tmp;
44 unsigned product[3]; /* 96-bit intermediate value */ 44 unsigned product[3]; /* 96-bit intermediate value */
45 45
46 /* cnt32_to_63() is not safe with preemption */ 46 /* cnt32_to_63() is not safe with preemption */
47 preempt_disable(); 47 preempt_disable();
48 48
49 /* read the TSC value 49 /* expand the tsc to 64-bits.
50 */
51 tsc = get_cycles();
52
53 /* expand to 64-bits.
54 * - sched_clock() must be called once a minute or better or the 50 * - sched_clock() must be called once a minute or better or the
55 * following will go horribly wrong - see cnt32_to_63() 51 * following will go horribly wrong - see cnt32_to_63()
56 */ 52 */
57 tsc64.ll = cnt32_to_63(tsc) & 0x7fffffffffffffffULL; 53 tsc64.ll = cnt32_to_63(get_cycles()) & 0x7fffffffffffffffULL;
58 54
59 preempt_enable(); 55 preempt_enable();
60 56
diff --git a/arch/tile/include/asm/signal.h b/arch/tile/include/asm/signal.h
index c1ee1d61d44c..81d92a45cd4b 100644
--- a/arch/tile/include/asm/signal.h
+++ b/arch/tile/include/asm/signal.h
@@ -25,7 +25,7 @@
25 25
26#if defined(__KERNEL__) && !defined(__ASSEMBLY__) 26#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
27struct pt_regs; 27struct pt_regs;
28int restore_sigcontext(struct pt_regs *, struct sigcontext __user *, long *); 28int restore_sigcontext(struct pt_regs *, struct sigcontext __user *);
29int setup_sigcontext(struct sigcontext __user *, struct pt_regs *); 29int setup_sigcontext(struct sigcontext __user *, struct pt_regs *);
30void do_signal(struct pt_regs *regs); 30void do_signal(struct pt_regs *regs);
31#endif 31#endif
diff --git a/arch/tile/kernel/compat_signal.c b/arch/tile/kernel/compat_signal.c
index 543d6a33aa26..dbb0dfc7bece 100644
--- a/arch/tile/kernel/compat_signal.c
+++ b/arch/tile/kernel/compat_signal.c
@@ -290,12 +290,12 @@ long compat_sys_sigaltstack(const struct compat_sigaltstack __user *uss_ptr,
290 return ret; 290 return ret;
291} 291}
292 292
293/* The assembly shim for this function arranges to ignore the return value. */
293long compat_sys_rt_sigreturn(struct pt_regs *regs) 294long compat_sys_rt_sigreturn(struct pt_regs *regs)
294{ 295{
295 struct compat_rt_sigframe __user *frame = 296 struct compat_rt_sigframe __user *frame =
296 (struct compat_rt_sigframe __user *) compat_ptr(regs->sp); 297 (struct compat_rt_sigframe __user *) compat_ptr(regs->sp);
297 sigset_t set; 298 sigset_t set;
298 long r0;
299 299
300 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 300 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
301 goto badframe; 301 goto badframe;
@@ -308,13 +308,13 @@ long compat_sys_rt_sigreturn(struct pt_regs *regs)
308 recalc_sigpending(); 308 recalc_sigpending();
309 spin_unlock_irq(&current->sighand->siglock); 309 spin_unlock_irq(&current->sighand->siglock);
310 310
311 if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &r0)) 311 if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
312 goto badframe; 312 goto badframe;
313 313
314 if (compat_sys_sigaltstack(&frame->uc.uc_stack, NULL, regs) != 0) 314 if (compat_sys_sigaltstack(&frame->uc.uc_stack, NULL, regs) != 0)
315 goto badframe; 315 goto badframe;
316 316
317 return r0; 317 return 0;
318 318
319badframe: 319badframe:
320 force_sig(SIGSEGV, current); 320 force_sig(SIGSEGV, current);
diff --git a/arch/tile/kernel/intvec_32.S b/arch/tile/kernel/intvec_32.S
index f5821626247f..5eed4a02bf62 100644
--- a/arch/tile/kernel/intvec_32.S
+++ b/arch/tile/kernel/intvec_32.S
@@ -1342,8 +1342,8 @@ handle_syscall:
1342 lw r20, r20 1342 lw r20, r20
1343 1343
1344 /* Jump to syscall handler. */ 1344 /* Jump to syscall handler. */
1345 jalr r20; .Lhandle_syscall_link: 1345 jalr r20
1346 FEEDBACK_REENTER(handle_syscall) 1346.Lhandle_syscall_link: /* value of "lr" after "jalr r20" above */
1347 1347
1348 /* 1348 /*
1349 * Write our r0 onto the stack so it gets restored instead 1349 * Write our r0 onto the stack so it gets restored instead
@@ -1352,6 +1352,9 @@ handle_syscall:
1352 PTREGS_PTR(r29, PTREGS_OFFSET_REG(0)) 1352 PTREGS_PTR(r29, PTREGS_OFFSET_REG(0))
1353 sw r29, r0 1353 sw r29, r0
1354 1354
1355.Lsyscall_sigreturn_skip:
1356 FEEDBACK_REENTER(handle_syscall)
1357
1355 /* Do syscall trace again, if requested. */ 1358 /* Do syscall trace again, if requested. */
1356 lw r30, r31 1359 lw r30, r31
1357 andi r30, r30, _TIF_SYSCALL_TRACE 1360 andi r30, r30, _TIF_SYSCALL_TRACE
@@ -1536,9 +1539,24 @@ STD_ENTRY_LOCAL(bad_intr)
1536 }; \ 1539 }; \
1537 STD_ENDPROC(_##x) 1540 STD_ENDPROC(_##x)
1538 1541
1542/*
1543 * Special-case sigreturn to not write r0 to the stack on return.
1544 * This is technically more efficient, but it also avoids difficulties
1545 * in the 64-bit OS when handling 32-bit compat code, since we must not
1546 * sign-extend r0 for the sigreturn return-value case.
1547 */
1548#define PTREGS_SYSCALL_SIGRETURN(x, reg) \
1549 STD_ENTRY(_##x); \
1550 addli lr, lr, .Lsyscall_sigreturn_skip - .Lhandle_syscall_link; \
1551 { \
1552 PTREGS_PTR(reg, PTREGS_OFFSET_BASE); \
1553 j x \
1554 }; \
1555 STD_ENDPROC(_##x)
1556
1539PTREGS_SYSCALL(sys_execve, r3) 1557PTREGS_SYSCALL(sys_execve, r3)
1540PTREGS_SYSCALL(sys_sigaltstack, r2) 1558PTREGS_SYSCALL(sys_sigaltstack, r2)
1541PTREGS_SYSCALL(sys_rt_sigreturn, r0) 1559PTREGS_SYSCALL_SIGRETURN(sys_rt_sigreturn, r0)
1542PTREGS_SYSCALL(sys_cmpxchg_badaddr, r1) 1560PTREGS_SYSCALL(sys_cmpxchg_badaddr, r1)
1543 1561
1544/* Save additional callee-saves to pt_regs, put address in r4 and jump. */ 1562/* Save additional callee-saves to pt_regs, put address in r4 and jump. */
diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c
index 8430f45daea6..e90eb53173b0 100644
--- a/arch/tile/kernel/process.c
+++ b/arch/tile/kernel/process.c
@@ -212,6 +212,13 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
212 childregs->sp = sp; /* override with new user stack pointer */ 212 childregs->sp = sp; /* override with new user stack pointer */
213 213
214 /* 214 /*
215 * If CLONE_SETTLS is set, set "tp" in the new task to "r4",
216 * which is passed in as arg #5 to sys_clone().
217 */
218 if (clone_flags & CLONE_SETTLS)
219 childregs->tp = regs->regs[4];
220
221 /*
215 * Copy the callee-saved registers from the passed pt_regs struct 222 * Copy the callee-saved registers from the passed pt_regs struct
216 * into the context-switch callee-saved registers area. 223 * into the context-switch callee-saved registers area.
217 * This way when we start the interrupt-return sequence, the 224 * This way when we start the interrupt-return sequence, the
@@ -539,6 +546,7 @@ struct task_struct *__sched _switch_to(struct task_struct *prev,
539 return __switch_to(prev, next, next_current_ksp0(next)); 546 return __switch_to(prev, next, next_current_ksp0(next));
540} 547}
541 548
549/* Note there is an implicit fifth argument if (clone_flags & CLONE_SETTLS). */
542SYSCALL_DEFINE5(clone, unsigned long, clone_flags, unsigned long, newsp, 550SYSCALL_DEFINE5(clone, unsigned long, clone_flags, unsigned long, newsp,
543 void __user *, parent_tidptr, void __user *, child_tidptr, 551 void __user *, parent_tidptr, void __user *, child_tidptr,
544 struct pt_regs *, regs) 552 struct pt_regs *, regs)
diff --git a/arch/tile/kernel/signal.c b/arch/tile/kernel/signal.c
index 757407e36696..1260321155f1 100644
--- a/arch/tile/kernel/signal.c
+++ b/arch/tile/kernel/signal.c
@@ -52,7 +52,7 @@ SYSCALL_DEFINE3(sigaltstack, const stack_t __user *, uss,
52 */ 52 */
53 53
54int restore_sigcontext(struct pt_regs *regs, 54int restore_sigcontext(struct pt_regs *regs,
55 struct sigcontext __user *sc, long *pr0) 55 struct sigcontext __user *sc)
56{ 56{
57 int err = 0; 57 int err = 0;
58 int i; 58 int i;
@@ -75,17 +75,15 @@ int restore_sigcontext(struct pt_regs *regs,
75 75
76 regs->faultnum = INT_SWINT_1_SIGRETURN; 76 regs->faultnum = INT_SWINT_1_SIGRETURN;
77 77
78 err |= __get_user(*pr0, &sc->gregs[0]);
79 return err; 78 return err;
80} 79}
81 80
82/* sigreturn() returns long since it restores r0 in the interrupted code. */ 81/* The assembly shim for this function arranges to ignore the return value. */
83SYSCALL_DEFINE1(rt_sigreturn, struct pt_regs *, regs) 82SYSCALL_DEFINE1(rt_sigreturn, struct pt_regs *, regs)
84{ 83{
85 struct rt_sigframe __user *frame = 84 struct rt_sigframe __user *frame =
86 (struct rt_sigframe __user *)(regs->sp); 85 (struct rt_sigframe __user *)(regs->sp);
87 sigset_t set; 86 sigset_t set;
88 long r0;
89 87
90 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 88 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
91 goto badframe; 89 goto badframe;
@@ -98,13 +96,13 @@ SYSCALL_DEFINE1(rt_sigreturn, struct pt_regs *, regs)
98 recalc_sigpending(); 96 recalc_sigpending();
99 spin_unlock_irq(&current->sighand->siglock); 97 spin_unlock_irq(&current->sighand->siglock);
100 98
101 if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &r0)) 99 if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
102 goto badframe; 100 goto badframe;
103 101
104 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT) 102 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
105 goto badframe; 103 goto badframe;
106 104
107 return r0; 105 return 0;
108 106
109badframe: 107badframe:
110 force_sig(SIGSEGV, current); 108 force_sig(SIGSEGV, current);
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index 23f315c9f215..325c05294fc4 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -355,7 +355,7 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
355 if (heap > 0x3fffffffffffUL) 355 if (heap > 0x3fffffffffffUL)
356 error("Destination address too large"); 356 error("Destination address too large");
357#else 357#else
358 if (heap > ((-__PAGE_OFFSET-(512<<20)-1) & 0x7fffffff)) 358 if (heap > ((-__PAGE_OFFSET-(128<<20)-1) & 0x7fffffff))
359 error("Destination address too large"); 359 error("Destination address too large");
360#endif 360#endif
361#ifndef CONFIG_RELOCATABLE 361#ifndef CONFIG_RELOCATABLE
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 5be1542fbfaf..e99d55d74df5 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -72,6 +72,9 @@ struct e820map {
72#define BIOS_BEGIN 0x000a0000 72#define BIOS_BEGIN 0x000a0000
73#define BIOS_END 0x00100000 73#define BIOS_END 0x00100000
74 74
75#define BIOS_ROM_BASE 0xffe00000
76#define BIOS_ROM_END 0xffffffff
77
75#ifdef __KERNEL__ 78#ifdef __KERNEL__
76/* see comment in arch/x86/kernel/e820.c */ 79/* see comment in arch/x86/kernel/e820.c */
77extern struct e820map e820; 80extern struct e820map e820;
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 9e6fe391094e..f702f82aa1eb 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -79,7 +79,7 @@
79#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 79#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
80#define KVM_MIN_FREE_MMU_PAGES 5 80#define KVM_MIN_FREE_MMU_PAGES 5
81#define KVM_REFILL_PAGES 25 81#define KVM_REFILL_PAGES 25
82#define KVM_MAX_CPUID_ENTRIES 40 82#define KVM_MAX_CPUID_ENTRIES 80
83#define KVM_NR_FIXED_MTRR_REGION 88 83#define KVM_NR_FIXED_MTRR_REGION 88
84#define KVM_NR_VAR_MTRR 8 84#define KVM_NR_VAR_MTRR 8
85 85
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 9e13763b6092..1e994754d323 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -45,6 +45,7 @@ obj-y += pci-dma.o quirks.o i8237.o topology.o kdebugfs.o
45obj-y += alternative.o i8253.o pci-nommu.o hw_breakpoint.o 45obj-y += alternative.o i8253.o pci-nommu.o hw_breakpoint.o
46obj-y += tsc.o io_delay.o rtc.o 46obj-y += tsc.o io_delay.o rtc.o
47obj-y += pci-iommu_table.o 47obj-y += pci-iommu_table.o
48obj-y += resource.o
48 49
49obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o 50obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
50obj-y += process.o 51obj-y += process.o
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 3f838d537392..78218135b48e 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1389,6 +1389,14 @@ void __cpuinit end_local_APIC_setup(void)
1389 1389
1390 setup_apic_nmi_watchdog(NULL); 1390 setup_apic_nmi_watchdog(NULL);
1391 apic_pm_activate(); 1391 apic_pm_activate();
1392
1393 /*
1394 * Now that local APIC setup is completed for BP, configure the fault
1395 * handling for interrupt remapping.
1396 */
1397 if (!smp_processor_id() && intr_remapping_enabled)
1398 enable_drhd_fault_handling();
1399
1392} 1400}
1393 1401
1394#ifdef CONFIG_X86_X2APIC 1402#ifdef CONFIG_X86_X2APIC
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 7cc0a721f628..fadcd743a74f 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2430,13 +2430,12 @@ static void ack_apic_level(struct irq_data *data)
2430{ 2430{
2431 struct irq_cfg *cfg = data->chip_data; 2431 struct irq_cfg *cfg = data->chip_data;
2432 int i, do_unmask_irq = 0, irq = data->irq; 2432 int i, do_unmask_irq = 0, irq = data->irq;
2433 struct irq_desc *desc = irq_to_desc(irq);
2434 unsigned long v; 2433 unsigned long v;
2435 2434
2436 irq_complete_move(cfg); 2435 irq_complete_move(cfg);
2437#ifdef CONFIG_GENERIC_PENDING_IRQ 2436#ifdef CONFIG_GENERIC_PENDING_IRQ
2438 /* If we are moving the irq we need to mask it */ 2437 /* If we are moving the irq we need to mask it */
2439 if (unlikely(desc->status & IRQ_MOVE_PENDING)) { 2438 if (unlikely(irq_to_desc(irq)->status & IRQ_MOVE_PENDING)) {
2440 do_unmask_irq = 1; 2439 do_unmask_irq = 1;
2441 mask_ioapic(cfg); 2440 mask_ioapic(cfg);
2442 } 2441 }
@@ -3413,6 +3412,7 @@ dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,
3413 msg.data |= MSI_DATA_VECTOR(cfg->vector); 3412 msg.data |= MSI_DATA_VECTOR(cfg->vector);
3414 msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; 3413 msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
3415 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 3414 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
3415 msg.address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(dest);
3416 3416
3417 dmar_msi_write(irq, &msg); 3417 dmar_msi_write(irq, &msg);
3418 3418
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c
index f9e4e6a54073..d8c4a6feb286 100644
--- a/arch/x86/kernel/apic/probe_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -79,13 +79,6 @@ void __init default_setup_apic_routing(void)
79 /* need to update phys_pkg_id */ 79 /* need to update phys_pkg_id */
80 apic->phys_pkg_id = apicid_phys_pkg_id; 80 apic->phys_pkg_id = apicid_phys_pkg_id;
81 } 81 }
82
83 /*
84 * Now that apic routing model is selected, configure the
85 * fault handling for intr remapping.
86 */
87 if (intr_remapping_enabled)
88 enable_drhd_fault_handling();
89} 82}
90 83
91/* Same for both flat and physical. */ 84/* Same for both flat and physical. */
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index bcece91dd311..c0dbd9ac24f0 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -60,16 +60,18 @@
60#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD) 60#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
61#endif 61#endif
62 62
63/* Number of possible pages in the lowmem region */
64LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT)
65
63/* Enough space to fit pagetables for the low memory linear map */ 66/* Enough space to fit pagetables for the low memory linear map */
64MAPPING_BEYOND_END = \ 67MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
65 PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT
66 68
67/* 69/*
68 * Worst-case size of the kernel mapping we need to make: 70 * Worst-case size of the kernel mapping we need to make:
69 * the worst-case size of the kernel itself, plus the extra we need 71 * a relocatable kernel can live anywhere in lowmem, so we need to be able
70 * to map for the linear map. 72 * to map all of lowmem.
71 */ 73 */
72KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT 74KERNEL_PAGES = LOWMEM_PAGES
73 75
74INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm 76INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
75RESERVE_BRK(pagetables, INIT_MAP_SIZE) 77RESERVE_BRK(pagetables, INIT_MAP_SIZE)
@@ -620,13 +622,13 @@ ENTRY(initial_code)
620__PAGE_ALIGNED_BSS 622__PAGE_ALIGNED_BSS
621 .align PAGE_SIZE_asm 623 .align PAGE_SIZE_asm
622#ifdef CONFIG_X86_PAE 624#ifdef CONFIG_X86_PAE
623initial_pg_pmd: 625ENTRY(initial_pg_pmd)
624 .fill 1024*KPMDS,4,0 626 .fill 1024*KPMDS,4,0
625#else 627#else
626ENTRY(initial_page_table) 628ENTRY(initial_page_table)
627 .fill 1024,4,0 629 .fill 1024,4,0
628#endif 630#endif
629initial_pg_fixmap: 631ENTRY(initial_pg_fixmap)
630 .fill 1024,4,0 632 .fill 1024,4,0
631ENTRY(empty_zero_page) 633ENTRY(empty_zero_page)
632 .fill 4096,1,0 634 .fill 4096,1,0
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index ae03cab4352e..4ff5968f12d2 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -27,6 +27,9 @@
27#define HPET_DEV_FSB_CAP 0x1000 27#define HPET_DEV_FSB_CAP 0x1000
28#define HPET_DEV_PERI_CAP 0x2000 28#define HPET_DEV_PERI_CAP 0x2000
29 29
30#define HPET_MIN_CYCLES 128
31#define HPET_MIN_PROG_DELTA (HPET_MIN_CYCLES + (HPET_MIN_CYCLES >> 1))
32
30#define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt) 33#define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
31 34
32/* 35/*
@@ -299,8 +302,9 @@ static void hpet_legacy_clockevent_register(void)
299 /* Calculate the min / max delta */ 302 /* Calculate the min / max delta */
300 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, 303 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
301 &hpet_clockevent); 304 &hpet_clockevent);
302 /* 5 usec minimum reprogramming delta. */ 305 /* Setup minimum reprogramming delta. */
303 hpet_clockevent.min_delta_ns = 5000; 306 hpet_clockevent.min_delta_ns = clockevent_delta2ns(HPET_MIN_PROG_DELTA,
307 &hpet_clockevent);
304 308
305 /* 309 /*
306 * Start hpet with the boot cpu mask and make it 310 * Start hpet with the boot cpu mask and make it
@@ -393,22 +397,24 @@ static int hpet_next_event(unsigned long delta,
393 * the wraparound into account) nor a simple count down event 397 * the wraparound into account) nor a simple count down event
394 * mode. Further the write to the comparator register is 398 * mode. Further the write to the comparator register is
395 * delayed internally up to two HPET clock cycles in certain 399 * delayed internally up to two HPET clock cycles in certain
396 * chipsets (ATI, ICH9,10). We worked around that by reading 400 * chipsets (ATI, ICH9,10). Some newer AMD chipsets have even
397 * back the compare register, but that required another 401 * longer delays. We worked around that by reading back the
398 * workaround for ICH9,10 chips where the first readout after 402 * compare register, but that required another workaround for
399 * write can return the old stale value. We already have a 403 * ICH9,10 chips where the first readout after write can
400 * minimum delta of 5us enforced, but a NMI or SMI hitting 404 * return the old stale value. We already had a minimum
405 * programming delta of 5us enforced, but a NMI or SMI hitting
401 * between the counter readout and the comparator write can 406 * between the counter readout and the comparator write can
402 * move us behind that point easily. Now instead of reading 407 * move us behind that point easily. Now instead of reading
403 * the compare register back several times, we make the ETIME 408 * the compare register back several times, we make the ETIME
404 * decision based on the following: Return ETIME if the 409 * decision based on the following: Return ETIME if the
405 * counter value after the write is less than 8 HPET cycles 410 * counter value after the write is less than HPET_MIN_CYCLES
406 * away from the event or if the counter is already ahead of 411 * away from the event or if the counter is already ahead of
407 * the event. 412 * the event. The minimum programming delta for the generic
413 * clockevents code is set to 1.5 * HPET_MIN_CYCLES.
408 */ 414 */
409 res = (s32)(cnt - hpet_readl(HPET_COUNTER)); 415 res = (s32)(cnt - hpet_readl(HPET_COUNTER));
410 416
411 return res < 8 ? -ETIME : 0; 417 return res < HPET_MIN_CYCLES ? -ETIME : 0;
412} 418}
413 419
414static void hpet_legacy_set_mode(enum clock_event_mode mode, 420static void hpet_legacy_set_mode(enum clock_event_mode mode,
diff --git a/arch/x86/kernel/resource.c b/arch/x86/kernel/resource.c
new file mode 100644
index 000000000000..2a26819bb6a8
--- /dev/null
+++ b/arch/x86/kernel/resource.c
@@ -0,0 +1,48 @@
1#include <linux/ioport.h>
2#include <asm/e820.h>
3
4static void resource_clip(struct resource *res, resource_size_t start,
5 resource_size_t end)
6{
7 resource_size_t low = 0, high = 0;
8
9 if (res->end < start || res->start > end)
10 return; /* no conflict */
11
12 if (res->start < start)
13 low = start - res->start;
14
15 if (res->end > end)
16 high = res->end - end;
17
18 /* Keep the area above or below the conflict, whichever is larger */
19 if (low > high)
20 res->end = start - 1;
21 else
22 res->start = end + 1;
23}
24
25static void remove_e820_regions(struct resource *avail)
26{
27 int i;
28 struct e820entry *entry;
29
30 for (i = 0; i < e820.nr_map; i++) {
31 entry = &e820.map[i];
32
33 resource_clip(avail, entry->addr,
34 entry->addr + entry->size - 1);
35 }
36}
37
38void arch_remove_reservations(struct resource *avail)
39{
40 /* Trim out BIOS areas (low 1MB and high 2MB) and E820 regions */
41 if (avail->flags & IORESOURCE_MEM) {
42 if (avail->start < BIOS_END)
43 avail->start = BIOS_END;
44 resource_clip(avail, BIOS_ROM_BASE, BIOS_ROM_END);
45
46 remove_e820_regions(avail);
47 }
48}
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 21c6746338af..85268f8eadf6 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -769,7 +769,6 @@ void __init setup_arch(char **cmdline_p)
769 769
770 x86_init.oem.arch_setup(); 770 x86_init.oem.arch_setup();
771 771
772 resource_alloc_from_bottom = 0;
773 iomem_resource.end = (1ULL << boot_cpu_data.x86_phys_bits) - 1; 772 iomem_resource.end = (1ULL << boot_cpu_data.x86_phys_bits) - 1;
774 setup_memory_map(); 773 setup_memory_map();
775 parse_setup_data(); 774 parse_setup_data();
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c
index 9c253bd65e24..547128546cc3 100644
--- a/arch/x86/kernel/xsave.c
+++ b/arch/x86/kernel/xsave.c
@@ -394,7 +394,8 @@ static void __init setup_xstate_init(void)
394 * Setup init_xstate_buf to represent the init state of 394 * Setup init_xstate_buf to represent the init state of
395 * all the features managed by the xsave 395 * all the features managed by the xsave
396 */ 396 */
397 init_xstate_buf = alloc_bootmem(xstate_size); 397 init_xstate_buf = alloc_bootmem_align(xstate_size,
398 __alignof__(struct xsave_struct));
398 init_xstate_buf->i387.mxcsr = MXCSR_DEFAULT; 399 init_xstate_buf->i387.mxcsr = MXCSR_DEFAULT;
399 400
400 clts(); 401 clts();
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 1ca12298ffc7..b81a9b7c2ca4 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3494,6 +3494,10 @@ static void svm_cpuid_update(struct kvm_vcpu *vcpu)
3494static void svm_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry) 3494static void svm_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
3495{ 3495{
3496 switch (func) { 3496 switch (func) {
3497 case 0x00000001:
3498 /* Mask out xsave bit as long as it is not supported by SVM */
3499 entry->ecx &= ~(bit(X86_FEATURE_XSAVE));
3500 break;
3497 case 0x80000001: 3501 case 0x80000001:
3498 if (nested) 3502 if (nested)
3499 entry->ecx |= (1 << 2); /* Set SVM bit */ 3503 entry->ecx |= (1 << 2); /* Set SVM bit */
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index ff21fdda0c53..81fcbe9515c5 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -4227,11 +4227,6 @@ static int vmx_get_lpage_level(void)
4227 return PT_PDPE_LEVEL; 4227 return PT_PDPE_LEVEL;
4228} 4228}
4229 4229
4230static inline u32 bit(int bitno)
4231{
4232 return 1 << (bitno & 31);
4233}
4234
4235static void vmx_cpuid_update(struct kvm_vcpu *vcpu) 4230static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
4236{ 4231{
4237 struct kvm_cpuid_entry2 *best; 4232 struct kvm_cpuid_entry2 *best;
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index cdac9e592aa5..b989e1f1e5d3 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -155,11 +155,6 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
155 155
156u64 __read_mostly host_xcr0; 156u64 __read_mostly host_xcr0;
157 157
158static inline u32 bit(int bitno)
159{
160 return 1 << (bitno & 31);
161}
162
163static void kvm_on_user_return(struct user_return_notifier *urn) 158static void kvm_on_user_return(struct user_return_notifier *urn)
164{ 159{
165 unsigned slot; 160 unsigned slot;
@@ -4569,9 +4564,11 @@ static void kvm_timer_init(void)
4569#ifdef CONFIG_CPU_FREQ 4564#ifdef CONFIG_CPU_FREQ
4570 struct cpufreq_policy policy; 4565 struct cpufreq_policy policy;
4571 memset(&policy, 0, sizeof(policy)); 4566 memset(&policy, 0, sizeof(policy));
4572 cpufreq_get_policy(&policy, get_cpu()); 4567 cpu = get_cpu();
4568 cpufreq_get_policy(&policy, cpu);
4573 if (policy.cpuinfo.max_freq) 4569 if (policy.cpuinfo.max_freq)
4574 max_tsc_khz = policy.cpuinfo.max_freq; 4570 max_tsc_khz = policy.cpuinfo.max_freq;
4571 put_cpu();
4575#endif 4572#endif
4576 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block, 4573 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4577 CPUFREQ_TRANSITION_NOTIFIER); 4574 CPUFREQ_TRANSITION_NOTIFIER);
@@ -5522,6 +5519,8 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5522 5519
5523 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4; 5520 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5524 kvm_x86_ops->set_cr4(vcpu, sregs->cr4); 5521 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5522 if (sregs->cr4 & X86_CR4_OSXSAVE)
5523 update_cpuid(vcpu);
5525 if (!is_long_mode(vcpu) && is_pae(vcpu)) { 5524 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5526 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3); 5525 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5527 mmu_reset_needed = 1; 5526 mmu_reset_needed = 1;
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 2cea414489f3..c600da830ce0 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -70,6 +70,11 @@ static inline int is_paging(struct kvm_vcpu *vcpu)
70 return kvm_read_cr0_bits(vcpu, X86_CR0_PG); 70 return kvm_read_cr0_bits(vcpu, X86_CR0_PG);
71} 71}
72 72
73static inline u32 bit(int bitno)
74{
75 return 1 << (bitno & 31);
76}
77
73void kvm_before_handle_nmi(struct kvm_vcpu *vcpu); 78void kvm_before_handle_nmi(struct kvm_vcpu *vcpu);
74void kvm_after_handle_nmi(struct kvm_vcpu *vcpu); 79void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
75int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq); 80int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq);
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 73b1e1a1f489..4996cf5f73a0 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -531,7 +531,10 @@ static void lguest_write_cr3(unsigned long cr3)
531{ 531{
532 lguest_data.pgdir = cr3; 532 lguest_data.pgdir = cr3;
533 lazy_hcall1(LHCALL_NEW_PGTABLE, cr3); 533 lazy_hcall1(LHCALL_NEW_PGTABLE, cr3);
534 cr3_changed = true; 534
535 /* These two page tables are simple, linear, and used during boot */
536 if (cr3 != __pa(swapper_pg_dir) && cr3 != __pa(initial_page_table))
537 cr3_changed = true;
535} 538}
536 539
537static unsigned long lguest_read_cr3(void) 540static unsigned long lguest_read_cr3(void)
@@ -703,9 +706,9 @@ static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
703 * to forget all of them. Fortunately, this is very rare. 706 * to forget all of them. Fortunately, this is very rare.
704 * 707 *
705 * ... except in early boot when the kernel sets up the initial pagetables, 708 * ... except in early boot when the kernel sets up the initial pagetables,
706 * which makes booting astonishingly slow: 1.83 seconds! So we don't even tell 709 * which makes booting astonishingly slow: 48 seconds! So we don't even tell
707 * the Host anything changed until we've done the first page table switch, 710 * the Host anything changed until we've done the first real page table switch,
708 * which brings boot back to 0.25 seconds. 711 * which brings boot back to 4.3 seconds.
709 */ 712 */
710static void lguest_set_pte(pte_t *ptep, pte_t pteval) 713static void lguest_set_pte(pte_t *ptep, pte_t pteval)
711{ 714{
@@ -1002,7 +1005,7 @@ static void lguest_time_init(void)
1002 clockevents_register_device(&lguest_clockevent); 1005 clockevents_register_device(&lguest_clockevent);
1003 1006
1004 /* Finally, we unblock the timer interrupt. */ 1007 /* Finally, we unblock the timer interrupt. */
1005 enable_lguest_irq(0); 1008 clear_bit(0, lguest_data.blocked_interrupts);
1006} 1009}
1007 1010
1008/* 1011/*
@@ -1349,9 +1352,6 @@ __init void lguest_init(void)
1349 */ 1352 */
1350 switch_to_new_gdt(0); 1353 switch_to_new_gdt(0);
1351 1354
1352 /* We actually boot with all memory mapped, but let's say 128MB. */
1353 max_pfn_mapped = (128*1024*1024) >> PAGE_SHIFT;
1354
1355 /* 1355 /*
1356 * The Host<->Guest Switcher lives at the top of our address space, and 1356 * The Host<->Guest Switcher lives at the top of our address space, and
1357 * the Host told us how big it is when we made LGUEST_INIT hypercall: 1357 * the Host told us how big it is when we made LGUEST_INIT hypercall:
diff --git a/arch/x86/lguest/i386_head.S b/arch/x86/lguest/i386_head.S
index 4f420c2f2d55..e7d5382ef263 100644
--- a/arch/x86/lguest/i386_head.S
+++ b/arch/x86/lguest/i386_head.S
@@ -4,6 +4,7 @@
4#include <asm/asm-offsets.h> 4#include <asm/asm-offsets.h>
5#include <asm/thread_info.h> 5#include <asm/thread_info.h>
6#include <asm/processor-flags.h> 6#include <asm/processor-flags.h>
7#include <asm/pgtable.h>
7 8
8/*G:020 9/*G:020
9 * Our story starts with the kernel booting into startup_32 in 10 * Our story starts with the kernel booting into startup_32 in
@@ -37,9 +38,113 @@ ENTRY(lguest_entry)
37 /* Set up the initial stack so we can run C code. */ 38 /* Set up the initial stack so we can run C code. */
38 movl $(init_thread_union+THREAD_SIZE),%esp 39 movl $(init_thread_union+THREAD_SIZE),%esp
39 40
41 call init_pagetables
42
40 /* Jumps are relative: we're running __PAGE_OFFSET too low. */ 43 /* Jumps are relative: we're running __PAGE_OFFSET too low. */
41 jmp lguest_init+__PAGE_OFFSET 44 jmp lguest_init+__PAGE_OFFSET
42 45
46/*
47 * Initialize page tables. This creates a PDE and a set of page
48 * tables, which are located immediately beyond __brk_base. The variable
49 * _brk_end is set up to point to the first "safe" location.
50 * Mappings are created both at virtual address 0 (identity mapping)
51 * and PAGE_OFFSET for up to _end.
52 *
53 * FIXME: This code is taken verbatim from arch/x86/kernel/head_32.S: they
54 * don't have a stack at this point, so we can't just use call and ret.
55 */
56init_pagetables:
57#if PTRS_PER_PMD > 1
58#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
59#else
60#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
61#endif
62#define pa(X) ((X) - __PAGE_OFFSET)
63
64/* Enough space to fit pagetables for the low memory linear map */
65MAPPING_BEYOND_END = \
66 PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT
67#ifdef CONFIG_X86_PAE
68
69 /*
70 * In PAE mode initial_page_table is statically defined to contain
71 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
72 * entries). The identity mapping is handled by pointing two PGD entries
73 * to the first kernel PMD.
74 *
75 * Note the upper half of each PMD or PTE are always zero at this stage.
76 */
77
78#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
79
80 xorl %ebx,%ebx /* %ebx is kept at zero */
81
82 movl $pa(__brk_base), %edi
83 movl $pa(initial_pg_pmd), %edx
84 movl $PTE_IDENT_ATTR, %eax
8510:
86 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
87 movl %ecx,(%edx) /* Store PMD entry */
88 /* Upper half already zero */
89 addl $8,%edx
90 movl $512,%ecx
9111:
92 stosl
93 xchgl %eax,%ebx
94 stosl
95 xchgl %eax,%ebx
96 addl $0x1000,%eax
97 loop 11b
98
99 /*
100 * End condition: we must map up to the end + MAPPING_BEYOND_END.
101 */
102 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
103 cmpl %ebp,%eax
104 jb 10b
1051:
106 addl $__PAGE_OFFSET, %edi
107 movl %edi, pa(_brk_end)
108 shrl $12, %eax
109 movl %eax, pa(max_pfn_mapped)
110
111 /* Do early initialization of the fixmap area */
112 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
113 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
114#else /* Not PAE */
115
116page_pde_offset = (__PAGE_OFFSET >> 20);
117
118 movl $pa(__brk_base), %edi
119 movl $pa(initial_page_table), %edx
120 movl $PTE_IDENT_ATTR, %eax
12110:
122 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
123 movl %ecx,(%edx) /* Store identity PDE entry */
124 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
125 addl $4,%edx
126 movl $1024, %ecx
12711:
128 stosl
129 addl $0x1000,%eax
130 loop 11b
131 /*
132 * End condition: we must map up to the end + MAPPING_BEYOND_END.
133 */
134 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
135 cmpl %ebp,%eax
136 jb 10b
137 addl $__PAGE_OFFSET, %edi
138 movl %edi, pa(_brk_end)
139 shrl $12, %eax
140 movl %eax, pa(max_pfn_mapped)
141
142 /* Do early initialization of the fixmap area */
143 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
144 movl %eax,pa(initial_page_table+0xffc)
145#endif
146 ret
147
43/*G:055 148/*G:055
44 * We create a macro which puts the assembler code between lgstart_ and lgend_ 149 * We create a macro which puts the assembler code between lgstart_ and lgend_
45 * markers. These templates are put in the .text section: they can't be 150 * markers. These templates are put in the .text section: they can't be
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index c4bb261c106e..b1805b78842f 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -65,21 +65,13 @@ pcibios_align_resource(void *data, const struct resource *res,
65 resource_size_t size, resource_size_t align) 65 resource_size_t size, resource_size_t align)
66{ 66{
67 struct pci_dev *dev = data; 67 struct pci_dev *dev = data;
68 resource_size_t start = round_down(res->end - size + 1, align); 68 resource_size_t start = res->start;
69 69
70 if (res->flags & IORESOURCE_IO) { 70 if (res->flags & IORESOURCE_IO) {
71 71 if (skip_isa_ioresource_align(dev))
72 /* 72 return start;
73 * If we're avoiding ISA aliases, the largest contiguous I/O 73 if (start & 0x300)
74 * port space is 256 bytes. Clearing bits 9 and 10 preserves 74 start = (start + 0x3ff) & ~0x3ff;
75 * all 256-byte and smaller alignments, so the result will
76 * still be correctly aligned.
77 */
78 if (!skip_isa_ioresource_align(dev))
79 start &= ~0x300;
80 } else if (res->flags & IORESOURCE_MEM) {
81 if (start < BIOS_END)
82 start = res->end; /* fail; no space */
83 } 75 }
84 return start; 76 return start;
85} 77}
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile
index 4a2afa1bac51..b6552b189bcd 100644
--- a/arch/x86/vdso/Makefile
+++ b/arch/x86/vdso/Makefile
@@ -25,7 +25,7 @@ targets += vdso.so vdso.so.dbg vdso.lds $(vobjs-y)
25 25
26export CPPFLAGS_vdso.lds += -P -C 26export CPPFLAGS_vdso.lds += -P -C
27 27
28VDSO_LDFLAGS_vdso.lds = -m elf_x86_64 -Wl,-soname=linux-vdso.so.1 \ 28VDSO_LDFLAGS_vdso.lds = -m64 -Wl,-soname=linux-vdso.so.1 \
29 -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096 29 -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096
30 30
31$(obj)/vdso.o: $(src)/vdso.S $(obj)/vdso.so 31$(obj)/vdso.o: $(src)/vdso.S $(obj)/vdso.so
@@ -69,7 +69,7 @@ vdso32.so-$(VDSO32-y) += sysenter
69vdso32-images = $(vdso32.so-y:%=vdso32-%.so) 69vdso32-images = $(vdso32.so-y:%=vdso32-%.so)
70 70
71CPPFLAGS_vdso32.lds = $(CPPFLAGS_vdso.lds) 71CPPFLAGS_vdso32.lds = $(CPPFLAGS_vdso.lds)
72VDSO_LDFLAGS_vdso32.lds = -m elf_i386 -Wl,-soname=linux-gate.so.1 72VDSO_LDFLAGS_vdso32.lds = -m32 -Wl,-soname=linux-gate.so.1
73 73
74# This makes sure the $(obj) subdirectory exists even though vdso32/ 74# This makes sure the $(obj) subdirectory exists even though vdso32/
75# is not a kbuild sub-make subdirectory. 75# is not a kbuild sub-make subdirectory.
diff --git a/block/blk-map.c b/block/blk-map.c
index 5d5dbe47c228..e663ac2d8e68 100644
--- a/block/blk-map.c
+++ b/block/blk-map.c
@@ -201,12 +201,13 @@ int blk_rq_map_user_iov(struct request_queue *q, struct request *rq,
201 for (i = 0; i < iov_count; i++) { 201 for (i = 0; i < iov_count; i++) {
202 unsigned long uaddr = (unsigned long)iov[i].iov_base; 202 unsigned long uaddr = (unsigned long)iov[i].iov_base;
203 203
204 if (!iov[i].iov_len)
205 return -EINVAL;
206
204 if (uaddr & queue_dma_alignment(q)) { 207 if (uaddr & queue_dma_alignment(q)) {
205 unaligned = 1; 208 unaligned = 1;
206 break; 209 break;
207 } 210 }
208 if (!iov[i].iov_len)
209 return -EINVAL;
210 } 211 }
211 212
212 if (unaligned || (q->dma_pad_mask & len) || map_data) 213 if (unaligned || (q->dma_pad_mask & len) || map_data)
diff --git a/block/blk-merge.c b/block/blk-merge.c
index 77b7c26df6b5..74bc4a768f32 100644
--- a/block/blk-merge.c
+++ b/block/blk-merge.c
@@ -21,7 +21,7 @@ static unsigned int __blk_recalc_rq_segments(struct request_queue *q,
21 return 0; 21 return 0;
22 22
23 fbio = bio; 23 fbio = bio;
24 cluster = test_bit(QUEUE_FLAG_CLUSTER, &q->queue_flags); 24 cluster = blk_queue_cluster(q);
25 seg_size = 0; 25 seg_size = 0;
26 nr_phys_segs = 0; 26 nr_phys_segs = 0;
27 for_each_bio(bio) { 27 for_each_bio(bio) {
@@ -87,7 +87,7 @@ EXPORT_SYMBOL(blk_recount_segments);
87static int blk_phys_contig_segment(struct request_queue *q, struct bio *bio, 87static int blk_phys_contig_segment(struct request_queue *q, struct bio *bio,
88 struct bio *nxt) 88 struct bio *nxt)
89{ 89{
90 if (!test_bit(QUEUE_FLAG_CLUSTER, &q->queue_flags)) 90 if (!blk_queue_cluster(q))
91 return 0; 91 return 0;
92 92
93 if (bio->bi_seg_back_size + nxt->bi_seg_front_size > 93 if (bio->bi_seg_back_size + nxt->bi_seg_front_size >
@@ -123,7 +123,7 @@ int blk_rq_map_sg(struct request_queue *q, struct request *rq,
123 int nsegs, cluster; 123 int nsegs, cluster;
124 124
125 nsegs = 0; 125 nsegs = 0;
126 cluster = test_bit(QUEUE_FLAG_CLUSTER, &q->queue_flags); 126 cluster = blk_queue_cluster(q);
127 127
128 /* 128 /*
129 * for each bio in rq 129 * for each bio in rq
diff --git a/block/blk-settings.c b/block/blk-settings.c
index 701859fb9647..36c8c1f2af18 100644
--- a/block/blk-settings.c
+++ b/block/blk-settings.c
@@ -126,7 +126,7 @@ void blk_set_default_limits(struct queue_limits *lim)
126 lim->alignment_offset = 0; 126 lim->alignment_offset = 0;
127 lim->io_opt = 0; 127 lim->io_opt = 0;
128 lim->misaligned = 0; 128 lim->misaligned = 0;
129 lim->no_cluster = 0; 129 lim->cluster = 1;
130} 130}
131EXPORT_SYMBOL(blk_set_default_limits); 131EXPORT_SYMBOL(blk_set_default_limits);
132 132
@@ -229,8 +229,8 @@ void blk_queue_bounce_limit(struct request_queue *q, u64 dma_mask)
229EXPORT_SYMBOL(blk_queue_bounce_limit); 229EXPORT_SYMBOL(blk_queue_bounce_limit);
230 230
231/** 231/**
232 * blk_queue_max_hw_sectors - set max sectors for a request for this queue 232 * blk_limits_max_hw_sectors - set hard and soft limit of max sectors for request
233 * @q: the request queue for the device 233 * @limits: the queue limits
234 * @max_hw_sectors: max hardware sectors in the usual 512b unit 234 * @max_hw_sectors: max hardware sectors in the usual 512b unit
235 * 235 *
236 * Description: 236 * Description:
@@ -244,7 +244,7 @@ EXPORT_SYMBOL(blk_queue_bounce_limit);
244 * per-device basis in /sys/block/<device>/queue/max_sectors_kb. 244 * per-device basis in /sys/block/<device>/queue/max_sectors_kb.
245 * The soft limit can not exceed max_hw_sectors. 245 * The soft limit can not exceed max_hw_sectors.
246 **/ 246 **/
247void blk_queue_max_hw_sectors(struct request_queue *q, unsigned int max_hw_sectors) 247void blk_limits_max_hw_sectors(struct queue_limits *limits, unsigned int max_hw_sectors)
248{ 248{
249 if ((max_hw_sectors << 9) < PAGE_CACHE_SIZE) { 249 if ((max_hw_sectors << 9) < PAGE_CACHE_SIZE) {
250 max_hw_sectors = 1 << (PAGE_CACHE_SHIFT - 9); 250 max_hw_sectors = 1 << (PAGE_CACHE_SHIFT - 9);
@@ -252,9 +252,23 @@ void blk_queue_max_hw_sectors(struct request_queue *q, unsigned int max_hw_secto
252 __func__, max_hw_sectors); 252 __func__, max_hw_sectors);
253 } 253 }
254 254
255 q->limits.max_hw_sectors = max_hw_sectors; 255 limits->max_hw_sectors = max_hw_sectors;
256 q->limits.max_sectors = min_t(unsigned int, max_hw_sectors, 256 limits->max_sectors = min_t(unsigned int, max_hw_sectors,
257 BLK_DEF_MAX_SECTORS); 257 BLK_DEF_MAX_SECTORS);
258}
259EXPORT_SYMBOL(blk_limits_max_hw_sectors);
260
261/**
262 * blk_queue_max_hw_sectors - set max sectors for a request for this queue
263 * @q: the request queue for the device
264 * @max_hw_sectors: max hardware sectors in the usual 512b unit
265 *
266 * Description:
267 * See description for blk_limits_max_hw_sectors().
268 **/
269void blk_queue_max_hw_sectors(struct request_queue *q, unsigned int max_hw_sectors)
270{
271 blk_limits_max_hw_sectors(&q->limits, max_hw_sectors);
258} 272}
259EXPORT_SYMBOL(blk_queue_max_hw_sectors); 273EXPORT_SYMBOL(blk_queue_max_hw_sectors);
260 274
@@ -464,15 +478,6 @@ EXPORT_SYMBOL(blk_queue_io_opt);
464void blk_queue_stack_limits(struct request_queue *t, struct request_queue *b) 478void blk_queue_stack_limits(struct request_queue *t, struct request_queue *b)
465{ 479{
466 blk_stack_limits(&t->limits, &b->limits, 0); 480 blk_stack_limits(&t->limits, &b->limits, 0);
467
468 if (!t->queue_lock)
469 WARN_ON_ONCE(1);
470 else if (!test_bit(QUEUE_FLAG_CLUSTER, &b->queue_flags)) {
471 unsigned long flags;
472 spin_lock_irqsave(t->queue_lock, flags);
473 queue_flag_clear(QUEUE_FLAG_CLUSTER, t);
474 spin_unlock_irqrestore(t->queue_lock, flags);
475 }
476} 481}
477EXPORT_SYMBOL(blk_queue_stack_limits); 482EXPORT_SYMBOL(blk_queue_stack_limits);
478 483
@@ -545,7 +550,7 @@ int blk_stack_limits(struct queue_limits *t, struct queue_limits *b,
545 t->io_min = max(t->io_min, b->io_min); 550 t->io_min = max(t->io_min, b->io_min);
546 t->io_opt = lcm(t->io_opt, b->io_opt); 551 t->io_opt = lcm(t->io_opt, b->io_opt);
547 552
548 t->no_cluster |= b->no_cluster; 553 t->cluster &= b->cluster;
549 t->discard_zeroes_data &= b->discard_zeroes_data; 554 t->discard_zeroes_data &= b->discard_zeroes_data;
550 555
551 /* Physical block size a multiple of the logical block size? */ 556 /* Physical block size a multiple of the logical block size? */
@@ -641,7 +646,6 @@ void disk_stack_limits(struct gendisk *disk, struct block_device *bdev,
641 sector_t offset) 646 sector_t offset)
642{ 647{
643 struct request_queue *t = disk->queue; 648 struct request_queue *t = disk->queue;
644 struct request_queue *b = bdev_get_queue(bdev);
645 649
646 if (bdev_stack_limits(&t->limits, bdev, offset >> 9) < 0) { 650 if (bdev_stack_limits(&t->limits, bdev, offset >> 9) < 0) {
647 char top[BDEVNAME_SIZE], bottom[BDEVNAME_SIZE]; 651 char top[BDEVNAME_SIZE], bottom[BDEVNAME_SIZE];
@@ -652,17 +656,6 @@ void disk_stack_limits(struct gendisk *disk, struct block_device *bdev,
652 printk(KERN_NOTICE "%s: Warning: Device %s is misaligned\n", 656 printk(KERN_NOTICE "%s: Warning: Device %s is misaligned\n",
653 top, bottom); 657 top, bottom);
654 } 658 }
655
656 if (!t->queue_lock)
657 WARN_ON_ONCE(1);
658 else if (!test_bit(QUEUE_FLAG_CLUSTER, &b->queue_flags)) {
659 unsigned long flags;
660
661 spin_lock_irqsave(t->queue_lock, flags);
662 if (!test_bit(QUEUE_FLAG_CLUSTER, &b->queue_flags))
663 queue_flag_clear(QUEUE_FLAG_CLUSTER, t);
664 spin_unlock_irqrestore(t->queue_lock, flags);
665 }
666} 659}
667EXPORT_SYMBOL(disk_stack_limits); 660EXPORT_SYMBOL(disk_stack_limits);
668 661
diff --git a/block/blk-sysfs.c b/block/blk-sysfs.c
index 013457f47fdc..41fb69150b4d 100644
--- a/block/blk-sysfs.c
+++ b/block/blk-sysfs.c
@@ -119,7 +119,7 @@ static ssize_t queue_max_integrity_segments_show(struct request_queue *q, char *
119 119
120static ssize_t queue_max_segment_size_show(struct request_queue *q, char *page) 120static ssize_t queue_max_segment_size_show(struct request_queue *q, char *page)
121{ 121{
122 if (test_bit(QUEUE_FLAG_CLUSTER, &q->queue_flags)) 122 if (blk_queue_cluster(q))
123 return queue_var_show(queue_max_segment_size(q), (page)); 123 return queue_var_show(queue_max_segment_size(q), (page));
124 124
125 return queue_var_show(PAGE_CACHE_SIZE, (page)); 125 return queue_var_show(PAGE_CACHE_SIZE, (page));
diff --git a/block/blk-throttle.c b/block/blk-throttle.c
index 004be80fd894..381b09bb562b 100644
--- a/block/blk-throttle.c
+++ b/block/blk-throttle.c
@@ -355,6 +355,12 @@ throtl_start_new_slice(struct throtl_data *td, struct throtl_grp *tg, bool rw)
355 tg->slice_end[rw], jiffies); 355 tg->slice_end[rw], jiffies);
356} 356}
357 357
358static inline void throtl_set_slice_end(struct throtl_data *td,
359 struct throtl_grp *tg, bool rw, unsigned long jiffy_end)
360{
361 tg->slice_end[rw] = roundup(jiffy_end, throtl_slice);
362}
363
358static inline void throtl_extend_slice(struct throtl_data *td, 364static inline void throtl_extend_slice(struct throtl_data *td,
359 struct throtl_grp *tg, bool rw, unsigned long jiffy_end) 365 struct throtl_grp *tg, bool rw, unsigned long jiffy_end)
360{ 366{
@@ -391,6 +397,16 @@ throtl_trim_slice(struct throtl_data *td, struct throtl_grp *tg, bool rw)
391 if (throtl_slice_used(td, tg, rw)) 397 if (throtl_slice_used(td, tg, rw))
392 return; 398 return;
393 399
400 /*
401 * A bio has been dispatched. Also adjust slice_end. It might happen
402 * that initially cgroup limit was very low resulting in high
403 * slice_end, but later limit was bumped up and bio was dispached
404 * sooner, then we need to reduce slice_end. A high bogus slice_end
405 * is bad because it does not allow new slice to start.
406 */
407
408 throtl_set_slice_end(td, tg, rw, jiffies + throtl_slice);
409
394 time_elapsed = jiffies - tg->slice_start[rw]; 410 time_elapsed = jiffies - tg->slice_start[rw];
395 411
396 nr_slices = time_elapsed / throtl_slice; 412 nr_slices = time_elapsed / throtl_slice;
@@ -709,26 +725,21 @@ static void throtl_process_limit_change(struct throtl_data *td)
709 struct throtl_grp *tg; 725 struct throtl_grp *tg;
710 struct hlist_node *pos, *n; 726 struct hlist_node *pos, *n;
711 727
712 /*
713 * Make sure atomic_inc() effects from
714 * throtl_update_blkio_group_read_bps(), group of functions are
715 * visible.
716 * Is this required or smp_mb__after_atomic_inc() was suffcient
717 * after the atomic_inc().
718 */
719 smp_rmb();
720 if (!atomic_read(&td->limits_changed)) 728 if (!atomic_read(&td->limits_changed))
721 return; 729 return;
722 730
723 throtl_log(td, "limit changed =%d", atomic_read(&td->limits_changed)); 731 throtl_log(td, "limit changed =%d", atomic_read(&td->limits_changed));
724 732
725 hlist_for_each_entry_safe(tg, pos, n, &td->tg_list, tg_node) { 733 /*
726 /* 734 * Make sure updates from throtl_update_blkio_group_read_bps() group
727 * Do I need an smp_rmb() here to make sure tg->limits_changed 735 * of functions to tg->limits_changed are visible. We do not
728 * update is visible. I am relying on smp_rmb() at the 736 * want update td->limits_changed to be visible but update to
729 * beginning of function and not putting a new one here. 737 * tg->limits_changed not being visible yet on this cpu. Hence
730 */ 738 * the read barrier.
739 */
740 smp_rmb();
731 741
742 hlist_for_each_entry_safe(tg, pos, n, &td->tg_list, tg_node) {
732 if (throtl_tg_on_rr(tg) && tg->limits_changed) { 743 if (throtl_tg_on_rr(tg) && tg->limits_changed) {
733 throtl_log_tg(td, tg, "limit change rbps=%llu wbps=%llu" 744 throtl_log_tg(td, tg, "limit change rbps=%llu wbps=%llu"
734 " riops=%u wiops=%u", tg->bps[READ], 745 " riops=%u wiops=%u", tg->bps[READ],
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index f291587d753e..8e0f9256eb58 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -2834,6 +2834,8 @@ static int cciss_revalidate(struct gendisk *disk)
2834 InquiryData_struct *inq_buff = NULL; 2834 InquiryData_struct *inq_buff = NULL;
2835 2835
2836 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) { 2836 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
2837 if (!h->drv[logvol])
2838 continue;
2837 if (memcmp(h->drv[logvol]->LunID, drv->LunID, 2839 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2838 sizeof(drv->LunID)) == 0) { 2840 sizeof(drv->LunID)) == 0) {
2839 FOUND = 1; 2841 FOUND = 1;
diff --git a/drivers/block/drbd/drbd_receiver.c b/drivers/block/drbd/drbd_receiver.c
index 89d8a7cc4054..24487d4fb202 100644
--- a/drivers/block/drbd/drbd_receiver.c
+++ b/drivers/block/drbd/drbd_receiver.c
@@ -3627,17 +3627,19 @@ static void drbdd(struct drbd_conf *mdev)
3627 } 3627 }
3628 3628
3629 shs = drbd_cmd_handler[cmd].pkt_size - sizeof(union p_header); 3629 shs = drbd_cmd_handler[cmd].pkt_size - sizeof(union p_header);
3630 rv = drbd_recv(mdev, &header->h80.payload, shs);
3631 if (unlikely(rv != shs)) {
3632 dev_err(DEV, "short read while reading sub header: rv=%d\n", rv);
3633 goto err_out;
3634 }
3635
3636 if (packet_size - shs > 0 && !drbd_cmd_handler[cmd].expect_payload) { 3630 if (packet_size - shs > 0 && !drbd_cmd_handler[cmd].expect_payload) {
3637 dev_err(DEV, "No payload expected %s l:%d\n", cmdname(cmd), packet_size); 3631 dev_err(DEV, "No payload expected %s l:%d\n", cmdname(cmd), packet_size);
3638 goto err_out; 3632 goto err_out;
3639 } 3633 }
3640 3634
3635 if (shs) {
3636 rv = drbd_recv(mdev, &header->h80.payload, shs);
3637 if (unlikely(rv != shs)) {
3638 dev_err(DEV, "short read while reading sub header: rv=%d\n", rv);
3639 goto err_out;
3640 }
3641 }
3642
3641 rv = drbd_cmd_handler[cmd].function(mdev, cmd, packet_size - shs); 3643 rv = drbd_cmd_handler[cmd].function(mdev, cmd, packet_size - shs);
3642 3644
3643 if (unlikely(!rv)) { 3645 if (unlikely(!rv)) {
diff --git a/drivers/block/drbd/drbd_req.h b/drivers/block/drbd/drbd_req.h
index 181ea0364822..ab2bd09d54b4 100644
--- a/drivers/block/drbd/drbd_req.h
+++ b/drivers/block/drbd/drbd_req.h
@@ -339,7 +339,8 @@ static inline int _req_mod(struct drbd_request *req, enum drbd_req_event what)
339} 339}
340 340
341/* completion of master bio is outside of spinlock. 341/* completion of master bio is outside of spinlock.
342 * If you need it irqsave, do it your self! */ 342 * If you need it irqsave, do it your self!
343 * Which means: don't use from bio endio callback. */
343static inline int req_mod(struct drbd_request *req, 344static inline int req_mod(struct drbd_request *req,
344 enum drbd_req_event what) 345 enum drbd_req_event what)
345{ 346{
diff --git a/drivers/block/drbd/drbd_worker.c b/drivers/block/drbd/drbd_worker.c
index 47d223c2409c..34f224b018b3 100644
--- a/drivers/block/drbd/drbd_worker.c
+++ b/drivers/block/drbd/drbd_worker.c
@@ -193,8 +193,10 @@ void drbd_endio_sec(struct bio *bio, int error)
193 */ 193 */
194void drbd_endio_pri(struct bio *bio, int error) 194void drbd_endio_pri(struct bio *bio, int error)
195{ 195{
196 unsigned long flags;
196 struct drbd_request *req = bio->bi_private; 197 struct drbd_request *req = bio->bi_private;
197 struct drbd_conf *mdev = req->mdev; 198 struct drbd_conf *mdev = req->mdev;
199 struct bio_and_error m;
198 enum drbd_req_event what; 200 enum drbd_req_event what;
199 int uptodate = bio_flagged(bio, BIO_UPTODATE); 201 int uptodate = bio_flagged(bio, BIO_UPTODATE);
200 202
@@ -220,7 +222,13 @@ void drbd_endio_pri(struct bio *bio, int error)
220 bio_put(req->private_bio); 222 bio_put(req->private_bio);
221 req->private_bio = ERR_PTR(error); 223 req->private_bio = ERR_PTR(error);
222 224
223 req_mod(req, what); 225 /* not req_mod(), we need irqsave here! */
226 spin_lock_irqsave(&mdev->req_lock, flags);
227 __req_mod(req, what, &m);
228 spin_unlock_irqrestore(&mdev->req_lock, flags);
229
230 if (m.bio)
231 complete_master_bio(mdev, &m);
224} 232}
225 233
226int w_read_retry_remote(struct drbd_conf *mdev, struct drbd_work *w, int cancel) 234int w_read_retry_remote(struct drbd_conf *mdev, struct drbd_work *w, int cancel)
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index d68d3aa1814b..f975d24890fa 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -283,16 +283,21 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p,
283 } while (delay); 283 } while (delay);
284} 284}
285 285
286static void sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta) 286static void __sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta)
287{ 287{
288 unsigned long flags;
289
290 if (delta > p->max_match_value) 288 if (delta > p->max_match_value)
291 dev_warn(&p->pdev->dev, "delta out of range\n"); 289 dev_warn(&p->pdev->dev, "delta out of range\n");
292 290
293 spin_lock_irqsave(&p->lock, flags);
294 p->next_match_value = delta; 291 p->next_match_value = delta;
295 sh_cmt_clock_event_program_verify(p, 0); 292 sh_cmt_clock_event_program_verify(p, 0);
293}
294
295static void sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta)
296{
297 unsigned long flags;
298
299 spin_lock_irqsave(&p->lock, flags);
300 __sh_cmt_set_next(p, delta);
296 spin_unlock_irqrestore(&p->lock, flags); 301 spin_unlock_irqrestore(&p->lock, flags);
297} 302}
298 303
@@ -359,7 +364,7 @@ static int sh_cmt_start(struct sh_cmt_priv *p, unsigned long flag)
359 364
360 /* setup timeout if no clockevent */ 365 /* setup timeout if no clockevent */
361 if ((flag == FLAG_CLOCKSOURCE) && (!(p->flags & FLAG_CLOCKEVENT))) 366 if ((flag == FLAG_CLOCKSOURCE) && (!(p->flags & FLAG_CLOCKEVENT)))
362 sh_cmt_set_next(p, p->max_match_value); 367 __sh_cmt_set_next(p, p->max_match_value);
363 out: 368 out:
364 spin_unlock_irqrestore(&p->lock, flags); 369 spin_unlock_irqrestore(&p->lock, flags);
365 370
@@ -381,7 +386,7 @@ static void sh_cmt_stop(struct sh_cmt_priv *p, unsigned long flag)
381 386
382 /* adjust the timeout to maximum if only clocksource left */ 387 /* adjust the timeout to maximum if only clocksource left */
383 if ((flag == FLAG_CLOCKEVENT) && (p->flags & FLAG_CLOCKSOURCE)) 388 if ((flag == FLAG_CLOCKEVENT) && (p->flags & FLAG_CLOCKSOURCE))
384 sh_cmt_set_next(p, p->max_match_value); 389 __sh_cmt_set_next(p, p->max_match_value);
385 390
386 spin_unlock_irqrestore(&p->lock, flags); 391 spin_unlock_irqrestore(&p->lock, flags);
387} 392}
diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c
index e3f7fc6f9565..68f09a868434 100644
--- a/drivers/input/evdev.c
+++ b/drivers/input/evdev.c
@@ -534,76 +534,73 @@ static int handle_eviocgbit(struct input_dev *dev,
534} 534}
535#undef OLD_KEY_MAX 535#undef OLD_KEY_MAX
536 536
537static int evdev_handle_get_keycode(struct input_dev *dev, 537static int evdev_handle_get_keycode(struct input_dev *dev, void __user *p)
538 void __user *p, size_t size)
539{ 538{
540 struct input_keymap_entry ke; 539 struct input_keymap_entry ke = {
540 .len = sizeof(unsigned int),
541 .flags = 0,
542 };
543 int __user *ip = (int __user *)p;
541 int error; 544 int error;
542 545
543 memset(&ke, 0, sizeof(ke)); 546 /* legacy case */
544 547 if (copy_from_user(ke.scancode, p, sizeof(unsigned int)))
545 if (size == sizeof(unsigned int[2])) { 548 return -EFAULT;
546 /* legacy case */
547 int __user *ip = (int __user *)p;
548 549
549 if (copy_from_user(ke.scancode, p, sizeof(unsigned int))) 550 error = input_get_keycode(dev, &ke);
550 return -EFAULT; 551 if (error)
552 return error;
551 553
552 ke.len = sizeof(unsigned int); 554 if (put_user(ke.keycode, ip + 1))
553 ke.flags = 0; 555 return -EFAULT;
554 556
555 error = input_get_keycode(dev, &ke); 557 return 0;
556 if (error) 558}
557 return error;
558 559
559 if (put_user(ke.keycode, ip + 1)) 560static int evdev_handle_get_keycode_v2(struct input_dev *dev, void __user *p)
560 return -EFAULT; 561{
562 struct input_keymap_entry ke;
563 int error;
561 564
562 } else { 565 if (copy_from_user(&ke, p, sizeof(ke)))
563 size = min(size, sizeof(ke)); 566 return -EFAULT;
564 567
565 if (copy_from_user(&ke, p, size)) 568 error = input_get_keycode(dev, &ke);
566 return -EFAULT; 569 if (error)
570 return error;
567 571
568 error = input_get_keycode(dev, &ke); 572 if (copy_to_user(p, &ke, sizeof(ke)))
569 if (error) 573 return -EFAULT;
570 return error;
571 574
572 if (copy_to_user(p, &ke, size))
573 return -EFAULT;
574 }
575 return 0; 575 return 0;
576} 576}
577 577
578static int evdev_handle_set_keycode(struct input_dev *dev, 578static int evdev_handle_set_keycode(struct input_dev *dev, void __user *p)
579 void __user *p, size_t size)
580{ 579{
581 struct input_keymap_entry ke; 580 struct input_keymap_entry ke = {
582 581 .len = sizeof(unsigned int),
583 memset(&ke, 0, sizeof(ke)); 582 .flags = 0,
583 };
584 int __user *ip = (int __user *)p;
584 585
585 if (size == sizeof(unsigned int[2])) { 586 if (copy_from_user(ke.scancode, p, sizeof(unsigned int)))
586 /* legacy case */ 587 return -EFAULT;
587 int __user *ip = (int __user *)p;
588 588
589 if (copy_from_user(ke.scancode, p, sizeof(unsigned int))) 589 if (get_user(ke.keycode, ip + 1))
590 return -EFAULT; 590 return -EFAULT;
591 591
592 if (get_user(ke.keycode, ip + 1)) 592 return input_set_keycode(dev, &ke);
593 return -EFAULT; 593}
594 594
595 ke.len = sizeof(unsigned int); 595static int evdev_handle_set_keycode_v2(struct input_dev *dev, void __user *p)
596 ke.flags = 0; 596{
597 struct input_keymap_entry ke;
597 598
598 } else { 599 if (copy_from_user(&ke, p, sizeof(ke)))
599 size = min(size, sizeof(ke)); 600 return -EFAULT;
600 601
601 if (copy_from_user(&ke, p, size)) 602 if (ke.len > sizeof(ke.scancode))
602 return -EFAULT; 603 return -EINVAL;
603
604 if (ke.len > sizeof(ke.scancode))
605 return -EINVAL;
606 }
607 604
608 return input_set_keycode(dev, &ke); 605 return input_set_keycode(dev, &ke);
609} 606}
@@ -669,6 +666,18 @@ static long evdev_do_ioctl(struct file *file, unsigned int cmd,
669 return evdev_grab(evdev, client); 666 return evdev_grab(evdev, client);
670 else 667 else
671 return evdev_ungrab(evdev, client); 668 return evdev_ungrab(evdev, client);
669
670 case EVIOCGKEYCODE:
671 return evdev_handle_get_keycode(dev, p);
672
673 case EVIOCSKEYCODE:
674 return evdev_handle_set_keycode(dev, p);
675
676 case EVIOCGKEYCODE_V2:
677 return evdev_handle_get_keycode_v2(dev, p);
678
679 case EVIOCSKEYCODE_V2:
680 return evdev_handle_set_keycode_v2(dev, p);
672 } 681 }
673 682
674 size = _IOC_SIZE(cmd); 683 size = _IOC_SIZE(cmd);
@@ -708,12 +717,6 @@ static long evdev_do_ioctl(struct file *file, unsigned int cmd,
708 return -EFAULT; 717 return -EFAULT;
709 718
710 return error; 719 return error;
711
712 case EVIOC_MASK_SIZE(EVIOCGKEYCODE):
713 return evdev_handle_get_keycode(dev, p, size);
714
715 case EVIOC_MASK_SIZE(EVIOCSKEYCODE):
716 return evdev_handle_set_keycode(dev, p, size);
717 } 720 }
718 721
719 /* Multi-number variable-length handlers */ 722 /* Multi-number variable-length handlers */
diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c
index a72e61ddca91..0e2a19cb43d8 100644
--- a/drivers/input/keyboard/omap-keypad.c
+++ b/drivers/input/keyboard/omap-keypad.c
@@ -65,7 +65,6 @@ struct omap_kp {
65 65
66static DECLARE_TASKLET_DISABLED(kp_tasklet, omap_kp_tasklet, 0); 66static DECLARE_TASKLET_DISABLED(kp_tasklet, omap_kp_tasklet, 0);
67 67
68static int *keymap;
69static unsigned int *row_gpios; 68static unsigned int *row_gpios;
70static unsigned int *col_gpios; 69static unsigned int *col_gpios;
71 70
@@ -162,20 +161,11 @@ static void omap_kp_scan_keypad(struct omap_kp *omap_kp, unsigned char *state)
162 } 161 }
163} 162}
164 163
165static inline int omap_kp_find_key(int col, int row)
166{
167 int i, key;
168
169 key = KEY(col, row, 0);
170 for (i = 0; keymap[i] != 0; i++)
171 if ((keymap[i] & 0xff000000) == key)
172 return keymap[i] & 0x00ffffff;
173 return -1;
174}
175
176static void omap_kp_tasklet(unsigned long data) 164static void omap_kp_tasklet(unsigned long data)
177{ 165{
178 struct omap_kp *omap_kp_data = (struct omap_kp *) data; 166 struct omap_kp *omap_kp_data = (struct omap_kp *) data;
167 unsigned short *keycodes = omap_kp_data->input->keycode;
168 unsigned int row_shift = get_count_order(omap_kp_data->cols);
179 unsigned char new_state[8], changed, key_down = 0; 169 unsigned char new_state[8], changed, key_down = 0;
180 int col, row; 170 int col, row;
181 int spurious = 0; 171 int spurious = 0;
@@ -199,7 +189,7 @@ static void omap_kp_tasklet(unsigned long data)
199 row, (new_state[col] & (1 << row)) ? 189 row, (new_state[col] & (1 << row)) ?
200 "pressed" : "released"); 190 "pressed" : "released");
201#else 191#else
202 key = omap_kp_find_key(col, row); 192 key = keycodes[MATRIX_SCAN_CODE(row, col, row_shift)];
203 if (key < 0) { 193 if (key < 0) {
204 printk(KERN_WARNING 194 printk(KERN_WARNING
205 "omap-keypad: Spurious key event %d-%d\n", 195 "omap-keypad: Spurious key event %d-%d\n",
@@ -298,13 +288,18 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
298 struct input_dev *input_dev; 288 struct input_dev *input_dev;
299 struct omap_kp_platform_data *pdata = pdev->dev.platform_data; 289 struct omap_kp_platform_data *pdata = pdev->dev.platform_data;
300 int i, col_idx, row_idx, irq_idx, ret; 290 int i, col_idx, row_idx, irq_idx, ret;
291 unsigned int row_shift, keycodemax;
301 292
302 if (!pdata->rows || !pdata->cols || !pdata->keymap) { 293 if (!pdata->rows || !pdata->cols || !pdata->keymap_data) {
303 printk(KERN_ERR "No rows, cols or keymap from pdata\n"); 294 printk(KERN_ERR "No rows, cols or keymap_data from pdata\n");
304 return -EINVAL; 295 return -EINVAL;
305 } 296 }
306 297
307 omap_kp = kzalloc(sizeof(struct omap_kp), GFP_KERNEL); 298 row_shift = get_count_order(pdata->cols);
299 keycodemax = pdata->rows << row_shift;
300
301 omap_kp = kzalloc(sizeof(struct omap_kp) +
302 keycodemax * sizeof(unsigned short), GFP_KERNEL);
308 input_dev = input_allocate_device(); 303 input_dev = input_allocate_device();
309 if (!omap_kp || !input_dev) { 304 if (!omap_kp || !input_dev) {
310 kfree(omap_kp); 305 kfree(omap_kp);
@@ -320,7 +315,9 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
320 if (!cpu_is_omap24xx()) 315 if (!cpu_is_omap24xx())
321 omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); 316 omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
322 317
323 keymap = pdata->keymap; 318 input_dev->keycode = &omap_kp[1];
319 input_dev->keycodesize = sizeof(unsigned short);
320 input_dev->keycodemax = keycodemax;
324 321
325 if (pdata->rep) 322 if (pdata->rep)
326 __set_bit(EV_REP, input_dev->evbit); 323 __set_bit(EV_REP, input_dev->evbit);
@@ -374,8 +371,8 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
374 371
375 /* setup input device */ 372 /* setup input device */
376 __set_bit(EV_KEY, input_dev->evbit); 373 __set_bit(EV_KEY, input_dev->evbit);
377 for (i = 0; keymap[i] != 0; i++) 374 matrix_keypad_build_keymap(pdata->keymap_data, row_shift,
378 __set_bit(keymap[i] & KEY_MAX, input_dev->keybit); 375 input_dev->keycode, input_dev->keybit);
379 input_dev->name = "omap-keypad"; 376 input_dev->name = "omap-keypad";
380 input_dev->phys = "omap-keypad/input0"; 377 input_dev->phys = "omap-keypad/input0";
381 input_dev->dev.parent = &pdev->dev; 378 input_dev->dev.parent = &pdev->dev;
@@ -416,7 +413,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
416 return 0; 413 return 0;
417err5: 414err5:
418 for (i = irq_idx - 1; i >=0; i--) 415 for (i = irq_idx - 1; i >=0; i--)
419 free_irq(row_gpios[i], 0); 416 free_irq(row_gpios[i], NULL);
420err4: 417err4:
421 input_unregister_device(omap_kp->input); 418 input_unregister_device(omap_kp->input);
422 input_dev = NULL; 419 input_dev = NULL;
@@ -447,11 +444,11 @@ static int __devexit omap_kp_remove(struct platform_device *pdev)
447 gpio_free(col_gpios[i]); 444 gpio_free(col_gpios[i]);
448 for (i = 0; i < omap_kp->rows; i++) { 445 for (i = 0; i < omap_kp->rows; i++) {
449 gpio_free(row_gpios[i]); 446 gpio_free(row_gpios[i]);
450 free_irq(gpio_to_irq(row_gpios[i]), 0); 447 free_irq(gpio_to_irq(row_gpios[i]), NULL);
451 } 448 }
452 } else { 449 } else {
453 omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); 450 omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
454 free_irq(omap_kp->irq, 0); 451 free_irq(omap_kp->irq, NULL);
455 } 452 }
456 453
457 del_timer_sync(&omap_kp->timer); 454 del_timer_sync(&omap_kp->timer);
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
index 4852b440960a..435b0af401e4 100644
--- a/drivers/input/tablet/wacom_wac.c
+++ b/drivers/input/tablet/wacom_wac.c
@@ -1436,6 +1436,8 @@ static struct wacom_features wacom_features_0xD2 =
1436 { "Wacom Bamboo Craft", WACOM_PKGLEN_BBFUN, 14720, 9200, 1023, 63, BAMBOO_PT }; 1436 { "Wacom Bamboo Craft", WACOM_PKGLEN_BBFUN, 14720, 9200, 1023, 63, BAMBOO_PT };
1437static struct wacom_features wacom_features_0xD3 = 1437static struct wacom_features wacom_features_0xD3 =
1438 { "Wacom Bamboo 2FG 6x8", WACOM_PKGLEN_BBFUN, 21648, 13530, 1023, 63, BAMBOO_PT }; 1438 { "Wacom Bamboo 2FG 6x8", WACOM_PKGLEN_BBFUN, 21648, 13530, 1023, 63, BAMBOO_PT };
1439static const struct wacom_features wacom_features_0xD4 =
1440 { "Wacom Bamboo Pen", WACOM_PKGLEN_BBFUN, 14720, 9200, 255, 63, BAMBOO_PT };
1439static struct wacom_features wacom_features_0xD8 = 1441static struct wacom_features wacom_features_0xD8 =
1440 { "Wacom Bamboo Comic 2FG", WACOM_PKGLEN_BBFUN, 21648, 13530, 1023, 63, BAMBOO_PT }; 1442 { "Wacom Bamboo Comic 2FG", WACOM_PKGLEN_BBFUN, 21648, 13530, 1023, 63, BAMBOO_PT };
1441static struct wacom_features wacom_features_0xDA = 1443static struct wacom_features wacom_features_0xDA =
@@ -1510,6 +1512,7 @@ const struct usb_device_id wacom_ids[] = {
1510 { USB_DEVICE_WACOM(0xD1) }, 1512 { USB_DEVICE_WACOM(0xD1) },
1511 { USB_DEVICE_WACOM(0xD2) }, 1513 { USB_DEVICE_WACOM(0xD2) },
1512 { USB_DEVICE_WACOM(0xD3) }, 1514 { USB_DEVICE_WACOM(0xD3) },
1515 { USB_DEVICE_WACOM(0xD4) },
1513 { USB_DEVICE_WACOM(0xD8) }, 1516 { USB_DEVICE_WACOM(0xD8) },
1514 { USB_DEVICE_WACOM(0xDA) }, 1517 { USB_DEVICE_WACOM(0xDA) },
1515 { USB_DEVICE_WACOM(0xDB) }, 1518 { USB_DEVICE_WACOM(0xDB) },
diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c
index 90267f8d64ee..4d705cea0f8c 100644
--- a/drivers/md/dm-table.c
+++ b/drivers/md/dm-table.c
@@ -517,9 +517,8 @@ int dm_set_device_limits(struct dm_target *ti, struct dm_dev *dev,
517 */ 517 */
518 518
519 if (q->merge_bvec_fn && !ti->type->merge) 519 if (q->merge_bvec_fn && !ti->type->merge)
520 limits->max_sectors = 520 blk_limits_max_hw_sectors(limits,
521 min_not_zero(limits->max_sectors, 521 (unsigned int) (PAGE_SIZE >> 9));
522 (unsigned int) (PAGE_SIZE >> 9));
523 return 0; 522 return 0;
524} 523}
525EXPORT_SYMBOL_GPL(dm_set_device_limits); 524EXPORT_SYMBOL_GPL(dm_set_device_limits);
@@ -1131,11 +1130,6 @@ void dm_table_set_restrictions(struct dm_table *t, struct request_queue *q,
1131 */ 1130 */
1132 q->limits = *limits; 1131 q->limits = *limits;
1133 1132
1134 if (limits->no_cluster)
1135 queue_flag_clear_unlocked(QUEUE_FLAG_CLUSTER, q);
1136 else
1137 queue_flag_set_unlocked(QUEUE_FLAG_CLUSTER, q);
1138
1139 if (!dm_table_supports_discards(t)) 1133 if (!dm_table_supports_discards(t))
1140 queue_flag_clear_unlocked(QUEUE_FLAG_DISCARD, q); 1134 queue_flag_clear_unlocked(QUEUE_FLAG_DISCARD, q);
1141 else 1135 else
diff --git a/drivers/md/md.c b/drivers/md/md.c
index e71c5fa527f5..175c424f201f 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -4295,9 +4295,6 @@ static int md_alloc(dev_t dev, char *name)
4295 goto abort; 4295 goto abort;
4296 mddev->queue->queuedata = mddev; 4296 mddev->queue->queuedata = mddev;
4297 4297
4298 /* Can be unlocked because the queue is new: no concurrency */
4299 queue_flag_set_unlocked(QUEUE_FLAG_CLUSTER, mddev->queue);
4300
4301 blk_queue_make_request(mddev->queue, md_make_request); 4298 blk_queue_make_request(mddev->queue, md_make_request);
4302 4299
4303 disk = alloc_disk(1 << shift); 4300 disk = alloc_disk(1 << shift);
diff --git a/drivers/media/common/saa7146_hlp.c b/drivers/media/common/saa7146_hlp.c
index 05bde9ccb770..1d1d8d200755 100644
--- a/drivers/media/common/saa7146_hlp.c
+++ b/drivers/media/common/saa7146_hlp.c
@@ -558,7 +558,7 @@ static void saa7146_set_window(struct saa7146_dev *dev, int width, int height, e
558static void saa7146_set_position(struct saa7146_dev *dev, int w_x, int w_y, int w_height, enum v4l2_field field, u32 pixelformat) 558static void saa7146_set_position(struct saa7146_dev *dev, int w_x, int w_y, int w_height, enum v4l2_field field, u32 pixelformat)
559{ 559{
560 struct saa7146_vv *vv = dev->vv_data; 560 struct saa7146_vv *vv = dev->vv_data;
561 struct saa7146_format *sfmt = format_by_fourcc(dev, pixelformat); 561 struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev, pixelformat);
562 562
563 int b_depth = vv->ov_fmt->depth; 563 int b_depth = vv->ov_fmt->depth;
564 int b_bpl = vv->ov_fb.fmt.bytesperline; 564 int b_bpl = vv->ov_fb.fmt.bytesperline;
@@ -702,7 +702,7 @@ static int calculate_video_dma_grab_packed(struct saa7146_dev* dev, struct saa71
702 struct saa7146_vv *vv = dev->vv_data; 702 struct saa7146_vv *vv = dev->vv_data;
703 struct saa7146_video_dma vdma1; 703 struct saa7146_video_dma vdma1;
704 704
705 struct saa7146_format *sfmt = format_by_fourcc(dev,buf->fmt->pixelformat); 705 struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev,buf->fmt->pixelformat);
706 706
707 int width = buf->fmt->width; 707 int width = buf->fmt->width;
708 int height = buf->fmt->height; 708 int height = buf->fmt->height;
@@ -827,7 +827,7 @@ static int calculate_video_dma_grab_planar(struct saa7146_dev* dev, struct saa71
827 struct saa7146_video_dma vdma2; 827 struct saa7146_video_dma vdma2;
828 struct saa7146_video_dma vdma3; 828 struct saa7146_video_dma vdma3;
829 829
830 struct saa7146_format *sfmt = format_by_fourcc(dev,buf->fmt->pixelformat); 830 struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev,buf->fmt->pixelformat);
831 831
832 int width = buf->fmt->width; 832 int width = buf->fmt->width;
833 int height = buf->fmt->height; 833 int height = buf->fmt->height;
@@ -994,7 +994,7 @@ static void program_capture_engine(struct saa7146_dev *dev, int planar)
994 994
995void saa7146_set_capture(struct saa7146_dev *dev, struct saa7146_buf *buf, struct saa7146_buf *next) 995void saa7146_set_capture(struct saa7146_dev *dev, struct saa7146_buf *buf, struct saa7146_buf *next)
996{ 996{
997 struct saa7146_format *sfmt = format_by_fourcc(dev,buf->fmt->pixelformat); 997 struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev,buf->fmt->pixelformat);
998 struct saa7146_vv *vv = dev->vv_data; 998 struct saa7146_vv *vv = dev->vv_data;
999 u32 vdma1_prot_addr; 999 u32 vdma1_prot_addr;
1000 1000
diff --git a/drivers/media/common/saa7146_video.c b/drivers/media/common/saa7146_video.c
index 741c5732b430..d246910129e8 100644
--- a/drivers/media/common/saa7146_video.c
+++ b/drivers/media/common/saa7146_video.c
@@ -84,7 +84,7 @@ static struct saa7146_format formats[] = {
84 84
85static int NUM_FORMATS = sizeof(formats)/sizeof(struct saa7146_format); 85static int NUM_FORMATS = sizeof(formats)/sizeof(struct saa7146_format);
86 86
87struct saa7146_format* format_by_fourcc(struct saa7146_dev *dev, int fourcc) 87struct saa7146_format* saa7146_format_by_fourcc(struct saa7146_dev *dev, int fourcc)
88{ 88{
89 int i, j = NUM_FORMATS; 89 int i, j = NUM_FORMATS;
90 90
@@ -266,7 +266,7 @@ static int saa7146_pgtable_build(struct saa7146_dev *dev, struct saa7146_buf *bu
266 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb); 266 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
267 struct scatterlist *list = dma->sglist; 267 struct scatterlist *list = dma->sglist;
268 int length = dma->sglen; 268 int length = dma->sglen;
269 struct saa7146_format *sfmt = format_by_fourcc(dev,buf->fmt->pixelformat); 269 struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev,buf->fmt->pixelformat);
270 270
271 DEB_EE(("dev:%p, buf:%p, sg_len:%d\n",dev,buf,length)); 271 DEB_EE(("dev:%p, buf:%p, sg_len:%d\n",dev,buf,length));
272 272
@@ -408,7 +408,7 @@ static int video_begin(struct saa7146_fh *fh)
408 } 408 }
409 } 409 }
410 410
411 fmt = format_by_fourcc(dev,fh->video_fmt.pixelformat); 411 fmt = saa7146_format_by_fourcc(dev,fh->video_fmt.pixelformat);
412 /* we need to have a valid format set here */ 412 /* we need to have a valid format set here */
413 BUG_ON(NULL == fmt); 413 BUG_ON(NULL == fmt);
414 414
@@ -460,7 +460,7 @@ static int video_end(struct saa7146_fh *fh, struct file *file)
460 return -EBUSY; 460 return -EBUSY;
461 } 461 }
462 462
463 fmt = format_by_fourcc(dev,fh->video_fmt.pixelformat); 463 fmt = saa7146_format_by_fourcc(dev,fh->video_fmt.pixelformat);
464 /* we need to have a valid format set here */ 464 /* we need to have a valid format set here */
465 BUG_ON(NULL == fmt); 465 BUG_ON(NULL == fmt);
466 466
@@ -536,7 +536,7 @@ static int vidioc_s_fbuf(struct file *file, void *fh, struct v4l2_framebuffer *f
536 return -EPERM; 536 return -EPERM;
537 537
538 /* check args */ 538 /* check args */
539 fmt = format_by_fourcc(dev, fb->fmt.pixelformat); 539 fmt = saa7146_format_by_fourcc(dev, fb->fmt.pixelformat);
540 if (NULL == fmt) 540 if (NULL == fmt)
541 return -EINVAL; 541 return -EINVAL;
542 542
@@ -760,7 +760,7 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *fh, struct v4l2_forma
760 760
761 DEB_EE(("V4L2_BUF_TYPE_VIDEO_CAPTURE: dev:%p, fh:%p\n", dev, fh)); 761 DEB_EE(("V4L2_BUF_TYPE_VIDEO_CAPTURE: dev:%p, fh:%p\n", dev, fh));
762 762
763 fmt = format_by_fourcc(dev, f->fmt.pix.pixelformat); 763 fmt = saa7146_format_by_fourcc(dev, f->fmt.pix.pixelformat);
764 if (NULL == fmt) 764 if (NULL == fmt)
765 return -EINVAL; 765 return -EINVAL;
766 766
@@ -1264,7 +1264,7 @@ static int buffer_prepare(struct videobuf_queue *q,
1264 buf->fmt = &fh->video_fmt; 1264 buf->fmt = &fh->video_fmt;
1265 buf->vb.field = fh->video_fmt.field; 1265 buf->vb.field = fh->video_fmt.field;
1266 1266
1267 sfmt = format_by_fourcc(dev,buf->fmt->pixelformat); 1267 sfmt = saa7146_format_by_fourcc(dev,buf->fmt->pixelformat);
1268 1268
1269 release_all_pagetables(dev, buf); 1269 release_all_pagetables(dev, buf);
1270 if( 0 != IS_PLANAR(sfmt->trans)) { 1270 if( 0 != IS_PLANAR(sfmt->trans)) {
@@ -1378,7 +1378,7 @@ static int video_open(struct saa7146_dev *dev, struct file *file)
1378 fh->video_fmt.pixelformat = V4L2_PIX_FMT_BGR24; 1378 fh->video_fmt.pixelformat = V4L2_PIX_FMT_BGR24;
1379 fh->video_fmt.bytesperline = 0; 1379 fh->video_fmt.bytesperline = 0;
1380 fh->video_fmt.field = V4L2_FIELD_ANY; 1380 fh->video_fmt.field = V4L2_FIELD_ANY;
1381 sfmt = format_by_fourcc(dev,fh->video_fmt.pixelformat); 1381 sfmt = saa7146_format_by_fourcc(dev,fh->video_fmt.pixelformat);
1382 fh->video_fmt.sizeimage = (fh->video_fmt.width * fh->video_fmt.height * sfmt->depth)/8; 1382 fh->video_fmt.sizeimage = (fh->video_fmt.width * fh->video_fmt.height * sfmt->depth)/8;
1383 1383
1384 videobuf_queue_sg_init(&fh->video_q, &video_qops, 1384 videobuf_queue_sg_init(&fh->video_q, &video_qops,
diff --git a/drivers/media/radio/radio-aimslab.c b/drivers/media/radio/radio-aimslab.c
index 5bf4985daede..05e832f61c3e 100644
--- a/drivers/media/radio/radio-aimslab.c
+++ b/drivers/media/radio/radio-aimslab.c
@@ -361,7 +361,7 @@ static int vidioc_s_audio(struct file *file, void *priv,
361 361
362static const struct v4l2_file_operations rtrack_fops = { 362static const struct v4l2_file_operations rtrack_fops = {
363 .owner = THIS_MODULE, 363 .owner = THIS_MODULE,
364 .ioctl = video_ioctl2, 364 .unlocked_ioctl = video_ioctl2,
365}; 365};
366 366
367static const struct v4l2_ioctl_ops rtrack_ioctl_ops = { 367static const struct v4l2_ioctl_ops rtrack_ioctl_ops = {
@@ -412,13 +412,6 @@ static int __init rtrack_init(void)
412 rt->vdev.release = video_device_release_empty; 412 rt->vdev.release = video_device_release_empty;
413 video_set_drvdata(&rt->vdev, rt); 413 video_set_drvdata(&rt->vdev, rt);
414 414
415 if (video_register_device(&rt->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
416 v4l2_device_unregister(&rt->v4l2_dev);
417 release_region(rt->io, 2);
418 return -EINVAL;
419 }
420 v4l2_info(v4l2_dev, "AIMSlab RadioTrack/RadioReveal card driver.\n");
421
422 /* Set up the I/O locking */ 415 /* Set up the I/O locking */
423 416
424 mutex_init(&rt->lock); 417 mutex_init(&rt->lock);
@@ -430,6 +423,13 @@ static int __init rtrack_init(void)
430 sleep_delay(2000000); /* make sure it's totally down */ 423 sleep_delay(2000000); /* make sure it's totally down */
431 outb(0xc0, rt->io); /* steady volume, mute card */ 424 outb(0xc0, rt->io); /* steady volume, mute card */
432 425
426 if (video_register_device(&rt->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
427 v4l2_device_unregister(&rt->v4l2_dev);
428 release_region(rt->io, 2);
429 return -EINVAL;
430 }
431 v4l2_info(v4l2_dev, "AIMSlab RadioTrack/RadioReveal card driver.\n");
432
433 return 0; 433 return 0;
434} 434}
435 435
diff --git a/drivers/media/radio/radio-aztech.c b/drivers/media/radio/radio-aztech.c
index c22311393624..dd8a6ab0d437 100644
--- a/drivers/media/radio/radio-aztech.c
+++ b/drivers/media/radio/radio-aztech.c
@@ -324,7 +324,7 @@ static int vidioc_s_ctrl(struct file *file, void *priv,
324 324
325static const struct v4l2_file_operations aztech_fops = { 325static const struct v4l2_file_operations aztech_fops = {
326 .owner = THIS_MODULE, 326 .owner = THIS_MODULE,
327 .ioctl = video_ioctl2, 327 .unlocked_ioctl = video_ioctl2,
328}; 328};
329 329
330static const struct v4l2_ioctl_ops aztech_ioctl_ops = { 330static const struct v4l2_ioctl_ops aztech_ioctl_ops = {
@@ -375,6 +375,8 @@ static int __init aztech_init(void)
375 az->vdev.ioctl_ops = &aztech_ioctl_ops; 375 az->vdev.ioctl_ops = &aztech_ioctl_ops;
376 az->vdev.release = video_device_release_empty; 376 az->vdev.release = video_device_release_empty;
377 video_set_drvdata(&az->vdev, az); 377 video_set_drvdata(&az->vdev, az);
378 /* mute card - prevents noisy bootups */
379 outb(0, az->io);
378 380
379 if (video_register_device(&az->vdev, VFL_TYPE_RADIO, radio_nr) < 0) { 381 if (video_register_device(&az->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
380 v4l2_device_unregister(v4l2_dev); 382 v4l2_device_unregister(v4l2_dev);
@@ -383,8 +385,6 @@ static int __init aztech_init(void)
383 } 385 }
384 386
385 v4l2_info(v4l2_dev, "Aztech radio card driver v1.00/19990224 rkroll@exploits.org\n"); 387 v4l2_info(v4l2_dev, "Aztech radio card driver v1.00/19990224 rkroll@exploits.org\n");
386 /* mute card - prevents noisy bootups */
387 outb(0, az->io);
388 return 0; 388 return 0;
389} 389}
390 390
diff --git a/drivers/media/radio/radio-cadet.c b/drivers/media/radio/radio-cadet.c
index b701ea6e7c73..bc9ad0897c55 100644
--- a/drivers/media/radio/radio-cadet.c
+++ b/drivers/media/radio/radio-cadet.c
@@ -328,11 +328,10 @@ static ssize_t cadet_read(struct file *file, char __user *data, size_t count, lo
328 unsigned char readbuf[RDS_BUFFER]; 328 unsigned char readbuf[RDS_BUFFER];
329 int i = 0; 329 int i = 0;
330 330
331 mutex_lock(&dev->lock);
331 if (dev->rdsstat == 0) { 332 if (dev->rdsstat == 0) {
332 mutex_lock(&dev->lock);
333 dev->rdsstat = 1; 333 dev->rdsstat = 1;
334 outb(0x80, dev->io); /* Select RDS fifo */ 334 outb(0x80, dev->io); /* Select RDS fifo */
335 mutex_unlock(&dev->lock);
336 init_timer(&dev->readtimer); 335 init_timer(&dev->readtimer);
337 dev->readtimer.function = cadet_handler; 336 dev->readtimer.function = cadet_handler;
338 dev->readtimer.data = (unsigned long)dev; 337 dev->readtimer.data = (unsigned long)dev;
@@ -340,12 +339,15 @@ static ssize_t cadet_read(struct file *file, char __user *data, size_t count, lo
340 add_timer(&dev->readtimer); 339 add_timer(&dev->readtimer);
341 } 340 }
342 if (dev->rdsin == dev->rdsout) { 341 if (dev->rdsin == dev->rdsout) {
342 mutex_unlock(&dev->lock);
343 if (file->f_flags & O_NONBLOCK) 343 if (file->f_flags & O_NONBLOCK)
344 return -EWOULDBLOCK; 344 return -EWOULDBLOCK;
345 interruptible_sleep_on(&dev->read_queue); 345 interruptible_sleep_on(&dev->read_queue);
346 mutex_lock(&dev->lock);
346 } 347 }
347 while (i < count && dev->rdsin != dev->rdsout) 348 while (i < count && dev->rdsin != dev->rdsout)
348 readbuf[i++] = dev->rdsbuf[dev->rdsout++]; 349 readbuf[i++] = dev->rdsbuf[dev->rdsout++];
350 mutex_unlock(&dev->lock);
349 351
350 if (copy_to_user(data, readbuf, i)) 352 if (copy_to_user(data, readbuf, i))
351 return -EFAULT; 353 return -EFAULT;
@@ -525,9 +527,11 @@ static int cadet_open(struct file *file)
525{ 527{
526 struct cadet *dev = video_drvdata(file); 528 struct cadet *dev = video_drvdata(file);
527 529
530 mutex_lock(&dev->lock);
528 dev->users++; 531 dev->users++;
529 if (1 == dev->users) 532 if (1 == dev->users)
530 init_waitqueue_head(&dev->read_queue); 533 init_waitqueue_head(&dev->read_queue);
534 mutex_unlock(&dev->lock);
531 return 0; 535 return 0;
532} 536}
533 537
@@ -535,11 +539,13 @@ static int cadet_release(struct file *file)
535{ 539{
536 struct cadet *dev = video_drvdata(file); 540 struct cadet *dev = video_drvdata(file);
537 541
542 mutex_lock(&dev->lock);
538 dev->users--; 543 dev->users--;
539 if (0 == dev->users) { 544 if (0 == dev->users) {
540 del_timer_sync(&dev->readtimer); 545 del_timer_sync(&dev->readtimer);
541 dev->rdsstat = 0; 546 dev->rdsstat = 0;
542 } 547 }
548 mutex_unlock(&dev->lock);
543 return 0; 549 return 0;
544} 550}
545 551
@@ -559,7 +565,7 @@ static const struct v4l2_file_operations cadet_fops = {
559 .open = cadet_open, 565 .open = cadet_open,
560 .release = cadet_release, 566 .release = cadet_release,
561 .read = cadet_read, 567 .read = cadet_read,
562 .ioctl = video_ioctl2, 568 .unlocked_ioctl = video_ioctl2,
563 .poll = cadet_poll, 569 .poll = cadet_poll,
564}; 570};
565 571
diff --git a/drivers/media/radio/radio-gemtek-pci.c b/drivers/media/radio/radio-gemtek-pci.c
index 79039674a0e0..28fa85ba2087 100644
--- a/drivers/media/radio/radio-gemtek-pci.c
+++ b/drivers/media/radio/radio-gemtek-pci.c
@@ -361,7 +361,7 @@ MODULE_DEVICE_TABLE(pci, gemtek_pci_id);
361 361
362static const struct v4l2_file_operations gemtek_pci_fops = { 362static const struct v4l2_file_operations gemtek_pci_fops = {
363 .owner = THIS_MODULE, 363 .owner = THIS_MODULE,
364 .ioctl = video_ioctl2, 364 .unlocked_ioctl = video_ioctl2,
365}; 365};
366 366
367static const struct v4l2_ioctl_ops gemtek_pci_ioctl_ops = { 367static const struct v4l2_ioctl_ops gemtek_pci_ioctl_ops = {
@@ -422,11 +422,11 @@ static int __devinit gemtek_pci_probe(struct pci_dev *pdev, const struct pci_dev
422 card->vdev.release = video_device_release_empty; 422 card->vdev.release = video_device_release_empty;
423 video_set_drvdata(&card->vdev, card); 423 video_set_drvdata(&card->vdev, card);
424 424
425 gemtek_pci_mute(card);
426
425 if (video_register_device(&card->vdev, VFL_TYPE_RADIO, nr_radio) < 0) 427 if (video_register_device(&card->vdev, VFL_TYPE_RADIO, nr_radio) < 0)
426 goto err_video; 428 goto err_video;
427 429
428 gemtek_pci_mute(card);
429
430 v4l2_info(v4l2_dev, "Gemtek PCI Radio (rev. %d) found at 0x%04x-0x%04x.\n", 430 v4l2_info(v4l2_dev, "Gemtek PCI Radio (rev. %d) found at 0x%04x-0x%04x.\n",
431 pdev->revision, card->iobase, card->iobase + card->length - 1); 431 pdev->revision, card->iobase, card->iobase + card->length - 1);
432 432
diff --git a/drivers/media/radio/radio-gemtek.c b/drivers/media/radio/radio-gemtek.c
index 73985f641f07..259936422e49 100644
--- a/drivers/media/radio/radio-gemtek.c
+++ b/drivers/media/radio/radio-gemtek.c
@@ -378,7 +378,7 @@ static int gemtek_probe(struct gemtek *gt)
378 378
379static const struct v4l2_file_operations gemtek_fops = { 379static const struct v4l2_file_operations gemtek_fops = {
380 .owner = THIS_MODULE, 380 .owner = THIS_MODULE,
381 .ioctl = video_ioctl2, 381 .unlocked_ioctl = video_ioctl2,
382}; 382};
383 383
384static int vidioc_querycap(struct file *file, void *priv, 384static int vidioc_querycap(struct file *file, void *priv,
@@ -577,12 +577,6 @@ static int __init gemtek_init(void)
577 gt->vdev.release = video_device_release_empty; 577 gt->vdev.release = video_device_release_empty;
578 video_set_drvdata(&gt->vdev, gt); 578 video_set_drvdata(&gt->vdev, gt);
579 579
580 if (video_register_device(&gt->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
581 v4l2_device_unregister(v4l2_dev);
582 release_region(gt->io, 1);
583 return -EBUSY;
584 }
585
586 /* Set defaults */ 580 /* Set defaults */
587 gt->lastfreq = GEMTEK_LOWFREQ; 581 gt->lastfreq = GEMTEK_LOWFREQ;
588 gt->bu2614data = 0; 582 gt->bu2614data = 0;
@@ -590,6 +584,12 @@ static int __init gemtek_init(void)
590 if (initmute) 584 if (initmute)
591 gemtek_mute(gt); 585 gemtek_mute(gt);
592 586
587 if (video_register_device(&gt->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
588 v4l2_device_unregister(v4l2_dev);
589 release_region(gt->io, 1);
590 return -EBUSY;
591 }
592
593 return 0; 593 return 0;
594} 594}
595 595
diff --git a/drivers/media/radio/radio-maestro.c b/drivers/media/radio/radio-maestro.c
index 08f1051979ca..6af61bfeb178 100644
--- a/drivers/media/radio/radio-maestro.c
+++ b/drivers/media/radio/radio-maestro.c
@@ -299,7 +299,7 @@ static int vidioc_s_audio(struct file *file, void *priv,
299 299
300static const struct v4l2_file_operations maestro_fops = { 300static const struct v4l2_file_operations maestro_fops = {
301 .owner = THIS_MODULE, 301 .owner = THIS_MODULE,
302 .ioctl = video_ioctl2, 302 .unlocked_ioctl = video_ioctl2,
303}; 303};
304 304
305static const struct v4l2_ioctl_ops maestro_ioctl_ops = { 305static const struct v4l2_ioctl_ops maestro_ioctl_ops = {
@@ -383,22 +383,20 @@ static int __devinit maestro_probe(struct pci_dev *pdev,
383 dev->vdev.release = video_device_release_empty; 383 dev->vdev.release = video_device_release_empty;
384 video_set_drvdata(&dev->vdev, dev); 384 video_set_drvdata(&dev->vdev, dev);
385 385
386 if (!radio_power_on(dev)) {
387 retval = -EIO;
388 goto errfr1;
389 }
390
386 retval = video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr); 391 retval = video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr);
387 if (retval) { 392 if (retval) {
388 v4l2_err(v4l2_dev, "can't register video device!\n"); 393 v4l2_err(v4l2_dev, "can't register video device!\n");
389 goto errfr1; 394 goto errfr1;
390 } 395 }
391 396
392 if (!radio_power_on(dev)) {
393 retval = -EIO;
394 goto errunr;
395 }
396
397 v4l2_info(v4l2_dev, "version " DRIVER_VERSION "\n"); 397 v4l2_info(v4l2_dev, "version " DRIVER_VERSION "\n");
398 398
399 return 0; 399 return 0;
400errunr:
401 video_unregister_device(&dev->vdev);
402errfr1: 400errfr1:
403 v4l2_device_unregister(v4l2_dev); 401 v4l2_device_unregister(v4l2_dev);
404errfr: 402errfr:
diff --git a/drivers/media/radio/radio-maxiradio.c b/drivers/media/radio/radio-maxiradio.c
index 255d40df4b46..6459a220b0dd 100644
--- a/drivers/media/radio/radio-maxiradio.c
+++ b/drivers/media/radio/radio-maxiradio.c
@@ -346,7 +346,7 @@ static int vidioc_s_ctrl(struct file *file, void *priv,
346 346
347static const struct v4l2_file_operations maxiradio_fops = { 347static const struct v4l2_file_operations maxiradio_fops = {
348 .owner = THIS_MODULE, 348 .owner = THIS_MODULE,
349 .ioctl = video_ioctl2, 349 .unlocked_ioctl = video_ioctl2,
350}; 350};
351 351
352static const struct v4l2_ioctl_ops maxiradio_ioctl_ops = { 352static const struct v4l2_ioctl_ops maxiradio_ioctl_ops = {
diff --git a/drivers/media/radio/radio-miropcm20.c b/drivers/media/radio/radio-miropcm20.c
index 4ff885445fd4..3fb76e3834c9 100644
--- a/drivers/media/radio/radio-miropcm20.c
+++ b/drivers/media/radio/radio-miropcm20.c
@@ -33,6 +33,7 @@ struct pcm20 {
33 unsigned long freq; 33 unsigned long freq;
34 int muted; 34 int muted;
35 struct snd_miro_aci *aci; 35 struct snd_miro_aci *aci;
36 struct mutex lock;
36}; 37};
37 38
38static struct pcm20 pcm20_card = { 39static struct pcm20 pcm20_card = {
@@ -72,7 +73,7 @@ static int pcm20_setfreq(struct pcm20 *dev, unsigned long freq)
72 73
73static const struct v4l2_file_operations pcm20_fops = { 74static const struct v4l2_file_operations pcm20_fops = {
74 .owner = THIS_MODULE, 75 .owner = THIS_MODULE,
75 .ioctl = video_ioctl2, 76 .unlocked_ioctl = video_ioctl2,
76}; 77};
77 78
78static int vidioc_querycap(struct file *file, void *priv, 79static int vidioc_querycap(struct file *file, void *priv,
@@ -229,7 +230,7 @@ static int __init pcm20_init(void)
229 return -ENODEV; 230 return -ENODEV;
230 } 231 }
231 strlcpy(v4l2_dev->name, "miropcm20", sizeof(v4l2_dev->name)); 232 strlcpy(v4l2_dev->name, "miropcm20", sizeof(v4l2_dev->name));
232 233 mutex_init(&dev->lock);
233 234
234 res = v4l2_device_register(NULL, v4l2_dev); 235 res = v4l2_device_register(NULL, v4l2_dev);
235 if (res < 0) { 236 if (res < 0) {
@@ -242,6 +243,7 @@ static int __init pcm20_init(void)
242 dev->vdev.fops = &pcm20_fops; 243 dev->vdev.fops = &pcm20_fops;
243 dev->vdev.ioctl_ops = &pcm20_ioctl_ops; 244 dev->vdev.ioctl_ops = &pcm20_ioctl_ops;
244 dev->vdev.release = video_device_release_empty; 245 dev->vdev.release = video_device_release_empty;
246 dev->vdev.lock = &dev->lock;
245 video_set_drvdata(&dev->vdev, dev); 247 video_set_drvdata(&dev->vdev, dev);
246 248
247 if (video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr) < 0) 249 if (video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr) < 0)
diff --git a/drivers/media/radio/radio-rtrack2.c b/drivers/media/radio/radio-rtrack2.c
index a79296aac9a9..8d6ea591bd18 100644
--- a/drivers/media/radio/radio-rtrack2.c
+++ b/drivers/media/radio/radio-rtrack2.c
@@ -266,7 +266,7 @@ static int vidioc_s_audio(struct file *file, void *priv,
266 266
267static const struct v4l2_file_operations rtrack2_fops = { 267static const struct v4l2_file_operations rtrack2_fops = {
268 .owner = THIS_MODULE, 268 .owner = THIS_MODULE,
269 .ioctl = video_ioctl2, 269 .unlocked_ioctl = video_ioctl2,
270}; 270};
271 271
272static const struct v4l2_ioctl_ops rtrack2_ioctl_ops = { 272static const struct v4l2_ioctl_ops rtrack2_ioctl_ops = {
@@ -315,6 +315,10 @@ static int __init rtrack2_init(void)
315 dev->vdev.release = video_device_release_empty; 315 dev->vdev.release = video_device_release_empty;
316 video_set_drvdata(&dev->vdev, dev); 316 video_set_drvdata(&dev->vdev, dev);
317 317
318 /* mute card - prevents noisy bootups */
319 outb(1, dev->io);
320 dev->muted = 1;
321
318 mutex_init(&dev->lock); 322 mutex_init(&dev->lock);
319 if (video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr) < 0) { 323 if (video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
320 v4l2_device_unregister(v4l2_dev); 324 v4l2_device_unregister(v4l2_dev);
@@ -324,10 +328,6 @@ static int __init rtrack2_init(void)
324 328
325 v4l2_info(v4l2_dev, "AIMSlab Radiotrack II card driver.\n"); 329 v4l2_info(v4l2_dev, "AIMSlab Radiotrack II card driver.\n");
326 330
327 /* mute card - prevents noisy bootups */
328 outb(1, dev->io);
329 dev->muted = 1;
330
331 return 0; 331 return 0;
332} 332}
333 333
diff --git a/drivers/media/radio/radio-sf16fmi.c b/drivers/media/radio/radio-sf16fmi.c
index 985359d18aa5..b5a5f89e238a 100644
--- a/drivers/media/radio/radio-sf16fmi.c
+++ b/drivers/media/radio/radio-sf16fmi.c
@@ -260,7 +260,7 @@ static int vidioc_s_audio(struct file *file, void *priv,
260 260
261static const struct v4l2_file_operations fmi_fops = { 261static const struct v4l2_file_operations fmi_fops = {
262 .owner = THIS_MODULE, 262 .owner = THIS_MODULE,
263 .ioctl = video_ioctl2, 263 .unlocked_ioctl = video_ioctl2,
264}; 264};
265 265
266static const struct v4l2_ioctl_ops fmi_ioctl_ops = { 266static const struct v4l2_ioctl_ops fmi_ioctl_ops = {
@@ -382,6 +382,9 @@ static int __init fmi_init(void)
382 382
383 mutex_init(&fmi->lock); 383 mutex_init(&fmi->lock);
384 384
385 /* mute card - prevents noisy bootups */
386 fmi_mute(fmi);
387
385 if (video_register_device(&fmi->vdev, VFL_TYPE_RADIO, radio_nr) < 0) { 388 if (video_register_device(&fmi->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
386 v4l2_device_unregister(v4l2_dev); 389 v4l2_device_unregister(v4l2_dev);
387 release_region(fmi->io, 2); 390 release_region(fmi->io, 2);
@@ -391,8 +394,6 @@ static int __init fmi_init(void)
391 } 394 }
392 395
393 v4l2_info(v4l2_dev, "card driver at 0x%x\n", fmi->io); 396 v4l2_info(v4l2_dev, "card driver at 0x%x\n", fmi->io);
394 /* mute card - prevents noisy bootups */
395 fmi_mute(fmi);
396 return 0; 397 return 0;
397} 398}
398 399
diff --git a/drivers/media/radio/radio-sf16fmr2.c b/drivers/media/radio/radio-sf16fmr2.c
index 52c7bbb32b8b..dc3f04c52d5e 100644
--- a/drivers/media/radio/radio-sf16fmr2.c
+++ b/drivers/media/radio/radio-sf16fmr2.c
@@ -376,7 +376,7 @@ static int vidioc_s_audio(struct file *file, void *priv,
376 376
377static const struct v4l2_file_operations fmr2_fops = { 377static const struct v4l2_file_operations fmr2_fops = {
378 .owner = THIS_MODULE, 378 .owner = THIS_MODULE,
379 .ioctl = video_ioctl2, 379 .unlocked_ioctl = video_ioctl2,
380}; 380};
381 381
382static const struct v4l2_ioctl_ops fmr2_ioctl_ops = { 382static const struct v4l2_ioctl_ops fmr2_ioctl_ops = {
@@ -424,6 +424,10 @@ static int __init fmr2_init(void)
424 fmr2->vdev.release = video_device_release_empty; 424 fmr2->vdev.release = video_device_release_empty;
425 video_set_drvdata(&fmr2->vdev, fmr2); 425 video_set_drvdata(&fmr2->vdev, fmr2);
426 426
427 /* mute card - prevents noisy bootups */
428 fmr2_mute(fmr2->io);
429 fmr2_product_info(fmr2);
430
427 if (video_register_device(&fmr2->vdev, VFL_TYPE_RADIO, radio_nr) < 0) { 431 if (video_register_device(&fmr2->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
428 v4l2_device_unregister(v4l2_dev); 432 v4l2_device_unregister(v4l2_dev);
429 release_region(fmr2->io, 2); 433 release_region(fmr2->io, 2);
@@ -431,11 +435,6 @@ static int __init fmr2_init(void)
431 } 435 }
432 436
433 v4l2_info(v4l2_dev, "SF16FMR2 radio card driver at 0x%x.\n", fmr2->io); 437 v4l2_info(v4l2_dev, "SF16FMR2 radio card driver at 0x%x.\n", fmr2->io);
434 /* mute card - prevents noisy bootups */
435 mutex_lock(&fmr2->lock);
436 fmr2_mute(fmr2->io);
437 fmr2_product_info(fmr2);
438 mutex_unlock(&fmr2->lock);
439 debug_print((KERN_DEBUG "card_type %d\n", fmr2->card_type)); 438 debug_print((KERN_DEBUG "card_type %d\n", fmr2->card_type));
440 return 0; 439 return 0;
441} 440}
diff --git a/drivers/media/radio/radio-si4713.c b/drivers/media/radio/radio-si4713.c
index 03829e6818bd..726d367ad8d0 100644
--- a/drivers/media/radio/radio-si4713.c
+++ b/drivers/media/radio/radio-si4713.c
@@ -53,7 +53,8 @@ struct radio_si4713_device {
53/* radio_si4713_fops - file operations interface */ 53/* radio_si4713_fops - file operations interface */
54static const struct v4l2_file_operations radio_si4713_fops = { 54static const struct v4l2_file_operations radio_si4713_fops = {
55 .owner = THIS_MODULE, 55 .owner = THIS_MODULE,
56 .ioctl = video_ioctl2, 56 /* Note: locking is done at the subdev level in the i2c driver. */
57 .unlocked_ioctl = video_ioctl2,
57}; 58};
58 59
59/* Video4Linux Interface */ 60/* Video4Linux Interface */
diff --git a/drivers/media/radio/radio-tea5764.c b/drivers/media/radio/radio-tea5764.c
index 789d2ec66e19..0e71d816c725 100644
--- a/drivers/media/radio/radio-tea5764.c
+++ b/drivers/media/radio/radio-tea5764.c
@@ -142,7 +142,6 @@ struct tea5764_device {
142 struct video_device *videodev; 142 struct video_device *videodev;
143 struct tea5764_regs regs; 143 struct tea5764_regs regs;
144 struct mutex mutex; 144 struct mutex mutex;
145 int users;
146}; 145};
147 146
148/* I2C code related */ 147/* I2C code related */
@@ -458,41 +457,10 @@ static int vidioc_s_audio(struct file *file, void *priv,
458 return 0; 457 return 0;
459} 458}
460 459
461static int tea5764_open(struct file *file)
462{
463 /* Currently we support only one device */
464 struct tea5764_device *radio = video_drvdata(file);
465
466 mutex_lock(&radio->mutex);
467 /* Only exclusive access */
468 if (radio->users) {
469 mutex_unlock(&radio->mutex);
470 return -EBUSY;
471 }
472 radio->users++;
473 mutex_unlock(&radio->mutex);
474 file->private_data = radio;
475 return 0;
476}
477
478static int tea5764_close(struct file *file)
479{
480 struct tea5764_device *radio = video_drvdata(file);
481
482 if (!radio)
483 return -ENODEV;
484 mutex_lock(&radio->mutex);
485 radio->users--;
486 mutex_unlock(&radio->mutex);
487 return 0;
488}
489
490/* File system interface */ 460/* File system interface */
491static const struct v4l2_file_operations tea5764_fops = { 461static const struct v4l2_file_operations tea5764_fops = {
492 .owner = THIS_MODULE, 462 .owner = THIS_MODULE,
493 .open = tea5764_open, 463 .unlocked_ioctl = video_ioctl2,
494 .release = tea5764_close,
495 .ioctl = video_ioctl2,
496}; 464};
497 465
498static const struct v4l2_ioctl_ops tea5764_ioctl_ops = { 466static const struct v4l2_ioctl_ops tea5764_ioctl_ops = {
@@ -527,7 +495,7 @@ static int __devinit tea5764_i2c_probe(struct i2c_client *client,
527 int ret; 495 int ret;
528 496
529 PDEBUG("probe"); 497 PDEBUG("probe");
530 radio = kmalloc(sizeof(struct tea5764_device), GFP_KERNEL); 498 radio = kzalloc(sizeof(struct tea5764_device), GFP_KERNEL);
531 if (!radio) 499 if (!radio)
532 return -ENOMEM; 500 return -ENOMEM;
533 501
@@ -555,12 +523,7 @@ static int __devinit tea5764_i2c_probe(struct i2c_client *client,
555 523
556 i2c_set_clientdata(client, radio); 524 i2c_set_clientdata(client, radio);
557 video_set_drvdata(radio->videodev, radio); 525 video_set_drvdata(radio->videodev, radio);
558 526 radio->videodev->lock = &radio->mutex;
559 ret = video_register_device(radio->videodev, VFL_TYPE_RADIO, radio_nr);
560 if (ret < 0) {
561 PWARN("Could not register video device!");
562 goto errrel;
563 }
564 527
565 /* initialize and power off the chip */ 528 /* initialize and power off the chip */
566 tea5764_i2c_read(radio); 529 tea5764_i2c_read(radio);
@@ -568,6 +531,12 @@ static int __devinit tea5764_i2c_probe(struct i2c_client *client,
568 tea5764_mute(radio, 1); 531 tea5764_mute(radio, 1);
569 tea5764_power_down(radio); 532 tea5764_power_down(radio);
570 533
534 ret = video_register_device(radio->videodev, VFL_TYPE_RADIO, radio_nr);
535 if (ret < 0) {
536 PWARN("Could not register video device!");
537 goto errrel;
538 }
539
571 PINFO("registered."); 540 PINFO("registered.");
572 return 0; 541 return 0;
573errrel: 542errrel:
diff --git a/drivers/media/radio/radio-terratec.c b/drivers/media/radio/radio-terratec.c
index fc1c860fd438..a32663917059 100644
--- a/drivers/media/radio/radio-terratec.c
+++ b/drivers/media/radio/radio-terratec.c
@@ -338,7 +338,7 @@ static int vidioc_s_audio(struct file *file, void *priv,
338 338
339static const struct v4l2_file_operations terratec_fops = { 339static const struct v4l2_file_operations terratec_fops = {
340 .owner = THIS_MODULE, 340 .owner = THIS_MODULE,
341 .ioctl = video_ioctl2, 341 .unlocked_ioctl = video_ioctl2,
342}; 342};
343 343
344static const struct v4l2_ioctl_ops terratec_ioctl_ops = { 344static const struct v4l2_ioctl_ops terratec_ioctl_ops = {
@@ -389,6 +389,9 @@ static int __init terratec_init(void)
389 389
390 mutex_init(&tt->lock); 390 mutex_init(&tt->lock);
391 391
392 /* mute card - prevents noisy bootups */
393 tt_write_vol(tt, 0);
394
392 if (video_register_device(&tt->vdev, VFL_TYPE_RADIO, radio_nr) < 0) { 395 if (video_register_device(&tt->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
393 v4l2_device_unregister(&tt->v4l2_dev); 396 v4l2_device_unregister(&tt->v4l2_dev);
394 release_region(tt->io, 2); 397 release_region(tt->io, 2);
@@ -396,9 +399,6 @@ static int __init terratec_init(void)
396 } 399 }
397 400
398 v4l2_info(v4l2_dev, "TERRATEC ActivRadio Standalone card driver.\n"); 401 v4l2_info(v4l2_dev, "TERRATEC ActivRadio Standalone card driver.\n");
399
400 /* mute card - prevents noisy bootups */
401 tt_write_vol(tt, 0);
402 return 0; 402 return 0;
403} 403}
404 404
diff --git a/drivers/media/radio/radio-timb.c b/drivers/media/radio/radio-timb.c
index b8bb3ef47df5..a185610b376b 100644
--- a/drivers/media/radio/radio-timb.c
+++ b/drivers/media/radio/radio-timb.c
@@ -34,6 +34,7 @@ struct timbradio {
34 struct v4l2_subdev *sd_dsp; 34 struct v4l2_subdev *sd_dsp;
35 struct video_device video_dev; 35 struct video_device video_dev;
36 struct v4l2_device v4l2_dev; 36 struct v4l2_device v4l2_dev;
37 struct mutex lock;
37}; 38};
38 39
39 40
@@ -142,7 +143,7 @@ static const struct v4l2_ioctl_ops timbradio_ioctl_ops = {
142 143
143static const struct v4l2_file_operations timbradio_fops = { 144static const struct v4l2_file_operations timbradio_fops = {
144 .owner = THIS_MODULE, 145 .owner = THIS_MODULE,
145 .ioctl = video_ioctl2, 146 .unlocked_ioctl = video_ioctl2,
146}; 147};
147 148
148static int __devinit timbradio_probe(struct platform_device *pdev) 149static int __devinit timbradio_probe(struct platform_device *pdev)
@@ -164,6 +165,7 @@ static int __devinit timbradio_probe(struct platform_device *pdev)
164 } 165 }
165 166
166 tr->pdata = *pdata; 167 tr->pdata = *pdata;
168 mutex_init(&tr->lock);
167 169
168 strlcpy(tr->video_dev.name, "Timberdale Radio", 170 strlcpy(tr->video_dev.name, "Timberdale Radio",
169 sizeof(tr->video_dev.name)); 171 sizeof(tr->video_dev.name));
@@ -171,6 +173,7 @@ static int __devinit timbradio_probe(struct platform_device *pdev)
171 tr->video_dev.ioctl_ops = &timbradio_ioctl_ops; 173 tr->video_dev.ioctl_ops = &timbradio_ioctl_ops;
172 tr->video_dev.release = video_device_release_empty; 174 tr->video_dev.release = video_device_release_empty;
173 tr->video_dev.minor = -1; 175 tr->video_dev.minor = -1;
176 tr->video_dev.lock = &tr->lock;
174 177
175 strlcpy(tr->v4l2_dev.name, DRIVER_NAME, sizeof(tr->v4l2_dev.name)); 178 strlcpy(tr->v4l2_dev.name, DRIVER_NAME, sizeof(tr->v4l2_dev.name));
176 err = v4l2_device_register(NULL, &tr->v4l2_dev); 179 err = v4l2_device_register(NULL, &tr->v4l2_dev);
diff --git a/drivers/media/radio/radio-trust.c b/drivers/media/radio/radio-trust.c
index 9d6dcf8af5b0..22fa9cc28abe 100644
--- a/drivers/media/radio/radio-trust.c
+++ b/drivers/media/radio/radio-trust.c
@@ -344,7 +344,7 @@ static int vidioc_s_audio(struct file *file, void *priv,
344 344
345static const struct v4l2_file_operations trust_fops = { 345static const struct v4l2_file_operations trust_fops = {
346 .owner = THIS_MODULE, 346 .owner = THIS_MODULE,
347 .ioctl = video_ioctl2, 347 .unlocked_ioctl = video_ioctl2,
348}; 348};
349 349
350static const struct v4l2_ioctl_ops trust_ioctl_ops = { 350static const struct v4l2_ioctl_ops trust_ioctl_ops = {
@@ -396,14 +396,6 @@ static int __init trust_init(void)
396 tr->vdev.release = video_device_release_empty; 396 tr->vdev.release = video_device_release_empty;
397 video_set_drvdata(&tr->vdev, tr); 397 video_set_drvdata(&tr->vdev, tr);
398 398
399 if (video_register_device(&tr->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
400 v4l2_device_unregister(v4l2_dev);
401 release_region(tr->io, 2);
402 return -EINVAL;
403 }
404
405 v4l2_info(v4l2_dev, "Trust FM Radio card driver v1.0.\n");
406
407 write_i2c(tr, 2, TDA7318_ADDR, 0x80); /* speaker att. LF = 0 dB */ 399 write_i2c(tr, 2, TDA7318_ADDR, 0x80); /* speaker att. LF = 0 dB */
408 write_i2c(tr, 2, TDA7318_ADDR, 0xa0); /* speaker att. RF = 0 dB */ 400 write_i2c(tr, 2, TDA7318_ADDR, 0xa0); /* speaker att. RF = 0 dB */
409 write_i2c(tr, 2, TDA7318_ADDR, 0xc0); /* speaker att. LR = 0 dB */ 401 write_i2c(tr, 2, TDA7318_ADDR, 0xc0); /* speaker att. LR = 0 dB */
@@ -418,6 +410,14 @@ static int __init trust_init(void)
418 /* mute card - prevents noisy bootups */ 410 /* mute card - prevents noisy bootups */
419 tr_setmute(tr, 1); 411 tr_setmute(tr, 1);
420 412
413 if (video_register_device(&tr->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
414 v4l2_device_unregister(v4l2_dev);
415 release_region(tr->io, 2);
416 return -EINVAL;
417 }
418
419 v4l2_info(v4l2_dev, "Trust FM Radio card driver v1.0.\n");
420
421 return 0; 421 return 0;
422} 422}
423 423
diff --git a/drivers/media/radio/radio-typhoon.c b/drivers/media/radio/radio-typhoon.c
index b1f630527dc1..8dbbf08f2207 100644
--- a/drivers/media/radio/radio-typhoon.c
+++ b/drivers/media/radio/radio-typhoon.c
@@ -317,7 +317,7 @@ static int vidioc_log_status(struct file *file, void *priv)
317 317
318static const struct v4l2_file_operations typhoon_fops = { 318static const struct v4l2_file_operations typhoon_fops = {
319 .owner = THIS_MODULE, 319 .owner = THIS_MODULE,
320 .ioctl = video_ioctl2, 320 .unlocked_ioctl = video_ioctl2,
321}; 321};
322 322
323static const struct v4l2_ioctl_ops typhoon_ioctl_ops = { 323static const struct v4l2_ioctl_ops typhoon_ioctl_ops = {
@@ -344,18 +344,18 @@ static int __init typhoon_init(void)
344 344
345 strlcpy(v4l2_dev->name, "typhoon", sizeof(v4l2_dev->name)); 345 strlcpy(v4l2_dev->name, "typhoon", sizeof(v4l2_dev->name));
346 dev->io = io; 346 dev->io = io;
347 dev->curfreq = dev->mutefreq = mutefreq;
348 347
349 if (dev->io == -1) { 348 if (dev->io == -1) {
350 v4l2_err(v4l2_dev, "You must set an I/O address with io=0x316 or io=0x336\n"); 349 v4l2_err(v4l2_dev, "You must set an I/O address with io=0x316 or io=0x336\n");
351 return -EINVAL; 350 return -EINVAL;
352 } 351 }
353 352
354 if (dev->mutefreq < 87000 || dev->mutefreq > 108500) { 353 if (mutefreq < 87000 || mutefreq > 108500) {
355 v4l2_err(v4l2_dev, "You must set a frequency (in kHz) used when muting the card,\n"); 354 v4l2_err(v4l2_dev, "You must set a frequency (in kHz) used when muting the card,\n");
356 v4l2_err(v4l2_dev, "e.g. with \"mutefreq=87500\" (87000 <= mutefreq <= 108500)\n"); 355 v4l2_err(v4l2_dev, "e.g. with \"mutefreq=87500\" (87000 <= mutefreq <= 108500)\n");
357 return -EINVAL; 356 return -EINVAL;
358 } 357 }
358 dev->curfreq = dev->mutefreq = mutefreq << 4;
359 359
360 mutex_init(&dev->lock); 360 mutex_init(&dev->lock);
361 if (!request_region(dev->io, 8, "typhoon")) { 361 if (!request_region(dev->io, 8, "typhoon")) {
@@ -378,17 +378,17 @@ static int __init typhoon_init(void)
378 dev->vdev.ioctl_ops = &typhoon_ioctl_ops; 378 dev->vdev.ioctl_ops = &typhoon_ioctl_ops;
379 dev->vdev.release = video_device_release_empty; 379 dev->vdev.release = video_device_release_empty;
380 video_set_drvdata(&dev->vdev, dev); 380 video_set_drvdata(&dev->vdev, dev);
381
382 /* mute card - prevents noisy bootups */
383 typhoon_mute(dev);
384
381 if (video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr) < 0) { 385 if (video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
382 v4l2_device_unregister(&dev->v4l2_dev); 386 v4l2_device_unregister(&dev->v4l2_dev);
383 release_region(dev->io, 8); 387 release_region(dev->io, 8);
384 return -EINVAL; 388 return -EINVAL;
385 } 389 }
386 v4l2_info(v4l2_dev, "port 0x%x.\n", dev->io); 390 v4l2_info(v4l2_dev, "port 0x%x.\n", dev->io);
387 v4l2_info(v4l2_dev, "mute frequency is %lu kHz.\n", dev->mutefreq); 391 v4l2_info(v4l2_dev, "mute frequency is %lu kHz.\n", mutefreq);
388 dev->mutefreq <<= 4;
389
390 /* mute card - prevents noisy bootups */
391 typhoon_mute(dev);
392 392
393 return 0; 393 return 0;
394} 394}
diff --git a/drivers/media/radio/radio-zoltrix.c b/drivers/media/radio/radio-zoltrix.c
index f31eab99c943..af99c5bd88c1 100644
--- a/drivers/media/radio/radio-zoltrix.c
+++ b/drivers/media/radio/radio-zoltrix.c
@@ -377,7 +377,7 @@ static int vidioc_s_audio(struct file *file, void *priv,
377static const struct v4l2_file_operations zoltrix_fops = 377static const struct v4l2_file_operations zoltrix_fops =
378{ 378{
379 .owner = THIS_MODULE, 379 .owner = THIS_MODULE,
380 .ioctl = video_ioctl2, 380 .unlocked_ioctl = video_ioctl2,
381}; 381};
382 382
383static const struct v4l2_ioctl_ops zoltrix_ioctl_ops = { 383static const struct v4l2_ioctl_ops zoltrix_ioctl_ops = {
@@ -424,20 +424,6 @@ static int __init zoltrix_init(void)
424 return res; 424 return res;
425 } 425 }
426 426
427 strlcpy(zol->vdev.name, v4l2_dev->name, sizeof(zol->vdev.name));
428 zol->vdev.v4l2_dev = v4l2_dev;
429 zol->vdev.fops = &zoltrix_fops;
430 zol->vdev.ioctl_ops = &zoltrix_ioctl_ops;
431 zol->vdev.release = video_device_release_empty;
432 video_set_drvdata(&zol->vdev, zol);
433
434 if (video_register_device(&zol->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
435 v4l2_device_unregister(v4l2_dev);
436 release_region(zol->io, 2);
437 return -EINVAL;
438 }
439 v4l2_info(v4l2_dev, "Zoltrix Radio Plus card driver.\n");
440
441 mutex_init(&zol->lock); 427 mutex_init(&zol->lock);
442 428
443 /* mute card - prevents noisy bootups */ 429 /* mute card - prevents noisy bootups */
@@ -452,6 +438,20 @@ static int __init zoltrix_init(void)
452 zol->curvol = 0; 438 zol->curvol = 0;
453 zol->stereo = 1; 439 zol->stereo = 1;
454 440
441 strlcpy(zol->vdev.name, v4l2_dev->name, sizeof(zol->vdev.name));
442 zol->vdev.v4l2_dev = v4l2_dev;
443 zol->vdev.fops = &zoltrix_fops;
444 zol->vdev.ioctl_ops = &zoltrix_ioctl_ops;
445 zol->vdev.release = video_device_release_empty;
446 video_set_drvdata(&zol->vdev, zol);
447
448 if (video_register_device(&zol->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
449 v4l2_device_unregister(v4l2_dev);
450 release_region(zol->io, 2);
451 return -EINVAL;
452 }
453 v4l2_info(v4l2_dev, "Zoltrix Radio Plus card driver.\n");
454
455 return 0; 455 return 0;
456} 456}
457 457
diff --git a/drivers/media/video/arv.c b/drivers/media/video/arv.c
index 31e7a123d19a..f989f2820d88 100644
--- a/drivers/media/video/arv.c
+++ b/drivers/media/video/arv.c
@@ -712,7 +712,7 @@ static int ar_initialize(struct ar *ar)
712static const struct v4l2_file_operations ar_fops = { 712static const struct v4l2_file_operations ar_fops = {
713 .owner = THIS_MODULE, 713 .owner = THIS_MODULE,
714 .read = ar_read, 714 .read = ar_read,
715 .ioctl = video_ioctl2, 715 .unlocked_ioctl = video_ioctl2,
716}; 716};
717 717
718static const struct v4l2_ioctl_ops ar_ioctl_ops = { 718static const struct v4l2_ioctl_ops ar_ioctl_ops = {
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index a529619e51f6..0902ec041c7a 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -854,7 +854,6 @@ int check_alloc_btres_lock(struct bttv *btv, struct bttv_fh *fh, int bit)
854 xbits |= RESOURCE_VIDEO_READ | RESOURCE_VIDEO_STREAM; 854 xbits |= RESOURCE_VIDEO_READ | RESOURCE_VIDEO_STREAM;
855 855
856 /* is it free? */ 856 /* is it free? */
857 mutex_lock(&btv->lock);
858 if (btv->resources & xbits) { 857 if (btv->resources & xbits) {
859 /* no, someone else uses it */ 858 /* no, someone else uses it */
860 goto fail; 859 goto fail;
@@ -884,11 +883,9 @@ int check_alloc_btres_lock(struct bttv *btv, struct bttv_fh *fh, int bit)
884 /* it's free, grab it */ 883 /* it's free, grab it */
885 fh->resources |= bit; 884 fh->resources |= bit;
886 btv->resources |= bit; 885 btv->resources |= bit;
887 mutex_unlock(&btv->lock);
888 return 1; 886 return 1;
889 887
890 fail: 888 fail:
891 mutex_unlock(&btv->lock);
892 return 0; 889 return 0;
893} 890}
894 891
@@ -940,7 +937,6 @@ void free_btres_lock(struct bttv *btv, struct bttv_fh *fh, int bits)
940 /* trying to free ressources not allocated by us ... */ 937 /* trying to free ressources not allocated by us ... */
941 printk("bttv: BUG! (btres)\n"); 938 printk("bttv: BUG! (btres)\n");
942 } 939 }
943 mutex_lock(&btv->lock);
944 fh->resources &= ~bits; 940 fh->resources &= ~bits;
945 btv->resources &= ~bits; 941 btv->resources &= ~bits;
946 942
@@ -951,8 +947,6 @@ void free_btres_lock(struct bttv *btv, struct bttv_fh *fh, int bits)
951 947
952 if (0 == (bits & VBI_RESOURCES)) 948 if (0 == (bits & VBI_RESOURCES))
953 disclaim_vbi_lines(btv); 949 disclaim_vbi_lines(btv);
954
955 mutex_unlock(&btv->lock);
956} 950}
957 951
958/* ----------------------------------------------------------------------- */ 952/* ----------------------------------------------------------------------- */
@@ -1713,28 +1707,20 @@ static int bttv_prepare_buffer(struct videobuf_queue *q,struct bttv *btv,
1713 1707
1714 /* Make sure tvnorm and vbi_end remain consistent 1708 /* Make sure tvnorm and vbi_end remain consistent
1715 until we're done. */ 1709 until we're done. */
1716 mutex_lock(&btv->lock);
1717 1710
1718 norm = btv->tvnorm; 1711 norm = btv->tvnorm;
1719 1712
1720 /* In this mode capturing always starts at defrect.top 1713 /* In this mode capturing always starts at defrect.top
1721 (default VDELAY), ignoring cropping parameters. */ 1714 (default VDELAY), ignoring cropping parameters. */
1722 if (btv->vbi_end > bttv_tvnorms[norm].cropcap.defrect.top) { 1715 if (btv->vbi_end > bttv_tvnorms[norm].cropcap.defrect.top) {
1723 mutex_unlock(&btv->lock);
1724 return -EINVAL; 1716 return -EINVAL;
1725 } 1717 }
1726 1718
1727 mutex_unlock(&btv->lock);
1728
1729 c.rect = bttv_tvnorms[norm].cropcap.defrect; 1719 c.rect = bttv_tvnorms[norm].cropcap.defrect;
1730 } else { 1720 } else {
1731 mutex_lock(&btv->lock);
1732
1733 norm = btv->tvnorm; 1721 norm = btv->tvnorm;
1734 c = btv->crop[!!fh->do_crop]; 1722 c = btv->crop[!!fh->do_crop];
1735 1723
1736 mutex_unlock(&btv->lock);
1737
1738 if (width < c.min_scaled_width || 1724 if (width < c.min_scaled_width ||
1739 width > c.max_scaled_width || 1725 width > c.max_scaled_width ||
1740 height < c.min_scaled_height) 1726 height < c.min_scaled_height)
@@ -1858,7 +1844,6 @@ static int bttv_s_std(struct file *file, void *priv, v4l2_std_id *id)
1858 unsigned int i; 1844 unsigned int i;
1859 int err; 1845 int err;
1860 1846
1861 mutex_lock(&btv->lock);
1862 err = v4l2_prio_check(&btv->prio, fh->prio); 1847 err = v4l2_prio_check(&btv->prio, fh->prio);
1863 if (err) 1848 if (err)
1864 goto err; 1849 goto err;
@@ -1874,7 +1859,6 @@ static int bttv_s_std(struct file *file, void *priv, v4l2_std_id *id)
1874 set_tvnorm(btv, i); 1859 set_tvnorm(btv, i);
1875 1860
1876err: 1861err:
1877 mutex_unlock(&btv->lock);
1878 1862
1879 return err; 1863 return err;
1880} 1864}
@@ -1898,7 +1882,6 @@ static int bttv_enum_input(struct file *file, void *priv,
1898 struct bttv *btv = fh->btv; 1882 struct bttv *btv = fh->btv;
1899 int rc = 0; 1883 int rc = 0;
1900 1884
1901 mutex_lock(&btv->lock);
1902 if (i->index >= bttv_tvcards[btv->c.type].video_inputs) { 1885 if (i->index >= bttv_tvcards[btv->c.type].video_inputs) {
1903 rc = -EINVAL; 1886 rc = -EINVAL;
1904 goto err; 1887 goto err;
@@ -1928,7 +1911,6 @@ static int bttv_enum_input(struct file *file, void *priv,
1928 i->std = BTTV_NORMS; 1911 i->std = BTTV_NORMS;
1929 1912
1930err: 1913err:
1931 mutex_unlock(&btv->lock);
1932 1914
1933 return rc; 1915 return rc;
1934} 1916}
@@ -1938,9 +1920,7 @@ static int bttv_g_input(struct file *file, void *priv, unsigned int *i)
1938 struct bttv_fh *fh = priv; 1920 struct bttv_fh *fh = priv;
1939 struct bttv *btv = fh->btv; 1921 struct bttv *btv = fh->btv;
1940 1922
1941 mutex_lock(&btv->lock);
1942 *i = btv->input; 1923 *i = btv->input;
1943 mutex_unlock(&btv->lock);
1944 1924
1945 return 0; 1925 return 0;
1946} 1926}
@@ -1952,7 +1932,6 @@ static int bttv_s_input(struct file *file, void *priv, unsigned int i)
1952 1932
1953 int err; 1933 int err;
1954 1934
1955 mutex_lock(&btv->lock);
1956 err = v4l2_prio_check(&btv->prio, fh->prio); 1935 err = v4l2_prio_check(&btv->prio, fh->prio);
1957 if (unlikely(err)) 1936 if (unlikely(err))
1958 goto err; 1937 goto err;
@@ -1965,7 +1944,6 @@ static int bttv_s_input(struct file *file, void *priv, unsigned int i)
1965 set_input(btv, i, btv->tvnorm); 1944 set_input(btv, i, btv->tvnorm);
1966 1945
1967err: 1946err:
1968 mutex_unlock(&btv->lock);
1969 return 0; 1947 return 0;
1970} 1948}
1971 1949
@@ -1979,7 +1957,6 @@ static int bttv_s_tuner(struct file *file, void *priv,
1979 if (unlikely(0 != t->index)) 1957 if (unlikely(0 != t->index))
1980 return -EINVAL; 1958 return -EINVAL;
1981 1959
1982 mutex_lock(&btv->lock);
1983 if (unlikely(btv->tuner_type == TUNER_ABSENT)) { 1960 if (unlikely(btv->tuner_type == TUNER_ABSENT)) {
1984 err = -EINVAL; 1961 err = -EINVAL;
1985 goto err; 1962 goto err;
@@ -1995,7 +1972,6 @@ static int bttv_s_tuner(struct file *file, void *priv,
1995 btv->audio_mode_gpio(btv, t, 1); 1972 btv->audio_mode_gpio(btv, t, 1);
1996 1973
1997err: 1974err:
1998 mutex_unlock(&btv->lock);
1999 1975
2000 return 0; 1976 return 0;
2001} 1977}
@@ -2006,10 +1982,8 @@ static int bttv_g_frequency(struct file *file, void *priv,
2006 struct bttv_fh *fh = priv; 1982 struct bttv_fh *fh = priv;
2007 struct bttv *btv = fh->btv; 1983 struct bttv *btv = fh->btv;
2008 1984
2009 mutex_lock(&btv->lock);
2010 f->type = btv->radio_user ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; 1985 f->type = btv->radio_user ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
2011 f->frequency = btv->freq; 1986 f->frequency = btv->freq;
2012 mutex_unlock(&btv->lock);
2013 1987
2014 return 0; 1988 return 0;
2015} 1989}
@@ -2024,7 +1998,6 @@ static int bttv_s_frequency(struct file *file, void *priv,
2024 if (unlikely(f->tuner != 0)) 1998 if (unlikely(f->tuner != 0))
2025 return -EINVAL; 1999 return -EINVAL;
2026 2000
2027 mutex_lock(&btv->lock);
2028 err = v4l2_prio_check(&btv->prio, fh->prio); 2001 err = v4l2_prio_check(&btv->prio, fh->prio);
2029 if (unlikely(err)) 2002 if (unlikely(err))
2030 goto err; 2003 goto err;
@@ -2039,7 +2012,6 @@ static int bttv_s_frequency(struct file *file, void *priv,
2039 if (btv->has_matchbox && btv->radio_user) 2012 if (btv->has_matchbox && btv->radio_user)
2040 tea5757_set_freq(btv, btv->freq); 2013 tea5757_set_freq(btv, btv->freq);
2041err: 2014err:
2042 mutex_unlock(&btv->lock);
2043 2015
2044 return 0; 2016 return 0;
2045} 2017}
@@ -2172,7 +2144,6 @@ limit_scaled_size_lock (struct bttv_fh * fh,
2172 2144
2173 /* Make sure tvnorm, vbi_end and the current cropping parameters 2145 /* Make sure tvnorm, vbi_end and the current cropping parameters
2174 remain consistent until we're done. */ 2146 remain consistent until we're done. */
2175 mutex_lock(&btv->lock);
2176 2147
2177 b = &bttv_tvnorms[btv->tvnorm].cropcap.bounds; 2148 b = &bttv_tvnorms[btv->tvnorm].cropcap.bounds;
2178 2149
@@ -2250,7 +2221,6 @@ limit_scaled_size_lock (struct bttv_fh * fh,
2250 rc = 0; /* success */ 2221 rc = 0; /* success */
2251 2222
2252 fail: 2223 fail:
2253 mutex_unlock(&btv->lock);
2254 2224
2255 return rc; 2225 return rc;
2256} 2226}
@@ -2282,9 +2252,7 @@ verify_window_lock (struct bttv_fh * fh,
2282 if (V4L2_FIELD_ANY == field) { 2252 if (V4L2_FIELD_ANY == field) {
2283 __s32 height2; 2253 __s32 height2;
2284 2254
2285 mutex_lock(&fh->btv->lock);
2286 height2 = fh->btv->crop[!!fh->do_crop].rect.height >> 1; 2255 height2 = fh->btv->crop[!!fh->do_crop].rect.height >> 1;
2287 mutex_unlock(&fh->btv->lock);
2288 field = (win->w.height > height2) 2256 field = (win->w.height > height2)
2289 ? V4L2_FIELD_INTERLACED 2257 ? V4L2_FIELD_INTERLACED
2290 : V4L2_FIELD_TOP; 2258 : V4L2_FIELD_TOP;
@@ -2360,7 +2328,6 @@ static int setup_window_lock(struct bttv_fh *fh, struct bttv *btv,
2360 } 2328 }
2361 } 2329 }
2362 2330
2363 mutex_lock(&fh->cap.vb_lock);
2364 /* clip against screen */ 2331 /* clip against screen */
2365 if (NULL != btv->fbuf.base) 2332 if (NULL != btv->fbuf.base)
2366 n = btcx_screen_clips(btv->fbuf.fmt.width, btv->fbuf.fmt.height, 2333 n = btcx_screen_clips(btv->fbuf.fmt.width, btv->fbuf.fmt.height,
@@ -2391,13 +2358,6 @@ static int setup_window_lock(struct bttv_fh *fh, struct bttv *btv,
2391 fh->ov.field = win->field; 2358 fh->ov.field = win->field;
2392 fh->ov.setup_ok = 1; 2359 fh->ov.setup_ok = 1;
2393 2360
2394 /*
2395 * FIXME: btv is protected by btv->lock mutex, while btv->init
2396 * is protected by fh->cap.vb_lock. This seems to open the
2397 * possibility for some race situations. Maybe the better would
2398 * be to unify those locks or to use another way to store the
2399 * init values that will be consumed by videobuf callbacks
2400 */
2401 btv->init.ov.w.width = win->w.width; 2361 btv->init.ov.w.width = win->w.width;
2402 btv->init.ov.w.height = win->w.height; 2362 btv->init.ov.w.height = win->w.height;
2403 btv->init.ov.field = win->field; 2363 btv->init.ov.field = win->field;
@@ -2412,7 +2372,6 @@ static int setup_window_lock(struct bttv_fh *fh, struct bttv *btv,
2412 bttv_overlay_risc(btv, &fh->ov, fh->ovfmt, new); 2372 bttv_overlay_risc(btv, &fh->ov, fh->ovfmt, new);
2413 retval = bttv_switch_overlay(btv,fh,new); 2373 retval = bttv_switch_overlay(btv,fh,new);
2414 } 2374 }
2415 mutex_unlock(&fh->cap.vb_lock);
2416 return retval; 2375 return retval;
2417} 2376}
2418 2377
@@ -2526,9 +2485,7 @@ static int bttv_try_fmt_vid_cap(struct file *file, void *priv,
2526 if (V4L2_FIELD_ANY == field) { 2485 if (V4L2_FIELD_ANY == field) {
2527 __s32 height2; 2486 __s32 height2;
2528 2487
2529 mutex_lock(&btv->lock);
2530 height2 = btv->crop[!!fh->do_crop].rect.height >> 1; 2488 height2 = btv->crop[!!fh->do_crop].rect.height >> 1;
2531 mutex_unlock(&btv->lock);
2532 field = (f->fmt.pix.height > height2) 2489 field = (f->fmt.pix.height > height2)
2533 ? V4L2_FIELD_INTERLACED 2490 ? V4L2_FIELD_INTERLACED
2534 : V4L2_FIELD_BOTTOM; 2491 : V4L2_FIELD_BOTTOM;
@@ -2614,7 +2571,6 @@ static int bttv_s_fmt_vid_cap(struct file *file, void *priv,
2614 fmt = format_by_fourcc(f->fmt.pix.pixelformat); 2571 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
2615 2572
2616 /* update our state informations */ 2573 /* update our state informations */
2617 mutex_lock(&fh->cap.vb_lock);
2618 fh->fmt = fmt; 2574 fh->fmt = fmt;
2619 fh->cap.field = f->fmt.pix.field; 2575 fh->cap.field = f->fmt.pix.field;
2620 fh->cap.last = V4L2_FIELD_NONE; 2576 fh->cap.last = V4L2_FIELD_NONE;
@@ -2623,7 +2579,6 @@ static int bttv_s_fmt_vid_cap(struct file *file, void *priv,
2623 btv->init.fmt = fmt; 2579 btv->init.fmt = fmt;
2624 btv->init.width = f->fmt.pix.width; 2580 btv->init.width = f->fmt.pix.width;
2625 btv->init.height = f->fmt.pix.height; 2581 btv->init.height = f->fmt.pix.height;
2626 mutex_unlock(&fh->cap.vb_lock);
2627 2582
2628 return 0; 2583 return 0;
2629} 2584}
@@ -2649,11 +2604,9 @@ static int vidiocgmbuf(struct file *file, void *priv, struct video_mbuf *mbuf)
2649 unsigned int i; 2604 unsigned int i;
2650 struct bttv_fh *fh = priv; 2605 struct bttv_fh *fh = priv;
2651 2606
2652 mutex_lock(&fh->cap.vb_lock);
2653 retval = __videobuf_mmap_setup(&fh->cap, gbuffers, gbufsize, 2607 retval = __videobuf_mmap_setup(&fh->cap, gbuffers, gbufsize,
2654 V4L2_MEMORY_MMAP); 2608 V4L2_MEMORY_MMAP);
2655 if (retval < 0) { 2609 if (retval < 0) {
2656 mutex_unlock(&fh->cap.vb_lock);
2657 return retval; 2610 return retval;
2658 } 2611 }
2659 2612
@@ -2665,7 +2618,6 @@ static int vidiocgmbuf(struct file *file, void *priv, struct video_mbuf *mbuf)
2665 for (i = 0; i < gbuffers; i++) 2618 for (i = 0; i < gbuffers; i++)
2666 mbuf->offsets[i] = i * gbufsize; 2619 mbuf->offsets[i] = i * gbufsize;
2667 2620
2668 mutex_unlock(&fh->cap.vb_lock);
2669 return 0; 2621 return 0;
2670} 2622}
2671#endif 2623#endif
@@ -2775,10 +2727,8 @@ static int bttv_overlay(struct file *file, void *f, unsigned int on)
2775 int retval = 0; 2727 int retval = 0;
2776 2728
2777 if (on) { 2729 if (on) {
2778 mutex_lock(&fh->cap.vb_lock);
2779 /* verify args */ 2730 /* verify args */
2780 if (unlikely(!btv->fbuf.base)) { 2731 if (unlikely(!btv->fbuf.base)) {
2781 mutex_unlock(&fh->cap.vb_lock);
2782 return -EINVAL; 2732 return -EINVAL;
2783 } 2733 }
2784 if (unlikely(!fh->ov.setup_ok)) { 2734 if (unlikely(!fh->ov.setup_ok)) {
@@ -2787,13 +2737,11 @@ static int bttv_overlay(struct file *file, void *f, unsigned int on)
2787 } 2737 }
2788 if (retval) 2738 if (retval)
2789 return retval; 2739 return retval;
2790 mutex_unlock(&fh->cap.vb_lock);
2791 } 2740 }
2792 2741
2793 if (!check_alloc_btres_lock(btv, fh, RESOURCE_OVERLAY)) 2742 if (!check_alloc_btres_lock(btv, fh, RESOURCE_OVERLAY))
2794 return -EBUSY; 2743 return -EBUSY;
2795 2744
2796 mutex_lock(&fh->cap.vb_lock);
2797 if (on) { 2745 if (on) {
2798 fh->ov.tvnorm = btv->tvnorm; 2746 fh->ov.tvnorm = btv->tvnorm;
2799 new = videobuf_sg_alloc(sizeof(*new)); 2747 new = videobuf_sg_alloc(sizeof(*new));
@@ -2805,7 +2753,6 @@ static int bttv_overlay(struct file *file, void *f, unsigned int on)
2805 2753
2806 /* switch over */ 2754 /* switch over */
2807 retval = bttv_switch_overlay(btv, fh, new); 2755 retval = bttv_switch_overlay(btv, fh, new);
2808 mutex_unlock(&fh->cap.vb_lock);
2809 return retval; 2756 return retval;
2810} 2757}
2811 2758
@@ -2844,7 +2791,6 @@ static int bttv_s_fbuf(struct file *file, void *f,
2844 } 2791 }
2845 2792
2846 /* ok, accept it */ 2793 /* ok, accept it */
2847 mutex_lock(&fh->cap.vb_lock);
2848 btv->fbuf.base = fb->base; 2794 btv->fbuf.base = fb->base;
2849 btv->fbuf.fmt.width = fb->fmt.width; 2795 btv->fbuf.fmt.width = fb->fmt.width;
2850 btv->fbuf.fmt.height = fb->fmt.height; 2796 btv->fbuf.fmt.height = fb->fmt.height;
@@ -2876,7 +2822,6 @@ static int bttv_s_fbuf(struct file *file, void *f,
2876 retval = bttv_switch_overlay(btv, fh, new); 2822 retval = bttv_switch_overlay(btv, fh, new);
2877 } 2823 }
2878 } 2824 }
2879 mutex_unlock(&fh->cap.vb_lock);
2880 return retval; 2825 return retval;
2881} 2826}
2882 2827
@@ -2955,7 +2900,6 @@ static int bttv_queryctrl(struct file *file, void *priv,
2955 c->id >= V4L2_CID_PRIVATE_LASTP1)) 2900 c->id >= V4L2_CID_PRIVATE_LASTP1))
2956 return -EINVAL; 2901 return -EINVAL;
2957 2902
2958 mutex_lock(&btv->lock);
2959 if (!btv->volume_gpio && (c->id == V4L2_CID_AUDIO_VOLUME)) 2903 if (!btv->volume_gpio && (c->id == V4L2_CID_AUDIO_VOLUME))
2960 *c = no_ctl; 2904 *c = no_ctl;
2961 else { 2905 else {
@@ -2963,7 +2907,6 @@ static int bttv_queryctrl(struct file *file, void *priv,
2963 2907
2964 *c = (NULL != ctrl) ? *ctrl : no_ctl; 2908 *c = (NULL != ctrl) ? *ctrl : no_ctl;
2965 } 2909 }
2966 mutex_unlock(&btv->lock);
2967 2910
2968 return 0; 2911 return 0;
2969} 2912}
@@ -2974,10 +2917,8 @@ static int bttv_g_parm(struct file *file, void *f,
2974 struct bttv_fh *fh = f; 2917 struct bttv_fh *fh = f;
2975 struct bttv *btv = fh->btv; 2918 struct bttv *btv = fh->btv;
2976 2919
2977 mutex_lock(&btv->lock);
2978 v4l2_video_std_frame_period(bttv_tvnorms[btv->tvnorm].v4l2_id, 2920 v4l2_video_std_frame_period(bttv_tvnorms[btv->tvnorm].v4l2_id,
2979 &parm->parm.capture.timeperframe); 2921 &parm->parm.capture.timeperframe);
2980 mutex_unlock(&btv->lock);
2981 2922
2982 return 0; 2923 return 0;
2983} 2924}
@@ -2993,7 +2934,6 @@ static int bttv_g_tuner(struct file *file, void *priv,
2993 if (0 != t->index) 2934 if (0 != t->index)
2994 return -EINVAL; 2935 return -EINVAL;
2995 2936
2996 mutex_lock(&btv->lock);
2997 t->rxsubchans = V4L2_TUNER_SUB_MONO; 2937 t->rxsubchans = V4L2_TUNER_SUB_MONO;
2998 bttv_call_all(btv, tuner, g_tuner, t); 2938 bttv_call_all(btv, tuner, g_tuner, t);
2999 strcpy(t->name, "Television"); 2939 strcpy(t->name, "Television");
@@ -3005,7 +2945,6 @@ static int bttv_g_tuner(struct file *file, void *priv,
3005 if (btv->audio_mode_gpio) 2945 if (btv->audio_mode_gpio)
3006 btv->audio_mode_gpio(btv, t, 0); 2946 btv->audio_mode_gpio(btv, t, 0);
3007 2947
3008 mutex_unlock(&btv->lock);
3009 return 0; 2948 return 0;
3010} 2949}
3011 2950
@@ -3014,9 +2953,7 @@ static int bttv_g_priority(struct file *file, void *f, enum v4l2_priority *p)
3014 struct bttv_fh *fh = f; 2953 struct bttv_fh *fh = f;
3015 struct bttv *btv = fh->btv; 2954 struct bttv *btv = fh->btv;
3016 2955
3017 mutex_lock(&btv->lock);
3018 *p = v4l2_prio_max(&btv->prio); 2956 *p = v4l2_prio_max(&btv->prio);
3019 mutex_unlock(&btv->lock);
3020 2957
3021 return 0; 2958 return 0;
3022} 2959}
@@ -3028,9 +2965,7 @@ static int bttv_s_priority(struct file *file, void *f,
3028 struct bttv *btv = fh->btv; 2965 struct bttv *btv = fh->btv;
3029 int rc; 2966 int rc;
3030 2967
3031 mutex_lock(&btv->lock);
3032 rc = v4l2_prio_change(&btv->prio, &fh->prio, prio); 2968 rc = v4l2_prio_change(&btv->prio, &fh->prio, prio);
3033 mutex_unlock(&btv->lock);
3034 2969
3035 return rc; 2970 return rc;
3036} 2971}
@@ -3045,9 +2980,7 @@ static int bttv_cropcap(struct file *file, void *priv,
3045 cap->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) 2980 cap->type != V4L2_BUF_TYPE_VIDEO_OVERLAY)
3046 return -EINVAL; 2981 return -EINVAL;
3047 2982
3048 mutex_lock(&btv->lock);
3049 *cap = bttv_tvnorms[btv->tvnorm].cropcap; 2983 *cap = bttv_tvnorms[btv->tvnorm].cropcap;
3050 mutex_unlock(&btv->lock);
3051 2984
3052 return 0; 2985 return 0;
3053} 2986}
@@ -3065,9 +2998,7 @@ static int bttv_g_crop(struct file *file, void *f, struct v4l2_crop *crop)
3065 inconsistent with fh->width or fh->height and apps 2998 inconsistent with fh->width or fh->height and apps
3066 do not expect a change here. */ 2999 do not expect a change here. */
3067 3000
3068 mutex_lock(&btv->lock);
3069 crop->c = btv->crop[!!fh->do_crop].rect; 3001 crop->c = btv->crop[!!fh->do_crop].rect;
3070 mutex_unlock(&btv->lock);
3071 3002
3072 return 0; 3003 return 0;
3073} 3004}
@@ -3091,17 +3022,14 @@ static int bttv_s_crop(struct file *file, void *f, struct v4l2_crop *crop)
3091 /* Make sure tvnorm, vbi_end and the current cropping 3022 /* Make sure tvnorm, vbi_end and the current cropping
3092 parameters remain consistent until we're done. Note 3023 parameters remain consistent until we're done. Note
3093 read() may change vbi_end in check_alloc_btres_lock(). */ 3024 read() may change vbi_end in check_alloc_btres_lock(). */
3094 mutex_lock(&btv->lock);
3095 retval = v4l2_prio_check(&btv->prio, fh->prio); 3025 retval = v4l2_prio_check(&btv->prio, fh->prio);
3096 if (0 != retval) { 3026 if (0 != retval) {
3097 mutex_unlock(&btv->lock);
3098 return retval; 3027 return retval;
3099 } 3028 }
3100 3029
3101 retval = -EBUSY; 3030 retval = -EBUSY;
3102 3031
3103 if (locked_btres(fh->btv, VIDEO_RESOURCES)) { 3032 if (locked_btres(fh->btv, VIDEO_RESOURCES)) {
3104 mutex_unlock(&btv->lock);
3105 return retval; 3033 return retval;
3106 } 3034 }
3107 3035
@@ -3113,7 +3041,6 @@ static int bttv_s_crop(struct file *file, void *f, struct v4l2_crop *crop)
3113 3041
3114 b_top = max(b->top, btv->vbi_end); 3042 b_top = max(b->top, btv->vbi_end);
3115 if (b_top + 32 >= b_bottom) { 3043 if (b_top + 32 >= b_bottom) {
3116 mutex_unlock(&btv->lock);
3117 return retval; 3044 return retval;
3118 } 3045 }
3119 3046
@@ -3136,12 +3063,8 @@ static int bttv_s_crop(struct file *file, void *f, struct v4l2_crop *crop)
3136 3063
3137 btv->crop[1] = c; 3064 btv->crop[1] = c;
3138 3065
3139 mutex_unlock(&btv->lock);
3140
3141 fh->do_crop = 1; 3066 fh->do_crop = 1;
3142 3067
3143 mutex_lock(&fh->cap.vb_lock);
3144
3145 if (fh->width < c.min_scaled_width) { 3068 if (fh->width < c.min_scaled_width) {
3146 fh->width = c.min_scaled_width; 3069 fh->width = c.min_scaled_width;
3147 btv->init.width = c.min_scaled_width; 3070 btv->init.width = c.min_scaled_width;
@@ -3158,8 +3081,6 @@ static int bttv_s_crop(struct file *file, void *f, struct v4l2_crop *crop)
3158 btv->init.height = c.max_scaled_height; 3081 btv->init.height = c.max_scaled_height;
3159 } 3082 }
3160 3083
3161 mutex_unlock(&fh->cap.vb_lock);
3162
3163 return 0; 3084 return 0;
3164} 3085}
3165 3086
@@ -3227,7 +3148,6 @@ static unsigned int bttv_poll(struct file *file, poll_table *wait)
3227 return videobuf_poll_stream(file, &fh->vbi, wait); 3148 return videobuf_poll_stream(file, &fh->vbi, wait);
3228 } 3149 }
3229 3150
3230 mutex_lock(&fh->cap.vb_lock);
3231 if (check_btres(fh,RESOURCE_VIDEO_STREAM)) { 3151 if (check_btres(fh,RESOURCE_VIDEO_STREAM)) {
3232 /* streaming capture */ 3152 /* streaming capture */
3233 if (list_empty(&fh->cap.stream)) 3153 if (list_empty(&fh->cap.stream))
@@ -3262,7 +3182,6 @@ static unsigned int bttv_poll(struct file *file, poll_table *wait)
3262 else 3182 else
3263 rc = 0; 3183 rc = 0;
3264err: 3184err:
3265 mutex_unlock(&fh->cap.vb_lock);
3266 return rc; 3185 return rc;
3267} 3186}
3268 3187
@@ -3293,23 +3212,11 @@ static int bttv_open(struct file *file)
3293 return -ENOMEM; 3212 return -ENOMEM;
3294 file->private_data = fh; 3213 file->private_data = fh;
3295 3214
3296 /*
3297 * btv is protected by btv->lock mutex, while btv->init and other
3298 * streaming vars are protected by fh->cap.vb_lock. We need to take
3299 * care of both locks to avoid troubles. However, vb_lock is used also
3300 * inside videobuf, without calling buf->lock. So, it is a very bad
3301 * idea to hold both locks at the same time.
3302 * Let's first copy btv->init at fh, holding cap.vb_lock, and then work
3303 * with the rest of init, holding btv->lock.
3304 */
3305 mutex_lock(&fh->cap.vb_lock);
3306 *fh = btv->init; 3215 *fh = btv->init;
3307 mutex_unlock(&fh->cap.vb_lock);
3308 3216
3309 fh->type = type; 3217 fh->type = type;
3310 fh->ov.setup_ok = 0; 3218 fh->ov.setup_ok = 0;
3311 3219
3312 mutex_lock(&btv->lock);
3313 v4l2_prio_open(&btv->prio, &fh->prio); 3220 v4l2_prio_open(&btv->prio, &fh->prio);
3314 3221
3315 videobuf_queue_sg_init(&fh->cap, &bttv_video_qops, 3222 videobuf_queue_sg_init(&fh->cap, &bttv_video_qops,
@@ -3317,13 +3224,13 @@ static int bttv_open(struct file *file)
3317 V4L2_BUF_TYPE_VIDEO_CAPTURE, 3224 V4L2_BUF_TYPE_VIDEO_CAPTURE,
3318 V4L2_FIELD_INTERLACED, 3225 V4L2_FIELD_INTERLACED,
3319 sizeof(struct bttv_buffer), 3226 sizeof(struct bttv_buffer),
3320 fh, NULL); 3227 fh, &btv->lock);
3321 videobuf_queue_sg_init(&fh->vbi, &bttv_vbi_qops, 3228 videobuf_queue_sg_init(&fh->vbi, &bttv_vbi_qops,
3322 &btv->c.pci->dev, &btv->s_lock, 3229 &btv->c.pci->dev, &btv->s_lock,
3323 V4L2_BUF_TYPE_VBI_CAPTURE, 3230 V4L2_BUF_TYPE_VBI_CAPTURE,
3324 V4L2_FIELD_SEQ_TB, 3231 V4L2_FIELD_SEQ_TB,
3325 sizeof(struct bttv_buffer), 3232 sizeof(struct bttv_buffer),
3326 fh, NULL); 3233 fh, &btv->lock);
3327 set_tvnorm(btv,btv->tvnorm); 3234 set_tvnorm(btv,btv->tvnorm);
3328 set_input(btv, btv->input, btv->tvnorm); 3235 set_input(btv, btv->input, btv->tvnorm);
3329 3236
@@ -3346,7 +3253,6 @@ static int bttv_open(struct file *file)
3346 bttv_vbi_fmt_reset(&fh->vbi_fmt, btv->tvnorm); 3253 bttv_vbi_fmt_reset(&fh->vbi_fmt, btv->tvnorm);
3347 3254
3348 bttv_field_count(btv); 3255 bttv_field_count(btv);
3349 mutex_unlock(&btv->lock);
3350 return 0; 3256 return 0;
3351} 3257}
3352 3258
@@ -3355,7 +3261,6 @@ static int bttv_release(struct file *file)
3355 struct bttv_fh *fh = file->private_data; 3261 struct bttv_fh *fh = file->private_data;
3356 struct bttv *btv = fh->btv; 3262 struct bttv *btv = fh->btv;
3357 3263
3358 mutex_lock(&btv->lock);
3359 /* turn off overlay */ 3264 /* turn off overlay */
3360 if (check_btres(fh, RESOURCE_OVERLAY)) 3265 if (check_btres(fh, RESOURCE_OVERLAY))
3361 bttv_switch_overlay(btv,fh,NULL); 3266 bttv_switch_overlay(btv,fh,NULL);
@@ -3381,14 +3286,8 @@ static int bttv_release(struct file *file)
3381 3286
3382 /* free stuff */ 3287 /* free stuff */
3383 3288
3384 /*
3385 * videobuf uses cap.vb_lock - we should avoid holding btv->lock,
3386 * otherwise we may have dead lock conditions
3387 */
3388 mutex_unlock(&btv->lock);
3389 videobuf_mmap_free(&fh->cap); 3289 videobuf_mmap_free(&fh->cap);
3390 videobuf_mmap_free(&fh->vbi); 3290 videobuf_mmap_free(&fh->vbi);
3391 mutex_lock(&btv->lock);
3392 v4l2_prio_close(&btv->prio, fh->prio); 3291 v4l2_prio_close(&btv->prio, fh->prio);
3393 file->private_data = NULL; 3292 file->private_data = NULL;
3394 kfree(fh); 3293 kfree(fh);
@@ -3398,7 +3297,6 @@ static int bttv_release(struct file *file)
3398 3297
3399 if (!btv->users) 3298 if (!btv->users)
3400 audio_mute(btv, 1); 3299 audio_mute(btv, 1);
3401 mutex_unlock(&btv->lock);
3402 3300
3403 return 0; 3301 return 0;
3404} 3302}
@@ -3502,11 +3400,8 @@ static int radio_open(struct file *file)
3502 if (unlikely(!fh)) 3400 if (unlikely(!fh))
3503 return -ENOMEM; 3401 return -ENOMEM;
3504 file->private_data = fh; 3402 file->private_data = fh;
3505 mutex_lock(&fh->cap.vb_lock);
3506 *fh = btv->init; 3403 *fh = btv->init;
3507 mutex_unlock(&fh->cap.vb_lock);
3508 3404
3509 mutex_lock(&btv->lock);
3510 v4l2_prio_open(&btv->prio, &fh->prio); 3405 v4l2_prio_open(&btv->prio, &fh->prio);
3511 3406
3512 btv->radio_user++; 3407 btv->radio_user++;
@@ -3514,7 +3409,6 @@ static int radio_open(struct file *file)
3514 bttv_call_all(btv, tuner, s_radio); 3409 bttv_call_all(btv, tuner, s_radio);
3515 audio_input(btv,TVAUDIO_INPUT_RADIO); 3410 audio_input(btv,TVAUDIO_INPUT_RADIO);
3516 3411
3517 mutex_unlock(&btv->lock);
3518 return 0; 3412 return 0;
3519} 3413}
3520 3414
@@ -3524,7 +3418,6 @@ static int radio_release(struct file *file)
3524 struct bttv *btv = fh->btv; 3418 struct bttv *btv = fh->btv;
3525 struct rds_command cmd; 3419 struct rds_command cmd;
3526 3420
3527 mutex_lock(&btv->lock);
3528 v4l2_prio_close(&btv->prio, fh->prio); 3421 v4l2_prio_close(&btv->prio, fh->prio);
3529 file->private_data = NULL; 3422 file->private_data = NULL;
3530 kfree(fh); 3423 kfree(fh);
@@ -3532,7 +3425,6 @@ static int radio_release(struct file *file)
3532 btv->radio_user--; 3425 btv->radio_user--;
3533 3426
3534 bttv_call_all(btv, core, ioctl, RDS_CMD_CLOSE, &cmd); 3427 bttv_call_all(btv, core, ioctl, RDS_CMD_CLOSE, &cmd);
3535 mutex_unlock(&btv->lock);
3536 3428
3537 return 0; 3429 return 0;
3538} 3430}
@@ -3561,7 +3453,6 @@ static int radio_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
3561 return -EINVAL; 3453 return -EINVAL;
3562 if (0 != t->index) 3454 if (0 != t->index)
3563 return -EINVAL; 3455 return -EINVAL;
3564 mutex_lock(&btv->lock);
3565 strcpy(t->name, "Radio"); 3456 strcpy(t->name, "Radio");
3566 t->type = V4L2_TUNER_RADIO; 3457 t->type = V4L2_TUNER_RADIO;
3567 3458
@@ -3570,8 +3461,6 @@ static int radio_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
3570 if (btv->audio_mode_gpio) 3461 if (btv->audio_mode_gpio)
3571 btv->audio_mode_gpio(btv, t, 0); 3462 btv->audio_mode_gpio(btv, t, 0);
3572 3463
3573 mutex_unlock(&btv->lock);
3574
3575 return 0; 3464 return 0;
3576} 3465}
3577 3466
@@ -3692,7 +3581,7 @@ static const struct v4l2_file_operations radio_fops =
3692 .open = radio_open, 3581 .open = radio_open,
3693 .read = radio_read, 3582 .read = radio_read,
3694 .release = radio_release, 3583 .release = radio_release,
3695 .ioctl = video_ioctl2, 3584 .unlocked_ioctl = video_ioctl2,
3696 .poll = radio_poll, 3585 .poll = radio_poll,
3697}; 3586};
3698 3587
diff --git a/drivers/media/video/bw-qcam.c b/drivers/media/video/bw-qcam.c
index 935e0c9a9674..c1193506131c 100644
--- a/drivers/media/video/bw-qcam.c
+++ b/drivers/media/video/bw-qcam.c
@@ -860,7 +860,7 @@ static ssize_t qcam_read(struct file *file, char __user *buf,
860 860
861static const struct v4l2_file_operations qcam_fops = { 861static const struct v4l2_file_operations qcam_fops = {
862 .owner = THIS_MODULE, 862 .owner = THIS_MODULE,
863 .ioctl = video_ioctl2, 863 .unlocked_ioctl = video_ioctl2,
864 .read = qcam_read, 864 .read = qcam_read,
865}; 865};
866 866
diff --git a/drivers/media/video/c-qcam.c b/drivers/media/video/c-qcam.c
index 6e4b19698c13..24fc00965a12 100644
--- a/drivers/media/video/c-qcam.c
+++ b/drivers/media/video/c-qcam.c
@@ -718,7 +718,7 @@ static ssize_t qcam_read(struct file *file, char __user *buf,
718 718
719static const struct v4l2_file_operations qcam_fops = { 719static const struct v4l2_file_operations qcam_fops = {
720 .owner = THIS_MODULE, 720 .owner = THIS_MODULE,
721 .ioctl = video_ioctl2, 721 .unlocked_ioctl = video_ioctl2,
722 .read = qcam_read, 722 .read = qcam_read,
723}; 723};
724 724
diff --git a/drivers/media/video/cafe_ccic.c b/drivers/media/video/cafe_ccic.c
index 260c666ce931..0dfff50891e4 100644
--- a/drivers/media/video/cafe_ccic.c
+++ b/drivers/media/video/cafe_ccic.c
@@ -1775,7 +1775,7 @@ static const struct v4l2_file_operations cafe_v4l_fops = {
1775 .read = cafe_v4l_read, 1775 .read = cafe_v4l_read,
1776 .poll = cafe_v4l_poll, 1776 .poll = cafe_v4l_poll,
1777 .mmap = cafe_v4l_mmap, 1777 .mmap = cafe_v4l_mmap,
1778 .ioctl = video_ioctl2, 1778 .unlocked_ioctl = video_ioctl2,
1779}; 1779};
1780 1780
1781static const struct v4l2_ioctl_ops cafe_v4l_ioctl_ops = { 1781static const struct v4l2_ioctl_ops cafe_v4l_ioctl_ops = {
diff --git a/drivers/media/video/cx18/cx18-alsa-pcm.c b/drivers/media/video/cx18/cx18-alsa-pcm.c
index 8f55692db36d..82d195be9197 100644
--- a/drivers/media/video/cx18/cx18-alsa-pcm.c
+++ b/drivers/media/video/cx18/cx18-alsa-pcm.c
@@ -218,7 +218,13 @@ static int snd_cx18_pcm_capture_close(struct snd_pcm_substream *substream)
218static int snd_cx18_pcm_ioctl(struct snd_pcm_substream *substream, 218static int snd_cx18_pcm_ioctl(struct snd_pcm_substream *substream,
219 unsigned int cmd, void *arg) 219 unsigned int cmd, void *arg)
220{ 220{
221 return snd_pcm_lib_ioctl(substream, cmd, arg); 221 struct snd_cx18_card *cxsc = snd_pcm_substream_chip(substream);
222 int ret;
223
224 snd_cx18_lock(cxsc);
225 ret = snd_pcm_lib_ioctl(substream, cmd, arg);
226 snd_cx18_unlock(cxsc);
227 return ret;
222} 228}
223 229
224 230
diff --git a/drivers/media/video/cx18/cx18-streams.c b/drivers/media/video/cx18/cx18-streams.c
index 9045f1ece0eb..ab461e27d9dd 100644
--- a/drivers/media/video/cx18/cx18-streams.c
+++ b/drivers/media/video/cx18/cx18-streams.c
@@ -41,7 +41,7 @@ static struct v4l2_file_operations cx18_v4l2_enc_fops = {
41 .read = cx18_v4l2_read, 41 .read = cx18_v4l2_read,
42 .open = cx18_v4l2_open, 42 .open = cx18_v4l2_open,
43 /* FIXME change to video_ioctl2 if serialization lock can be removed */ 43 /* FIXME change to video_ioctl2 if serialization lock can be removed */
44 .ioctl = cx18_v4l2_ioctl, 44 .unlocked_ioctl = cx18_v4l2_ioctl,
45 .release = cx18_v4l2_close, 45 .release = cx18_v4l2_close,
46 .poll = cx18_v4l2_enc_poll, 46 .poll = cx18_v4l2_enc_poll,
47}; 47};
diff --git a/drivers/media/video/et61x251/et61x251_core.c b/drivers/media/video/et61x251/et61x251_core.c
index a5cfc76b40b7..bb164099ea2c 100644
--- a/drivers/media/video/et61x251/et61x251_core.c
+++ b/drivers/media/video/et61x251/et61x251_core.c
@@ -2530,7 +2530,7 @@ static const struct v4l2_file_operations et61x251_fops = {
2530 .owner = THIS_MODULE, 2530 .owner = THIS_MODULE,
2531 .open = et61x251_open, 2531 .open = et61x251_open,
2532 .release = et61x251_release, 2532 .release = et61x251_release,
2533 .ioctl = et61x251_ioctl, 2533 .unlocked_ioctl = et61x251_ioctl,
2534 .read = et61x251_read, 2534 .read = et61x251_read,
2535 .poll = et61x251_poll, 2535 .poll = et61x251_poll,
2536 .mmap = et61x251_mmap, 2536 .mmap = et61x251_mmap,
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c
index 330dadc00106..e23de57e2c73 100644
--- a/drivers/media/video/gspca/sonixj.c
+++ b/drivers/media/video/gspca/sonixj.c
@@ -63,7 +63,10 @@ struct sd {
63#define QUALITY_DEF 80 63#define QUALITY_DEF 80
64 u8 jpegqual; /* webcam quality */ 64 u8 jpegqual; /* webcam quality */
65 65
66 u8 reg01;
67 u8 reg17;
66 u8 reg18; 68 u8 reg18;
69 u8 flags;
67 70
68 s8 ag_cnt; 71 s8 ag_cnt;
69#define AG_CNT_START 13 72#define AG_CNT_START 13
@@ -96,6 +99,22 @@ enum sensors {
96 SENSOR_SP80708, 99 SENSOR_SP80708,
97}; 100};
98 101
102/* device flags */
103#define PDN_INV 1 /* inverse pin S_PWR_DN / sn_xxx tables */
104
105/* sn9c1xx definitions */
106/* register 0x01 */
107#define S_PWR_DN 0x01 /* sensor power down */
108#define S_PDN_INV 0x02 /* inverse pin S_PWR_DN */
109#define V_TX_EN 0x04 /* video transfer enable */
110#define LED 0x08 /* output to pin LED */
111#define SCL_SEL_OD 0x20 /* open-drain mode */
112#define SYS_SEL_48M 0x40 /* system clock 0: 24MHz, 1: 48MHz */
113/* register 0x17 */
114#define MCK_SIZE_MASK 0x1f /* sensor master clock */
115#define SEN_CLK_EN 0x20 /* enable sensor clock */
116#define DEF_EN 0x80 /* defect pixel by 0: soft, 1: hard */
117
99/* V4L2 controls supported by the driver */ 118/* V4L2 controls supported by the driver */
100static void setbrightness(struct gspca_dev *gspca_dev); 119static void setbrightness(struct gspca_dev *gspca_dev);
101static void setcontrast(struct gspca_dev *gspca_dev); 120static void setcontrast(struct gspca_dev *gspca_dev);
@@ -1755,141 +1774,6 @@ static void po2030n_probe(struct gspca_dev *gspca_dev)
1755 } 1774 }
1756} 1775}
1757 1776
1758static void bridge_init(struct gspca_dev *gspca_dev,
1759 const u8 *sn9c1xx)
1760{
1761 struct sd *sd = (struct sd *) gspca_dev;
1762 u8 reg0102[2];
1763 const u8 *reg9a;
1764 static const u8 reg9a_def[] =
1765 {0x00, 0x40, 0x20, 0x00, 0x00, 0x00};
1766 static const u8 reg9a_spec[] =
1767 {0x00, 0x40, 0x38, 0x30, 0x00, 0x20};
1768 static const u8 regd4[] = {0x60, 0x00, 0x00};
1769
1770 /* sensor clock already enabled in sd_init */
1771 /* reg_w1(gspca_dev, 0xf1, 0x00); */
1772 reg_w1(gspca_dev, 0x01, sn9c1xx[1]);
1773
1774 /* configure gpio */
1775 reg0102[0] = sn9c1xx[1];
1776 reg0102[1] = sn9c1xx[2];
1777 if (gspca_dev->audio)
1778 reg0102[1] |= 0x04; /* keep the audio connection */
1779 reg_w(gspca_dev, 0x01, reg0102, 2);
1780 reg_w(gspca_dev, 0x08, &sn9c1xx[8], 2);
1781 reg_w(gspca_dev, 0x17, &sn9c1xx[0x17], 5);
1782 switch (sd->sensor) {
1783 case SENSOR_GC0307:
1784 case SENSOR_OV7660:
1785 case SENSOR_PO1030:
1786 case SENSOR_PO2030N:
1787 case SENSOR_SOI768:
1788 case SENSOR_SP80708:
1789 reg9a = reg9a_spec;
1790 break;
1791 default:
1792 reg9a = reg9a_def;
1793 break;
1794 }
1795 reg_w(gspca_dev, 0x9a, reg9a, 6);
1796
1797 reg_w(gspca_dev, 0xd4, regd4, sizeof regd4);
1798
1799 reg_w(gspca_dev, 0x03, &sn9c1xx[3], 0x0f);
1800
1801 switch (sd->sensor) {
1802 case SENSOR_ADCM1700:
1803 reg_w1(gspca_dev, 0x01, 0x43);
1804 reg_w1(gspca_dev, 0x17, 0x62);
1805 reg_w1(gspca_dev, 0x01, 0x42);
1806 reg_w1(gspca_dev, 0x01, 0x42);
1807 break;
1808 case SENSOR_GC0307:
1809 msleep(50);
1810 reg_w1(gspca_dev, 0x01, 0x61);
1811 reg_w1(gspca_dev, 0x17, 0x22);
1812 reg_w1(gspca_dev, 0x01, 0x60);
1813 reg_w1(gspca_dev, 0x01, 0x40);
1814 msleep(50);
1815 break;
1816 case SENSOR_MI0360B:
1817 reg_w1(gspca_dev, 0x01, 0x61);
1818 reg_w1(gspca_dev, 0x17, 0x60);
1819 reg_w1(gspca_dev, 0x01, 0x60);
1820 reg_w1(gspca_dev, 0x01, 0x40);
1821 break;
1822 case SENSOR_MT9V111:
1823 reg_w1(gspca_dev, 0x01, 0x61);
1824 reg_w1(gspca_dev, 0x17, 0x61);
1825 reg_w1(gspca_dev, 0x01, 0x60);
1826 reg_w1(gspca_dev, 0x01, 0x40);
1827 break;
1828 case SENSOR_OM6802:
1829 msleep(10);
1830 reg_w1(gspca_dev, 0x02, 0x73);
1831 reg_w1(gspca_dev, 0x17, 0x60);
1832 reg_w1(gspca_dev, 0x01, 0x22);
1833 msleep(100);
1834 reg_w1(gspca_dev, 0x01, 0x62);
1835 reg_w1(gspca_dev, 0x17, 0x64);
1836 reg_w1(gspca_dev, 0x17, 0x64);
1837 reg_w1(gspca_dev, 0x01, 0x42);
1838 msleep(10);
1839 reg_w1(gspca_dev, 0x01, 0x42);
1840 i2c_w8(gspca_dev, om6802_init0[0]);
1841 i2c_w8(gspca_dev, om6802_init0[1]);
1842 msleep(15);
1843 reg_w1(gspca_dev, 0x02, 0x71);
1844 msleep(150);
1845 break;
1846 case SENSOR_OV7630:
1847 reg_w1(gspca_dev, 0x01, 0x61);
1848 reg_w1(gspca_dev, 0x17, 0xe2);
1849 reg_w1(gspca_dev, 0x01, 0x60);
1850 reg_w1(gspca_dev, 0x01, 0x40);
1851 break;
1852 case SENSOR_OV7648:
1853 reg_w1(gspca_dev, 0x01, 0x63);
1854 reg_w1(gspca_dev, 0x17, 0x20);
1855 reg_w1(gspca_dev, 0x01, 0x62);
1856 reg_w1(gspca_dev, 0x01, 0x42);
1857 break;
1858 case SENSOR_PO1030:
1859 case SENSOR_SOI768:
1860 reg_w1(gspca_dev, 0x01, 0x61);
1861 reg_w1(gspca_dev, 0x17, 0x20);
1862 reg_w1(gspca_dev, 0x01, 0x60);
1863 reg_w1(gspca_dev, 0x01, 0x40);
1864 break;
1865 case SENSOR_PO2030N:
1866 case SENSOR_OV7660:
1867 reg_w1(gspca_dev, 0x01, 0x63);
1868 reg_w1(gspca_dev, 0x17, 0x20);
1869 reg_w1(gspca_dev, 0x01, 0x62);
1870 reg_w1(gspca_dev, 0x01, 0x42);
1871 break;
1872 case SENSOR_SP80708:
1873 reg_w1(gspca_dev, 0x01, 0x63);
1874 reg_w1(gspca_dev, 0x17, 0x20);
1875 reg_w1(gspca_dev, 0x01, 0x62);
1876 reg_w1(gspca_dev, 0x01, 0x42);
1877 msleep(100);
1878 reg_w1(gspca_dev, 0x02, 0x62);
1879 break;
1880 default:
1881/* case SENSOR_HV7131R: */
1882/* case SENSOR_MI0360: */
1883/* case SENSOR_MO4000: */
1884 reg_w1(gspca_dev, 0x01, 0x43);
1885 reg_w1(gspca_dev, 0x17, 0x61);
1886 reg_w1(gspca_dev, 0x01, 0x42);
1887 if (sd->sensor == SENSOR_HV7131R)
1888 hv7131r_probe(gspca_dev);
1889 break;
1890 }
1891}
1892
1893/* this function is called at probe time */ 1777/* this function is called at probe time */
1894static int sd_config(struct gspca_dev *gspca_dev, 1778static int sd_config(struct gspca_dev *gspca_dev,
1895 const struct usb_device_id *id) 1779 const struct usb_device_id *id)
@@ -1898,7 +1782,8 @@ static int sd_config(struct gspca_dev *gspca_dev,
1898 struct cam *cam; 1782 struct cam *cam;
1899 1783
1900 sd->bridge = id->driver_info >> 16; 1784 sd->bridge = id->driver_info >> 16;
1901 sd->sensor = id->driver_info; 1785 sd->sensor = id->driver_info >> 8;
1786 sd->flags = id->driver_info;
1902 1787
1903 cam = &gspca_dev->cam; 1788 cam = &gspca_dev->cam;
1904 if (sd->sensor == SENSOR_ADCM1700) { 1789 if (sd->sensor == SENSOR_ADCM1700) {
@@ -1929,7 +1814,7 @@ static int sd_init(struct gspca_dev *gspca_dev)
1929 /* setup a selector by bridge */ 1814 /* setup a selector by bridge */
1930 reg_w1(gspca_dev, 0xf1, 0x01); 1815 reg_w1(gspca_dev, 0xf1, 0x01);
1931 reg_r(gspca_dev, 0x00, 1); 1816 reg_r(gspca_dev, 0x00, 1);
1932 reg_w1(gspca_dev, 0xf1, gspca_dev->usb_buf[0]); 1817 reg_w1(gspca_dev, 0xf1, 0x00);
1933 reg_r(gspca_dev, 0x00, 1); /* get sonix chip id */ 1818 reg_r(gspca_dev, 0x00, 1); /* get sonix chip id */
1934 regF1 = gspca_dev->usb_buf[0]; 1819 regF1 = gspca_dev->usb_buf[0];
1935 if (gspca_dev->usb_err < 0) 1820 if (gspca_dev->usb_err < 0)
@@ -2423,10 +2308,17 @@ static int sd_start(struct gspca_dev *gspca_dev)
2423{ 2308{
2424 struct sd *sd = (struct sd *) gspca_dev; 2309 struct sd *sd = (struct sd *) gspca_dev;
2425 int i; 2310 int i;
2426 u8 reg1, reg17; 2311 u8 reg01, reg17;
2312 u8 reg0102[2];
2427 const u8 *sn9c1xx; 2313 const u8 *sn9c1xx;
2428 const u8 (*init)[8]; 2314 const u8 (*init)[8];
2315 const u8 *reg9a;
2429 int mode; 2316 int mode;
2317 static const u8 reg9a_def[] =
2318 {0x00, 0x40, 0x20, 0x00, 0x00, 0x00};
2319 static const u8 reg9a_spec[] =
2320 {0x00, 0x40, 0x38, 0x30, 0x00, 0x20};
2321 static const u8 regd4[] = {0x60, 0x00, 0x00};
2430 static const u8 C0[] = { 0x2d, 0x2d, 0x3a, 0x05, 0x04, 0x3f }; 2322 static const u8 C0[] = { 0x2d, 0x2d, 0x3a, 0x05, 0x04, 0x3f };
2431 static const u8 CA[] = { 0x28, 0xd8, 0x14, 0xec }; 2323 static const u8 CA[] = { 0x28, 0xd8, 0x14, 0xec };
2432 static const u8 CA_adcm1700[] = 2324 static const u8 CA_adcm1700[] =
@@ -2448,7 +2340,85 @@ static int sd_start(struct gspca_dev *gspca_dev)
2448 2340
2449 /* initialize the bridge */ 2341 /* initialize the bridge */
2450 sn9c1xx = sn_tb[sd->sensor]; 2342 sn9c1xx = sn_tb[sd->sensor];
2451 bridge_init(gspca_dev, sn9c1xx); 2343
2344 /* sensor clock already enabled in sd_init */
2345 /* reg_w1(gspca_dev, 0xf1, 0x00); */
2346 reg01 = sn9c1xx[1];
2347 if (sd->flags & PDN_INV)
2348 reg01 ^= S_PDN_INV; /* power down inverted */
2349 reg_w1(gspca_dev, 0x01, reg01);
2350
2351 /* configure gpio */
2352 reg0102[0] = reg01;
2353 reg0102[1] = sn9c1xx[2];
2354 if (gspca_dev->audio)
2355 reg0102[1] |= 0x04; /* keep the audio connection */
2356 reg_w(gspca_dev, 0x01, reg0102, 2);
2357 reg_w(gspca_dev, 0x08, &sn9c1xx[8], 2);
2358 reg_w(gspca_dev, 0x17, &sn9c1xx[0x17], 5);
2359 switch (sd->sensor) {
2360 case SENSOR_GC0307:
2361 case SENSOR_OV7660:
2362 case SENSOR_PO1030:
2363 case SENSOR_PO2030N:
2364 case SENSOR_SOI768:
2365 case SENSOR_SP80708:
2366 reg9a = reg9a_spec;
2367 break;
2368 default:
2369 reg9a = reg9a_def;
2370 break;
2371 }
2372 reg_w(gspca_dev, 0x9a, reg9a, 6);
2373
2374 reg_w(gspca_dev, 0xd4, regd4, sizeof regd4);
2375
2376 reg_w(gspca_dev, 0x03, &sn9c1xx[3], 0x0f);
2377
2378 reg17 = sn9c1xx[0x17];
2379 switch (sd->sensor) {
2380 case SENSOR_GC0307:
2381 msleep(50); /*fixme: is it useful? */
2382 break;
2383 case SENSOR_OM6802:
2384 msleep(10);
2385 reg_w1(gspca_dev, 0x02, 0x73);
2386 reg17 |= SEN_CLK_EN;
2387 reg_w1(gspca_dev, 0x17, reg17);
2388 reg_w1(gspca_dev, 0x01, 0x22);
2389 msleep(100);
2390 reg01 = SCL_SEL_OD | S_PDN_INV;
2391 reg17 &= MCK_SIZE_MASK;
2392 reg17 |= 0x04; /* clock / 4 */
2393 break;
2394 }
2395 reg01 |= SYS_SEL_48M;
2396 reg_w1(gspca_dev, 0x01, reg01);
2397 reg17 |= SEN_CLK_EN;
2398 reg_w1(gspca_dev, 0x17, reg17);
2399 reg01 &= ~S_PWR_DN; /* sensor power on */
2400 reg_w1(gspca_dev, 0x01, reg01);
2401 reg01 &= ~SYS_SEL_48M;
2402 reg_w1(gspca_dev, 0x01, reg01);
2403
2404 switch (sd->sensor) {
2405 case SENSOR_HV7131R:
2406 hv7131r_probe(gspca_dev); /*fixme: is it useful? */
2407 break;
2408 case SENSOR_OM6802:
2409 msleep(10);
2410 reg_w1(gspca_dev, 0x01, reg01);
2411 i2c_w8(gspca_dev, om6802_init0[0]);
2412 i2c_w8(gspca_dev, om6802_init0[1]);
2413 msleep(15);
2414 reg_w1(gspca_dev, 0x02, 0x71);
2415 msleep(150);
2416 break;
2417 case SENSOR_SP80708:
2418 msleep(100);
2419 reg_w1(gspca_dev, 0x02, 0x62);
2420 break;
2421 }
2452 2422
2453 /* initialize the sensor */ 2423 /* initialize the sensor */
2454 i2c_w_seq(gspca_dev, sensor_init[sd->sensor]); 2424 i2c_w_seq(gspca_dev, sensor_init[sd->sensor]);
@@ -2476,30 +2446,11 @@ static int sd_start(struct gspca_dev *gspca_dev)
2476 } 2446 }
2477 reg_w1(gspca_dev, 0x18, sn9c1xx[0x18]); 2447 reg_w1(gspca_dev, 0x18, sn9c1xx[0x18]);
2478 switch (sd->sensor) { 2448 switch (sd->sensor) {
2479 case SENSOR_GC0307: 2449 case SENSOR_OM6802:
2480 reg17 = 0xa2; 2450/* case SENSOR_OV7648: * fixme: sometimes */
2481 break;
2482 case SENSOR_MT9V111:
2483 case SENSOR_MI0360B:
2484 reg17 = 0xe0;
2485 break;
2486 case SENSOR_ADCM1700:
2487 case SENSOR_OV7630:
2488 reg17 = 0xe2;
2489 break;
2490 case SENSOR_OV7648:
2491 reg17 = 0x20;
2492 break;
2493 case SENSOR_OV7660:
2494 case SENSOR_SOI768:
2495 reg17 = 0xa0;
2496 break;
2497 case SENSOR_PO1030:
2498 case SENSOR_PO2030N:
2499 reg17 = 0xa0;
2500 break; 2451 break;
2501 default: 2452 default:
2502 reg17 = 0x60; 2453 reg17 |= DEF_EN;
2503 break; 2454 break;
2504 } 2455 }
2505 reg_w1(gspca_dev, 0x17, reg17); 2456 reg_w1(gspca_dev, 0x17, reg17);
@@ -2546,95 +2497,67 @@ static int sd_start(struct gspca_dev *gspca_dev)
2546 2497
2547 init = NULL; 2498 init = NULL;
2548 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv; 2499 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
2549 if (mode) 2500 reg01 |= SYS_SEL_48M | V_TX_EN;
2550 reg1 = 0x46; /* 320x240: clk 48Mhz, video trf enable */ 2501 reg17 &= ~MCK_SIZE_MASK;
2551 else 2502 reg17 |= 0x02; /* clock / 2 */
2552 reg1 = 0x06; /* 640x480: clk 24Mhz, video trf enable */
2553 reg17 = 0x61; /* 0x:20: enable sensor clock */
2554 switch (sd->sensor) { 2503 switch (sd->sensor) {
2555 case SENSOR_ADCM1700: 2504 case SENSOR_ADCM1700:
2556 init = adcm1700_sensor_param1; 2505 init = adcm1700_sensor_param1;
2557 reg1 = 0x46;
2558 reg17 = 0xe2;
2559 break; 2506 break;
2560 case SENSOR_GC0307: 2507 case SENSOR_GC0307:
2561 init = gc0307_sensor_param1; 2508 init = gc0307_sensor_param1;
2562 reg17 = 0xa2; 2509 break;
2563 reg1 = 0x44; 2510 case SENSOR_HV7131R:
2511 case SENSOR_MI0360:
2512 if (mode)
2513 reg01 |= SYS_SEL_48M; /* 320x240: clk 48Mhz */
2514 else
2515 reg01 &= ~SYS_SEL_48M; /* 640x480: clk 24Mhz */
2516 reg17 &= ~MCK_SIZE_MASK;
2517 reg17 |= 0x01; /* clock / 1 */
2564 break; 2518 break;
2565 case SENSOR_MI0360B: 2519 case SENSOR_MI0360B:
2566 init = mi0360b_sensor_param1; 2520 init = mi0360b_sensor_param1;
2567 reg1 &= ~0x02; /* don't inverse pin S_PWR_DN */
2568 reg17 = 0xe2;
2569 break; 2521 break;
2570 case SENSOR_MO4000: 2522 case SENSOR_MO4000:
2571 if (mode) { 2523 if (mode) { /* if 320x240 */
2572/* reg1 = 0x46; * 320 clk 48Mhz 60fp/s */ 2524 reg01 &= ~SYS_SEL_48M; /* clk 24Mz */
2573 reg1 = 0x06; /* clk 24Mz */ 2525 reg17 &= ~MCK_SIZE_MASK;
2574 } else { 2526 reg17 |= 0x01; /* clock / 1 */
2575 reg17 = 0x22; /* 640 MCKSIZE */
2576/* reg1 = 0x06; * 640 clk 24Mz (done) */
2577 } 2527 }
2578 break; 2528 break;
2579 case SENSOR_MT9V111: 2529 case SENSOR_MT9V111:
2580 init = mt9v111_sensor_param1; 2530 init = mt9v111_sensor_param1;
2581 if (mode) {
2582 reg1 = 0x04; /* 320 clk 48Mhz */
2583 } else {
2584/* reg1 = 0x06; * 640 clk 24Mz (done) */
2585 reg17 = 0xc2;
2586 }
2587 break; 2531 break;
2588 case SENSOR_OM6802: 2532 case SENSOR_OM6802:
2589 init = om6802_sensor_param1; 2533 init = om6802_sensor_param1;
2590 reg17 = 0x64; /* 640 MCKSIZE */ 2534 if (!mode) { /* if 640x480 */
2535 reg17 &= ~MCK_SIZE_MASK;
2536 reg17 |= 0x01; /* clock / 4 */
2537 }
2591 break; 2538 break;
2592 case SENSOR_OV7630: 2539 case SENSOR_OV7630:
2593 init = ov7630_sensor_param1; 2540 init = ov7630_sensor_param1;
2594 reg17 = 0xe2;
2595 reg1 = 0x44;
2596 break; 2541 break;
2597 case SENSOR_OV7648: 2542 case SENSOR_OV7648:
2598 init = ov7648_sensor_param1; 2543 init = ov7648_sensor_param1;
2599 reg17 = 0x21; 2544 reg17 &= ~MCK_SIZE_MASK;
2600/* reg1 = 0x42; * 42 - 46? */ 2545 reg17 |= 0x01; /* clock / 1 */
2601 break; 2546 break;
2602 case SENSOR_OV7660: 2547 case SENSOR_OV7660:
2603 init = ov7660_sensor_param1; 2548 init = ov7660_sensor_param1;
2604 if (sd->bridge == BRIDGE_SN9C120) {
2605 if (mode) { /* 320x240 - 160x120 */
2606 reg17 = 0xa2;
2607 reg1 = 0x44; /* 48 Mhz, video trf eneble */
2608 }
2609 } else {
2610 reg17 = 0x22;
2611 reg1 = 0x06; /* 24 Mhz, video trf eneble
2612 * inverse power down */
2613 }
2614 break; 2549 break;
2615 case SENSOR_PO1030: 2550 case SENSOR_PO1030:
2616 init = po1030_sensor_param1; 2551 init = po1030_sensor_param1;
2617 reg17 = 0xa2;
2618 reg1 = 0x44;
2619 break; 2552 break;
2620 case SENSOR_PO2030N: 2553 case SENSOR_PO2030N:
2621 init = po2030n_sensor_param1; 2554 init = po2030n_sensor_param1;
2622 reg1 = 0x46;
2623 reg17 = 0xa2;
2624 break; 2555 break;
2625 case SENSOR_SOI768: 2556 case SENSOR_SOI768:
2626 init = soi768_sensor_param1; 2557 init = soi768_sensor_param1;
2627 reg1 = 0x44;
2628 reg17 = 0xa2;
2629 break; 2558 break;
2630 case SENSOR_SP80708: 2559 case SENSOR_SP80708:
2631 init = sp80708_sensor_param1; 2560 init = sp80708_sensor_param1;
2632 if (mode) {
2633/*?? reg1 = 0x04; * 320 clk 48Mhz */
2634 } else {
2635 reg1 = 0x46; /* 640 clk 48Mz */
2636 reg17 = 0xa2;
2637 }
2638 break; 2561 break;
2639 } 2562 }
2640 2563
@@ -2684,7 +2607,9 @@ static int sd_start(struct gspca_dev *gspca_dev)
2684 setjpegqual(gspca_dev); 2607 setjpegqual(gspca_dev);
2685 2608
2686 reg_w1(gspca_dev, 0x17, reg17); 2609 reg_w1(gspca_dev, 0x17, reg17);
2687 reg_w1(gspca_dev, 0x01, reg1); 2610 reg_w1(gspca_dev, 0x01, reg01);
2611 sd->reg01 = reg01;
2612 sd->reg17 = reg17;
2688 2613
2689 sethvflip(gspca_dev); 2614 sethvflip(gspca_dev);
2690 setbrightness(gspca_dev); 2615 setbrightness(gspca_dev);
@@ -2706,41 +2631,64 @@ static void sd_stopN(struct gspca_dev *gspca_dev)
2706 { 0xa1, 0x21, 0x76, 0x20, 0x00, 0x00, 0x00, 0x10 }; 2631 { 0xa1, 0x21, 0x76, 0x20, 0x00, 0x00, 0x00, 0x10 };
2707 static const u8 stopsoi768[] = 2632 static const u8 stopsoi768[] =
2708 { 0xa1, 0x21, 0x12, 0x80, 0x00, 0x00, 0x00, 0x10 }; 2633 { 0xa1, 0x21, 0x12, 0x80, 0x00, 0x00, 0x00, 0x10 };
2709 u8 data; 2634 u8 reg01;
2710 const u8 *sn9c1xx; 2635 u8 reg17;
2711 2636
2712 data = 0x0b; 2637 reg01 = sd->reg01;
2638 reg17 = sd->reg17 & ~SEN_CLK_EN;
2713 switch (sd->sensor) { 2639 switch (sd->sensor) {
2640 case SENSOR_ADCM1700:
2714 case SENSOR_GC0307: 2641 case SENSOR_GC0307:
2715 data = 0x29; 2642 case SENSOR_PO2030N:
2643 case SENSOR_SP80708:
2644 reg01 |= LED;
2645 reg_w1(gspca_dev, 0x01, reg01);
2646 reg01 &= ~(LED | V_TX_EN);
2647 reg_w1(gspca_dev, 0x01, reg01);
2648/* reg_w1(gspca_dev, 0x02, 0x??); * LED off ? */
2716 break; 2649 break;
2717 case SENSOR_HV7131R: 2650 case SENSOR_HV7131R:
2651 reg01 &= ~V_TX_EN;
2652 reg_w1(gspca_dev, 0x01, reg01);
2718 i2c_w8(gspca_dev, stophv7131); 2653 i2c_w8(gspca_dev, stophv7131);
2719 data = 0x2b;
2720 break; 2654 break;
2721 case SENSOR_MI0360: 2655 case SENSOR_MI0360:
2722 case SENSOR_MI0360B: 2656 case SENSOR_MI0360B:
2657 reg01 &= ~V_TX_EN;
2658 reg_w1(gspca_dev, 0x01, reg01);
2659/* reg_w1(gspca_dev, 0x02, 0x40); * LED off ? */
2723 i2c_w8(gspca_dev, stopmi0360); 2660 i2c_w8(gspca_dev, stopmi0360);
2724 data = 0x29;
2725 break; 2661 break;
2726 case SENSOR_OV7648:
2727 i2c_w8(gspca_dev, stopov7648);
2728 /* fall thru */
2729 case SENSOR_MT9V111: 2662 case SENSOR_MT9V111:
2730 case SENSOR_OV7630: 2663 case SENSOR_OM6802:
2731 case SENSOR_PO1030: 2664 case SENSOR_PO1030:
2732 data = 0x29; 2665 reg01 &= ~V_TX_EN;
2666 reg_w1(gspca_dev, 0x01, reg01);
2667 break;
2668 case SENSOR_OV7630:
2669 case SENSOR_OV7648:
2670 reg01 &= ~V_TX_EN;
2671 reg_w1(gspca_dev, 0x01, reg01);
2672 i2c_w8(gspca_dev, stopov7648);
2673 break;
2674 case SENSOR_OV7660:
2675 reg01 &= ~V_TX_EN;
2676 reg_w1(gspca_dev, 0x01, reg01);
2733 break; 2677 break;
2734 case SENSOR_SOI768: 2678 case SENSOR_SOI768:
2735 i2c_w8(gspca_dev, stopsoi768); 2679 i2c_w8(gspca_dev, stopsoi768);
2736 data = 0x29;
2737 break; 2680 break;
2738 } 2681 }
2739 sn9c1xx = sn_tb[sd->sensor]; 2682
2740 reg_w1(gspca_dev, 0x01, sn9c1xx[1]); 2683 reg01 |= SCL_SEL_OD;
2741 reg_w1(gspca_dev, 0x17, sn9c1xx[0x17]); 2684 reg_w1(gspca_dev, 0x01, reg01);
2742 reg_w1(gspca_dev, 0x01, sn9c1xx[1]); 2685 reg01 |= S_PWR_DN; /* sensor power down */
2743 reg_w1(gspca_dev, 0x01, data); 2686 reg_w1(gspca_dev, 0x01, reg01);
2687 reg_w1(gspca_dev, 0x17, reg17);
2688 reg01 &= ~SYS_SEL_48M; /* clock 24MHz */
2689 reg_w1(gspca_dev, 0x01, reg01);
2690 reg01 |= LED;
2691 reg_w1(gspca_dev, 0x01, reg01);
2744 /* Don't disable sensor clock as that disables the button on the cam */ 2692 /* Don't disable sensor clock as that disables the button on the cam */
2745 /* reg_w1(gspca_dev, 0xf1, 0x01); */ 2693 /* reg_w1(gspca_dev, 0xf1, 0x01); */
2746} 2694}
@@ -2954,14 +2902,18 @@ static const struct sd_desc sd_desc = {
2954/* -- module initialisation -- */ 2902/* -- module initialisation -- */
2955#define BS(bridge, sensor) \ 2903#define BS(bridge, sensor) \
2956 .driver_info = (BRIDGE_ ## bridge << 16) \ 2904 .driver_info = (BRIDGE_ ## bridge << 16) \
2957 | SENSOR_ ## sensor 2905 | (SENSOR_ ## sensor << 8)
2906#define BSF(bridge, sensor, flags) \
2907 .driver_info = (BRIDGE_ ## bridge << 16) \
2908 | (SENSOR_ ## sensor << 8) \
2909 | (flags)
2958static const __devinitdata struct usb_device_id device_table[] = { 2910static const __devinitdata struct usb_device_id device_table[] = {
2959#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE 2911#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
2960 {USB_DEVICE(0x0458, 0x7025), BS(SN9C120, MI0360)}, 2912 {USB_DEVICE(0x0458, 0x7025), BS(SN9C120, MI0360)},
2961 {USB_DEVICE(0x0458, 0x702e), BS(SN9C120, OV7660)}, 2913 {USB_DEVICE(0x0458, 0x702e), BS(SN9C120, OV7660)},
2962#endif 2914#endif
2963 {USB_DEVICE(0x045e, 0x00f5), BS(SN9C105, OV7660)}, 2915 {USB_DEVICE(0x045e, 0x00f5), BSF(SN9C105, OV7660, PDN_INV)},
2964 {USB_DEVICE(0x045e, 0x00f7), BS(SN9C105, OV7660)}, 2916 {USB_DEVICE(0x045e, 0x00f7), BSF(SN9C105, OV7660, PDN_INV)},
2965 {USB_DEVICE(0x0471, 0x0327), BS(SN9C105, MI0360)}, 2917 {USB_DEVICE(0x0471, 0x0327), BS(SN9C105, MI0360)},
2966 {USB_DEVICE(0x0471, 0x0328), BS(SN9C105, MI0360)}, 2918 {USB_DEVICE(0x0471, 0x0328), BS(SN9C105, MI0360)},
2967 {USB_DEVICE(0x0471, 0x0330), BS(SN9C105, MI0360)}, 2919 {USB_DEVICE(0x0471, 0x0330), BS(SN9C105, MI0360)},
diff --git a/drivers/media/video/meye.c b/drivers/media/video/meye.c
index 2be23bccd3c8..48d2c2419c13 100644
--- a/drivers/media/video/meye.c
+++ b/drivers/media/video/meye.c
@@ -1659,7 +1659,7 @@ static const struct v4l2_file_operations meye_fops = {
1659 .open = meye_open, 1659 .open = meye_open,
1660 .release = meye_release, 1660 .release = meye_release,
1661 .mmap = meye_mmap, 1661 .mmap = meye_mmap,
1662 .ioctl = video_ioctl2, 1662 .unlocked_ioctl = video_ioctl2,
1663 .poll = meye_poll, 1663 .poll = meye_poll,
1664}; 1664};
1665 1665
@@ -1831,12 +1831,6 @@ static int __devinit meye_probe(struct pci_dev *pcidev,
1831 msleep(1); 1831 msleep(1);
1832 mchip_set(MCHIP_MM_INTA, MCHIP_MM_INTA_HIC_1_MASK); 1832 mchip_set(MCHIP_MM_INTA, MCHIP_MM_INTA_HIC_1_MASK);
1833 1833
1834 if (video_register_device(meye.vdev, VFL_TYPE_GRABBER,
1835 video_nr) < 0) {
1836 v4l2_err(v4l2_dev, "video_register_device failed\n");
1837 goto outvideoreg;
1838 }
1839
1840 mutex_init(&meye.lock); 1834 mutex_init(&meye.lock);
1841 init_waitqueue_head(&meye.proc_list); 1835 init_waitqueue_head(&meye.proc_list);
1842 meye.brightness = 32 << 10; 1836 meye.brightness = 32 << 10;
@@ -1858,6 +1852,12 @@ static int __devinit meye_probe(struct pci_dev *pcidev,
1858 sony_pic_camera_command(SONY_PIC_COMMAND_SETCAMERAPICTURE, 0); 1852 sony_pic_camera_command(SONY_PIC_COMMAND_SETCAMERAPICTURE, 0);
1859 sony_pic_camera_command(SONY_PIC_COMMAND_SETCAMERAAGC, 48); 1853 sony_pic_camera_command(SONY_PIC_COMMAND_SETCAMERAAGC, 48);
1860 1854
1855 if (video_register_device(meye.vdev, VFL_TYPE_GRABBER,
1856 video_nr) < 0) {
1857 v4l2_err(v4l2_dev, "video_register_device failed\n");
1858 goto outvideoreg;
1859 }
1860
1861 v4l2_info(v4l2_dev, "Motion Eye Camera Driver v%s.\n", 1861 v4l2_info(v4l2_dev, "Motion Eye Camera Driver v%s.\n",
1862 MEYE_DRIVER_VERSION); 1862 MEYE_DRIVER_VERSION);
1863 v4l2_info(v4l2_dev, "mchip KL5A72002 rev. %d, base %lx, irq %d\n", 1863 v4l2_info(v4l2_dev, "mchip KL5A72002 rev. %d, base %lx, irq %d\n",
diff --git a/drivers/media/video/pms.c b/drivers/media/video/pms.c
index 7129b50757db..7551907f8c28 100644
--- a/drivers/media/video/pms.c
+++ b/drivers/media/video/pms.c
@@ -932,7 +932,7 @@ static ssize_t pms_read(struct file *file, char __user *buf,
932 932
933static const struct v4l2_file_operations pms_fops = { 933static const struct v4l2_file_operations pms_fops = {
934 .owner = THIS_MODULE, 934 .owner = THIS_MODULE,
935 .ioctl = video_ioctl2, 935 .unlocked_ioctl = video_ioctl2,
936 .read = pms_read, 936 .read = pms_read,
937}; 937};
938 938
diff --git a/drivers/media/video/sh_vou.c b/drivers/media/video/sh_vou.c
index 4e5a8cf76ded..07cf0c6c7c1f 100644
--- a/drivers/media/video/sh_vou.c
+++ b/drivers/media/video/sh_vou.c
@@ -75,6 +75,7 @@ struct sh_vou_device {
75 int pix_idx; 75 int pix_idx;
76 struct videobuf_buffer *active; 76 struct videobuf_buffer *active;
77 enum sh_vou_status status; 77 enum sh_vou_status status;
78 struct mutex fop_lock;
78}; 79};
79 80
80struct sh_vou_file { 81struct sh_vou_file {
@@ -235,7 +236,7 @@ static void free_buffer(struct videobuf_queue *vq, struct videobuf_buffer *vb)
235 vb->state = VIDEOBUF_NEEDS_INIT; 236 vb->state = VIDEOBUF_NEEDS_INIT;
236} 237}
237 238
238/* Locking: caller holds vq->vb_lock mutex */ 239/* Locking: caller holds fop_lock mutex */
239static int sh_vou_buf_setup(struct videobuf_queue *vq, unsigned int *count, 240static int sh_vou_buf_setup(struct videobuf_queue *vq, unsigned int *count,
240 unsigned int *size) 241 unsigned int *size)
241{ 242{
@@ -257,7 +258,7 @@ static int sh_vou_buf_setup(struct videobuf_queue *vq, unsigned int *count,
257 return 0; 258 return 0;
258} 259}
259 260
260/* Locking: caller holds vq->vb_lock mutex */ 261/* Locking: caller holds fop_lock mutex */
261static int sh_vou_buf_prepare(struct videobuf_queue *vq, 262static int sh_vou_buf_prepare(struct videobuf_queue *vq,
262 struct videobuf_buffer *vb, 263 struct videobuf_buffer *vb,
263 enum v4l2_field field) 264 enum v4l2_field field)
@@ -306,7 +307,7 @@ static int sh_vou_buf_prepare(struct videobuf_queue *vq,
306 return 0; 307 return 0;
307} 308}
308 309
309/* Locking: caller holds vq->vb_lock mutex and vq->irqlock spinlock */ 310/* Locking: caller holds fop_lock mutex and vq->irqlock spinlock */
310static void sh_vou_buf_queue(struct videobuf_queue *vq, 311static void sh_vou_buf_queue(struct videobuf_queue *vq,
311 struct videobuf_buffer *vb) 312 struct videobuf_buffer *vb)
312{ 313{
@@ -1190,7 +1191,7 @@ static int sh_vou_open(struct file *file)
1190 V4L2_BUF_TYPE_VIDEO_OUTPUT, 1191 V4L2_BUF_TYPE_VIDEO_OUTPUT,
1191 V4L2_FIELD_NONE, 1192 V4L2_FIELD_NONE,
1192 sizeof(struct videobuf_buffer), vdev, 1193 sizeof(struct videobuf_buffer), vdev,
1193 NULL); 1194 &vou_dev->fop_lock);
1194 1195
1195 return 0; 1196 return 0;
1196} 1197}
@@ -1292,7 +1293,7 @@ static const struct v4l2_file_operations sh_vou_fops = {
1292 .owner = THIS_MODULE, 1293 .owner = THIS_MODULE,
1293 .open = sh_vou_open, 1294 .open = sh_vou_open,
1294 .release = sh_vou_release, 1295 .release = sh_vou_release,
1295 .ioctl = video_ioctl2, 1296 .unlocked_ioctl = video_ioctl2,
1296 .mmap = sh_vou_mmap, 1297 .mmap = sh_vou_mmap,
1297 .poll = sh_vou_poll, 1298 .poll = sh_vou_poll,
1298}; 1299};
@@ -1331,6 +1332,7 @@ static int __devinit sh_vou_probe(struct platform_device *pdev)
1331 1332
1332 INIT_LIST_HEAD(&vou_dev->queue); 1333 INIT_LIST_HEAD(&vou_dev->queue);
1333 spin_lock_init(&vou_dev->lock); 1334 spin_lock_init(&vou_dev->lock);
1335 mutex_init(&vou_dev->fop_lock);
1334 atomic_set(&vou_dev->use_count, 0); 1336 atomic_set(&vou_dev->use_count, 0);
1335 vou_dev->pdata = vou_pdata; 1337 vou_dev->pdata = vou_pdata;
1336 vou_dev->status = SH_VOU_IDLE; 1338 vou_dev->status = SH_VOU_IDLE;
@@ -1388,6 +1390,7 @@ static int __devinit sh_vou_probe(struct platform_device *pdev)
1388 vdev->tvnorms |= V4L2_STD_PAL; 1390 vdev->tvnorms |= V4L2_STD_PAL;
1389 vdev->v4l2_dev = &vou_dev->v4l2_dev; 1391 vdev->v4l2_dev = &vou_dev->v4l2_dev;
1390 vdev->release = video_device_release; 1392 vdev->release = video_device_release;
1393 vdev->lock = &vou_dev->fop_lock;
1391 1394
1392 vou_dev->vdev = vdev; 1395 vou_dev->vdev = vdev;
1393 video_set_drvdata(vdev, vou_dev); 1396 video_set_drvdata(vdev, vou_dev);
diff --git a/drivers/media/video/sn9c102/sn9c102_core.c b/drivers/media/video/sn9c102/sn9c102_core.c
index 28e19daadec9..f49fbfb7dc13 100644
--- a/drivers/media/video/sn9c102/sn9c102_core.c
+++ b/drivers/media/video/sn9c102/sn9c102_core.c
@@ -3238,7 +3238,7 @@ static const struct v4l2_file_operations sn9c102_fops = {
3238 .owner = THIS_MODULE, 3238 .owner = THIS_MODULE,
3239 .open = sn9c102_open, 3239 .open = sn9c102_open,
3240 .release = sn9c102_release, 3240 .release = sn9c102_release,
3241 .ioctl = sn9c102_ioctl, 3241 .unlocked_ioctl = sn9c102_ioctl,
3242 .read = sn9c102_read, 3242 .read = sn9c102_read,
3243 .poll = sn9c102_poll, 3243 .poll = sn9c102_poll,
3244 .mmap = sn9c102_mmap, 3244 .mmap = sn9c102_mmap,
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c
index f169f7736677..59f8a9ad3796 100644
--- a/drivers/media/video/uvc/uvc_ctrl.c
+++ b/drivers/media/video/uvc/uvc_ctrl.c
@@ -785,7 +785,7 @@ static void __uvc_find_control(struct uvc_entity *entity, __u32 v4l2_id,
785 } 785 }
786} 786}
787 787
788struct uvc_control *uvc_find_control(struct uvc_video_chain *chain, 788static struct uvc_control *uvc_find_control(struct uvc_video_chain *chain,
789 __u32 v4l2_id, struct uvc_control_mapping **mapping) 789 __u32 v4l2_id, struct uvc_control_mapping **mapping)
790{ 790{
791 struct uvc_control *ctrl = NULL; 791 struct uvc_control *ctrl = NULL;
@@ -944,6 +944,52 @@ done:
944 return ret; 944 return ret;
945} 945}
946 946
947/*
948 * Mapping V4L2 controls to UVC controls can be straighforward if done well.
949 * Most of the UVC controls exist in V4L2, and can be mapped directly. Some
950 * must be grouped (for instance the Red Balance, Blue Balance and Do White
951 * Balance V4L2 controls use the White Balance Component UVC control) or
952 * otherwise translated. The approach we take here is to use a translation
953 * table for the controls that can be mapped directly, and handle the others
954 * manually.
955 */
956int uvc_query_v4l2_menu(struct uvc_video_chain *chain,
957 struct v4l2_querymenu *query_menu)
958{
959 struct uvc_menu_info *menu_info;
960 struct uvc_control_mapping *mapping;
961 struct uvc_control *ctrl;
962 u32 index = query_menu->index;
963 u32 id = query_menu->id;
964 int ret;
965
966 memset(query_menu, 0, sizeof(*query_menu));
967 query_menu->id = id;
968 query_menu->index = index;
969
970 ret = mutex_lock_interruptible(&chain->ctrl_mutex);
971 if (ret < 0)
972 return -ERESTARTSYS;
973
974 ctrl = uvc_find_control(chain, query_menu->id, &mapping);
975 if (ctrl == NULL || mapping->v4l2_type != V4L2_CTRL_TYPE_MENU) {
976 ret = -EINVAL;
977 goto done;
978 }
979
980 if (query_menu->index >= mapping->menu_count) {
981 ret = -EINVAL;
982 goto done;
983 }
984
985 menu_info = &mapping->menu_info[query_menu->index];
986 strlcpy(query_menu->name, menu_info->name, sizeof query_menu->name);
987
988done:
989 mutex_unlock(&chain->ctrl_mutex);
990 return ret;
991}
992
947 993
948/* -------------------------------------------------------------------------- 994/* --------------------------------------------------------------------------
949 * Control transactions 995 * Control transactions
diff --git a/drivers/media/video/uvc/uvc_queue.c b/drivers/media/video/uvc/uvc_queue.c
index ed6d5449741c..f14581bd707f 100644
--- a/drivers/media/video/uvc/uvc_queue.c
+++ b/drivers/media/video/uvc/uvc_queue.c
@@ -90,6 +90,39 @@ void uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type,
90} 90}
91 91
92/* 92/*
93 * Free the video buffers.
94 *
95 * This function must be called with the queue lock held.
96 */
97static int __uvc_free_buffers(struct uvc_video_queue *queue)
98{
99 unsigned int i;
100
101 for (i = 0; i < queue->count; ++i) {
102 if (queue->buffer[i].vma_use_count != 0)
103 return -EBUSY;
104 }
105
106 if (queue->count) {
107 vfree(queue->mem);
108 queue->count = 0;
109 }
110
111 return 0;
112}
113
114int uvc_free_buffers(struct uvc_video_queue *queue)
115{
116 int ret;
117
118 mutex_lock(&queue->mutex);
119 ret = __uvc_free_buffers(queue);
120 mutex_unlock(&queue->mutex);
121
122 return ret;
123}
124
125/*
93 * Allocate the video buffers. 126 * Allocate the video buffers.
94 * 127 *
95 * Pages are reserved to make sure they will not be swapped, as they will be 128 * Pages are reserved to make sure they will not be swapped, as they will be
@@ -110,7 +143,7 @@ int uvc_alloc_buffers(struct uvc_video_queue *queue, unsigned int nbuffers,
110 143
111 mutex_lock(&queue->mutex); 144 mutex_lock(&queue->mutex);
112 145
113 if ((ret = uvc_free_buffers(queue)) < 0) 146 if ((ret = __uvc_free_buffers(queue)) < 0)
114 goto done; 147 goto done;
115 148
116 /* Bail out if no buffers should be allocated. */ 149 /* Bail out if no buffers should be allocated. */
@@ -152,28 +185,6 @@ done:
152} 185}
153 186
154/* 187/*
155 * Free the video buffers.
156 *
157 * This function must be called with the queue lock held.
158 */
159int uvc_free_buffers(struct uvc_video_queue *queue)
160{
161 unsigned int i;
162
163 for (i = 0; i < queue->count; ++i) {
164 if (queue->buffer[i].vma_use_count != 0)
165 return -EBUSY;
166 }
167
168 if (queue->count) {
169 vfree(queue->mem);
170 queue->count = 0;
171 }
172
173 return 0;
174}
175
176/*
177 * Check if buffers have been allocated. 188 * Check if buffers have been allocated.
178 */ 189 */
179int uvc_queue_allocated(struct uvc_video_queue *queue) 190int uvc_queue_allocated(struct uvc_video_queue *queue)
@@ -369,6 +380,82 @@ done:
369} 380}
370 381
371/* 382/*
383 * VMA operations.
384 */
385static void uvc_vm_open(struct vm_area_struct *vma)
386{
387 struct uvc_buffer *buffer = vma->vm_private_data;
388 buffer->vma_use_count++;
389}
390
391static void uvc_vm_close(struct vm_area_struct *vma)
392{
393 struct uvc_buffer *buffer = vma->vm_private_data;
394 buffer->vma_use_count--;
395}
396
397static const struct vm_operations_struct uvc_vm_ops = {
398 .open = uvc_vm_open,
399 .close = uvc_vm_close,
400};
401
402/*
403 * Memory-map a video buffer.
404 *
405 * This function implements video buffers memory mapping and is intended to be
406 * used by the device mmap handler.
407 */
408int uvc_queue_mmap(struct uvc_video_queue *queue, struct vm_area_struct *vma)
409{
410 struct uvc_buffer *uninitialized_var(buffer);
411 struct page *page;
412 unsigned long addr, start, size;
413 unsigned int i;
414 int ret = 0;
415
416 start = vma->vm_start;
417 size = vma->vm_end - vma->vm_start;
418
419 mutex_lock(&queue->mutex);
420
421 for (i = 0; i < queue->count; ++i) {
422 buffer = &queue->buffer[i];
423 if ((buffer->buf.m.offset >> PAGE_SHIFT) == vma->vm_pgoff)
424 break;
425 }
426
427 if (i == queue->count || size != queue->buf_size) {
428 ret = -EINVAL;
429 goto done;
430 }
431
432 /*
433 * VM_IO marks the area as being an mmaped region for I/O to a
434 * device. It also prevents the region from being core dumped.
435 */
436 vma->vm_flags |= VM_IO;
437
438 addr = (unsigned long)queue->mem + buffer->buf.m.offset;
439 while (size > 0) {
440 page = vmalloc_to_page((void *)addr);
441 if ((ret = vm_insert_page(vma, start, page)) < 0)
442 goto done;
443
444 start += PAGE_SIZE;
445 addr += PAGE_SIZE;
446 size -= PAGE_SIZE;
447 }
448
449 vma->vm_ops = &uvc_vm_ops;
450 vma->vm_private_data = buffer;
451 uvc_vm_open(vma);
452
453done:
454 mutex_unlock(&queue->mutex);
455 return ret;
456}
457
458/*
372 * Poll the video queue. 459 * Poll the video queue.
373 * 460 *
374 * This function implements video queue polling and is intended to be used by 461 * This function implements video queue polling and is intended to be used by
diff --git a/drivers/media/video/uvc/uvc_v4l2.c b/drivers/media/video/uvc/uvc_v4l2.c
index 6d15de9b5204..8cf61e8a634f 100644
--- a/drivers/media/video/uvc/uvc_v4l2.c
+++ b/drivers/media/video/uvc/uvc_v4l2.c
@@ -101,40 +101,6 @@ done:
101 */ 101 */
102 102
103/* 103/*
104 * Mapping V4L2 controls to UVC controls can be straighforward if done well.
105 * Most of the UVC controls exist in V4L2, and can be mapped directly. Some
106 * must be grouped (for instance the Red Balance, Blue Balance and Do White
107 * Balance V4L2 controls use the White Balance Component UVC control) or
108 * otherwise translated. The approach we take here is to use a translation
109 * table for the controls that can be mapped directly, and handle the others
110 * manually.
111 */
112static int uvc_v4l2_query_menu(struct uvc_video_chain *chain,
113 struct v4l2_querymenu *query_menu)
114{
115 struct uvc_menu_info *menu_info;
116 struct uvc_control_mapping *mapping;
117 struct uvc_control *ctrl;
118 u32 index = query_menu->index;
119 u32 id = query_menu->id;
120
121 ctrl = uvc_find_control(chain, query_menu->id, &mapping);
122 if (ctrl == NULL || mapping->v4l2_type != V4L2_CTRL_TYPE_MENU)
123 return -EINVAL;
124
125 if (query_menu->index >= mapping->menu_count)
126 return -EINVAL;
127
128 memset(query_menu, 0, sizeof(*query_menu));
129 query_menu->id = id;
130 query_menu->index = index;
131
132 menu_info = &mapping->menu_info[query_menu->index];
133 strlcpy(query_menu->name, menu_info->name, sizeof query_menu->name);
134 return 0;
135}
136
137/*
138 * Find the frame interval closest to the requested frame interval for the 104 * Find the frame interval closest to the requested frame interval for the
139 * given frame format and size. This should be done by the device as part of 105 * given frame format and size. This should be done by the device as part of
140 * the Video Probe and Commit negotiation, but some hardware don't implement 106 * the Video Probe and Commit negotiation, but some hardware don't implement
@@ -260,12 +226,14 @@ static int uvc_v4l2_try_format(struct uvc_streaming *stream,
260 * developers test their webcams with the Linux driver as well as with 226 * developers test their webcams with the Linux driver as well as with
261 * the Windows driver). 227 * the Windows driver).
262 */ 228 */
229 mutex_lock(&stream->mutex);
263 if (stream->dev->quirks & UVC_QUIRK_PROBE_EXTRAFIELDS) 230 if (stream->dev->quirks & UVC_QUIRK_PROBE_EXTRAFIELDS)
264 probe->dwMaxVideoFrameSize = 231 probe->dwMaxVideoFrameSize =
265 stream->ctrl.dwMaxVideoFrameSize; 232 stream->ctrl.dwMaxVideoFrameSize;
266 233
267 /* Probe the device. */ 234 /* Probe the device. */
268 ret = uvc_probe_video(stream, probe); 235 ret = uvc_probe_video(stream, probe);
236 mutex_unlock(&stream->mutex);
269 if (ret < 0) 237 if (ret < 0)
270 goto done; 238 goto done;
271 239
@@ -289,14 +257,21 @@ done:
289static int uvc_v4l2_get_format(struct uvc_streaming *stream, 257static int uvc_v4l2_get_format(struct uvc_streaming *stream,
290 struct v4l2_format *fmt) 258 struct v4l2_format *fmt)
291{ 259{
292 struct uvc_format *format = stream->cur_format; 260 struct uvc_format *format;
293 struct uvc_frame *frame = stream->cur_frame; 261 struct uvc_frame *frame;
262 int ret = 0;
294 263
295 if (fmt->type != stream->type) 264 if (fmt->type != stream->type)
296 return -EINVAL; 265 return -EINVAL;
297 266
298 if (format == NULL || frame == NULL) 267 mutex_lock(&stream->mutex);
299 return -EINVAL; 268 format = stream->cur_format;
269 frame = stream->cur_frame;
270
271 if (format == NULL || frame == NULL) {
272 ret = -EINVAL;
273 goto done;
274 }
300 275
301 fmt->fmt.pix.pixelformat = format->fcc; 276 fmt->fmt.pix.pixelformat = format->fcc;
302 fmt->fmt.pix.width = frame->wWidth; 277 fmt->fmt.pix.width = frame->wWidth;
@@ -307,7 +282,9 @@ static int uvc_v4l2_get_format(struct uvc_streaming *stream,
307 fmt->fmt.pix.colorspace = format->colorspace; 282 fmt->fmt.pix.colorspace = format->colorspace;
308 fmt->fmt.pix.priv = 0; 283 fmt->fmt.pix.priv = 0;
309 284
310 return 0; 285done:
286 mutex_unlock(&stream->mutex);
287 return ret;
311} 288}
312 289
313static int uvc_v4l2_set_format(struct uvc_streaming *stream, 290static int uvc_v4l2_set_format(struct uvc_streaming *stream,
@@ -321,18 +298,24 @@ static int uvc_v4l2_set_format(struct uvc_streaming *stream,
321 if (fmt->type != stream->type) 298 if (fmt->type != stream->type)
322 return -EINVAL; 299 return -EINVAL;
323 300
324 if (uvc_queue_allocated(&stream->queue))
325 return -EBUSY;
326
327 ret = uvc_v4l2_try_format(stream, fmt, &probe, &format, &frame); 301 ret = uvc_v4l2_try_format(stream, fmt, &probe, &format, &frame);
328 if (ret < 0) 302 if (ret < 0)
329 return ret; 303 return ret;
330 304
305 mutex_lock(&stream->mutex);
306
307 if (uvc_queue_allocated(&stream->queue)) {
308 ret = -EBUSY;
309 goto done;
310 }
311
331 memcpy(&stream->ctrl, &probe, sizeof probe); 312 memcpy(&stream->ctrl, &probe, sizeof probe);
332 stream->cur_format = format; 313 stream->cur_format = format;
333 stream->cur_frame = frame; 314 stream->cur_frame = frame;
334 315
335 return 0; 316done:
317 mutex_unlock(&stream->mutex);
318 return ret;
336} 319}
337 320
338static int uvc_v4l2_get_streamparm(struct uvc_streaming *stream, 321static int uvc_v4l2_get_streamparm(struct uvc_streaming *stream,
@@ -343,7 +326,10 @@ static int uvc_v4l2_get_streamparm(struct uvc_streaming *stream,
343 if (parm->type != stream->type) 326 if (parm->type != stream->type)
344 return -EINVAL; 327 return -EINVAL;
345 328
329 mutex_lock(&stream->mutex);
346 numerator = stream->ctrl.dwFrameInterval; 330 numerator = stream->ctrl.dwFrameInterval;
331 mutex_unlock(&stream->mutex);
332
347 denominator = 10000000; 333 denominator = 10000000;
348 uvc_simplify_fraction(&numerator, &denominator, 8, 333); 334 uvc_simplify_fraction(&numerator, &denominator, 8, 333);
349 335
@@ -370,7 +356,6 @@ static int uvc_v4l2_get_streamparm(struct uvc_streaming *stream,
370static int uvc_v4l2_set_streamparm(struct uvc_streaming *stream, 356static int uvc_v4l2_set_streamparm(struct uvc_streaming *stream,
371 struct v4l2_streamparm *parm) 357 struct v4l2_streamparm *parm)
372{ 358{
373 struct uvc_frame *frame = stream->cur_frame;
374 struct uvc_streaming_control probe; 359 struct uvc_streaming_control probe;
375 struct v4l2_fract timeperframe; 360 struct v4l2_fract timeperframe;
376 uint32_t interval; 361 uint32_t interval;
@@ -379,28 +364,36 @@ static int uvc_v4l2_set_streamparm(struct uvc_streaming *stream,
379 if (parm->type != stream->type) 364 if (parm->type != stream->type)
380 return -EINVAL; 365 return -EINVAL;
381 366
382 if (uvc_queue_streaming(&stream->queue))
383 return -EBUSY;
384
385 if (parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) 367 if (parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
386 timeperframe = parm->parm.capture.timeperframe; 368 timeperframe = parm->parm.capture.timeperframe;
387 else 369 else
388 timeperframe = parm->parm.output.timeperframe; 370 timeperframe = parm->parm.output.timeperframe;
389 371
390 memcpy(&probe, &stream->ctrl, sizeof probe);
391 interval = uvc_fraction_to_interval(timeperframe.numerator, 372 interval = uvc_fraction_to_interval(timeperframe.numerator,
392 timeperframe.denominator); 373 timeperframe.denominator);
393
394 uvc_trace(UVC_TRACE_FORMAT, "Setting frame interval to %u/%u (%u).\n", 374 uvc_trace(UVC_TRACE_FORMAT, "Setting frame interval to %u/%u (%u).\n",
395 timeperframe.numerator, timeperframe.denominator, interval); 375 timeperframe.numerator, timeperframe.denominator, interval);
396 probe.dwFrameInterval = uvc_try_frame_interval(frame, interval); 376
377 mutex_lock(&stream->mutex);
378
379 if (uvc_queue_streaming(&stream->queue)) {
380 mutex_unlock(&stream->mutex);
381 return -EBUSY;
382 }
383
384 memcpy(&probe, &stream->ctrl, sizeof probe);
385 probe.dwFrameInterval =
386 uvc_try_frame_interval(stream->cur_frame, interval);
397 387
398 /* Probe the device with the new settings. */ 388 /* Probe the device with the new settings. */
399 ret = uvc_probe_video(stream, &probe); 389 ret = uvc_probe_video(stream, &probe);
400 if (ret < 0) 390 if (ret < 0) {
391 mutex_unlock(&stream->mutex);
401 return ret; 392 return ret;
393 }
402 394
403 memcpy(&stream->ctrl, &probe, sizeof probe); 395 memcpy(&stream->ctrl, &probe, sizeof probe);
396 mutex_unlock(&stream->mutex);
404 397
405 /* Return the actual frame period. */ 398 /* Return the actual frame period. */
406 timeperframe.numerator = probe.dwFrameInterval; 399 timeperframe.numerator = probe.dwFrameInterval;
@@ -528,11 +521,9 @@ static int uvc_v4l2_release(struct file *file)
528 if (uvc_has_privileges(handle)) { 521 if (uvc_has_privileges(handle)) {
529 uvc_video_enable(stream, 0); 522 uvc_video_enable(stream, 0);
530 523
531 mutex_lock(&stream->queue.mutex);
532 if (uvc_free_buffers(&stream->queue) < 0) 524 if (uvc_free_buffers(&stream->queue) < 0)
533 uvc_printk(KERN_ERR, "uvc_v4l2_release: Unable to " 525 uvc_printk(KERN_ERR, "uvc_v4l2_release: Unable to "
534 "free buffers.\n"); 526 "free buffers.\n");
535 mutex_unlock(&stream->queue.mutex);
536 } 527 }
537 528
538 /* Release the file handle. */ 529 /* Release the file handle. */
@@ -624,7 +615,7 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
624 } 615 }
625 616
626 case VIDIOC_QUERYMENU: 617 case VIDIOC_QUERYMENU:
627 return uvc_v4l2_query_menu(chain, arg); 618 return uvc_query_v4l2_menu(chain, arg);
628 619
629 case VIDIOC_G_EXT_CTRLS: 620 case VIDIOC_G_EXT_CTRLS:
630 { 621 {
@@ -905,15 +896,17 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
905 case VIDIOC_CROPCAP: 896 case VIDIOC_CROPCAP:
906 { 897 {
907 struct v4l2_cropcap *ccap = arg; 898 struct v4l2_cropcap *ccap = arg;
908 struct uvc_frame *frame = stream->cur_frame;
909 899
910 if (ccap->type != stream->type) 900 if (ccap->type != stream->type)
911 return -EINVAL; 901 return -EINVAL;
912 902
913 ccap->bounds.left = 0; 903 ccap->bounds.left = 0;
914 ccap->bounds.top = 0; 904 ccap->bounds.top = 0;
915 ccap->bounds.width = frame->wWidth; 905
916 ccap->bounds.height = frame->wHeight; 906 mutex_lock(&stream->mutex);
907 ccap->bounds.width = stream->cur_frame->wWidth;
908 ccap->bounds.height = stream->cur_frame->wHeight;
909 mutex_unlock(&stream->mutex);
917 910
918 ccap->defrect = ccap->bounds; 911 ccap->defrect = ccap->bounds;
919 912
@@ -930,8 +923,6 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
930 case VIDIOC_REQBUFS: 923 case VIDIOC_REQBUFS:
931 { 924 {
932 struct v4l2_requestbuffers *rb = arg; 925 struct v4l2_requestbuffers *rb = arg;
933 unsigned int bufsize =
934 stream->ctrl.dwMaxVideoFrameSize;
935 926
936 if (rb->type != stream->type || 927 if (rb->type != stream->type ||
937 rb->memory != V4L2_MEMORY_MMAP) 928 rb->memory != V4L2_MEMORY_MMAP)
@@ -940,7 +931,10 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
940 if ((ret = uvc_acquire_privileges(handle)) < 0) 931 if ((ret = uvc_acquire_privileges(handle)) < 0)
941 return ret; 932 return ret;
942 933
943 ret = uvc_alloc_buffers(&stream->queue, rb->count, bufsize); 934 mutex_lock(&stream->mutex);
935 ret = uvc_alloc_buffers(&stream->queue, rb->count,
936 stream->ctrl.dwMaxVideoFrameSize);
937 mutex_unlock(&stream->mutex);
944 if (ret < 0) 938 if (ret < 0)
945 return ret; 939 return ret;
946 940
@@ -988,7 +982,9 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
988 if (!uvc_has_privileges(handle)) 982 if (!uvc_has_privileges(handle))
989 return -EBUSY; 983 return -EBUSY;
990 984
985 mutex_lock(&stream->mutex);
991 ret = uvc_video_enable(stream, 1); 986 ret = uvc_video_enable(stream, 1);
987 mutex_unlock(&stream->mutex);
992 if (ret < 0) 988 if (ret < 0)
993 return ret; 989 return ret;
994 break; 990 break;
@@ -1068,79 +1064,14 @@ static ssize_t uvc_v4l2_read(struct file *file, char __user *data,
1068 return -EINVAL; 1064 return -EINVAL;
1069} 1065}
1070 1066
1071/*
1072 * VMA operations.
1073 */
1074static void uvc_vm_open(struct vm_area_struct *vma)
1075{
1076 struct uvc_buffer *buffer = vma->vm_private_data;
1077 buffer->vma_use_count++;
1078}
1079
1080static void uvc_vm_close(struct vm_area_struct *vma)
1081{
1082 struct uvc_buffer *buffer = vma->vm_private_data;
1083 buffer->vma_use_count--;
1084}
1085
1086static const struct vm_operations_struct uvc_vm_ops = {
1087 .open = uvc_vm_open,
1088 .close = uvc_vm_close,
1089};
1090
1091static int uvc_v4l2_mmap(struct file *file, struct vm_area_struct *vma) 1067static int uvc_v4l2_mmap(struct file *file, struct vm_area_struct *vma)
1092{ 1068{
1093 struct uvc_fh *handle = file->private_data; 1069 struct uvc_fh *handle = file->private_data;
1094 struct uvc_streaming *stream = handle->stream; 1070 struct uvc_streaming *stream = handle->stream;
1095 struct uvc_video_queue *queue = &stream->queue;
1096 struct uvc_buffer *uninitialized_var(buffer);
1097 struct page *page;
1098 unsigned long addr, start, size;
1099 unsigned int i;
1100 int ret = 0;
1101 1071
1102 uvc_trace(UVC_TRACE_CALLS, "uvc_v4l2_mmap\n"); 1072 uvc_trace(UVC_TRACE_CALLS, "uvc_v4l2_mmap\n");
1103 1073
1104 start = vma->vm_start; 1074 return uvc_queue_mmap(&stream->queue, vma);
1105 size = vma->vm_end - vma->vm_start;
1106
1107 mutex_lock(&queue->mutex);
1108
1109 for (i = 0; i < queue->count; ++i) {
1110 buffer = &queue->buffer[i];
1111 if ((buffer->buf.m.offset >> PAGE_SHIFT) == vma->vm_pgoff)
1112 break;
1113 }
1114
1115 if (i == queue->count || size != queue->buf_size) {
1116 ret = -EINVAL;
1117 goto done;
1118 }
1119
1120 /*
1121 * VM_IO marks the area as being an mmaped region for I/O to a
1122 * device. It also prevents the region from being core dumped.
1123 */
1124 vma->vm_flags |= VM_IO;
1125
1126 addr = (unsigned long)queue->mem + buffer->buf.m.offset;
1127 while (size > 0) {
1128 page = vmalloc_to_page((void *)addr);
1129 if ((ret = vm_insert_page(vma, start, page)) < 0)
1130 goto done;
1131
1132 start += PAGE_SIZE;
1133 addr += PAGE_SIZE;
1134 size -= PAGE_SIZE;
1135 }
1136
1137 vma->vm_ops = &uvc_vm_ops;
1138 vma->vm_private_data = buffer;
1139 uvc_vm_open(vma);
1140
1141done:
1142 mutex_unlock(&queue->mutex);
1143 return ret;
1144} 1075}
1145 1076
1146static unsigned int uvc_v4l2_poll(struct file *file, poll_table *wait) 1077static unsigned int uvc_v4l2_poll(struct file *file, poll_table *wait)
@@ -1157,7 +1088,7 @@ const struct v4l2_file_operations uvc_fops = {
1157 .owner = THIS_MODULE, 1088 .owner = THIS_MODULE,
1158 .open = uvc_v4l2_open, 1089 .open = uvc_v4l2_open,
1159 .release = uvc_v4l2_release, 1090 .release = uvc_v4l2_release,
1160 .ioctl = uvc_v4l2_ioctl, 1091 .unlocked_ioctl = uvc_v4l2_ioctl,
1161 .read = uvc_v4l2_read, 1092 .read = uvc_v4l2_read,
1162 .mmap = uvc_v4l2_mmap, 1093 .mmap = uvc_v4l2_mmap,
1163 .poll = uvc_v4l2_poll, 1094 .poll = uvc_v4l2_poll,
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index 5555f0102838..5673d673504b 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -293,8 +293,6 @@ int uvc_probe_video(struct uvc_streaming *stream,
293 unsigned int i; 293 unsigned int i;
294 int ret; 294 int ret;
295 295
296 mutex_lock(&stream->mutex);
297
298 /* Perform probing. The device should adjust the requested values 296 /* Perform probing. The device should adjust the requested values
299 * according to its capabilities. However, some devices, namely the 297 * according to its capabilities. However, some devices, namely the
300 * first generation UVC Logitech webcams, don't implement the Video 298 * first generation UVC Logitech webcams, don't implement the Video
@@ -346,7 +344,6 @@ int uvc_probe_video(struct uvc_streaming *stream,
346 } 344 }
347 345
348done: 346done:
349 mutex_unlock(&stream->mutex);
350 return ret; 347 return ret;
351} 348}
352 349
diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h
index d97cf6d6a4f9..45f01e7e13d2 100644
--- a/drivers/media/video/uvc/uvcvideo.h
+++ b/drivers/media/video/uvc/uvcvideo.h
@@ -436,7 +436,9 @@ struct uvc_streaming {
436 struct uvc_streaming_control ctrl; 436 struct uvc_streaming_control ctrl;
437 struct uvc_format *cur_format; 437 struct uvc_format *cur_format;
438 struct uvc_frame *cur_frame; 438 struct uvc_frame *cur_frame;
439 439 /* Protect access to ctrl, cur_format, cur_frame and hardware video
440 * probe control.
441 */
440 struct mutex mutex; 442 struct mutex mutex;
441 443
442 unsigned int frozen : 1; 444 unsigned int frozen : 1;
@@ -574,6 +576,8 @@ extern int uvc_queue_enable(struct uvc_video_queue *queue, int enable);
574extern void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect); 576extern void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect);
575extern struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue, 577extern struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
576 struct uvc_buffer *buf); 578 struct uvc_buffer *buf);
579extern int uvc_queue_mmap(struct uvc_video_queue *queue,
580 struct vm_area_struct *vma);
577extern unsigned int uvc_queue_poll(struct uvc_video_queue *queue, 581extern unsigned int uvc_queue_poll(struct uvc_video_queue *queue,
578 struct file *file, poll_table *wait); 582 struct file *file, poll_table *wait);
579extern int uvc_queue_allocated(struct uvc_video_queue *queue); 583extern int uvc_queue_allocated(struct uvc_video_queue *queue);
@@ -606,10 +610,10 @@ extern int uvc_status_suspend(struct uvc_device *dev);
606extern int uvc_status_resume(struct uvc_device *dev); 610extern int uvc_status_resume(struct uvc_device *dev);
607 611
608/* Controls */ 612/* Controls */
609extern struct uvc_control *uvc_find_control(struct uvc_video_chain *chain,
610 __u32 v4l2_id, struct uvc_control_mapping **mapping);
611extern int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain, 613extern int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
612 struct v4l2_queryctrl *v4l2_ctrl); 614 struct v4l2_queryctrl *v4l2_ctrl);
615extern int uvc_query_v4l2_menu(struct uvc_video_chain *chain,
616 struct v4l2_querymenu *query_menu);
613 617
614extern int uvc_ctrl_add_mapping(struct uvc_video_chain *chain, 618extern int uvc_ctrl_add_mapping(struct uvc_video_chain *chain,
615 const struct uvc_control_mapping *mapping); 619 const struct uvc_control_mapping *mapping);
diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c
index 03f7f4670e9b..359e23290a7e 100644
--- a/drivers/media/video/v4l2-dev.c
+++ b/drivers/media/video/v4l2-dev.c
@@ -186,12 +186,12 @@ static ssize_t v4l2_read(struct file *filp, char __user *buf,
186 size_t sz, loff_t *off) 186 size_t sz, loff_t *off)
187{ 187{
188 struct video_device *vdev = video_devdata(filp); 188 struct video_device *vdev = video_devdata(filp);
189 int ret = -EIO; 189 int ret = -ENODEV;
190 190
191 if (!vdev->fops->read) 191 if (!vdev->fops->read)
192 return -EINVAL; 192 return -EINVAL;
193 if (vdev->lock) 193 if (vdev->lock && mutex_lock_interruptible(vdev->lock))
194 mutex_lock(vdev->lock); 194 return -ERESTARTSYS;
195 if (video_is_registered(vdev)) 195 if (video_is_registered(vdev))
196 ret = vdev->fops->read(filp, buf, sz, off); 196 ret = vdev->fops->read(filp, buf, sz, off);
197 if (vdev->lock) 197 if (vdev->lock)
@@ -203,12 +203,12 @@ static ssize_t v4l2_write(struct file *filp, const char __user *buf,
203 size_t sz, loff_t *off) 203 size_t sz, loff_t *off)
204{ 204{
205 struct video_device *vdev = video_devdata(filp); 205 struct video_device *vdev = video_devdata(filp);
206 int ret = -EIO; 206 int ret = -ENODEV;
207 207
208 if (!vdev->fops->write) 208 if (!vdev->fops->write)
209 return -EINVAL; 209 return -EINVAL;
210 if (vdev->lock) 210 if (vdev->lock && mutex_lock_interruptible(vdev->lock))
211 mutex_lock(vdev->lock); 211 return -ERESTARTSYS;
212 if (video_is_registered(vdev)) 212 if (video_is_registered(vdev))
213 ret = vdev->fops->write(filp, buf, sz, off); 213 ret = vdev->fops->write(filp, buf, sz, off);
214 if (vdev->lock) 214 if (vdev->lock)
@@ -219,10 +219,10 @@ static ssize_t v4l2_write(struct file *filp, const char __user *buf,
219static unsigned int v4l2_poll(struct file *filp, struct poll_table_struct *poll) 219static unsigned int v4l2_poll(struct file *filp, struct poll_table_struct *poll)
220{ 220{
221 struct video_device *vdev = video_devdata(filp); 221 struct video_device *vdev = video_devdata(filp);
222 int ret = DEFAULT_POLLMASK; 222 int ret = POLLERR | POLLHUP;
223 223
224 if (!vdev->fops->poll) 224 if (!vdev->fops->poll)
225 return ret; 225 return DEFAULT_POLLMASK;
226 if (vdev->lock) 226 if (vdev->lock)
227 mutex_lock(vdev->lock); 227 mutex_lock(vdev->lock);
228 if (video_is_registered(vdev)) 228 if (video_is_registered(vdev))
@@ -238,20 +238,45 @@ static long v4l2_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
238 int ret = -ENODEV; 238 int ret = -ENODEV;
239 239
240 if (vdev->fops->unlocked_ioctl) { 240 if (vdev->fops->unlocked_ioctl) {
241 if (vdev->lock) 241 if (vdev->lock && mutex_lock_interruptible(vdev->lock))
242 mutex_lock(vdev->lock); 242 return -ERESTARTSYS;
243 if (video_is_registered(vdev)) 243 if (video_is_registered(vdev))
244 ret = vdev->fops->unlocked_ioctl(filp, cmd, arg); 244 ret = vdev->fops->unlocked_ioctl(filp, cmd, arg);
245 if (vdev->lock) 245 if (vdev->lock)
246 mutex_unlock(vdev->lock); 246 mutex_unlock(vdev->lock);
247 } else if (vdev->fops->ioctl) { 247 } else if (vdev->fops->ioctl) {
248 /* TODO: convert all drivers to unlocked_ioctl */ 248 /* This code path is a replacement for the BKL. It is a major
249 * hack but it will have to do for those drivers that are not
250 * yet converted to use unlocked_ioctl.
251 *
252 * There are two options: if the driver implements struct
253 * v4l2_device, then the lock defined there is used to
254 * serialize the ioctls. Otherwise the v4l2 core lock defined
255 * below is used. This lock is really bad since it serializes
256 * completely independent devices.
257 *
258 * Both variants suffer from the same problem: if the driver
259 * sleeps, then it blocks all ioctls since the lock is still
260 * held. This is very common for VIDIOC_DQBUF since that
261 * normally waits for a frame to arrive. As a result any other
262 * ioctl calls will proceed very, very slowly since each call
263 * will have to wait for the VIDIOC_QBUF to finish. Things that
264 * should take 0.01s may now take 10-20 seconds.
265 *
266 * The workaround is to *not* take the lock for VIDIOC_DQBUF.
267 * This actually works OK for videobuf-based drivers, since
268 * videobuf will take its own internal lock.
269 */
249 static DEFINE_MUTEX(v4l2_ioctl_mutex); 270 static DEFINE_MUTEX(v4l2_ioctl_mutex);
271 struct mutex *m = vdev->v4l2_dev ?
272 &vdev->v4l2_dev->ioctl_lock : &v4l2_ioctl_mutex;
250 273
251 mutex_lock(&v4l2_ioctl_mutex); 274 if (cmd != VIDIOC_DQBUF && mutex_lock_interruptible(m))
275 return -ERESTARTSYS;
252 if (video_is_registered(vdev)) 276 if (video_is_registered(vdev))
253 ret = vdev->fops->ioctl(filp, cmd, arg); 277 ret = vdev->fops->ioctl(filp, cmd, arg);
254 mutex_unlock(&v4l2_ioctl_mutex); 278 if (cmd != VIDIOC_DQBUF)
279 mutex_unlock(m);
255 } else 280 } else
256 ret = -ENOTTY; 281 ret = -ENOTTY;
257 282
@@ -265,8 +290,8 @@ static int v4l2_mmap(struct file *filp, struct vm_area_struct *vm)
265 290
266 if (!vdev->fops->mmap) 291 if (!vdev->fops->mmap)
267 return ret; 292 return ret;
268 if (vdev->lock) 293 if (vdev->lock && mutex_lock_interruptible(vdev->lock))
269 mutex_lock(vdev->lock); 294 return -ERESTARTSYS;
270 if (video_is_registered(vdev)) 295 if (video_is_registered(vdev))
271 ret = vdev->fops->mmap(filp, vm); 296 ret = vdev->fops->mmap(filp, vm);
272 if (vdev->lock) 297 if (vdev->lock)
@@ -284,7 +309,7 @@ static int v4l2_open(struct inode *inode, struct file *filp)
284 mutex_lock(&videodev_lock); 309 mutex_lock(&videodev_lock);
285 vdev = video_devdata(filp); 310 vdev = video_devdata(filp);
286 /* return ENODEV if the video device has already been removed. */ 311 /* return ENODEV if the video device has already been removed. */
287 if (vdev == NULL) { 312 if (vdev == NULL || !video_is_registered(vdev)) {
288 mutex_unlock(&videodev_lock); 313 mutex_unlock(&videodev_lock);
289 return -ENODEV; 314 return -ENODEV;
290 } 315 }
@@ -292,8 +317,10 @@ static int v4l2_open(struct inode *inode, struct file *filp)
292 video_get(vdev); 317 video_get(vdev);
293 mutex_unlock(&videodev_lock); 318 mutex_unlock(&videodev_lock);
294 if (vdev->fops->open) { 319 if (vdev->fops->open) {
295 if (vdev->lock) 320 if (vdev->lock && mutex_lock_interruptible(vdev->lock)) {
296 mutex_lock(vdev->lock); 321 ret = -ERESTARTSYS;
322 goto err;
323 }
297 if (video_is_registered(vdev)) 324 if (video_is_registered(vdev))
298 ret = vdev->fops->open(filp); 325 ret = vdev->fops->open(filp);
299 else 326 else
@@ -302,6 +329,7 @@ static int v4l2_open(struct inode *inode, struct file *filp)
302 mutex_unlock(vdev->lock); 329 mutex_unlock(vdev->lock);
303 } 330 }
304 331
332err:
305 /* decrease the refcount in case of an error */ 333 /* decrease the refcount in case of an error */
306 if (ret) 334 if (ret)
307 video_put(vdev); 335 video_put(vdev);
@@ -596,7 +624,12 @@ void video_unregister_device(struct video_device *vdev)
596 if (!vdev || !video_is_registered(vdev)) 624 if (!vdev || !video_is_registered(vdev))
597 return; 625 return;
598 626
627 mutex_lock(&videodev_lock);
628 /* This must be in a critical section to prevent a race with v4l2_open.
629 * Once this bit has been cleared video_get may never be called again.
630 */
599 clear_bit(V4L2_FL_REGISTERED, &vdev->flags); 631 clear_bit(V4L2_FL_REGISTERED, &vdev->flags);
632 mutex_unlock(&videodev_lock);
600 device_unregister(&vdev->dev); 633 device_unregister(&vdev->dev);
601} 634}
602EXPORT_SYMBOL(video_unregister_device); 635EXPORT_SYMBOL(video_unregister_device);
diff --git a/drivers/media/video/v4l2-device.c b/drivers/media/video/v4l2-device.c
index 0b08f96b74a5..7fe6f92af480 100644
--- a/drivers/media/video/v4l2-device.c
+++ b/drivers/media/video/v4l2-device.c
@@ -35,6 +35,7 @@ int v4l2_device_register(struct device *dev, struct v4l2_device *v4l2_dev)
35 35
36 INIT_LIST_HEAD(&v4l2_dev->subdevs); 36 INIT_LIST_HEAD(&v4l2_dev->subdevs);
37 spin_lock_init(&v4l2_dev->lock); 37 spin_lock_init(&v4l2_dev->lock);
38 mutex_init(&v4l2_dev->ioctl_lock);
38 v4l2_dev->dev = dev; 39 v4l2_dev->dev = dev;
39 if (dev == NULL) { 40 if (dev == NULL) {
40 /* If dev == NULL, then name must be filled in by the caller */ 41 /* If dev == NULL, then name must be filled in by the caller */
diff --git a/drivers/media/video/w9966.c b/drivers/media/video/w9966.c
index 635420d8d84a..019ee206cbee 100644
--- a/drivers/media/video/w9966.c
+++ b/drivers/media/video/w9966.c
@@ -815,7 +815,7 @@ out:
815 815
816static const struct v4l2_file_operations w9966_fops = { 816static const struct v4l2_file_operations w9966_fops = {
817 .owner = THIS_MODULE, 817 .owner = THIS_MODULE,
818 .ioctl = video_ioctl2, 818 .unlocked_ioctl = video_ioctl2,
819 .read = w9966_v4l_read, 819 .read = w9966_v4l_read,
820}; 820};
821 821
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 003170ea2e39..69546e9213dd 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -64,77 +64,6 @@ void pci_bus_remove_resources(struct pci_bus *bus)
64 } 64 }
65} 65}
66 66
67static bool pci_bus_resource_better(struct resource *res1, bool pos1,
68 struct resource *res2, bool pos2)
69{
70 /* If exactly one is positive decode, always prefer that one */
71 if (pos1 != pos2)
72 return pos1 ? true : false;
73
74 /* Prefer the one that contains the highest address */
75 if (res1->end != res2->end)
76 return (res1->end > res2->end) ? true : false;
77
78 /* Otherwise, prefer the one with highest "center of gravity" */
79 if (res1->start != res2->start)
80 return (res1->start > res2->start) ? true : false;
81
82 /* Otherwise, choose one arbitrarily (but consistently) */
83 return (res1 > res2) ? true : false;
84}
85
86static bool pci_bus_resource_positive(struct pci_bus *bus, struct resource *res)
87{
88 struct pci_bus_resource *bus_res;
89
90 /*
91 * This relies on the fact that pci_bus.resource[] refers to P2P or
92 * CardBus bridge base/limit registers, which are always positively
93 * decoded. The pci_bus.resources list contains host bridge or
94 * subtractively decoded resources.
95 */
96 list_for_each_entry(bus_res, &bus->resources, list) {
97 if (bus_res->res == res)
98 return (bus_res->flags & PCI_SUBTRACTIVE_DECODE) ?
99 false : true;
100 }
101 return true;
102}
103
104/*
105 * Find the next-best bus resource after the cursor "res". If the cursor is
106 * NULL, return the best resource. "Best" means that we prefer positive
107 * decode regions over subtractive decode, then those at higher addresses.
108 */
109static struct resource *pci_bus_find_resource_prev(struct pci_bus *bus,
110 unsigned int type,
111 struct resource *res)
112{
113 bool res_pos, r_pos, prev_pos = false;
114 struct resource *r, *prev = NULL;
115 int i;
116
117 res_pos = pci_bus_resource_positive(bus, res);
118 pci_bus_for_each_resource(bus, r, i) {
119 if (!r)
120 continue;
121
122 if ((r->flags & IORESOURCE_TYPE_BITS) != type)
123 continue;
124
125 r_pos = pci_bus_resource_positive(bus, r);
126 if (!res || pci_bus_resource_better(res, res_pos, r, r_pos)) {
127 if (!prev || pci_bus_resource_better(r, r_pos,
128 prev, prev_pos)) {
129 prev = r;
130 prev_pos = r_pos;
131 }
132 }
133 }
134
135 return prev;
136}
137
138/** 67/**
139 * pci_bus_alloc_resource - allocate a resource from a parent bus 68 * pci_bus_alloc_resource - allocate a resource from a parent bus
140 * @bus: PCI bus 69 * @bus: PCI bus
@@ -160,10 +89,9 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
160 resource_size_t), 89 resource_size_t),
161 void *alignf_data) 90 void *alignf_data)
162{ 91{
163 int ret = -ENOMEM; 92 int i, ret = -ENOMEM;
164 struct resource *r; 93 struct resource *r;
165 resource_size_t max = -1; 94 resource_size_t max = -1;
166 unsigned int type = res->flags & IORESOURCE_TYPE_BITS;
167 95
168 type_mask |= IORESOURCE_IO | IORESOURCE_MEM; 96 type_mask |= IORESOURCE_IO | IORESOURCE_MEM;
169 97
@@ -171,9 +99,10 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
171 if (!(res->flags & IORESOURCE_MEM_64)) 99 if (!(res->flags & IORESOURCE_MEM_64))
172 max = PCIBIOS_MAX_MEM_32; 100 max = PCIBIOS_MAX_MEM_32;
173 101
174 /* Look for space at highest addresses first */ 102 pci_bus_for_each_resource(bus, r, i) {
175 r = pci_bus_find_resource_prev(bus, type, NULL); 103 if (!r)
176 for ( ; r; r = pci_bus_find_resource_prev(bus, type, r)) { 104 continue;
105
177 /* type_mask must match */ 106 /* type_mask must match */
178 if ((res->flags ^ r->flags) & type_mask) 107 if ((res->flags ^ r->flags) & type_mask)
179 continue; 108 continue;
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 0157708d474d..09933eb9126b 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -1417,6 +1417,11 @@ int __init enable_drhd_fault_handling(void)
1417 (unsigned long long)drhd->reg_base_addr, ret); 1417 (unsigned long long)drhd->reg_base_addr, ret);
1418 return -1; 1418 return -1;
1419 } 1419 }
1420
1421 /*
1422 * Clear any previous faults.
1423 */
1424 dmar_fault(iommu->irq, iommu);
1420 } 1425 }
1421 1426
1422 return 0; 1427 return 0;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6f9350cabbd5..53a786fd0d40 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2329,6 +2329,9 @@ static void __devinit nvbridge_check_legacy_irq_routing(struct pci_dev *dev)
2329{ 2329{
2330 u32 cfg; 2330 u32 cfg;
2331 2331
2332 if (!pci_find_capability(dev, PCI_CAP_ID_HT))
2333 return;
2334
2332 pci_read_config_dword(dev, 0x74, &cfg); 2335 pci_read_config_dword(dev, 0x74, &cfg);
2333 2336
2334 if (cfg & ((1 << 2) | (1 << 15))) { 2337 if (cfg & ((1 << 2) | (1 << 15))) {
@@ -2764,6 +2767,29 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_m
2764DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832); 2767DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
2765#endif /*CONFIG_MMC_RICOH_MMC*/ 2768#endif /*CONFIG_MMC_RICOH_MMC*/
2766 2769
2770#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
2771#define VTUNCERRMSK_REG 0x1ac
2772#define VTD_MSK_SPEC_ERRORS (1 << 31)
2773/*
2774 * This is a quirk for masking vt-d spec defined errors to platform error
2775 * handling logic. With out this, platforms using Intel 7500, 5500 chipsets
2776 * (and the derivative chipsets like X58 etc) seem to generate NMI/SMI (based
2777 * on the RAS config settings of the platform) when a vt-d fault happens.
2778 * The resulting SMI caused the system to hang.
2779 *
2780 * VT-d spec related errors are already handled by the VT-d OS code, so no
2781 * need to report the same error through other channels.
2782 */
2783static void vtd_mask_spec_errors(struct pci_dev *dev)
2784{
2785 u32 word;
2786
2787 pci_read_config_dword(dev, VTUNCERRMSK_REG, &word);
2788 pci_write_config_dword(dev, VTUNCERRMSK_REG, word | VTD_MSK_SPEC_ERRORS);
2789}
2790DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x342e, vtd_mask_spec_errors);
2791DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors);
2792#endif
2767 2793
2768static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, 2794static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
2769 struct pci_fixup *end) 2795 struct pci_fixup *end)
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index 5b6bbaea59fe..4a3842212c50 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -1637,9 +1637,8 @@ struct request_queue *__scsi_alloc_queue(struct Scsi_Host *shost,
1637 1637
1638 blk_queue_max_segment_size(q, dma_get_max_seg_size(dev)); 1638 blk_queue_max_segment_size(q, dma_get_max_seg_size(dev));
1639 1639
1640 /* New queue, no concurrency on queue_flags */
1641 if (!shost->use_clustering) 1640 if (!shost->use_clustering)
1642 queue_flag_clear_unlocked(QUEUE_FLAG_CLUSTER, q); 1641 q->limits.cluster = 0;
1643 1642
1644 /* 1643 /*
1645 * set a reasonable default alignment on word boundaries: the 1644 * set a reasonable default alignment on word boundaries: the
diff --git a/drivers/staging/cx25821/cx25821-video.c b/drivers/staging/cx25821/cx25821-video.c
index e7f1d5778cec..52389308f333 100644
--- a/drivers/staging/cx25821/cx25821-video.c
+++ b/drivers/staging/cx25821/cx25821-video.c
@@ -92,7 +92,7 @@ int cx25821_get_format_size(void)
92 return ARRAY_SIZE(formats); 92 return ARRAY_SIZE(formats);
93} 93}
94 94
95struct cx25821_fmt *format_by_fourcc(unsigned int fourcc) 95struct cx25821_fmt *cx25821_format_by_fourcc(unsigned int fourcc)
96{ 96{
97 unsigned int i; 97 unsigned int i;
98 98
@@ -848,7 +848,7 @@ static int video_open(struct file *file)
848 pix_format = 848 pix_format =
849 (dev->channels[ch_id].pixel_formats == 849 (dev->channels[ch_id].pixel_formats ==
850 PIXEL_FRMT_411) ? V4L2_PIX_FMT_Y41P : V4L2_PIX_FMT_YUYV; 850 PIXEL_FRMT_411) ? V4L2_PIX_FMT_Y41P : V4L2_PIX_FMT_YUYV;
851 fh->fmt = format_by_fourcc(pix_format); 851 fh->fmt = cx25821_format_by_fourcc(pix_format);
852 852
853 v4l2_prio_open(&dev->channels[ch_id].prio, &fh->prio); 853 v4l2_prio_open(&dev->channels[ch_id].prio, &fh->prio);
854 854
@@ -1010,7 +1010,7 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1010 if (0 != err) 1010 if (0 != err)
1011 return err; 1011 return err;
1012 1012
1013 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat); 1013 fh->fmt = cx25821_format_by_fourcc(f->fmt.pix.pixelformat);
1014 fh->vidq.field = f->fmt.pix.field; 1014 fh->vidq.field = f->fmt.pix.field;
1015 1015
1016 /* check if width and height is valid based on set standard */ 1016 /* check if width and height is valid based on set standard */
@@ -1119,7 +1119,7 @@ int cx25821_vidioc_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fo
1119 enum v4l2_field field; 1119 enum v4l2_field field;
1120 unsigned int maxw, maxh; 1120 unsigned int maxw, maxh;
1121 1121
1122 fmt = format_by_fourcc(f->fmt.pix.pixelformat); 1122 fmt = cx25821_format_by_fourcc(f->fmt.pix.pixelformat);
1123 if (NULL == fmt) 1123 if (NULL == fmt)
1124 return -EINVAL; 1124 return -EINVAL;
1125 1125
diff --git a/drivers/staging/cx25821/cx25821-video.h b/drivers/staging/cx25821/cx25821-video.h
index cc6034b1a95d..a2415d33235b 100644
--- a/drivers/staging/cx25821/cx25821-video.h
+++ b/drivers/staging/cx25821/cx25821-video.h
@@ -87,7 +87,7 @@ extern unsigned int vid_limit;
87 87
88#define FORMAT_FLAGS_PACKED 0x01 88#define FORMAT_FLAGS_PACKED 0x01
89extern struct cx25821_fmt formats[]; 89extern struct cx25821_fmt formats[];
90extern struct cx25821_fmt *format_by_fourcc(unsigned int fourcc); 90extern struct cx25821_fmt *cx25821_format_by_fourcc(unsigned int fourcc);
91extern struct cx25821_data timeout_data[MAX_VID_CHANNEL_NUM]; 91extern struct cx25821_data timeout_data[MAX_VID_CHANNEL_NUM];
92 92
93extern void cx25821_dump_video_queue(struct cx25821_dev *dev, 93extern void cx25821_dump_video_queue(struct cx25821_dev *dev,
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
index 81b46585edf7..c5f8e5bda2b2 100644
--- a/drivers/tty/n_gsm.c
+++ b/drivers/tty/n_gsm.c
@@ -716,8 +716,8 @@ static void __gsm_data_queue(struct gsm_dlci *dlci, struct gsm_msg *msg)
716 if (msg->len < 128) 716 if (msg->len < 128)
717 *--dp = (msg->len << 1) | EA; 717 *--dp = (msg->len << 1) | EA;
718 else { 718 else {
719 *--dp = ((msg->len & 127) << 1) | EA; 719 *--dp = (msg->len >> 7); /* bits 7 - 15 */
720 *--dp = (msg->len >> 6) & 0xfe; 720 *--dp = (msg->len & 127) << 1; /* bits 0 - 6 */
721 } 721 }
722 } 722 }
723 723
@@ -968,6 +968,8 @@ static void gsm_control_reply(struct gsm_mux *gsm, int cmd, u8 *data,
968{ 968{
969 struct gsm_msg *msg; 969 struct gsm_msg *msg;
970 msg = gsm_data_alloc(gsm, 0, dlen + 2, gsm->ftype); 970 msg = gsm_data_alloc(gsm, 0, dlen + 2, gsm->ftype);
971 if (msg == NULL)
972 return;
971 msg->data[0] = (cmd & 0xFE) << 1 | EA; /* Clear C/R */ 973 msg->data[0] = (cmd & 0xFE) << 1 | EA; /* Clear C/R */
972 msg->data[1] = (dlen << 1) | EA; 974 msg->data[1] = (dlen << 1) | EA;
973 memcpy(msg->data + 2, data, dlen); 975 memcpy(msg->data + 2, data, dlen);
diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig
index 9eed5b52d9de..bcc24779ba0e 100644
--- a/drivers/usb/core/Kconfig
+++ b/drivers/usb/core/Kconfig
@@ -107,11 +107,19 @@ config USB_SUSPEND
107 If you are unsure about this, say N here. 107 If you are unsure about this, say N here.
108 108
109config USB_OTG 109config USB_OTG
110 bool 110 bool "OTG support"
111 depends on USB && EXPERIMENTAL 111 depends on USB && EXPERIMENTAL
112 depends on USB_SUSPEND 112 depends on USB_SUSPEND
113 default n 113 default n
114 114 help
115 The most notable feature of USB OTG is support for a
116 "Dual-Role" device, which can act as either a device
117 or a host. The initial role is decided by the type of
118 plug inserted and can be changed later when two dual
119 role devices talk to each other.
120
121 Select this only if your board has Mini-AB/Micro-AB
122 connector.
115 123
116config USB_OTG_WHITELIST 124config USB_OTG_WHITELIST
117 bool "Rely on OTG Targeted Peripherals List" 125 bool "Rely on OTG Targeted Peripherals List"
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 7b5cc16e4a0b..8572dad5ecbb 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1047,9 +1047,9 @@ composite_unbind(struct usb_gadget *gadget)
1047 kfree(cdev->req->buf); 1047 kfree(cdev->req->buf);
1048 usb_ep_free_request(gadget->ep0, cdev->req); 1048 usb_ep_free_request(gadget->ep0, cdev->req);
1049 } 1049 }
1050 device_remove_file(&gadget->dev, &dev_attr_suspended);
1050 kfree(cdev); 1051 kfree(cdev);
1051 set_gadget_data(gadget, NULL); 1052 set_gadget_data(gadget, NULL);
1052 device_remove_file(&gadget->dev, &dev_attr_suspended);
1053 composite = NULL; 1053 composite = NULL;
1054} 1054}
1055 1055
@@ -1107,14 +1107,6 @@ static int composite_bind(struct usb_gadget *gadget)
1107 */ 1107 */
1108 usb_ep_autoconfig_reset(cdev->gadget); 1108 usb_ep_autoconfig_reset(cdev->gadget);
1109 1109
1110 /* standardized runtime overrides for device ID data */
1111 if (idVendor)
1112 cdev->desc.idVendor = cpu_to_le16(idVendor);
1113 if (idProduct)
1114 cdev->desc.idProduct = cpu_to_le16(idProduct);
1115 if (bcdDevice)
1116 cdev->desc.bcdDevice = cpu_to_le16(bcdDevice);
1117
1118 /* composite gadget needs to assign strings for whole device (like 1110 /* composite gadget needs to assign strings for whole device (like
1119 * serial number), register function drivers, potentially update 1111 * serial number), register function drivers, potentially update
1120 * power state and consumption, etc 1112 * power state and consumption, etc
@@ -1126,6 +1118,14 @@ static int composite_bind(struct usb_gadget *gadget)
1126 cdev->desc = *composite->dev; 1118 cdev->desc = *composite->dev;
1127 cdev->desc.bMaxPacketSize0 = gadget->ep0->maxpacket; 1119 cdev->desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
1128 1120
1121 /* standardized runtime overrides for device ID data */
1122 if (idVendor)
1123 cdev->desc.idVendor = cpu_to_le16(idVendor);
1124 if (idProduct)
1125 cdev->desc.idProduct = cpu_to_le16(idProduct);
1126 if (bcdDevice)
1127 cdev->desc.bcdDevice = cpu_to_le16(bcdDevice);
1128
1129 /* stirng overrides */ 1129 /* stirng overrides */
1130 if (iManufacturer || !cdev->desc.iManufacturer) { 1130 if (iManufacturer || !cdev->desc.iManufacturer) {
1131 if (!iManufacturer && !composite->iManufacturer && 1131 if (!iManufacturer && !composite->iManufacturer &&
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 0fae58ef8afe..1d0f45f0e7a6 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1680,6 +1680,7 @@ static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
1680 xhci->port_array[i] = (u8) -1; 1680 xhci->port_array[i] = (u8) -1;
1681 } 1681 }
1682 /* FIXME: Should we disable the port? */ 1682 /* FIXME: Should we disable the port? */
1683 continue;
1683 } 1684 }
1684 xhci->port_array[i] = major_revision; 1685 xhci->port_array[i] = major_revision;
1685 if (major_revision == 0x03) 1686 if (major_revision == 0x03)
@@ -1758,16 +1759,20 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
1758 return -ENOMEM; 1759 return -ENOMEM;
1759 1760
1760 port_index = 0; 1761 port_index = 0;
1761 for (i = 0; i < num_ports; i++) 1762 for (i = 0; i < num_ports; i++) {
1762 if (xhci->port_array[i] != 0x03) { 1763 if (xhci->port_array[i] == 0x03 ||
1763 xhci->usb2_ports[port_index] = 1764 xhci->port_array[i] == 0 ||
1764 &xhci->op_regs->port_status_base + 1765 xhci->port_array[i] == -1)
1765 NUM_PORT_REGS*i; 1766 continue;
1766 xhci_dbg(xhci, "USB 2.0 port at index %u, " 1767
1767 "addr = %p\n", i, 1768 xhci->usb2_ports[port_index] =
1768 xhci->usb2_ports[port_index]); 1769 &xhci->op_regs->port_status_base +
1769 port_index++; 1770 NUM_PORT_REGS*i;
1770 } 1771 xhci_dbg(xhci, "USB 2.0 port at index %u, "
1772 "addr = %p\n", i,
1773 xhci->usb2_ports[port_index]);
1774 port_index++;
1775 }
1771 } 1776 }
1772 if (xhci->num_usb3_ports) { 1777 if (xhci->num_usb3_ports) {
1773 xhci->usb3_ports = kmalloc(sizeof(*xhci->usb3_ports)* 1778 xhci->usb3_ports = kmalloc(sizeof(*xhci->usb3_ports)*
diff --git a/drivers/usb/misc/uss720.c b/drivers/usb/misc/uss720.c
index 796e2f68f749..4ff21587ab03 100644
--- a/drivers/usb/misc/uss720.c
+++ b/drivers/usb/misc/uss720.c
@@ -3,7 +3,7 @@
3/* 3/*
4 * uss720.c -- USS720 USB Parport Cable. 4 * uss720.c -- USS720 USB Parport Cable.
5 * 5 *
6 * Copyright (C) 1999, 2005 6 * Copyright (C) 1999, 2005, 2010
7 * Thomas Sailer (t.sailer@alumni.ethz.ch) 7 * Thomas Sailer (t.sailer@alumni.ethz.ch)
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
@@ -776,6 +776,8 @@ static const struct usb_device_id uss720_table[] = {
776 { USB_DEVICE(0x0557, 0x2001) }, 776 { USB_DEVICE(0x0557, 0x2001) },
777 { USB_DEVICE(0x0729, 0x1284) }, 777 { USB_DEVICE(0x0729, 0x1284) },
778 { USB_DEVICE(0x1293, 0x0002) }, 778 { USB_DEVICE(0x1293, 0x0002) },
779 { USB_DEVICE(0x1293, 0x0002) },
780 { USB_DEVICE(0x050d, 0x0002) },
779 { } /* Terminating entry */ 781 { } /* Terminating entry */
780}; 782};
781 783
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 6a50965e23f2..2dec50013528 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -796,6 +796,7 @@ static struct usb_device_id id_table_combined [] = {
796 { USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_LOGBOOKML_PID) }, 796 { USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_LOGBOOKML_PID) },
797 { USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_LS_LOGBOOK_PID) }, 797 { USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_LS_LOGBOOK_PID) },
798 { USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_HS_LOGBOOK_PID) }, 798 { USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_HS_LOGBOOK_PID) },
799 { USB_DEVICE(FTDI_VID, FTDI_DOTEC_PID) },
799 { USB_DEVICE(QIHARDWARE_VID, MILKYMISTONE_JTAGSERIAL_PID), 800 { USB_DEVICE(QIHARDWARE_VID, MILKYMISTONE_JTAGSERIAL_PID),
800 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, 801 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
801 { }, /* Optional parameter entry */ 802 { }, /* Optional parameter entry */
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h
index 1286f1e23d8c..bf0867285481 100644
--- a/drivers/usb/serial/ftdi_sio_ids.h
+++ b/drivers/usb/serial/ftdi_sio_ids.h
@@ -1081,6 +1081,11 @@
1081#define MJSG_HD_RADIO_PID 0x937C 1081#define MJSG_HD_RADIO_PID 0x937C
1082 1082
1083/* 1083/*
1084 * D.O.Tec products (http://www.directout.eu)
1085 */
1086#define FTDI_DOTEC_PID 0x9868
1087
1088/*
1084 * Xverve Signalyzer tools (http://www.signalyzer.com/) 1089 * Xverve Signalyzer tools (http://www.signalyzer.com/)
1085 */ 1090 */
1086#define XVERVE_SIGNALYZER_ST_PID 0xBCA0 1091#define XVERVE_SIGNALYZER_ST_PID 0xBCA0
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
index 6ccdd3dd5259..fcc1e32ce256 100644
--- a/drivers/usb/storage/unusual_devs.h
+++ b/drivers/usb/storage/unusual_devs.h
@@ -481,6 +481,13 @@ UNUSUAL_DEV( 0x04e8, 0x507c, 0x0220, 0x0220,
481 USB_SC_DEVICE, USB_PR_DEVICE, NULL, 481 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
482 US_FL_MAX_SECTORS_64), 482 US_FL_MAX_SECTORS_64),
483 483
484/* Reported by Vitaly Kuznetsov <vitty@altlinux.ru> */
485UNUSUAL_DEV( 0x04e8, 0x5122, 0x0000, 0x9999,
486 "Samsung",
487 "YP-CP3",
488 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
489 US_FL_MAX_SECTORS_64 | US_FL_BULK_IGNORE_TAG),
490
484/* Entry and supporting patch by Theodore Kilgore <kilgota@auburn.edu>. 491/* Entry and supporting patch by Theodore Kilgore <kilgota@auburn.edu>.
485 * Device uses standards-violating 32-byte Bulk Command Block Wrappers and 492 * Device uses standards-violating 32-byte Bulk Command Block Wrappers and
486 * reports itself as "Proprietary SCSI Bulk." Cf. device entry 0x084d:0x0011. 493 * reports itself as "Proprietary SCSI Bulk." Cf. device entry 0x084d:0x0011.
diff --git a/drivers/video/omap/Kconfig b/drivers/video/omap/Kconfig
index 455c6055325d..083c8fe53e24 100644
--- a/drivers/video/omap/Kconfig
+++ b/drivers/video/omap/Kconfig
@@ -1,7 +1,7 @@
1config FB_OMAP 1config FB_OMAP
2 tristate "OMAP frame buffer support (EXPERIMENTAL)" 2 tristate "OMAP frame buffer support (EXPERIMENTAL)"
3 depends on FB && ARCH_OMAP && (OMAP2_DSS = "n") 3 depends on FB && (OMAP2_DSS = "n")
4 4 depends on ARCH_OMAP1 || ARCH_OMAP2 || ARCH_OMAP3
5 select FB_CFB_FILLRECT 5 select FB_CFB_FILLRECT
6 select FB_CFB_COPYAREA 6 select FB_CFB_COPYAREA
7 select FB_CFB_IMAGEBLIT 7 select FB_CFB_IMAGEBLIT
diff --git a/drivers/video/omap2/vram.c b/drivers/video/omap2/vram.c
index 2fd7e5271be9..9441e2eb3dee 100644
--- a/drivers/video/omap2/vram.c
+++ b/drivers/video/omap2/vram.c
@@ -551,7 +551,7 @@ void __init omap_vram_reserve_sdram_memblock(void)
551 if (!size) 551 if (!size)
552 return; 552 return;
553 553
554 size = PAGE_ALIGN(size); 554 size = ALIGN(size, SZ_2M);
555 555
556 if (paddr) { 556 if (paddr) {
557 if (paddr & ~PAGE_MASK) { 557 if (paddr & ~PAGE_MASK) {
@@ -576,7 +576,7 @@ void __init omap_vram_reserve_sdram_memblock(void)
576 return; 576 return;
577 } 577 }
578 } else { 578 } else {
579 paddr = memblock_alloc(size, PAGE_SIZE); 579 paddr = memblock_alloc(size, SZ_2M);
580 } 580 }
581 581
582 memblock_free(paddr, size); 582 memblock_free(paddr, size);
diff --git a/fs/btrfs/export.c b/fs/btrfs/export.c
index 6f0444473594..659f532d26a0 100644
--- a/fs/btrfs/export.c
+++ b/fs/btrfs/export.c
@@ -166,7 +166,7 @@ static struct dentry *btrfs_fh_to_dentry(struct super_block *sb, struct fid *fh,
166static struct dentry *btrfs_get_parent(struct dentry *child) 166static struct dentry *btrfs_get_parent(struct dentry *child)
167{ 167{
168 struct inode *dir = child->d_inode; 168 struct inode *dir = child->d_inode;
169 static struct dentry *dentry; 169 struct dentry *dentry;
170 struct btrfs_root *root = BTRFS_I(dir)->root; 170 struct btrfs_root *root = BTRFS_I(dir)->root;
171 struct btrfs_path *path; 171 struct btrfs_path *path;
172 struct extent_buffer *leaf; 172 struct extent_buffer *leaf;
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c
index 158c700fdca5..d902948a90d8 100644
--- a/fs/ceph/dir.c
+++ b/fs/ceph/dir.c
@@ -40,7 +40,8 @@ int ceph_init_dentry(struct dentry *dentry)
40 if (dentry->d_fsdata) 40 if (dentry->d_fsdata)
41 return 0; 41 return 0;
42 42
43 if (ceph_snap(dentry->d_parent->d_inode) == CEPH_NOSNAP) 43 if (dentry->d_parent == NULL || /* nfs fh_to_dentry */
44 ceph_snap(dentry->d_parent->d_inode) == CEPH_NOSNAP)
44 dentry->d_op = &ceph_dentry_ops; 45 dentry->d_op = &ceph_dentry_ops;
45 else if (ceph_snap(dentry->d_parent->d_inode) == CEPH_SNAPDIR) 46 else if (ceph_snap(dentry->d_parent->d_inode) == CEPH_SNAPDIR)
46 dentry->d_op = &ceph_snapdir_dentry_ops; 47 dentry->d_op = &ceph_snapdir_dentry_ops;
diff --git a/fs/ceph/file.c b/fs/ceph/file.c
index 8d79b8912e31..7d0e4a82d898 100644
--- a/fs/ceph/file.c
+++ b/fs/ceph/file.c
@@ -282,7 +282,8 @@ int ceph_release(struct inode *inode, struct file *file)
282static int striped_read(struct inode *inode, 282static int striped_read(struct inode *inode,
283 u64 off, u64 len, 283 u64 off, u64 len,
284 struct page **pages, int num_pages, 284 struct page **pages, int num_pages,
285 int *checkeof, bool align_to_pages) 285 int *checkeof, bool align_to_pages,
286 unsigned long buf_align)
286{ 287{
287 struct ceph_fs_client *fsc = ceph_inode_to_client(inode); 288 struct ceph_fs_client *fsc = ceph_inode_to_client(inode);
288 struct ceph_inode_info *ci = ceph_inode(inode); 289 struct ceph_inode_info *ci = ceph_inode(inode);
@@ -307,7 +308,7 @@ static int striped_read(struct inode *inode,
307 308
308more: 309more:
309 if (align_to_pages) 310 if (align_to_pages)
310 page_align = (pos - io_align) & ~PAGE_MASK; 311 page_align = (pos - io_align + buf_align) & ~PAGE_MASK;
311 else 312 else
312 page_align = pos & ~PAGE_MASK; 313 page_align = pos & ~PAGE_MASK;
313 this_len = left; 314 this_len = left;
@@ -376,16 +377,18 @@ static ssize_t ceph_sync_read(struct file *file, char __user *data,
376 struct inode *inode = file->f_dentry->d_inode; 377 struct inode *inode = file->f_dentry->d_inode;
377 struct page **pages; 378 struct page **pages;
378 u64 off = *poff; 379 u64 off = *poff;
379 int num_pages = calc_pages_for(off, len); 380 int num_pages, ret;
380 int ret;
381 381
382 dout("sync_read on file %p %llu~%u %s\n", file, off, len, 382 dout("sync_read on file %p %llu~%u %s\n", file, off, len,
383 (file->f_flags & O_DIRECT) ? "O_DIRECT" : ""); 383 (file->f_flags & O_DIRECT) ? "O_DIRECT" : "");
384 384
385 if (file->f_flags & O_DIRECT) 385 if (file->f_flags & O_DIRECT) {
386 pages = ceph_get_direct_page_vector(data, num_pages); 386 num_pages = calc_pages_for((unsigned long)data, len);
387 else 387 pages = ceph_get_direct_page_vector(data, num_pages, true);
388 } else {
389 num_pages = calc_pages_for(off, len);
388 pages = ceph_alloc_page_vector(num_pages, GFP_NOFS); 390 pages = ceph_alloc_page_vector(num_pages, GFP_NOFS);
391 }
389 if (IS_ERR(pages)) 392 if (IS_ERR(pages))
390 return PTR_ERR(pages); 393 return PTR_ERR(pages);
391 394
@@ -400,7 +403,8 @@ static ssize_t ceph_sync_read(struct file *file, char __user *data,
400 goto done; 403 goto done;
401 404
402 ret = striped_read(inode, off, len, pages, num_pages, checkeof, 405 ret = striped_read(inode, off, len, pages, num_pages, checkeof,
403 file->f_flags & O_DIRECT); 406 file->f_flags & O_DIRECT,
407 (unsigned long)data & ~PAGE_MASK);
404 408
405 if (ret >= 0 && (file->f_flags & O_DIRECT) == 0) 409 if (ret >= 0 && (file->f_flags & O_DIRECT) == 0)
406 ret = ceph_copy_page_vector_to_user(pages, data, off, ret); 410 ret = ceph_copy_page_vector_to_user(pages, data, off, ret);
@@ -409,7 +413,7 @@ static ssize_t ceph_sync_read(struct file *file, char __user *data,
409 413
410done: 414done:
411 if (file->f_flags & O_DIRECT) 415 if (file->f_flags & O_DIRECT)
412 ceph_put_page_vector(pages, num_pages); 416 ceph_put_page_vector(pages, num_pages, true);
413 else 417 else
414 ceph_release_page_vector(pages, num_pages); 418 ceph_release_page_vector(pages, num_pages);
415 dout("sync_read result %d\n", ret); 419 dout("sync_read result %d\n", ret);
@@ -456,6 +460,7 @@ static ssize_t ceph_sync_write(struct file *file, const char __user *data,
456 int do_sync = 0; 460 int do_sync = 0;
457 int check_caps = 0; 461 int check_caps = 0;
458 int page_align, io_align; 462 int page_align, io_align;
463 unsigned long buf_align;
459 int ret; 464 int ret;
460 struct timespec mtime = CURRENT_TIME; 465 struct timespec mtime = CURRENT_TIME;
461 466
@@ -471,6 +476,7 @@ static ssize_t ceph_sync_write(struct file *file, const char __user *data,
471 pos = *offset; 476 pos = *offset;
472 477
473 io_align = pos & ~PAGE_MASK; 478 io_align = pos & ~PAGE_MASK;
479 buf_align = (unsigned long)data & ~PAGE_MASK;
474 480
475 ret = filemap_write_and_wait_range(inode->i_mapping, pos, pos + left); 481 ret = filemap_write_and_wait_range(inode->i_mapping, pos, pos + left);
476 if (ret < 0) 482 if (ret < 0)
@@ -496,12 +502,15 @@ static ssize_t ceph_sync_write(struct file *file, const char __user *data,
496 */ 502 */
497more: 503more:
498 len = left; 504 len = left;
499 if (file->f_flags & O_DIRECT) 505 if (file->f_flags & O_DIRECT) {
500 /* write from beginning of first page, regardless of 506 /* write from beginning of first page, regardless of
501 io alignment */ 507 io alignment */
502 page_align = (pos - io_align) & ~PAGE_MASK; 508 page_align = (pos - io_align + buf_align) & ~PAGE_MASK;
503 else 509 num_pages = calc_pages_for((unsigned long)data, len);
510 } else {
504 page_align = pos & ~PAGE_MASK; 511 page_align = pos & ~PAGE_MASK;
512 num_pages = calc_pages_for(pos, len);
513 }
505 req = ceph_osdc_new_request(&fsc->client->osdc, &ci->i_layout, 514 req = ceph_osdc_new_request(&fsc->client->osdc, &ci->i_layout,
506 ceph_vino(inode), pos, &len, 515 ceph_vino(inode), pos, &len,
507 CEPH_OSD_OP_WRITE, flags, 516 CEPH_OSD_OP_WRITE, flags,
@@ -512,10 +521,8 @@ more:
512 if (!req) 521 if (!req)
513 return -ENOMEM; 522 return -ENOMEM;
514 523
515 num_pages = calc_pages_for(pos, len);
516
517 if (file->f_flags & O_DIRECT) { 524 if (file->f_flags & O_DIRECT) {
518 pages = ceph_get_direct_page_vector(data, num_pages); 525 pages = ceph_get_direct_page_vector(data, num_pages, false);
519 if (IS_ERR(pages)) { 526 if (IS_ERR(pages)) {
520 ret = PTR_ERR(pages); 527 ret = PTR_ERR(pages);
521 goto out; 528 goto out;
@@ -565,7 +572,7 @@ more:
565 } 572 }
566 573
567 if (file->f_flags & O_DIRECT) 574 if (file->f_flags & O_DIRECT)
568 ceph_put_page_vector(pages, num_pages); 575 ceph_put_page_vector(pages, num_pages, false);
569 else if (file->f_flags & O_SYNC) 576 else if (file->f_flags & O_SYNC)
570 ceph_release_page_vector(pages, num_pages); 577 ceph_release_page_vector(pages, num_pages);
571 578
diff --git a/fs/namei.c b/fs/namei.c
index 5362af9b7372..4ff7ca530533 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -1748,6 +1748,9 @@ struct file *do_filp_open(int dfd, const char *pathname,
1748 if (!(open_flag & O_CREAT)) 1748 if (!(open_flag & O_CREAT))
1749 mode = 0; 1749 mode = 0;
1750 1750
1751 /* Must never be set by userspace */
1752 open_flag &= ~FMODE_NONOTIFY;
1753
1751 /* 1754 /*
1752 * O_SYNC is implemented as __O_SYNC|O_DSYNC. As many places only 1755 * O_SYNC is implemented as __O_SYNC|O_DSYNC. As many places only
1753 * check for O_DSYNC if the need any syncing at all we enforce it's 1756 * check for O_DSYNC if the need any syncing at all we enforce it's
diff --git a/fs/nilfs2/gcinode.c b/fs/nilfs2/gcinode.c
index 33ad25ddd5c4..caf9a6a3fb54 100644
--- a/fs/nilfs2/gcinode.c
+++ b/fs/nilfs2/gcinode.c
@@ -176,7 +176,6 @@ int nilfs_gccache_wait_and_mark_dirty(struct buffer_head *bh)
176int nilfs_init_gcinode(struct inode *inode) 176int nilfs_init_gcinode(struct inode *inode)
177{ 177{
178 struct nilfs_inode_info *ii = NILFS_I(inode); 178 struct nilfs_inode_info *ii = NILFS_I(inode);
179 struct the_nilfs *nilfs = NILFS_SB(inode->i_sb)->s_nilfs;
180 179
181 inode->i_mode = S_IFREG; 180 inode->i_mode = S_IFREG;
182 mapping_set_gfp_mask(inode->i_mapping, GFP_NOFS); 181 mapping_set_gfp_mask(inode->i_mapping, GFP_NOFS);
@@ -186,14 +185,6 @@ int nilfs_init_gcinode(struct inode *inode)
186 ii->i_flags = 0; 185 ii->i_flags = 0;
187 nilfs_bmap_init_gc(ii->i_bmap); 186 nilfs_bmap_init_gc(ii->i_bmap);
188 187
189 /*
190 * Add the inode to GC inode list. Garbage Collection
191 * is serialized and no two processes manipulate the
192 * list simultaneously.
193 */
194 igrab(inode);
195 list_add(&NILFS_I(inode)->i_dirty, &nilfs->ns_gc_inodes);
196
197 return 0; 188 return 0;
198} 189}
199 190
diff --git a/fs/nilfs2/ioctl.c b/fs/nilfs2/ioctl.c
index e00d9457c256..b185e937a335 100644
--- a/fs/nilfs2/ioctl.c
+++ b/fs/nilfs2/ioctl.c
@@ -337,6 +337,7 @@ static int nilfs_ioctl_move_blocks(struct super_block *sb,
337 struct nilfs_argv *argv, void *buf) 337 struct nilfs_argv *argv, void *buf)
338{ 338{
339 size_t nmembs = argv->v_nmembs; 339 size_t nmembs = argv->v_nmembs;
340 struct the_nilfs *nilfs = NILFS_SB(sb)->s_nilfs;
340 struct inode *inode; 341 struct inode *inode;
341 struct nilfs_vdesc *vdesc; 342 struct nilfs_vdesc *vdesc;
342 struct buffer_head *bh, *n; 343 struct buffer_head *bh, *n;
@@ -353,6 +354,17 @@ static int nilfs_ioctl_move_blocks(struct super_block *sb,
353 ret = PTR_ERR(inode); 354 ret = PTR_ERR(inode);
354 goto failed; 355 goto failed;
355 } 356 }
357 if (list_empty(&NILFS_I(inode)->i_dirty)) {
358 /*
359 * Add the inode to GC inode list. Garbage Collection
360 * is serialized and no two processes manipulate the
361 * list simultaneously.
362 */
363 igrab(inode);
364 list_add(&NILFS_I(inode)->i_dirty,
365 &nilfs->ns_gc_inodes);
366 }
367
356 do { 368 do {
357 ret = nilfs_ioctl_move_inode_block(inode, vdesc, 369 ret = nilfs_ioctl_move_inode_block(inode, vdesc,
358 &buffers); 370 &buffers);
diff --git a/fs/notify/fanotify/fanotify.c b/fs/notify/fanotify/fanotify.c
index b04f88eed09e..f35794b97e8e 100644
--- a/fs/notify/fanotify/fanotify.c
+++ b/fs/notify/fanotify/fanotify.c
@@ -92,7 +92,11 @@ static int fanotify_get_response_from_access(struct fsnotify_group *group,
92 92
93 pr_debug("%s: group=%p event=%p\n", __func__, group, event); 93 pr_debug("%s: group=%p event=%p\n", __func__, group, event);
94 94
95 wait_event(group->fanotify_data.access_waitq, event->response); 95 wait_event(group->fanotify_data.access_waitq, event->response ||
96 atomic_read(&group->fanotify_data.bypass_perm));
97
98 if (!event->response) /* bypass_perm set */
99 return 0;
96 100
97 /* userspace responded, convert to something usable */ 101 /* userspace responded, convert to something usable */
98 spin_lock(&event->lock); 102 spin_lock(&event->lock);
diff --git a/fs/notify/fanotify/fanotify_user.c b/fs/notify/fanotify/fanotify_user.c
index 063224812b7e..8b61220cffc5 100644
--- a/fs/notify/fanotify/fanotify_user.c
+++ b/fs/notify/fanotify/fanotify_user.c
@@ -106,20 +106,29 @@ static int create_fd(struct fsnotify_group *group, struct fsnotify_event *event)
106 return client_fd; 106 return client_fd;
107} 107}
108 108
109static ssize_t fill_event_metadata(struct fsnotify_group *group, 109static int fill_event_metadata(struct fsnotify_group *group,
110 struct fanotify_event_metadata *metadata, 110 struct fanotify_event_metadata *metadata,
111 struct fsnotify_event *event) 111 struct fsnotify_event *event)
112{ 112{
113 int ret = 0;
114
113 pr_debug("%s: group=%p metadata=%p event=%p\n", __func__, 115 pr_debug("%s: group=%p metadata=%p event=%p\n", __func__,
114 group, metadata, event); 116 group, metadata, event);
115 117
116 metadata->event_len = FAN_EVENT_METADATA_LEN; 118 metadata->event_len = FAN_EVENT_METADATA_LEN;
119 metadata->metadata_len = FAN_EVENT_METADATA_LEN;
117 metadata->vers = FANOTIFY_METADATA_VERSION; 120 metadata->vers = FANOTIFY_METADATA_VERSION;
118 metadata->mask = event->mask & FAN_ALL_OUTGOING_EVENTS; 121 metadata->mask = event->mask & FAN_ALL_OUTGOING_EVENTS;
119 metadata->pid = pid_vnr(event->tgid); 122 metadata->pid = pid_vnr(event->tgid);
120 metadata->fd = create_fd(group, event); 123 if (unlikely(event->mask & FAN_Q_OVERFLOW))
124 metadata->fd = FAN_NOFD;
125 else {
126 metadata->fd = create_fd(group, event);
127 if (metadata->fd < 0)
128 ret = metadata->fd;
129 }
121 130
122 return metadata->fd; 131 return ret;
123} 132}
124 133
125#ifdef CONFIG_FANOTIFY_ACCESS_PERMISSIONS 134#ifdef CONFIG_FANOTIFY_ACCESS_PERMISSIONS
@@ -200,7 +209,7 @@ static int prepare_for_access_response(struct fsnotify_group *group,
200 209
201 mutex_lock(&group->fanotify_data.access_mutex); 210 mutex_lock(&group->fanotify_data.access_mutex);
202 211
203 if (group->fanotify_data.bypass_perm) { 212 if (atomic_read(&group->fanotify_data.bypass_perm)) {
204 mutex_unlock(&group->fanotify_data.access_mutex); 213 mutex_unlock(&group->fanotify_data.access_mutex);
205 kmem_cache_free(fanotify_response_event_cache, re); 214 kmem_cache_free(fanotify_response_event_cache, re);
206 event->response = FAN_ALLOW; 215 event->response = FAN_ALLOW;
@@ -257,24 +266,34 @@ static ssize_t copy_event_to_user(struct fsnotify_group *group,
257 266
258 pr_debug("%s: group=%p event=%p\n", __func__, group, event); 267 pr_debug("%s: group=%p event=%p\n", __func__, group, event);
259 268
260 fd = fill_event_metadata(group, &fanotify_event_metadata, event); 269 ret = fill_event_metadata(group, &fanotify_event_metadata, event);
261 if (fd < 0) 270 if (ret < 0)
262 return fd; 271 goto out;
263 272
273 fd = fanotify_event_metadata.fd;
264 ret = prepare_for_access_response(group, event, fd); 274 ret = prepare_for_access_response(group, event, fd);
265 if (ret) 275 if (ret)
266 goto out_close_fd; 276 goto out_close_fd;
267 277
268 ret = -EFAULT; 278 ret = -EFAULT;
269 if (copy_to_user(buf, &fanotify_event_metadata, FAN_EVENT_METADATA_LEN)) 279 if (copy_to_user(buf, &fanotify_event_metadata,
280 fanotify_event_metadata.event_len))
270 goto out_kill_access_response; 281 goto out_kill_access_response;
271 282
272 return FAN_EVENT_METADATA_LEN; 283 return fanotify_event_metadata.event_len;
273 284
274out_kill_access_response: 285out_kill_access_response:
275 remove_access_response(group, event, fd); 286 remove_access_response(group, event, fd);
276out_close_fd: 287out_close_fd:
277 sys_close(fd); 288 if (fd != FAN_NOFD)
289 sys_close(fd);
290out:
291#ifdef CONFIG_FANOTIFY_ACCESS_PERMISSIONS
292 if (event->mask & FAN_ALL_PERM_EVENTS) {
293 event->response = FAN_DENY;
294 wake_up(&group->fanotify_data.access_waitq);
295 }
296#endif
278 return ret; 297 return ret;
279} 298}
280 299
@@ -382,7 +401,7 @@ static int fanotify_release(struct inode *ignored, struct file *file)
382 401
383 mutex_lock(&group->fanotify_data.access_mutex); 402 mutex_lock(&group->fanotify_data.access_mutex);
384 403
385 group->fanotify_data.bypass_perm = true; 404 atomic_inc(&group->fanotify_data.bypass_perm);
386 405
387 list_for_each_entry_safe(re, lre, &group->fanotify_data.access_list, list) { 406 list_for_each_entry_safe(re, lre, &group->fanotify_data.access_list, list) {
388 pr_debug("%s: found group=%p re=%p event=%p\n", __func__, group, 407 pr_debug("%s: found group=%p re=%p event=%p\n", __func__, group,
@@ -586,11 +605,10 @@ static int fanotify_add_vfsmount_mark(struct fsnotify_group *group,
586{ 605{
587 struct fsnotify_mark *fsn_mark; 606 struct fsnotify_mark *fsn_mark;
588 __u32 added; 607 __u32 added;
608 int ret = 0;
589 609
590 fsn_mark = fsnotify_find_vfsmount_mark(group, mnt); 610 fsn_mark = fsnotify_find_vfsmount_mark(group, mnt);
591 if (!fsn_mark) { 611 if (!fsn_mark) {
592 int ret;
593
594 if (atomic_read(&group->num_marks) > group->fanotify_data.max_marks) 612 if (atomic_read(&group->num_marks) > group->fanotify_data.max_marks)
595 return -ENOSPC; 613 return -ENOSPC;
596 614
@@ -600,17 +618,16 @@ static int fanotify_add_vfsmount_mark(struct fsnotify_group *group,
600 618
601 fsnotify_init_mark(fsn_mark, fanotify_free_mark); 619 fsnotify_init_mark(fsn_mark, fanotify_free_mark);
602 ret = fsnotify_add_mark(fsn_mark, group, NULL, mnt, 0); 620 ret = fsnotify_add_mark(fsn_mark, group, NULL, mnt, 0);
603 if (ret) { 621 if (ret)
604 fanotify_free_mark(fsn_mark); 622 goto err;
605 return ret;
606 }
607 } 623 }
608 added = fanotify_mark_add_to_mask(fsn_mark, mask, flags); 624 added = fanotify_mark_add_to_mask(fsn_mark, mask, flags);
609 fsnotify_put_mark(fsn_mark); 625
610 if (added & ~mnt->mnt_fsnotify_mask) 626 if (added & ~mnt->mnt_fsnotify_mask)
611 fsnotify_recalc_vfsmount_mask(mnt); 627 fsnotify_recalc_vfsmount_mask(mnt);
612 628err:
613 return 0; 629 fsnotify_put_mark(fsn_mark);
630 return ret;
614} 631}
615 632
616static int fanotify_add_inode_mark(struct fsnotify_group *group, 633static int fanotify_add_inode_mark(struct fsnotify_group *group,
@@ -619,6 +636,7 @@ static int fanotify_add_inode_mark(struct fsnotify_group *group,
619{ 636{
620 struct fsnotify_mark *fsn_mark; 637 struct fsnotify_mark *fsn_mark;
621 __u32 added; 638 __u32 added;
639 int ret = 0;
622 640
623 pr_debug("%s: group=%p inode=%p\n", __func__, group, inode); 641 pr_debug("%s: group=%p inode=%p\n", __func__, group, inode);
624 642
@@ -634,8 +652,6 @@ static int fanotify_add_inode_mark(struct fsnotify_group *group,
634 652
635 fsn_mark = fsnotify_find_inode_mark(group, inode); 653 fsn_mark = fsnotify_find_inode_mark(group, inode);
636 if (!fsn_mark) { 654 if (!fsn_mark) {
637 int ret;
638
639 if (atomic_read(&group->num_marks) > group->fanotify_data.max_marks) 655 if (atomic_read(&group->num_marks) > group->fanotify_data.max_marks)
640 return -ENOSPC; 656 return -ENOSPC;
641 657
@@ -645,16 +661,16 @@ static int fanotify_add_inode_mark(struct fsnotify_group *group,
645 661
646 fsnotify_init_mark(fsn_mark, fanotify_free_mark); 662 fsnotify_init_mark(fsn_mark, fanotify_free_mark);
647 ret = fsnotify_add_mark(fsn_mark, group, inode, NULL, 0); 663 ret = fsnotify_add_mark(fsn_mark, group, inode, NULL, 0);
648 if (ret) { 664 if (ret)
649 fanotify_free_mark(fsn_mark); 665 goto err;
650 return ret;
651 }
652 } 666 }
653 added = fanotify_mark_add_to_mask(fsn_mark, mask, flags); 667 added = fanotify_mark_add_to_mask(fsn_mark, mask, flags);
654 fsnotify_put_mark(fsn_mark); 668
655 if (added & ~inode->i_fsnotify_mask) 669 if (added & ~inode->i_fsnotify_mask)
656 fsnotify_recalc_inode_mask(inode); 670 fsnotify_recalc_inode_mask(inode);
657 return 0; 671err:
672 fsnotify_put_mark(fsn_mark);
673 return ret;
658} 674}
659 675
660/* fanotify syscalls */ 676/* fanotify syscalls */
@@ -687,8 +703,10 @@ SYSCALL_DEFINE2(fanotify_init, unsigned int, flags, unsigned int, event_f_flags)
687 703
688 /* fsnotify_alloc_group takes a ref. Dropped in fanotify_release */ 704 /* fsnotify_alloc_group takes a ref. Dropped in fanotify_release */
689 group = fsnotify_alloc_group(&fanotify_fsnotify_ops); 705 group = fsnotify_alloc_group(&fanotify_fsnotify_ops);
690 if (IS_ERR(group)) 706 if (IS_ERR(group)) {
707 free_uid(user);
691 return PTR_ERR(group); 708 return PTR_ERR(group);
709 }
692 710
693 group->fanotify_data.user = user; 711 group->fanotify_data.user = user;
694 atomic_inc(&user->fanotify_listeners); 712 atomic_inc(&user->fanotify_listeners);
@@ -698,6 +716,7 @@ SYSCALL_DEFINE2(fanotify_init, unsigned int, flags, unsigned int, event_f_flags)
698 mutex_init(&group->fanotify_data.access_mutex); 716 mutex_init(&group->fanotify_data.access_mutex);
699 init_waitqueue_head(&group->fanotify_data.access_waitq); 717 init_waitqueue_head(&group->fanotify_data.access_waitq);
700 INIT_LIST_HEAD(&group->fanotify_data.access_list); 718 INIT_LIST_HEAD(&group->fanotify_data.access_list);
719 atomic_set(&group->fanotify_data.bypass_perm, 0);
701#endif 720#endif
702 switch (flags & FAN_ALL_CLASS_BITS) { 721 switch (flags & FAN_ALL_CLASS_BITS) {
703 case FAN_CLASS_NOTIF: 722 case FAN_CLASS_NOTIF:
@@ -764,8 +783,10 @@ SYSCALL_DEFINE(fanotify_mark)(int fanotify_fd, unsigned int flags,
764 if (flags & ~FAN_ALL_MARK_FLAGS) 783 if (flags & ~FAN_ALL_MARK_FLAGS)
765 return -EINVAL; 784 return -EINVAL;
766 switch (flags & (FAN_MARK_ADD | FAN_MARK_REMOVE | FAN_MARK_FLUSH)) { 785 switch (flags & (FAN_MARK_ADD | FAN_MARK_REMOVE | FAN_MARK_FLUSH)) {
767 case FAN_MARK_ADD: 786 case FAN_MARK_ADD: /* fallthrough */
768 case FAN_MARK_REMOVE: 787 case FAN_MARK_REMOVE:
788 if (!mask)
789 return -EINVAL;
769 case FAN_MARK_FLUSH: 790 case FAN_MARK_FLUSH:
770 break; 791 break;
771 default: 792 default:
diff --git a/fs/notify/inotify/inotify_user.c b/fs/notify/inotify/inotify_user.c
index 444c305a468c..4cd5d5d78f9f 100644
--- a/fs/notify/inotify/inotify_user.c
+++ b/fs/notify/inotify/inotify_user.c
@@ -752,6 +752,7 @@ SYSCALL_DEFINE1(inotify_init1, int, flags)
752 if (ret >= 0) 752 if (ret >= 0)
753 return ret; 753 return ret;
754 754
755 fsnotify_put_group(group);
755 atomic_dec(&user->inotify_devs); 756 atomic_dec(&user->inotify_devs);
756out_free_uid: 757out_free_uid:
757 free_uid(user); 758 free_uid(user);
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index aae86fd10c4f..36ab42c9bb99 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -250,7 +250,7 @@ struct queue_limits {
250 250
251 unsigned char misaligned; 251 unsigned char misaligned;
252 unsigned char discard_misaligned; 252 unsigned char discard_misaligned;
253 unsigned char no_cluster; 253 unsigned char cluster;
254 signed char discard_zeroes_data; 254 signed char discard_zeroes_data;
255}; 255};
256 256
@@ -380,7 +380,6 @@ struct request_queue
380#endif 380#endif
381}; 381};
382 382
383#define QUEUE_FLAG_CLUSTER 0 /* cluster several segments into 1 */
384#define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */ 383#define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */
385#define QUEUE_FLAG_STOPPED 2 /* queue is stopped */ 384#define QUEUE_FLAG_STOPPED 2 /* queue is stopped */
386#define QUEUE_FLAG_SYNCFULL 3 /* read queue has been filled */ 385#define QUEUE_FLAG_SYNCFULL 3 /* read queue has been filled */
@@ -403,7 +402,6 @@ struct request_queue
403#define QUEUE_FLAG_SECDISCARD 19 /* supports SECDISCARD */ 402#define QUEUE_FLAG_SECDISCARD 19 /* supports SECDISCARD */
404 403
405#define QUEUE_FLAG_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \ 404#define QUEUE_FLAG_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \
406 (1 << QUEUE_FLAG_CLUSTER) | \
407 (1 << QUEUE_FLAG_STACKABLE) | \ 405 (1 << QUEUE_FLAG_STACKABLE) | \
408 (1 << QUEUE_FLAG_SAME_COMP) | \ 406 (1 << QUEUE_FLAG_SAME_COMP) | \
409 (1 << QUEUE_FLAG_ADD_RANDOM)) 407 (1 << QUEUE_FLAG_ADD_RANDOM))
@@ -510,6 +508,11 @@ static inline void queue_flag_clear(unsigned int flag, struct request_queue *q)
510 508
511#define rq_data_dir(rq) ((rq)->cmd_flags & 1) 509#define rq_data_dir(rq) ((rq)->cmd_flags & 1)
512 510
511static inline unsigned int blk_queue_cluster(struct request_queue *q)
512{
513 return q->limits.cluster;
514}
515
513/* 516/*
514 * We regard a request as sync, if either a read or a sync write 517 * We regard a request as sync, if either a read or a sync write
515 */ 518 */
@@ -805,6 +808,7 @@ extern struct request_queue *blk_init_allocated_queue(struct request_queue *,
805extern void blk_cleanup_queue(struct request_queue *); 808extern void blk_cleanup_queue(struct request_queue *);
806extern void blk_queue_make_request(struct request_queue *, make_request_fn *); 809extern void blk_queue_make_request(struct request_queue *, make_request_fn *);
807extern void blk_queue_bounce_limit(struct request_queue *, u64); 810extern void blk_queue_bounce_limit(struct request_queue *, u64);
811extern void blk_limits_max_hw_sectors(struct queue_limits *, unsigned int);
808extern void blk_queue_max_hw_sectors(struct request_queue *, unsigned int); 812extern void blk_queue_max_hw_sectors(struct request_queue *, unsigned int);
809extern void blk_queue_max_segments(struct request_queue *, unsigned short); 813extern void blk_queue_max_segments(struct request_queue *, unsigned short);
810extern void blk_queue_max_segment_size(struct request_queue *, unsigned int); 814extern void blk_queue_max_segment_size(struct request_queue *, unsigned int);
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h
index 266ab9291232..499dfe982a0e 100644
--- a/include/linux/bootmem.h
+++ b/include/linux/bootmem.h
@@ -105,6 +105,8 @@ extern void *__alloc_bootmem_low_node(pg_data_t *pgdat,
105 105
106#define alloc_bootmem(x) \ 106#define alloc_bootmem(x) \
107 __alloc_bootmem(x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) 107 __alloc_bootmem(x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
108#define alloc_bootmem_align(x, align) \
109 __alloc_bootmem(x, align, __pa(MAX_DMA_ADDRESS))
108#define alloc_bootmem_nopanic(x) \ 110#define alloc_bootmem_nopanic(x) \
109 __alloc_bootmem_nopanic(x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) 111 __alloc_bootmem_nopanic(x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
110#define alloc_bootmem_pages(x) \ 112#define alloc_bootmem_pages(x) \
diff --git a/include/linux/ceph/libceph.h b/include/linux/ceph/libceph.h
index 9e76d35670d2..72c72bfccb88 100644
--- a/include/linux/ceph/libceph.h
+++ b/include/linux/ceph/libceph.h
@@ -227,8 +227,10 @@ extern int ceph_open_session(struct ceph_client *client);
227extern void ceph_release_page_vector(struct page **pages, int num_pages); 227extern void ceph_release_page_vector(struct page **pages, int num_pages);
228 228
229extern struct page **ceph_get_direct_page_vector(const char __user *data, 229extern struct page **ceph_get_direct_page_vector(const char __user *data,
230 int num_pages); 230 int num_pages,
231extern void ceph_put_page_vector(struct page **pages, int num_pages); 231 bool write_page);
232extern void ceph_put_page_vector(struct page **pages, int num_pages,
233 bool dirty);
232extern void ceph_release_page_vector(struct page **pages, int num_pages); 234extern void ceph_release_page_vector(struct page **pages, int num_pages);
233extern struct page **ceph_alloc_page_vector(int num_pages, gfp_t flags); 235extern struct page **ceph_alloc_page_vector(int num_pages, gfp_t flags);
234extern int ceph_copy_user_to_page_vector(struct page **pages, 236extern int ceph_copy_user_to_page_vector(struct page **pages,
diff --git a/include/linux/cnt32_to_63.h b/include/linux/cnt32_to_63.h
index 7605fdd1eb65..e3d8bf26e5eb 100644
--- a/include/linux/cnt32_to_63.h
+++ b/include/linux/cnt32_to_63.h
@@ -61,13 +61,31 @@ union cnt32_to_63 {
61 * 61 *
62 * 2) this code must not be preempted for a duration longer than the 62 * 2) this code must not be preempted for a duration longer than the
63 * 32-bit counter half period minus the longest period between two 63 * 32-bit counter half period minus the longest period between two
64 * calls to this code. 64 * calls to this code;
65 * 65 *
66 * Those requirements ensure proper update to the state bit in memory. 66 * Those requirements ensure proper update to the state bit in memory.
67 * This is usually not a problem in practice, but if it is then a kernel 67 * This is usually not a problem in practice, but if it is then a kernel
68 * timer should be scheduled to manage for this code to be executed often 68 * timer should be scheduled to manage for this code to be executed often
69 * enough. 69 * enough.
70 * 70 *
71 * And finally:
72 *
73 * 3) the cnt_lo argument must be seen as a globally incrementing value,
74 * meaning that it should be a direct reference to the counter data which
75 * can be evaluated according to a specific ordering within the macro,
76 * and not the result of a previous evaluation stored in a variable.
77 *
78 * For example, this is wrong:
79 *
80 * u32 partial = get_hw_count();
81 * u64 full = cnt32_to_63(partial);
82 * return full;
83 *
84 * This is fine:
85 *
86 * u64 full = cnt32_to_63(get_hw_count());
87 * return full;
88 *
71 * Note that the top bit (bit 63) in the returned value should be considered 89 * Note that the top bit (bit 63) in the returned value should be considered
72 * as garbage. It is not cleared here because callers are likely to use a 90 * as garbage. It is not cleared here because callers are likely to use a
73 * multiplier on the returned value which can get rid of the top bit 91 * multiplier on the returned value which can get rid of the top bit
diff --git a/include/linux/fanotify.h b/include/linux/fanotify.h
index 0f0121467fc4..6c6133f76e16 100644
--- a/include/linux/fanotify.h
+++ b/include/linux/fanotify.h
@@ -83,11 +83,13 @@
83 FAN_ALL_PERM_EVENTS |\ 83 FAN_ALL_PERM_EVENTS |\
84 FAN_Q_OVERFLOW) 84 FAN_Q_OVERFLOW)
85 85
86#define FANOTIFY_METADATA_VERSION 2 86#define FANOTIFY_METADATA_VERSION 3
87 87
88struct fanotify_event_metadata { 88struct fanotify_event_metadata {
89 __u32 event_len; 89 __u32 event_len;
90 __u32 vers; 90 __u8 vers;
91 __u8 reserved;
92 __u16 metadata_len;
91 __aligned_u64 mask; 93 __aligned_u64 mask;
92 __s32 fd; 94 __s32 fd;
93 __s32 pid; 95 __s32 pid;
@@ -96,11 +98,13 @@ struct fanotify_event_metadata {
96struct fanotify_response { 98struct fanotify_response {
97 __s32 fd; 99 __s32 fd;
98 __u32 response; 100 __u32 response;
99} __attribute__ ((packed)); 101};
100 102
101/* Legit userspace responses to a _PERM event */ 103/* Legit userspace responses to a _PERM event */
102#define FAN_ALLOW 0x01 104#define FAN_ALLOW 0x01
103#define FAN_DENY 0x02 105#define FAN_DENY 0x02
106/* No fd set in event */
107#define FAN_NOFD -1
104 108
105/* Helper functions to deal with fanotify_event_metadata buffers */ 109/* Helper functions to deal with fanotify_event_metadata buffers */
106#define FAN_EVENT_METADATA_LEN (sizeof(struct fanotify_event_metadata)) 110#define FAN_EVENT_METADATA_LEN (sizeof(struct fanotify_event_metadata))
diff --git a/include/linux/fsnotify.h b/include/linux/fsnotify.h
index 5c185fa27089..b10bcdeaef76 100644
--- a/include/linux/fsnotify.h
+++ b/include/linux/fsnotify.h
@@ -235,9 +235,6 @@ static inline void fsnotify_open(struct file *file)
235 if (S_ISDIR(inode->i_mode)) 235 if (S_ISDIR(inode->i_mode))
236 mask |= FS_ISDIR; 236 mask |= FS_ISDIR;
237 237
238 /* FMODE_NONOTIFY must never be set from user */
239 file->f_mode &= ~FMODE_NONOTIFY;
240
241 fsnotify_parent(path, NULL, mask); 238 fsnotify_parent(path, NULL, mask);
242 fsnotify(inode, mask, path, FSNOTIFY_EVENT_PATH, NULL, 0); 239 fsnotify(inode, mask, path, FSNOTIFY_EVENT_PATH, NULL, 0);
243} 240}
diff --git a/include/linux/fsnotify_backend.h b/include/linux/fsnotify_backend.h
index 0a68f924f06f..7380763595d3 100644
--- a/include/linux/fsnotify_backend.h
+++ b/include/linux/fsnotify_backend.h
@@ -166,7 +166,7 @@ struct fsnotify_group {
166 struct mutex access_mutex; 166 struct mutex access_mutex;
167 struct list_head access_list; 167 struct list_head access_list;
168 wait_queue_head_t access_waitq; 168 wait_queue_head_t access_waitq;
169 bool bypass_perm; /* protected by access_mutex */ 169 atomic_t bypass_perm;
170#endif /* CONFIG_FANOTIFY_ACCESS_PERMISSIONS */ 170#endif /* CONFIG_FANOTIFY_ACCESS_PERMISSIONS */
171 int f_flags; 171 int f_flags;
172 unsigned int max_marks; 172 unsigned int max_marks;
diff --git a/include/linux/input.h b/include/linux/input.h
index a8af21d42bc1..9777668883be 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -104,8 +104,10 @@ struct input_keymap_entry {
104#define EVIOCGREP _IOR('E', 0x03, unsigned int[2]) /* get repeat settings */ 104#define EVIOCGREP _IOR('E', 0x03, unsigned int[2]) /* get repeat settings */
105#define EVIOCSREP _IOW('E', 0x03, unsigned int[2]) /* set repeat settings */ 105#define EVIOCSREP _IOW('E', 0x03, unsigned int[2]) /* set repeat settings */
106 106
107#define EVIOCGKEYCODE _IOR('E', 0x04, struct input_keymap_entry) /* get keycode */ 107#define EVIOCGKEYCODE _IOR('E', 0x04, unsigned int[2]) /* get keycode */
108#define EVIOCSKEYCODE _IOW('E', 0x04, struct input_keymap_entry) /* set keycode */ 108#define EVIOCGKEYCODE_V2 _IOR('E', 0x04, struct input_keymap_entry)
109#define EVIOCSKEYCODE _IOW('E', 0x04, unsigned int[2]) /* set keycode */
110#define EVIOCSKEYCODE_V2 _IOW('E', 0x04, struct input_keymap_entry)
109 111
110#define EVIOCGNAME(len) _IOC(_IOC_READ, 'E', 0x06, len) /* get device name */ 112#define EVIOCGNAME(len) _IOC(_IOC_READ, 'E', 0x06, len) /* get device name */
111#define EVIOCGPHYS(len) _IOC(_IOC_READ, 'E', 0x07, len) /* get physical location */ 113#define EVIOCGPHYS(len) _IOC(_IOC_READ, 'E', 0x07, len) /* get physical location */
diff --git a/include/linux/input/matrix_keypad.h b/include/linux/input/matrix_keypad.h
index 80352ad6581a..697474691749 100644
--- a/include/linux/input/matrix_keypad.h
+++ b/include/linux/input/matrix_keypad.h
@@ -9,7 +9,7 @@
9 9
10#define KEY(row, col, val) ((((row) & (MATRIX_MAX_ROWS - 1)) << 24) |\ 10#define KEY(row, col, val) ((((row) & (MATRIX_MAX_ROWS - 1)) << 24) |\
11 (((col) & (MATRIX_MAX_COLS - 1)) << 16) |\ 11 (((col) & (MATRIX_MAX_COLS - 1)) << 16) |\
12 (val & 0xffff)) 12 ((val) & 0xffff))
13 13
14#define KEY_ROW(k) (((k) >> 24) & 0xff) 14#define KEY_ROW(k) (((k) >> 24) & 0xff)
15#define KEY_COL(k) (((k) >> 16) & 0xff) 15#define KEY_COL(k) (((k) >> 16) & 0xff)
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index d377ea815d45..e9bb22cba764 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -112,7 +112,6 @@ struct resource_list {
112/* PC/ISA/whatever - the normal PC address spaces: IO and memory */ 112/* PC/ISA/whatever - the normal PC address spaces: IO and memory */
113extern struct resource ioport_resource; 113extern struct resource ioport_resource;
114extern struct resource iomem_resource; 114extern struct resource iomem_resource;
115extern int resource_alloc_from_bottom;
116 115
117extern struct resource *request_resource_conflict(struct resource *root, struct resource *new); 116extern struct resource *request_resource_conflict(struct resource *root, struct resource *new);
118extern int request_resource(struct resource *root, struct resource *new); 117extern int request_resource(struct resource *root, struct resource *new);
@@ -124,6 +123,7 @@ extern void reserve_region_with_split(struct resource *root,
124extern struct resource *insert_resource_conflict(struct resource *parent, struct resource *new); 123extern struct resource *insert_resource_conflict(struct resource *parent, struct resource *new);
125extern int insert_resource(struct resource *parent, struct resource *new); 124extern int insert_resource(struct resource *parent, struct resource *new);
126extern void insert_resource_expand_to_fit(struct resource *root, struct resource *new); 125extern void insert_resource_expand_to_fit(struct resource *root, struct resource *new);
126extern void arch_remove_reservations(struct resource *avail);
127extern int allocate_resource(struct resource *root, struct resource *new, 127extern int allocate_resource(struct resource *root, struct resource *new,
128 resource_size_t size, resource_size_t min, 128 resource_size_t size, resource_size_t min,
129 resource_size_t max, resource_size_t align, 129 resource_size_t max, resource_size_t align,
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index de2c41758e29..4f1279e105ee 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -887,6 +887,7 @@ struct perf_cpu_context {
887 int exclusive; 887 int exclusive;
888 struct list_head rotation_list; 888 struct list_head rotation_list;
889 int jiffies_interval; 889 int jiffies_interval;
890 struct pmu *active_pmu;
890}; 891};
891 892
892struct perf_output_handle { 893struct perf_output_handle {
diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h
index 3ec2358f8692..d19f1cca7f74 100644
--- a/include/linux/pm_runtime.h
+++ b/include/linux/pm_runtime.h
@@ -77,7 +77,8 @@ static inline void device_set_run_wake(struct device *dev, bool enable)
77 77
78static inline bool pm_runtime_suspended(struct device *dev) 78static inline bool pm_runtime_suspended(struct device *dev)
79{ 79{
80 return dev->power.runtime_status == RPM_SUSPENDED; 80 return dev->power.runtime_status == RPM_SUSPENDED
81 && !dev->power.disable_depth;
81} 82}
82 83
83static inline void pm_runtime_mark_last_busy(struct device *dev) 84static inline void pm_runtime_mark_last_busy(struct device *dev)
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 2c79e921a68b..223874538b33 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -143,7 +143,7 @@ extern unsigned long nr_iowait_cpu(int cpu);
143extern unsigned long this_cpu_load(void); 143extern unsigned long this_cpu_load(void);
144 144
145 145
146extern void calc_global_load(void); 146extern void calc_global_load(unsigned long ticks);
147 147
148extern unsigned long get_parent_ip(unsigned long addr); 148extern unsigned long get_parent_ip(unsigned long addr);
149 149
diff --git a/include/linux/ssb/ssb_driver_gige.h b/include/linux/ssb/ssb_driver_gige.h
index 942e38736901..eba52a100533 100644
--- a/include/linux/ssb/ssb_driver_gige.h
+++ b/include/linux/ssb/ssb_driver_gige.h
@@ -96,16 +96,21 @@ static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
96 return 0; 96 return 0;
97} 97}
98 98
99extern char * nvram_get(const char *name); 99#ifdef CONFIG_BCM47XX
100#include <asm/mach-bcm47xx/nvram.h>
100/* Get the device MAC address */ 101/* Get the device MAC address */
101static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr) 102static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
102{ 103{
103#ifdef CONFIG_BCM47XX 104 char buf[20];
104 char *res = nvram_get("et0macaddr"); 105 if (nvram_getenv("et0macaddr", buf, sizeof(buf)) < 0)
105 if (res) 106 return;
106 memcpy(macaddr, res, 6); 107 nvram_parse_macaddr(buf, macaddr);
107#endif
108} 108}
109#else
110static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
111{
112}
113#endif
109 114
110extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev, 115extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
111 struct pci_dev *pdev); 116 struct pci_dev *pdev);
diff --git a/include/media/saa7146.h b/include/media/saa7146.h
index 7a9f76ecbbbd..ac7ce00f39cf 100644
--- a/include/media/saa7146.h
+++ b/include/media/saa7146.h
@@ -161,7 +161,7 @@ extern struct list_head saa7146_devices;
161extern struct mutex saa7146_devices_lock; 161extern struct mutex saa7146_devices_lock;
162int saa7146_register_extension(struct saa7146_extension*); 162int saa7146_register_extension(struct saa7146_extension*);
163int saa7146_unregister_extension(struct saa7146_extension*); 163int saa7146_unregister_extension(struct saa7146_extension*);
164struct saa7146_format* format_by_fourcc(struct saa7146_dev *dev, int fourcc); 164struct saa7146_format* saa7146_format_by_fourcc(struct saa7146_dev *dev, int fourcc);
165int saa7146_pgtable_alloc(struct pci_dev *pci, struct saa7146_pgtable *pt); 165int saa7146_pgtable_alloc(struct pci_dev *pci, struct saa7146_pgtable *pt);
166void saa7146_pgtable_free(struct pci_dev *pci, struct saa7146_pgtable *pt); 166void saa7146_pgtable_free(struct pci_dev *pci, struct saa7146_pgtable *pt);
167int saa7146_pgtable_build_single(struct pci_dev *pci, struct saa7146_pgtable *pt, struct scatterlist *list, int length ); 167int saa7146_pgtable_build_single(struct pci_dev *pci, struct saa7146_pgtable *pt, struct scatterlist *list, int length );
diff --git a/include/media/v4l2-device.h b/include/media/v4l2-device.h
index 6648036b728d..b16f307d471a 100644
--- a/include/media/v4l2-device.h
+++ b/include/media/v4l2-device.h
@@ -51,6 +51,8 @@ struct v4l2_device {
51 unsigned int notification, void *arg); 51 unsigned int notification, void *arg);
52 /* The control handler. May be NULL. */ 52 /* The control handler. May be NULL. */
53 struct v4l2_ctrl_handler *ctrl_handler; 53 struct v4l2_ctrl_handler *ctrl_handler;
54 /* BKL replacement mutex. Temporary solution only. */
55 struct mutex ioctl_lock;
54}; 56};
55 57
56/* Initialize v4l2_dev and make dev->driver_data point to v4l2_dev. 58/* Initialize v4l2_dev and make dev->driver_data point to v4l2_dev.
diff --git a/kernel/fork.c b/kernel/fork.c
index 3b159c5991b7..5447dc7defa9 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -273,6 +273,7 @@ static struct task_struct *dup_task_struct(struct task_struct *orig)
273 273
274 setup_thread_stack(tsk, orig); 274 setup_thread_stack(tsk, orig);
275 clear_user_return_notifier(tsk); 275 clear_user_return_notifier(tsk);
276 clear_tsk_need_resched(tsk);
276 stackend = end_of_stack(tsk); 277 stackend = end_of_stack(tsk);
277 *stackend = STACK_END_MAGIC; /* for overflow detection */ 278 *stackend = STACK_END_MAGIC; /* for overflow detection */
278 279
diff --git a/kernel/perf_event.c b/kernel/perf_event.c
index eac7e3364335..2870feee81dd 100644
--- a/kernel/perf_event.c
+++ b/kernel/perf_event.c
@@ -3824,6 +3824,8 @@ static void perf_event_task_event(struct perf_task_event *task_event)
3824 rcu_read_lock(); 3824 rcu_read_lock();
3825 list_for_each_entry_rcu(pmu, &pmus, entry) { 3825 list_for_each_entry_rcu(pmu, &pmus, entry) {
3826 cpuctx = get_cpu_ptr(pmu->pmu_cpu_context); 3826 cpuctx = get_cpu_ptr(pmu->pmu_cpu_context);
3827 if (cpuctx->active_pmu != pmu)
3828 goto next;
3827 perf_event_task_ctx(&cpuctx->ctx, task_event); 3829 perf_event_task_ctx(&cpuctx->ctx, task_event);
3828 3830
3829 ctx = task_event->task_ctx; 3831 ctx = task_event->task_ctx;
@@ -3959,6 +3961,8 @@ static void perf_event_comm_event(struct perf_comm_event *comm_event)
3959 rcu_read_lock(); 3961 rcu_read_lock();
3960 list_for_each_entry_rcu(pmu, &pmus, entry) { 3962 list_for_each_entry_rcu(pmu, &pmus, entry) {
3961 cpuctx = get_cpu_ptr(pmu->pmu_cpu_context); 3963 cpuctx = get_cpu_ptr(pmu->pmu_cpu_context);
3964 if (cpuctx->active_pmu != pmu)
3965 goto next;
3962 perf_event_comm_ctx(&cpuctx->ctx, comm_event); 3966 perf_event_comm_ctx(&cpuctx->ctx, comm_event);
3963 3967
3964 ctxn = pmu->task_ctx_nr; 3968 ctxn = pmu->task_ctx_nr;
@@ -4144,6 +4148,8 @@ got_name:
4144 rcu_read_lock(); 4148 rcu_read_lock();
4145 list_for_each_entry_rcu(pmu, &pmus, entry) { 4149 list_for_each_entry_rcu(pmu, &pmus, entry) {
4146 cpuctx = get_cpu_ptr(pmu->pmu_cpu_context); 4150 cpuctx = get_cpu_ptr(pmu->pmu_cpu_context);
4151 if (cpuctx->active_pmu != pmu)
4152 goto next;
4147 perf_event_mmap_ctx(&cpuctx->ctx, mmap_event, 4153 perf_event_mmap_ctx(&cpuctx->ctx, mmap_event,
4148 vma->vm_flags & VM_EXEC); 4154 vma->vm_flags & VM_EXEC);
4149 4155
@@ -4713,7 +4719,7 @@ static int perf_swevent_init(struct perf_event *event)
4713 break; 4719 break;
4714 } 4720 }
4715 4721
4716 if (event_id > PERF_COUNT_SW_MAX) 4722 if (event_id >= PERF_COUNT_SW_MAX)
4717 return -ENOENT; 4723 return -ENOENT;
4718 4724
4719 if (!event->parent) { 4725 if (!event->parent) {
@@ -5145,20 +5151,36 @@ static void *find_pmu_context(int ctxn)
5145 return NULL; 5151 return NULL;
5146} 5152}
5147 5153
5148static void free_pmu_context(void * __percpu cpu_context) 5154static void update_pmu_context(struct pmu *pmu, struct pmu *old_pmu)
5149{ 5155{
5150 struct pmu *pmu; 5156 int cpu;
5157
5158 for_each_possible_cpu(cpu) {
5159 struct perf_cpu_context *cpuctx;
5160
5161 cpuctx = per_cpu_ptr(pmu->pmu_cpu_context, cpu);
5162
5163 if (cpuctx->active_pmu == old_pmu)
5164 cpuctx->active_pmu = pmu;
5165 }
5166}
5167
5168static void free_pmu_context(struct pmu *pmu)
5169{
5170 struct pmu *i;
5151 5171
5152 mutex_lock(&pmus_lock); 5172 mutex_lock(&pmus_lock);
5153 /* 5173 /*
5154 * Like a real lame refcount. 5174 * Like a real lame refcount.
5155 */ 5175 */
5156 list_for_each_entry(pmu, &pmus, entry) { 5176 list_for_each_entry(i, &pmus, entry) {
5157 if (pmu->pmu_cpu_context == cpu_context) 5177 if (i->pmu_cpu_context == pmu->pmu_cpu_context) {
5178 update_pmu_context(i, pmu);
5158 goto out; 5179 goto out;
5180 }
5159 } 5181 }
5160 5182
5161 free_percpu(cpu_context); 5183 free_percpu(pmu->pmu_cpu_context);
5162out: 5184out:
5163 mutex_unlock(&pmus_lock); 5185 mutex_unlock(&pmus_lock);
5164} 5186}
@@ -5190,6 +5212,7 @@ int perf_pmu_register(struct pmu *pmu)
5190 cpuctx->ctx.pmu = pmu; 5212 cpuctx->ctx.pmu = pmu;
5191 cpuctx->jiffies_interval = 1; 5213 cpuctx->jiffies_interval = 1;
5192 INIT_LIST_HEAD(&cpuctx->rotation_list); 5214 INIT_LIST_HEAD(&cpuctx->rotation_list);
5215 cpuctx->active_pmu = pmu;
5193 } 5216 }
5194 5217
5195got_cpu_context: 5218got_cpu_context:
@@ -5241,7 +5264,7 @@ void perf_pmu_unregister(struct pmu *pmu)
5241 synchronize_rcu(); 5264 synchronize_rcu();
5242 5265
5243 free_percpu(pmu->pmu_disable_count); 5266 free_percpu(pmu->pmu_disable_count);
5244 free_pmu_context(pmu->pmu_cpu_context); 5267 free_pmu_context(pmu);
5245} 5268}
5246 5269
5247struct pmu *perf_init_event(struct perf_event *event) 5270struct pmu *perf_init_event(struct perf_event *event)
diff --git a/kernel/power/swap.c b/kernel/power/swap.c
index baf667bb2794..8c7e4832b9be 100644
--- a/kernel/power/swap.c
+++ b/kernel/power/swap.c
@@ -30,7 +30,7 @@
30 30
31#include "power.h" 31#include "power.h"
32 32
33#define HIBERNATE_SIG "LINHIB0001" 33#define HIBERNATE_SIG "S1SUSPEND"
34 34
35/* 35/*
36 * The swap map is a data structure used for keeping track of each page 36 * The swap map is a data structure used for keeping track of each page
diff --git a/kernel/power/user.c b/kernel/power/user.c
index 1b2ea31e6bd8..c36c3b9e8a84 100644
--- a/kernel/power/user.c
+++ b/kernel/power/user.c
@@ -137,7 +137,7 @@ static int snapshot_release(struct inode *inode, struct file *filp)
137 free_all_swap_pages(data->swap); 137 free_all_swap_pages(data->swap);
138 if (data->frozen) 138 if (data->frozen)
139 thaw_processes(); 139 thaw_processes();
140 pm_notifier_call_chain(data->mode == O_WRONLY ? 140 pm_notifier_call_chain(data->mode == O_RDONLY ?
141 PM_POST_HIBERNATION : PM_POST_RESTORE); 141 PM_POST_HIBERNATION : PM_POST_RESTORE);
142 atomic_inc(&snapshot_device_available); 142 atomic_inc(&snapshot_device_available);
143 143
diff --git a/kernel/resource.c b/kernel/resource.c
index 9fad33efd0db..798e2fae2a06 100644
--- a/kernel/resource.c
+++ b/kernel/resource.c
@@ -40,23 +40,6 @@ EXPORT_SYMBOL(iomem_resource);
40 40
41static DEFINE_RWLOCK(resource_lock); 41static DEFINE_RWLOCK(resource_lock);
42 42
43/*
44 * By default, we allocate free space bottom-up. The architecture can request
45 * top-down by clearing this flag. The user can override the architecture's
46 * choice with the "resource_alloc_from_bottom" kernel boot option, but that
47 * should only be a debugging tool.
48 */
49int resource_alloc_from_bottom = 1;
50
51static __init int setup_alloc_from_bottom(char *s)
52{
53 printk(KERN_INFO
54 "resource: allocating from bottom-up; please report a bug\n");
55 resource_alloc_from_bottom = 1;
56 return 0;
57}
58early_param("resource_alloc_from_bottom", setup_alloc_from_bottom);
59
60static void *r_next(struct seq_file *m, void *v, loff_t *pos) 43static void *r_next(struct seq_file *m, void *v, loff_t *pos)
61{ 44{
62 struct resource *p = v; 45 struct resource *p = v;
@@ -374,6 +357,10 @@ int __weak page_is_ram(unsigned long pfn)
374 return walk_system_ram_range(pfn, 1, NULL, __is_ram) == 1; 357 return walk_system_ram_range(pfn, 1, NULL, __is_ram) == 1;
375} 358}
376 359
360void __weak arch_remove_reservations(struct resource *avail)
361{
362}
363
377static resource_size_t simple_align_resource(void *data, 364static resource_size_t simple_align_resource(void *data,
378 const struct resource *avail, 365 const struct resource *avail,
379 resource_size_t size, 366 resource_size_t size,
@@ -397,74 +384,7 @@ static bool resource_contains(struct resource *res1, struct resource *res2)
397} 384}
398 385
399/* 386/*
400 * Find the resource before "child" in the sibling list of "root" children.
401 */
402static struct resource *find_sibling_prev(struct resource *root, struct resource *child)
403{
404 struct resource *this;
405
406 for (this = root->child; this; this = this->sibling)
407 if (this->sibling == child)
408 return this;
409
410 return NULL;
411}
412
413/*
414 * Find empty slot in the resource tree given range and alignment. 387 * Find empty slot in the resource tree given range and alignment.
415 * This version allocates from the end of the root resource first.
416 */
417static int find_resource_from_top(struct resource *root, struct resource *new,
418 resource_size_t size, resource_size_t min,
419 resource_size_t max, resource_size_t align,
420 resource_size_t (*alignf)(void *,
421 const struct resource *,
422 resource_size_t,
423 resource_size_t),
424 void *alignf_data)
425{
426 struct resource *this;
427 struct resource tmp, avail, alloc;
428
429 tmp.start = root->end;
430 tmp.end = root->end;
431
432 this = find_sibling_prev(root, NULL);
433 for (;;) {
434 if (this) {
435 if (this->end < root->end)
436 tmp.start = this->end + 1;
437 } else
438 tmp.start = root->start;
439
440 resource_clip(&tmp, min, max);
441
442 /* Check for overflow after ALIGN() */
443 avail = *new;
444 avail.start = ALIGN(tmp.start, align);
445 avail.end = tmp.end;
446 if (avail.start >= tmp.start) {
447 alloc.start = alignf(alignf_data, &avail, size, align);
448 alloc.end = alloc.start + size - 1;
449 if (resource_contains(&avail, &alloc)) {
450 new->start = alloc.start;
451 new->end = alloc.end;
452 return 0;
453 }
454 }
455
456 if (!this || this->start == root->start)
457 break;
458
459 tmp.end = this->start - 1;
460 this = find_sibling_prev(root, this);
461 }
462 return -EBUSY;
463}
464
465/*
466 * Find empty slot in the resource tree given range and alignment.
467 * This version allocates from the beginning of the root resource first.
468 */ 388 */
469static int find_resource(struct resource *root, struct resource *new, 389static int find_resource(struct resource *root, struct resource *new,
470 resource_size_t size, resource_size_t min, 390 resource_size_t size, resource_size_t min,
@@ -478,23 +398,24 @@ static int find_resource(struct resource *root, struct resource *new,
478 struct resource *this = root->child; 398 struct resource *this = root->child;
479 struct resource tmp = *new, avail, alloc; 399 struct resource tmp = *new, avail, alloc;
480 400
401 tmp.flags = new->flags;
481 tmp.start = root->start; 402 tmp.start = root->start;
482 /* 403 /*
483 * Skip past an allocated resource that starts at 0, since the 404 * Skip past an allocated resource that starts at 0, since the assignment
484 * assignment of this->start - 1 to tmp->end below would cause an 405 * of this->start - 1 to tmp->end below would cause an underflow.
485 * underflow.
486 */ 406 */
487 if (this && this->start == 0) { 407 if (this && this->start == 0) {
488 tmp.start = this->end + 1; 408 tmp.start = this->end + 1;
489 this = this->sibling; 409 this = this->sibling;
490 } 410 }
491 for (;;) { 411 for(;;) {
492 if (this) 412 if (this)
493 tmp.end = this->start - 1; 413 tmp.end = this->start - 1;
494 else 414 else
495 tmp.end = root->end; 415 tmp.end = root->end;
496 416
497 resource_clip(&tmp, min, max); 417 resource_clip(&tmp, min, max);
418 arch_remove_reservations(&tmp);
498 419
499 /* Check for overflow after ALIGN() */ 420 /* Check for overflow after ALIGN() */
500 avail = *new; 421 avail = *new;
@@ -509,10 +430,8 @@ static int find_resource(struct resource *root, struct resource *new,
509 return 0; 430 return 0;
510 } 431 }
511 } 432 }
512
513 if (!this) 433 if (!this)
514 break; 434 break;
515
516 tmp.start = this->end + 1; 435 tmp.start = this->end + 1;
517 this = this->sibling; 436 this = this->sibling;
518 } 437 }
@@ -545,10 +464,7 @@ int allocate_resource(struct resource *root, struct resource *new,
545 alignf = simple_align_resource; 464 alignf = simple_align_resource;
546 465
547 write_lock(&resource_lock); 466 write_lock(&resource_lock);
548 if (resource_alloc_from_bottom) 467 err = find_resource(root, new, size, min, max, align, alignf, alignf_data);
549 err = find_resource(root, new, size, min, max, align, alignf, alignf_data);
550 else
551 err = find_resource_from_top(root, new, size, min, max, align, alignf, alignf_data);
552 if (err >= 0 && __request_resource(root, new)) 468 if (err >= 0 && __request_resource(root, new))
553 err = -EBUSY; 469 err = -EBUSY;
554 write_unlock(&resource_lock); 470 write_unlock(&resource_lock);
diff --git a/kernel/sched.c b/kernel/sched.c
index dc91a4d09ac3..297d1a0eedb0 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -636,22 +636,18 @@ static inline struct task_group *task_group(struct task_struct *p)
636 636
637#endif /* CONFIG_CGROUP_SCHED */ 637#endif /* CONFIG_CGROUP_SCHED */
638 638
639static u64 irq_time_cpu(int cpu); 639static void update_rq_clock_task(struct rq *rq, s64 delta);
640static void sched_irq_time_avg_update(struct rq *rq, u64 irq_time);
641 640
642inline void update_rq_clock(struct rq *rq) 641static void update_rq_clock(struct rq *rq)
643{ 642{
644 if (!rq->skip_clock_update) { 643 s64 delta;
645 int cpu = cpu_of(rq);
646 u64 irq_time;
647 644
648 rq->clock = sched_clock_cpu(cpu); 645 if (rq->skip_clock_update)
649 irq_time = irq_time_cpu(cpu); 646 return;
650 if (rq->clock - irq_time > rq->clock_task)
651 rq->clock_task = rq->clock - irq_time;
652 647
653 sched_irq_time_avg_update(rq, irq_time); 648 delta = sched_clock_cpu(cpu_of(rq)) - rq->clock;
654 } 649 rq->clock += delta;
650 update_rq_clock_task(rq, delta);
655} 651}
656 652
657/* 653/*
@@ -1924,10 +1920,9 @@ static void deactivate_task(struct rq *rq, struct task_struct *p, int flags)
1924 * They are read and saved off onto struct rq in update_rq_clock(). 1920 * They are read and saved off onto struct rq in update_rq_clock().
1925 * This may result in other CPU reading this CPU's irq time and can 1921 * This may result in other CPU reading this CPU's irq time and can
1926 * race with irq/account_system_vtime on this CPU. We would either get old 1922 * race with irq/account_system_vtime on this CPU. We would either get old
1927 * or new value (or semi updated value on 32 bit) with a side effect of 1923 * or new value with a side effect of accounting a slice of irq time to wrong
1928 * accounting a slice of irq time to wrong task when irq is in progress 1924 * task when irq is in progress while we read rq->clock. That is a worthy
1929 * while we read rq->clock. That is a worthy compromise in place of having 1925 * compromise in place of having locks on each irq in account_system_time.
1930 * locks on each irq in account_system_time.
1931 */ 1926 */
1932static DEFINE_PER_CPU(u64, cpu_hardirq_time); 1927static DEFINE_PER_CPU(u64, cpu_hardirq_time);
1933static DEFINE_PER_CPU(u64, cpu_softirq_time); 1928static DEFINE_PER_CPU(u64, cpu_softirq_time);
@@ -1945,19 +1940,58 @@ void disable_sched_clock_irqtime(void)
1945 sched_clock_irqtime = 0; 1940 sched_clock_irqtime = 0;
1946} 1941}
1947 1942
1948static u64 irq_time_cpu(int cpu) 1943#ifndef CONFIG_64BIT
1944static DEFINE_PER_CPU(seqcount_t, irq_time_seq);
1945
1946static inline void irq_time_write_begin(void)
1949{ 1947{
1950 if (!sched_clock_irqtime) 1948 __this_cpu_inc(irq_time_seq.sequence);
1951 return 0; 1949 smp_wmb();
1950}
1951
1952static inline void irq_time_write_end(void)
1953{
1954 smp_wmb();
1955 __this_cpu_inc(irq_time_seq.sequence);
1956}
1957
1958static inline u64 irq_time_read(int cpu)
1959{
1960 u64 irq_time;
1961 unsigned seq;
1952 1962
1963 do {
1964 seq = read_seqcount_begin(&per_cpu(irq_time_seq, cpu));
1965 irq_time = per_cpu(cpu_softirq_time, cpu) +
1966 per_cpu(cpu_hardirq_time, cpu);
1967 } while (read_seqcount_retry(&per_cpu(irq_time_seq, cpu), seq));
1968
1969 return irq_time;
1970}
1971#else /* CONFIG_64BIT */
1972static inline void irq_time_write_begin(void)
1973{
1974}
1975
1976static inline void irq_time_write_end(void)
1977{
1978}
1979
1980static inline u64 irq_time_read(int cpu)
1981{
1953 return per_cpu(cpu_softirq_time, cpu) + per_cpu(cpu_hardirq_time, cpu); 1982 return per_cpu(cpu_softirq_time, cpu) + per_cpu(cpu_hardirq_time, cpu);
1954} 1983}
1984#endif /* CONFIG_64BIT */
1955 1985
1986/*
1987 * Called before incrementing preempt_count on {soft,}irq_enter
1988 * and before decrementing preempt_count on {soft,}irq_exit.
1989 */
1956void account_system_vtime(struct task_struct *curr) 1990void account_system_vtime(struct task_struct *curr)
1957{ 1991{
1958 unsigned long flags; 1992 unsigned long flags;
1993 s64 delta;
1959 int cpu; 1994 int cpu;
1960 u64 now, delta;
1961 1995
1962 if (!sched_clock_irqtime) 1996 if (!sched_clock_irqtime)
1963 return; 1997 return;
@@ -1965,9 +1999,10 @@ void account_system_vtime(struct task_struct *curr)
1965 local_irq_save(flags); 1999 local_irq_save(flags);
1966 2000
1967 cpu = smp_processor_id(); 2001 cpu = smp_processor_id();
1968 now = sched_clock_cpu(cpu); 2002 delta = sched_clock_cpu(cpu) - __this_cpu_read(irq_start_time);
1969 delta = now - per_cpu(irq_start_time, cpu); 2003 __this_cpu_add(irq_start_time, delta);
1970 per_cpu(irq_start_time, cpu) = now; 2004
2005 irq_time_write_begin();
1971 /* 2006 /*
1972 * We do not account for softirq time from ksoftirqd here. 2007 * We do not account for softirq time from ksoftirqd here.
1973 * We want to continue accounting softirq time to ksoftirqd thread 2008 * We want to continue accounting softirq time to ksoftirqd thread
@@ -1975,33 +2010,55 @@ void account_system_vtime(struct task_struct *curr)
1975 * that do not consume any time, but still wants to run. 2010 * that do not consume any time, but still wants to run.
1976 */ 2011 */
1977 if (hardirq_count()) 2012 if (hardirq_count())
1978 per_cpu(cpu_hardirq_time, cpu) += delta; 2013 __this_cpu_add(cpu_hardirq_time, delta);
1979 else if (in_serving_softirq() && !(curr->flags & PF_KSOFTIRQD)) 2014 else if (in_serving_softirq() && !(curr->flags & PF_KSOFTIRQD))
1980 per_cpu(cpu_softirq_time, cpu) += delta; 2015 __this_cpu_add(cpu_softirq_time, delta);
1981 2016
2017 irq_time_write_end();
1982 local_irq_restore(flags); 2018 local_irq_restore(flags);
1983} 2019}
1984EXPORT_SYMBOL_GPL(account_system_vtime); 2020EXPORT_SYMBOL_GPL(account_system_vtime);
1985 2021
1986static void sched_irq_time_avg_update(struct rq *rq, u64 curr_irq_time) 2022static void update_rq_clock_task(struct rq *rq, s64 delta)
1987{ 2023{
1988 if (sched_clock_irqtime && sched_feat(NONIRQ_POWER)) { 2024 s64 irq_delta;
1989 u64 delta_irq = curr_irq_time - rq->prev_irq_time; 2025
1990 rq->prev_irq_time = curr_irq_time; 2026 irq_delta = irq_time_read(cpu_of(rq)) - rq->prev_irq_time;
1991 sched_rt_avg_update(rq, delta_irq); 2027
1992 } 2028 /*
2029 * Since irq_time is only updated on {soft,}irq_exit, we might run into
2030 * this case when a previous update_rq_clock() happened inside a
2031 * {soft,}irq region.
2032 *
2033 * When this happens, we stop ->clock_task and only update the
2034 * prev_irq_time stamp to account for the part that fit, so that a next
2035 * update will consume the rest. This ensures ->clock_task is
2036 * monotonic.
2037 *
2038 * It does however cause some slight miss-attribution of {soft,}irq
2039 * time, a more accurate solution would be to update the irq_time using
2040 * the current rq->clock timestamp, except that would require using
2041 * atomic ops.
2042 */
2043 if (irq_delta > delta)
2044 irq_delta = delta;
2045
2046 rq->prev_irq_time += irq_delta;
2047 delta -= irq_delta;
2048 rq->clock_task += delta;
2049
2050 if (irq_delta && sched_feat(NONIRQ_POWER))
2051 sched_rt_avg_update(rq, irq_delta);
1993} 2052}
1994 2053
1995#else 2054#else /* CONFIG_IRQ_TIME_ACCOUNTING */
1996 2055
1997static u64 irq_time_cpu(int cpu) 2056static void update_rq_clock_task(struct rq *rq, s64 delta)
1998{ 2057{
1999 return 0; 2058 rq->clock_task += delta;
2000} 2059}
2001 2060
2002static void sched_irq_time_avg_update(struct rq *rq, u64 curr_irq_time) { } 2061#endif /* CONFIG_IRQ_TIME_ACCOUNTING */
2003
2004#endif
2005 2062
2006#include "sched_idletask.c" 2063#include "sched_idletask.c"
2007#include "sched_fair.c" 2064#include "sched_fair.c"
@@ -2129,7 +2186,7 @@ static void check_preempt_curr(struct rq *rq, struct task_struct *p, int flags)
2129 * A queue event has occurred, and we're going to schedule. In 2186 * A queue event has occurred, and we're going to schedule. In
2130 * this case, we can save a useless back to back clock update. 2187 * this case, we can save a useless back to back clock update.
2131 */ 2188 */
2132 if (test_tsk_need_resched(rq->curr)) 2189 if (rq->curr->se.on_rq && test_tsk_need_resched(rq->curr))
2133 rq->skip_clock_update = 1; 2190 rq->skip_clock_update = 1;
2134} 2191}
2135 2192
@@ -3119,6 +3176,15 @@ static long calc_load_fold_active(struct rq *this_rq)
3119 return delta; 3176 return delta;
3120} 3177}
3121 3178
3179static unsigned long
3180calc_load(unsigned long load, unsigned long exp, unsigned long active)
3181{
3182 load *= exp;
3183 load += active * (FIXED_1 - exp);
3184 load += 1UL << (FSHIFT - 1);
3185 return load >> FSHIFT;
3186}
3187
3122#ifdef CONFIG_NO_HZ 3188#ifdef CONFIG_NO_HZ
3123/* 3189/*
3124 * For NO_HZ we delay the active fold to the next LOAD_FREQ update. 3190 * For NO_HZ we delay the active fold to the next LOAD_FREQ update.
@@ -3148,6 +3214,128 @@ static long calc_load_fold_idle(void)
3148 3214
3149 return delta; 3215 return delta;
3150} 3216}
3217
3218/**
3219 * fixed_power_int - compute: x^n, in O(log n) time
3220 *
3221 * @x: base of the power
3222 * @frac_bits: fractional bits of @x
3223 * @n: power to raise @x to.
3224 *
3225 * By exploiting the relation between the definition of the natural power
3226 * function: x^n := x*x*...*x (x multiplied by itself for n times), and
3227 * the binary encoding of numbers used by computers: n := \Sum n_i * 2^i,
3228 * (where: n_i \elem {0, 1}, the binary vector representing n),
3229 * we find: x^n := x^(\Sum n_i * 2^i) := \Prod x^(n_i * 2^i), which is
3230 * of course trivially computable in O(log_2 n), the length of our binary
3231 * vector.
3232 */
3233static unsigned long
3234fixed_power_int(unsigned long x, unsigned int frac_bits, unsigned int n)
3235{
3236 unsigned long result = 1UL << frac_bits;
3237
3238 if (n) for (;;) {
3239 if (n & 1) {
3240 result *= x;
3241 result += 1UL << (frac_bits - 1);
3242 result >>= frac_bits;
3243 }
3244 n >>= 1;
3245 if (!n)
3246 break;
3247 x *= x;
3248 x += 1UL << (frac_bits - 1);
3249 x >>= frac_bits;
3250 }
3251
3252 return result;
3253}
3254
3255/*
3256 * a1 = a0 * e + a * (1 - e)
3257 *
3258 * a2 = a1 * e + a * (1 - e)
3259 * = (a0 * e + a * (1 - e)) * e + a * (1 - e)
3260 * = a0 * e^2 + a * (1 - e) * (1 + e)
3261 *
3262 * a3 = a2 * e + a * (1 - e)
3263 * = (a0 * e^2 + a * (1 - e) * (1 + e)) * e + a * (1 - e)
3264 * = a0 * e^3 + a * (1 - e) * (1 + e + e^2)
3265 *
3266 * ...
3267 *
3268 * an = a0 * e^n + a * (1 - e) * (1 + e + ... + e^n-1) [1]
3269 * = a0 * e^n + a * (1 - e) * (1 - e^n)/(1 - e)
3270 * = a0 * e^n + a * (1 - e^n)
3271 *
3272 * [1] application of the geometric series:
3273 *
3274 * n 1 - x^(n+1)
3275 * S_n := \Sum x^i = -------------
3276 * i=0 1 - x
3277 */
3278static unsigned long
3279calc_load_n(unsigned long load, unsigned long exp,
3280 unsigned long active, unsigned int n)
3281{
3282
3283 return calc_load(load, fixed_power_int(exp, FSHIFT, n), active);
3284}
3285
3286/*
3287 * NO_HZ can leave us missing all per-cpu ticks calling
3288 * calc_load_account_active(), but since an idle CPU folds its delta into
3289 * calc_load_tasks_idle per calc_load_account_idle(), all we need to do is fold
3290 * in the pending idle delta if our idle period crossed a load cycle boundary.
3291 *
3292 * Once we've updated the global active value, we need to apply the exponential
3293 * weights adjusted to the number of cycles missed.
3294 */
3295static void calc_global_nohz(unsigned long ticks)
3296{
3297 long delta, active, n;
3298
3299 if (time_before(jiffies, calc_load_update))
3300 return;
3301
3302 /*
3303 * If we crossed a calc_load_update boundary, make sure to fold
3304 * any pending idle changes, the respective CPUs might have
3305 * missed the tick driven calc_load_account_active() update
3306 * due to NO_HZ.
3307 */
3308 delta = calc_load_fold_idle();
3309 if (delta)
3310 atomic_long_add(delta, &calc_load_tasks);
3311
3312 /*
3313 * If we were idle for multiple load cycles, apply them.
3314 */
3315 if (ticks >= LOAD_FREQ) {
3316 n = ticks / LOAD_FREQ;
3317
3318 active = atomic_long_read(&calc_load_tasks);
3319 active = active > 0 ? active * FIXED_1 : 0;
3320
3321 avenrun[0] = calc_load_n(avenrun[0], EXP_1, active, n);
3322 avenrun[1] = calc_load_n(avenrun[1], EXP_5, active, n);
3323 avenrun[2] = calc_load_n(avenrun[2], EXP_15, active, n);
3324
3325 calc_load_update += n * LOAD_FREQ;
3326 }
3327
3328 /*
3329 * Its possible the remainder of the above division also crosses
3330 * a LOAD_FREQ period, the regular check in calc_global_load()
3331 * which comes after this will take care of that.
3332 *
3333 * Consider us being 11 ticks before a cycle completion, and us
3334 * sleeping for 4*LOAD_FREQ + 22 ticks, then the above code will
3335 * age us 4 cycles, and the test in calc_global_load() will
3336 * pick up the final one.
3337 */
3338}
3151#else 3339#else
3152static void calc_load_account_idle(struct rq *this_rq) 3340static void calc_load_account_idle(struct rq *this_rq)
3153{ 3341{
@@ -3157,6 +3345,10 @@ static inline long calc_load_fold_idle(void)
3157{ 3345{
3158 return 0; 3346 return 0;
3159} 3347}
3348
3349static void calc_global_nohz(unsigned long ticks)
3350{
3351}
3160#endif 3352#endif
3161 3353
3162/** 3354/**
@@ -3174,24 +3366,17 @@ void get_avenrun(unsigned long *loads, unsigned long offset, int shift)
3174 loads[2] = (avenrun[2] + offset) << shift; 3366 loads[2] = (avenrun[2] + offset) << shift;
3175} 3367}
3176 3368
3177static unsigned long
3178calc_load(unsigned long load, unsigned long exp, unsigned long active)
3179{
3180 load *= exp;
3181 load += active * (FIXED_1 - exp);
3182 return load >> FSHIFT;
3183}
3184
3185/* 3369/*
3186 * calc_load - update the avenrun load estimates 10 ticks after the 3370 * calc_load - update the avenrun load estimates 10 ticks after the
3187 * CPUs have updated calc_load_tasks. 3371 * CPUs have updated calc_load_tasks.
3188 */ 3372 */
3189void calc_global_load(void) 3373void calc_global_load(unsigned long ticks)
3190{ 3374{
3191 unsigned long upd = calc_load_update + 10;
3192 long active; 3375 long active;
3193 3376
3194 if (time_before(jiffies, upd)) 3377 calc_global_nohz(ticks);
3378
3379 if (time_before(jiffies, calc_load_update + 10))
3195 return; 3380 return;
3196 3381
3197 active = atomic_long_read(&calc_load_tasks); 3382 active = atomic_long_read(&calc_load_tasks);
@@ -3845,7 +4030,6 @@ static void put_prev_task(struct rq *rq, struct task_struct *prev)
3845{ 4030{
3846 if (prev->se.on_rq) 4031 if (prev->se.on_rq)
3847 update_rq_clock(rq); 4032 update_rq_clock(rq);
3848 rq->skip_clock_update = 0;
3849 prev->sched_class->put_prev_task(rq, prev); 4033 prev->sched_class->put_prev_task(rq, prev);
3850} 4034}
3851 4035
@@ -3903,7 +4087,6 @@ need_resched_nonpreemptible:
3903 hrtick_clear(rq); 4087 hrtick_clear(rq);
3904 4088
3905 raw_spin_lock_irq(&rq->lock); 4089 raw_spin_lock_irq(&rq->lock);
3906 clear_tsk_need_resched(prev);
3907 4090
3908 switch_count = &prev->nivcsw; 4091 switch_count = &prev->nivcsw;
3909 if (prev->state && !(preempt_count() & PREEMPT_ACTIVE)) { 4092 if (prev->state && !(preempt_count() & PREEMPT_ACTIVE)) {
@@ -3935,6 +4118,8 @@ need_resched_nonpreemptible:
3935 4118
3936 put_prev_task(rq, prev); 4119 put_prev_task(rq, prev);
3937 next = pick_next_task(rq); 4120 next = pick_next_task(rq);
4121 clear_tsk_need_resched(prev);
4122 rq->skip_clock_update = 0;
3938 4123
3939 if (likely(prev != next)) { 4124 if (likely(prev != next)) {
3940 sched_info_switch(prev, next); 4125 sched_info_switch(prev, next);
diff --git a/kernel/timer.c b/kernel/timer.c
index 68a9ae7679b7..353b9227c2ec 100644
--- a/kernel/timer.c
+++ b/kernel/timer.c
@@ -1252,6 +1252,12 @@ unsigned long get_next_timer_interrupt(unsigned long now)
1252 struct tvec_base *base = __get_cpu_var(tvec_bases); 1252 struct tvec_base *base = __get_cpu_var(tvec_bases);
1253 unsigned long expires; 1253 unsigned long expires;
1254 1254
1255 /*
1256 * Pretend that there is no timer pending if the cpu is offline.
1257 * Possible pending timers will be migrated later to an active cpu.
1258 */
1259 if (cpu_is_offline(smp_processor_id()))
1260 return now + NEXT_TIMER_MAX_DELTA;
1255 spin_lock(&base->lock); 1261 spin_lock(&base->lock);
1256 if (time_before_eq(base->next_timer, base->timer_jiffies)) 1262 if (time_before_eq(base->next_timer, base->timer_jiffies))
1257 base->next_timer = __next_timer_interrupt(base); 1263 base->next_timer = __next_timer_interrupt(base);
@@ -1319,7 +1325,7 @@ void do_timer(unsigned long ticks)
1319{ 1325{
1320 jiffies_64 += ticks; 1326 jiffies_64 += ticks;
1321 update_wall_time(); 1327 update_wall_time();
1322 calc_global_load(); 1328 calc_global_load(ticks);
1323} 1329}
1324 1330
1325#ifdef __ARCH_WANT_SYS_ALARM 1331#ifdef __ARCH_WANT_SYS_ALARM
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index c380612273bf..f8cf959bad45 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -2338,11 +2338,19 @@ tracing_write_stub(struct file *filp, const char __user *ubuf,
2338 return count; 2338 return count;
2339} 2339}
2340 2340
2341static loff_t tracing_seek(struct file *file, loff_t offset, int origin)
2342{
2343 if (file->f_mode & FMODE_READ)
2344 return seq_lseek(file, offset, origin);
2345 else
2346 return 0;
2347}
2348
2341static const struct file_operations tracing_fops = { 2349static const struct file_operations tracing_fops = {
2342 .open = tracing_open, 2350 .open = tracing_open,
2343 .read = seq_read, 2351 .read = seq_read,
2344 .write = tracing_write_stub, 2352 .write = tracing_write_stub,
2345 .llseek = seq_lseek, 2353 .llseek = tracing_seek,
2346 .release = tracing_release, 2354 .release = tracing_release,
2347}; 2355};
2348 2356
diff --git a/net/ceph/messenger.c b/net/ceph/messenger.c
index 1c7a2ec4f3cc..b6ff4a1519ab 100644
--- a/net/ceph/messenger.c
+++ b/net/ceph/messenger.c
@@ -97,11 +97,9 @@ struct workqueue_struct *ceph_msgr_wq;
97int ceph_msgr_init(void) 97int ceph_msgr_init(void)
98{ 98{
99 ceph_msgr_wq = create_workqueue("ceph-msgr"); 99 ceph_msgr_wq = create_workqueue("ceph-msgr");
100 if (IS_ERR(ceph_msgr_wq)) { 100 if (!ceph_msgr_wq) {
101 int ret = PTR_ERR(ceph_msgr_wq); 101 pr_err("msgr_init failed to create workqueue\n");
102 pr_err("msgr_init failed to create workqueue: %d\n", ret); 102 return -ENOMEM;
103 ceph_msgr_wq = NULL;
104 return ret;
105 } 103 }
106 return 0; 104 return 0;
107} 105}
diff --git a/net/ceph/pagevec.c b/net/ceph/pagevec.c
index ac34feeb2b3a..1a040e64c69f 100644
--- a/net/ceph/pagevec.c
+++ b/net/ceph/pagevec.c
@@ -13,7 +13,7 @@
13 * build a vector of user pages 13 * build a vector of user pages
14 */ 14 */
15struct page **ceph_get_direct_page_vector(const char __user *data, 15struct page **ceph_get_direct_page_vector(const char __user *data,
16 int num_pages) 16 int num_pages, bool write_page)
17{ 17{
18 struct page **pages; 18 struct page **pages;
19 int rc; 19 int rc;
@@ -24,24 +24,27 @@ struct page **ceph_get_direct_page_vector(const char __user *data,
24 24
25 down_read(&current->mm->mmap_sem); 25 down_read(&current->mm->mmap_sem);
26 rc = get_user_pages(current, current->mm, (unsigned long)data, 26 rc = get_user_pages(current, current->mm, (unsigned long)data,
27 num_pages, 0, 0, pages, NULL); 27 num_pages, write_page, 0, pages, NULL);
28 up_read(&current->mm->mmap_sem); 28 up_read(&current->mm->mmap_sem);
29 if (rc < 0) 29 if (rc < num_pages)
30 goto fail; 30 goto fail;
31 return pages; 31 return pages;
32 32
33fail: 33fail:
34 kfree(pages); 34 ceph_put_page_vector(pages, rc > 0 ? rc : 0, false);
35 return ERR_PTR(rc); 35 return ERR_PTR(rc);
36} 36}
37EXPORT_SYMBOL(ceph_get_direct_page_vector); 37EXPORT_SYMBOL(ceph_get_direct_page_vector);
38 38
39void ceph_put_page_vector(struct page **pages, int num_pages) 39void ceph_put_page_vector(struct page **pages, int num_pages, bool dirty)
40{ 40{
41 int i; 41 int i;
42 42
43 for (i = 0; i < num_pages; i++) 43 for (i = 0; i < num_pages; i++) {
44 if (dirty)
45 set_page_dirty_lock(pages[i]);
44 put_page(pages[i]); 46 put_page(pages[i]);
47 }
45 kfree(pages); 48 kfree(pages);
46} 49}
47EXPORT_SYMBOL(ceph_put_page_vector); 50EXPORT_SYMBOL(ceph_put_page_vector);
diff --git a/scripts/recordmcount.h b/scripts/recordmcount.h
index 58e933a20544..39667174971d 100644
--- a/scripts/recordmcount.h
+++ b/scripts/recordmcount.h
@@ -119,7 +119,7 @@ static uint_t (*Elf_r_sym)(Elf_Rel const *rp) = fn_ELF_R_SYM;
119 119
120static void fn_ELF_R_INFO(Elf_Rel *const rp, unsigned sym, unsigned type) 120static void fn_ELF_R_INFO(Elf_Rel *const rp, unsigned sym, unsigned type)
121{ 121{
122 rp->r_info = ELF_R_INFO(sym, type); 122 rp->r_info = _w(ELF_R_INFO(sym, type));
123} 123}
124static void (*Elf_r_info)(Elf_Rel *const rp, unsigned sym, unsigned type) = fn_ELF_R_INFO; 124static void (*Elf_r_info)(Elf_Rel *const rp, unsigned sym, unsigned type) = fn_ELF_R_INFO;
125 125
diff --git a/scripts/tags.sh b/scripts/tags.sh
index 8509bb512935..bbbe584d4494 100755
--- a/scripts/tags.sh
+++ b/scripts/tags.sh
@@ -125,7 +125,9 @@ exuberant()
125 -I DEFINE_TRACE,EXPORT_TRACEPOINT_SYMBOL,EXPORT_TRACEPOINT_SYMBOL_GPL \ 125 -I DEFINE_TRACE,EXPORT_TRACEPOINT_SYMBOL,EXPORT_TRACEPOINT_SYMBOL_GPL \
126 --extra=+f --c-kinds=-px \ 126 --extra=+f --c-kinds=-px \
127 --regex-asm='/^ENTRY\(([^)]*)\).*/\1/' \ 127 --regex-asm='/^ENTRY\(([^)]*)\).*/\1/' \
128 --regex-c='/^SYSCALL_DEFINE[[:digit:]]?\(([^,)]*).*/sys_\1/' 128 --regex-c='/^SYSCALL_DEFINE[[:digit:]]?\(([^,)]*).*/sys_\1/' \
129 --regex-c++='/^TRACE_EVENT\(([^,)]*).*/trace_\1/' \
130 --regex-c++='/^DEFINE_EVENT\(([^,)]*).*/trace_\1/'
129 131
130 all_kconfigs | xargs $1 -a \ 132 all_kconfigs | xargs $1 -a \
131 --langdef=kconfig --language-force=kconfig \ 133 --langdef=kconfig --language-force=kconfig \
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 2d7d7de8498a..427da45d7906 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -10830,7 +10830,8 @@ static int alc_auto_add_mic_boost(struct hda_codec *codec)
10830{ 10830{
10831 struct alc_spec *spec = codec->spec; 10831 struct alc_spec *spec = codec->spec;
10832 struct auto_pin_cfg *cfg = &spec->autocfg; 10832 struct auto_pin_cfg *cfg = &spec->autocfg;
10833 int i, err; 10833 int i, err, type;
10834 int type_idx = 0;
10834 hda_nid_t nid; 10835 hda_nid_t nid;
10835 10836
10836 for (i = 0; i < cfg->num_inputs; i++) { 10837 for (i = 0; i < cfg->num_inputs; i++) {
@@ -10839,9 +10840,15 @@ static int alc_auto_add_mic_boost(struct hda_codec *codec)
10839 nid = cfg->inputs[i].pin; 10840 nid = cfg->inputs[i].pin;
10840 if (get_wcaps(codec, nid) & AC_WCAP_IN_AMP) { 10841 if (get_wcaps(codec, nid) & AC_WCAP_IN_AMP) {
10841 char label[32]; 10842 char label[32];
10843 type = cfg->inputs[i].type;
10844 if (i > 0 && type == cfg->inputs[i - 1].type)
10845 type_idx++;
10846 else
10847 type_idx = 0;
10842 snprintf(label, sizeof(label), "%s Boost", 10848 snprintf(label, sizeof(label), "%s Boost",
10843 hda_get_autocfg_input_label(codec, cfg, i)); 10849 hda_get_autocfg_input_label(codec, cfg, i));
10844 err = add_control(spec, ALC_CTL_WIDGET_VOL, label, 0, 10850 err = add_control(spec, ALC_CTL_WIDGET_VOL, label,
10851 type_idx,
10845 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_INPUT)); 10852 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_INPUT));
10846 if (err < 0) 10853 if (err < 0)
10847 return err; 10854 return err;
@@ -14800,6 +14807,8 @@ static int alc269_resume(struct hda_codec *codec)
14800enum { 14807enum {
14801 ALC269_FIXUP_SONY_VAIO, 14808 ALC269_FIXUP_SONY_VAIO,
14802 ALC269_FIXUP_DELL_M101Z, 14809 ALC269_FIXUP_DELL_M101Z,
14810 ALC269_FIXUP_LENOVO_EDGE14,
14811 ALC269_FIXUP_ASUS_G73JW,
14803}; 14812};
14804 14813
14805static const struct alc_fixup alc269_fixups[] = { 14814static const struct alc_fixup alc269_fixups[] = {
@@ -14817,11 +14826,22 @@ static const struct alc_fixup alc269_fixups[] = {
14817 {} 14826 {}
14818 } 14827 }
14819 }, 14828 },
14829 [ALC269_FIXUP_LENOVO_EDGE14] = {
14830 .sku = ALC_FIXUP_SKU_IGNORE,
14831 },
14832 [ALC269_FIXUP_ASUS_G73JW] = {
14833 .pins = (const struct alc_pincfg[]) {
14834 { 0x17, 0x99130111 }, /* subwoofer */
14835 { }
14836 }
14837 },
14820}; 14838};
14821 14839
14822static struct snd_pci_quirk alc269_fixup_tbl[] = { 14840static struct snd_pci_quirk alc269_fixup_tbl[] = {
14823 SND_PCI_QUIRK_VENDOR(0x104d, "Sony VAIO", ALC269_FIXUP_SONY_VAIO), 14841 SND_PCI_QUIRK_VENDOR(0x104d, "Sony VAIO", ALC269_FIXUP_SONY_VAIO),
14824 SND_PCI_QUIRK(0x1028, 0x0470, "Dell M101z", ALC269_FIXUP_DELL_M101Z), 14842 SND_PCI_QUIRK(0x1028, 0x0470, "Dell M101z", ALC269_FIXUP_DELL_M101Z),
14843 SND_PCI_QUIRK(0x17aa, 0x21b8, "Thinkpad Edge 14", ALC269_FIXUP_LENOVO_EDGE14),
14844 SND_PCI_QUIRK(0x1043, 0x1a13, "Asus G73Jw", ALC269_FIXUP_ASUS_G73JW),
14825 {} 14845 {}
14826}; 14846};
14827 14847
diff --git a/sound/soc/codecs/wm8580.c b/sound/soc/codecs/wm8580.c
index 879dff2714dd..8725d4e75431 100644
--- a/sound/soc/codecs/wm8580.c
+++ b/sound/soc/codecs/wm8580.c
@@ -161,7 +161,7 @@
161static const u16 wm8580_reg[] = { 161static const u16 wm8580_reg[] = {
162 0x0121, 0x017e, 0x007d, 0x0014, /*R3*/ 162 0x0121, 0x017e, 0x007d, 0x0014, /*R3*/
163 0x0121, 0x017e, 0x007d, 0x0194, /*R7*/ 163 0x0121, 0x017e, 0x007d, 0x0194, /*R7*/
164 0x001c, 0x0002, 0x0002, 0x00c2, /*R11*/ 164 0x0010, 0x0002, 0x0002, 0x00c2, /*R11*/
165 0x0182, 0x0082, 0x000a, 0x0024, /*R15*/ 165 0x0182, 0x0082, 0x000a, 0x0024, /*R15*/
166 0x0009, 0x0000, 0x00ff, 0x0000, /*R19*/ 166 0x0009, 0x0000, 0x00ff, 0x0000, /*R19*/
167 0x00ff, 0x00ff, 0x00ff, 0x00ff, /*R23*/ 167 0x00ff, 0x00ff, 0x00ff, 0x00ff, /*R23*/
diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index fca60a0b57b8..9001cc48ba13 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -818,7 +818,8 @@ static int wm8904_get_deemph(struct snd_kcontrol *kcontrol,
818 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 818 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
819 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 819 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
820 820
821 return wm8904->deemph; 821 ucontrol->value.enumerated.item[0] = wm8904->deemph;
822 return 0;
822} 823}
823 824
824static int wm8904_put_deemph(struct snd_kcontrol *kcontrol, 825static int wm8904_put_deemph(struct snd_kcontrol *kcontrol,
diff --git a/sound/soc/codecs/wm8955.c b/sound/soc/codecs/wm8955.c
index f89ad6c9a80b..9cbab8e1de01 100644
--- a/sound/soc/codecs/wm8955.c
+++ b/sound/soc/codecs/wm8955.c
@@ -380,7 +380,8 @@ static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
380 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 380 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
381 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); 381 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
382 382
383 return wm8955->deemph; 383 ucontrol->value.enumerated.item[0] = wm8955->deemph;
384 return 0;
384} 385}
385 386
386static int wm8955_put_deemph(struct snd_kcontrol *kcontrol, 387static int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index 8d5efb333c33..21986c42272f 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -138,7 +138,8 @@ static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
138 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 138 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
139 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); 139 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
140 140
141 return wm8960->deemph; 141 ucontrol->value.enumerated.item[0] = wm8960->deemph;
142 return 0;
142} 143}
143 144
144static int wm8960_put_deemph(struct snd_kcontrol *kcontrol, 145static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index 75ed6491222d..c721502833bc 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -944,6 +944,9 @@ static int dapm_power_widgets(struct snd_soc_codec *codec, int event)
944 case SND_SOC_DAPM_STREAM_RESUME: 944 case SND_SOC_DAPM_STREAM_RESUME:
945 sys_power = 1; 945 sys_power = 1;
946 break; 946 break;
947 case SND_SOC_DAPM_STREAM_STOP:
948 sys_power = !!codec->active;
949 break;
947 case SND_SOC_DAPM_STREAM_SUSPEND: 950 case SND_SOC_DAPM_STREAM_SUSPEND:
948 sys_power = 0; 951 sys_power = 0;
949 break; 952 break;