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authorLennert Buytenhek <buytenh@marvell.com>2008-06-22 16:45:02 -0400
committerLennert Buytenhek <buytenh@marvell.com>2008-06-22 16:45:02 -0400
commit777f9bebad3476b7dbf5cd8abbd3414139ca0e48 (patch)
treef58bb3a02ae8f30463d33a131d17707cf3308843
parent1219715de70956557b9dedf3ee021a73d4f4ec52 (diff)
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU core running at between 400 MHz and 1.0 GHz, and features a 64 bit DDR controller, 512K of internal SRAM, two x4 PCI-Express ports, two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs, two TWSI controllers, and IDMA/XOR engines. This patch adds support for the Marvell LB88RC8480 Development Board, enabling the use of the PCIe interfaces, the ethernet interfaces, the TWSI interfaces and the UARTs. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat
-rw-r--r--arch/arm/Kconfig10
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mach-loki/Kconfig13
-rw-r--r--arch/arm/mach-loki/Makefile3
-rw-r--r--arch/arm/mach-loki/Makefile.boot3
-rw-r--r--arch/arm/mach-loki/addr-map.c121
-rw-r--r--arch/arm/mach-loki/common.c305
-rw-r--r--arch/arm/mach-loki/common.h36
-rw-r--r--arch/arm/mach-loki/irq.c21
-rw-r--r--arch/arm/mach-loki/lb88rc8480-setup.c100
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--include/asm-arm/arch-loki/debug-macro.S20
-rw-r--r--include/asm-arm/arch-loki/dma.h1
-rw-r--r--include/asm-arm/arch-loki/entry-macro.S30
-rw-r--r--include/asm-arm/arch-loki/hardware.h15
-rw-r--r--include/asm-arm/arch-loki/io.h26
-rw-r--r--include/asm-arm/arch-loki/irqs.h58
-rw-r--r--include/asm-arm/arch-loki/loki.h97
-rw-r--r--include/asm-arm/arch-loki/memory.h14
-rw-r--r--include/asm-arm/arch-loki/system.h37
-rw-r--r--include/asm-arm/arch-loki/timex.h11
-rw-r--r--include/asm-arm/arch-loki/uncompress.h47
-rw-r--r--include/asm-arm/arch-loki/vmalloc.h5
23 files changed, 975 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4bdf598611d1..7a725f89b843 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -370,6 +370,14 @@ config ARCH_NS9XXX
370 370
371 <http://www.digi.com/products/microprocessors/index.jsp> 371 <http://www.digi.com/products/microprocessors/index.jsp>
372 372
373config ARCH_LOKI
374 bool "Marvell Loki (88RC8480)"
375 select GENERIC_TIME
376 select GENERIC_CLOCKEVENTS
377 select PLAT_ORION
378 help
379 Support for the Marvell Loki (88RC8480) SoC.
380
373config ARCH_MXC 381config ARCH_MXC
374 bool "Freescale MXC/iMX-based" 382 bool "Freescale MXC/iMX-based"
375 select ARCH_MTD_XIP 383 select ARCH_MTD_XIP
@@ -508,6 +516,8 @@ source "arch/arm/mach-ixp2000/Kconfig"
508 516
509source "arch/arm/mach-ixp23xx/Kconfig" 517source "arch/arm/mach-ixp23xx/Kconfig"
510 518
519source "arch/arm/mach-loki/Kconfig"
520
511source "arch/arm/mach-pxa/Kconfig" 521source "arch/arm/mach-pxa/Kconfig"
512 522
513source "arch/arm/mach-sa1100/Kconfig" 523source "arch/arm/mach-sa1100/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e72db27e0ba0..2ea32a70c977 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -140,6 +140,7 @@ endif
140 machine-$(CONFIG_ARCH_MX3) := mx3 140 machine-$(CONFIG_ARCH_MX3) := mx3
141 machine-$(CONFIG_ARCH_ORION5X) := orion5x 141 machine-$(CONFIG_ARCH_ORION5X) := orion5x
142 machine-$(CONFIG_ARCH_MSM7X00A) := msm 142 machine-$(CONFIG_ARCH_MSM7X00A) := msm
143 machine-$(CONFIG_ARCH_LOKI) := loki
143 144
144ifeq ($(CONFIG_ARCH_EBSA110),y) 145ifeq ($(CONFIG_ARCH_EBSA110),y)
145# This is what happens if you forget the IOCS16 line. 146# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/mach-loki/Kconfig b/arch/arm/mach-loki/Kconfig
new file mode 100644
index 000000000000..0045bdd761ca
--- /dev/null
+++ b/arch/arm/mach-loki/Kconfig
@@ -0,0 +1,13 @@
1if ARCH_LOKI
2
3menu "Marvell Loki (88RC8480) Implementations"
4
5config MACH_LB88RC8480
6 bool "Marvell LB88RC8480 Development Board"
7 help
8 Say 'Y' here if you want your kernel to support the
9 Marvell LB88RC8480 Development Board.
10
11endmenu
12
13endif
diff --git a/arch/arm/mach-loki/Makefile b/arch/arm/mach-loki/Makefile
new file mode 100644
index 000000000000..d43233ee590f
--- /dev/null
+++ b/arch/arm/mach-loki/Makefile
@@ -0,0 +1,3 @@
1obj-y += common.o addr-map.o irq.o
2
3obj-$(CONFIG_MACH_LB88RC8480) += lb88rc8480-setup.o
diff --git a/arch/arm/mach-loki/Makefile.boot b/arch/arm/mach-loki/Makefile.boot
new file mode 100644
index 000000000000..67039c3e0c48
--- /dev/null
+++ b/arch/arm/mach-loki/Makefile.boot
@@ -0,0 +1,3 @@
1 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-loki/addr-map.c b/arch/arm/mach-loki/addr-map.c
new file mode 100644
index 000000000000..ba25e56ade58
--- /dev/null
+++ b/arch/arm/mach-loki/addr-map.c
@@ -0,0 +1,121 @@
1/*
2 * arch/arm/mach-loki/addr-map.c
3 *
4 * Address map functions for Marvell Loki (88RC8480) SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/mbus.h>
14#include <asm/hardware.h>
15#include <asm/io.h>
16#include "common.h"
17
18/*
19 * Generic Address Decode Windows bit settings
20 */
21#define TARGET_DDR 0
22#define TARGET_DEV_BUS 1
23#define TARGET_PCIE0 3
24#define TARGET_PCIE1 4
25#define ATTR_DEV_BOOT 0x0f
26#define ATTR_DEV_CS2 0x1b
27#define ATTR_DEV_CS1 0x1d
28#define ATTR_DEV_CS0 0x1e
29#define ATTR_PCIE_IO 0x51
30#define ATTR_PCIE_MEM 0x59
31
32/*
33 * Helpers to get DDR bank info
34 */
35#define DDR_SIZE_CS(n) DDR_REG(0x1500 + ((n) << 3))
36#define DDR_BASE_CS(n) DDR_REG(0x1504 + ((n) << 3))
37
38/*
39 * CPU Address Decode Windows registers
40 */
41#define CPU_WIN_CTRL(n) BRIDGE_REG(0x000 | ((n) << 4))
42#define CPU_WIN_BASE(n) BRIDGE_REG(0x004 | ((n) << 4))
43#define CPU_WIN_REMAP_LO(n) BRIDGE_REG(0x008 | ((n) << 4))
44#define CPU_WIN_REMAP_HI(n) BRIDGE_REG(0x00c | ((n) << 4))
45
46
47struct mbus_dram_target_info loki_mbus_dram_info;
48
49static void __init setup_cpu_win(int win, u32 base, u32 size,
50 u8 target, u8 attr, int remap)
51{
52 u32 ctrl;
53
54 base &= 0xffff0000;
55 ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (1 << 5) | target;
56
57 writel(base, CPU_WIN_BASE(win));
58 writel(ctrl, CPU_WIN_CTRL(win));
59 if (win < 2) {
60 if (remap < 0)
61 remap = base;
62
63 writel(remap & 0xffff0000, CPU_WIN_REMAP_LO(win));
64 writel(0, CPU_WIN_REMAP_HI(win));
65 }
66}
67
68void __init loki_setup_cpu_mbus(void)
69{
70 int i;
71 int cs;
72
73 /*
74 * First, disable and clear windows.
75 */
76 for (i = 0; i < 8; i++) {
77 writel(0, CPU_WIN_BASE(i));
78 writel(0, CPU_WIN_CTRL(i));
79 if (i < 2) {
80 writel(0, CPU_WIN_REMAP_LO(i));
81 writel(0, CPU_WIN_REMAP_HI(i));
82 }
83 }
84
85 /*
86 * Setup windows for PCIe IO+MEM space.
87 */
88 setup_cpu_win(2, LOKI_PCIE0_MEM_PHYS_BASE, LOKI_PCIE0_MEM_SIZE,
89 TARGET_PCIE0, ATTR_PCIE_MEM, -1);
90 setup_cpu_win(3, LOKI_PCIE1_MEM_PHYS_BASE, LOKI_PCIE1_MEM_SIZE,
91 TARGET_PCIE1, ATTR_PCIE_MEM, -1);
92
93 /*
94 * Setup MBUS dram target info.
95 */
96 loki_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
97
98 for (i = 0, cs = 0; i < 4; i++) {
99 u32 base = readl(DDR_BASE_CS(i));
100 u32 size = readl(DDR_SIZE_CS(i));
101
102 /*
103 * Chip select enabled?
104 */
105 if (size & 1) {
106 struct mbus_dram_window *w;
107
108 w = &loki_mbus_dram_info.cs[cs++];
109 w->cs_index = i;
110 w->mbus_attr = 0xf & ~(1 << i);
111 w->base = base & 0xffff0000;
112 w->size = (size | 0x0000ffff) + 1;
113 }
114 }
115 loki_mbus_dram_info.num_cs = cs;
116}
117
118void __init loki_setup_dev_boot_win(u32 base, u32 size)
119{
120 setup_cpu_win(4, base, size, TARGET_DEV_BUS, ATTR_DEV_BOOT, -1);
121}
diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c
new file mode 100644
index 000000000000..410f50399dd3
--- /dev/null
+++ b/arch/arm/mach-loki/common.c
@@ -0,0 +1,305 @@
1/*
2 * arch/arm/mach-loki/common.c
3 *
4 * Core functions for Marvell Loki (88RC8480) SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/serial_8250.h>
15#include <linux/mbus.h>
16#include <linux/mv643xx_eth.h>
17#include <asm/page.h>
18#include <asm/timex.h>
19#include <asm/mach/map.h>
20#include <asm/mach/time.h>
21#include <asm/arch/loki.h>
22#include <asm/plat-orion/orion_nand.h>
23#include <asm/plat-orion/time.h>
24#include "common.h"
25
26/*****************************************************************************
27 * I/O Address Mapping
28 ****************************************************************************/
29static struct map_desc loki_io_desc[] __initdata = {
30 {
31 .virtual = LOKI_REGS_VIRT_BASE,
32 .pfn = __phys_to_pfn(LOKI_REGS_PHYS_BASE),
33 .length = LOKI_REGS_SIZE,
34 .type = MT_DEVICE,
35 },
36};
37
38void __init loki_map_io(void)
39{
40 iotable_init(loki_io_desc, ARRAY_SIZE(loki_io_desc));
41}
42
43
44/*****************************************************************************
45 * GE0
46 ****************************************************************************/
47struct mv643xx_eth_shared_platform_data loki_ge0_shared_data = {
48 .t_clk = LOKI_TCLK,
49 .dram = &loki_mbus_dram_info,
50};
51
52static struct resource loki_ge0_shared_resources[] = {
53 {
54 .name = "ge0 base",
55 .start = GE0_PHYS_BASE + 0x2000,
56 .end = GE0_PHYS_BASE + 0x3fff,
57 .flags = IORESOURCE_MEM,
58 },
59};
60
61static struct platform_device loki_ge0_shared = {
62 .name = MV643XX_ETH_SHARED_NAME,
63 .id = 0,
64 .dev = {
65 .platform_data = &loki_ge0_shared_data,
66 },
67 .num_resources = 1,
68 .resource = loki_ge0_shared_resources,
69};
70
71static struct resource loki_ge0_resources[] = {
72 {
73 .name = "ge0 irq",
74 .start = IRQ_LOKI_GBE_A_INT,
75 .end = IRQ_LOKI_GBE_A_INT,
76 .flags = IORESOURCE_IRQ,
77 },
78};
79
80static struct platform_device loki_ge0 = {
81 .name = MV643XX_ETH_NAME,
82 .id = 0,
83 .num_resources = 1,
84 .resource = loki_ge0_resources,
85};
86
87void __init loki_ge0_init(struct mv643xx_eth_platform_data *eth_data)
88{
89 eth_data->shared = &loki_ge0_shared;
90 loki_ge0.dev.platform_data = eth_data;
91
92 writel(0x00079220, GE0_VIRT_BASE + 0x20b0);
93 platform_device_register(&loki_ge0_shared);
94 platform_device_register(&loki_ge0);
95}
96
97
98/*****************************************************************************
99 * GE1
100 ****************************************************************************/
101struct mv643xx_eth_shared_platform_data loki_ge1_shared_data = {
102 .t_clk = LOKI_TCLK,
103 .dram = &loki_mbus_dram_info,
104};
105
106static struct resource loki_ge1_shared_resources[] = {
107 {
108 .name = "ge1 base",
109 .start = GE1_PHYS_BASE + 0x2000,
110 .end = GE1_PHYS_BASE + 0x3fff,
111 .flags = IORESOURCE_MEM,
112 },
113};
114
115static struct platform_device loki_ge1_shared = {
116 .name = MV643XX_ETH_SHARED_NAME,
117 .id = 1,
118 .dev = {
119 .platform_data = &loki_ge1_shared_data,
120 },
121 .num_resources = 1,
122 .resource = loki_ge1_shared_resources,
123};
124
125static struct resource loki_ge1_resources[] = {
126 {
127 .name = "ge1 irq",
128 .start = IRQ_LOKI_GBE_B_INT,
129 .end = IRQ_LOKI_GBE_B_INT,
130 .flags = IORESOURCE_IRQ,
131 },
132};
133
134static struct platform_device loki_ge1 = {
135 .name = MV643XX_ETH_NAME,
136 .id = 1,
137 .num_resources = 1,
138 .resource = loki_ge1_resources,
139};
140
141void __init loki_ge1_init(struct mv643xx_eth_platform_data *eth_data)
142{
143 eth_data->shared = &loki_ge1_shared;
144 loki_ge1.dev.platform_data = eth_data;
145
146 writel(0x00079220, GE1_VIRT_BASE + 0x20b0);
147 platform_device_register(&loki_ge1_shared);
148 platform_device_register(&loki_ge1);
149}
150
151
152/*****************************************************************************
153 * SAS/SATA
154 ****************************************************************************/
155static struct resource loki_sas_resources[] = {
156 {
157 .name = "mvsas0 mem",
158 .start = SAS0_PHYS_BASE,
159 .end = SAS0_PHYS_BASE + 0x01ff,
160 .flags = IORESOURCE_MEM,
161 }, {
162 .name = "mvsas0 irq",
163 .start = IRQ_LOKI_SAS_A,
164 .end = IRQ_LOKI_SAS_A,
165 .flags = IORESOURCE_IRQ,
166 }, {
167 .name = "mvsas1 mem",
168 .start = SAS1_PHYS_BASE,
169 .end = SAS1_PHYS_BASE + 0x01ff,
170 .flags = IORESOURCE_MEM,
171 }, {
172 .name = "mvsas1 irq",
173 .start = IRQ_LOKI_SAS_B,
174 .end = IRQ_LOKI_SAS_B,
175 .flags = IORESOURCE_IRQ,
176 },
177};
178
179static struct platform_device loki_sas = {
180 .name = "mvsas",
181 .id = 0,
182 .dev = {
183 .coherent_dma_mask = 0xffffffff,
184 },
185 .num_resources = ARRAY_SIZE(loki_sas_resources),
186 .resource = loki_sas_resources,
187};
188
189void __init loki_sas_init(void)
190{
191 writel(0x8300f707, DDR_REG(0x1424));
192 platform_device_register(&loki_sas);
193}
194
195
196/*****************************************************************************
197 * UART0
198 ****************************************************************************/
199static struct plat_serial8250_port loki_uart0_data[] = {
200 {
201 .mapbase = UART0_PHYS_BASE,
202 .membase = (char *)UART0_VIRT_BASE,
203 .irq = IRQ_LOKI_UART0,
204 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
205 .iotype = UPIO_MEM,
206 .regshift = 2,
207 .uartclk = LOKI_TCLK,
208 }, {
209 },
210};
211
212static struct resource loki_uart0_resources[] = {
213 {
214 .start = UART0_PHYS_BASE,
215 .end = UART0_PHYS_BASE + 0xff,
216 .flags = IORESOURCE_MEM,
217 }, {
218 .start = IRQ_LOKI_UART0,
219 .end = IRQ_LOKI_UART0,
220 .flags = IORESOURCE_IRQ,
221 },
222};
223
224static struct platform_device loki_uart0 = {
225 .name = "serial8250",
226 .id = 0,
227 .dev = {
228 .platform_data = loki_uart0_data,
229 },
230 .resource = loki_uart0_resources,
231 .num_resources = ARRAY_SIZE(loki_uart0_resources),
232};
233
234void __init loki_uart0_init(void)
235{
236 platform_device_register(&loki_uart0);
237}
238
239
240/*****************************************************************************
241 * UART1
242 ****************************************************************************/
243static struct plat_serial8250_port loki_uart1_data[] = {
244 {
245 .mapbase = UART1_PHYS_BASE,
246 .membase = (char *)UART1_VIRT_BASE,
247 .irq = IRQ_LOKI_UART1,
248 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
249 .iotype = UPIO_MEM,
250 .regshift = 2,
251 .uartclk = LOKI_TCLK,
252 }, {
253 },
254};
255
256static struct resource loki_uart1_resources[] = {
257 {
258 .start = UART1_PHYS_BASE,
259 .end = UART1_PHYS_BASE + 0xff,
260 .flags = IORESOURCE_MEM,
261 }, {
262 .start = IRQ_LOKI_UART1,
263 .end = IRQ_LOKI_UART1,
264 .flags = IORESOURCE_IRQ,
265 },
266};
267
268static struct platform_device loki_uart1 = {
269 .name = "serial8250",
270 .id = 1,
271 .dev = {
272 .platform_data = loki_uart1_data,
273 },
274 .resource = loki_uart1_resources,
275 .num_resources = ARRAY_SIZE(loki_uart1_resources),
276};
277
278void __init loki_uart1_init(void)
279{
280 platform_device_register(&loki_uart1);
281}
282
283
284/*****************************************************************************
285 * Time handling
286 ****************************************************************************/
287static void loki_timer_init(void)
288{
289 orion_time_init(IRQ_LOKI_BRIDGE, LOKI_TCLK);
290}
291
292struct sys_timer loki_timer = {
293 .init = loki_timer_init,
294};
295
296
297/*****************************************************************************
298 * General
299 ****************************************************************************/
300void __init loki_init(void)
301{
302 printk(KERN_INFO "Loki ID: 88RC8480. TCLK=%d.\n", LOKI_TCLK);
303
304 loki_setup_cpu_mbus();
305}
diff --git a/arch/arm/mach-loki/common.h b/arch/arm/mach-loki/common.h
new file mode 100644
index 000000000000..26054fd0f05e
--- /dev/null
+++ b/arch/arm/mach-loki/common.h
@@ -0,0 +1,36 @@
1/*
2 * arch/arm/mach-loki/common.h
3 *
4 * Core functions for Marvell Loki (88RC8480) SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ARCH_LOKI_COMMON_H
12#define __ARCH_LOKI_COMMON_H
13
14struct mv643xx_eth_platform_data;
15
16/*
17 * Basic Loki init functions used early by machine-setup.
18 */
19void loki_map_io(void);
20void loki_init(void);
21void loki_init_irq(void);
22
23extern struct mbus_dram_target_info loki_mbus_dram_info;
24void loki_setup_cpu_mbus(void);
25void loki_setup_dev_boot_win(u32 base, u32 size);
26
27void loki_ge0_init(struct mv643xx_eth_platform_data *eth_data);
28void loki_ge1_init(struct mv643xx_eth_platform_data *eth_data);
29void loki_sas_init(void);
30void loki_uart0_init(void);
31void loki_uart1_init(void);
32
33extern struct sys_timer loki_timer;
34
35
36#endif
diff --git a/arch/arm/mach-loki/irq.c b/arch/arm/mach-loki/irq.c
new file mode 100644
index 000000000000..d839af91fe03
--- /dev/null
+++ b/arch/arm/mach-loki/irq.c
@@ -0,0 +1,21 @@
1/*
2 * arch/arm/mach-loki/irq.c
3 *
4 * Marvell Loki (88RC8480) IRQ handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <asm/io.h>
15#include <asm/plat-orion/irq.h>
16#include "common.h"
17
18void __init loki_init_irq(void)
19{
20 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_OFF));
21}
diff --git a/arch/arm/mach-loki/lb88rc8480-setup.c b/arch/arm/mach-loki/lb88rc8480-setup.c
new file mode 100644
index 000000000000..d1b9e6e6253a
--- /dev/null
+++ b/arch/arm/mach-loki/lb88rc8480-setup.c
@@ -0,0 +1,100 @@
1/*
2 * arch/arm/mach-loki/lb88rc8480-setup.c
3 *
4 * Marvell LB88RC8480 Development Board Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/irq.h>
15#include <linux/mtd/physmap.h>
16#include <linux/mtd/nand.h>
17#include <linux/timer.h>
18#include <linux/ata_platform.h>
19#include <linux/mv643xx_eth.h>
20#include <asm/mach-types.h>
21#include <asm/mach/arch.h>
22#include <asm/arch/loki.h>
23#include "common.h"
24
25#define LB88RC8480_FLASH_BOOT_CS_BASE 0xf8000000
26#define LB88RC8480_FLASH_BOOT_CS_SIZE SZ_128M
27
28#define LB88RC8480_NOR_BOOT_BASE 0xff000000
29#define LB88RC8480_NOR_BOOT_SIZE SZ_16M
30
31static struct mtd_partition lb88rc8480_boot_flash_parts[] = {
32 {
33 .name = "kernel",
34 .offset = 0,
35 .size = SZ_2M,
36 }, {
37 .name = "root-fs",
38 .offset = SZ_2M,
39 .size = (SZ_8M + SZ_4M + SZ_1M),
40 }, {
41 .name = "u-boot",
42 .offset = (SZ_8M + SZ_4M + SZ_2M + SZ_1M),
43 .size = SZ_1M,
44 },
45};
46
47static struct physmap_flash_data lb88rc8480_boot_flash_data = {
48 .parts = lb88rc8480_boot_flash_parts,
49 .nr_parts = ARRAY_SIZE(lb88rc8480_boot_flash_parts),
50 .width = 1, /* 8 bit bus width */
51};
52
53static struct resource lb88rc8480_boot_flash_resource = {
54 .flags = IORESOURCE_MEM,
55 .start = LB88RC8480_NOR_BOOT_BASE,
56 .end = LB88RC8480_NOR_BOOT_BASE + LB88RC8480_NOR_BOOT_SIZE - 1,
57};
58
59static struct platform_device lb88rc8480_boot_flash = {
60 .name = "physmap-flash",
61 .id = 0,
62 .dev = {
63 .platform_data = &lb88rc8480_boot_flash_data,
64 },
65 .num_resources = 1,
66 .resource = &lb88rc8480_boot_flash_resource,
67};
68
69static struct mv643xx_eth_platform_data lb88rc8480_ge0_data = {
70 .phy_addr = 1,
71 .mac_addr = { 0x00, 0x50, 0x43, 0x11, 0x22, 0x33 },
72};
73
74static void __init lb88rc8480_init(void)
75{
76 /*
77 * Basic setup. Needs to be called early.
78 */
79 loki_init();
80
81 loki_ge0_init(&lb88rc8480_ge0_data);
82 loki_sas_init();
83 loki_uart0_init();
84 loki_uart1_init();
85
86 loki_setup_dev_boot_win(LB88RC8480_FLASH_BOOT_CS_BASE,
87 LB88RC8480_FLASH_BOOT_CS_SIZE);
88 platform_device_register(&lb88rc8480_boot_flash);
89}
90
91MACHINE_START(LB88RC8480, "Marvell LB88RC8480 Development Board")
92 /* Maintainer: Ke Wei <kewei@marvell.com> */
93 .phys_io = LOKI_REGS_PHYS_BASE,
94 .io_pg_offst = ((LOKI_REGS_VIRT_BASE) >> 18) & 0xfffc,
95 .boot_params = 0x00000100,
96 .init_machine = lb88rc8480_init,
97 .map_io = loki_map_io,
98 .init_irq = loki_init_irq,
99 .timer = &loki_timer,
100MACHINE_END
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 33ed048502a3..08ca264459bd 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -365,7 +365,7 @@ config CPU_XSC3
365# Feroceon 365# Feroceon
366config CPU_FEROCEON 366config CPU_FEROCEON
367 bool 367 bool
368 depends on ARCH_ORION5X 368 depends on ARCH_ORION5X || ARCH_LOKI
369 default y 369 default y
370 select CPU_32v5 370 select CPU_32v5
371 select CPU_ABRT_EV5T 371 select CPU_ABRT_EV5T
diff --git a/include/asm-arm/arch-loki/debug-macro.S b/include/asm-arm/arch-loki/debug-macro.S
new file mode 100644
index 000000000000..585502e96513
--- /dev/null
+++ b/include/asm-arm/arch-loki/debug-macro.S
@@ -0,0 +1,20 @@
1/*
2 * include/asm-arm/arch-loki/debug-macro.S
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7*/
8
9#include <asm/arch/loki.h>
10
11 .macro addruart,rx
12 mrc p15, 0, \rx, c1, c0
13 tst \rx, #1 @ MMU enabled?
14 ldreq \rx, =LOKI_REGS_PHYS_BASE
15 ldrne \rx, =LOKI_REGS_VIRT_BASE
16 orr \rx, \rx, #0x00012000
17 .endm
18
19#define UART_SHIFT 2
20#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-loki/dma.h b/include/asm-arm/arch-loki/dma.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/include/asm-arm/arch-loki/dma.h
@@ -0,0 +1 @@
/* empty */
diff --git a/include/asm-arm/arch-loki/entry-macro.S b/include/asm-arm/arch-loki/entry-macro.S
new file mode 100644
index 000000000000..693257cdbeb8
--- /dev/null
+++ b/include/asm-arm/arch-loki/entry-macro.S
@@ -0,0 +1,30 @@
1/*
2 * include/asm-arm/arch-loki/entry-macro.S
3 *
4 * Low-level IRQ helper macros for Marvell Loki (88RC8480) platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/arch/loki.h>
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
18
19 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =IRQ_VIRT_BASE
21 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \irqstat, [\base, #IRQ_CAUSE_OFF]
25 ldr \tmp, [\base, #IRQ_MASK_OFF]
26 mov \irqnr, #0
27 ands \irqstat, \irqstat, \tmp
28 clzne \irqnr, \irqstat
29 rsbne \irqnr, \irqnr, #31
30 .endm
diff --git a/include/asm-arm/arch-loki/hardware.h b/include/asm-arm/arch-loki/hardware.h
new file mode 100644
index 000000000000..f65b01c733b6
--- /dev/null
+++ b/include/asm-arm/arch-loki/hardware.h
@@ -0,0 +1,15 @@
1/*
2 * include/asm-arm/arch-loki/hardware.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_ARCH_HARDWARE_H
10#define __ASM_ARCH_HARDWARE_H
11
12#include "loki.h"
13
14
15#endif
diff --git a/include/asm-arm/arch-loki/io.h b/include/asm-arm/arch-loki/io.h
new file mode 100644
index 000000000000..e7418a915e75
--- /dev/null
+++ b/include/asm-arm/arch-loki/io.h
@@ -0,0 +1,26 @@
1/*
2 * include/asm-arm/arch-loki/io.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_IO_H
10#define __ASM_ARCH_IO_H
11
12#include "loki.h"
13
14#define IO_SPACE_LIMIT 0xffffffff
15
16static inline void __iomem *__io(unsigned long addr)
17{
18 return (void __iomem *)((addr - LOKI_PCIE0_IO_PHYS_BASE)
19 + LOKI_PCIE0_IO_VIRT_BASE);
20}
21
22#define __io(a) __io(a)
23#define __mem_pci(a) (a)
24
25
26#endif
diff --git a/include/asm-arm/arch-loki/irqs.h b/include/asm-arm/arch-loki/irqs.h
new file mode 100644
index 000000000000..7e4971438072
--- /dev/null
+++ b/include/asm-arm/arch-loki/irqs.h
@@ -0,0 +1,58 @@
1/*
2 * include/asm-arm/arch-loki/irqs.h
3 *
4 * IRQ definitions for Marvell Loki (88RC8480) SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H
13
14#include "loki.h" /* need GPIO_MAX */
15
16/*
17 * Interrupt Controller
18 */
19#define IRQ_LOKI_PCIE_A_CPU_DRBL 0
20#define IRQ_LOKI_CPU_PCIE_A_DRBL 1
21#define IRQ_LOKI_PCIE_B_CPU_DRBL 2
22#define IRQ_LOKI_CPU_PCIE_B_DRBL 3
23#define IRQ_LOKI_COM_A_ERR 6
24#define IRQ_LOKI_COM_A_IN 7
25#define IRQ_LOKI_COM_A_OUT 8
26#define IRQ_LOKI_COM_B_ERR 9
27#define IRQ_LOKI_COM_B_IN 10
28#define IRQ_LOKI_COM_B_OUT 11
29#define IRQ_LOKI_DMA_A 12
30#define IRQ_LOKI_DMA_B 13
31#define IRQ_LOKI_SAS_A 14
32#define IRQ_LOKI_SAS_B 15
33#define IRQ_LOKI_DDR 16
34#define IRQ_LOKI_XOR 17
35#define IRQ_LOKI_BRIDGE 18
36#define IRQ_LOKI_PCIE_A_ERR 20
37#define IRQ_LOKI_PCIE_A_INT 21
38#define IRQ_LOKI_PCIE_B_ERR 22
39#define IRQ_LOKI_PCIE_B_INT 23
40#define IRQ_LOKI_GBE_A_INT 24
41#define IRQ_LOKI_GBE_B_INT 25
42#define IRQ_LOKI_DEV_ERR 26
43#define IRQ_LOKI_UART0 27
44#define IRQ_LOKI_UART1 28
45#define IRQ_LOKI_TWSI 29
46#define IRQ_LOKI_GPIO_23_0 30
47#define IRQ_LOKI_GPIO_25_24 31
48
49/*
50 * Loki General Purpose Pins
51 */
52#define IRQ_LOKI_GPIO_START 32
53#define NR_GPIO_IRQS GPIO_MAX
54
55#define NR_IRQS (IRQ_LOKI_GPIO_START + NR_GPIO_IRQS)
56
57
58#endif
diff --git a/include/asm-arm/arch-loki/loki.h b/include/asm-arm/arch-loki/loki.h
new file mode 100644
index 000000000000..5dd05ee0a4e6
--- /dev/null
+++ b/include/asm-arm/arch-loki/loki.h
@@ -0,0 +1,97 @@
1/*
2 * include/asm-arm/arch-loki/loki.h
3 *
4 * Generic definitions for Marvell Loki (88RC8480) SoC flavors
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_LOKI_H
12#define __ASM_ARCH_LOKI_H
13
14/*
15 * Marvell Loki (88RC8480) address maps.
16 *
17 * phys
18 * d0000000 on-chip peripheral registers
19 * e0000000 PCIe 0 Memory space
20 * e8000000 PCIe 1 Memory space
21 * f0000000 PCIe 0 I/O space
22 * f0100000 PCIe 1 I/O space
23 *
24 * virt phys size
25 * fed00000 d0000000 1M on-chip peripheral registers
26 * fee00000 f0000000 64K PCIe 0 I/O space
27 * fef00000 f0100000 64K PCIe 1 I/O space
28 */
29
30#define LOKI_REGS_PHYS_BASE 0xd0000000
31#define LOKI_REGS_VIRT_BASE 0xfed00000
32#define LOKI_REGS_SIZE SZ_1M
33
34#define LOKI_PCIE0_IO_PHYS_BASE 0xf0000000
35#define LOKI_PCIE0_IO_VIRT_BASE 0xfee00000
36#define LOKI_PCIE0_IO_BUS_BASE 0x00000000
37#define LOKI_PCIE0_IO_SIZE SZ_64K
38
39#define LOKI_PCIE1_IO_PHYS_BASE 0xf0100000
40#define LOKI_PCIE1_IO_VIRT_BASE 0xfef00000
41#define LOKI_PCIE1_IO_BUS_BASE 0x00000000
42#define LOKI_PCIE1_IO_SIZE SZ_64K
43
44#define LOKI_PCIE0_MEM_PHYS_BASE 0xe0000000
45#define LOKI_PCIE0_MEM_SIZE SZ_128M
46
47#define LOKI_PCIE1_MEM_PHYS_BASE 0xe8000000
48#define LOKI_PCIE1_MEM_SIZE SZ_128M
49
50/*
51 * Register Map
52 */
53#define DEV_BUS_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0x10000)
54#define DEV_BUS_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x10000)
55#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000)
56#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000)
57#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100)
58#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)
59
60#define BRIDGE_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x20000)
61#define BRIDGE_REG(x) (BRIDGE_VIRT_BASE | (x))
62#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
63#define SOFT_RESET_OUT_EN 0x00000004
64#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
65#define SOFT_RESET 0x00000001
66#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
67#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
68#define BRIDGE_INT_TIMER0 0x0002
69#define BRIDGE_INT_TIMER1 0x0004
70#define BRIDGE_INT_TIMER1_CLR 0x0004
71#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
72#define IRQ_CAUSE_OFF 0x0000
73#define IRQ_MASK_OFF 0x0004
74#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
75
76#define PCIE0_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x30000)
77
78#define PCIE1_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x40000)
79
80#define SAS0_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0x80000)
81
82#define SAS1_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0x90000)
83
84#define GE0_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0xa0000)
85#define GE0_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0xa0000)
86
87#define GE1_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0xb0000)
88#define GE1_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0xb0000)
89
90#define DDR_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0xf0000)
91#define DDR_REG(x) (DDR_VIRT_BASE | (x))
92
93
94#define GPIO_MAX 8
95
96
97#endif
diff --git a/include/asm-arm/arch-loki/memory.h b/include/asm-arm/arch-loki/memory.h
new file mode 100644
index 000000000000..835101e49875
--- /dev/null
+++ b/include/asm-arm/arch-loki/memory.h
@@ -0,0 +1,14 @@
1/*
2 * include/asm-arm/arch-loki/memory.h
3 */
4
5#ifndef __ASM_ARCH_MEMORY_H
6#define __ASM_ARCH_MEMORY_H
7
8#define PHYS_OFFSET UL(0x00000000)
9
10#define __virt_to_bus(x) __virt_to_phys(x)
11#define __bus_to_virt(x) __phys_to_virt(x)
12
13
14#endif
diff --git a/include/asm-arm/arch-loki/system.h b/include/asm-arm/arch-loki/system.h
new file mode 100644
index 000000000000..a3568ac8ec35
--- /dev/null
+++ b/include/asm-arm/arch-loki/system.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-arm/arch-loki/system.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H
11
12#include <asm/arch/hardware.h>
13#include <asm/arch/loki.h>
14
15static inline void arch_idle(void)
16{
17 cpu_do_idle();
18}
19
20static inline void arch_reset(char mode)
21{
22 /*
23 * Enable soft reset to assert RSTOUTn.
24 */
25 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
26
27 /*
28 * Assert soft reset.
29 */
30 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
31
32 while (1)
33 ;
34}
35
36
37#endif
diff --git a/include/asm-arm/arch-loki/timex.h b/include/asm-arm/arch-loki/timex.h
new file mode 100644
index 000000000000..940014f97cae
--- /dev/null
+++ b/include/asm-arm/arch-loki/timex.h
@@ -0,0 +1,11 @@
1/*
2 * include/asm-arm/arch-loki/timex.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#define CLOCK_TICK_RATE (100 * HZ)
10
11#define LOKI_TCLK 180000000
diff --git a/include/asm-arm/arch-loki/uncompress.h b/include/asm-arm/arch-loki/uncompress.h
new file mode 100644
index 000000000000..89a0cf88d3a5
--- /dev/null
+++ b/include/asm-arm/arch-loki/uncompress.h
@@ -0,0 +1,47 @@
1/*
2 * include/asm-arm/arch-loki/uncompress.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#include <linux/serial_reg.h>
10#include <asm/arch/loki.h>
11
12#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE)
13
14static void putc(const char c)
15{
16 unsigned char *base = SERIAL_BASE;
17 int i;
18
19 for (i = 0; i < 0x1000; i++) {
20 if (base[UART_LSR << 2] & UART_LSR_THRE)
21 break;
22 barrier();
23 }
24
25 base[UART_TX << 2] = c;
26}
27
28static void flush(void)
29{
30 unsigned char *base = SERIAL_BASE;
31 unsigned char mask;
32 int i;
33
34 mask = UART_LSR_TEMT | UART_LSR_THRE;
35
36 for (i = 0; i < 0x1000; i++) {
37 if ((base[UART_LSR << 2] & mask) == mask)
38 break;
39 barrier();
40 }
41}
42
43/*
44 * nothing to do
45 */
46#define arch_decomp_setup()
47#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-loki/vmalloc.h b/include/asm-arm/arch-loki/vmalloc.h
new file mode 100644
index 000000000000..f5be06220491
--- /dev/null
+++ b/include/asm-arm/arch-loki/vmalloc.h
@@ -0,0 +1,5 @@
1/*
2 * include/asm-arm/arch-loki/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe800000
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 21:37:16 -0500