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authorViresh Kumar <viresh.kumar@st.com>2011-03-03 05:17:23 -0500
committerVinod Koul <vinod.koul@intel.com>2011-03-06 14:42:28 -0500
commit59c22fc11d12b69da36c6585a38229863ba0bb16 (patch)
tree9c39bb6032e724142d6f7de643149f5858ac7a11
parent93317e8e35b77633d589fe0e132291195757d785 (diff)
dw_dmac: Changing type of src_master and dest_master to u8.
src_master & dest_master don't required u32 as they have values limited to u8 only. Also their description is missing from doc style comment. This patch fixes above mentioned issues. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r--include/linux/dw_dmac.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index 64c76da571ef..3ba2f066ff46 100644
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -53,6 +53,8 @@ enum dw_dma_slave_width {
53 * @reg_width: peripheral register width 53 * @reg_width: peripheral register width
54 * @cfg_hi: Platform-specific initializer for the CFG_HI register 54 * @cfg_hi: Platform-specific initializer for the CFG_HI register
55 * @cfg_lo: Platform-specific initializer for the CFG_LO register 55 * @cfg_lo: Platform-specific initializer for the CFG_LO register
56 * @src_master: src master for transfers on allocated channel.
57 * @dst_master: dest master for transfers on allocated channel.
56 */ 58 */
57struct dw_dma_slave { 59struct dw_dma_slave {
58 struct device *dma_dev; 60 struct device *dma_dev;
@@ -61,8 +63,8 @@ struct dw_dma_slave {
61 enum dw_dma_slave_width reg_width; 63 enum dw_dma_slave_width reg_width;
62 u32 cfg_hi; 64 u32 cfg_hi;
63 u32 cfg_lo; 65 u32 cfg_lo;
64 int src_master; 66 u8 src_master;
65 int dst_master; 67 u8 dst_master;
66}; 68};
67 69
68/* Platform-configurable bits in CFG_HI */ 70/* Platform-configurable bits in CFG_HI */