diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 12:06:36 -0500 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 12:06:36 -0500 |
commit | 421b759b86eb8a914cbbd11f6d09a74f411762c6 (patch) | |
tree | 505ca7f23987d8eaaa519a7e8506b854e2c0d030 | |
parent | e067096c8d57d191f29d734cd5692695c95cc36e (diff) | |
parent | a07613a54d700a974f3a4a657da78ef5d097315d (diff) |
Merge branch 'samsung/cleanup' into next/boards
Conflicts:
arch/arm/mach-imx/mach-imx6q.c
arch/arm/mach-omap2/board-ti8168evm.c
arch/arm/mach-s3c64xx/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/common.c
Lots of relatively simple conflicts between the board
changes and stuff from the arm tree. This pulls in
the resolution from the samsung/cleanup tree, so we
don't get conflicting merges.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1104 files changed, 12816 insertions, 12914 deletions
diff --git a/Documentation/devicetree/bindings/arm/insignal-boards.txt b/Documentation/devicetree/bindings/arm/insignal-boards.txt new file mode 100644 index 000000000000..524c3dc5d808 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/insignal-boards.txt | |||
@@ -0,0 +1,8 @@ | |||
1 | * Insignal's Exynos4210 based Origen evaluation board | ||
2 | |||
3 | Origen low-cost evaluation board is based on Samsung's Exynos4210 SoC. | ||
4 | |||
5 | Required root node properties: | ||
6 | - compatible = should be one or more of the following. | ||
7 | (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board. | ||
8 | (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC. | ||
diff --git a/Documentation/devicetree/bindings/arm/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung-boards.txt new file mode 100644 index 000000000000..0bf68be56fd1 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/samsung-boards.txt | |||
@@ -0,0 +1,8 @@ | |||
1 | * Samsung's Exynos4210 based SMDKV310 evaluation board | ||
2 | |||
3 | SMDKV310 evaluation board is based on Samsung's Exynos4210 SoC. | ||
4 | |||
5 | Required root node properties: | ||
6 | - compatible = should be one or more of the following. | ||
7 | (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board. | ||
8 | (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC. | ||
diff --git a/Documentation/devicetree/bindings/dma/arm-pl330.txt b/Documentation/devicetree/bindings/dma/arm-pl330.txt new file mode 100644 index 000000000000..a4cd273b2a67 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/arm-pl330.txt | |||
@@ -0,0 +1,30 @@ | |||
1 | * ARM PrimeCell PL330 DMA Controller | ||
2 | |||
3 | The ARM PrimeCell PL330 DMA controller can move blocks of memory contents | ||
4 | between memory and peripherals or memory to memory. | ||
5 | |||
6 | Required properties: | ||
7 | - compatible: should include both "arm,pl330" and "arm,primecell". | ||
8 | - reg: physical base address of the controller and length of memory mapped | ||
9 | region. | ||
10 | - interrupts: interrupt number to the cpu. | ||
11 | |||
12 | Example: | ||
13 | |||
14 | pdma0: pdma@12680000 { | ||
15 | compatible = "arm,pl330", "arm,primecell"; | ||
16 | reg = <0x12680000 0x1000>; | ||
17 | interrupts = <99>; | ||
18 | }; | ||
19 | |||
20 | Client drivers (device nodes requiring dma transfers from dev-to-mem or | ||
21 | mem-to-dev) should specify the DMA channel numbers using a two-value pair | ||
22 | as shown below. | ||
23 | |||
24 | [property name] = <[phandle of the dma controller] [dma request id]>; | ||
25 | |||
26 | where 'dma request id' is the dma request number which is connected | ||
27 | to the client controller. The 'property name' is recommended to be | ||
28 | of the form <name>-dma-channel. | ||
29 | |||
30 | Example: tx-dma-channel = <&pdma0 12>; | ||
diff --git a/Documentation/devicetree/bindings/gpio/gpio-samsung.txt b/Documentation/devicetree/bindings/gpio/gpio-samsung.txt new file mode 100644 index 000000000000..8f50fe5e6c42 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-samsung.txt | |||
@@ -0,0 +1,40 @@ | |||
1 | Samsung Exynos4 GPIO Controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: Compatible property value should be "samsung,exynos4-gpio>". | ||
5 | |||
6 | - reg: Physical base address of the controller and length of memory mapped | ||
7 | region. | ||
8 | |||
9 | - #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes | ||
10 | should be the following with values derived from the SoC user manual. | ||
11 | <[phandle of the gpio controller node] | ||
12 | [pin number within the gpio controller] | ||
13 | [mux function] | ||
14 | [pull up/down] | ||
15 | [drive strength]> | ||
16 | |||
17 | Values for gpio specifier: | ||
18 | - Pin number: is a value between 0 to 7. | ||
19 | - Pull Up/Down: 0 - Pull Up/Down Disabled. | ||
20 | 1 - Pull Down Enabled. | ||
21 | 3 - Pull Up Enabled. | ||
22 | - Drive Strength: 0 - 1x, | ||
23 | 1 - 3x, | ||
24 | 2 - 2x, | ||
25 | 3 - 4x | ||
26 | |||
27 | - gpio-controller: Specifies that the node is a gpio controller. | ||
28 | - #address-cells: should be 1. | ||
29 | - #size-cells: should be 1. | ||
30 | |||
31 | Example: | ||
32 | |||
33 | gpa0: gpio-controller@11400000 { | ||
34 | #address-cells = <1>; | ||
35 | #size-cells = <1>; | ||
36 | compatible = "samsung,exynos4-gpio"; | ||
37 | reg = <0x11400000 0x20>; | ||
38 | #gpio-cells = <4>; | ||
39 | gpio-controller; | ||
40 | }; | ||
diff --git a/Documentation/devicetree/bindings/input/samsung-keypad.txt b/Documentation/devicetree/bindings/input/samsung-keypad.txt new file mode 100644 index 000000000000..ce3e394c0e64 --- /dev/null +++ b/Documentation/devicetree/bindings/input/samsung-keypad.txt | |||
@@ -0,0 +1,88 @@ | |||
1 | * Samsung's Keypad Controller device tree bindings | ||
2 | |||
3 | Samsung's Keypad controller is used to interface a SoC with a matrix-type | ||
4 | keypad device. The keypad controller supports multiple row and column lines. | ||
5 | A key can be placed at each intersection of a unique row and a unique column. | ||
6 | The keypad controller can sense a key-press and key-release and report the | ||
7 | event using a interrupt to the cpu. | ||
8 | |||
9 | Required SoC Specific Properties: | ||
10 | - compatible: should be one of the following | ||
11 | - "samsung,s3c6410-keypad": For controllers compatible with s3c6410 keypad | ||
12 | controller. | ||
13 | - "samsung,s5pv210-keypad": For controllers compatible with s5pv210 keypad | ||
14 | controller. | ||
15 | |||
16 | - reg: physical base address of the controller and length of memory mapped | ||
17 | region. | ||
18 | |||
19 | - interrupts: The interrupt number to the cpu. | ||
20 | |||
21 | Required Board Specific Properties: | ||
22 | - samsung,keypad-num-rows: Number of row lines connected to the keypad | ||
23 | controller. | ||
24 | |||
25 | - samsung,keypad-num-columns: Number of column lines connected to the | ||
26 | keypad controller. | ||
27 | |||
28 | - row-gpios: List of gpios used as row lines. The gpio specifier for | ||
29 | this property depends on the gpio controller to which these row lines | ||
30 | are connected. | ||
31 | |||
32 | - col-gpios: List of gpios used as column lines. The gpio specifier for | ||
33 | this property depends on the gpio controller to which these column | ||
34 | lines are connected. | ||
35 | |||
36 | - Keys represented as child nodes: Each key connected to the keypad | ||
37 | controller is represented as a child node to the keypad controller | ||
38 | device node and should include the following properties. | ||
39 | - keypad,row: the row number to which the key is connected. | ||
40 | - keypad,column: the column number to which the key is connected. | ||
41 | - linux,code: the key-code to be reported when the key is pressed | ||
42 | and released. | ||
43 | |||
44 | Optional Properties specific to linux: | ||
45 | - linux,keypad-no-autorepeat: do no enable autorepeat feature. | ||
46 | - linux,keypad-wakeup: use any event on keypad as wakeup event. | ||
47 | |||
48 | |||
49 | Example: | ||
50 | keypad@100A0000 { | ||
51 | compatible = "samsung,s5pv210-keypad"; | ||
52 | reg = <0x100A0000 0x100>; | ||
53 | interrupts = <173>; | ||
54 | samsung,keypad-num-rows = <2>; | ||
55 | samsung,keypad-num-columns = <8>; | ||
56 | linux,input-no-autorepeat; | ||
57 | linux,input-wakeup; | ||
58 | |||
59 | row-gpios = <&gpx2 0 3 3 0 | ||
60 | &gpx2 1 3 3 0>; | ||
61 | |||
62 | col-gpios = <&gpx1 0 3 0 0 | ||
63 | &gpx1 1 3 0 0 | ||
64 | &gpx1 2 3 0 0 | ||
65 | &gpx1 3 3 0 0 | ||
66 | &gpx1 4 3 0 0 | ||
67 | &gpx1 5 3 0 0 | ||
68 | &gpx1 6 3 0 0 | ||
69 | &gpx1 7 3 0 0>; | ||
70 | |||
71 | key_1 { | ||
72 | keypad,row = <0>; | ||
73 | keypad,column = <3>; | ||
74 | linux,code = <2>; | ||
75 | }; | ||
76 | |||
77 | key_2 { | ||
78 | keypad,row = <0>; | ||
79 | keypad,column = <4>; | ||
80 | linux,code = <3>; | ||
81 | }; | ||
82 | |||
83 | key_3 { | ||
84 | keypad,row = <0>; | ||
85 | keypad,column = <5>; | ||
86 | linux,code = <4>; | ||
87 | }; | ||
88 | }; | ||
diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt new file mode 100644 index 000000000000..90ec45fd33ec --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt | |||
@@ -0,0 +1,20 @@ | |||
1 | * Samsung's S3C Real Time Clock controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: should be one of the following. | ||
5 | * "samsung,s3c2410-rtc" - for controllers compatible with s3c2410 rtc. | ||
6 | * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc. | ||
7 | - reg: physical base address of the controller and length of memory mapped | ||
8 | region. | ||
9 | - interrupts: Two interrupt numbers to the cpu should be specified. First | ||
10 | interrupt number is the rtc alarm interupt and second interrupt number | ||
11 | is the rtc tick interrupt. The number of cells representing a interrupt | ||
12 | depends on the parent interrupt controller. | ||
13 | |||
14 | Example: | ||
15 | |||
16 | rtc@10070000 { | ||
17 | compatible = "samsung,s3c6410-rtc"; | ||
18 | reg = <0x10070000 0x100>; | ||
19 | interrupts = <44 0 45 0>; | ||
20 | }; | ||
diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.txt b/Documentation/devicetree/bindings/serial/samsung_uart.txt new file mode 100644 index 000000000000..2c8a17cf5cb5 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/samsung_uart.txt | |||
@@ -0,0 +1,14 @@ | |||
1 | * Samsung's UART Controller | ||
2 | |||
3 | The Samsung's UART controller is used for interfacing SoC with serial communicaion | ||
4 | devices. | ||
5 | |||
6 | Required properties: | ||
7 | - compatible: should be | ||
8 | - "samsung,exynos4210-uart", for UART's compatible with Exynos4210 uart ports. | ||
9 | |||
10 | - reg: base physical address of the controller and length of memory mapped | ||
11 | region. | ||
12 | |||
13 | - interrupts: interrupt number to the cpu. The interrupt specifier format depends | ||
14 | on the interrupt controller parent. | ||
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 7945b0bd35e2..e2a4b5287361 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt | |||
@@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows: | |||
1100 | eax, ebx, ecx, edx: the values returned by the cpuid instruction for | 1100 | eax, ebx, ecx, edx: the values returned by the cpuid instruction for |
1101 | this function/index combination | 1101 | this function/index combination |
1102 | 1102 | ||
1103 | The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned | ||
1104 | as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC | ||
1105 | support. Instead it is reported via | ||
1106 | |||
1107 | ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER) | ||
1108 | |||
1109 | if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the | ||
1110 | feature in userspace, then you can enable the feature for KVM_SET_CPUID2. | ||
1111 | |||
1103 | 4.47 KVM_PPC_GET_PVINFO | 1112 | 4.47 KVM_PPC_GET_PVINFO |
1104 | 1113 | ||
1105 | Capability: KVM_CAP_PPC_GET_PVINFO | 1114 | Capability: KVM_CAP_PPC_GET_PVINFO |
@@ -1151,6 +1160,13 @@ following flags are specified: | |||
1151 | /* Depends on KVM_CAP_IOMMU */ | 1160 | /* Depends on KVM_CAP_IOMMU */ |
1152 | #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) | 1161 | #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) |
1153 | 1162 | ||
1163 | The KVM_DEV_ASSIGN_ENABLE_IOMMU flag is a mandatory option to ensure | ||
1164 | isolation of the device. Usages not specifying this flag are deprecated. | ||
1165 | |||
1166 | Only PCI header type 0 devices with PCI BAR resources are supported by | ||
1167 | device assignment. The user requesting this ioctl must have read/write | ||
1168 | access to the PCI sysfs resource files associated with the device. | ||
1169 | |||
1154 | 4.49 KVM_DEASSIGN_PCI_DEVICE | 1170 | 4.49 KVM_DEASSIGN_PCI_DEVICE |
1155 | 1171 | ||
1156 | Capability: KVM_CAP_DEVICE_DEASSIGNMENT | 1172 | Capability: KVM_CAP_DEVICE_DEASSIGNMENT |
diff --git a/MAINTAINERS b/MAINTAINERS index b9db108f01c8..b26219050ff1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -1124,13 +1124,6 @@ S: Supported | |||
1124 | F: arch/arm/mach-shmobile/ | 1124 | F: arch/arm/mach-shmobile/ |
1125 | F: drivers/sh/ | 1125 | F: drivers/sh/ |
1126 | 1126 | ||
1127 | ARM/TELECHIPS ARM ARCHITECTURE | ||
1128 | M: "Hans J. Koch" <hjk@hansjkoch.de> | ||
1129 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | ||
1130 | S: Maintained | ||
1131 | F: arch/arm/plat-tcc/ | ||
1132 | F: arch/arm/mach-tcc8k/ | ||
1133 | |||
1134 | ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT | 1127 | ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT |
1135 | M: Lennert Buytenhek <kernel@wantstofly.org> | 1128 | M: Lennert Buytenhek <kernel@wantstofly.org> |
1136 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 1129 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
@@ -2700,7 +2693,7 @@ FIREWIRE SUBSYSTEM | |||
2700 | M: Stefan Richter <stefanr@s5r6.in-berlin.de> | 2693 | M: Stefan Richter <stefanr@s5r6.in-berlin.de> |
2701 | L: linux1394-devel@lists.sourceforge.net | 2694 | L: linux1394-devel@lists.sourceforge.net |
2702 | W: http://ieee1394.wiki.kernel.org/ | 2695 | W: http://ieee1394.wiki.kernel.org/ |
2703 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git | 2696 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394.git |
2704 | S: Maintained | 2697 | S: Maintained |
2705 | F: drivers/firewire/ | 2698 | F: drivers/firewire/ |
2706 | F: include/linux/firewire*.h | 2699 | F: include/linux/firewire*.h |
@@ -3101,6 +3094,7 @@ F: include/linux/hid* | |||
3101 | 3094 | ||
3102 | HIGH-RESOLUTION TIMERS, CLOCKEVENTS, DYNTICKS | 3095 | HIGH-RESOLUTION TIMERS, CLOCKEVENTS, DYNTICKS |
3103 | M: Thomas Gleixner <tglx@linutronix.de> | 3096 | M: Thomas Gleixner <tglx@linutronix.de> |
3097 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core | ||
3104 | S: Maintained | 3098 | S: Maintained |
3105 | F: Documentation/timers/ | 3099 | F: Documentation/timers/ |
3106 | F: kernel/hrtimer.c | 3100 | F: kernel/hrtimer.c |
@@ -3610,7 +3604,7 @@ F: net/irda/ | |||
3610 | IRQ SUBSYSTEM | 3604 | IRQ SUBSYSTEM |
3611 | M: Thomas Gleixner <tglx@linutronix.de> | 3605 | M: Thomas Gleixner <tglx@linutronix.de> |
3612 | S: Maintained | 3606 | S: Maintained |
3613 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git irq/core | 3607 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core |
3614 | F: kernel/irq/ | 3608 | F: kernel/irq/ |
3615 | 3609 | ||
3616 | ISAPNP | 3610 | ISAPNP |
@@ -4098,7 +4092,7 @@ F: drivers/hwmon/lm90.c | |||
4098 | LOCKDEP AND LOCKSTAT | 4092 | LOCKDEP AND LOCKSTAT |
4099 | M: Peter Zijlstra <peterz@infradead.org> | 4093 | M: Peter Zijlstra <peterz@infradead.org> |
4100 | M: Ingo Molnar <mingo@redhat.com> | 4094 | M: Ingo Molnar <mingo@redhat.com> |
4101 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-lockdep.git | 4095 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git core/locking |
4102 | S: Maintained | 4096 | S: Maintained |
4103 | F: Documentation/lockdep*.txt | 4097 | F: Documentation/lockdep*.txt |
4104 | F: Documentation/lockstat.txt | 4098 | F: Documentation/lockstat.txt |
@@ -4280,7 +4274,9 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git | |||
4280 | S: Maintained | 4274 | S: Maintained |
4281 | F: Documentation/dvb/ | 4275 | F: Documentation/dvb/ |
4282 | F: Documentation/video4linux/ | 4276 | F: Documentation/video4linux/ |
4277 | F: Documentation/DocBook/media/ | ||
4283 | F: drivers/media/ | 4278 | F: drivers/media/ |
4279 | F: drivers/staging/media/ | ||
4284 | F: include/media/ | 4280 | F: include/media/ |
4285 | F: include/linux/dvb/ | 4281 | F: include/linux/dvb/ |
4286 | F: include/linux/videodev*.h | 4282 | F: include/linux/videodev*.h |
@@ -5086,6 +5082,7 @@ M: Peter Zijlstra <a.p.zijlstra@chello.nl> | |||
5086 | M: Paul Mackerras <paulus@samba.org> | 5082 | M: Paul Mackerras <paulus@samba.org> |
5087 | M: Ingo Molnar <mingo@elte.hu> | 5083 | M: Ingo Molnar <mingo@elte.hu> |
5088 | M: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> | 5084 | M: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> |
5085 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core | ||
5089 | S: Supported | 5086 | S: Supported |
5090 | F: kernel/events/* | 5087 | F: kernel/events/* |
5091 | F: include/linux/perf_event.h | 5088 | F: include/linux/perf_event.h |
@@ -5117,6 +5114,15 @@ L: linux-mtd@lists.infradead.org | |||
5117 | S: Maintained | 5114 | S: Maintained |
5118 | F: drivers/mtd/devices/phram.c | 5115 | F: drivers/mtd/devices/phram.c |
5119 | 5116 | ||
5117 | PICOXCELL SUPPORT | ||
5118 | M: Jamie Iles <jamie@jamieiles.com> | ||
5119 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | ||
5120 | T: git git://github.com/jamieiles/linux-2.6-ji.git | ||
5121 | S: Supported | ||
5122 | F: arch/arm/mach-picoxcell | ||
5123 | F: drivers/*/picoxcell* | ||
5124 | F: drivers/*/*/picoxcell* | ||
5125 | |||
5120 | PIN CONTROL SUBSYSTEM | 5126 | PIN CONTROL SUBSYSTEM |
5121 | M: Linus Walleij <linus.walleij@linaro.org> | 5127 | M: Linus Walleij <linus.walleij@linaro.org> |
5122 | S: Maintained | 5128 | S: Maintained |
@@ -5165,6 +5171,7 @@ F: drivers/scsi/pm8001/ | |||
5165 | 5171 | ||
5166 | POSIX CLOCKS and TIMERS | 5172 | POSIX CLOCKS and TIMERS |
5167 | M: Thomas Gleixner <tglx@linutronix.de> | 5173 | M: Thomas Gleixner <tglx@linutronix.de> |
5174 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core | ||
5168 | S: Supported | 5175 | S: Supported |
5169 | F: fs/timerfd.c | 5176 | F: fs/timerfd.c |
5170 | F: include/linux/timer* | 5177 | F: include/linux/timer* |
@@ -5680,6 +5687,7 @@ F: drivers/dma/dw_dmac.c | |||
5680 | TIMEKEEPING, NTP | 5687 | TIMEKEEPING, NTP |
5681 | M: John Stultz <johnstul@us.ibm.com> | 5688 | M: John Stultz <johnstul@us.ibm.com> |
5682 | M: Thomas Gleixner <tglx@linutronix.de> | 5689 | M: Thomas Gleixner <tglx@linutronix.de> |
5690 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core | ||
5683 | S: Supported | 5691 | S: Supported |
5684 | F: include/linux/clocksource.h | 5692 | F: include/linux/clocksource.h |
5685 | F: include/linux/time.h | 5693 | F: include/linux/time.h |
@@ -5704,6 +5712,7 @@ F: drivers/watchdog/sc1200wdt.c | |||
5704 | SCHEDULER | 5712 | SCHEDULER |
5705 | M: Ingo Molnar <mingo@elte.hu> | 5713 | M: Ingo Molnar <mingo@elte.hu> |
5706 | M: Peter Zijlstra <peterz@infradead.org> | 5714 | M: Peter Zijlstra <peterz@infradead.org> |
5715 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git sched/core | ||
5707 | S: Maintained | 5716 | S: Maintained |
5708 | F: kernel/sched* | 5717 | F: kernel/sched* |
5709 | F: include/linux/sched.h | 5718 | F: include/linux/sched.h |
@@ -6631,7 +6640,7 @@ TRACING | |||
6631 | M: Steven Rostedt <rostedt@goodmis.org> | 6640 | M: Steven Rostedt <rostedt@goodmis.org> |
6632 | M: Frederic Weisbecker <fweisbec@gmail.com> | 6641 | M: Frederic Weisbecker <fweisbec@gmail.com> |
6633 | M: Ingo Molnar <mingo@redhat.com> | 6642 | M: Ingo Molnar <mingo@redhat.com> |
6634 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git perf/core | 6643 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core |
6635 | S: Maintained | 6644 | S: Maintained |
6636 | F: Documentation/trace/ftrace.txt | 6645 | F: Documentation/trace/ftrace.txt |
6637 | F: arch/*/*/*/ftrace.h | 6646 | F: arch/*/*/*/ftrace.h |
@@ -7381,7 +7390,7 @@ M: Thomas Gleixner <tglx@linutronix.de> | |||
7381 | M: Ingo Molnar <mingo@redhat.com> | 7390 | M: Ingo Molnar <mingo@redhat.com> |
7382 | M: "H. Peter Anvin" <hpa@zytor.com> | 7391 | M: "H. Peter Anvin" <hpa@zytor.com> |
7383 | M: x86@kernel.org | 7392 | M: x86@kernel.org |
7384 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git | 7393 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core |
7385 | S: Maintained | 7394 | S: Maintained |
7386 | F: Documentation/x86/ | 7395 | F: Documentation/x86/ |
7387 | F: arch/x86/ | 7396 | F: arch/x86/ |
@@ -1,7 +1,7 @@ | |||
1 | VERSION = 3 | 1 | VERSION = 3 |
2 | PATCHLEVEL = 2 | 2 | PATCHLEVEL = 2 |
3 | SUBLEVEL = 0 | 3 | SUBLEVEL = 0 |
4 | EXTRAVERSION = -rc6 | 4 | EXTRAVERSION = -rc7 |
5 | NAME = Saber-toothed Squirrel | 5 | NAME = Saber-toothed Squirrel |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a02385b2444c..ff7416f8eb83 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -258,6 +258,7 @@ config ARCH_INTEGRATOR | |||
258 | select ARCH_HAS_CPUFREQ | 258 | select ARCH_HAS_CPUFREQ |
259 | select CLKDEV_LOOKUP | 259 | select CLKDEV_LOOKUP |
260 | select HAVE_MACH_CLKDEV | 260 | select HAVE_MACH_CLKDEV |
261 | select HAVE_TCM | ||
261 | select ICST | 262 | select ICST |
262 | select GENERIC_CLOCKEVENTS | 263 | select GENERIC_CLOCKEVENTS |
263 | select PLAT_VERSATILE | 264 | select PLAT_VERSATILE |
@@ -341,10 +342,12 @@ config ARCH_HIGHBANK | |||
341 | select ARM_AMBA | 342 | select ARM_AMBA |
342 | select ARM_GIC | 343 | select ARM_GIC |
343 | select ARM_TIMER_SP804 | 344 | select ARM_TIMER_SP804 |
345 | select CACHE_L2X0 | ||
344 | select CLKDEV_LOOKUP | 346 | select CLKDEV_LOOKUP |
345 | select CPU_V7 | 347 | select CPU_V7 |
346 | select GENERIC_CLOCKEVENTS | 348 | select GENERIC_CLOCKEVENTS |
347 | select HAVE_ARM_SCU | 349 | select HAVE_ARM_SCU |
350 | select HAVE_SMP | ||
348 | select USE_OF | 351 | select USE_OF |
349 | help | 352 | help |
350 | Support for the Calxeda Highbank SoC based boards. | 353 | Support for the Calxeda Highbank SoC based boards. |
@@ -362,6 +365,7 @@ config ARCH_CNS3XXX | |||
362 | select CPU_V6K | 365 | select CPU_V6K |
363 | select GENERIC_CLOCKEVENTS | 366 | select GENERIC_CLOCKEVENTS |
364 | select ARM_GIC | 367 | select ARM_GIC |
368 | select MIGHT_HAVE_CACHE_L2X0 | ||
365 | select MIGHT_HAVE_PCI | 369 | select MIGHT_HAVE_PCI |
366 | select PCI_DOMAINS if PCI | 370 | select PCI_DOMAINS if PCI |
367 | help | 371 | help |
@@ -382,6 +386,7 @@ config ARCH_PRIMA2 | |||
382 | select GENERIC_CLOCKEVENTS | 386 | select GENERIC_CLOCKEVENTS |
383 | select CLKDEV_LOOKUP | 387 | select CLKDEV_LOOKUP |
384 | select GENERIC_IRQ_CHIP | 388 | select GENERIC_IRQ_CHIP |
389 | select MIGHT_HAVE_CACHE_L2X0 | ||
385 | select USE_OF | 390 | select USE_OF |
386 | select ZONE_DMA | 391 | select ZONE_DMA |
387 | help | 392 | help |
@@ -634,6 +639,8 @@ config ARCH_TEGRA | |||
634 | select GENERIC_GPIO | 639 | select GENERIC_GPIO |
635 | select HAVE_CLK | 640 | select HAVE_CLK |
636 | select HAVE_SCHED_CLOCK | 641 | select HAVE_SCHED_CLOCK |
642 | select HAVE_SMP | ||
643 | select MIGHT_HAVE_CACHE_L2X0 | ||
637 | select ARCH_HAS_CPUFREQ | 644 | select ARCH_HAS_CPUFREQ |
638 | help | 645 | help |
639 | This enables support for NVIDIA Tegra based systems (Tegra APX, | 646 | This enables support for NVIDIA Tegra based systems (Tegra APX, |
@@ -651,6 +658,7 @@ config ARCH_PICOXCELL | |||
651 | select HAVE_SCHED_CLOCK | 658 | select HAVE_SCHED_CLOCK |
652 | select HAVE_TCM | 659 | select HAVE_TCM |
653 | select NO_IOPORT | 660 | select NO_IOPORT |
661 | select SPARSE_IRQ | ||
654 | select USE_OF | 662 | select USE_OF |
655 | help | 663 | help |
656 | This enables support for systems based on the Picochip picoXcell | 664 | This enables support for systems based on the Picochip picoXcell |
@@ -703,7 +711,9 @@ config ARCH_SHMOBILE | |||
703 | select HAVE_CLK | 711 | select HAVE_CLK |
704 | select CLKDEV_LOOKUP | 712 | select CLKDEV_LOOKUP |
705 | select HAVE_MACH_CLKDEV | 713 | select HAVE_MACH_CLKDEV |
714 | select HAVE_SMP | ||
706 | select GENERIC_CLOCKEVENTS | 715 | select GENERIC_CLOCKEVENTS |
716 | select MIGHT_HAVE_CACHE_L2X0 | ||
707 | select NO_IOPORT | 717 | select NO_IOPORT |
708 | select SPARSE_IRQ | 718 | select SPARSE_IRQ |
709 | select MULTI_IRQ_HANDLER | 719 | select MULTI_IRQ_HANDLER |
@@ -868,16 +878,6 @@ config ARCH_SHARK | |||
868 | Support for the StrongARM based Digital DNARD machine, also known | 878 | Support for the StrongARM based Digital DNARD machine, also known |
869 | as "Shark" (<http://www.shark-linux.de/shark.html>). | 879 | as "Shark" (<http://www.shark-linux.de/shark.html>). |
870 | 880 | ||
871 | config ARCH_TCC_926 | ||
872 | bool "Telechips TCC ARM926-based systems" | ||
873 | select CLKSRC_MMIO | ||
874 | select CPU_ARM926T | ||
875 | select HAVE_CLK | ||
876 | select CLKDEV_LOOKUP | ||
877 | select GENERIC_CLOCKEVENTS | ||
878 | help | ||
879 | Support for Telechips TCC ARM926-based systems. | ||
880 | |||
881 | config ARCH_U300 | 881 | config ARCH_U300 |
882 | bool "ST-Ericsson U300 Series" | 882 | bool "ST-Ericsson U300 Series" |
883 | depends on MMU | 883 | depends on MMU |
@@ -893,7 +893,6 @@ config ARCH_U300 | |||
893 | select HAVE_MACH_CLKDEV | 893 | select HAVE_MACH_CLKDEV |
894 | select GENERIC_GPIO | 894 | select GENERIC_GPIO |
895 | select ARCH_REQUIRE_GPIOLIB | 895 | select ARCH_REQUIRE_GPIOLIB |
896 | select NEED_MACH_MEMORY_H | ||
897 | help | 896 | help |
898 | Support for ST-Ericsson U300 series mobile platforms. | 897 | Support for ST-Ericsson U300 series mobile platforms. |
899 | 898 | ||
@@ -905,6 +904,8 @@ config ARCH_U8500 | |||
905 | select CLKDEV_LOOKUP | 904 | select CLKDEV_LOOKUP |
906 | select ARCH_REQUIRE_GPIOLIB | 905 | select ARCH_REQUIRE_GPIOLIB |
907 | select ARCH_HAS_CPUFREQ | 906 | select ARCH_HAS_CPUFREQ |
907 | select HAVE_SMP | ||
908 | select MIGHT_HAVE_CACHE_L2X0 | ||
908 | help | 909 | help |
909 | Support for ST-Ericsson's Ux500 architecture | 910 | Support for ST-Ericsson's Ux500 architecture |
910 | 911 | ||
@@ -915,6 +916,7 @@ config ARCH_NOMADIK | |||
915 | select CPU_ARM926T | 916 | select CPU_ARM926T |
916 | select CLKDEV_LOOKUP | 917 | select CLKDEV_LOOKUP |
917 | select GENERIC_CLOCKEVENTS | 918 | select GENERIC_CLOCKEVENTS |
919 | select MIGHT_HAVE_CACHE_L2X0 | ||
918 | select ARCH_REQUIRE_GPIOLIB | 920 | select ARCH_REQUIRE_GPIOLIB |
919 | help | 921 | help |
920 | Support for the Nomadik platform by ST-Ericsson | 922 | Support for the Nomadik platform by ST-Ericsson |
@@ -974,6 +976,7 @@ config ARCH_ZYNQ | |||
974 | select ARM_GIC | 976 | select ARM_GIC |
975 | select ARM_AMBA | 977 | select ARM_AMBA |
976 | select ICST | 978 | select ICST |
979 | select MIGHT_HAVE_CACHE_L2X0 | ||
977 | select USE_OF | 980 | select USE_OF |
978 | help | 981 | help |
979 | Support for Xilinx Zynq ARM Cortex A9 Platform | 982 | Support for Xilinx Zynq ARM Cortex A9 Platform |
@@ -1060,8 +1063,6 @@ source "arch/arm/plat-s5p/Kconfig" | |||
1060 | 1063 | ||
1061 | source "arch/arm/plat-spear/Kconfig" | 1064 | source "arch/arm/plat-spear/Kconfig" |
1062 | 1065 | ||
1063 | source "arch/arm/plat-tcc/Kconfig" | ||
1064 | |||
1065 | if ARCH_S3C2410 | 1066 | if ARCH_S3C2410 |
1066 | source "arch/arm/mach-s3c2410/Kconfig" | 1067 | source "arch/arm/mach-s3c2410/Kconfig" |
1067 | source "arch/arm/mach-s3c2412/Kconfig" | 1068 | source "arch/arm/mach-s3c2412/Kconfig" |
@@ -1126,6 +1127,11 @@ config ARM_TIMER_SP804 | |||
1126 | 1127 | ||
1127 | source arch/arm/mm/Kconfig | 1128 | source arch/arm/mm/Kconfig |
1128 | 1129 | ||
1130 | config ARM_NR_BANKS | ||
1131 | int | ||
1132 | default 16 if ARCH_EP93XX | ||
1133 | default 8 | ||
1134 | |||
1129 | config IWMMXT | 1135 | config IWMMXT |
1130 | bool "Enable iWMMXt support" | 1136 | bool "Enable iWMMXt support" |
1131 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 | 1137 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
@@ -1246,7 +1252,7 @@ config PL310_ERRATA_588369 | |||
1246 | 1252 | ||
1247 | config ARM_ERRATA_720789 | 1253 | config ARM_ERRATA_720789 |
1248 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | 1254 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" |
1249 | depends on CPU_V7 && SMP | 1255 | depends on CPU_V7 |
1250 | help | 1256 | help |
1251 | This option enables the workaround for the 720789 Cortex-A9 (prior to | 1257 | This option enables the workaround for the 720789 Cortex-A9 (prior to |
1252 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | 1258 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the |
@@ -1282,7 +1288,7 @@ config ARM_ERRATA_743622 | |||
1282 | 1288 | ||
1283 | config ARM_ERRATA_751472 | 1289 | config ARM_ERRATA_751472 |
1284 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" | 1290 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" |
1285 | depends on CPU_V7 && SMP | 1291 | depends on CPU_V7 |
1286 | help | 1292 | help |
1287 | This option enables the workaround for the 751472 Cortex-A9 (prior | 1293 | This option enables the workaround for the 751472 Cortex-A9 (prior |
1288 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the | 1294 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the |
@@ -1435,14 +1441,20 @@ menu "Kernel Features" | |||
1435 | 1441 | ||
1436 | source "kernel/time/Kconfig" | 1442 | source "kernel/time/Kconfig" |
1437 | 1443 | ||
1444 | config HAVE_SMP | ||
1445 | bool | ||
1446 | help | ||
1447 | This option should be selected by machines which have an SMP- | ||
1448 | capable CPU. | ||
1449 | |||
1450 | The only effect of this option is to make the SMP-related | ||
1451 | options available to the user for configuration. | ||
1452 | |||
1438 | config SMP | 1453 | config SMP |
1439 | bool "Symmetric Multi-Processing" | 1454 | bool "Symmetric Multi-Processing" |
1440 | depends on CPU_V6K || CPU_V7 | 1455 | depends on CPU_V6K || CPU_V7 |
1441 | depends on GENERIC_CLOCKEVENTS | 1456 | depends on GENERIC_CLOCKEVENTS |
1442 | depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ | 1457 | depends on HAVE_SMP |
1443 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ | ||
1444 | ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ | ||
1445 | ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q | ||
1446 | depends on MMU | 1458 | depends on MMU |
1447 | select USE_GENERIC_SMP_HELPERS | 1459 | select USE_GENERIC_SMP_HELPERS |
1448 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP | 1460 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
@@ -1560,6 +1572,16 @@ config LOCAL_TIMERS | |||
1560 | accounting to be spread across the timer interval, preventing a | 1572 | accounting to be spread across the timer interval, preventing a |
1561 | "thundering herd" at every timer tick. | 1573 | "thundering herd" at every timer tick. |
1562 | 1574 | ||
1575 | config ARCH_NR_GPIO | ||
1576 | int | ||
1577 | default 1024 if ARCH_SHMOBILE || ARCH_TEGRA | ||
1578 | default 350 if ARCH_U8500 | ||
1579 | default 0 | ||
1580 | help | ||
1581 | Maximum number of GPIOs in the system. | ||
1582 | |||
1583 | If unsure, leave the default value. | ||
1584 | |||
1563 | source kernel/Kconfig.preempt | 1585 | source kernel/Kconfig.preempt |
1564 | 1586 | ||
1565 | config HZ | 1587 | config HZ |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index c5213e78606b..e0d236d7ff73 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -100,6 +100,14 @@ choice | |||
100 | Note that the system will appear to hang during boot if there | 100 | Note that the system will appear to hang during boot if there |
101 | is nothing connected to read from the DCC. | 101 | is nothing connected to read from the DCC. |
102 | 102 | ||
103 | config AT91_DEBUG_LL_DBGU0 | ||
104 | bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" | ||
105 | depends on HAVE_AT91_DBGU0 | ||
106 | |||
107 | config AT91_DEBUG_LL_DBGU1 | ||
108 | bool "Kernel low-level debugging on 9263, 9g45 and cap9" | ||
109 | depends on HAVE_AT91_DBGU1 | ||
110 | |||
103 | config DEBUG_FOOTBRIDGE_COM1 | 111 | config DEBUG_FOOTBRIDGE_COM1 |
104 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" | 112 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" |
105 | depends on FOOTBRIDGE | 113 | depends on FOOTBRIDGE |
@@ -247,6 +255,43 @@ choice | |||
247 | their output to the standard serial port on the RealView | 255 | their output to the standard serial port on the RealView |
248 | PB1176 platform. | 256 | PB1176 platform. |
249 | 257 | ||
258 | config DEBUG_MSM_UART1 | ||
259 | bool "Kernel low-level debugging messages via MSM UART1" | ||
260 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
261 | help | ||
262 | Say Y here if you want the debug print routines to direct | ||
263 | their output to the first serial port on MSM devices. | ||
264 | |||
265 | config DEBUG_MSM_UART2 | ||
266 | bool "Kernel low-level debugging messages via MSM UART2" | ||
267 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
268 | help | ||
269 | Say Y here if you want the debug print routines to direct | ||
270 | their output to the second serial port on MSM devices. | ||
271 | |||
272 | config DEBUG_MSM_UART3 | ||
273 | bool "Kernel low-level debugging messages via MSM UART3" | ||
274 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
275 | help | ||
276 | Say Y here if you want the debug print routines to direct | ||
277 | their output to the third serial port on MSM devices. | ||
278 | |||
279 | config DEBUG_MSM8660_UART | ||
280 | bool "Kernel low-level debugging messages via MSM 8660 UART" | ||
281 | depends on ARCH_MSM8X60 | ||
282 | select MSM_HAS_DEBUG_UART_HS | ||
283 | help | ||
284 | Say Y here if you want the debug print routines to direct | ||
285 | their output to the serial port on MSM 8660 devices. | ||
286 | |||
287 | config DEBUG_MSM8960_UART | ||
288 | bool "Kernel low-level debugging messages via MSM 8960 UART" | ||
289 | depends on ARCH_MSM8960 | ||
290 | select MSM_HAS_DEBUG_UART_HS | ||
291 | help | ||
292 | Say Y here if you want the debug print routines to direct | ||
293 | their output to the serial port on MSM 8960 devices. | ||
294 | |||
250 | endchoice | 295 | endchoice |
251 | 296 | ||
252 | config EARLY_PRINTK | 297 | config EARLY_PRINTK |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index dfcf3b033e10..40319d91bb7f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4) := exynos | |||
184 | machine-$(CONFIG_ARCH_SA1100) := sa1100 | 184 | machine-$(CONFIG_ARCH_SA1100) := sa1100 |
185 | machine-$(CONFIG_ARCH_SHARK) := shark | 185 | machine-$(CONFIG_ARCH_SHARK) := shark |
186 | machine-$(CONFIG_ARCH_SHMOBILE) := shmobile | 186 | machine-$(CONFIG_ARCH_SHMOBILE) := shmobile |
187 | machine-$(CONFIG_ARCH_TCC8K) := tcc8k | ||
188 | machine-$(CONFIG_ARCH_TEGRA) := tegra | 187 | machine-$(CONFIG_ARCH_TEGRA) := tegra |
189 | machine-$(CONFIG_ARCH_U300) := u300 | 188 | machine-$(CONFIG_ARCH_U300) := u300 |
190 | machine-$(CONFIG_ARCH_U8500) := ux500 | 189 | machine-$(CONFIG_ARCH_U8500) := ux500 |
@@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ) := zynq | |||
204 | plat-$(CONFIG_ARCH_MXC) := mxc | 203 | plat-$(CONFIG_ARCH_MXC) := mxc |
205 | plat-$(CONFIG_ARCH_OMAP) := omap | 204 | plat-$(CONFIG_ARCH_OMAP) := omap |
206 | plat-$(CONFIG_ARCH_S3C64XX) := samsung | 205 | plat-$(CONFIG_ARCH_S3C64XX) := samsung |
207 | plat-$(CONFIG_ARCH_TCC_926) := tcc | ||
208 | plat-$(CONFIG_ARCH_ZYNQ) := versatile | 206 | plat-$(CONFIG_ARCH_ZYNQ) := versatile |
209 | plat-$(CONFIG_PLAT_IOP) := iop | 207 | plat-$(CONFIG_PLAT_IOP) := iop |
210 | plat-$(CONFIG_PLAT_NOMADIK) := nomadik | 208 | plat-$(CONFIG_PLAT_NOMADIK) := nomadik |
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 21f56ff32797..cf0a64ce4b83 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj) | |||
126 | asflags-y := -Wa,-march=all | 126 | asflags-y := -Wa,-march=all |
127 | 127 | ||
128 | # Supply kernel BSS size to the decompressor via a linker symbol. | 128 | # Supply kernel BSS size to the decompressor via a linker symbol. |
129 | KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}') | 129 | KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \ |
130 | awk 'END{print $$3}') | ||
130 | LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ) | 131 | LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ) |
131 | # Supply ZRELADDR to the decompressor via a linker symbol. | 132 | # Supply ZRELADDR to the decompressor via a linker symbol. |
132 | ifneq ($(CONFIG_AUTO_ZRELADDR),y) | 133 | ifneq ($(CONFIG_AUTO_ZRELADDR),y) |
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts new file mode 100644 index 000000000000..b8c476384eef --- /dev/null +++ b/arch/arm/boot/dts/exynos4210-origen.dts | |||
@@ -0,0 +1,137 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4210 based Origen board device tree source | ||
3 | * | ||
4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * Copyright (c) 2010-2011 Linaro Ltd. | ||
7 | * www.linaro.org | ||
8 | * | ||
9 | * Device tree source file for Insignal's Origen board which is based on | ||
10 | * Samsung's Exynos4210 SoC. | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | |||
17 | /dts-v1/; | ||
18 | /include/ "exynos4210.dtsi" | ||
19 | |||
20 | / { | ||
21 | model = "Insignal Origen evaluation board based on Exynos4210"; | ||
22 | compatible = "insignal,origen", "samsung,exynos4210"; | ||
23 | |||
24 | memory { | ||
25 | reg = <0x40000000 0x40000000>; | ||
26 | }; | ||
27 | |||
28 | chosen { | ||
29 | bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; | ||
30 | }; | ||
31 | |||
32 | sdhci@12530000 { | ||
33 | samsung,sdhci-bus-width = <4>; | ||
34 | linux,mmc_cap_4_bit_data; | ||
35 | samsung,sdhci-cd-internal; | ||
36 | gpio-cd = <&gpk2 2 2 3 3>; | ||
37 | gpios = <&gpk2 0 2 0 3>, | ||
38 | <&gpk2 1 2 0 3>, | ||
39 | <&gpk2 3 2 3 3>, | ||
40 | <&gpk2 4 2 3 3>, | ||
41 | <&gpk2 5 2 3 3>, | ||
42 | <&gpk2 6 2 3 3>; | ||
43 | }; | ||
44 | |||
45 | sdhci@12510000 { | ||
46 | samsung,sdhci-bus-width = <4>; | ||
47 | linux,mmc_cap_4_bit_data; | ||
48 | samsung,sdhci-cd-internal; | ||
49 | gpio-cd = <&gpk0 2 2 3 3>; | ||
50 | gpios = <&gpk0 0 2 0 3>, | ||
51 | <&gpk0 1 2 0 3>, | ||
52 | <&gpk0 3 2 3 3>, | ||
53 | <&gpk0 4 2 3 3>, | ||
54 | <&gpk0 5 2 3 3>, | ||
55 | <&gpk0 6 2 3 3>; | ||
56 | }; | ||
57 | |||
58 | gpio_keys { | ||
59 | compatible = "gpio-keys"; | ||
60 | #address-cells = <1>; | ||
61 | #size-cells = <0>; | ||
62 | |||
63 | up { | ||
64 | label = "Up"; | ||
65 | gpios = <&gpx2 0 0 0 2>; | ||
66 | linux,code = <103>; | ||
67 | }; | ||
68 | |||
69 | down { | ||
70 | label = "Down"; | ||
71 | gpios = <&gpx2 1 0 0 2>; | ||
72 | linux,code = <108>; | ||
73 | }; | ||
74 | |||
75 | back { | ||
76 | label = "Back"; | ||
77 | gpios = <&gpx1 7 0 0 2>; | ||
78 | linux,code = <158>; | ||
79 | }; | ||
80 | |||
81 | home { | ||
82 | label = "Home"; | ||
83 | gpios = <&gpx1 6 0 0 2>; | ||
84 | linux,code = <102>; | ||
85 | }; | ||
86 | |||
87 | menu { | ||
88 | label = "Menu"; | ||
89 | gpios = <&gpx1 5 0 0 2>; | ||
90 | linux,code = <139>; | ||
91 | }; | ||
92 | }; | ||
93 | |||
94 | keypad@100A0000 { | ||
95 | status = "disabled"; | ||
96 | }; | ||
97 | |||
98 | sdhci@12520000 { | ||
99 | status = "disabled"; | ||
100 | }; | ||
101 | |||
102 | sdhci@12540000 { | ||
103 | status = "disabled"; | ||
104 | }; | ||
105 | |||
106 | i2c@13860000 { | ||
107 | status = "disabled"; | ||
108 | }; | ||
109 | |||
110 | i2c@13870000 { | ||
111 | status = "disabled"; | ||
112 | }; | ||
113 | |||
114 | i2c@13880000 { | ||
115 | status = "disabled"; | ||
116 | }; | ||
117 | |||
118 | i2c@13890000 { | ||
119 | status = "disabled"; | ||
120 | }; | ||
121 | |||
122 | i2c@138A0000 { | ||
123 | status = "disabled"; | ||
124 | }; | ||
125 | |||
126 | i2c@138B0000 { | ||
127 | status = "disabled"; | ||
128 | }; | ||
129 | |||
130 | i2c@138C0000 { | ||
131 | status = "disabled"; | ||
132 | }; | ||
133 | |||
134 | i2c@138D0000 { | ||
135 | status = "disabled"; | ||
136 | }; | ||
137 | }; | ||
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts new file mode 100644 index 000000000000..27afc8e535ca --- /dev/null +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts | |||
@@ -0,0 +1,182 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4210 based SMDKV310 board device tree source | ||
3 | * | ||
4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * Copyright (c) 2010-2011 Linaro Ltd. | ||
7 | * www.linaro.org | ||
8 | * | ||
9 | * Device tree source file for Samsung's SMDKV310 board which is based on | ||
10 | * Samsung's Exynos4210 SoC. | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | |||
17 | /dts-v1/; | ||
18 | /include/ "exynos4210.dtsi" | ||
19 | |||
20 | / { | ||
21 | model = "Samsung smdkv310 evaluation board based on Exynos4210"; | ||
22 | compatible = "samsung,smdkv310", "samsung,exynos4210"; | ||
23 | |||
24 | memory { | ||
25 | reg = <0x40000000 0x80000000>; | ||
26 | }; | ||
27 | |||
28 | chosen { | ||
29 | bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; | ||
30 | }; | ||
31 | |||
32 | sdhci@12530000 { | ||
33 | samsung,sdhci-bus-width = <4>; | ||
34 | linux,mmc_cap_4_bit_data; | ||
35 | samsung,sdhci-cd-internal; | ||
36 | gpio-cd = <&gpk2 2 2 3 3>; | ||
37 | gpios = <&gpk2 0 2 0 3>, | ||
38 | <&gpk2 1 2 0 3>, | ||
39 | <&gpk2 3 2 3 3>, | ||
40 | <&gpk2 4 2 3 3>, | ||
41 | <&gpk2 5 2 3 3>, | ||
42 | <&gpk2 6 2 3 3>; | ||
43 | }; | ||
44 | |||
45 | keypad@100A0000 { | ||
46 | samsung,keypad-num-rows = <2>; | ||
47 | samsung,keypad-num-columns = <8>; | ||
48 | linux,keypad-no-autorepeat; | ||
49 | linux,keypad-wakeup; | ||
50 | |||
51 | row-gpios = <&gpx2 0 3 3 0>, | ||
52 | <&gpx2 1 3 3 0>; | ||
53 | |||
54 | col-gpios = <&gpx1 0 3 0 0>, | ||
55 | <&gpx1 1 3 0 0>, | ||
56 | <&gpx1 2 3 0 0>, | ||
57 | <&gpx1 3 3 0 0>, | ||
58 | <&gpx1 4 3 0 0>, | ||
59 | <&gpx1 5 3 0 0>, | ||
60 | <&gpx1 6 3 0 0>, | ||
61 | <&gpx1 7 3 0 0>; | ||
62 | |||
63 | key_1 { | ||
64 | keypad,row = <0>; | ||
65 | keypad,column = <3>; | ||
66 | linux,code = <2>; | ||
67 | }; | ||
68 | |||
69 | key_2 { | ||
70 | keypad,row = <0>; | ||
71 | keypad,column = <4>; | ||
72 | linux,code = <3>; | ||
73 | }; | ||
74 | |||
75 | key_3 { | ||
76 | keypad,row = <0>; | ||
77 | keypad,column = <5>; | ||
78 | linux,code = <4>; | ||
79 | }; | ||
80 | |||
81 | key_4 { | ||
82 | keypad,row = <0>; | ||
83 | keypad,column = <6>; | ||
84 | linux,code = <5>; | ||
85 | }; | ||
86 | |||
87 | key_5 { | ||
88 | keypad,row = <0>; | ||
89 | keypad,column = <7>; | ||
90 | linux,code = <6>; | ||
91 | }; | ||
92 | |||
93 | key_a { | ||
94 | keypad,row = <1>; | ||
95 | keypad,column = <3>; | ||
96 | linux,code = <30>; | ||
97 | }; | ||
98 | |||
99 | key_b { | ||
100 | keypad,row = <1>; | ||
101 | keypad,column = <4>; | ||
102 | linux,code = <48>; | ||
103 | }; | ||
104 | |||
105 | key_c { | ||
106 | keypad,row = <1>; | ||
107 | keypad,column = <5>; | ||
108 | linux,code = <46>; | ||
109 | }; | ||
110 | |||
111 | key_d { | ||
112 | keypad,row = <1>; | ||
113 | keypad,column = <6>; | ||
114 | linux,code = <32>; | ||
115 | }; | ||
116 | |||
117 | key_e { | ||
118 | keypad,row = <1>; | ||
119 | keypad,column = <7>; | ||
120 | linux,code = <18>; | ||
121 | }; | ||
122 | }; | ||
123 | |||
124 | i2c@13860000 { | ||
125 | #address-cells = <1>; | ||
126 | #size-cells = <0>; | ||
127 | samsung,i2c-sda-delay = <100>; | ||
128 | samsung,i2c-max-bus-freq = <20000>; | ||
129 | gpios = <&gpd1 0 2 3 0>, | ||
130 | <&gpd1 1 2 3 0>; | ||
131 | |||
132 | eeprom@50 { | ||
133 | compatible = "samsung,24ad0xd1"; | ||
134 | reg = <0x50>; | ||
135 | }; | ||
136 | |||
137 | eeprom@52 { | ||
138 | compatible = "samsung,24ad0xd1"; | ||
139 | reg = <0x52>; | ||
140 | }; | ||
141 | }; | ||
142 | |||
143 | sdhci@12510000 { | ||
144 | status = "disabled"; | ||
145 | }; | ||
146 | |||
147 | sdhci@12520000 { | ||
148 | status = "disabled"; | ||
149 | }; | ||
150 | |||
151 | sdhci@12540000 { | ||
152 | status = "disabled"; | ||
153 | }; | ||
154 | |||
155 | i2c@13870000 { | ||
156 | status = "disabled"; | ||
157 | }; | ||
158 | |||
159 | i2c@13880000 { | ||
160 | status = "disabled"; | ||
161 | }; | ||
162 | |||
163 | i2c@13890000 { | ||
164 | status = "disabled"; | ||
165 | }; | ||
166 | |||
167 | i2c@138A0000 { | ||
168 | status = "disabled"; | ||
169 | }; | ||
170 | |||
171 | i2c@138B0000 { | ||
172 | status = "disabled"; | ||
173 | }; | ||
174 | |||
175 | i2c@138C0000 { | ||
176 | status = "disabled"; | ||
177 | }; | ||
178 | |||
179 | i2c@138D0000 { | ||
180 | status = "disabled"; | ||
181 | }; | ||
182 | }; | ||
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi new file mode 100644 index 000000000000..63d7578856c1 --- /dev/null +++ b/arch/arm/boot/dts/exynos4210.dtsi | |||
@@ -0,0 +1,397 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4210 SoC device tree source | ||
3 | * | ||
4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * Copyright (c) 2010-2011 Linaro Ltd. | ||
7 | * www.linaro.org | ||
8 | * | ||
9 | * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210 | ||
10 | * based board files can include this file and provide values for board specfic | ||
11 | * bindings. | ||
12 | * | ||
13 | * Note: This file does not include device nodes for all the controllers in | ||
14 | * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional | ||
15 | * nodes can be added to this file. | ||
16 | * | ||
17 | * This program is free software; you can redistribute it and/or modify | ||
18 | * it under the terms of the GNU General Public License version 2 as | ||
19 | * published by the Free Software Foundation. | ||
20 | */ | ||
21 | |||
22 | /include/ "skeleton.dtsi" | ||
23 | |||
24 | / { | ||
25 | compatible = "samsung,exynos4210"; | ||
26 | interrupt-parent = <&gic>; | ||
27 | |||
28 | gic:interrupt-controller@10490000 { | ||
29 | compatible = "arm,cortex-a9-gic"; | ||
30 | #interrupt-cells = <3>; | ||
31 | interrupt-controller; | ||
32 | reg = <0x10490000 0x1000>, <0x10480000 0x100>; | ||
33 | }; | ||
34 | |||
35 | watchdog@10060000 { | ||
36 | compatible = "samsung,s3c2410-wdt"; | ||
37 | reg = <0x10060000 0x100>; | ||
38 | interrupts = <0 43 0>; | ||
39 | }; | ||
40 | |||
41 | rtc@10070000 { | ||
42 | compatible = "samsung,s3c6410-rtc"; | ||
43 | reg = <0x10070000 0x100>; | ||
44 | interrupts = <0 44 0>, <0 45 0>; | ||
45 | }; | ||
46 | |||
47 | keypad@100A0000 { | ||
48 | compatible = "samsung,s5pv210-keypad"; | ||
49 | reg = <0x100A0000 0x100>; | ||
50 | interrupts = <0 109 0>; | ||
51 | }; | ||
52 | |||
53 | sdhci@12510000 { | ||
54 | compatible = "samsung,exynos4210-sdhci"; | ||
55 | reg = <0x12510000 0x100>; | ||
56 | interrupts = <0 73 0>; | ||
57 | }; | ||
58 | |||
59 | sdhci@12520000 { | ||
60 | compatible = "samsung,exynos4210-sdhci"; | ||
61 | reg = <0x12520000 0x100>; | ||
62 | interrupts = <0 74 0>; | ||
63 | }; | ||
64 | |||
65 | sdhci@12530000 { | ||
66 | compatible = "samsung,exynos4210-sdhci"; | ||
67 | reg = <0x12530000 0x100>; | ||
68 | interrupts = <0 75 0>; | ||
69 | }; | ||
70 | |||
71 | sdhci@12540000 { | ||
72 | compatible = "samsung,exynos4210-sdhci"; | ||
73 | reg = <0x12540000 0x100>; | ||
74 | interrupts = <0 76 0>; | ||
75 | }; | ||
76 | |||
77 | serial@13800000 { | ||
78 | compatible = "samsung,exynos4210-uart"; | ||
79 | reg = <0x13800000 0x100>; | ||
80 | interrupts = <0 52 0>; | ||
81 | }; | ||
82 | |||
83 | serial@13810000 { | ||
84 | compatible = "samsung,exynos4210-uart"; | ||
85 | reg = <0x13810000 0x100>; | ||
86 | interrupts = <0 53 0>; | ||
87 | }; | ||
88 | |||
89 | serial@13820000 { | ||
90 | compatible = "samsung,exynos4210-uart"; | ||
91 | reg = <0x13820000 0x100>; | ||
92 | interrupts = <0 54 0>; | ||
93 | }; | ||
94 | |||
95 | serial@13830000 { | ||
96 | compatible = "samsung,exynos4210-uart"; | ||
97 | reg = <0x13830000 0x100>; | ||
98 | interrupts = <0 55 0>; | ||
99 | }; | ||
100 | |||
101 | i2c@13860000 { | ||
102 | compatible = "samsung,s3c2440-i2c"; | ||
103 | reg = <0x13860000 0x100>; | ||
104 | interrupts = <0 58 0>; | ||
105 | }; | ||
106 | |||
107 | i2c@13870000 { | ||
108 | compatible = "samsung,s3c2440-i2c"; | ||
109 | reg = <0x13870000 0x100>; | ||
110 | interrupts = <0 59 0>; | ||
111 | }; | ||
112 | |||
113 | i2c@13880000 { | ||
114 | compatible = "samsung,s3c2440-i2c"; | ||
115 | reg = <0x13880000 0x100>; | ||
116 | interrupts = <0 60 0>; | ||
117 | }; | ||
118 | |||
119 | i2c@13890000 { | ||
120 | compatible = "samsung,s3c2440-i2c"; | ||
121 | reg = <0x13890000 0x100>; | ||
122 | interrupts = <0 61 0>; | ||
123 | }; | ||
124 | |||
125 | i2c@138A0000 { | ||
126 | compatible = "samsung,s3c2440-i2c"; | ||
127 | reg = <0x138A0000 0x100>; | ||
128 | interrupts = <0 62 0>; | ||
129 | }; | ||
130 | |||
131 | i2c@138B0000 { | ||
132 | compatible = "samsung,s3c2440-i2c"; | ||
133 | reg = <0x138B0000 0x100>; | ||
134 | interrupts = <0 63 0>; | ||
135 | }; | ||
136 | |||
137 | i2c@138C0000 { | ||
138 | compatible = "samsung,s3c2440-i2c"; | ||
139 | reg = <0x138C0000 0x100>; | ||
140 | interrupts = <0 64 0>; | ||
141 | }; | ||
142 | |||
143 | i2c@138D0000 { | ||
144 | compatible = "samsung,s3c2440-i2c"; | ||
145 | reg = <0x138D0000 0x100>; | ||
146 | interrupts = <0 65 0>; | ||
147 | }; | ||
148 | |||
149 | amba { | ||
150 | #address-cells = <1>; | ||
151 | #size-cells = <1>; | ||
152 | compatible = "arm,amba-bus"; | ||
153 | interrupt-parent = <&gic>; | ||
154 | ranges; | ||
155 | |||
156 | pdma0: pdma@12680000 { | ||
157 | compatible = "arm,pl330", "arm,primecell"; | ||
158 | reg = <0x12680000 0x1000>; | ||
159 | interrupts = <0 35 0>; | ||
160 | }; | ||
161 | |||
162 | pdma1: pdma@12690000 { | ||
163 | compatible = "arm,pl330", "arm,primecell"; | ||
164 | reg = <0x12690000 0x1000>; | ||
165 | interrupts = <0 36 0>; | ||
166 | }; | ||
167 | }; | ||
168 | |||
169 | gpio-controllers { | ||
170 | #address-cells = <1>; | ||
171 | #size-cells = <1>; | ||
172 | gpio-controller; | ||
173 | ranges; | ||
174 | |||
175 | gpa0: gpio-controller@11400000 { | ||
176 | compatible = "samsung,exynos4-gpio"; | ||
177 | reg = <0x11400000 0x20>; | ||
178 | #gpio-cells = <4>; | ||
179 | }; | ||
180 | |||
181 | gpa1: gpio-controller@11400020 { | ||
182 | compatible = "samsung,exynos4-gpio"; | ||
183 | reg = <0x11400020 0x20>; | ||
184 | #gpio-cells = <4>; | ||
185 | }; | ||
186 | |||
187 | gpb: gpio-controller@11400040 { | ||
188 | compatible = "samsung,exynos4-gpio"; | ||
189 | reg = <0x11400040 0x20>; | ||
190 | #gpio-cells = <4>; | ||
191 | }; | ||
192 | |||
193 | gpc0: gpio-controller@11400060 { | ||
194 | compatible = "samsung,exynos4-gpio"; | ||
195 | reg = <0x11400060 0x20>; | ||
196 | #gpio-cells = <4>; | ||
197 | }; | ||
198 | |||
199 | gpc1: gpio-controller@11400080 { | ||
200 | compatible = "samsung,exynos4-gpio"; | ||
201 | reg = <0x11400080 0x20>; | ||
202 | #gpio-cells = <4>; | ||
203 | }; | ||
204 | |||
205 | gpd0: gpio-controller@114000A0 { | ||
206 | compatible = "samsung,exynos4-gpio"; | ||
207 | reg = <0x114000A0 0x20>; | ||
208 | #gpio-cells = <4>; | ||
209 | }; | ||
210 | |||
211 | gpd1: gpio-controller@114000C0 { | ||
212 | compatible = "samsung,exynos4-gpio"; | ||
213 | reg = <0x114000C0 0x20>; | ||
214 | #gpio-cells = <4>; | ||
215 | }; | ||
216 | |||
217 | gpe0: gpio-controller@114000E0 { | ||
218 | compatible = "samsung,exynos4-gpio"; | ||
219 | reg = <0x114000E0 0x20>; | ||
220 | #gpio-cells = <4>; | ||
221 | }; | ||
222 | |||
223 | gpe1: gpio-controller@11400100 { | ||
224 | compatible = "samsung,exynos4-gpio"; | ||
225 | reg = <0x11400100 0x20>; | ||
226 | #gpio-cells = <4>; | ||
227 | }; | ||
228 | |||
229 | gpe2: gpio-controller@11400120 { | ||
230 | compatible = "samsung,exynos4-gpio"; | ||
231 | reg = <0x11400120 0x20>; | ||
232 | #gpio-cells = <4>; | ||
233 | }; | ||
234 | |||
235 | gpe3: gpio-controller@11400140 { | ||
236 | compatible = "samsung,exynos4-gpio"; | ||
237 | reg = <0x11400140 0x20>; | ||
238 | #gpio-cells = <4>; | ||
239 | }; | ||
240 | |||
241 | gpe4: gpio-controller@11400160 { | ||
242 | compatible = "samsung,exynos4-gpio"; | ||
243 | reg = <0x11400160 0x20>; | ||
244 | #gpio-cells = <4>; | ||
245 | }; | ||
246 | |||
247 | gpf0: gpio-controller@11400180 { | ||
248 | compatible = "samsung,exynos4-gpio"; | ||
249 | reg = <0x11400180 0x20>; | ||
250 | #gpio-cells = <4>; | ||
251 | }; | ||
252 | |||
253 | gpf1: gpio-controller@114001A0 { | ||
254 | compatible = "samsung,exynos4-gpio"; | ||
255 | reg = <0x114001A0 0x20>; | ||
256 | #gpio-cells = <4>; | ||
257 | }; | ||
258 | |||
259 | gpf2: gpio-controller@114001C0 { | ||
260 | compatible = "samsung,exynos4-gpio"; | ||
261 | reg = <0x114001C0 0x20>; | ||
262 | #gpio-cells = <4>; | ||
263 | }; | ||
264 | |||
265 | gpf3: gpio-controller@114001E0 { | ||
266 | compatible = "samsung,exynos4-gpio"; | ||
267 | reg = <0x114001E0 0x20>; | ||
268 | #gpio-cells = <4>; | ||
269 | }; | ||
270 | |||
271 | gpj0: gpio-controller@11000000 { | ||
272 | compatible = "samsung,exynos4-gpio"; | ||
273 | reg = <0x11000000 0x20>; | ||
274 | #gpio-cells = <4>; | ||
275 | }; | ||
276 | |||
277 | gpj1: gpio-controller@11000020 { | ||
278 | compatible = "samsung,exynos4-gpio"; | ||
279 | reg = <0x11000020 0x20>; | ||
280 | #gpio-cells = <4>; | ||
281 | }; | ||
282 | |||
283 | gpk0: gpio-controller@11000040 { | ||
284 | compatible = "samsung,exynos4-gpio"; | ||
285 | reg = <0x11000040 0x20>; | ||
286 | #gpio-cells = <4>; | ||
287 | }; | ||
288 | |||
289 | gpk1: gpio-controller@11000060 { | ||
290 | compatible = "samsung,exynos4-gpio"; | ||
291 | reg = <0x11000060 0x20>; | ||
292 | #gpio-cells = <4>; | ||
293 | }; | ||
294 | |||
295 | gpk2: gpio-controller@11000080 { | ||
296 | compatible = "samsung,exynos4-gpio"; | ||
297 | reg = <0x11000080 0x20>; | ||
298 | #gpio-cells = <4>; | ||
299 | }; | ||
300 | |||
301 | gpk3: gpio-controller@110000A0 { | ||
302 | compatible = "samsung,exynos4-gpio"; | ||
303 | reg = <0x110000A0 0x20>; | ||
304 | #gpio-cells = <4>; | ||
305 | }; | ||
306 | |||
307 | gpl0: gpio-controller@110000C0 { | ||
308 | compatible = "samsung,exynos4-gpio"; | ||
309 | reg = <0x110000C0 0x20>; | ||
310 | #gpio-cells = <4>; | ||
311 | }; | ||
312 | |||
313 | gpl1: gpio-controller@110000E0 { | ||
314 | compatible = "samsung,exynos4-gpio"; | ||
315 | reg = <0x110000E0 0x20>; | ||
316 | #gpio-cells = <4>; | ||
317 | }; | ||
318 | |||
319 | gpl2: gpio-controller@11000100 { | ||
320 | compatible = "samsung,exynos4-gpio"; | ||
321 | reg = <0x11000100 0x20>; | ||
322 | #gpio-cells = <4>; | ||
323 | }; | ||
324 | |||
325 | gpy0: gpio-controller@11000120 { | ||
326 | compatible = "samsung,exynos4-gpio"; | ||
327 | reg = <0x11000120 0x20>; | ||
328 | #gpio-cells = <4>; | ||
329 | }; | ||
330 | |||
331 | gpy1: gpio-controller@11000140 { | ||
332 | compatible = "samsung,exynos4-gpio"; | ||
333 | reg = <0x11000140 0x20>; | ||
334 | #gpio-cells = <4>; | ||
335 | }; | ||
336 | |||
337 | gpy2: gpio-controller@11000160 { | ||
338 | compatible = "samsung,exynos4-gpio"; | ||
339 | reg = <0x11000160 0x20>; | ||
340 | #gpio-cells = <4>; | ||
341 | }; | ||
342 | |||
343 | gpy3: gpio-controller@11000180 { | ||
344 | compatible = "samsung,exynos4-gpio"; | ||
345 | reg = <0x11000180 0x20>; | ||
346 | #gpio-cells = <4>; | ||
347 | }; | ||
348 | |||
349 | gpy4: gpio-controller@110001A0 { | ||
350 | compatible = "samsung,exynos4-gpio"; | ||
351 | reg = <0x110001A0 0x20>; | ||
352 | #gpio-cells = <4>; | ||
353 | }; | ||
354 | |||
355 | gpy5: gpio-controller@110001C0 { | ||
356 | compatible = "samsung,exynos4-gpio"; | ||
357 | reg = <0x110001C0 0x20>; | ||
358 | #gpio-cells = <4>; | ||
359 | }; | ||
360 | |||
361 | gpy6: gpio-controller@110001E0 { | ||
362 | compatible = "samsung,exynos4-gpio"; | ||
363 | reg = <0x110001E0 0x20>; | ||
364 | #gpio-cells = <4>; | ||
365 | }; | ||
366 | |||
367 | gpx0: gpio-controller@11000C00 { | ||
368 | compatible = "samsung,exynos4-gpio"; | ||
369 | reg = <0x11000C00 0x20>; | ||
370 | #gpio-cells = <4>; | ||
371 | }; | ||
372 | |||
373 | gpx1: gpio-controller@11000C20 { | ||
374 | compatible = "samsung,exynos4-gpio"; | ||
375 | reg = <0x11000C20 0x20>; | ||
376 | #gpio-cells = <4>; | ||
377 | }; | ||
378 | |||
379 | gpx2: gpio-controller@11000C40 { | ||
380 | compatible = "samsung,exynos4-gpio"; | ||
381 | reg = <0x11000C40 0x20>; | ||
382 | #gpio-cells = <4>; | ||
383 | }; | ||
384 | |||
385 | gpx3: gpio-controller@11000C60 { | ||
386 | compatible = "samsung,exynos4-gpio"; | ||
387 | reg = <0x11000C60 0x20>; | ||
388 | #gpio-cells = <4>; | ||
389 | }; | ||
390 | |||
391 | gpz: gpio-controller@03860000 { | ||
392 | compatible = "samsung,exynos4-gpio"; | ||
393 | reg = <0x03860000 0x20>; | ||
394 | #gpio-cells = <4>; | ||
395 | }; | ||
396 | }; | ||
397 | }; | ||
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c index f407a6b35d3d..d8e44a43047c 100644 --- a/arch/arm/common/pl330.c +++ b/arch/arm/common/pl330.c | |||
@@ -221,17 +221,6 @@ | |||
221 | */ | 221 | */ |
222 | #define MCODE_BUFF_PER_REQ 256 | 222 | #define MCODE_BUFF_PER_REQ 256 |
223 | 223 | ||
224 | /* | ||
225 | * Mark a _pl330_req as free. | ||
226 | * We do it by writing DMAEND as the first instruction | ||
227 | * because no valid request is going to have DMAEND as | ||
228 | * its first instruction to execute. | ||
229 | */ | ||
230 | #define MARK_FREE(req) do { \ | ||
231 | _emit_END(0, (req)->mc_cpu); \ | ||
232 | (req)->mc_len = 0; \ | ||
233 | } while (0) | ||
234 | |||
235 | /* If the _pl330_req is available to the client */ | 224 | /* If the _pl330_req is available to the client */ |
236 | #define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND) | 225 | #define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND) |
237 | 226 | ||
@@ -301,8 +290,10 @@ struct pl330_thread { | |||
301 | struct pl330_dmac *dmac; | 290 | struct pl330_dmac *dmac; |
302 | /* Only two at a time */ | 291 | /* Only two at a time */ |
303 | struct _pl330_req req[2]; | 292 | struct _pl330_req req[2]; |
304 | /* Index of the last submitted request */ | 293 | /* Index of the last enqueued request */ |
305 | unsigned lstenq; | 294 | unsigned lstenq; |
295 | /* Index of the last submitted request or -1 if the DMA is stopped */ | ||
296 | int req_running; | ||
306 | }; | 297 | }; |
307 | 298 | ||
308 | enum pl330_dmac_state { | 299 | enum pl330_dmac_state { |
@@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, | |||
778 | writel(0, regs + DBGCMD); | 769 | writel(0, regs + DBGCMD); |
779 | } | 770 | } |
780 | 771 | ||
772 | /* | ||
773 | * Mark a _pl330_req as free. | ||
774 | * We do it by writing DMAEND as the first instruction | ||
775 | * because no valid request is going to have DMAEND as | ||
776 | * its first instruction to execute. | ||
777 | */ | ||
778 | static void mark_free(struct pl330_thread *thrd, int idx) | ||
779 | { | ||
780 | struct _pl330_req *req = &thrd->req[idx]; | ||
781 | |||
782 | _emit_END(0, req->mc_cpu); | ||
783 | req->mc_len = 0; | ||
784 | |||
785 | thrd->req_running = -1; | ||
786 | } | ||
787 | |||
781 | static inline u32 _state(struct pl330_thread *thrd) | 788 | static inline u32 _state(struct pl330_thread *thrd) |
782 | { | 789 | { |
783 | void __iomem *regs = thrd->dmac->pinfo->base; | 790 | void __iomem *regs = thrd->dmac->pinfo->base; |
@@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd) | |||
836 | } | 843 | } |
837 | } | 844 | } |
838 | 845 | ||
839 | /* If the request 'req' of thread 'thrd' is currently active */ | ||
840 | static inline bool _req_active(struct pl330_thread *thrd, | ||
841 | struct _pl330_req *req) | ||
842 | { | ||
843 | void __iomem *regs = thrd->dmac->pinfo->base; | ||
844 | u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id)); | ||
845 | |||
846 | if (IS_FREE(req)) | ||
847 | return false; | ||
848 | |||
849 | return (pc >= buf && pc <= buf + req->mc_len) ? true : false; | ||
850 | } | ||
851 | |||
852 | /* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */ | ||
853 | static inline unsigned _thrd_active(struct pl330_thread *thrd) | ||
854 | { | ||
855 | if (_req_active(thrd, &thrd->req[0])) | ||
856 | return 1; /* First req active */ | ||
857 | |||
858 | if (_req_active(thrd, &thrd->req[1])) | ||
859 | return 2; /* Second req active */ | ||
860 | |||
861 | return 0; | ||
862 | } | ||
863 | |||
864 | static void _stop(struct pl330_thread *thrd) | 846 | static void _stop(struct pl330_thread *thrd) |
865 | { | 847 | { |
866 | void __iomem *regs = thrd->dmac->pinfo->base; | 848 | void __iomem *regs = thrd->dmac->pinfo->base; |
@@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd) | |||
892 | struct _arg_GO go; | 874 | struct _arg_GO go; |
893 | unsigned ns; | 875 | unsigned ns; |
894 | u8 insn[6] = {0, 0, 0, 0, 0, 0}; | 876 | u8 insn[6] = {0, 0, 0, 0, 0, 0}; |
877 | int idx; | ||
895 | 878 | ||
896 | /* Return if already ACTIVE */ | 879 | /* Return if already ACTIVE */ |
897 | if (_state(thrd) != PL330_STATE_STOPPED) | 880 | if (_state(thrd) != PL330_STATE_STOPPED) |
898 | return true; | 881 | return true; |
899 | 882 | ||
900 | if (!IS_FREE(&thrd->req[1 - thrd->lstenq])) | 883 | idx = 1 - thrd->lstenq; |
901 | req = &thrd->req[1 - thrd->lstenq]; | 884 | if (!IS_FREE(&thrd->req[idx])) |
902 | else if (!IS_FREE(&thrd->req[thrd->lstenq])) | 885 | req = &thrd->req[idx]; |
903 | req = &thrd->req[thrd->lstenq]; | 886 | else { |
904 | else | 887 | idx = thrd->lstenq; |
905 | req = NULL; | 888 | if (!IS_FREE(&thrd->req[idx])) |
889 | req = &thrd->req[idx]; | ||
890 | else | ||
891 | req = NULL; | ||
892 | } | ||
906 | 893 | ||
907 | /* Return if no request */ | 894 | /* Return if no request */ |
908 | if (!req || !req->r) | 895 | if (!req || !req->r) |
@@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd) | |||
933 | /* Only manager can execute GO */ | 920 | /* Only manager can execute GO */ |
934 | _execute_DBGINSN(thrd, insn, true); | 921 | _execute_DBGINSN(thrd, insn, true); |
935 | 922 | ||
923 | thrd->req_running = idx; | ||
924 | |||
936 | return true; | 925 | return true; |
937 | } | 926 | } |
938 | 927 | ||
@@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data) | |||
1382 | 1371 | ||
1383 | thrd->req[0].r = NULL; | 1372 | thrd->req[0].r = NULL; |
1384 | thrd->req[1].r = NULL; | 1373 | thrd->req[1].r = NULL; |
1385 | MARK_FREE(&thrd->req[0]); | 1374 | mark_free(thrd, 0); |
1386 | MARK_FREE(&thrd->req[1]); | 1375 | mark_free(thrd, 1); |
1387 | 1376 | ||
1388 | /* Clear the reset flag */ | 1377 | /* Clear the reset flag */ |
1389 | pl330->dmac_tbd.reset_chan &= ~(1 << i); | 1378 | pl330->dmac_tbd.reset_chan &= ~(1 << i); |
@@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi) | |||
1461 | 1450 | ||
1462 | thrd = &pl330->channels[id]; | 1451 | thrd = &pl330->channels[id]; |
1463 | 1452 | ||
1464 | active = _thrd_active(thrd); | 1453 | active = thrd->req_running; |
1465 | if (!active) /* Aborted */ | 1454 | if (active == -1) /* Aborted */ |
1466 | continue; | 1455 | continue; |
1467 | 1456 | ||
1468 | active -= 1; | ||
1469 | |||
1470 | rqdone = &thrd->req[active]; | 1457 | rqdone = &thrd->req[active]; |
1471 | MARK_FREE(rqdone); | 1458 | mark_free(thrd, active); |
1472 | 1459 | ||
1473 | /* Get going again ASAP */ | 1460 | /* Get going again ASAP */ |
1474 | _start(thrd); | 1461 | _start(thrd); |
@@ -1480,13 +1467,19 @@ int pl330_update(const struct pl330_info *pi) | |||
1480 | 1467 | ||
1481 | /* Now that we are in no hurry, do the callbacks */ | 1468 | /* Now that we are in no hurry, do the callbacks */ |
1482 | while (!list_empty(&pl330->req_done)) { | 1469 | while (!list_empty(&pl330->req_done)) { |
1470 | struct pl330_req *r; | ||
1471 | |||
1483 | rqdone = container_of(pl330->req_done.next, | 1472 | rqdone = container_of(pl330->req_done.next, |
1484 | struct _pl330_req, rqd); | 1473 | struct _pl330_req, rqd); |
1485 | 1474 | ||
1486 | list_del_init(&rqdone->rqd); | 1475 | list_del_init(&rqdone->rqd); |
1487 | 1476 | ||
1477 | /* Detach the req */ | ||
1478 | r = rqdone->r; | ||
1479 | rqdone->r = NULL; | ||
1480 | |||
1488 | spin_unlock_irqrestore(&pl330->lock, flags); | 1481 | spin_unlock_irqrestore(&pl330->lock, flags); |
1489 | _callback(rqdone->r, PL330_ERR_NONE); | 1482 | _callback(r, PL330_ERR_NONE); |
1490 | spin_lock_irqsave(&pl330->lock, flags); | 1483 | spin_lock_irqsave(&pl330->lock, flags); |
1491 | } | 1484 | } |
1492 | 1485 | ||
@@ -1509,7 +1502,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) | |||
1509 | struct pl330_thread *thrd = ch_id; | 1502 | struct pl330_thread *thrd = ch_id; |
1510 | struct pl330_dmac *pl330; | 1503 | struct pl330_dmac *pl330; |
1511 | unsigned long flags; | 1504 | unsigned long flags; |
1512 | int ret = 0, active; | 1505 | int ret = 0, active = thrd->req_running; |
1513 | 1506 | ||
1514 | if (!thrd || thrd->free || thrd->dmac->state == DYING) | 1507 | if (!thrd || thrd->free || thrd->dmac->state == DYING) |
1515 | return -EINVAL; | 1508 | return -EINVAL; |
@@ -1525,28 +1518,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) | |||
1525 | 1518 | ||
1526 | thrd->req[0].r = NULL; | 1519 | thrd->req[0].r = NULL; |
1527 | thrd->req[1].r = NULL; | 1520 | thrd->req[1].r = NULL; |
1528 | MARK_FREE(&thrd->req[0]); | 1521 | mark_free(thrd, 0); |
1529 | MARK_FREE(&thrd->req[1]); | 1522 | mark_free(thrd, 1); |
1530 | break; | 1523 | break; |
1531 | 1524 | ||
1532 | case PL330_OP_ABORT: | 1525 | case PL330_OP_ABORT: |
1533 | active = _thrd_active(thrd); | ||
1534 | |||
1535 | /* Make sure the channel is stopped */ | 1526 | /* Make sure the channel is stopped */ |
1536 | _stop(thrd); | 1527 | _stop(thrd); |
1537 | 1528 | ||
1538 | /* ABORT is only for the active req */ | 1529 | /* ABORT is only for the active req */ |
1539 | if (!active) | 1530 | if (active == -1) |
1540 | break; | 1531 | break; |
1541 | 1532 | ||
1542 | active--; | ||
1543 | |||
1544 | thrd->req[active].r = NULL; | 1533 | thrd->req[active].r = NULL; |
1545 | MARK_FREE(&thrd->req[active]); | 1534 | mark_free(thrd, active); |
1546 | 1535 | ||
1547 | /* Start the next */ | 1536 | /* Start the next */ |
1548 | case PL330_OP_START: | 1537 | case PL330_OP_START: |
1549 | if (!_thrd_active(thrd) && !_start(thrd)) | 1538 | if ((active == -1) && !_start(thrd)) |
1550 | ret = -EIO; | 1539 | ret = -EIO; |
1551 | break; | 1540 | break; |
1552 | 1541 | ||
@@ -1587,14 +1576,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus) | |||
1587 | else | 1576 | else |
1588 | pstatus->faulting = false; | 1577 | pstatus->faulting = false; |
1589 | 1578 | ||
1590 | active = _thrd_active(thrd); | 1579 | active = thrd->req_running; |
1591 | 1580 | ||
1592 | if (!active) { | 1581 | if (active == -1) { |
1593 | /* Indicate that the thread is not running */ | 1582 | /* Indicate that the thread is not running */ |
1594 | pstatus->top_req = NULL; | 1583 | pstatus->top_req = NULL; |
1595 | pstatus->wait_req = NULL; | 1584 | pstatus->wait_req = NULL; |
1596 | } else { | 1585 | } else { |
1597 | active--; | ||
1598 | pstatus->top_req = thrd->req[active].r; | 1586 | pstatus->top_req = thrd->req[active].r; |
1599 | pstatus->wait_req = !IS_FREE(&thrd->req[1 - active]) | 1587 | pstatus->wait_req = !IS_FREE(&thrd->req[1 - active]) |
1600 | ? thrd->req[1 - active].r : NULL; | 1588 | ? thrd->req[1 - active].r : NULL; |
@@ -1659,9 +1647,9 @@ void *pl330_request_channel(const struct pl330_info *pi) | |||
1659 | thrd->free = false; | 1647 | thrd->free = false; |
1660 | thrd->lstenq = 1; | 1648 | thrd->lstenq = 1; |
1661 | thrd->req[0].r = NULL; | 1649 | thrd->req[0].r = NULL; |
1662 | MARK_FREE(&thrd->req[0]); | 1650 | mark_free(thrd, 0); |
1663 | thrd->req[1].r = NULL; | 1651 | thrd->req[1].r = NULL; |
1664 | MARK_FREE(&thrd->req[1]); | 1652 | mark_free(thrd, 1); |
1665 | break; | 1653 | break; |
1666 | } | 1654 | } |
1667 | } | 1655 | } |
@@ -1767,14 +1755,14 @@ static inline void _reset_thread(struct pl330_thread *thrd) | |||
1767 | thrd->req[0].mc_bus = pl330->mcode_bus | 1755 | thrd->req[0].mc_bus = pl330->mcode_bus |
1768 | + (thrd->id * pi->mcbufsz); | 1756 | + (thrd->id * pi->mcbufsz); |
1769 | thrd->req[0].r = NULL; | 1757 | thrd->req[0].r = NULL; |
1770 | MARK_FREE(&thrd->req[0]); | 1758 | mark_free(thrd, 0); |
1771 | 1759 | ||
1772 | thrd->req[1].mc_cpu = thrd->req[0].mc_cpu | 1760 | thrd->req[1].mc_cpu = thrd->req[0].mc_cpu |
1773 | + pi->mcbufsz / 2; | 1761 | + pi->mcbufsz / 2; |
1774 | thrd->req[1].mc_bus = thrd->req[0].mc_bus | 1762 | thrd->req[1].mc_bus = thrd->req[0].mc_bus |
1775 | + pi->mcbufsz / 2; | 1763 | + pi->mcbufsz / 2; |
1776 | thrd->req[1].r = NULL; | 1764 | thrd->req[1].r = NULL; |
1777 | MARK_FREE(&thrd->req[1]); | 1765 | mark_free(thrd, 1); |
1778 | } | 1766 | } |
1779 | 1767 | ||
1780 | static int dmac_alloc_threads(struct pl330_dmac *pl330) | 1768 | static int dmac_alloc_threads(struct pl330_dmac *pl330) |
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c index 2393b5bc96fa..8794a34eae61 100644 --- a/arch/arm/common/timer-sp.c +++ b/arch/arm/common/timer-sp.c | |||
@@ -143,7 +143,6 @@ static int sp804_set_next_event(unsigned long next, | |||
143 | } | 143 | } |
144 | 144 | ||
145 | static struct clock_event_device sp804_clockevent = { | 145 | static struct clock_event_device sp804_clockevent = { |
146 | .shift = 32, | ||
147 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 146 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
148 | .set_mode = sp804_set_mode, | 147 | .set_mode = sp804_set_mode, |
149 | .set_next_event = sp804_set_next_event, | 148 | .set_next_event = sp804_set_next_event, |
@@ -169,13 +168,9 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq, | |||
169 | 168 | ||
170 | clkevt_base = base; | 169 | clkevt_base = base; |
171 | clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ); | 170 | clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ); |
172 | |||
173 | evt->name = name; | 171 | evt->name = name; |
174 | evt->irq = irq; | 172 | evt->irq = irq; |
175 | evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift); | ||
176 | evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt); | ||
177 | evt->min_delta_ns = clockevent_delta2ns(0xf, evt); | ||
178 | 173 | ||
179 | setup_irq(irq, &sp804_timer_irq); | 174 | setup_irq(irq, &sp804_timer_irq); |
180 | clockevents_register_device(evt); | 175 | clockevents_config_and_register(evt, rate, 0xf, 0xffffffff); |
181 | } | 176 | } |
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index 77287504c8b4..dcb004a804c7 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c | |||
@@ -197,8 +197,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq, | |||
197 | v->domain.nr_irq = 32; | 197 | v->domain.nr_irq = 32; |
198 | #ifdef CONFIG_OF_IRQ | 198 | #ifdef CONFIG_OF_IRQ |
199 | v->domain.of_node = of_node_get(node); | 199 | v->domain.of_node = of_node_get(node); |
200 | v->domain.ops = &irq_domain_simple_ops; | ||
201 | #endif /* CONFIG_OF */ | 200 | #endif /* CONFIG_OF */ |
201 | v->domain.ops = &irq_domain_simple_ops; | ||
202 | irq_domain_add(&v->domain); | 202 | irq_domain_add(&v->domain); |
203 | } | 203 | } |
204 | 204 | ||
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig index fccb4703bacb..a22e93079063 100644 --- a/arch/arm/configs/imx_v4_v5_defconfig +++ b/arch/arm/configs/imx_v4_v5_defconfig | |||
@@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y | |||
18 | CONFIG_ARCH_IMX_V4_V5=y | 18 | CONFIG_ARCH_IMX_V4_V5=y |
19 | CONFIG_ARCH_MX1ADS=y | 19 | CONFIG_ARCH_MX1ADS=y |
20 | CONFIG_MACH_SCB9328=y | 20 | CONFIG_MACH_SCB9328=y |
21 | CONFIG_MACH_APF9328=y | ||
21 | CONFIG_MACH_MX21ADS=y | 22 | CONFIG_MACH_MX21ADS=y |
22 | CONFIG_MACH_MX25_3DS=y | 23 | CONFIG_MACH_MX25_3DS=y |
23 | CONFIG_MACH_EUKREA_CPUIMX25=y | 24 | CONFIG_MACH_EUKREA_CPUIMX25SD=y |
24 | CONFIG_MACH_MX27ADS=y | 25 | CONFIG_MACH_MX27ADS=y |
25 | CONFIG_MACH_PCM038=y | 26 | CONFIG_MACH_PCM038=y |
26 | CONFIG_MACH_CPUIMX27=y | 27 | CONFIG_MACH_CPUIMX27=y |
@@ -71,17 +72,16 @@ CONFIG_MTD_CFI_GEOMETRY=y | |||
71 | CONFIG_MTD_CFI_INTELEXT=y | 72 | CONFIG_MTD_CFI_INTELEXT=y |
72 | CONFIG_MTD_PHYSMAP=y | 73 | CONFIG_MTD_PHYSMAP=y |
73 | CONFIG_MTD_NAND=y | 74 | CONFIG_MTD_NAND=y |
75 | CONFIG_MTD_NAND_MXC=y | ||
74 | CONFIG_MTD_UBI=y | 76 | CONFIG_MTD_UBI=y |
75 | CONFIG_MISC_DEVICES=y | 77 | CONFIG_MISC_DEVICES=y |
76 | CONFIG_EEPROM_AT24=y | 78 | CONFIG_EEPROM_AT24=y |
77 | CONFIG_EEPROM_AT25=y | 79 | CONFIG_EEPROM_AT25=y |
78 | CONFIG_NETDEVICES=y | 80 | CONFIG_NETDEVICES=y |
79 | CONFIG_NET_ETHERNET=y | ||
80 | CONFIG_SMC91X=y | ||
81 | CONFIG_DM9000=y | 81 | CONFIG_DM9000=y |
82 | CONFIG_SMC91X=y | ||
82 | CONFIG_SMC911X=y | 83 | CONFIG_SMC911X=y |
83 | # CONFIG_NETDEV_1000 is not set | 84 | CONFIG_SMSC_PHY=y |
84 | # CONFIG_NETDEV_10000 is not set | ||
85 | # CONFIG_INPUT_MOUSEDEV is not set | 85 | # CONFIG_INPUT_MOUSEDEV is not set |
86 | CONFIG_INPUT_EVDEV=y | 86 | CONFIG_INPUT_EVDEV=y |
87 | # CONFIG_INPUT_KEYBOARD is not set | 87 | # CONFIG_INPUT_KEYBOARD is not set |
@@ -99,6 +99,7 @@ CONFIG_I2C_CHARDEV=y | |||
99 | CONFIG_I2C_IMX=y | 99 | CONFIG_I2C_IMX=y |
100 | CONFIG_SPI=y | 100 | CONFIG_SPI=y |
101 | CONFIG_SPI_IMX=y | 101 | CONFIG_SPI_IMX=y |
102 | CONFIG_SPI_SPIDEV=y | ||
102 | CONFIG_W1=y | 103 | CONFIG_W1=y |
103 | CONFIG_W1_MASTER_MXC=y | 104 | CONFIG_W1_MASTER_MXC=y |
104 | CONFIG_W1_SLAVE_THERM=y | 105 | CONFIG_W1_SLAVE_THERM=y |
@@ -138,6 +139,7 @@ CONFIG_MMC=y | |||
138 | CONFIG_MMC_MXC=y | 139 | CONFIG_MMC_MXC=y |
139 | CONFIG_NEW_LEDS=y | 140 | CONFIG_NEW_LEDS=y |
140 | CONFIG_LEDS_CLASS=y | 141 | CONFIG_LEDS_CLASS=y |
142 | CONFIG_LEDS_GPIO=y | ||
141 | CONFIG_LEDS_MC13783=y | 143 | CONFIG_LEDS_MC13783=y |
142 | CONFIG_LEDS_TRIGGERS=y | 144 | CONFIG_LEDS_TRIGGERS=y |
143 | CONFIG_LEDS_TRIGGER_TIMER=y | 145 | CONFIG_LEDS_TRIGGER_TIMER=y |
diff --git a/arch/arm/configs/pcontrol_g20_defconfig b/arch/arm/configs/pcontrol_g20_defconfig deleted file mode 100644 index c75c9fcede58..000000000000 --- a/arch/arm/configs/pcontrol_g20_defconfig +++ /dev/null | |||
@@ -1,175 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-" | ||
3 | # CONFIG_LOCALVERSION_AUTO is not set | ||
4 | # CONFIG_SWAP is not set | ||
5 | CONFIG_SYSVIPC=y | ||
6 | CONFIG_POSIX_MQUEUE=y | ||
7 | CONFIG_TREE_PREEMPT_RCU=y | ||
8 | CONFIG_IKCONFIG=y | ||
9 | CONFIG_IKCONFIG_PROC=y | ||
10 | CONFIG_LOG_BUF_SHIFT=14 | ||
11 | CONFIG_NAMESPACES=y | ||
12 | CONFIG_BLK_DEV_INITRD=y | ||
13 | CONFIG_EXPERT=y | ||
14 | # CONFIG_SYSCTL_SYSCALL is not set | ||
15 | # CONFIG_KALLSYMS is not set | ||
16 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
17 | # CONFIG_COMPAT_BRK is not set | ||
18 | CONFIG_SLAB=y | ||
19 | CONFIG_MODULES=y | ||
20 | CONFIG_MODULE_UNLOAD=y | ||
21 | # CONFIG_LBDAF is not set | ||
22 | # CONFIG_BLK_DEV_BSG is not set | ||
23 | CONFIG_DEFAULT_DEADLINE=y | ||
24 | CONFIG_ARCH_AT91=y | ||
25 | CONFIG_ARCH_AT91SAM9G20=y | ||
26 | CONFIG_MACH_PCONTROL_G20=y | ||
27 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
28 | CONFIG_NO_HZ=y | ||
29 | CONFIG_HIGH_RES_TIMERS=y | ||
30 | CONFIG_PREEMPT=y | ||
31 | CONFIG_AEABI=y | ||
32 | # CONFIG_OABI_COMPAT is not set | ||
33 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
34 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
35 | CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw" | ||
36 | CONFIG_VFP=y | ||
37 | CONFIG_BINFMT_MISC=y | ||
38 | CONFIG_NET=y | ||
39 | CONFIG_PACKET=y | ||
40 | CONFIG_UNIX=y | ||
41 | CONFIG_INET=y | ||
42 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
43 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
44 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
45 | # CONFIG_INET_LRO is not set | ||
46 | # CONFIG_IPV6 is not set | ||
47 | CONFIG_VLAN_8021Q=y | ||
48 | # CONFIG_WIRELESS is not set | ||
49 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
50 | # CONFIG_FW_LOADER is not set | ||
51 | CONFIG_MTD=y | ||
52 | CONFIG_MTD_PARTITIONS=y | ||
53 | CONFIG_MTD_CMDLINE_PARTS=y | ||
54 | CONFIG_MTD_CHAR=y | ||
55 | CONFIG_MTD_BLOCK=y | ||
56 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
57 | CONFIG_MTD_PHRAM=m | ||
58 | CONFIG_MTD_NAND=y | ||
59 | CONFIG_MTD_NAND_ATMEL=y | ||
60 | CONFIG_BLK_DEV_LOOP=y | ||
61 | CONFIG_BLK_DEV_RAM=y | ||
62 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
63 | CONFIG_ATMEL_TCLIB=y | ||
64 | CONFIG_EEPROM_AT24=m | ||
65 | CONFIG_SCSI=m | ||
66 | # CONFIG_SCSI_PROC_FS is not set | ||
67 | CONFIG_BLK_DEV_SD=m | ||
68 | CONFIG_SCSI_MULTI_LUN=y | ||
69 | # CONFIG_SCSI_LOWLEVEL is not set | ||
70 | CONFIG_NETDEVICES=y | ||
71 | CONFIG_MACVLAN=m | ||
72 | CONFIG_TUN=m | ||
73 | CONFIG_SMSC_PHY=m | ||
74 | CONFIG_BROADCOM_PHY=m | ||
75 | CONFIG_NET_ETHERNET=y | ||
76 | CONFIG_MII=y | ||
77 | CONFIG_MACB=y | ||
78 | CONFIG_SMSC911X=m | ||
79 | # CONFIG_NETDEV_1000 is not set | ||
80 | # CONFIG_NETDEV_10000 is not set | ||
81 | # CONFIG_WLAN is not set | ||
82 | CONFIG_PPP=m | ||
83 | CONFIG_PPP_ASYNC=m | ||
84 | CONFIG_PPP_DEFLATE=m | ||
85 | CONFIG_PPP_MPPE=m | ||
86 | CONFIG_INPUT_POLLDEV=y | ||
87 | CONFIG_INPUT_SPARSEKMAP=y | ||
88 | # CONFIG_INPUT_MOUSEDEV is not set | ||
89 | CONFIG_INPUT_EVDEV=m | ||
90 | CONFIG_INPUT_EVBUG=m | ||
91 | # CONFIG_KEYBOARD_ATKBD is not set | ||
92 | CONFIG_KEYBOARD_GPIO=m | ||
93 | CONFIG_KEYBOARD_MATRIX=m | ||
94 | # CONFIG_INPUT_MOUSE is not set | ||
95 | CONFIG_INPUT_TOUCHSCREEN=y | ||
96 | CONFIG_INPUT_MISC=y | ||
97 | CONFIG_INPUT_UINPUT=m | ||
98 | CONFIG_INPUT_GPIO_ROTARY_ENCODER=m | ||
99 | # CONFIG_SERIO is not set | ||
100 | # CONFIG_DEVKMEM is not set | ||
101 | CONFIG_SERIAL_ATMEL=y | ||
102 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
103 | CONFIG_SERIAL_MAX3100=m | ||
104 | # CONFIG_LEGACY_PTYS is not set | ||
105 | # CONFIG_HW_RANDOM is not set | ||
106 | CONFIG_R3964=m | ||
107 | CONFIG_I2C=m | ||
108 | CONFIG_I2C_CHARDEV=m | ||
109 | # CONFIG_I2C_HELPER_AUTO is not set | ||
110 | CONFIG_I2C_GPIO=m | ||
111 | CONFIG_SPI=y | ||
112 | CONFIG_SPI_ATMEL=m | ||
113 | CONFIG_SPI_SPIDEV=m | ||
114 | CONFIG_GPIO_SYSFS=y | ||
115 | CONFIG_W1=m | ||
116 | CONFIG_W1_MASTER_GPIO=m | ||
117 | CONFIG_W1_SLAVE_DS2431=m | ||
118 | # CONFIG_HWMON is not set | ||
119 | CONFIG_WATCHDOG=y | ||
120 | CONFIG_AT91SAM9X_WATCHDOG=y | ||
121 | # CONFIG_MFD_SUPPORT is not set | ||
122 | # CONFIG_HID_SUPPORT is not set | ||
123 | CONFIG_USB=y | ||
124 | # CONFIG_USB_DEVICE_CLASS is not set | ||
125 | CONFIG_USB_OHCI_HCD=y | ||
126 | CONFIG_USB_STORAGE=m | ||
127 | CONFIG_USB_LIBUSUAL=y | ||
128 | CONFIG_USB_SERIAL=m | ||
129 | CONFIG_USB_SERIAL_GENERIC=y | ||
130 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
131 | CONFIG_USB_SERIAL_PL2303=m | ||
132 | CONFIG_USB_GADGET=y | ||
133 | CONFIG_USB_ZERO=m | ||
134 | CONFIG_USB_ETH=m | ||
135 | CONFIG_USB_FILE_STORAGE=m | ||
136 | CONFIG_USB_G_SERIAL=m | ||
137 | CONFIG_USB_G_HID=m | ||
138 | CONFIG_MMC=y | ||
139 | CONFIG_MMC_UNSAFE_RESUME=y | ||
140 | CONFIG_MMC_ATMELMCI=y | ||
141 | CONFIG_NEW_LEDS=y | ||
142 | CONFIG_LEDS_CLASS=y | ||
143 | CONFIG_LEDS_GPIO=y | ||
144 | CONFIG_LEDS_TRIGGERS=y | ||
145 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
146 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
147 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
148 | CONFIG_RTC_CLASS=y | ||
149 | CONFIG_RTC_DRV_AT91SAM9=y | ||
150 | CONFIG_AUXDISPLAY=y | ||
151 | CONFIG_UIO=y | ||
152 | CONFIG_UIO_PDRV=y | ||
153 | CONFIG_STAGING=y | ||
154 | # CONFIG_STAGING_EXCLUDE_BUILD is not set | ||
155 | CONFIG_IIO=y | ||
156 | CONFIG_EXT2_FS=y | ||
157 | CONFIG_EXT3_FS=y | ||
158 | # CONFIG_EXT3_FS_XATTR is not set | ||
159 | CONFIG_VFAT_FS=y | ||
160 | CONFIG_TMPFS=y | ||
161 | CONFIG_JFFS2_FS=y | ||
162 | CONFIG_NFS_FS=y | ||
163 | CONFIG_NFS_V3=y | ||
164 | CONFIG_NFS_V4=y | ||
165 | CONFIG_PARTITION_ADVANCED=y | ||
166 | CONFIG_NLS_CODEPAGE_437=y | ||
167 | CONFIG_NLS_CODEPAGE_850=y | ||
168 | CONFIG_NLS_ISO8859_1=y | ||
169 | CONFIG_NLS_ISO8859_15=y | ||
170 | CONFIG_NLS_UTF8=y | ||
171 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
172 | CONFIG_CRYPTO=y | ||
173 | CONFIG_CRYPTO_ANSI_CPRNG=y | ||
174 | # CONFIG_CRYPTO_HW is not set | ||
175 | CONFIG_CRC_CCITT=y | ||
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h index 9abe7a07d5ac..fac79dceb736 100644 --- a/arch/arm/include/asm/bug.h +++ b/arch/arm/include/asm/bug.h | |||
@@ -32,7 +32,6 @@ | |||
32 | 32 | ||
33 | #define __BUG(__file, __line, __value) \ | 33 | #define __BUG(__file, __line, __value) \ |
34 | do { \ | 34 | do { \ |
35 | BUILD_BUG_ON(sizeof(struct bug_entry) != 12); \ | ||
36 | asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \ | 35 | asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \ |
37 | ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ | 36 | ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ |
38 | "2:\t.asciz " #__file "\n" \ | 37 | "2:\t.asciz " #__file "\n" \ |
diff --git a/arch/arm/include/asm/edac.h b/arch/arm/include/asm/edac.h new file mode 100644 index 000000000000..0df7a2c1fc3d --- /dev/null +++ b/arch/arm/include/asm/edac.h | |||
@@ -0,0 +1,48 @@ | |||
1 | /* | ||
2 | * Copyright 2011 Calxeda, Inc. | ||
3 | * Based on PPC version Copyright 2007 MontaVista Software, Inc. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms and conditions of the GNU General Public License, | ||
7 | * version 2, as published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
12 | * more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along with | ||
15 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
16 | */ | ||
17 | #ifndef ASM_EDAC_H | ||
18 | #define ASM_EDAC_H | ||
19 | /* | ||
20 | * ECC atomic, DMA, SMP and interrupt safe scrub function. | ||
21 | * Implements the per arch atomic_scrub() that EDAC use for software | ||
22 | * ECC scrubbing. It reads memory and then writes back the original | ||
23 | * value, allowing the hardware to detect and correct memory errors. | ||
24 | */ | ||
25 | static inline void atomic_scrub(void *va, u32 size) | ||
26 | { | ||
27 | #if __LINUX_ARM_ARCH__ >= 6 | ||
28 | unsigned int *virt_addr = va; | ||
29 | unsigned int temp, temp2; | ||
30 | unsigned int i; | ||
31 | |||
32 | for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) { | ||
33 | /* Very carefully read and write to memory atomically | ||
34 | * so we are interrupt, DMA and SMP safe. | ||
35 | */ | ||
36 | __asm__ __volatile__("\n" | ||
37 | "1: ldrex %0, [%2]\n" | ||
38 | " strex %1, %0, [%2]\n" | ||
39 | " teq %1, #0\n" | ||
40 | " bne 1b\n" | ||
41 | : "=&r"(temp), "=&r"(temp2) | ||
42 | : "r"(virt_addr) | ||
43 | : "cc"); | ||
44 | } | ||
45 | #endif | ||
46 | } | ||
47 | |||
48 | #endif | ||
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index 11ad0bfbb0ad..7151753b0989 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h | |||
@@ -1,6 +1,10 @@ | |||
1 | #ifndef _ARCH_ARM_GPIO_H | 1 | #ifndef _ARCH_ARM_GPIO_H |
2 | #define _ARCH_ARM_GPIO_H | 2 | #define _ARCH_ARM_GPIO_H |
3 | 3 | ||
4 | #if CONFIG_ARCH_NR_GPIO > 0 | ||
5 | #define ARCH_NR_GPIO CONFIG_ARCH_NR_GPIO | ||
6 | #endif | ||
7 | |||
4 | /* not all ARM platforms necessarily support this API ... */ | 8 | /* not all ARM platforms necessarily support this API ... */ |
5 | #include <mach/gpio.h> | 9 | #include <mach/gpio.h> |
6 | 10 | ||
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h index ddf07a92a6c8..436e60b2cf7a 100644 --- a/arch/arm/include/asm/hardirq.h +++ b/arch/arm/include/asm/hardirq.h | |||
@@ -27,23 +27,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu); | |||
27 | 27 | ||
28 | #define arch_irq_stat_cpu smp_irq_stat_cpu | 28 | #define arch_irq_stat_cpu smp_irq_stat_cpu |
29 | 29 | ||
30 | #if NR_IRQS > 512 | ||
31 | #define HARDIRQ_BITS 10 | ||
32 | #elif NR_IRQS > 256 | ||
33 | #define HARDIRQ_BITS 9 | ||
34 | #else | ||
35 | #define HARDIRQ_BITS 8 | ||
36 | #endif | ||
37 | |||
38 | /* | ||
39 | * The hardirq mask has to be large enough to have space | ||
40 | * for potentially all IRQ sources in the system nesting | ||
41 | * on a single CPU: | ||
42 | */ | ||
43 | #if (1 << HARDIRQ_BITS) < NR_IRQS | ||
44 | # error HARDIRQ_BITS is too low! | ||
45 | #endif | ||
46 | |||
47 | #define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 | 30 | #define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 |
48 | 31 | ||
49 | #endif /* __ASM_HARDIRQ_H */ | 32 | #endif /* __ASM_HARDIRQ_H */ |
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h index 5daea2961d48..077c32326c63 100644 --- a/arch/arm/include/asm/hardware/iop3xx.h +++ b/arch/arm/include/asm/hardware/iop3xx.h | |||
@@ -234,6 +234,7 @@ extern int iop3xx_get_init_atu(void); | |||
234 | void iop3xx_map_io(void); | 234 | void iop3xx_map_io(void); |
235 | void iop_init_cp6_handler(void); | 235 | void iop_init_cp6_handler(void); |
236 | void iop_init_time(unsigned long tickrate); | 236 | void iop_init_time(unsigned long tickrate); |
237 | void iop3xx_restart(char, const char *); | ||
237 | 238 | ||
238 | static inline u32 read_tmr0(void) | 239 | static inline u32 read_tmr0(void) |
239 | { | 240 | { |
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h new file mode 100644 index 000000000000..c0efdd60966f --- /dev/null +++ b/arch/arm/include/asm/opcodes.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/opcodes.h | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARM_OPCODES_H | ||
10 | #define __ASM_ARM_OPCODES_H | ||
11 | |||
12 | #ifndef __ASSEMBLY__ | ||
13 | extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); | ||
14 | #endif | ||
15 | |||
16 | #define ARM_OPCODE_CONDTEST_FAIL 0 | ||
17 | #define ARM_OPCODE_CONDTEST_PASS 1 | ||
18 | #define ARM_OPCODE_CONDTEST_UNCOND 2 | ||
19 | |||
20 | #endif /* __ASM_ARM_OPCODES_H */ | ||
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 3f2f0eb76211..f66626d71e7d 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h | |||
@@ -42,13 +42,6 @@ | |||
42 | #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) | 42 | #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) |
43 | #define VMALLOC_END 0xff000000UL | 43 | #define VMALLOC_END 0xff000000UL |
44 | 44 | ||
45 | /* This is a temporary hack until shmobile's DMA area size is sorted out */ | ||
46 | #ifdef CONFIG_ARCH_SHMOBILE | ||
47 | #warning "SH-Mobile's consistent DMA size conflicts with VMALLOC_END by 144MB" | ||
48 | #undef VMALLOC_END | ||
49 | #define VMALLOC_END 0xF6000000UL | ||
50 | #endif | ||
51 | |||
52 | #define LIBRARY_TEXT_START 0x0c000000 | 45 | #define LIBRARY_TEXT_START 0x0c000000 |
53 | 46 | ||
54 | #ifndef __ASSEMBLY__ | 47 | #ifndef __ASSEMBLY__ |
@@ -306,6 +299,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | |||
306 | * We provide our own arch_get_unmapped_area to cope with VIPT caches. | 299 | * We provide our own arch_get_unmapped_area to cope with VIPT caches. |
307 | */ | 300 | */ |
308 | #define HAVE_ARCH_UNMAPPED_AREA | 301 | #define HAVE_ARCH_UNMAPPED_AREA |
302 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | ||
309 | 303 | ||
310 | /* | 304 | /* |
311 | * remap a physical page `pfn' of size `size' with page protection `prot' | 305 | * remap a physical page `pfn' of size `size' with page protection `prot' |
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h index b2d9df5667af..ce280b8d613c 100644 --- a/arch/arm/include/asm/processor.h +++ b/arch/arm/include/asm/processor.h | |||
@@ -123,6 +123,8 @@ static inline void prefetch(const void *ptr) | |||
123 | 123 | ||
124 | #endif | 124 | #endif |
125 | 125 | ||
126 | #define HAVE_ARCH_PICK_MMAP_LAYOUT | ||
127 | |||
126 | #endif | 128 | #endif |
127 | 129 | ||
128 | #endif /* __ASM_ARM_PROCESSOR_H */ | 130 | #endif /* __ASM_ARM_PROCESSOR_H */ |
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h index c8e6ddf3e860..e3f757263438 100644 --- a/arch/arm/include/asm/sched_clock.h +++ b/arch/arm/include/asm/sched_clock.h | |||
@@ -8,113 +8,7 @@ | |||
8 | #ifndef ASM_SCHED_CLOCK | 8 | #ifndef ASM_SCHED_CLOCK |
9 | #define ASM_SCHED_CLOCK | 9 | #define ASM_SCHED_CLOCK |
10 | 10 | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | |||
14 | struct clock_data { | ||
15 | u64 epoch_ns; | ||
16 | u32 epoch_cyc; | ||
17 | u32 epoch_cyc_copy; | ||
18 | u32 mult; | ||
19 | u32 shift; | ||
20 | }; | ||
21 | |||
22 | #define DEFINE_CLOCK_DATA(name) struct clock_data name | ||
23 | |||
24 | static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) | ||
25 | { | ||
26 | return (cyc * mult) >> shift; | ||
27 | } | ||
28 | |||
29 | /* | ||
30 | * Atomically update the sched_clock epoch. Your update callback will | ||
31 | * be called from a timer before the counter wraps - read the current | ||
32 | * counter value, and call this function to safely move the epochs | ||
33 | * forward. Only use this from the update callback. | ||
34 | */ | ||
35 | static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask) | ||
36 | { | ||
37 | unsigned long flags; | ||
38 | u64 ns = cd->epoch_ns + | ||
39 | cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift); | ||
40 | |||
41 | /* | ||
42 | * Write epoch_cyc and epoch_ns in a way that the update is | ||
43 | * detectable in cyc_to_fixed_sched_clock(). | ||
44 | */ | ||
45 | raw_local_irq_save(flags); | ||
46 | cd->epoch_cyc = cyc; | ||
47 | smp_wmb(); | ||
48 | cd->epoch_ns = ns; | ||
49 | smp_wmb(); | ||
50 | cd->epoch_cyc_copy = cyc; | ||
51 | raw_local_irq_restore(flags); | ||
52 | } | ||
53 | |||
54 | /* | ||
55 | * If your clock rate is known at compile time, using this will allow | ||
56 | * you to optimize the mult/shift loads away. This is paired with | ||
57 | * init_fixed_sched_clock() to ensure that your mult/shift are correct. | ||
58 | */ | ||
59 | static inline unsigned long long cyc_to_fixed_sched_clock(struct clock_data *cd, | ||
60 | u32 cyc, u32 mask, u32 mult, u32 shift) | ||
61 | { | ||
62 | u64 epoch_ns; | ||
63 | u32 epoch_cyc; | ||
64 | |||
65 | /* | ||
66 | * Load the epoch_cyc and epoch_ns atomically. We do this by | ||
67 | * ensuring that we always write epoch_cyc, epoch_ns and | ||
68 | * epoch_cyc_copy in strict order, and read them in strict order. | ||
69 | * If epoch_cyc and epoch_cyc_copy are not equal, then we're in | ||
70 | * the middle of an update, and we should repeat the load. | ||
71 | */ | ||
72 | do { | ||
73 | epoch_cyc = cd->epoch_cyc; | ||
74 | smp_rmb(); | ||
75 | epoch_ns = cd->epoch_ns; | ||
76 | smp_rmb(); | ||
77 | } while (epoch_cyc != cd->epoch_cyc_copy); | ||
78 | |||
79 | return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, mult, shift); | ||
80 | } | ||
81 | |||
82 | /* | ||
83 | * Otherwise, you need to use this, which will obtain the mult/shift | ||
84 | * from the clock_data structure. Use init_sched_clock() with this. | ||
85 | */ | ||
86 | static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd, | ||
87 | u32 cyc, u32 mask) | ||
88 | { | ||
89 | return cyc_to_fixed_sched_clock(cd, cyc, mask, cd->mult, cd->shift); | ||
90 | } | ||
91 | |||
92 | /* | ||
93 | * Initialize the clock data - calculate the appropriate multiplier | ||
94 | * and shift. Also setup a timer to ensure that the epoch is refreshed | ||
95 | * at the appropriate time interval, which will call your update | ||
96 | * handler. | ||
97 | */ | ||
98 | void init_sched_clock(struct clock_data *, void (*)(void), | ||
99 | unsigned int, unsigned long); | ||
100 | |||
101 | /* | ||
102 | * Use this initialization function rather than init_sched_clock() if | ||
103 | * you're using cyc_to_fixed_sched_clock, which will warn if your | ||
104 | * constants are incorrect. | ||
105 | */ | ||
106 | static inline void init_fixed_sched_clock(struct clock_data *cd, | ||
107 | void (*update)(void), unsigned int bits, unsigned long rate, | ||
108 | u32 mult, u32 shift) | ||
109 | { | ||
110 | init_sched_clock(cd, update, bits, rate); | ||
111 | if (cd->mult != mult || cd->shift != shift) { | ||
112 | pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n" | ||
113 | "sched_clock: fix multiply/shift to avoid scheduler hiccups\n", | ||
114 | mult, shift, cd->mult, cd->shift); | ||
115 | } | ||
116 | } | ||
117 | |||
118 | extern void sched_clock_postinit(void); | 11 | extern void sched_clock_postinit(void); |
12 | extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); | ||
119 | 13 | ||
120 | #endif | 14 | #endif |
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index 915696dd9c7c..23ebc0c82a39 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h | |||
@@ -192,11 +192,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn } | |||
192 | /* | 192 | /* |
193 | * Memory map description | 193 | * Memory map description |
194 | */ | 194 | */ |
195 | #ifdef CONFIG_ARCH_EP93XX | 195 | #define NR_BANKS CONFIG_ARM_NR_BANKS |
196 | # define NR_BANKS 16 | ||
197 | #else | ||
198 | # define NR_BANKS 8 | ||
199 | #endif | ||
200 | 196 | ||
201 | struct membank { | 197 | struct membank { |
202 | phys_addr_t start; | 198 | phys_addr_t start; |
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h index 9997ad20eff1..32ee164a2f6b 100644 --- a/arch/arm/include/asm/swab.h +++ b/arch/arm/include/asm/swab.h | |||
@@ -24,12 +24,13 @@ | |||
24 | 24 | ||
25 | #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6 | 25 | #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6 |
26 | 26 | ||
27 | static inline __attribute_const__ __u16 __arch_swab16(__u16 x) | 27 | static inline __attribute_const__ __u32 __arch_swahb32(__u32 x) |
28 | { | 28 | { |
29 | __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x)); | 29 | __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x)); |
30 | return x; | 30 | return x; |
31 | } | 31 | } |
32 | #define __arch_swab16 __arch_swab16 | 32 | #define __arch_swahb32 __arch_swahb32 |
33 | #define __arch_swab16(x) ((__u16)__arch_swahb32(x)) | ||
33 | 34 | ||
34 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) | 35 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) |
35 | { | 36 | { |
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 53785828744c..e4c96cc6ec0c 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
@@ -108,7 +108,6 @@ extern void __show_regs(struct pt_regs *); | |||
108 | extern int __pure cpu_architecture(void); | 108 | extern int __pure cpu_architecture(void); |
109 | extern void cpu_init(void); | 109 | extern void cpu_init(void); |
110 | 110 | ||
111 | void arm_machine_restart(char mode, const char *cmd); | ||
112 | void soft_restart(unsigned long); | 111 | void soft_restart(unsigned long); |
113 | extern void (*arm_pm_restart)(char str, const char *cmd); | 112 | extern void (*arm_pm_restart)(char str, const char *cmd); |
114 | 113 | ||
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 16eed6aebfa4..43b740d0e374 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -13,7 +13,7 @@ CFLAGS_REMOVE_return_address.o = -pg | |||
13 | 13 | ||
14 | # Object file lists. | 14 | # Object file lists. |
15 | 15 | ||
16 | obj-y := elf.o entry-armv.o entry-common.o irq.o \ | 16 | obj-y := elf.o entry-armv.o entry-common.o irq.o opcodes.o \ |
17 | process.o ptrace.o return_address.o setup.o signal.o \ | 17 | process.o ptrace.o return_address.o setup.o signal.o \ |
18 | sys_arm.o stacktrace.o time.o traps.o | 18 | sys_arm.o stacktrace.o time.o traps.o |
19 | 19 | ||
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c index e17cdd6d90d8..1862d8f2fd44 100644 --- a/arch/arm/kernel/kprobes-test.c +++ b/arch/arm/kernel/kprobes-test.c | |||
@@ -202,6 +202,8 @@ | |||
202 | #include <linux/slab.h> | 202 | #include <linux/slab.h> |
203 | #include <linux/kprobes.h> | 203 | #include <linux/kprobes.h> |
204 | 204 | ||
205 | #include <asm/opcodes.h> | ||
206 | |||
205 | #include "kprobes.h" | 207 | #include "kprobes.h" |
206 | #include "kprobes-test.h" | 208 | #include "kprobes-test.h" |
207 | 209 | ||
@@ -1050,65 +1052,9 @@ static int test_instance; | |||
1050 | 1052 | ||
1051 | static unsigned long test_check_cc(int cc, unsigned long cpsr) | 1053 | static unsigned long test_check_cc(int cc, unsigned long cpsr) |
1052 | { | 1054 | { |
1053 | unsigned long temp; | 1055 | int ret = arm_check_condition(cc << 28, cpsr); |
1054 | |||
1055 | switch (cc) { | ||
1056 | case 0x0: /* eq */ | ||
1057 | return cpsr & PSR_Z_BIT; | ||
1058 | |||
1059 | case 0x1: /* ne */ | ||
1060 | return (~cpsr) & PSR_Z_BIT; | ||
1061 | |||
1062 | case 0x2: /* cs */ | ||
1063 | return cpsr & PSR_C_BIT; | ||
1064 | |||
1065 | case 0x3: /* cc */ | ||
1066 | return (~cpsr) & PSR_C_BIT; | ||
1067 | |||
1068 | case 0x4: /* mi */ | ||
1069 | return cpsr & PSR_N_BIT; | ||
1070 | |||
1071 | case 0x5: /* pl */ | ||
1072 | return (~cpsr) & PSR_N_BIT; | ||
1073 | |||
1074 | case 0x6: /* vs */ | ||
1075 | return cpsr & PSR_V_BIT; | ||
1076 | |||
1077 | case 0x7: /* vc */ | ||
1078 | return (~cpsr) & PSR_V_BIT; | ||
1079 | 1056 | ||
1080 | case 0x8: /* hi */ | 1057 | return (ret != ARM_OPCODE_CONDTEST_FAIL); |
1081 | cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ | ||
1082 | return cpsr & PSR_C_BIT; | ||
1083 | |||
1084 | case 0x9: /* ls */ | ||
1085 | cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ | ||
1086 | return (~cpsr) & PSR_C_BIT; | ||
1087 | |||
1088 | case 0xa: /* ge */ | ||
1089 | cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | ||
1090 | return (~cpsr) & PSR_N_BIT; | ||
1091 | |||
1092 | case 0xb: /* lt */ | ||
1093 | cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | ||
1094 | return cpsr & PSR_N_BIT; | ||
1095 | |||
1096 | case 0xc: /* gt */ | ||
1097 | temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | ||
1098 | temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */ | ||
1099 | return (~temp) & PSR_N_BIT; | ||
1100 | |||
1101 | case 0xd: /* le */ | ||
1102 | temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | ||
1103 | temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */ | ||
1104 | return temp & PSR_N_BIT; | ||
1105 | |||
1106 | case 0xe: /* al */ | ||
1107 | case 0xf: /* unconditional */ | ||
1108 | return true; | ||
1109 | } | ||
1110 | BUG(); | ||
1111 | return false; | ||
1112 | } | 1058 | } |
1113 | 1059 | ||
1114 | static int is_last_scenario; | 1060 | static int is_last_scenario; |
@@ -1128,7 +1074,9 @@ static unsigned long test_context_cpsr(int scenario) | |||
1128 | 1074 | ||
1129 | if (!test_case_is_thumb) { | 1075 | if (!test_case_is_thumb) { |
1130 | /* Testing ARM code */ | 1076 | /* Testing ARM code */ |
1131 | probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0; | 1077 | int cc = current_instruction >> 28; |
1078 | |||
1079 | probe_should_run = test_check_cc(cc, cpsr) != 0; | ||
1132 | if (scenario == 15) | 1080 | if (scenario == 15) |
1133 | is_last_scenario = true; | 1081 | is_last_scenario = true; |
1134 | 1082 | ||
diff --git a/arch/arm/kernel/opcodes.c b/arch/arm/kernel/opcodes.c new file mode 100644 index 000000000000..f8179c6a817f --- /dev/null +++ b/arch/arm/kernel/opcodes.c | |||
@@ -0,0 +1,72 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/kernel/opcodes.c | ||
3 | * | ||
4 | * A32 condition code lookup feature moved from nwfpe/fpopcode.c | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/module.h> | ||
12 | #include <asm/opcodes.h> | ||
13 | |||
14 | #define ARM_OPCODE_CONDITION_UNCOND 0xf | ||
15 | |||
16 | /* | ||
17 | * condition code lookup table | ||
18 | * index into the table is test code: EQ, NE, ... LT, GT, AL, NV | ||
19 | * | ||
20 | * bit position in short is condition code: NZCV | ||
21 | */ | ||
22 | static const unsigned short cc_map[16] = { | ||
23 | 0xF0F0, /* EQ == Z set */ | ||
24 | 0x0F0F, /* NE */ | ||
25 | 0xCCCC, /* CS == C set */ | ||
26 | 0x3333, /* CC */ | ||
27 | 0xFF00, /* MI == N set */ | ||
28 | 0x00FF, /* PL */ | ||
29 | 0xAAAA, /* VS == V set */ | ||
30 | 0x5555, /* VC */ | ||
31 | 0x0C0C, /* HI == C set && Z clear */ | ||
32 | 0xF3F3, /* LS == C clear || Z set */ | ||
33 | 0xAA55, /* GE == (N==V) */ | ||
34 | 0x55AA, /* LT == (N!=V) */ | ||
35 | 0x0A05, /* GT == (!Z && (N==V)) */ | ||
36 | 0xF5FA, /* LE == (Z || (N!=V)) */ | ||
37 | 0xFFFF, /* AL always */ | ||
38 | 0 /* NV */ | ||
39 | }; | ||
40 | |||
41 | /* | ||
42 | * Returns: | ||
43 | * ARM_OPCODE_CONDTEST_FAIL - if condition fails | ||
44 | * ARM_OPCODE_CONDTEST_PASS - if condition passes (including AL) | ||
45 | * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional | ||
46 | * opcode space from v5 onwards | ||
47 | * | ||
48 | * Code that tests whether a conditional instruction would pass its condition | ||
49 | * check should check that return value == ARM_OPCODE_CONDTEST_PASS. | ||
50 | * | ||
51 | * Code that tests if a condition means that the instruction would be executed | ||
52 | * (regardless of conditional or unconditional) should instead check that the | ||
53 | * return value != ARM_OPCODE_CONDTEST_FAIL. | ||
54 | */ | ||
55 | asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr) | ||
56 | { | ||
57 | u32 cc_bits = opcode >> 28; | ||
58 | u32 psr_cond = psr >> 28; | ||
59 | unsigned int ret; | ||
60 | |||
61 | if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) { | ||
62 | if ((cc_map[cc_bits] >> (psr_cond)) & 1) | ||
63 | ret = ARM_OPCODE_CONDTEST_PASS; | ||
64 | else | ||
65 | ret = ARM_OPCODE_CONDTEST_FAIL; | ||
66 | } else { | ||
67 | ret = ARM_OPCODE_CONDTEST_UNCOND; | ||
68 | } | ||
69 | |||
70 | return ret; | ||
71 | } | ||
72 | EXPORT_SYMBOL_GPL(arm_check_condition); | ||
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 423bb2019451..b29776aa6586 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -147,14 +147,8 @@ void soft_restart(unsigned long addr) | |||
147 | BUG(); | 147 | BUG(); |
148 | } | 148 | } |
149 | 149 | ||
150 | void arm_machine_restart(char mode, const char *cmd) | 150 | static void null_restart(char mode, const char *cmd) |
151 | { | 151 | { |
152 | /* Disable interrupts first */ | ||
153 | local_irq_disable(); | ||
154 | local_fiq_disable(); | ||
155 | |||
156 | /* Call the architecture specific reboot code. */ | ||
157 | arch_reset(mode, cmd); | ||
158 | } | 152 | } |
159 | 153 | ||
160 | /* | 154 | /* |
@@ -163,7 +157,7 @@ void arm_machine_restart(char mode, const char *cmd) | |||
163 | void (*pm_power_off)(void); | 157 | void (*pm_power_off)(void); |
164 | EXPORT_SYMBOL(pm_power_off); | 158 | EXPORT_SYMBOL(pm_power_off); |
165 | 159 | ||
166 | void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart; | 160 | void (*arm_pm_restart)(char str, const char *cmd) = null_restart; |
167 | EXPORT_SYMBOL_GPL(arm_pm_restart); | 161 | EXPORT_SYMBOL_GPL(arm_pm_restart); |
168 | 162 | ||
169 | static void do_nothing(void *unused) | 163 | static void do_nothing(void *unused) |
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index 9a46370fe9da..5416c7c12528 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c | |||
@@ -14,61 +14,153 @@ | |||
14 | 14 | ||
15 | #include <asm/sched_clock.h> | 15 | #include <asm/sched_clock.h> |
16 | 16 | ||
17 | struct clock_data { | ||
18 | u64 epoch_ns; | ||
19 | u32 epoch_cyc; | ||
20 | u32 epoch_cyc_copy; | ||
21 | u32 mult; | ||
22 | u32 shift; | ||
23 | }; | ||
24 | |||
17 | static void sched_clock_poll(unsigned long wrap_ticks); | 25 | static void sched_clock_poll(unsigned long wrap_ticks); |
18 | static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0); | 26 | static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0); |
19 | static void (*sched_clock_update_fn)(void); | 27 | |
28 | static struct clock_data cd = { | ||
29 | .mult = NSEC_PER_SEC / HZ, | ||
30 | }; | ||
31 | |||
32 | static u32 __read_mostly sched_clock_mask = 0xffffffff; | ||
33 | |||
34 | static u32 notrace jiffy_sched_clock_read(void) | ||
35 | { | ||
36 | return (u32)(jiffies - INITIAL_JIFFIES); | ||
37 | } | ||
38 | |||
39 | static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read; | ||
40 | |||
41 | static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) | ||
42 | { | ||
43 | return (cyc * mult) >> shift; | ||
44 | } | ||
45 | |||
46 | static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask) | ||
47 | { | ||
48 | u64 epoch_ns; | ||
49 | u32 epoch_cyc; | ||
50 | |||
51 | /* | ||
52 | * Load the epoch_cyc and epoch_ns atomically. We do this by | ||
53 | * ensuring that we always write epoch_cyc, epoch_ns and | ||
54 | * epoch_cyc_copy in strict order, and read them in strict order. | ||
55 | * If epoch_cyc and epoch_cyc_copy are not equal, then we're in | ||
56 | * the middle of an update, and we should repeat the load. | ||
57 | */ | ||
58 | do { | ||
59 | epoch_cyc = cd.epoch_cyc; | ||
60 | smp_rmb(); | ||
61 | epoch_ns = cd.epoch_ns; | ||
62 | smp_rmb(); | ||
63 | } while (epoch_cyc != cd.epoch_cyc_copy); | ||
64 | |||
65 | return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift); | ||
66 | } | ||
67 | |||
68 | /* | ||
69 | * Atomically update the sched_clock epoch. | ||
70 | */ | ||
71 | static void notrace update_sched_clock(void) | ||
72 | { | ||
73 | unsigned long flags; | ||
74 | u32 cyc; | ||
75 | u64 ns; | ||
76 | |||
77 | cyc = read_sched_clock(); | ||
78 | ns = cd.epoch_ns + | ||
79 | cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask, | ||
80 | cd.mult, cd.shift); | ||
81 | /* | ||
82 | * Write epoch_cyc and epoch_ns in a way that the update is | ||
83 | * detectable in cyc_to_fixed_sched_clock(). | ||
84 | */ | ||
85 | raw_local_irq_save(flags); | ||
86 | cd.epoch_cyc = cyc; | ||
87 | smp_wmb(); | ||
88 | cd.epoch_ns = ns; | ||
89 | smp_wmb(); | ||
90 | cd.epoch_cyc_copy = cyc; | ||
91 | raw_local_irq_restore(flags); | ||
92 | } | ||
20 | 93 | ||
21 | static void sched_clock_poll(unsigned long wrap_ticks) | 94 | static void sched_clock_poll(unsigned long wrap_ticks) |
22 | { | 95 | { |
23 | mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks)); | 96 | mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks)); |
24 | sched_clock_update_fn(); | 97 | update_sched_clock(); |
25 | } | 98 | } |
26 | 99 | ||
27 | void __init init_sched_clock(struct clock_data *cd, void (*update)(void), | 100 | void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) |
28 | unsigned int clock_bits, unsigned long rate) | ||
29 | { | 101 | { |
30 | unsigned long r, w; | 102 | unsigned long r, w; |
31 | u64 res, wrap; | 103 | u64 res, wrap; |
32 | char r_unit; | 104 | char r_unit; |
33 | 105 | ||
34 | sched_clock_update_fn = update; | 106 | BUG_ON(bits > 32); |
107 | WARN_ON(!irqs_disabled()); | ||
108 | WARN_ON(read_sched_clock != jiffy_sched_clock_read); | ||
109 | read_sched_clock = read; | ||
110 | sched_clock_mask = (1 << bits) - 1; | ||
35 | 111 | ||
36 | /* calculate the mult/shift to convert counter ticks to ns. */ | 112 | /* calculate the mult/shift to convert counter ticks to ns. */ |
37 | clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0); | 113 | clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0); |
38 | 114 | ||
39 | r = rate; | 115 | r = rate; |
40 | if (r >= 4000000) { | 116 | if (r >= 4000000) { |
41 | r /= 1000000; | 117 | r /= 1000000; |
42 | r_unit = 'M'; | 118 | r_unit = 'M'; |
43 | } else { | 119 | } else if (r >= 1000) { |
44 | r /= 1000; | 120 | r /= 1000; |
45 | r_unit = 'k'; | 121 | r_unit = 'k'; |
46 | } | 122 | } else |
123 | r_unit = ' '; | ||
47 | 124 | ||
48 | /* calculate how many ns until we wrap */ | 125 | /* calculate how many ns until we wrap */ |
49 | wrap = cyc_to_ns((1ULL << clock_bits) - 1, cd->mult, cd->shift); | 126 | wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift); |
50 | do_div(wrap, NSEC_PER_MSEC); | 127 | do_div(wrap, NSEC_PER_MSEC); |
51 | w = wrap; | 128 | w = wrap; |
52 | 129 | ||
53 | /* calculate the ns resolution of this counter */ | 130 | /* calculate the ns resolution of this counter */ |
54 | res = cyc_to_ns(1ULL, cd->mult, cd->shift); | 131 | res = cyc_to_ns(1ULL, cd.mult, cd.shift); |
55 | pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n", | 132 | pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n", |
56 | clock_bits, r, r_unit, res, w); | 133 | bits, r, r_unit, res, w); |
57 | 134 | ||
58 | /* | 135 | /* |
59 | * Start the timer to keep sched_clock() properly updated and | 136 | * Start the timer to keep sched_clock() properly updated and |
60 | * sets the initial epoch. | 137 | * sets the initial epoch. |
61 | */ | 138 | */ |
62 | sched_clock_timer.data = msecs_to_jiffies(w - (w / 10)); | 139 | sched_clock_timer.data = msecs_to_jiffies(w - (w / 10)); |
63 | update(); | 140 | update_sched_clock(); |
64 | 141 | ||
65 | /* | 142 | /* |
66 | * Ensure that sched_clock() starts off at 0ns | 143 | * Ensure that sched_clock() starts off at 0ns |
67 | */ | 144 | */ |
68 | cd->epoch_ns = 0; | 145 | cd.epoch_ns = 0; |
146 | |||
147 | pr_debug("Registered %pF as sched_clock source\n", read); | ||
148 | } | ||
149 | |||
150 | unsigned long long notrace sched_clock(void) | ||
151 | { | ||
152 | u32 cyc = read_sched_clock(); | ||
153 | return cyc_to_sched_clock(cyc, sched_clock_mask); | ||
69 | } | 154 | } |
70 | 155 | ||
71 | void __init sched_clock_postinit(void) | 156 | void __init sched_clock_postinit(void) |
72 | { | 157 | { |
158 | /* | ||
159 | * If no sched_clock function has been provided at that point, | ||
160 | * make it the final one one. | ||
161 | */ | ||
162 | if (read_sched_clock == jiffy_sched_clock_read) | ||
163 | setup_sched_clock(jiffy_sched_clock_read, 32, HZ); | ||
164 | |||
73 | sched_clock_poll(sched_clock_timer.data); | 165 | sched_clock_poll(sched_clock_timer.data); |
74 | } | 166 | } |
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index a8a6682d6b52..c8e938553d47 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c | |||
@@ -10,8 +10,11 @@ | |||
10 | */ | 10 | */ |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/clk.h> | ||
14 | #include <linux/cpufreq.h> | ||
13 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
14 | #include <linux/device.h> | 16 | #include <linux/device.h> |
17 | #include <linux/err.h> | ||
15 | #include <linux/smp.h> | 18 | #include <linux/smp.h> |
16 | #include <linux/jiffies.h> | 19 | #include <linux/jiffies.h> |
17 | #include <linux/clockchips.h> | 20 | #include <linux/clockchips.h> |
@@ -25,6 +28,7 @@ | |||
25 | /* set up by the platform code */ | 28 | /* set up by the platform code */ |
26 | void __iomem *twd_base; | 29 | void __iomem *twd_base; |
27 | 30 | ||
31 | static struct clk *twd_clk; | ||
28 | static unsigned long twd_timer_rate; | 32 | static unsigned long twd_timer_rate; |
29 | 33 | ||
30 | static struct clock_event_device __percpu **twd_evt; | 34 | static struct clock_event_device __percpu **twd_evt; |
@@ -89,6 +93,52 @@ void twd_timer_stop(struct clock_event_device *clk) | |||
89 | disable_percpu_irq(clk->irq); | 93 | disable_percpu_irq(clk->irq); |
90 | } | 94 | } |
91 | 95 | ||
96 | #ifdef CONFIG_CPU_FREQ | ||
97 | |||
98 | /* | ||
99 | * Updates clockevent frequency when the cpu frequency changes. | ||
100 | * Called on the cpu that is changing frequency with interrupts disabled. | ||
101 | */ | ||
102 | static void twd_update_frequency(void *data) | ||
103 | { | ||
104 | twd_timer_rate = clk_get_rate(twd_clk); | ||
105 | |||
106 | clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate); | ||
107 | } | ||
108 | |||
109 | static int twd_cpufreq_transition(struct notifier_block *nb, | ||
110 | unsigned long state, void *data) | ||
111 | { | ||
112 | struct cpufreq_freqs *freqs = data; | ||
113 | |||
114 | /* | ||
115 | * The twd clock events must be reprogrammed to account for the new | ||
116 | * frequency. The timer is local to a cpu, so cross-call to the | ||
117 | * changing cpu. | ||
118 | */ | ||
119 | if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE) | ||
120 | smp_call_function_single(freqs->cpu, twd_update_frequency, | ||
121 | NULL, 1); | ||
122 | |||
123 | return NOTIFY_OK; | ||
124 | } | ||
125 | |||
126 | static struct notifier_block twd_cpufreq_nb = { | ||
127 | .notifier_call = twd_cpufreq_transition, | ||
128 | }; | ||
129 | |||
130 | static int twd_cpufreq_init(void) | ||
131 | { | ||
132 | if (!IS_ERR(twd_clk)) | ||
133 | return cpufreq_register_notifier(&twd_cpufreq_nb, | ||
134 | CPUFREQ_TRANSITION_NOTIFIER); | ||
135 | |||
136 | return 0; | ||
137 | } | ||
138 | core_initcall(twd_cpufreq_init); | ||
139 | |||
140 | #endif | ||
141 | |||
92 | static void __cpuinit twd_calibrate_rate(void) | 142 | static void __cpuinit twd_calibrate_rate(void) |
93 | { | 143 | { |
94 | unsigned long count; | 144 | unsigned long count; |
@@ -140,6 +190,35 @@ static irqreturn_t twd_handler(int irq, void *dev_id) | |||
140 | return IRQ_NONE; | 190 | return IRQ_NONE; |
141 | } | 191 | } |
142 | 192 | ||
193 | static struct clk *twd_get_clock(void) | ||
194 | { | ||
195 | struct clk *clk; | ||
196 | int err; | ||
197 | |||
198 | clk = clk_get_sys("smp_twd", NULL); | ||
199 | if (IS_ERR(clk)) { | ||
200 | pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk)); | ||
201 | return clk; | ||
202 | } | ||
203 | |||
204 | err = clk_prepare(clk); | ||
205 | if (err) { | ||
206 | pr_err("smp_twd: clock failed to prepare: %d\n", err); | ||
207 | clk_put(clk); | ||
208 | return ERR_PTR(err); | ||
209 | } | ||
210 | |||
211 | err = clk_enable(clk); | ||
212 | if (err) { | ||
213 | pr_err("smp_twd: clock failed to enable: %d\n", err); | ||
214 | clk_unprepare(clk); | ||
215 | clk_put(clk); | ||
216 | return ERR_PTR(err); | ||
217 | } | ||
218 | |||
219 | return clk; | ||
220 | } | ||
221 | |||
143 | /* | 222 | /* |
144 | * Setup the local clock events for a CPU. | 223 | * Setup the local clock events for a CPU. |
145 | */ | 224 | */ |
@@ -165,7 +244,13 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) | |||
165 | } | 244 | } |
166 | } | 245 | } |
167 | 246 | ||
168 | twd_calibrate_rate(); | 247 | if (!twd_clk) |
248 | twd_clk = twd_get_clock(); | ||
249 | |||
250 | if (!IS_ERR_OR_NULL(twd_clk)) | ||
251 | twd_timer_rate = clk_get_rate(twd_clk); | ||
252 | else | ||
253 | twd_calibrate_rate(); | ||
169 | 254 | ||
170 | clk->name = "local_timer"; | 255 | clk->name = "local_timer"; |
171 | clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | | 256 | clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | |
@@ -173,15 +258,11 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) | |||
173 | clk->rating = 350; | 258 | clk->rating = 350; |
174 | clk->set_mode = twd_set_mode; | 259 | clk->set_mode = twd_set_mode; |
175 | clk->set_next_event = twd_set_next_event; | 260 | clk->set_next_event = twd_set_next_event; |
176 | clk->shift = 20; | ||
177 | clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift); | ||
178 | clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); | ||
179 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); | ||
180 | 261 | ||
181 | this_cpu_clk = __this_cpu_ptr(twd_evt); | 262 | this_cpu_clk = __this_cpu_ptr(twd_evt); |
182 | *this_cpu_clk = clk; | 263 | *this_cpu_clk = clk; |
183 | 264 | ||
184 | clockevents_register_device(clk); | 265 | clockevents_config_and_register(clk, twd_timer_rate, |
185 | 266 | 0xf, 0xffffffff); | |
186 | enable_percpu_irq(clk->irq, 0); | 267 | enable_percpu_irq(clk->irq, 0); |
187 | } | 268 | } |
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c index 5f452f8fde05..df745188f5de 100644 --- a/arch/arm/kernel/swp_emulate.c +++ b/arch/arm/kernel/swp_emulate.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/syscalls.h> | 25 | #include <linux/syscalls.h> |
26 | #include <linux/perf_event.h> | 26 | #include <linux/perf_event.h> |
27 | 27 | ||
28 | #include <asm/opcodes.h> | ||
28 | #include <asm/traps.h> | 29 | #include <asm/traps.h> |
29 | #include <asm/uaccess.h> | 30 | #include <asm/uaccess.h> |
30 | 31 | ||
@@ -185,6 +186,21 @@ static int swp_handler(struct pt_regs *regs, unsigned int instr) | |||
185 | 186 | ||
186 | perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); | 187 | perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); |
187 | 188 | ||
189 | res = arm_check_condition(instr, regs->ARM_cpsr); | ||
190 | switch (res) { | ||
191 | case ARM_OPCODE_CONDTEST_PASS: | ||
192 | break; | ||
193 | case ARM_OPCODE_CONDTEST_FAIL: | ||
194 | /* Condition failed - return to next instruction */ | ||
195 | regs->ARM_pc += 4; | ||
196 | return 0; | ||
197 | case ARM_OPCODE_CONDTEST_UNCOND: | ||
198 | /* If unconditional encoding - not a SWP, undef */ | ||
199 | return -EFAULT; | ||
200 | default: | ||
201 | return -EINVAL; | ||
202 | } | ||
203 | |||
188 | if (current->pid != previous_pid) { | 204 | if (current->pid != previous_pid) { |
189 | pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", | 205 | pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", |
190 | current->comm, (unsigned long)current->pid); | 206 | current->comm, (unsigned long)current->pid); |
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c index 30e302d33e0a..01ec453bb924 100644 --- a/arch/arm/kernel/tcm.c +++ b/arch/arm/kernel/tcm.c | |||
@@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, | |||
180 | */ | 180 | */ |
181 | void __init tcm_init(void) | 181 | void __init tcm_init(void) |
182 | { | 182 | { |
183 | u32 tcm_status = read_cpuid_tcmstatus(); | 183 | u32 tcm_status; |
184 | u8 dtcm_banks = (tcm_status >> 16) & 0x03; | 184 | u8 dtcm_banks; |
185 | u8 itcm_banks = (tcm_status & 0x03); | 185 | u8 itcm_banks; |
186 | size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data; | 186 | size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data; |
187 | size_t itcm_code_sz = &__eitcm_text - &__sitcm_text; | 187 | size_t itcm_code_sz = &__eitcm_text - &__sitcm_text; |
188 | char *start; | 188 | char *start; |
@@ -191,6 +191,22 @@ void __init tcm_init(void) | |||
191 | int ret; | 191 | int ret; |
192 | int i; | 192 | int i; |
193 | 193 | ||
194 | /* | ||
195 | * Prior to ARMv5 there is no TCM, and trying to read the status | ||
196 | * register will hang the processor. | ||
197 | */ | ||
198 | if (cpu_architecture() < CPU_ARCH_ARMv5) { | ||
199 | if (dtcm_code_sz || itcm_code_sz) | ||
200 | pr_info("CPU TCM: %u bytes of DTCM and %u bytes of " | ||
201 | "ITCM code compiled in, but no TCM present " | ||
202 | "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz); | ||
203 | return; | ||
204 | } | ||
205 | |||
206 | tcm_status = read_cpuid_tcmstatus(); | ||
207 | dtcm_banks = (tcm_status >> 16) & 0x03; | ||
208 | itcm_banks = (tcm_status & 0x03); | ||
209 | |||
194 | /* Values greater than 2 for D/ITCM banks are "reserved" */ | 210 | /* Values greater than 2 for D/ITCM banks are "reserved" */ |
195 | if (dtcm_banks > 2) | 211 | if (dtcm_banks > 2) |
196 | dtcm_banks = 0; | 212 | dtcm_banks = 0; |
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index d111c3e99249..4f991f295284 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -3,6 +3,12 @@ if ARCH_AT91 | |||
3 | config HAVE_AT91_DATAFLASH_CARD | 3 | config HAVE_AT91_DATAFLASH_CARD |
4 | bool | 4 | bool |
5 | 5 | ||
6 | config HAVE_AT91_DBGU0 | ||
7 | bool | ||
8 | |||
9 | config HAVE_AT91_DBGU1 | ||
10 | bool | ||
11 | |||
6 | config HAVE_AT91_USART3 | 12 | config HAVE_AT91_USART3 |
7 | bool | 13 | bool |
8 | 14 | ||
@@ -21,12 +27,14 @@ config ARCH_AT91RM9200 | |||
21 | bool "AT91RM9200" | 27 | bool "AT91RM9200" |
22 | select CPU_ARM920T | 28 | select CPU_ARM920T |
23 | select GENERIC_CLOCKEVENTS | 29 | select GENERIC_CLOCKEVENTS |
30 | select HAVE_AT91_DBGU0 | ||
24 | select HAVE_AT91_USART3 | 31 | select HAVE_AT91_USART3 |
25 | 32 | ||
26 | config ARCH_AT91SAM9260 | 33 | config ARCH_AT91SAM9260 |
27 | bool "AT91SAM9260 or AT91SAM9XE" | 34 | bool "AT91SAM9260 or AT91SAM9XE" |
28 | select CPU_ARM926T | 35 | select CPU_ARM926T |
29 | select GENERIC_CLOCKEVENTS | 36 | select GENERIC_CLOCKEVENTS |
37 | select HAVE_AT91_DBGU0 | ||
30 | select HAVE_AT91_USART3 | 38 | select HAVE_AT91_USART3 |
31 | select HAVE_AT91_USART4 | 39 | select HAVE_AT91_USART4 |
32 | select HAVE_AT91_USART5 | 40 | select HAVE_AT91_USART5 |
@@ -37,11 +45,13 @@ config ARCH_AT91SAM9261 | |||
37 | select CPU_ARM926T | 45 | select CPU_ARM926T |
38 | select GENERIC_CLOCKEVENTS | 46 | select GENERIC_CLOCKEVENTS |
39 | select HAVE_FB_ATMEL | 47 | select HAVE_FB_ATMEL |
48 | select HAVE_AT91_DBGU0 | ||
40 | 49 | ||
41 | config ARCH_AT91SAM9G10 | 50 | config ARCH_AT91SAM9G10 |
42 | bool "AT91SAM9G10" | 51 | bool "AT91SAM9G10" |
43 | select CPU_ARM926T | 52 | select CPU_ARM926T |
44 | select GENERIC_CLOCKEVENTS | 53 | select GENERIC_CLOCKEVENTS |
54 | select HAVE_AT91_DBGU0 | ||
45 | select HAVE_FB_ATMEL | 55 | select HAVE_FB_ATMEL |
46 | 56 | ||
47 | config ARCH_AT91SAM9263 | 57 | config ARCH_AT91SAM9263 |
@@ -50,6 +60,7 @@ config ARCH_AT91SAM9263 | |||
50 | select GENERIC_CLOCKEVENTS | 60 | select GENERIC_CLOCKEVENTS |
51 | select HAVE_FB_ATMEL | 61 | select HAVE_FB_ATMEL |
52 | select HAVE_NET_MACB | 62 | select HAVE_NET_MACB |
63 | select HAVE_AT91_DBGU1 | ||
53 | 64 | ||
54 | config ARCH_AT91SAM9RL | 65 | config ARCH_AT91SAM9RL |
55 | bool "AT91SAM9RL" | 66 | bool "AT91SAM9RL" |
@@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL | |||
57 | select GENERIC_CLOCKEVENTS | 68 | select GENERIC_CLOCKEVENTS |
58 | select HAVE_AT91_USART3 | 69 | select HAVE_AT91_USART3 |
59 | select HAVE_FB_ATMEL | 70 | select HAVE_FB_ATMEL |
71 | select HAVE_AT91_DBGU0 | ||
60 | 72 | ||
61 | config ARCH_AT91SAM9G20 | 73 | config ARCH_AT91SAM9G20 |
62 | bool "AT91SAM9G20" | 74 | bool "AT91SAM9G20" |
63 | select CPU_ARM926T | 75 | select CPU_ARM926T |
64 | select GENERIC_CLOCKEVENTS | 76 | select GENERIC_CLOCKEVENTS |
77 | select HAVE_AT91_DBGU0 | ||
65 | select HAVE_AT91_USART3 | 78 | select HAVE_AT91_USART3 |
66 | select HAVE_AT91_USART4 | 79 | select HAVE_AT91_USART4 |
67 | select HAVE_AT91_USART5 | 80 | select HAVE_AT91_USART5 |
@@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45 | |||
74 | select HAVE_AT91_USART3 | 87 | select HAVE_AT91_USART3 |
75 | select HAVE_FB_ATMEL | 88 | select HAVE_FB_ATMEL |
76 | select HAVE_NET_MACB | 89 | select HAVE_NET_MACB |
90 | select HAVE_AT91_DBGU1 | ||
77 | 91 | ||
78 | config ARCH_AT91CAP9 | 92 | config ARCH_AT91CAP9 |
79 | bool "AT91CAP9" | 93 | bool "AT91CAP9" |
@@ -81,6 +95,7 @@ config ARCH_AT91CAP9 | |||
81 | select GENERIC_CLOCKEVENTS | 95 | select GENERIC_CLOCKEVENTS |
82 | select HAVE_FB_ATMEL | 96 | select HAVE_FB_ATMEL |
83 | select HAVE_NET_MACB | 97 | select HAVE_NET_MACB |
98 | select HAVE_AT91_DBGU1 | ||
84 | 99 | ||
85 | config ARCH_AT91X40 | 100 | config ARCH_AT91X40 |
86 | bool "AT91x40" | 101 | bool "AT91x40" |
@@ -510,8 +525,13 @@ config AT91_TIMER_HZ | |||
510 | choice | 525 | choice |
511 | prompt "Select a UART for early kernel messages" | 526 | prompt "Select a UART for early kernel messages" |
512 | 527 | ||
513 | config AT91_EARLY_DBGU | 528 | config AT91_EARLY_DBGU0 |
514 | bool "DBGU" | 529 | bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl" |
530 | depends on HAVE_AT91_DBGU0 | ||
531 | |||
532 | config AT91_EARLY_DBGU1 | ||
533 | bool "DBGU on 9263, 9g45 and cap9" | ||
534 | depends on HAVE_AT91_DBGU1 | ||
515 | 535 | ||
516 | config AT91_EARLY_USART0 | 536 | config AT91_EARLY_USART0 |
517 | bool "USART0" | 537 | bool "USART0" |
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index ecdd54dd68c6..edb879ac04c8 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -13,7 +13,6 @@ | |||
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | #include <linux/pm.h> | ||
17 | 16 | ||
18 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
19 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
@@ -23,11 +22,11 @@ | |||
23 | #include <mach/at91cap9.h> | 22 | #include <mach/at91cap9.h> |
24 | #include <mach/at91_pmc.h> | 23 | #include <mach/at91_pmc.h> |
25 | #include <mach/at91_rstc.h> | 24 | #include <mach/at91_rstc.h> |
26 | #include <mach/at91_shdwc.h> | ||
27 | 25 | ||
28 | #include "soc.h" | 26 | #include "soc.h" |
29 | #include "generic.h" | 27 | #include "generic.h" |
30 | #include "clock.h" | 28 | #include "clock.h" |
29 | #include "sam9_smc.h" | ||
31 | 30 | ||
32 | /* -------------------------------------------------------------------- | 31 | /* -------------------------------------------------------------------- |
33 | * Clocks | 32 | * Clocks |
@@ -137,7 +136,7 @@ static struct clk pwm_clk = { | |||
137 | .type = CLK_TYPE_PERIPHERAL, | 136 | .type = CLK_TYPE_PERIPHERAL, |
138 | }; | 137 | }; |
139 | static struct clk macb_clk = { | 138 | static struct clk macb_clk = { |
140 | .name = "macb_clk", | 139 | .name = "pclk", |
141 | .pmc_mask = 1 << AT91CAP9_ID_EMAC, | 140 | .pmc_mask = 1 << AT91CAP9_ID_EMAC, |
142 | .type = CLK_TYPE_PERIPHERAL, | 141 | .type = CLK_TYPE_PERIPHERAL, |
143 | }; | 142 | }; |
@@ -210,6 +209,8 @@ static struct clk *periph_clocks[] __initdata = { | |||
210 | }; | 209 | }; |
211 | 210 | ||
212 | static struct clk_lookup periph_clocks_lookups[] = { | 211 | static struct clk_lookup periph_clocks_lookups[] = { |
212 | /* One additional fake clock for macb_hclk */ | ||
213 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
213 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), | 214 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), |
214 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), | 215 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), |
215 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | 216 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), |
@@ -221,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
221 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 222 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
222 | /* fake hclk clock */ | 223 | /* fake hclk clock */ |
223 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 224 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
225 | CLKDEV_CON_ID("pioA", &pioABCD_clk), | ||
226 | CLKDEV_CON_ID("pioB", &pioABCD_clk), | ||
227 | CLKDEV_CON_ID("pioC", &pioABCD_clk), | ||
228 | CLKDEV_CON_ID("pioD", &pioABCD_clk), | ||
224 | }; | 229 | }; |
225 | 230 | ||
226 | static struct clk_lookup usart_clocks_lookups[] = { | 231 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -293,37 +298,27 @@ void __init at91cap9_set_console_clock(int id) | |||
293 | * GPIO | 298 | * GPIO |
294 | * -------------------------------------------------------------------- */ | 299 | * -------------------------------------------------------------------- */ |
295 | 300 | ||
296 | static struct at91_gpio_bank at91cap9_gpio[] = { | 301 | static struct at91_gpio_bank at91cap9_gpio[] __initdata = { |
297 | { | 302 | { |
298 | .id = AT91CAP9_ID_PIOABCD, | 303 | .id = AT91CAP9_ID_PIOABCD, |
299 | .offset = AT91_PIOA, | 304 | .regbase = AT91CAP9_BASE_PIOA, |
300 | .clock = &pioABCD_clk, | ||
301 | }, { | 305 | }, { |
302 | .id = AT91CAP9_ID_PIOABCD, | 306 | .id = AT91CAP9_ID_PIOABCD, |
303 | .offset = AT91_PIOB, | 307 | .regbase = AT91CAP9_BASE_PIOB, |
304 | .clock = &pioABCD_clk, | ||
305 | }, { | 308 | }, { |
306 | .id = AT91CAP9_ID_PIOABCD, | 309 | .id = AT91CAP9_ID_PIOABCD, |
307 | .offset = AT91_PIOC, | 310 | .regbase = AT91CAP9_BASE_PIOC, |
308 | .clock = &pioABCD_clk, | ||
309 | }, { | 311 | }, { |
310 | .id = AT91CAP9_ID_PIOABCD, | 312 | .id = AT91CAP9_ID_PIOABCD, |
311 | .offset = AT91_PIOD, | 313 | .regbase = AT91CAP9_BASE_PIOD, |
312 | .clock = &pioABCD_clk, | ||
313 | } | 314 | } |
314 | }; | 315 | }; |
315 | 316 | ||
316 | static void at91cap9_reset(void) | 317 | static void at91cap9_restart(char mode, const char *cmd) |
317 | { | 318 | { |
318 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | 319 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
319 | } | 320 | } |
320 | 321 | ||
321 | static void at91cap9_poweroff(void) | ||
322 | { | ||
323 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
324 | } | ||
325 | |||
326 | |||
327 | /* -------------------------------------------------------------------- | 322 | /* -------------------------------------------------------------------- |
328 | * AT91CAP9 processor initialization | 323 | * AT91CAP9 processor initialization |
329 | * -------------------------------------------------------------------- */ | 324 | * -------------------------------------------------------------------- */ |
@@ -333,10 +328,16 @@ static void __init at91cap9_map_io(void) | |||
333 | at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); | 328 | at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); |
334 | } | 329 | } |
335 | 330 | ||
331 | static void __init at91cap9_ioremap_registers(void) | ||
332 | { | ||
333 | at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC); | ||
334 | at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); | ||
335 | at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); | ||
336 | } | ||
337 | |||
336 | static void __init at91cap9_initialize(void) | 338 | static void __init at91cap9_initialize(void) |
337 | { | 339 | { |
338 | at91_arch_reset = at91cap9_reset; | 340 | arm_pm_restart = at91cap9_restart; |
339 | pm_power_off = at91cap9_poweroff; | ||
340 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); | 341 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); |
341 | 342 | ||
342 | /* Register GPIO subsystem */ | 343 | /* Register GPIO subsystem */ |
@@ -394,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
394 | struct at91_init_soc __initdata at91cap9_soc = { | 395 | struct at91_init_soc __initdata at91cap9_soc = { |
395 | .map_io = at91cap9_map_io, | 396 | .map_io = at91cap9_map_io, |
396 | .default_irq_priority = at91cap9_default_irq_priority, | 397 | .default_irq_priority = at91cap9_default_irq_priority, |
398 | .ioremap_registers = at91cap9_ioremap_registers, | ||
397 | .register_clocks = at91cap9_register_clocks, | 399 | .register_clocks = at91cap9_register_clocks, |
398 | .init = at91cap9_initialize, | 400 | .init = at91cap9_initialize, |
399 | }; | 401 | }; |
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index adad70db70eb..d298fb7cb210 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c | |||
@@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
76 | 76 | ||
77 | /* Enable VBus control for UHP ports */ | 77 | /* Enable VBus control for UHP ports */ |
78 | for (i = 0; i < data->ports; i++) { | 78 | for (i = 0; i < data->ports; i++) { |
79 | if (data->vbus_pin[i]) | 79 | if (gpio_is_valid(data->vbus_pin[i])) |
80 | at91_set_gpio_output(data->vbus_pin[i], 0); | 80 | at91_set_gpio_output(data->vbus_pin[i], 0); |
81 | } | 81 | } |
82 | 82 | ||
@@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
179 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); | 179 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); |
180 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); | 180 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); |
181 | 181 | ||
182 | if (data && data->vbus_pin > 0) { | 182 | if (data && gpio_is_valid(data->vbus_pin)) { |
183 | at91_set_gpio_input(data->vbus_pin, 0); | 183 | at91_set_gpio_input(data->vbus_pin, 0); |
184 | at91_set_deglitch(data->vbus_pin, 1); | 184 | at91_set_deglitch(data->vbus_pin, 1); |
185 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; | 185 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; |
@@ -200,7 +200,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {} | |||
200 | 200 | ||
201 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 201 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
202 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 202 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
203 | static struct at91_eth_data eth_data; | 203 | static struct macb_platform_data eth_data; |
204 | 204 | ||
205 | static struct resource eth_resources[] = { | 205 | static struct resource eth_resources[] = { |
206 | [0] = { | 206 | [0] = { |
@@ -227,12 +227,12 @@ static struct platform_device at91cap9_eth_device = { | |||
227 | .num_resources = ARRAY_SIZE(eth_resources), | 227 | .num_resources = ARRAY_SIZE(eth_resources), |
228 | }; | 228 | }; |
229 | 229 | ||
230 | void __init at91_add_device_eth(struct at91_eth_data *data) | 230 | void __init at91_add_device_eth(struct macb_platform_data *data) |
231 | { | 231 | { |
232 | if (!data) | 232 | if (!data) |
233 | return; | 233 | return; |
234 | 234 | ||
235 | if (data->phy_irq_pin) { | 235 | if (gpio_is_valid(data->phy_irq_pin)) { |
236 | at91_set_gpio_input(data->phy_irq_pin, 0); | 236 | at91_set_gpio_input(data->phy_irq_pin, 0); |
237 | at91_set_deglitch(data->phy_irq_pin, 1); | 237 | at91_set_deglitch(data->phy_irq_pin, 1); |
238 | } | 238 | } |
@@ -264,7 +264,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
264 | platform_device_register(&at91cap9_eth_device); | 264 | platform_device_register(&at91cap9_eth_device); |
265 | } | 265 | } |
266 | #else | 266 | #else |
267 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 267 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
268 | #endif | 268 | #endif |
269 | 269 | ||
270 | 270 | ||
@@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
332 | return; | 332 | return; |
333 | 333 | ||
334 | /* input/irq */ | 334 | /* input/irq */ |
335 | if (data->det_pin) { | 335 | if (gpio_is_valid(data->det_pin)) { |
336 | at91_set_gpio_input(data->det_pin, 1); | 336 | at91_set_gpio_input(data->det_pin, 1); |
337 | at91_set_deglitch(data->det_pin, 1); | 337 | at91_set_deglitch(data->det_pin, 1); |
338 | } | 338 | } |
339 | if (data->wp_pin) | 339 | if (gpio_is_valid(data->wp_pin)) |
340 | at91_set_gpio_input(data->wp_pin, 1); | 340 | at91_set_gpio_input(data->wp_pin, 1); |
341 | if (data->vcc_pin) | 341 | if (gpio_is_valid(data->vcc_pin)) |
342 | at91_set_gpio_output(data->vcc_pin, 0); | 342 | at91_set_gpio_output(data->vcc_pin, 0); |
343 | 343 | ||
344 | if (mmc_id == 0) { /* MCI0 */ | 344 | if (mmc_id == 0) { /* MCI0 */ |
@@ -398,8 +398,8 @@ static struct resource nand_resources[] = { | |||
398 | .flags = IORESOURCE_MEM, | 398 | .flags = IORESOURCE_MEM, |
399 | }, | 399 | }, |
400 | [1] = { | 400 | [1] = { |
401 | .start = AT91_BASE_SYS + AT91_ECC, | 401 | .start = AT91CAP9_BASE_ECC, |
402 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | 402 | .end = AT91CAP9_BASE_ECC + SZ_512 - 1, |
403 | .flags = IORESOURCE_MEM, | 403 | .flags = IORESOURCE_MEM, |
404 | } | 404 | } |
405 | }; | 405 | }; |
@@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
425 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); | 425 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); |
426 | 426 | ||
427 | /* enable pin */ | 427 | /* enable pin */ |
428 | if (data->enable_pin) | 428 | if (gpio_is_valid(data->enable_pin)) |
429 | at91_set_gpio_output(data->enable_pin, 1); | 429 | at91_set_gpio_output(data->enable_pin, 1); |
430 | 430 | ||
431 | /* ready/busy pin */ | 431 | /* ready/busy pin */ |
432 | if (data->rdy_pin) | 432 | if (gpio_is_valid(data->rdy_pin)) |
433 | at91_set_gpio_input(data->rdy_pin, 1); | 433 | at91_set_gpio_input(data->rdy_pin, 1); |
434 | 434 | ||
435 | /* card detect pin */ | 435 | /* card detect pin */ |
436 | if (data->det_pin) | 436 | if (gpio_is_valid(data->det_pin)) |
437 | at91_set_gpio_input(data->det_pin, 1); | 437 | at91_set_gpio_input(data->det_pin, 1); |
438 | 438 | ||
439 | nand_data = *data; | 439 | nand_data = *data; |
@@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { } | |||
670 | 670 | ||
671 | static struct resource rtt_resources[] = { | 671 | static struct resource rtt_resources[] = { |
672 | { | 672 | { |
673 | .start = AT91_BASE_SYS + AT91_RTT, | 673 | .start = AT91CAP9_BASE_RTT, |
674 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 674 | .end = AT91CAP9_BASE_RTT + SZ_16 - 1, |
675 | .flags = IORESOURCE_MEM, | 675 | .flags = IORESOURCE_MEM, |
676 | } | 676 | } |
677 | }; | 677 | }; |
@@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void) | |||
694 | * -------------------------------------------------------------------- */ | 694 | * -------------------------------------------------------------------- */ |
695 | 695 | ||
696 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 696 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
697 | static struct resource wdt_resources[] = { | ||
698 | { | ||
699 | .start = AT91CAP9_BASE_WDT, | ||
700 | .end = AT91CAP9_BASE_WDT + SZ_16 - 1, | ||
701 | .flags = IORESOURCE_MEM, | ||
702 | } | ||
703 | }; | ||
704 | |||
697 | static struct platform_device at91cap9_wdt_device = { | 705 | static struct platform_device at91cap9_wdt_device = { |
698 | .name = "at91_wdt", | 706 | .name = "at91_wdt", |
699 | .id = -1, | 707 | .id = -1, |
700 | .num_resources = 0, | 708 | .resource = wdt_resources, |
709 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
701 | }; | 710 | }; |
702 | 711 | ||
703 | static void __init at91_add_device_watchdog(void) | 712 | static void __init at91_add_device_watchdog(void) |
@@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) | |||
807 | at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ | 816 | at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ |
808 | 817 | ||
809 | /* reset */ | 818 | /* reset */ |
810 | if (data->reset_pin) | 819 | if (gpio_is_valid(data->reset_pin)) |
811 | at91_set_gpio_output(data->reset_pin, 0); | 820 | at91_set_gpio_output(data->reset_pin, 0); |
812 | 821 | ||
813 | ac97_data = *data; | 822 | ac97_data = *data; |
@@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
1021 | #if defined(CONFIG_SERIAL_ATMEL) | 1030 | #if defined(CONFIG_SERIAL_ATMEL) |
1022 | static struct resource dbgu_resources[] = { | 1031 | static struct resource dbgu_resources[] = { |
1023 | [0] = { | 1032 | [0] = { |
1024 | .start = AT91_BASE_SYS + AT91_DBGU, | 1033 | .start = AT91CAP9_BASE_DBGU, |
1025 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 1034 | .end = AT91CAP9_BASE_DBGU + SZ_512 - 1, |
1026 | .flags = IORESOURCE_MEM, | 1035 | .flags = IORESOURCE_MEM, |
1027 | }, | 1036 | }, |
1028 | [1] = { | 1037 | [1] = { |
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 713d3bdbd284..99c3174e24a2 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include "soc.h" | 23 | #include "soc.h" |
24 | #include "generic.h" | 24 | #include "generic.h" |
25 | #include "clock.h" | 25 | #include "clock.h" |
26 | #include "sam9_smc.h" | ||
26 | 27 | ||
27 | static struct map_desc at91rm9200_io_desc[] __initdata = { | 28 | static struct map_desc at91rm9200_io_desc[] __initdata = { |
28 | { | 29 | { |
@@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
195 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), | 196 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
196 | /* fake hclk clock */ | 197 | /* fake hclk clock */ |
197 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 198 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
199 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
200 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
201 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
202 | CLKDEV_CON_ID("pioD", &pioD_clk), | ||
198 | }; | 203 | }; |
199 | 204 | ||
200 | static struct clk_lookup usart_clocks_lookups[] = { | 205 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -268,27 +273,23 @@ void __init at91rm9200_set_console_clock(int id) | |||
268 | * GPIO | 273 | * GPIO |
269 | * -------------------------------------------------------------------- */ | 274 | * -------------------------------------------------------------------- */ |
270 | 275 | ||
271 | static struct at91_gpio_bank at91rm9200_gpio[] = { | 276 | static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { |
272 | { | 277 | { |
273 | .id = AT91RM9200_ID_PIOA, | 278 | .id = AT91RM9200_ID_PIOA, |
274 | .offset = AT91_PIOA, | 279 | .regbase = AT91RM9200_BASE_PIOA, |
275 | .clock = &pioA_clk, | ||
276 | }, { | 280 | }, { |
277 | .id = AT91RM9200_ID_PIOB, | 281 | .id = AT91RM9200_ID_PIOB, |
278 | .offset = AT91_PIOB, | 282 | .regbase = AT91RM9200_BASE_PIOB, |
279 | .clock = &pioB_clk, | ||
280 | }, { | 283 | }, { |
281 | .id = AT91RM9200_ID_PIOC, | 284 | .id = AT91RM9200_ID_PIOC, |
282 | .offset = AT91_PIOC, | 285 | .regbase = AT91RM9200_BASE_PIOC, |
283 | .clock = &pioC_clk, | ||
284 | }, { | 286 | }, { |
285 | .id = AT91RM9200_ID_PIOD, | 287 | .id = AT91RM9200_ID_PIOD, |
286 | .offset = AT91_PIOD, | 288 | .regbase = AT91RM9200_BASE_PIOD, |
287 | .clock = &pioD_clk, | ||
288 | } | 289 | } |
289 | }; | 290 | }; |
290 | 291 | ||
291 | static void at91rm9200_reset(void) | 292 | static void at91rm9200_restart(char mode, const char *cmd) |
292 | { | 293 | { |
293 | /* | 294 | /* |
294 | * Perform a hardware reset with the use of the Watchdog timer. | 295 | * Perform a hardware reset with the use of the Watchdog timer. |
@@ -307,9 +308,13 @@ static void __init at91rm9200_map_io(void) | |||
307 | iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); | 308 | iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); |
308 | } | 309 | } |
309 | 310 | ||
311 | static void __init at91rm9200_ioremap_registers(void) | ||
312 | { | ||
313 | } | ||
314 | |||
310 | static void __init at91rm9200_initialize(void) | 315 | static void __init at91rm9200_initialize(void) |
311 | { | 316 | { |
312 | at91_arch_reset = at91rm9200_reset; | 317 | arm_pm_restart = at91rm9200_restart; |
313 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | 318 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) |
314 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) | 319 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) |
315 | | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) | 320 | | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) |
@@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
366 | struct at91_init_soc __initdata at91rm9200_soc = { | 371 | struct at91_init_soc __initdata at91rm9200_soc = { |
367 | .map_io = at91rm9200_map_io, | 372 | .map_io = at91rm9200_map_io, |
368 | .default_irq_priority = at91rm9200_default_irq_priority, | 373 | .default_irq_priority = at91rm9200_default_irq_priority, |
374 | .ioremap_registers = at91rm9200_ioremap_registers, | ||
369 | .register_clocks = at91rm9200_register_clocks, | 375 | .register_clocks = at91rm9200_register_clocks, |
370 | .init = at91rm9200_initialize, | 376 | .init = at91rm9200_initialize, |
371 | }; | 377 | }; |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index ad930688358c..18bacec2b094 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -114,11 +114,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
114 | if (!data) | 114 | if (!data) |
115 | return; | 115 | return; |
116 | 116 | ||
117 | if (data->vbus_pin) { | 117 | if (gpio_is_valid(data->vbus_pin)) { |
118 | at91_set_gpio_input(data->vbus_pin, 0); | 118 | at91_set_gpio_input(data->vbus_pin, 0); |
119 | at91_set_deglitch(data->vbus_pin, 1); | 119 | at91_set_deglitch(data->vbus_pin, 1); |
120 | } | 120 | } |
121 | if (data->pullup_pin) | 121 | if (gpio_is_valid(data->pullup_pin)) |
122 | at91_set_gpio_output(data->pullup_pin, 0); | 122 | at91_set_gpio_output(data->pullup_pin, 0); |
123 | 123 | ||
124 | udc_data = *data; | 124 | udc_data = *data; |
@@ -135,7 +135,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
135 | 135 | ||
136 | #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) | 136 | #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) |
137 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 137 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
138 | static struct at91_eth_data eth_data; | 138 | static struct macb_platform_data eth_data; |
139 | 139 | ||
140 | static struct resource eth_resources[] = { | 140 | static struct resource eth_resources[] = { |
141 | [0] = { | 141 | [0] = { |
@@ -162,12 +162,12 @@ static struct platform_device at91rm9200_eth_device = { | |||
162 | .num_resources = ARRAY_SIZE(eth_resources), | 162 | .num_resources = ARRAY_SIZE(eth_resources), |
163 | }; | 163 | }; |
164 | 164 | ||
165 | void __init at91_add_device_eth(struct at91_eth_data *data) | 165 | void __init at91_add_device_eth(struct macb_platform_data *data) |
166 | { | 166 | { |
167 | if (!data) | 167 | if (!data) |
168 | return; | 168 | return; |
169 | 169 | ||
170 | if (data->phy_irq_pin) { | 170 | if (gpio_is_valid(data->phy_irq_pin)) { |
171 | at91_set_gpio_input(data->phy_irq_pin, 0); | 171 | at91_set_gpio_input(data->phy_irq_pin, 0); |
172 | at91_set_deglitch(data->phy_irq_pin, 1); | 172 | at91_set_deglitch(data->phy_irq_pin, 1); |
173 | } | 173 | } |
@@ -199,7 +199,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
199 | platform_device_register(&at91rm9200_eth_device); | 199 | platform_device_register(&at91rm9200_eth_device); |
200 | } | 200 | } |
201 | #else | 201 | #else |
202 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 202 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
203 | #endif | 203 | #endif |
204 | 204 | ||
205 | 205 | ||
@@ -260,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
260 | ); | 260 | ); |
261 | 261 | ||
262 | /* input/irq */ | 262 | /* input/irq */ |
263 | if (data->irq_pin) { | 263 | if (gpio_is_valid(data->irq_pin)) { |
264 | at91_set_gpio_input(data->irq_pin, 1); | 264 | at91_set_gpio_input(data->irq_pin, 1); |
265 | at91_set_deglitch(data->irq_pin, 1); | 265 | at91_set_deglitch(data->irq_pin, 1); |
266 | } | 266 | } |
@@ -268,7 +268,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
268 | at91_set_deglitch(data->det_pin, 1); | 268 | at91_set_deglitch(data->det_pin, 1); |
269 | 269 | ||
270 | /* outputs, initially off */ | 270 | /* outputs, initially off */ |
271 | if (data->vcc_pin) | 271 | if (gpio_is_valid(data->vcc_pin)) |
272 | at91_set_gpio_output(data->vcc_pin, 0); | 272 | at91_set_gpio_output(data->vcc_pin, 0); |
273 | at91_set_gpio_output(data->rst_pin, 0); | 273 | at91_set_gpio_output(data->rst_pin, 0); |
274 | 274 | ||
@@ -328,13 +328,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
328 | return; | 328 | return; |
329 | 329 | ||
330 | /* input/irq */ | 330 | /* input/irq */ |
331 | if (data->det_pin) { | 331 | if (gpio_is_valid(data->det_pin)) { |
332 | at91_set_gpio_input(data->det_pin, 1); | 332 | at91_set_gpio_input(data->det_pin, 1); |
333 | at91_set_deglitch(data->det_pin, 1); | 333 | at91_set_deglitch(data->det_pin, 1); |
334 | } | 334 | } |
335 | if (data->wp_pin) | 335 | if (gpio_is_valid(data->wp_pin)) |
336 | at91_set_gpio_input(data->wp_pin, 1); | 336 | at91_set_gpio_input(data->wp_pin, 1); |
337 | if (data->vcc_pin) | 337 | if (gpio_is_valid(data->vcc_pin)) |
338 | at91_set_gpio_output(data->vcc_pin, 0); | 338 | at91_set_gpio_output(data->vcc_pin, 0); |
339 | 339 | ||
340 | /* CLK */ | 340 | /* CLK */ |
@@ -419,15 +419,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
419 | ); | 419 | ); |
420 | 420 | ||
421 | /* enable pin */ | 421 | /* enable pin */ |
422 | if (data->enable_pin) | 422 | if (gpio_is_valid(data->enable_pin)) |
423 | at91_set_gpio_output(data->enable_pin, 1); | 423 | at91_set_gpio_output(data->enable_pin, 1); |
424 | 424 | ||
425 | /* ready/busy pin */ | 425 | /* ready/busy pin */ |
426 | if (data->rdy_pin) | 426 | if (gpio_is_valid(data->rdy_pin)) |
427 | at91_set_gpio_input(data->rdy_pin, 1); | 427 | at91_set_gpio_input(data->rdy_pin, 1); |
428 | 428 | ||
429 | /* card detect pin */ | 429 | /* card detect pin */ |
430 | if (data->det_pin) | 430 | if (gpio_is_valid(data->det_pin)) |
431 | at91_set_gpio_input(data->det_pin, 1); | 431 | at91_set_gpio_input(data->det_pin, 1); |
432 | 432 | ||
433 | at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ | 433 | at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ |
@@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { } | |||
665 | * -------------------------------------------------------------------- */ | 665 | * -------------------------------------------------------------------- */ |
666 | 666 | ||
667 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) | 667 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) |
668 | static struct resource rtc_resources[] = { | ||
669 | [0] = { | ||
670 | .start = AT91RM9200_BASE_RTC, | ||
671 | .end = AT91RM9200_BASE_RTC + SZ_256 - 1, | ||
672 | .flags = IORESOURCE_MEM, | ||
673 | }, | ||
674 | [1] = { | ||
675 | .start = AT91_ID_SYS, | ||
676 | .end = AT91_ID_SYS, | ||
677 | .flags = IORESOURCE_IRQ, | ||
678 | }, | ||
679 | }; | ||
680 | |||
668 | static struct platform_device at91rm9200_rtc_device = { | 681 | static struct platform_device at91rm9200_rtc_device = { |
669 | .name = "at91_rtc", | 682 | .name = "at91_rtc", |
670 | .id = -1, | 683 | .id = -1, |
671 | .num_resources = 0, | 684 | .resource = rtc_resources, |
685 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
672 | }; | 686 | }; |
673 | 687 | ||
674 | static void __init at91_add_device_rtc(void) | 688 | static void __init at91_add_device_rtc(void) |
@@ -877,8 +891,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
877 | #if defined(CONFIG_SERIAL_ATMEL) | 891 | #if defined(CONFIG_SERIAL_ATMEL) |
878 | static struct resource dbgu_resources[] = { | 892 | static struct resource dbgu_resources[] = { |
879 | [0] = { | 893 | [0] = { |
880 | .start = AT91_BASE_SYS + AT91_DBGU, | 894 | .start = AT91RM9200_BASE_DBGU, |
881 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 895 | .end = AT91RM9200_BASE_DBGU + SZ_512 - 1, |
882 | .flags = IORESOURCE_MEM, | 896 | .flags = IORESOURCE_MEM, |
883 | }, | 897 | }, |
884 | [1] = { | 898 | [1] = { |
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index 1dd69c85dfec..a028cdf8f974 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c | |||
@@ -32,6 +32,8 @@ static unsigned long last_crtr; | |||
32 | static u32 irqmask; | 32 | static u32 irqmask; |
33 | static struct clock_event_device clkevt; | 33 | static struct clock_event_device clkevt; |
34 | 34 | ||
35 | #define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ) | ||
36 | |||
35 | /* | 37 | /* |
36 | * The ST_CRTR is updated asynchronously to the master clock ... but | 38 | * The ST_CRTR is updated asynchronously to the master clock ... but |
37 | * the updates as seen by the CPU don't seem to be strictly monotonic. | 39 | * the updates as seen by the CPU don't seem to be strictly monotonic. |
@@ -74,8 +76,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) | |||
74 | if (sr & AT91_ST_PITS) { | 76 | if (sr & AT91_ST_PITS) { |
75 | u32 crtr = read_CRTR(); | 77 | u32 crtr = read_CRTR(); |
76 | 78 | ||
77 | while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) { | 79 | while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) { |
78 | last_crtr += LATCH; | 80 | last_crtr += RM9200_TIMER_LATCH; |
79 | clkevt.event_handler(&clkevt); | 81 | clkevt.event_handler(&clkevt); |
80 | } | 82 | } |
81 | return IRQ_HANDLED; | 83 | return IRQ_HANDLED; |
@@ -116,7 +118,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
116 | case CLOCK_EVT_MODE_PERIODIC: | 118 | case CLOCK_EVT_MODE_PERIODIC: |
117 | /* PIT for periodic irqs; fixed rate of 1/HZ */ | 119 | /* PIT for periodic irqs; fixed rate of 1/HZ */ |
118 | irqmask = AT91_ST_PITS; | 120 | irqmask = AT91_ST_PITS; |
119 | at91_sys_write(AT91_ST_PIMR, LATCH); | 121 | at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH); |
120 | break; | 122 | break; |
121 | case CLOCK_EVT_MODE_ONESHOT: | 123 | case CLOCK_EVT_MODE_ONESHOT: |
122 | /* ALM for oneshot irqs, set by next_event() | 124 | /* ALM for oneshot irqs, set by next_event() |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 0d20677fbef0..5e46e4a96430 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -21,11 +20,11 @@ | |||
21 | #include <mach/at91sam9260.h> | 20 | #include <mach/at91sam9260.h> |
22 | #include <mach/at91_pmc.h> | 21 | #include <mach/at91_pmc.h> |
23 | #include <mach/at91_rstc.h> | 22 | #include <mach/at91_rstc.h> |
24 | #include <mach/at91_shdwc.h> | ||
25 | 23 | ||
26 | #include "soc.h" | 24 | #include "soc.h" |
27 | #include "generic.h" | 25 | #include "generic.h" |
28 | #include "clock.h" | 26 | #include "clock.h" |
27 | #include "sam9_smc.h" | ||
29 | 28 | ||
30 | /* -------------------------------------------------------------------- | 29 | /* -------------------------------------------------------------------- |
31 | * Clocks | 30 | * Clocks |
@@ -120,7 +119,7 @@ static struct clk ohci_clk = { | |||
120 | .type = CLK_TYPE_PERIPHERAL, | 119 | .type = CLK_TYPE_PERIPHERAL, |
121 | }; | 120 | }; |
122 | static struct clk macb_clk = { | 121 | static struct clk macb_clk = { |
123 | .name = "macb_clk", | 122 | .name = "pclk", |
124 | .pmc_mask = 1 << AT91SAM9260_ID_EMAC, | 123 | .pmc_mask = 1 << AT91SAM9260_ID_EMAC, |
125 | .type = CLK_TYPE_PERIPHERAL, | 124 | .type = CLK_TYPE_PERIPHERAL, |
126 | }; | 125 | }; |
@@ -190,6 +189,8 @@ static struct clk *periph_clocks[] __initdata = { | |||
190 | }; | 189 | }; |
191 | 190 | ||
192 | static struct clk_lookup periph_clocks_lookups[] = { | 191 | static struct clk_lookup periph_clocks_lookups[] = { |
192 | /* One additional fake clock for macb_hclk */ | ||
193 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
193 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | 194 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), |
194 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | 195 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), |
195 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), | 196 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), |
@@ -209,6 +210,9 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
209 | CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), | 210 | CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), |
210 | /* fake hclk clock */ | 211 | /* fake hclk clock */ |
211 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 212 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
213 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
214 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
215 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
212 | }; | 216 | }; |
213 | 217 | ||
214 | static struct clk_lookup usart_clocks_lookups[] = { | 218 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -270,28 +274,19 @@ void __init at91sam9260_set_console_clock(int id) | |||
270 | * GPIO | 274 | * GPIO |
271 | * -------------------------------------------------------------------- */ | 275 | * -------------------------------------------------------------------- */ |
272 | 276 | ||
273 | static struct at91_gpio_bank at91sam9260_gpio[] = { | 277 | static struct at91_gpio_bank at91sam9260_gpio[] __initdata = { |
274 | { | 278 | { |
275 | .id = AT91SAM9260_ID_PIOA, | 279 | .id = AT91SAM9260_ID_PIOA, |
276 | .offset = AT91_PIOA, | 280 | .regbase = AT91SAM9260_BASE_PIOA, |
277 | .clock = &pioA_clk, | ||
278 | }, { | 281 | }, { |
279 | .id = AT91SAM9260_ID_PIOB, | 282 | .id = AT91SAM9260_ID_PIOB, |
280 | .offset = AT91_PIOB, | 283 | .regbase = AT91SAM9260_BASE_PIOB, |
281 | .clock = &pioB_clk, | ||
282 | }, { | 284 | }, { |
283 | .id = AT91SAM9260_ID_PIOC, | 285 | .id = AT91SAM9260_ID_PIOC, |
284 | .offset = AT91_PIOC, | 286 | .regbase = AT91SAM9260_BASE_PIOC, |
285 | .clock = &pioC_clk, | ||
286 | } | 287 | } |
287 | }; | 288 | }; |
288 | 289 | ||
289 | static void at91sam9260_poweroff(void) | ||
290 | { | ||
291 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
292 | } | ||
293 | |||
294 | |||
295 | /* -------------------------------------------------------------------- | 290 | /* -------------------------------------------------------------------- |
296 | * AT91SAM9260 processor initialization | 291 | * AT91SAM9260 processor initialization |
297 | * -------------------------------------------------------------------- */ | 292 | * -------------------------------------------------------------------- */ |
@@ -325,10 +320,16 @@ static void __init at91sam9260_map_io(void) | |||
325 | } | 320 | } |
326 | } | 321 | } |
327 | 322 | ||
323 | static void __init at91sam9260_ioremap_registers(void) | ||
324 | { | ||
325 | at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC); | ||
326 | at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); | ||
327 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); | ||
328 | } | ||
329 | |||
328 | static void __init at91sam9260_initialize(void) | 330 | static void __init at91sam9260_initialize(void) |
329 | { | 331 | { |
330 | at91_arch_reset = at91sam9_alt_reset; | 332 | arm_pm_restart = at91sam9_alt_restart; |
331 | pm_power_off = at91sam9260_poweroff; | ||
332 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | 333 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
333 | | (1 << AT91SAM9260_ID_IRQ2); | 334 | | (1 << AT91SAM9260_ID_IRQ2); |
334 | 335 | ||
@@ -381,6 +382,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
381 | struct at91_init_soc __initdata at91sam9260_soc = { | 382 | struct at91_init_soc __initdata at91sam9260_soc = { |
382 | .map_io = at91sam9260_map_io, | 383 | .map_io = at91sam9260_map_io, |
383 | .default_irq_priority = at91sam9260_default_irq_priority, | 384 | .default_irq_priority = at91sam9260_default_irq_priority, |
385 | .ioremap_registers = at91sam9260_ioremap_registers, | ||
384 | .register_clocks = at91sam9260_register_clocks, | 386 | .register_clocks = at91sam9260_register_clocks, |
385 | .init = at91sam9260_initialize, | 387 | .init = at91sam9260_initialize, |
386 | }; | 388 | }; |
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 629fa9774972..642ccb6d26b2 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
@@ -115,7 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
115 | if (!data) | 115 | if (!data) |
116 | return; | 116 | return; |
117 | 117 | ||
118 | if (data->vbus_pin) { | 118 | if (gpio_is_valid(data->vbus_pin)) { |
119 | at91_set_gpio_input(data->vbus_pin, 0); | 119 | at91_set_gpio_input(data->vbus_pin, 0); |
120 | at91_set_deglitch(data->vbus_pin, 1); | 120 | at91_set_deglitch(data->vbus_pin, 1); |
121 | } | 121 | } |
@@ -136,7 +136,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
136 | 136 | ||
137 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 137 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
138 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 138 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
139 | static struct at91_eth_data eth_data; | 139 | static struct macb_platform_data eth_data; |
140 | 140 | ||
141 | static struct resource eth_resources[] = { | 141 | static struct resource eth_resources[] = { |
142 | [0] = { | 142 | [0] = { |
@@ -163,12 +163,12 @@ static struct platform_device at91sam9260_eth_device = { | |||
163 | .num_resources = ARRAY_SIZE(eth_resources), | 163 | .num_resources = ARRAY_SIZE(eth_resources), |
164 | }; | 164 | }; |
165 | 165 | ||
166 | void __init at91_add_device_eth(struct at91_eth_data *data) | 166 | void __init at91_add_device_eth(struct macb_platform_data *data) |
167 | { | 167 | { |
168 | if (!data) | 168 | if (!data) |
169 | return; | 169 | return; |
170 | 170 | ||
171 | if (data->phy_irq_pin) { | 171 | if (gpio_is_valid(data->phy_irq_pin)) { |
172 | at91_set_gpio_input(data->phy_irq_pin, 0); | 172 | at91_set_gpio_input(data->phy_irq_pin, 0); |
173 | at91_set_deglitch(data->phy_irq_pin, 1); | 173 | at91_set_deglitch(data->phy_irq_pin, 1); |
174 | } | 174 | } |
@@ -200,7 +200,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
200 | platform_device_register(&at91sam9260_eth_device); | 200 | platform_device_register(&at91sam9260_eth_device); |
201 | } | 201 | } |
202 | #else | 202 | #else |
203 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 203 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
204 | #endif | 204 | #endif |
205 | 205 | ||
206 | 206 | ||
@@ -243,13 +243,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
243 | return; | 243 | return; |
244 | 244 | ||
245 | /* input/irq */ | 245 | /* input/irq */ |
246 | if (data->det_pin) { | 246 | if (gpio_is_valid(data->det_pin)) { |
247 | at91_set_gpio_input(data->det_pin, 1); | 247 | at91_set_gpio_input(data->det_pin, 1); |
248 | at91_set_deglitch(data->det_pin, 1); | 248 | at91_set_deglitch(data->det_pin, 1); |
249 | } | 249 | } |
250 | if (data->wp_pin) | 250 | if (gpio_is_valid(data->wp_pin)) |
251 | at91_set_gpio_input(data->wp_pin, 1); | 251 | at91_set_gpio_input(data->wp_pin, 1); |
252 | if (data->vcc_pin) | 252 | if (gpio_is_valid(data->vcc_pin)) |
253 | at91_set_gpio_output(data->vcc_pin, 0); | 253 | at91_set_gpio_output(data->vcc_pin, 0); |
254 | 254 | ||
255 | /* CLK */ | 255 | /* CLK */ |
@@ -330,11 +330,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) | |||
330 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { | 330 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { |
331 | if (data->slot[i].bus_width) { | 331 | if (data->slot[i].bus_width) { |
332 | /* input/irq */ | 332 | /* input/irq */ |
333 | if (data->slot[i].detect_pin) { | 333 | if (gpio_is_valid(data->slot[i].detect_pin)) { |
334 | at91_set_gpio_input(data->slot[i].detect_pin, 1); | 334 | at91_set_gpio_input(data->slot[i].detect_pin, 1); |
335 | at91_set_deglitch(data->slot[i].detect_pin, 1); | 335 | at91_set_deglitch(data->slot[i].detect_pin, 1); |
336 | } | 336 | } |
337 | if (data->slot[i].wp_pin) | 337 | if (gpio_is_valid(data->slot[i].wp_pin)) |
338 | at91_set_gpio_input(data->slot[i].wp_pin, 1); | 338 | at91_set_gpio_input(data->slot[i].wp_pin, 1); |
339 | 339 | ||
340 | switch (i) { | 340 | switch (i) { |
@@ -399,8 +399,8 @@ static struct resource nand_resources[] = { | |||
399 | .flags = IORESOURCE_MEM, | 399 | .flags = IORESOURCE_MEM, |
400 | }, | 400 | }, |
401 | [1] = { | 401 | [1] = { |
402 | .start = AT91_BASE_SYS + AT91_ECC, | 402 | .start = AT91SAM9260_BASE_ECC, |
403 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | 403 | .end = AT91SAM9260_BASE_ECC + SZ_512 - 1, |
404 | .flags = IORESOURCE_MEM, | 404 | .flags = IORESOURCE_MEM, |
405 | } | 405 | } |
406 | }; | 406 | }; |
@@ -426,15 +426,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
426 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); | 426 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
427 | 427 | ||
428 | /* enable pin */ | 428 | /* enable pin */ |
429 | if (data->enable_pin) | 429 | if (gpio_is_valid(data->enable_pin)) |
430 | at91_set_gpio_output(data->enable_pin, 1); | 430 | at91_set_gpio_output(data->enable_pin, 1); |
431 | 431 | ||
432 | /* ready/busy pin */ | 432 | /* ready/busy pin */ |
433 | if (data->rdy_pin) | 433 | if (gpio_is_valid(data->rdy_pin)) |
434 | at91_set_gpio_input(data->rdy_pin, 1); | 434 | at91_set_gpio_input(data->rdy_pin, 1); |
435 | 435 | ||
436 | /* card detect pin */ | 436 | /* card detect pin */ |
437 | if (data->det_pin) | 437 | if (gpio_is_valid(data->det_pin)) |
438 | at91_set_gpio_input(data->det_pin, 1); | 438 | at91_set_gpio_input(data->det_pin, 1); |
439 | 439 | ||
440 | nand_data = *data; | 440 | nand_data = *data; |
@@ -714,8 +714,8 @@ static void __init at91_add_device_tc(void) { } | |||
714 | 714 | ||
715 | static struct resource rtt_resources[] = { | 715 | static struct resource rtt_resources[] = { |
716 | { | 716 | { |
717 | .start = AT91_BASE_SYS + AT91_RTT, | 717 | .start = AT91SAM9260_BASE_RTT, |
718 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 718 | .end = AT91SAM9260_BASE_RTT + SZ_16 - 1, |
719 | .flags = IORESOURCE_MEM, | 719 | .flags = IORESOURCE_MEM, |
720 | } | 720 | } |
721 | }; | 721 | }; |
@@ -738,10 +738,19 @@ static void __init at91_add_device_rtt(void) | |||
738 | * -------------------------------------------------------------------- */ | 738 | * -------------------------------------------------------------------- */ |
739 | 739 | ||
740 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 740 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
741 | static struct resource wdt_resources[] = { | ||
742 | { | ||
743 | .start = AT91SAM9260_BASE_WDT, | ||
744 | .end = AT91SAM9260_BASE_WDT + SZ_16 - 1, | ||
745 | .flags = IORESOURCE_MEM, | ||
746 | } | ||
747 | }; | ||
748 | |||
741 | static struct platform_device at91sam9260_wdt_device = { | 749 | static struct platform_device at91sam9260_wdt_device = { |
742 | .name = "at91_wdt", | 750 | .name = "at91_wdt", |
743 | .id = -1, | 751 | .id = -1, |
744 | .num_resources = 0, | 752 | .resource = wdt_resources, |
753 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
745 | }; | 754 | }; |
746 | 755 | ||
747 | static void __init at91_add_device_watchdog(void) | 756 | static void __init at91_add_device_watchdog(void) |
@@ -837,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
837 | #if defined(CONFIG_SERIAL_ATMEL) | 846 | #if defined(CONFIG_SERIAL_ATMEL) |
838 | static struct resource dbgu_resources[] = { | 847 | static struct resource dbgu_resources[] = { |
839 | [0] = { | 848 | [0] = { |
840 | .start = AT91_BASE_SYS + AT91_DBGU, | 849 | .start = AT91SAM9260_BASE_DBGU, |
841 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 850 | .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1, |
842 | .flags = IORESOURCE_MEM, | 851 | .flags = IORESOURCE_MEM, |
843 | }, | 852 | }, |
844 | [1] = { | 853 | [1] = { |
@@ -1281,17 +1290,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
1281 | 1290 | ||
1282 | at91_sys_write(AT91_MATRIX_EBICSA, csa); | 1291 | at91_sys_write(AT91_MATRIX_EBICSA, csa); |
1283 | 1292 | ||
1284 | if (data->rst_pin) { | 1293 | if (gpio_is_valid(data->rst_pin)) { |
1285 | at91_set_multi_drive(data->rst_pin, 0); | 1294 | at91_set_multi_drive(data->rst_pin, 0); |
1286 | at91_set_gpio_output(data->rst_pin, 1); | 1295 | at91_set_gpio_output(data->rst_pin, 1); |
1287 | } | 1296 | } |
1288 | 1297 | ||
1289 | if (data->irq_pin) { | 1298 | if (gpio_is_valid(data->irq_pin)) { |
1290 | at91_set_gpio_input(data->irq_pin, 0); | 1299 | at91_set_gpio_input(data->irq_pin, 0); |
1291 | at91_set_deglitch(data->irq_pin, 1); | 1300 | at91_set_deglitch(data->irq_pin, 1); |
1292 | } | 1301 | } |
1293 | 1302 | ||
1294 | if (data->det_pin) { | 1303 | if (gpio_is_valid(data->det_pin)) { |
1295 | at91_set_gpio_input(data->det_pin, 0); | 1304 | at91_set_gpio_input(data->det_pin, 0); |
1296 | at91_set_deglitch(data->det_pin, 1); | 1305 | at91_set_deglitch(data->det_pin, 1); |
1297 | } | 1306 | } |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 658a5185abfd..b85b9ea60170 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -20,11 +19,11 @@ | |||
20 | #include <mach/at91sam9261.h> | 19 | #include <mach/at91sam9261.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | 22 | ||
25 | #include "soc.h" | 23 | #include "soc.h" |
26 | #include "generic.h" | 24 | #include "generic.h" |
27 | #include "clock.h" | 25 | #include "clock.h" |
26 | #include "sam9_smc.h" | ||
28 | 27 | ||
29 | /* -------------------------------------------------------------------- | 28 | /* -------------------------------------------------------------------- |
30 | * Clocks | 29 | * Clocks |
@@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
176 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 175 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
177 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), | 176 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
178 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), | 177 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), |
178 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
179 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
180 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
179 | }; | 181 | }; |
180 | 182 | ||
181 | static struct clk_lookup usart_clocks_lookups[] = { | 183 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id) | |||
251 | * GPIO | 253 | * GPIO |
252 | * -------------------------------------------------------------------- */ | 254 | * -------------------------------------------------------------------- */ |
253 | 255 | ||
254 | static struct at91_gpio_bank at91sam9261_gpio[] = { | 256 | static struct at91_gpio_bank at91sam9261_gpio[] __initdata = { |
255 | { | 257 | { |
256 | .id = AT91SAM9261_ID_PIOA, | 258 | .id = AT91SAM9261_ID_PIOA, |
257 | .offset = AT91_PIOA, | 259 | .regbase = AT91SAM9261_BASE_PIOA, |
258 | .clock = &pioA_clk, | ||
259 | }, { | 260 | }, { |
260 | .id = AT91SAM9261_ID_PIOB, | 261 | .id = AT91SAM9261_ID_PIOB, |
261 | .offset = AT91_PIOB, | 262 | .regbase = AT91SAM9261_BASE_PIOB, |
262 | .clock = &pioB_clk, | ||
263 | }, { | 263 | }, { |
264 | .id = AT91SAM9261_ID_PIOC, | 264 | .id = AT91SAM9261_ID_PIOC, |
265 | .offset = AT91_PIOC, | 265 | .regbase = AT91SAM9261_BASE_PIOC, |
266 | .clock = &pioC_clk, | ||
267 | } | 266 | } |
268 | }; | 267 | }; |
269 | 268 | ||
270 | static void at91sam9261_poweroff(void) | ||
271 | { | ||
272 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
273 | } | ||
274 | |||
275 | |||
276 | /* -------------------------------------------------------------------- | 269 | /* -------------------------------------------------------------------- |
277 | * AT91SAM9261 processor initialization | 270 | * AT91SAM9261 processor initialization |
278 | * -------------------------------------------------------------------- */ | 271 | * -------------------------------------------------------------------- */ |
@@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void) | |||
285 | at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); | 278 | at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); |
286 | } | 279 | } |
287 | 280 | ||
281 | static void __init at91sam9261_ioremap_registers(void) | ||
282 | { | ||
283 | at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC); | ||
284 | at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); | ||
285 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); | ||
286 | } | ||
287 | |||
288 | static void __init at91sam9261_initialize(void) | 288 | static void __init at91sam9261_initialize(void) |
289 | { | 289 | { |
290 | at91_arch_reset = at91sam9_alt_reset; | 290 | arm_pm_restart = at91sam9_alt_restart; |
291 | pm_power_off = at91sam9261_poweroff; | ||
292 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | 291 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) |
293 | | (1 << AT91SAM9261_ID_IRQ2); | 292 | | (1 << AT91SAM9261_ID_IRQ2); |
294 | 293 | ||
@@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
341 | struct at91_init_soc __initdata at91sam9261_soc = { | 340 | struct at91_init_soc __initdata at91sam9261_soc = { |
342 | .map_io = at91sam9261_map_io, | 341 | .map_io = at91sam9261_map_io, |
343 | .default_irq_priority = at91sam9261_default_irq_priority, | 342 | .default_irq_priority = at91sam9261_default_irq_priority, |
343 | .ioremap_registers = at91sam9261_ioremap_registers, | ||
344 | .register_clocks = at91sam9261_register_clocks, | 344 | .register_clocks = at91sam9261_register_clocks, |
345 | .init = at91sam9261_initialize, | 345 | .init = at91sam9261_initialize, |
346 | }; | 346 | }; |
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index a178b58b0b9c..fc59cbdb0e3c 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -118,7 +118,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
118 | if (!data) | 118 | if (!data) |
119 | return; | 119 | return; |
120 | 120 | ||
121 | if (data->vbus_pin) { | 121 | if (gpio_is_valid(data->vbus_pin)) { |
122 | at91_set_gpio_input(data->vbus_pin, 0); | 122 | at91_set_gpio_input(data->vbus_pin, 0); |
123 | at91_set_deglitch(data->vbus_pin, 1); | 123 | at91_set_deglitch(data->vbus_pin, 1); |
124 | } | 124 | } |
@@ -171,13 +171,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
171 | return; | 171 | return; |
172 | 172 | ||
173 | /* input/irq */ | 173 | /* input/irq */ |
174 | if (data->det_pin) { | 174 | if (gpio_is_valid(data->det_pin)) { |
175 | at91_set_gpio_input(data->det_pin, 1); | 175 | at91_set_gpio_input(data->det_pin, 1); |
176 | at91_set_deglitch(data->det_pin, 1); | 176 | at91_set_deglitch(data->det_pin, 1); |
177 | } | 177 | } |
178 | if (data->wp_pin) | 178 | if (gpio_is_valid(data->wp_pin)) |
179 | at91_set_gpio_input(data->wp_pin, 1); | 179 | at91_set_gpio_input(data->wp_pin, 1); |
180 | if (data->vcc_pin) | 180 | if (gpio_is_valid(data->vcc_pin)) |
181 | at91_set_gpio_output(data->vcc_pin, 0); | 181 | at91_set_gpio_output(data->vcc_pin, 0); |
182 | 182 | ||
183 | /* CLK */ | 183 | /* CLK */ |
@@ -240,15 +240,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
240 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); | 240 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
241 | 241 | ||
242 | /* enable pin */ | 242 | /* enable pin */ |
243 | if (data->enable_pin) | 243 | if (gpio_is_valid(data->enable_pin)) |
244 | at91_set_gpio_output(data->enable_pin, 1); | 244 | at91_set_gpio_output(data->enable_pin, 1); |
245 | 245 | ||
246 | /* ready/busy pin */ | 246 | /* ready/busy pin */ |
247 | if (data->rdy_pin) | 247 | if (gpio_is_valid(data->rdy_pin)) |
248 | at91_set_gpio_input(data->rdy_pin, 1); | 248 | at91_set_gpio_input(data->rdy_pin, 1); |
249 | 249 | ||
250 | /* card detect pin */ | 250 | /* card detect pin */ |
251 | if (data->det_pin) | 251 | if (gpio_is_valid(data->det_pin)) |
252 | at91_set_gpio_input(data->det_pin, 1); | 252 | at91_set_gpio_input(data->det_pin, 1); |
253 | 253 | ||
254 | at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ | 254 | at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ |
@@ -600,8 +600,8 @@ static void __init at91_add_device_tc(void) { } | |||
600 | 600 | ||
601 | static struct resource rtt_resources[] = { | 601 | static struct resource rtt_resources[] = { |
602 | { | 602 | { |
603 | .start = AT91_BASE_SYS + AT91_RTT, | 603 | .start = AT91SAM9261_BASE_RTT, |
604 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 604 | .end = AT91SAM9261_BASE_RTT + SZ_16 - 1, |
605 | .flags = IORESOURCE_MEM, | 605 | .flags = IORESOURCE_MEM, |
606 | } | 606 | } |
607 | }; | 607 | }; |
@@ -624,10 +624,19 @@ static void __init at91_add_device_rtt(void) | |||
624 | * -------------------------------------------------------------------- */ | 624 | * -------------------------------------------------------------------- */ |
625 | 625 | ||
626 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 626 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
627 | static struct resource wdt_resources[] = { | ||
628 | { | ||
629 | .start = AT91SAM9261_BASE_WDT, | ||
630 | .end = AT91SAM9261_BASE_WDT + SZ_16 - 1, | ||
631 | .flags = IORESOURCE_MEM, | ||
632 | } | ||
633 | }; | ||
634 | |||
627 | static struct platform_device at91sam9261_wdt_device = { | 635 | static struct platform_device at91sam9261_wdt_device = { |
628 | .name = "at91_wdt", | 636 | .name = "at91_wdt", |
629 | .id = -1, | 637 | .id = -1, |
630 | .num_resources = 0, | 638 | .resource = wdt_resources, |
639 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
631 | }; | 640 | }; |
632 | 641 | ||
633 | static void __init at91_add_device_watchdog(void) | 642 | static void __init at91_add_device_watchdog(void) |
@@ -816,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
816 | #if defined(CONFIG_SERIAL_ATMEL) | 825 | #if defined(CONFIG_SERIAL_ATMEL) |
817 | static struct resource dbgu_resources[] = { | 826 | static struct resource dbgu_resources[] = { |
818 | [0] = { | 827 | [0] = { |
819 | .start = AT91_BASE_SYS + AT91_DBGU, | 828 | .start = AT91SAM9261_BASE_DBGU, |
820 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 829 | .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1, |
821 | .flags = IORESOURCE_MEM, | 830 | .flags = IORESOURCE_MEM, |
822 | }, | 831 | }, |
823 | [1] = { | 832 | [1] = { |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index f83fbb0ee0c5..79e3669b1117 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -19,11 +18,11 @@ | |||
19 | #include <mach/at91sam9263.h> | 18 | #include <mach/at91sam9263.h> |
20 | #include <mach/at91_pmc.h> | 19 | #include <mach/at91_pmc.h> |
21 | #include <mach/at91_rstc.h> | 20 | #include <mach/at91_rstc.h> |
22 | #include <mach/at91_shdwc.h> | ||
23 | 21 | ||
24 | #include "soc.h" | 22 | #include "soc.h" |
25 | #include "generic.h" | 23 | #include "generic.h" |
26 | #include "clock.h" | 24 | #include "clock.h" |
25 | #include "sam9_smc.h" | ||
27 | 26 | ||
28 | /* -------------------------------------------------------------------- | 27 | /* -------------------------------------------------------------------- |
29 | * Clocks | 28 | * Clocks |
@@ -118,7 +117,7 @@ static struct clk pwm_clk = { | |||
118 | .type = CLK_TYPE_PERIPHERAL, | 117 | .type = CLK_TYPE_PERIPHERAL, |
119 | }; | 118 | }; |
120 | static struct clk macb_clk = { | 119 | static struct clk macb_clk = { |
121 | .name = "macb_clk", | 120 | .name = "pclk", |
122 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, | 121 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, |
123 | .type = CLK_TYPE_PERIPHERAL, | 122 | .type = CLK_TYPE_PERIPHERAL, |
124 | }; | 123 | }; |
@@ -182,6 +181,8 @@ static struct clk *periph_clocks[] __initdata = { | |||
182 | }; | 181 | }; |
183 | 182 | ||
184 | static struct clk_lookup periph_clocks_lookups[] = { | 183 | static struct clk_lookup periph_clocks_lookups[] = { |
184 | /* One additional fake clock for macb_hclk */ | ||
185 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
185 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 186 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
186 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 187 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
187 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | 188 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), |
@@ -191,6 +192,11 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
191 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | 192 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), |
192 | /* fake hclk clock */ | 193 | /* fake hclk clock */ |
193 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 194 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
195 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
196 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
197 | CLKDEV_CON_ID("pioC", &pioCDE_clk), | ||
198 | CLKDEV_CON_ID("pioD", &pioCDE_clk), | ||
199 | CLKDEV_CON_ID("pioE", &pioCDE_clk), | ||
194 | }; | 200 | }; |
195 | 201 | ||
196 | static struct clk_lookup usart_clocks_lookups[] = { | 202 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -263,36 +269,25 @@ void __init at91sam9263_set_console_clock(int id) | |||
263 | * GPIO | 269 | * GPIO |
264 | * -------------------------------------------------------------------- */ | 270 | * -------------------------------------------------------------------- */ |
265 | 271 | ||
266 | static struct at91_gpio_bank at91sam9263_gpio[] = { | 272 | static struct at91_gpio_bank at91sam9263_gpio[] __initdata = { |
267 | { | 273 | { |
268 | .id = AT91SAM9263_ID_PIOA, | 274 | .id = AT91SAM9263_ID_PIOA, |
269 | .offset = AT91_PIOA, | 275 | .regbase = AT91SAM9263_BASE_PIOA, |
270 | .clock = &pioA_clk, | ||
271 | }, { | 276 | }, { |
272 | .id = AT91SAM9263_ID_PIOB, | 277 | .id = AT91SAM9263_ID_PIOB, |
273 | .offset = AT91_PIOB, | 278 | .regbase = AT91SAM9263_BASE_PIOB, |
274 | .clock = &pioB_clk, | ||
275 | }, { | 279 | }, { |
276 | .id = AT91SAM9263_ID_PIOCDE, | 280 | .id = AT91SAM9263_ID_PIOCDE, |
277 | .offset = AT91_PIOC, | 281 | .regbase = AT91SAM9263_BASE_PIOC, |
278 | .clock = &pioCDE_clk, | ||
279 | }, { | 282 | }, { |
280 | .id = AT91SAM9263_ID_PIOCDE, | 283 | .id = AT91SAM9263_ID_PIOCDE, |
281 | .offset = AT91_PIOD, | 284 | .regbase = AT91SAM9263_BASE_PIOD, |
282 | .clock = &pioCDE_clk, | ||
283 | }, { | 285 | }, { |
284 | .id = AT91SAM9263_ID_PIOCDE, | 286 | .id = AT91SAM9263_ID_PIOCDE, |
285 | .offset = AT91_PIOE, | 287 | .regbase = AT91SAM9263_BASE_PIOE, |
286 | .clock = &pioCDE_clk, | ||
287 | } | 288 | } |
288 | }; | 289 | }; |
289 | 290 | ||
290 | static void at91sam9263_poweroff(void) | ||
291 | { | ||
292 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
293 | } | ||
294 | |||
295 | |||
296 | /* -------------------------------------------------------------------- | 291 | /* -------------------------------------------------------------------- |
297 | * AT91SAM9263 processor initialization | 292 | * AT91SAM9263 processor initialization |
298 | * -------------------------------------------------------------------- */ | 293 | * -------------------------------------------------------------------- */ |
@@ -303,10 +298,17 @@ static void __init at91sam9263_map_io(void) | |||
303 | at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); | 298 | at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); |
304 | } | 299 | } |
305 | 300 | ||
301 | static void __init at91sam9263_ioremap_registers(void) | ||
302 | { | ||
303 | at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC); | ||
304 | at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); | ||
305 | at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); | ||
306 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); | ||
307 | } | ||
308 | |||
306 | static void __init at91sam9263_initialize(void) | 309 | static void __init at91sam9263_initialize(void) |
307 | { | 310 | { |
308 | at91_arch_reset = at91sam9_alt_reset; | 311 | arm_pm_restart = at91sam9_alt_restart; |
309 | pm_power_off = at91sam9263_poweroff; | ||
310 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); | 312 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
311 | 313 | ||
312 | /* Register GPIO subsystem */ | 314 | /* Register GPIO subsystem */ |
@@ -358,6 +360,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
358 | struct at91_init_soc __initdata at91sam9263_soc = { | 360 | struct at91_init_soc __initdata at91sam9263_soc = { |
359 | .map_io = at91sam9263_map_io, | 361 | .map_io = at91sam9263_map_io, |
360 | .default_irq_priority = at91sam9263_default_irq_priority, | 362 | .default_irq_priority = at91sam9263_default_irq_priority, |
363 | .ioremap_registers = at91sam9263_ioremap_registers, | ||
361 | .register_clocks = at91sam9263_register_clocks, | 364 | .register_clocks = at91sam9263_register_clocks, |
362 | .init = at91sam9263_initialize, | 365 | .init = at91sam9263_initialize, |
363 | }; | 366 | }; |
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index d5fbac9ff4fa..7b46b2787022 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -70,7 +70,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
70 | 70 | ||
71 | /* Enable VBus control for UHP ports */ | 71 | /* Enable VBus control for UHP ports */ |
72 | for (i = 0; i < data->ports; i++) { | 72 | for (i = 0; i < data->ports; i++) { |
73 | if (data->vbus_pin[i]) | 73 | if (gpio_is_valid(data->vbus_pin[i])) |
74 | at91_set_gpio_output(data->vbus_pin[i], 0); | 74 | at91_set_gpio_output(data->vbus_pin[i], 0); |
75 | } | 75 | } |
76 | 76 | ||
@@ -123,7 +123,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
123 | if (!data) | 123 | if (!data) |
124 | return; | 124 | return; |
125 | 125 | ||
126 | if (data->vbus_pin) { | 126 | if (gpio_is_valid(data->vbus_pin)) { |
127 | at91_set_gpio_input(data->vbus_pin, 0); | 127 | at91_set_gpio_input(data->vbus_pin, 0); |
128 | at91_set_deglitch(data->vbus_pin, 1); | 128 | at91_set_deglitch(data->vbus_pin, 1); |
129 | } | 129 | } |
@@ -144,7 +144,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
144 | 144 | ||
145 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 145 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
146 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 146 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
147 | static struct at91_eth_data eth_data; | 147 | static struct macb_platform_data eth_data; |
148 | 148 | ||
149 | static struct resource eth_resources[] = { | 149 | static struct resource eth_resources[] = { |
150 | [0] = { | 150 | [0] = { |
@@ -171,12 +171,12 @@ static struct platform_device at91sam9263_eth_device = { | |||
171 | .num_resources = ARRAY_SIZE(eth_resources), | 171 | .num_resources = ARRAY_SIZE(eth_resources), |
172 | }; | 172 | }; |
173 | 173 | ||
174 | void __init at91_add_device_eth(struct at91_eth_data *data) | 174 | void __init at91_add_device_eth(struct macb_platform_data *data) |
175 | { | 175 | { |
176 | if (!data) | 176 | if (!data) |
177 | return; | 177 | return; |
178 | 178 | ||
179 | if (data->phy_irq_pin) { | 179 | if (gpio_is_valid(data->phy_irq_pin)) { |
180 | at91_set_gpio_input(data->phy_irq_pin, 0); | 180 | at91_set_gpio_input(data->phy_irq_pin, 0); |
181 | at91_set_deglitch(data->phy_irq_pin, 1); | 181 | at91_set_deglitch(data->phy_irq_pin, 1); |
182 | } | 182 | } |
@@ -208,7 +208,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
208 | platform_device_register(&at91sam9263_eth_device); | 208 | platform_device_register(&at91sam9263_eth_device); |
209 | } | 209 | } |
210 | #else | 210 | #else |
211 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 211 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
212 | #endif | 212 | #endif |
213 | 213 | ||
214 | 214 | ||
@@ -276,13 +276,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
276 | return; | 276 | return; |
277 | 277 | ||
278 | /* input/irq */ | 278 | /* input/irq */ |
279 | if (data->det_pin) { | 279 | if (gpio_is_valid(data->det_pin)) { |
280 | at91_set_gpio_input(data->det_pin, 1); | 280 | at91_set_gpio_input(data->det_pin, 1); |
281 | at91_set_deglitch(data->det_pin, 1); | 281 | at91_set_deglitch(data->det_pin, 1); |
282 | } | 282 | } |
283 | if (data->wp_pin) | 283 | if (gpio_is_valid(data->wp_pin)) |
284 | at91_set_gpio_input(data->wp_pin, 1); | 284 | at91_set_gpio_input(data->wp_pin, 1); |
285 | if (data->vcc_pin) | 285 | if (gpio_is_valid(data->vcc_pin)) |
286 | at91_set_gpio_output(data->vcc_pin, 0); | 286 | at91_set_gpio_output(data->vcc_pin, 0); |
287 | 287 | ||
288 | if (mmc_id == 0) { /* MCI0 */ | 288 | if (mmc_id == 0) { /* MCI0 */ |
@@ -430,17 +430,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
430 | } | 430 | } |
431 | at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); | 431 | at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); |
432 | 432 | ||
433 | if (data->det_pin) { | 433 | if (gpio_is_valid(data->det_pin)) { |
434 | at91_set_gpio_input(data->det_pin, 1); | 434 | at91_set_gpio_input(data->det_pin, 1); |
435 | at91_set_deglitch(data->det_pin, 1); | 435 | at91_set_deglitch(data->det_pin, 1); |
436 | } | 436 | } |
437 | 437 | ||
438 | if (data->irq_pin) { | 438 | if (gpio_is_valid(data->irq_pin)) { |
439 | at91_set_gpio_input(data->irq_pin, 1); | 439 | at91_set_gpio_input(data->irq_pin, 1); |
440 | at91_set_deglitch(data->irq_pin, 1); | 440 | at91_set_deglitch(data->irq_pin, 1); |
441 | } | 441 | } |
442 | 442 | ||
443 | if (data->vcc_pin) | 443 | if (gpio_is_valid(data->vcc_pin)) |
444 | /* initially off */ | 444 | /* initially off */ |
445 | at91_set_gpio_output(data->vcc_pin, 0); | 445 | at91_set_gpio_output(data->vcc_pin, 0); |
446 | 446 | ||
@@ -473,8 +473,8 @@ static struct resource nand_resources[] = { | |||
473 | .flags = IORESOURCE_MEM, | 473 | .flags = IORESOURCE_MEM, |
474 | }, | 474 | }, |
475 | [1] = { | 475 | [1] = { |
476 | .start = AT91_BASE_SYS + AT91_ECC0, | 476 | .start = AT91SAM9263_BASE_ECC0, |
477 | .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1, | 477 | .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1, |
478 | .flags = IORESOURCE_MEM, | 478 | .flags = IORESOURCE_MEM, |
479 | } | 479 | } |
480 | }; | 480 | }; |
@@ -500,15 +500,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
500 | at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); | 500 | at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); |
501 | 501 | ||
502 | /* enable pin */ | 502 | /* enable pin */ |
503 | if (data->enable_pin) | 503 | if (gpio_is_valid(data->enable_pin)) |
504 | at91_set_gpio_output(data->enable_pin, 1); | 504 | at91_set_gpio_output(data->enable_pin, 1); |
505 | 505 | ||
506 | /* ready/busy pin */ | 506 | /* ready/busy pin */ |
507 | if (data->rdy_pin) | 507 | if (gpio_is_valid(data->rdy_pin)) |
508 | at91_set_gpio_input(data->rdy_pin, 1); | 508 | at91_set_gpio_input(data->rdy_pin, 1); |
509 | 509 | ||
510 | /* card detect pin */ | 510 | /* card detect pin */ |
511 | if (data->det_pin) | 511 | if (gpio_is_valid(data->det_pin)) |
512 | at91_set_gpio_input(data->det_pin, 1); | 512 | at91_set_gpio_input(data->det_pin, 1); |
513 | 513 | ||
514 | nand_data = *data; | 514 | nand_data = *data; |
@@ -749,7 +749,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) | |||
749 | at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ | 749 | at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ |
750 | 750 | ||
751 | /* reset */ | 751 | /* reset */ |
752 | if (data->reset_pin) | 752 | if (gpio_is_valid(data->reset_pin)) |
753 | at91_set_gpio_output(data->reset_pin, 0); | 753 | at91_set_gpio_output(data->reset_pin, 0); |
754 | 754 | ||
755 | ac97_data = *data; | 755 | ac97_data = *data; |
@@ -956,8 +956,8 @@ static void __init at91_add_device_tc(void) { } | |||
956 | 956 | ||
957 | static struct resource rtt0_resources[] = { | 957 | static struct resource rtt0_resources[] = { |
958 | { | 958 | { |
959 | .start = AT91_BASE_SYS + AT91_RTT0, | 959 | .start = AT91SAM9263_BASE_RTT0, |
960 | .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, | 960 | .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1, |
961 | .flags = IORESOURCE_MEM, | 961 | .flags = IORESOURCE_MEM, |
962 | } | 962 | } |
963 | }; | 963 | }; |
@@ -971,8 +971,8 @@ static struct platform_device at91sam9263_rtt0_device = { | |||
971 | 971 | ||
972 | static struct resource rtt1_resources[] = { | 972 | static struct resource rtt1_resources[] = { |
973 | { | 973 | { |
974 | .start = AT91_BASE_SYS + AT91_RTT1, | 974 | .start = AT91SAM9263_BASE_RTT1, |
975 | .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, | 975 | .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1, |
976 | .flags = IORESOURCE_MEM, | 976 | .flags = IORESOURCE_MEM, |
977 | } | 977 | } |
978 | }; | 978 | }; |
@@ -996,10 +996,19 @@ static void __init at91_add_device_rtt(void) | |||
996 | * -------------------------------------------------------------------- */ | 996 | * -------------------------------------------------------------------- */ |
997 | 997 | ||
998 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 998 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
999 | static struct resource wdt_resources[] = { | ||
1000 | { | ||
1001 | .start = AT91SAM9263_BASE_WDT, | ||
1002 | .end = AT91SAM9263_BASE_WDT + SZ_16 - 1, | ||
1003 | .flags = IORESOURCE_MEM, | ||
1004 | } | ||
1005 | }; | ||
1006 | |||
999 | static struct platform_device at91sam9263_wdt_device = { | 1007 | static struct platform_device at91sam9263_wdt_device = { |
1000 | .name = "at91_wdt", | 1008 | .name = "at91_wdt", |
1001 | .id = -1, | 1009 | .id = -1, |
1002 | .num_resources = 0, | 1010 | .resource = wdt_resources, |
1011 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
1003 | }; | 1012 | }; |
1004 | 1013 | ||
1005 | static void __init at91_add_device_watchdog(void) | 1014 | static void __init at91_add_device_watchdog(void) |
@@ -1196,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
1196 | 1205 | ||
1197 | static struct resource dbgu_resources[] = { | 1206 | static struct resource dbgu_resources[] = { |
1198 | [0] = { | 1207 | [0] = { |
1199 | .start = AT91_BASE_SYS + AT91_DBGU, | 1208 | .start = AT91SAM9263_BASE_DBGU, |
1200 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 1209 | .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1, |
1201 | .flags = IORESOURCE_MEM, | 1210 | .flags = IORESOURCE_MEM, |
1202 | }, | 1211 | }, |
1203 | [1] = { | 1212 | [1] = { |
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index 4ba85499fa97..d89ead740a99 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c | |||
@@ -25,7 +25,17 @@ | |||
25 | 25 | ||
26 | static u32 pit_cycle; /* write-once */ | 26 | static u32 pit_cycle; /* write-once */ |
27 | static u32 pit_cnt; /* access only w/system irq blocked */ | 27 | static u32 pit_cnt; /* access only w/system irq blocked */ |
28 | static void __iomem *pit_base_addr __read_mostly; | ||
28 | 29 | ||
30 | static inline unsigned int pit_read(unsigned int reg_offset) | ||
31 | { | ||
32 | return __raw_readl(pit_base_addr + reg_offset); | ||
33 | } | ||
34 | |||
35 | static inline void pit_write(unsigned int reg_offset, unsigned long value) | ||
36 | { | ||
37 | __raw_writel(value, pit_base_addr + reg_offset); | ||
38 | } | ||
29 | 39 | ||
30 | /* | 40 | /* |
31 | * Clocksource: just a monotonic counter of MCK/16 cycles. | 41 | * Clocksource: just a monotonic counter of MCK/16 cycles. |
@@ -39,7 +49,7 @@ static cycle_t read_pit_clk(struct clocksource *cs) | |||
39 | 49 | ||
40 | raw_local_irq_save(flags); | 50 | raw_local_irq_save(flags); |
41 | elapsed = pit_cnt; | 51 | elapsed = pit_cnt; |
42 | t = at91_sys_read(AT91_PIT_PIIR); | 52 | t = pit_read(AT91_PIT_PIIR); |
43 | raw_local_irq_restore(flags); | 53 | raw_local_irq_restore(flags); |
44 | 54 | ||
45 | elapsed += PIT_PICNT(t) * pit_cycle; | 55 | elapsed += PIT_PICNT(t) * pit_cycle; |
@@ -64,8 +74,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
64 | switch (mode) { | 74 | switch (mode) { |
65 | case CLOCK_EVT_MODE_PERIODIC: | 75 | case CLOCK_EVT_MODE_PERIODIC: |
66 | /* update clocksource counter */ | 76 | /* update clocksource counter */ |
67 | pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); | 77 | pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR)); |
68 | at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN | 78 | pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN |
69 | | AT91_PIT_PITIEN); | 79 | | AT91_PIT_PITIEN); |
70 | break; | 80 | break; |
71 | case CLOCK_EVT_MODE_ONESHOT: | 81 | case CLOCK_EVT_MODE_ONESHOT: |
@@ -74,7 +84,7 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
74 | case CLOCK_EVT_MODE_SHUTDOWN: | 84 | case CLOCK_EVT_MODE_SHUTDOWN: |
75 | case CLOCK_EVT_MODE_UNUSED: | 85 | case CLOCK_EVT_MODE_UNUSED: |
76 | /* disable irq, leaving the clocksource active */ | 86 | /* disable irq, leaving the clocksource active */ |
77 | at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); | 87 | pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); |
78 | break; | 88 | break; |
79 | case CLOCK_EVT_MODE_RESUME: | 89 | case CLOCK_EVT_MODE_RESUME: |
80 | break; | 90 | break; |
@@ -103,11 +113,11 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) | |||
103 | 113 | ||
104 | /* The PIT interrupt may be disabled, and is shared */ | 114 | /* The PIT interrupt may be disabled, and is shared */ |
105 | if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) | 115 | if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) |
106 | && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) { | 116 | && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) { |
107 | unsigned nr_ticks; | 117 | unsigned nr_ticks; |
108 | 118 | ||
109 | /* Get number of ticks performed before irq, and ack it */ | 119 | /* Get number of ticks performed before irq, and ack it */ |
110 | nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); | 120 | nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR)); |
111 | do { | 121 | do { |
112 | pit_cnt += pit_cycle; | 122 | pit_cnt += pit_cycle; |
113 | pit_clkevt.event_handler(&pit_clkevt); | 123 | pit_clkevt.event_handler(&pit_clkevt); |
@@ -129,14 +139,14 @@ static struct irqaction at91sam926x_pit_irq = { | |||
129 | static void at91sam926x_pit_reset(void) | 139 | static void at91sam926x_pit_reset(void) |
130 | { | 140 | { |
131 | /* Disable timer and irqs */ | 141 | /* Disable timer and irqs */ |
132 | at91_sys_write(AT91_PIT_MR, 0); | 142 | pit_write(AT91_PIT_MR, 0); |
133 | 143 | ||
134 | /* Clear any pending interrupts, wait for PIT to stop counting */ | 144 | /* Clear any pending interrupts, wait for PIT to stop counting */ |
135 | while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0) | 145 | while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0) |
136 | cpu_relax(); | 146 | cpu_relax(); |
137 | 147 | ||
138 | /* Start PIT but don't enable IRQ */ | 148 | /* Start PIT but don't enable IRQ */ |
139 | at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); | 149 | pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); |
140 | } | 150 | } |
141 | 151 | ||
142 | /* | 152 | /* |
@@ -178,7 +188,15 @@ static void __init at91sam926x_pit_init(void) | |||
178 | static void at91sam926x_pit_suspend(void) | 188 | static void at91sam926x_pit_suspend(void) |
179 | { | 189 | { |
180 | /* Disable timer */ | 190 | /* Disable timer */ |
181 | at91_sys_write(AT91_PIT_MR, 0); | 191 | pit_write(AT91_PIT_MR, 0); |
192 | } | ||
193 | |||
194 | void __init at91sam926x_ioremap_pit(u32 addr) | ||
195 | { | ||
196 | pit_base_addr = ioremap(addr, 16); | ||
197 | |||
198 | if (!pit_base_addr) | ||
199 | panic("Impossible to ioremap PIT\n"); | ||
182 | } | 200 | } |
183 | 201 | ||
184 | struct sys_timer at91sam926x_timer = { | 202 | struct sys_timer at91sam926x_timer = { |
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S index e0256deb91fb..d3f931c5942e 100644 --- a/arch/arm/mach-at91/at91sam9_alt_reset.S +++ b/arch/arm/mach-at91/at91sam9_alt_reset.S | |||
@@ -14,20 +14,15 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/linkage.h> | 16 | #include <linux/linkage.h> |
17 | #include <asm/system.h> | ||
18 | #include <mach/hardware.h> | 17 | #include <mach/hardware.h> |
19 | #include <mach/at91sam9_sdramc.h> | 18 | #include <mach/at91sam9_sdramc.h> |
20 | #include <mach/at91_rstc.h> | 19 | #include <mach/at91_rstc.h> |
21 | 20 | ||
22 | .arm | 21 | .arm |
23 | 22 | ||
24 | .globl at91sam9_alt_reset | 23 | .globl at91sam9_alt_restart |
25 | 24 | ||
26 | at91sam9_alt_reset: mrc p15, 0, r0, c1, c0, 0 | 25 | at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants |
27 | orr r0, r0, #CR_I | ||
28 | mcr p15, 0, r0, c1, c0, 0 @ enable I-cache | ||
29 | |||
30 | ldr r0, .at91_va_base_sdramc @ preload constants | ||
31 | ldr r1, .at91_va_base_rstc_cr | 26 | ldr r1, .at91_va_base_rstc_cr |
32 | 27 | ||
33 | mov r2, #1 | 28 | mov r2, #1 |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 318b0407ea04..7032dd32cdf0 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
16 | 15 | ||
17 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
@@ -20,12 +19,12 @@ | |||
20 | #include <mach/at91sam9g45.h> | 19 | #include <mach/at91sam9g45.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | #include <mach/cpu.h> | 22 | #include <mach/cpu.h> |
25 | 23 | ||
26 | #include "soc.h" | 24 | #include "soc.h" |
27 | #include "generic.h" | 25 | #include "generic.h" |
28 | #include "clock.h" | 26 | #include "clock.h" |
27 | #include "sam9_smc.h" | ||
29 | 28 | ||
30 | /* -------------------------------------------------------------------- | 29 | /* -------------------------------------------------------------------- |
31 | * Clocks | 30 | * Clocks |
@@ -150,7 +149,7 @@ static struct clk ac97_clk = { | |||
150 | .type = CLK_TYPE_PERIPHERAL, | 149 | .type = CLK_TYPE_PERIPHERAL, |
151 | }; | 150 | }; |
152 | static struct clk macb_clk = { | 151 | static struct clk macb_clk = { |
153 | .name = "macb_clk", | 152 | .name = "pclk", |
154 | .pmc_mask = 1 << AT91SAM9G45_ID_EMAC, | 153 | .pmc_mask = 1 << AT91SAM9G45_ID_EMAC, |
155 | .type = CLK_TYPE_PERIPHERAL, | 154 | .type = CLK_TYPE_PERIPHERAL, |
156 | }; | 155 | }; |
@@ -209,6 +208,8 @@ static struct clk *periph_clocks[] __initdata = { | |||
209 | }; | 208 | }; |
210 | 209 | ||
211 | static struct clk_lookup periph_clocks_lookups[] = { | 210 | static struct clk_lookup periph_clocks_lookups[] = { |
211 | /* One additional fake clock for macb_hclk */ | ||
212 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
212 | /* One additional fake clock for ohci */ | 213 | /* One additional fake clock for ohci */ |
213 | CLKDEV_CON_ID("ohci_clk", &uhphs_clk), | 214 | CLKDEV_CON_ID("ohci_clk", &uhphs_clk), |
214 | CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk), | 215 | CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk), |
@@ -231,6 +232,11 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
231 | CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), | 232 | CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), |
232 | /* fake hclk clock */ | 233 | /* fake hclk clock */ |
233 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), | 234 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), |
235 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
236 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
237 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
238 | CLKDEV_CON_ID("pioD", &pioDE_clk), | ||
239 | CLKDEV_CON_ID("pioE", &pioDE_clk), | ||
234 | }; | 240 | }; |
235 | 241 | ||
236 | static struct clk_lookup usart_clocks_lookups[] = { | 242 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -293,41 +299,30 @@ void __init at91sam9g45_set_console_clock(int id) | |||
293 | * GPIO | 299 | * GPIO |
294 | * -------------------------------------------------------------------- */ | 300 | * -------------------------------------------------------------------- */ |
295 | 301 | ||
296 | static struct at91_gpio_bank at91sam9g45_gpio[] = { | 302 | static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { |
297 | { | 303 | { |
298 | .id = AT91SAM9G45_ID_PIOA, | 304 | .id = AT91SAM9G45_ID_PIOA, |
299 | .offset = AT91_PIOA, | 305 | .regbase = AT91SAM9G45_BASE_PIOA, |
300 | .clock = &pioA_clk, | ||
301 | }, { | 306 | }, { |
302 | .id = AT91SAM9G45_ID_PIOB, | 307 | .id = AT91SAM9G45_ID_PIOB, |
303 | .offset = AT91_PIOB, | 308 | .regbase = AT91SAM9G45_BASE_PIOB, |
304 | .clock = &pioB_clk, | ||
305 | }, { | 309 | }, { |
306 | .id = AT91SAM9G45_ID_PIOC, | 310 | .id = AT91SAM9G45_ID_PIOC, |
307 | .offset = AT91_PIOC, | 311 | .regbase = AT91SAM9G45_BASE_PIOC, |
308 | .clock = &pioC_clk, | ||
309 | }, { | 312 | }, { |
310 | .id = AT91SAM9G45_ID_PIODE, | 313 | .id = AT91SAM9G45_ID_PIODE, |
311 | .offset = AT91_PIOD, | 314 | .regbase = AT91SAM9G45_BASE_PIOD, |
312 | .clock = &pioDE_clk, | ||
313 | }, { | 315 | }, { |
314 | .id = AT91SAM9G45_ID_PIODE, | 316 | .id = AT91SAM9G45_ID_PIODE, |
315 | .offset = AT91_PIOE, | 317 | .regbase = AT91SAM9G45_BASE_PIOE, |
316 | .clock = &pioDE_clk, | ||
317 | } | 318 | } |
318 | }; | 319 | }; |
319 | 320 | ||
320 | static void at91sam9g45_reset(void) | 321 | static void at91sam9g45_restart(char mode, const char *cmd) |
321 | { | 322 | { |
322 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | 323 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
323 | } | 324 | } |
324 | 325 | ||
325 | static void at91sam9g45_poweroff(void) | ||
326 | { | ||
327 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
328 | } | ||
329 | |||
330 | |||
331 | /* -------------------------------------------------------------------- | 326 | /* -------------------------------------------------------------------- |
332 | * AT91SAM9G45 processor initialization | 327 | * AT91SAM9G45 processor initialization |
333 | * -------------------------------------------------------------------- */ | 328 | * -------------------------------------------------------------------- */ |
@@ -338,10 +333,16 @@ static void __init at91sam9g45_map_io(void) | |||
338 | init_consistent_dma_size(SZ_4M); | 333 | init_consistent_dma_size(SZ_4M); |
339 | } | 334 | } |
340 | 335 | ||
336 | static void __init at91sam9g45_ioremap_registers(void) | ||
337 | { | ||
338 | at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC); | ||
339 | at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); | ||
340 | at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); | ||
341 | } | ||
342 | |||
341 | static void __init at91sam9g45_initialize(void) | 343 | static void __init at91sam9g45_initialize(void) |
342 | { | 344 | { |
343 | at91_arch_reset = at91sam9g45_reset; | 345 | arm_pm_restart = at91sam9g45_restart; |
344 | pm_power_off = at91sam9g45_poweroff; | ||
345 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); | 346 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); |
346 | 347 | ||
347 | /* Register GPIO subsystem */ | 348 | /* Register GPIO subsystem */ |
@@ -393,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
393 | struct at91_init_soc __initdata at91sam9g45_soc = { | 394 | struct at91_init_soc __initdata at91sam9g45_soc = { |
394 | .map_io = at91sam9g45_map_io, | 395 | .map_io = at91sam9g45_map_io, |
395 | .default_irq_priority = at91sam9g45_default_irq_priority, | 396 | .default_irq_priority = at91sam9g45_default_irq_priority, |
397 | .ioremap_registers = at91sam9g45_ioremap_registers, | ||
396 | .register_clocks = at91sam9g45_register_clocks, | 398 | .register_clocks = at91sam9g45_register_clocks, |
397 | .init = at91sam9g45_initialize, | 399 | .init = at91sam9g45_initialize, |
398 | }; | 400 | }; |
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 09a16d6bd5cd..b7582dd10dc3 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = { | |||
44 | 44 | ||
45 | static struct resource hdmac_resources[] = { | 45 | static struct resource hdmac_resources[] = { |
46 | [0] = { | 46 | [0] = { |
47 | .start = AT91_BASE_SYS + AT91_DMA, | 47 | .start = AT91SAM9G45_BASE_DMA, |
48 | .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, | 48 | .end = AT91SAM9G45_BASE_DMA + SZ_512 - 1, |
49 | .flags = IORESOURCE_MEM, | 49 | .flags = IORESOURCE_MEM, |
50 | }, | 50 | }, |
51 | [1] = { | 51 | [1] = { |
@@ -120,7 +120,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) | |||
120 | 120 | ||
121 | /* Enable VBus control for UHP ports */ | 121 | /* Enable VBus control for UHP ports */ |
122 | for (i = 0; i < data->ports; i++) { | 122 | for (i = 0; i < data->ports; i++) { |
123 | if (data->vbus_pin[i]) | 123 | if (gpio_is_valid(data->vbus_pin[i])) |
124 | at91_set_gpio_output(data->vbus_pin[i], 0); | 124 | at91_set_gpio_output(data->vbus_pin[i], 0); |
125 | } | 125 | } |
126 | 126 | ||
@@ -181,7 +181,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) | |||
181 | 181 | ||
182 | /* Enable VBus control for UHP ports */ | 182 | /* Enable VBus control for UHP ports */ |
183 | for (i = 0; i < data->ports; i++) { | 183 | for (i = 0; i < data->ports; i++) { |
184 | if (data->vbus_pin[i]) | 184 | if (gpio_is_valid(data->vbus_pin[i])) |
185 | at91_set_gpio_output(data->vbus_pin[i], 0); | 185 | at91_set_gpio_output(data->vbus_pin[i], 0); |
186 | } | 186 | } |
187 | 187 | ||
@@ -263,7 +263,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
263 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); | 263 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); |
264 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); | 264 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); |
265 | 265 | ||
266 | if (data && data->vbus_pin > 0) { | 266 | if (data && gpio_is_valid(data->vbus_pin)) { |
267 | at91_set_gpio_input(data->vbus_pin, 0); | 267 | at91_set_gpio_input(data->vbus_pin, 0); |
268 | at91_set_deglitch(data->vbus_pin, 1); | 268 | at91_set_deglitch(data->vbus_pin, 1); |
269 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; | 269 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; |
@@ -284,7 +284,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {} | |||
284 | 284 | ||
285 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 285 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
286 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 286 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
287 | static struct at91_eth_data eth_data; | 287 | static struct macb_platform_data eth_data; |
288 | 288 | ||
289 | static struct resource eth_resources[] = { | 289 | static struct resource eth_resources[] = { |
290 | [0] = { | 290 | [0] = { |
@@ -311,12 +311,12 @@ static struct platform_device at91sam9g45_eth_device = { | |||
311 | .num_resources = ARRAY_SIZE(eth_resources), | 311 | .num_resources = ARRAY_SIZE(eth_resources), |
312 | }; | 312 | }; |
313 | 313 | ||
314 | void __init at91_add_device_eth(struct at91_eth_data *data) | 314 | void __init at91_add_device_eth(struct macb_platform_data *data) |
315 | { | 315 | { |
316 | if (!data) | 316 | if (!data) |
317 | return; | 317 | return; |
318 | 318 | ||
319 | if (data->phy_irq_pin) { | 319 | if (gpio_is_valid(data->phy_irq_pin)) { |
320 | at91_set_gpio_input(data->phy_irq_pin, 0); | 320 | at91_set_gpio_input(data->phy_irq_pin, 0); |
321 | at91_set_deglitch(data->phy_irq_pin, 1); | 321 | at91_set_deglitch(data->phy_irq_pin, 1); |
322 | } | 322 | } |
@@ -348,7 +348,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
348 | platform_device_register(&at91sam9g45_eth_device); | 348 | platform_device_register(&at91sam9g45_eth_device); |
349 | } | 349 | } |
350 | #else | 350 | #else |
351 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 351 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
352 | #endif | 352 | #endif |
353 | 353 | ||
354 | 354 | ||
@@ -449,11 +449,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) | |||
449 | 449 | ||
450 | 450 | ||
451 | /* input/irq */ | 451 | /* input/irq */ |
452 | if (data->slot[0].detect_pin) { | 452 | if (gpio_is_valid(data->slot[0].detect_pin)) { |
453 | at91_set_gpio_input(data->slot[0].detect_pin, 1); | 453 | at91_set_gpio_input(data->slot[0].detect_pin, 1); |
454 | at91_set_deglitch(data->slot[0].detect_pin, 1); | 454 | at91_set_deglitch(data->slot[0].detect_pin, 1); |
455 | } | 455 | } |
456 | if (data->slot[0].wp_pin) | 456 | if (gpio_is_valid(data->slot[0].wp_pin)) |
457 | at91_set_gpio_input(data->slot[0].wp_pin, 1); | 457 | at91_set_gpio_input(data->slot[0].wp_pin, 1); |
458 | 458 | ||
459 | if (mmc_id == 0) { /* MCI0 */ | 459 | if (mmc_id == 0) { /* MCI0 */ |
@@ -529,8 +529,8 @@ static struct resource nand_resources[] = { | |||
529 | .flags = IORESOURCE_MEM, | 529 | .flags = IORESOURCE_MEM, |
530 | }, | 530 | }, |
531 | [1] = { | 531 | [1] = { |
532 | .start = AT91_BASE_SYS + AT91_ECC, | 532 | .start = AT91SAM9G45_BASE_ECC, |
533 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | 533 | .end = AT91SAM9G45_BASE_ECC + SZ_512 - 1, |
534 | .flags = IORESOURCE_MEM, | 534 | .flags = IORESOURCE_MEM, |
535 | } | 535 | } |
536 | }; | 536 | }; |
@@ -556,15 +556,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
556 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); | 556 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); |
557 | 557 | ||
558 | /* enable pin */ | 558 | /* enable pin */ |
559 | if (data->enable_pin) | 559 | if (gpio_is_valid(data->enable_pin)) |
560 | at91_set_gpio_output(data->enable_pin, 1); | 560 | at91_set_gpio_output(data->enable_pin, 1); |
561 | 561 | ||
562 | /* ready/busy pin */ | 562 | /* ready/busy pin */ |
563 | if (data->rdy_pin) | 563 | if (gpio_is_valid(data->rdy_pin)) |
564 | at91_set_gpio_input(data->rdy_pin, 1); | 564 | at91_set_gpio_input(data->rdy_pin, 1); |
565 | 565 | ||
566 | /* card detect pin */ | 566 | /* card detect pin */ |
567 | if (data->det_pin) | 567 | if (gpio_is_valid(data->det_pin)) |
568 | at91_set_gpio_input(data->det_pin, 1); | 568 | at91_set_gpio_input(data->det_pin, 1); |
569 | 569 | ||
570 | nand_data = *data; | 570 | nand_data = *data; |
@@ -859,7 +859,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) | |||
859 | at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */ | 859 | at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */ |
860 | 860 | ||
861 | /* reset */ | 861 | /* reset */ |
862 | if (data->reset_pin) | 862 | if (gpio_is_valid(data->reset_pin)) |
863 | at91_set_gpio_output(data->reset_pin, 0); | 863 | at91_set_gpio_output(data->reset_pin, 0); |
864 | 864 | ||
865 | ac97_data = *data; | 865 | ac97_data = *data; |
@@ -1009,10 +1009,24 @@ static void __init at91_add_device_tc(void) { } | |||
1009 | * -------------------------------------------------------------------- */ | 1009 | * -------------------------------------------------------------------- */ |
1010 | 1010 | ||
1011 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) | 1011 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) |
1012 | static struct resource rtc_resources[] = { | ||
1013 | [0] = { | ||
1014 | .start = AT91SAM9G45_BASE_RTC, | ||
1015 | .end = AT91SAM9G45_BASE_RTC + SZ_256 - 1, | ||
1016 | .flags = IORESOURCE_MEM, | ||
1017 | }, | ||
1018 | [1] = { | ||
1019 | .start = AT91_ID_SYS, | ||
1020 | .end = AT91_ID_SYS, | ||
1021 | .flags = IORESOURCE_IRQ, | ||
1022 | }, | ||
1023 | }; | ||
1024 | |||
1012 | static struct platform_device at91sam9g45_rtc_device = { | 1025 | static struct platform_device at91sam9g45_rtc_device = { |
1013 | .name = "at91_rtc", | 1026 | .name = "at91_rtc", |
1014 | .id = -1, | 1027 | .id = -1, |
1015 | .num_resources = 0, | 1028 | .resource = rtc_resources, |
1029 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
1016 | }; | 1030 | }; |
1017 | 1031 | ||
1018 | static void __init at91_add_device_rtc(void) | 1032 | static void __init at91_add_device_rtc(void) |
@@ -1081,8 +1095,8 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {} | |||
1081 | 1095 | ||
1082 | static struct resource rtt_resources[] = { | 1096 | static struct resource rtt_resources[] = { |
1083 | { | 1097 | { |
1084 | .start = AT91_BASE_SYS + AT91_RTT, | 1098 | .start = AT91SAM9G45_BASE_RTT, |
1085 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 1099 | .end = AT91SAM9G45_BASE_RTT + SZ_16 - 1, |
1086 | .flags = IORESOURCE_MEM, | 1100 | .flags = IORESOURCE_MEM, |
1087 | } | 1101 | } |
1088 | }; | 1102 | }; |
@@ -1133,10 +1147,19 @@ static void __init at91_add_device_trng(void) {} | |||
1133 | * -------------------------------------------------------------------- */ | 1147 | * -------------------------------------------------------------------- */ |
1134 | 1148 | ||
1135 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 1149 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
1150 | static struct resource wdt_resources[] = { | ||
1151 | { | ||
1152 | .start = AT91SAM9G45_BASE_WDT, | ||
1153 | .end = AT91SAM9G45_BASE_WDT + SZ_16 - 1, | ||
1154 | .flags = IORESOURCE_MEM, | ||
1155 | } | ||
1156 | }; | ||
1157 | |||
1136 | static struct platform_device at91sam9g45_wdt_device = { | 1158 | static struct platform_device at91sam9g45_wdt_device = { |
1137 | .name = "at91_wdt", | 1159 | .name = "at91_wdt", |
1138 | .id = -1, | 1160 | .id = -1, |
1139 | .num_resources = 0, | 1161 | .resource = wdt_resources, |
1162 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
1140 | }; | 1163 | }; |
1141 | 1164 | ||
1142 | static void __init at91_add_device_watchdog(void) | 1165 | static void __init at91_add_device_watchdog(void) |
@@ -1332,8 +1355,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
1332 | #if defined(CONFIG_SERIAL_ATMEL) | 1355 | #if defined(CONFIG_SERIAL_ATMEL) |
1333 | static struct resource dbgu_resources[] = { | 1356 | static struct resource dbgu_resources[] = { |
1334 | [0] = { | 1357 | [0] = { |
1335 | .start = AT91_BASE_SYS + AT91_DBGU, | 1358 | .start = AT91SAM9G45_BASE_DBGU, |
1336 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 1359 | .end = AT91SAM9G45_BASE_DBGU + SZ_512 - 1, |
1337 | .flags = IORESOURCE_MEM, | 1360 | .flags = IORESOURCE_MEM, |
1338 | }, | 1361 | }, |
1339 | [1] = { | 1362 | [1] = { |
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index a238105d2c11..d6bcb1da11df 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/pm.h> | ||
14 | 13 | ||
15 | #include <asm/irq.h> | 14 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 15 | #include <asm/mach/arch.h> |
@@ -20,11 +19,11 @@ | |||
20 | #include <mach/at91sam9rl.h> | 19 | #include <mach/at91sam9rl.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | 22 | ||
25 | #include "soc.h" | 23 | #include "soc.h" |
26 | #include "generic.h" | 24 | #include "generic.h" |
27 | #include "clock.h" | 25 | #include "clock.h" |
26 | #include "sam9_smc.h" | ||
28 | 27 | ||
29 | /* -------------------------------------------------------------------- | 28 | /* -------------------------------------------------------------------- |
30 | * Clocks | 29 | * Clocks |
@@ -184,6 +183,10 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
184 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), | 183 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), |
185 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 184 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
186 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 185 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
186 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
187 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
188 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
189 | CLKDEV_CON_ID("pioD", &pioD_clk), | ||
187 | }; | 190 | }; |
188 | 191 | ||
189 | static struct clk_lookup usart_clocks_lookups[] = { | 192 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -243,32 +246,22 @@ void __init at91sam9rl_set_console_clock(int id) | |||
243 | * GPIO | 246 | * GPIO |
244 | * -------------------------------------------------------------------- */ | 247 | * -------------------------------------------------------------------- */ |
245 | 248 | ||
246 | static struct at91_gpio_bank at91sam9rl_gpio[] = { | 249 | static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = { |
247 | { | 250 | { |
248 | .id = AT91SAM9RL_ID_PIOA, | 251 | .id = AT91SAM9RL_ID_PIOA, |
249 | .offset = AT91_PIOA, | 252 | .regbase = AT91SAM9RL_BASE_PIOA, |
250 | .clock = &pioA_clk, | ||
251 | }, { | 253 | }, { |
252 | .id = AT91SAM9RL_ID_PIOB, | 254 | .id = AT91SAM9RL_ID_PIOB, |
253 | .offset = AT91_PIOB, | 255 | .regbase = AT91SAM9RL_BASE_PIOB, |
254 | .clock = &pioB_clk, | ||
255 | }, { | 256 | }, { |
256 | .id = AT91SAM9RL_ID_PIOC, | 257 | .id = AT91SAM9RL_ID_PIOC, |
257 | .offset = AT91_PIOC, | 258 | .regbase = AT91SAM9RL_BASE_PIOC, |
258 | .clock = &pioC_clk, | ||
259 | }, { | 259 | }, { |
260 | .id = AT91SAM9RL_ID_PIOD, | 260 | .id = AT91SAM9RL_ID_PIOD, |
261 | .offset = AT91_PIOD, | 261 | .regbase = AT91SAM9RL_BASE_PIOD, |
262 | .clock = &pioD_clk, | ||
263 | } | 262 | } |
264 | }; | 263 | }; |
265 | 264 | ||
266 | static void at91sam9rl_poweroff(void) | ||
267 | { | ||
268 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
269 | } | ||
270 | |||
271 | |||
272 | /* -------------------------------------------------------------------- | 265 | /* -------------------------------------------------------------------- |
273 | * AT91SAM9RL processor initialization | 266 | * AT91SAM9RL processor initialization |
274 | * -------------------------------------------------------------------- */ | 267 | * -------------------------------------------------------------------- */ |
@@ -290,10 +283,16 @@ static void __init at91sam9rl_map_io(void) | |||
290 | at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); | 283 | at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); |
291 | } | 284 | } |
292 | 285 | ||
286 | static void __init at91sam9rl_ioremap_registers(void) | ||
287 | { | ||
288 | at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC); | ||
289 | at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); | ||
290 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); | ||
291 | } | ||
292 | |||
293 | static void __init at91sam9rl_initialize(void) | 293 | static void __init at91sam9rl_initialize(void) |
294 | { | 294 | { |
295 | at91_arch_reset = at91sam9_alt_reset; | 295 | arm_pm_restart = at91sam9_alt_restart; |
296 | pm_power_off = at91sam9rl_poweroff; | ||
297 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); | 296 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); |
298 | 297 | ||
299 | /* Register GPIO subsystem */ | 298 | /* Register GPIO subsystem */ |
@@ -345,6 +344,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
345 | struct at91_init_soc __initdata at91sam9rl_soc = { | 344 | struct at91_init_soc __initdata at91sam9rl_soc = { |
346 | .map_io = at91sam9rl_map_io, | 345 | .map_io = at91sam9rl_map_io, |
347 | .default_irq_priority = at91sam9rl_default_irq_priority, | 346 | .default_irq_priority = at91sam9rl_default_irq_priority, |
347 | .ioremap_registers = at91sam9rl_ioremap_registers, | ||
348 | .register_clocks = at91sam9rl_register_clocks, | 348 | .register_clocks = at91sam9rl_register_clocks, |
349 | .init = at91sam9rl_initialize, | 349 | .init = at91sam9rl_initialize, |
350 | }; | 350 | }; |
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 628eb566d60c..61908dce9784 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c | |||
@@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = { | |||
39 | 39 | ||
40 | static struct resource hdmac_resources[] = { | 40 | static struct resource hdmac_resources[] = { |
41 | [0] = { | 41 | [0] = { |
42 | .start = AT91_BASE_SYS + AT91_DMA, | 42 | .start = AT91SAM9RL_BASE_DMA, |
43 | .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, | 43 | .end = AT91SAM9RL_BASE_DMA + SZ_512 - 1, |
44 | .flags = IORESOURCE_MEM, | 44 | .flags = IORESOURCE_MEM, |
45 | }, | 45 | }, |
46 | [2] = { | 46 | [2] = { |
@@ -147,7 +147,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
147 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); | 147 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); |
148 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); | 148 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); |
149 | 149 | ||
150 | if (data && data->vbus_pin > 0) { | 150 | if (data && gpio_is_valid(data->vbus_pin)) { |
151 | at91_set_gpio_input(data->vbus_pin, 0); | 151 | at91_set_gpio_input(data->vbus_pin, 0); |
152 | at91_set_deglitch(data->vbus_pin, 1); | 152 | at91_set_deglitch(data->vbus_pin, 1); |
153 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; | 153 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; |
@@ -201,13 +201,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
201 | return; | 201 | return; |
202 | 202 | ||
203 | /* input/irq */ | 203 | /* input/irq */ |
204 | if (data->det_pin) { | 204 | if (gpio_is_valid(data->det_pin)) { |
205 | at91_set_gpio_input(data->det_pin, 1); | 205 | at91_set_gpio_input(data->det_pin, 1); |
206 | at91_set_deglitch(data->det_pin, 1); | 206 | at91_set_deglitch(data->det_pin, 1); |
207 | } | 207 | } |
208 | if (data->wp_pin) | 208 | if (gpio_is_valid(data->wp_pin)) |
209 | at91_set_gpio_input(data->wp_pin, 1); | 209 | at91_set_gpio_input(data->wp_pin, 1); |
210 | if (data->vcc_pin) | 210 | if (gpio_is_valid(data->vcc_pin)) |
211 | at91_set_gpio_output(data->vcc_pin, 0); | 211 | at91_set_gpio_output(data->vcc_pin, 0); |
212 | 212 | ||
213 | /* CLK */ | 213 | /* CLK */ |
@@ -248,8 +248,8 @@ static struct resource nand_resources[] = { | |||
248 | .flags = IORESOURCE_MEM, | 248 | .flags = IORESOURCE_MEM, |
249 | }, | 249 | }, |
250 | [1] = { | 250 | [1] = { |
251 | .start = AT91_BASE_SYS + AT91_ECC, | 251 | .start = AT91SAM9RL_BASE_ECC, |
252 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | 252 | .end = AT91SAM9RL_BASE_ECC + SZ_512 - 1, |
253 | .flags = IORESOURCE_MEM, | 253 | .flags = IORESOURCE_MEM, |
254 | } | 254 | } |
255 | }; | 255 | }; |
@@ -275,15 +275,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
275 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); | 275 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
276 | 276 | ||
277 | /* enable pin */ | 277 | /* enable pin */ |
278 | if (data->enable_pin) | 278 | if (gpio_is_valid(data->enable_pin)) |
279 | at91_set_gpio_output(data->enable_pin, 1); | 279 | at91_set_gpio_output(data->enable_pin, 1); |
280 | 280 | ||
281 | /* ready/busy pin */ | 281 | /* ready/busy pin */ |
282 | if (data->rdy_pin) | 282 | if (gpio_is_valid(data->rdy_pin)) |
283 | at91_set_gpio_input(data->rdy_pin, 1); | 283 | at91_set_gpio_input(data->rdy_pin, 1); |
284 | 284 | ||
285 | /* card detect pin */ | 285 | /* card detect pin */ |
286 | if (data->det_pin) | 286 | if (gpio_is_valid(data->det_pin)) |
287 | at91_set_gpio_input(data->det_pin, 1); | 287 | at91_set_gpio_input(data->det_pin, 1); |
288 | 288 | ||
289 | at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ | 289 | at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ |
@@ -483,7 +483,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) | |||
483 | at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */ | 483 | at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */ |
484 | 484 | ||
485 | /* reset */ | 485 | /* reset */ |
486 | if (data->reset_pin) | 486 | if (gpio_is_valid(data->reset_pin)) |
487 | at91_set_gpio_output(data->reset_pin, 0); | 487 | at91_set_gpio_output(data->reset_pin, 0); |
488 | 488 | ||
489 | ac97_data = *data; | 489 | ac97_data = *data; |
@@ -685,8 +685,8 @@ static void __init at91_add_device_rtc(void) {} | |||
685 | 685 | ||
686 | static struct resource rtt_resources[] = { | 686 | static struct resource rtt_resources[] = { |
687 | { | 687 | { |
688 | .start = AT91_BASE_SYS + AT91_RTT, | 688 | .start = AT91SAM9RL_BASE_RTT, |
689 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 689 | .end = AT91SAM9RL_BASE_RTT + SZ_16 - 1, |
690 | .flags = IORESOURCE_MEM, | 690 | .flags = IORESOURCE_MEM, |
691 | } | 691 | } |
692 | }; | 692 | }; |
@@ -709,10 +709,19 @@ static void __init at91_add_device_rtt(void) | |||
709 | * -------------------------------------------------------------------- */ | 709 | * -------------------------------------------------------------------- */ |
710 | 710 | ||
711 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 711 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
712 | static struct resource wdt_resources[] = { | ||
713 | { | ||
714 | .start = AT91SAM9RL_BASE_WDT, | ||
715 | .end = AT91SAM9RL_BASE_WDT + SZ_16 - 1, | ||
716 | .flags = IORESOURCE_MEM, | ||
717 | } | ||
718 | }; | ||
719 | |||
712 | static struct platform_device at91sam9rl_wdt_device = { | 720 | static struct platform_device at91sam9rl_wdt_device = { |
713 | .name = "at91_wdt", | 721 | .name = "at91_wdt", |
714 | .id = -1, | 722 | .id = -1, |
715 | .num_resources = 0, | 723 | .resource = wdt_resources, |
724 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
716 | }; | 725 | }; |
717 | 726 | ||
718 | static void __init at91_add_device_watchdog(void) | 727 | static void __init at91_add_device_watchdog(void) |
@@ -908,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
908 | #if defined(CONFIG_SERIAL_ATMEL) | 917 | #if defined(CONFIG_SERIAL_ATMEL) |
909 | static struct resource dbgu_resources[] = { | 918 | static struct resource dbgu_resources[] = { |
910 | [0] = { | 919 | [0] = { |
911 | .start = AT91_BASE_SYS + AT91_DBGU, | 920 | .start = AT91SAM9RL_BASE_DBGU, |
912 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 921 | .end = AT91SAM9RL_BASE_DBGU + SZ_512 - 1, |
913 | .flags = IORESOURCE_MEM, | 922 | .flags = IORESOURCE_MEM, |
914 | }, | 923 | }, |
915 | [1] = { | 924 | [1] = { |
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 367d5cd5e362..2628384aaae1 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c | |||
@@ -63,13 +63,15 @@ static void __init onearm_init_early(void) | |||
63 | at91_set_serial_console(0); | 63 | at91_set_serial_console(0); |
64 | } | 64 | } |
65 | 65 | ||
66 | static struct at91_eth_data __initdata onearm_eth_data = { | 66 | static struct macb_platform_data __initdata onearm_eth_data = { |
67 | .phy_irq_pin = AT91_PIN_PC4, | 67 | .phy_irq_pin = AT91_PIN_PC4, |
68 | .is_rmii = 1, | 68 | .is_rmii = 1, |
69 | }; | 69 | }; |
70 | 70 | ||
71 | static struct at91_usbh_data __initdata onearm_usbh_data = { | 71 | static struct at91_usbh_data __initdata onearm_usbh_data = { |
72 | .ports = 1, | 72 | .ports = 1, |
73 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
74 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | static struct at91_udc_data __initdata onearm_udc_data = { | 77 | static struct at91_udc_data __initdata onearm_udc_data = { |
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index 4282d96dffa8..3bb40694b02d 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c | |||
@@ -75,6 +75,8 @@ static void __init afeb9260_init_early(void) | |||
75 | */ | 75 | */ |
76 | static struct at91_usbh_data __initdata afeb9260_usbh_data = { | 76 | static struct at91_usbh_data __initdata afeb9260_usbh_data = { |
77 | .ports = 1, | 77 | .ports = 1, |
78 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
79 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
78 | }; | 80 | }; |
79 | 81 | ||
80 | /* | 82 | /* |
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata afeb9260_usbh_data = { | |||
82 | */ | 84 | */ |
83 | static struct at91_udc_data __initdata afeb9260_udc_data = { | 85 | static struct at91_udc_data __initdata afeb9260_udc_data = { |
84 | .vbus_pin = AT91_PIN_PC5, | 86 | .vbus_pin = AT91_PIN_PC5, |
85 | .pullup_pin = 0, /* pull-up driven by UDC */ | 87 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
86 | }; | 88 | }; |
87 | 89 | ||
88 | 90 | ||
@@ -103,7 +105,7 @@ static struct spi_board_info afeb9260_spi_devices[] = { | |||
103 | /* | 105 | /* |
104 | * MACB Ethernet device | 106 | * MACB Ethernet device |
105 | */ | 107 | */ |
106 | static struct at91_eth_data __initdata afeb9260_macb_data = { | 108 | static struct macb_platform_data __initdata afeb9260_macb_data = { |
107 | .phy_irq_pin = AT91_PIN_PA9, | 109 | .phy_irq_pin = AT91_PIN_PA9, |
108 | .is_rmii = 0, | 110 | .is_rmii = 0, |
109 | }; | 111 | }; |
@@ -138,6 +140,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = { | |||
138 | .bus_width_16 = 0, | 140 | .bus_width_16 = 0, |
139 | .parts = afeb9260_nand_partition, | 141 | .parts = afeb9260_nand_partition, |
140 | .num_parts = ARRAY_SIZE(afeb9260_nand_partition), | 142 | .num_parts = ARRAY_SIZE(afeb9260_nand_partition), |
143 | .det_pin = -EINVAL, | ||
141 | }; | 144 | }; |
142 | 145 | ||
143 | 146 | ||
@@ -149,6 +152,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = { | |||
149 | .wp_pin = AT91_PIN_PC4, | 152 | .wp_pin = AT91_PIN_PC4, |
150 | .slot_b = 1, | 153 | .slot_b = 1, |
151 | .wire4 = 1, | 154 | .wire4 = 1, |
155 | .vcc_pin = -EINVAL, | ||
152 | }; | 156 | }; |
153 | 157 | ||
154 | 158 | ||
@@ -169,6 +173,8 @@ static struct i2c_board_info __initdata afeb9260_i2c_devices[] = { | |||
169 | static struct at91_cf_data afeb9260_cf_data = { | 173 | static struct at91_cf_data afeb9260_cf_data = { |
170 | .chipselect = 4, | 174 | .chipselect = 4, |
171 | .irq_pin = AT91_PIN_PA6, | 175 | .irq_pin = AT91_PIN_PA6, |
176 | .det_pin = -EINVAL, | ||
177 | .vcc_pin = -EINVAL, | ||
172 | .rst_pin = AT91_PIN_PA7, | 178 | .rst_pin = AT91_PIN_PA7, |
173 | .flags = AT91_CF_TRUE_IDE, | 179 | .flags = AT91_CF_TRUE_IDE, |
174 | }; | 180 | }; |
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index f90cfb32bad2..8510e9e54988 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c | |||
@@ -62,6 +62,8 @@ static void __init cam60_init_early(void) | |||
62 | */ | 62 | */ |
63 | static struct at91_usbh_data __initdata cam60_usbh_data = { | 63 | static struct at91_usbh_data __initdata cam60_usbh_data = { |
64 | .ports = 1, | 64 | .ports = 1, |
65 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
66 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
65 | }; | 67 | }; |
66 | 68 | ||
67 | 69 | ||
@@ -115,7 +117,7 @@ static struct spi_board_info cam60_spi_devices[] __initdata = { | |||
115 | /* | 117 | /* |
116 | * MACB Ethernet device | 118 | * MACB Ethernet device |
117 | */ | 119 | */ |
118 | static struct __initdata at91_eth_data cam60_macb_data = { | 120 | static struct __initdata macb_platform_data cam60_macb_data = { |
119 | .phy_irq_pin = AT91_PIN_PB5, | 121 | .phy_irq_pin = AT91_PIN_PB5, |
120 | .is_rmii = 0, | 122 | .is_rmii = 0, |
121 | }; | 123 | }; |
@@ -135,7 +137,7 @@ static struct mtd_partition __initdata cam60_nand_partition[] = { | |||
135 | static struct atmel_nand_data __initdata cam60_nand_data = { | 137 | static struct atmel_nand_data __initdata cam60_nand_data = { |
136 | .ale = 21, | 138 | .ale = 21, |
137 | .cle = 22, | 139 | .cle = 22, |
138 | // .det_pin = ... not there | 140 | .det_pin = -EINVAL, |
139 | .rdy_pin = AT91_PIN_PA9, | 141 | .rdy_pin = AT91_PIN_PA9, |
140 | .enable_pin = AT91_PIN_PA7, | 142 | .enable_pin = AT91_PIN_PA7, |
141 | .parts = cam60_nand_partition, | 143 | .parts = cam60_nand_partition, |
@@ -163,7 +165,7 @@ static struct sam9_smc_config __initdata cam60_nand_smc_config = { | |||
163 | static void __init cam60_add_device_nand(void) | 165 | static void __init cam60_add_device_nand(void) |
164 | { | 166 | { |
165 | /* configure chip-select 3 (NAND) */ | 167 | /* configure chip-select 3 (NAND) */ |
166 | sam9_smc_configure(3, &cam60_nand_smc_config); | 168 | sam9_smc_configure(0, 3, &cam60_nand_smc_config); |
167 | 169 | ||
168 | at91_add_device_nand(&cam60_nand_data); | 170 | at91_add_device_nand(&cam60_nand_data); |
169 | } | 171 | } |
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index 5dffd3be62d2..ac3de4f7c31d 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c | |||
@@ -70,6 +70,8 @@ static void __init cap9adk_init_early(void) | |||
70 | */ | 70 | */ |
71 | static struct at91_usbh_data __initdata cap9adk_usbh_data = { | 71 | static struct at91_usbh_data __initdata cap9adk_usbh_data = { |
72 | .ports = 2, | 72 | .ports = 2, |
73 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
74 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | /* | 77 | /* |
@@ -144,16 +146,17 @@ static struct spi_board_info cap9adk_spi_devices[] = { | |||
144 | */ | 146 | */ |
145 | static struct at91_mmc_data __initdata cap9adk_mmc_data = { | 147 | static struct at91_mmc_data __initdata cap9adk_mmc_data = { |
146 | .wire4 = 1, | 148 | .wire4 = 1, |
147 | // .det_pin = ... not connected | 149 | .det_pin = -EINVAL, |
148 | // .wp_pin = ... not connected | 150 | .wp_pin = -EINVAL, |
149 | // .vcc_pin = ... not connected | 151 | .vcc_pin = -EINVAL, |
150 | }; | 152 | }; |
151 | 153 | ||
152 | 154 | ||
153 | /* | 155 | /* |
154 | * MACB Ethernet device | 156 | * MACB Ethernet device |
155 | */ | 157 | */ |
156 | static struct at91_eth_data __initdata cap9adk_macb_data = { | 158 | static struct macb_platform_data __initdata cap9adk_macb_data = { |
159 | .phy_irq_pin = -EINVAL, | ||
157 | .is_rmii = 1, | 160 | .is_rmii = 1, |
158 | }; | 161 | }; |
159 | 162 | ||
@@ -172,8 +175,8 @@ static struct mtd_partition __initdata cap9adk_nand_partitions[] = { | |||
172 | static struct atmel_nand_data __initdata cap9adk_nand_data = { | 175 | static struct atmel_nand_data __initdata cap9adk_nand_data = { |
173 | .ale = 21, | 176 | .ale = 21, |
174 | .cle = 22, | 177 | .cle = 22, |
175 | // .det_pin = ... not connected | 178 | .det_pin = -EINVAL, |
176 | // .rdy_pin = ... not connected | 179 | .rdy_pin = -EINVAL, |
177 | .enable_pin = AT91_PIN_PD15, | 180 | .enable_pin = AT91_PIN_PD15, |
178 | .parts = cap9adk_nand_partitions, | 181 | .parts = cap9adk_nand_partitions, |
179 | .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), | 182 | .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), |
@@ -212,7 +215,7 @@ static void __init cap9adk_add_device_nand(void) | |||
212 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; | 215 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; |
213 | 216 | ||
214 | /* configure chip-select 3 (NAND) */ | 217 | /* configure chip-select 3 (NAND) */ |
215 | sam9_smc_configure(3, &cap9adk_nand_smc_config); | 218 | sam9_smc_configure(0, 3, &cap9adk_nand_smc_config); |
216 | 219 | ||
217 | at91_add_device_nand(&cap9adk_nand_data); | 220 | at91_add_device_nand(&cap9adk_nand_data); |
218 | } | 221 | } |
@@ -282,7 +285,7 @@ static __init void cap9adk_add_device_nor(void) | |||
282 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); | 285 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); |
283 | 286 | ||
284 | /* configure chip-select 0 (NOR) */ | 287 | /* configure chip-select 0 (NOR) */ |
285 | sam9_smc_configure(0, &cap9adk_nor_smc_config); | 288 | sam9_smc_configure(0, 0, &cap9adk_nor_smc_config); |
286 | 289 | ||
287 | platform_device_register(&cap9adk_nor_flash); | 290 | platform_device_register(&cap9adk_nor_flash); |
288 | } | 291 | } |
@@ -351,7 +354,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data; | |||
351 | * AC97 | 354 | * AC97 |
352 | */ | 355 | */ |
353 | static struct ac97c_platform_data cap9adk_ac97_data = { | 356 | static struct ac97c_platform_data cap9adk_ac97_data = { |
354 | // .reset_pin = ... not connected | 357 | .reset_pin = -EINVAL, |
355 | }; | 358 | }; |
356 | 359 | ||
357 | 360 | ||
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 774c87fcbd5b..59d9cf997537 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c | |||
@@ -57,13 +57,15 @@ static void __init carmeva_init_early(void) | |||
57 | at91_set_serial_console(0); | 57 | at91_set_serial_console(0); |
58 | } | 58 | } |
59 | 59 | ||
60 | static struct at91_eth_data __initdata carmeva_eth_data = { | 60 | static struct macb_platform_data __initdata carmeva_eth_data = { |
61 | .phy_irq_pin = AT91_PIN_PC4, | 61 | .phy_irq_pin = AT91_PIN_PC4, |
62 | .is_rmii = 1, | 62 | .is_rmii = 1, |
63 | }; | 63 | }; |
64 | 64 | ||
65 | static struct at91_usbh_data __initdata carmeva_usbh_data = { | 65 | static struct at91_usbh_data __initdata carmeva_usbh_data = { |
66 | .ports = 2, | 66 | .ports = 2, |
67 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
68 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
67 | }; | 69 | }; |
68 | 70 | ||
69 | static struct at91_udc_data __initdata carmeva_udc_data = { | 71 | static struct at91_udc_data __initdata carmeva_udc_data = { |
@@ -75,8 +77,8 @@ static struct at91_udc_data __initdata carmeva_udc_data = { | |||
75 | // static struct at91_cf_data __initdata carmeva_cf_data = { | 77 | // static struct at91_cf_data __initdata carmeva_cf_data = { |
76 | // .det_pin = AT91_PIN_PB0, | 78 | // .det_pin = AT91_PIN_PB0, |
77 | // .rst_pin = AT91_PIN_PC5, | 79 | // .rst_pin = AT91_PIN_PC5, |
78 | // .irq_pin = ... not connected | 80 | // .irq_pin = -EINVAL, |
79 | // .vcc_pin = ... always powered | 81 | // .vcc_pin = -EINVAL, |
80 | // }; | 82 | // }; |
81 | 83 | ||
82 | static struct at91_mmc_data __initdata carmeva_mmc_data = { | 84 | static struct at91_mmc_data __initdata carmeva_mmc_data = { |
@@ -84,6 +86,7 @@ static struct at91_mmc_data __initdata carmeva_mmc_data = { | |||
84 | .wire4 = 1, | 86 | .wire4 = 1, |
85 | .det_pin = AT91_PIN_PB10, | 87 | .det_pin = AT91_PIN_PB10, |
86 | .wp_pin = AT91_PIN_PC14, | 88 | .wp_pin = AT91_PIN_PC14, |
89 | .vcc_pin = -EINVAL, | ||
87 | }; | 90 | }; |
88 | 91 | ||
89 | static struct spi_board_info carmeva_spi_devices[] = { | 92 | static struct spi_board_info carmeva_spi_devices[] = { |
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index fc885a4ce243..9ab3d1ea326d 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c | |||
@@ -86,6 +86,8 @@ static void __init cpu9krea_init_early(void) | |||
86 | */ | 86 | */ |
87 | static struct at91_usbh_data __initdata cpu9krea_usbh_data = { | 87 | static struct at91_usbh_data __initdata cpu9krea_usbh_data = { |
88 | .ports = 2, | 88 | .ports = 2, |
89 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
90 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
89 | }; | 91 | }; |
90 | 92 | ||
91 | /* | 93 | /* |
@@ -93,13 +95,14 @@ static struct at91_usbh_data __initdata cpu9krea_usbh_data = { | |||
93 | */ | 95 | */ |
94 | static struct at91_udc_data __initdata cpu9krea_udc_data = { | 96 | static struct at91_udc_data __initdata cpu9krea_udc_data = { |
95 | .vbus_pin = AT91_PIN_PC8, | 97 | .vbus_pin = AT91_PIN_PC8, |
96 | .pullup_pin = 0, /* pull-up driven by UDC */ | 98 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
97 | }; | 99 | }; |
98 | 100 | ||
99 | /* | 101 | /* |
100 | * MACB Ethernet device | 102 | * MACB Ethernet device |
101 | */ | 103 | */ |
102 | static struct at91_eth_data __initdata cpu9krea_macb_data = { | 104 | static struct macb_platform_data __initdata cpu9krea_macb_data = { |
105 | .phy_irq_pin = -EINVAL, | ||
103 | .is_rmii = 1, | 106 | .is_rmii = 1, |
104 | }; | 107 | }; |
105 | 108 | ||
@@ -112,6 +115,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = { | |||
112 | .rdy_pin = AT91_PIN_PC13, | 115 | .rdy_pin = AT91_PIN_PC13, |
113 | .enable_pin = AT91_PIN_PC14, | 116 | .enable_pin = AT91_PIN_PC14, |
114 | .bus_width_16 = 0, | 117 | .bus_width_16 = 0, |
118 | .det_pin = -EINVAL, | ||
115 | }; | 119 | }; |
116 | 120 | ||
117 | #ifdef CONFIG_MACH_CPU9260 | 121 | #ifdef CONFIG_MACH_CPU9260 |
@@ -156,7 +160,7 @@ static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = { | |||
156 | 160 | ||
157 | static void __init cpu9krea_add_device_nand(void) | 161 | static void __init cpu9krea_add_device_nand(void) |
158 | { | 162 | { |
159 | sam9_smc_configure(3, &cpu9krea_nand_smc_config); | 163 | sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config); |
160 | at91_add_device_nand(&cpu9krea_nand_data); | 164 | at91_add_device_nand(&cpu9krea_nand_data); |
161 | } | 165 | } |
162 | 166 | ||
@@ -238,7 +242,7 @@ static __init void cpu9krea_add_device_nor(void) | |||
238 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); | 242 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); |
239 | 243 | ||
240 | /* configure chip-select 0 (NOR) */ | 244 | /* configure chip-select 0 (NOR) */ |
241 | sam9_smc_configure(0, &cpu9krea_nor_smc_config); | 245 | sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config); |
242 | 246 | ||
243 | platform_device_register(&cpu9krea_nor_flash); | 247 | platform_device_register(&cpu9krea_nor_flash); |
244 | } | 248 | } |
@@ -337,6 +341,8 @@ static struct at91_mmc_data __initdata cpu9krea_mmc_data = { | |||
337 | .slot_b = 0, | 341 | .slot_b = 0, |
338 | .wire4 = 1, | 342 | .wire4 = 1, |
339 | .det_pin = AT91_PIN_PA29, | 343 | .det_pin = AT91_PIN_PA29, |
344 | .wp_pin = -EINVAL, | ||
345 | .vcc_pin = -EINVAL, | ||
340 | }; | 346 | }; |
341 | 347 | ||
342 | static void __init cpu9krea_board_init(void) | 348 | static void __init cpu9krea_board_init(void) |
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index d35e65b08ccd..368e1427ad99 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c | |||
@@ -82,12 +82,15 @@ static void __init cpuat91_init_early(void) | |||
82 | at91_set_serial_console(0); | 82 | at91_set_serial_console(0); |
83 | } | 83 | } |
84 | 84 | ||
85 | static struct at91_eth_data __initdata cpuat91_eth_data = { | 85 | static struct macb_platform_data __initdata cpuat91_eth_data = { |
86 | .phy_irq_pin = -EINVAL, | ||
86 | .is_rmii = 1, | 87 | .is_rmii = 1, |
87 | }; | 88 | }; |
88 | 89 | ||
89 | static struct at91_usbh_data __initdata cpuat91_usbh_data = { | 90 | static struct at91_usbh_data __initdata cpuat91_usbh_data = { |
90 | .ports = 1, | 91 | .ports = 1, |
92 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
93 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
91 | }; | 94 | }; |
92 | 95 | ||
93 | static struct at91_udc_data __initdata cpuat91_udc_data = { | 96 | static struct at91_udc_data __initdata cpuat91_udc_data = { |
@@ -98,6 +101,8 @@ static struct at91_udc_data __initdata cpuat91_udc_data = { | |||
98 | static struct at91_mmc_data __initdata cpuat91_mmc_data = { | 101 | static struct at91_mmc_data __initdata cpuat91_mmc_data = { |
99 | .det_pin = AT91_PIN_PC2, | 102 | .det_pin = AT91_PIN_PC2, |
100 | .wire4 = 1, | 103 | .wire4 = 1, |
104 | .wp_pin = -EINVAL, | ||
105 | .vcc_pin = -EINVAL, | ||
101 | }; | 106 | }; |
102 | 107 | ||
103 | static struct physmap_flash_data cpuat91_flash_data = { | 108 | static struct physmap_flash_data cpuat91_flash_data = { |
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index c3936665e645..1a1547b1ce4e 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c | |||
@@ -58,18 +58,20 @@ static void __init csb337_init_early(void) | |||
58 | at91_set_serial_console(0); | 58 | at91_set_serial_console(0); |
59 | } | 59 | } |
60 | 60 | ||
61 | static struct at91_eth_data __initdata csb337_eth_data = { | 61 | static struct macb_platform_data __initdata csb337_eth_data = { |
62 | .phy_irq_pin = AT91_PIN_PC2, | 62 | .phy_irq_pin = AT91_PIN_PC2, |
63 | .is_rmii = 0, | 63 | .is_rmii = 0, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | static struct at91_usbh_data __initdata csb337_usbh_data = { | 66 | static struct at91_usbh_data __initdata csb337_usbh_data = { |
67 | .ports = 2, | 67 | .ports = 2, |
68 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
69 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
68 | }; | 70 | }; |
69 | 71 | ||
70 | static struct at91_udc_data __initdata csb337_udc_data = { | 72 | static struct at91_udc_data __initdata csb337_udc_data = { |
71 | // this has no VBUS sensing pin | ||
72 | .pullup_pin = AT91_PIN_PA24, | 73 | .pullup_pin = AT91_PIN_PA24, |
74 | .vbus_pin = -EINVAL, | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | static struct i2c_board_info __initdata csb337_i2c_devices[] = { | 77 | static struct i2c_board_info __initdata csb337_i2c_devices[] = { |
@@ -98,6 +100,7 @@ static struct at91_mmc_data __initdata csb337_mmc_data = { | |||
98 | .slot_b = 0, | 100 | .slot_b = 0, |
99 | .wire4 = 1, | 101 | .wire4 = 1, |
100 | .wp_pin = AT91_PIN_PD6, | 102 | .wp_pin = AT91_PIN_PD6, |
103 | .vcc_pin = -EINVAL, | ||
101 | }; | 104 | }; |
102 | 105 | ||
103 | static struct spi_board_info csb337_spi_devices[] = { | 106 | static struct spi_board_info csb337_spi_devices[] = { |
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index 586100e2acbb..f650bf39455d 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c | |||
@@ -52,13 +52,15 @@ static void __init csb637_init_early(void) | |||
52 | at91_set_serial_console(0); | 52 | at91_set_serial_console(0); |
53 | } | 53 | } |
54 | 54 | ||
55 | static struct at91_eth_data __initdata csb637_eth_data = { | 55 | static struct macb_platform_data __initdata csb637_eth_data = { |
56 | .phy_irq_pin = AT91_PIN_PC0, | 56 | .phy_irq_pin = AT91_PIN_PC0, |
57 | .is_rmii = 0, | 57 | .is_rmii = 0, |
58 | }; | 58 | }; |
59 | 59 | ||
60 | static struct at91_usbh_data __initdata csb637_usbh_data = { | 60 | static struct at91_usbh_data __initdata csb637_usbh_data = { |
61 | .ports = 2, | 61 | .ports = 2, |
62 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
63 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
62 | }; | 64 | }; |
63 | 65 | ||
64 | static struct at91_udc_data __initdata csb637_udc_data = { | 66 | static struct at91_udc_data __initdata csb637_udc_data = { |
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c index 0b7d32778210..bb6b434ec0c1 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt.c | |||
@@ -50,6 +50,7 @@ static void __init ek_init_early(void) | |||
50 | static struct atmel_nand_data __initdata ek_nand_data = { | 50 | static struct atmel_nand_data __initdata ek_nand_data = { |
51 | .ale = 21, | 51 | .ale = 21, |
52 | .cle = 22, | 52 | .cle = 22, |
53 | .det_pin = -EINVAL, | ||
53 | .rdy_pin = AT91_PIN_PC8, | 54 | .rdy_pin = AT91_PIN_PC8, |
54 | .enable_pin = AT91_PIN_PC14, | 55 | .enable_pin = AT91_PIN_PC14, |
55 | }; | 56 | }; |
@@ -82,7 +83,7 @@ static void __init ek_add_device_nand(void) | |||
82 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 83 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
83 | 84 | ||
84 | /* configure chip-select 3 (NAND) */ | 85 | /* configure chip-select 3 (NAND) */ |
85 | sam9_smc_configure(3, &ek_nand_smc_config); | 86 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
86 | 87 | ||
87 | at91_add_device_nand(&ek_nand_data); | 88 | at91_add_device_nand(&ek_nand_data); |
88 | } | 89 | } |
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index 45db7a3dbef0..d302ca3eeb64 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c | |||
@@ -60,13 +60,15 @@ static void __init eb9200_init_early(void) | |||
60 | at91_set_serial_console(0); | 60 | at91_set_serial_console(0); |
61 | } | 61 | } |
62 | 62 | ||
63 | static struct at91_eth_data __initdata eb9200_eth_data = { | 63 | static struct macb_platform_data __initdata eb9200_eth_data = { |
64 | .phy_irq_pin = AT91_PIN_PC4, | 64 | .phy_irq_pin = AT91_PIN_PC4, |
65 | .is_rmii = 1, | 65 | .is_rmii = 1, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | static struct at91_usbh_data __initdata eb9200_usbh_data = { | 68 | static struct at91_usbh_data __initdata eb9200_usbh_data = { |
69 | .ports = 2, | 69 | .ports = 2, |
70 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
71 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
70 | }; | 72 | }; |
71 | 73 | ||
72 | static struct at91_udc_data __initdata eb9200_udc_data = { | 74 | static struct at91_udc_data __initdata eb9200_udc_data = { |
@@ -75,15 +77,18 @@ static struct at91_udc_data __initdata eb9200_udc_data = { | |||
75 | }; | 77 | }; |
76 | 78 | ||
77 | static struct at91_cf_data __initdata eb9200_cf_data = { | 79 | static struct at91_cf_data __initdata eb9200_cf_data = { |
80 | .irq_pin = -EINVAL, | ||
78 | .det_pin = AT91_PIN_PB0, | 81 | .det_pin = AT91_PIN_PB0, |
82 | .vcc_pin = -EINVAL, | ||
79 | .rst_pin = AT91_PIN_PC5, | 83 | .rst_pin = AT91_PIN_PC5, |
80 | // .irq_pin = ... not connected | ||
81 | // .vcc_pin = ... always powered | ||
82 | }; | 84 | }; |
83 | 85 | ||
84 | static struct at91_mmc_data __initdata eb9200_mmc_data = { | 86 | static struct at91_mmc_data __initdata eb9200_mmc_data = { |
85 | .slot_b = 0, | 87 | .slot_b = 0, |
86 | .wire4 = 1, | 88 | .wire4 = 1, |
89 | .det_pin = -EINVAL, | ||
90 | .wp_pin = -EINVAL, | ||
91 | .vcc_pin = -EINVAL, | ||
87 | }; | 92 | }; |
88 | 93 | ||
89 | static struct i2c_board_info __initdata eb9200_i2c_devices[] = { | 94 | static struct i2c_board_info __initdata eb9200_i2c_devices[] = { |
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index 2f9c16d29212..69966ce4d776 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c | |||
@@ -64,18 +64,23 @@ static void __init ecb_at91init_early(void) | |||
64 | at91_set_serial_console(0); | 64 | at91_set_serial_console(0); |
65 | } | 65 | } |
66 | 66 | ||
67 | static struct at91_eth_data __initdata ecb_at91eth_data = { | 67 | static struct macb_platform_data __initdata ecb_at91eth_data = { |
68 | .phy_irq_pin = AT91_PIN_PC4, | 68 | .phy_irq_pin = AT91_PIN_PC4, |
69 | .is_rmii = 0, | 69 | .is_rmii = 0, |
70 | }; | 70 | }; |
71 | 71 | ||
72 | static struct at91_usbh_data __initdata ecb_at91usbh_data = { | 72 | static struct at91_usbh_data __initdata ecb_at91usbh_data = { |
73 | .ports = 1, | 73 | .ports = 1, |
74 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
75 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
74 | }; | 76 | }; |
75 | 77 | ||
76 | static struct at91_mmc_data __initdata ecb_at91mmc_data = { | 78 | static struct at91_mmc_data __initdata ecb_at91mmc_data = { |
77 | .slot_b = 0, | 79 | .slot_b = 0, |
78 | .wire4 = 1, | 80 | .wire4 = 1, |
81 | .det_pin = -EINVAL, | ||
82 | .wp_pin = -EINVAL, | ||
83 | .vcc_pin = -EINVAL, | ||
79 | }; | 84 | }; |
80 | 85 | ||
81 | 86 | ||
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index 8252c722607b..07ef35b0ec2c 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c | |||
@@ -47,13 +47,15 @@ static void __init eco920_init_early(void) | |||
47 | at91_set_serial_console(0); | 47 | at91_set_serial_console(0); |
48 | } | 48 | } |
49 | 49 | ||
50 | static struct at91_eth_data __initdata eco920_eth_data = { | 50 | static struct macb_platform_data __initdata eco920_eth_data = { |
51 | .phy_irq_pin = AT91_PIN_PC2, | 51 | .phy_irq_pin = AT91_PIN_PC2, |
52 | .is_rmii = 1, | 52 | .is_rmii = 1, |
53 | }; | 53 | }; |
54 | 54 | ||
55 | static struct at91_usbh_data __initdata eco920_usbh_data = { | 55 | static struct at91_usbh_data __initdata eco920_usbh_data = { |
56 | .ports = 1, | 56 | .ports = 1, |
57 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
58 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
57 | }; | 59 | }; |
58 | 60 | ||
59 | static struct at91_udc_data __initdata eco920_udc_data = { | 61 | static struct at91_udc_data __initdata eco920_udc_data = { |
@@ -64,6 +66,9 @@ static struct at91_udc_data __initdata eco920_udc_data = { | |||
64 | static struct at91_mmc_data __initdata eco920_mmc_data = { | 66 | static struct at91_mmc_data __initdata eco920_mmc_data = { |
65 | .slot_b = 0, | 67 | .slot_b = 0, |
66 | .wire4 = 0, | 68 | .wire4 = 0, |
69 | .det_pin = -EINVAL, | ||
70 | .wp_pin = -EINVAL, | ||
71 | .vcc_pin = -EINVAL, | ||
67 | }; | 72 | }; |
68 | 73 | ||
69 | static struct physmap_flash_data eco920_flash_data = { | 74 | static struct physmap_flash_data eco920_flash_data = { |
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index 4c3f65d9c59b..eec02cd57ced 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c | |||
@@ -52,12 +52,14 @@ static void __init flexibity_init_early(void) | |||
52 | /* USB Host port */ | 52 | /* USB Host port */ |
53 | static struct at91_usbh_data __initdata flexibity_usbh_data = { | 53 | static struct at91_usbh_data __initdata flexibity_usbh_data = { |
54 | .ports = 2, | 54 | .ports = 2, |
55 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
56 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
55 | }; | 57 | }; |
56 | 58 | ||
57 | /* USB Device port */ | 59 | /* USB Device port */ |
58 | static struct at91_udc_data __initdata flexibity_udc_data = { | 60 | static struct at91_udc_data __initdata flexibity_udc_data = { |
59 | .vbus_pin = AT91_PIN_PC5, | 61 | .vbus_pin = AT91_PIN_PC5, |
60 | .pullup_pin = 0, /* pull-up driven by UDC */ | 62 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
61 | }; | 63 | }; |
62 | 64 | ||
63 | /* SPI devices */ | 65 | /* SPI devices */ |
@@ -76,6 +78,7 @@ static struct at91_mmc_data __initdata flexibity_mmc_data = { | |||
76 | .wire4 = 1, | 78 | .wire4 = 1, |
77 | .det_pin = AT91_PIN_PC9, | 79 | .det_pin = AT91_PIN_PC9, |
78 | .wp_pin = AT91_PIN_PC4, | 80 | .wp_pin = AT91_PIN_PC4, |
81 | .vcc_pin = -EINVAL, | ||
79 | }; | 82 | }; |
80 | 83 | ||
81 | /* LEDs */ | 84 | /* LEDs */ |
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index f27d1a780cfa..caf017f0f4ee 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c | |||
@@ -106,6 +106,8 @@ static void __init foxg20_init_early(void) | |||
106 | */ | 106 | */ |
107 | static struct at91_usbh_data __initdata foxg20_usbh_data = { | 107 | static struct at91_usbh_data __initdata foxg20_usbh_data = { |
108 | .ports = 2, | 108 | .ports = 2, |
109 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
110 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
109 | }; | 111 | }; |
110 | 112 | ||
111 | /* | 113 | /* |
@@ -113,7 +115,7 @@ static struct at91_usbh_data __initdata foxg20_usbh_data = { | |||
113 | */ | 115 | */ |
114 | static struct at91_udc_data __initdata foxg20_udc_data = { | 116 | static struct at91_udc_data __initdata foxg20_udc_data = { |
115 | .vbus_pin = AT91_PIN_PC6, | 117 | .vbus_pin = AT91_PIN_PC6, |
116 | .pullup_pin = 0, /* pull-up driven by UDC */ | 118 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
117 | }; | 119 | }; |
118 | 120 | ||
119 | 121 | ||
@@ -135,7 +137,7 @@ static struct spi_board_info foxg20_spi_devices[] = { | |||
135 | /* | 137 | /* |
136 | * MACB Ethernet device | 138 | * MACB Ethernet device |
137 | */ | 139 | */ |
138 | static struct at91_eth_data __initdata foxg20_macb_data = { | 140 | static struct macb_platform_data __initdata foxg20_macb_data = { |
139 | .phy_irq_pin = AT91_PIN_PA7, | 141 | .phy_irq_pin = AT91_PIN_PA7, |
140 | .is_rmii = 1, | 142 | .is_rmii = 1, |
141 | }; | 143 | }; |
@@ -147,6 +149,9 @@ static struct at91_eth_data __initdata foxg20_macb_data = { | |||
147 | static struct at91_mmc_data __initdata foxg20_mmc_data = { | 149 | static struct at91_mmc_data __initdata foxg20_mmc_data = { |
148 | .slot_b = 1, | 150 | .slot_b = 1, |
149 | .wire4 = 1, | 151 | .wire4 = 1, |
152 | .det_pin = -EINVAL, | ||
153 | .wp_pin = -EINVAL, | ||
154 | .vcc_pin = -EINVAL, | ||
150 | }; | 155 | }; |
151 | 156 | ||
152 | 157 | ||
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index 2e95949737e6..230e71969fb7 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c | |||
@@ -80,6 +80,8 @@ static void __init gsia18s_init_early(void) | |||
80 | */ | 80 | */ |
81 | static struct at91_usbh_data __initdata usbh_data = { | 81 | static struct at91_usbh_data __initdata usbh_data = { |
82 | .ports = 2, | 82 | .ports = 2, |
83 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
84 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
83 | }; | 85 | }; |
84 | 86 | ||
85 | /* | 87 | /* |
@@ -87,13 +89,13 @@ static struct at91_usbh_data __initdata usbh_data = { | |||
87 | */ | 89 | */ |
88 | static struct at91_udc_data __initdata udc_data = { | 90 | static struct at91_udc_data __initdata udc_data = { |
89 | .vbus_pin = AT91_PIN_PA22, | 91 | .vbus_pin = AT91_PIN_PA22, |
90 | .pullup_pin = 0, /* pull-up driven by UDC */ | 92 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
91 | }; | 93 | }; |
92 | 94 | ||
93 | /* | 95 | /* |
94 | * MACB Ethernet device | 96 | * MACB Ethernet device |
95 | */ | 97 | */ |
96 | static struct at91_eth_data __initdata macb_data = { | 98 | static struct macb_platform_data __initdata macb_data = { |
97 | .phy_irq_pin = AT91_PIN_PA28, | 99 | .phy_irq_pin = AT91_PIN_PA28, |
98 | .is_rmii = 1, | 100 | .is_rmii = 1, |
99 | }; | 101 | }; |
@@ -530,6 +532,7 @@ static struct i2c_board_info __initdata gsia18s_i2c_devices[] = { | |||
530 | static struct at91_cf_data __initdata gsia18s_cf1_data = { | 532 | static struct at91_cf_data __initdata gsia18s_cf1_data = { |
531 | .irq_pin = AT91_PIN_PA27, | 533 | .irq_pin = AT91_PIN_PA27, |
532 | .det_pin = AT91_PIN_PB30, | 534 | .det_pin = AT91_PIN_PB30, |
535 | .vcc_pin = -EINVAL, | ||
533 | .rst_pin = AT91_PIN_PB31, | 536 | .rst_pin = AT91_PIN_PB31, |
534 | .chipselect = 5, | 537 | .chipselect = 5, |
535 | .flags = AT91_CF_TRUE_IDE, | 538 | .flags = AT91_CF_TRUE_IDE, |
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index 3bae73e63633..efde1b2327c8 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c | |||
@@ -61,13 +61,15 @@ static void __init kafa_init_early(void) | |||
61 | at91_set_serial_console(0); | 61 | at91_set_serial_console(0); |
62 | } | 62 | } |
63 | 63 | ||
64 | static struct at91_eth_data __initdata kafa_eth_data = { | 64 | static struct macb_platform_data __initdata kafa_eth_data = { |
65 | .phy_irq_pin = AT91_PIN_PC4, | 65 | .phy_irq_pin = AT91_PIN_PC4, |
66 | .is_rmii = 0, | 66 | .is_rmii = 0, |
67 | }; | 67 | }; |
68 | 68 | ||
69 | static struct at91_usbh_data __initdata kafa_usbh_data = { | 69 | static struct at91_usbh_data __initdata kafa_usbh_data = { |
70 | .ports = 1, | 70 | .ports = 1, |
71 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
72 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
71 | }; | 73 | }; |
72 | 74 | ||
73 | static struct at91_udc_data __initdata kafa_udc_data = { | 75 | static struct at91_udc_data __initdata kafa_udc_data = { |
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index e61351ffad50..d75a4a2ad9c2 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c | |||
@@ -69,13 +69,15 @@ static void __init kb9202_init_early(void) | |||
69 | at91_set_serial_console(0); | 69 | at91_set_serial_console(0); |
70 | } | 70 | } |
71 | 71 | ||
72 | static struct at91_eth_data __initdata kb9202_eth_data = { | 72 | static struct macb_platform_data __initdata kb9202_eth_data = { |
73 | .phy_irq_pin = AT91_PIN_PB29, | 73 | .phy_irq_pin = AT91_PIN_PB29, |
74 | .is_rmii = 0, | 74 | .is_rmii = 0, |
75 | }; | 75 | }; |
76 | 76 | ||
77 | static struct at91_usbh_data __initdata kb9202_usbh_data = { | 77 | static struct at91_usbh_data __initdata kb9202_usbh_data = { |
78 | .ports = 1, | 78 | .ports = 1, |
79 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
80 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
79 | }; | 81 | }; |
80 | 82 | ||
81 | static struct at91_udc_data __initdata kb9202_udc_data = { | 83 | static struct at91_udc_data __initdata kb9202_udc_data = { |
@@ -87,6 +89,8 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = { | |||
87 | .det_pin = AT91_PIN_PB2, | 89 | .det_pin = AT91_PIN_PB2, |
88 | .slot_b = 0, | 90 | .slot_b = 0, |
89 | .wire4 = 1, | 91 | .wire4 = 1, |
92 | .wp_pin = -EINVAL, | ||
93 | .vcc_pin = -EINVAL, | ||
90 | }; | 94 | }; |
91 | 95 | ||
92 | static struct mtd_partition __initdata kb9202_nand_partition[] = { | 96 | static struct mtd_partition __initdata kb9202_nand_partition[] = { |
@@ -100,7 +104,7 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = { | |||
100 | static struct atmel_nand_data __initdata kb9202_nand_data = { | 104 | static struct atmel_nand_data __initdata kb9202_nand_data = { |
101 | .ale = 22, | 105 | .ale = 22, |
102 | .cle = 21, | 106 | .cle = 21, |
103 | // .det_pin = ... not there | 107 | .det_pin = -EINVAL, |
104 | .rdy_pin = AT91_PIN_PC29, | 108 | .rdy_pin = AT91_PIN_PC29, |
105 | .enable_pin = AT91_PIN_PC28, | 109 | .enable_pin = AT91_PIN_PC28, |
106 | .parts = kb9202_nand_partition, | 110 | .parts = kb9202_nand_partition, |
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index ef816c17dc61..3f8617c0e04e 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c | |||
@@ -72,6 +72,7 @@ static void __init neocore926_init_early(void) | |||
72 | static struct at91_usbh_data __initdata neocore926_usbh_data = { | 72 | static struct at91_usbh_data __initdata neocore926_usbh_data = { |
73 | .ports = 2, | 73 | .ports = 2, |
74 | .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, | 74 | .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, |
75 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | 76 | }; |
76 | 77 | ||
77 | /* | 78 | /* |
@@ -79,7 +80,7 @@ static struct at91_usbh_data __initdata neocore926_usbh_data = { | |||
79 | */ | 80 | */ |
80 | static struct at91_udc_data __initdata neocore926_udc_data = { | 81 | static struct at91_udc_data __initdata neocore926_udc_data = { |
81 | .vbus_pin = AT91_PIN_PA25, | 82 | .vbus_pin = AT91_PIN_PA25, |
82 | .pullup_pin = 0, /* pull-up driven by UDC */ | 83 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
83 | }; | 84 | }; |
84 | 85 | ||
85 | 86 | ||
@@ -149,13 +150,14 @@ static struct at91_mmc_data __initdata neocore926_mmc_data = { | |||
149 | .wire4 = 1, | 150 | .wire4 = 1, |
150 | .det_pin = AT91_PIN_PE18, | 151 | .det_pin = AT91_PIN_PE18, |
151 | .wp_pin = AT91_PIN_PE19, | 152 | .wp_pin = AT91_PIN_PE19, |
153 | .vcc_pin = -EINVAL, | ||
152 | }; | 154 | }; |
153 | 155 | ||
154 | 156 | ||
155 | /* | 157 | /* |
156 | * MACB Ethernet device | 158 | * MACB Ethernet device |
157 | */ | 159 | */ |
158 | static struct at91_eth_data __initdata neocore926_macb_data = { | 160 | static struct macb_platform_data __initdata neocore926_macb_data = { |
159 | .phy_irq_pin = AT91_PIN_PE31, | 161 | .phy_irq_pin = AT91_PIN_PE31, |
160 | .is_rmii = 1, | 162 | .is_rmii = 1, |
161 | }; | 163 | }; |
@@ -190,6 +192,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = { | |||
190 | .enable_pin = AT91_PIN_PD15, | 192 | .enable_pin = AT91_PIN_PD15, |
191 | .parts = neocore926_nand_partition, | 193 | .parts = neocore926_nand_partition, |
192 | .num_parts = ARRAY_SIZE(neocore926_nand_partition), | 194 | .num_parts = ARRAY_SIZE(neocore926_nand_partition), |
195 | .det_pin = -EINVAL, | ||
193 | }; | 196 | }; |
194 | 197 | ||
195 | static struct sam9_smc_config __initdata neocore926_nand_smc_config = { | 198 | static struct sam9_smc_config __initdata neocore926_nand_smc_config = { |
@@ -213,7 +216,7 @@ static struct sam9_smc_config __initdata neocore926_nand_smc_config = { | |||
213 | static void __init neocore926_add_device_nand(void) | 216 | static void __init neocore926_add_device_nand(void) |
214 | { | 217 | { |
215 | /* configure chip-select 3 (NAND) */ | 218 | /* configure chip-select 3 (NAND) */ |
216 | sam9_smc_configure(3, &neocore926_nand_smc_config); | 219 | sam9_smc_configure(0, 3, &neocore926_nand_smc_config); |
217 | 220 | ||
218 | at91_add_device_nand(&neocore926_nand_data); | 221 | at91_add_device_nand(&neocore926_nand_data); |
219 | } | 222 | } |
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index 49e3f699b48e..b4a12fc184c8 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c | |||
@@ -96,9 +96,9 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { | |||
96 | static void __init add_device_pcontrol(void) | 96 | static void __init add_device_pcontrol(void) |
97 | { | 97 | { |
98 | /* configure chip-select 4 (IO compatible to 8051 X4 ) */ | 98 | /* configure chip-select 4 (IO compatible to 8051 X4 ) */ |
99 | sam9_smc_configure(4, &pcontrol_smc_config[0]); | 99 | sam9_smc_configure(0, 4, &pcontrol_smc_config[0]); |
100 | /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ | 100 | /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ |
101 | sam9_smc_configure(7, &pcontrol_smc_config[1]); | 101 | sam9_smc_configure(0, 7, &pcontrol_smc_config[1]); |
102 | } | 102 | } |
103 | 103 | ||
104 | 104 | ||
@@ -107,6 +107,8 @@ static void __init add_device_pcontrol(void) | |||
107 | */ | 107 | */ |
108 | static struct at91_usbh_data __initdata usbh_data = { | 108 | static struct at91_usbh_data __initdata usbh_data = { |
109 | .ports = 2, | 109 | .ports = 2, |
110 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
111 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
110 | }; | 112 | }; |
111 | 113 | ||
112 | 114 | ||
@@ -122,7 +124,7 @@ static struct at91_udc_data __initdata pcontrol_g20_udc_data = { | |||
122 | /* | 124 | /* |
123 | * MACB Ethernet device | 125 | * MACB Ethernet device |
124 | */ | 126 | */ |
125 | static struct at91_eth_data __initdata macb_data = { | 127 | static struct macb_platform_data __initdata macb_data = { |
126 | .phy_irq_pin = AT91_PIN_PA28, | 128 | .phy_irq_pin = AT91_PIN_PA28, |
127 | .is_rmii = 1, | 129 | .is_rmii = 1, |
128 | }; | 130 | }; |
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index 0a8fe6a1b7c8..ab024fa11d5c 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c | |||
@@ -60,13 +60,15 @@ static void __init picotux200_init_early(void) | |||
60 | at91_set_serial_console(0); | 60 | at91_set_serial_console(0); |
61 | } | 61 | } |
62 | 62 | ||
63 | static struct at91_eth_data __initdata picotux200_eth_data = { | 63 | static struct macb_platform_data __initdata picotux200_eth_data = { |
64 | .phy_irq_pin = AT91_PIN_PC4, | 64 | .phy_irq_pin = AT91_PIN_PC4, |
65 | .is_rmii = 1, | 65 | .is_rmii = 1, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | static struct at91_usbh_data __initdata picotux200_usbh_data = { | 68 | static struct at91_usbh_data __initdata picotux200_usbh_data = { |
69 | .ports = 1, | 69 | .ports = 1, |
70 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
71 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
70 | }; | 72 | }; |
71 | 73 | ||
72 | static struct at91_mmc_data __initdata picotux200_mmc_data = { | 74 | static struct at91_mmc_data __initdata picotux200_mmc_data = { |
@@ -74,6 +76,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = { | |||
74 | .slot_b = 0, | 76 | .slot_b = 0, |
75 | .wire4 = 1, | 77 | .wire4 = 1, |
76 | .wp_pin = AT91_PIN_PA17, | 78 | .wp_pin = AT91_PIN_PA17, |
79 | .vcc_pin = -EINVAL, | ||
77 | }; | 80 | }; |
78 | 81 | ||
79 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 | 82 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 |
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 07421bdb88ea..e029d220cb84 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c | |||
@@ -77,6 +77,8 @@ static void __init ek_init_early(void) | |||
77 | */ | 77 | */ |
78 | static struct at91_usbh_data __initdata ek_usbh_data = { | 78 | static struct at91_usbh_data __initdata ek_usbh_data = { |
79 | .ports = 2, | 79 | .ports = 2, |
80 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
81 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
80 | }; | 82 | }; |
81 | 83 | ||
82 | /* | 84 | /* |
@@ -84,7 +86,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
84 | */ | 86 | */ |
85 | static struct at91_udc_data __initdata ek_udc_data = { | 87 | static struct at91_udc_data __initdata ek_udc_data = { |
86 | .vbus_pin = AT91_PIN_PC5, | 88 | .vbus_pin = AT91_PIN_PC5, |
87 | .pullup_pin = 0, /* pull-up driven by UDC */ | 89 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
88 | }; | 90 | }; |
89 | 91 | ||
90 | /* | 92 | /* |
@@ -104,7 +106,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
104 | /* | 106 | /* |
105 | * MACB Ethernet device | 107 | * MACB Ethernet device |
106 | */ | 108 | */ |
107 | static struct at91_eth_data __initdata ek_macb_data = { | 109 | static struct macb_platform_data __initdata ek_macb_data = { |
108 | .phy_irq_pin = AT91_PIN_PA31, | 110 | .phy_irq_pin = AT91_PIN_PA31, |
109 | .is_rmii = 1, | 111 | .is_rmii = 1, |
110 | }; | 112 | }; |
@@ -133,7 +135,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
133 | static struct atmel_nand_data __initdata ek_nand_data = { | 135 | static struct atmel_nand_data __initdata ek_nand_data = { |
134 | .ale = 21, | 136 | .ale = 21, |
135 | .cle = 22, | 137 | .cle = 22, |
136 | // .det_pin = ... not connected | 138 | .det_pin = -EINVAL, |
137 | .rdy_pin = AT91_PIN_PC13, | 139 | .rdy_pin = AT91_PIN_PC13, |
138 | .enable_pin = AT91_PIN_PC14, | 140 | .enable_pin = AT91_PIN_PC14, |
139 | .parts = ek_nand_partition, | 141 | .parts = ek_nand_partition, |
@@ -161,7 +163,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
161 | static void __init ek_add_device_nand(void) | 163 | static void __init ek_add_device_nand(void) |
162 | { | 164 | { |
163 | /* configure chip-select 3 (NAND) */ | 165 | /* configure chip-select 3 (NAND) */ |
164 | sam9_smc_configure(3, &ek_nand_smc_config); | 166 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
165 | 167 | ||
166 | at91_add_device_nand(&ek_nand_data); | 168 | at91_add_device_nand(&ek_nand_data); |
167 | } | 169 | } |
@@ -172,9 +174,9 @@ static void __init ek_add_device_nand(void) | |||
172 | static struct at91_mmc_data __initdata ek_mmc_data = { | 174 | static struct at91_mmc_data __initdata ek_mmc_data = { |
173 | .slot_b = 0, | 175 | .slot_b = 0, |
174 | .wire4 = 1, | 176 | .wire4 = 1, |
175 | // .det_pin = ... not connected | 177 | .det_pin = -EINVAL, |
176 | // .wp_pin = ... not connected | 178 | .wp_pin = -EINVAL, |
177 | // .vcc_pin = ... not connected | 179 | .vcc_pin = -EINVAL, |
178 | }; | 180 | }; |
179 | 181 | ||
180 | /* | 182 | /* |
@@ -251,7 +253,7 @@ static void __init ek_board_init(void) | |||
251 | /* LEDs */ | 253 | /* LEDs */ |
252 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); | 254 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); |
253 | /* shutdown controller, wakeup button (5 msec low) */ | 255 | /* shutdown controller, wakeup button (5 msec low) */ |
254 | at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW | 256 | at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW |
255 | | AT91_SHDW_RTTWKEN); | 257 | | AT91_SHDW_RTTWKEN); |
256 | } | 258 | } |
257 | 259 | ||
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index 80a8c9c6e922..782f37946af5 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c | |||
@@ -65,13 +65,15 @@ static void __init dk_init_early(void) | |||
65 | at91_set_serial_console(0); | 65 | at91_set_serial_console(0); |
66 | } | 66 | } |
67 | 67 | ||
68 | static struct at91_eth_data __initdata dk_eth_data = { | 68 | static struct macb_platform_data __initdata dk_eth_data = { |
69 | .phy_irq_pin = AT91_PIN_PC4, | 69 | .phy_irq_pin = AT91_PIN_PC4, |
70 | .is_rmii = 1, | 70 | .is_rmii = 1, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | static struct at91_usbh_data __initdata dk_usbh_data = { | 73 | static struct at91_usbh_data __initdata dk_usbh_data = { |
74 | .ports = 2, | 74 | .ports = 2, |
75 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
76 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | 77 | }; |
76 | 78 | ||
77 | static struct at91_udc_data __initdata dk_udc_data = { | 79 | static struct at91_udc_data __initdata dk_udc_data = { |
@@ -80,16 +82,19 @@ static struct at91_udc_data __initdata dk_udc_data = { | |||
80 | }; | 82 | }; |
81 | 83 | ||
82 | static struct at91_cf_data __initdata dk_cf_data = { | 84 | static struct at91_cf_data __initdata dk_cf_data = { |
85 | .irq_pin = -EINVAL, | ||
83 | .det_pin = AT91_PIN_PB0, | 86 | .det_pin = AT91_PIN_PB0, |
87 | .vcc_pin = -EINVAL, | ||
84 | .rst_pin = AT91_PIN_PC5, | 88 | .rst_pin = AT91_PIN_PC5, |
85 | // .irq_pin = ... not connected | ||
86 | // .vcc_pin = ... always powered | ||
87 | }; | 89 | }; |
88 | 90 | ||
89 | #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD | 91 | #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD |
90 | static struct at91_mmc_data __initdata dk_mmc_data = { | 92 | static struct at91_mmc_data __initdata dk_mmc_data = { |
91 | .slot_b = 0, | 93 | .slot_b = 0, |
92 | .wire4 = 1, | 94 | .wire4 = 1, |
95 | .det_pin = -EINVAL, | ||
96 | .wp_pin = -EINVAL, | ||
97 | .vcc_pin = -EINVAL, | ||
93 | }; | 98 | }; |
94 | #endif | 99 | #endif |
95 | 100 | ||
@@ -143,7 +148,7 @@ static struct atmel_nand_data __initdata dk_nand_data = { | |||
143 | .cle = 21, | 148 | .cle = 21, |
144 | .det_pin = AT91_PIN_PB1, | 149 | .det_pin = AT91_PIN_PB1, |
145 | .rdy_pin = AT91_PIN_PC2, | 150 | .rdy_pin = AT91_PIN_PC2, |
146 | // .enable_pin = ... not there | 151 | .enable_pin = -EINVAL, |
147 | .parts = dk_nand_partition, | 152 | .parts = dk_nand_partition, |
148 | .num_parts = ARRAY_SIZE(dk_nand_partition), | 153 | .num_parts = ARRAY_SIZE(dk_nand_partition), |
149 | }; | 154 | }; |
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 99fd7f8aee0e..ef7c12a92246 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c | |||
@@ -65,13 +65,15 @@ static void __init ek_init_early(void) | |||
65 | at91_set_serial_console(0); | 65 | at91_set_serial_console(0); |
66 | } | 66 | } |
67 | 67 | ||
68 | static struct at91_eth_data __initdata ek_eth_data = { | 68 | static struct macb_platform_data __initdata ek_eth_data = { |
69 | .phy_irq_pin = AT91_PIN_PC4, | 69 | .phy_irq_pin = AT91_PIN_PC4, |
70 | .is_rmii = 1, | 70 | .is_rmii = 1, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | static struct at91_usbh_data __initdata ek_usbh_data = { | 73 | static struct at91_usbh_data __initdata ek_usbh_data = { |
74 | .ports = 2, | 74 | .ports = 2, |
75 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
76 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | 77 | }; |
76 | 78 | ||
77 | static struct at91_udc_data __initdata ek_udc_data = { | 79 | static struct at91_udc_data __initdata ek_udc_data = { |
@@ -85,6 +87,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
85 | .slot_b = 0, | 87 | .slot_b = 0, |
86 | .wire4 = 1, | 88 | .wire4 = 1, |
87 | .wp_pin = AT91_PIN_PA17, | 89 | .wp_pin = AT91_PIN_PA17, |
90 | .vcc_pin = -EINVAL, | ||
88 | }; | 91 | }; |
89 | #endif | 92 | #endif |
90 | 93 | ||
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c index e927df0175df..af0750fafa29 100644 --- a/arch/arm/mach-at91/board-rsi-ews.c +++ b/arch/arm/mach-at91/board-rsi-ews.c | |||
@@ -60,7 +60,7 @@ static void __init rsi_ews_init_early(void) | |||
60 | /* | 60 | /* |
61 | * Ethernet | 61 | * Ethernet |
62 | */ | 62 | */ |
63 | static struct at91_eth_data rsi_ews_eth_data __initdata = { | 63 | static struct macb_platform_data rsi_ews_eth_data __initdata = { |
64 | .phy_irq_pin = AT91_PIN_PC4, | 64 | .phy_irq_pin = AT91_PIN_PC4, |
65 | .is_rmii = 1, | 65 | .is_rmii = 1, |
66 | }; | 66 | }; |
@@ -70,6 +70,8 @@ static struct at91_eth_data rsi_ews_eth_data __initdata = { | |||
70 | */ | 70 | */ |
71 | static struct at91_usbh_data rsi_ews_usbh_data __initdata = { | 71 | static struct at91_usbh_data rsi_ews_usbh_data __initdata = { |
72 | .ports = 1, | 72 | .ports = 1, |
73 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
74 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | /* | 77 | /* |
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index 072d53af98d9..84bce587735f 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c | |||
@@ -72,6 +72,8 @@ static void __init ek_init_early(void) | |||
72 | */ | 72 | */ |
73 | static struct at91_usbh_data __initdata ek_usbh_data = { | 73 | static struct at91_usbh_data __initdata ek_usbh_data = { |
74 | .ports = 2, | 74 | .ports = 2, |
75 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
76 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | 77 | }; |
76 | 78 | ||
77 | /* | 79 | /* |
@@ -79,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
79 | */ | 81 | */ |
80 | static struct at91_udc_data __initdata ek_udc_data = { | 82 | static struct at91_udc_data __initdata ek_udc_data = { |
81 | .vbus_pin = AT91_PIN_PC5, | 83 | .vbus_pin = AT91_PIN_PC5, |
82 | .pullup_pin = 0, /* pull-up driven by UDC */ | 84 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
83 | }; | 85 | }; |
84 | 86 | ||
85 | 87 | ||
@@ -109,7 +111,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
109 | /* | 111 | /* |
110 | * MACB Ethernet device | 112 | * MACB Ethernet device |
111 | */ | 113 | */ |
112 | static struct at91_eth_data __initdata ek_macb_data = { | 114 | static struct macb_platform_data __initdata ek_macb_data = { |
113 | .phy_irq_pin = AT91_PIN_PA7, | 115 | .phy_irq_pin = AT91_PIN_PA7, |
114 | .is_rmii = 0, | 116 | .is_rmii = 0, |
115 | }; | 117 | }; |
@@ -134,7 +136,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
134 | static struct atmel_nand_data __initdata ek_nand_data = { | 136 | static struct atmel_nand_data __initdata ek_nand_data = { |
135 | .ale = 21, | 137 | .ale = 21, |
136 | .cle = 22, | 138 | .cle = 22, |
137 | // .det_pin = ... not connected | 139 | .det_pin = -EINVAL, |
138 | .rdy_pin = AT91_PIN_PC13, | 140 | .rdy_pin = AT91_PIN_PC13, |
139 | .enable_pin = AT91_PIN_PC14, | 141 | .enable_pin = AT91_PIN_PC14, |
140 | .parts = ek_nand_partition, | 142 | .parts = ek_nand_partition, |
@@ -162,7 +164,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
162 | static void __init ek_add_device_nand(void) | 164 | static void __init ek_add_device_nand(void) |
163 | { | 165 | { |
164 | /* configure chip-select 3 (NAND) */ | 166 | /* configure chip-select 3 (NAND) */ |
165 | sam9_smc_configure(3, &ek_nand_smc_config); | 167 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
166 | 168 | ||
167 | at91_add_device_nand(&ek_nand_data); | 169 | at91_add_device_nand(&ek_nand_data); |
168 | } | 170 | } |
@@ -176,7 +178,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
176 | .wire4 = 1, | 178 | .wire4 = 1, |
177 | .det_pin = AT91_PIN_PC8, | 179 | .det_pin = AT91_PIN_PC8, |
178 | .wp_pin = AT91_PIN_PC4, | 180 | .wp_pin = AT91_PIN_PC4, |
179 | // .vcc_pin = ... not connected | 181 | .vcc_pin = -EINVAL, |
180 | }; | 182 | }; |
181 | 183 | ||
182 | static void __init ek_board_init(void) | 184 | static void __init ek_board_init(void) |
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index 4f10181a0782..be8233bcabdc 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c | |||
@@ -75,6 +75,8 @@ static void __init ek_init_early(void) | |||
75 | */ | 75 | */ |
76 | static struct at91_usbh_data __initdata ek_usbh_data = { | 76 | static struct at91_usbh_data __initdata ek_usbh_data = { |
77 | .ports = 2, | 77 | .ports = 2, |
78 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
79 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
78 | }; | 80 | }; |
79 | 81 | ||
80 | /* | 82 | /* |
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
82 | */ | 84 | */ |
83 | static struct at91_udc_data __initdata ek_udc_data = { | 85 | static struct at91_udc_data __initdata ek_udc_data = { |
84 | .vbus_pin = AT91_PIN_PC5, | 86 | .vbus_pin = AT91_PIN_PC5, |
85 | .pullup_pin = 0, /* pull-up driven by UDC */ | 87 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
86 | }; | 88 | }; |
87 | 89 | ||
88 | 90 | ||
@@ -151,7 +153,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
151 | /* | 153 | /* |
152 | * MACB Ethernet device | 154 | * MACB Ethernet device |
153 | */ | 155 | */ |
154 | static struct at91_eth_data __initdata ek_macb_data = { | 156 | static struct macb_platform_data __initdata ek_macb_data = { |
155 | .phy_irq_pin = AT91_PIN_PA7, | 157 | .phy_irq_pin = AT91_PIN_PA7, |
156 | .is_rmii = 1, | 158 | .is_rmii = 1, |
157 | }; | 159 | }; |
@@ -176,7 +178,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
176 | static struct atmel_nand_data __initdata ek_nand_data = { | 178 | static struct atmel_nand_data __initdata ek_nand_data = { |
177 | .ale = 21, | 179 | .ale = 21, |
178 | .cle = 22, | 180 | .cle = 22, |
179 | // .det_pin = ... not connected | 181 | .det_pin = -EINVAL, |
180 | .rdy_pin = AT91_PIN_PC13, | 182 | .rdy_pin = AT91_PIN_PC13, |
181 | .enable_pin = AT91_PIN_PC14, | 183 | .enable_pin = AT91_PIN_PC14, |
182 | .parts = ek_nand_partition, | 184 | .parts = ek_nand_partition, |
@@ -211,7 +213,7 @@ static void __init ek_add_device_nand(void) | |||
211 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 213 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
212 | 214 | ||
213 | /* configure chip-select 3 (NAND) */ | 215 | /* configure chip-select 3 (NAND) */ |
214 | sam9_smc_configure(3, &ek_nand_smc_config); | 216 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
215 | 217 | ||
216 | at91_add_device_nand(&ek_nand_data); | 218 | at91_add_device_nand(&ek_nand_data); |
217 | } | 219 | } |
@@ -223,9 +225,9 @@ static void __init ek_add_device_nand(void) | |||
223 | static struct at91_mmc_data __initdata ek_mmc_data = { | 225 | static struct at91_mmc_data __initdata ek_mmc_data = { |
224 | .slot_b = 1, | 226 | .slot_b = 1, |
225 | .wire4 = 1, | 227 | .wire4 = 1, |
226 | // .det_pin = ... not connected | 228 | .det_pin = -EINVAL, |
227 | // .wp_pin = ... not connected | 229 | .wp_pin = -EINVAL, |
228 | // .vcc_pin = ... not connected | 230 | .vcc_pin = -EINVAL, |
229 | }; | 231 | }; |
230 | 232 | ||
231 | 233 | ||
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index b005b738e8ff..40895072a1a7 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c | |||
@@ -131,7 +131,7 @@ static struct sam9_smc_config __initdata dm9000_smc_config = { | |||
131 | static void __init ek_add_device_dm9000(void) | 131 | static void __init ek_add_device_dm9000(void) |
132 | { | 132 | { |
133 | /* Configure chip-select 2 (DM9000) */ | 133 | /* Configure chip-select 2 (DM9000) */ |
134 | sam9_smc_configure(2, &dm9000_smc_config); | 134 | sam9_smc_configure(0, 2, &dm9000_smc_config); |
135 | 135 | ||
136 | /* Configure Reset signal as output */ | 136 | /* Configure Reset signal as output */ |
137 | at91_set_gpio_output(AT91_PIN_PC10, 0); | 137 | at91_set_gpio_output(AT91_PIN_PC10, 0); |
@@ -151,6 +151,8 @@ static void __init ek_add_device_dm9000(void) {} | |||
151 | */ | 151 | */ |
152 | static struct at91_usbh_data __initdata ek_usbh_data = { | 152 | static struct at91_usbh_data __initdata ek_usbh_data = { |
153 | .ports = 2, | 153 | .ports = 2, |
154 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
155 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
154 | }; | 156 | }; |
155 | 157 | ||
156 | 158 | ||
@@ -159,7 +161,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
159 | */ | 161 | */ |
160 | static struct at91_udc_data __initdata ek_udc_data = { | 162 | static struct at91_udc_data __initdata ek_udc_data = { |
161 | .vbus_pin = AT91_PIN_PB29, | 163 | .vbus_pin = AT91_PIN_PB29, |
162 | .pullup_pin = 0, /* pull-up driven by UDC */ | 164 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
163 | }; | 165 | }; |
164 | 166 | ||
165 | 167 | ||
@@ -182,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
182 | static struct atmel_nand_data __initdata ek_nand_data = { | 184 | static struct atmel_nand_data __initdata ek_nand_data = { |
183 | .ale = 22, | 185 | .ale = 22, |
184 | .cle = 21, | 186 | .cle = 21, |
185 | // .det_pin = ... not connected | 187 | .det_pin = -EINVAL, |
186 | .rdy_pin = AT91_PIN_PC15, | 188 | .rdy_pin = AT91_PIN_PC15, |
187 | .enable_pin = AT91_PIN_PC14, | 189 | .enable_pin = AT91_PIN_PC14, |
188 | .parts = ek_nand_partition, | 190 | .parts = ek_nand_partition, |
@@ -217,7 +219,7 @@ static void __init ek_add_device_nand(void) | |||
217 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 219 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
218 | 220 | ||
219 | /* configure chip-select 3 (NAND) */ | 221 | /* configure chip-select 3 (NAND) */ |
220 | sam9_smc_configure(3, &ek_nand_smc_config); | 222 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
221 | 223 | ||
222 | at91_add_device_nand(&ek_nand_data); | 224 | at91_add_device_nand(&ek_nand_data); |
223 | } | 225 | } |
@@ -345,6 +347,9 @@ static struct spi_board_info ek_spi_devices[] = { | |||
345 | */ | 347 | */ |
346 | static struct at91_mmc_data __initdata ek_mmc_data = { | 348 | static struct at91_mmc_data __initdata ek_mmc_data = { |
347 | .wire4 = 1, | 349 | .wire4 = 1, |
350 | .det_pin = -EINVAL, | ||
351 | .wp_pin = -EINVAL, | ||
352 | .vcc_pin = -EINVAL, | ||
348 | }; | 353 | }; |
349 | 354 | ||
350 | #endif /* CONFIG_SPI_ATMEL_* */ | 355 | #endif /* CONFIG_SPI_ATMEL_* */ |
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index bccdcf23caa1..29f66052fe63 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c | |||
@@ -74,6 +74,7 @@ static void __init ek_init_early(void) | |||
74 | static struct at91_usbh_data __initdata ek_usbh_data = { | 74 | static struct at91_usbh_data __initdata ek_usbh_data = { |
75 | .ports = 2, | 75 | .ports = 2, |
76 | .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, | 76 | .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, |
77 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
77 | }; | 78 | }; |
78 | 79 | ||
79 | /* | 80 | /* |
@@ -81,7 +82,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
81 | */ | 82 | */ |
82 | static struct at91_udc_data __initdata ek_udc_data = { | 83 | static struct at91_udc_data __initdata ek_udc_data = { |
83 | .vbus_pin = AT91_PIN_PA25, | 84 | .vbus_pin = AT91_PIN_PA25, |
84 | .pullup_pin = 0, /* pull-up driven by UDC */ | 85 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
85 | }; | 86 | }; |
86 | 87 | ||
87 | 88 | ||
@@ -151,14 +152,14 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
151 | .wire4 = 1, | 152 | .wire4 = 1, |
152 | .det_pin = AT91_PIN_PE18, | 153 | .det_pin = AT91_PIN_PE18, |
153 | .wp_pin = AT91_PIN_PE19, | 154 | .wp_pin = AT91_PIN_PE19, |
154 | // .vcc_pin = ... not connected | 155 | .vcc_pin = -EINVAL, |
155 | }; | 156 | }; |
156 | 157 | ||
157 | 158 | ||
158 | /* | 159 | /* |
159 | * MACB Ethernet device | 160 | * MACB Ethernet device |
160 | */ | 161 | */ |
161 | static struct at91_eth_data __initdata ek_macb_data = { | 162 | static struct macb_platform_data __initdata ek_macb_data = { |
162 | .phy_irq_pin = AT91_PIN_PE31, | 163 | .phy_irq_pin = AT91_PIN_PE31, |
163 | .is_rmii = 1, | 164 | .is_rmii = 1, |
164 | }; | 165 | }; |
@@ -183,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
183 | static struct atmel_nand_data __initdata ek_nand_data = { | 184 | static struct atmel_nand_data __initdata ek_nand_data = { |
184 | .ale = 21, | 185 | .ale = 21, |
185 | .cle = 22, | 186 | .cle = 22, |
186 | // .det_pin = ... not connected | 187 | .det_pin = -EINVAL, |
187 | .rdy_pin = AT91_PIN_PA22, | 188 | .rdy_pin = AT91_PIN_PA22, |
188 | .enable_pin = AT91_PIN_PD15, | 189 | .enable_pin = AT91_PIN_PD15, |
189 | .parts = ek_nand_partition, | 190 | .parts = ek_nand_partition, |
@@ -218,7 +219,7 @@ static void __init ek_add_device_nand(void) | |||
218 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 219 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
219 | 220 | ||
220 | /* configure chip-select 3 (NAND) */ | 221 | /* configure chip-select 3 (NAND) */ |
221 | sam9_smc_configure(3, &ek_nand_smc_config); | 222 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
222 | 223 | ||
223 | at91_add_device_nand(&ek_nand_data); | 224 | at91_add_device_nand(&ek_nand_data); |
224 | } | 225 | } |
@@ -353,6 +354,7 @@ static void __init ek_add_device_buttons(void) {} | |||
353 | * reset_pin is not connected: NRST | 354 | * reset_pin is not connected: NRST |
354 | */ | 355 | */ |
355 | static struct ac97c_platform_data ek_ac97_data = { | 356 | static struct ac97c_platform_data ek_ac97_data = { |
357 | .reset_pin = -EINVAL, | ||
356 | }; | 358 | }; |
357 | 359 | ||
358 | 360 | ||
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 64fc75c9d0ac..843d6286c6f4 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c | |||
@@ -86,6 +86,8 @@ static void __init ek_init_early(void) | |||
86 | */ | 86 | */ |
87 | static struct at91_usbh_data __initdata ek_usbh_data = { | 87 | static struct at91_usbh_data __initdata ek_usbh_data = { |
88 | .ports = 2, | 88 | .ports = 2, |
89 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
90 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
89 | }; | 91 | }; |
90 | 92 | ||
91 | /* | 93 | /* |
@@ -93,7 +95,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
93 | */ | 95 | */ |
94 | static struct at91_udc_data __initdata ek_udc_data = { | 96 | static struct at91_udc_data __initdata ek_udc_data = { |
95 | .vbus_pin = AT91_PIN_PC5, | 97 | .vbus_pin = AT91_PIN_PC5, |
96 | .pullup_pin = 0, /* pull-up driven by UDC */ | 98 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
97 | }; | 99 | }; |
98 | 100 | ||
99 | 101 | ||
@@ -123,7 +125,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
123 | /* | 125 | /* |
124 | * MACB Ethernet device | 126 | * MACB Ethernet device |
125 | */ | 127 | */ |
126 | static struct at91_eth_data __initdata ek_macb_data = { | 128 | static struct macb_platform_data __initdata ek_macb_data = { |
127 | .phy_irq_pin = AT91_PIN_PA7, | 129 | .phy_irq_pin = AT91_PIN_PA7, |
128 | .is_rmii = 1, | 130 | .is_rmii = 1, |
129 | }; | 131 | }; |
@@ -163,6 +165,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
163 | .cle = 22, | 165 | .cle = 22, |
164 | .rdy_pin = AT91_PIN_PC13, | 166 | .rdy_pin = AT91_PIN_PC13, |
165 | .enable_pin = AT91_PIN_PC14, | 167 | .enable_pin = AT91_PIN_PC14, |
168 | .det_pin = -EINVAL, | ||
166 | .parts = ek_nand_partition, | 169 | .parts = ek_nand_partition, |
167 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 170 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
168 | }; | 171 | }; |
@@ -195,7 +198,7 @@ static void __init ek_add_device_nand(void) | |||
195 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 198 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
196 | 199 | ||
197 | /* configure chip-select 3 (NAND) */ | 200 | /* configure chip-select 3 (NAND) */ |
198 | sam9_smc_configure(3, &ek_nand_smc_config); | 201 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
199 | 202 | ||
200 | at91_add_device_nand(&ek_nand_data); | 203 | at91_add_device_nand(&ek_nand_data); |
201 | } | 204 | } |
@@ -210,6 +213,7 @@ static struct mci_platform_data __initdata ek_mmc_data = { | |||
210 | .slot[1] = { | 213 | .slot[1] = { |
211 | .bus_width = 4, | 214 | .bus_width = 4, |
212 | .detect_pin = AT91_PIN_PC9, | 215 | .detect_pin = AT91_PIN_PC9, |
216 | .wp_pin = -EINVAL, | ||
213 | }, | 217 | }, |
214 | 218 | ||
215 | }; | 219 | }; |
@@ -218,6 +222,8 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
218 | .slot_b = 1, /* Only one slot so use slot B */ | 222 | .slot_b = 1, /* Only one slot so use slot B */ |
219 | .wire4 = 1, | 223 | .wire4 = 1, |
220 | .det_pin = AT91_PIN_PC9, | 224 | .det_pin = AT91_PIN_PC9, |
225 | .wp_pin = -EINVAL, | ||
226 | .vcc_pin = -EINVAL, | ||
221 | }; | 227 | }; |
222 | #endif | 228 | #endif |
223 | 229 | ||
@@ -227,6 +233,7 @@ static void __init ek_add_device_mmc(void) | |||
227 | if (ek_have_2mmc()) { | 233 | if (ek_have_2mmc()) { |
228 | ek_mmc_data.slot[0].bus_width = 4; | 234 | ek_mmc_data.slot[0].bus_width = 4; |
229 | ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2; | 235 | ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2; |
236 | ek_mmc_data.slot[0].wp_pin = -1; | ||
230 | } | 237 | } |
231 | at91_add_device_mci(0, &ek_mmc_data); | 238 | at91_add_device_mci(0, &ek_mmc_data); |
232 | #else | 239 | #else |
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 92de9127923a..ea0d1b9c2b7b 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
@@ -69,6 +69,7 @@ static void __init ek_init_early(void) | |||
69 | static struct at91_usbh_data __initdata ek_usbh_hs_data = { | 69 | static struct at91_usbh_data __initdata ek_usbh_hs_data = { |
70 | .ports = 2, | 70 | .ports = 2, |
71 | .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, | 71 | .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, |
72 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
72 | }; | 73 | }; |
73 | 74 | ||
74 | 75 | ||
@@ -100,6 +101,7 @@ static struct mci_platform_data __initdata mci0_data = { | |||
100 | .slot[0] = { | 101 | .slot[0] = { |
101 | .bus_width = 4, | 102 | .bus_width = 4, |
102 | .detect_pin = AT91_PIN_PD10, | 103 | .detect_pin = AT91_PIN_PD10, |
104 | .wp_pin = -EINVAL, | ||
103 | }, | 105 | }, |
104 | }; | 106 | }; |
105 | 107 | ||
@@ -115,7 +117,7 @@ static struct mci_platform_data __initdata mci1_data = { | |||
115 | /* | 117 | /* |
116 | * MACB Ethernet device | 118 | * MACB Ethernet device |
117 | */ | 119 | */ |
118 | static struct at91_eth_data __initdata ek_macb_data = { | 120 | static struct macb_platform_data __initdata ek_macb_data = { |
119 | .phy_irq_pin = AT91_PIN_PD5, | 121 | .phy_irq_pin = AT91_PIN_PD5, |
120 | .is_rmii = 1, | 122 | .is_rmii = 1, |
121 | }; | 123 | }; |
@@ -143,6 +145,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
143 | .cle = 22, | 145 | .cle = 22, |
144 | .rdy_pin = AT91_PIN_PC8, | 146 | .rdy_pin = AT91_PIN_PC8, |
145 | .enable_pin = AT91_PIN_PC14, | 147 | .enable_pin = AT91_PIN_PC14, |
148 | .det_pin = -EINVAL, | ||
146 | .parts = ek_nand_partition, | 149 | .parts = ek_nand_partition, |
147 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 150 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
148 | }; | 151 | }; |
@@ -175,7 +178,7 @@ static void __init ek_add_device_nand(void) | |||
175 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 178 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
176 | 179 | ||
177 | /* configure chip-select 3 (NAND) */ | 180 | /* configure chip-select 3 (NAND) */ |
178 | sam9_smc_configure(3, &ek_nand_smc_config); | 181 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
179 | 182 | ||
180 | at91_add_device_nand(&ek_nand_data); | 183 | at91_add_device_nand(&ek_nand_data); |
181 | } | 184 | } |
@@ -330,6 +333,7 @@ static void __init ek_add_device_buttons(void) {} | |||
330 | * reset_pin is not connected: NRST | 333 | * reset_pin is not connected: NRST |
331 | */ | 334 | */ |
332 | static struct ac97c_platform_data ek_ac97_data = { | 335 | static struct ac97c_platform_data ek_ac97_data = { |
336 | .reset_pin = -EINVAL, | ||
333 | }; | 337 | }; |
334 | 338 | ||
335 | 339 | ||
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index b2b748239f36..c1366d0032bf 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c | |||
@@ -67,8 +67,8 @@ static struct usba_platform_data __initdata ek_usba_udc_data = { | |||
67 | static struct at91_mmc_data __initdata ek_mmc_data = { | 67 | static struct at91_mmc_data __initdata ek_mmc_data = { |
68 | .wire4 = 1, | 68 | .wire4 = 1, |
69 | .det_pin = AT91_PIN_PA15, | 69 | .det_pin = AT91_PIN_PA15, |
70 | // .wp_pin = ... not connected | 70 | .wp_pin = -EINVAL, |
71 | // .vcc_pin = ... not connected | 71 | .vcc_pin = -EINVAL, |
72 | }; | 72 | }; |
73 | 73 | ||
74 | 74 | ||
@@ -91,7 +91,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
91 | static struct atmel_nand_data __initdata ek_nand_data = { | 91 | static struct atmel_nand_data __initdata ek_nand_data = { |
92 | .ale = 21, | 92 | .ale = 21, |
93 | .cle = 22, | 93 | .cle = 22, |
94 | // .det_pin = ... not connected | 94 | .det_pin = -EINVAL, |
95 | .rdy_pin = AT91_PIN_PD17, | 95 | .rdy_pin = AT91_PIN_PD17, |
96 | .enable_pin = AT91_PIN_PB6, | 96 | .enable_pin = AT91_PIN_PB6, |
97 | .parts = ek_nand_partition, | 97 | .parts = ek_nand_partition, |
@@ -119,7 +119,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
119 | static void __init ek_add_device_nand(void) | 119 | static void __init ek_add_device_nand(void) |
120 | { | 120 | { |
121 | /* configure chip-select 3 (NAND) */ | 121 | /* configure chip-select 3 (NAND) */ |
122 | sam9_smc_configure(3, &ek_nand_smc_config); | 122 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
123 | 123 | ||
124 | at91_add_device_nand(&ek_nand_data); | 124 | at91_add_device_nand(&ek_nand_data); |
125 | } | 125 | } |
@@ -204,6 +204,7 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data; | |||
204 | * reset_pin is not connected: NRST | 204 | * reset_pin is not connected: NRST |
205 | */ | 205 | */ |
206 | static struct ac97c_platform_data ek_ac97_data = { | 206 | static struct ac97c_platform_data ek_ac97_data = { |
207 | .reset_pin = -EINVAL, | ||
207 | }; | 208 | }; |
208 | 209 | ||
209 | 210 | ||
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index 0df01c6e2d0c..4770db08e5a6 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c | |||
@@ -57,15 +57,19 @@ static void __init snapper9260_init_early(void) | |||
57 | 57 | ||
58 | static struct at91_usbh_data __initdata snapper9260_usbh_data = { | 58 | static struct at91_usbh_data __initdata snapper9260_usbh_data = { |
59 | .ports = 2, | 59 | .ports = 2, |
60 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
61 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
60 | }; | 62 | }; |
61 | 63 | ||
62 | static struct at91_udc_data __initdata snapper9260_udc_data = { | 64 | static struct at91_udc_data __initdata snapper9260_udc_data = { |
63 | .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5), | 65 | .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5), |
64 | .vbus_active_low = 1, | 66 | .vbus_active_low = 1, |
65 | .vbus_polled = 1, | 67 | .vbus_polled = 1, |
68 | .pullup_pin = -EINVAL, | ||
66 | }; | 69 | }; |
67 | 70 | ||
68 | static struct at91_eth_data snapper9260_macb_data = { | 71 | static struct macb_platform_data snapper9260_macb_data = { |
72 | .phy_irq_pin = -EINVAL, | ||
69 | .is_rmii = 1, | 73 | .is_rmii = 1, |
70 | }; | 74 | }; |
71 | 75 | ||
@@ -104,6 +108,8 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = { | |||
104 | .parts = snapper9260_nand_partitions, | 108 | .parts = snapper9260_nand_partitions, |
105 | .num_parts = ARRAY_SIZE(snapper9260_nand_partitions), | 109 | .num_parts = ARRAY_SIZE(snapper9260_nand_partitions), |
106 | .bus_width_16 = 0, | 110 | .bus_width_16 = 0, |
111 | .enable_pin = -EINVAL, | ||
112 | .det_pin = -EINVAL, | ||
107 | }; | 113 | }; |
108 | 114 | ||
109 | static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { | 115 | static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { |
@@ -149,7 +155,7 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = { | |||
149 | static void __init snapper9260_add_device_nand(void) | 155 | static void __init snapper9260_add_device_nand(void) |
150 | { | 156 | { |
151 | at91_set_A_periph(AT91_PIN_PC14, 0); | 157 | at91_set_A_periph(AT91_PIN_PC14, 0); |
152 | sam9_smc_configure(3, &snapper9260_nand_smc_config); | 158 | sam9_smc_configure(0, 3, &snapper9260_nand_smc_config); |
153 | at91_add_device_nand(&snapper9260_nand_data); | 159 | at91_add_device_nand(&snapper9260_nand_data); |
154 | } | 160 | } |
155 | 161 | ||
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index 936e5fd7f406..72eb3b4d9ab6 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c | |||
@@ -85,6 +85,7 @@ static struct atmel_nand_data __initdata nand_data = { | |||
85 | .rdy_pin = AT91_PIN_PC13, | 85 | .rdy_pin = AT91_PIN_PC13, |
86 | .enable_pin = AT91_PIN_PC14, | 86 | .enable_pin = AT91_PIN_PC14, |
87 | .bus_width_16 = 0, | 87 | .bus_width_16 = 0, |
88 | .det_pin = -EINVAL, | ||
88 | }; | 89 | }; |
89 | 90 | ||
90 | static struct sam9_smc_config __initdata nand_smc_config = { | 91 | static struct sam9_smc_config __initdata nand_smc_config = { |
@@ -108,7 +109,7 @@ static struct sam9_smc_config __initdata nand_smc_config = { | |||
108 | static void __init add_device_nand(void) | 109 | static void __init add_device_nand(void) |
109 | { | 110 | { |
110 | /* configure chip-select 3 (NAND) */ | 111 | /* configure chip-select 3 (NAND) */ |
111 | sam9_smc_configure(3, &nand_smc_config); | 112 | sam9_smc_configure(0, 3, &nand_smc_config); |
112 | 113 | ||
113 | at91_add_device_nand(&nand_data); | 114 | at91_add_device_nand(&nand_data); |
114 | } | 115 | } |
@@ -122,12 +123,17 @@ static void __init add_device_nand(void) | |||
122 | static struct mci_platform_data __initdata mmc_data = { | 123 | static struct mci_platform_data __initdata mmc_data = { |
123 | .slot[0] = { | 124 | .slot[0] = { |
124 | .bus_width = 4, | 125 | .bus_width = 4, |
126 | .detect_pin = -1, | ||
127 | .wp_pin = -1, | ||
125 | }, | 128 | }, |
126 | }; | 129 | }; |
127 | #else | 130 | #else |
128 | static struct at91_mmc_data __initdata mmc_data = { | 131 | static struct at91_mmc_data __initdata mmc_data = { |
129 | .slot_b = 0, | 132 | .slot_b = 0, |
130 | .wire4 = 1, | 133 | .wire4 = 1, |
134 | .det_pin = -EINVAL, | ||
135 | .wp_pin = -EINVAL, | ||
136 | .vcc_pin = -EINVAL, | ||
131 | }; | 137 | }; |
132 | #endif | 138 | #endif |
133 | 139 | ||
@@ -137,6 +143,8 @@ static struct at91_mmc_data __initdata mmc_data = { | |||
137 | */ | 143 | */ |
138 | static struct at91_usbh_data __initdata usbh_data = { | 144 | static struct at91_usbh_data __initdata usbh_data = { |
139 | .ports = 2, | 145 | .ports = 2, |
146 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
147 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
140 | }; | 148 | }; |
141 | 149 | ||
142 | 150 | ||
@@ -145,19 +153,19 @@ static struct at91_usbh_data __initdata usbh_data = { | |||
145 | */ | 153 | */ |
146 | static struct at91_udc_data __initdata portuxg20_udc_data = { | 154 | static struct at91_udc_data __initdata portuxg20_udc_data = { |
147 | .vbus_pin = AT91_PIN_PC7, | 155 | .vbus_pin = AT91_PIN_PC7, |
148 | .pullup_pin = 0, /* pull-up driven by UDC */ | 156 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
149 | }; | 157 | }; |
150 | 158 | ||
151 | static struct at91_udc_data __initdata stamp9g20evb_udc_data = { | 159 | static struct at91_udc_data __initdata stamp9g20evb_udc_data = { |
152 | .vbus_pin = AT91_PIN_PA22, | 160 | .vbus_pin = AT91_PIN_PA22, |
153 | .pullup_pin = 0, /* pull-up driven by UDC */ | 161 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
154 | }; | 162 | }; |
155 | 163 | ||
156 | 164 | ||
157 | /* | 165 | /* |
158 | * MACB Ethernet device | 166 | * MACB Ethernet device |
159 | */ | 167 | */ |
160 | static struct at91_eth_data __initdata macb_data = { | 168 | static struct macb_platform_data __initdata macb_data = { |
161 | .phy_irq_pin = AT91_PIN_PA28, | 169 | .phy_irq_pin = AT91_PIN_PA28, |
162 | .is_rmii = 1, | 170 | .is_rmii = 1, |
163 | }; | 171 | }; |
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c index 0a20bab21f99..26c36fc2d1e5 100644 --- a/arch/arm/mach-at91/board-usb-a926x.c +++ b/arch/arm/mach-at91/board-usb-a926x.c | |||
@@ -66,6 +66,8 @@ static void __init ek_init_early(void) | |||
66 | */ | 66 | */ |
67 | static struct at91_usbh_data __initdata ek_usbh_data = { | 67 | static struct at91_usbh_data __initdata ek_usbh_data = { |
68 | .ports = 2, | 68 | .ports = 2, |
69 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
70 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
69 | }; | 71 | }; |
70 | 72 | ||
71 | /* | 73 | /* |
@@ -73,7 +75,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
73 | */ | 75 | */ |
74 | static struct at91_udc_data __initdata ek_udc_data = { | 76 | static struct at91_udc_data __initdata ek_udc_data = { |
75 | .vbus_pin = AT91_PIN_PB11, | 77 | .vbus_pin = AT91_PIN_PB11, |
76 | .pullup_pin = 0, /* pull-up driven by UDC */ | 78 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
77 | }; | 79 | }; |
78 | 80 | ||
79 | static void __init ek_add_device_udc(void) | 81 | static void __init ek_add_device_udc(void) |
@@ -146,7 +148,7 @@ static void __init ek_add_device_spi(void) | |||
146 | /* | 148 | /* |
147 | * MACB Ethernet device | 149 | * MACB Ethernet device |
148 | */ | 150 | */ |
149 | static struct at91_eth_data __initdata ek_macb_data = { | 151 | static struct macb_platform_data __initdata ek_macb_data = { |
150 | .phy_irq_pin = AT91_PIN_PE31, | 152 | .phy_irq_pin = AT91_PIN_PE31, |
151 | .is_rmii = 1, | 153 | .is_rmii = 1, |
152 | }; | 154 | }; |
@@ -193,7 +195,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
193 | static struct atmel_nand_data __initdata ek_nand_data = { | 195 | static struct atmel_nand_data __initdata ek_nand_data = { |
194 | .ale = 21, | 196 | .ale = 21, |
195 | .cle = 22, | 197 | .cle = 22, |
196 | // .det_pin = ... not connected | 198 | .det_pin = -EINVAL, |
197 | .rdy_pin = AT91_PIN_PA22, | 199 | .rdy_pin = AT91_PIN_PA22, |
198 | .enable_pin = AT91_PIN_PD15, | 200 | .enable_pin = AT91_PIN_PD15, |
199 | .parts = ek_nand_partition, | 201 | .parts = ek_nand_partition, |
@@ -245,9 +247,9 @@ static void __init ek_add_device_nand(void) | |||
245 | 247 | ||
246 | /* configure chip-select 3 (NAND) */ | 248 | /* configure chip-select 3 (NAND) */ |
247 | if (machine_is_usb_a9g20()) | 249 | if (machine_is_usb_a9g20()) |
248 | sam9_smc_configure(3, &usb_a9g20_nand_smc_config); | 250 | sam9_smc_configure(0, 3, &usb_a9g20_nand_smc_config); |
249 | else | 251 | else |
250 | sam9_smc_configure(3, &usb_a9260_nand_smc_config); | 252 | sam9_smc_configure(0, 3, &usb_a9260_nand_smc_config); |
251 | 253 | ||
252 | at91_add_device_nand(&ek_nand_data); | 254 | at91_add_device_nand(&ek_nand_data); |
253 | } | 255 | } |
@@ -344,7 +346,7 @@ static void __init ek_board_init(void) | |||
344 | /* I2C */ | 346 | /* I2C */ |
345 | at91_add_device_i2c(NULL, 0); | 347 | at91_add_device_i2c(NULL, 0); |
346 | /* shutdown controller, wakeup button (5 msec low) */ | 348 | /* shutdown controller, wakeup button (5 msec low) */ |
347 | at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | 349 | at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) |
348 | | AT91_SHDW_WKMODE0_LOW | 350 | | AT91_SHDW_WKMODE0_LOW |
349 | | AT91_SHDW_RTTWKEN); | 351 | | AT91_SHDW_RTTWKEN); |
350 | } | 352 | } |
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index 12a3f955162b..bbd553e1cd93 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c | |||
@@ -110,7 +110,7 @@ static struct gpio_led yl9200_leds[] = { | |||
110 | /* | 110 | /* |
111 | * Ethernet | 111 | * Ethernet |
112 | */ | 112 | */ |
113 | static struct at91_eth_data __initdata yl9200_eth_data = { | 113 | static struct macb_platform_data __initdata yl9200_eth_data = { |
114 | .phy_irq_pin = AT91_PIN_PB28, | 114 | .phy_irq_pin = AT91_PIN_PB28, |
115 | .is_rmii = 1, | 115 | .is_rmii = 1, |
116 | }; | 116 | }; |
@@ -120,6 +120,8 @@ static struct at91_eth_data __initdata yl9200_eth_data = { | |||
120 | */ | 120 | */ |
121 | static struct at91_usbh_data __initdata yl9200_usbh_data = { | 121 | static struct at91_usbh_data __initdata yl9200_usbh_data = { |
122 | .ports = 1, /* PQFP version of AT91RM9200 */ | 122 | .ports = 1, /* PQFP version of AT91RM9200 */ |
123 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
124 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
123 | }; | 125 | }; |
124 | 126 | ||
125 | /* | 127 | /* |
@@ -137,8 +139,9 @@ static struct at91_udc_data __initdata yl9200_udc_data = { | |||
137 | */ | 139 | */ |
138 | static struct at91_mmc_data __initdata yl9200_mmc_data = { | 140 | static struct at91_mmc_data __initdata yl9200_mmc_data = { |
139 | .det_pin = AT91_PIN_PB9, | 141 | .det_pin = AT91_PIN_PB9, |
140 | // .wp_pin = ... not connected | ||
141 | .wire4 = 1, | 142 | .wire4 = 1, |
143 | .wp_pin = -EINVAL, | ||
144 | .vcc_pin = -EINVAL, | ||
142 | }; | 145 | }; |
143 | 146 | ||
144 | /* | 147 | /* |
@@ -175,7 +178,7 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = { | |||
175 | static struct atmel_nand_data __initdata yl9200_nand_data = { | 178 | static struct atmel_nand_data __initdata yl9200_nand_data = { |
176 | .ale = 6, | 179 | .ale = 6, |
177 | .cle = 7, | 180 | .cle = 7, |
178 | // .det_pin = ... not connected | 181 | .det_pin = -EINVAL, |
179 | .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ | 182 | .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ |
180 | .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ | 183 | .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ |
181 | .parts = yl9200_nand_partition, | 184 | .parts = yl9200_nand_partition, |
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 938b34f57741..4866b8180d66 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -29,6 +29,7 @@ extern void __init at91_aic_init(unsigned int priority[]); | |||
29 | /* Timer */ | 29 | /* Timer */ |
30 | struct sys_timer; | 30 | struct sys_timer; |
31 | extern struct sys_timer at91rm9200_timer; | 31 | extern struct sys_timer at91rm9200_timer; |
32 | extern void at91sam926x_ioremap_pit(u32 addr); | ||
32 | extern struct sys_timer at91sam926x_timer; | 33 | extern struct sys_timer at91sam926x_timer; |
33 | extern struct sys_timer at91x40_timer; | 34 | extern struct sys_timer at91x40_timer; |
34 | 35 | ||
@@ -57,7 +58,10 @@ extern void at91_irq_suspend(void); | |||
57 | extern void at91_irq_resume(void); | 58 | extern void at91_irq_resume(void); |
58 | 59 | ||
59 | /* reset */ | 60 | /* reset */ |
60 | extern void at91sam9_alt_reset(void); | 61 | extern void at91sam9_alt_restart(char, const char *); |
62 | |||
63 | /* shutdown */ | ||
64 | extern void at91_ioremap_shdwc(u32 base_addr); | ||
61 | 65 | ||
62 | /* GPIO */ | 66 | /* GPIO */ |
63 | #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ | 67 | #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ |
@@ -65,11 +69,9 @@ extern void at91sam9_alt_reset(void); | |||
65 | 69 | ||
66 | struct at91_gpio_bank { | 70 | struct at91_gpio_bank { |
67 | unsigned short id; /* peripheral ID */ | 71 | unsigned short id; /* peripheral ID */ |
68 | unsigned long offset; /* offset from system peripheral base */ | 72 | unsigned long regbase; /* offset from system peripheral base */ |
69 | struct clk *clock; /* associated clock */ | ||
70 | }; | 73 | }; |
71 | extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); | 74 | extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); |
72 | extern void __init at91_gpio_irq_setup(void); | 75 | extern void __init at91_gpio_irq_setup(void); |
73 | 76 | ||
74 | extern void (*at91_arch_reset)(void); | ||
75 | extern int at91_extern_irq; | 77 | extern int at91_extern_irq; |
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 224e9e2f8674..74d6783eeabb 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c | |||
@@ -29,8 +29,9 @@ | |||
29 | struct at91_gpio_chip { | 29 | struct at91_gpio_chip { |
30 | struct gpio_chip chip; | 30 | struct gpio_chip chip; |
31 | struct at91_gpio_chip *next; /* Bank sharing same clock */ | 31 | struct at91_gpio_chip *next; /* Bank sharing same clock */ |
32 | struct at91_gpio_bank *bank; /* Bank definition */ | 32 | int id; /* ID of register bank */ |
33 | void __iomem *regbase; /* Base of register bank */ | 33 | void __iomem *regbase; /* Base of register bank */ |
34 | struct clk *clock; /* associated clock */ | ||
34 | }; | 35 | }; |
35 | 36 | ||
36 | #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) | 37 | #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) |
@@ -58,18 +59,17 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip, | |||
58 | } | 59 | } |
59 | 60 | ||
60 | static struct at91_gpio_chip gpio_chip[] = { | 61 | static struct at91_gpio_chip gpio_chip[] = { |
61 | AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), | 62 | AT91_GPIO_CHIP("pioA", 0x00, 32), |
62 | AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), | 63 | AT91_GPIO_CHIP("pioB", 0x20, 32), |
63 | AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), | 64 | AT91_GPIO_CHIP("pioC", 0x40, 32), |
64 | AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), | 65 | AT91_GPIO_CHIP("pioD", 0x60, 32), |
65 | AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), | 66 | AT91_GPIO_CHIP("pioE", 0x80, 32), |
66 | }; | 67 | }; |
67 | 68 | ||
68 | static int gpio_banks; | 69 | static int gpio_banks; |
69 | 70 | ||
70 | static inline void __iomem *pin_to_controller(unsigned pin) | 71 | static inline void __iomem *pin_to_controller(unsigned pin) |
71 | { | 72 | { |
72 | pin -= PIN_BASE; | ||
73 | pin /= 32; | 73 | pin /= 32; |
74 | if (likely(pin < gpio_banks)) | 74 | if (likely(pin < gpio_banks)) |
75 | return gpio_chip[pin].regbase; | 75 | return gpio_chip[pin].regbase; |
@@ -79,7 +79,6 @@ static inline void __iomem *pin_to_controller(unsigned pin) | |||
79 | 79 | ||
80 | static inline unsigned pin_to_mask(unsigned pin) | 80 | static inline unsigned pin_to_mask(unsigned pin) |
81 | { | 81 | { |
82 | pin -= PIN_BASE; | ||
83 | return 1 << (pin % 32); | 82 | return 1 << (pin % 32); |
84 | } | 83 | } |
85 | 84 | ||
@@ -274,8 +273,9 @@ static u32 backups[MAX_GPIO_BANKS]; | |||
274 | 273 | ||
275 | static int gpio_irq_set_wake(struct irq_data *d, unsigned state) | 274 | static int gpio_irq_set_wake(struct irq_data *d, unsigned state) |
276 | { | 275 | { |
277 | unsigned mask = pin_to_mask(d->irq); | 276 | unsigned pin = irq_to_gpio(d->irq); |
278 | unsigned bank = (d->irq - PIN_BASE) / 32; | 277 | unsigned mask = pin_to_mask(pin); |
278 | unsigned bank = pin / 32; | ||
279 | 279 | ||
280 | if (unlikely(bank >= MAX_GPIO_BANKS)) | 280 | if (unlikely(bank >= MAX_GPIO_BANKS)) |
281 | return -EINVAL; | 281 | return -EINVAL; |
@@ -285,7 +285,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state) | |||
285 | else | 285 | else |
286 | wakeups[bank] &= ~mask; | 286 | wakeups[bank] &= ~mask; |
287 | 287 | ||
288 | irq_set_irq_wake(gpio_chip[bank].bank->id, state); | 288 | irq_set_irq_wake(gpio_chip[bank].id, state); |
289 | 289 | ||
290 | return 0; | 290 | return 0; |
291 | } | 291 | } |
@@ -302,7 +302,7 @@ void at91_gpio_suspend(void) | |||
302 | __raw_writel(wakeups[i], pio + PIO_IER); | 302 | __raw_writel(wakeups[i], pio + PIO_IER); |
303 | 303 | ||
304 | if (!wakeups[i]) | 304 | if (!wakeups[i]) |
305 | clk_disable(gpio_chip[i].bank->clock); | 305 | clk_disable(gpio_chip[i].clock); |
306 | else { | 306 | else { |
307 | #ifdef CONFIG_PM_DEBUG | 307 | #ifdef CONFIG_PM_DEBUG |
308 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); | 308 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); |
@@ -319,7 +319,7 @@ void at91_gpio_resume(void) | |||
319 | void __iomem *pio = gpio_chip[i].regbase; | 319 | void __iomem *pio = gpio_chip[i].regbase; |
320 | 320 | ||
321 | if (!wakeups[i]) | 321 | if (!wakeups[i]) |
322 | clk_enable(gpio_chip[i].bank->clock); | 322 | clk_enable(gpio_chip[i].clock); |
323 | 323 | ||
324 | __raw_writel(wakeups[i], pio + PIO_IDR); | 324 | __raw_writel(wakeups[i], pio + PIO_IDR); |
325 | __raw_writel(backups[i], pio + PIO_IER); | 325 | __raw_writel(backups[i], pio + PIO_IER); |
@@ -344,8 +344,9 @@ void at91_gpio_resume(void) | |||
344 | 344 | ||
345 | static void gpio_irq_mask(struct irq_data *d) | 345 | static void gpio_irq_mask(struct irq_data *d) |
346 | { | 346 | { |
347 | void __iomem *pio = pin_to_controller(d->irq); | 347 | unsigned pin = irq_to_gpio(d->irq); |
348 | unsigned mask = pin_to_mask(d->irq); | 348 | void __iomem *pio = pin_to_controller(pin); |
349 | unsigned mask = pin_to_mask(pin); | ||
349 | 350 | ||
350 | if (pio) | 351 | if (pio) |
351 | __raw_writel(mask, pio + PIO_IDR); | 352 | __raw_writel(mask, pio + PIO_IDR); |
@@ -353,8 +354,9 @@ static void gpio_irq_mask(struct irq_data *d) | |||
353 | 354 | ||
354 | static void gpio_irq_unmask(struct irq_data *d) | 355 | static void gpio_irq_unmask(struct irq_data *d) |
355 | { | 356 | { |
356 | void __iomem *pio = pin_to_controller(d->irq); | 357 | unsigned pin = irq_to_gpio(d->irq); |
357 | unsigned mask = pin_to_mask(d->irq); | 358 | void __iomem *pio = pin_to_controller(pin); |
359 | unsigned mask = pin_to_mask(pin); | ||
358 | 360 | ||
359 | if (pio) | 361 | if (pio) |
360 | __raw_writel(mask, pio + PIO_IER); | 362 | __raw_writel(mask, pio + PIO_IER); |
@@ -382,7 +384,7 @@ static struct irq_chip gpio_irqchip = { | |||
382 | 384 | ||
383 | static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | 385 | static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) |
384 | { | 386 | { |
385 | unsigned pin; | 387 | unsigned irq_pin; |
386 | struct irq_data *idata = irq_desc_get_irq_data(desc); | 388 | struct irq_data *idata = irq_desc_get_irq_data(desc); |
387 | struct irq_chip *chip = irq_data_get_irq_chip(idata); | 389 | struct irq_chip *chip = irq_data_get_irq_chip(idata); |
388 | struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); | 390 | struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); |
@@ -405,12 +407,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
405 | continue; | 407 | continue; |
406 | } | 408 | } |
407 | 409 | ||
408 | pin = at91_gpio->chip.base; | 410 | irq_pin = gpio_to_irq(at91_gpio->chip.base); |
409 | 411 | ||
410 | while (isr) { | 412 | while (isr) { |
411 | if (isr & 1) | 413 | if (isr & 1) |
412 | generic_handle_irq(pin); | 414 | generic_handle_irq(irq_pin); |
413 | pin++; | 415 | irq_pin++; |
414 | isr >>= 1; | 416 | isr >>= 1; |
415 | } | 417 | } |
416 | } | 418 | } |
@@ -438,7 +440,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused) | |||
438 | seq_printf(s, "%i:\t", j); | 440 | seq_printf(s, "%i:\t", j); |
439 | 441 | ||
440 | for (bank = 0; bank < gpio_banks; bank++) { | 442 | for (bank = 0; bank < gpio_banks; bank++) { |
441 | unsigned pin = PIN_BASE + (32 * bank) + j; | 443 | unsigned pin = (32 * bank) + j; |
442 | void __iomem *pio = pin_to_controller(pin); | 444 | void __iomem *pio = pin_to_controller(pin); |
443 | unsigned mask = pin_to_mask(pin); | 445 | unsigned mask = pin_to_mask(pin); |
444 | 446 | ||
@@ -491,27 +493,28 @@ static struct lock_class_key gpio_lock_class; | |||
491 | */ | 493 | */ |
492 | void __init at91_gpio_irq_setup(void) | 494 | void __init at91_gpio_irq_setup(void) |
493 | { | 495 | { |
494 | unsigned pioc, pin; | 496 | unsigned pioc, irq = gpio_to_irq(0); |
495 | struct at91_gpio_chip *this, *prev; | 497 | struct at91_gpio_chip *this, *prev; |
496 | 498 | ||
497 | for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; | 499 | for (pioc = 0, this = gpio_chip, prev = NULL; |
498 | pioc++ < gpio_banks; | 500 | pioc++ < gpio_banks; |
499 | prev = this, this++) { | 501 | prev = this, this++) { |
500 | unsigned id = this->bank->id; | 502 | unsigned id = this->id; |
501 | unsigned i; | 503 | unsigned i; |
502 | 504 | ||
503 | __raw_writel(~0, this->regbase + PIO_IDR); | 505 | __raw_writel(~0, this->regbase + PIO_IDR); |
504 | 506 | ||
505 | for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { | 507 | for (i = 0, irq = gpio_to_irq(this->chip.base); i < 32; |
506 | irq_set_lockdep_class(pin, &gpio_lock_class); | 508 | i++, irq++) { |
509 | irq_set_lockdep_class(irq, &gpio_lock_class); | ||
507 | 510 | ||
508 | /* | 511 | /* |
509 | * Can use the "simple" and not "edge" handler since it's | 512 | * Can use the "simple" and not "edge" handler since it's |
510 | * shorter, and the AIC handles interrupts sanely. | 513 | * shorter, and the AIC handles interrupts sanely. |
511 | */ | 514 | */ |
512 | irq_set_chip_and_handler(pin, &gpio_irqchip, | 515 | irq_set_chip_and_handler(irq, &gpio_irqchip, |
513 | handle_simple_irq); | 516 | handle_simple_irq); |
514 | set_irq_flags(pin, IRQF_VALID); | 517 | set_irq_flags(irq, IRQF_VALID); |
515 | } | 518 | } |
516 | 519 | ||
517 | /* The toplevel handler handles one bank of GPIOs, except | 520 | /* The toplevel handler handles one bank of GPIOs, except |
@@ -524,7 +527,7 @@ void __init at91_gpio_irq_setup(void) | |||
524 | irq_set_chip_data(id, this); | 527 | irq_set_chip_data(id, this); |
525 | irq_set_chained_handler(id, gpio_irq_handler); | 528 | irq_set_chained_handler(id, gpio_irq_handler); |
526 | } | 529 | } |
527 | pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); | 530 | pr_info("AT91: %d gpio irqs in %d banks\n", irq - gpio_to_irq(0), gpio_banks); |
528 | } | 531 | } |
529 | 532 | ||
530 | /* gpiolib support */ | 533 | /* gpiolib support */ |
@@ -612,16 +615,26 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) | |||
612 | for (i = 0; i < nr_banks; i++) { | 615 | for (i = 0; i < nr_banks; i++) { |
613 | at91_gpio = &gpio_chip[i]; | 616 | at91_gpio = &gpio_chip[i]; |
614 | 617 | ||
615 | at91_gpio->bank = &data[i]; | 618 | at91_gpio->id = data[i].id; |
616 | at91_gpio->chip.base = PIN_BASE + i * 32; | 619 | at91_gpio->chip.base = i * 32; |
617 | at91_gpio->regbase = at91_gpio->bank->offset + | 620 | |
618 | (void __iomem *)AT91_VA_BASE_SYS; | 621 | at91_gpio->regbase = ioremap(data[i].regbase, 512); |
622 | if (!at91_gpio->regbase) { | ||
623 | pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i); | ||
624 | continue; | ||
625 | } | ||
626 | |||
627 | at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label); | ||
628 | if (!at91_gpio->clock) { | ||
629 | pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i); | ||
630 | continue; | ||
631 | } | ||
619 | 632 | ||
620 | /* enable PIO controller's clock */ | 633 | /* enable PIO controller's clock */ |
621 | clk_enable(at91_gpio->bank->clock); | 634 | clk_enable(at91_gpio->clock); |
622 | 635 | ||
623 | /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ | 636 | /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ |
624 | if (last && last->bank->id == at91_gpio->bank->id) | 637 | if (last && last->id == at91_gpio->id) |
625 | last->next = at91_gpio; | 638 | last->next = at91_gpio; |
626 | last = at91_gpio; | 639 | last = at91_gpio; |
627 | 640 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h index 03566799d3be..3045781c473f 100644 --- a/arch/arm/mach-at91/include/mach/at91_aic.h +++ b/arch/arm/mach-at91/include/mach/at91_aic.h | |||
@@ -16,7 +16,19 @@ | |||
16 | #ifndef AT91_AIC_H | 16 | #ifndef AT91_AIC_H |
17 | #define AT91_AIC_H | 17 | #define AT91_AIC_H |
18 | 18 | ||
19 | #define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ | 19 | #ifndef __ASSEMBLY__ |
20 | extern void __iomem *at91_aic_base; | ||
21 | |||
22 | #define at91_aic_read(field) \ | ||
23 | __raw_readl(at91_aic_base + field) | ||
24 | |||
25 | #define at91_aic_write(field, value) \ | ||
26 | __raw_writel(value, at91_aic_base + field); | ||
27 | #else | ||
28 | .extern at91_aic_base | ||
29 | #endif | ||
30 | |||
31 | #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ | ||
20 | #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ | 32 | #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ |
21 | #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ | 33 | #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ |
22 | #define AT91_AIC_SRCTYPE_LOW (0 << 5) | 34 | #define AT91_AIC_SRCTYPE_LOW (0 << 5) |
@@ -24,30 +36,30 @@ | |||
24 | #define AT91_AIC_SRCTYPE_HIGH (2 << 5) | 36 | #define AT91_AIC_SRCTYPE_HIGH (2 << 5) |
25 | #define AT91_AIC_SRCTYPE_RISING (3 << 5) | 37 | #define AT91_AIC_SRCTYPE_RISING (3 << 5) |
26 | 38 | ||
27 | #define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ | 39 | #define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ |
28 | #define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ | 40 | #define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ |
29 | #define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ | 41 | #define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ |
30 | #define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ | 42 | #define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ |
31 | #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ | 43 | #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ |
32 | 44 | ||
33 | #define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ | 45 | #define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ |
34 | #define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ | 46 | #define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ |
35 | #define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ | 47 | #define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ |
36 | #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ | 48 | #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ |
37 | #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ | 49 | #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ |
38 | 50 | ||
39 | #define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ | 51 | #define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ |
40 | #define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ | 52 | #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ |
41 | #define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ | 53 | #define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ |
42 | #define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ | 54 | #define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ |
43 | #define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ | 55 | #define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ |
44 | #define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ | 56 | #define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ |
45 | #define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ | 57 | #define AT91_AIC_DCR 0x138 /* Debug Control Register */ |
46 | #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ | 58 | #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ |
47 | #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ | 59 | #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ |
48 | 60 | ||
49 | #define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ | 61 | #define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ |
50 | #define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ | 62 | #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ |
51 | #define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ | 63 | #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ |
52 | 64 | ||
53 | #endif | 65 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h index dbfe455a4c41..2aa0c5e13495 100644 --- a/arch/arm/mach-at91/include/mach/at91_dbgu.h +++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #define dbgu_readl(dbgu, field) \ | 19 | #define dbgu_readl(dbgu, field) \ |
20 | __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) | 20 | __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) |
21 | 21 | ||
22 | #ifdef AT91_DBGU | 22 | #if !defined(CONFIG_ARCH_AT91X40) |
23 | #define AT91_DBGU_CR (0x00) /* Control Register */ | 23 | #define AT91_DBGU_CR (0x00) /* Control Register */ |
24 | #define AT91_DBGU_MR (0x04) /* Mode Register */ | 24 | #define AT91_DBGU_MR (0x04) /* Mode Register */ |
25 | #define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ | 25 | #define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ |
diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h index 974d0bd05b5b..d1f80ad7f4d4 100644 --- a/arch/arm/mach-at91/include/mach/at91_pit.h +++ b/arch/arm/mach-at91/include/mach/at91_pit.h | |||
@@ -16,16 +16,16 @@ | |||
16 | #ifndef AT91_PIT_H | 16 | #ifndef AT91_PIT_H |
17 | #define AT91_PIT_H | 17 | #define AT91_PIT_H |
18 | 18 | ||
19 | #define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ | 19 | #define AT91_PIT_MR 0x00 /* Mode Register */ |
20 | #define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ | 20 | #define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ |
21 | #define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ | 21 | #define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ |
22 | #define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ | 22 | #define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ |
23 | 23 | ||
24 | #define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ | 24 | #define AT91_PIT_SR 0x04 /* Status Register */ |
25 | #define AT91_PIT_PITS (1 << 0) /* Timer Status */ | 25 | #define AT91_PIT_PITS (1 << 0) /* Timer Status */ |
26 | 26 | ||
27 | #define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ | 27 | #define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */ |
28 | #define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ | 28 | #define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */ |
29 | #define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ | 29 | #define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ |
30 | #define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ | 30 | #define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ |
31 | 31 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h index e56f4701a3e5..da1945e5f714 100644 --- a/arch/arm/mach-at91/include/mach/at91_rtc.h +++ b/arch/arm/mach-at91/include/mach/at91_rtc.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #ifndef AT91_RTC_H | 16 | #ifndef AT91_RTC_H |
17 | #define AT91_RTC_H | 17 | #define AT91_RTC_H |
18 | 18 | ||
19 | #define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ | 19 | #define AT91_RTC_CR 0x00 /* Control Register */ |
20 | #define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ | 20 | #define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ |
21 | #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ | 21 | #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ |
22 | #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ | 22 | #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ |
@@ -29,44 +29,44 @@ | |||
29 | #define AT91_RTC_CALEVSEL_MONTH (1 << 16) | 29 | #define AT91_RTC_CALEVSEL_MONTH (1 << 16) |
30 | #define AT91_RTC_CALEVSEL_YEAR (2 << 16) | 30 | #define AT91_RTC_CALEVSEL_YEAR (2 << 16) |
31 | 31 | ||
32 | #define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ | 32 | #define AT91_RTC_MR 0x04 /* Mode Register */ |
33 | #define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ | 33 | #define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ |
34 | 34 | ||
35 | #define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ | 35 | #define AT91_RTC_TIMR 0x08 /* Time Register */ |
36 | #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ | 36 | #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ |
37 | #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ | 37 | #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ |
38 | #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ | 38 | #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ |
39 | #define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ | 39 | #define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ |
40 | 40 | ||
41 | #define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ | 41 | #define AT91_RTC_CALR 0x0c /* Calendar Register */ |
42 | #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ | 42 | #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ |
43 | #define AT91_RTC_YEAR (0xff << 8) /* Current Year */ | 43 | #define AT91_RTC_YEAR (0xff << 8) /* Current Year */ |
44 | #define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ | 44 | #define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ |
45 | #define AT91_RTC_DAY (7 << 21) /* Current Day */ | 45 | #define AT91_RTC_DAY (7 << 21) /* Current Day */ |
46 | #define AT91_RTC_DATE (0x3f << 24) /* Current Date */ | 46 | #define AT91_RTC_DATE (0x3f << 24) /* Current Date */ |
47 | 47 | ||
48 | #define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ | 48 | #define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */ |
49 | #define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ | 49 | #define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ |
50 | #define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ | 50 | #define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ |
51 | #define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ | 51 | #define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ |
52 | 52 | ||
53 | #define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ | 53 | #define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */ |
54 | #define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ | 54 | #define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ |
55 | #define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ | 55 | #define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ |
56 | 56 | ||
57 | #define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ | 57 | #define AT91_RTC_SR 0x18 /* Status Register */ |
58 | #define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ | 58 | #define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ |
59 | #define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ | 59 | #define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ |
60 | #define AT91_RTC_SECEV (1 << 2) /* Second Event */ | 60 | #define AT91_RTC_SECEV (1 << 2) /* Second Event */ |
61 | #define AT91_RTC_TIMEV (1 << 3) /* Time Event */ | 61 | #define AT91_RTC_TIMEV (1 << 3) /* Time Event */ |
62 | #define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ | 62 | #define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ |
63 | 63 | ||
64 | #define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ | 64 | #define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */ |
65 | #define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ | 65 | #define AT91_RTC_IER 0x20 /* Interrupt Enable Register */ |
66 | #define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ | 66 | #define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ |
67 | #define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ | 67 | #define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ |
68 | 68 | ||
69 | #define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ | 69 | #define AT91_RTC_VER 0x2c /* Valid Entry Register */ |
70 | #define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ | 70 | #define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ |
71 | #define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ | 71 | #define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ |
72 | #define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ | 72 | #define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ |
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h index c4ce07e8a8fa..1d4fe822c77a 100644 --- a/arch/arm/mach-at91/include/mach/at91_shdwc.h +++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h | |||
@@ -16,11 +16,21 @@ | |||
16 | #ifndef AT91_SHDWC_H | 16 | #ifndef AT91_SHDWC_H |
17 | #define AT91_SHDWC_H | 17 | #define AT91_SHDWC_H |
18 | 18 | ||
19 | #define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ | 19 | #ifndef __ASSEMBLY__ |
20 | extern void __iomem *at91_shdwc_base; | ||
21 | |||
22 | #define at91_shdwc_read(field) \ | ||
23 | __raw_readl(at91_shdwc_base + field) | ||
24 | |||
25 | #define at91_shdwc_write(field, value) \ | ||
26 | __raw_writel(value, at91_shdwc_base + field); | ||
27 | #endif | ||
28 | |||
29 | #define AT91_SHDW_CR 0x00 /* Shut Down Control Register */ | ||
20 | #define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ | 30 | #define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ |
21 | #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ | 31 | #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ |
22 | 32 | ||
23 | #define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ | 33 | #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */ |
24 | #define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ | 34 | #define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ |
25 | #define AT91_SHDW_WKMODE0_NONE 0 | 35 | #define AT91_SHDW_WKMODE0_NONE 0 |
26 | #define AT91_SHDW_WKMODE0_HIGH 1 | 36 | #define AT91_SHDW_WKMODE0_HIGH 1 |
@@ -30,7 +40,7 @@ | |||
30 | #define AT91_SHDW_CPTWK0_(x) ((x) << 4) | 40 | #define AT91_SHDW_CPTWK0_(x) ((x) << 4) |
31 | #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ | 41 | #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ |
32 | 42 | ||
33 | #define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ | 43 | #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */ |
34 | #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ | 44 | #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ |
35 | #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ | 45 | #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ |
36 | #define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ | 46 | #define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ |
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h index c5df1e8f1955..4c0e2f6011d7 100644 --- a/arch/arm/mach-at91/include/mach/at91cap9.h +++ b/arch/arm/mach-at91/include/mach/at91cap9.h | |||
@@ -79,29 +79,28 @@ | |||
79 | /* | 79 | /* |
80 | * System Peripherals (offset from AT91_BASE_SYS) | 80 | * System Peripherals (offset from AT91_BASE_SYS) |
81 | */ | 81 | */ |
82 | #define AT91_ECC (0xffffe200 - AT91_BASE_SYS) | ||
83 | #define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) | 82 | #define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) |
84 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) | 83 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) |
85 | #define AT91_SMC (0xffffe800 - AT91_BASE_SYS) | ||
86 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) | 84 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) |
87 | #define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS) | ||
88 | #define AT91_DMA (0xffffec00 - AT91_BASE_SYS) | ||
89 | #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) | ||
90 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
91 | #define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) | ||
92 | #define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) | ||
93 | #define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) | ||
94 | #define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) | ||
95 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 85 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
96 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 86 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
97 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
98 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
99 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
100 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
101 | #define AT91_GPBR (cpu_is_at91cap9_revB() ? \ | 87 | #define AT91_GPBR (cpu_is_at91cap9_revB() ? \ |
102 | (0xfffffd50 - AT91_BASE_SYS) : \ | 88 | (0xfffffd50 - AT91_BASE_SYS) : \ |
103 | (0xfffffd60 - AT91_BASE_SYS)) | 89 | (0xfffffd60 - AT91_BASE_SYS)) |
104 | 90 | ||
91 | #define AT91CAP9_BASE_ECC 0xffffe200 | ||
92 | #define AT91CAP9_BASE_DMA 0xffffec00 | ||
93 | #define AT91CAP9_BASE_SMC 0xffffe800 | ||
94 | #define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1 | ||
95 | #define AT91CAP9_BASE_PIOA 0xfffff200 | ||
96 | #define AT91CAP9_BASE_PIOB 0xfffff400 | ||
97 | #define AT91CAP9_BASE_PIOC 0xfffff600 | ||
98 | #define AT91CAP9_BASE_PIOD 0xfffff800 | ||
99 | #define AT91CAP9_BASE_SHDWC 0xfffffd10 | ||
100 | #define AT91CAP9_BASE_RTT 0xfffffd20 | ||
101 | #define AT91CAP9_BASE_PIT 0xfffffd30 | ||
102 | #define AT91CAP9_BASE_WDT 0xfffffd40 | ||
103 | |||
105 | #define AT91_USART0 AT91CAP9_BASE_US0 | 104 | #define AT91_USART0 AT91CAP9_BASE_US0 |
106 | #define AT91_USART1 AT91CAP9_BASE_US1 | 105 | #define AT91_USART1 AT91CAP9_BASE_US1 |
107 | #define AT91_USART2 AT91CAP9_BASE_US2 | 106 | #define AT91_USART2 AT91CAP9_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h index e4037b500302..bacb51141819 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200.h +++ b/arch/arm/mach-at91/include/mach/at91rm9200.h | |||
@@ -79,17 +79,17 @@ | |||
79 | /* | 79 | /* |
80 | * System Peripherals (offset from AT91_BASE_SYS) | 80 | * System Peripherals (offset from AT91_BASE_SYS) |
81 | */ | 81 | */ |
82 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ | ||
83 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */ | ||
84 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */ | ||
85 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */ | ||
86 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */ | ||
87 | #define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */ | ||
88 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ | 82 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ |
89 | #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ | 83 | #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ |
90 | #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ | ||
91 | #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ | 84 | #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ |
92 | 85 | ||
86 | #define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */ | ||
87 | #define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */ | ||
88 | #define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */ | ||
89 | #define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */ | ||
90 | #define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */ | ||
91 | #define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */ | ||
92 | |||
93 | #define AT91_USART0 AT91RM9200_BASE_US0 | 93 | #define AT91_USART0 AT91RM9200_BASE_US0 |
94 | #define AT91_USART1 AT91RM9200_BASE_US1 | 94 | #define AT91_USART1 AT91RM9200_BASE_US1 |
95 | #define AT91_USART2 AT91RM9200_BASE_US2 | 95 | #define AT91_USART2 AT91RM9200_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h index 9a791165913f..f937c476bb67 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h | |||
@@ -80,24 +80,23 @@ | |||
80 | /* | 80 | /* |
81 | * System Peripherals (offset from AT91_BASE_SYS) | 81 | * System Peripherals (offset from AT91_BASE_SYS) |
82 | */ | 82 | */ |
83 | #define AT91_ECC (0xffffe800 - AT91_BASE_SYS) | ||
84 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | 83 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) |
85 | #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | ||
86 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | 84 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) |
87 | #define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) | ||
88 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
89 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | ||
90 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | ||
91 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | ||
92 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | ||
93 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 85 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
94 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 86 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
95 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
96 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
97 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
98 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
99 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) | 87 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) |
100 | 88 | ||
89 | #define AT91SAM9260_BASE_ECC 0xffffe800 | ||
90 | #define AT91SAM9260_BASE_SMC 0xffffec00 | ||
91 | #define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0 | ||
92 | #define AT91SAM9260_BASE_PIOA 0xfffff400 | ||
93 | #define AT91SAM9260_BASE_PIOB 0xfffff600 | ||
94 | #define AT91SAM9260_BASE_PIOC 0xfffff800 | ||
95 | #define AT91SAM9260_BASE_SHDWC 0xfffffd10 | ||
96 | #define AT91SAM9260_BASE_RTT 0xfffffd20 | ||
97 | #define AT91SAM9260_BASE_PIT 0xfffffd30 | ||
98 | #define AT91SAM9260_BASE_WDT 0xfffffd40 | ||
99 | |||
101 | #define AT91_USART0 AT91SAM9260_BASE_US0 | 100 | #define AT91_USART0 AT91SAM9260_BASE_US0 |
102 | #define AT91_USART1 AT91SAM9260_BASE_US1 | 101 | #define AT91_USART1 AT91SAM9260_BASE_US1 |
103 | #define AT91_USART2 AT91SAM9260_BASE_US2 | 102 | #define AT91_USART2 AT91SAM9260_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h index ce596204cefa..175604e261be 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261.h | |||
@@ -66,21 +66,21 @@ | |||
66 | * System Peripherals (offset from AT91_BASE_SYS) | 66 | * System Peripherals (offset from AT91_BASE_SYS) |
67 | */ | 67 | */ |
68 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | 68 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) |
69 | #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | ||
70 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | 69 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) |
71 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
72 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | ||
73 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | ||
74 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | ||
75 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | ||
76 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 70 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
77 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 71 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
78 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
79 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
80 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
81 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
82 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) | 72 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) |
83 | 73 | ||
74 | #define AT91SAM9261_BASE_SMC 0xffffec00 | ||
75 | #define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0 | ||
76 | #define AT91SAM9261_BASE_PIOA 0xfffff400 | ||
77 | #define AT91SAM9261_BASE_PIOB 0xfffff600 | ||
78 | #define AT91SAM9261_BASE_PIOC 0xfffff800 | ||
79 | #define AT91SAM9261_BASE_SHDWC 0xfffffd10 | ||
80 | #define AT91SAM9261_BASE_RTT 0xfffffd20 | ||
81 | #define AT91SAM9261_BASE_PIT 0xfffffd30 | ||
82 | #define AT91SAM9261_BASE_WDT 0xfffffd40 | ||
83 | |||
84 | #define AT91_USART0 AT91SAM9261_BASE_US0 | 84 | #define AT91_USART0 AT91SAM9261_BASE_US0 |
85 | #define AT91_USART1 AT91SAM9261_BASE_US1 | 85 | #define AT91_USART1 AT91SAM9261_BASE_US1 |
86 | #define AT91_USART2 AT91SAM9261_BASE_US2 | 86 | #define AT91_USART2 AT91SAM9261_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h index f1b92961a2b1..80c915002d83 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9263.h +++ b/arch/arm/mach-at91/include/mach/at91sam9263.h | |||
@@ -74,30 +74,29 @@ | |||
74 | /* | 74 | /* |
75 | * System Peripherals (offset from AT91_BASE_SYS) | 75 | * System Peripherals (offset from AT91_BASE_SYS) |
76 | */ | 76 | */ |
77 | #define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS) | ||
78 | #define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) | 77 | #define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) |
79 | #define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS) | ||
80 | #define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS) | ||
81 | #define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) | 78 | #define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) |
82 | #define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS) | ||
83 | #define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) | 79 | #define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) |
84 | #define AT91_CCFG (0xffffed10 - AT91_BASE_SYS) | ||
85 | #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) | ||
86 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
87 | #define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) | ||
88 | #define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) | ||
89 | #define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) | ||
90 | #define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) | ||
91 | #define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) | ||
92 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 80 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
93 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 81 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
94 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
95 | #define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS) | ||
96 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
97 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
98 | #define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) | ||
99 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 82 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
100 | 83 | ||
84 | #define AT91SAM9263_BASE_ECC0 0xffffe000 | ||
85 | #define AT91SAM9263_BASE_SMC0 0xffffe400 | ||
86 | #define AT91SAM9263_BASE_ECC1 0xffffe600 | ||
87 | #define AT91SAM9263_BASE_SMC1 0xffffea00 | ||
88 | #define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1 | ||
89 | #define AT91SAM9263_BASE_PIOA 0xfffff200 | ||
90 | #define AT91SAM9263_BASE_PIOB 0xfffff400 | ||
91 | #define AT91SAM9263_BASE_PIOC 0xfffff600 | ||
92 | #define AT91SAM9263_BASE_PIOD 0xfffff800 | ||
93 | #define AT91SAM9263_BASE_PIOE 0xfffffa00 | ||
94 | #define AT91SAM9263_BASE_SHDWC 0xfffffd10 | ||
95 | #define AT91SAM9263_BASE_RTT0 0xfffffd20 | ||
96 | #define AT91SAM9263_BASE_PIT 0xfffffd30 | ||
97 | #define AT91SAM9263_BASE_WDT 0xfffffd40 | ||
98 | #define AT91SAM9263_BASE_RTT1 0xfffffd50 | ||
99 | |||
101 | #define AT91_USART0 AT91SAM9263_BASE_US0 | 100 | #define AT91_USART0 AT91SAM9263_BASE_US0 |
102 | #define AT91_USART1 AT91SAM9263_BASE_US1 | 101 | #define AT91_USART1 AT91SAM9263_BASE_US1 |
103 | #define AT91_USART2 AT91SAM9263_BASE_US2 | 102 | #define AT91_USART2 AT91SAM9263_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h index 57de6207e57e..eb18a70fa647 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h | |||
@@ -16,7 +16,9 @@ | |||
16 | #ifndef AT91SAM9_SMC_H | 16 | #ifndef AT91SAM9_SMC_H |
17 | #define AT91SAM9_SMC_H | 17 | #define AT91SAM9_SMC_H |
18 | 18 | ||
19 | #define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ | 19 | #include <mach/cpu.h> |
20 | |||
21 | #define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */ | ||
20 | #define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ | 22 | #define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ |
21 | #define AT91_SMC_NWESETUP_(x) ((x) << 0) | 23 | #define AT91_SMC_NWESETUP_(x) ((x) << 0) |
22 | #define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ | 24 | #define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ |
@@ -26,7 +28,7 @@ | |||
26 | #define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ | 28 | #define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ |
27 | #define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) | 29 | #define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) |
28 | 30 | ||
29 | #define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ | 31 | #define AT91_SMC_PULSE 0x04 /* Pulse Register for CS n */ |
30 | #define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ | 32 | #define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ |
31 | #define AT91_SMC_NWEPULSE_(x) ((x) << 0) | 33 | #define AT91_SMC_NWEPULSE_(x) ((x) << 0) |
32 | #define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ | 34 | #define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ |
@@ -36,13 +38,13 @@ | |||
36 | #define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ | 38 | #define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ |
37 | #define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) | 39 | #define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) |
38 | 40 | ||
39 | #define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ | 41 | #define AT91_SMC_CYCLE 0x08 /* Cycle Register for CS n */ |
40 | #define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ | 42 | #define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ |
41 | #define AT91_SMC_NWECYCLE_(x) ((x) << 0) | 43 | #define AT91_SMC_NWECYCLE_(x) ((x) << 0) |
42 | #define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ | 44 | #define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ |
43 | #define AT91_SMC_NRDCYCLE_(x) ((x) << 16) | 45 | #define AT91_SMC_NRDCYCLE_(x) ((x) << 16) |
44 | 46 | ||
45 | #define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ | 47 | #define AT91_SMC_MODE 0x0c /* Mode Register for CS n */ |
46 | #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ | 48 | #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ |
47 | #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ | 49 | #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ |
48 | #define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ | 50 | #define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ |
@@ -66,11 +68,4 @@ | |||
66 | #define AT91_SMC_PS_16 (2 << 28) | 68 | #define AT91_SMC_PS_16 (2 << 28) |
67 | #define AT91_SMC_PS_32 (3 << 28) | 69 | #define AT91_SMC_PS_32 (3 << 28) |
68 | 70 | ||
69 | #if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ | ||
70 | #define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ | ||
71 | #define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ | ||
72 | #define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ | ||
73 | #define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ | ||
74 | #endif | ||
75 | |||
76 | #endif | 71 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index 406bb6496805..f0c23c960dec 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h | |||
@@ -86,27 +86,27 @@ | |||
86 | /* | 86 | /* |
87 | * System Peripherals (offset from AT91_BASE_SYS) | 87 | * System Peripherals (offset from AT91_BASE_SYS) |
88 | */ | 88 | */ |
89 | #define AT91_ECC (0xffffe200 - AT91_BASE_SYS) | ||
90 | #define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) | 89 | #define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) |
91 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) | 90 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) |
92 | #define AT91_SMC (0xffffe800 - AT91_BASE_SYS) | ||
93 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) | 91 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) |
94 | #define AT91_DMA (0xffffec00 - AT91_BASE_SYS) | ||
95 | #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) | ||
96 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
97 | #define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) | ||
98 | #define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) | ||
99 | #define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) | ||
100 | #define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) | ||
101 | #define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) | ||
102 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 92 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
103 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 93 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
104 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
105 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
106 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
107 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
108 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 94 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
109 | #define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) | 95 | |
96 | #define AT91SAM9G45_BASE_ECC 0xffffe200 | ||
97 | #define AT91SAM9G45_BASE_DMA 0xffffec00 | ||
98 | #define AT91SAM9G45_BASE_SMC 0xffffe800 | ||
99 | #define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1 | ||
100 | #define AT91SAM9G45_BASE_PIOA 0xfffff200 | ||
101 | #define AT91SAM9G45_BASE_PIOB 0xfffff400 | ||
102 | #define AT91SAM9G45_BASE_PIOC 0xfffff600 | ||
103 | #define AT91SAM9G45_BASE_PIOD 0xfffff800 | ||
104 | #define AT91SAM9G45_BASE_PIOE 0xfffffa00 | ||
105 | #define AT91SAM9G45_BASE_SHDWC 0xfffffd10 | ||
106 | #define AT91SAM9G45_BASE_RTT 0xfffffd20 | ||
107 | #define AT91SAM9G45_BASE_PIT 0xfffffd30 | ||
108 | #define AT91SAM9G45_BASE_WDT 0xfffffd40 | ||
109 | #define AT91SAM9G45_BASE_RTC 0xfffffdb0 | ||
110 | 110 | ||
111 | #define AT91_USART0 AT91SAM9G45_BASE_US0 | 111 | #define AT91_USART0 AT91SAM9G45_BASE_US0 |
112 | #define AT91_USART1 AT91SAM9G45_BASE_US1 | 112 | #define AT91_USART1 AT91SAM9G45_BASE_US1 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index 1aabacd315d4..2bb359e60b97 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h | |||
@@ -69,27 +69,26 @@ | |||
69 | /* | 69 | /* |
70 | * System Peripherals (offset from AT91_BASE_SYS) | 70 | * System Peripherals (offset from AT91_BASE_SYS) |
71 | */ | 71 | */ |
72 | #define AT91_DMA (0xffffe600 - AT91_BASE_SYS) | ||
73 | #define AT91_ECC (0xffffe800 - AT91_BASE_SYS) | ||
74 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | 72 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) |
75 | #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | ||
76 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | 73 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) |
77 | #define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) | ||
78 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
79 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | ||
80 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | ||
81 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | ||
82 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | ||
83 | #define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) | ||
84 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 74 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
85 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 75 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
86 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
87 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
88 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
89 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
90 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) | 76 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) |
91 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 77 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
92 | #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) | 78 | |
79 | #define AT91SAM9RL_BASE_DMA 0xffffe600 | ||
80 | #define AT91SAM9RL_BASE_ECC 0xffffe800 | ||
81 | #define AT91SAM9RL_BASE_SMC 0xffffec00 | ||
82 | #define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0 | ||
83 | #define AT91SAM9RL_BASE_PIOA 0xfffff400 | ||
84 | #define AT91SAM9RL_BASE_PIOB 0xfffff600 | ||
85 | #define AT91SAM9RL_BASE_PIOC 0xfffff800 | ||
86 | #define AT91SAM9RL_BASE_PIOD 0xfffffa00 | ||
87 | #define AT91SAM9RL_BASE_SHDWC 0xfffffd10 | ||
88 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 | ||
89 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 | ||
90 | #define AT91SAM9RL_BASE_WDT 0xfffffd40 | ||
91 | #define AT91SAM9RL_BASE_RTC 0xfffffe00 | ||
93 | 92 | ||
94 | #define AT91_USART0 AT91SAM9RL_BASE_US0 | 93 | #define AT91_USART0 AT91SAM9RL_BASE_US0 |
95 | #define AT91_USART1 AT91SAM9RL_BASE_US1 | 94 | #define AT91_USART1 AT91SAM9RL_BASE_US1 |
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h index a152ff87e688..a57829f4fd18 100644 --- a/arch/arm/mach-at91/include/mach/at91x40.h +++ b/arch/arm/mach-at91/include/mach/at91x40.h | |||
@@ -40,7 +40,6 @@ | |||
40 | #define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ | 40 | #define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ |
41 | #define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ | 41 | #define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ |
42 | #define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ | 42 | #define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ |
43 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ | ||
44 | 43 | ||
45 | /* | 44 | /* |
46 | * The AT91x40 series doesn't have a debug unit like the other AT91 parts. | 45 | * The AT91x40 series doesn't have a debug unit like the other AT91 parts. |
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index eac92e995bb5..d0b377b21bd7 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
@@ -40,13 +40,14 @@ | |||
40 | #include <linux/atmel-mci.h> | 40 | #include <linux/atmel-mci.h> |
41 | #include <sound/atmel-ac97c.h> | 41 | #include <sound/atmel-ac97c.h> |
42 | #include <linux/serial.h> | 42 | #include <linux/serial.h> |
43 | #include <linux/platform_data/macb.h> | ||
43 | 44 | ||
44 | /* USB Device */ | 45 | /* USB Device */ |
45 | struct at91_udc_data { | 46 | struct at91_udc_data { |
46 | u8 vbus_pin; /* high == host powering us */ | 47 | int vbus_pin; /* high == host powering us */ |
47 | u8 vbus_active_low; /* vbus polarity */ | 48 | u8 vbus_active_low; /* vbus polarity */ |
48 | u8 vbus_polled; /* Use polling, not interrupt */ | 49 | u8 vbus_polled; /* Use polling, not interrupt */ |
49 | u8 pullup_pin; /* active == D+ pulled up */ | 50 | int pullup_pin; /* active == D+ pulled up */ |
50 | u8 pullup_active_low; /* true == pullup_pin is active low */ | 51 | u8 pullup_active_low; /* true == pullup_pin is active low */ |
51 | }; | 52 | }; |
52 | extern void __init at91_add_device_udc(struct at91_udc_data *data); | 53 | extern void __init at91_add_device_udc(struct at91_udc_data *data); |
@@ -56,10 +57,10 @@ extern void __init at91_add_device_usba(struct usba_platform_data *data); | |||
56 | 57 | ||
57 | /* Compact Flash */ | 58 | /* Compact Flash */ |
58 | struct at91_cf_data { | 59 | struct at91_cf_data { |
59 | u8 irq_pin; /* I/O IRQ */ | 60 | int irq_pin; /* I/O IRQ */ |
60 | u8 det_pin; /* Card detect */ | 61 | int det_pin; /* Card detect */ |
61 | u8 vcc_pin; /* power switching */ | 62 | int vcc_pin; /* power switching */ |
62 | u8 rst_pin; /* card reset */ | 63 | int rst_pin; /* card reset */ |
63 | u8 chipselect; /* EBI Chip Select number */ | 64 | u8 chipselect; /* EBI Chip Select number */ |
64 | u8 flags; | 65 | u8 flags; |
65 | #define AT91_CF_TRUE_IDE 0x01 | 66 | #define AT91_CF_TRUE_IDE 0x01 |
@@ -70,37 +71,26 @@ extern void __init at91_add_device_cf(struct at91_cf_data *data); | |||
70 | /* MMC / SD */ | 71 | /* MMC / SD */ |
71 | /* at91_mci platform config */ | 72 | /* at91_mci platform config */ |
72 | struct at91_mmc_data { | 73 | struct at91_mmc_data { |
73 | u8 det_pin; /* card detect IRQ */ | 74 | int det_pin; /* card detect IRQ */ |
74 | unsigned slot_b:1; /* uses Slot B */ | 75 | unsigned slot_b:1; /* uses Slot B */ |
75 | unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ | 76 | unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ |
76 | u8 wp_pin; /* (SD) writeprotect detect */ | 77 | int wp_pin; /* (SD) writeprotect detect */ |
77 | u8 vcc_pin; /* power switching (high == on) */ | 78 | int vcc_pin; /* power switching (high == on) */ |
78 | }; | 79 | }; |
79 | extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); | 80 | extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); |
80 | 81 | ||
81 | /* atmel-mci platform config */ | 82 | /* atmel-mci platform config */ |
82 | extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data); | 83 | extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data); |
83 | 84 | ||
84 | /* Ethernet (EMAC & MACB) */ | 85 | extern void __init at91_add_device_eth(struct macb_platform_data *data); |
85 | struct at91_eth_data { | ||
86 | u32 phy_mask; | ||
87 | u8 phy_irq_pin; /* PHY IRQ */ | ||
88 | u8 is_rmii; /* using RMII interface? */ | ||
89 | }; | ||
90 | extern void __init at91_add_device_eth(struct at91_eth_data *data); | ||
91 | |||
92 | #if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \ | ||
93 | || defined(CONFIG_ARCH_AT91SAM9G45) | ||
94 | #define eth_platform_data at91_eth_data | ||
95 | #endif | ||
96 | 86 | ||
97 | /* USB Host */ | 87 | /* USB Host */ |
98 | struct at91_usbh_data { | 88 | struct at91_usbh_data { |
99 | u8 ports; /* number of ports on root hub */ | 89 | u8 ports; /* number of ports on root hub */ |
100 | u8 vbus_pin[2]; /* port power-control pin */ | 90 | int vbus_pin[2]; /* port power-control pin */ |
101 | u8 vbus_pin_inverted; | 91 | u8 vbus_pin_inverted; |
102 | u8 overcurrent_supported; | 92 | u8 overcurrent_supported; |
103 | u8 overcurrent_pin[2]; | 93 | int overcurrent_pin[2]; |
104 | u8 overcurrent_status[2]; | 94 | u8 overcurrent_status[2]; |
105 | u8 overcurrent_changed[2]; | 95 | u8 overcurrent_changed[2]; |
106 | }; | 96 | }; |
@@ -110,9 +100,9 @@ extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); | |||
110 | 100 | ||
111 | /* NAND / SmartMedia */ | 101 | /* NAND / SmartMedia */ |
112 | struct atmel_nand_data { | 102 | struct atmel_nand_data { |
113 | u8 enable_pin; /* chip enable */ | 103 | int enable_pin; /* chip enable */ |
114 | u8 det_pin; /* card detect */ | 104 | int det_pin; /* card detect */ |
115 | u8 rdy_pin; /* ready/busy */ | 105 | int rdy_pin; /* ready/busy */ |
116 | u8 rdy_pin_active_low; /* rdy_pin value is inverted */ | 106 | u8 rdy_pin_active_low; /* rdy_pin value is inverted */ |
117 | u8 ale; /* address line number connected to ALE */ | 107 | u8 ale; /* address line number connected to ALE */ |
118 | u8 cle; /* address line number connected to CLE */ | 108 | u8 cle; /* address line number connected to CLE */ |
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S index 0ed8648c6452..c6bb9e2d9baa 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/mach-at91/include/mach/debug-macro.S | |||
@@ -14,9 +14,15 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/at91_dbgu.h> | 15 | #include <mach/at91_dbgu.h> |
16 | 16 | ||
17 | #if defined(CONFIG_AT91_DEBUG_LL_DBGU0) | ||
18 | #define AT91_DBGU AT91_BASE_DBGU0 | ||
19 | #else | ||
20 | #define AT91_DBGU AT91_BASE_DBGU1 | ||
21 | #endif | ||
22 | |||
17 | .macro addruart, rp, rv, tmp | 23 | .macro addruart, rp, rv, tmp |
18 | ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) | 24 | ldr \rp, =AT91_DBGU @ System peripherals (phys address) |
19 | ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) | 25 | ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) |
20 | .endm | 26 | .endm |
21 | 27 | ||
22 | .macro senduart,rd,rx | 28 | .macro senduart,rd,rx |
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S index 7ab68f972227..423eea0ed74c 100644 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ b/arch/arm/mach-at91/include/mach/entry-macro.S | |||
@@ -17,16 +17,17 @@ | |||
17 | .endm | 17 | .endm |
18 | 18 | ||
19 | .macro get_irqnr_preamble, base, tmp | 19 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral | 20 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral |
21 | ldr \base, [\base] | ||
21 | .endm | 22 | .endm |
22 | 23 | ||
23 | .macro arch_ret_to_user, tmp1, tmp2 | 24 | .macro arch_ret_to_user, tmp1, tmp2 |
24 | .endm | 25 | .endm |
25 | 26 | ||
26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
27 | ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) | 28 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) |
28 | ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number | 29 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number |
29 | teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt | 30 | teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt |
30 | streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now. | 31 | streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. |
31 | .endm | 32 | .endm |
32 | 33 | ||
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index 2b9a1f51210f..e3fd225121c7 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h | |||
@@ -16,177 +16,175 @@ | |||
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
18 | 18 | ||
19 | #define PIN_BASE NR_AIC_IRQS | ||
20 | |||
21 | #define MAX_GPIO_BANKS 5 | 19 | #define MAX_GPIO_BANKS 5 |
22 | #define NR_BUILTIN_GPIO (PIN_BASE + (MAX_GPIO_BANKS * 32)) | 20 | #define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32) |
23 | 21 | ||
24 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ | 22 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ |
25 | 23 | ||
26 | #define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) | 24 | #define AT91_PIN_PA0 (0x00 + 0) |
27 | #define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) | 25 | #define AT91_PIN_PA1 (0x00 + 1) |
28 | #define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) | 26 | #define AT91_PIN_PA2 (0x00 + 2) |
29 | #define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) | 27 | #define AT91_PIN_PA3 (0x00 + 3) |
30 | #define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) | 28 | #define AT91_PIN_PA4 (0x00 + 4) |
31 | #define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) | 29 | #define AT91_PIN_PA5 (0x00 + 5) |
32 | #define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) | 30 | #define AT91_PIN_PA6 (0x00 + 6) |
33 | #define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) | 31 | #define AT91_PIN_PA7 (0x00 + 7) |
34 | #define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) | 32 | #define AT91_PIN_PA8 (0x00 + 8) |
35 | #define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) | 33 | #define AT91_PIN_PA9 (0x00 + 9) |
36 | #define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) | 34 | #define AT91_PIN_PA10 (0x00 + 10) |
37 | #define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) | 35 | #define AT91_PIN_PA11 (0x00 + 11) |
38 | #define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) | 36 | #define AT91_PIN_PA12 (0x00 + 12) |
39 | #define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) | 37 | #define AT91_PIN_PA13 (0x00 + 13) |
40 | #define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) | 38 | #define AT91_PIN_PA14 (0x00 + 14) |
41 | #define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) | 39 | #define AT91_PIN_PA15 (0x00 + 15) |
42 | #define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) | 40 | #define AT91_PIN_PA16 (0x00 + 16) |
43 | #define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) | 41 | #define AT91_PIN_PA17 (0x00 + 17) |
44 | #define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) | 42 | #define AT91_PIN_PA18 (0x00 + 18) |
45 | #define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) | 43 | #define AT91_PIN_PA19 (0x00 + 19) |
46 | #define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) | 44 | #define AT91_PIN_PA20 (0x00 + 20) |
47 | #define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) | 45 | #define AT91_PIN_PA21 (0x00 + 21) |
48 | #define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) | 46 | #define AT91_PIN_PA22 (0x00 + 22) |
49 | #define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) | 47 | #define AT91_PIN_PA23 (0x00 + 23) |
50 | #define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) | 48 | #define AT91_PIN_PA24 (0x00 + 24) |
51 | #define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) | 49 | #define AT91_PIN_PA25 (0x00 + 25) |
52 | #define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) | 50 | #define AT91_PIN_PA26 (0x00 + 26) |
53 | #define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) | 51 | #define AT91_PIN_PA27 (0x00 + 27) |
54 | #define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) | 52 | #define AT91_PIN_PA28 (0x00 + 28) |
55 | #define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) | 53 | #define AT91_PIN_PA29 (0x00 + 29) |
56 | #define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) | 54 | #define AT91_PIN_PA30 (0x00 + 30) |
57 | #define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) | 55 | #define AT91_PIN_PA31 (0x00 + 31) |
58 | 56 | ||
59 | #define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) | 57 | #define AT91_PIN_PB0 (0x20 + 0) |
60 | #define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) | 58 | #define AT91_PIN_PB1 (0x20 + 1) |
61 | #define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) | 59 | #define AT91_PIN_PB2 (0x20 + 2) |
62 | #define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) | 60 | #define AT91_PIN_PB3 (0x20 + 3) |
63 | #define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) | 61 | #define AT91_PIN_PB4 (0x20 + 4) |
64 | #define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) | 62 | #define AT91_PIN_PB5 (0x20 + 5) |
65 | #define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) | 63 | #define AT91_PIN_PB6 (0x20 + 6) |
66 | #define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) | 64 | #define AT91_PIN_PB7 (0x20 + 7) |
67 | #define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) | 65 | #define AT91_PIN_PB8 (0x20 + 8) |
68 | #define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) | 66 | #define AT91_PIN_PB9 (0x20 + 9) |
69 | #define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) | 67 | #define AT91_PIN_PB10 (0x20 + 10) |
70 | #define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) | 68 | #define AT91_PIN_PB11 (0x20 + 11) |
71 | #define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) | 69 | #define AT91_PIN_PB12 (0x20 + 12) |
72 | #define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) | 70 | #define AT91_PIN_PB13 (0x20 + 13) |
73 | #define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) | 71 | #define AT91_PIN_PB14 (0x20 + 14) |
74 | #define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) | 72 | #define AT91_PIN_PB15 (0x20 + 15) |
75 | #define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) | 73 | #define AT91_PIN_PB16 (0x20 + 16) |
76 | #define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) | 74 | #define AT91_PIN_PB17 (0x20 + 17) |
77 | #define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) | 75 | #define AT91_PIN_PB18 (0x20 + 18) |
78 | #define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) | 76 | #define AT91_PIN_PB19 (0x20 + 19) |
79 | #define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) | 77 | #define AT91_PIN_PB20 (0x20 + 20) |
80 | #define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) | 78 | #define AT91_PIN_PB21 (0x20 + 21) |
81 | #define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) | 79 | #define AT91_PIN_PB22 (0x20 + 22) |
82 | #define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) | 80 | #define AT91_PIN_PB23 (0x20 + 23) |
83 | #define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) | 81 | #define AT91_PIN_PB24 (0x20 + 24) |
84 | #define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) | 82 | #define AT91_PIN_PB25 (0x20 + 25) |
85 | #define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) | 83 | #define AT91_PIN_PB26 (0x20 + 26) |
86 | #define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) | 84 | #define AT91_PIN_PB27 (0x20 + 27) |
87 | #define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) | 85 | #define AT91_PIN_PB28 (0x20 + 28) |
88 | #define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) | 86 | #define AT91_PIN_PB29 (0x20 + 29) |
89 | #define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) | 87 | #define AT91_PIN_PB30 (0x20 + 30) |
90 | #define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) | 88 | #define AT91_PIN_PB31 (0x20 + 31) |
91 | 89 | ||
92 | #define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) | 90 | #define AT91_PIN_PC0 (0x40 + 0) |
93 | #define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) | 91 | #define AT91_PIN_PC1 (0x40 + 1) |
94 | #define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) | 92 | #define AT91_PIN_PC2 (0x40 + 2) |
95 | #define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) | 93 | #define AT91_PIN_PC3 (0x40 + 3) |
96 | #define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) | 94 | #define AT91_PIN_PC4 (0x40 + 4) |
97 | #define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) | 95 | #define AT91_PIN_PC5 (0x40 + 5) |
98 | #define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) | 96 | #define AT91_PIN_PC6 (0x40 + 6) |
99 | #define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) | 97 | #define AT91_PIN_PC7 (0x40 + 7) |
100 | #define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) | 98 | #define AT91_PIN_PC8 (0x40 + 8) |
101 | #define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) | 99 | #define AT91_PIN_PC9 (0x40 + 9) |
102 | #define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) | 100 | #define AT91_PIN_PC10 (0x40 + 10) |
103 | #define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) | 101 | #define AT91_PIN_PC11 (0x40 + 11) |
104 | #define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) | 102 | #define AT91_PIN_PC12 (0x40 + 12) |
105 | #define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) | 103 | #define AT91_PIN_PC13 (0x40 + 13) |
106 | #define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) | 104 | #define AT91_PIN_PC14 (0x40 + 14) |
107 | #define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) | 105 | #define AT91_PIN_PC15 (0x40 + 15) |
108 | #define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) | 106 | #define AT91_PIN_PC16 (0x40 + 16) |
109 | #define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) | 107 | #define AT91_PIN_PC17 (0x40 + 17) |
110 | #define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) | 108 | #define AT91_PIN_PC18 (0x40 + 18) |
111 | #define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) | 109 | #define AT91_PIN_PC19 (0x40 + 19) |
112 | #define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) | 110 | #define AT91_PIN_PC20 (0x40 + 20) |
113 | #define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) | 111 | #define AT91_PIN_PC21 (0x40 + 21) |
114 | #define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) | 112 | #define AT91_PIN_PC22 (0x40 + 22) |
115 | #define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) | 113 | #define AT91_PIN_PC23 (0x40 + 23) |
116 | #define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) | 114 | #define AT91_PIN_PC24 (0x40 + 24) |
117 | #define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) | 115 | #define AT91_PIN_PC25 (0x40 + 25) |
118 | #define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) | 116 | #define AT91_PIN_PC26 (0x40 + 26) |
119 | #define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) | 117 | #define AT91_PIN_PC27 (0x40 + 27) |
120 | #define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) | 118 | #define AT91_PIN_PC28 (0x40 + 28) |
121 | #define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) | 119 | #define AT91_PIN_PC29 (0x40 + 29) |
122 | #define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) | 120 | #define AT91_PIN_PC30 (0x40 + 30) |
123 | #define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) | 121 | #define AT91_PIN_PC31 (0x40 + 31) |
124 | 122 | ||
125 | #define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) | 123 | #define AT91_PIN_PD0 (0x60 + 0) |
126 | #define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) | 124 | #define AT91_PIN_PD1 (0x60 + 1) |
127 | #define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) | 125 | #define AT91_PIN_PD2 (0x60 + 2) |
128 | #define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) | 126 | #define AT91_PIN_PD3 (0x60 + 3) |
129 | #define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) | 127 | #define AT91_PIN_PD4 (0x60 + 4) |
130 | #define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) | 128 | #define AT91_PIN_PD5 (0x60 + 5) |
131 | #define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) | 129 | #define AT91_PIN_PD6 (0x60 + 6) |
132 | #define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) | 130 | #define AT91_PIN_PD7 (0x60 + 7) |
133 | #define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) | 131 | #define AT91_PIN_PD8 (0x60 + 8) |
134 | #define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) | 132 | #define AT91_PIN_PD9 (0x60 + 9) |
135 | #define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) | 133 | #define AT91_PIN_PD10 (0x60 + 10) |
136 | #define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) | 134 | #define AT91_PIN_PD11 (0x60 + 11) |
137 | #define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) | 135 | #define AT91_PIN_PD12 (0x60 + 12) |
138 | #define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) | 136 | #define AT91_PIN_PD13 (0x60 + 13) |
139 | #define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) | 137 | #define AT91_PIN_PD14 (0x60 + 14) |
140 | #define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) | 138 | #define AT91_PIN_PD15 (0x60 + 15) |
141 | #define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) | 139 | #define AT91_PIN_PD16 (0x60 + 16) |
142 | #define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) | 140 | #define AT91_PIN_PD17 (0x60 + 17) |
143 | #define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) | 141 | #define AT91_PIN_PD18 (0x60 + 18) |
144 | #define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) | 142 | #define AT91_PIN_PD19 (0x60 + 19) |
145 | #define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) | 143 | #define AT91_PIN_PD20 (0x60 + 20) |
146 | #define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) | 144 | #define AT91_PIN_PD21 (0x60 + 21) |
147 | #define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) | 145 | #define AT91_PIN_PD22 (0x60 + 22) |
148 | #define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) | 146 | #define AT91_PIN_PD23 (0x60 + 23) |
149 | #define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) | 147 | #define AT91_PIN_PD24 (0x60 + 24) |
150 | #define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) | 148 | #define AT91_PIN_PD25 (0x60 + 25) |
151 | #define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) | 149 | #define AT91_PIN_PD26 (0x60 + 26) |
152 | #define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) | 150 | #define AT91_PIN_PD27 (0x60 + 27) |
153 | #define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) | 151 | #define AT91_PIN_PD28 (0x60 + 28) |
154 | #define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) | 152 | #define AT91_PIN_PD29 (0x60 + 29) |
155 | #define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) | 153 | #define AT91_PIN_PD30 (0x60 + 30) |
156 | #define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) | 154 | #define AT91_PIN_PD31 (0x60 + 31) |
157 | 155 | ||
158 | #define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) | 156 | #define AT91_PIN_PE0 (0x80 + 0) |
159 | #define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) | 157 | #define AT91_PIN_PE1 (0x80 + 1) |
160 | #define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) | 158 | #define AT91_PIN_PE2 (0x80 + 2) |
161 | #define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) | 159 | #define AT91_PIN_PE3 (0x80 + 3) |
162 | #define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) | 160 | #define AT91_PIN_PE4 (0x80 + 4) |
163 | #define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) | 161 | #define AT91_PIN_PE5 (0x80 + 5) |
164 | #define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) | 162 | #define AT91_PIN_PE6 (0x80 + 6) |
165 | #define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) | 163 | #define AT91_PIN_PE7 (0x80 + 7) |
166 | #define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) | 164 | #define AT91_PIN_PE8 (0x80 + 8) |
167 | #define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) | 165 | #define AT91_PIN_PE9 (0x80 + 9) |
168 | #define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) | 166 | #define AT91_PIN_PE10 (0x80 + 10) |
169 | #define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) | 167 | #define AT91_PIN_PE11 (0x80 + 11) |
170 | #define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) | 168 | #define AT91_PIN_PE12 (0x80 + 12) |
171 | #define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) | 169 | #define AT91_PIN_PE13 (0x80 + 13) |
172 | #define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) | 170 | #define AT91_PIN_PE14 (0x80 + 14) |
173 | #define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) | 171 | #define AT91_PIN_PE15 (0x80 + 15) |
174 | #define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) | 172 | #define AT91_PIN_PE16 (0x80 + 16) |
175 | #define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) | 173 | #define AT91_PIN_PE17 (0x80 + 17) |
176 | #define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) | 174 | #define AT91_PIN_PE18 (0x80 + 18) |
177 | #define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) | 175 | #define AT91_PIN_PE19 (0x80 + 19) |
178 | #define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) | 176 | #define AT91_PIN_PE20 (0x80 + 20) |
179 | #define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) | 177 | #define AT91_PIN_PE21 (0x80 + 21) |
180 | #define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) | 178 | #define AT91_PIN_PE22 (0x80 + 22) |
181 | #define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) | 179 | #define AT91_PIN_PE23 (0x80 + 23) |
182 | #define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) | 180 | #define AT91_PIN_PE24 (0x80 + 24) |
183 | #define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) | 181 | #define AT91_PIN_PE25 (0x80 + 25) |
184 | #define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) | 182 | #define AT91_PIN_PE26 (0x80 + 26) |
185 | #define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) | 183 | #define AT91_PIN_PE27 (0x80 + 27) |
186 | #define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) | 184 | #define AT91_PIN_PE28 (0x80 + 28) |
187 | #define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) | 185 | #define AT91_PIN_PE29 (0x80 + 29) |
188 | #define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) | 186 | #define AT91_PIN_PE30 (0x80 + 30) |
189 | #define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) | 187 | #define AT91_PIN_PE31 (0x80 + 31) |
190 | 188 | ||
191 | #ifndef __ASSEMBLY__ | 189 | #ifndef __ASSEMBLY__ |
192 | /* setup setup routines, called from board init or driver probe() */ | 190 | /* setup setup routines, called from board init or driver probe() */ |
@@ -215,8 +213,8 @@ extern void at91_gpio_resume(void); | |||
215 | 213 | ||
216 | #include <asm/errno.h> | 214 | #include <asm/errno.h> |
217 | 215 | ||
218 | #define gpio_to_irq(gpio) (gpio) | 216 | #define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS) |
219 | #define irq_to_gpio(irq) (irq) | 217 | #define irq_to_gpio(irq) (irq - NR_AIC_IRQS) |
220 | 218 | ||
221 | #endif /* __ASSEMBLY__ */ | 219 | #endif /* __ASSEMBLY__ */ |
222 | 220 | ||
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 483478d8be6b..2d0e4e998566 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h | |||
@@ -16,6 +16,12 @@ | |||
16 | 16 | ||
17 | #include <asm/sizes.h> | 17 | #include <asm/sizes.h> |
18 | 18 | ||
19 | /* DBGU base */ | ||
20 | /* rm9200, 9260/9g20, 9261/9g10, 9rl */ | ||
21 | #define AT91_BASE_DBGU0 0xfffff200 | ||
22 | /* 9263, 9g45, cap9 */ | ||
23 | #define AT91_BASE_DBGU1 0xffffee00 | ||
24 | |||
19 | #if defined(CONFIG_ARCH_AT91RM9200) | 25 | #if defined(CONFIG_ARCH_AT91RM9200) |
20 | #include <mach/at91rm9200.h> | 26 | #include <mach/at91rm9200.h> |
21 | #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) | 27 | #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) |
@@ -52,6 +58,12 @@ | |||
52 | #endif | 58 | #endif |
53 | 59 | ||
54 | /* | 60 | /* |
61 | * On all at91 have the Advanced Interrupt Controller starts at address | ||
62 | * 0xfffff000 | ||
63 | */ | ||
64 | #define AT91_AIC 0xfffff000 | ||
65 | |||
66 | /* | ||
55 | * Peripheral identifiers/interrupts. | 67 | * Peripheral identifiers/interrupts. |
56 | */ | 68 | */ |
57 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | 69 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ |
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h index 36bd55f3fc6e..ac8b7dfc85ef 100644 --- a/arch/arm/mach-at91/include/mach/irqs.h +++ b/arch/arm/mach-at91/include/mach/irqs.h | |||
@@ -31,7 +31,7 @@ | |||
31 | * Acknowledge interrupt with AIC after interrupt has been handled. | 31 | * Acknowledge interrupt with AIC after interrupt has been handled. |
32 | * (by kernel/irq.c) | 32 | * (by kernel/irq.c) |
33 | */ | 33 | */ |
34 | #define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0) | 34 | #define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0) |
35 | 35 | ||
36 | 36 | ||
37 | /* | 37 | /* |
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h index 36af14bc13bb..cbd64f3bcecd 100644 --- a/arch/arm/mach-at91/include/mach/system.h +++ b/arch/arm/mach-at91/include/mach/system.h | |||
@@ -47,13 +47,4 @@ static inline void arch_idle(void) | |||
47 | #endif | 47 | #endif |
48 | } | 48 | } |
49 | 49 | ||
50 | void (*at91_arch_reset)(void); | ||
51 | |||
52 | static inline void arch_reset(char mode, const char *cmd) | ||
53 | { | ||
54 | /* call the CPU-specific reset function */ | ||
55 | if (at91_arch_reset) | ||
56 | (at91_arch_reset)(); | ||
57 | } | ||
58 | |||
59 | #endif | 50 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h index 85820ad801cc..5e917a66edd7 100644 --- a/arch/arm/mach-at91/include/mach/timex.h +++ b/arch/arm/mach-at91/include/mach/timex.h | |||
@@ -23,70 +23,15 @@ | |||
23 | 23 | ||
24 | #include <mach/hardware.h> | 24 | #include <mach/hardware.h> |
25 | 25 | ||
26 | #if defined(CONFIG_ARCH_AT91RM9200) | 26 | #ifdef CONFIG_ARCH_AT91X40 |
27 | 27 | ||
28 | #define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) | 28 | #define AT91X40_MASTER_CLOCK 40000000 |
29 | 29 | #define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) | |
30 | #elif defined(CONFIG_ARCH_AT91SAM9260) | ||
31 | |||
32 | #if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260) | ||
33 | #define AT91SAM9_MASTER_CLOCK 90000000 | ||
34 | #else | ||
35 | #define AT91SAM9_MASTER_CLOCK 99300000 | ||
36 | #endif | ||
37 | |||
38 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
39 | |||
40 | #elif defined(CONFIG_ARCH_AT91SAM9261) | ||
41 | |||
42 | #define AT91SAM9_MASTER_CLOCK 99300000 | ||
43 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
44 | |||
45 | #elif defined(CONFIG_ARCH_AT91SAM9G10) | ||
46 | |||
47 | #define AT91SAM9_MASTER_CLOCK 133000000 | ||
48 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
49 | |||
50 | #elif defined(CONFIG_ARCH_AT91SAM9263) | ||
51 | |||
52 | #if defined(CONFIG_MACH_USB_A9263) | ||
53 | #define AT91SAM9_MASTER_CLOCK 90000000 | ||
54 | #else | ||
55 | #define AT91SAM9_MASTER_CLOCK 99959500 | ||
56 | #endif | ||
57 | |||
58 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
59 | |||
60 | #elif defined(CONFIG_ARCH_AT91SAM9RL) | ||
61 | |||
62 | #define AT91SAM9_MASTER_CLOCK 100000000 | ||
63 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
64 | |||
65 | #elif defined(CONFIG_ARCH_AT91SAM9G20) | ||
66 | 30 | ||
67 | #if defined(CONFIG_MACH_USB_A9G20) | ||
68 | #define AT91SAM9_MASTER_CLOCK 133000000 | ||
69 | #else | 31 | #else |
70 | #define AT91SAM9_MASTER_CLOCK 132096000 | ||
71 | #endif | ||
72 | |||
73 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
74 | |||
75 | #elif defined(CONFIG_ARCH_AT91SAM9G45) | ||
76 | 32 | ||
77 | #define AT91SAM9_MASTER_CLOCK 133333333 | 33 | #define CLOCK_TICK_RATE 12345678 |
78 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
79 | |||
80 | #elif defined(CONFIG_ARCH_AT91CAP9) | ||
81 | |||
82 | #define AT91CAP9_MASTER_CLOCK 100000000 | ||
83 | #define CLOCK_TICK_RATE (AT91CAP9_MASTER_CLOCK/16) | ||
84 | |||
85 | #elif defined(CONFIG_ARCH_AT91X40) | ||
86 | |||
87 | #define AT91X40_MASTER_CLOCK 40000000 | ||
88 | #define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) | ||
89 | 34 | ||
90 | #endif | 35 | #endif |
91 | 36 | ||
92 | #endif | 37 | #endif /* __ASM_ARCH_TIMEX_H */ |
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h index 18bdcdeb474f..0234fd9d20d6 100644 --- a/arch/arm/mach-at91/include/mach/uncompress.h +++ b/arch/arm/mach-at91/include/mach/uncompress.h | |||
@@ -24,8 +24,10 @@ | |||
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/atmel_serial.h> | 25 | #include <linux/atmel_serial.h> |
26 | 26 | ||
27 | #if defined(CONFIG_AT91_EARLY_DBGU) | 27 | #if defined(CONFIG_AT91_EARLY_DBGU0) |
28 | #define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS) | 28 | #define UART_OFFSET AT91_BASE_DBGU0 |
29 | #elif defined(CONFIG_AT91_EARLY_DBGU1) | ||
30 | #define UART_OFFSET AT91_BASE_DBGU1 | ||
29 | #elif defined(CONFIG_AT91_EARLY_USART0) | 31 | #elif defined(CONFIG_AT91_EARLY_USART0) |
30 | #define UART_OFFSET AT91_USART0 | 32 | #define UART_OFFSET AT91_USART0 |
31 | #elif defined(CONFIG_AT91_EARLY_USART1) | 33 | #elif defined(CONFIG_AT91_EARLY_USART1) |
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 9665265ec757..be6b639ecd7b 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c | |||
@@ -33,17 +33,18 @@ | |||
33 | #include <asm/mach/irq.h> | 33 | #include <asm/mach/irq.h> |
34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
35 | 35 | ||
36 | void __iomem *at91_aic_base; | ||
36 | 37 | ||
37 | static void at91_aic_mask_irq(struct irq_data *d) | 38 | static void at91_aic_mask_irq(struct irq_data *d) |
38 | { | 39 | { |
39 | /* Disable interrupt on AIC */ | 40 | /* Disable interrupt on AIC */ |
40 | at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); | 41 | at91_aic_write(AT91_AIC_IDCR, 1 << d->irq); |
41 | } | 42 | } |
42 | 43 | ||
43 | static void at91_aic_unmask_irq(struct irq_data *d) | 44 | static void at91_aic_unmask_irq(struct irq_data *d) |
44 | { | 45 | { |
45 | /* Enable interrupt on AIC */ | 46 | /* Enable interrupt on AIC */ |
46 | at91_sys_write(AT91_AIC_IECR, 1 << d->irq); | 47 | at91_aic_write(AT91_AIC_IECR, 1 << d->irq); |
47 | } | 48 | } |
48 | 49 | ||
49 | unsigned int at91_extern_irq; | 50 | unsigned int at91_extern_irq; |
@@ -77,8 +78,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type) | |||
77 | return -EINVAL; | 78 | return -EINVAL; |
78 | } | 79 | } |
79 | 80 | ||
80 | smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; | 81 | smr = at91_aic_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; |
81 | at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); | 82 | at91_aic_write(AT91_AIC_SMR(d->irq), smr | srctype); |
82 | return 0; | 83 | return 0; |
83 | } | 84 | } |
84 | 85 | ||
@@ -102,15 +103,15 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value) | |||
102 | 103 | ||
103 | void at91_irq_suspend(void) | 104 | void at91_irq_suspend(void) |
104 | { | 105 | { |
105 | backups = at91_sys_read(AT91_AIC_IMR); | 106 | backups = at91_aic_read(AT91_AIC_IMR); |
106 | at91_sys_write(AT91_AIC_IDCR, backups); | 107 | at91_aic_write(AT91_AIC_IDCR, backups); |
107 | at91_sys_write(AT91_AIC_IECR, wakeups); | 108 | at91_aic_write(AT91_AIC_IECR, wakeups); |
108 | } | 109 | } |
109 | 110 | ||
110 | void at91_irq_resume(void) | 111 | void at91_irq_resume(void) |
111 | { | 112 | { |
112 | at91_sys_write(AT91_AIC_IDCR, wakeups); | 113 | at91_aic_write(AT91_AIC_IDCR, wakeups); |
113 | at91_sys_write(AT91_AIC_IECR, backups); | 114 | at91_aic_write(AT91_AIC_IECR, backups); |
114 | } | 115 | } |
115 | 116 | ||
116 | #else | 117 | #else |
@@ -133,34 +134,39 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) | |||
133 | { | 134 | { |
134 | unsigned int i; | 135 | unsigned int i; |
135 | 136 | ||
137 | at91_aic_base = ioremap(AT91_AIC, 512); | ||
138 | |||
139 | if (!at91_aic_base) | ||
140 | panic("Impossible to ioremap AT91_AIC\n"); | ||
141 | |||
136 | /* | 142 | /* |
137 | * The IVR is used by macro get_irqnr_and_base to read and verify. | 143 | * The IVR is used by macro get_irqnr_and_base to read and verify. |
138 | * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. | 144 | * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. |
139 | */ | 145 | */ |
140 | for (i = 0; i < NR_AIC_IRQS; i++) { | 146 | for (i = 0; i < NR_AIC_IRQS; i++) { |
141 | /* Put irq number in Source Vector Register: */ | 147 | /* Put irq number in Source Vector Register: */ |
142 | at91_sys_write(AT91_AIC_SVR(i), i); | 148 | at91_aic_write(AT91_AIC_SVR(i), i); |
143 | /* Active Low interrupt, with the specified priority */ | 149 | /* Active Low interrupt, with the specified priority */ |
144 | at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); | 150 | at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); |
145 | 151 | ||
146 | irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); | 152 | irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); |
147 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | 153 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
148 | 154 | ||
149 | /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ | 155 | /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ |
150 | if (i < 8) | 156 | if (i < 8) |
151 | at91_sys_write(AT91_AIC_EOICR, 0); | 157 | at91_aic_write(AT91_AIC_EOICR, 0); |
152 | } | 158 | } |
153 | 159 | ||
154 | /* | 160 | /* |
155 | * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS | 161 | * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS |
156 | * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU | 162 | * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU |
157 | */ | 163 | */ |
158 | at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS); | 164 | at91_aic_write(AT91_AIC_SPU, NR_AIC_IRQS); |
159 | 165 | ||
160 | /* No debugging in AIC: Debug (Protect) Control Register */ | 166 | /* No debugging in AIC: Debug (Protect) Control Register */ |
161 | at91_sys_write(AT91_AIC_DCR, 0); | 167 | at91_aic_write(AT91_AIC_DCR, 0); |
162 | 168 | ||
163 | /* Disable and clear all interrupts initially */ | 169 | /* Disable and clear all interrupts initially */ |
164 | at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF); | 170 | at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF); |
165 | at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF); | 171 | at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); |
166 | } | 172 | } |
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 7046158109d7..62ad95556c36 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -34,7 +34,7 @@ | |||
34 | /* | 34 | /* |
35 | * Show the reason for the previous system reset. | 35 | * Show the reason for the previous system reset. |
36 | */ | 36 | */ |
37 | #if defined(AT91_SHDWC) | 37 | #if defined(AT91_RSTC) |
38 | 38 | ||
39 | #include <mach/at91_rstc.h> | 39 | #include <mach/at91_rstc.h> |
40 | #include <mach/at91_shdwc.h> | 40 | #include <mach/at91_shdwc.h> |
@@ -58,8 +58,11 @@ static void __init show_reset_status(void) | |||
58 | char *reason, *r2 = reset; | 58 | char *reason, *r2 = reset; |
59 | u32 reset_type, wake_type; | 59 | u32 reset_type, wake_type; |
60 | 60 | ||
61 | if (!at91_shdwc_base) | ||
62 | return; | ||
63 | |||
61 | reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; | 64 | reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; |
62 | wake_type = at91_sys_read(AT91_SHDW_SR); | 65 | wake_type = at91_shdwc_read(AT91_SHDW_SR); |
63 | 66 | ||
64 | switch (reset_type) { | 67 | switch (reset_type) { |
65 | case AT91_RSTC_RSTTYP_GENERAL: | 68 | case AT91_RSTC_RSTTYP_GENERAL: |
@@ -215,7 +218,7 @@ static int at91_pm_enter(suspend_state_t state) | |||
215 | | (1 << AT91_ID_FIQ) | 218 | | (1 << AT91_ID_FIQ) |
216 | | (1 << AT91_ID_SYS) | 219 | | (1 << AT91_ID_SYS) |
217 | | (at91_extern_irq)) | 220 | | (at91_extern_irq)) |
218 | & at91_sys_read(AT91_AIC_IMR), | 221 | & at91_aic_read(AT91_AIC_IMR), |
219 | state); | 222 | state); |
220 | 223 | ||
221 | switch (state) { | 224 | switch (state) { |
@@ -283,7 +286,7 @@ static int at91_pm_enter(suspend_state_t state) | |||
283 | } | 286 | } |
284 | 287 | ||
285 | pr_debug("AT91: PM - wakeup %08x\n", | 288 | pr_debug("AT91: PM - wakeup %08x\n", |
286 | at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); | 289 | at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR)); |
287 | 290 | ||
288 | error: | 291 | error: |
289 | target_state = PM_SUSPEND_ON; | 292 | target_state = PM_SUSPEND_ON; |
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index 5eab6aa621d0..8294783b679d 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c | |||
@@ -10,38 +10,58 @@ | |||
10 | 10 | ||
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include <linux/of.h> | ||
14 | #include <linux/of_address.h> | ||
13 | 15 | ||
14 | #include <mach/at91sam9_smc.h> | 16 | #include <mach/at91sam9_smc.h> |
15 | 17 | ||
16 | #include "sam9_smc.h" | 18 | #include "sam9_smc.h" |
17 | 19 | ||
18 | void __init sam9_smc_configure(int cs, struct sam9_smc_config* config) | 20 | |
21 | #define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10)) | ||
22 | |||
23 | static void __iomem *smc_base_addr[2]; | ||
24 | |||
25 | static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config) | ||
19 | { | 26 | { |
27 | |||
20 | /* Setup register */ | 28 | /* Setup register */ |
21 | at91_sys_write(AT91_SMC_SETUP(cs), | 29 | __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup) |
22 | AT91_SMC_NWESETUP_(config->nwe_setup) | 30 | | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) |
23 | | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) | 31 | | AT91_SMC_NRDSETUP_(config->nrd_setup) |
24 | | AT91_SMC_NRDSETUP_(config->nrd_setup) | 32 | | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup), |
25 | | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup) | 33 | base + AT91_SMC_SETUP); |
26 | ); | ||
27 | 34 | ||
28 | /* Pulse register */ | 35 | /* Pulse register */ |
29 | at91_sys_write(AT91_SMC_PULSE(cs), | 36 | __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse) |
30 | AT91_SMC_NWEPULSE_(config->nwe_pulse) | 37 | | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) |
31 | | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) | 38 | | AT91_SMC_NRDPULSE_(config->nrd_pulse) |
32 | | AT91_SMC_NRDPULSE_(config->nrd_pulse) | 39 | | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse), |
33 | | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse) | 40 | base + AT91_SMC_PULSE); |
34 | ); | ||
35 | 41 | ||
36 | /* Cycle register */ | 42 | /* Cycle register */ |
37 | at91_sys_write(AT91_SMC_CYCLE(cs), | 43 | __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle) |
38 | AT91_SMC_NWECYCLE_(config->write_cycle) | 44 | | AT91_SMC_NRDCYCLE_(config->read_cycle), |
39 | | AT91_SMC_NRDCYCLE_(config->read_cycle) | 45 | base + AT91_SMC_CYCLE); |
40 | ); | ||
41 | 46 | ||
42 | /* Mode register */ | 47 | /* Mode register */ |
43 | at91_sys_write(AT91_SMC_MODE(cs), | 48 | __raw_writel(config->mode |
44 | config->mode | 49 | | AT91_SMC_TDF_(config->tdf_cycles), |
45 | | AT91_SMC_TDF_(config->tdf_cycles) | 50 | base + AT91_SMC_MODE); |
46 | ); | 51 | } |
52 | |||
53 | void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config) | ||
54 | { | ||
55 | sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config); | ||
56 | } | ||
57 | |||
58 | void __init at91sam9_ioremap_smc(int id, u32 addr) | ||
59 | { | ||
60 | if (id > 1) { | ||
61 | pr_warn("%s: id > 2\n", __func__); | ||
62 | return; | ||
63 | } | ||
64 | smc_base_addr[id] = ioremap(addr, 512); | ||
65 | if (!smc_base_addr[id]) | ||
66 | pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr); | ||
47 | } | 67 | } |
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h index bf72cfb3455b..039c5ce17aec 100644 --- a/arch/arm/mach-at91/sam9_smc.h +++ b/arch/arm/mach-at91/sam9_smc.h | |||
@@ -30,4 +30,5 @@ struct sam9_smc_config { | |||
30 | u8 tdf_cycles:4; | 30 | u8 tdf_cycles:4; |
31 | }; | 31 | }; |
32 | 32 | ||
33 | extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config); | 33 | extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config); |
34 | extern void __init at91sam9_ioremap_smc(int id, u32 addr); | ||
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index cf98a8f94dc5..8bdcc3cb6012 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c | |||
@@ -8,6 +8,7 @@ | |||
8 | #include <linux/module.h> | 8 | #include <linux/module.h> |
9 | #include <linux/io.h> | 9 | #include <linux/io.h> |
10 | #include <linux/mm.h> | 10 | #include <linux/mm.h> |
11 | #include <linux/pm.h> | ||
11 | 12 | ||
12 | #include <asm/mach/map.h> | 13 | #include <asm/mach/map.h> |
13 | 14 | ||
@@ -15,6 +16,7 @@ | |||
15 | #include <mach/cpu.h> | 16 | #include <mach/cpu.h> |
16 | #include <mach/at91_dbgu.h> | 17 | #include <mach/at91_dbgu.h> |
17 | #include <mach/at91_pmc.h> | 18 | #include <mach/at91_pmc.h> |
19 | #include <mach/at91_shdwc.h> | ||
18 | 20 | ||
19 | #include "soc.h" | 21 | #include "soc.h" |
20 | #include "generic.h" | 22 | #include "generic.h" |
@@ -73,9 +75,6 @@ static struct map_desc at91_io_desc __initdata = { | |||
73 | .type = MT_DEVICE, | 75 | .type = MT_DEVICE, |
74 | }; | 76 | }; |
75 | 77 | ||
76 | #define AT91_DBGU0 0xfffff200 | ||
77 | #define AT91_DBGU1 0xffffee00 | ||
78 | |||
79 | static void __init soc_detect(u32 dbgu_base) | 78 | static void __init soc_detect(u32 dbgu_base) |
80 | { | 79 | { |
81 | u32 cidr, socid; | 80 | u32 cidr, socid; |
@@ -248,9 +247,9 @@ void __init at91_map_io(void) | |||
248 | at91_soc_initdata.type = AT91_SOC_NONE; | 247 | at91_soc_initdata.type = AT91_SOC_NONE; |
249 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | 248 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; |
250 | 249 | ||
251 | soc_detect(AT91_DBGU0); | 250 | soc_detect(AT91_BASE_DBGU0); |
252 | if (!at91_soc_is_detected()) | 251 | if (!at91_soc_is_detected()) |
253 | soc_detect(AT91_DBGU1); | 252 | soc_detect(AT91_BASE_DBGU1); |
254 | 253 | ||
255 | if (!at91_soc_is_detected()) | 254 | if (!at91_soc_is_detected()) |
256 | panic("AT91: Impossible to detect the SOC type"); | 255 | panic("AT91: Impossible to detect the SOC type"); |
@@ -267,8 +266,25 @@ void __init at91_map_io(void) | |||
267 | at91_boot_soc.map_io(); | 266 | at91_boot_soc.map_io(); |
268 | } | 267 | } |
269 | 268 | ||
269 | void __iomem *at91_shdwc_base = NULL; | ||
270 | |||
271 | static void at91sam9_poweroff(void) | ||
272 | { | ||
273 | at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
274 | } | ||
275 | |||
276 | void __init at91_ioremap_shdwc(u32 base_addr) | ||
277 | { | ||
278 | at91_shdwc_base = ioremap(base_addr, 16); | ||
279 | if (!at91_shdwc_base) | ||
280 | panic("Impossible to ioremap at91_shdwc_base\n"); | ||
281 | pm_power_off = at91sam9_poweroff; | ||
282 | } | ||
283 | |||
270 | void __init at91_initialize(unsigned long main_clock) | 284 | void __init at91_initialize(unsigned long main_clock) |
271 | { | 285 | { |
286 | at91_boot_soc.ioremap_registers(); | ||
287 | |||
272 | /* Init clock subsystem */ | 288 | /* Init clock subsystem */ |
273 | at91_clock_init(main_clock); | 289 | at91_clock_init(main_clock); |
274 | 290 | ||
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index 21ed8816e6f7..4588ae6f7acd 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h | |||
@@ -7,6 +7,7 @@ | |||
7 | struct at91_init_soc { | 7 | struct at91_init_soc { |
8 | unsigned int *default_irq_priority; | 8 | unsigned int *default_irq_priority; |
9 | void (*map_io)(void); | 9 | void (*map_io)(void); |
10 | void (*ioremap_registers)(void); | ||
10 | void (*register_clocks)(void); | 11 | void (*register_clocks)(void); |
11 | void (*init)(void); | 12 | void (*init)(void); |
12 | }; | 13 | }; |
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c index 31a143592c81..9e5e7552498c 100644 --- a/arch/arm/mach-bcmring/arch.c +++ b/arch/arm/mach-bcmring/arch.c | |||
@@ -49,7 +49,29 @@ HW_DECLARE_SPINLOCK(gpio) | |||
49 | #endif | 49 | #endif |
50 | 50 | ||
51 | /* sysctl */ | 51 | /* sysctl */ |
52 | int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */ | 52 | static int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */ |
53 | |||
54 | static void bcmring_restart(char mode, const char *cmd) | ||
55 | { | ||
56 | printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); | ||
57 | |||
58 | if (mode == 'h') { | ||
59 | /* Reboot configured in proc entry */ | ||
60 | if (bcmring_arch_warm_reboot) { | ||
61 | printk("warm reset\n"); | ||
62 | /* Issue Warm reset (do not reset ethernet switch, keep alive) */ | ||
63 | chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM); | ||
64 | } else { | ||
65 | /* Force reset of everything */ | ||
66 | printk("force reset\n"); | ||
67 | chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); | ||
68 | } | ||
69 | } else { | ||
70 | /* Force reset of everything */ | ||
71 | printk("force reset\n"); | ||
72 | chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); | ||
73 | } | ||
74 | } | ||
53 | 75 | ||
54 | static struct ctl_table_header *bcmring_sysctl_header; | 76 | static struct ctl_table_header *bcmring_sysctl_header; |
55 | 77 | ||
@@ -173,4 +195,5 @@ MACHINE_START(BCMRING, "BCMRING") | |||
173 | .init_irq = bcmring_init_irq, | 195 | .init_irq = bcmring_init_irq, |
174 | .timer = &bcmring_timer, | 196 | .timer = &bcmring_timer, |
175 | .init_machine = bcmring_init_machine | 197 | .init_machine = bcmring_init_machine |
198 | .restart = bcmring_restart, | ||
176 | MACHINE_END | 199 | MACHINE_END |
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h index 38b37060d426..cb78250db649 100644 --- a/arch/arm/mach-bcmring/include/mach/system.h +++ b/arch/arm/mach-bcmring/include/mach/system.h | |||
@@ -20,35 +20,9 @@ | |||
20 | #ifndef __ASM_ARCH_SYSTEM_H | 20 | #ifndef __ASM_ARCH_SYSTEM_H |
21 | #define __ASM_ARCH_SYSTEM_H | 21 | #define __ASM_ARCH_SYSTEM_H |
22 | 22 | ||
23 | #include <mach/csp/chipcHw_inline.h> | ||
24 | |||
25 | extern int bcmring_arch_warm_reboot; | ||
26 | |||
27 | static inline void arch_idle(void) | 23 | static inline void arch_idle(void) |
28 | { | 24 | { |
29 | cpu_do_idle(); | 25 | cpu_do_idle(); |
30 | } | 26 | } |
31 | 27 | ||
32 | static inline void arch_reset(char mode, const char *cmd) | ||
33 | { | ||
34 | printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); | ||
35 | |||
36 | if (mode == 'h') { | ||
37 | /* Reboot configured in proc entry */ | ||
38 | if (bcmring_arch_warm_reboot) { | ||
39 | printk("warm reset\n"); | ||
40 | /* Issue Warm reset (do not reset ethernet switch, keep alive) */ | ||
41 | chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM); | ||
42 | } else { | ||
43 | /* Force reset of everything */ | ||
44 | printk("force reset\n"); | ||
45 | chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); | ||
46 | } | ||
47 | } else { | ||
48 | /* Force reset of everything */ | ||
49 | printk("force reset\n"); | ||
50 | chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); | ||
51 | } | ||
52 | } | ||
53 | |||
54 | #endif | 28 | #endif |
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c index 0276091b7f86..3fb79a1d0bde 100644 --- a/arch/arm/mach-clps711x/autcpu12.c +++ b/arch/arm/mach-clps711x/autcpu12.c | |||
@@ -68,5 +68,6 @@ MACHINE_START(AUTCPU12, "autronix autcpu12") | |||
68 | .map_io = autcpu12_map_io, | 68 | .map_io = autcpu12_map_io, |
69 | .init_irq = clps711x_init_irq, | 69 | .init_irq = clps711x_init_irq, |
70 | .timer = &clps711x_timer, | 70 | .timer = &clps711x_timer, |
71 | .restart = clps711x_restart, | ||
71 | MACHINE_END | 72 | MACHINE_END |
72 | 73 | ||
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c index 25b3bfd0e85a..c314f49d6ef6 100644 --- a/arch/arm/mach-clps711x/cdb89712.c +++ b/arch/arm/mach-clps711x/cdb89712.c | |||
@@ -59,4 +59,5 @@ MACHINE_START(CDB89712, "Cirrus-CDB89712") | |||
59 | .map_io = cdb89712_map_io, | 59 | .map_io = cdb89712_map_io, |
60 | .init_irq = clps711x_init_irq, | 60 | .init_irq = clps711x_init_irq, |
61 | .timer = &clps711x_timer, | 61 | .timer = &clps711x_timer, |
62 | .restart = clps711x_restart, | ||
62 | MACHINE_END | 63 | MACHINE_END |
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c index 1df9ec67aa92..a70147e347ac 100644 --- a/arch/arm/mach-clps711x/ceiva.c +++ b/arch/arm/mach-clps711x/ceiva.c | |||
@@ -60,4 +60,5 @@ MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame") | |||
60 | .map_io = ceiva_map_io, | 60 | .map_io = ceiva_map_io, |
61 | .init_irq = clps711x_init_irq, | 61 | .init_irq = clps711x_init_irq, |
62 | .timer = &clps711x_timer, | 62 | .timer = &clps711x_timer, |
63 | .restart = clps711x_restart, | ||
63 | MACHINE_END | 64 | MACHINE_END |
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c index 80496c09ac59..dbc7842639dc 100644 --- a/arch/arm/mach-clps711x/clep7312.c +++ b/arch/arm/mach-clps711x/clep7312.c | |||
@@ -41,5 +41,6 @@ MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312") | |||
41 | .map_io = clps711x_map_io, | 41 | .map_io = clps711x_map_io, |
42 | .init_irq = clps711x_init_irq, | 42 | .init_irq = clps711x_init_irq, |
43 | .timer = &clps711x_timer, | 43 | .timer = &clps711x_timer, |
44 | .restart = clps711x_restart, | ||
44 | MACHINE_END | 45 | MACHINE_END |
45 | 46 | ||
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index ced2a4e406f4..ab1711b9b4d6 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c | |||
@@ -220,3 +220,8 @@ struct sys_timer clps711x_timer = { | |||
220 | .init = clps711x_timer_init, | 220 | .init = clps711x_timer_init, |
221 | .offset = clps711x_gettimeoffset, | 221 | .offset = clps711x_gettimeoffset, |
222 | }; | 222 | }; |
223 | |||
224 | void clps711x_restart(char mode, const char *cmd) | ||
225 | { | ||
226 | soft_restart(0); | ||
227 | } | ||
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h index 2b8b801f1dc3..fc0f0650dcb5 100644 --- a/arch/arm/mach-clps711x/common.h +++ b/arch/arm/mach-clps711x/common.h | |||
@@ -9,3 +9,4 @@ struct sys_timer; | |||
9 | extern void clps711x_map_io(void); | 9 | extern void clps711x_map_io(void); |
10 | extern void clps711x_init_irq(void); | 10 | extern void clps711x_init_irq(void); |
11 | extern struct sys_timer clps711x_timer; | 11 | extern struct sys_timer clps711x_timer; |
12 | extern void clps711x_restart(char mode, const char *cmd); | ||
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c index 9721f6111dc0..5fad0b4f40ad 100644 --- a/arch/arm/mach-clps711x/edb7211-arch.c +++ b/arch/arm/mach-clps711x/edb7211-arch.c | |||
@@ -62,4 +62,5 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)") | |||
62 | .reserve = edb7211_reserve, | 62 | .reserve = edb7211_reserve, |
63 | .init_irq = clps711x_init_irq, | 63 | .init_irq = clps711x_init_irq, |
64 | .timer = &clps711x_timer, | 64 | .timer = &clps711x_timer, |
65 | .restart = clps711x_restart, | ||
65 | MACHINE_END | 66 | MACHINE_END |
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c index d99256687298..3a3f0b702cb4 100644 --- a/arch/arm/mach-clps711x/fortunet.c +++ b/arch/arm/mach-clps711x/fortunet.c | |||
@@ -78,4 +78,5 @@ MACHINE_START(FORTUNET, "ARM-FortuNet") | |||
78 | .map_io = clps711x_map_io, | 78 | .map_io = clps711x_map_io, |
79 | .init_irq = clps711x_init_irq, | 79 | .init_irq = clps711x_init_irq, |
80 | .timer = &clps711x_timer, | 80 | .timer = &clps711x_timer, |
81 | .restart = clps711x_restart, | ||
81 | MACHINE_END | 82 | MACHINE_END |
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h index 6c119937d398..23d6ef8c84da 100644 --- a/arch/arm/mach-clps711x/include/mach/system.h +++ b/arch/arm/mach-clps711x/include/mach/system.h | |||
@@ -32,9 +32,4 @@ static inline void arch_idle(void) | |||
32 | mov r0, r0"); | 32 | mov r0, r0"); |
33 | } | 33 | } |
34 | 34 | ||
35 | static inline void arch_reset(char mode, const char *cmd) | ||
36 | { | ||
37 | soft_restart(0); | ||
38 | } | ||
39 | |||
40 | #endif | 35 | #endif |
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index 6ecea95f38b2..42ee8f33eafb 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c | |||
@@ -93,6 +93,7 @@ MACHINE_START(P720T, "ARM-Prospector720T") | |||
93 | .map_io = p720t_map_io, | 93 | .map_io = p720t_map_io, |
94 | .init_irq = clps711x_init_irq, | 94 | .init_irq = clps711x_init_irq, |
95 | .timer = &clps711x_timer, | 95 | .timer = &clps711x_timer, |
96 | .restart = clps711x_restart, | ||
96 | MACHINE_END | 97 | MACHINE_END |
97 | 98 | ||
98 | static int p720t_hw_init(void) | 99 | static int p720t_hw_init(void) |
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c index 594852fe24cc..2c5fb4c7e509 100644 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c | |||
@@ -204,4 +204,5 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") | |||
204 | .timer = &cns3xxx_timer, | 204 | .timer = &cns3xxx_timer, |
205 | .handle_irq = gic_handle_irq, | 205 | .handle_irq = gic_handle_irq, |
206 | .init_machine = cns3420_init, | 206 | .init_machine = cns3420_init, |
207 | .restart = cns3xxx_restart, | ||
207 | MACHINE_END | 208 | MACHINE_END |
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h index fcd225343c61..4894b8c17151 100644 --- a/arch/arm/mach-cns3xxx/core.h +++ b/arch/arm/mach-cns3xxx/core.h | |||
@@ -22,5 +22,6 @@ static inline void cns3xxx_l2x0_init(void) {} | |||
22 | void __init cns3xxx_map_io(void); | 22 | void __init cns3xxx_map_io(void); |
23 | void __init cns3xxx_init_irq(void); | 23 | void __init cns3xxx_init_irq(void); |
24 | void cns3xxx_power_off(void); | 24 | void cns3xxx_power_off(void); |
25 | void cns3xxx_restart(char, const char *); | ||
25 | 26 | ||
26 | #endif /* __CNS3XXX_CORE_H */ | 27 | #endif /* __CNS3XXX_CORE_H */ |
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h index 4f16c9b79f78..9e56b7dc133a 100644 --- a/arch/arm/mach-cns3xxx/include/mach/system.h +++ b/arch/arm/mach-cns3xxx/include/mach/system.h | |||
@@ -11,7 +11,6 @@ | |||
11 | #ifndef __MACH_SYSTEM_H | 11 | #ifndef __MACH_SYSTEM_H |
12 | #define __MACH_SYSTEM_H | 12 | #define __MACH_SYSTEM_H |
13 | 13 | ||
14 | #include <linux/io.h> | ||
15 | #include <asm/proc-fns.h> | 14 | #include <asm/proc-fns.h> |
16 | 15 | ||
17 | static inline void arch_idle(void) | 16 | static inline void arch_idle(void) |
@@ -23,6 +22,4 @@ static inline void arch_idle(void) | |||
23 | cpu_do_idle(); | 22 | cpu_do_idle(); |
24 | } | 23 | } |
25 | 24 | ||
26 | void arch_reset(char mode, const char *cmd); | ||
27 | |||
28 | #endif | 25 | #endif |
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c index 0c04678615ce..36458080332a 100644 --- a/arch/arm/mach-cns3xxx/pm.c +++ b/arch/arm/mach-cns3xxx/pm.c | |||
@@ -11,9 +11,9 @@ | |||
11 | #include <linux/io.h> | 11 | #include <linux/io.h> |
12 | #include <linux/delay.h> | 12 | #include <linux/delay.h> |
13 | #include <linux/atomic.h> | 13 | #include <linux/atomic.h> |
14 | #include <mach/system.h> | ||
15 | #include <mach/cns3xxx.h> | 14 | #include <mach/cns3xxx.h> |
16 | #include <mach/pm.h> | 15 | #include <mach/pm.h> |
16 | #include "core.h" | ||
17 | 17 | ||
18 | void cns3xxx_pwr_clk_en(unsigned int block) | 18 | void cns3xxx_pwr_clk_en(unsigned int block) |
19 | { | 19 | { |
@@ -89,7 +89,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block) | |||
89 | } | 89 | } |
90 | EXPORT_SYMBOL(cns3xxx_pwr_soft_rst); | 90 | EXPORT_SYMBOL(cns3xxx_pwr_soft_rst); |
91 | 91 | ||
92 | void arch_reset(char mode, const char *cmd) | 92 | void cns3xxx_restart(char mode, const char *cmd) |
93 | { | 93 | { |
94 | /* | 94 | /* |
95 | * To reset, we hit the on-board reset register | 95 | * To reset, we hit the on-board reset register |
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 11c3db985285..dc1afe5be20c 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c | |||
@@ -682,4 +682,5 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") | |||
682 | .timer = &davinci_timer, | 682 | .timer = &davinci_timer, |
683 | .init_machine = da830_evm_init, | 683 | .init_machine = da830_evm_init, |
684 | .dma_zone_size = SZ_128M, | 684 | .dma_zone_size = SZ_128M, |
685 | .restart = da8xx_restart, | ||
685 | MACHINE_END | 686 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 6659a90dbcad..f8a682f60a42 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
@@ -1411,4 +1411,5 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") | |||
1411 | .timer = &davinci_timer, | 1411 | .timer = &davinci_timer, |
1412 | .init_machine = da850_evm_init, | 1412 | .init_machine = da850_evm_init, |
1413 | .dma_zone_size = SZ_128M, | 1413 | .dma_zone_size = SZ_128M, |
1414 | .restart = da8xx_restart, | ||
1414 | MACHINE_END | 1415 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index 4e0e707c313d..275341f159fb 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
@@ -357,4 +357,5 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") | |||
357 | .timer = &davinci_timer, | 357 | .timer = &davinci_timer, |
358 | .init_machine = dm355_evm_init, | 358 | .init_machine = dm355_evm_init, |
359 | .dma_zone_size = SZ_128M, | 359 | .dma_zone_size = SZ_128M, |
360 | .restart = davinci_restart, | ||
360 | MACHINE_END | 361 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index ff2d2413279a..e99db28181ae 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c | |||
@@ -276,4 +276,5 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard") | |||
276 | .timer = &davinci_timer, | 276 | .timer = &davinci_timer, |
277 | .init_machine = dm355_leopard_init, | 277 | .init_machine = dm355_leopard_init, |
278 | .dma_zone_size = SZ_128M, | 278 | .dma_zone_size = SZ_128M, |
279 | .restart = davinci_restart, | ||
279 | MACHINE_END | 280 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 46e1f4173b97..346e1de2f5a8 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -618,5 +618,6 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") | |||
618 | .timer = &davinci_timer, | 618 | .timer = &davinci_timer, |
619 | .init_machine = dm365_evm_init, | 619 | .init_machine = dm365_evm_init, |
620 | .dma_zone_size = SZ_128M, | 620 | .dma_zone_size = SZ_128M, |
621 | .restart = davinci_restart, | ||
621 | MACHINE_END | 622 | MACHINE_END |
622 | 623 | ||
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 0cf8abf78d33..a64b49cfedca 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -719,4 +719,5 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") | |||
719 | .timer = &davinci_timer, | 719 | .timer = &davinci_timer, |
720 | .init_machine = davinci_evm_init, | 720 | .init_machine = davinci_evm_init, |
721 | .dma_zone_size = SZ_128M, | 721 | .dma_zone_size = SZ_128M, |
722 | .restart = davinci_restart, | ||
722 | MACHINE_END | 723 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 635bf7740157..64017558860b 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -799,6 +799,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") | |||
799 | .timer = &davinci_timer, | 799 | .timer = &davinci_timer, |
800 | .init_machine = evm_init, | 800 | .init_machine = evm_init, |
801 | .dma_zone_size = SZ_128M, | 801 | .dma_zone_size = SZ_128M, |
802 | .restart = davinci_restart, | ||
802 | MACHINE_END | 803 | MACHINE_END |
803 | 804 | ||
804 | MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") | 805 | MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") |
@@ -808,5 +809,6 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") | |||
808 | .timer = &davinci_timer, | 809 | .timer = &davinci_timer, |
809 | .init_machine = evm_init, | 810 | .init_machine = evm_init, |
810 | .dma_zone_size = SZ_128M, | 811 | .dma_zone_size = SZ_128M, |
812 | .restart = davinci_restart, | ||
811 | MACHINE_END | 813 | MACHINE_END |
812 | 814 | ||
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 3cfff555e8f2..672d820e2aa4 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c | |||
@@ -573,4 +573,5 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808") | |||
573 | .timer = &davinci_timer, | 573 | .timer = &davinci_timer, |
574 | .init_machine = mityomapl138_init, | 574 | .init_machine = mityomapl138_init, |
575 | .dma_zone_size = SZ_128M, | 575 | .dma_zone_size = SZ_128M, |
576 | .restart = da8xx_restart, | ||
576 | MACHINE_END | 577 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index e5f231aefee4..6c4a16415d47 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c | |||
@@ -278,4 +278,5 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2") | |||
278 | .timer = &davinci_timer, | 278 | .timer = &davinci_timer, |
279 | .init_machine = davinci_ntosd2_init, | 279 | .init_machine = davinci_ntosd2_init, |
280 | .dma_zone_size = SZ_128M, | 280 | .dma_zone_size = SZ_128M, |
281 | .restart = davinci_restart, | ||
281 | MACHINE_END | 282 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index c6701e4a795c..e7c0c7c53493 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c | |||
@@ -344,4 +344,5 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard") | |||
344 | .timer = &davinci_timer, | 344 | .timer = &davinci_timer, |
345 | .init_machine = omapl138_hawk_init, | 345 | .init_machine = omapl138_hawk_init, |
346 | .dma_zone_size = SZ_128M, | 346 | .dma_zone_size = SZ_128M, |
347 | .restart = da8xx_restart, | ||
347 | MACHINE_END | 348 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index 5dd4da9d2308..0b136a831c59 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c | |||
@@ -157,4 +157,5 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR") | |||
157 | .timer = &davinci_timer, | 157 | .timer = &davinci_timer, |
158 | .init_machine = davinci_sffsdr_init, | 158 | .init_machine = davinci_sffsdr_init, |
159 | .dma_zone_size = SZ_128M, | 159 | .dma_zone_size = SZ_128M, |
160 | .restart = davinci_restart, | ||
160 | MACHINE_END | 161 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c index f69e40a29e02..5f14e30b00d8 100644 --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c | |||
@@ -283,4 +283,5 @@ MACHINE_START(TNETV107X, "TNETV107X EVM") | |||
283 | .timer = &davinci_timer, | 283 | .timer = &davinci_timer, |
284 | .init_machine = tnetv107x_evm_board_init, | 284 | .init_machine = tnetv107x_evm_board_init, |
285 | .dma_zone_size = SZ_128M, | 285 | .dma_zone_size = SZ_128M, |
286 | .restart = tnetv107x_restart, | ||
286 | MACHINE_END | 287 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c index 865ffe5899ac..cb9b2e47510c 100644 --- a/arch/arm/mach-davinci/common.c +++ b/arch/arm/mach-davinci/common.c | |||
@@ -97,9 +97,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info) | |||
97 | local_flush_tlb_all(); | 97 | local_flush_tlb_all(); |
98 | flush_cache_all(); | 98 | flush_cache_all(); |
99 | 99 | ||
100 | if (!davinci_soc_info.reset) | ||
101 | davinci_soc_info.reset = davinci_watchdog_reset; | ||
102 | |||
103 | /* | 100 | /* |
104 | * We want to check CPU revision early for cpu_is_xxxx() macros. | 101 | * We want to check CPU revision early for cpu_is_xxxx() macros. |
105 | * IO space mapping must be initialized before we can do that. | 102 | * IO space mapping must be initialized before we can do that. |
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index a6bf5dcaef13..deee5c2da754 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c | |||
@@ -1201,7 +1201,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = { | |||
1201 | .gpio_irq = IRQ_DA8XX_GPIO0, | 1201 | .gpio_irq = IRQ_DA8XX_GPIO0, |
1202 | .serial_dev = &da8xx_serial_device, | 1202 | .serial_dev = &da8xx_serial_device, |
1203 | .emac_pdata = &da8xx_emac_pdata, | 1203 | .emac_pdata = &da8xx_emac_pdata, |
1204 | .reset_device = &da8xx_wdt_device, | ||
1205 | }; | 1204 | }; |
1206 | 1205 | ||
1207 | void __init da830_init(void) | 1206 | void __init da830_init(void) |
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index b047f8702278..0ed7fdb64efb 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
@@ -1121,7 +1121,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = { | |||
1121 | .emac_pdata = &da8xx_emac_pdata, | 1121 | .emac_pdata = &da8xx_emac_pdata, |
1122 | .sram_dma = DA8XX_ARM_RAM_BASE, | 1122 | .sram_dma = DA8XX_ARM_RAM_BASE, |
1123 | .sram_len = SZ_8K, | 1123 | .sram_len = SZ_8K, |
1124 | .reset_device = &da8xx_wdt_device, | ||
1125 | }; | 1124 | }; |
1126 | 1125 | ||
1127 | void __init da850_init(void) | 1126 | void __init da850_init(void) |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 68def7188868..42dbf3dc11ab 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -363,6 +363,11 @@ struct platform_device da8xx_wdt_device = { | |||
363 | .resource = da8xx_watchdog_resources, | 363 | .resource = da8xx_watchdog_resources, |
364 | }; | 364 | }; |
365 | 365 | ||
366 | void da8xx_restart(char mode, const char *cmd) | ||
367 | { | ||
368 | davinci_watchdog_reset(&da8xx_wdt_device); | ||
369 | } | ||
370 | |||
366 | int __init da8xx_register_watchdog(void) | 371 | int __init da8xx_register_watchdog(void) |
367 | { | 372 | { |
368 | return platform_device_register(&da8xx_wdt_device); | 373 | return platform_device_register(&da8xx_wdt_device); |
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 806a2f02b980..50c0156b4262 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c | |||
@@ -291,6 +291,11 @@ struct platform_device davinci_wdt_device = { | |||
291 | .resource = wdt_resources, | 291 | .resource = wdt_resources, |
292 | }; | 292 | }; |
293 | 293 | ||
294 | void davinci_restart(char mode, const char *cmd) | ||
295 | { | ||
296 | davinci_watchdog_reset(&davinci_wdt_device); | ||
297 | } | ||
298 | |||
294 | static void davinci_init_wdt(void) | 299 | static void davinci_init_wdt(void) |
295 | { | 300 | { |
296 | platform_device_register(&davinci_wdt_device); | 301 | platform_device_register(&davinci_wdt_device); |
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index fe520d4167a2..19667cfc5de0 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -853,7 +853,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = { | |||
853 | .serial_dev = &dm355_serial_device, | 853 | .serial_dev = &dm355_serial_device, |
854 | .sram_dma = 0x00010000, | 854 | .sram_dma = 0x00010000, |
855 | .sram_len = SZ_32K, | 855 | .sram_len = SZ_32K, |
856 | .reset_device = &davinci_wdt_device, | ||
857 | }; | 856 | }; |
858 | 857 | ||
859 | void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) | 858 | void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 679e168dce34..f15b435cc655 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -1083,7 +1083,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { | |||
1083 | .emac_pdata = &dm365_emac_pdata, | 1083 | .emac_pdata = &dm365_emac_pdata, |
1084 | .sram_dma = 0x00010000, | 1084 | .sram_dma = 0x00010000, |
1085 | .sram_len = SZ_32K, | 1085 | .sram_len = SZ_32K, |
1086 | .reset_device = &davinci_wdt_device, | ||
1087 | }; | 1086 | }; |
1088 | 1087 | ||
1089 | void __init dm365_init_asp(struct snd_platform_data *pdata) | 1088 | void __init dm365_init_asp(struct snd_platform_data *pdata) |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 3470983aa343..0800f9cf33bb 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -767,7 +767,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = { | |||
767 | .emac_pdata = &dm644x_emac_pdata, | 767 | .emac_pdata = &dm644x_emac_pdata, |
768 | .sram_dma = 0x00008000, | 768 | .sram_dma = 0x00008000, |
769 | .sram_len = SZ_16K, | 769 | .sram_len = SZ_16K, |
770 | .reset_device = &davinci_wdt_device, | ||
771 | }; | 770 | }; |
772 | 771 | ||
773 | void __init dm644x_init_asp(struct snd_platform_data *pdata) | 772 | void __init dm644x_init_asp(struct snd_platform_data *pdata) |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index af27c130595f..00f774394b16 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -854,7 +854,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = { | |||
854 | .emac_pdata = &dm646x_emac_pdata, | 854 | .emac_pdata = &dm646x_emac_pdata, |
855 | .sram_dma = 0x10010000, | 855 | .sram_dma = 0x10010000, |
856 | .sram_len = SZ_32K, | 856 | .sram_len = SZ_32K, |
857 | .reset_device = &davinci_wdt_device, | ||
858 | }; | 857 | }; |
859 | 858 | ||
860 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata) | 859 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata) |
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index a57cba21e21e..5cd39a4e0c96 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h | |||
@@ -77,14 +77,13 @@ struct davinci_soc_info { | |||
77 | struct emac_platform_data *emac_pdata; | 77 | struct emac_platform_data *emac_pdata; |
78 | dma_addr_t sram_dma; | 78 | dma_addr_t sram_dma; |
79 | unsigned sram_len; | 79 | unsigned sram_len; |
80 | struct platform_device *reset_device; | ||
81 | void (*reset)(struct platform_device *); | ||
82 | }; | 80 | }; |
83 | 81 | ||
84 | extern struct davinci_soc_info davinci_soc_info; | 82 | extern struct davinci_soc_info davinci_soc_info; |
85 | 83 | ||
86 | extern void davinci_common_init(struct davinci_soc_info *soc_info); | 84 | extern void davinci_common_init(struct davinci_soc_info *soc_info); |
87 | extern void davinci_init_ide(void); | 85 | extern void davinci_init_ide(void); |
86 | void davinci_restart(char mode, const char *cmd); | ||
88 | 87 | ||
89 | /* standard place to map on-chip SRAMs; they *may* support DMA */ | 88 | /* standard place to map on-chip SRAMs; they *may* support DMA */ |
90 | #define SRAM_VIRT 0xfffe0000 | 89 | #define SRAM_VIRT 0xfffe0000 |
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index eaca7d8b9d68..ee3461d7ec1b 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
@@ -91,6 +91,7 @@ int da8xx_register_cpuidle(void); | |||
91 | void __iomem * __init da8xx_get_mem_ctlr(void); | 91 | void __iomem * __init da8xx_get_mem_ctlr(void); |
92 | int da850_register_pm(struct platform_device *pdev); | 92 | int da850_register_pm(struct platform_device *pdev); |
93 | int __init da850_register_sata(unsigned long refclkpn); | 93 | int __init da850_register_sata(unsigned long refclkpn); |
94 | void da8xx_restart(char mode, const char *cmd); | ||
94 | 95 | ||
95 | extern struct platform_device da8xx_serial_device; | 96 | extern struct platform_device da8xx_serial_device; |
96 | extern struct emac_platform_data da8xx_emac_pdata; | 97 | extern struct emac_platform_data da8xx_emac_pdata; |
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index 2a00fe5ac253..a8ee6c9f0bb0 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/i2c.h> | 16 | #include <linux/i2c.h> |
17 | #include <linux/videodev2.h> | 17 | #include <linux/videodev2.h> |
18 | #include <linux/davinci_emac.h> | 18 | #include <linux/davinci_emac.h> |
19 | #include <media/davinci/vpif_types.h> | ||
19 | 20 | ||
20 | #define DM646X_EMAC_BASE (0x01C80000) | 21 | #define DM646X_EMAC_BASE (0x01C80000) |
21 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) | 22 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) |
@@ -34,58 +35,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv); | |||
34 | 35 | ||
35 | void dm646x_video_init(void); | 36 | void dm646x_video_init(void); |
36 | 37 | ||
37 | enum vpif_if_type { | ||
38 | VPIF_IF_BT656, | ||
39 | VPIF_IF_BT1120, | ||
40 | VPIF_IF_RAW_BAYER | ||
41 | }; | ||
42 | |||
43 | struct vpif_interface { | ||
44 | enum vpif_if_type if_type; | ||
45 | unsigned hd_pol:1; | ||
46 | unsigned vd_pol:1; | ||
47 | unsigned fid_pol:1; | ||
48 | }; | ||
49 | |||
50 | struct vpif_subdev_info { | ||
51 | const char *name; | ||
52 | struct i2c_board_info board_info; | ||
53 | u32 input; | ||
54 | u32 output; | ||
55 | unsigned can_route:1; | ||
56 | struct vpif_interface vpif_if; | ||
57 | }; | ||
58 | |||
59 | struct vpif_display_config { | ||
60 | int (*set_clock)(int, int); | ||
61 | struct vpif_subdev_info *subdevinfo; | ||
62 | int subdev_count; | ||
63 | const char **output; | ||
64 | int output_count; | ||
65 | const char *card_name; | ||
66 | }; | ||
67 | |||
68 | struct vpif_input { | ||
69 | struct v4l2_input input; | ||
70 | const char *subdev_name; | ||
71 | }; | ||
72 | |||
73 | #define VPIF_CAPTURE_MAX_CHANNELS 2 | ||
74 | |||
75 | struct vpif_capture_chan_config { | ||
76 | const struct vpif_input *inputs; | ||
77 | int input_count; | ||
78 | }; | ||
79 | |||
80 | struct vpif_capture_config { | ||
81 | int (*setup_input_channel_mode)(int); | ||
82 | int (*setup_input_path)(int, const char *); | ||
83 | struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS]; | ||
84 | struct vpif_subdev_info *subdev_info; | ||
85 | int subdev_count; | ||
86 | const char *card_name; | ||
87 | }; | ||
88 | |||
89 | void dm646x_setup_vpif(struct vpif_display_config *, | 38 | void dm646x_setup_vpif(struct vpif_display_config *, |
90 | struct vpif_capture_config *); | 39 | struct vpif_capture_config *); |
91 | 40 | ||
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h index e65629c20769..fcb7a015aba5 100644 --- a/arch/arm/mach-davinci/include/mach/system.h +++ b/arch/arm/mach-davinci/include/mach/system.h | |||
@@ -18,10 +18,4 @@ static inline void arch_idle(void) | |||
18 | cpu_do_idle(); | 18 | cpu_do_idle(); |
19 | } | 19 | } |
20 | 20 | ||
21 | static inline void arch_reset(char mode, const char *cmd) | ||
22 | { | ||
23 | if (davinci_soc_info.reset) | ||
24 | davinci_soc_info.reset(davinci_soc_info.reset_device); | ||
25 | } | ||
26 | |||
27 | #endif /* __ASM_ARCH_SYSTEM_H */ | 21 | #endif /* __ASM_ARCH_SYSTEM_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h index 89c1fdc63c0b..83e5926f3c46 100644 --- a/arch/arm/mach-davinci/include/mach/tnetv107x.h +++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h | |||
@@ -54,6 +54,7 @@ extern struct platform_device tnetv107x_serial_device; | |||
54 | extern void __init tnetv107x_init(void); | 54 | extern void __init tnetv107x_init(void); |
55 | extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *); | 55 | extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *); |
56 | extern void __init tnetv107x_irq_init(void); | 56 | extern void __init tnetv107x_irq_init(void); |
57 | void tnetv107x_restart(char mode, const char *cmd); | ||
57 | 58 | ||
58 | #endif | 59 | #endif |
59 | 60 | ||
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c index 409bb869c7c7..dc1a209b9b66 100644 --- a/arch/arm/mach-davinci/tnetv107x.c +++ b/arch/arm/mach-davinci/tnetv107x.c | |||
@@ -730,6 +730,11 @@ static void tnetv107x_watchdog_reset(struct platform_device *pdev) | |||
730 | __raw_writel(1, ®s->kick); | 730 | __raw_writel(1, ®s->kick); |
731 | } | 731 | } |
732 | 732 | ||
733 | void tnetv107x_restart(char mode, const char *cmd) | ||
734 | { | ||
735 | tnetv107x_watchdog_reset(&tnetv107x_wdt_device); | ||
736 | } | ||
737 | |||
733 | static struct davinci_soc_info tnetv107x_soc_info = { | 738 | static struct davinci_soc_info tnetv107x_soc_info = { |
734 | .io_desc = io_desc, | 739 | .io_desc = io_desc, |
735 | .io_desc_num = ARRAY_SIZE(io_desc), | 740 | .io_desc_num = ARRAY_SIZE(io_desc), |
@@ -752,8 +757,6 @@ static struct davinci_soc_info tnetv107x_soc_info = { | |||
752 | .gpio_num = TNETV107X_N_GPIO, | 757 | .gpio_num = TNETV107X_N_GPIO, |
753 | .timer_info = &timer_info, | 758 | .timer_info = &timer_info, |
754 | .serial_dev = &tnetv107x_serial_device, | 759 | .serial_dev = &tnetv107x_serial_device, |
755 | .reset = tnetv107x_watchdog_reset, | ||
756 | .reset_device = &tnetv107x_wdt_device, | ||
757 | }; | 760 | }; |
758 | 761 | ||
759 | void __init tnetv107x_init(void) | 762 | void __init tnetv107x_init(void) |
diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c index c8a406f7e946..792b4e2e24f1 100644 --- a/arch/arm/mach-dove/cm-a510.c +++ b/arch/arm/mach-dove/cm-a510.c | |||
@@ -93,4 +93,5 @@ MACHINE_START(CM_A510, "Compulab CM-A510 Board") | |||
93 | .init_early = dove_init_early, | 93 | .init_early = dove_init_early, |
94 | .init_irq = dove_init_irq, | 94 | .init_irq = dove_init_irq, |
95 | .timer = &dove_timer, | 95 | .timer = &dove_timer, |
96 | .restart = dove_restart, | ||
96 | MACHINE_END | 97 | MACHINE_END |
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index a9e0dae86a26..13bb236cd0cd 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c | |||
@@ -292,3 +292,19 @@ void __init dove_init(void) | |||
292 | dove_xor0_init(); | 292 | dove_xor0_init(); |
293 | dove_xor1_init(); | 293 | dove_xor1_init(); |
294 | } | 294 | } |
295 | |||
296 | void dove_restart(char mode, const char *cmd) | ||
297 | { | ||
298 | /* | ||
299 | * Enable soft reset to assert RSTOUTn. | ||
300 | */ | ||
301 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
302 | |||
303 | /* | ||
304 | * Assert soft reset. | ||
305 | */ | ||
306 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
307 | |||
308 | while (1) | ||
309 | ; | ||
310 | } | ||
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h index 6a2046e44706..42027305c107 100644 --- a/arch/arm/mach-dove/common.h +++ b/arch/arm/mach-dove/common.h | |||
@@ -39,5 +39,6 @@ void dove_spi1_init(void); | |||
39 | void dove_i2c_init(void); | 39 | void dove_i2c_init(void); |
40 | void dove_sdio0_init(void); | 40 | void dove_sdio0_init(void); |
41 | void dove_sdio1_init(void); | 41 | void dove_sdio1_init(void); |
42 | void dove_restart(char, const char *); | ||
42 | 43 | ||
43 | #endif | 44 | #endif |
diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c index 11ea34e4fc76..ea77ae430b2d 100644 --- a/arch/arm/mach-dove/dove-db-setup.c +++ b/arch/arm/mach-dove/dove-db-setup.c | |||
@@ -100,4 +100,5 @@ MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board") | |||
100 | .init_early = dove_init_early, | 100 | .init_early = dove_init_early, |
101 | .init_irq = dove_init_irq, | 101 | .init_irq = dove_init_irq, |
102 | .timer = &dove_timer, | 102 | .timer = &dove_timer, |
103 | .restart = dove_restart, | ||
103 | MACHINE_END | 104 | MACHINE_END |
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h index 356afda56853..3027954f6162 100644 --- a/arch/arm/mach-dove/include/mach/system.h +++ b/arch/arm/mach-dove/include/mach/system.h | |||
@@ -9,28 +9,9 @@ | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | 9 | #ifndef __ASM_ARCH_SYSTEM_H |
10 | #define __ASM_ARCH_SYSTEM_H | 10 | #define __ASM_ARCH_SYSTEM_H |
11 | 11 | ||
12 | #include <mach/bridge-regs.h> | ||
13 | |||
14 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
15 | { | 13 | { |
16 | cpu_do_idle(); | 14 | cpu_do_idle(); |
17 | } | 15 | } |
18 | 16 | ||
19 | static inline void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | /* | ||
22 | * Enable soft reset to assert RSTOUTn. | ||
23 | */ | ||
24 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
25 | |||
26 | /* | ||
27 | * Assert soft reset. | ||
28 | */ | ||
29 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
30 | |||
31 | while (1) | ||
32 | ; | ||
33 | } | ||
34 | |||
35 | |||
36 | #endif | 17 | #endif |
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index ce3ed244c4b0..294aad07f7a0 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c | |||
@@ -278,6 +278,11 @@ static int __init ebsa110_init(void) | |||
278 | 278 | ||
279 | arch_initcall(ebsa110_init); | 279 | arch_initcall(ebsa110_init); |
280 | 280 | ||
281 | static void ebsa110_restart(char mode, const char *cmd) | ||
282 | { | ||
283 | soft_restart(0x80000000); | ||
284 | } | ||
285 | |||
281 | MACHINE_START(EBSA110, "EBSA110") | 286 | MACHINE_START(EBSA110, "EBSA110") |
282 | /* Maintainer: Russell King */ | 287 | /* Maintainer: Russell King */ |
283 | .atag_offset = 0x400, | 288 | .atag_offset = 0x400, |
@@ -287,4 +292,5 @@ MACHINE_START(EBSA110, "EBSA110") | |||
287 | .map_io = ebsa110_map_io, | 292 | .map_io = ebsa110_map_io, |
288 | .init_irq = ebsa110_init_irq, | 293 | .init_irq = ebsa110_init_irq, |
289 | .timer = &ebsa110_timer, | 294 | .timer = &ebsa110_timer, |
295 | .restart = ebsa110_restart, | ||
290 | MACHINE_END | 296 | MACHINE_END |
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h index 0d5df72a03f6..2e4af65edb6f 100644 --- a/arch/arm/mach-ebsa110/include/mach/system.h +++ b/arch/arm/mach-ebsa110/include/mach/system.h | |||
@@ -34,6 +34,4 @@ static inline void arch_idle(void) | |||
34 | asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); | 34 | asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); |
35 | } | 35 | } |
36 | 36 | ||
37 | #define arch_reset(mode, cmd) soft_restart(0x80000000) | ||
38 | |||
39 | #endif | 37 | #endif |
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c index d9b0ea2ba4d8..681e939407d4 100644 --- a/arch/arm/mach-ep93xx/adssphere.c +++ b/arch/arm/mach-ep93xx/adssphere.c | |||
@@ -40,4 +40,5 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board") | |||
40 | .handle_irq = vic_handle_irq, | 40 | .handle_irq = vic_handle_irq, |
41 | .timer = &ep93xx_timer, | 41 | .timer = &ep93xx_timer, |
42 | .init_machine = adssphere_init_machine, | 42 | .init_machine = adssphere_init_machine, |
43 | .restart = ep93xx_restart, | ||
43 | MACHINE_END | 44 | MACHINE_END |
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 2432a6b7dcac..24203f9a6796 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -906,3 +906,15 @@ void __init ep93xx_init_devices(void) | |||
906 | platform_device_register(&ep93xx_ohci_device); | 906 | platform_device_register(&ep93xx_ohci_device); |
907 | platform_device_register(&ep93xx_leds); | 907 | platform_device_register(&ep93xx_leds); |
908 | } | 908 | } |
909 | |||
910 | void ep93xx_restart(char mode, const char *cmd) | ||
911 | { | ||
912 | /* | ||
913 | * Set then clear the SWRST bit to initiate a software reset | ||
914 | */ | ||
915 | ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST); | ||
916 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST); | ||
917 | |||
918 | while (1) | ||
919 | ; | ||
920 | } | ||
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c index 9bbae0835f27..d115653edca3 100644 --- a/arch/arm/mach-ep93xx/edb93xx.c +++ b/arch/arm/mach-ep93xx/edb93xx.c | |||
@@ -254,6 +254,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board") | |||
254 | .handle_irq = vic_handle_irq, | 254 | .handle_irq = vic_handle_irq, |
255 | .timer = &ep93xx_timer, | 255 | .timer = &ep93xx_timer, |
256 | .init_machine = edb93xx_init_machine, | 256 | .init_machine = edb93xx_init_machine, |
257 | .restart = ep93xx_restart, | ||
257 | MACHINE_END | 258 | MACHINE_END |
258 | #endif | 259 | #endif |
259 | 260 | ||
@@ -266,6 +267,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board") | |||
266 | .handle_irq = vic_handle_irq, | 267 | .handle_irq = vic_handle_irq, |
267 | .timer = &ep93xx_timer, | 268 | .timer = &ep93xx_timer, |
268 | .init_machine = edb93xx_init_machine, | 269 | .init_machine = edb93xx_init_machine, |
270 | .restart = ep93xx_restart, | ||
269 | MACHINE_END | 271 | MACHINE_END |
270 | #endif | 272 | #endif |
271 | 273 | ||
@@ -278,6 +280,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board") | |||
278 | .handle_irq = vic_handle_irq, | 280 | .handle_irq = vic_handle_irq, |
279 | .timer = &ep93xx_timer, | 281 | .timer = &ep93xx_timer, |
280 | .init_machine = edb93xx_init_machine, | 282 | .init_machine = edb93xx_init_machine, |
283 | .restart = ep93xx_restart, | ||
281 | MACHINE_END | 284 | MACHINE_END |
282 | #endif | 285 | #endif |
283 | 286 | ||
@@ -290,6 +293,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board") | |||
290 | .handle_irq = vic_handle_irq, | 293 | .handle_irq = vic_handle_irq, |
291 | .timer = &ep93xx_timer, | 294 | .timer = &ep93xx_timer, |
292 | .init_machine = edb93xx_init_machine, | 295 | .init_machine = edb93xx_init_machine, |
296 | .restart = ep93xx_restart, | ||
293 | MACHINE_END | 297 | MACHINE_END |
294 | #endif | 298 | #endif |
295 | 299 | ||
@@ -302,6 +306,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board") | |||
302 | .handle_irq = vic_handle_irq, | 306 | .handle_irq = vic_handle_irq, |
303 | .timer = &ep93xx_timer, | 307 | .timer = &ep93xx_timer, |
304 | .init_machine = edb93xx_init_machine, | 308 | .init_machine = edb93xx_init_machine, |
309 | .restart = ep93xx_restart, | ||
305 | MACHINE_END | 310 | MACHINE_END |
306 | #endif | 311 | #endif |
307 | 312 | ||
@@ -314,6 +319,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board") | |||
314 | .handle_irq = vic_handle_irq, | 319 | .handle_irq = vic_handle_irq, |
315 | .timer = &ep93xx_timer, | 320 | .timer = &ep93xx_timer, |
316 | .init_machine = edb93xx_init_machine, | 321 | .init_machine = edb93xx_init_machine, |
322 | .restart = ep93xx_restart, | ||
317 | MACHINE_END | 323 | MACHINE_END |
318 | #endif | 324 | #endif |
319 | 325 | ||
@@ -326,6 +332,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board") | |||
326 | .handle_irq = vic_handle_irq, | 332 | .handle_irq = vic_handle_irq, |
327 | .timer = &ep93xx_timer, | 333 | .timer = &ep93xx_timer, |
328 | .init_machine = edb93xx_init_machine, | 334 | .init_machine = edb93xx_init_machine, |
335 | .restart = ep93xx_restart, | ||
329 | MACHINE_END | 336 | MACHINE_END |
330 | #endif | 337 | #endif |
331 | 338 | ||
@@ -338,5 +345,6 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board") | |||
338 | .handle_irq = vic_handle_irq, | 345 | .handle_irq = vic_handle_irq, |
339 | .timer = &ep93xx_timer, | 346 | .timer = &ep93xx_timer, |
340 | .init_machine = edb93xx_init_machine, | 347 | .init_machine = edb93xx_init_machine, |
348 | .restart = ep93xx_restart, | ||
341 | MACHINE_END | 349 | MACHINE_END |
342 | #endif | 350 | #endif |
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c index 1dd32a7c5f15..af46970dc58e 100644 --- a/arch/arm/mach-ep93xx/gesbc9312.c +++ b/arch/arm/mach-ep93xx/gesbc9312.c | |||
@@ -40,4 +40,5 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") | |||
40 | .handle_irq = vic_handle_irq, | 40 | .handle_irq = vic_handle_irq, |
41 | .timer = &ep93xx_timer, | 41 | .timer = &ep93xx_timer, |
42 | .init_machine = gesbc9312_init_machine, | 42 | .init_machine = gesbc9312_init_machine, |
43 | .restart = ep93xx_restart, | ||
43 | MACHINE_END | 44 | MACHINE_END |
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index 50660455b1d8..d4c934931f9d 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h | |||
@@ -66,4 +66,6 @@ void ep93xx_register_ac97(void); | |||
66 | void ep93xx_init_devices(void); | 66 | void ep93xx_init_devices(void); |
67 | extern struct sys_timer ep93xx_timer; | 67 | extern struct sys_timer ep93xx_timer; |
68 | 68 | ||
69 | void ep93xx_restart(char, const char *); | ||
70 | |||
69 | #endif | 71 | #endif |
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h index bdf6c4f1feef..b5bec7cb9b52 100644 --- a/arch/arm/mach-ep93xx/include/mach/system.h +++ b/arch/arm/mach-ep93xx/include/mach/system.h | |||
@@ -1,22 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-ep93xx/include/mach/system.h | 2 | * arch/arm/mach-ep93xx/include/mach/system.h |
3 | */ | 3 | */ |
4 | |||
5 | #include <mach/hardware.h> | ||
6 | |||
7 | static inline void arch_idle(void) | 4 | static inline void arch_idle(void) |
8 | { | 5 | { |
9 | cpu_do_idle(); | 6 | cpu_do_idle(); |
10 | } | 7 | } |
11 | |||
12 | static inline void arch_reset(char mode, const char *cmd) | ||
13 | { | ||
14 | /* | ||
15 | * Set then clear the SWRST bit to initiate a software reset | ||
16 | */ | ||
17 | ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST); | ||
18 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST); | ||
19 | |||
20 | while (1) | ||
21 | ; | ||
22 | } | ||
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c index a6dae6c2e3c1..7b98084f0c97 100644 --- a/arch/arm/mach-ep93xx/micro9.c +++ b/arch/arm/mach-ep93xx/micro9.c | |||
@@ -84,6 +84,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High") | |||
84 | .handle_irq = vic_handle_irq, | 84 | .handle_irq = vic_handle_irq, |
85 | .timer = &ep93xx_timer, | 85 | .timer = &ep93xx_timer, |
86 | .init_machine = micro9_init_machine, | 86 | .init_machine = micro9_init_machine, |
87 | .restart = ep93xx_restart, | ||
87 | MACHINE_END | 88 | MACHINE_END |
88 | #endif | 89 | #endif |
89 | 90 | ||
@@ -96,6 +97,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid") | |||
96 | .handle_irq = vic_handle_irq, | 97 | .handle_irq = vic_handle_irq, |
97 | .timer = &ep93xx_timer, | 98 | .timer = &ep93xx_timer, |
98 | .init_machine = micro9_init_machine, | 99 | .init_machine = micro9_init_machine, |
100 | .restart = ep93xx_restart, | ||
99 | MACHINE_END | 101 | MACHINE_END |
100 | #endif | 102 | #endif |
101 | 103 | ||
@@ -108,6 +110,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite") | |||
108 | .handle_irq = vic_handle_irq, | 110 | .handle_irq = vic_handle_irq, |
109 | .timer = &ep93xx_timer, | 111 | .timer = &ep93xx_timer, |
110 | .init_machine = micro9_init_machine, | 112 | .init_machine = micro9_init_machine, |
113 | .restart = ep93xx_restart, | ||
111 | MACHINE_END | 114 | MACHINE_END |
112 | #endif | 115 | #endif |
113 | 116 | ||
@@ -120,5 +123,6 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim") | |||
120 | .handle_irq = vic_handle_irq, | 123 | .handle_irq = vic_handle_irq, |
121 | .timer = &ep93xx_timer, | 124 | .timer = &ep93xx_timer, |
122 | .init_machine = micro9_init_machine, | 125 | .init_machine = micro9_init_machine, |
126 | .restart = ep93xx_restart, | ||
123 | MACHINE_END | 127 | MACHINE_END |
124 | #endif | 128 | #endif |
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c index 40121ba8e711..f4e553eca21c 100644 --- a/arch/arm/mach-ep93xx/simone.c +++ b/arch/arm/mach-ep93xx/simone.c | |||
@@ -84,4 +84,5 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board") | |||
84 | .handle_irq = vic_handle_irq, | 84 | .handle_irq = vic_handle_irq, |
85 | .timer = &ep93xx_timer, | 85 | .timer = &ep93xx_timer, |
86 | .init_machine = simone_init_machine, | 86 | .init_machine = simone_init_machine, |
87 | .restart = ep93xx_restart, | ||
87 | MACHINE_END | 88 | MACHINE_END |
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c index ec7c63ff01e2..fd846331ddff 100644 --- a/arch/arm/mach-ep93xx/snappercl15.c +++ b/arch/arm/mach-ep93xx/snappercl15.c | |||
@@ -181,4 +181,5 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15") | |||
181 | .handle_irq = vic_handle_irq, | 181 | .handle_irq = vic_handle_irq, |
182 | .timer = &ep93xx_timer, | 182 | .timer = &ep93xx_timer, |
183 | .init_machine = snappercl15_init_machine, | 183 | .init_machine = snappercl15_init_machine, |
184 | .restart = ep93xx_restart, | ||
184 | MACHINE_END | 185 | MACHINE_END |
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c index 760384e6407d..79f8ecf07a19 100644 --- a/arch/arm/mach-ep93xx/ts72xx.c +++ b/arch/arm/mach-ep93xx/ts72xx.c | |||
@@ -251,4 +251,5 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") | |||
251 | .handle_irq = vic_handle_irq, | 251 | .handle_irq = vic_handle_irq, |
252 | .timer = &ep93xx_timer, | 252 | .timer = &ep93xx_timer, |
253 | .init_machine = ts72xx_init_machine, | 253 | .init_machine = ts72xx_init_machine, |
254 | .restart = ep93xx_restart, | ||
254 | MACHINE_END | 255 | MACHINE_END |
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c index d96e4dbec6a8..03dd4012043e 100644 --- a/arch/arm/mach-ep93xx/vision_ep9307.c +++ b/arch/arm/mach-ep93xx/vision_ep9307.c | |||
@@ -361,4 +361,5 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") | |||
361 | .init_irq = ep93xx_init_irq, | 361 | .init_irq = ep93xx_init_irq, |
362 | .timer = &ep93xx_timer, | 362 | .timer = &ep93xx_timer, |
363 | .init_machine = vision_init_machine, | 363 | .init_machine = vision_init_machine, |
364 | .restart = ep93xx_restart, | ||
364 | MACHINE_END | 365 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 724ec0f3560d..b4bdf297e9fa 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -17,6 +17,8 @@ choice | |||
17 | 17 | ||
18 | config ARCH_EXYNOS4 | 18 | config ARCH_EXYNOS4 |
19 | bool "SAMSUNG EXYNOS4" | 19 | bool "SAMSUNG EXYNOS4" |
20 | select HAVE_SMP | ||
21 | select MIGHT_HAVE_CACHE_L2X0 | ||
20 | help | 22 | help |
21 | Samsung EXYNOS4 SoCs based systems | 23 | Samsung EXYNOS4 SoCs based systems |
22 | 24 | ||
@@ -57,6 +59,11 @@ config EXYNOS4_MCT | |||
57 | help | 59 | help |
58 | Use MCT (Multi Core Timer) as kernel timers | 60 | Use MCT (Multi Core Timer) as kernel timers |
59 | 61 | ||
62 | config EXYNOS4_DEV_DMA | ||
63 | bool | ||
64 | help | ||
65 | Compile in amba device definitions for DMA controller | ||
66 | |||
60 | config EXYNOS4_DEV_AHCI | 67 | config EXYNOS4_DEV_AHCI |
61 | bool | 68 | bool |
62 | help | 69 | help |
@@ -177,6 +184,7 @@ config MACH_SMDKV310 | |||
177 | select SAMSUNG_DEV_BACKLIGHT | 184 | select SAMSUNG_DEV_BACKLIGHT |
178 | select EXYNOS4_DEV_AHCI | 185 | select EXYNOS4_DEV_AHCI |
179 | select SAMSUNG_DEV_KEYPAD | 186 | select SAMSUNG_DEV_KEYPAD |
187 | select EXYNOS4_DEV_DMA | ||
180 | select EXYNOS4_DEV_PD | 188 | select EXYNOS4_DEV_PD |
181 | select SAMSUNG_DEV_PWM | 189 | select SAMSUNG_DEV_PWM |
182 | select EXYNOS4_DEV_SYSMMU | 190 | select EXYNOS4_DEV_SYSMMU |
@@ -197,6 +205,7 @@ config MACH_ARMLEX4210 | |||
197 | select S3C_DEV_HSMMC2 | 205 | select S3C_DEV_HSMMC2 |
198 | select S3C_DEV_HSMMC3 | 206 | select S3C_DEV_HSMMC3 |
199 | select EXYNOS4_DEV_AHCI | 207 | select EXYNOS4_DEV_AHCI |
208 | select EXYNOS4_DEV_DMA | ||
200 | select EXYNOS4_DEV_SYSMMU | 209 | select EXYNOS4_DEV_SYSMMU |
201 | select EXYNOS4_SETUP_SDHCI | 210 | select EXYNOS4_SETUP_SDHCI |
202 | help | 211 | help |
@@ -222,6 +231,7 @@ config MACH_UNIVERSAL_C210 | |||
222 | select S5P_DEV_MFC | 231 | select S5P_DEV_MFC |
223 | select S5P_DEV_ONENAND | 232 | select S5P_DEV_ONENAND |
224 | select S5P_DEV_TV | 233 | select S5P_DEV_TV |
234 | select EXYNOS4_DEV_DMA | ||
225 | select EXYNOS4_DEV_PD | 235 | select EXYNOS4_DEV_PD |
226 | select EXYNOS4_SETUP_FIMD0 | 236 | select EXYNOS4_SETUP_FIMD0 |
227 | select EXYNOS4_SETUP_I2C1 | 237 | select EXYNOS4_SETUP_I2C1 |
@@ -255,6 +265,7 @@ config MACH_NURI | |||
255 | select S5P_DEV_MFC | 265 | select S5P_DEV_MFC |
256 | select S5P_DEV_USB_EHCI | 266 | select S5P_DEV_USB_EHCI |
257 | select S5P_SETUP_MIPIPHY | 267 | select S5P_SETUP_MIPIPHY |
268 | select EXYNOS4_DEV_DMA | ||
258 | select EXYNOS4_DEV_PD | 269 | select EXYNOS4_DEV_PD |
259 | select EXYNOS4_SETUP_FIMC | 270 | select EXYNOS4_SETUP_FIMC |
260 | select EXYNOS4_SETUP_FIMD0 | 271 | select EXYNOS4_SETUP_FIMD0 |
@@ -287,6 +298,7 @@ config MACH_ORIGEN | |||
287 | select S5P_DEV_USB_EHCI | 298 | select S5P_DEV_USB_EHCI |
288 | select SAMSUNG_DEV_BACKLIGHT | 299 | select SAMSUNG_DEV_BACKLIGHT |
289 | select SAMSUNG_DEV_PWM | 300 | select SAMSUNG_DEV_PWM |
301 | select EXYNOS4_DEV_DMA | ||
290 | select EXYNOS4_DEV_PD | 302 | select EXYNOS4_DEV_PD |
291 | select EXYNOS4_SETUP_FIMD0 | 303 | select EXYNOS4_SETUP_FIMD0 |
292 | select EXYNOS4_SETUP_SDHCI | 304 | select EXYNOS4_SETUP_SDHCI |
@@ -327,6 +339,20 @@ config MACH_SMDK4412 | |||
327 | Machine support for Samsung SMDK4412 | 339 | Machine support for Samsung SMDK4412 |
328 | endif | 340 | endif |
329 | 341 | ||
342 | comment "Flattened Device Tree based board for Exynos4 based SoC" | ||
343 | |||
344 | config MACH_EXYNOS4_DT | ||
345 | bool "Samsung Exynos4 Machine using device tree" | ||
346 | select CPU_EXYNOS4210 | ||
347 | select USE_OF | ||
348 | select ARM_AMBA | ||
349 | select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD | ||
350 | help | ||
351 | Machine support for Samsung Exynos4 machine with device tree enabled. | ||
352 | Select this if a fdt blob is available for the Exynos4 SoC based board. | ||
353 | Note: This is under development and not all peripherals can be supported | ||
354 | with this machine file. | ||
355 | |||
330 | if ARCH_EXYNOS4 | 356 | if ARCH_EXYNOS4 |
331 | 357 | ||
332 | comment "Configuration for HSMMC 8-bit bus width" | 358 | comment "Configuration for HSMMC 8-bit bus width" |
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 59069a35e40b..ca85a99c159d 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile | |||
@@ -10,15 +10,17 @@ obj-m := | |||
10 | obj-n := | 10 | obj-n := |
11 | obj- := | 11 | obj- := |
12 | 12 | ||
13 | # Core support for EXYNOS4 system | 13 | # Core |
14 | 14 | ||
15 | obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o | 15 | obj-$(CONFIG_ARCH_EXYNOS4) += common.o clock.o |
16 | obj-$(CONFIG_ARCH_EXYNOS4) += irq-eint.o dma.o pmu.o | ||
17 | obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o | 16 | obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o |
18 | obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o | 17 | obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o |
18 | |||
19 | obj-$(CONFIG_PM) += pm.o | 19 | obj-$(CONFIG_PM) += pm.o |
20 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 20 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
21 | 21 | ||
22 | obj-$(CONFIG_ARCH_EXYNOS4) += pmu.o | ||
23 | |||
22 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o | 24 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
23 | 25 | ||
24 | obj-$(CONFIG_EXYNOS4_MCT) += mct.o | 26 | obj-$(CONFIG_EXYNOS4_MCT) += mct.o |
@@ -37,6 +39,8 @@ obj-$(CONFIG_MACH_ORIGEN) += mach-origen.o | |||
37 | obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4x12.o | 39 | obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4x12.o |
38 | obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o | 40 | obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o |
39 | 41 | ||
42 | obj-$(CONFIG_MACH_EXYNOS4_DT) += mach-exynos4-dt.o | ||
43 | |||
40 | # device support | 44 | # device support |
41 | 45 | ||
42 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o | 46 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o |
@@ -44,7 +48,9 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o | |||
44 | obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o | 48 | obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o |
45 | obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o | 49 | obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o |
46 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o | 50 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o |
51 | obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o | ||
47 | 52 | ||
53 | obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o | ||
48 | obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o | 54 | obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o |
49 | obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o | 55 | obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o |
50 | obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o | 56 | obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o |
@@ -55,6 +61,5 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C5) += setup-i2c5.o | |||
55 | obj-$(CONFIG_EXYNOS4_SETUP_I2C6) += setup-i2c6.o | 61 | obj-$(CONFIG_EXYNOS4_SETUP_I2C6) += setup-i2c6.o |
56 | obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o | 62 | obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o |
57 | obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o | 63 | obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o |
58 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o | ||
59 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 64 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
60 | obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o | 65 | obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o |
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c index b9d5ef670eb4..a5823a7f249e 100644 --- a/arch/arm/mach-exynos/clock-exynos4210.c +++ b/arch/arm/mach-exynos/clock-exynos4210.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <plat/pll.h> | 23 | #include <plat/pll.h> |
24 | #include <plat/s5p-clock.h> | 24 | #include <plat/s5p-clock.h> |
25 | #include <plat/clock-clksrc.h> | 25 | #include <plat/clock-clksrc.h> |
26 | #include <plat/exynos4.h> | ||
27 | #include <plat/pm.h> | 26 | #include <plat/pm.h> |
28 | 27 | ||
29 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
@@ -31,6 +30,8 @@ | |||
31 | #include <mach/regs-clock.h> | 30 | #include <mach/regs-clock.h> |
32 | #include <mach/exynos4-clock.h> | 31 | #include <mach/exynos4-clock.h> |
33 | 32 | ||
33 | #include "common.h" | ||
34 | |||
34 | static struct sleep_save exynos4210_clock_save[] = { | 35 | static struct sleep_save exynos4210_clock_save[] = { |
35 | SAVE_ITEM(S5P_CLKSRC_IMAGE), | 36 | SAVE_ITEM(S5P_CLKSRC_IMAGE), |
36 | SAVE_ITEM(S5P_CLKSRC_LCD1), | 37 | SAVE_ITEM(S5P_CLKSRC_LCD1), |
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c index 77d5decb34fd..26a668b0d101 100644 --- a/arch/arm/mach-exynos/clock-exynos4212.c +++ b/arch/arm/mach-exynos/clock-exynos4212.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <plat/pll.h> | 23 | #include <plat/pll.h> |
24 | #include <plat/s5p-clock.h> | 24 | #include <plat/s5p-clock.h> |
25 | #include <plat/clock-clksrc.h> | 25 | #include <plat/clock-clksrc.h> |
26 | #include <plat/exynos4.h> | ||
27 | #include <plat/pm.h> | 26 | #include <plat/pm.h> |
28 | 27 | ||
29 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
@@ -31,6 +30,8 @@ | |||
31 | #include <mach/regs-clock.h> | 30 | #include <mach/regs-clock.h> |
32 | #include <mach/exynos4-clock.h> | 31 | #include <mach/exynos4-clock.h> |
33 | 32 | ||
33 | #include "common.h" | ||
34 | |||
34 | static struct sleep_save exynos4212_clock_save[] = { | 35 | static struct sleep_save exynos4212_clock_save[] = { |
35 | SAVE_ITEM(S5P_CLKSRC_IMAGE), | 36 | SAVE_ITEM(S5P_CLKSRC_IMAGE), |
36 | SAVE_ITEM(S5P_CLKDIV_IMAGE), | 37 | SAVE_ITEM(S5P_CLKDIV_IMAGE), |
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index 2894f0adef5c..5d5250df33fd 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <plat/pll.h> | 21 | #include <plat/pll.h> |
22 | #include <plat/s5p-clock.h> | 22 | #include <plat/s5p-clock.h> |
23 | #include <plat/clock-clksrc.h> | 23 | #include <plat/clock-clksrc.h> |
24 | #include <plat/exynos4.h> | ||
25 | #include <plat/pm.h> | 24 | #include <plat/pm.h> |
26 | 25 | ||
27 | #include <mach/map.h> | 26 | #include <mach/map.h> |
@@ -29,6 +28,8 @@ | |||
29 | #include <mach/sysmmu.h> | 28 | #include <mach/sysmmu.h> |
30 | #include <mach/exynos4-clock.h> | 29 | #include <mach/exynos4-clock.h> |
31 | 30 | ||
31 | #include "common.h" | ||
32 | |||
32 | static struct sleep_save exynos4_clock_save[] = { | 33 | static struct sleep_save exynos4_clock_save[] = { |
33 | SAVE_ITEM(S5P_CLKDIV_LEFTBUS), | 34 | SAVE_ITEM(S5P_CLKDIV_LEFTBUS), |
34 | SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), | 35 | SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), |
@@ -553,16 +554,6 @@ static struct clk init_clocks_off[] = { | |||
553 | .enable = exynos4_clk_dac_ctrl, | 554 | .enable = exynos4_clk_dac_ctrl, |
554 | .ctrlbit = (1 << 0), | 555 | .ctrlbit = (1 << 0), |
555 | }, { | 556 | }, { |
556 | .name = "dma", | ||
557 | .devname = "dma-pl330.0", | ||
558 | .enable = exynos4_clk_ip_fsys_ctrl, | ||
559 | .ctrlbit = (1 << 0), | ||
560 | }, { | ||
561 | .name = "dma", | ||
562 | .devname = "dma-pl330.1", | ||
563 | .enable = exynos4_clk_ip_fsys_ctrl, | ||
564 | .ctrlbit = (1 << 1), | ||
565 | }, { | ||
566 | .name = "adc", | 557 | .name = "adc", |
567 | .enable = exynos4_clk_ip_peril_ctrl, | 558 | .enable = exynos4_clk_ip_peril_ctrl, |
568 | .ctrlbit = (1 << 15), | 559 | .ctrlbit = (1 << 15), |
@@ -778,6 +769,20 @@ static struct clk init_clocks[] = { | |||
778 | } | 769 | } |
779 | }; | 770 | }; |
780 | 771 | ||
772 | static struct clk clk_pdma0 = { | ||
773 | .name = "dma", | ||
774 | .devname = "dma-pl330.0", | ||
775 | .enable = exynos4_clk_ip_fsys_ctrl, | ||
776 | .ctrlbit = (1 << 0), | ||
777 | }; | ||
778 | |||
779 | static struct clk clk_pdma1 = { | ||
780 | .name = "dma", | ||
781 | .devname = "dma-pl330.1", | ||
782 | .enable = exynos4_clk_ip_fsys_ctrl, | ||
783 | .ctrlbit = (1 << 1), | ||
784 | }; | ||
785 | |||
781 | struct clk *clkset_group_list[] = { | 786 | struct clk *clkset_group_list[] = { |
782 | [0] = &clk_ext_xtal_mux, | 787 | [0] = &clk_ext_xtal_mux, |
783 | [1] = &clk_xusbxti, | 788 | [1] = &clk_xusbxti, |
@@ -1009,46 +1014,6 @@ static struct clksrc_clk clk_dout_mmc4 = { | |||
1009 | 1014 | ||
1010 | static struct clksrc_clk clksrcs[] = { | 1015 | static struct clksrc_clk clksrcs[] = { |
1011 | { | 1016 | { |
1012 | .clk = { | ||
1013 | .name = "uclk1", | ||
1014 | .devname = "s5pv210-uart.0", | ||
1015 | .enable = exynos4_clksrc_mask_peril0_ctrl, | ||
1016 | .ctrlbit = (1 << 0), | ||
1017 | }, | ||
1018 | .sources = &clkset_group, | ||
1019 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 }, | ||
1020 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 0, .size = 4 }, | ||
1021 | }, { | ||
1022 | .clk = { | ||
1023 | .name = "uclk1", | ||
1024 | .devname = "s5pv210-uart.1", | ||
1025 | .enable = exynos4_clksrc_mask_peril0_ctrl, | ||
1026 | .ctrlbit = (1 << 4), | ||
1027 | }, | ||
1028 | .sources = &clkset_group, | ||
1029 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 }, | ||
1030 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 4, .size = 4 }, | ||
1031 | }, { | ||
1032 | .clk = { | ||
1033 | .name = "uclk1", | ||
1034 | .devname = "s5pv210-uart.2", | ||
1035 | .enable = exynos4_clksrc_mask_peril0_ctrl, | ||
1036 | .ctrlbit = (1 << 8), | ||
1037 | }, | ||
1038 | .sources = &clkset_group, | ||
1039 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 }, | ||
1040 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 8, .size = 4 }, | ||
1041 | }, { | ||
1042 | .clk = { | ||
1043 | .name = "uclk1", | ||
1044 | .devname = "s5pv210-uart.3", | ||
1045 | .enable = exynos4_clksrc_mask_peril0_ctrl, | ||
1046 | .ctrlbit = (1 << 12), | ||
1047 | }, | ||
1048 | .sources = &clkset_group, | ||
1049 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 }, | ||
1050 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 }, | ||
1051 | }, { | ||
1052 | .clk = { | 1017 | .clk = { |
1053 | .name = "sclk_pwm", | 1018 | .name = "sclk_pwm", |
1054 | .enable = exynos4_clksrc_mask_peril0_ctrl, | 1019 | .enable = exynos4_clksrc_mask_peril0_ctrl, |
@@ -1192,42 +1157,6 @@ static struct clksrc_clk clksrcs[] = { | |||
1192 | .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 }, | 1157 | .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 }, |
1193 | }, { | 1158 | }, { |
1194 | .clk = { | 1159 | .clk = { |
1195 | .name = "sclk_mmc", | ||
1196 | .devname = "s3c-sdhci.0", | ||
1197 | .parent = &clk_dout_mmc0.clk, | ||
1198 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1199 | .ctrlbit = (1 << 0), | ||
1200 | }, | ||
1201 | .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 }, | ||
1202 | }, { | ||
1203 | .clk = { | ||
1204 | .name = "sclk_mmc", | ||
1205 | .devname = "s3c-sdhci.1", | ||
1206 | .parent = &clk_dout_mmc1.clk, | ||
1207 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1208 | .ctrlbit = (1 << 4), | ||
1209 | }, | ||
1210 | .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 }, | ||
1211 | }, { | ||
1212 | .clk = { | ||
1213 | .name = "sclk_mmc", | ||
1214 | .devname = "s3c-sdhci.2", | ||
1215 | .parent = &clk_dout_mmc2.clk, | ||
1216 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1217 | .ctrlbit = (1 << 8), | ||
1218 | }, | ||
1219 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 }, | ||
1220 | }, { | ||
1221 | .clk = { | ||
1222 | .name = "sclk_mmc", | ||
1223 | .devname = "s3c-sdhci.3", | ||
1224 | .parent = &clk_dout_mmc3.clk, | ||
1225 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1226 | .ctrlbit = (1 << 12), | ||
1227 | }, | ||
1228 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 }, | ||
1229 | }, { | ||
1230 | .clk = { | ||
1231 | .name = "sclk_dwmmc", | 1160 | .name = "sclk_dwmmc", |
1232 | .parent = &clk_dout_mmc4.clk, | 1161 | .parent = &clk_dout_mmc4.clk, |
1233 | .enable = exynos4_clksrc_mask_fsys_ctrl, | 1162 | .enable = exynos4_clksrc_mask_fsys_ctrl, |
@@ -1237,6 +1166,98 @@ static struct clksrc_clk clksrcs[] = { | |||
1237 | } | 1166 | } |
1238 | }; | 1167 | }; |
1239 | 1168 | ||
1169 | static struct clksrc_clk clk_sclk_uart0 = { | ||
1170 | .clk = { | ||
1171 | .name = "uclk1", | ||
1172 | .devname = "exynos4210-uart.0", | ||
1173 | .enable = exynos4_clksrc_mask_peril0_ctrl, | ||
1174 | .ctrlbit = (1 << 0), | ||
1175 | }, | ||
1176 | .sources = &clkset_group, | ||
1177 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 }, | ||
1178 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 0, .size = 4 }, | ||
1179 | }; | ||
1180 | |||
1181 | static struct clksrc_clk clk_sclk_uart1 = { | ||
1182 | .clk = { | ||
1183 | .name = "uclk1", | ||
1184 | .devname = "exynos4210-uart.1", | ||
1185 | .enable = exynos4_clksrc_mask_peril0_ctrl, | ||
1186 | .ctrlbit = (1 << 4), | ||
1187 | }, | ||
1188 | .sources = &clkset_group, | ||
1189 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 }, | ||
1190 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 4, .size = 4 }, | ||
1191 | }; | ||
1192 | |||
1193 | static struct clksrc_clk clk_sclk_uart2 = { | ||
1194 | .clk = { | ||
1195 | .name = "uclk1", | ||
1196 | .devname = "exynos4210-uart.2", | ||
1197 | .enable = exynos4_clksrc_mask_peril0_ctrl, | ||
1198 | .ctrlbit = (1 << 8), | ||
1199 | }, | ||
1200 | .sources = &clkset_group, | ||
1201 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 }, | ||
1202 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 8, .size = 4 }, | ||
1203 | }; | ||
1204 | |||
1205 | static struct clksrc_clk clk_sclk_uart3 = { | ||
1206 | .clk = { | ||
1207 | .name = "uclk1", | ||
1208 | .devname = "exynos4210-uart.3", | ||
1209 | .enable = exynos4_clksrc_mask_peril0_ctrl, | ||
1210 | .ctrlbit = (1 << 12), | ||
1211 | }, | ||
1212 | .sources = &clkset_group, | ||
1213 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 }, | ||
1214 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 }, | ||
1215 | }; | ||
1216 | |||
1217 | static struct clksrc_clk clk_sclk_mmc0 = { | ||
1218 | .clk = { | ||
1219 | .name = "sclk_mmc", | ||
1220 | .devname = "s3c-sdhci.0", | ||
1221 | .parent = &clk_dout_mmc0.clk, | ||
1222 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1223 | .ctrlbit = (1 << 0), | ||
1224 | }, | ||
1225 | .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 }, | ||
1226 | }; | ||
1227 | |||
1228 | static struct clksrc_clk clk_sclk_mmc1 = { | ||
1229 | .clk = { | ||
1230 | .name = "sclk_mmc", | ||
1231 | .devname = "s3c-sdhci.1", | ||
1232 | .parent = &clk_dout_mmc1.clk, | ||
1233 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1234 | .ctrlbit = (1 << 4), | ||
1235 | }, | ||
1236 | .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 }, | ||
1237 | }; | ||
1238 | |||
1239 | static struct clksrc_clk clk_sclk_mmc2 = { | ||
1240 | .clk = { | ||
1241 | .name = "sclk_mmc", | ||
1242 | .devname = "s3c-sdhci.2", | ||
1243 | .parent = &clk_dout_mmc2.clk, | ||
1244 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1245 | .ctrlbit = (1 << 8), | ||
1246 | }, | ||
1247 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 }, | ||
1248 | }; | ||
1249 | |||
1250 | static struct clksrc_clk clk_sclk_mmc3 = { | ||
1251 | .clk = { | ||
1252 | .name = "sclk_mmc", | ||
1253 | .devname = "s3c-sdhci.3", | ||
1254 | .parent = &clk_dout_mmc3.clk, | ||
1255 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1256 | .ctrlbit = (1 << 12), | ||
1257 | }, | ||
1258 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 }, | ||
1259 | }; | ||
1260 | |||
1240 | /* Clock initialization code */ | 1261 | /* Clock initialization code */ |
1241 | static struct clksrc_clk *sysclks[] = { | 1262 | static struct clksrc_clk *sysclks[] = { |
1242 | &clk_mout_apll, | 1263 | &clk_mout_apll, |
@@ -1271,6 +1292,35 @@ static struct clksrc_clk *sysclks[] = { | |||
1271 | &clk_mout_mfc1, | 1292 | &clk_mout_mfc1, |
1272 | }; | 1293 | }; |
1273 | 1294 | ||
1295 | static struct clk *clk_cdev[] = { | ||
1296 | &clk_pdma0, | ||
1297 | &clk_pdma1, | ||
1298 | }; | ||
1299 | |||
1300 | static struct clksrc_clk *clksrc_cdev[] = { | ||
1301 | &clk_sclk_uart0, | ||
1302 | &clk_sclk_uart1, | ||
1303 | &clk_sclk_uart2, | ||
1304 | &clk_sclk_uart3, | ||
1305 | &clk_sclk_mmc0, | ||
1306 | &clk_sclk_mmc1, | ||
1307 | &clk_sclk_mmc2, | ||
1308 | &clk_sclk_mmc3, | ||
1309 | }; | ||
1310 | |||
1311 | static struct clk_lookup exynos4_clk_lookup[] = { | ||
1312 | CLKDEV_INIT("exynos4210-uart.0", "clk_uart_baud0", &clk_sclk_uart0.clk), | ||
1313 | CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &clk_sclk_uart1.clk), | ||
1314 | CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &clk_sclk_uart2.clk), | ||
1315 | CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &clk_sclk_uart3.clk), | ||
1316 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | ||
1317 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | ||
1318 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | ||
1319 | CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk), | ||
1320 | CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0), | ||
1321 | CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1), | ||
1322 | }; | ||
1323 | |||
1274 | static int xtal_rate; | 1324 | static int xtal_rate; |
1275 | 1325 | ||
1276 | static unsigned long exynos4_fout_apll_get_rate(struct clk *clk) | 1326 | static unsigned long exynos4_fout_apll_get_rate(struct clk *clk) |
@@ -1478,11 +1528,19 @@ void __init exynos4_register_clocks(void) | |||
1478 | for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) | 1528 | for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) |
1479 | s3c_register_clksrc(sclk_tv[ptr], 1); | 1529 | s3c_register_clksrc(sclk_tv[ptr], 1); |
1480 | 1530 | ||
1531 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) | ||
1532 | s3c_register_clksrc(clksrc_cdev[ptr], 1); | ||
1533 | |||
1481 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1534 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1482 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1535 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1483 | 1536 | ||
1537 | s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); | ||
1538 | for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) | ||
1539 | s3c_disable_clocks(clk_cdev[ptr], 1); | ||
1540 | |||
1484 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1541 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1485 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1542 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1543 | clkdev_add_table(exynos4_clk_lookup, ARRAY_SIZE(exynos4_clk_lookup)); | ||
1486 | 1544 | ||
1487 | register_syscore_ops(&exynos4_clock_syscore_ops); | 1545 | register_syscore_ops(&exynos4_clock_syscore_ops); |
1488 | s3c24xx_register_clock(&dummy_apb_pclk); | 1546 | s3c24xx_register_clock(&dummy_apb_pclk); |
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c new file mode 100644 index 000000000000..b4beb7e2b5b8 --- /dev/null +++ b/arch/arm/mach-exynos/common.c | |||
@@ -0,0 +1,698 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Codes for EXYNOS | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/irq.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/sysdev.h> | ||
17 | #include <linux/gpio.h> | ||
18 | #include <linux/sched.h> | ||
19 | #include <linux/serial_core.h> | ||
20 | #include <linux/of.h> | ||
21 | #include <linux/of_irq.h> | ||
22 | |||
23 | #include <asm/proc-fns.h> | ||
24 | #include <asm/exception.h> | ||
25 | #include <asm/hardware/cache-l2x0.h> | ||
26 | #include <asm/hardware/gic.h> | ||
27 | #include <asm/mach/map.h> | ||
28 | #include <asm/mach/irq.h> | ||
29 | |||
30 | #include <mach/regs-irq.h> | ||
31 | #include <mach/regs-pmu.h> | ||
32 | #include <mach/regs-gpio.h> | ||
33 | |||
34 | #include <plat/cpu.h> | ||
35 | #include <plat/clock.h> | ||
36 | #include <plat/devs.h> | ||
37 | #include <plat/pm.h> | ||
38 | #include <plat/sdhci.h> | ||
39 | #include <plat/gpio-cfg.h> | ||
40 | #include <plat/adc-core.h> | ||
41 | #include <plat/fb-core.h> | ||
42 | #include <plat/fimc-core.h> | ||
43 | #include <plat/iic-core.h> | ||
44 | #include <plat/tv-core.h> | ||
45 | #include <plat/regs-serial.h> | ||
46 | |||
47 | #include "common.h" | ||
48 | |||
49 | static const char name_exynos4210[] = "EXYNOS4210"; | ||
50 | static const char name_exynos4212[] = "EXYNOS4212"; | ||
51 | static const char name_exynos4412[] = "EXYNOS4412"; | ||
52 | |||
53 | static struct cpu_table cpu_ids[] __initdata = { | ||
54 | { | ||
55 | .idcode = EXYNOS4210_CPU_ID, | ||
56 | .idmask = EXYNOS4_CPU_MASK, | ||
57 | .map_io = exynos4_map_io, | ||
58 | .init_clocks = exynos4_init_clocks, | ||
59 | .init_uarts = exynos4_init_uarts, | ||
60 | .init = exynos_init, | ||
61 | .name = name_exynos4210, | ||
62 | }, { | ||
63 | .idcode = EXYNOS4212_CPU_ID, | ||
64 | .idmask = EXYNOS4_CPU_MASK, | ||
65 | .map_io = exynos4_map_io, | ||
66 | .init_clocks = exynos4_init_clocks, | ||
67 | .init_uarts = exynos4_init_uarts, | ||
68 | .init = exynos_init, | ||
69 | .name = name_exynos4212, | ||
70 | }, { | ||
71 | .idcode = EXYNOS4412_CPU_ID, | ||
72 | .idmask = EXYNOS4_CPU_MASK, | ||
73 | .map_io = exynos4_map_io, | ||
74 | .init_clocks = exynos4_init_clocks, | ||
75 | .init_uarts = exynos4_init_uarts, | ||
76 | .init = exynos_init, | ||
77 | .name = name_exynos4412, | ||
78 | }, | ||
79 | }; | ||
80 | |||
81 | /* Initial IO mappings */ | ||
82 | |||
83 | static struct map_desc exynos_iodesc[] __initdata = { | ||
84 | { | ||
85 | .virtual = (unsigned long)S5P_VA_CHIPID, | ||
86 | .pfn = __phys_to_pfn(EXYNOS4_PA_CHIPID), | ||
87 | .length = SZ_4K, | ||
88 | .type = MT_DEVICE, | ||
89 | }, { | ||
90 | .virtual = (unsigned long)S3C_VA_SYS, | ||
91 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON), | ||
92 | .length = SZ_64K, | ||
93 | .type = MT_DEVICE, | ||
94 | }, { | ||
95 | .virtual = (unsigned long)S3C_VA_TIMER, | ||
96 | .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER), | ||
97 | .length = SZ_16K, | ||
98 | .type = MT_DEVICE, | ||
99 | }, { | ||
100 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
101 | .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG), | ||
102 | .length = SZ_4K, | ||
103 | .type = MT_DEVICE, | ||
104 | }, { | ||
105 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
106 | .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), | ||
107 | .length = SZ_4K, | ||
108 | .type = MT_DEVICE, | ||
109 | }, { | ||
110 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | ||
111 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER), | ||
112 | .length = SZ_4K, | ||
113 | .type = MT_DEVICE, | ||
114 | }, { | ||
115 | .virtual = (unsigned long)S5P_VA_PMU, | ||
116 | .pfn = __phys_to_pfn(EXYNOS4_PA_PMU), | ||
117 | .length = SZ_64K, | ||
118 | .type = MT_DEVICE, | ||
119 | }, { | ||
120 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, | ||
121 | .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER), | ||
122 | .length = SZ_4K, | ||
123 | .type = MT_DEVICE, | ||
124 | }, { | ||
125 | .virtual = (unsigned long)S5P_VA_GIC_CPU, | ||
126 | .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU), | ||
127 | .length = SZ_64K, | ||
128 | .type = MT_DEVICE, | ||
129 | }, { | ||
130 | .virtual = (unsigned long)S5P_VA_GIC_DIST, | ||
131 | .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST), | ||
132 | .length = SZ_64K, | ||
133 | .type = MT_DEVICE, | ||
134 | }, { | ||
135 | .virtual = (unsigned long)S3C_VA_UART, | ||
136 | .pfn = __phys_to_pfn(EXYNOS4_PA_UART), | ||
137 | .length = SZ_512K, | ||
138 | .type = MT_DEVICE, | ||
139 | }, | ||
140 | }; | ||
141 | |||
142 | static struct map_desc exynos4_iodesc[] __initdata = { | ||
143 | { | ||
144 | .virtual = (unsigned long)S5P_VA_CMU, | ||
145 | .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), | ||
146 | .length = SZ_128K, | ||
147 | .type = MT_DEVICE, | ||
148 | }, { | ||
149 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, | ||
150 | .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), | ||
151 | .length = SZ_8K, | ||
152 | .type = MT_DEVICE, | ||
153 | }, { | ||
154 | .virtual = (unsigned long)S5P_VA_L2CC, | ||
155 | .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC), | ||
156 | .length = SZ_4K, | ||
157 | .type = MT_DEVICE, | ||
158 | }, { | ||
159 | .virtual = (unsigned long)S5P_VA_GPIO1, | ||
160 | .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1), | ||
161 | .length = SZ_4K, | ||
162 | .type = MT_DEVICE, | ||
163 | }, { | ||
164 | .virtual = (unsigned long)S5P_VA_GPIO2, | ||
165 | .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2), | ||
166 | .length = SZ_4K, | ||
167 | .type = MT_DEVICE, | ||
168 | }, { | ||
169 | .virtual = (unsigned long)S5P_VA_GPIO3, | ||
170 | .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3), | ||
171 | .length = SZ_256, | ||
172 | .type = MT_DEVICE, | ||
173 | }, { | ||
174 | .virtual = (unsigned long)S5P_VA_DMC0, | ||
175 | .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), | ||
176 | .length = SZ_4K, | ||
177 | .type = MT_DEVICE, | ||
178 | }, { | ||
179 | .virtual = (unsigned long)S3C_VA_USB_HSPHY, | ||
180 | .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), | ||
181 | .length = SZ_4K, | ||
182 | .type = MT_DEVICE, | ||
183 | }, | ||
184 | }; | ||
185 | |||
186 | static struct map_desc exynos4_iodesc0[] __initdata = { | ||
187 | { | ||
188 | .virtual = (unsigned long)S5P_VA_SYSRAM, | ||
189 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), | ||
190 | .length = SZ_4K, | ||
191 | .type = MT_DEVICE, | ||
192 | }, | ||
193 | }; | ||
194 | |||
195 | static struct map_desc exynos4_iodesc1[] __initdata = { | ||
196 | { | ||
197 | .virtual = (unsigned long)S5P_VA_SYSRAM, | ||
198 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), | ||
199 | .length = SZ_4K, | ||
200 | .type = MT_DEVICE, | ||
201 | }, | ||
202 | }; | ||
203 | |||
204 | static void exynos_idle(void) | ||
205 | { | ||
206 | if (!need_resched()) | ||
207 | cpu_do_idle(); | ||
208 | |||
209 | local_irq_enable(); | ||
210 | } | ||
211 | |||
212 | void exynos4_restart(char mode, const char *cmd) | ||
213 | { | ||
214 | __raw_writel(0x1, S5P_SWRESET); | ||
215 | } | ||
216 | |||
217 | /* | ||
218 | * exynos_map_io | ||
219 | * | ||
220 | * register the standard cpu IO areas | ||
221 | */ | ||
222 | |||
223 | void __init exynos_init_io(struct map_desc *mach_desc, int size) | ||
224 | { | ||
225 | /* initialize the io descriptors we need for initialization */ | ||
226 | iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); | ||
227 | if (mach_desc) | ||
228 | iotable_init(mach_desc, size); | ||
229 | |||
230 | /* detect cpu id and rev. */ | ||
231 | s5p_init_cpu(S5P_VA_CHIPID); | ||
232 | |||
233 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
234 | } | ||
235 | |||
236 | void __init exynos4_map_io(void) | ||
237 | { | ||
238 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); | ||
239 | |||
240 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) | ||
241 | iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); | ||
242 | else | ||
243 | iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); | ||
244 | |||
245 | /* initialize device information early */ | ||
246 | exynos4_default_sdhci0(); | ||
247 | exynos4_default_sdhci1(); | ||
248 | exynos4_default_sdhci2(); | ||
249 | exynos4_default_sdhci3(); | ||
250 | |||
251 | s3c_adc_setname("samsung-adc-v3"); | ||
252 | |||
253 | s3c_fimc_setname(0, "exynos4-fimc"); | ||
254 | s3c_fimc_setname(1, "exynos4-fimc"); | ||
255 | s3c_fimc_setname(2, "exynos4-fimc"); | ||
256 | s3c_fimc_setname(3, "exynos4-fimc"); | ||
257 | |||
258 | /* The I2C bus controllers are directly compatible with s3c2440 */ | ||
259 | s3c_i2c0_setname("s3c2440-i2c"); | ||
260 | s3c_i2c1_setname("s3c2440-i2c"); | ||
261 | s3c_i2c2_setname("s3c2440-i2c"); | ||
262 | |||
263 | s5p_fb_setname(0, "exynos4-fb"); | ||
264 | s5p_hdmi_setname("exynos4-hdmi"); | ||
265 | } | ||
266 | |||
267 | void __init exynos4_init_clocks(int xtal) | ||
268 | { | ||
269 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
270 | |||
271 | s3c24xx_register_baseclocks(xtal); | ||
272 | s5p_register_clocks(xtal); | ||
273 | |||
274 | if (soc_is_exynos4210()) | ||
275 | exynos4210_register_clocks(); | ||
276 | else if (soc_is_exynos4212() || soc_is_exynos4412()) | ||
277 | exynos4212_register_clocks(); | ||
278 | |||
279 | exynos4_register_clocks(); | ||
280 | exynos4_setup_clocks(); | ||
281 | } | ||
282 | |||
283 | #define COMBINER_ENABLE_SET 0x0 | ||
284 | #define COMBINER_ENABLE_CLEAR 0x4 | ||
285 | #define COMBINER_INT_STATUS 0xC | ||
286 | |||
287 | static DEFINE_SPINLOCK(irq_controller_lock); | ||
288 | |||
289 | struct combiner_chip_data { | ||
290 | unsigned int irq_offset; | ||
291 | unsigned int irq_mask; | ||
292 | void __iomem *base; | ||
293 | }; | ||
294 | |||
295 | static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; | ||
296 | |||
297 | static inline void __iomem *combiner_base(struct irq_data *data) | ||
298 | { | ||
299 | struct combiner_chip_data *combiner_data = | ||
300 | irq_data_get_irq_chip_data(data); | ||
301 | |||
302 | return combiner_data->base; | ||
303 | } | ||
304 | |||
305 | static void combiner_mask_irq(struct irq_data *data) | ||
306 | { | ||
307 | u32 mask = 1 << (data->irq % 32); | ||
308 | |||
309 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); | ||
310 | } | ||
311 | |||
312 | static void combiner_unmask_irq(struct irq_data *data) | ||
313 | { | ||
314 | u32 mask = 1 << (data->irq % 32); | ||
315 | |||
316 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); | ||
317 | } | ||
318 | |||
319 | static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) | ||
320 | { | ||
321 | struct combiner_chip_data *chip_data = irq_get_handler_data(irq); | ||
322 | struct irq_chip *chip = irq_get_chip(irq); | ||
323 | unsigned int cascade_irq, combiner_irq; | ||
324 | unsigned long status; | ||
325 | |||
326 | chained_irq_enter(chip, desc); | ||
327 | |||
328 | spin_lock(&irq_controller_lock); | ||
329 | status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); | ||
330 | spin_unlock(&irq_controller_lock); | ||
331 | status &= chip_data->irq_mask; | ||
332 | |||
333 | if (status == 0) | ||
334 | goto out; | ||
335 | |||
336 | combiner_irq = __ffs(status); | ||
337 | |||
338 | cascade_irq = combiner_irq + (chip_data->irq_offset & ~31); | ||
339 | if (unlikely(cascade_irq >= NR_IRQS)) | ||
340 | do_bad_IRQ(cascade_irq, desc); | ||
341 | else | ||
342 | generic_handle_irq(cascade_irq); | ||
343 | |||
344 | out: | ||
345 | chained_irq_exit(chip, desc); | ||
346 | } | ||
347 | |||
348 | static struct irq_chip combiner_chip = { | ||
349 | .name = "COMBINER", | ||
350 | .irq_mask = combiner_mask_irq, | ||
351 | .irq_unmask = combiner_unmask_irq, | ||
352 | }; | ||
353 | |||
354 | static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) | ||
355 | { | ||
356 | if (combiner_nr >= MAX_COMBINER_NR) | ||
357 | BUG(); | ||
358 | if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0) | ||
359 | BUG(); | ||
360 | irq_set_chained_handler(irq, combiner_handle_cascade_irq); | ||
361 | } | ||
362 | |||
363 | static void __init combiner_init(unsigned int combiner_nr, void __iomem *base, | ||
364 | unsigned int irq_start) | ||
365 | { | ||
366 | unsigned int i; | ||
367 | |||
368 | if (combiner_nr >= MAX_COMBINER_NR) | ||
369 | BUG(); | ||
370 | |||
371 | combiner_data[combiner_nr].base = base; | ||
372 | combiner_data[combiner_nr].irq_offset = irq_start; | ||
373 | combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3); | ||
374 | |||
375 | /* Disable all interrupts */ | ||
376 | |||
377 | __raw_writel(combiner_data[combiner_nr].irq_mask, | ||
378 | base + COMBINER_ENABLE_CLEAR); | ||
379 | |||
380 | /* Setup the Linux IRQ subsystem */ | ||
381 | |||
382 | for (i = irq_start; i < combiner_data[combiner_nr].irq_offset | ||
383 | + MAX_IRQ_IN_COMBINER; i++) { | ||
384 | irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq); | ||
385 | irq_set_chip_data(i, &combiner_data[combiner_nr]); | ||
386 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | ||
387 | } | ||
388 | } | ||
389 | |||
390 | #ifdef CONFIG_OF | ||
391 | static const struct of_device_id exynos4_dt_irq_match[] = { | ||
392 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, | ||
393 | {}, | ||
394 | }; | ||
395 | #endif | ||
396 | |||
397 | void __init exynos4_init_irq(void) | ||
398 | { | ||
399 | int irq; | ||
400 | unsigned int gic_bank_offset; | ||
401 | |||
402 | gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; | ||
403 | |||
404 | if (!of_have_populated_dt()) | ||
405 | gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); | ||
406 | #ifdef CONFIG_OF | ||
407 | else | ||
408 | of_irq_init(exynos4_dt_irq_match); | ||
409 | #endif | ||
410 | |||
411 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | ||
412 | |||
413 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), | ||
414 | COMBINER_IRQ(irq, 0)); | ||
415 | combiner_cascade_irq(irq, IRQ_SPI(irq)); | ||
416 | } | ||
417 | |||
418 | /* | ||
419 | * The parameters of s5p_init_irq() are for VIC init. | ||
420 | * Theses parameters should be NULL and 0 because EXYNOS4 | ||
421 | * uses GIC instead of VIC. | ||
422 | */ | ||
423 | s5p_init_irq(NULL, 0); | ||
424 | } | ||
425 | |||
426 | struct sysdev_class exynos4_sysclass = { | ||
427 | .name = "exynos4-core", | ||
428 | }; | ||
429 | |||
430 | static struct sys_device exynos4_sysdev = { | ||
431 | .cls = &exynos4_sysclass, | ||
432 | }; | ||
433 | |||
434 | static int __init exynos4_core_init(void) | ||
435 | { | ||
436 | return sysdev_class_register(&exynos4_sysclass); | ||
437 | } | ||
438 | core_initcall(exynos4_core_init); | ||
439 | |||
440 | #ifdef CONFIG_CACHE_L2X0 | ||
441 | static int __init exynos4_l2x0_cache_init(void) | ||
442 | { | ||
443 | /* TAG, Data Latency Control: 2cycle */ | ||
444 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); | ||
445 | |||
446 | if (soc_is_exynos4210()) | ||
447 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); | ||
448 | else if (soc_is_exynos4212() || soc_is_exynos4412()) | ||
449 | __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); | ||
450 | |||
451 | /* L2X0 Prefetch Control */ | ||
452 | __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); | ||
453 | |||
454 | /* L2X0 Power Control */ | ||
455 | __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, | ||
456 | S5P_VA_L2CC + L2X0_POWER_CTRL); | ||
457 | |||
458 | l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); | ||
459 | |||
460 | return 0; | ||
461 | } | ||
462 | |||
463 | early_initcall(exynos4_l2x0_cache_init); | ||
464 | #endif | ||
465 | |||
466 | int __init exynos_init(void) | ||
467 | { | ||
468 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); | ||
469 | |||
470 | /* set idle function */ | ||
471 | pm_idle = exynos_idle; | ||
472 | |||
473 | return sysdev_register(&exynos4_sysdev); | ||
474 | } | ||
475 | |||
476 | /* uart registration process */ | ||
477 | |||
478 | void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
479 | { | ||
480 | struct s3c2410_uartcfg *tcfg = cfg; | ||
481 | u32 ucnt; | ||
482 | |||
483 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) | ||
484 | tcfg->has_fracval = 1; | ||
485 | |||
486 | s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no); | ||
487 | } | ||
488 | |||
489 | static DEFINE_SPINLOCK(eint_lock); | ||
490 | |||
491 | static unsigned int eint0_15_data[16]; | ||
492 | |||
493 | static unsigned int exynos4_get_irq_nr(unsigned int number) | ||
494 | { | ||
495 | u32 ret = 0; | ||
496 | |||
497 | switch (number) { | ||
498 | case 0 ... 3: | ||
499 | ret = (number + IRQ_EINT0); | ||
500 | break; | ||
501 | case 4 ... 7: | ||
502 | ret = (number + (IRQ_EINT4 - 4)); | ||
503 | break; | ||
504 | case 8 ... 15: | ||
505 | ret = (number + (IRQ_EINT8 - 8)); | ||
506 | break; | ||
507 | default: | ||
508 | printk(KERN_ERR "number available : %d\n", number); | ||
509 | } | ||
510 | |||
511 | return ret; | ||
512 | } | ||
513 | |||
514 | static inline void exynos4_irq_eint_mask(struct irq_data *data) | ||
515 | { | ||
516 | u32 mask; | ||
517 | |||
518 | spin_lock(&eint_lock); | ||
519 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); | ||
520 | mask |= eint_irq_to_bit(data->irq); | ||
521 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); | ||
522 | spin_unlock(&eint_lock); | ||
523 | } | ||
524 | |||
525 | static void exynos4_irq_eint_unmask(struct irq_data *data) | ||
526 | { | ||
527 | u32 mask; | ||
528 | |||
529 | spin_lock(&eint_lock); | ||
530 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); | ||
531 | mask &= ~(eint_irq_to_bit(data->irq)); | ||
532 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); | ||
533 | spin_unlock(&eint_lock); | ||
534 | } | ||
535 | |||
536 | static inline void exynos4_irq_eint_ack(struct irq_data *data) | ||
537 | { | ||
538 | __raw_writel(eint_irq_to_bit(data->irq), | ||
539 | S5P_EINT_PEND(EINT_REG_NR(data->irq))); | ||
540 | } | ||
541 | |||
542 | static void exynos4_irq_eint_maskack(struct irq_data *data) | ||
543 | { | ||
544 | exynos4_irq_eint_mask(data); | ||
545 | exynos4_irq_eint_ack(data); | ||
546 | } | ||
547 | |||
548 | static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type) | ||
549 | { | ||
550 | int offs = EINT_OFFSET(data->irq); | ||
551 | int shift; | ||
552 | u32 ctrl, mask; | ||
553 | u32 newvalue = 0; | ||
554 | |||
555 | switch (type) { | ||
556 | case IRQ_TYPE_EDGE_RISING: | ||
557 | newvalue = S5P_IRQ_TYPE_EDGE_RISING; | ||
558 | break; | ||
559 | |||
560 | case IRQ_TYPE_EDGE_FALLING: | ||
561 | newvalue = S5P_IRQ_TYPE_EDGE_FALLING; | ||
562 | break; | ||
563 | |||
564 | case IRQ_TYPE_EDGE_BOTH: | ||
565 | newvalue = S5P_IRQ_TYPE_EDGE_BOTH; | ||
566 | break; | ||
567 | |||
568 | case IRQ_TYPE_LEVEL_LOW: | ||
569 | newvalue = S5P_IRQ_TYPE_LEVEL_LOW; | ||
570 | break; | ||
571 | |||
572 | case IRQ_TYPE_LEVEL_HIGH: | ||
573 | newvalue = S5P_IRQ_TYPE_LEVEL_HIGH; | ||
574 | break; | ||
575 | |||
576 | default: | ||
577 | printk(KERN_ERR "No such irq type %d", type); | ||
578 | return -EINVAL; | ||
579 | } | ||
580 | |||
581 | shift = (offs & 0x7) * 4; | ||
582 | mask = 0x7 << shift; | ||
583 | |||
584 | spin_lock(&eint_lock); | ||
585 | ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq))); | ||
586 | ctrl &= ~mask; | ||
587 | ctrl |= newvalue << shift; | ||
588 | __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq))); | ||
589 | spin_unlock(&eint_lock); | ||
590 | |||
591 | switch (offs) { | ||
592 | case 0 ... 7: | ||
593 | s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); | ||
594 | break; | ||
595 | case 8 ... 15: | ||
596 | s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE); | ||
597 | break; | ||
598 | case 16 ... 23: | ||
599 | s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE); | ||
600 | break; | ||
601 | case 24 ... 31: | ||
602 | s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE); | ||
603 | break; | ||
604 | default: | ||
605 | printk(KERN_ERR "No such irq number %d", offs); | ||
606 | } | ||
607 | |||
608 | return 0; | ||
609 | } | ||
610 | |||
611 | static struct irq_chip exynos4_irq_eint = { | ||
612 | .name = "exynos4-eint", | ||
613 | .irq_mask = exynos4_irq_eint_mask, | ||
614 | .irq_unmask = exynos4_irq_eint_unmask, | ||
615 | .irq_mask_ack = exynos4_irq_eint_maskack, | ||
616 | .irq_ack = exynos4_irq_eint_ack, | ||
617 | .irq_set_type = exynos4_irq_eint_set_type, | ||
618 | #ifdef CONFIG_PM | ||
619 | .irq_set_wake = s3c_irqext_wake, | ||
620 | #endif | ||
621 | }; | ||
622 | |||
623 | /* | ||
624 | * exynos4_irq_demux_eint | ||
625 | * | ||
626 | * This function demuxes the IRQ from from EINTs 16 to 31. | ||
627 | * It is designed to be inlined into the specific handler | ||
628 | * s5p_irq_demux_eintX_Y. | ||
629 | * | ||
630 | * Each EINT pend/mask registers handle eight of them. | ||
631 | */ | ||
632 | static inline void exynos4_irq_demux_eint(unsigned int start) | ||
633 | { | ||
634 | unsigned int irq; | ||
635 | |||
636 | u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); | ||
637 | u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); | ||
638 | |||
639 | status &= ~mask; | ||
640 | status &= 0xff; | ||
641 | |||
642 | while (status) { | ||
643 | irq = fls(status) - 1; | ||
644 | generic_handle_irq(irq + start); | ||
645 | status &= ~(1 << irq); | ||
646 | } | ||
647 | } | ||
648 | |||
649 | static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) | ||
650 | { | ||
651 | struct irq_chip *chip = irq_get_chip(irq); | ||
652 | chained_irq_enter(chip, desc); | ||
653 | exynos4_irq_demux_eint(IRQ_EINT(16)); | ||
654 | exynos4_irq_demux_eint(IRQ_EINT(24)); | ||
655 | chained_irq_exit(chip, desc); | ||
656 | } | ||
657 | |||
658 | static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) | ||
659 | { | ||
660 | u32 *irq_data = irq_get_handler_data(irq); | ||
661 | struct irq_chip *chip = irq_get_chip(irq); | ||
662 | |||
663 | chained_irq_enter(chip, desc); | ||
664 | chip->irq_mask(&desc->irq_data); | ||
665 | |||
666 | if (chip->irq_ack) | ||
667 | chip->irq_ack(&desc->irq_data); | ||
668 | |||
669 | generic_handle_irq(*irq_data); | ||
670 | |||
671 | chip->irq_unmask(&desc->irq_data); | ||
672 | chained_irq_exit(chip, desc); | ||
673 | } | ||
674 | |||
675 | int __init exynos4_init_irq_eint(void) | ||
676 | { | ||
677 | int irq; | ||
678 | |||
679 | for (irq = 0 ; irq <= 31 ; irq++) { | ||
680 | irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint, | ||
681 | handle_level_irq); | ||
682 | set_irq_flags(IRQ_EINT(irq), IRQF_VALID); | ||
683 | } | ||
684 | |||
685 | irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); | ||
686 | |||
687 | for (irq = 0 ; irq <= 15 ; irq++) { | ||
688 | eint0_15_data[irq] = IRQ_EINT(irq); | ||
689 | |||
690 | irq_set_handler_data(exynos4_get_irq_nr(irq), | ||
691 | &eint0_15_data[irq]); | ||
692 | irq_set_chained_handler(exynos4_get_irq_nr(irq), | ||
693 | exynos4_irq_eint0_15); | ||
694 | } | ||
695 | |||
696 | return 0; | ||
697 | } | ||
698 | arch_initcall(exynos4_init_irq_eint); | ||
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h new file mode 100644 index 000000000000..1ac49de0f398 --- /dev/null +++ b/arch/arm/mach-exynos/common.h | |||
@@ -0,0 +1,41 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Header for EXYNOS machines | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H | ||
13 | #define __ARCH_ARM_MACH_EXYNOS_COMMON_H | ||
14 | |||
15 | void exynos_init_io(struct map_desc *mach_desc, int size); | ||
16 | void exynos4_init_irq(void); | ||
17 | |||
18 | void exynos4_register_clocks(void); | ||
19 | void exynos4_setup_clocks(void); | ||
20 | |||
21 | void exynos4210_register_clocks(void); | ||
22 | void exynos4212_register_clocks(void); | ||
23 | |||
24 | void exynos4_restart(char mode, const char *cmd); | ||
25 | |||
26 | extern struct sys_timer exynos4_timer; | ||
27 | |||
28 | #ifdef CONFIG_ARCH_EXYNOS | ||
29 | extern int exynos_init(void); | ||
30 | extern void exynos4_map_io(void); | ||
31 | extern void exynos4_init_clocks(int xtal); | ||
32 | extern void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
33 | |||
34 | #else | ||
35 | #define exynos4_init_clocks NULL | ||
36 | #define exynos4_init_uarts NULL | ||
37 | #define exynos4_map_io NULL | ||
38 | #define exynos_init NULL | ||
39 | #endif | ||
40 | |||
41 | #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ | ||
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c deleted file mode 100644 index 22316cb31a8c..000000000000 --- a/arch/arm/mach-exynos/cpu.c +++ /dev/null | |||
@@ -1,284 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/sched.h> | ||
12 | #include <linux/sysdev.h> | ||
13 | |||
14 | #include <asm/mach/map.h> | ||
15 | #include <asm/mach/irq.h> | ||
16 | |||
17 | #include <asm/proc-fns.h> | ||
18 | #include <asm/exception.h> | ||
19 | #include <asm/hardware/cache-l2x0.h> | ||
20 | #include <asm/hardware/gic.h> | ||
21 | |||
22 | #include <plat/cpu.h> | ||
23 | #include <plat/clock.h> | ||
24 | #include <plat/devs.h> | ||
25 | #include <plat/exynos4.h> | ||
26 | #include <plat/adc-core.h> | ||
27 | #include <plat/sdhci.h> | ||
28 | #include <plat/fb-core.h> | ||
29 | #include <plat/fimc-core.h> | ||
30 | #include <plat/iic-core.h> | ||
31 | #include <plat/reset.h> | ||
32 | #include <plat/tv-core.h> | ||
33 | |||
34 | #include <mach/regs-irq.h> | ||
35 | #include <mach/regs-pmu.h> | ||
36 | |||
37 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, | ||
38 | unsigned int irq_start); | ||
39 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); | ||
40 | |||
41 | /* Initial IO mappings */ | ||
42 | static struct map_desc exynos_iodesc[] __initdata = { | ||
43 | { | ||
44 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | ||
45 | .pfn = __phys_to_pfn(EXYNOS_PA_SYSTIMER), | ||
46 | .length = SZ_4K, | ||
47 | .type = MT_DEVICE, | ||
48 | }, { | ||
49 | .virtual = (unsigned long)S5P_VA_PMU, | ||
50 | .pfn = __phys_to_pfn(EXYNOS_PA_PMU), | ||
51 | .length = SZ_64K, | ||
52 | .type = MT_DEVICE, | ||
53 | }, { | ||
54 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, | ||
55 | .pfn = __phys_to_pfn(EXYNOS_PA_COMBINER), | ||
56 | .length = SZ_4K, | ||
57 | .type = MT_DEVICE, | ||
58 | }, { | ||
59 | .virtual = (unsigned long)S5P_VA_GIC_CPU, | ||
60 | .pfn = __phys_to_pfn(EXYNOS_PA_GIC_CPU), | ||
61 | .length = SZ_64K, | ||
62 | .type = MT_DEVICE, | ||
63 | }, { | ||
64 | .virtual = (unsigned long)S5P_VA_GIC_DIST, | ||
65 | .pfn = __phys_to_pfn(EXYNOS_PA_GIC_DIST), | ||
66 | .length = SZ_64K, | ||
67 | .type = MT_DEVICE, | ||
68 | }, { | ||
69 | .virtual = (unsigned long)S3C_VA_UART, | ||
70 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
71 | .length = SZ_512K, | ||
72 | .type = MT_DEVICE, | ||
73 | }, | ||
74 | }; | ||
75 | |||
76 | static struct map_desc exynos4_iodesc[] __initdata = { | ||
77 | { | ||
78 | .virtual = (unsigned long)S5P_VA_CMU, | ||
79 | .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), | ||
80 | .length = SZ_128K, | ||
81 | .type = MT_DEVICE, | ||
82 | }, { | ||
83 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, | ||
84 | .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), | ||
85 | .length = SZ_8K, | ||
86 | .type = MT_DEVICE, | ||
87 | }, { | ||
88 | .virtual = (unsigned long)S5P_VA_L2CC, | ||
89 | .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC), | ||
90 | .length = SZ_4K, | ||
91 | .type = MT_DEVICE, | ||
92 | }, { | ||
93 | .virtual = (unsigned long)S5P_VA_GPIO1, | ||
94 | .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1), | ||
95 | .length = SZ_4K, | ||
96 | .type = MT_DEVICE, | ||
97 | }, { | ||
98 | .virtual = (unsigned long)S5P_VA_GPIO2, | ||
99 | .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2), | ||
100 | .length = SZ_4K, | ||
101 | .type = MT_DEVICE, | ||
102 | }, { | ||
103 | .virtual = (unsigned long)S5P_VA_GPIO3, | ||
104 | .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3), | ||
105 | .length = SZ_256, | ||
106 | .type = MT_DEVICE, | ||
107 | }, { | ||
108 | .virtual = (unsigned long)S5P_VA_DMC0, | ||
109 | .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), | ||
110 | .length = SZ_4K, | ||
111 | .type = MT_DEVICE, | ||
112 | }, { | ||
113 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
114 | .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), | ||
115 | .length = SZ_4K, | ||
116 | .type = MT_DEVICE, | ||
117 | }, { | ||
118 | .virtual = (unsigned long)S3C_VA_USB_HSPHY, | ||
119 | .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), | ||
120 | .length = SZ_4K, | ||
121 | .type = MT_DEVICE, | ||
122 | }, | ||
123 | }; | ||
124 | |||
125 | static struct map_desc exynos4_iodesc0[] __initdata = { | ||
126 | { | ||
127 | .virtual = (unsigned long)S5P_VA_SYSRAM, | ||
128 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), | ||
129 | .length = SZ_4K, | ||
130 | .type = MT_DEVICE, | ||
131 | }, | ||
132 | }; | ||
133 | |||
134 | static struct map_desc exynos4_iodesc1[] __initdata = { | ||
135 | { | ||
136 | .virtual = (unsigned long)S5P_VA_SYSRAM, | ||
137 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), | ||
138 | .length = SZ_4K, | ||
139 | .type = MT_DEVICE, | ||
140 | }, | ||
141 | }; | ||
142 | |||
143 | static void exynos_idle(void) | ||
144 | { | ||
145 | if (!need_resched()) | ||
146 | cpu_do_idle(); | ||
147 | |||
148 | local_irq_enable(); | ||
149 | } | ||
150 | |||
151 | static void exynos4_sw_reset(void) | ||
152 | { | ||
153 | __raw_writel(0x1, S5P_SWRESET); | ||
154 | } | ||
155 | |||
156 | /* | ||
157 | * exynos_map_io | ||
158 | * | ||
159 | * register the standard cpu IO areas | ||
160 | */ | ||
161 | void __init exynos4_map_io(void) | ||
162 | { | ||
163 | iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); | ||
164 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); | ||
165 | |||
166 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) | ||
167 | iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); | ||
168 | else | ||
169 | iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); | ||
170 | |||
171 | /* initialize device information early */ | ||
172 | exynos4_default_sdhci0(); | ||
173 | exynos4_default_sdhci1(); | ||
174 | exynos4_default_sdhci2(); | ||
175 | exynos4_default_sdhci3(); | ||
176 | |||
177 | s3c_adc_setname("samsung-adc-v3"); | ||
178 | |||
179 | s3c_fimc_setname(0, "exynos4-fimc"); | ||
180 | s3c_fimc_setname(1, "exynos4-fimc"); | ||
181 | s3c_fimc_setname(2, "exynos4-fimc"); | ||
182 | s3c_fimc_setname(3, "exynos4-fimc"); | ||
183 | |||
184 | /* The I2C bus controllers are directly compatible with s3c2440 */ | ||
185 | s3c_i2c0_setname("s3c2440-i2c"); | ||
186 | s3c_i2c1_setname("s3c2440-i2c"); | ||
187 | s3c_i2c2_setname("s3c2440-i2c"); | ||
188 | |||
189 | s5p_fb_setname(0, "exynos4-fb"); | ||
190 | s5p_hdmi_setname("exynos4-hdmi"); | ||
191 | } | ||
192 | |||
193 | void __init exynos4_init_clocks(int xtal) | ||
194 | { | ||
195 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
196 | |||
197 | s3c24xx_register_baseclocks(xtal); | ||
198 | s5p_register_clocks(xtal); | ||
199 | |||
200 | if (soc_is_exynos4210()) | ||
201 | exynos4210_register_clocks(); | ||
202 | else if (soc_is_exynos4212() || soc_is_exynos4412()) | ||
203 | exynos4212_register_clocks(); | ||
204 | |||
205 | exynos4_register_clocks(); | ||
206 | exynos4_setup_clocks(); | ||
207 | } | ||
208 | |||
209 | void __init exynos4_init_irq(void) | ||
210 | { | ||
211 | int irq; | ||
212 | unsigned int gic_bank_offset; | ||
213 | |||
214 | gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; | ||
215 | |||
216 | gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); | ||
217 | |||
218 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | ||
219 | |||
220 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), | ||
221 | COMBINER_IRQ(irq, 0)); | ||
222 | combiner_cascade_irq(irq, IRQ_SPI(irq)); | ||
223 | } | ||
224 | |||
225 | /* The parameters of s5p_init_irq() are for VIC init. | ||
226 | * Theses parameters should be NULL and 0 because EXYNOS4 | ||
227 | * uses GIC instead of VIC. | ||
228 | */ | ||
229 | s5p_init_irq(NULL, 0); | ||
230 | } | ||
231 | |||
232 | struct sysdev_class exynos4_sysclass = { | ||
233 | .name = "exynos4-core", | ||
234 | }; | ||
235 | |||
236 | static struct sys_device exynos4_sysdev = { | ||
237 | .cls = &exynos4_sysclass, | ||
238 | }; | ||
239 | |||
240 | static int __init exynos4_core_init(void) | ||
241 | { | ||
242 | return sysdev_class_register(&exynos4_sysclass); | ||
243 | } | ||
244 | core_initcall(exynos4_core_init); | ||
245 | |||
246 | #ifdef CONFIG_CACHE_L2X0 | ||
247 | static int __init exynos4_l2x0_cache_init(void) | ||
248 | { | ||
249 | /* TAG, Data Latency Control: 2cycle */ | ||
250 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); | ||
251 | |||
252 | if (soc_is_exynos4210()) | ||
253 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); | ||
254 | else if (soc_is_exynos4212() || soc_is_exynos4412()) | ||
255 | __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); | ||
256 | |||
257 | /* L2X0 Prefetch Control */ | ||
258 | __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); | ||
259 | |||
260 | /* L2X0 Power Control */ | ||
261 | __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, | ||
262 | S5P_VA_L2CC + L2X0_POWER_CTRL); | ||
263 | |||
264 | l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); | ||
265 | |||
266 | return 0; | ||
267 | } | ||
268 | |||
269 | early_initcall(exynos4_l2x0_cache_init); | ||
270 | #endif | ||
271 | |||
272 | int __init exynos_init(void) | ||
273 | { | ||
274 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); | ||
275 | |||
276 | /* set idle function */ | ||
277 | pm_idle = exynos_idle; | ||
278 | |||
279 | /* set sw_reset function */ | ||
280 | if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412()) | ||
281 | s5p_reset_hook = exynos4_sw_reset; | ||
282 | |||
283 | return sysdev_register(&exynos4_sysdev); | ||
284 | } | ||
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index 9667c61e64fb..b10fcd270f07 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/dma-mapping.h> | 24 | #include <linux/dma-mapping.h> |
25 | #include <linux/amba/bus.h> | 25 | #include <linux/amba/bus.h> |
26 | #include <linux/amba/pl330.h> | 26 | #include <linux/amba/pl330.h> |
27 | #include <linux/of.h> | ||
27 | 28 | ||
28 | #include <asm/irq.h> | 29 | #include <asm/irq.h> |
29 | #include <plat/devs.h> | 30 | #include <plat/devs.h> |
@@ -35,95 +36,42 @@ | |||
35 | 36 | ||
36 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 37 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
37 | 38 | ||
38 | struct dma_pl330_peri pdma0_peri[28] = { | 39 | u8 pdma0_peri[] = { |
39 | { | 40 | DMACH_PCM0_RX, |
40 | .peri_id = (u8)DMACH_PCM0_RX, | 41 | DMACH_PCM0_TX, |
41 | .rqtype = DEVTOMEM, | 42 | DMACH_PCM2_RX, |
42 | }, { | 43 | DMACH_PCM2_TX, |
43 | .peri_id = (u8)DMACH_PCM0_TX, | 44 | DMACH_MSM_REQ0, |
44 | .rqtype = MEMTODEV, | 45 | DMACH_MSM_REQ2, |
45 | }, { | 46 | DMACH_SPI0_RX, |
46 | .peri_id = (u8)DMACH_PCM2_RX, | 47 | DMACH_SPI0_TX, |
47 | .rqtype = DEVTOMEM, | 48 | DMACH_SPI2_RX, |
48 | }, { | 49 | DMACH_SPI2_TX, |
49 | .peri_id = (u8)DMACH_PCM2_TX, | 50 | DMACH_I2S0S_TX, |
50 | .rqtype = MEMTODEV, | 51 | DMACH_I2S0_RX, |
51 | }, { | 52 | DMACH_I2S0_TX, |
52 | .peri_id = (u8)DMACH_MSM_REQ0, | 53 | DMACH_I2S2_RX, |
53 | }, { | 54 | DMACH_I2S2_TX, |
54 | .peri_id = (u8)DMACH_MSM_REQ2, | 55 | DMACH_UART0_RX, |
55 | }, { | 56 | DMACH_UART0_TX, |
56 | .peri_id = (u8)DMACH_SPI0_RX, | 57 | DMACH_UART2_RX, |
57 | .rqtype = DEVTOMEM, | 58 | DMACH_UART2_TX, |
58 | }, { | 59 | DMACH_UART4_RX, |
59 | .peri_id = (u8)DMACH_SPI0_TX, | 60 | DMACH_UART4_TX, |
60 | .rqtype = MEMTODEV, | 61 | DMACH_SLIMBUS0_RX, |
61 | }, { | 62 | DMACH_SLIMBUS0_TX, |
62 | .peri_id = (u8)DMACH_SPI2_RX, | 63 | DMACH_SLIMBUS2_RX, |
63 | .rqtype = DEVTOMEM, | 64 | DMACH_SLIMBUS2_TX, |
64 | }, { | 65 | DMACH_SLIMBUS4_RX, |
65 | .peri_id = (u8)DMACH_SPI2_TX, | 66 | DMACH_SLIMBUS4_TX, |
66 | .rqtype = MEMTODEV, | 67 | DMACH_AC97_MICIN, |
67 | }, { | 68 | DMACH_AC97_PCMIN, |
68 | .peri_id = (u8)DMACH_I2S0S_TX, | 69 | DMACH_AC97_PCMOUT, |
69 | .rqtype = MEMTODEV, | ||
70 | }, { | ||
71 | .peri_id = (u8)DMACH_I2S0_RX, | ||
72 | .rqtype = DEVTOMEM, | ||
73 | }, { | ||
74 | .peri_id = (u8)DMACH_I2S0_TX, | ||
75 | .rqtype = MEMTODEV, | ||
76 | }, { | ||
77 | .peri_id = (u8)DMACH_UART0_RX, | ||
78 | .rqtype = DEVTOMEM, | ||
79 | }, { | ||
80 | .peri_id = (u8)DMACH_UART0_TX, | ||
81 | .rqtype = MEMTODEV, | ||
82 | }, { | ||
83 | .peri_id = (u8)DMACH_UART2_RX, | ||
84 | .rqtype = DEVTOMEM, | ||
85 | }, { | ||
86 | .peri_id = (u8)DMACH_UART2_TX, | ||
87 | .rqtype = MEMTODEV, | ||
88 | }, { | ||
89 | .peri_id = (u8)DMACH_UART4_RX, | ||
90 | .rqtype = DEVTOMEM, | ||
91 | }, { | ||
92 | .peri_id = (u8)DMACH_UART4_TX, | ||
93 | .rqtype = MEMTODEV, | ||
94 | }, { | ||
95 | .peri_id = (u8)DMACH_SLIMBUS0_RX, | ||
96 | .rqtype = DEVTOMEM, | ||
97 | }, { | ||
98 | .peri_id = (u8)DMACH_SLIMBUS0_TX, | ||
99 | .rqtype = MEMTODEV, | ||
100 | }, { | ||
101 | .peri_id = (u8)DMACH_SLIMBUS2_RX, | ||
102 | .rqtype = DEVTOMEM, | ||
103 | }, { | ||
104 | .peri_id = (u8)DMACH_SLIMBUS2_TX, | ||
105 | .rqtype = MEMTODEV, | ||
106 | }, { | ||
107 | .peri_id = (u8)DMACH_SLIMBUS4_RX, | ||
108 | .rqtype = DEVTOMEM, | ||
109 | }, { | ||
110 | .peri_id = (u8)DMACH_SLIMBUS4_TX, | ||
111 | .rqtype = MEMTODEV, | ||
112 | }, { | ||
113 | .peri_id = (u8)DMACH_AC97_MICIN, | ||
114 | .rqtype = DEVTOMEM, | ||
115 | }, { | ||
116 | .peri_id = (u8)DMACH_AC97_PCMIN, | ||
117 | .rqtype = DEVTOMEM, | ||
118 | }, { | ||
119 | .peri_id = (u8)DMACH_AC97_PCMOUT, | ||
120 | .rqtype = MEMTODEV, | ||
121 | }, | ||
122 | }; | 70 | }; |
123 | 71 | ||
124 | struct dma_pl330_platdata exynos4_pdma0_pdata = { | 72 | struct dma_pl330_platdata exynos4_pdma0_pdata = { |
125 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), | 73 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), |
126 | .peri = pdma0_peri, | 74 | .peri_id = pdma0_peri, |
127 | }; | 75 | }; |
128 | 76 | ||
129 | struct amba_device exynos4_device_pdma0 = { | 77 | struct amba_device exynos4_device_pdma0 = { |
@@ -142,86 +90,37 @@ struct amba_device exynos4_device_pdma0 = { | |||
142 | .periphid = 0x00041330, | 90 | .periphid = 0x00041330, |
143 | }; | 91 | }; |
144 | 92 | ||
145 | struct dma_pl330_peri pdma1_peri[25] = { | 93 | u8 pdma1_peri[] = { |
146 | { | 94 | DMACH_PCM0_RX, |
147 | .peri_id = (u8)DMACH_PCM0_RX, | 95 | DMACH_PCM0_TX, |
148 | .rqtype = DEVTOMEM, | 96 | DMACH_PCM1_RX, |
149 | }, { | 97 | DMACH_PCM1_TX, |
150 | .peri_id = (u8)DMACH_PCM0_TX, | 98 | DMACH_MSM_REQ1, |
151 | .rqtype = MEMTODEV, | 99 | DMACH_MSM_REQ3, |
152 | }, { | 100 | DMACH_SPI1_RX, |
153 | .peri_id = (u8)DMACH_PCM1_RX, | 101 | DMACH_SPI1_TX, |
154 | .rqtype = DEVTOMEM, | 102 | DMACH_I2S0S_TX, |
155 | }, { | 103 | DMACH_I2S0_RX, |
156 | .peri_id = (u8)DMACH_PCM1_TX, | 104 | DMACH_I2S0_TX, |
157 | .rqtype = MEMTODEV, | 105 | DMACH_I2S1_RX, |
158 | }, { | 106 | DMACH_I2S1_TX, |
159 | .peri_id = (u8)DMACH_MSM_REQ1, | 107 | DMACH_UART0_RX, |
160 | }, { | 108 | DMACH_UART0_TX, |
161 | .peri_id = (u8)DMACH_MSM_REQ3, | 109 | DMACH_UART1_RX, |
162 | }, { | 110 | DMACH_UART1_TX, |
163 | .peri_id = (u8)DMACH_SPI1_RX, | 111 | DMACH_UART3_RX, |
164 | .rqtype = DEVTOMEM, | 112 | DMACH_UART3_TX, |
165 | }, { | 113 | DMACH_SLIMBUS1_RX, |
166 | .peri_id = (u8)DMACH_SPI1_TX, | 114 | DMACH_SLIMBUS1_TX, |
167 | .rqtype = MEMTODEV, | 115 | DMACH_SLIMBUS3_RX, |
168 | }, { | 116 | DMACH_SLIMBUS3_TX, |
169 | .peri_id = (u8)DMACH_I2S0S_TX, | 117 | DMACH_SLIMBUS5_RX, |
170 | .rqtype = MEMTODEV, | 118 | DMACH_SLIMBUS5_TX, |
171 | }, { | ||
172 | .peri_id = (u8)DMACH_I2S0_RX, | ||
173 | .rqtype = DEVTOMEM, | ||
174 | }, { | ||
175 | .peri_id = (u8)DMACH_I2S0_TX, | ||
176 | .rqtype = MEMTODEV, | ||
177 | }, { | ||
178 | .peri_id = (u8)DMACH_I2S1_RX, | ||
179 | .rqtype = DEVTOMEM, | ||
180 | }, { | ||
181 | .peri_id = (u8)DMACH_I2S1_TX, | ||
182 | .rqtype = MEMTODEV, | ||
183 | }, { | ||
184 | .peri_id = (u8)DMACH_UART0_RX, | ||
185 | .rqtype = DEVTOMEM, | ||
186 | }, { | ||
187 | .peri_id = (u8)DMACH_UART0_TX, | ||
188 | .rqtype = MEMTODEV, | ||
189 | }, { | ||
190 | .peri_id = (u8)DMACH_UART1_RX, | ||
191 | .rqtype = DEVTOMEM, | ||
192 | }, { | ||
193 | .peri_id = (u8)DMACH_UART1_TX, | ||
194 | .rqtype = MEMTODEV, | ||
195 | }, { | ||
196 | .peri_id = (u8)DMACH_UART3_RX, | ||
197 | .rqtype = DEVTOMEM, | ||
198 | }, { | ||
199 | .peri_id = (u8)DMACH_UART3_TX, | ||
200 | .rqtype = MEMTODEV, | ||
201 | }, { | ||
202 | .peri_id = (u8)DMACH_SLIMBUS1_RX, | ||
203 | .rqtype = DEVTOMEM, | ||
204 | }, { | ||
205 | .peri_id = (u8)DMACH_SLIMBUS1_TX, | ||
206 | .rqtype = MEMTODEV, | ||
207 | }, { | ||
208 | .peri_id = (u8)DMACH_SLIMBUS3_RX, | ||
209 | .rqtype = DEVTOMEM, | ||
210 | }, { | ||
211 | .peri_id = (u8)DMACH_SLIMBUS3_TX, | ||
212 | .rqtype = MEMTODEV, | ||
213 | }, { | ||
214 | .peri_id = (u8)DMACH_SLIMBUS5_RX, | ||
215 | .rqtype = DEVTOMEM, | ||
216 | }, { | ||
217 | .peri_id = (u8)DMACH_SLIMBUS5_TX, | ||
218 | .rqtype = MEMTODEV, | ||
219 | }, | ||
220 | }; | 119 | }; |
221 | 120 | ||
222 | struct dma_pl330_platdata exynos4_pdma1_pdata = { | 121 | struct dma_pl330_platdata exynos4_pdma1_pdata = { |
223 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), | 122 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), |
224 | .peri = pdma1_peri, | 123 | .peri_id = pdma1_peri, |
225 | }; | 124 | }; |
226 | 125 | ||
227 | struct amba_device exynos4_device_pdma1 = { | 126 | struct amba_device exynos4_device_pdma1 = { |
@@ -242,7 +141,15 @@ struct amba_device exynos4_device_pdma1 = { | |||
242 | 141 | ||
243 | static int __init exynos4_dma_init(void) | 142 | static int __init exynos4_dma_init(void) |
244 | { | 143 | { |
144 | if (of_have_populated_dt()) | ||
145 | return 0; | ||
146 | |||
147 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); | ||
148 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); | ||
245 | amba_device_register(&exynos4_device_pdma0, &iomem_resource); | 149 | amba_device_register(&exynos4_device_pdma0, &iomem_resource); |
150 | |||
151 | dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); | ||
152 | dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); | ||
246 | amba_device_register(&exynos4_device_pdma1, &iomem_resource); | 153 | amba_device_register(&exynos4_device_pdma1, &iomem_resource); |
247 | 154 | ||
248 | return 0; | 155 | return 0; |
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index dfd4b7eecb90..713dd5251c64 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h | |||
@@ -17,13 +17,13 @@ | |||
17 | 17 | ||
18 | /* PPI: Private Peripheral Interrupt */ | 18 | /* PPI: Private Peripheral Interrupt */ |
19 | 19 | ||
20 | #define IRQ_PPI(x) S5P_IRQ(x+16) | 20 | #define IRQ_PPI(x) (x+16) |
21 | 21 | ||
22 | #define IRQ_MCT_LOCALTIMER IRQ_PPI(12) | 22 | #define IRQ_MCT_LOCALTIMER IRQ_PPI(12) |
23 | 23 | ||
24 | /* SPI: Shared Peripheral Interrupt */ | 24 | /* SPI: Shared Peripheral Interrupt */ |
25 | 25 | ||
26 | #define IRQ_SPI(x) S5P_IRQ(x+32) | 26 | #define IRQ_SPI(x) (x+32) |
27 | 27 | ||
28 | #define IRQ_EINT0 IRQ_SPI(16) | 28 | #define IRQ_EINT0 IRQ_SPI(16) |
29 | #define IRQ_EINT1 IRQ_SPI(17) | 29 | #define IRQ_EINT1 IRQ_SPI(17) |
@@ -163,7 +163,9 @@ | |||
163 | #define IRQ_GPIO2_NR_GROUPS 9 | 163 | #define IRQ_GPIO2_NR_GROUPS 9 |
164 | #define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) | 164 | #define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) |
165 | 165 | ||
166 | #define IRQ_TIMER_BASE (IRQ_GPIO_END + 64) | ||
167 | |||
166 | /* Set the default NR_IRQS */ | 168 | /* Set the default NR_IRQS */ |
167 | #define NR_IRQS (IRQ_GPIO_END + 64) | 169 | #define NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT) |
168 | 170 | ||
169 | #endif /* __ASM_ARCH_IRQS_H */ | 171 | #endif /* __ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 058541d45af0..d1829860a0ec 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
@@ -149,7 +149,6 @@ | |||
149 | #define S3C_PA_WDT EXYNOS4_PA_WATCHDOG | 149 | #define S3C_PA_WDT EXYNOS4_PA_WATCHDOG |
150 | #define S3C_PA_UART EXYNOS4_PA_UART | 150 | #define S3C_PA_UART EXYNOS4_PA_UART |
151 | 151 | ||
152 | #define S5P_PA_CHIPID EXYNOS4_PA_CHIPID | ||
153 | #define S5P_PA_EHCI EXYNOS4_PA_EHCI | 152 | #define S5P_PA_EHCI EXYNOS4_PA_EHCI |
154 | #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 | 153 | #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 |
155 | #define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 | 154 | #define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 |
@@ -166,26 +165,17 @@ | |||
166 | #define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA | 165 | #define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA |
167 | #define S5P_PA_SDO EXYNOS4_PA_SDO | 166 | #define S5P_PA_SDO EXYNOS4_PA_SDO |
168 | #define S5P_PA_SDRAM EXYNOS4_PA_SDRAM | 167 | #define S5P_PA_SDRAM EXYNOS4_PA_SDRAM |
169 | #define S5P_PA_SROMC EXYNOS4_PA_SROMC | ||
170 | #define S5P_PA_SYSCON EXYNOS4_PA_SYSCON | ||
171 | #define S5P_PA_TIMER EXYNOS4_PA_TIMER | ||
172 | #define S5P_PA_VP EXYNOS4_PA_VP | 168 | #define S5P_PA_VP EXYNOS4_PA_VP |
173 | 169 | ||
174 | #define SAMSUNG_PA_ADC EXYNOS4_PA_ADC | 170 | #define SAMSUNG_PA_ADC EXYNOS4_PA_ADC |
175 | #define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1 | 171 | #define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1 |
176 | #define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD | 172 | #define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD |
177 | 173 | ||
178 | #define EXYNOS_PA_COMBINER EXYNOS4_PA_COMBINER | ||
179 | #define EXYNOS_PA_GIC_CPU EXYNOS4_PA_GIC_CPU | ||
180 | #define EXYNOS_PA_GIC_DIST EXYNOS4_PA_GIC_DIST | ||
181 | #define EXYNOS_PA_PMU EXYNOS4_PA_PMU | ||
182 | #define EXYNOS_PA_SYSTIMER EXYNOS4_PA_SYSTIMER | ||
183 | |||
184 | /* Compatibility UART */ | 174 | /* Compatibility UART */ |
185 | 175 | ||
186 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | 176 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) |
187 | 177 | ||
188 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | 178 | #define S5P_PA_UART(x) (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET)) |
189 | #define S5P_PA_UART0 S5P_PA_UART(0) | 179 | #define S5P_PA_UART0 S5P_PA_UART(0) |
190 | #define S5P_PA_UART1 S5P_PA_UART(1) | 180 | #define S5P_PA_UART1 S5P_PA_UART(1) |
191 | #define S5P_PA_UART2 S5P_PA_UART(2) | 181 | #define S5P_PA_UART2 S5P_PA_UART(2) |
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 5e3220c18fc7..0063a6de3dc8 100644 --- a/arch/arm/mach-exynos/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h | |||
@@ -13,8 +13,6 @@ | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | 13 | #ifndef __ASM_ARCH_SYSTEM_H |
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 14 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
15 | 15 | ||
16 | #include <plat/system-reset.h> | ||
17 | |||
18 | static void arch_idle(void) | 16 | static void arch_idle(void) |
19 | { | 17 | { |
20 | /* nothing here yet */ | 18 | /* nothing here yet */ |
diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c deleted file mode 100644 index a8a83e3881a4..000000000000 --- a/arch/arm/mach-exynos/init.c +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/init.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/serial_core.h> | ||
12 | |||
13 | #include <plat/cpu.h> | ||
14 | #include <plat/devs.h> | ||
15 | #include <plat/regs-serial.h> | ||
16 | |||
17 | static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = { | ||
18 | [0] = { | ||
19 | .name = "uclk1", | ||
20 | .divisor = 1, | ||
21 | .min_baud = 0, | ||
22 | .max_baud = 0, | ||
23 | }, | ||
24 | }; | ||
25 | |||
26 | /* uart registration process */ | ||
27 | void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
28 | { | ||
29 | struct s3c2410_uartcfg *tcfg = cfg; | ||
30 | u32 ucnt; | ||
31 | |||
32 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | ||
33 | if (!tcfg->clocks) { | ||
34 | tcfg->has_fracval = 1; | ||
35 | tcfg->clocks = exynos4_serial_clocks; | ||
36 | tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks); | ||
37 | } | ||
38 | tcfg->flags |= NO_NEED_CHECK_CLKSRC; | ||
39 | } | ||
40 | |||
41 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); | ||
42 | } | ||
diff --git a/arch/arm/mach-exynos/irq-combiner.c b/arch/arm/mach-exynos/irq-combiner.c deleted file mode 100644 index 5a2758ab055e..000000000000 --- a/arch/arm/mach-exynos/irq-combiner.c +++ /dev/null | |||
@@ -1,124 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/irq-combiner.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Based on arch/arm/common/gic.c | ||
7 | * | ||
8 | * IRQ COMBINER support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/io.h> | ||
16 | |||
17 | #include <asm/mach/irq.h> | ||
18 | |||
19 | #define COMBINER_ENABLE_SET 0x0 | ||
20 | #define COMBINER_ENABLE_CLEAR 0x4 | ||
21 | #define COMBINER_INT_STATUS 0xC | ||
22 | |||
23 | static DEFINE_SPINLOCK(irq_controller_lock); | ||
24 | |||
25 | struct combiner_chip_data { | ||
26 | unsigned int irq_offset; | ||
27 | unsigned int irq_mask; | ||
28 | void __iomem *base; | ||
29 | }; | ||
30 | |||
31 | static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; | ||
32 | |||
33 | static inline void __iomem *combiner_base(struct irq_data *data) | ||
34 | { | ||
35 | struct combiner_chip_data *combiner_data = | ||
36 | irq_data_get_irq_chip_data(data); | ||
37 | |||
38 | return combiner_data->base; | ||
39 | } | ||
40 | |||
41 | static void combiner_mask_irq(struct irq_data *data) | ||
42 | { | ||
43 | u32 mask = 1 << (data->irq % 32); | ||
44 | |||
45 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); | ||
46 | } | ||
47 | |||
48 | static void combiner_unmask_irq(struct irq_data *data) | ||
49 | { | ||
50 | u32 mask = 1 << (data->irq % 32); | ||
51 | |||
52 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); | ||
53 | } | ||
54 | |||
55 | static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) | ||
56 | { | ||
57 | struct combiner_chip_data *chip_data = irq_get_handler_data(irq); | ||
58 | struct irq_chip *chip = irq_get_chip(irq); | ||
59 | unsigned int cascade_irq, combiner_irq; | ||
60 | unsigned long status; | ||
61 | |||
62 | chained_irq_enter(chip, desc); | ||
63 | |||
64 | spin_lock(&irq_controller_lock); | ||
65 | status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); | ||
66 | spin_unlock(&irq_controller_lock); | ||
67 | status &= chip_data->irq_mask; | ||
68 | |||
69 | if (status == 0) | ||
70 | goto out; | ||
71 | |||
72 | combiner_irq = __ffs(status); | ||
73 | |||
74 | cascade_irq = combiner_irq + (chip_data->irq_offset & ~31); | ||
75 | if (unlikely(cascade_irq >= NR_IRQS)) | ||
76 | do_bad_IRQ(cascade_irq, desc); | ||
77 | else | ||
78 | generic_handle_irq(cascade_irq); | ||
79 | |||
80 | out: | ||
81 | chained_irq_exit(chip, desc); | ||
82 | } | ||
83 | |||
84 | static struct irq_chip combiner_chip = { | ||
85 | .name = "COMBINER", | ||
86 | .irq_mask = combiner_mask_irq, | ||
87 | .irq_unmask = combiner_unmask_irq, | ||
88 | }; | ||
89 | |||
90 | void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) | ||
91 | { | ||
92 | if (combiner_nr >= MAX_COMBINER_NR) | ||
93 | BUG(); | ||
94 | if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0) | ||
95 | BUG(); | ||
96 | irq_set_chained_handler(irq, combiner_handle_cascade_irq); | ||
97 | } | ||
98 | |||
99 | void __init combiner_init(unsigned int combiner_nr, void __iomem *base, | ||
100 | unsigned int irq_start) | ||
101 | { | ||
102 | unsigned int i; | ||
103 | |||
104 | if (combiner_nr >= MAX_COMBINER_NR) | ||
105 | BUG(); | ||
106 | |||
107 | combiner_data[combiner_nr].base = base; | ||
108 | combiner_data[combiner_nr].irq_offset = irq_start; | ||
109 | combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3); | ||
110 | |||
111 | /* Disable all interrupts */ | ||
112 | |||
113 | __raw_writel(combiner_data[combiner_nr].irq_mask, | ||
114 | base + COMBINER_ENABLE_CLEAR); | ||
115 | |||
116 | /* Setup the Linux IRQ subsystem */ | ||
117 | |||
118 | for (i = irq_start; i < combiner_data[combiner_nr].irq_offset | ||
119 | + MAX_IRQ_IN_COMBINER; i++) { | ||
120 | irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq); | ||
121 | irq_set_chip_data(i, &combiner_data[combiner_nr]); | ||
122 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | ||
123 | } | ||
124 | } | ||
diff --git a/arch/arm/mach-exynos/irq-eint.c b/arch/arm/mach-exynos/irq-eint.c deleted file mode 100644 index badb8c66fc9b..000000000000 --- a/arch/arm/mach-exynos/irq-eint.c +++ /dev/null | |||
@@ -1,237 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/irq-eint.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - IRQ EINT support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/io.h> | ||
17 | #include <linux/sysdev.h> | ||
18 | #include <linux/gpio.h> | ||
19 | |||
20 | #include <plat/pm.h> | ||
21 | #include <plat/cpu.h> | ||
22 | #include <plat/gpio-cfg.h> | ||
23 | |||
24 | #include <mach/regs-gpio.h> | ||
25 | |||
26 | #include <asm/mach/irq.h> | ||
27 | |||
28 | static DEFINE_SPINLOCK(eint_lock); | ||
29 | |||
30 | static unsigned int eint0_15_data[16]; | ||
31 | |||
32 | static unsigned int exynos4_get_irq_nr(unsigned int number) | ||
33 | { | ||
34 | u32 ret = 0; | ||
35 | |||
36 | switch (number) { | ||
37 | case 0 ... 3: | ||
38 | ret = (number + IRQ_EINT0); | ||
39 | break; | ||
40 | case 4 ... 7: | ||
41 | ret = (number + (IRQ_EINT4 - 4)); | ||
42 | break; | ||
43 | case 8 ... 15: | ||
44 | ret = (number + (IRQ_EINT8 - 8)); | ||
45 | break; | ||
46 | default: | ||
47 | printk(KERN_ERR "number available : %d\n", number); | ||
48 | } | ||
49 | |||
50 | return ret; | ||
51 | } | ||
52 | |||
53 | static inline void exynos4_irq_eint_mask(struct irq_data *data) | ||
54 | { | ||
55 | u32 mask; | ||
56 | |||
57 | spin_lock(&eint_lock); | ||
58 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); | ||
59 | mask |= eint_irq_to_bit(data->irq); | ||
60 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); | ||
61 | spin_unlock(&eint_lock); | ||
62 | } | ||
63 | |||
64 | static void exynos4_irq_eint_unmask(struct irq_data *data) | ||
65 | { | ||
66 | u32 mask; | ||
67 | |||
68 | spin_lock(&eint_lock); | ||
69 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); | ||
70 | mask &= ~(eint_irq_to_bit(data->irq)); | ||
71 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); | ||
72 | spin_unlock(&eint_lock); | ||
73 | } | ||
74 | |||
75 | static inline void exynos4_irq_eint_ack(struct irq_data *data) | ||
76 | { | ||
77 | __raw_writel(eint_irq_to_bit(data->irq), | ||
78 | S5P_EINT_PEND(EINT_REG_NR(data->irq))); | ||
79 | } | ||
80 | |||
81 | static void exynos4_irq_eint_maskack(struct irq_data *data) | ||
82 | { | ||
83 | exynos4_irq_eint_mask(data); | ||
84 | exynos4_irq_eint_ack(data); | ||
85 | } | ||
86 | |||
87 | static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type) | ||
88 | { | ||
89 | int offs = EINT_OFFSET(data->irq); | ||
90 | int shift; | ||
91 | u32 ctrl, mask; | ||
92 | u32 newvalue = 0; | ||
93 | |||
94 | switch (type) { | ||
95 | case IRQ_TYPE_EDGE_RISING: | ||
96 | newvalue = S5P_IRQ_TYPE_EDGE_RISING; | ||
97 | break; | ||
98 | |||
99 | case IRQ_TYPE_EDGE_FALLING: | ||
100 | newvalue = S5P_IRQ_TYPE_EDGE_FALLING; | ||
101 | break; | ||
102 | |||
103 | case IRQ_TYPE_EDGE_BOTH: | ||
104 | newvalue = S5P_IRQ_TYPE_EDGE_BOTH; | ||
105 | break; | ||
106 | |||
107 | case IRQ_TYPE_LEVEL_LOW: | ||
108 | newvalue = S5P_IRQ_TYPE_LEVEL_LOW; | ||
109 | break; | ||
110 | |||
111 | case IRQ_TYPE_LEVEL_HIGH: | ||
112 | newvalue = S5P_IRQ_TYPE_LEVEL_HIGH; | ||
113 | break; | ||
114 | |||
115 | default: | ||
116 | printk(KERN_ERR "No such irq type %d", type); | ||
117 | return -EINVAL; | ||
118 | } | ||
119 | |||
120 | shift = (offs & 0x7) * 4; | ||
121 | mask = 0x7 << shift; | ||
122 | |||
123 | spin_lock(&eint_lock); | ||
124 | ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq))); | ||
125 | ctrl &= ~mask; | ||
126 | ctrl |= newvalue << shift; | ||
127 | __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq))); | ||
128 | spin_unlock(&eint_lock); | ||
129 | |||
130 | switch (offs) { | ||
131 | case 0 ... 7: | ||
132 | s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); | ||
133 | break; | ||
134 | case 8 ... 15: | ||
135 | s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE); | ||
136 | break; | ||
137 | case 16 ... 23: | ||
138 | s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE); | ||
139 | break; | ||
140 | case 24 ... 31: | ||
141 | s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE); | ||
142 | break; | ||
143 | default: | ||
144 | printk(KERN_ERR "No such irq number %d", offs); | ||
145 | } | ||
146 | |||
147 | return 0; | ||
148 | } | ||
149 | |||
150 | static struct irq_chip exynos4_irq_eint = { | ||
151 | .name = "exynos4-eint", | ||
152 | .irq_mask = exynos4_irq_eint_mask, | ||
153 | .irq_unmask = exynos4_irq_eint_unmask, | ||
154 | .irq_mask_ack = exynos4_irq_eint_maskack, | ||
155 | .irq_ack = exynos4_irq_eint_ack, | ||
156 | .irq_set_type = exynos4_irq_eint_set_type, | ||
157 | #ifdef CONFIG_PM | ||
158 | .irq_set_wake = s3c_irqext_wake, | ||
159 | #endif | ||
160 | }; | ||
161 | |||
162 | /* exynos4_irq_demux_eint | ||
163 | * | ||
164 | * This function demuxes the IRQ from from EINTs 16 to 31. | ||
165 | * It is designed to be inlined into the specific handler | ||
166 | * s5p_irq_demux_eintX_Y. | ||
167 | * | ||
168 | * Each EINT pend/mask registers handle eight of them. | ||
169 | */ | ||
170 | static inline void exynos4_irq_demux_eint(unsigned int start) | ||
171 | { | ||
172 | unsigned int irq; | ||
173 | |||
174 | u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); | ||
175 | u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); | ||
176 | |||
177 | status &= ~mask; | ||
178 | status &= 0xff; | ||
179 | |||
180 | while (status) { | ||
181 | irq = fls(status) - 1; | ||
182 | generic_handle_irq(irq + start); | ||
183 | status &= ~(1 << irq); | ||
184 | } | ||
185 | } | ||
186 | |||
187 | static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) | ||
188 | { | ||
189 | struct irq_chip *chip = irq_get_chip(irq); | ||
190 | chained_irq_enter(chip, desc); | ||
191 | exynos4_irq_demux_eint(IRQ_EINT(16)); | ||
192 | exynos4_irq_demux_eint(IRQ_EINT(24)); | ||
193 | chained_irq_exit(chip, desc); | ||
194 | } | ||
195 | |||
196 | static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) | ||
197 | { | ||
198 | u32 *irq_data = irq_get_handler_data(irq); | ||
199 | struct irq_chip *chip = irq_get_chip(irq); | ||
200 | |||
201 | chained_irq_enter(chip, desc); | ||
202 | chip->irq_mask(&desc->irq_data); | ||
203 | |||
204 | if (chip->irq_ack) | ||
205 | chip->irq_ack(&desc->irq_data); | ||
206 | |||
207 | generic_handle_irq(*irq_data); | ||
208 | |||
209 | chip->irq_unmask(&desc->irq_data); | ||
210 | chained_irq_exit(chip, desc); | ||
211 | } | ||
212 | |||
213 | int __init exynos4_init_irq_eint(void) | ||
214 | { | ||
215 | int irq; | ||
216 | |||
217 | for (irq = 0 ; irq <= 31 ; irq++) { | ||
218 | irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint, | ||
219 | handle_level_irq); | ||
220 | set_irq_flags(IRQ_EINT(irq), IRQF_VALID); | ||
221 | } | ||
222 | |||
223 | irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); | ||
224 | |||
225 | for (irq = 0 ; irq <= 15 ; irq++) { | ||
226 | eint0_15_data[irq] = IRQ_EINT(irq); | ||
227 | |||
228 | irq_set_handler_data(exynos4_get_irq_nr(irq), | ||
229 | &eint0_15_data[irq]); | ||
230 | irq_set_chained_handler(exynos4_get_irq_nr(irq), | ||
231 | exynos4_irq_eint0_15); | ||
232 | } | ||
233 | |||
234 | return 0; | ||
235 | } | ||
236 | |||
237 | arch_initcall(exynos4_init_irq_eint); | ||
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c index 49da3089249a..d726fcd3acf9 100644 --- a/arch/arm/mach-exynos/mach-armlex4210.c +++ b/arch/arm/mach-exynos/mach-armlex4210.c | |||
@@ -21,7 +21,6 @@ | |||
21 | 21 | ||
22 | #include <plat/cpu.h> | 22 | #include <plat/cpu.h> |
23 | #include <plat/devs.h> | 23 | #include <plat/devs.h> |
24 | #include <plat/exynos4.h> | ||
25 | #include <plat/gpio-cfg.h> | 24 | #include <plat/gpio-cfg.h> |
26 | #include <plat/regs-serial.h> | 25 | #include <plat/regs-serial.h> |
27 | #include <plat/regs-srom.h> | 26 | #include <plat/regs-srom.h> |
@@ -29,6 +28,8 @@ | |||
29 | 28 | ||
30 | #include <mach/map.h> | 29 | #include <mach/map.h> |
31 | 30 | ||
31 | #include "common.h" | ||
32 | |||
32 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 33 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
33 | #define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 34 | #define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
34 | S3C2410_UCON_RXILEVEL | \ | 35 | S3C2410_UCON_RXILEVEL | \ |
@@ -188,7 +189,7 @@ static void __init armlex4210_smsc911x_init(void) | |||
188 | 189 | ||
189 | static void __init armlex4210_map_io(void) | 190 | static void __init armlex4210_map_io(void) |
190 | { | 191 | { |
191 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 192 | exynos_init_io(NULL, 0); |
192 | s3c24xx_init_clocks(24000000); | 193 | s3c24xx_init_clocks(24000000); |
193 | s3c24xx_init_uarts(armlex4210_uartcfgs, | 194 | s3c24xx_init_uarts(armlex4210_uartcfgs, |
194 | ARRAY_SIZE(armlex4210_uartcfgs)); | 195 | ARRAY_SIZE(armlex4210_uartcfgs)); |
@@ -214,4 +215,5 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210") | |||
214 | .handle_irq = gic_handle_irq, | 215 | .handle_irq = gic_handle_irq, |
215 | .init_machine = armlex4210_machine_init, | 216 | .init_machine = armlex4210_machine_init, |
216 | .timer = &exynos4_timer, | 217 | .timer = &exynos4_timer, |
218 | .restart = exynos4_restart, | ||
217 | MACHINE_END | 219 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c new file mode 100644 index 000000000000..85fa02767d67 --- /dev/null +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c | |||
@@ -0,0 +1,85 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4210 flattened device tree enabled machine | ||
3 | * | ||
4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * Copyright (c) 2010-2011 Linaro Ltd. | ||
7 | * www.linaro.org | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/of_platform.h> | ||
15 | #include <linux/serial_core.h> | ||
16 | |||
17 | #include <asm/mach/arch.h> | ||
18 | #include <mach/map.h> | ||
19 | |||
20 | #include <plat/cpu.h> | ||
21 | #include <plat/regs-serial.h> | ||
22 | #include <plat/exynos4.h> | ||
23 | |||
24 | /* | ||
25 | * The following lookup table is used to override device names when devices | ||
26 | * are registered from device tree. This is temporarily added to enable | ||
27 | * device tree support addition for the Exynos4 architecture. | ||
28 | * | ||
29 | * For drivers that require platform data to be provided from the machine | ||
30 | * file, a platform data pointer can also be supplied along with the | ||
31 | * devices names. Usually, the platform data elements that cannot be parsed | ||
32 | * from the device tree by the drivers (example: function pointers) are | ||
33 | * supplied. But it should be noted that this is a temporary mechanism and | ||
34 | * at some point, the drivers should be capable of parsing all the platform | ||
35 | * data from the device tree. | ||
36 | */ | ||
37 | static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = { | ||
38 | OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART0, | ||
39 | "exynos4210-uart.0", NULL), | ||
40 | OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART1, | ||
41 | "exynos4210-uart.1", NULL), | ||
42 | OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART2, | ||
43 | "exynos4210-uart.2", NULL), | ||
44 | OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART3, | ||
45 | "exynos4210-uart.3", NULL), | ||
46 | OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(0), | ||
47 | "exynos4-sdhci.0", NULL), | ||
48 | OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(1), | ||
49 | "exynos4-sdhci.1", NULL), | ||
50 | OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(2), | ||
51 | "exynos4-sdhci.2", NULL), | ||
52 | OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(3), | ||
53 | "exynos4-sdhci.3", NULL), | ||
54 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(0), | ||
55 | "s3c2440-i2c.0", NULL), | ||
56 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL), | ||
57 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL), | ||
58 | {}, | ||
59 | }; | ||
60 | |||
61 | static void __init exynos4210_dt_map_io(void) | ||
62 | { | ||
63 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
64 | s3c24xx_init_clocks(24000000); | ||
65 | } | ||
66 | |||
67 | static void __init exynos4210_dt_machine_init(void) | ||
68 | { | ||
69 | of_platform_populate(NULL, of_default_bus_match_table, | ||
70 | exynos4210_auxdata_lookup, NULL); | ||
71 | } | ||
72 | |||
73 | static char const *exynos4210_dt_compat[] __initdata = { | ||
74 | "samsung,exynos4210", | ||
75 | NULL | ||
76 | }; | ||
77 | |||
78 | DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") | ||
79 | /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */ | ||
80 | .init_irq = exynos4_init_irq, | ||
81 | .map_io = exynos4210_dt_map_io, | ||
82 | .init_machine = exynos4210_dt_machine_init, | ||
83 | .timer = &exynos4_timer, | ||
84 | .dt_compat = exynos4210_dt_compat, | ||
85 | MACHINE_END | ||
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 5acec11821a4..b895ec031105 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -38,7 +38,6 @@ | |||
38 | #include <plat/adc.h> | 38 | #include <plat/adc.h> |
39 | #include <plat/regs-fb-v4.h> | 39 | #include <plat/regs-fb-v4.h> |
40 | #include <plat/regs-serial.h> | 40 | #include <plat/regs-serial.h> |
41 | #include <plat/exynos4.h> | ||
42 | #include <plat/cpu.h> | 41 | #include <plat/cpu.h> |
43 | #include <plat/devs.h> | 42 | #include <plat/devs.h> |
44 | #include <plat/fb.h> | 43 | #include <plat/fb.h> |
@@ -55,6 +54,8 @@ | |||
55 | 54 | ||
56 | #include <mach/map.h> | 55 | #include <mach/map.h> |
57 | 56 | ||
57 | #include "common.h" | ||
58 | |||
58 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 59 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
59 | #define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 60 | #define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
60 | S3C2410_UCON_RXILEVEL | \ | 61 | S3C2410_UCON_RXILEVEL | \ |
@@ -248,13 +249,8 @@ static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power) | |||
248 | 249 | ||
249 | static int nuri_bl_init(struct device *dev) | 250 | static int nuri_bl_init(struct device *dev) |
250 | { | 251 | { |
251 | int ret, gpio = EXYNOS4_GPE2(3); | 252 | return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW, |
252 | 253 | "LCD_LD0_EN"); | |
253 | ret = gpio_request(gpio, "LCD_LDO_EN"); | ||
254 | if (!ret) | ||
255 | gpio_direction_output(gpio, 0); | ||
256 | |||
257 | return ret; | ||
258 | } | 254 | } |
259 | 255 | ||
260 | static int nuri_bl_notify(struct device *dev, int brightness) | 256 | static int nuri_bl_notify(struct device *dev, int brightness) |
@@ -1284,7 +1280,7 @@ static struct platform_device *nuri_devices[] __initdata = { | |||
1284 | 1280 | ||
1285 | static void __init nuri_map_io(void) | 1281 | static void __init nuri_map_io(void) |
1286 | { | 1282 | { |
1287 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 1283 | exynos_init_io(NULL, 0); |
1288 | s3c24xx_init_clocks(24000000); | 1284 | s3c24xx_init_clocks(24000000); |
1289 | s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); | 1285 | s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); |
1290 | } | 1286 | } |
@@ -1338,4 +1334,5 @@ MACHINE_START(NURI, "NURI") | |||
1338 | .init_machine = nuri_machine_init, | 1334 | .init_machine = nuri_machine_init, |
1339 | .timer = &exynos4_timer, | 1335 | .timer = &exynos4_timer, |
1340 | .reserve = &nuri_reserve, | 1336 | .reserve = &nuri_reserve, |
1337 | .restart = exynos4_restart, | ||
1341 | MACHINE_END | 1338 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 5561b06c38ec..586eb995aa96 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -29,7 +29,6 @@ | |||
29 | 29 | ||
30 | #include <plat/regs-serial.h> | 30 | #include <plat/regs-serial.h> |
31 | #include <plat/regs-fb-v4.h> | 31 | #include <plat/regs-fb-v4.h> |
32 | #include <plat/exynos4.h> | ||
33 | #include <plat/cpu.h> | 32 | #include <plat/cpu.h> |
34 | #include <plat/devs.h> | 33 | #include <plat/devs.h> |
35 | #include <plat/sdhci.h> | 34 | #include <plat/sdhci.h> |
@@ -44,6 +43,8 @@ | |||
44 | 43 | ||
45 | #include <mach/map.h> | 44 | #include <mach/map.h> |
46 | 45 | ||
46 | #include "common.h" | ||
47 | |||
47 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 48 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
48 | #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 49 | #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
49 | S3C2410_UCON_RXILEVEL | \ | 50 | S3C2410_UCON_RXILEVEL | \ |
@@ -639,7 +640,7 @@ static void s5p_tv_setup(void) | |||
639 | 640 | ||
640 | static void __init origen_map_io(void) | 641 | static void __init origen_map_io(void) |
641 | { | 642 | { |
642 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 643 | exynos_init_io(NULL, 0); |
643 | s3c24xx_init_clocks(24000000); | 644 | s3c24xx_init_clocks(24000000); |
644 | s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); | 645 | s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); |
645 | } | 646 | } |
@@ -699,4 +700,5 @@ MACHINE_START(ORIGEN, "ORIGEN") | |||
699 | .init_machine = origen_machine_init, | 700 | .init_machine = origen_machine_init, |
700 | .timer = &exynos4_timer, | 701 | .timer = &exynos4_timer, |
701 | .reserve = &origen_reserve, | 702 | .reserve = &origen_reserve, |
703 | .restart = exynos4_restart, | ||
702 | MACHINE_END | 704 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index 722d82d7f217..d00e4f016a68 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <plat/clock.h> | 28 | #include <plat/clock.h> |
29 | #include <plat/cpu.h> | 29 | #include <plat/cpu.h> |
30 | #include <plat/devs.h> | 30 | #include <plat/devs.h> |
31 | #include <plat/exynos4.h> | ||
32 | #include <plat/gpio-cfg.h> | 31 | #include <plat/gpio-cfg.h> |
33 | #include <plat/iic.h> | 32 | #include <plat/iic.h> |
34 | #include <plat/keypad.h> | 33 | #include <plat/keypad.h> |
@@ -37,6 +36,8 @@ | |||
37 | 36 | ||
38 | #include <mach/map.h> | 37 | #include <mach/map.h> |
39 | 38 | ||
39 | #include "common.h" | ||
40 | |||
40 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 41 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
41 | #define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 42 | #define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
42 | S3C2410_UCON_RXILEVEL | \ | 43 | S3C2410_UCON_RXILEVEL | \ |
@@ -250,7 +251,7 @@ static void __init smdk4x12_map_io(void) | |||
250 | { | 251 | { |
251 | clk_xusbxti.rate = 24000000; | 252 | clk_xusbxti.rate = 24000000; |
252 | 253 | ||
253 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 254 | exynos_init_io(NULL, 0); |
254 | s3c24xx_init_clocks(clk_xusbxti.rate); | 255 | s3c24xx_init_clocks(clk_xusbxti.rate); |
255 | s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); | 256 | s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); |
256 | } | 257 | } |
@@ -291,6 +292,7 @@ MACHINE_START(SMDK4212, "SMDK4212") | |||
291 | .handle_irq = gic_handle_irq, | 292 | .handle_irq = gic_handle_irq, |
292 | .init_machine = smdk4x12_machine_init, | 293 | .init_machine = smdk4x12_machine_init, |
293 | .timer = &exynos4_timer, | 294 | .timer = &exynos4_timer, |
295 | .restart = exynos4_restart, | ||
294 | MACHINE_END | 296 | MACHINE_END |
295 | 297 | ||
296 | MACHINE_START(SMDK4412, "SMDK4412") | 298 | MACHINE_START(SMDK4412, "SMDK4412") |
@@ -302,4 +304,5 @@ MACHINE_START(SMDK4412, "SMDK4412") | |||
302 | .handle_irq = gic_handle_irq, | 304 | .handle_irq = gic_handle_irq, |
303 | .init_machine = smdk4x12_machine_init, | 305 | .init_machine = smdk4x12_machine_init, |
304 | .timer = &exynos4_timer, | 306 | .timer = &exynos4_timer, |
307 | .restart = exynos4_restart, | ||
305 | MACHINE_END | 308 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index edc60b6108ed..a27b23eee9fa 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <plat/regs-serial.h> | 28 | #include <plat/regs-serial.h> |
29 | #include <plat/regs-srom.h> | 29 | #include <plat/regs-srom.h> |
30 | #include <plat/regs-fb-v4.h> | 30 | #include <plat/regs-fb-v4.h> |
31 | #include <plat/exynos4.h> | ||
32 | #include <plat/cpu.h> | 31 | #include <plat/cpu.h> |
33 | #include <plat/devs.h> | 32 | #include <plat/devs.h> |
34 | #include <plat/fb.h> | 33 | #include <plat/fb.h> |
@@ -44,6 +43,8 @@ | |||
44 | 43 | ||
45 | #include <mach/map.h> | 44 | #include <mach/map.h> |
46 | 45 | ||
46 | #include "common.h" | ||
47 | |||
47 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 48 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
48 | #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 49 | #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
49 | S3C2410_UCON_RXILEVEL | \ | 50 | S3C2410_UCON_RXILEVEL | \ |
@@ -130,9 +131,7 @@ static void lcd_lte480wv_set_power(struct plat_lcd_data *pd, | |||
130 | gpio_free(EXYNOS4_GPD0(1)); | 131 | gpio_free(EXYNOS4_GPD0(1)); |
131 | #endif | 132 | #endif |
132 | /* fire nRESET on power up */ | 133 | /* fire nRESET on power up */ |
133 | gpio_request(EXYNOS4_GPX0(6), "GPX0"); | 134 | gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0"); |
134 | |||
135 | gpio_direction_output(EXYNOS4_GPX0(6), 1); | ||
136 | mdelay(100); | 135 | mdelay(100); |
137 | 136 | ||
138 | gpio_set_value(EXYNOS4_GPX0(6), 0); | 137 | gpio_set_value(EXYNOS4_GPX0(6), 0); |
@@ -333,7 +332,7 @@ static void s5p_tv_setup(void) | |||
333 | 332 | ||
334 | static void __init smdkv310_map_io(void) | 333 | static void __init smdkv310_map_io(void) |
335 | { | 334 | { |
336 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 335 | exynos_init_io(NULL, 0); |
337 | s3c24xx_init_clocks(24000000); | 336 | s3c24xx_init_clocks(24000000); |
338 | s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); | 337 | s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); |
339 | } | 338 | } |
@@ -380,6 +379,7 @@ MACHINE_START(SMDKV310, "SMDKV310") | |||
380 | .init_machine = smdkv310_machine_init, | 379 | .init_machine = smdkv310_machine_init, |
381 | .timer = &exynos4_timer, | 380 | .timer = &exynos4_timer, |
382 | .reserve = &smdkv310_reserve, | 381 | .reserve = &smdkv310_reserve, |
382 | .restart = exynos4_restart, | ||
383 | MACHINE_END | 383 | MACHINE_END |
384 | 384 | ||
385 | MACHINE_START(SMDKC210, "SMDKC210") | 385 | MACHINE_START(SMDKC210, "SMDKC210") |
@@ -390,4 +390,5 @@ MACHINE_START(SMDKC210, "SMDKC210") | |||
390 | .handle_irq = gic_handle_irq, | 390 | .handle_irq = gic_handle_irq, |
391 | .init_machine = smdkv310_machine_init, | 391 | .init_machine = smdkv310_machine_init, |
392 | .timer = &exynos4_timer, | 392 | .timer = &exynos4_timer, |
393 | .restart = exynos4_restart, | ||
393 | MACHINE_END | 394 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index cfc7d5076f5a..37ac93e8d6d9 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
29 | 29 | ||
30 | #include <plat/regs-serial.h> | 30 | #include <plat/regs-serial.h> |
31 | #include <plat/exynos4.h> | ||
32 | #include <plat/cpu.h> | 31 | #include <plat/cpu.h> |
33 | #include <plat/devs.h> | 32 | #include <plat/devs.h> |
34 | #include <plat/iic.h> | 33 | #include <plat/iic.h> |
@@ -48,6 +47,8 @@ | |||
48 | #include <media/s5p_fimc.h> | 47 | #include <media/s5p_fimc.h> |
49 | #include <media/m5mols.h> | 48 | #include <media/m5mols.h> |
50 | 49 | ||
50 | #include "common.h" | ||
51 | |||
51 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 52 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
52 | #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 53 | #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
53 | S3C2410_UCON_RXILEVEL | \ | 54 | S3C2410_UCON_RXILEVEL | \ |
@@ -609,8 +610,7 @@ static void __init universal_tsp_init(void) | |||
609 | 610 | ||
610 | /* TSP_LDO_ON: XMDMADDR_11 */ | 611 | /* TSP_LDO_ON: XMDMADDR_11 */ |
611 | gpio = EXYNOS4_GPE2(3); | 612 | gpio = EXYNOS4_GPE2(3); |
612 | gpio_request(gpio, "TSP_LDO_ON"); | 613 | gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON"); |
613 | gpio_direction_output(gpio, 1); | ||
614 | gpio_export(gpio, 0); | 614 | gpio_export(gpio, 0); |
615 | 615 | ||
616 | /* TSP_INT: XMDMADDR_7 */ | 616 | /* TSP_INT: XMDMADDR_7 */ |
@@ -670,8 +670,7 @@ static void __init universal_touchkey_init(void) | |||
670 | i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); | 670 | i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); |
671 | 671 | ||
672 | gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ | 672 | gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ |
673 | gpio_request(gpio, "3_TOUCH_EN"); | 673 | gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN"); |
674 | gpio_direction_output(gpio, 1); | ||
675 | } | 674 | } |
676 | 675 | ||
677 | static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { | 676 | static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { |
@@ -993,7 +992,7 @@ static struct platform_device *universal_devices[] __initdata = { | |||
993 | 992 | ||
994 | static void __init universal_map_io(void) | 993 | static void __init universal_map_io(void) |
995 | { | 994 | { |
996 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 995 | exynos_init_io(NULL, 0); |
997 | s3c24xx_init_clocks(24000000); | 996 | s3c24xx_init_clocks(24000000); |
998 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); | 997 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); |
999 | } | 998 | } |
@@ -1001,9 +1000,7 @@ static void __init universal_map_io(void) | |||
1001 | void s5p_tv_setup(void) | 1000 | void s5p_tv_setup(void) |
1002 | { | 1001 | { |
1003 | /* direct HPD to HDMI chip */ | 1002 | /* direct HPD to HDMI chip */ |
1004 | gpio_request(EXYNOS4_GPX3(7), "hpd-plug"); | 1003 | gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); |
1005 | |||
1006 | gpio_direction_input(EXYNOS4_GPX3(7)); | ||
1007 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); | 1004 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); |
1008 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); | 1005 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); |
1009 | 1006 | ||
@@ -1063,4 +1060,5 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") | |||
1063 | .init_machine = universal_machine_init, | 1060 | .init_machine = universal_machine_init, |
1064 | .timer = &exynos4_timer, | 1061 | .timer = &exynos4_timer, |
1065 | .reserve = &universal_reserve, | 1062 | .reserve = &universal_reserve, |
1063 | .restart = exynos4_restart, | ||
1066 | MACHINE_END | 1064 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 509a435afd4b..4093fea849c3 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c | |||
@@ -23,6 +23,7 @@ | |||
23 | 23 | ||
24 | #include <asm/cacheflush.h> | 24 | #include <asm/cacheflush.h> |
25 | #include <asm/hardware/cache-l2x0.h> | 25 | #include <asm/hardware/cache-l2x0.h> |
26 | #include <asm/smp_scu.h> | ||
26 | 27 | ||
27 | #include <plat/cpu.h> | 28 | #include <plat/cpu.h> |
28 | #include <plat/pm.h> | 29 | #include <plat/pm.h> |
@@ -213,27 +214,6 @@ static int exynos4_pm_add(struct sys_device *sysdev) | |||
213 | return 0; | 214 | return 0; |
214 | } | 215 | } |
215 | 216 | ||
216 | /* This function copy from linux/arch/arm/kernel/smp_scu.c */ | ||
217 | |||
218 | void exynos4_scu_enable(void __iomem *scu_base) | ||
219 | { | ||
220 | u32 scu_ctrl; | ||
221 | |||
222 | scu_ctrl = __raw_readl(scu_base); | ||
223 | /* already enabled? */ | ||
224 | if (scu_ctrl & 1) | ||
225 | return; | ||
226 | |||
227 | scu_ctrl |= 1; | ||
228 | __raw_writel(scu_ctrl, scu_base); | ||
229 | |||
230 | /* | ||
231 | * Ensure that the data accessed by CPU0 before the SCU was | ||
232 | * initialised is visible to the other CPUs. | ||
233 | */ | ||
234 | flush_cache_all(); | ||
235 | } | ||
236 | |||
237 | static unsigned long pll_base_rate; | 217 | static unsigned long pll_base_rate; |
238 | 218 | ||
239 | static void exynos4_restore_pll(void) | 219 | static void exynos4_restore_pll(void) |
@@ -402,7 +382,7 @@ static void exynos4_pm_resume(void) | |||
402 | 382 | ||
403 | exynos4_restore_pll(); | 383 | exynos4_restore_pll(); |
404 | 384 | ||
405 | exynos4_scu_enable(S5P_VA_SCU); | 385 | scu_enable(S5P_VA_SCU); |
406 | 386 | ||
407 | #ifdef CONFIG_CACHE_L2X0 | 387 | #ifdef CONFIG_CACHE_L2X0 |
408 | s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); | 388 | s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); |
diff --git a/arch/arm/mach-exynos/setup-sdhci.c b/arch/arm/mach-exynos/setup-sdhci.c deleted file mode 100644 index 92937b410906..000000000000 --- a/arch/arm/mach-exynos/setup-sdhci.c +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/setup-sdhci.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | |||
15 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
16 | |||
17 | char *exynos4_hsmmc_clksrcs[4] = { | ||
18 | [0] = NULL, | ||
19 | [1] = NULL, | ||
20 | [2] = "sclk_mmc", /* mmc_bus */ | ||
21 | [3] = NULL, | ||
22 | }; | ||
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c index 60b6774e1eaa..25b453601acc 100644 --- a/arch/arm/mach-footbridge/cats-hw.c +++ b/arch/arm/mach-footbridge/cats-hw.c | |||
@@ -91,4 +91,5 @@ MACHINE_START(CATS, "Chalice-CATS") | |||
91 | .map_io = footbridge_map_io, | 91 | .map_io = footbridge_map_io, |
92 | .init_irq = footbridge_init_irq, | 92 | .init_irq = footbridge_init_irq, |
93 | .timer = &isa_timer, | 93 | .timer = &isa_timer, |
94 | .restart = footbridge_restart, | ||
94 | MACHINE_END | 95 | MACHINE_END |
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 38a44f9b9da2..41978ee4f9d0 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c | |||
@@ -199,6 +199,33 @@ void __init footbridge_map_io(void) | |||
199 | iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); | 199 | iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); |
200 | } | 200 | } |
201 | 201 | ||
202 | void footbridge_restart(char mode, const char *cmd) | ||
203 | { | ||
204 | if (mode == 's') { | ||
205 | /* Jump into the ROM */ | ||
206 | soft_restart(0x41000000); | ||
207 | } else { | ||
208 | /* | ||
209 | * Force the watchdog to do a CPU reset. | ||
210 | * | ||
211 | * After making sure that the watchdog is disabled | ||
212 | * (so we can change the timer registers) we first | ||
213 | * enable the timer to autoreload itself. Next, the | ||
214 | * timer interval is set really short and any | ||
215 | * current interrupt request is cleared (so we can | ||
216 | * see an edge transition). Finally, TIMER4 is | ||
217 | * enabled as the watchdog. | ||
218 | */ | ||
219 | *CSR_SA110_CNTL &= ~(1 << 13); | ||
220 | *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | | ||
221 | TIMER_CNTL_AUTORELOAD | | ||
222 | TIMER_CNTL_DIV16; | ||
223 | *CSR_TIMER4_LOAD = 0x2; | ||
224 | *CSR_TIMER4_CLR = 0; | ||
225 | *CSR_SA110_CNTL |= (1 << 13); | ||
226 | } | ||
227 | } | ||
228 | |||
202 | #ifdef CONFIG_FOOTBRIDGE_ADDIN | 229 | #ifdef CONFIG_FOOTBRIDGE_ADDIN |
203 | 230 | ||
204 | static inline unsigned long fb_bus_sdram_offset(void) | 231 | static inline unsigned long fb_bus_sdram_offset(void) |
diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h index b05e662d21ad..c9767b892cb2 100644 --- a/arch/arm/mach-footbridge/common.h +++ b/arch/arm/mach-footbridge/common.h | |||
@@ -8,3 +8,4 @@ extern void footbridge_map_io(void); | |||
8 | extern void footbridge_init_irq(void); | 8 | extern void footbridge_init_irq(void); |
9 | 9 | ||
10 | extern void isa_init_irq(unsigned int irq); | 10 | extern void isa_init_irq(unsigned int irq); |
11 | extern void footbridge_restart(char, const char *); | ||
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c index 012210cf7d16..27716a7e5fc1 100644 --- a/arch/arm/mach-footbridge/ebsa285.c +++ b/arch/arm/mach-footbridge/ebsa285.c | |||
@@ -21,5 +21,6 @@ MACHINE_START(EBSA285, "EBSA285") | |||
21 | .map_io = footbridge_map_io, | 21 | .map_io = footbridge_map_io, |
22 | .init_irq = footbridge_init_irq, | 22 | .init_irq = footbridge_init_irq, |
23 | .timer = &footbridge_timer, | 23 | .timer = &footbridge_timer, |
24 | .restart = footbridge_restart, | ||
24 | MACHINE_END | 25 | MACHINE_END |
25 | 26 | ||
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h index 249f895910fb..a174a5841bc2 100644 --- a/arch/arm/mach-footbridge/include/mach/system.h +++ b/arch/arm/mach-footbridge/include/mach/system.h | |||
@@ -7,63 +7,7 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <linux/io.h> | ||
11 | #include <asm/hardware/dec21285.h> | ||
12 | #include <mach/hardware.h> | ||
13 | #include <asm/leds.h> | ||
14 | #include <asm/mach-types.h> | ||
15 | |||
16 | static inline void arch_idle(void) | 10 | static inline void arch_idle(void) |
17 | { | 11 | { |
18 | cpu_do_idle(); | 12 | cpu_do_idle(); |
19 | } | 13 | } |
20 | |||
21 | static inline void arch_reset(char mode, const char *cmd) | ||
22 | { | ||
23 | if (mode == 's') { | ||
24 | /* | ||
25 | * Jump into the ROM | ||
26 | */ | ||
27 | soft_restart(0x41000000); | ||
28 | } else { | ||
29 | if (machine_is_netwinder()) { | ||
30 | /* open up the SuperIO chip | ||
31 | */ | ||
32 | outb(0x87, 0x370); | ||
33 | outb(0x87, 0x370); | ||
34 | |||
35 | /* aux function group 1 (logical device 7) | ||
36 | */ | ||
37 | outb(0x07, 0x370); | ||
38 | outb(0x07, 0x371); | ||
39 | |||
40 | /* set GP16 for WD-TIMER output | ||
41 | */ | ||
42 | outb(0xe6, 0x370); | ||
43 | outb(0x00, 0x371); | ||
44 | |||
45 | /* set a RED LED and toggle WD_TIMER for rebooting | ||
46 | */ | ||
47 | outb(0xc4, 0x338); | ||
48 | } else { | ||
49 | /* | ||
50 | * Force the watchdog to do a CPU reset. | ||
51 | * | ||
52 | * After making sure that the watchdog is disabled | ||
53 | * (so we can change the timer registers) we first | ||
54 | * enable the timer to autoreload itself. Next, the | ||
55 | * timer interval is set really short and any | ||
56 | * current interrupt request is cleared (so we can | ||
57 | * see an edge transition). Finally, TIMER4 is | ||
58 | * enabled as the watchdog. | ||
59 | */ | ||
60 | *CSR_SA110_CNTL &= ~(1 << 13); | ||
61 | *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | | ||
62 | TIMER_CNTL_AUTORELOAD | | ||
63 | TIMER_CNTL_DIV16; | ||
64 | *CSR_TIMER4_LOAD = 0x2; | ||
65 | *CSR_TIMER4_CLR = 0; | ||
66 | *CSR_SA110_CNTL |= (1 << 13); | ||
67 | } | ||
68 | } | ||
69 | } | ||
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index 0d3846f3b60d..80a1c5cc9071 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c | |||
@@ -645,6 +645,32 @@ fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi) | |||
645 | #endif | 645 | #endif |
646 | } | 646 | } |
647 | 647 | ||
648 | static void netwinder_restart(char mode, const char *cmd) | ||
649 | { | ||
650 | if (mode == 's') { | ||
651 | /* Jump into the ROM */ | ||
652 | soft_restart(0x41000000); | ||
653 | } else { | ||
654 | local_irq_disable(); | ||
655 | local_fiq_disable(); | ||
656 | |||
657 | /* open up the SuperIO chip */ | ||
658 | outb(0x87, 0x370); | ||
659 | outb(0x87, 0x370); | ||
660 | |||
661 | /* aux function group 1 (logical device 7) */ | ||
662 | outb(0x07, 0x370); | ||
663 | outb(0x07, 0x371); | ||
664 | |||
665 | /* set GP16 for WD-TIMER output */ | ||
666 | outb(0xe6, 0x370); | ||
667 | outb(0x00, 0x371); | ||
668 | |||
669 | /* set a RED LED and toggle WD_TIMER for rebooting */ | ||
670 | outb(0xc4, 0x338); | ||
671 | } | ||
672 | } | ||
673 | |||
648 | MACHINE_START(NETWINDER, "Rebel-NetWinder") | 674 | MACHINE_START(NETWINDER, "Rebel-NetWinder") |
649 | /* Maintainer: Russell King/Rebel.com */ | 675 | /* Maintainer: Russell King/Rebel.com */ |
650 | .atag_offset = 0x100, | 676 | .atag_offset = 0x100, |
@@ -656,4 +682,5 @@ MACHINE_START(NETWINDER, "Rebel-NetWinder") | |||
656 | .map_io = footbridge_map_io, | 682 | .map_io = footbridge_map_io, |
657 | .init_irq = footbridge_init_irq, | 683 | .init_irq = footbridge_init_irq, |
658 | .timer = &isa_timer, | 684 | .timer = &isa_timer, |
685 | .restart = netwinder_restart, | ||
659 | MACHINE_END | 686 | MACHINE_END |
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c index f41dba39b327..e1e9990fa957 100644 --- a/arch/arm/mach-footbridge/personal.c +++ b/arch/arm/mach-footbridge/personal.c | |||
@@ -19,5 +19,6 @@ MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer") | |||
19 | .map_io = footbridge_map_io, | 19 | .map_io = footbridge_map_io, |
20 | .init_irq = footbridge_init_irq, | 20 | .init_irq = footbridge_init_irq, |
21 | .timer = &footbridge_timer, | 21 | .timer = &footbridge_timer, |
22 | .restart = footbridge_restart, | ||
22 | MACHINE_END | 23 | MACHINE_END |
23 | 24 | ||
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index 51d4e44ab973..f8a2f6bb5483 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c | |||
@@ -242,3 +242,8 @@ void __init h720x_map_io(void) | |||
242 | { | 242 | { |
243 | iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc)); | 243 | iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc)); |
244 | } | 244 | } |
245 | |||
246 | void h720x_restart(char mode, const char *cmd) | ||
247 | { | ||
248 | CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; | ||
249 | } | ||
diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h index 7dd5fa604efc..2489537d33dd 100644 --- a/arch/arm/mach-h720x/common.h +++ b/arch/arm/mach-h720x/common.h | |||
@@ -16,6 +16,7 @@ | |||
16 | extern unsigned long h720x_gettimeoffset(void); | 16 | extern unsigned long h720x_gettimeoffset(void); |
17 | extern void __init h720x_init_irq(void); | 17 | extern void __init h720x_init_irq(void); |
18 | extern void __init h720x_map_io(void); | 18 | extern void __init h720x_map_io(void); |
19 | extern void h720x_restart(char, const char *); | ||
19 | 20 | ||
20 | #ifdef CONFIG_ARCH_H7202 | 21 | #ifdef CONFIG_ARCH_H7202 |
21 | extern struct sys_timer h7202_timer; | 22 | extern struct sys_timer h7202_timer; |
diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c index 9886f19805f4..5fdb20c855e2 100644 --- a/arch/arm/mach-h720x/h7201-eval.c +++ b/arch/arm/mach-h720x/h7201-eval.c | |||
@@ -34,4 +34,5 @@ MACHINE_START(H7201, "Hynix GMS30C7201") | |||
34 | .init_irq = h720x_init_irq, | 34 | .init_irq = h720x_init_irq, |
35 | .timer = &h7201_timer, | 35 | .timer = &h7201_timer, |
36 | .dma_zone_size = SZ_256M, | 36 | .dma_zone_size = SZ_256M, |
37 | .restart = h720x_restart, | ||
37 | MACHINE_END | 38 | MACHINE_END |
diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c index 284a134819e1..169673036c59 100644 --- a/arch/arm/mach-h720x/h7202-eval.c +++ b/arch/arm/mach-h720x/h7202-eval.c | |||
@@ -77,4 +77,5 @@ MACHINE_START(H7202, "Hynix HMS30C7202") | |||
77 | .timer = &h7202_timer, | 77 | .timer = &h7202_timer, |
78 | .init_machine = init_eval_h7202, | 78 | .init_machine = init_eval_h7202, |
79 | .dma_zone_size = SZ_256M, | 79 | .dma_zone_size = SZ_256M, |
80 | .restart = h720x_restart, | ||
80 | MACHINE_END | 81 | MACHINE_END |
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h index a708d24ee46d..16ac46e239aa 100644 --- a/arch/arm/mach-h720x/include/mach/system.h +++ b/arch/arm/mach-h720x/include/mach/system.h | |||
@@ -24,10 +24,4 @@ static void arch_idle(void) | |||
24 | nop(); | 24 | nop(); |
25 | } | 25 | } |
26 | 26 | ||
27 | |||
28 | static __inline__ void arch_reset(char mode, const char *cmd) | ||
29 | { | ||
30 | CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; | ||
31 | } | ||
32 | |||
33 | #endif | 27 | #endif |
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h index 7e33fc94cd1e..d8e2d0be64ac 100644 --- a/arch/arm/mach-highbank/core.h +++ b/arch/arm/mach-highbank/core.h | |||
@@ -1,5 +1,6 @@ | |||
1 | extern void highbank_set_cpu_jump(int cpu, void *jump_addr); | 1 | extern void highbank_set_cpu_jump(int cpu, void *jump_addr); |
2 | extern void highbank_clocks_init(void); | 2 | extern void highbank_clocks_init(void); |
3 | extern void highbank_restart(char, const char *); | ||
3 | extern void __iomem *scu_base_addr; | 4 | extern void __iomem *scu_base_addr; |
4 | #ifdef CONFIG_DEBUG_HIGHBANK_UART | 5 | #ifdef CONFIG_DEBUG_HIGHBANK_UART |
5 | extern void highbank_lluart_map_io(void); | 6 | extern void highbank_lluart_map_io(void); |
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index 7266dd510f1a..804c4a55f803 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c | |||
@@ -147,4 +147,5 @@ DT_MACHINE_START(HIGHBANK, "Highbank") | |||
147 | .handle_irq = gic_handle_irq, | 147 | .handle_irq = gic_handle_irq, |
148 | .init_machine = highbank_init, | 148 | .init_machine = highbank_init, |
149 | .dt_compat = highbank_match, | 149 | .dt_compat = highbank_match, |
150 | .restart = highbank_restart, | ||
150 | MACHINE_END | 151 | MACHINE_END |
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h index 7e8192296cae..b1d8b5fbe373 100644 --- a/arch/arm/mach-highbank/include/mach/system.h +++ b/arch/arm/mach-highbank/include/mach/system.h | |||
@@ -21,6 +21,4 @@ static inline void arch_idle(void) | |||
21 | cpu_do_idle(); | 21 | cpu_do_idle(); |
22 | } | 22 | } |
23 | 23 | ||
24 | extern void arch_reset(char mode, const char *cmd); | ||
25 | |||
26 | #endif | 24 | #endif |
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c index 53f0c4c5ef1c..82c27230d4a9 100644 --- a/arch/arm/mach-highbank/system.c +++ b/arch/arm/mach-highbank/system.c | |||
@@ -20,7 +20,7 @@ | |||
20 | #include "core.h" | 20 | #include "core.h" |
21 | #include "sysregs.h" | 21 | #include "sysregs.h" |
22 | 22 | ||
23 | void arch_reset(char mode, const char *cmd) | 23 | void highbank_restart(char mode, const char *cmd) |
24 | { | 24 | { |
25 | if (mode == 'h') | 25 | if (mode == 'h') |
26 | hignbank_set_pwr_hard_reset(); | 26 | hignbank_set_pwr_hard_reset(); |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index d0a27303edb8..9d8598f29fda 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -133,7 +133,7 @@ config MACH_MX25_3DS | |||
133 | select IMX_HAVE_PLATFORM_MXC_NAND | 133 | select IMX_HAVE_PLATFORM_MXC_NAND |
134 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX | 134 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX |
135 | 135 | ||
136 | config MACH_EUKREA_CPUIMX25 | 136 | config MACH_EUKREA_CPUIMX25SD |
137 | bool "Support Eukrea CPUIMX25 Platform" | 137 | bool "Support Eukrea CPUIMX25 Platform" |
138 | select SOC_IMX25 | 138 | select SOC_IMX25 |
139 | select IMX_HAVE_PLATFORM_FLEXCAN | 139 | select IMX_HAVE_PLATFORM_FLEXCAN |
@@ -149,7 +149,7 @@ config MACH_EUKREA_CPUIMX25 | |||
149 | 149 | ||
150 | choice | 150 | choice |
151 | prompt "Baseboard" | 151 | prompt "Baseboard" |
152 | depends on MACH_EUKREA_CPUIMX25 | 152 | depends on MACH_EUKREA_CPUIMX25SD |
153 | default MACH_EUKREA_MBIMXSD25_BASEBOARD | 153 | default MACH_EUKREA_MBIMXSD25_BASEBOARD |
154 | 154 | ||
155 | config MACH_EUKREA_MBIMXSD25_BASEBOARD | 155 | config MACH_EUKREA_MBIMXSD25_BASEBOARD |
@@ -543,7 +543,7 @@ config MACH_MX35_3DS | |||
543 | Include support for MX35PDK platform. This includes specific | 543 | Include support for MX35PDK platform. This includes specific |
544 | configurations for the board and its peripherals. | 544 | configurations for the board and its peripherals. |
545 | 545 | ||
546 | config MACH_EUKREA_CPUIMX35 | 546 | config MACH_EUKREA_CPUIMX35SD |
547 | bool "Support Eukrea CPUIMX35 Platform" | 547 | bool "Support Eukrea CPUIMX35 Platform" |
548 | select SOC_IMX35 | 548 | select SOC_IMX35 |
549 | select IMX_HAVE_PLATFORM_FLEXCAN | 549 | select IMX_HAVE_PLATFORM_FLEXCAN |
@@ -561,7 +561,7 @@ config MACH_EUKREA_CPUIMX35 | |||
561 | 561 | ||
562 | choice | 562 | choice |
563 | prompt "Baseboard" | 563 | prompt "Baseboard" |
564 | depends on MACH_EUKREA_CPUIMX35 | 564 | depends on MACH_EUKREA_CPUIMX35SD |
565 | default MACH_EUKREA_MBIMXSD35_BASEBOARD | 565 | default MACH_EUKREA_MBIMXSD35_BASEBOARD |
566 | 566 | ||
567 | config MACH_EUKREA_MBIMXSD35_BASEBOARD | 567 | config MACH_EUKREA_MBIMXSD35_BASEBOARD |
@@ -597,12 +597,12 @@ comment "i.MX6 family:" | |||
597 | config SOC_IMX6Q | 597 | config SOC_IMX6Q |
598 | bool "i.MX6 Quad support" | 598 | bool "i.MX6 Quad support" |
599 | select ARM_GIC | 599 | select ARM_GIC |
600 | select CACHE_L2X0 | ||
601 | select CPU_V7 | 600 | select CPU_V7 |
602 | select HAVE_ARM_SCU | 601 | select HAVE_ARM_SCU |
603 | select HAVE_IMX_GPC | 602 | select HAVE_IMX_GPC |
604 | select HAVE_IMX_MMDC | 603 | select HAVE_IMX_MMDC |
605 | select HAVE_IMX_SRC | 604 | select HAVE_IMX_SRC |
605 | select HAVE_SMP | ||
606 | select USE_OF | 606 | select USE_OF |
607 | 607 | ||
608 | help | 608 | help |
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index aba73214c2a8..d97f409ce98b 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile | |||
@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o | |||
24 | 24 | ||
25 | # i.MX25 based machines | 25 | # i.MX25 based machines |
26 | obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o | 26 | obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o |
27 | obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o | 27 | obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o |
28 | obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o | 28 | obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o |
29 | 29 | ||
30 | # i.MX27 based machines | 30 | # i.MX27 based machines |
@@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o | |||
57 | # i.MX35 based machines | 57 | # i.MX35 based machines |
58 | obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o | 58 | obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o |
59 | obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o | 59 | obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o |
60 | obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o | 60 | obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o |
61 | obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o | 61 | obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o |
62 | obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o | 62 | obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o |
63 | 63 | ||
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c index 8116f119517d..ac8238caecb9 100644 --- a/arch/arm/mach-imx/clock-imx35.c +++ b/arch/arm/mach-imx/clock-imx35.c | |||
@@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = { | |||
507 | 507 | ||
508 | int __init mx35_clocks_init() | 508 | int __init mx35_clocks_init() |
509 | { | 509 | { |
510 | unsigned int cgr2 = 3 << 26, cgr3 = 0; | 510 | unsigned int cgr2 = 3 << 26; |
511 | 511 | ||
512 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) | 512 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) |
513 | cgr2 |= 3 << 16; | 513 | cgr2 |= 3 << 16; |
@@ -521,6 +521,12 @@ int __init mx35_clocks_init() | |||
521 | __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); | 521 | __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); |
522 | __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), | 522 | __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), |
523 | CCM_BASE + CCM_CGR1); | 523 | CCM_BASE + CCM_CGR1); |
524 | __raw_writel(cgr2, CCM_BASE + CCM_CGR2); | ||
525 | __raw_writel(0, CCM_BASE + CCM_CGR3); | ||
526 | |||
527 | clk_enable(&iim_clk); | ||
528 | imx_print_silicon_rev("i.MX35", mx35_revision()); | ||
529 | clk_disable(&iim_clk); | ||
524 | 530 | ||
525 | /* | 531 | /* |
526 | * Check if we came up in internal boot mode. If yes, we need some | 532 | * Check if we came up in internal boot mode. If yes, we need some |
@@ -529,17 +535,11 @@ int __init mx35_clocks_init() | |||
529 | */ | 535 | */ |
530 | if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { | 536 | if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { |
531 | /* Additionally turn on UART1, SCC, and IIM clocks */ | 537 | /* Additionally turn on UART1, SCC, and IIM clocks */ |
532 | cgr2 |= 3 << 16 | 3 << 4; | 538 | clk_enable(&iim_clk); |
533 | cgr3 |= 3 << 2; | 539 | clk_enable(&uart1_clk); |
540 | clk_enable(&scc_clk); | ||
534 | } | 541 | } |
535 | 542 | ||
536 | __raw_writel(cgr2, CCM_BASE + CCM_CGR2); | ||
537 | __raw_writel(cgr3, CCM_BASE + CCM_CGR3); | ||
538 | |||
539 | clk_enable(&iim_clk); | ||
540 | imx_print_silicon_rev("i.MX35", mx35_revision()); | ||
541 | clk_disable(&iim_clk); | ||
542 | |||
543 | #ifdef CONFIG_MXC_USE_EPIT | 543 | #ifdef CONFIG_MXC_USE_EPIT |
544 | epit_timer_init(&epit1_clk, | 544 | epit_timer_init(&epit1_clk, |
545 | MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); | 545 | MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); |
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 039a7abb165a..9273c2a24b54 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c | |||
@@ -1931,14 +1931,12 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) | |||
1931 | val |= 0x1 << BP_CLPCR_LPM; | 1931 | val |= 0x1 << BP_CLPCR_LPM; |
1932 | val &= ~BM_CLPCR_VSTBY; | 1932 | val &= ~BM_CLPCR_VSTBY; |
1933 | val &= ~BM_CLPCR_SBYOS; | 1933 | val &= ~BM_CLPCR_SBYOS; |
1934 | val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; | ||
1935 | break; | 1934 | break; |
1936 | case STOP_POWER_OFF: | 1935 | case STOP_POWER_OFF: |
1937 | val |= 0x2 << BP_CLPCR_LPM; | 1936 | val |= 0x2 << BP_CLPCR_LPM; |
1938 | val |= 0x3 << BP_CLPCR_STBY_COUNT; | 1937 | val |= 0x3 << BP_CLPCR_STBY_COUNT; |
1939 | val |= BM_CLPCR_VSTBY; | 1938 | val |= BM_CLPCR_VSTBY; |
1940 | val |= BM_CLPCR_SBYOS; | 1939 | val |= BM_CLPCR_SBYOS; |
1941 | val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; | ||
1942 | break; | 1940 | break; |
1943 | default: | 1941 | default: |
1944 | return -EINVAL; | 1942 | return -EINVAL; |
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index c71dbcc37b11..f4a63ee9e217 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c | |||
@@ -149,4 +149,5 @@ MACHINE_START(APF9328, "Armadeus APF9328") | |||
149 | .handle_irq = imx1_handle_irq, | 149 | .handle_irq = imx1_handle_irq, |
150 | .timer = &apf9328_timer, | 150 | .timer = &apf9328_timer, |
151 | .init_machine = apf9328_init, | 151 | .init_machine = apf9328_init, |
152 | .restart = mxc_restart, | ||
152 | MACHINE_END | 153 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index c9a9cf67755e..e4f426a09899 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c | |||
@@ -561,4 +561,5 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500") | |||
561 | .handle_irq = imx31_handle_irq, | 561 | .handle_irq = imx31_handle_irq, |
562 | .timer = &armadillo5x0_timer, | 562 | .timer = &armadillo5x0_timer, |
563 | .init_machine = armadillo5x0_init, | 563 | .init_machine = armadillo5x0_init, |
564 | .restart = mxc_restart, | ||
564 | MACHINE_END | 565 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c index 313f62ddc1ef..9a9897749dd6 100644 --- a/arch/arm/mach-imx/mach-bug.c +++ b/arch/arm/mach-imx/mach-bug.c | |||
@@ -65,4 +65,5 @@ MACHINE_START(BUG, "BugLabs BUGBase") | |||
65 | .handle_irq = imx31_handle_irq, | 65 | .handle_irq = imx31_handle_irq, |
66 | .timer = &bug_timer, | 66 | .timer = &bug_timer, |
67 | .init_machine = bug_board_init, | 67 | .init_machine = bug_board_init, |
68 | .restart = mxc_restart, | ||
68 | MACHINE_END | 69 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index edb373052576..d085aea08709 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c | |||
@@ -318,4 +318,5 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27") | |||
318 | .handle_irq = imx27_handle_irq, | 318 | .handle_irq = imx27_handle_irq, |
319 | .timer = &eukrea_cpuimx27_timer, | 319 | .timer = &eukrea_cpuimx27_timer, |
320 | .init_machine = eukrea_cpuimx27_init, | 320 | .init_machine = eukrea_cpuimx27_init, |
321 | .restart = mxc_restart, | ||
321 | MACHINE_END | 322 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c index 66af2e8f7e57..8ecc872b2547 100644 --- a/arch/arm/mach-imx/mach-cpuimx35.c +++ b/arch/arm/mach-imx/mach-cpuimx35.c | |||
@@ -53,12 +53,18 @@ static const struct imxi2c_platform_data | |||
53 | .bitrate = 100000, | 53 | .bitrate = 100000, |
54 | }; | 54 | }; |
55 | 55 | ||
56 | #define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2) | ||
57 | static int tsc2007_get_pendown_state(void) | ||
58 | { | ||
59 | return !gpio_get_value(TSC2007_IRQGPIO); | ||
60 | } | ||
61 | |||
56 | static struct tsc2007_platform_data tsc2007_info = { | 62 | static struct tsc2007_platform_data tsc2007_info = { |
57 | .model = 2007, | 63 | .model = 2007, |
58 | .x_plate_ohms = 180, | 64 | .x_plate_ohms = 180, |
65 | .get_pendown_state = tsc2007_get_pendown_state, | ||
59 | }; | 66 | }; |
60 | 67 | ||
61 | #define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2) | ||
62 | static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { | 68 | static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { |
63 | { | 69 | { |
64 | I2C_BOARD_INFO("pcf8563", 0x51), | 70 | I2C_BOARD_INFO("pcf8563", 0x51), |
@@ -201,4 +207,5 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35") | |||
201 | .handle_irq = imx35_handle_irq, | 207 | .handle_irq = imx35_handle_irq, |
202 | .timer = &eukrea_cpuimx35_timer, | 208 | .timer = &eukrea_cpuimx35_timer, |
203 | .init_machine = eukrea_cpuimx35_init, | 209 | .init_machine = eukrea_cpuimx35_init, |
210 | .restart = mxc_restart, | ||
204 | MACHINE_END | 211 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index ab8fbcc472b5..76a97a598b9e 100644 --- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c | |||
@@ -170,4 +170,5 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25") | |||
170 | .handle_irq = imx25_handle_irq, | 170 | .handle_irq = imx25_handle_irq, |
171 | .timer = &eukrea_cpuimx25_timer, | 171 | .timer = &eukrea_cpuimx25_timer, |
172 | .init_machine = eukrea_cpuimx25_init, | 172 | .init_machine = eukrea_cpuimx25_init, |
173 | .restart = mxc_restart, | ||
173 | MACHINE_END | 174 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 38eb9e45110b..c2766ae02b4f 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c | |||
@@ -282,4 +282,5 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10") | |||
282 | .handle_irq = imx27_handle_irq, | 282 | .handle_irq = imx27_handle_irq, |
283 | .timer = &visstrim_m10_timer, | 283 | .timer = &visstrim_m10_timer, |
284 | .init_machine = visstrim_m10_board_init, | 284 | .init_machine = visstrim_m10_board_init, |
285 | .restart = mxc_restart, | ||
285 | MACHINE_END | 286 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c index 7052155d0557..c9d350c5dcc8 100644 --- a/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/arch/arm/mach-imx/mach-imx27ipcam.c | |||
@@ -78,4 +78,5 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM") | |||
78 | .handle_irq = imx27_handle_irq, | 78 | .handle_irq = imx27_handle_irq, |
79 | .timer = &mx27ipcam_timer, | 79 | .timer = &mx27ipcam_timer, |
80 | .init_machine = mx27ipcam_init, | 80 | .init_machine = mx27ipcam_init, |
81 | .restart = mxc_restart, | ||
81 | MACHINE_END | 82 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 8d6a63521f17..1f45b9189229 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c | |||
@@ -84,4 +84,5 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") | |||
84 | .handle_irq = imx27_handle_irq, | 84 | .handle_irq = imx27_handle_irq, |
85 | .timer = &mx27lite_timer, | 85 | .timer = &mx27lite_timer, |
86 | .init_machine = mx27lite_init, | 86 | .init_machine = mx27lite_init, |
87 | .restart = mxc_restart, | ||
87 | MACHINE_END | 88 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index bee633496f7b..c25728106917 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c | |||
@@ -10,10 +10,13 @@ | |||
10 | * http://www.gnu.org/copyleft/gpl.html | 10 | * http://www.gnu.org/copyleft/gpl.html |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/delay.h> | ||
13 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/io.h> | ||
14 | #include <linux/irq.h> | 16 | #include <linux/irq.h> |
15 | #include <linux/irqdomain.h> | 17 | #include <linux/irqdomain.h> |
16 | #include <linux/of.h> | 18 | #include <linux/of.h> |
19 | #include <linux/of_address.h> | ||
17 | #include <linux/of_irq.h> | 20 | #include <linux/of_irq.h> |
18 | #include <linux/of_platform.h> | 21 | #include <linux/of_platform.h> |
19 | #include <linux/phy.h> | 22 | #include <linux/phy.h> |
@@ -25,6 +28,36 @@ | |||
25 | #include <mach/common.h> | 28 | #include <mach/common.h> |
26 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
27 | 30 | ||
31 | void imx6q_restart(char mode, const char *cmd) | ||
32 | { | ||
33 | struct device_node *np; | ||
34 | void __iomem *wdog_base; | ||
35 | |||
36 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt"); | ||
37 | wdog_base = of_iomap(np, 0); | ||
38 | if (!wdog_base) | ||
39 | goto soft; | ||
40 | |||
41 | imx_src_prepare_restart(); | ||
42 | |||
43 | /* enable wdog */ | ||
44 | writew_relaxed(1 << 2, wdog_base); | ||
45 | /* write twice to ensure the request will not get ignored */ | ||
46 | writew_relaxed(1 << 2, wdog_base); | ||
47 | |||
48 | /* wait for reset to assert ... */ | ||
49 | mdelay(500); | ||
50 | |||
51 | pr_err("Watchdog reset failed to assert reset\n"); | ||
52 | |||
53 | /* delay to allow the serial port to show the message */ | ||
54 | mdelay(50); | ||
55 | |||
56 | soft: | ||
57 | /* we'll take a jump through zero as a poor second */ | ||
58 | soft_restart(0); | ||
59 | } | ||
60 | |||
28 | /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ | 61 | /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ |
29 | static int ksz9021rn_phy_fixup(struct phy_device *phydev) | 62 | static int ksz9021rn_phy_fixup(struct phy_device *phydev) |
30 | { | 63 | { |
@@ -105,4 +138,5 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)") | |||
105 | .timer = &imx6q_timer, | 138 | .timer = &imx6q_timer, |
106 | .init_machine = imx6q_init_machine, | 139 | .init_machine = imx6q_init_machine, |
107 | .dt_compat = imx6q_dt_compat, | 140 | .dt_compat = imx6q_dt_compat, |
141 | .restart = imx6q_restart, | ||
108 | MACHINE_END | 142 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 5f37f89e40fa..fc78e8071cd1 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c | |||
@@ -279,4 +279,5 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") | |||
279 | .handle_irq = imx31_handle_irq, | 279 | .handle_irq = imx31_handle_irq, |
280 | .timer = &kzm_timer, | 280 | .timer = &kzm_timer, |
281 | .init_machine = kzm_board_init, | 281 | .init_machine = kzm_board_init, |
282 | .restart = mxc_restart, | ||
282 | MACHINE_END | 283 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index fc49785e7340..97046088ff1a 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c | |||
@@ -147,6 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS") | |||
147 | .handle_irq = imx1_handle_irq, | 147 | .handle_irq = imx1_handle_irq, |
148 | .timer = &mx1ads_timer, | 148 | .timer = &mx1ads_timer, |
149 | .init_machine = mx1ads_init, | 149 | .init_machine = mx1ads_init, |
150 | .restart = mxc_restart, | ||
150 | MACHINE_END | 151 | MACHINE_END |
151 | 152 | ||
152 | MACHINE_START(MXLADS, "Freescale MXLADS") | 153 | MACHINE_START(MXLADS, "Freescale MXLADS") |
@@ -157,4 +158,5 @@ MACHINE_START(MXLADS, "Freescale MXLADS") | |||
157 | .handle_irq = imx1_handle_irq, | 158 | .handle_irq = imx1_handle_irq, |
158 | .timer = &mx1ads_timer, | 159 | .timer = &mx1ads_timer, |
159 | .init_machine = mx1ads_init, | 160 | .init_machine = mx1ads_init, |
161 | .restart = mxc_restart, | ||
160 | MACHINE_END | 162 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 25f84028d055..8d9f95514b1f 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c | |||
@@ -312,4 +312,5 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS") | |||
312 | .handle_irq = imx21_handle_irq, | 312 | .handle_irq = imx21_handle_irq, |
313 | .timer = &mx21ads_timer, | 313 | .timer = &mx21ads_timer, |
314 | .init_machine = mx21ads_board_init, | 314 | .init_machine = mx21ads_board_init, |
315 | .restart = mxc_restart, | ||
315 | MACHINE_END | 316 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c index 88dccf122243..f26734298aa6 100644 --- a/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/arch/arm/mach-imx/mach-mx25_3ds.c | |||
@@ -270,4 +270,5 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)") | |||
270 | .handle_irq = imx25_handle_irq, | 270 | .handle_irq = imx25_handle_irq, |
271 | .timer = &mx25pdk_timer, | 271 | .timer = &mx25pdk_timer, |
272 | .init_machine = mx25pdk_init, | 272 | .init_machine = mx25pdk_init, |
273 | .restart = mxc_restart, | ||
273 | MACHINE_END | 274 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index ba232d79fa81..18f35816706a 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c | |||
@@ -425,4 +425,5 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK") | |||
425 | .handle_irq = imx27_handle_irq, | 425 | .handle_irq = imx27_handle_irq, |
426 | .timer = &mx27pdk_timer, | 426 | .timer = &mx27pdk_timer, |
427 | .init_machine = mx27pdk_init, | 427 | .init_machine = mx27pdk_init, |
428 | .restart = mxc_restart, | ||
428 | MACHINE_END | 429 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 74dd5731eb61..0228d2e07fe0 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c | |||
@@ -351,4 +351,5 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS") | |||
351 | .handle_irq = imx27_handle_irq, | 351 | .handle_irq = imx27_handle_irq, |
352 | .timer = &mx27ads_timer, | 352 | .timer = &mx27ads_timer, |
353 | .init_machine = mx27ads_board_init, | 353 | .init_machine = mx27ads_board_init, |
354 | .restart = mxc_restart, | ||
354 | MACHINE_END | 355 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 00bb308ce1cd..89c33258639f 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c | |||
@@ -770,4 +770,5 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") | |||
770 | .timer = &mx31_3ds_timer, | 770 | .timer = &mx31_3ds_timer, |
771 | .init_machine = mx31_3ds_init, | 771 | .init_machine = mx31_3ds_init, |
772 | .reserve = mx31_3ds_reserve, | 772 | .reserve = mx31_3ds_reserve, |
773 | .restart = mxc_restart, | ||
773 | MACHINE_END | 774 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index 9cc1a49053bb..4917aab0e253 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c | |||
@@ -542,4 +542,5 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS") | |||
542 | .handle_irq = imx31_handle_irq, | 542 | .handle_irq = imx31_handle_irq, |
543 | .timer = &mx31ads_timer, | 543 | .timer = &mx31ads_timer, |
544 | .init_machine = mx31ads_init, | 544 | .init_machine = mx31ads_init, |
545 | .restart = mxc_restart, | ||
545 | MACHINE_END | 546 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 102ec99357cc..02401bbd6d53 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c | |||
@@ -303,4 +303,5 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131") | |||
303 | .handle_irq = imx31_handle_irq, | 303 | .handle_irq = imx31_handle_irq, |
304 | .timer = &mx31lilly_timer, | 304 | .timer = &mx31lilly_timer, |
305 | .init_machine = mx31lilly_board_init, | 305 | .init_machine = mx31lilly_board_init, |
306 | .restart = mxc_restart, | ||
306 | MACHINE_END | 307 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index 5366d2de18fd..ef80751712e7 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c | |||
@@ -287,4 +287,5 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") | |||
287 | .handle_irq = imx31_handle_irq, | 287 | .handle_irq = imx31_handle_irq, |
288 | .timer = &mx31lite_timer, | 288 | .timer = &mx31lite_timer, |
289 | .init_machine = mx31lite_init, | 289 | .init_machine = mx31lite_init, |
290 | .restart = mxc_restart, | ||
290 | MACHINE_END | 291 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 93269150309c..b95981dacb2b 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c | |||
@@ -600,4 +600,5 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") | |||
600 | .handle_irq = imx31_handle_irq, | 600 | .handle_irq = imx31_handle_irq, |
601 | .timer = &mx31moboard_timer, | 601 | .timer = &mx31moboard_timer, |
602 | .init_machine = mx31moboard_init, | 602 | .init_machine = mx31moboard_init, |
603 | .restart = mxc_restart, | ||
603 | MACHINE_END | 604 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 7a462025a0f7..0af6c9c5b3fd 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c | |||
@@ -224,4 +224,5 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK") | |||
224 | .handle_irq = imx35_handle_irq, | 224 | .handle_irq = imx35_handle_irq, |
225 | .timer = &mx35pdk_timer, | 225 | .timer = &mx35pdk_timer, |
226 | .init_machine = mx35_3ds_init, | 226 | .init_machine = mx35_3ds_init, |
227 | .restart = mxc_restart, | ||
227 | MACHINE_END | 228 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 125c19643b0f..8b3d3f07d894 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c | |||
@@ -274,4 +274,5 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") | |||
274 | .handle_irq = imx27_handle_irq, | 274 | .handle_irq = imx27_handle_irq, |
275 | .timer = &mxt_td60_timer, | 275 | .timer = &mxt_td60_timer, |
276 | .init_machine = mxt_td60_board_init, | 276 | .init_machine = mxt_td60_board_init, |
277 | .restart = mxc_restart, | ||
277 | MACHINE_END | 278 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 26072f4b02e3..d3b9c6b5edde 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c | |||
@@ -442,4 +442,5 @@ MACHINE_START(PCA100, "phyCARD-i.MX27") | |||
442 | .handle_irq = imx27_handle_irq, | 442 | .handle_irq = imx27_handle_irq, |
443 | .init_machine = pca100_init, | 443 | .init_machine = pca100_init, |
444 | .timer = &pca100_timer, | 444 | .timer = &pca100_timer, |
445 | .restart = mxc_restart, | ||
445 | MACHINE_END | 446 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index efd6b536ef6a..d7e151669ed3 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c | |||
@@ -696,4 +696,5 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037") | |||
696 | .handle_irq = imx31_handle_irq, | 696 | .handle_irq = imx31_handle_irq, |
697 | .timer = &pcm037_timer, | 697 | .timer = &pcm037_timer, |
698 | .init_machine = pcm037_init, | 698 | .init_machine = pcm037_init, |
699 | .restart = mxc_restart, | ||
699 | MACHINE_END | 700 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index a17e9c7dfca0..16f126da9f8f 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c | |||
@@ -357,4 +357,5 @@ MACHINE_START(PCM038, "phyCORE-i.MX27") | |||
357 | .handle_irq = imx27_handle_irq, | 357 | .handle_irq = imx27_handle_irq, |
358 | .timer = &pcm038_timer, | 358 | .timer = &pcm038_timer, |
359 | .init_machine = pcm038_init, | 359 | .init_machine = pcm038_init, |
360 | .restart = mxc_restart, | ||
360 | MACHINE_END | 361 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index 7366c2ae3ea5..06dc106519ae 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c | |||
@@ -425,4 +425,5 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043") | |||
425 | .handle_irq = imx35_handle_irq, | 425 | .handle_irq = imx35_handle_irq, |
426 | .timer = &pcm043_timer, | 426 | .timer = &pcm043_timer, |
427 | .init_machine = pcm043_init, | 427 | .init_machine = pcm043_init, |
428 | .restart = mxc_restart, | ||
428 | MACHINE_END | 429 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index 4ff5faf102a8..260621055b6b 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c | |||
@@ -273,4 +273,5 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") | |||
273 | .handle_irq = imx31_handle_irq, | 273 | .handle_irq = imx31_handle_irq, |
274 | .timer = &qong_timer, | 274 | .timer = &qong_timer, |
275 | .init_machine = qong_init, | 275 | .init_machine = qong_init, |
276 | .restart = mxc_restart, | ||
276 | MACHINE_END | 277 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index bb6e5b25d8d0..cb9ceae2f648 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c | |||
@@ -144,4 +144,5 @@ MACHINE_START(SCB9328, "Synertronixx scb9328") | |||
144 | .handle_irq = imx1_handle_irq, | 144 | .handle_irq = imx1_handle_irq, |
145 | .timer = &scb9328_timer, | 145 | .timer = &scb9328_timer, |
146 | .init_machine = scb9328_init, | 146 | .init_machine = scb9328_init, |
147 | .restart = mxc_restart, | ||
147 | MACHINE_END | 148 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index 69092458f2d9..033257e553ef 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c | |||
@@ -322,4 +322,5 @@ MACHINE_START(VPR200, "VPR200") | |||
322 | .handle_irq = imx35_handle_irq, | 322 | .handle_irq = imx35_handle_irq, |
323 | .timer = &vpr200_timer, | 323 | .timer = &vpr200_timer, |
324 | .init_machine = vpr200_board_init, | 324 | .init_machine = vpr200_board_init, |
325 | .restart = mxc_restart, | ||
325 | MACHINE_END | 326 | MACHINE_END |
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index a8e33681b732..4bde04f99e38 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #define SRC_SCR 0x000 | 20 | #define SRC_SCR 0x000 |
21 | #define SRC_GPR1 0x020 | 21 | #define SRC_GPR1 0x020 |
22 | #define BP_SRC_SCR_WARM_RESET_ENABLE 0 | ||
22 | #define BP_SRC_SCR_CORE1_RST 14 | 23 | #define BP_SRC_SCR_CORE1_RST 14 |
23 | #define BP_SRC_SCR_CORE1_ENABLE 22 | 24 | #define BP_SRC_SCR_CORE1_ENABLE 22 |
24 | 25 | ||
@@ -46,11 +47,33 @@ void imx_set_cpu_jump(int cpu, void *jump_addr) | |||
46 | src_base + SRC_GPR1 + cpu * 8); | 47 | src_base + SRC_GPR1 + cpu * 8); |
47 | } | 48 | } |
48 | 49 | ||
50 | void imx_src_prepare_restart(void) | ||
51 | { | ||
52 | u32 val; | ||
53 | |||
54 | /* clear enable bits of secondary cores */ | ||
55 | val = readl_relaxed(src_base + SRC_SCR); | ||
56 | val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE); | ||
57 | writel_relaxed(val, src_base + SRC_SCR); | ||
58 | |||
59 | /* clear persistent entry register of primary core */ | ||
60 | writel_relaxed(0, src_base + SRC_GPR1); | ||
61 | } | ||
62 | |||
49 | void __init imx_src_init(void) | 63 | void __init imx_src_init(void) |
50 | { | 64 | { |
51 | struct device_node *np; | 65 | struct device_node *np; |
66 | u32 val; | ||
52 | 67 | ||
53 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src"); | 68 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src"); |
54 | src_base = of_iomap(np, 0); | 69 | src_base = of_iomap(np, 0); |
55 | WARN_ON(!src_base); | 70 | WARN_ON(!src_base); |
71 | |||
72 | /* | ||
73 | * force warm reset sources to generate cold reset | ||
74 | * for a more reliable restart | ||
75 | */ | ||
76 | val = readl_relaxed(src_base + SRC_SCR); | ||
77 | val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE); | ||
78 | writel_relaxed(val, src_base + SRC_SCR); | ||
56 | } | 79 | } |
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index dfd18f3b50e8..350e26636a06 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig | |||
@@ -6,6 +6,8 @@ config ARCH_INTEGRATOR_AP | |||
6 | bool "Support Integrator/AP and Integrator/PP2 platforms" | 6 | bool "Support Integrator/AP and Integrator/PP2 platforms" |
7 | select CLKSRC_MMIO | 7 | select CLKSRC_MMIO |
8 | select MIGHT_HAVE_PCI | 8 | select MIGHT_HAVE_PCI |
9 | select SERIAL_AMBA_PL010 | ||
10 | select SERIAL_AMBA_PL010_CONSOLE | ||
9 | help | 11 | help |
10 | Include support for the ARM(R) Integrator/AP and | 12 | Include support for the ARM(R) Integrator/AP and |
11 | Integrator/PP2 platforms. | 13 | Integrator/PP2 platforms. |
@@ -15,6 +17,8 @@ config ARCH_INTEGRATOR_CP | |||
15 | select ARCH_CINTEGRATOR | 17 | select ARCH_CINTEGRATOR |
16 | select ARM_TIMER_SP804 | 18 | select ARM_TIMER_SP804 |
17 | select PLAT_VERSATILE_CLCD | 19 | select PLAT_VERSATILE_CLCD |
20 | select SERIAL_AMBA_PL011 | ||
21 | select SERIAL_AMBA_PL011_CONSOLE | ||
18 | help | 22 | help |
19 | Include support for the ARM(R) Integrator CP platform. | 23 | Include support for the ARM(R) Integrator CP platform. |
20 | 24 | ||
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h index a08f9b0299df..899561d8db28 100644 --- a/arch/arm/mach-integrator/common.h +++ b/arch/arm/mach-integrator/common.h | |||
@@ -1,2 +1,3 @@ | |||
1 | void integrator_init_early(void); | 1 | void integrator_init_early(void); |
2 | void integrator_reserve(void); | 2 | void integrator_reserve(void); |
3 | void integrator_restart(char, const char *); | ||
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 4b38e13667ac..019f0ab08f66 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <mach/cm.h> | 29 | #include <mach/cm.h> |
30 | #include <asm/system.h> | 30 | #include <asm/system.h> |
31 | #include <asm/leds.h> | 31 | #include <asm/leds.h> |
32 | #include <asm/mach-types.h> | ||
32 | #include <asm/mach/time.h> | 33 | #include <asm/mach/time.h> |
33 | #include <asm/pgtable.h> | 34 | #include <asm/pgtable.h> |
34 | 35 | ||
@@ -44,7 +45,6 @@ static struct amba_device rtc_device = { | |||
44 | .flags = IORESOURCE_MEM, | 45 | .flags = IORESOURCE_MEM, |
45 | }, | 46 | }, |
46 | .irq = { IRQ_RTCINT, NO_IRQ }, | 47 | .irq = { IRQ_RTCINT, NO_IRQ }, |
47 | .periphid = 0x00041030, | ||
48 | }; | 48 | }; |
49 | 49 | ||
50 | static struct amba_device uart0_device = { | 50 | static struct amba_device uart0_device = { |
@@ -58,7 +58,6 @@ static struct amba_device uart0_device = { | |||
58 | .flags = IORESOURCE_MEM, | 58 | .flags = IORESOURCE_MEM, |
59 | }, | 59 | }, |
60 | .irq = { IRQ_UARTINT0, NO_IRQ }, | 60 | .irq = { IRQ_UARTINT0, NO_IRQ }, |
61 | .periphid = 0x0041010, | ||
62 | }; | 61 | }; |
63 | 62 | ||
64 | static struct amba_device uart1_device = { | 63 | static struct amba_device uart1_device = { |
@@ -72,7 +71,6 @@ static struct amba_device uart1_device = { | |||
72 | .flags = IORESOURCE_MEM, | 71 | .flags = IORESOURCE_MEM, |
73 | }, | 72 | }, |
74 | .irq = { IRQ_UARTINT1, NO_IRQ }, | 73 | .irq = { IRQ_UARTINT1, NO_IRQ }, |
75 | .periphid = 0x0041010, | ||
76 | }; | 74 | }; |
77 | 75 | ||
78 | static struct amba_device kmi0_device = { | 76 | static struct amba_device kmi0_device = { |
@@ -85,7 +83,6 @@ static struct amba_device kmi0_device = { | |||
85 | .flags = IORESOURCE_MEM, | 83 | .flags = IORESOURCE_MEM, |
86 | }, | 84 | }, |
87 | .irq = { IRQ_KMIINT0, NO_IRQ }, | 85 | .irq = { IRQ_KMIINT0, NO_IRQ }, |
88 | .periphid = 0x00041050, | ||
89 | }; | 86 | }; |
90 | 87 | ||
91 | static struct amba_device kmi1_device = { | 88 | static struct amba_device kmi1_device = { |
@@ -98,7 +95,6 @@ static struct amba_device kmi1_device = { | |||
98 | .flags = IORESOURCE_MEM, | 95 | .flags = IORESOURCE_MEM, |
99 | }, | 96 | }, |
100 | .irq = { IRQ_KMIINT1, NO_IRQ }, | 97 | .irq = { IRQ_KMIINT1, NO_IRQ }, |
101 | .periphid = 0x00041050, | ||
102 | }; | 98 | }; |
103 | 99 | ||
104 | static struct amba_device *amba_devs[] __initdata = { | 100 | static struct amba_device *amba_devs[] __initdata = { |
@@ -157,6 +153,19 @@ static int __init integrator_init(void) | |||
157 | { | 153 | { |
158 | int i; | 154 | int i; |
159 | 155 | ||
156 | /* | ||
157 | * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to | ||
158 | * hard-code them. The Integator/CP and forward have proper cell IDs. | ||
159 | * Else we leave them undefined to the bus driver can autoprobe them. | ||
160 | */ | ||
161 | if (machine_is_integrator()) { | ||
162 | rtc_device.periphid = 0x00041030; | ||
163 | uart0_device.periphid = 0x00041010; | ||
164 | uart1_device.periphid = 0x00041010; | ||
165 | kmi0_device.periphid = 0x00041050; | ||
166 | kmi1_device.periphid = 0x00041050; | ||
167 | } | ||
168 | |||
160 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | 169 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
161 | struct amba_device *d = amba_devs[i]; | 170 | struct amba_device *d = amba_devs[i]; |
162 | amba_device_register(d, &iomem_resource); | 171 | amba_device_register(d, &iomem_resource); |
@@ -238,3 +247,11 @@ void __init integrator_reserve(void) | |||
238 | { | 247 | { |
239 | memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET); | 248 | memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET); |
240 | } | 249 | } |
250 | |||
251 | /* | ||
252 | * To reset, we hit the on-board reset register in the system FPGA | ||
253 | */ | ||
254 | void integrator_restart(char mode, const char *cmd) | ||
255 | { | ||
256 | cm_control(CM_CTRL_RESET, CM_CTRL_RESET); | ||
257 | } | ||
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h index e1551b8dab77..901514eba4a6 100644 --- a/arch/arm/mach-integrator/include/mach/system.h +++ b/arch/arm/mach-integrator/include/mach/system.h | |||
@@ -21,8 +21,6 @@ | |||
21 | #ifndef __ASM_ARCH_SYSTEM_H | 21 | #ifndef __ASM_ARCH_SYSTEM_H |
22 | #define __ASM_ARCH_SYSTEM_H | 22 | #define __ASM_ARCH_SYSTEM_H |
23 | 23 | ||
24 | #include <mach/cm.h> | ||
25 | |||
26 | static inline void arch_idle(void) | 24 | static inline void arch_idle(void) |
27 | { | 25 | { |
28 | /* | 26 | /* |
@@ -32,13 +30,4 @@ static inline void arch_idle(void) | |||
32 | cpu_do_idle(); | 30 | cpu_do_idle(); |
33 | } | 31 | } |
34 | 32 | ||
35 | static inline void arch_reset(char mode, const char *cmd) | ||
36 | { | ||
37 | /* | ||
38 | * To reset, we hit the on-board reset register | ||
39 | * in the system FPGA | ||
40 | */ | ||
41 | cm_control(CM_CTRL_RESET, CM_CTRL_RESET); | ||
42 | } | ||
43 | |||
44 | #endif | 33 | #endif |
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index a1769f35a86e..21a1d6cbef40 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c | |||
@@ -472,4 +472,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator") | |||
472 | .init_irq = ap_init_irq, | 472 | .init_irq = ap_init_irq, |
473 | .timer = &ap_timer, | 473 | .timer = &ap_timer, |
474 | .init_machine = ap_init, | 474 | .init_machine = ap_init, |
475 | .restart = integrator_restart, | ||
475 | MACHINE_END | 476 | MACHINE_END |
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 5de49c33e4d4..3a730d447c9a 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -499,4 +499,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") | |||
499 | .init_irq = intcp_init_irq, | 499 | .init_irq = intcp_init_irq, |
500 | .timer = &cp_timer, | 500 | .timer = &cp_timer, |
501 | .init_machine = intcp_init, | 501 | .init_machine = intcp_init, |
502 | .restart = integrator_restart, | ||
502 | MACHINE_END | 503 | MACHINE_END |
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h index 52b7fab7ef60..07e9ff7adafb 100644 --- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h +++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h | |||
@@ -10,6 +10,7 @@ void iop13xx_map_io(void); | |||
10 | void iop13xx_platform_init(void); | 10 | void iop13xx_platform_init(void); |
11 | void iop13xx_add_tpmi_devices(void); | 11 | void iop13xx_add_tpmi_devices(void); |
12 | void iop13xx_init_irq(void); | 12 | void iop13xx_init_irq(void); |
13 | void iop13xx_restart(char, const char *); | ||
13 | 14 | ||
14 | /* CPUID CP6 R0 Page 0 */ | 15 | /* CPUID CP6 R0 Page 0 */ |
15 | static inline int iop13xx_cpu_id(void) | 16 | static inline int iop13xx_cpu_id(void) |
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h index d0c66ef450a7..1f31ed3f8ae2 100644 --- a/arch/arm/mach-iop13xx/include/mach/system.h +++ b/arch/arm/mach-iop13xx/include/mach/system.h | |||
@@ -7,21 +7,7 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <mach/iop13xx.h> | ||
11 | static inline void arch_idle(void) | 10 | static inline void arch_idle(void) |
12 | { | 11 | { |
13 | cpu_do_idle(); | 12 | cpu_do_idle(); |
14 | } | 13 | } |
15 | |||
16 | static inline void arch_reset(char mode, const char *cmd) | ||
17 | { | ||
18 | /* | ||
19 | * Reset the internal bus (warning both cores are reset) | ||
20 | */ | ||
21 | write_wdtcr(IOP_WDTCR_EN_ARM); | ||
22 | write_wdtcr(IOP_WDTCR_EN); | ||
23 | write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); | ||
24 | write_wdtcr(0x1000); | ||
25 | |||
26 | for(;;); | ||
27 | } | ||
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index 4cf2cc477eae..abaee8833588 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c | |||
@@ -96,4 +96,5 @@ MACHINE_START(IQ81340MC, "Intel IQ81340MC") | |||
96 | .init_irq = iop13xx_init_irq, | 96 | .init_irq = iop13xx_init_irq, |
97 | .timer = &iq81340mc_timer, | 97 | .timer = &iq81340mc_timer, |
98 | .init_machine = iq81340mc_init, | 98 | .init_machine = iq81340mc_init, |
99 | .restart = iop13xx_restart, | ||
99 | MACHINE_END | 100 | MACHINE_END |
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index cd9e27499a1e..690916a09dc6 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c | |||
@@ -98,4 +98,5 @@ MACHINE_START(IQ81340SC, "Intel IQ81340SC") | |||
98 | .init_irq = iop13xx_init_irq, | 98 | .init_irq = iop13xx_init_irq, |
99 | .timer = &iq81340sc_timer, | 99 | .timer = &iq81340sc_timer, |
100 | .init_machine = iq81340sc_init, | 100 | .init_machine = iq81340sc_init, |
101 | .restart = iop13xx_restart, | ||
101 | MACHINE_END | 102 | MACHINE_END |
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c index a5b989728b9e..daabb1fa6c2c 100644 --- a/arch/arm/mach-iop13xx/setup.c +++ b/arch/arm/mach-iop13xx/setup.c | |||
@@ -606,3 +606,14 @@ static int __init iop13xx_init_adma_setup(char *str) | |||
606 | __setup("iop13xx_init_adma", iop13xx_init_adma_setup); | 606 | __setup("iop13xx_init_adma", iop13xx_init_adma_setup); |
607 | __setup("iop13xx_init_uart", iop13xx_init_uart_setup); | 607 | __setup("iop13xx_init_uart", iop13xx_init_uart_setup); |
608 | __setup("iop13xx_init_i2c", iop13xx_init_i2c_setup); | 608 | __setup("iop13xx_init_i2c", iop13xx_init_i2c_setup); |
609 | |||
610 | void iop13xx_restart(char mode, const char *cmd) | ||
611 | { | ||
612 | /* | ||
613 | * Reset the internal bus (warning both cores are reset) | ||
614 | */ | ||
615 | write_wdtcr(IOP_WDTCR_EN_ARM); | ||
616 | write_wdtcr(IOP_WDTCR_EN); | ||
617 | write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); | ||
618 | write_wdtcr(0x1000); | ||
619 | } | ||
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c index 4325055d4e19..24069e03fdc1 100644 --- a/arch/arm/mach-iop32x/em7210.c +++ b/arch/arm/mach-iop32x/em7210.c | |||
@@ -208,4 +208,5 @@ MACHINE_START(EM7210, "Lanner EM7210") | |||
208 | .init_irq = iop32x_init_irq, | 208 | .init_irq = iop32x_init_irq, |
209 | .timer = &em7210_timer, | 209 | .timer = &em7210_timer, |
210 | .init_machine = em7210_init_machine, | 210 | .init_machine = em7210_init_machine, |
211 | .restart = iop3xx_restart, | ||
211 | MACHINE_END | 212 | MACHINE_END |
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index 0edc88020577..204e1d1cd766 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c | |||
@@ -212,4 +212,5 @@ MACHINE_START(GLANTANK, "GLAN Tank") | |||
212 | .init_irq = iop32x_init_irq, | 212 | .init_irq = iop32x_init_irq, |
213 | .timer = &glantank_timer, | 213 | .timer = &glantank_timer, |
214 | .init_machine = glantank_init_machine, | 214 | .init_machine = glantank_init_machine, |
215 | .restart = iop3xx_restart, | ||
215 | MACHINE_END | 216 | MACHINE_END |
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h index b4f83e5973b2..4a88727bca98 100644 --- a/arch/arm/mach-iop32x/include/mach/system.h +++ b/arch/arm/mach-iop32x/include/mach/system.h | |||
@@ -7,26 +7,7 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <asm/mach-types.h> | ||
11 | #include <asm/hardware/iop3xx.h> | ||
12 | #include <mach/n2100.h> | ||
13 | |||
14 | static inline void arch_idle(void) | 10 | static inline void arch_idle(void) |
15 | { | 11 | { |
16 | cpu_do_idle(); | 12 | cpu_do_idle(); |
17 | } | 13 | } |
18 | |||
19 | static inline void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | if (machine_is_n2100()) { | ||
22 | gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW); | ||
23 | gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT); | ||
24 | while (1) | ||
25 | ; | ||
26 | } | ||
27 | |||
28 | *IOP3XX_PCSR = 0x30; | ||
29 | |||
30 | /* Jump into ROM at address 0 */ | ||
31 | soft_restart(0); | ||
32 | } | ||
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index 9e7aaccfeba0..3eb642af1cdc 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c | |||
@@ -318,6 +318,7 @@ MACHINE_START(IQ31244, "Intel IQ31244") | |||
318 | .init_irq = iop32x_init_irq, | 318 | .init_irq = iop32x_init_irq, |
319 | .timer = &iq31244_timer, | 319 | .timer = &iq31244_timer, |
320 | .init_machine = iq31244_init_machine, | 320 | .init_machine = iq31244_init_machine, |
321 | .restart = iop3xx_restart, | ||
321 | MACHINE_END | 322 | MACHINE_END |
322 | 323 | ||
323 | /* There should have been an ep80219 machine identifier from the beginning. | 324 | /* There should have been an ep80219 machine identifier from the beginning. |
@@ -332,4 +333,5 @@ MACHINE_START(EP80219, "Intel EP80219") | |||
332 | .init_irq = iop32x_init_irq, | 333 | .init_irq = iop32x_init_irq, |
333 | .timer = &iq31244_timer, | 334 | .timer = &iq31244_timer, |
334 | .init_machine = iq31244_init_machine, | 335 | .init_machine = iq31244_init_machine, |
336 | .restart = iop3xx_restart, | ||
335 | MACHINE_END | 337 | MACHINE_END |
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index 53ea86f649dd..2ec724b58a2c 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c | |||
@@ -191,4 +191,5 @@ MACHINE_START(IQ80321, "Intel IQ80321") | |||
191 | .init_irq = iop32x_init_irq, | 191 | .init_irq = iop32x_init_irq, |
192 | .timer = &iq80321_timer, | 192 | .timer = &iq80321_timer, |
193 | .init_machine = iq80321_init_machine, | 193 | .init_machine = iq80321_init_machine, |
194 | .restart = iop3xx_restart, | ||
194 | MACHINE_END | 195 | MACHINE_END |
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index d7269279968c..6b6d55912444 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c | |||
@@ -291,6 +291,14 @@ static void n2100_power_off(void) | |||
291 | ; | 291 | ; |
292 | } | 292 | } |
293 | 293 | ||
294 | static void n2100_restart(char mode, const char *cmd) | ||
295 | { | ||
296 | gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW); | ||
297 | gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT); | ||
298 | while (1) | ||
299 | ; | ||
300 | } | ||
301 | |||
294 | 302 | ||
295 | static struct timer_list power_button_poll_timer; | 303 | static struct timer_list power_button_poll_timer; |
296 | 304 | ||
@@ -332,4 +340,5 @@ MACHINE_START(N2100, "Thecus N2100") | |||
332 | .init_irq = iop32x_init_irq, | 340 | .init_irq = iop32x_init_irq, |
333 | .timer = &n2100_timer, | 341 | .timer = &n2100_timer, |
334 | .init_machine = n2100_init_machine, | 342 | .init_machine = n2100_init_machine, |
343 | .restart = n2100_restart, | ||
335 | MACHINE_END | 344 | MACHINE_END |
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h index 86d1b20dd692..4f98e765397c 100644 --- a/arch/arm/mach-iop33x/include/mach/system.h +++ b/arch/arm/mach-iop33x/include/mach/system.h | |||
@@ -7,17 +7,7 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <asm/hardware/iop3xx.h> | ||
11 | |||
12 | static inline void arch_idle(void) | 10 | static inline void arch_idle(void) |
13 | { | 11 | { |
14 | cpu_do_idle(); | 12 | cpu_do_idle(); |
15 | } | 13 | } |
16 | |||
17 | static inline void arch_reset(char mode, const char *cmd) | ||
18 | { | ||
19 | *IOP3XX_PCSR = 0x30; | ||
20 | |||
21 | /* Jump into ROM at address 0 */ | ||
22 | soft_restart(0); | ||
23 | } | ||
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index 9e14ccc56f8e..abce934f3816 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c | |||
@@ -146,4 +146,5 @@ MACHINE_START(IQ80331, "Intel IQ80331") | |||
146 | .init_irq = iop33x_init_irq, | 146 | .init_irq = iop33x_init_irq, |
147 | .timer = &iq80331_timer, | 147 | .timer = &iq80331_timer, |
148 | .init_machine = iq80331_init_machine, | 148 | .init_machine = iq80331_init_machine, |
149 | .restart = iop3xx_restart, | ||
149 | MACHINE_END | 150 | MACHINE_END |
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 09c899a2523f..7513559e25bb 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c | |||
@@ -146,4 +146,5 @@ MACHINE_START(IQ80332, "Intel IQ80332") | |||
146 | .init_irq = iop33x_init_irq, | 146 | .init_irq = iop33x_init_irq, |
147 | .timer = &iq80332_timer, | 147 | .timer = &iq80332_timer, |
148 | .init_machine = iq80332_init_machine, | 148 | .init_machine = iq80332_init_machine, |
149 | .restart = iop3xx_restart, | ||
149 | MACHINE_END | 150 | MACHINE_END |
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 24f0fe35f4ad..81c45370a4e6 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
@@ -515,3 +515,7 @@ void __init ixp2000_init_irq(void) | |||
515 | } | 515 | } |
516 | } | 516 | } |
517 | 517 | ||
518 | void ixp2000_restart(char mode, const char *cmd) | ||
519 | { | ||
520 | ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); | ||
521 | } | ||
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index af9994537e01..ee525416f0d2 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c | |||
@@ -259,6 +259,7 @@ MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board") | |||
259 | .init_irq = ixp2000_init_irq, | 259 | .init_irq = ixp2000_init_irq, |
260 | .timer = &enp2611_timer, | 260 | .timer = &enp2611_timer, |
261 | .init_machine = enp2611_init_machine, | 261 | .init_machine = enp2611_init_machine, |
262 | .restart = ixp2000_restart, | ||
262 | MACHINE_END | 263 | MACHINE_END |
263 | 264 | ||
264 | 265 | ||
diff --git a/arch/arm/mach-ixp2000/include/mach/platform.h b/arch/arm/mach-ixp2000/include/mach/platform.h index 42182c79ed90..bb0f8dcf9ee1 100644 --- a/arch/arm/mach-ixp2000/include/mach/platform.h +++ b/arch/arm/mach-ixp2000/include/mach/platform.h | |||
@@ -122,6 +122,7 @@ void ixp2000_map_io(void); | |||
122 | void ixp2000_uart_init(void); | 122 | void ixp2000_uart_init(void); |
123 | void ixp2000_init_irq(void); | 123 | void ixp2000_init_irq(void); |
124 | void ixp2000_init_time(unsigned long); | 124 | void ixp2000_init_time(unsigned long); |
125 | void ixp2000_restart(char, const char *); | ||
125 | unsigned long ixp2000_gettimeoffset(void); | 126 | unsigned long ixp2000_gettimeoffset(void); |
126 | 127 | ||
127 | struct pci_sys_data; | 128 | struct pci_sys_data; |
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h index 810df7b93982..a7fb08b2b8e7 100644 --- a/arch/arm/mach-ixp2000/include/mach/system.h +++ b/arch/arm/mach-ixp2000/include/mach/system.h | |||
@@ -8,40 +8,7 @@ | |||
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | */ | 10 | */ |
11 | |||
12 | #include <mach/hardware.h> | ||
13 | #include <asm/mach-types.h> | ||
14 | |||
15 | static inline void arch_idle(void) | 11 | static inline void arch_idle(void) |
16 | { | 12 | { |
17 | cpu_do_idle(); | 13 | cpu_do_idle(); |
18 | } | 14 | } |
19 | |||
20 | static inline void arch_reset(char mode, const char *cmd) | ||
21 | { | ||
22 | /* | ||
23 | * Reset flash banking register so that we are pointing at | ||
24 | * RedBoot bank. | ||
25 | */ | ||
26 | if (machine_is_ixdp2401()) { | ||
27 | ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, | ||
28 | ((0 >> IXDP2X01_FLASH_WINDOW_BITS) | ||
29 | | IXDP2X01_CPLD_FLASH_INTERN)); | ||
30 | ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); | ||
31 | } | ||
32 | |||
33 | /* | ||
34 | * On IXDP2801 we need to write this magic sequence to the CPLD | ||
35 | * to cause a complete reset of the CPU and all external devices | ||
36 | * and move the flash bank register back to 0. | ||
37 | */ | ||
38 | if (machine_is_ixdp2801() || machine_is_ixdp28x5()) { | ||
39 | unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; | ||
40 | |||
41 | reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); | ||
42 | ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); | ||
43 | ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); | ||
44 | } | ||
45 | |||
46 | ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); | ||
47 | } | ||
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c index f7dfd9700141..f53e911ec94a 100644 --- a/arch/arm/mach-ixp2000/ixdp2400.c +++ b/arch/arm/mach-ixp2000/ixdp2400.c | |||
@@ -176,5 +176,6 @@ MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform") | |||
176 | .init_irq = ixdp2400_init_irq, | 176 | .init_irq = ixdp2400_init_irq, |
177 | .timer = &ixdp2400_timer, | 177 | .timer = &ixdp2400_timer, |
178 | .init_machine = ixdp2x00_init_machine, | 178 | .init_machine = ixdp2x00_init_machine, |
179 | .restart = ixp2000_restart, | ||
179 | MACHINE_END | 180 | MACHINE_END |
180 | 181 | ||
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c index d33bcac1ec92..a2e7c393e74f 100644 --- a/arch/arm/mach-ixp2000/ixdp2800.c +++ b/arch/arm/mach-ixp2000/ixdp2800.c | |||
@@ -291,5 +291,6 @@ MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform") | |||
291 | .init_irq = ixdp2800_init_irq, | 291 | .init_irq = ixdp2800_init_irq, |
292 | .timer = &ixdp2800_timer, | 292 | .timer = &ixdp2800_timer, |
293 | .init_machine = ixdp2x00_init_machine, | 293 | .init_machine = ixdp2x00_init_machine, |
294 | .restart = ixp2000_restart, | ||
294 | MACHINE_END | 295 | MACHINE_END |
295 | 296 | ||
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 61a28676b5be..7632beadabf6 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c | |||
@@ -413,6 +413,35 @@ static void __init ixdp2x01_init_machine(void) | |||
413 | ixdp2x01_uart_init(); | 413 | ixdp2x01_uart_init(); |
414 | } | 414 | } |
415 | 415 | ||
416 | static void ixdp2401_restart(char mode, const char *cmd) | ||
417 | { | ||
418 | /* | ||
419 | * Reset flash banking register so that we are pointing at | ||
420 | * RedBoot bank. | ||
421 | */ | ||
422 | ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, | ||
423 | ((0 >> IXDP2X01_FLASH_WINDOW_BITS) | ||
424 | | IXDP2X01_CPLD_FLASH_INTERN)); | ||
425 | ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); | ||
426 | |||
427 | ixp2000_restart(mode, cmd); | ||
428 | } | ||
429 | |||
430 | static void ixdp280x_restart(char mode, const char *cmd) | ||
431 | { | ||
432 | /* | ||
433 | * On IXDP2801 we need to write this magic sequence to the CPLD | ||
434 | * to cause a complete reset of the CPU and all external devices | ||
435 | * and move the flash bank register back to 0. | ||
436 | */ | ||
437 | unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; | ||
438 | |||
439 | reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); | ||
440 | ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); | ||
441 | ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); | ||
442 | |||
443 | ixp2000_restart(mode, cmd); | ||
444 | } | ||
416 | 445 | ||
417 | #ifdef CONFIG_ARCH_IXDP2401 | 446 | #ifdef CONFIG_ARCH_IXDP2401 |
418 | MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") | 447 | MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") |
@@ -422,6 +451,7 @@ MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") | |||
422 | .init_irq = ixdp2x01_init_irq, | 451 | .init_irq = ixdp2x01_init_irq, |
423 | .timer = &ixdp2x01_timer, | 452 | .timer = &ixdp2x01_timer, |
424 | .init_machine = ixdp2x01_init_machine, | 453 | .init_machine = ixdp2x01_init_machine, |
454 | .restart = ixdp2401_restart, | ||
425 | MACHINE_END | 455 | MACHINE_END |
426 | #endif | 456 | #endif |
427 | 457 | ||
@@ -433,6 +463,7 @@ MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform") | |||
433 | .init_irq = ixdp2x01_init_irq, | 463 | .init_irq = ixdp2x01_init_irq, |
434 | .timer = &ixdp2x01_timer, | 464 | .timer = &ixdp2x01_timer, |
435 | .init_machine = ixdp2x01_init_machine, | 465 | .init_machine = ixdp2x01_init_machine, |
466 | .restart = ixdp280x_restart, | ||
436 | MACHINE_END | 467 | MACHINE_END |
437 | 468 | ||
438 | /* | 469 | /* |
@@ -446,6 +477,7 @@ MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform") | |||
446 | .init_irq = ixdp2x01_init_irq, | 477 | .init_irq = ixdp2x01_init_irq, |
447 | .timer = &ixdp2x01_timer, | 478 | .timer = &ixdp2x01_timer, |
448 | .init_machine = ixdp2x01_init_machine, | 479 | .init_machine = ixdp2x01_init_machine, |
480 | .restart = ixdp280x_restart, | ||
449 | MACHINE_END | 481 | MACHINE_END |
450 | #endif | 482 | #endif |
451 | 483 | ||
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index a1bee33d183e..0923bb905cc0 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c | |||
@@ -444,3 +444,9 @@ void __init ixp23xx_sys_init(void) | |||
444 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; | 444 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; |
445 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); | 445 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); |
446 | } | 446 | } |
447 | |||
448 | void ixp23xx_restart(char mode, const char *cmd) | ||
449 | { | ||
450 | /* Use on-chip reset capability */ | ||
451 | *IXP23XX_RESET0 |= IXP23XX_RST_ALL; | ||
452 | } | ||
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c index 30dd31652e9d..8f2487e1fc4e 100644 --- a/arch/arm/mach-ixp23xx/espresso.c +++ b/arch/arm/mach-ixp23xx/espresso.c | |||
@@ -90,4 +90,5 @@ MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso") | |||
90 | .timer = &ixp23xx_timer, | 90 | .timer = &ixp23xx_timer, |
91 | .atag_offset = 0x100, | 91 | .atag_offset = 0x100, |
92 | .init_machine = espresso_init, | 92 | .init_machine = espresso_init, |
93 | .restart = ixp23xx_restart, | ||
93 | MACHINE_END | 94 | MACHINE_END |
diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h index db9d9416e5e4..50de558e722e 100644 --- a/arch/arm/mach-ixp23xx/include/mach/platform.h +++ b/arch/arm/mach-ixp23xx/include/mach/platform.h | |||
@@ -34,6 +34,7 @@ struct pci_sys_data; | |||
34 | void ixp23xx_map_io(void); | 34 | void ixp23xx_map_io(void); |
35 | void ixp23xx_init_irq(void); | 35 | void ixp23xx_init_irq(void); |
36 | void ixp23xx_sys_init(void); | 36 | void ixp23xx_sys_init(void); |
37 | void ixp23xx_restart(char, const char *); | ||
37 | int ixp23xx_pci_setup(int, struct pci_sys_data *); | 38 | int ixp23xx_pci_setup(int, struct pci_sys_data *); |
38 | void ixp23xx_pci_preinit(void); | 39 | void ixp23xx_pci_preinit(void); |
39 | struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); | 40 | struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); |
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h index 8920ff2dff1f..277dda7334b9 100644 --- a/arch/arm/mach-ixp23xx/include/mach/system.h +++ b/arch/arm/mach-ixp23xx/include/mach/system.h | |||
@@ -7,10 +7,6 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | |||
11 | #include <mach/hardware.h> | ||
12 | #include <asm/mach-types.h> | ||
13 | |||
14 | static inline void arch_idle(void) | 10 | static inline void arch_idle(void) |
15 | { | 11 | { |
16 | #if 0 | 12 | #if 0 |
@@ -18,16 +14,3 @@ static inline void arch_idle(void) | |||
18 | cpu_do_idle(); | 14 | cpu_do_idle(); |
19 | #endif | 15 | #endif |
20 | } | 16 | } |
21 | |||
22 | static inline void arch_reset(char mode, const char *cmd) | ||
23 | { | ||
24 | /* First try machine specific support */ | ||
25 | if (machine_is_ixdp2351()) { | ||
26 | *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC; | ||
27 | (void) *IXDP2351_CPLD_RESET1_REG; | ||
28 | *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE; | ||
29 | } | ||
30 | |||
31 | /* Use on-chip reset capability */ | ||
32 | *IXP23XX_RESET0 |= IXP23XX_RST_ALL; | ||
33 | } | ||
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index b3a57e0f3419..5d5dd3e8d069 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c | |||
@@ -326,6 +326,17 @@ static void __init ixdp2351_init(void) | |||
326 | ixp23xx_sys_init(); | 326 | ixp23xx_sys_init(); |
327 | } | 327 | } |
328 | 328 | ||
329 | static void ixdp2351_restart(char mode, const char *cmd) | ||
330 | { | ||
331 | /* First try machine specific support */ | ||
332 | |||
333 | *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC; | ||
334 | (void) *IXDP2351_CPLD_RESET1_REG; | ||
335 | *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE; | ||
336 | |||
337 | ixp23xx_restart(mode, cmd); | ||
338 | } | ||
339 | |||
329 | MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") | 340 | MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") |
330 | /* Maintainer: MontaVista Software, Inc. */ | 341 | /* Maintainer: MontaVista Software, Inc. */ |
331 | .map_io = ixdp2351_map_io, | 342 | .map_io = ixdp2351_map_io, |
@@ -333,4 +344,5 @@ MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") | |||
333 | .timer = &ixp23xx_timer, | 344 | .timer = &ixp23xx_timer, |
334 | .atag_offset = 0x100, | 345 | .atag_offset = 0x100, |
335 | .init_machine = ixdp2351_init, | 346 | .init_machine = ixdp2351_init, |
347 | .restart = ixdp2351_restart, | ||
336 | MACHINE_END | 348 | MACHINE_END |
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index 8f4dcbba9025..377283fc658c 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c | |||
@@ -177,4 +177,5 @@ MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform") | |||
177 | .timer = &ixp23xx_timer, | 177 | .timer = &ixp23xx_timer, |
178 | .atag_offset = 0x100, | 178 | .atag_offset = 0x100, |
179 | .init_machine = roadrunner_init, | 179 | .init_machine = roadrunner_init, |
180 | .restart = ixp23xx_restart, | ||
180 | MACHINE_END | 181 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c index 37609a22c450..a7277ad470a5 100644 --- a/arch/arm/mach-ixp4xx/avila-setup.c +++ b/arch/arm/mach-ixp4xx/avila-setup.c | |||
@@ -172,6 +172,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform") | |||
172 | #if defined(CONFIG_PCI) | 172 | #if defined(CONFIG_PCI) |
173 | .dma_zone_size = SZ_64M, | 173 | .dma_zone_size = SZ_64M, |
174 | #endif | 174 | #endif |
175 | .restart = ixp4xx_restart, | ||
175 | MACHINE_END | 176 | MACHINE_END |
176 | 177 | ||
177 | /* | 178 | /* |
@@ -190,6 +191,7 @@ MACHINE_START(LOFT, "Giant Shoulder Inc Loft board") | |||
190 | #if defined(CONFIG_PCI) | 191 | #if defined(CONFIG_PCI) |
191 | .dma_zone_size = SZ_64M, | 192 | .dma_zone_size = SZ_64M, |
192 | #endif | 193 | #endif |
194 | .restart = ixp4xx_restart, | ||
193 | MACHINE_END | 195 | MACHINE_END |
194 | #endif | 196 | #endif |
195 | 197 | ||
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index b86a0055ab96..3841ab4146ba 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/mm.h> | 17 | #include <linux/mm.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/serial.h> | 19 | #include <linux/serial.h> |
20 | #include <linux/sched.h> | ||
21 | #include <linux/tty.h> | 20 | #include <linux/tty.h> |
22 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
23 | #include <linux/serial_core.h> | 22 | #include <linux/serial_core.h> |
@@ -403,18 +402,9 @@ void __init ixp4xx_sys_init(void) | |||
403 | /* | 402 | /* |
404 | * sched_clock() | 403 | * sched_clock() |
405 | */ | 404 | */ |
406 | static DEFINE_CLOCK_DATA(cd); | 405 | static u32 notrace ixp4xx_read_sched_clock(void) |
407 | |||
408 | unsigned long long notrace sched_clock(void) | ||
409 | { | ||
410 | u32 cyc = *IXP4XX_OSTS; | ||
411 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
412 | } | ||
413 | |||
414 | static void notrace ixp4xx_update_sched_clock(void) | ||
415 | { | 406 | { |
416 | u32 cyc = *IXP4XX_OSTS; | 407 | return *IXP4XX_OSTS; |
417 | update_sched_clock(&cd, cyc, (u32)~0); | ||
418 | } | 408 | } |
419 | 409 | ||
420 | /* | 410 | /* |
@@ -430,7 +420,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ; | |||
430 | EXPORT_SYMBOL(ixp4xx_timer_freq); | 420 | EXPORT_SYMBOL(ixp4xx_timer_freq); |
431 | static void __init ixp4xx_clocksource_init(void) | 421 | static void __init ixp4xx_clocksource_init(void) |
432 | { | 422 | { |
433 | init_sched_clock(&cd, ixp4xx_update_sched_clock, 32, ixp4xx_timer_freq); | 423 | setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq); |
434 | 424 | ||
435 | clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32, | 425 | clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32, |
436 | ixp4xx_clocksource_read); | 426 | ixp4xx_clocksource_read); |
@@ -501,3 +491,23 @@ static void __init ixp4xx_clockevent_init(void) | |||
501 | 491 | ||
502 | clockevents_register_device(&clockevent_ixp4xx); | 492 | clockevents_register_device(&clockevent_ixp4xx); |
503 | } | 493 | } |
494 | |||
495 | void ixp4xx_restart(char mode, const char *cmd) | ||
496 | { | ||
497 | if ( 1 && mode == 's') { | ||
498 | /* Jump into ROM at address 0 */ | ||
499 | soft_restart(0); | ||
500 | } else { | ||
501 | /* Use on-chip reset capability */ | ||
502 | |||
503 | /* set the "key" register to enable access to | ||
504 | * "timer" and "enable" registers | ||
505 | */ | ||
506 | *IXP4XX_OSWK = IXP4XX_WDT_KEY; | ||
507 | |||
508 | /* write 0 to the timer register for an immediate reset */ | ||
509 | *IXP4XX_OSWT = 0; | ||
510 | |||
511 | *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; | ||
512 | } | ||
513 | } | ||
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c index 81dfec31842b..a74f86ce8bcc 100644 --- a/arch/arm/mach-ixp4xx/coyote-setup.c +++ b/arch/arm/mach-ixp4xx/coyote-setup.c | |||
@@ -117,6 +117,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote") | |||
117 | #if defined(CONFIG_PCI) | 117 | #if defined(CONFIG_PCI) |
118 | .dma_zone_size = SZ_64M, | 118 | .dma_zone_size = SZ_64M, |
119 | #endif | 119 | #endif |
120 | .restart = ixp4xx_restart, | ||
120 | MACHINE_END | 121 | MACHINE_END |
121 | #endif | 122 | #endif |
122 | 123 | ||
@@ -132,6 +133,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425") | |||
132 | .timer = &ixp4xx_timer, | 133 | .timer = &ixp4xx_timer, |
133 | .atag_offset = 0x100, | 134 | .atag_offset = 0x100, |
134 | .init_machine = coyote_init, | 135 | .init_machine = coyote_init, |
136 | .restart = ixp4xx_restart, | ||
135 | MACHINE_END | 137 | MACHINE_END |
136 | #endif | 138 | #endif |
137 | 139 | ||
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c index 8837fbca27ce..67be177b336a 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-setup.c +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c | |||
@@ -286,4 +286,5 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") | |||
286 | #if defined(CONFIG_PCI) | 286 | #if defined(CONFIG_PCI) |
287 | .dma_zone_size = SZ_64M, | 287 | .dma_zone_size = SZ_64M, |
288 | #endif | 288 | #endif |
289 | .restart = ixp4xx_restart, | ||
289 | MACHINE_END | 290 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c index 2887c3578c17..6d5818285af8 100644 --- a/arch/arm/mach-ixp4xx/fsg-setup.c +++ b/arch/arm/mach-ixp4xx/fsg-setup.c | |||
@@ -277,5 +277,6 @@ MACHINE_START(FSG, "Freecom FSG-3") | |||
277 | #if defined(CONFIG_PCI) | 277 | #if defined(CONFIG_PCI) |
278 | .dma_zone_size = SZ_64M, | 278 | .dma_zone_size = SZ_64M, |
279 | #endif | 279 | #endif |
280 | .restart = ixp4xx_restart, | ||
280 | MACHINE_END | 281 | MACHINE_END |
281 | 282 | ||
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c index d69d1b053bb7..7ecf9b28f1c0 100644 --- a/arch/arm/mach-ixp4xx/gateway7001-setup.c +++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c | |||
@@ -104,5 +104,6 @@ MACHINE_START(GATEWAY7001, "Gateway 7001 AP") | |||
104 | #if defined(CONFIG_PCI) | 104 | #if defined(CONFIG_PCI) |
105 | .dma_zone_size = SZ_64M, | 105 | .dma_zone_size = SZ_64M, |
106 | #endif | 106 | #endif |
107 | .restart = ixp4xx_restart, | ||
107 | MACHINE_END | 108 | MACHINE_END |
108 | #endif | 109 | #endif |
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index bf6678d1a929..c0e3d69a8aec 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c | |||
@@ -504,4 +504,5 @@ MACHINE_START(GORAMO_MLR, "MultiLink") | |||
504 | #if defined(CONFIG_PCI) | 504 | #if defined(CONFIG_PCI) |
505 | .dma_zone_size = SZ_64M, | 505 | .dma_zone_size = SZ_64M, |
506 | #endif | 506 | #endif |
507 | .restart = ixp4xx_restart, | ||
507 | MACHINE_END | 508 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index aa029fc19140..a23f89391458 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c | |||
@@ -172,6 +172,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") | |||
172 | #if defined(CONFIG_PCI) | 172 | #if defined(CONFIG_PCI) |
173 | .dma_zone_size = SZ_64M, | 173 | .dma_zone_size = SZ_64M, |
174 | #endif | 174 | #endif |
175 | .restart = ixp4xx_restart, | ||
175 | MACHINE_END | 176 | MACHINE_END |
176 | 177 | ||
177 | 178 | ||
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h index e824c02c825a..df9250bbf13d 100644 --- a/arch/arm/mach-ixp4xx/include/mach/platform.h +++ b/arch/arm/mach-ixp4xx/include/mach/platform.h | |||
@@ -125,6 +125,7 @@ extern void ixp4xx_init_irq(void); | |||
125 | extern void ixp4xx_sys_init(void); | 125 | extern void ixp4xx_sys_init(void); |
126 | extern void ixp4xx_timer_init(void); | 126 | extern void ixp4xx_timer_init(void); |
127 | extern struct sys_timer ixp4xx_timer; | 127 | extern struct sys_timer ixp4xx_timer; |
128 | extern void ixp4xx_restart(char, const char *); | ||
128 | extern void ixp4xx_pci_preinit(void); | 129 | extern void ixp4xx_pci_preinit(void); |
129 | struct pci_sys_data; | 130 | struct pci_sys_data; |
130 | extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); | 131 | extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); |
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h index 24337d9d275b..140a9bef4466 100644 --- a/arch/arm/mach-ixp4xx/include/mach/system.h +++ b/arch/arm/mach-ixp4xx/include/mach/system.h | |||
@@ -8,9 +8,6 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | * | 9 | * |
10 | */ | 10 | */ |
11 | |||
12 | #include <mach/hardware.h> | ||
13 | |||
14 | static inline void arch_idle(void) | 11 | static inline void arch_idle(void) |
15 | { | 12 | { |
16 | /* ixp4xx does not implement the XScale PWRMODE register, | 13 | /* ixp4xx does not implement the XScale PWRMODE register, |
@@ -20,25 +17,3 @@ static inline void arch_idle(void) | |||
20 | cpu_do_idle(); | 17 | cpu_do_idle(); |
21 | #endif | 18 | #endif |
22 | } | 19 | } |
23 | |||
24 | |||
25 | static inline void arch_reset(char mode, const char *cmd) | ||
26 | { | ||
27 | if ( 1 && mode == 's') { | ||
28 | /* Jump into ROM at address 0 */ | ||
29 | soft_restart(0); | ||
30 | } else { | ||
31 | /* Use on-chip reset capability */ | ||
32 | |||
33 | /* set the "key" register to enable access to | ||
34 | * "timer" and "enable" registers | ||
35 | */ | ||
36 | *IXP4XX_OSWK = IXP4XX_WDT_KEY; | ||
37 | |||
38 | /* write 0 to the timer register for an immediate reset */ | ||
39 | *IXP4XX_OSWT = 0; | ||
40 | |||
41 | *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; | ||
42 | } | ||
43 | } | ||
44 | |||
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index f235f829dfa6..8a38b39999f8 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c | |||
@@ -261,6 +261,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") | |||
261 | #if defined(CONFIG_PCI) | 261 | #if defined(CONFIG_PCI) |
262 | .dma_zone_size = SZ_64M, | 262 | .dma_zone_size = SZ_64M, |
263 | #endif | 263 | #endif |
264 | .restart = ixp4xx_restart, | ||
264 | MACHINE_END | 265 | MACHINE_END |
265 | #endif | 266 | #endif |
266 | 267 | ||
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index de716fa1aab6..1010eb7b0083 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c | |||
@@ -321,4 +321,5 @@ MACHINE_START(NAS100D, "Iomega NAS 100d") | |||
321 | #if defined(CONFIG_PCI) | 321 | #if defined(CONFIG_PCI) |
322 | .dma_zone_size = SZ_64M, | 322 | .dma_zone_size = SZ_64M, |
323 | #endif | 323 | #endif |
324 | .restart = ixp4xx_restart, | ||
324 | MACHINE_END | 325 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index ac81ccb26bfe..aa355c360d57 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c | |||
@@ -307,4 +307,5 @@ MACHINE_START(NSLU2, "Linksys NSLU2") | |||
307 | #if defined(CONFIG_PCI) | 307 | #if defined(CONFIG_PCI) |
308 | .dma_zone_size = SZ_64M, | 308 | .dma_zone_size = SZ_64M, |
309 | #endif | 309 | #endif |
310 | .restart = ixp4xx_restart, | ||
310 | MACHINE_END | 311 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c index 3b6a81a696fc..0940869fcfdd 100644 --- a/arch/arm/mach-ixp4xx/omixp-setup.c +++ b/arch/arm/mach-ixp4xx/omixp-setup.c | |||
@@ -246,6 +246,7 @@ MACHINE_START(DEVIXP, "Omicron DEVIXP") | |||
246 | .init_irq = ixp4xx_init_irq, | 246 | .init_irq = ixp4xx_init_irq, |
247 | .timer = &ixp4xx_timer, | 247 | .timer = &ixp4xx_timer, |
248 | .init_machine = omixp_init, | 248 | .init_machine = omixp_init, |
249 | .restart = ixp4xx_restart, | ||
249 | MACHINE_END | 250 | MACHINE_END |
250 | #endif | 251 | #endif |
251 | 252 | ||
@@ -259,6 +260,7 @@ MACHINE_START(MICCPT, "Omicron MICCPT") | |||
259 | #if defined(CONFIG_PCI) | 260 | #if defined(CONFIG_PCI) |
260 | .dma_zone_size = SZ_64M, | 261 | .dma_zone_size = SZ_64M, |
261 | #endif | 262 | #endif |
263 | .restart = ixp4xx_restart, | ||
262 | MACHINE_END | 264 | MACHINE_END |
263 | #endif | 265 | #endif |
264 | 266 | ||
@@ -269,5 +271,6 @@ MACHINE_START(MIC256, "Omicron MIC256") | |||
269 | .init_irq = ixp4xx_init_irq, | 271 | .init_irq = ixp4xx_init_irq, |
270 | .timer = &ixp4xx_timer, | 272 | .timer = &ixp4xx_timer, |
271 | .init_machine = omixp_init, | 273 | .init_machine = omixp_init, |
274 | .restart = ixp4xx_restart, | ||
272 | MACHINE_END | 275 | MACHINE_END |
273 | #endif | 276 | #endif |
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c index 27e469ef4523..9dec20683291 100644 --- a/arch/arm/mach-ixp4xx/vulcan-setup.c +++ b/arch/arm/mach-ixp4xx/vulcan-setup.c | |||
@@ -244,4 +244,5 @@ MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") | |||
244 | #if defined(CONFIG_PCI) | 244 | #if defined(CONFIG_PCI) |
245 | .dma_zone_size = SZ_64M, | 245 | .dma_zone_size = SZ_64M, |
246 | #endif | 246 | #endif |
247 | .restart = ixp4xx_restart, | ||
247 | MACHINE_END | 248 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c index b14144b967a7..5ac0f0a0fd8c 100644 --- a/arch/arm/mach-ixp4xx/wg302v2-setup.c +++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c | |||
@@ -105,5 +105,6 @@ MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2") | |||
105 | #if defined(CONFIG_PCI) | 105 | #if defined(CONFIG_PCI) |
106 | .dma_zone_size = SZ_64M, | 106 | .dma_zone_size = SZ_64M, |
107 | #endif | 107 | #endif |
108 | .restart = ixp4xx_restart, | ||
108 | MACHINE_END | 109 | MACHINE_END |
109 | #endif | 110 | #endif |
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index f3248cfbe51d..0bff4a916231 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c | |||
@@ -534,3 +534,19 @@ static int __init kirkwood_clock_gate(void) | |||
534 | return 0; | 534 | return 0; |
535 | } | 535 | } |
536 | late_initcall(kirkwood_clock_gate); | 536 | late_initcall(kirkwood_clock_gate); |
537 | |||
538 | void kirkwood_restart(char mode, const char *cmd) | ||
539 | { | ||
540 | /* | ||
541 | * Enable soft reset to assert RSTOUTn. | ||
542 | */ | ||
543 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
544 | |||
545 | /* | ||
546 | * Assert soft reset. | ||
547 | */ | ||
548 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
549 | |||
550 | while (1) | ||
551 | ; | ||
552 | } | ||
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index b9b0f0968a36..1529280246d6 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h | |||
@@ -50,6 +50,7 @@ void kirkwood_uart1_init(void); | |||
50 | void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); | 50 | void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); |
51 | void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); | 51 | void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); |
52 | void kirkwood_audio_init(void); | 52 | void kirkwood_audio_init(void); |
53 | void kirkwood_restart(char, const char *); | ||
53 | 54 | ||
54 | extern int kirkwood_tclk; | 55 | extern int kirkwood_tclk; |
55 | extern struct sys_timer kirkwood_timer; | 56 | extern struct sys_timer kirkwood_timer; |
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c index f457e07a65f0..6e1bac929ab5 100644 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c | |||
@@ -227,4 +227,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2") | |||
227 | .init_early = kirkwood_init_early, | 227 | .init_early = kirkwood_init_early, |
228 | .init_irq = kirkwood_init_irq, | 228 | .init_irq = kirkwood_init_irq, |
229 | .timer = &kirkwood_timer, | 229 | .timer = &kirkwood_timer, |
230 | .restart = kirkwood_restart, | ||
230 | MACHINE_END | 231 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c index ff4c21c1f923..d93359379598 100644 --- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c +++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c | |||
@@ -103,4 +103,5 @@ MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board") | |||
103 | .init_early = kirkwood_init_early, | 103 | .init_early = kirkwood_init_early, |
104 | .init_irq = kirkwood_init_irq, | 104 | .init_irq = kirkwood_init_irq, |
105 | .timer = &kirkwood_timer, | 105 | .timer = &kirkwood_timer, |
106 | .restart = kirkwood_restart, | ||
106 | MACHINE_END | 107 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c index e4d199b2b1e8..61d9a552a054 100644 --- a/arch/arm/mach-kirkwood/dockstar-setup.c +++ b/arch/arm/mach-kirkwood/dockstar-setup.c | |||
@@ -108,4 +108,5 @@ MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar") | |||
108 | .init_early = kirkwood_init_early, | 108 | .init_early = kirkwood_init_early, |
109 | .init_irq = kirkwood_init_irq, | 109 | .init_irq = kirkwood_init_irq, |
110 | .timer = &kirkwood_timer, | 110 | .timer = &kirkwood_timer, |
111 | .restart = kirkwood_restart, | ||
111 | MACHINE_END | 112 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c index 6c40f784b516..bdaed3867d13 100644 --- a/arch/arm/mach-kirkwood/guruplug-setup.c +++ b/arch/arm/mach-kirkwood/guruplug-setup.c | |||
@@ -127,4 +127,5 @@ MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board") | |||
127 | .init_early = kirkwood_init_early, | 127 | .init_early = kirkwood_init_early, |
128 | .init_irq = kirkwood_init_irq, | 128 | .init_irq = kirkwood_init_irq, |
129 | .timer = &kirkwood_timer, | 129 | .timer = &kirkwood_timer, |
130 | .restart = kirkwood_restart, | ||
130 | MACHINE_END | 131 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h index 7568e95d279b..5fddde002b5e 100644 --- a/arch/arm/mach-kirkwood/include/mach/system.h +++ b/arch/arm/mach-kirkwood/include/mach/system.h | |||
@@ -9,28 +9,9 @@ | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | 9 | #ifndef __ASM_ARCH_SYSTEM_H |
10 | #define __ASM_ARCH_SYSTEM_H | 10 | #define __ASM_ARCH_SYSTEM_H |
11 | 11 | ||
12 | #include <mach/bridge-regs.h> | ||
13 | |||
14 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
15 | { | 13 | { |
16 | cpu_do_idle(); | 14 | cpu_do_idle(); |
17 | } | 15 | } |
18 | 16 | ||
19 | static inline void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | /* | ||
22 | * Enable soft reset to assert RSTOUTn. | ||
23 | */ | ||
24 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
25 | |||
26 | /* | ||
27 | * Assert soft reset. | ||
28 | */ | ||
29 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
30 | |||
31 | while (1) | ||
32 | ; | ||
33 | } | ||
34 | |||
35 | |||
36 | #endif | 17 | #endif |
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c index 9a1e917352f7..85f6169c2484 100644 --- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c +++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c | |||
@@ -169,4 +169,5 @@ MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board") | |||
169 | .init_early = kirkwood_init_early, | 169 | .init_early = kirkwood_init_early, |
170 | .init_irq = kirkwood_init_irq, | 170 | .init_irq = kirkwood_init_irq, |
171 | .timer = &kirkwood_timer, | 171 | .timer = &kirkwood_timer, |
172 | .restart = kirkwood_restart, | ||
172 | MACHINE_END | 173 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c index 8849bcc7328e..e6bba01bae38 100644 --- a/arch/arm/mach-kirkwood/netspace_v2-setup.c +++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c | |||
@@ -264,6 +264,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") | |||
264 | .init_early = kirkwood_init_early, | 264 | .init_early = kirkwood_init_early, |
265 | .init_irq = kirkwood_init_irq, | 265 | .init_irq = kirkwood_init_irq, |
266 | .timer = &kirkwood_timer, | 266 | .timer = &kirkwood_timer, |
267 | .restart = kirkwood_restart, | ||
267 | MACHINE_END | 268 | MACHINE_END |
268 | #endif | 269 | #endif |
269 | 270 | ||
@@ -275,6 +276,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2") | |||
275 | .init_early = kirkwood_init_early, | 276 | .init_early = kirkwood_init_early, |
276 | .init_irq = kirkwood_init_irq, | 277 | .init_irq = kirkwood_init_irq, |
277 | .timer = &kirkwood_timer, | 278 | .timer = &kirkwood_timer, |
279 | .restart = kirkwood_restart, | ||
278 | MACHINE_END | 280 | MACHINE_END |
279 | #endif | 281 | #endif |
280 | 282 | ||
@@ -286,5 +288,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2") | |||
286 | .init_early = kirkwood_init_early, | 288 | .init_early = kirkwood_init_early, |
287 | .init_irq = kirkwood_init_irq, | 289 | .init_irq = kirkwood_init_irq, |
288 | .timer = &kirkwood_timer, | 290 | .timer = &kirkwood_timer, |
291 | .restart = kirkwood_restart, | ||
289 | MACHINE_END | 292 | MACHINE_END |
290 | #endif | 293 | #endif |
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c index 1ba12c4dff8f..31ae8de34e93 100644 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c | |||
@@ -405,6 +405,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") | |||
405 | .init_early = kirkwood_init_early, | 405 | .init_early = kirkwood_init_early, |
406 | .init_irq = kirkwood_init_irq, | 406 | .init_irq = kirkwood_init_irq, |
407 | .timer = &kirkwood_timer, | 407 | .timer = &kirkwood_timer, |
408 | .restart = kirkwood_restart, | ||
408 | MACHINE_END | 409 | MACHINE_END |
409 | #endif | 410 | #endif |
410 | 411 | ||
@@ -416,5 +417,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") | |||
416 | .init_early = kirkwood_init_early, | 417 | .init_early = kirkwood_init_early, |
417 | .init_irq = kirkwood_init_irq, | 418 | .init_irq = kirkwood_init_irq, |
418 | .timer = &kirkwood_timer, | 419 | .timer = &kirkwood_timer, |
420 | .restart = kirkwood_restart, | ||
419 | MACHINE_END | 421 | MACHINE_END |
420 | #endif | 422 | #endif |
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c index 5660ca6c3d88..01f8c8992880 100644 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ b/arch/arm/mach-kirkwood/openrd-setup.c | |||
@@ -220,6 +220,7 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") | |||
220 | .init_early = kirkwood_init_early, | 220 | .init_early = kirkwood_init_early, |
221 | .init_irq = kirkwood_init_irq, | 221 | .init_irq = kirkwood_init_irq, |
222 | .timer = &kirkwood_timer, | 222 | .timer = &kirkwood_timer, |
223 | .restart = kirkwood_restart, | ||
223 | MACHINE_END | 224 | MACHINE_END |
224 | #endif | 225 | #endif |
225 | 226 | ||
@@ -232,6 +233,7 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board") | |||
232 | .init_early = kirkwood_init_early, | 233 | .init_early = kirkwood_init_early, |
233 | .init_irq = kirkwood_init_irq, | 234 | .init_irq = kirkwood_init_irq, |
234 | .timer = &kirkwood_timer, | 235 | .timer = &kirkwood_timer, |
236 | .restart = kirkwood_restart, | ||
235 | MACHINE_END | 237 | MACHINE_END |
236 | #endif | 238 | #endif |
237 | 239 | ||
@@ -244,5 +246,6 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board") | |||
244 | .init_early = kirkwood_init_early, | 246 | .init_early = kirkwood_init_early, |
245 | .init_irq = kirkwood_init_irq, | 247 | .init_irq = kirkwood_init_irq, |
246 | .timer = &kirkwood_timer, | 248 | .timer = &kirkwood_timer, |
249 | .restart = kirkwood_restart, | ||
247 | MACHINE_END | 250 | MACHINE_END |
248 | #endif | 251 | #endif |
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index 6663869773ab..fd2c9c8b6831 100644 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c | |||
@@ -85,4 +85,5 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board") | |||
85 | .init_early = kirkwood_init_early, | 85 | .init_early = kirkwood_init_early, |
86 | .init_irq = kirkwood_init_irq, | 86 | .init_irq = kirkwood_init_irq, |
87 | .timer = &kirkwood_timer, | 87 | .timer = &kirkwood_timer, |
88 | .restart = kirkwood_restart, | ||
88 | MACHINE_END | 89 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index 66b3c05e37a6..ef922079348b 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c | |||
@@ -121,4 +121,5 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board") | |||
121 | .init_early = kirkwood_init_early, | 121 | .init_early = kirkwood_init_early, |
122 | .init_irq = kirkwood_init_irq, | 122 | .init_irq = kirkwood_init_irq, |
123 | .timer = &kirkwood_timer, | 123 | .timer = &kirkwood_timer, |
124 | .restart = kirkwood_restart, | ||
124 | MACHINE_END | 125 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c index 8b102d62e82c..4ea70e5f7137 100644 --- a/arch/arm/mach-kirkwood/sheevaplug-setup.c +++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c | |||
@@ -107,7 +107,7 @@ static void __init sheevaplug_init(void) | |||
107 | kirkwood_init(); | 107 | kirkwood_init(); |
108 | 108 | ||
109 | /* setup gpio pin select */ | 109 | /* setup gpio pin select */ |
110 | if (machine_is_sheeva_esata()) | 110 | if (machine_is_esata_sheevaplug()) |
111 | kirkwood_mpp_conf(sheeva_esata_mpp_config); | 111 | kirkwood_mpp_conf(sheeva_esata_mpp_config); |
112 | else | 112 | else |
113 | kirkwood_mpp_conf(sheevaplug_mpp_config); | 113 | kirkwood_mpp_conf(sheevaplug_mpp_config); |
@@ -123,11 +123,11 @@ static void __init sheevaplug_init(void) | |||
123 | kirkwood_ge00_init(&sheevaplug_ge00_data); | 123 | kirkwood_ge00_init(&sheevaplug_ge00_data); |
124 | 124 | ||
125 | /* honor lower power consumption for plugs with out eSATA */ | 125 | /* honor lower power consumption for plugs with out eSATA */ |
126 | if (machine_is_sheeva_esata()) | 126 | if (machine_is_esata_sheevaplug()) |
127 | kirkwood_sata_init(&sheeva_esata_sata_data); | 127 | kirkwood_sata_init(&sheeva_esata_sata_data); |
128 | 128 | ||
129 | /* enable sd wp and sd cd on plugs with esata */ | 129 | /* enable sd wp and sd cd on plugs with esata */ |
130 | if (machine_is_sheeva_esata()) | 130 | if (machine_is_esata_sheevaplug()) |
131 | kirkwood_sdio_init(&sheeva_esata_mvsdio_data); | 131 | kirkwood_sdio_init(&sheeva_esata_mvsdio_data); |
132 | else | 132 | else |
133 | kirkwood_sdio_init(&sheevaplug_mvsdio_data); | 133 | kirkwood_sdio_init(&sheevaplug_mvsdio_data); |
@@ -144,6 +144,7 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board") | |||
144 | .init_early = kirkwood_init_early, | 144 | .init_early = kirkwood_init_early, |
145 | .init_irq = kirkwood_init_irq, | 145 | .init_irq = kirkwood_init_irq, |
146 | .timer = &kirkwood_timer, | 146 | .timer = &kirkwood_timer, |
147 | .restart = kirkwood_restart, | ||
147 | MACHINE_END | 148 | MACHINE_END |
148 | #endif | 149 | #endif |
149 | 150 | ||
@@ -155,5 +156,6 @@ MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board") | |||
155 | .init_early = kirkwood_init_early, | 156 | .init_early = kirkwood_init_early, |
156 | .init_irq = kirkwood_init_irq, | 157 | .init_irq = kirkwood_init_irq, |
157 | .timer = &kirkwood_timer, | 158 | .timer = &kirkwood_timer, |
159 | .restart = kirkwood_restart, | ||
158 | MACHINE_END | 160 | MACHINE_END |
159 | #endif | 161 | #endif |
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c index ea104fb5ec3d..966b2b3bb813 100644 --- a/arch/arm/mach-kirkwood/t5325-setup.c +++ b/arch/arm/mach-kirkwood/t5325-setup.c | |||
@@ -207,4 +207,5 @@ MACHINE_START(T5325, "HP t5325 Thin Client") | |||
207 | .init_early = kirkwood_init_early, | 207 | .init_early = kirkwood_init_early, |
208 | .init_irq = kirkwood_init_irq, | 208 | .init_irq = kirkwood_init_irq, |
209 | .timer = &kirkwood_timer, | 209 | .timer = &kirkwood_timer, |
210 | .restart = kirkwood_restart, | ||
210 | MACHINE_END | 211 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c index 262c034836d4..73e2b6ca9564 100644 --- a/arch/arm/mach-kirkwood/ts219-setup.c +++ b/arch/arm/mach-kirkwood/ts219-setup.c | |||
@@ -138,4 +138,5 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219") | |||
138 | .init_early = kirkwood_init_early, | 138 | .init_early = kirkwood_init_early, |
139 | .init_irq = kirkwood_init_irq, | 139 | .init_irq = kirkwood_init_irq, |
140 | .timer = &kirkwood_timer, | 140 | .timer = &kirkwood_timer, |
141 | .restart = kirkwood_restart, | ||
141 | MACHINE_END | 142 | MACHINE_END |
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index b68f5b4a9ec8..5bbca2680442 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c | |||
@@ -182,4 +182,5 @@ MACHINE_START(TS41X, "QNAP TS-41x") | |||
182 | .init_early = kirkwood_init_early, | 182 | .init_early = kirkwood_init_early, |
183 | .init_irq = kirkwood_init_irq, | 183 | .init_irq = kirkwood_init_irq, |
184 | .timer = &kirkwood_timer, | 184 | .timer = &kirkwood_timer, |
185 | .restart = kirkwood_restart, | ||
185 | MACHINE_END | 186 | MACHINE_END |
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c index a91f99d265aa..255502ddd879 100644 --- a/arch/arm/mach-ks8695/board-acs5k.c +++ b/arch/arm/mach-ks8695/board-acs5k.c | |||
@@ -228,4 +228,5 @@ MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board") | |||
228 | .init_irq = ks8695_init_irq, | 228 | .init_irq = ks8695_init_irq, |
229 | .init_machine = acs5k_init, | 229 | .init_machine = acs5k_init, |
230 | .timer = &ks8695_timer, | 230 | .timer = &ks8695_timer, |
231 | .restart = ks8695_restart, | ||
231 | MACHINE_END | 232 | MACHINE_END |
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c index d24bcef2e2dd..e0d36cef2c56 100644 --- a/arch/arm/mach-ks8695/board-dsm320.c +++ b/arch/arm/mach-ks8695/board-dsm320.c | |||
@@ -126,4 +126,5 @@ MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player") | |||
126 | .init_irq = ks8695_init_irq, | 126 | .init_irq = ks8695_init_irq, |
127 | .init_machine = dsm320_init, | 127 | .init_machine = dsm320_init, |
128 | .timer = &ks8695_timer, | 128 | .timer = &ks8695_timer, |
129 | .restart = ks8695_restart, | ||
129 | MACHINE_END | 130 | MACHINE_END |
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c index 16c95657f8fd..a8270725b76d 100644 --- a/arch/arm/mach-ks8695/board-micrel.c +++ b/arch/arm/mach-ks8695/board-micrel.c | |||
@@ -58,4 +58,5 @@ MACHINE_START(KS8695, "KS8695 Centaur Development Board") | |||
58 | .init_irq = ks8695_init_irq, | 58 | .init_irq = ks8695_init_irq, |
59 | .init_machine = micrel_init, | 59 | .init_machine = micrel_init, |
60 | .timer = &ks8695_timer, | 60 | .timer = &ks8695_timer, |
61 | .restart = ks8695_restart, | ||
61 | MACHINE_END | 62 | MACHINE_END |
diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h index 2fbfab8d5fae..f8bdb11a9c33 100644 --- a/arch/arm/mach-ks8695/generic.h +++ b/arch/arm/mach-ks8695/generic.h | |||
@@ -12,4 +12,5 @@ | |||
12 | 12 | ||
13 | extern __init void ks8695_map_io(void); | 13 | extern __init void ks8695_map_io(void); |
14 | extern __init void ks8695_init_irq(void); | 14 | extern __init void ks8695_init_irq(void); |
15 | extern void ks8695_restart(char, const char *); | ||
15 | extern struct sys_timer ks8695_timer; | 16 | extern struct sys_timer ks8695_timer; |
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h index ceb19c90aa52..59fe992395bf 100644 --- a/arch/arm/mach-ks8695/include/mach/system.h +++ b/arch/arm/mach-ks8695/include/mach/system.h | |||
@@ -14,9 +14,6 @@ | |||
14 | #ifndef __ASM_ARCH_SYSTEM_H | 14 | #ifndef __ASM_ARCH_SYSTEM_H |
15 | #define __ASM_ARCH_SYSTEM_H | 15 | #define __ASM_ARCH_SYSTEM_H |
16 | 16 | ||
17 | #include <linux/io.h> | ||
18 | #include <mach/regs-timer.h> | ||
19 | |||
20 | static void arch_idle(void) | 17 | static void arch_idle(void) |
21 | { | 18 | { |
22 | /* | 19 | /* |
@@ -27,22 +24,4 @@ static void arch_idle(void) | |||
27 | 24 | ||
28 | } | 25 | } |
29 | 26 | ||
30 | static void arch_reset(char mode, const char *cmd) | ||
31 | { | ||
32 | unsigned int reg; | ||
33 | |||
34 | if (mode == 's') | ||
35 | soft_restart(0); | ||
36 | |||
37 | /* disable timer0 */ | ||
38 | reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); | ||
39 | __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); | ||
40 | |||
41 | /* enable watchdog mode */ | ||
42 | __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); | ||
43 | |||
44 | /* re-enable timer0 */ | ||
45 | __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); | ||
46 | } | ||
47 | |||
48 | #endif | 27 | #endif |
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index 69c072c2c0f9..37dfcd5bd2ad 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c | |||
@@ -109,3 +109,21 @@ struct sys_timer ks8695_timer = { | |||
109 | .offset = ks8695_gettimeoffset, | 109 | .offset = ks8695_gettimeoffset, |
110 | .resume = ks8695_timer_setup, | 110 | .resume = ks8695_timer_setup, |
111 | }; | 111 | }; |
112 | |||
113 | void ks8695_restart(char mode, const char *cmd) | ||
114 | { | ||
115 | unsigned int reg; | ||
116 | |||
117 | if (mode == 's') | ||
118 | soft_restart(0); | ||
119 | |||
120 | /* disable timer0 */ | ||
121 | reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); | ||
122 | __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); | ||
123 | |||
124 | /* enable watchdog mode */ | ||
125 | __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); | ||
126 | |||
127 | /* re-enable timer0 */ | ||
128 | __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); | ||
129 | } | ||
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index 205b2dbb565b..369b152896cd 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c | |||
@@ -164,7 +164,7 @@ int clk_is_sysclk_mainosc(void) | |||
164 | /* | 164 | /* |
165 | * System reset via the watchdog timer | 165 | * System reset via the watchdog timer |
166 | */ | 166 | */ |
167 | void lpc32xx_watchdog_reset(void) | 167 | static void lpc32xx_watchdog_reset(void) |
168 | { | 168 | { |
169 | /* Make sure WDT clocks are enabled */ | 169 | /* Make sure WDT clocks are enabled */ |
170 | __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN, | 170 | __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN, |
@@ -311,3 +311,21 @@ void __init lpc32xx_map_io(void) | |||
311 | { | 311 | { |
312 | iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc)); | 312 | iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc)); |
313 | } | 313 | } |
314 | |||
315 | void lpc23xx_restart(char mode, const char *cmd) | ||
316 | { | ||
317 | switch (mode) { | ||
318 | case 's': | ||
319 | case 'h': | ||
320 | lpc32xx_watchdog_reset(); | ||
321 | break; | ||
322 | |||
323 | default: | ||
324 | /* Do nothing */ | ||
325 | break; | ||
326 | } | ||
327 | |||
328 | /* Wait for watchdog to reset system */ | ||
329 | while (1) | ||
330 | ; | ||
331 | } | ||
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index 5583f52662bd..4b4e700343c1 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h | |||
@@ -39,6 +39,8 @@ extern void __init lpc32xx_init_irq(void); | |||
39 | extern void __init lpc32xx_map_io(void); | 39 | extern void __init lpc32xx_map_io(void); |
40 | extern void __init lpc32xx_serial_init(void); | 40 | extern void __init lpc32xx_serial_init(void); |
41 | extern void __init lpc32xx_gpio_init(void); | 41 | extern void __init lpc32xx_gpio_init(void); |
42 | extern void lpc23xx_restart(char, const char *); | ||
43 | |||
42 | 44 | ||
43 | /* | 45 | /* |
44 | * Structure used for setting up and querying the PLLS | 46 | * Structure used for setting up and querying the PLLS |
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h index d47f3b1c24b8..bf176c991520 100644 --- a/arch/arm/mach-lpc32xx/include/mach/system.h +++ b/arch/arm/mach-lpc32xx/include/mach/system.h | |||
@@ -24,26 +24,4 @@ static void arch_idle(void) | |||
24 | cpu_do_idle(); | 24 | cpu_do_idle(); |
25 | } | 25 | } |
26 | 26 | ||
27 | static inline void arch_reset(char mode, const char *cmd) | ||
28 | { | ||
29 | extern void lpc32xx_watchdog_reset(void); | ||
30 | |||
31 | switch (mode) { | ||
32 | case 's': | ||
33 | case 'h': | ||
34 | printk(KERN_CRIT "RESET: Rebooting system\n"); | ||
35 | |||
36 | lpc32xx_watchdog_reset(); | ||
37 | break; | ||
38 | |||
39 | default: | ||
40 | /* Do nothing */ | ||
41 | break; | ||
42 | } | ||
43 | |||
44 | /* Wait for watchdog to reset system */ | ||
45 | while (1) | ||
46 | ; | ||
47 | } | ||
48 | |||
49 | #endif | 27 | #endif |
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index 6d2f0d1b9373..ecb94114c81b 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c | |||
@@ -388,4 +388,5 @@ MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller") | |||
388 | .init_irq = lpc32xx_init_irq, | 388 | .init_irq = lpc32xx_init_irq, |
389 | .timer = &lpc32xx_timer, | 389 | .timer = &lpc32xx_timer, |
390 | .init_machine = phy3250_board_init, | 390 | .init_machine = phy3250_board_init, |
391 | .restart = lpc23xx_restart, | ||
391 | MACHINE_END | 392 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index 7a60bbbce7a4..3e6dfab59ef6 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c | |||
@@ -243,6 +243,7 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") | |||
243 | .init_irq = pxa168_init_irq, | 243 | .init_irq = pxa168_init_irq, |
244 | .timer = &pxa168_timer, | 244 | .timer = &pxa168_timer, |
245 | .init_machine = common_init, | 245 | .init_machine = common_init, |
246 | .restart = pxa168_restart, | ||
246 | MACHINE_END | 247 | MACHINE_END |
247 | 248 | ||
248 | MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") | 249 | MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") |
@@ -251,4 +252,5 @@ MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") | |||
251 | .init_irq = pxa168_init_irq, | 252 | .init_irq = pxa168_init_irq, |
252 | .timer = &pxa168_timer, | 253 | .timer = &pxa168_timer, |
253 | .init_machine = common_init, | 254 | .init_machine = common_init, |
255 | .restart = pxa168_restart, | ||
254 | MACHINE_END | 256 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c index 39f0878d64a0..8de3dc6131a4 100644 --- a/arch/arm/mach-mmp/avengers_lite.c +++ b/arch/arm/mach-mmp/avengers_lite.c | |||
@@ -45,4 +45,5 @@ MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") | |||
45 | .init_irq = pxa168_init_irq, | 45 | .init_irq = pxa168_init_irq, |
46 | .timer = &pxa168_timer, | 46 | .timer = &pxa168_timer, |
47 | .init_machine = avengers_lite_init, | 47 | .init_machine = avengers_lite_init, |
48 | .restart = pxa168_restart, | ||
48 | MACHINE_END | 49 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c index 983cfb15fbde..e16f04b39b15 100644 --- a/arch/arm/mach-mmp/brownstone.c +++ b/arch/arm/mach-mmp/brownstone.c | |||
@@ -219,4 +219,5 @@ MACHINE_START(BROWNSTONE, "Brownstone Development Platform") | |||
219 | .init_irq = mmp2_init_irq, | 219 | .init_irq = mmp2_init_irq, |
220 | .timer = &mmp2_timer, | 220 | .timer = &mmp2_timer, |
221 | .init_machine = brownstone_init, | 221 | .init_machine = brownstone_init, |
222 | .restart = mmp_restart, | ||
222 | MACHINE_END | 223 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c index 5720674739f0..062b5b93c50e 100644 --- a/arch/arm/mach-mmp/common.c +++ b/arch/arm/mach-mmp/common.c | |||
@@ -45,3 +45,8 @@ void __init mmp_map_io(void) | |||
45 | /* this is early, initialize mmp_chip_id here */ | 45 | /* this is early, initialize mmp_chip_id here */ |
46 | mmp_chip_id = __raw_readl(MMP_CHIPID); | 46 | mmp_chip_id = __raw_readl(MMP_CHIPID); |
47 | } | 47 | } |
48 | |||
49 | void mmp_restart(char mode, const char *cmd) | ||
50 | { | ||
51 | soft_restart(0); | ||
52 | } | ||
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h index ec8d65ded25c..1c9d6c1ea97a 100644 --- a/arch/arm/mach-mmp/common.h +++ b/arch/arm/mach-mmp/common.h | |||
@@ -6,3 +6,4 @@ extern void timer_init(int irq); | |||
6 | 6 | ||
7 | extern void __init icu_init_irq(void); | 7 | extern void __init icu_init_irq(void); |
8 | extern void __init mmp_map_io(void); | 8 | extern void __init mmp_map_io(void); |
9 | extern void mmp_restart(char, const char *); | ||
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c index c4fd806b15b4..5a6a27a6cfd0 100644 --- a/arch/arm/mach-mmp/flint.c +++ b/arch/arm/mach-mmp/flint.c | |||
@@ -121,4 +121,5 @@ MACHINE_START(FLINT, "Flint Development Platform") | |||
121 | .init_irq = mmp2_init_irq, | 121 | .init_irq = mmp2_init_irq, |
122 | .timer = &mmp2_timer, | 122 | .timer = &mmp2_timer, |
123 | .init_machine = flint_init, | 123 | .init_machine = flint_init, |
124 | .restart = mmp_restart, | ||
124 | MACHINE_END | 125 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c index 4665767a4f79..1e3abbe37cac 100644 --- a/arch/arm/mach-mmp/gplugd.c +++ b/arch/arm/mach-mmp/gplugd.c | |||
@@ -194,4 +194,5 @@ MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform") | |||
194 | .init_irq = pxa168_init_irq, | 194 | .init_irq = pxa168_init_irq, |
195 | .timer = &pxa168_timer, | 195 | .timer = &pxa168_timer, |
196 | .init_machine = gplugd_init, | 196 | .init_machine = gplugd_init, |
197 | .restart = pxa168_restart, | ||
197 | MACHINE_END | 198 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 7fb568d2845b..a677aa732c26 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h | |||
@@ -5,6 +5,7 @@ struct sys_timer; | |||
5 | 5 | ||
6 | extern struct sys_timer pxa168_timer; | 6 | extern struct sys_timer pxa168_timer; |
7 | extern void __init pxa168_init_irq(void); | 7 | extern void __init pxa168_init_irq(void); |
8 | extern void pxa168_restart(char, const char *); | ||
8 | extern void pxa168_clear_keypad_wakeup(void); | 9 | extern void pxa168_clear_keypad_wakeup(void); |
9 | 10 | ||
10 | #include <linux/i2c.h> | 11 | #include <linux/i2c.h> |
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h index cb0637933a85..1d001eab81e1 100644 --- a/arch/arm/mach-mmp/include/mach/system.h +++ b/arch/arm/mach-mmp/include/mach/system.h | |||
@@ -9,18 +9,8 @@ | |||
9 | #ifndef __ASM_MACH_SYSTEM_H | 9 | #ifndef __ASM_MACH_SYSTEM_H |
10 | #define __ASM_MACH_SYSTEM_H | 10 | #define __ASM_MACH_SYSTEM_H |
11 | 11 | ||
12 | #include <mach/cputype.h> | ||
13 | |||
14 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
15 | { | 13 | { |
16 | cpu_do_idle(); | 14 | cpu_do_idle(); |
17 | } | 15 | } |
18 | |||
19 | static inline void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | if (cpu_is_pxa168()) | ||
22 | soft_restart(0xffff0000); | ||
23 | else | ||
24 | soft_restart(0); | ||
25 | } | ||
26 | #endif /* __ASM_MACH_SYSTEM_H */ | 16 | #endif /* __ASM_MACH_SYSTEM_H */ |
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c index 8bfac6612623..96cf5c8fe47d 100644 --- a/arch/arm/mach-mmp/jasper.c +++ b/arch/arm/mach-mmp/jasper.c | |||
@@ -175,4 +175,5 @@ MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") | |||
175 | .init_irq = mmp2_init_irq, | 175 | .init_irq = mmp2_init_irq, |
176 | .timer = &mmp2_timer, | 176 | .timer = &mmp2_timer, |
177 | .init_machine = jasper_init, | 177 | .init_machine = jasper_init, |
178 | .restart = mmp_restart, | ||
178 | MACHINE_END | 179 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 76ca15c00e45..13f23867a86a 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c | |||
@@ -214,3 +214,8 @@ int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata) | |||
214 | pxa168_device_usb_host.dev.platform_data = pdata; | 214 | pxa168_device_usb_host.dev.platform_data = pdata; |
215 | return platform_device_register(&pxa168_device_usb_host); | 215 | return platform_device_register(&pxa168_device_usb_host); |
216 | } | 216 | } |
217 | |||
218 | void pxa168_restart(char mode, const char *cmd) | ||
219 | { | ||
220 | soft_restart(0xffff0000); | ||
221 | } | ||
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c index eb5be879fd8c..257a21283ec1 100644 --- a/arch/arm/mach-mmp/tavorevb.c +++ b/arch/arm/mach-mmp/tavorevb.c | |||
@@ -103,4 +103,5 @@ MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)") | |||
103 | .init_irq = pxa910_init_irq, | 103 | .init_irq = pxa910_init_irq, |
104 | .timer = &pxa910_timer, | 104 | .timer = &pxa910_timer, |
105 | .init_machine = tavorevb_init, | 105 | .init_machine = tavorevb_init, |
106 | .restart = mmp_restart, | ||
106 | MACHINE_END | 107 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c index bbe4727b96cc..8ac22a62bf1a 100644 --- a/arch/arm/mach-mmp/teton_bga.c +++ b/arch/arm/mach-mmp/teton_bga.c | |||
@@ -86,4 +86,5 @@ MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") | |||
86 | .init_irq = pxa168_init_irq, | 86 | .init_irq = pxa168_init_irq, |
87 | .timer = &pxa168_timer, | 87 | .timer = &pxa168_timer, |
88 | .init_machine = teton_bga_init, | 88 | .init_machine = teton_bga_init, |
89 | .restart = pxa168_restart, | ||
89 | MACHINE_END | 90 | MACHINE_END |
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 4e91ee6e27c8..71fc4ee4602c 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c | |||
@@ -25,7 +25,6 @@ | |||
25 | 25 | ||
26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
27 | #include <linux/irq.h> | 27 | #include <linux/irq.h> |
28 | #include <linux/sched.h> | ||
29 | 28 | ||
30 | #include <asm/sched_clock.h> | 29 | #include <asm/sched_clock.h> |
31 | #include <mach/addr-map.h> | 30 | #include <mach/addr-map.h> |
@@ -42,8 +41,6 @@ | |||
42 | #define MAX_DELTA (0xfffffffe) | 41 | #define MAX_DELTA (0xfffffffe) |
43 | #define MIN_DELTA (16) | 42 | #define MIN_DELTA (16) |
44 | 43 | ||
45 | static DEFINE_CLOCK_DATA(cd); | ||
46 | |||
47 | /* | 44 | /* |
48 | * FIXME: the timer needs some delay to stablize the counter capture | 45 | * FIXME: the timer needs some delay to stablize the counter capture |
49 | */ | 46 | */ |
@@ -59,16 +56,9 @@ static inline uint32_t timer_read(void) | |||
59 | return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1)); | 56 | return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1)); |
60 | } | 57 | } |
61 | 58 | ||
62 | unsigned long long notrace sched_clock(void) | 59 | static u32 notrace mmp_read_sched_clock(void) |
63 | { | 60 | { |
64 | u32 cyc = timer_read(); | 61 | return timer_read(); |
65 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
66 | } | ||
67 | |||
68 | static void notrace mmp_update_sched_clock(void) | ||
69 | { | ||
70 | u32 cyc = timer_read(); | ||
71 | update_sched_clock(&cd, cyc, (u32)~0); | ||
72 | } | 62 | } |
73 | 63 | ||
74 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | 64 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
@@ -201,7 +191,7 @@ void __init timer_init(int irq) | |||
201 | { | 191 | { |
202 | timer_config(); | 192 | timer_config(); |
203 | 193 | ||
204 | init_sched_clock(&cd, mmp_update_sched_clock, 32, CLOCK_TICK_RATE); | 194 | setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE); |
205 | 195 | ||
206 | ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift); | 196 | ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift); |
207 | ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt); | 197 | ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt); |
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index 176515a76989..f02658825576 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c | |||
@@ -159,4 +159,5 @@ MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") | |||
159 | .init_irq = pxa910_init_irq, | 159 | .init_irq = pxa910_init_irq, |
160 | .timer = &pxa910_timer, | 160 | .timer = &pxa910_timer, |
161 | .init_machine = ttc_dkb_init, | 161 | .init_machine = ttc_dkb_init, |
162 | .restart = mmp_restart, | ||
162 | MACHINE_END | 163 | MACHINE_END |
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index ebde97f5d5f0..1cd40ad301d3 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig | |||
@@ -13,7 +13,6 @@ config ARCH_MSM7X00A | |||
13 | select CPU_V6 | 13 | select CPU_V6 |
14 | select GPIO_MSM_V1 | 14 | select GPIO_MSM_V1 |
15 | select MSM_PROC_COMM | 15 | select MSM_PROC_COMM |
16 | select HAS_MSM_DEBUG_UART_PHYS | ||
17 | 16 | ||
18 | config ARCH_MSM7X30 | 17 | config ARCH_MSM7X30 |
19 | bool "MSM7x30" | 18 | bool "MSM7x30" |
@@ -25,7 +24,6 @@ config ARCH_MSM7X30 | |||
25 | select MSM_GPIOMUX | 24 | select MSM_GPIOMUX |
26 | select GPIO_MSM_V1 | 25 | select GPIO_MSM_V1 |
27 | select MSM_PROC_COMM | 26 | select MSM_PROC_COMM |
28 | select HAS_MSM_DEBUG_UART_PHYS | ||
29 | 27 | ||
30 | config ARCH_QSD8X50 | 28 | config ARCH_QSD8X50 |
31 | bool "QSD8X50" | 29 | bool "QSD8X50" |
@@ -37,7 +35,6 @@ config ARCH_QSD8X50 | |||
37 | select MSM_GPIOMUX | 35 | select MSM_GPIOMUX |
38 | select GPIO_MSM_V1 | 36 | select GPIO_MSM_V1 |
39 | select MSM_PROC_COMM | 37 | select MSM_PROC_COMM |
40 | select HAS_MSM_DEBUG_UART_PHYS | ||
41 | 38 | ||
42 | config ARCH_MSM8X60 | 39 | config ARCH_MSM8X60 |
43 | bool "MSM8X60" | 40 | bool "MSM8X60" |
@@ -63,19 +60,20 @@ config ARCH_MSM8960 | |||
63 | 60 | ||
64 | endchoice | 61 | endchoice |
65 | 62 | ||
63 | config MSM_HAS_DEBUG_UART_HS | ||
64 | bool | ||
65 | |||
66 | config MSM_SOC_REV_A | 66 | config MSM_SOC_REV_A |
67 | bool | 67 | bool |
68 | config ARCH_MSM_SCORPIONMP | 68 | config ARCH_MSM_SCORPIONMP |
69 | bool | 69 | bool |
70 | select HAVE_SMP | ||
70 | 71 | ||
71 | config ARCH_MSM_ARM11 | 72 | config ARCH_MSM_ARM11 |
72 | bool | 73 | bool |
73 | config ARCH_MSM_SCORPION | 74 | config ARCH_MSM_SCORPION |
74 | bool | 75 | bool |
75 | 76 | ||
76 | config HAS_MSM_DEBUG_UART_PHYS | ||
77 | bool | ||
78 | |||
79 | config MSM_VIC | 77 | config MSM_VIC |
80 | bool | 78 | bool |
81 | 79 | ||
@@ -152,32 +150,6 @@ config MACH_MSM8960_RUMI3 | |||
152 | 150 | ||
153 | endmenu | 151 | endmenu |
154 | 152 | ||
155 | config MSM_DEBUG_UART | ||
156 | int | ||
157 | default 1 if MSM_DEBUG_UART1 | ||
158 | default 2 if MSM_DEBUG_UART2 | ||
159 | default 3 if MSM_DEBUG_UART3 | ||
160 | |||
161 | if HAS_MSM_DEBUG_UART_PHYS | ||
162 | choice | ||
163 | prompt "Debug UART" | ||
164 | |||
165 | default MSM_DEBUG_UART_NONE | ||
166 | |||
167 | config MSM_DEBUG_UART_NONE | ||
168 | bool "None" | ||
169 | |||
170 | config MSM_DEBUG_UART1 | ||
171 | bool "UART1" | ||
172 | |||
173 | config MSM_DEBUG_UART2 | ||
174 | bool "UART2" | ||
175 | |||
176 | config MSM_DEBUG_UART3 | ||
177 | bool "UART3" | ||
178 | endchoice | ||
179 | endif | ||
180 | |||
181 | config MSM_SMD_PKG3 | 153 | config MSM_SMD_PKG3 |
182 | bool | 154 | bool |
183 | 155 | ||
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index 2dc73ccddb11..3ffd8668c9a5 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S | |||
@@ -1,6 +1,7 @@ | |||
1 | /* arch/arm/mach-msm7200/include/mach/debug-macro.S | 1 | /* |
2 | * | 2 | * |
3 | * Copyright (C) 2007 Google, Inc. | 3 | * Copyright (C) 2007 Google, Inc. |
4 | * Copyright (c) 2011, Code Aurora Forum. All rights reserved. | ||
4 | * Author: Brian Swetland <swetland@google.com> | 5 | * Author: Brian Swetland <swetland@google.com> |
5 | * | 6 | * |
6 | * This software is licensed under the terms of the GNU General Public | 7 | * This software is licensed under the terms of the GNU General Public |
@@ -14,40 +15,52 @@ | |||
14 | * | 15 | * |
15 | */ | 16 | */ |
16 | 17 | ||
17 | |||
18 | |||
19 | #include <mach/hardware.h> | 18 | #include <mach/hardware.h> |
20 | #include <mach/msm_iomap.h> | 19 | #include <mach/msm_iomap.h> |
21 | 20 | ||
22 | #if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) | ||
23 | .macro addruart, rp, rv, tmp | 21 | .macro addruart, rp, rv, tmp |
22 | #ifdef MSM_DEBUG_UART_PHYS | ||
24 | ldr \rp, =MSM_DEBUG_UART_PHYS | 23 | ldr \rp, =MSM_DEBUG_UART_PHYS |
25 | ldr \rv, =MSM_DEBUG_UART_BASE | 24 | ldr \rv, =MSM_DEBUG_UART_BASE |
25 | #endif | ||
26 | .endm | 26 | .endm |
27 | 27 | ||
28 | .macro senduart,rd,rx | 28 | .macro senduart, rd, rx |
29 | #ifdef CONFIG_MSM_HAS_DEBUG_UART_HS | ||
30 | @ Write the 1 character to UARTDM_TF | ||
31 | str \rd, [\rx, #0x70] | ||
32 | #else | ||
29 | teq \rx, #0 | 33 | teq \rx, #0 |
30 | strne \rd, [\rx, #0x0C] | 34 | strne \rd, [\rx, #0x0C] |
35 | #endif | ||
31 | .endm | 36 | .endm |
32 | 37 | ||
33 | .macro waituart,rd,rx | 38 | .macro waituart, rd, rx |
39 | #ifdef CONFIG_MSM_HAS_DEBUG_UART_HS | ||
40 | @ check for TX_EMT in UARTDM_SR | ||
41 | ldr \rd, [\rx, #0x08] | ||
42 | tst \rd, #0x08 | ||
43 | bne 1002f | ||
44 | @ wait for TXREADY in UARTDM_ISR | ||
45 | 1001: ldr \rd, [\rx, #0x14] | ||
46 | tst \rd, #0x80 | ||
47 | beq 1001b | ||
48 | 1002: | ||
49 | @ Clear TX_READY by writing to the UARTDM_CR register | ||
50 | mov \rd, #0x300 | ||
51 | str \rd, [\rx, #0x10] | ||
52 | @ Write 0x1 to NCF register | ||
53 | mov \rd, #0x1 | ||
54 | str \rd, [\rx, #0x40] | ||
55 | @ UARTDM reg. Read to induce delay | ||
56 | ldr \rd, [\rx, #0x08] | ||
57 | #else | ||
34 | @ wait for TX_READY | 58 | @ wait for TX_READY |
35 | 1001: ldr \rd, [\rx, #0x08] | 59 | 1001: ldr \rd, [\rx, #0x08] |
36 | tst \rd, #0x04 | 60 | tst \rd, #0x04 |
37 | beq 1001b | 61 | beq 1001b |
38 | .endm | ||
39 | #else | ||
40 | .macro addruart, rp, rv, tmp | ||
41 | mov \rv, #0xff000000 | ||
42 | orr \rv, \rv, #0x00f00000 | ||
43 | .endm | ||
44 | |||
45 | .macro senduart,rd,rx | ||
46 | .endm | ||
47 | |||
48 | .macro waituart,rd,rx | ||
49 | .endm | ||
50 | #endif | 62 | #endif |
63 | .endm | ||
51 | 64 | ||
52 | .macro busyuart,rd,rx | 65 | .macro busyuart, rd, rx |
53 | .endm | 66 | .endm |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h index 94fe9fe6feb3..8af46123dab6 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h | |||
@@ -78,18 +78,6 @@ | |||
78 | #define MSM_UART3_PHYS 0xA9C00000 | 78 | #define MSM_UART3_PHYS 0xA9C00000 |
79 | #define MSM_UART3_SIZE SZ_4K | 79 | #define MSM_UART3_SIZE SZ_4K |
80 | 80 | ||
81 | #ifdef CONFIG_MSM_DEBUG_UART | ||
82 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
83 | #if CONFIG_MSM_DEBUG_UART == 1 | ||
84 | #define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS | ||
85 | #elif CONFIG_MSM_DEBUG_UART == 2 | ||
86 | #define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS | ||
87 | #elif CONFIG_MSM_DEBUG_UART == 3 | ||
88 | #define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS | ||
89 | #endif | ||
90 | #define MSM_DEBUG_UART_SIZE SZ_4K | ||
91 | #endif | ||
92 | |||
93 | #define MSM_SDC1_PHYS 0xA0400000 | 81 | #define MSM_SDC1_PHYS 0xA0400000 |
94 | #define MSM_SDC1_SIZE SZ_4K | 82 | #define MSM_SDC1_SIZE SZ_4K |
95 | 83 | ||
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h index 37694442d1bd..198202c267c8 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h | |||
@@ -89,18 +89,6 @@ | |||
89 | #define MSM_UART3_PHYS 0xACC00000 | 89 | #define MSM_UART3_PHYS 0xACC00000 |
90 | #define MSM_UART3_SIZE SZ_4K | 90 | #define MSM_UART3_SIZE SZ_4K |
91 | 91 | ||
92 | #ifdef CONFIG_MSM_DEBUG_UART | ||
93 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
94 | #if CONFIG_MSM_DEBUG_UART == 1 | ||
95 | #define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS | ||
96 | #elif CONFIG_MSM_DEBUG_UART == 2 | ||
97 | #define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS | ||
98 | #elif CONFIG_MSM_DEBUG_UART == 3 | ||
99 | #define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS | ||
100 | #endif | ||
101 | #define MSM_DEBUG_UART_SIZE SZ_4K | ||
102 | #endif | ||
103 | |||
104 | #define MSM_MDC_BASE IOMEM(0xE0200000) | 92 | #define MSM_MDC_BASE IOMEM(0xE0200000) |
105 | #define MSM_MDC_PHYS 0xAA500000 | 93 | #define MSM_MDC_PHYS 0xAA500000 |
106 | #define MSM_MDC_SIZE SZ_1M | 94 | #define MSM_MDC_SIZE SZ_1M |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h index 3c9d9602a318..800b55767e6b 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h | |||
@@ -45,4 +45,9 @@ | |||
45 | #define MSM8960_TMR0_PHYS 0x0208A000 | 45 | #define MSM8960_TMR0_PHYS 0x0208A000 |
46 | #define MSM8960_TMR0_SIZE SZ_4K | 46 | #define MSM8960_TMR0_SIZE SZ_4K |
47 | 47 | ||
48 | #ifdef CONFIG_DEBUG_MSM8960_UART | ||
49 | #define MSM_DEBUG_UART_BASE 0xE1040000 | ||
50 | #define MSM_DEBUG_UART_PHYS 0x16440000 | ||
51 | #endif | ||
52 | |||
48 | #endif | 53 | #endif |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index d67cd73316f4..0faa894729b7 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | |||
@@ -83,18 +83,6 @@ | |||
83 | #define MSM_UART3_PHYS 0xA9C00000 | 83 | #define MSM_UART3_PHYS 0xA9C00000 |
84 | #define MSM_UART3_SIZE SZ_4K | 84 | #define MSM_UART3_SIZE SZ_4K |
85 | 85 | ||
86 | #ifdef CONFIG_MSM_DEBUG_UART | ||
87 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
88 | #if CONFIG_MSM_DEBUG_UART == 1 | ||
89 | #define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS | ||
90 | #elif CONFIG_MSM_DEBUG_UART == 2 | ||
91 | #define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS | ||
92 | #elif CONFIG_MSM_DEBUG_UART == 3 | ||
93 | #define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS | ||
94 | #endif | ||
95 | #define MSM_DEBUG_UART_SIZE SZ_4K | ||
96 | #endif | ||
97 | |||
98 | #define MSM_MDC_BASE IOMEM(0xE0200000) | 86 | #define MSM_MDC_BASE IOMEM(0xE0200000) |
99 | #define MSM_MDC_PHYS 0xAA500000 | 87 | #define MSM_MDC_PHYS 0xAA500000 |
100 | #define MSM_MDC_SIZE SZ_1M | 88 | #define MSM_MDC_SIZE SZ_1M |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h index 3b19b8f244b8..54e12caa8d86 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | |||
@@ -62,4 +62,9 @@ | |||
62 | #define MSM8X60_TMR0_PHYS 0x02040000 | 62 | #define MSM8X60_TMR0_PHYS 0x02040000 |
63 | #define MSM8X60_TMR0_SIZE SZ_4K | 63 | #define MSM8X60_TMR0_SIZE SZ_4K |
64 | 64 | ||
65 | #ifdef CONFIG_DEBUG_MSM8660_UART | ||
66 | #define MSM_DEBUG_UART_BASE 0xE1040000 | ||
67 | #define MSM_DEBUG_UART_PHYS 0x19C40000 | ||
68 | #endif | ||
69 | |||
65 | #endif | 70 | #endif |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h index 4ded15238b60..90682f4599d3 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap.h | |||
@@ -55,6 +55,18 @@ | |||
55 | 55 | ||
56 | #include "msm_iomap-8960.h" | 56 | #include "msm_iomap-8960.h" |
57 | 57 | ||
58 | #define MSM_DEBUG_UART_SIZE SZ_4K | ||
59 | #if defined(CONFIG_DEBUG_MSM_UART1) | ||
60 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
61 | #define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS | ||
62 | #elif defined(CONFIG_DEBUG_MSM_UART2) | ||
63 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
64 | #define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS | ||
65 | #elif defined(CONFIG_DEBUG_MSM_UART3) | ||
66 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
67 | #define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS | ||
68 | #endif | ||
69 | |||
58 | /* Virtual addresses shared across all MSM targets. */ | 70 | /* Virtual addresses shared across all MSM targets. */ |
59 | #define MSM_CSR_BASE IOMEM(0xE0001000) | 71 | #define MSM_CSR_BASE IOMEM(0xE0001000) |
60 | #define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) | 72 | #define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) |
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h index d2e83f42ba16..311db2b35da0 100644 --- a/arch/arm/mach-msm/include/mach/system.h +++ b/arch/arm/mach-msm/include/mach/system.h | |||
@@ -12,16 +12,8 @@ | |||
12 | * GNU General Public License for more details. | 12 | * GNU General Public License for more details. |
13 | * | 13 | * |
14 | */ | 14 | */ |
15 | |||
16 | #include <mach/hardware.h> | ||
17 | |||
18 | void arch_idle(void); | 15 | void arch_idle(void); |
19 | 16 | ||
20 | static inline void arch_reset(char mode, const char *cmd) | ||
21 | { | ||
22 | for (;;) ; /* depends on IPC w/ other core */ | ||
23 | } | ||
24 | |||
25 | /* low level hardware reset hook -- for example, hitting the | 17 | /* low level hardware reset hook -- for example, hitting the |
26 | * PSHOLD line on the PMIC to hard reset the system | 18 | * PSHOLD line on the PMIC to hard reset the system |
27 | */ | 19 | */ |
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h index d94292c29d8e..169a84007456 100644 --- a/arch/arm/mach-msm/include/mach/uncompress.h +++ b/arch/arm/mach-msm/include/mach/uncompress.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* arch/arm/mach-msm/include/mach/uncompress.h | 1 | /* |
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | 2 | * Copyright (C) 2007 Google, Inc. |
3 | * Copyright (c) 2011, Code Aurora Forum. All rights reserved. | ||
4 | * | 4 | * |
5 | * This software is licensed under the terms of the GNU General Public | 5 | * This software is licensed under the terms of the GNU General Public |
6 | * License version 2, as published by the Free Software Foundation, and | 6 | * License version 2, as published by the Free Software Foundation, and |
@@ -14,17 +14,40 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H | 16 | #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H |
17 | #define __ASM_ARCH_MSM_UNCOMPRESS_H | ||
18 | |||
19 | #include <asm/processor.h> | ||
20 | #include <mach/msm_iomap.h> | ||
21 | |||
22 | #define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)) | ||
23 | #define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c)) | ||
17 | 24 | ||
18 | #include "hardware.h" | 25 | #define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))) |
19 | #include "linux/io.h" | 26 | #define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10))) |
20 | #include "mach/msm_iomap.h" | 27 | #define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14))) |
28 | #define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40))) | ||
29 | #define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70))) | ||
21 | 30 | ||
22 | static void putc(int c) | 31 | static void putc(int c) |
23 | { | 32 | { |
24 | #if defined(MSM_DEBUG_UART_PHYS) | 33 | #if defined(MSM_DEBUG_UART_PHYS) |
25 | unsigned base = MSM_DEBUG_UART_PHYS; | 34 | #ifdef CONFIG_MSM_HAS_DEBUG_UART_HS |
26 | while (!(readl(base + 0x08) & 0x04)) ; | 35 | /* |
27 | writel(c, base + 0x0c); | 36 | * Wait for TX_READY to be set; but skip it if we have a |
37 | * TX underrun. | ||
38 | */ | ||
39 | if (UART_DM_SR & 0x08) | ||
40 | while (!(UART_DM_ISR & 0x80)) | ||
41 | cpu_relax(); | ||
42 | |||
43 | UART_DM_CR = 0x300; | ||
44 | UART_DM_NCHAR = 0x1; | ||
45 | UART_DM_TF = c; | ||
46 | #else | ||
47 | while (!(UART_CSR & 0x04)) | ||
48 | cpu_relax(); | ||
49 | UART_TF = c; | ||
50 | #endif | ||
28 | #endif | 51 | #endif |
29 | } | 52 | } |
30 | 53 | ||
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 8759ecf7454f..578b04e42deb 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c | |||
@@ -47,7 +47,8 @@ static struct map_desc msm_io_desc[] __initdata = { | |||
47 | MSM_CHIP_DEVICE(GPIO1, MSM7X00), | 47 | MSM_CHIP_DEVICE(GPIO1, MSM7X00), |
48 | MSM_CHIP_DEVICE(GPIO2, MSM7X00), | 48 | MSM_CHIP_DEVICE(GPIO2, MSM7X00), |
49 | MSM_DEVICE(CLK_CTL), | 49 | MSM_DEVICE(CLK_CTL), |
50 | #ifdef CONFIG_MSM_DEBUG_UART | 50 | #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ |
51 | defined(CONFIG_DEBUG_MSM_UART3) | ||
51 | MSM_DEVICE(DEBUG_UART), | 52 | MSM_DEVICE(DEBUG_UART), |
52 | #endif | 53 | #endif |
53 | #ifdef CONFIG_ARCH_MSM7X30 | 54 | #ifdef CONFIG_ARCH_MSM7X30 |
@@ -84,7 +85,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = { | |||
84 | MSM_DEVICE(SCPLL), | 85 | MSM_DEVICE(SCPLL), |
85 | MSM_DEVICE(AD5), | 86 | MSM_DEVICE(AD5), |
86 | MSM_DEVICE(MDC), | 87 | MSM_DEVICE(MDC), |
87 | #ifdef CONFIG_MSM_DEBUG_UART | 88 | #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ |
89 | defined(CONFIG_DEBUG_MSM_UART3) | ||
88 | MSM_DEVICE(DEBUG_UART), | 90 | MSM_DEVICE(DEBUG_UART), |
89 | #endif | 91 | #endif |
90 | { | 92 | { |
@@ -109,6 +111,9 @@ static struct map_desc msm8x60_io_desc[] __initdata = { | |||
109 | MSM_CHIP_DEVICE(TMR0, MSM8X60), | 111 | MSM_CHIP_DEVICE(TMR0, MSM8X60), |
110 | MSM_DEVICE(ACC), | 112 | MSM_DEVICE(ACC), |
111 | MSM_DEVICE(GCC), | 113 | MSM_DEVICE(GCC), |
114 | #ifdef CONFIG_DEBUG_MSM8660_UART | ||
115 | MSM_DEVICE(DEBUG_UART), | ||
116 | #endif | ||
112 | }; | 117 | }; |
113 | 118 | ||
114 | void __init msm_map_msm8x60_io(void) | 119 | void __init msm_map_msm8x60_io(void) |
@@ -123,6 +128,9 @@ static struct map_desc msm8960_io_desc[] __initdata = { | |||
123 | MSM_CHIP_DEVICE(QGIC_CPU, MSM8960), | 128 | MSM_CHIP_DEVICE(QGIC_CPU, MSM8960), |
124 | MSM_CHIP_DEVICE(TMR, MSM8960), | 129 | MSM_CHIP_DEVICE(TMR, MSM8960), |
125 | MSM_CHIP_DEVICE(TMR0, MSM8960), | 130 | MSM_CHIP_DEVICE(TMR0, MSM8960), |
131 | #ifdef CONFIG_DEBUG_MSM8960_UART | ||
132 | MSM_DEVICE(DEBUG_UART), | ||
133 | #endif | ||
126 | }; | 134 | }; |
127 | 135 | ||
128 | void __init msm_map_msm8960_io(void) | 136 | void __init msm_map_msm8960_io(void) |
@@ -146,7 +154,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = { | |||
146 | MSM_DEVICE(SAW), | 154 | MSM_DEVICE(SAW), |
147 | MSM_DEVICE(GCC), | 155 | MSM_DEVICE(GCC), |
148 | MSM_DEVICE(TCSR), | 156 | MSM_DEVICE(TCSR), |
149 | #ifdef CONFIG_MSM_DEBUG_UART | 157 | #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ |
158 | defined(CONFIG_DEBUG_MSM_UART3) | ||
150 | MSM_DEVICE(DEBUG_UART), | 159 | MSM_DEVICE(DEBUG_UART), |
151 | #endif | 160 | #endif |
152 | { | 161 | { |
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index fdec58aaa35c..0b3e357c4c8c 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c | |||
@@ -79,7 +79,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu) | |||
79 | ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), | 79 | ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), |
80 | SCM_FLAG_COLDBOOT_CPU1); | 80 | SCM_FLAG_COLDBOOT_CPU1); |
81 | if (ret == 0) { | 81 | if (ret == 0) { |
82 | void *sc1_base_ptr; | 82 | void __iomem *sc1_base_ptr; |
83 | sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); | 83 | sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); |
84 | if (sc1_base_ptr) { | 84 | if (sc1_base_ptr) { |
85 | writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); | 85 | writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); |
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c index 0e94268d6e6f..ee74ec97c141 100644 --- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c +++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c | |||
@@ -151,4 +151,5 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL") | |||
151 | .init_early = mv78xx0_init_early, | 151 | .init_early = mv78xx0_init_early, |
152 | .init_irq = mv78xx0_init_irq, | 152 | .init_irq = mv78xx0_init_irq, |
153 | .timer = &mv78xx0_timer, | 153 | .timer = &mv78xx0_timer, |
154 | .restart = mv78xx0_restart, | ||
154 | MACHINE_END | 155 | MACHINE_END |
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index 23d3980ef59d..5b9632b01169 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c | |||
@@ -401,3 +401,19 @@ void __init mv78xx0_init(void) | |||
401 | feroceon_l2_init(is_l2_writethrough()); | 401 | feroceon_l2_init(is_l2_writethrough()); |
402 | #endif | 402 | #endif |
403 | } | 403 | } |
404 | |||
405 | void mv78xx0_restart(char mode, const char *cmd) | ||
406 | { | ||
407 | /* | ||
408 | * Enable soft reset to assert RSTOUTn. | ||
409 | */ | ||
410 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
411 | |||
412 | /* | ||
413 | * Assert soft reset. | ||
414 | */ | ||
415 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
416 | |||
417 | while (1) | ||
418 | ; | ||
419 | } | ||
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h index 632e63d65e7a..07d5f8f6be7d 100644 --- a/arch/arm/mach-mv78xx0/common.h +++ b/arch/arm/mach-mv78xx0/common.h | |||
@@ -46,6 +46,7 @@ void mv78xx0_uart1_init(void); | |||
46 | void mv78xx0_uart2_init(void); | 46 | void mv78xx0_uart2_init(void); |
47 | void mv78xx0_uart3_init(void); | 47 | void mv78xx0_uart3_init(void); |
48 | void mv78xx0_i2c_init(void); | 48 | void mv78xx0_i2c_init(void); |
49 | void mv78xx0_restart(char, const char *); | ||
49 | 50 | ||
50 | extern struct sys_timer mv78xx0_timer; | 51 | extern struct sys_timer mv78xx0_timer; |
51 | 52 | ||
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c index 50b85ae2da52..4d6d48bf51ef 100644 --- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c | |||
@@ -99,4 +99,5 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board") | |||
99 | .init_early = mv78xx0_init_early, | 99 | .init_early = mv78xx0_init_early, |
100 | .init_irq = mv78xx0_init_irq, | 100 | .init_irq = mv78xx0_init_irq, |
101 | .timer = &mv78xx0_timer, | 101 | .timer = &mv78xx0_timer, |
102 | .restart = mv78xx0_restart, | ||
102 | MACHINE_END | 103 | MACHINE_END |
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h index 66e7ce4e90bd..8c3a5387cec7 100644 --- a/arch/arm/mach-mv78xx0/include/mach/system.h +++ b/arch/arm/mach-mv78xx0/include/mach/system.h | |||
@@ -9,28 +9,9 @@ | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | 9 | #ifndef __ASM_ARCH_SYSTEM_H |
10 | #define __ASM_ARCH_SYSTEM_H | 10 | #define __ASM_ARCH_SYSTEM_H |
11 | 11 | ||
12 | #include <mach/bridge-regs.h> | ||
13 | |||
14 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
15 | { | 13 | { |
16 | cpu_do_idle(); | 14 | cpu_do_idle(); |
17 | } | 15 | } |
18 | 16 | ||
19 | static inline void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | /* | ||
22 | * Enable soft reset to assert RSTOUTn. | ||
23 | */ | ||
24 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
25 | |||
26 | /* | ||
27 | * Assert soft reset. | ||
28 | */ | ||
29 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
30 | |||
31 | while (1) | ||
32 | ; | ||
33 | } | ||
34 | |||
35 | |||
36 | #endif | 17 | #endif |
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c index e85222e53578..9a882706e138 100644 --- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c | |||
@@ -84,4 +84,5 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") | |||
84 | .init_early = mv78xx0_init_early, | 84 | .init_early = mv78xx0_init_early, |
85 | .init_irq = mv78xx0_init_irq, | 85 | .init_irq = mv78xx0_init_irq, |
86 | .timer = &mv78xx0_timer, | 86 | .timer = &mv78xx0_timer, |
87 | .restart = mv78xx0_restart, | ||
87 | MACHINE_END | 88 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 1fc110348040..944025da8333 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c | |||
@@ -297,4 +297,5 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module") | |||
297 | .handle_irq = imx51_handle_irq, | 297 | .handle_irq = imx51_handle_irq, |
298 | .timer = &mxc_timer, | 298 | .timer = &mxc_timer, |
299 | .init_machine = eukrea_cpuimx51_init, | 299 | .init_machine = eukrea_cpuimx51_init, |
300 | .restart = mxc_restart, | ||
300 | MACHINE_END | 301 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c index 52a11c1898e6..9fbe923c8b08 100644 --- a/arch/arm/mach-mx5/board-cpuimx51sd.c +++ b/arch/arm/mach-mx5/board-cpuimx51sd.c | |||
@@ -335,4 +335,5 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD") | |||
335 | .handle_irq = imx51_handle_irq, | 335 | .handle_irq = imx51_handle_irq, |
336 | .timer = &mxc_timer, | 336 | .timer = &mxc_timer, |
337 | .init_machine = eukrea_cpuimx51sd_init, | 337 | .init_machine = eukrea_cpuimx51sd_init, |
338 | .restart = mxc_restart, | ||
338 | MACHINE_END | 339 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c index fc3621d90bde..42b66e8d9615 100644 --- a/arch/arm/mach-mx5/board-mx50_rdp.c +++ b/arch/arm/mach-mx5/board-mx50_rdp.c | |||
@@ -222,4 +222,5 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform") | |||
222 | .handle_irq = imx50_handle_irq, | 222 | .handle_irq = imx50_handle_irq, |
223 | .timer = &mx50_rdp_timer, | 223 | .timer = &mx50_rdp_timer, |
224 | .init_machine = mx50_rdp_board_init, | 224 | .init_machine = mx50_rdp_board_init, |
225 | .restart = mxc_restart, | ||
225 | MACHINE_END | 226 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index 05783906db2b..83eab4176ca4 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c | |||
@@ -175,4 +175,5 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board") | |||
175 | .handle_irq = imx51_handle_irq, | 175 | .handle_irq = imx51_handle_irq, |
176 | .timer = &mx51_3ds_timer, | 176 | .timer = &mx51_3ds_timer, |
177 | .init_machine = mx51_3ds_init, | 177 | .init_machine = mx51_3ds_init, |
178 | .restart = mxc_restart, | ||
178 | MACHINE_END | 179 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 24994bb52147..e4b822e9f719 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c | |||
@@ -426,4 +426,5 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board") | |||
426 | .handle_irq = imx51_handle_irq, | 426 | .handle_irq = imx51_handle_irq, |
427 | .timer = &mx51_babbage_timer, | 427 | .timer = &mx51_babbage_timer, |
428 | .init_machine = mx51_babbage_init, | 428 | .init_machine = mx51_babbage_init, |
429 | .restart = mxc_restart, | ||
429 | MACHINE_END | 430 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index a9e48662cf75..3a5ed2dd885a 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c | |||
@@ -182,7 +182,7 @@ static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initcon | |||
182 | .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey), | 182 | .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey), |
183 | }; | 183 | }; |
184 | 184 | ||
185 | void mx51_efikamx_reset(void) | 185 | static void mx51_efikamx_restart(char mode, const char *cmd) |
186 | { | 186 | { |
187 | if (system_rev == 0x11) | 187 | if (system_rev == 0x11) |
188 | gpio_direction_output(EFIKAMX_RESET1_1, 0); | 188 | gpio_direction_output(EFIKAMX_RESET1_1, 0); |
@@ -292,4 +292,5 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop") | |||
292 | .handle_irq = imx51_handle_irq, | 292 | .handle_irq = imx51_handle_irq, |
293 | .timer = &mx51_efikamx_timer, | 293 | .timer = &mx51_efikamx_timer, |
294 | .init_machine = mx51_efikamx_init, | 294 | .init_machine = mx51_efikamx_init, |
295 | .restart = mx51_efikamx_restart, | ||
295 | MACHINE_END | 296 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c index 38c4a3e28d3c..ea5f65b0381a 100644 --- a/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/arch/arm/mach-mx5/board-mx51_efikasb.c | |||
@@ -287,4 +287,5 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook") | |||
287 | .handle_irq = imx51_handle_irq, | 287 | .handle_irq = imx51_handle_irq, |
288 | .init_machine = efikasb_board_init, | 288 | .init_machine = efikasb_board_init, |
289 | .timer = &mx51_efikasb_timer, | 289 | .timer = &mx51_efikasb_timer, |
290 | .restart = mxc_restart, | ||
290 | MACHINE_END | 291 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 0d7f0fffb23a..5f224f1c3eb6 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c | |||
@@ -257,4 +257,5 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board") | |||
257 | .handle_irq = imx53_handle_irq, | 257 | .handle_irq = imx53_handle_irq, |
258 | .timer = &mx53_ard_timer, | 258 | .timer = &mx53_ard_timer, |
259 | .init_machine = mx53_ard_board_init, | 259 | .init_machine = mx53_ard_board_init, |
260 | .restart = mxc_restart, | ||
260 | MACHINE_END | 261 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index 64bbfcea6f35..d6ce137896d6 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c | |||
@@ -175,4 +175,5 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board") | |||
175 | .handle_irq = imx53_handle_irq, | 175 | .handle_irq = imx53_handle_irq, |
176 | .timer = &mx53_evk_timer, | 176 | .timer = &mx53_evk_timer, |
177 | .init_machine = mx53_evk_board_init, | 177 | .init_machine = mx53_evk_board_init, |
178 | .restart = mxc_restart, | ||
178 | MACHINE_END | 179 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 237bdecd9331..fd8b524e1c58 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c | |||
@@ -317,4 +317,5 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board") | |||
317 | .handle_irq = imx53_handle_irq, | 317 | .handle_irq = imx53_handle_irq, |
318 | .timer = &mx53_loco_timer, | 318 | .timer = &mx53_loco_timer, |
319 | .init_machine = mx53_loco_board_init, | 319 | .init_machine = mx53_loco_board_init, |
320 | .restart = mxc_restart, | ||
320 | MACHINE_END | 321 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c index d42132a80e8f..22c53c9b18aa 100644 --- a/arch/arm/mach-mx5/board-mx53_smd.c +++ b/arch/arm/mach-mx5/board-mx53_smd.c | |||
@@ -164,4 +164,5 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board") | |||
164 | .handle_irq = imx53_handle_irq, | 164 | .handle_irq = imx53_handle_irq, |
165 | .timer = &mx53_smd_timer, | 165 | .timer = &mx53_smd_timer, |
166 | .init_machine = mx53_smd_board_init, | 166 | .init_machine = mx53_smd_board_init, |
167 | .restart = mxc_restart, | ||
167 | MACHINE_END | 168 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c index 596edd967dbf..e6bad17b908c 100644 --- a/arch/arm/mach-mx5/imx51-dt.c +++ b/arch/arm/mach-mx5/imx51-dt.c | |||
@@ -115,4 +115,5 @@ DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)") | |||
115 | .timer = &imx51_timer, | 115 | .timer = &imx51_timer, |
116 | .init_machine = imx51_dt_init, | 116 | .init_machine = imx51_dt_init, |
117 | .dt_compat = imx51_dt_board_compat, | 117 | .dt_compat = imx51_dt_board_compat, |
118 | .restart = mxc_restart, | ||
118 | MACHINE_END | 119 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c index 85bfd5ff21b0..05ebb3e68679 100644 --- a/arch/arm/mach-mx5/imx53-dt.c +++ b/arch/arm/mach-mx5/imx53-dt.c | |||
@@ -125,4 +125,5 @@ DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") | |||
125 | .timer = &imx53_timer, | 125 | .timer = &imx53_timer, |
126 | .init_machine = imx53_dt_init, | 126 | .init_machine = imx53_dt_init, |
127 | .dt_compat = imx53_dt_board_compat, | 127 | .dt_compat = imx53_dt_board_compat, |
128 | .restart = mxc_restart, | ||
128 | MACHINE_END | 129 | MACHINE_END |
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index 635bb5d9a20a..1388485414c9 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h | |||
@@ -16,6 +16,7 @@ struct clk; | |||
16 | extern const u32 *mxs_get_ocotp(void); | 16 | extern const u32 *mxs_get_ocotp(void); |
17 | extern int mxs_reset_block(void __iomem *); | 17 | extern int mxs_reset_block(void __iomem *); |
18 | extern void mxs_timer_init(struct clk *, int); | 18 | extern void mxs_timer_init(struct clk *, int); |
19 | extern void mxs_restart(char, const char *); | ||
19 | 20 | ||
20 | extern int mx23_register_gpios(void); | 21 | extern int mx23_register_gpios(void); |
21 | extern int mx23_clocks_init(void); | 22 | extern int mx23_clocks_init(void); |
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h index 0e428239b433..e7ad1bb29423 100644 --- a/arch/arm/mach-mxs/include/mach/system.h +++ b/arch/arm/mach-mxs/include/mach/system.h | |||
@@ -22,6 +22,4 @@ static inline void arch_idle(void) | |||
22 | cpu_do_idle(); | 22 | cpu_do_idle(); |
23 | } | 23 | } |
24 | 24 | ||
25 | void arch_reset(char mode, const char *cmd); | ||
26 | |||
27 | #endif /* __MACH_MXS_SYSTEM_H__ */ | 25 | #endif /* __MACH_MXS_SYSTEM_H__ */ |
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c index 6b00577b7025..2f2758230edf 100644 --- a/arch/arm/mach-mxs/mach-m28evk.c +++ b/arch/arm/mach-mxs/mach-m28evk.c | |||
@@ -363,4 +363,5 @@ MACHINE_START(M28EVK, "DENX M28 EVK") | |||
363 | .init_irq = mx28_init_irq, | 363 | .init_irq = mx28_init_irq, |
364 | .timer = &m28evk_timer, | 364 | .timer = &m28evk_timer, |
365 | .init_machine = m28evk_init, | 365 | .init_machine = m28evk_init, |
366 | .restart = mxs_restart, | ||
366 | MACHINE_END | 367 | MACHINE_END |
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c index c325fbe4e4c6..5ea1c57d2606 100644 --- a/arch/arm/mach-mxs/mach-mx23evk.c +++ b/arch/arm/mach-mxs/mach-mx23evk.c | |||
@@ -184,4 +184,5 @@ MACHINE_START(MX23EVK, "Freescale MX23 EVK") | |||
184 | .init_irq = mx23_init_irq, | 184 | .init_irq = mx23_init_irq, |
185 | .timer = &mx23evk_timer, | 185 | .timer = &mx23evk_timer, |
186 | .init_machine = mx23evk_init, | 186 | .init_machine = mx23evk_init, |
187 | .restart = mxs_restart, | ||
187 | MACHINE_END | 188 | MACHINE_END |
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index 064ec5abaa55..d0cc37fd23a4 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c | |||
@@ -501,4 +501,5 @@ MACHINE_START(MX28EVK, "Freescale MX28 EVK") | |||
501 | .init_irq = mx28_init_irq, | 501 | .init_irq = mx28_init_irq, |
502 | .timer = &mx28evk_timer, | 502 | .timer = &mx28evk_timer, |
503 | .init_machine = mx28evk_init, | 503 | .init_machine = mx28evk_init, |
504 | .restart = mxs_restart, | ||
504 | MACHINE_END | 505 | MACHINE_END |
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c index 6834dea38c04..a626c07b8713 100644 --- a/arch/arm/mach-mxs/mach-stmp378x_devb.c +++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c | |||
@@ -117,4 +117,5 @@ MACHINE_START(STMP378X, "STMP378X") | |||
117 | .init_irq = mx23_init_irq, | 117 | .init_irq = mx23_init_irq, |
118 | .timer = &stmp378x_dvb_timer, | 118 | .timer = &stmp378x_dvb_timer, |
119 | .init_machine = stmp378x_dvb_init, | 119 | .init_machine = stmp378x_dvb_init, |
120 | .restart = mxs_restart, | ||
120 | MACHINE_END | 121 | MACHINE_END |
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index 9a1f0e7a338e..2c0862e655ee 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c | |||
@@ -178,4 +178,5 @@ MACHINE_START(TX28, "Ka-Ro electronics TX28 module") | |||
178 | .init_irq = mx28_init_irq, | 178 | .init_irq = mx28_init_irq, |
179 | .timer = &tx28_timer, | 179 | .timer = &tx28_timer, |
180 | .init_machine = tx28_stk5v3_init, | 180 | .init_machine = tx28_stk5v3_init, |
181 | .restart = mxs_restart, | ||
181 | MACHINE_END | 182 | MACHINE_END |
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c index cab88364e7c1..b936633b7682 100644 --- a/arch/arm/mach-mxs/system.c +++ b/arch/arm/mach-mxs/system.c | |||
@@ -42,7 +42,7 @@ static void __iomem *mxs_clkctrl_reset_addr; | |||
42 | /* | 42 | /* |
43 | * Reset the system. It is called by machine_restart(). | 43 | * Reset the system. It is called by machine_restart(). |
44 | */ | 44 | */ |
45 | void arch_reset(char mode, const char *cmd) | 45 | void mxs_restart(char mode, const char *cmd) |
46 | { | 46 | { |
47 | /* reset the chip */ | 47 | /* reset the chip */ |
48 | __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr); | 48 | __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr); |
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 00023b5cf12b..59e67979f197 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c | |||
@@ -187,3 +187,8 @@ static int __init netx_init(void) | |||
187 | 187 | ||
188 | subsys_initcall(netx_init); | 188 | subsys_initcall(netx_init); |
189 | 189 | ||
190 | void netx_restart(char mode, const char *cmd) | ||
191 | { | ||
192 | writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES, | ||
193 | NETX_SYSTEM_RES_CR); | ||
194 | } | ||
diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h index ede2d35341c3..9b915119b8d6 100644 --- a/arch/arm/mach-netx/generic.h +++ b/arch/arm/mach-netx/generic.h | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | extern void __init netx_map_io(void); | 20 | extern void __init netx_map_io(void); |
21 | extern void __init netx_init_irq(void); | 21 | extern void __init netx_init_irq(void); |
22 | extern void netx_restart(char, const char *); | ||
22 | 23 | ||
23 | struct sys_timer; | 24 | struct sys_timer; |
24 | extern struct sys_timer netx_timer; | 25 | extern struct sys_timer netx_timer; |
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h index dc7b4bc003c5..b38fa36d58c4 100644 --- a/arch/arm/mach-netx/include/mach/system.h +++ b/arch/arm/mach-netx/include/mach/system.h | |||
@@ -19,20 +19,10 @@ | |||
19 | #ifndef __ASM_ARCH_SYSTEM_H | 19 | #ifndef __ASM_ARCH_SYSTEM_H |
20 | #define __ASM_ARCH_SYSTEM_H | 20 | #define __ASM_ARCH_SYSTEM_H |
21 | 21 | ||
22 | #include <linux/io.h> | ||
23 | #include <mach/hardware.h> | ||
24 | #include "netx-regs.h" | ||
25 | |||
26 | static inline void arch_idle(void) | 22 | static inline void arch_idle(void) |
27 | { | 23 | { |
28 | cpu_do_idle(); | 24 | cpu_do_idle(); |
29 | } | 25 | } |
30 | 26 | ||
31 | static inline void arch_reset(char mode, const char *cmd) | ||
32 | { | ||
33 | writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES, | ||
34 | NETX_SYSTEM_RES_CR); | ||
35 | } | ||
36 | |||
37 | #endif | 27 | #endif |
38 | 28 | ||
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c index ef8cf3574a02..180ea899a48a 100644 --- a/arch/arm/mach-netx/nxdb500.c +++ b/arch/arm/mach-netx/nxdb500.c | |||
@@ -207,4 +207,5 @@ MACHINE_START(NXDB500, "Hilscher nxdb500") | |||
207 | .handle_irq = vic_handle_irq, | 207 | .handle_irq = vic_handle_irq, |
208 | .timer = &netx_timer, | 208 | .timer = &netx_timer, |
209 | .init_machine = nxdb500_init, | 209 | .init_machine = nxdb500_init, |
210 | .restart = netx_restart, | ||
210 | MACHINE_END | 211 | MACHINE_END |
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c index 588558bdd800..58009e29b20e 100644 --- a/arch/arm/mach-netx/nxdkn.c +++ b/arch/arm/mach-netx/nxdkn.c | |||
@@ -100,4 +100,5 @@ MACHINE_START(NXDKN, "Hilscher nxdkn") | |||
100 | .handle_irq = vic_handle_irq, | 100 | .handle_irq = vic_handle_irq, |
101 | .timer = &netx_timer, | 101 | .timer = &netx_timer, |
102 | .init_machine = nxdkn_init, | 102 | .init_machine = nxdkn_init, |
103 | .restart = netx_restart, | ||
103 | MACHINE_END | 104 | MACHINE_END |
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c index cfcbb5038648..122e99826ef6 100644 --- a/arch/arm/mach-netx/nxeb500hmi.c +++ b/arch/arm/mach-netx/nxeb500hmi.c | |||
@@ -184,4 +184,5 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi") | |||
184 | .handle_irq = vic_handle_irq, | 184 | .handle_irq = vic_handle_irq, |
185 | .timer = &netx_timer, | 185 | .timer = &netx_timer, |
186 | .init_machine = nxeb500hmi_init, | 186 | .init_machine = nxeb500hmi_init, |
187 | .restart = netx_restart, | ||
187 | MACHINE_END | 188 | MACHINE_END |
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index f98259c050ee..7c878bf00340 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c | |||
@@ -35,6 +35,8 @@ | |||
35 | #include <mach/nand.h> | 35 | #include <mach/nand.h> |
36 | #include <mach/fsmc.h> | 36 | #include <mach/fsmc.h> |
37 | 37 | ||
38 | #include "cpu-8815.h" | ||
39 | |||
38 | /* Initial value for SRC control register: all timers use MXTAL/8 source */ | 40 | /* Initial value for SRC control register: all timers use MXTAL/8 source */ |
39 | #define SRC_CR_INIT_MASK 0x00007fff | 41 | #define SRC_CR_INIT_MASK 0x00007fff |
40 | #define SRC_CR_INIT_VAL 0x2aaa8000 | 42 | #define SRC_CR_INIT_VAL 0x2aaa8000 |
@@ -284,4 +286,5 @@ MACHINE_START(NOMADIK, "NHK8815") | |||
284 | .handle_irq = vic_handle_irq, | 286 | .handle_irq = vic_handle_irq, |
285 | .timer = &nomadik_timer, | 287 | .timer = &nomadik_timer, |
286 | .init_machine = nhk8815_platform_init, | 288 | .init_machine = nhk8815_platform_init, |
289 | .restart = cpu8815_restart, | ||
287 | MACHINE_END | 290 | MACHINE_END |
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index dc67717db6f0..65df7b4fdd3e 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/device.h> | 21 | #include <linux/device.h> |
22 | #include <linux/amba/bus.h> | 22 | #include <linux/amba/bus.h> |
23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | #include <linux/io.h> | ||
24 | 25 | ||
25 | #include <plat/gpio-nomadik.h> | 26 | #include <plat/gpio-nomadik.h> |
26 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
@@ -32,6 +33,7 @@ | |||
32 | #include <asm/hardware/cache-l2x0.h> | 33 | #include <asm/hardware/cache-l2x0.h> |
33 | 34 | ||
34 | #include "clock.h" | 35 | #include "clock.h" |
36 | #include "cpu-8815.h" | ||
35 | 37 | ||
36 | #define __MEM_4K_RESOURCE(x) \ | 38 | #define __MEM_4K_RESOURCE(x) \ |
37 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} | 39 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} |
@@ -164,3 +166,13 @@ void __init cpu8815_init_irq(void) | |||
164 | #endif | 166 | #endif |
165 | return; | 167 | return; |
166 | } | 168 | } |
169 | |||
170 | void cpu8815_restart(char mode, const char *cmd) | ||
171 | { | ||
172 | void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18); | ||
173 | |||
174 | /* FIXME: use egpio when implemented */ | ||
175 | |||
176 | /* Write anything to Reset status register */ | ||
177 | writel(1, src_rstsr); | ||
178 | } | ||
diff --git a/arch/arm/mach-nomadik/cpu-8815.h b/arch/arm/mach-nomadik/cpu-8815.h new file mode 100644 index 000000000000..71c21e8a11dc --- /dev/null +++ b/arch/arm/mach-nomadik/cpu-8815.h | |||
@@ -0,0 +1,4 @@ | |||
1 | extern void cpu8815_map_io(void); | ||
2 | extern void cpu8815_platform_init(void); | ||
3 | extern void cpu8815_init_irq(void); | ||
4 | extern void cpu8815_restart(char, const char *); | ||
diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h index b7897edf1f35..bcaeaf41c053 100644 --- a/arch/arm/mach-nomadik/include/mach/setup.h +++ b/arch/arm/mach-nomadik/include/mach/setup.h | |||
@@ -12,9 +12,6 @@ | |||
12 | 12 | ||
13 | #ifdef CONFIG_NOMADIK_8815 | 13 | #ifdef CONFIG_NOMADIK_8815 |
14 | 14 | ||
15 | extern void cpu8815_map_io(void); | ||
16 | extern void cpu8815_platform_init(void); | ||
17 | extern void cpu8815_init_irq(void); | ||
18 | extern void nmdk_timer_init(void); | 15 | extern void nmdk_timer_init(void); |
19 | 16 | ||
20 | #endif /* NOMADIK_8815 */ | 17 | #endif /* NOMADIK_8815 */ |
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h index 7119f688116e..25e198b8976c 100644 --- a/arch/arm/mach-nomadik/include/mach/system.h +++ b/arch/arm/mach-nomadik/include/mach/system.h | |||
@@ -20,9 +20,6 @@ | |||
20 | #ifndef __ASM_ARCH_SYSTEM_H | 20 | #ifndef __ASM_ARCH_SYSTEM_H |
21 | #define __ASM_ARCH_SYSTEM_H | 21 | #define __ASM_ARCH_SYSTEM_H |
22 | 22 | ||
23 | #include <linux/io.h> | ||
24 | #include <mach/hardware.h> | ||
25 | |||
26 | static inline void arch_idle(void) | 23 | static inline void arch_idle(void) |
27 | { | 24 | { |
28 | /* | 25 | /* |
@@ -32,14 +29,4 @@ static inline void arch_idle(void) | |||
32 | cpu_do_idle(); | 29 | cpu_do_idle(); |
33 | } | 30 | } |
34 | 31 | ||
35 | static inline void arch_reset(char mode, const char *cmd) | ||
36 | { | ||
37 | void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18); | ||
38 | |||
39 | /* FIXME: use egpio when implemented */ | ||
40 | |||
41 | /* Write anything to Reset status register */ | ||
42 | writel(1, src_rstsr); | ||
43 | } | ||
44 | |||
45 | #endif | 32 | #endif |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index af7911963c0d..88909cc0b254 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -386,6 +386,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") | |||
386 | .init_irq = omap1_init_irq, | 386 | .init_irq = omap1_init_irq, |
387 | .init_machine = ams_delta_init, | 387 | .init_machine = ams_delta_init, |
388 | .timer = &omap1_timer, | 388 | .timer = &omap1_timer, |
389 | .restart = omap1_restart, | ||
389 | MACHINE_END | 390 | MACHINE_END |
390 | 391 | ||
391 | EXPORT_SYMBOL(ams_delta_latch1_write); | 392 | EXPORT_SYMBOL(ams_delta_latch1_write); |
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index b9c4c0f933ee..0b9464b41212 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
@@ -390,4 +390,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") | |||
390 | .init_irq = omap1_init_irq, | 390 | .init_irq = omap1_init_irq, |
391 | .init_machine = omap_fsample_init, | 391 | .init_machine = omap_fsample_init, |
392 | .timer = &omap1_timer, | 392 | .timer = &omap1_timer, |
393 | .restart = omap1_restart, | ||
393 | MACHINE_END | 394 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 7f41d7a504a5..9a5fe581bc1c 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c | |||
@@ -89,4 +89,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") | |||
89 | .init_irq = omap1_init_irq, | 89 | .init_irq = omap1_init_irq, |
90 | .init_machine = omap_generic_init, | 90 | .init_machine = omap_generic_init, |
91 | .timer = &omap1_timer, | 91 | .timer = &omap1_timer, |
92 | .restart = omap1_restart, | ||
92 | MACHINE_END | 93 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 7933b97698f8..00ad6b22d60a 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
@@ -456,4 +456,5 @@ MACHINE_START(OMAP_H2, "TI-H2") | |||
456 | .init_irq = omap1_init_irq, | 456 | .init_irq = omap1_init_irq, |
457 | .init_machine = h2_init, | 457 | .init_machine = h2_init, |
458 | .timer = &omap1_timer, | 458 | .timer = &omap1_timer, |
459 | .restart = omap1_restart, | ||
459 | MACHINE_END | 460 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 04be2f83ca09..4a7f25149703 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -444,4 +444,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") | |||
444 | .init_irq = omap1_init_irq, | 444 | .init_irq = omap1_init_irq, |
445 | .init_machine = h3_init, | 445 | .init_machine = h3_init, |
446 | .timer = &omap1_timer, | 446 | .timer = &omap1_timer, |
447 | .restart = omap1_restart, | ||
447 | MACHINE_END | 448 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 46fcfeb1f11e..731cc3db7ab3 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c | |||
@@ -610,4 +610,5 @@ MACHINE_START(HERALD, "HTC Herald") | |||
610 | .init_irq = omap1_init_irq, | 610 | .init_irq = omap1_init_irq, |
611 | .init_machine = htcherald_init, | 611 | .init_machine = htcherald_init, |
612 | .timer = &omap1_timer, | 612 | .timer = &omap1_timer, |
613 | .restart = omap1_restart, | ||
613 | MACHINE_END | 614 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index f99d11de1531..309369ea6978 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
@@ -460,4 +460,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") | |||
460 | .init_irq = omap1_init_irq, | 460 | .init_irq = omap1_init_irq, |
461 | .init_machine = innovator_init, | 461 | .init_machine = innovator_init, |
462 | .timer = &omap1_timer, | 462 | .timer = &omap1_timer, |
463 | .restart = omap1_restart, | ||
463 | MACHINE_END | 464 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index c64342388ec3..f9efc036ba96 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -259,4 +259,5 @@ MACHINE_START(NOKIA770, "Nokia 770") | |||
259 | .init_irq = omap1_init_irq, | 259 | .init_irq = omap1_init_irq, |
260 | .init_machine = omap_nokia770_init, | 260 | .init_machine = omap_nokia770_init, |
261 | .timer = &omap1_timer, | 261 | .timer = &omap1_timer, |
262 | .restart = omap1_restart, | ||
262 | MACHINE_END | 263 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index a409dfcc5b18..675de06557aa 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
@@ -578,4 +578,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK") | |||
578 | .init_irq = omap1_init_irq, | 578 | .init_irq = omap1_init_irq, |
579 | .init_machine = osk_init, | 579 | .init_machine = osk_init, |
580 | .timer = &omap1_timer, | 580 | .timer = &omap1_timer, |
581 | .restart = omap1_restart, | ||
581 | MACHINE_END | 582 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 105292d39484..81fa27f88369 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
@@ -270,4 +270,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") | |||
270 | .init_irq = omap1_init_irq, | 270 | .init_irq = omap1_init_irq, |
271 | .init_machine = omap_palmte_init, | 271 | .init_machine = omap_palmte_init, |
272 | .timer = &omap1_timer, | 272 | .timer = &omap1_timer, |
273 | .restart = omap1_restart, | ||
273 | MACHINE_END | 274 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 387a9006358d..81cb82178388 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
@@ -317,4 +317,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") | |||
317 | .init_irq = omap1_init_irq, | 317 | .init_irq = omap1_init_irq, |
318 | .init_machine = omap_palmtt_init, | 318 | .init_machine = omap_palmtt_init, |
319 | .timer = &omap1_timer, | 319 | .timer = &omap1_timer, |
320 | .restart = omap1_restart, | ||
320 | MACHINE_END | 321 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index df6d15e68aad..e881945ce8ec 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
@@ -334,4 +334,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") | |||
334 | .init_irq = omap1_init_irq, | 334 | .init_irq = omap1_init_irq, |
335 | .init_machine = omap_palmz71_init, | 335 | .init_machine = omap_palmz71_init, |
336 | .timer = &omap1_timer, | 336 | .timer = &omap1_timer, |
337 | .restart = omap1_restart, | ||
337 | MACHINE_END | 338 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 57ecd7e09831..c000bed76276 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -352,4 +352,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") | |||
352 | .init_irq = omap1_init_irq, | 352 | .init_irq = omap1_init_irq, |
353 | .init_machine = omap_perseus2_init, | 353 | .init_machine = omap_perseus2_init, |
354 | .timer = &omap1_timer, | 354 | .timer = &omap1_timer, |
355 | .restart = omap1_restart, | ||
355 | MACHINE_END | 356 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 774ae39fd636..7bcd82ab0fd0 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
@@ -416,4 +416,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1") | |||
416 | .init_irq = omap1_init_irq, | 416 | .init_irq = omap1_init_irq, |
417 | .init_machine = omap_sx1_init, | 417 | .init_machine = omap_sx1_init, |
418 | .timer = &omap1_timer, | 418 | .timer = &omap1_timer, |
419 | .restart = omap1_restart, | ||
419 | MACHINE_END | 420 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 7721c146d8d6..f83a502dc93c 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <linux/export.h> | 28 | #include <linux/export.h> |
29 | 29 | ||
30 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
31 | #include <mach/system.h> | ||
32 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
34 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
@@ -221,7 +220,7 @@ void voiceblue_wdt_ping(void) | |||
221 | gpio_set_value(0, wdt_gpio_state); | 220 | gpio_set_value(0, wdt_gpio_state); |
222 | } | 221 | } |
223 | 222 | ||
224 | static void voiceblue_reset(char mode, const char *cmd) | 223 | static void voiceblue_restart(char mode, const char *cmd) |
225 | { | 224 | { |
226 | /* | 225 | /* |
227 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 | 226 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 |
@@ -285,8 +284,6 @@ static void __init voiceblue_init(void) | |||
285 | * (it is connected through invertor) */ | 284 | * (it is connected through invertor) */ |
286 | omap_writeb(0x00, OMAP_LPG1_LCR); | 285 | omap_writeb(0x00, OMAP_LPG1_LCR); |
287 | omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */ | 286 | omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */ |
288 | |||
289 | arch_reset = voiceblue_reset; | ||
290 | } | 287 | } |
291 | 288 | ||
292 | MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") | 289 | MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") |
@@ -298,4 +295,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") | |||
298 | .init_irq = omap1_init_irq, | 295 | .init_irq = omap1_init_irq, |
299 | .init_machine = voiceblue_init, | 296 | .init_machine = voiceblue_init, |
300 | .timer = &omap1_timer, | 297 | .timer = &omap1_timer, |
298 | .restart = voiceblue_restart, | ||
301 | MACHINE_END | 299 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index 52c4eda97fa8..a9a5146dd2d4 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h | |||
@@ -54,6 +54,7 @@ static inline void omap16xx_map_io(void) | |||
54 | 54 | ||
55 | void omap1_init_early(void); | 55 | void omap1_init_early(void); |
56 | void omap1_init_irq(void); | 56 | void omap1_init_irq(void); |
57 | void omap1_restart(char, const char *); | ||
57 | 58 | ||
58 | extern struct sys_timer omap1_timer; | 59 | extern struct sys_timer omap1_timer; |
59 | extern bool omap_32k_timer_init(void); | 60 | extern bool omap_32k_timer_init(void); |
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index ad951ee69205..91d199b64979 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c | |||
@@ -5,10 +5,9 @@ | |||
5 | #include <linux/io.h> | 5 | #include <linux/io.h> |
6 | 6 | ||
7 | #include <mach/hardware.h> | 7 | #include <mach/hardware.h> |
8 | #include <mach/system.h> | ||
9 | #include <plat/prcm.h> | 8 | #include <plat/prcm.h> |
10 | 9 | ||
11 | void omap1_arch_reset(char mode, const char *cmd) | 10 | void omap1_restart(char mode, const char *cmd) |
12 | { | 11 | { |
13 | /* | 12 | /* |
14 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 | 13 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 |
@@ -21,5 +20,3 @@ void omap1_arch_reset(char mode, const char *cmd) | |||
21 | 20 | ||
22 | omap_writew(1, ARM_RSTCT1); | 21 | omap_writew(1, ARM_RSTCT1); |
23 | } | 22 | } |
24 | |||
25 | void (*arch_reset)(char, const char *) = omap1_arch_reset; | ||
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 485a21d31004..b8faffa44f9e 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c | |||
@@ -37,7 +37,6 @@ | |||
37 | #include <linux/init.h> | 37 | #include <linux/init.h> |
38 | #include <linux/delay.h> | 38 | #include <linux/delay.h> |
39 | #include <linux/interrupt.h> | 39 | #include <linux/interrupt.h> |
40 | #include <linux/sched.h> | ||
41 | #include <linux/spinlock.h> | 40 | #include <linux/spinlock.h> |
42 | #include <linux/clk.h> | 41 | #include <linux/clk.h> |
43 | #include <linux/err.h> | 42 | #include <linux/err.h> |
@@ -190,30 +189,9 @@ static __init void omap_init_mpu_timer(unsigned long rate) | |||
190 | * --------------------------------------------------------------------------- | 189 | * --------------------------------------------------------------------------- |
191 | */ | 190 | */ |
192 | 191 | ||
193 | static DEFINE_CLOCK_DATA(cd); | 192 | static u32 notrace omap_mpu_read_sched_clock(void) |
194 | |||
195 | static inline unsigned long long notrace _omap_mpu_sched_clock(void) | ||
196 | { | ||
197 | u32 cyc = ~omap_mpu_timer_read(1); | ||
198 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
199 | } | ||
200 | |||
201 | #ifndef CONFIG_OMAP_32K_TIMER | ||
202 | unsigned long long notrace sched_clock(void) | ||
203 | { | ||
204 | return _omap_mpu_sched_clock(); | ||
205 | } | ||
206 | #else | ||
207 | static unsigned long long notrace omap_mpu_sched_clock(void) | ||
208 | { | ||
209 | return _omap_mpu_sched_clock(); | ||
210 | } | ||
211 | #endif | ||
212 | |||
213 | static void notrace mpu_update_sched_clock(void) | ||
214 | { | 193 | { |
215 | u32 cyc = ~omap_mpu_timer_read(1); | 194 | return ~omap_mpu_timer_read(1); |
216 | update_sched_clock(&cd, cyc, (u32)~0); | ||
217 | } | 195 | } |
218 | 196 | ||
219 | static void __init omap_init_clocksource(unsigned long rate) | 197 | static void __init omap_init_clocksource(unsigned long rate) |
@@ -223,7 +201,7 @@ static void __init omap_init_clocksource(unsigned long rate) | |||
223 | "%s: can't register clocksource!\n"; | 201 | "%s: can't register clocksource!\n"; |
224 | 202 | ||
225 | omap_mpu_timer_start(1, ~0, 1); | 203 | omap_mpu_timer_start(1, ~0, 1); |
226 | init_sched_clock(&cd, mpu_update_sched_clock, 32, rate); | 204 | setup_sched_clock(omap_mpu_read_sched_clock, 32, rate); |
227 | 205 | ||
228 | if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate, | 206 | if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate, |
229 | 300, 32, clocksource_mmio_readl_down)) | 207 | 300, 32, clocksource_mmio_readl_down)) |
@@ -254,30 +232,6 @@ static inline void omap_mpu_timer_init(void) | |||
254 | } | 232 | } |
255 | #endif /* CONFIG_OMAP_MPU_TIMER */ | 233 | #endif /* CONFIG_OMAP_MPU_TIMER */ |
256 | 234 | ||
257 | #if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER) | ||
258 | static unsigned long long (*preferred_sched_clock)(void); | ||
259 | |||
260 | unsigned long long notrace sched_clock(void) | ||
261 | { | ||
262 | if (!preferred_sched_clock) | ||
263 | return 0; | ||
264 | |||
265 | return preferred_sched_clock(); | ||
266 | } | ||
267 | |||
268 | static inline void preferred_sched_clock_init(bool use_32k_sched_clock) | ||
269 | { | ||
270 | if (use_32k_sched_clock) | ||
271 | preferred_sched_clock = omap_32k_sched_clock; | ||
272 | else | ||
273 | preferred_sched_clock = omap_mpu_sched_clock; | ||
274 | } | ||
275 | #else | ||
276 | static inline void preferred_sched_clock_init(bool use_32k_sched_clcok) | ||
277 | { | ||
278 | } | ||
279 | #endif | ||
280 | |||
281 | static inline int omap_32k_timer_usable(void) | 235 | static inline int omap_32k_timer_usable(void) |
282 | { | 236 | { |
283 | int res = false; | 237 | int res = false; |
@@ -299,12 +253,8 @@ static inline int omap_32k_timer_usable(void) | |||
299 | */ | 253 | */ |
300 | static void __init omap1_timer_init(void) | 254 | static void __init omap1_timer_init(void) |
301 | { | 255 | { |
302 | if (omap_32k_timer_usable()) { | 256 | if (!omap_32k_timer_usable()) |
303 | preferred_sched_clock_init(1); | ||
304 | } else { | ||
305 | omap_mpu_timer_init(); | 257 | omap_mpu_timer_init(); |
306 | preferred_sched_clock_init(0); | ||
307 | } | ||
308 | } | 258 | } |
309 | 259 | ||
310 | struct sys_timer omap1_timer = { | 260 | struct sys_timer omap1_timer = { |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 5ca19d717b3f..b7407154c881 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -43,8 +43,10 @@ config ARCH_OMAP4 | |||
43 | bool "TI OMAP4" | 43 | bool "TI OMAP4" |
44 | default y | 44 | default y |
45 | depends on ARCH_OMAP2PLUS | 45 | depends on ARCH_OMAP2PLUS |
46 | select CACHE_L2X0 | ||
46 | select CPU_V7 | 47 | select CPU_V7 |
47 | select ARM_GIC | 48 | select ARM_GIC |
49 | select HAVE_SMP | ||
48 | select LOCAL_TIMERS if SMP | 50 | select LOCAL_TIMERS if SMP |
49 | select PL310_ERRATA_588369 | 51 | select PL310_ERRATA_588369 |
50 | select PL310_ERRATA_727915 | 52 | select PL310_ERRATA_727915 |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index d88143faca59..7370983f809f 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -304,4 +304,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | |||
304 | .handle_irq = omap2_intc_handle_irq, | 304 | .handle_irq = omap2_intc_handle_irq, |
305 | .init_machine = omap_2430sdp_init, | 305 | .init_machine = omap_2430sdp_init, |
306 | .timer = &omap2_timer, | 306 | .timer = &omap2_timer, |
307 | .restart = omap_prcm_restart, | ||
307 | MACHINE_END | 308 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 83126368ed99..9996334cb687 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
@@ -731,4 +731,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") | |||
731 | .handle_irq = omap3_intc_handle_irq, | 731 | .handle_irq = omap3_intc_handle_irq, |
732 | .init_machine = omap_3430sdp_init, | 732 | .init_machine = omap_3430sdp_init, |
733 | .timer = &omap3_timer, | 733 | .timer = &omap3_timer, |
734 | .restart = omap_prcm_restart, | ||
734 | MACHINE_END | 735 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 7969dd904bd3..6ef350d1ae4f 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c | |||
@@ -218,4 +218,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") | |||
218 | .handle_irq = omap3_intc_handle_irq, | 218 | .handle_irq = omap3_intc_handle_irq, |
219 | .init_machine = omap_sdp_init, | 219 | .init_machine = omap_sdp_init, |
220 | .timer = &omap3_timer, | 220 | .timer = &omap3_timer, |
221 | .restart = omap_prcm_restart, | ||
221 | MACHINE_END | 222 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index b5d9c6fe012f..5598e00ccf52 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -993,4 +993,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") | |||
993 | .handle_irq = gic_handle_irq, | 993 | .handle_irq = gic_handle_irq, |
994 | .init_machine = omap_4430sdp_init, | 994 | .init_machine = omap_4430sdp_init, |
995 | .timer = &omap4_timer, | 995 | .timer = &omap4_timer, |
996 | .restart = omap_prcm_restart, | ||
996 | MACHINE_END | 997 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 7e90f93263db..c3851e8de28b 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c | |||
@@ -101,4 +101,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") | |||
101 | .handle_irq = omap3_intc_handle_irq, | 101 | .handle_irq = omap3_intc_handle_irq, |
102 | .init_machine = am3517_crane_init, | 102 | .init_machine = am3517_crane_init, |
103 | .timer = &omap3_timer, | 103 | .timer = &omap3_timer, |
104 | .restart = omap_prcm_restart, | ||
104 | MACHINE_END | 105 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 551cae8d9b8a..f5a3a3f11739 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c | |||
@@ -494,4 +494,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") | |||
494 | .handle_irq = omap3_intc_handle_irq, | 494 | .handle_irq = omap3_intc_handle_irq, |
495 | .init_machine = am3517_evm_init, | 495 | .init_machine = am3517_evm_init, |
496 | .timer = &omap3_timer, | 496 | .timer = &omap3_timer, |
497 | .restart = omap_prcm_restart, | ||
497 | MACHINE_END | 498 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 5a66480feed0..ac773829941f 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
@@ -357,4 +357,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") | |||
357 | .handle_irq = omap2_intc_handle_irq, | 357 | .handle_irq = omap2_intc_handle_irq, |
358 | .init_machine = omap_apollon_init, | 358 | .init_machine = omap_apollon_init, |
359 | .timer = &omap2_timer, | 359 | .timer = &omap2_timer, |
360 | .restart = omap_prcm_restart, | ||
360 | MACHINE_END | 361 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index b38cd7b240e8..e921e3be24a4 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
@@ -671,6 +671,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35") | |||
671 | .handle_irq = omap3_intc_handle_irq, | 671 | .handle_irq = omap3_intc_handle_irq, |
672 | .init_machine = cm_t35_init, | 672 | .init_machine = cm_t35_init, |
673 | .timer = &omap3_timer, | 673 | .timer = &omap3_timer, |
674 | .restart = omap_prcm_restart, | ||
674 | MACHINE_END | 675 | MACHINE_END |
675 | 676 | ||
676 | MACHINE_START(CM_T3730, "Compulab CM-T3730") | 677 | MACHINE_START(CM_T3730, "Compulab CM-T3730") |
@@ -682,4 +683,5 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730") | |||
682 | .handle_irq = omap3_intc_handle_irq, | 683 | .handle_irq = omap3_intc_handle_irq, |
683 | .init_machine = cm_t3730_init, | 684 | .init_machine = cm_t3730_init, |
684 | .timer = &omap3_timer, | 685 | .timer = &omap3_timer, |
686 | .restart = omap_prcm_restart, | ||
685 | MACHINE_END | 687 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index efc5cedb1fbb..f36d694d2159 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c | |||
@@ -302,4 +302,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") | |||
302 | .handle_irq = omap3_intc_handle_irq, | 302 | .handle_irq = omap3_intc_handle_irq, |
303 | .init_machine = cm_t3517_init, | 303 | .init_machine = cm_t3517_init, |
304 | .timer = &omap3_timer, | 304 | .timer = &omap3_timer, |
305 | .restart = omap_prcm_restart, | ||
305 | MACHINE_END | 306 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index d81ea7fa75ef..e873063f4fda 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c | |||
@@ -663,4 +663,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") | |||
663 | .handle_irq = omap3_intc_handle_irq, | 663 | .handle_irq = omap3_intc_handle_irq, |
664 | .init_machine = devkit8000_init, | 664 | .init_machine = devkit8000_init, |
665 | .timer = &omap3_secure_timer, | 665 | .timer = &omap3_secure_timer, |
666 | .restart = omap_prcm_restart, | ||
666 | MACHINE_END | 667 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 63b54163b993..f8c5b2cc7c9c 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
@@ -106,6 +106,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") | |||
106 | .init_machine = omap_generic_init, | 106 | .init_machine = omap_generic_init, |
107 | .timer = &omap2_timer, | 107 | .timer = &omap2_timer, |
108 | .dt_compat = omap242x_boards_compat, | 108 | .dt_compat = omap242x_boards_compat, |
109 | .restart = omap_prcm_restart, | ||
109 | MACHINE_END | 110 | MACHINE_END |
110 | #endif | 111 | #endif |
111 | 112 | ||
@@ -125,6 +126,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") | |||
125 | .init_machine = omap_generic_init, | 126 | .init_machine = omap_generic_init, |
126 | .timer = &omap2_timer, | 127 | .timer = &omap2_timer, |
127 | .dt_compat = omap243x_boards_compat, | 128 | .dt_compat = omap243x_boards_compat, |
129 | .restart = omap_prcm_restart, | ||
128 | MACHINE_END | 130 | MACHINE_END |
129 | #endif | 131 | #endif |
130 | 132 | ||
@@ -143,6 +145,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") | |||
143 | .init_machine = omap3_init, | 145 | .init_machine = omap3_init, |
144 | .timer = &omap3_timer, | 146 | .timer = &omap3_timer, |
145 | .dt_compat = omap3_boards_compat, | 147 | .dt_compat = omap3_boards_compat, |
148 | .restart = omap_prcm_restart, | ||
146 | MACHINE_END | 149 | MACHINE_END |
147 | #endif | 150 | #endif |
148 | 151 | ||
@@ -161,5 +164,6 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") | |||
161 | .init_machine = omap4_init, | 164 | .init_machine = omap4_init, |
162 | .timer = &omap4_timer, | 165 | .timer = &omap4_timer, |
163 | .dt_compat = omap4_boards_compat, | 166 | .dt_compat = omap4_boards_compat, |
167 | .restart = omap_prcm_restart, | ||
164 | MACHINE_END | 168 | MACHINE_END |
165 | #endif | 169 | #endif |
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index ec4018362e8e..54af800d143c 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
@@ -399,4 +399,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") | |||
399 | .handle_irq = omap2_intc_handle_irq, | 399 | .handle_irq = omap2_intc_handle_irq, |
400 | .init_machine = omap_h4_init, | 400 | .init_machine = omap_h4_init, |
401 | .timer = &omap2_timer, | 401 | .timer = &omap2_timer, |
402 | .restart = omap_prcm_restart, | ||
402 | MACHINE_END | 403 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 5949f6ae3edf..a59ace0ed560 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -675,6 +675,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") | |||
675 | .handle_irq = omap3_intc_handle_irq, | 675 | .handle_irq = omap3_intc_handle_irq, |
676 | .init_machine = igep_init, | 676 | .init_machine = igep_init, |
677 | .timer = &omap3_timer, | 677 | .timer = &omap3_timer, |
678 | .restart = omap_prcm_restart, | ||
678 | MACHINE_END | 679 | MACHINE_END |
679 | 680 | ||
680 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") | 681 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") |
@@ -686,4 +687,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") | |||
686 | .handle_irq = omap3_intc_handle_irq, | 687 | .handle_irq = omap3_intc_handle_irq, |
687 | .init_machine = igep_init, | 688 | .init_machine = igep_init, |
688 | .timer = &omap3_timer, | 689 | .timer = &omap3_timer, |
690 | .restart = omap_prcm_restart, | ||
689 | MACHINE_END | 691 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 13bde0e66934..2d2a61f7dcbf 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
@@ -437,4 +437,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") | |||
437 | .handle_irq = omap3_intc_handle_irq, | 437 | .handle_irq = omap3_intc_handle_irq, |
438 | .init_machine = omap_ldp_init, | 438 | .init_machine = omap_ldp_init, |
439 | .timer = &omap3_timer, | 439 | .timer = &omap3_timer, |
440 | .restart = omap_prcm_restart, | ||
440 | MACHINE_END | 441 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index bebd3d84365e..cef2cf1c0b8d 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
@@ -692,6 +692,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") | |||
692 | .handle_irq = omap2_intc_handle_irq, | 692 | .handle_irq = omap2_intc_handle_irq, |
693 | .init_machine = n8x0_init_machine, | 693 | .init_machine = n8x0_init_machine, |
694 | .timer = &omap2_timer, | 694 | .timer = &omap2_timer, |
695 | .restart = omap_prcm_restart, | ||
695 | MACHINE_END | 696 | MACHINE_END |
696 | 697 | ||
697 | MACHINE_START(NOKIA_N810, "Nokia N810") | 698 | MACHINE_START(NOKIA_N810, "Nokia N810") |
@@ -703,6 +704,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") | |||
703 | .handle_irq = omap2_intc_handle_irq, | 704 | .handle_irq = omap2_intc_handle_irq, |
704 | .init_machine = n8x0_init_machine, | 705 | .init_machine = n8x0_init_machine, |
705 | .timer = &omap2_timer, | 706 | .timer = &omap2_timer, |
707 | .restart = omap_prcm_restart, | ||
706 | MACHINE_END | 708 | MACHINE_END |
707 | 709 | ||
708 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | 710 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") |
@@ -714,4 +716,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | |||
714 | .handle_irq = omap2_intc_handle_irq, | 716 | .handle_irq = omap2_intc_handle_irq, |
715 | .init_machine = n8x0_init_machine, | 717 | .init_machine = n8x0_init_machine, |
716 | .timer = &omap2_timer, | 718 | .timer = &omap2_timer, |
719 | .restart = omap_prcm_restart, | ||
717 | MACHINE_END | 720 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index c34f56588284..7ffcd2839e7b 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
@@ -562,4 +562,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | |||
562 | .handle_irq = omap3_intc_handle_irq, | 562 | .handle_irq = omap3_intc_handle_irq, |
563 | .init_machine = omap3_beagle_init, | 563 | .init_machine = omap3_beagle_init, |
564 | .timer = &omap3_secure_timer, | 564 | .timer = &omap3_secure_timer, |
565 | .restart = omap_prcm_restart, | ||
565 | MACHINE_END | 566 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index f11bc444e7be..003fe34c9343 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -684,4 +684,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") | |||
684 | .handle_irq = omap3_intc_handle_irq, | 684 | .handle_irq = omap3_intc_handle_irq, |
685 | .init_machine = omap3_evm_init, | 685 | .init_machine = omap3_evm_init, |
686 | .timer = &omap3_timer, | 686 | .timer = &omap3_timer, |
687 | .restart = omap_prcm_restart, | ||
687 | MACHINE_END | 688 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 5fa6bad9574e..4198dd017d8f 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c | |||
@@ -211,6 +211,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") | |||
211 | .handle_irq = omap3_intc_handle_irq, | 211 | .handle_irq = omap3_intc_handle_irq, |
212 | .init_machine = omap3logic_init, | 212 | .init_machine = omap3logic_init, |
213 | .timer = &omap3_timer, | 213 | .timer = &omap3_timer, |
214 | .restart = omap_prcm_restart, | ||
214 | MACHINE_END | 215 | MACHINE_END |
215 | 216 | ||
216 | MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") | 217 | MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") |
@@ -221,4 +222,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") | |||
221 | .handle_irq = omap3_intc_handle_irq, | 222 | .handle_irq = omap3_intc_handle_irq, |
222 | .init_machine = omap3logic_init, | 223 | .init_machine = omap3logic_init, |
223 | .timer = &omap3_timer, | 224 | .timer = &omap3_timer, |
225 | .restart = omap_prcm_restart, | ||
224 | MACHINE_END | 226 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index ef315c585b75..1644b73017fc 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
@@ -609,4 +609,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") | |||
609 | .handle_irq = omap3_intc_handle_irq, | 609 | .handle_irq = omap3_intc_handle_irq, |
610 | .init_machine = omap3pandora_init, | 610 | .init_machine = omap3pandora_init, |
611 | .timer = &omap3_timer, | 611 | .timer = &omap3_timer, |
612 | .restart = omap_prcm_restart, | ||
612 | MACHINE_END | 613 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index b21d70a2e4a7..cb089a46f62f 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c | |||
@@ -457,4 +457,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") | |||
457 | .handle_irq = omap3_intc_handle_irq, | 457 | .handle_irq = omap3_intc_handle_irq, |
458 | .init_machine = omap3_stalker_init, | 458 | .init_machine = omap3_stalker_init, |
459 | .timer = &omap3_secure_timer, | 459 | .timer = &omap3_secure_timer, |
460 | .restart = omap_prcm_restart, | ||
460 | MACHINE_END | 461 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 18cd340f9b7b..a0b851aafcca 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | |||
@@ -384,4 +384,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") | |||
384 | .handle_irq = omap3_intc_handle_irq, | 384 | .handle_irq = omap3_intc_handle_irq, |
385 | .init_machine = omap3_touchbook_init, | 385 | .init_machine = omap3_touchbook_init, |
386 | .timer = &omap3_secure_timer, | 386 | .timer = &omap3_secure_timer, |
387 | .restart = omap_prcm_restart, | ||
387 | MACHINE_END | 388 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index b6f114436dbc..8b06c6a60d02 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c | |||
@@ -580,4 +580,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") | |||
580 | .handle_irq = gic_handle_irq, | 580 | .handle_irq = gic_handle_irq, |
581 | .init_machine = omap4_panda_init, | 581 | .init_machine = omap4_panda_init, |
582 | .timer = &omap4_timer, | 582 | .timer = &omap4_timer, |
583 | .restart = omap_prcm_restart, | ||
583 | MACHINE_END | 584 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 60a61ea759bf..52c0cef77165 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
@@ -565,4 +565,5 @@ MACHINE_START(OVERO, "Gumstix Overo") | |||
565 | .handle_irq = omap3_intc_handle_irq, | 565 | .handle_irq = omap3_intc_handle_irq, |
566 | .init_machine = overo_init, | 566 | .init_machine = overo_init, |
567 | .timer = &omap3_timer, | 567 | .timer = &omap3_timer, |
568 | .restart = omap_prcm_restart, | ||
568 | MACHINE_END | 569 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index a79d49e3fe09..8678b386c6a2 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c | |||
@@ -152,4 +152,5 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") | |||
152 | .handle_irq = omap3_intc_handle_irq, | 152 | .handle_irq = omap3_intc_handle_irq, |
153 | .init_machine = rm680_init, | 153 | .init_machine = rm680_init, |
154 | .timer = &omap3_timer, | 154 | .timer = &omap3_timer, |
155 | .restart = omap_prcm_restart, | ||
155 | MACHINE_END | 156 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 4e3c0965edf3..27f01f051dff 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
@@ -130,4 +130,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") | |||
130 | .handle_irq = omap3_intc_handle_irq, | 130 | .handle_irq = omap3_intc_handle_irq, |
131 | .init_machine = rx51_init, | 131 | .init_machine = rx51_init, |
132 | .timer = &omap3_timer, | 132 | .timer = &omap3_timer, |
133 | .restart = omap_prcm_restart, | ||
133 | MACHINE_END | 134 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index 5b6ad6e3ccb4..ab9a7a9e9d64 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c | |||
@@ -52,6 +52,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") | |||
52 | .init_irq = ti81xx_init_irq, | 52 | .init_irq = ti81xx_init_irq, |
53 | .timer = &omap3_timer, | 53 | .timer = &omap3_timer, |
54 | .init_machine = ti81xx_evm_init, | 54 | .init_machine = ti81xx_evm_init, |
55 | .restart = omap_prcm_restart, | ||
55 | MACHINE_END | 56 | MACHINE_END |
56 | 57 | ||
57 | MACHINE_START(TI8148EVM, "ti8148evm") | 58 | MACHINE_START(TI8148EVM, "ti8148evm") |
@@ -62,4 +63,5 @@ MACHINE_START(TI8148EVM, "ti8148evm") | |||
62 | .init_irq = ti81xx_init_irq, | 63 | .init_irq = ti81xx_init_irq, |
63 | .timer = &omap3_timer, | 64 | .timer = &omap3_timer, |
64 | .init_machine = ti81xx_evm_init, | 65 | .init_machine = ti81xx_evm_init, |
66 | .restart = omap_prcm_restart, | ||
65 | MACHINE_END | 67 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 70e5b54a2115..5c20bcc57f2b 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c | |||
@@ -138,6 +138,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") | |||
138 | .handle_irq = omap3_intc_handle_irq, | 138 | .handle_irq = omap3_intc_handle_irq, |
139 | .init_machine = omap_zoom_init, | 139 | .init_machine = omap_zoom_init, |
140 | .timer = &omap3_timer, | 140 | .timer = &omap3_timer, |
141 | .restart = omap_prcm_restart, | ||
141 | MACHINE_END | 142 | MACHINE_END |
142 | 143 | ||
143 | MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") | 144 | MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") |
@@ -149,4 +150,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") | |||
149 | .handle_irq = omap3_intc_handle_irq, | 150 | .handle_irq = omap3_intc_handle_irq, |
150 | .init_machine = omap_zoom_init, | 151 | .init_machine = omap_zoom_init, |
151 | .timer = &omap3_timer, | 152 | .timer = &omap3_timer, |
153 | .restart = omap_prcm_restart, | ||
152 | MACHINE_END | 154 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 4b2b416fafe1..9403b2ce6c85 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -92,6 +92,7 @@ void omap3_init_early(void); /* Do not use this one */ | |||
92 | void am35xx_init_early(void); | 92 | void am35xx_init_early(void); |
93 | void ti81xx_init_early(void); | 93 | void ti81xx_init_early(void); |
94 | void omap4430_init_early(void); | 94 | void omap4430_init_early(void); |
95 | void omap_prcm_restart(char, const char *); | ||
95 | 96 | ||
96 | /* | 97 | /* |
97 | * IO bases for various OMAP processors | 98 | * IO bases for various OMAP processors |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 7f8915ad5099..eef43e2e163e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -3247,18 +3247,14 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { | |||
3247 | 3247 | ||
3248 | /* 3430ES1-only hwmods */ | 3248 | /* 3430ES1-only hwmods */ |
3249 | static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { | 3249 | static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { |
3250 | &omap3xxx_iva_hwmod, | ||
3251 | &omap3430es1_dss_core_hwmod, | 3250 | &omap3430es1_dss_core_hwmod, |
3252 | &omap3xxx_mailbox_hwmod, | ||
3253 | NULL | 3251 | NULL |
3254 | }; | 3252 | }; |
3255 | 3253 | ||
3256 | /* 3430ES2+-only hwmods */ | 3254 | /* 3430ES2+-only hwmods */ |
3257 | static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { | 3255 | static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { |
3258 | &omap3xxx_iva_hwmod, | ||
3259 | &omap3xxx_dss_core_hwmod, | 3256 | &omap3xxx_dss_core_hwmod, |
3260 | &omap3xxx_usbhsotg_hwmod, | 3257 | &omap3xxx_usbhsotg_hwmod, |
3261 | &omap3xxx_mailbox_hwmod, | ||
3262 | NULL | 3258 | NULL |
3263 | }; | 3259 | }; |
3264 | 3260 | ||
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index c35e5cea9f8f..626acfad7190 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include <linux/delay.h> | 25 | #include <linux/delay.h> |
26 | #include <linux/export.h> | 26 | #include <linux/export.h> |
27 | 27 | ||
28 | #include <mach/system.h> | ||
29 | #include "common.h" | 28 | #include "common.h" |
30 | #include <plat/prcm.h> | 29 | #include <plat/prcm.h> |
31 | #include <plat/irqs.h> | 30 | #include <plat/irqs.h> |
@@ -59,7 +58,7 @@ u32 omap_prcm_get_reset_sources(void) | |||
59 | EXPORT_SYMBOL(omap_prcm_get_reset_sources); | 58 | EXPORT_SYMBOL(omap_prcm_get_reset_sources); |
60 | 59 | ||
61 | /* Resets clock rates and reboots the system. Only called from system.h */ | 60 | /* Resets clock rates and reboots the system. Only called from system.h */ |
62 | static void omap_prcm_arch_reset(char mode, const char *cmd) | 61 | void omap_prcm_restart(char mode, const char *cmd) |
63 | { | 62 | { |
64 | s16 prcm_offs = 0; | 63 | s16 prcm_offs = 0; |
65 | 64 | ||
@@ -110,8 +109,6 @@ static void omap_prcm_arch_reset(char mode, const char *cmd) | |||
110 | omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ | 109 | omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ |
111 | } | 110 | } |
112 | 111 | ||
113 | void (*arch_reset)(char, const char *) = omap_prcm_arch_reset; | ||
114 | |||
115 | /** | 112 | /** |
116 | * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness | 113 | * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness |
117 | * @reg: physical address of module IDLEST register | 114 | * @reg: physical address of module IDLEST register |
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 9edcd520510f..6eeff0e0ae01 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -254,7 +254,6 @@ static struct omap_dm_timer clksrc; | |||
254 | /* | 254 | /* |
255 | * clocksource | 255 | * clocksource |
256 | */ | 256 | */ |
257 | static DEFINE_CLOCK_DATA(cd); | ||
258 | static cycle_t clocksource_read_cycles(struct clocksource *cs) | 257 | static cycle_t clocksource_read_cycles(struct clocksource *cs) |
259 | { | 258 | { |
260 | return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); | 259 | return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); |
@@ -268,23 +267,12 @@ static struct clocksource clocksource_gpt = { | |||
268 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 267 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
269 | }; | 268 | }; |
270 | 269 | ||
271 | static void notrace dmtimer_update_sched_clock(void) | 270 | static u32 notrace dmtimer_read_sched_clock(void) |
272 | { | 271 | { |
273 | u32 cyc; | ||
274 | |||
275 | cyc = __omap_dm_timer_read_counter(&clksrc, 1); | ||
276 | |||
277 | update_sched_clock(&cd, cyc, (u32)~0); | ||
278 | } | ||
279 | |||
280 | unsigned long long notrace sched_clock(void) | ||
281 | { | ||
282 | u32 cyc = 0; | ||
283 | |||
284 | if (clksrc.reserved) | 272 | if (clksrc.reserved) |
285 | cyc = __omap_dm_timer_read_counter(&clksrc, 1); | 273 | return __omap_dm_timer_read_counter(clksrc.io_base, 1); |
286 | 274 | ||
287 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | 275 | return 0; |
288 | } | 276 | } |
289 | 277 | ||
290 | /* Setup free-running counter for clocksource */ | 278 | /* Setup free-running counter for clocksource */ |
@@ -301,7 +289,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id, | |||
301 | 289 | ||
302 | __omap_dm_timer_load_start(&clksrc, | 290 | __omap_dm_timer_load_start(&clksrc, |
303 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); | 291 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); |
304 | init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); | 292 | setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate); |
305 | 293 | ||
306 | if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) | 294 | if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) |
307 | pr_err("Could not register clocksource %s\n", | 295 | pr_err("Could not register clocksource %s\n", |
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 22ace0bf2f92..41127e80cc1e 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/mbus.h> | 18 | #include <linux/mbus.h> |
19 | #include <linux/mv643xx_i2c.h> | 19 | #include <linux/mv643xx_i2c.h> |
20 | #include <linux/ata_platform.h> | 20 | #include <linux/ata_platform.h> |
21 | #include <linux/delay.h> | ||
21 | #include <net/dsa.h> | 22 | #include <net/dsa.h> |
22 | #include <asm/page.h> | 23 | #include <asm/page.h> |
23 | #include <asm/setup.h> | 24 | #include <asm/setup.h> |
@@ -304,6 +305,17 @@ void __init orion5x_init(void) | |||
304 | orion5x_wdt_init(); | 305 | orion5x_wdt_init(); |
305 | } | 306 | } |
306 | 307 | ||
308 | void orion5x_restart(char mode, const char *cmd) | ||
309 | { | ||
310 | /* | ||
311 | * Enable and issue soft reset | ||
312 | */ | ||
313 | orion5x_setbits(RSTOUTn_MASK, (1 << 2)); | ||
314 | orion5x_setbits(CPU_SOFT_RESET, 1); | ||
315 | mdelay(200); | ||
316 | orion5x_clrbits(CPU_SOFT_RESET, 1); | ||
317 | } | ||
318 | |||
307 | /* | 319 | /* |
308 | * Many orion-based systems have buggy bootloader implementations. | 320 | * Many orion-based systems have buggy bootloader implementations. |
309 | * This is a common fixup for bogus memory tags. | 321 | * This is a common fixup for bogus memory tags. |
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index 909489f4d23e..37ef18de61b7 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h | |||
@@ -39,6 +39,7 @@ void orion5x_spi_init(void); | |||
39 | void orion5x_uart0_init(void); | 39 | void orion5x_uart0_init(void); |
40 | void orion5x_uart1_init(void); | 40 | void orion5x_uart1_init(void); |
41 | void orion5x_xor_init(void); | 41 | void orion5x_xor_init(void); |
42 | void orion5x_restart(char, const char *); | ||
42 | 43 | ||
43 | /* | 44 | /* |
44 | * PCIe/PCI functions. | 45 | * PCIe/PCI functions. |
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c index 8c8300951f46..d75dcfa0f01c 100644 --- a/arch/arm/mach-orion5x/d2net-setup.c +++ b/arch/arm/mach-orion5x/d2net-setup.c | |||
@@ -343,6 +343,7 @@ MACHINE_START(D2NET, "LaCie d2 Network") | |||
343 | .init_irq = orion5x_init_irq, | 343 | .init_irq = orion5x_init_irq, |
344 | .timer = &orion5x_timer, | 344 | .timer = &orion5x_timer, |
345 | .fixup = tag_fixup_mem32, | 345 | .fixup = tag_fixup_mem32, |
346 | .restart = orion5x_restart, | ||
346 | MACHINE_END | 347 | MACHINE_END |
347 | #endif | 348 | #endif |
348 | 349 | ||
@@ -355,6 +356,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network") | |||
355 | .init_irq = orion5x_init_irq, | 356 | .init_irq = orion5x_init_irq, |
356 | .timer = &orion5x_timer, | 357 | .timer = &orion5x_timer, |
357 | .fixup = tag_fixup_mem32, | 358 | .fixup = tag_fixup_mem32, |
359 | .restart = orion5x_restart, | ||
358 | MACHINE_END | 360 | MACHINE_END |
359 | #endif | 361 | #endif |
360 | 362 | ||
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index 4b79a80d5e1f..a104d5a80e11 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c | |||
@@ -364,4 +364,5 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") | |||
364 | .init_early = orion5x_init_early, | 364 | .init_early = orion5x_init_early, |
365 | .init_irq = orion5x_init_irq, | 365 | .init_irq = orion5x_init_irq, |
366 | .timer = &orion5x_timer, | 366 | .timer = &orion5x_timer, |
367 | .restart = orion5x_restart, | ||
367 | MACHINE_END | 368 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 343f60e9639f..91b0f4788597 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c | |||
@@ -736,4 +736,5 @@ MACHINE_START(DNS323, "D-Link DNS-323") | |||
736 | .init_irq = orion5x_init_irq, | 736 | .init_irq = orion5x_init_irq, |
737 | .timer = &orion5x_timer, | 737 | .timer = &orion5x_timer, |
738 | .fixup = tag_fixup_mem32, | 738 | .fixup = tag_fixup_mem32, |
739 | .restart = orion5x_restart, | ||
739 | MACHINE_END | 740 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c index 70a4e9265f06..355e962137c7 100644 --- a/arch/arm/mach-orion5x/edmini_v2-setup.c +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c | |||
@@ -258,4 +258,5 @@ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2") | |||
258 | .init_irq = orion5x_init_irq, | 258 | .init_irq = orion5x_init_irq, |
259 | .timer = &orion5x_timer, | 259 | .timer = &orion5x_timer, |
260 | .fixup = tag_fixup_mem32, | 260 | .fixup = tag_fixup_mem32, |
261 | .restart = orion5x_restart, | ||
261 | MACHINE_END | 262 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h index a1d6e46ab035..825a2650cefa 100644 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ b/arch/arm/mach-orion5x/include/mach/system.h | |||
@@ -11,23 +11,9 @@ | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | 11 | #ifndef __ASM_ARCH_SYSTEM_H |
12 | #define __ASM_ARCH_SYSTEM_H | 12 | #define __ASM_ARCH_SYSTEM_H |
13 | 13 | ||
14 | #include <mach/bridge-regs.h> | ||
15 | |||
16 | static inline void arch_idle(void) | 14 | static inline void arch_idle(void) |
17 | { | 15 | { |
18 | cpu_do_idle(); | 16 | cpu_do_idle(); |
19 | } | 17 | } |
20 | 18 | ||
21 | static inline void arch_reset(char mode, const char *cmd) | ||
22 | { | ||
23 | /* | ||
24 | * Enable and issue soft reset | ||
25 | */ | ||
26 | orion5x_setbits(RSTOUTn_MASK, (1 << 2)); | ||
27 | orion5x_setbits(CPU_SOFT_RESET, 1); | ||
28 | mdelay(200); | ||
29 | orion5x_clrbits(CPU_SOFT_RESET, 1); | ||
30 | } | ||
31 | |||
32 | |||
33 | #endif | 19 | #endif |
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index d3cd3f63258a..47587b832842 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c | |||
@@ -386,6 +386,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro") | |||
386 | .init_irq = orion5x_init_irq, | 386 | .init_irq = orion5x_init_irq, |
387 | .timer = &orion5x_timer, | 387 | .timer = &orion5x_timer, |
388 | .fixup = tag_fixup_mem32, | 388 | .fixup = tag_fixup_mem32, |
389 | .restart = orion5x_restart, | ||
389 | MACHINE_END | 390 | MACHINE_END |
390 | #endif | 391 | #endif |
391 | 392 | ||
@@ -399,5 +400,6 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live") | |||
399 | .init_irq = orion5x_init_irq, | 400 | .init_irq = orion5x_init_irq, |
400 | .timer = &orion5x_timer, | 401 | .timer = &orion5x_timer, |
401 | .fixup = tag_fixup_mem32, | 402 | .fixup = tag_fixup_mem32, |
403 | .restart = orion5x_restart, | ||
402 | MACHINE_END | 404 | MACHINE_END |
403 | #endif | 405 | #endif |
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c index 9503fff404e3..527213169db0 100644 --- a/arch/arm/mach-orion5x/ls-chl-setup.c +++ b/arch/arm/mach-orion5x/ls-chl-setup.c | |||
@@ -140,7 +140,7 @@ static struct mv_sata_platform_data lschl_sata_data = { | |||
140 | 140 | ||
141 | static void lschl_power_off(void) | 141 | static void lschl_power_off(void) |
142 | { | 142 | { |
143 | arm_machine_restart('h', NULL); | 143 | orion5x_restart('h', NULL); |
144 | } | 144 | } |
145 | 145 | ||
146 | /***************************************************************************** | 146 | /***************************************************************************** |
@@ -325,4 +325,5 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)") | |||
325 | .init_irq = orion5x_init_irq, | 325 | .init_irq = orion5x_init_irq, |
326 | .timer = &orion5x_timer, | 326 | .timer = &orion5x_timer, |
327 | .fixup = tag_fixup_mem32, | 327 | .fixup = tag_fixup_mem32, |
328 | .restart = orion5x_restart, | ||
328 | MACHINE_END | 329 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c index ed6d772f4a24..9a8697b97dd7 100644 --- a/arch/arm/mach-orion5x/ls_hgl-setup.c +++ b/arch/arm/mach-orion5x/ls_hgl-setup.c | |||
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data ls_hgl_sata_data = { | |||
186 | 186 | ||
187 | static void ls_hgl_power_off(void) | 187 | static void ls_hgl_power_off(void) |
188 | { | 188 | { |
189 | arm_machine_restart('h', NULL); | 189 | orion5x_restart('h', NULL); |
190 | } | 190 | } |
191 | 191 | ||
192 | 192 | ||
@@ -272,4 +272,5 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL") | |||
272 | .init_irq = orion5x_init_irq, | 272 | .init_irq = orion5x_init_irq, |
273 | .timer = &orion5x_timer, | 273 | .timer = &orion5x_timer, |
274 | .fixup = tag_fixup_mem32, | 274 | .fixup = tag_fixup_mem32, |
275 | .restart = orion5x_restart, | ||
275 | MACHINE_END | 276 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c index 743f7f1db181..09c73659f467 100644 --- a/arch/arm/mach-orion5x/lsmini-setup.c +++ b/arch/arm/mach-orion5x/lsmini-setup.c | |||
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = { | |||
186 | 186 | ||
187 | static void lsmini_power_off(void) | 187 | static void lsmini_power_off(void) |
188 | { | 188 | { |
189 | arm_machine_restart('h', NULL); | 189 | orion5x_restart('h', NULL); |
190 | } | 190 | } |
191 | 191 | ||
192 | 192 | ||
@@ -274,5 +274,6 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini") | |||
274 | .init_irq = orion5x_init_irq, | 274 | .init_irq = orion5x_init_irq, |
275 | .timer = &orion5x_timer, | 275 | .timer = &orion5x_timer, |
276 | .fixup = tag_fixup_mem32, | 276 | .fixup = tag_fixup_mem32, |
277 | .restart = orion5x_restart, | ||
277 | MACHINE_END | 278 | MACHINE_END |
278 | #endif | 279 | #endif |
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 6020e26b1c71..65faaa34de61 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c | |||
@@ -267,5 +267,6 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II") | |||
267 | .init_early = orion5x_init_early, | 267 | .init_early = orion5x_init_early, |
268 | .init_irq = orion5x_init_irq, | 268 | .init_irq = orion5x_init_irq, |
269 | .timer = &orion5x_timer, | 269 | .timer = &orion5x_timer, |
270 | .fixup = tag_fixup_mem32 | 270 | .fixup = tag_fixup_mem32, |
271 | .restart = orion5x_restart, | ||
271 | MACHINE_END | 272 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c index 201ae3676289..c87fde4deeca 100644 --- a/arch/arm/mach-orion5x/mv2120-setup.c +++ b/arch/arm/mach-orion5x/mv2120-setup.c | |||
@@ -234,5 +234,6 @@ MACHINE_START(MV2120, "HP Media Vault mv2120") | |||
234 | .init_early = orion5x_init_early, | 234 | .init_early = orion5x_init_early, |
235 | .init_irq = orion5x_init_irq, | 235 | .init_irq = orion5x_init_irq, |
236 | .timer = &orion5x_timer, | 236 | .timer = &orion5x_timer, |
237 | .fixup = tag_fixup_mem32 | 237 | .fixup = tag_fixup_mem32, |
238 | .restart = orion5x_restart, | ||
238 | MACHINE_END | 239 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c index 6197c79a2ecb..0180c393c711 100644 --- a/arch/arm/mach-orion5x/net2big-setup.c +++ b/arch/arm/mach-orion5x/net2big-setup.c | |||
@@ -426,5 +426,6 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network") | |||
426 | .init_irq = orion5x_init_irq, | 426 | .init_irq = orion5x_init_irq, |
427 | .timer = &orion5x_timer, | 427 | .timer = &orion5x_timer, |
428 | .fixup = tag_fixup_mem32, | 428 | .fixup = tag_fixup_mem32, |
429 | .restart = orion5x_restart, | ||
429 | MACHINE_END | 430 | MACHINE_END |
430 | 431 | ||
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index ebd6767d8e88..292038fc59fd 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | |||
@@ -175,4 +175,5 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design") | |||
175 | .init_irq = orion5x_init_irq, | 175 | .init_irq = orion5x_init_irq, |
176 | .timer = &orion5x_timer, | 176 | .timer = &orion5x_timer, |
177 | .fixup = tag_fixup_mem32, | 177 | .fixup = tag_fixup_mem32, |
178 | .restart = orion5x_restart, | ||
178 | MACHINE_END | 179 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index 05db2d336b08..c44eabaabc16 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | |||
@@ -187,4 +187,5 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design") | |||
187 | .init_irq = orion5x_init_irq, | 187 | .init_irq = orion5x_init_irq, |
188 | .timer = &orion5x_timer, | 188 | .timer = &orion5x_timer, |
189 | .fixup = tag_fixup_mem32, | 189 | .fixup = tag_fixup_mem32, |
190 | .restart = orion5x_restart, | ||
190 | MACHINE_END | 191 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index e47fa0578ae3..96438b6b2022 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c | |||
@@ -311,4 +311,5 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") | |||
311 | .init_early = orion5x_init_early, | 311 | .init_early = orion5x_init_early, |
312 | .init_irq = orion5x_init_irq, | 312 | .init_irq = orion5x_init_irq, |
313 | .timer = &orion5x_timer, | 313 | .timer = &orion5x_timer, |
314 | .restart = orion5x_restart, | ||
314 | MACHINE_END | 315 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c index 64317251ec00..2c5fab00d205 100644 --- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | |||
@@ -128,4 +128,5 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") | |||
128 | .init_irq = orion5x_init_irq, | 128 | .init_irq = orion5x_init_irq, |
129 | .timer = &orion5x_timer, | 129 | .timer = &orion5x_timer, |
130 | .fixup = tag_fixup_mem32, | 130 | .fixup = tag_fixup_mem32, |
131 | .restart = orion5x_restart, | ||
131 | MACHINE_END | 132 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c index 29f1526f7b70..632a861ef82b 100644 --- a/arch/arm/mach-orion5x/terastation_pro2-setup.c +++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c | |||
@@ -364,4 +364,5 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live") | |||
364 | .init_irq = orion5x_init_irq, | 364 | .init_irq = orion5x_init_irq, |
365 | .timer = &orion5x_timer, | 365 | .timer = &orion5x_timer, |
366 | .fixup = tag_fixup_mem32, | 366 | .fixup = tag_fixup_mem32, |
367 | .restart = orion5x_restart, | ||
367 | MACHINE_END | 368 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 31e51f9b4b64..5d6408745582 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c | |||
@@ -178,7 +178,7 @@ static struct hw_pci qnap_ts209_pci __initdata = { | |||
178 | 178 | ||
179 | static int __init qnap_ts209_pci_init(void) | 179 | static int __init qnap_ts209_pci_init(void) |
180 | { | 180 | { |
181 | if (machine_is_ts_x09()) | 181 | if (machine_is_ts209()) |
182 | pci_common_init(&qnap_ts209_pci); | 182 | pci_common_init(&qnap_ts209_pci); |
183 | 183 | ||
184 | return 0; | 184 | return 0; |
@@ -329,4 +329,5 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209") | |||
329 | .init_irq = orion5x_init_irq, | 329 | .init_irq = orion5x_init_irq, |
330 | .timer = &orion5x_timer, | 330 | .timer = &orion5x_timer, |
331 | .fixup = tag_fixup_mem32, | 331 | .fixup = tag_fixup_mem32, |
332 | .restart = orion5x_restart, | ||
332 | MACHINE_END | 333 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c index 0fbcc14e09d7..4e6ff759cd32 100644 --- a/arch/arm/mach-orion5x/ts409-setup.c +++ b/arch/arm/mach-orion5x/ts409-setup.c | |||
@@ -318,4 +318,5 @@ MACHINE_START(TS409, "QNAP TS-409") | |||
318 | .init_irq = orion5x_init_irq, | 318 | .init_irq = orion5x_init_irq, |
319 | .timer = &orion5x_timer, | 319 | .timer = &orion5x_timer, |
320 | .fixup = tag_fixup_mem32, | 320 | .fixup = tag_fixup_mem32, |
321 | .restart = orion5x_restart, | ||
321 | MACHINE_END | 322 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index b35e2005a348..c96f37472eda 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c | |||
@@ -627,4 +627,5 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") | |||
627 | .init_early = orion5x_init_early, | 627 | .init_early = orion5x_init_early, |
628 | .init_irq = orion5x_init_irq, | 628 | .init_irq = orion5x_init_irq, |
629 | .timer = &orion5x_timer, | 629 | .timer = &orion5x_timer, |
630 | .restart = orion5x_restart, | ||
630 | MACHINE_END | 631 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index b8be7d8d0cf4..078c03f7cd52 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c | |||
@@ -179,4 +179,5 @@ MACHINE_START(WNR854T, "Netgear WNR854T") | |||
179 | .init_irq = orion5x_init_irq, | 179 | .init_irq = orion5x_init_irq, |
180 | .timer = &orion5x_timer, | 180 | .timer = &orion5x_timer, |
181 | .fixup = tag_fixup_mem32, | 181 | .fixup = tag_fixup_mem32, |
182 | .restart = orion5x_restart, | ||
182 | MACHINE_END | 183 | MACHINE_END |
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index faf81a039360..46a9778171ce 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c | |||
@@ -267,4 +267,5 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2") | |||
267 | .init_irq = orion5x_init_irq, | 267 | .init_irq = orion5x_init_irq, |
268 | .timer = &orion5x_timer, | 268 | .timer = &orion5x_timer, |
269 | .fixup = tag_fixup_mem32, | 269 | .fixup = tag_fixup_mem32, |
270 | .restart = orion5x_restart, | ||
270 | MACHINE_END | 271 | MACHINE_END |
diff --git a/arch/arm/mach-picoxcell/Makefile b/arch/arm/mach-picoxcell/Makefile index c550b6363488..e5ec4a8d9bcb 100644 --- a/arch/arm/mach-picoxcell/Makefile +++ b/arch/arm/mach-picoxcell/Makefile | |||
@@ -1,3 +1,2 @@ | |||
1 | obj-y := common.o | 1 | obj-y := common.o |
2 | obj-y += time.o | 2 | obj-y += time.o |
3 | obj-y += io.o | ||
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c index ad871bd7b1ab..febee47bc116 100644 --- a/arch/arm/mach-picoxcell/common.c +++ b/arch/arm/mach-picoxcell/common.c | |||
@@ -16,12 +16,25 @@ | |||
16 | 16 | ||
17 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
18 | #include <asm/hardware/vic.h> | 18 | #include <asm/hardware/vic.h> |
19 | #include <asm/mach/map.h> | ||
19 | 20 | ||
20 | #include <mach/map.h> | 21 | #include <mach/map.h> |
21 | #include <mach/picoxcell_soc.h> | 22 | #include <mach/picoxcell_soc.h> |
22 | 23 | ||
23 | #include "common.h" | 24 | #include "common.h" |
24 | 25 | ||
26 | static struct map_desc io_map __initdata = { | ||
27 | .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE), | ||
28 | .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE), | ||
29 | .length = PICOXCELL_PERIPH_LENGTH, | ||
30 | .type = MT_DEVICE, | ||
31 | }; | ||
32 | |||
33 | static void __init picoxcell_map_io(void) | ||
34 | { | ||
35 | iotable_init(&io_map, 1); | ||
36 | } | ||
37 | |||
25 | static void __init picoxcell_init_machine(void) | 38 | static void __init picoxcell_init_machine(void) |
26 | { | 39 | { |
27 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); | 40 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
@@ -45,7 +58,7 @@ static void __init picoxcell_init_irq(void) | |||
45 | 58 | ||
46 | DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") | 59 | DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") |
47 | .map_io = picoxcell_map_io, | 60 | .map_io = picoxcell_map_io, |
48 | .nr_irqs = ARCH_NR_IRQS, | 61 | .nr_irqs = NR_IRQS_LEGACY, |
49 | .init_irq = picoxcell_init_irq, | 62 | .init_irq = picoxcell_init_irq, |
50 | .handle_irq = vic_handle_irq, | 63 | .handle_irq = vic_handle_irq, |
51 | .timer = &picoxcell_timer, | 64 | .timer = &picoxcell_timer, |
diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h index 5263f0fa095c..83d55ab956a4 100644 --- a/arch/arm/mach-picoxcell/common.h +++ b/arch/arm/mach-picoxcell/common.h | |||
@@ -13,6 +13,5 @@ | |||
13 | #include <asm/mach/time.h> | 13 | #include <asm/mach/time.h> |
14 | 14 | ||
15 | extern struct sys_timer picoxcell_timer; | 15 | extern struct sys_timer picoxcell_timer; |
16 | extern void picoxcell_map_io(void); | ||
17 | 16 | ||
18 | #endif /* __PICOXCELL_COMMON_H__ */ | 17 | #endif /* __PICOXCELL_COMMON_H__ */ |
diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h index 4d13ed970919..59eac1ee2820 100644 --- a/arch/arm/mach-picoxcell/include/mach/irqs.h +++ b/arch/arm/mach-picoxcell/include/mach/irqs.h | |||
@@ -1,8 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles | 2 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles |
3 | * | 3 | * |
4 | * This file contains the hardware definitions of the picoXcell SoC devices. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | 4 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 5 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or | 6 | * the Free Software Foundation; either version 2 of the License, or |
@@ -16,10 +14,7 @@ | |||
16 | #ifndef __MACH_IRQS_H | 14 | #ifndef __MACH_IRQS_H |
17 | #define __MACH_IRQS_H | 15 | #define __MACH_IRQS_H |
18 | 16 | ||
19 | #define ARCH_NR_IRQS 64 | 17 | /* We dynamically allocate our irq_desc's. */ |
20 | #define NR_IRQS (128 + ARCH_NR_IRQS) | 18 | #define NR_IRQS 0 |
21 | |||
22 | #define IRQ_VIC0_BASE 0 | ||
23 | #define IRQ_VIC1_BASE 32 | ||
24 | 19 | ||
25 | #endif /* __MACH_IRQS_H */ | 20 | #endif /* __MACH_IRQS_H */ |
diff --git a/arch/arm/mach-picoxcell/include/mach/memory.h b/arch/arm/mach-picoxcell/include/mach/memory.h deleted file mode 100644 index 40a8c178f10d..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/memory.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* empty */ | ||
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h index 67c589b0c1bc..1a5d8cb57df4 100644 --- a/arch/arm/mach-picoxcell/include/mach/system.h +++ b/arch/arm/mach-picoxcell/include/mach/system.h | |||
@@ -23,9 +23,4 @@ static inline void arch_idle(void) | |||
23 | cpu_do_idle(); | 23 | cpu_do_idle(); |
24 | } | 24 | } |
25 | 25 | ||
26 | static inline void arch_reset(int mode, const char *cmd) | ||
27 | { | ||
28 | /* Watchdog reset to go here. */ | ||
29 | } | ||
30 | |||
31 | #endif /* __ASM_ARCH_SYSTEM_H */ | 26 | #endif /* __ASM_ARCH_SYSTEM_H */ |
diff --git a/arch/arm/mach-picoxcell/io.c b/arch/arm/mach-picoxcell/io.c deleted file mode 100644 index 39e9b9e8cc37..000000000000 --- a/arch/arm/mach-picoxcell/io.c +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | * | ||
8 | * All enquiries to support@picochip.com | ||
9 | */ | ||
10 | #include <linux/io.h> | ||
11 | #include <linux/mm.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/of.h> | ||
14 | |||
15 | #include <asm/mach/map.h> | ||
16 | |||
17 | #include <mach/map.h> | ||
18 | #include <mach/picoxcell_soc.h> | ||
19 | |||
20 | #include "common.h" | ||
21 | |||
22 | void __init picoxcell_map_io(void) | ||
23 | { | ||
24 | struct map_desc io_map = { | ||
25 | .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE), | ||
26 | .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE), | ||
27 | .length = PICOXCELL_PERIPH_LENGTH, | ||
28 | .type = MT_DEVICE, | ||
29 | }; | ||
30 | |||
31 | iotable_init(&io_map, 1); | ||
32 | } | ||
diff --git a/arch/arm/mach-picoxcell/time.c b/arch/arm/mach-picoxcell/time.c index 90a554ff4499..6c89cf8ab22e 100644 --- a/arch/arm/mach-picoxcell/time.c +++ b/arch/arm/mach-picoxcell/time.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/of.h> | 11 | #include <linux/of.h> |
12 | #include <linux/of_address.h> | 12 | #include <linux/of_address.h> |
13 | #include <linux/of_irq.h> | 13 | #include <linux/of_irq.h> |
14 | #include <linux/sched.h> | ||
15 | 14 | ||
16 | #include <asm/mach/time.h> | 15 | #include <asm/mach/time.h> |
17 | #include <asm/sched_clock.h> | 16 | #include <asm/sched_clock.h> |
@@ -66,21 +65,11 @@ static void picoxcell_add_clocksource(struct device_node *source_timer) | |||
66 | dw_apb_clocksource_register(cs); | 65 | dw_apb_clocksource_register(cs); |
67 | } | 66 | } |
68 | 67 | ||
69 | static DEFINE_CLOCK_DATA(cd); | ||
70 | static void __iomem *sched_io_base; | 68 | static void __iomem *sched_io_base; |
71 | 69 | ||
72 | unsigned long long notrace sched_clock(void) | 70 | unsigned u32 notrace picoxcell_read_sched_clock(void) |
73 | { | 71 | { |
74 | cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0; | 72 | return __raw_readl(sched_io_base); |
75 | |||
76 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
77 | } | ||
78 | |||
79 | static void notrace picoxcell_update_sched_clock(void) | ||
80 | { | ||
81 | cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0; | ||
82 | |||
83 | update_sched_clock(&cd, cyc, (u32)~0); | ||
84 | } | 73 | } |
85 | 74 | ||
86 | static const struct of_device_id picoxcell_rtc_ids[] __initconst = { | 75 | static const struct of_device_id picoxcell_rtc_ids[] __initconst = { |
@@ -100,7 +89,7 @@ static void picoxcell_init_sched_clock(void) | |||
100 | timer_get_base_and_rate(sched_timer, &sched_io_base, &rate); | 89 | timer_get_base_and_rate(sched_timer, &sched_io_base, &rate); |
101 | of_node_put(sched_timer); | 90 | of_node_put(sched_timer); |
102 | 91 | ||
103 | init_sched_clock(&cd, picoxcell_update_sched_clock, 32, rate); | 92 | setup_sched_clock(picoxcell_read_sched_clock, 32, rate); |
104 | } | 93 | } |
105 | 94 | ||
106 | static const struct of_device_id picoxcell_timer_ids[] __initconst = { | 95 | static const struct of_device_id picoxcell_timer_ids[] __initconst = { |
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c index cdb95e726f5c..4cfb40b2ec19 100644 --- a/arch/arm/mach-pnx4008/core.c +++ b/arch/arm/mach-pnx4008/core.c | |||
@@ -260,6 +260,11 @@ void __init pnx4008_map_io(void) | |||
260 | iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc)); | 260 | iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc)); |
261 | } | 261 | } |
262 | 262 | ||
263 | static void pnx4008_restart(char mode, const char *cmd) | ||
264 | { | ||
265 | soft_restart(0); | ||
266 | } | ||
267 | |||
263 | extern struct sys_timer pnx4008_timer; | 268 | extern struct sys_timer pnx4008_timer; |
264 | 269 | ||
265 | MACHINE_START(PNX4008, "Philips PNX4008") | 270 | MACHINE_START(PNX4008, "Philips PNX4008") |
@@ -269,4 +274,5 @@ MACHINE_START(PNX4008, "Philips PNX4008") | |||
269 | .init_irq = pnx4008_init_irq, | 274 | .init_irq = pnx4008_init_irq, |
270 | .init_machine = pnx4008_init, | 275 | .init_machine = pnx4008_init, |
271 | .timer = &pnx4008_timer, | 276 | .timer = &pnx4008_timer, |
277 | .restart = pnx4008_restart, | ||
272 | MACHINE_END | 278 | MACHINE_END |
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h index 5d6384a6128c..60cfe7188091 100644 --- a/arch/arm/mach-pnx4008/include/mach/system.h +++ b/arch/arm/mach-pnx4008/include/mach/system.h | |||
@@ -21,18 +21,9 @@ | |||
21 | #ifndef __ASM_ARCH_SYSTEM_H | 21 | #ifndef __ASM_ARCH_SYSTEM_H |
22 | #define __ASM_ARCH_SYSTEM_H | 22 | #define __ASM_ARCH_SYSTEM_H |
23 | 23 | ||
24 | #include <linux/io.h> | ||
25 | #include <mach/hardware.h> | ||
26 | #include <mach/platform.h> | ||
27 | |||
28 | static void arch_idle(void) | 24 | static void arch_idle(void) |
29 | { | 25 | { |
30 | cpu_do_idle(); | 26 | cpu_do_idle(); |
31 | } | 27 | } |
32 | 28 | ||
33 | static inline void arch_reset(char mode, const char *cmd) | ||
34 | { | ||
35 | soft_restart(0); | ||
36 | } | ||
37 | |||
38 | #endif | 29 | #endif |
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h index 83e5d2128118..b28a930d4f8a 100644 --- a/arch/arm/mach-prima2/common.h +++ b/arch/arm/mach-prima2/common.h | |||
@@ -16,6 +16,7 @@ extern struct sys_timer sirfsoc_timer; | |||
16 | 16 | ||
17 | extern void __init sirfsoc_of_irq_init(void); | 17 | extern void __init sirfsoc_of_irq_init(void); |
18 | extern void __init sirfsoc_of_clk_init(void); | 18 | extern void __init sirfsoc_of_clk_init(void); |
19 | extern void sirfsoc_restart(char, const char *); | ||
19 | 20 | ||
20 | #ifndef CONFIG_DEBUG_LL | 21 | #ifndef CONFIG_DEBUG_LL |
21 | static inline void sirfsoc_map_lluart(void) {} | 22 | static inline void sirfsoc_map_lluart(void) {} |
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h index 0dbd257ad16d..2c7d2a9d0c92 100644 --- a/arch/arm/mach-prima2/include/mach/system.h +++ b/arch/arm/mach-prima2/include/mach/system.h | |||
@@ -9,21 +9,9 @@ | |||
9 | #ifndef __MACH_SYSTEM_H__ | 9 | #ifndef __MACH_SYSTEM_H__ |
10 | #define __MACH_SYSTEM_H__ | 10 | #define __MACH_SYSTEM_H__ |
11 | 11 | ||
12 | #include <linux/bitops.h> | ||
13 | #include <mach/hardware.h> | ||
14 | |||
15 | #define SIRFSOC_SYS_RST_BIT BIT(31) | ||
16 | |||
17 | extern void __iomem *sirfsoc_rstc_base; | ||
18 | |||
19 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
20 | { | 13 | { |
21 | cpu_do_idle(); | 14 | cpu_do_idle(); |
22 | } | 15 | } |
23 | 16 | ||
24 | static inline void arch_reset(char mode, const char *cmd) | ||
25 | { | ||
26 | writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base); | ||
27 | } | ||
28 | |||
29 | #endif | 17 | #endif |
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c index a12b689a8702..02b9c05ff990 100644 --- a/arch/arm/mach-prima2/prima2.c +++ b/arch/arm/mach-prima2/prima2.c | |||
@@ -40,4 +40,5 @@ MACHINE_START(PRIMA2_EVB, "prima2cb") | |||
40 | .dma_zone_size = SZ_256M, | 40 | .dma_zone_size = SZ_256M, |
41 | .init_machine = sirfsoc_mach_init, | 41 | .init_machine = sirfsoc_mach_init, |
42 | .dt_compat = prima2cb_dt_match, | 42 | .dt_compat = prima2cb_dt_match, |
43 | .restart = sirfsoc_restart, | ||
43 | MACHINE_END | 44 | MACHINE_END |
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c index 492cfa8d2610..762adb73ab7c 100644 --- a/arch/arm/mach-prima2/rstc.c +++ b/arch/arm/mach-prima2/rstc.c | |||
@@ -68,3 +68,10 @@ int sirfsoc_reset_device(struct device *dev) | |||
68 | 68 | ||
69 | return 0; | 69 | return 0; |
70 | } | 70 | } |
71 | |||
72 | #define SIRFSOC_SYS_RST_BIT BIT(31) | ||
73 | |||
74 | void sirfsoc_restart(char mode, const char *cmd) | ||
75 | { | ||
76 | writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base); | ||
77 | } | ||
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 4b81f59a4cba..82514f5c38f1 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c | |||
@@ -829,4 +829,5 @@ MACHINE_START(BALLOON3, "Balloon3") | |||
829 | .timer = &pxa_timer, | 829 | .timer = &pxa_timer, |
830 | .init_machine = balloon3_init, | 830 | .init_machine = balloon3_init, |
831 | .atag_offset = 0x100, | 831 | .atag_offset = 0x100, |
832 | .restart = pxa_restart, | ||
832 | MACHINE_END | 833 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c index 4efc16d39c79..c2f0be040d27 100644 --- a/arch/arm/mach-pxa/capc7117.c +++ b/arch/arm/mach-pxa/capc7117.c | |||
@@ -153,5 +153,6 @@ MACHINE_START(CAPC7117, | |||
153 | .init_irq = pxa3xx_init_irq, | 153 | .init_irq = pxa3xx_init_irq, |
154 | .handle_irq = pxa3xx_handle_irq, | 154 | .handle_irq = pxa3xx_handle_irq, |
155 | .timer = &pxa_timer, | 155 | .timer = &pxa_timer, |
156 | .init_machine = capc7117_init | 156 | .init_machine = capc7117_init, |
157 | .restart = pxa_restart, | ||
157 | MACHINE_END | 158 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index f2e4190080cb..ec170a552c23 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c | |||
@@ -524,4 +524,5 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX") | |||
524 | #ifdef CONFIG_PCI | 524 | #ifdef CONFIG_PCI |
525 | .dma_zone_size = SZ_64M, | 525 | .dma_zone_size = SZ_64M, |
526 | #endif | 526 | #endif |
527 | .restart = pxa_restart, | ||
527 | MACHINE_END | 528 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index e096bba8fd57..7236974da0b7 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c | |||
@@ -858,4 +858,5 @@ MACHINE_START(CM_X300, "CM-X300 module") | |||
858 | .timer = &pxa_timer, | 858 | .timer = &pxa_timer, |
859 | .init_machine = cm_x300_init, | 859 | .init_machine = cm_x300_init, |
860 | .fixup = cm_x300_fixup, | 860 | .fixup = cm_x300_fixup, |
861 | .restart = pxa_restart, | ||
861 | MACHINE_END | 862 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 05bfa1b1c001..6a685165c9f2 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c | |||
@@ -313,6 +313,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270") | |||
313 | .init_irq = pxa27x_init_irq, | 313 | .init_irq = pxa27x_init_irq, |
314 | .handle_irq = pxa27x_handle_irq, | 314 | .handle_irq = pxa27x_handle_irq, |
315 | .timer = &pxa_timer, | 315 | .timer = &pxa_timer, |
316 | .restart = pxa_restart, | ||
316 | MACHINE_END | 317 | MACHINE_END |
317 | 318 | ||
318 | MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") | 319 | MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") |
@@ -322,5 +323,6 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") | |||
322 | .init_irq = pxa27x_init_irq, | 323 | .init_irq = pxa27x_init_irq, |
323 | .handle_irq = pxa27x_handle_irq, | 324 | .handle_irq = pxa27x_handle_irq, |
324 | .timer = &pxa_timer, | 325 | .timer = &pxa_timer, |
326 | .restart = pxa_restart, | ||
325 | MACHINE_END | 327 | MACHINE_END |
326 | 328 | ||
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index c825e8bf2db1..c01059a61f33 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c | |||
@@ -189,5 +189,6 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") | |||
189 | .init_irq = pxa3xx_init_irq, | 189 | .init_irq = pxa3xx_init_irq, |
190 | .handle_irq = pxa3xx_handle_irq, | 190 | .handle_irq = pxa3xx_handle_irq, |
191 | .timer = &pxa_timer, | 191 | .timer = &pxa_timer, |
192 | .restart = pxa_restart, | ||
192 | MACHINE_END | 193 | MACHINE_END |
193 | 194 | ||
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index d23b92b80488..5028f2300d50 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c | |||
@@ -259,5 +259,6 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") | |||
259 | .init_irq = pxa3xx_init_irq, | 259 | .init_irq = pxa3xx_init_irq, |
260 | .handle_irq = pxa3xx_handle_irq, | 260 | .handle_irq = pxa3xx_handle_irq, |
261 | .timer = &pxa_timer, | 261 | .timer = &pxa_timer, |
262 | .restart = pxa_restart, | ||
262 | MACHINE_END | 263 | MACHINE_END |
263 | 264 | ||
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 549468d088b9..9d4dc5970b9c 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -655,7 +655,7 @@ static void corgi_poweroff(void) | |||
655 | /* Green LED off tells the bootloader to halt */ | 655 | /* Green LED off tells the bootloader to halt */ |
656 | gpio_set_value(CORGI_GPIO_LED_GREEN, 0); | 656 | gpio_set_value(CORGI_GPIO_LED_GREEN, 0); |
657 | 657 | ||
658 | arm_machine_restart('h', NULL); | 658 | pxa_restart('h', NULL); |
659 | } | 659 | } |
660 | 660 | ||
661 | static void corgi_restart(char mode, const char *cmd) | 661 | static void corgi_restart(char mode, const char *cmd) |
@@ -664,13 +664,12 @@ static void corgi_restart(char mode, const char *cmd) | |||
664 | /* Green LED on tells the bootloader to reboot */ | 664 | /* Green LED on tells the bootloader to reboot */ |
665 | gpio_set_value(CORGI_GPIO_LED_GREEN, 1); | 665 | gpio_set_value(CORGI_GPIO_LED_GREEN, 1); |
666 | 666 | ||
667 | arm_machine_restart('h', cmd); | 667 | pxa_restart('h', cmd); |
668 | } | 668 | } |
669 | 669 | ||
670 | static void __init corgi_init(void) | 670 | static void __init corgi_init(void) |
671 | { | 671 | { |
672 | pm_power_off = corgi_poweroff; | 672 | pm_power_off = corgi_poweroff; |
673 | arm_pm_restart = corgi_restart; | ||
674 | 673 | ||
675 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ | 674 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ |
676 | PCFR |= PCFR_OPDE; | 675 | PCFR |= PCFR_OPDE; |
@@ -726,6 +725,7 @@ MACHINE_START(CORGI, "SHARP Corgi") | |||
726 | .handle_irq = pxa25x_handle_irq, | 725 | .handle_irq = pxa25x_handle_irq, |
727 | .init_machine = corgi_init, | 726 | .init_machine = corgi_init, |
728 | .timer = &pxa_timer, | 727 | .timer = &pxa_timer, |
728 | .restart = corgi_restart, | ||
729 | MACHINE_END | 729 | MACHINE_END |
730 | #endif | 730 | #endif |
731 | 731 | ||
@@ -737,6 +737,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd") | |||
737 | .handle_irq = pxa25x_handle_irq, | 737 | .handle_irq = pxa25x_handle_irq, |
738 | .init_machine = corgi_init, | 738 | .init_machine = corgi_init, |
739 | .timer = &pxa_timer, | 739 | .timer = &pxa_timer, |
740 | .restart = corgi_restart, | ||
740 | MACHINE_END | 741 | MACHINE_END |
741 | #endif | 742 | #endif |
742 | 743 | ||
@@ -748,6 +749,7 @@ MACHINE_START(HUSKY, "SHARP Husky") | |||
748 | .handle_irq = pxa25x_handle_irq, | 749 | .handle_irq = pxa25x_handle_irq, |
749 | .init_machine = corgi_init, | 750 | .init_machine = corgi_init, |
750 | .timer = &pxa_timer, | 751 | .timer = &pxa_timer, |
752 | .restart = corgi_restart, | ||
751 | MACHINE_END | 753 | MACHINE_END |
752 | #endif | 754 | #endif |
753 | 755 | ||
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 5e2cf39e9e4c..fb5a51d834e5 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c | |||
@@ -278,4 +278,5 @@ MACHINE_START(CSB726, "Cogent CSB726") | |||
278 | .handle_irq = pxa27x_handle_irq, | 278 | .handle_irq = pxa27x_handle_irq, |
279 | .init_machine = csb726_init, | 279 | .init_machine = csb726_init, |
280 | .timer = &pxa_timer, | 280 | .timer = &pxa_timer, |
281 | .restart = pxa_restart, | ||
281 | MACHINE_END | 282 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index 94acc0b01dd6..bd396ba67af7 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c | |||
@@ -1305,6 +1305,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270") | |||
1305 | .handle_irq = pxa27x_handle_irq, | 1305 | .handle_irq = pxa27x_handle_irq, |
1306 | .timer = &pxa_timer, | 1306 | .timer = &pxa_timer, |
1307 | .init_machine = em_x270_init, | 1307 | .init_machine = em_x270_init, |
1308 | .restart = pxa_restart, | ||
1308 | MACHINE_END | 1309 | MACHINE_END |
1309 | 1310 | ||
1310 | MACHINE_START(EXEDA, "Compulab eXeda") | 1311 | MACHINE_START(EXEDA, "Compulab eXeda") |
@@ -1314,4 +1315,5 @@ MACHINE_START(EXEDA, "Compulab eXeda") | |||
1314 | .handle_irq = pxa27x_handle_irq, | 1315 | .handle_irq = pxa27x_handle_irq, |
1315 | .timer = &pxa_timer, | 1316 | .timer = &pxa_timer, |
1316 | .init_machine = em_x270_init, | 1317 | .init_machine = em_x270_init, |
1318 | .restart = pxa_restart, | ||
1317 | MACHINE_END | 1319 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index d82b7aa3c096..69473db97758 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c | |||
@@ -196,6 +196,7 @@ MACHINE_START(E330, "Toshiba e330") | |||
196 | .fixup = eseries_fixup, | 196 | .fixup = eseries_fixup, |
197 | .init_machine = e330_init, | 197 | .init_machine = e330_init, |
198 | .timer = &pxa_timer, | 198 | .timer = &pxa_timer, |
199 | .restart = pxa_restart, | ||
199 | MACHINE_END | 200 | MACHINE_END |
200 | #endif | 201 | #endif |
201 | 202 | ||
@@ -246,6 +247,7 @@ MACHINE_START(E350, "Toshiba e350") | |||
246 | .fixup = eseries_fixup, | 247 | .fixup = eseries_fixup, |
247 | .init_machine = e350_init, | 248 | .init_machine = e350_init, |
248 | .timer = &pxa_timer, | 249 | .timer = &pxa_timer, |
250 | .restart = pxa_restart, | ||
249 | MACHINE_END | 251 | MACHINE_END |
250 | #endif | 252 | #endif |
251 | 253 | ||
@@ -369,6 +371,7 @@ MACHINE_START(E400, "Toshiba e400") | |||
369 | .fixup = eseries_fixup, | 371 | .fixup = eseries_fixup, |
370 | .init_machine = e400_init, | 372 | .init_machine = e400_init, |
371 | .timer = &pxa_timer, | 373 | .timer = &pxa_timer, |
374 | .restart = pxa_restart, | ||
372 | MACHINE_END | 375 | MACHINE_END |
373 | #endif | 376 | #endif |
374 | 377 | ||
@@ -558,6 +561,7 @@ MACHINE_START(E740, "Toshiba e740") | |||
558 | .fixup = eseries_fixup, | 561 | .fixup = eseries_fixup, |
559 | .init_machine = e740_init, | 562 | .init_machine = e740_init, |
560 | .timer = &pxa_timer, | 563 | .timer = &pxa_timer, |
564 | .restart = pxa_restart, | ||
561 | MACHINE_END | 565 | MACHINE_END |
562 | #endif | 566 | #endif |
563 | 567 | ||
@@ -750,6 +754,7 @@ MACHINE_START(E750, "Toshiba e750") | |||
750 | .fixup = eseries_fixup, | 754 | .fixup = eseries_fixup, |
751 | .init_machine = e750_init, | 755 | .init_machine = e750_init, |
752 | .timer = &pxa_timer, | 756 | .timer = &pxa_timer, |
757 | .restart = pxa_restart, | ||
753 | MACHINE_END | 758 | MACHINE_END |
754 | #endif | 759 | #endif |
755 | 760 | ||
@@ -955,5 +960,6 @@ MACHINE_START(E800, "Toshiba e800") | |||
955 | .fixup = eseries_fixup, | 960 | .fixup = eseries_fixup, |
956 | .init_machine = e800_init, | 961 | .init_machine = e800_init, |
957 | .timer = &pxa_timer, | 962 | .timer = &pxa_timer, |
963 | .restart = pxa_restart, | ||
958 | MACHINE_END | 964 | MACHINE_END |
959 | #endif | 965 | #endif |
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index 8308eee5a924..15ab2533667d 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c | |||
@@ -804,6 +804,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780") | |||
804 | .handle_irq = pxa27x_handle_irq, | 804 | .handle_irq = pxa27x_handle_irq, |
805 | .timer = &pxa_timer, | 805 | .timer = &pxa_timer, |
806 | .init_machine = a780_init, | 806 | .init_machine = a780_init, |
807 | .restart = pxa_restart, | ||
807 | MACHINE_END | 808 | MACHINE_END |
808 | #endif | 809 | #endif |
809 | 810 | ||
@@ -870,6 +871,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680") | |||
870 | .handle_irq = pxa27x_handle_irq, | 871 | .handle_irq = pxa27x_handle_irq, |
871 | .timer = &pxa_timer, | 872 | .timer = &pxa_timer, |
872 | .init_machine = e680_init, | 873 | .init_machine = e680_init, |
874 | .restart = pxa_restart, | ||
873 | MACHINE_END | 875 | MACHINE_END |
874 | #endif | 876 | #endif |
875 | 877 | ||
@@ -936,6 +938,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200") | |||
936 | .handle_irq = pxa27x_handle_irq, | 938 | .handle_irq = pxa27x_handle_irq, |
937 | .timer = &pxa_timer, | 939 | .timer = &pxa_timer, |
938 | .init_machine = a1200_init, | 940 | .init_machine = a1200_init, |
941 | .restart = pxa_restart, | ||
939 | MACHINE_END | 942 | MACHINE_END |
940 | #endif | 943 | #endif |
941 | 944 | ||
@@ -1127,6 +1130,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910") | |||
1127 | .handle_irq = pxa27x_handle_irq, | 1130 | .handle_irq = pxa27x_handle_irq, |
1128 | .timer = &pxa_timer, | 1131 | .timer = &pxa_timer, |
1129 | .init_machine = a910_init, | 1132 | .init_machine = a910_init, |
1133 | .restart = pxa_restart, | ||
1130 | MACHINE_END | 1134 | MACHINE_END |
1131 | #endif | 1135 | #endif |
1132 | 1136 | ||
@@ -1193,6 +1197,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6") | |||
1193 | .handle_irq = pxa27x_handle_irq, | 1197 | .handle_irq = pxa27x_handle_irq, |
1194 | .timer = &pxa_timer, | 1198 | .timer = &pxa_timer, |
1195 | .init_machine = e6_init, | 1199 | .init_machine = e6_init, |
1200 | .restart = pxa_restart, | ||
1196 | MACHINE_END | 1201 | MACHINE_END |
1197 | #endif | 1202 | #endif |
1198 | 1203 | ||
@@ -1233,5 +1238,6 @@ MACHINE_START(EZX_E2, "Motorola EZX E2") | |||
1233 | .handle_irq = pxa27x_handle_irq, | 1238 | .handle_irq = pxa27x_handle_irq, |
1234 | .timer = &pxa_timer, | 1239 | .timer = &pxa_timer, |
1235 | .init_machine = e2_init, | 1240 | .init_machine = e2_init, |
1241 | .restart = pxa_restart, | ||
1236 | MACHINE_END | 1242 | MACHINE_END |
1237 | #endif | 1243 | #endif |
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 92a2e85ab02c..0d729e6619df 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h | |||
@@ -57,3 +57,5 @@ void __init pxa_set_ffuart_info(void *info); | |||
57 | void __init pxa_set_btuart_info(void *info); | 57 | void __init pxa_set_btuart_info(void *info); |
58 | void __init pxa_set_stuart_info(void *info); | 58 | void __init pxa_set_stuart_info(void *info); |
59 | void __init pxa_set_hwuart_info(void *info); | 59 | void __init pxa_set_hwuart_info(void *info); |
60 | |||
61 | void pxa_restart(char, const char *); | ||
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index ffdd70dad327..ac3b1cef4751 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c | |||
@@ -239,4 +239,5 @@ MACHINE_START(GUMSTIX, "Gumstix") | |||
239 | .handle_irq = pxa25x_handle_irq, | 239 | .handle_irq = pxa25x_handle_irq, |
240 | .timer = &pxa_timer, | 240 | .timer = &pxa_timer, |
241 | .init_machine = gumstix_init, | 241 | .init_machine = gumstix_init, |
242 | .restart = pxa_restart, | ||
242 | MACHINE_END | 243 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index 4b5e110640b1..fde6b4c873c4 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c | |||
@@ -209,4 +209,5 @@ MACHINE_START(H5400, "HP iPAQ H5000") | |||
209 | .handle_irq = pxa25x_handle_irq, | 209 | .handle_irq = pxa25x_handle_irq, |
210 | .timer = &pxa_timer, | 210 | .timer = &pxa_timer, |
211 | .init_machine = h5000_init, | 211 | .init_machine = h5000_init, |
212 | .restart = pxa_restart, | ||
212 | MACHINE_END | 213 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index f2c324570844..26d069a9f900 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c | |||
@@ -164,4 +164,5 @@ MACHINE_START(HIMALAYA, "HTC Himalaya") | |||
164 | .handle_irq = pxa25x_handle_irq, | 164 | .handle_irq = pxa25x_handle_irq, |
165 | .init_machine = himalaya_init, | 165 | .init_machine = himalaya_init, |
166 | .timer = &pxa_timer, | 166 | .timer = &pxa_timer, |
167 | .restart = pxa_restart, | ||
167 | MACHINE_END | 168 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index 6f6368ece9bd..ce16bdae96de 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c | |||
@@ -845,4 +845,5 @@ MACHINE_START(H4700, "HP iPAQ HX4700") | |||
845 | .handle_irq = pxa27x_handle_irq, | 845 | .handle_irq = pxa27x_handle_irq, |
846 | .init_machine = hx4700_init, | 846 | .init_machine = hx4700_init, |
847 | .timer = &pxa_timer, | 847 | .timer = &pxa_timer, |
848 | .restart = pxa_restart, | ||
848 | MACHINE_END | 849 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c index f78d5db758da..e239b82c99d7 100644 --- a/arch/arm/mach-pxa/icontrol.c +++ b/arch/arm/mach-pxa/icontrol.c | |||
@@ -196,5 +196,6 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") | |||
196 | .init_irq = pxa3xx_init_irq, | 196 | .init_irq = pxa3xx_init_irq, |
197 | .handle_irq = pxa3xx_handle_irq, | 197 | .handle_irq = pxa3xx_handle_irq, |
198 | .timer = &pxa_timer, | 198 | .timer = &pxa_timer, |
199 | .init_machine = icontrol_init | 199 | .init_machine = icontrol_init, |
200 | .restart = pxa_restart, | ||
200 | MACHINE_END | 201 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index ddf20e5c376e..fbabd84e110c 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c | |||
@@ -199,4 +199,5 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") | |||
199 | .handle_irq = pxa25x_handle_irq, | 199 | .handle_irq = pxa25x_handle_irq, |
200 | .timer = &pxa_timer, | 200 | .timer = &pxa_timer, |
201 | .init_machine = idp_init, | 201 | .init_machine = idp_init, |
202 | .restart = pxa_restart, | ||
202 | MACHINE_END | 203 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h index d1fce8b6d105..c5afacd3cc0b 100644 --- a/arch/arm/mach-pxa/include/mach/system.h +++ b/arch/arm/mach-pxa/include/mach/system.h | |||
@@ -9,15 +9,7 @@ | |||
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | |||
13 | #include <asm/proc-fns.h> | ||
14 | #include "hardware.h" | ||
15 | #include "pxa2xx-regs.h" | ||
16 | |||
17 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
18 | { | 13 | { |
19 | cpu_do_idle(); | 14 | cpu_do_idle(); |
20 | } | 15 | } |
21 | |||
22 | |||
23 | void arch_reset(char mode, const char *cmd); | ||
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index 7b324ec6449f..c337c7eed514 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
@@ -445,4 +445,5 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto | |||
445 | .handle_irq = pxa3xx_handle_irq, | 445 | .handle_irq = pxa3xx_handle_irq, |
446 | .timer = &pxa_timer, | 446 | .timer = &pxa_timer, |
447 | .init_machine = littleton_init, | 447 | .init_machine = littleton_init, |
448 | .restart = pxa_restart, | ||
448 | MACHINE_END | 449 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 1dd530279e0b..6119c015f393 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
@@ -505,4 +505,5 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") | |||
505 | .handle_irq = pxa27x_handle_irq, | 505 | .handle_irq = pxa27x_handle_irq, |
506 | .timer = &pxa_timer, | 506 | .timer = &pxa_timer, |
507 | .init_machine = lpd270_init, | 507 | .init_machine = lpd270_init, |
508 | .restart = pxa_restart, | ||
508 | MACHINE_END | 509 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index c48ce6da9184..4b7a52871652 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -556,4 +556,5 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") | |||
556 | .handle_irq = pxa25x_handle_irq, | 556 | .handle_irq = pxa25x_handle_irq, |
557 | .timer = &pxa_timer, | 557 | .timer = &pxa_timer, |
558 | .init_machine = lubbock_init, | 558 | .init_machine = lubbock_init, |
559 | .restart = pxa_restart, | ||
559 | MACHINE_END | 560 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 4b796c37af3e..4e6774fff422 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
@@ -760,4 +760,5 @@ MACHINE_START(MAGICIAN, "HTC Magician") | |||
760 | .handle_irq = pxa27x_handle_irq, | 760 | .handle_irq = pxa27x_handle_irq, |
761 | .init_machine = magician_init, | 761 | .init_machine = magician_init, |
762 | .timer = &pxa_timer, | 762 | .timer = &pxa_timer, |
763 | .restart = pxa_restart, | ||
763 | MACHINE_END | 764 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 0567d3965fda..ca14555d5e15 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -622,4 +622,5 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") | |||
622 | .handle_irq = pxa27x_handle_irq, | 622 | .handle_irq = pxa27x_handle_irq, |
623 | .timer = &pxa_timer, | 623 | .timer = &pxa_timer, |
624 | .init_machine = mainstone_init, | 624 | .init_machine = mainstone_init, |
625 | .restart = pxa_restart, | ||
625 | MACHINE_END | 626 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index f2d75217eb60..dce71b4a3a55 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c | |||
@@ -692,13 +692,13 @@ static void mioa701_machine_exit(void); | |||
692 | static void mioa701_poweroff(void) | 692 | static void mioa701_poweroff(void) |
693 | { | 693 | { |
694 | mioa701_machine_exit(); | 694 | mioa701_machine_exit(); |
695 | arm_machine_restart('s', NULL); | 695 | pxa_restart('s', NULL); |
696 | } | 696 | } |
697 | 697 | ||
698 | static void mioa701_restart(char c, const char *cmd) | 698 | static void mioa701_restart(char c, const char *cmd) |
699 | { | 699 | { |
700 | mioa701_machine_exit(); | 700 | mioa701_machine_exit(); |
701 | arm_machine_restart('s', cmd); | 701 | pxa_restart('s', cmd); |
702 | } | 702 | } |
703 | 703 | ||
704 | static struct gpio global_gpios[] = { | 704 | static struct gpio global_gpios[] = { |
@@ -739,7 +739,6 @@ static void __init mioa701_machine_init(void) | |||
739 | pxa_set_udc_info(&mioa701_udc_info); | 739 | pxa_set_udc_info(&mioa701_udc_info); |
740 | pxa_set_ac97_info(&mioa701_ac97_info); | 740 | pxa_set_ac97_info(&mioa701_ac97_info); |
741 | pm_power_off = mioa701_poweroff; | 741 | pm_power_off = mioa701_poweroff; |
742 | arm_pm_restart = mioa701_restart; | ||
743 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 742 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
744 | gsm_init(); | 743 | gsm_init(); |
745 | 744 | ||
@@ -763,4 +762,5 @@ MACHINE_START(MIOA701, "MIO A701") | |||
763 | .handle_irq = &pxa27x_handle_irq, | 762 | .handle_irq = &pxa27x_handle_irq, |
764 | .init_machine = mioa701_machine_init, | 763 | .init_machine = mioa701_machine_init, |
765 | .timer = &pxa_timer, | 764 | .timer = &pxa_timer, |
765 | .restart = mioa701_restart, | ||
766 | MACHINE_END | 766 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c index 4af5d513c380..169bf8f97af0 100644 --- a/arch/arm/mach-pxa/mp900.c +++ b/arch/arm/mach-pxa/mp900.c | |||
@@ -98,5 +98,6 @@ MACHINE_START(NEC_MP900, "MobilePro900/C") | |||
98 | .init_irq = pxa25x_init_irq, | 98 | .init_irq = pxa25x_init_irq, |
99 | .handle_irq = pxa25x_handle_irq, | 99 | .handle_irq = pxa25x_handle_irq, |
100 | .init_machine = mp900c_init, | 100 | .init_machine = mp900c_init, |
101 | .restart = pxa_restart, | ||
101 | MACHINE_END | 102 | MACHINE_END |
102 | 103 | ||
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 3d4a2819cae1..1fa80f4f80c8 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c | |||
@@ -347,5 +347,6 @@ MACHINE_START(PALMLD, "Palm LifeDrive") | |||
347 | .init_irq = pxa27x_init_irq, | 347 | .init_irq = pxa27x_init_irq, |
348 | .handle_irq = pxa27x_handle_irq, | 348 | .handle_irq = pxa27x_handle_irq, |
349 | .timer = &pxa_timer, | 349 | .timer = &pxa_timer, |
350 | .init_machine = palmld_init | 350 | .init_machine = palmld_init, |
351 | .restart = pxa_restart, | ||
351 | MACHINE_END | 352 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index 99d6bcf1f974..5ba14316bd9c 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c | |||
@@ -208,5 +208,6 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5") | |||
208 | .init_irq = pxa27x_init_irq, | 208 | .init_irq = pxa27x_init_irq, |
209 | .handle_irq = pxa27x_handle_irq, | 209 | .handle_irq = pxa27x_handle_irq, |
210 | .timer = &pxa_timer, | 210 | .timer = &pxa_timer, |
211 | .init_machine = palmt5_init | 211 | .init_machine = palmt5_init, |
212 | .restart = pxa_restart, | ||
212 | MACHINE_END | 213 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 2c24c67fd92b..29b51b40f09d 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c | |||
@@ -542,5 +542,6 @@ MACHINE_START(PALMTC, "Palm Tungsten|C") | |||
542 | .init_irq = pxa25x_init_irq, | 542 | .init_irq = pxa25x_init_irq, |
543 | .handle_irq = pxa25x_handle_irq, | 543 | .handle_irq = pxa25x_handle_irq, |
544 | .timer = &pxa_timer, | 544 | .timer = &pxa_timer, |
545 | .init_machine = palmtc_init | 545 | .init_machine = palmtc_init, |
546 | .restart = pxa_restart, | ||
546 | MACHINE_END | 547 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 9376da06404c..5ebf49acb827 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c | |||
@@ -361,5 +361,6 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2") | |||
361 | .init_irq = pxa25x_init_irq, | 361 | .init_irq = pxa25x_init_irq, |
362 | .handle_irq = pxa25x_handle_irq, | 362 | .handle_irq = pxa25x_handle_irq, |
363 | .timer = &pxa_timer, | 363 | .timer = &pxa_timer, |
364 | .init_machine = palmte2_init | 364 | .init_machine = palmte2_init, |
365 | .restart = pxa_restart, | ||
365 | MACHINE_END | 366 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 94e9708b349d..ec8249156c08 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c | |||
@@ -452,6 +452,7 @@ MACHINE_START(TREO680, "Palm Treo 680") | |||
452 | .handle_irq = pxa27x_handle_irq, | 452 | .handle_irq = pxa27x_handle_irq, |
453 | .timer = &pxa_timer, | 453 | .timer = &pxa_timer, |
454 | .init_machine = treo680_init, | 454 | .init_machine = treo680_init, |
455 | .restart = pxa_restart, | ||
455 | MACHINE_END | 456 | MACHINE_END |
456 | #endif | 457 | #endif |
457 | 458 | ||
@@ -464,5 +465,6 @@ MACHINE_START(CENTRO, "Palm Centro 685") | |||
464 | .handle_irq = pxa27x_handle_irq, | 465 | .handle_irq = pxa27x_handle_irq, |
465 | .timer = &pxa_timer, | 466 | .timer = &pxa_timer, |
466 | .init_machine = centro_init, | 467 | .init_machine = centro_init, |
468 | .restart = pxa_restart, | ||
467 | MACHINE_END | 469 | MACHINE_END |
468 | #endif | 470 | #endif |
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 4e3e45927e95..6170d76dfba8 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
@@ -369,5 +369,6 @@ MACHINE_START(PALMTX, "Palm T|X") | |||
369 | .init_irq = pxa27x_init_irq, | 369 | .init_irq = pxa27x_init_irq, |
370 | .handle_irq = pxa27x_handle_irq, | 370 | .handle_irq = pxa27x_handle_irq, |
371 | .timer = &pxa_timer, | 371 | .timer = &pxa_timer, |
372 | .init_machine = palmtx_init | 372 | .init_machine = palmtx_init, |
373 | .restart = pxa_restart, | ||
373 | MACHINE_END | 374 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 68e18baf8e07..b2dff9d415eb 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c | |||
@@ -404,5 +404,6 @@ MACHINE_START(PALMZ72, "Palm Zire72") | |||
404 | .init_irq = pxa27x_init_irq, | 404 | .init_irq = pxa27x_init_irq, |
405 | .handle_irq = pxa27x_handle_irq, | 405 | .handle_irq = pxa27x_handle_irq, |
406 | .timer = &pxa_timer, | 406 | .timer = &pxa_timer, |
407 | .init_machine = palmz72_init | 407 | .init_machine = palmz72_init, |
408 | .restart = pxa_restart, | ||
408 | MACHINE_END | 409 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 0b825a353537..fe9054435b6f 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c | |||
@@ -265,4 +265,5 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") | |||
265 | .handle_irq = pxa27x_handle_irq, | 265 | .handle_irq = pxa27x_handle_irq, |
266 | .timer = &pxa_timer, | 266 | .timer = &pxa_timer, |
267 | .init_machine = pcm027_init, | 267 | .init_machine = pcm027_init, |
268 | .restart = pxa_restart, | ||
268 | MACHINE_END | 269 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index afcb48a5792c..b260ce872d2d 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -417,7 +417,7 @@ static struct i2c_board_info __initdata poodle_i2c_devices[] = { | |||
417 | 417 | ||
418 | static void poodle_poweroff(void) | 418 | static void poodle_poweroff(void) |
419 | { | 419 | { |
420 | arm_machine_restart('h', NULL); | 420 | pxa_restart('h', NULL); |
421 | } | 421 | } |
422 | 422 | ||
423 | static void __init poodle_init(void) | 423 | static void __init poodle_init(void) |
@@ -466,4 +466,5 @@ MACHINE_START(POODLE, "SHARP Poodle") | |||
466 | .handle_irq = pxa25x_handle_irq, | 466 | .handle_irq = pxa25x_handle_irq, |
467 | .timer = &pxa_timer, | 467 | .timer = &pxa_timer, |
468 | .init_machine = poodle_init, | 468 | .init_machine = poodle_init, |
469 | .restart = pxa_restart, | ||
469 | MACHINE_END | 470 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index f0c05f4d12ed..4962b1676629 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c | |||
@@ -1093,6 +1093,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") | |||
1093 | .init_irq = pxa3xx_init_irq, | 1093 | .init_irq = pxa3xx_init_irq, |
1094 | .handle_irq = pxa3xx_handle_irq, | 1094 | .handle_irq = pxa3xx_handle_irq, |
1095 | .timer = &pxa_timer, | 1095 | .timer = &pxa_timer, |
1096 | .restart = pxa_restart, | ||
1096 | MACHINE_END | 1097 | MACHINE_END |
1097 | #endif | 1098 | #endif |
1098 | 1099 | ||
@@ -1104,6 +1105,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") | |||
1104 | .init_irq = pxa3xx_init_irq, | 1105 | .init_irq = pxa3xx_init_irq, |
1105 | .handle_irq = pxa3xx_handle_irq, | 1106 | .handle_irq = pxa3xx_handle_irq, |
1106 | .timer = &pxa_timer, | 1107 | .timer = &pxa_timer, |
1108 | .restart = pxa_restart, | ||
1107 | MACHINE_END | 1109 | MACHINE_END |
1108 | #endif | 1110 | #endif |
1109 | 1111 | ||
@@ -1115,5 +1117,6 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") | |||
1115 | .init_irq = pxa3xx_init_irq, | 1117 | .init_irq = pxa3xx_init_irq, |
1116 | .handle_irq = pxa3xx_handle_irq, | 1118 | .handle_irq = pxa3xx_handle_irq, |
1117 | .timer = &pxa_timer, | 1119 | .timer = &pxa_timer, |
1120 | .restart = pxa_restart, | ||
1118 | MACHINE_END | 1121 | MACHINE_END |
1119 | #endif | 1122 | #endif |
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index b8bcda15da81..c8497b00cdfe 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c | |||
@@ -81,8 +81,11 @@ static void do_hw_reset(void) | |||
81 | OSMR3 = OSCR + 368640; /* ... in 100 ms */ | 81 | OSMR3 = OSCR + 368640; /* ... in 100 ms */ |
82 | } | 82 | } |
83 | 83 | ||
84 | void arch_reset(char mode, const char *cmd) | 84 | void pxa_restart(char mode, const char *cmd) |
85 | { | 85 | { |
86 | local_irq_disable(); | ||
87 | local_fiq_disable(); | ||
88 | |||
86 | clear_reset_status(RESET_STATUS_ALL); | 89 | clear_reset_status(RESET_STATUS_ALL); |
87 | 90 | ||
88 | switch (mode) { | 91 | switch (mode) { |
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index fc2c1e05af9c..878707056e65 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c | |||
@@ -602,4 +602,5 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") | |||
602 | .handle_irq = pxa3xx_handle_irq, | 602 | .handle_irq = pxa3xx_handle_irq, |
603 | .timer = &pxa_timer, | 603 | .timer = &pxa_timer, |
604 | .init_machine = saar_init, | 604 | .init_machine = saar_init, |
605 | .restart = pxa_restart, | ||
605 | MACHINE_END | 606 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index 3e999e308a2d..b6dbaca460c7 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c | |||
@@ -111,5 +111,6 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") | |||
111 | .handle_irq = pxa3xx_handle_irq, | 111 | .handle_irq = pxa3xx_handle_irq, |
112 | .timer = &pxa_timer, | 112 | .timer = &pxa_timer, |
113 | .init_machine = saarb_init, | 113 | .init_machine = saarb_init, |
114 | .restart = pxa_restart, | ||
114 | MACHINE_END | 115 | MACHINE_END |
115 | 116 | ||
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 2f57d94de727..a7f81a3fd132 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -926,7 +926,7 @@ static inline void spitz_i2c_init(void) {} | |||
926 | ******************************************************************************/ | 926 | ******************************************************************************/ |
927 | static void spitz_poweroff(void) | 927 | static void spitz_poweroff(void) |
928 | { | 928 | { |
929 | arm_machine_restart('g', NULL); | 929 | pxa_restart('g', NULL); |
930 | } | 930 | } |
931 | 931 | ||
932 | static void spitz_restart(char mode, const char *cmd) | 932 | static void spitz_restart(char mode, const char *cmd) |
@@ -943,7 +943,6 @@ static void __init spitz_init(void) | |||
943 | { | 943 | { |
944 | init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); | 944 | init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); |
945 | pm_power_off = spitz_poweroff; | 945 | pm_power_off = spitz_poweroff; |
946 | arm_pm_restart = spitz_restart; | ||
947 | 946 | ||
948 | PMCR = 0x00; | 947 | PMCR = 0x00; |
949 | 948 | ||
@@ -989,6 +988,7 @@ MACHINE_START(SPITZ, "SHARP Spitz") | |||
989 | .handle_irq = pxa27x_handle_irq, | 988 | .handle_irq = pxa27x_handle_irq, |
990 | .init_machine = spitz_init, | 989 | .init_machine = spitz_init, |
991 | .timer = &pxa_timer, | 990 | .timer = &pxa_timer, |
991 | .restart = spitz_restart, | ||
992 | MACHINE_END | 992 | MACHINE_END |
993 | #endif | 993 | #endif |
994 | 994 | ||
@@ -1001,6 +1001,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi") | |||
1001 | .handle_irq = pxa27x_handle_irq, | 1001 | .handle_irq = pxa27x_handle_irq, |
1002 | .init_machine = spitz_init, | 1002 | .init_machine = spitz_init, |
1003 | .timer = &pxa_timer, | 1003 | .timer = &pxa_timer, |
1004 | .restart = spitz_restart, | ||
1004 | MACHINE_END | 1005 | MACHINE_END |
1005 | #endif | 1006 | #endif |
1006 | 1007 | ||
@@ -1013,5 +1014,6 @@ MACHINE_START(AKITA, "SHARP Akita") | |||
1013 | .handle_irq = pxa27x_handle_irq, | 1014 | .handle_irq = pxa27x_handle_irq, |
1014 | .init_machine = spitz_init, | 1015 | .init_machine = spitz_init, |
1015 | .timer = &pxa_timer, | 1016 | .timer = &pxa_timer, |
1017 | .restart = spitz_restart, | ||
1016 | MACHINE_END | 1018 | MACHINE_END |
1017 | #endif | 1019 | #endif |
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index 4c9a48bef569..80d7f23ad0fd 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c | |||
@@ -1005,6 +1005,7 @@ MACHINE_START(INTELMOTE2, "IMOTE 2") | |||
1005 | .timer = &pxa_timer, | 1005 | .timer = &pxa_timer, |
1006 | .init_machine = imote2_init, | 1006 | .init_machine = imote2_init, |
1007 | .atag_offset = 0x100, | 1007 | .atag_offset = 0x100, |
1008 | .restart = pxa_restart, | ||
1008 | MACHINE_END | 1009 | MACHINE_END |
1009 | #endif | 1010 | #endif |
1010 | 1011 | ||
@@ -1017,5 +1018,6 @@ MACHINE_START(STARGATE2, "Stargate 2") | |||
1017 | .timer = &pxa_timer, | 1018 | .timer = &pxa_timer, |
1018 | .init_machine = stargate2_init, | 1019 | .init_machine = stargate2_init, |
1019 | .atag_offset = 0x100, | 1020 | .atag_offset = 0x100, |
1021 | .restart = pxa_restart, | ||
1020 | MACHINE_END | 1022 | MACHINE_END |
1021 | #endif | 1023 | #endif |
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index ad47bb98f30d..4fa36a3e383c 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c | |||
@@ -495,4 +495,5 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") | |||
495 | .handle_irq = pxa3xx_handle_irq, | 495 | .handle_irq = pxa3xx_handle_irq, |
496 | .timer = &pxa_timer, | 496 | .timer = &pxa_timer, |
497 | .init_machine = tavorevb_init, | 497 | .init_machine = tavorevb_init, |
498 | .restart = pxa_restart, | ||
498 | MACHINE_END | 499 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c index fd569167302a..8a22879f0bb0 100644 --- a/arch/arm/mach-pxa/tavorevb3.c +++ b/arch/arm/mach-pxa/tavorevb3.c | |||
@@ -132,4 +132,5 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") | |||
132 | .handle_irq = pxa3xx_handle_irq, | 132 | .handle_irq = pxa3xx_handle_irq, |
133 | .timer = &pxa_timer, | 133 | .timer = &pxa_timer, |
134 | .init_machine = evb3_init, | 134 | .init_machine = evb3_init, |
135 | .restart = pxa_restart, | ||
135 | MACHINE_END | 136 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index de684701449c..b503049d6d26 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
18 | #include <linux/clockchips.h> | 18 | #include <linux/clockchips.h> |
19 | #include <linux/sched.h> | ||
20 | 19 | ||
21 | #include <asm/div64.h> | 20 | #include <asm/div64.h> |
22 | #include <asm/mach/irq.h> | 21 | #include <asm/mach/irq.h> |
@@ -32,18 +31,10 @@ | |||
32 | * long as there is always less than 582 seconds between successive | 31 | * long as there is always less than 582 seconds between successive |
33 | * calls to sched_clock() which should always be the case in practice. | 32 | * calls to sched_clock() which should always be the case in practice. |
34 | */ | 33 | */ |
35 | static DEFINE_CLOCK_DATA(cd); | ||
36 | 34 | ||
37 | unsigned long long notrace sched_clock(void) | 35 | static u32 notrace pxa_read_sched_clock(void) |
38 | { | 36 | { |
39 | u32 cyc = OSCR; | 37 | return OSCR; |
40 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
41 | } | ||
42 | |||
43 | static void notrace pxa_update_sched_clock(void) | ||
44 | { | ||
45 | u32 cyc = OSCR; | ||
46 | update_sched_clock(&cd, cyc, (u32)~0); | ||
47 | } | 38 | } |
48 | 39 | ||
49 | 40 | ||
@@ -119,7 +110,7 @@ static void __init pxa_timer_init(void) | |||
119 | OIER = 0; | 110 | OIER = 0; |
120 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; | 111 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; |
121 | 112 | ||
122 | init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); | 113 | setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); |
123 | 114 | ||
124 | clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); | 115 | clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); |
125 | ckevt_pxa_osmr0.max_delta_ns = | 116 | ckevt_pxa_osmr0.max_delta_ns = |
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index ef6453041cf1..dfe40f8705aa 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
@@ -905,7 +905,7 @@ static struct platform_device *devices[] __initdata = { | |||
905 | 905 | ||
906 | static void tosa_poweroff(void) | 906 | static void tosa_poweroff(void) |
907 | { | 907 | { |
908 | arm_machine_restart('g', NULL); | 908 | pxa_restart('g', NULL); |
909 | } | 909 | } |
910 | 910 | ||
911 | static void tosa_restart(char mode, const char *cmd) | 911 | static void tosa_restart(char mode, const char *cmd) |
@@ -935,7 +935,6 @@ static void __init tosa_init(void) | |||
935 | init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0); | 935 | init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0); |
936 | 936 | ||
937 | pm_power_off = tosa_poweroff; | 937 | pm_power_off = tosa_poweroff; |
938 | arm_pm_restart = tosa_restart; | ||
939 | 938 | ||
940 | PCFR |= PCFR_OPDE; | 939 | PCFR |= PCFR_OPDE; |
941 | 940 | ||
@@ -978,4 +977,5 @@ MACHINE_START(TOSA, "SHARP Tosa") | |||
978 | .handle_irq = pxa25x_handle_irq, | 977 | .handle_irq = pxa25x_handle_irq, |
979 | .init_machine = tosa_init, | 978 | .init_machine = tosa_init, |
980 | .timer = &pxa_timer, | 979 | .timer = &pxa_timer, |
980 | .restart = tosa_restart, | ||
981 | MACHINE_END | 981 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 1aaed2b17e10..0f30af617d8f 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
@@ -561,6 +561,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") | |||
561 | .init_irq = pxa27x_init_irq, | 561 | .init_irq = pxa27x_init_irq, |
562 | .handle_irq = pxa27x_handle_irq, | 562 | .handle_irq = pxa27x_handle_irq, |
563 | .timer = &pxa_timer, | 563 | .timer = &pxa_timer, |
564 | .restart = pxa_restart, | ||
564 | MACHINE_END | 565 | MACHINE_END |
565 | 566 | ||
566 | MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") | 567 | MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") |
@@ -571,4 +572,5 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") | |||
571 | .init_irq = pxa27x_init_irq, | 572 | .init_irq = pxa27x_init_irq, |
572 | .handle_irq = pxa27x_handle_irq, | 573 | .handle_irq = pxa27x_handle_irq, |
573 | .timer = &pxa_timer, | 574 | .timer = &pxa_timer, |
575 | .restart = pxa_restart, | ||
574 | MACHINE_END | 576 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 242ddae332d3..afe2b7495523 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c | |||
@@ -998,4 +998,5 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") | |||
998 | .handle_irq = pxa25x_handle_irq, | 998 | .handle_irq = pxa25x_handle_irq, |
999 | .timer = &pxa_timer, | 999 | .timer = &pxa_timer, |
1000 | .init_machine = viper_init, | 1000 | .init_machine = viper_init, |
1001 | .restart = pxa_restart, | ||
1001 | MACHINE_END | 1002 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index ca0c6615028c..fed5fb088714 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c | |||
@@ -721,5 +721,6 @@ MACHINE_START(VPAC270, "Voipac PXA270") | |||
721 | .init_irq = pxa27x_init_irq, | 721 | .init_irq = pxa27x_init_irq, |
722 | .handle_irq = pxa27x_handle_irq, | 722 | .handle_irq = pxa27x_handle_irq, |
723 | .timer = &pxa_timer, | 723 | .timer = &pxa_timer, |
724 | .init_machine = vpac270_init | 724 | .init_machine = vpac270_init, |
725 | .restart = pxa_restart, | ||
725 | MACHINE_END | 726 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index 70e1730ef282..4bbe9a36fe74 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c | |||
@@ -185,5 +185,6 @@ MACHINE_START(XCEP, "Iskratel XCEP") | |||
185 | .init_irq = pxa25x_init_irq, | 185 | .init_irq = pxa25x_init_irq, |
186 | .handle_irq = pxa25x_handle_irq, | 186 | .handle_irq = pxa25x_handle_irq, |
187 | .timer = &pxa_timer, | 187 | .timer = &pxa_timer, |
188 | .restart = pxa_restart, | ||
188 | MACHINE_END | 189 | MACHINE_END |
189 | 190 | ||
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index ead32c90fec1..d75f66ab8c34 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c | |||
@@ -725,4 +725,5 @@ MACHINE_START(ZIPIT2, "Zipit Z2") | |||
725 | .handle_irq = pxa27x_handle_irq, | 725 | .handle_irq = pxa27x_handle_irq, |
726 | .timer = &pxa_timer, | 726 | .timer = &pxa_timer, |
727 | .init_machine = z2_init, | 727 | .init_machine = z2_init, |
728 | .restart = pxa_restart, | ||
728 | MACHINE_END | 729 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 498b83b089f3..9db35a7fcfc0 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c | |||
@@ -911,5 +911,6 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") | |||
911 | .handle_irq = pxa27x_handle_irq, | 911 | .handle_irq = pxa27x_handle_irq, |
912 | .timer = &pxa_timer, | 912 | .timer = &pxa_timer, |
913 | .init_machine = zeus_init, | 913 | .init_machine = zeus_init, |
914 | .restart = pxa_restart, | ||
914 | MACHINE_END | 915 | MACHINE_END |
915 | 916 | ||
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 6c39c3328418..7678b1bf7903 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
@@ -430,4 +430,5 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") | |||
430 | .handle_irq = pxa3xx_handle_irq, | 430 | .handle_irq = pxa3xx_handle_irq, |
431 | .timer = &pxa_timer, | 431 | .timer = &pxa_timer, |
432 | .init_machine = zylonite_init, | 432 | .init_machine = zylonite_init, |
433 | .restart = pxa_restart, | ||
433 | MACHINE_END | 434 | MACHINE_END |
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index dba6d0c1fc17..c593be428b8f 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig | |||
@@ -12,6 +12,8 @@ config REALVIEW_EB_A9MP | |||
12 | bool "Support Multicore Cortex-A9 Tile" | 12 | bool "Support Multicore Cortex-A9 Tile" |
13 | depends on MACH_REALVIEW_EB | 13 | depends on MACH_REALVIEW_EB |
14 | select CPU_V7 | 14 | select CPU_V7 |
15 | select HAVE_SMP | ||
16 | select MIGHT_HAVE_CACHE_L2X0 | ||
15 | help | 17 | help |
16 | Enable support for the Cortex-A9MPCore tile fitted to the | 18 | Enable support for the Cortex-A9MPCore tile fitted to the |
17 | Realview(R) Emulation Baseboard platform. | 19 | Realview(R) Emulation Baseboard platform. |
@@ -21,6 +23,8 @@ config REALVIEW_EB_ARM11MP | |||
21 | depends on MACH_REALVIEW_EB | 23 | depends on MACH_REALVIEW_EB |
22 | select CPU_V6K | 24 | select CPU_V6K |
23 | select ARCH_HAS_BARRIERS if SMP | 25 | select ARCH_HAS_BARRIERS if SMP |
26 | select HAVE_SMP | ||
27 | select MIGHT_HAVE_CACHE_L2X0 | ||
24 | help | 28 | help |
25 | Enable support for the ARM11MPCore tile fitted to the Realview(R) | 29 | Enable support for the ARM11MPCore tile fitted to the Realview(R) |
26 | Emulation Baseboard platform. | 30 | Emulation Baseboard platform. |
@@ -39,6 +43,8 @@ config MACH_REALVIEW_PB11MP | |||
39 | select CPU_V6K | 43 | select CPU_V6K |
40 | select ARM_GIC | 44 | select ARM_GIC |
41 | select HAVE_PATA_PLATFORM | 45 | select HAVE_PATA_PLATFORM |
46 | select HAVE_SMP | ||
47 | select MIGHT_HAVE_CACHE_L2X0 | ||
42 | select ARCH_HAS_BARRIERS if SMP | 48 | select ARCH_HAS_BARRIERS if SMP |
43 | help | 49 | help |
44 | Include support for the ARM(R) RealView(R) Platform Baseboard for | 50 | Include support for the ARM(R) RealView(R) Platform Baseboard for |
@@ -51,6 +57,7 @@ config MACH_REALVIEW_PB1176 | |||
51 | select CPU_V6 | 57 | select CPU_V6 |
52 | select ARM_GIC | 58 | select ARM_GIC |
53 | select HAVE_TCM | 59 | select HAVE_TCM |
60 | select MIGHT_HAVE_CACHE_L2X0 | ||
54 | help | 61 | help |
55 | Include support for the ARM(R) RealView(R) Platform Baseboard for | 62 | Include support for the ARM(R) RealView(R) Platform Baseboard for |
56 | ARM1176JZF-S. | 63 | ARM1176JZF-S. |
@@ -78,6 +85,8 @@ config MACH_REALVIEW_PBX | |||
78 | bool "Support RealView(R) Platform Baseboard Explore" | 85 | bool "Support RealView(R) Platform Baseboard Explore" |
79 | select ARM_GIC | 86 | select ARM_GIC |
80 | select HAVE_PATA_PLATFORM | 87 | select HAVE_PATA_PLATFORM |
88 | select HAVE_SMP | ||
89 | select MIGHT_HAVE_CACHE_L2X0 | ||
81 | select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET | 90 | select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET |
82 | select ZONE_DMA if SPARSEMEM | 91 | select ZONE_DMA if SPARSEMEM |
83 | help | 92 | help |
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 47259c89a75e..735b57aaf2d6 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h | |||
@@ -65,6 +65,5 @@ extern int realview_usb_register(struct resource *res); | |||
65 | extern void realview_init_early(void); | 65 | extern void realview_init_early(void); |
66 | extern void realview_fixup(struct tag *tags, char **from, | 66 | extern void realview_fixup(struct tag *tags, char **from, |
67 | struct meminfo *meminfo); | 67 | struct meminfo *meminfo); |
68 | extern void (*realview_reset)(char); | ||
69 | 68 | ||
70 | #endif | 69 | #endif |
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h index 6657ff231161..471b671159ce 100644 --- a/arch/arm/mach-realview/include/mach/system.h +++ b/arch/arm/mach-realview/include/mach/system.h | |||
@@ -21,12 +21,6 @@ | |||
21 | #ifndef __ASM_ARCH_SYSTEM_H | 21 | #ifndef __ASM_ARCH_SYSTEM_H |
22 | #define __ASM_ARCH_SYSTEM_H | 22 | #define __ASM_ARCH_SYSTEM_H |
23 | 23 | ||
24 | #include <linux/io.h> | ||
25 | #include <mach/hardware.h> | ||
26 | #include <mach/platform.h> | ||
27 | |||
28 | void (*realview_reset)(char mode); | ||
29 | |||
30 | static inline void arch_idle(void) | 24 | static inline void arch_idle(void) |
31 | { | 25 | { |
32 | /* | 26 | /* |
@@ -36,15 +30,4 @@ static inline void arch_idle(void) | |||
36 | cpu_do_idle(); | 30 | cpu_do_idle(); |
37 | } | 31 | } |
38 | 32 | ||
39 | static inline void arch_reset(char mode, const char *cmd) | ||
40 | { | ||
41 | /* | ||
42 | * To reset, we hit the on-board reset register | ||
43 | * in the system FPGA | ||
44 | */ | ||
45 | if (realview_reset) | ||
46 | realview_reset(mode); | ||
47 | dsb(); | ||
48 | } | ||
49 | |||
50 | #endif | 33 | #endif |
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 1ca944aea7f8..f92a920cf507 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -415,7 +415,7 @@ static struct sys_timer realview_eb_timer = { | |||
415 | .init = realview_eb_timer_init, | 415 | .init = realview_eb_timer_init, |
416 | }; | 416 | }; |
417 | 417 | ||
418 | static void realview_eb_reset(char mode) | 418 | static void realview_eb_restart(char mode, const char *cmd) |
419 | { | 419 | { |
420 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | 420 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
421 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | 421 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); |
@@ -427,6 +427,7 @@ static void realview_eb_reset(char mode) | |||
427 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | 427 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
428 | if (core_tile_eb11mp()) | 428 | if (core_tile_eb11mp()) |
429 | __raw_writel(0x0008, reset_ctrl); | 429 | __raw_writel(0x0008, reset_ctrl); |
430 | dsb(); | ||
430 | } | 431 | } |
431 | 432 | ||
432 | static void __init realview_eb_init(void) | 433 | static void __init realview_eb_init(void) |
@@ -458,7 +459,6 @@ static void __init realview_eb_init(void) | |||
458 | #ifdef CONFIG_LEDS | 459 | #ifdef CONFIG_LEDS |
459 | leds_event = realview_leds_event; | 460 | leds_event = realview_leds_event; |
460 | #endif | 461 | #endif |
461 | realview_reset = realview_eb_reset; | ||
462 | } | 462 | } |
463 | 463 | ||
464 | MACHINE_START(REALVIEW_EB, "ARM-RealView EB") | 464 | MACHINE_START(REALVIEW_EB, "ARM-RealView EB") |
@@ -474,4 +474,5 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB") | |||
474 | #ifdef CONFIG_ZONE_DMA | 474 | #ifdef CONFIG_ZONE_DMA |
475 | .dma_zone_size = SZ_256M, | 475 | .dma_zone_size = SZ_256M, |
476 | #endif | 476 | #endif |
477 | .restart = realview_eb_restart, | ||
477 | MACHINE_END | 478 | MACHINE_END |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index bd8fec8b20d9..8ec37b29e0fa 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -336,12 +336,13 @@ static struct sys_timer realview_pb1176_timer = { | |||
336 | .init = realview_pb1176_timer_init, | 336 | .init = realview_pb1176_timer_init, |
337 | }; | 337 | }; |
338 | 338 | ||
339 | static void realview_pb1176_reset(char mode) | 339 | static void realview_pb1176_restart(char mode, const char *cmd) |
340 | { | 340 | { |
341 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | 341 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
342 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | 342 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); |
343 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | 343 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
344 | __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl); | 344 | __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl); |
345 | dsb(); | ||
345 | } | 346 | } |
346 | 347 | ||
347 | static void realview_pb1176_fixup(struct tag *tags, char **from, | 348 | static void realview_pb1176_fixup(struct tag *tags, char **from, |
@@ -381,7 +382,6 @@ static void __init realview_pb1176_init(void) | |||
381 | #ifdef CONFIG_LEDS | 382 | #ifdef CONFIG_LEDS |
382 | leds_event = realview_leds_event; | 383 | leds_event = realview_leds_event; |
383 | #endif | 384 | #endif |
384 | realview_reset = realview_pb1176_reset; | ||
385 | } | 385 | } |
386 | 386 | ||
387 | MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") | 387 | MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") |
@@ -397,4 +397,5 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") | |||
397 | #ifdef CONFIG_ZONE_DMA | 397 | #ifdef CONFIG_ZONE_DMA |
398 | .dma_zone_size = SZ_256M, | 398 | .dma_zone_size = SZ_256M, |
399 | #endif | 399 | #endif |
400 | .restart = realview_pb1176_restart, | ||
400 | MACHINE_END | 401 | MACHINE_END |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index fa73ba81a449..f035fda8b619 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -315,7 +315,7 @@ static struct sys_timer realview_pb11mp_timer = { | |||
315 | .init = realview_pb11mp_timer_init, | 315 | .init = realview_pb11mp_timer_init, |
316 | }; | 316 | }; |
317 | 317 | ||
318 | static void realview_pb11mp_reset(char mode) | 318 | static void realview_pb11mp_restart(char mode, const char *cmd) |
319 | { | 319 | { |
320 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | 320 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
321 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | 321 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); |
@@ -327,6 +327,7 @@ static void realview_pb11mp_reset(char mode) | |||
327 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | 327 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
328 | __raw_writel(0x0000, reset_ctrl); | 328 | __raw_writel(0x0000, reset_ctrl); |
329 | __raw_writel(0x0004, reset_ctrl); | 329 | __raw_writel(0x0004, reset_ctrl); |
330 | dsb(); | ||
330 | } | 331 | } |
331 | 332 | ||
332 | static void __init realview_pb11mp_init(void) | 333 | static void __init realview_pb11mp_init(void) |
@@ -355,7 +356,6 @@ static void __init realview_pb11mp_init(void) | |||
355 | #ifdef CONFIG_LEDS | 356 | #ifdef CONFIG_LEDS |
356 | leds_event = realview_leds_event; | 357 | leds_event = realview_leds_event; |
357 | #endif | 358 | #endif |
358 | realview_reset = realview_pb11mp_reset; | ||
359 | } | 359 | } |
360 | 360 | ||
361 | MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") | 361 | MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") |
@@ -371,4 +371,5 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") | |||
371 | #ifdef CONFIG_ZONE_DMA | 371 | #ifdef CONFIG_ZONE_DMA |
372 | .dma_zone_size = SZ_256M, | 372 | .dma_zone_size = SZ_256M, |
373 | #endif | 373 | #endif |
374 | .restart = realview_pb11mp_restart, | ||
374 | MACHINE_END | 375 | MACHINE_END |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 6e5f2b9ddb7e..0109c8b440cc 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -271,7 +271,7 @@ static struct sys_timer realview_pba8_timer = { | |||
271 | .init = realview_pba8_timer_init, | 271 | .init = realview_pba8_timer_init, |
272 | }; | 272 | }; |
273 | 273 | ||
274 | static void realview_pba8_reset(char mode) | 274 | static void realview_pba8_restart(char mode, const char *cmd) |
275 | { | 275 | { |
276 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | 276 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
277 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | 277 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); |
@@ -283,6 +283,7 @@ static void realview_pba8_reset(char mode) | |||
283 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | 283 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
284 | __raw_writel(0x0000, reset_ctrl); | 284 | __raw_writel(0x0000, reset_ctrl); |
285 | __raw_writel(0x0004, reset_ctrl); | 285 | __raw_writel(0x0004, reset_ctrl); |
286 | dsb(); | ||
286 | } | 287 | } |
287 | 288 | ||
288 | static void __init realview_pba8_init(void) | 289 | static void __init realview_pba8_init(void) |
@@ -305,7 +306,6 @@ static void __init realview_pba8_init(void) | |||
305 | #ifdef CONFIG_LEDS | 306 | #ifdef CONFIG_LEDS |
306 | leds_event = realview_leds_event; | 307 | leds_event = realview_leds_event; |
307 | #endif | 308 | #endif |
308 | realview_reset = realview_pba8_reset; | ||
309 | } | 309 | } |
310 | 310 | ||
311 | MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") | 311 | MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") |
@@ -321,4 +321,5 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") | |||
321 | #ifdef CONFIG_ZONE_DMA | 321 | #ifdef CONFIG_ZONE_DMA |
322 | .dma_zone_size = SZ_256M, | 322 | .dma_zone_size = SZ_256M, |
323 | #endif | 323 | #endif |
324 | .restart = realview_pba8_restart, | ||
324 | MACHINE_END | 325 | MACHINE_END |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index 7aabc21af01c..0194b3e26dc1 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -339,7 +339,7 @@ static void realview_pbx_fixup(struct tag *tags, char **from, | |||
339 | #endif | 339 | #endif |
340 | } | 340 | } |
341 | 341 | ||
342 | static void realview_pbx_reset(char mode) | 342 | static void realview_pbx_restart(char mode, const char *cmd) |
343 | { | 343 | { |
344 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | 344 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
345 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | 345 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); |
@@ -351,6 +351,7 @@ static void realview_pbx_reset(char mode) | |||
351 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | 351 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
352 | __raw_writel(0x00F0, reset_ctrl); | 352 | __raw_writel(0x00F0, reset_ctrl); |
353 | __raw_writel(0x00F4, reset_ctrl); | 353 | __raw_writel(0x00F4, reset_ctrl); |
354 | dsb(); | ||
354 | } | 355 | } |
355 | 356 | ||
356 | static void __init realview_pbx_init(void) | 357 | static void __init realview_pbx_init(void) |
@@ -388,7 +389,6 @@ static void __init realview_pbx_init(void) | |||
388 | #ifdef CONFIG_LEDS | 389 | #ifdef CONFIG_LEDS |
389 | leds_event = realview_leds_event; | 390 | leds_event = realview_leds_event; |
390 | #endif | 391 | #endif |
391 | realview_reset = realview_pbx_reset; | ||
392 | } | 392 | } |
393 | 393 | ||
394 | MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") | 394 | MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") |
@@ -404,4 +404,5 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") | |||
404 | #ifdef CONFIG_ZONE_DMA | 404 | #ifdef CONFIG_ZONE_DMA |
405 | .dma_zone_size = SZ_256M, | 405 | .dma_zone_size = SZ_256M, |
406 | #endif | 406 | #endif |
407 | .restart = realview_pbx_restart, | ||
407 | MACHINE_END | 408 | MACHINE_END |
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h index a354f4d092c8..359bab94b6af 100644 --- a/arch/arm/mach-rpc/include/mach/system.h +++ b/arch/arm/mach-rpc/include/mach/system.h | |||
@@ -7,21 +7,7 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <linux/io.h> | ||
11 | #include <mach/hardware.h> | ||
12 | #include <asm/hardware/iomd.h> | ||
13 | |||
14 | static inline void arch_idle(void) | 10 | static inline void arch_idle(void) |
15 | { | 11 | { |
16 | cpu_do_idle(); | 12 | cpu_do_idle(); |
17 | } | 13 | } |
18 | |||
19 | static inline void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | iomd_writeb(0, IOMD_ROMCR0); | ||
22 | |||
23 | /* | ||
24 | * Jump into the ROM | ||
25 | */ | ||
26 | soft_restart(0); | ||
27 | } | ||
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index 8559598ab767..3d44a59fc0df 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <asm/elf.h> | 24 | #include <asm/elf.h> |
25 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
26 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
27 | #include <asm/hardware/iomd.h> | ||
27 | #include <asm/page.h> | 28 | #include <asm/page.h> |
28 | #include <asm/domain.h> | 29 | #include <asm/domain.h> |
29 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
@@ -214,6 +215,16 @@ static int __init rpc_init(void) | |||
214 | 215 | ||
215 | arch_initcall(rpc_init); | 216 | arch_initcall(rpc_init); |
216 | 217 | ||
218 | static void rpc_restart(char mode, const char *cmd) | ||
219 | { | ||
220 | iomd_writeb(0, IOMD_ROMCR0); | ||
221 | |||
222 | /* | ||
223 | * Jump into the ROM | ||
224 | */ | ||
225 | soft_restart(0); | ||
226 | } | ||
227 | |||
217 | extern struct sys_timer ioc_timer; | 228 | extern struct sys_timer ioc_timer; |
218 | 229 | ||
219 | MACHINE_START(RISCPC, "Acorn-RiscPC") | 230 | MACHINE_START(RISCPC, "Acorn-RiscPC") |
@@ -224,4 +235,5 @@ MACHINE_START(RISCPC, "Acorn-RiscPC") | |||
224 | .map_io = rpc_map_io, | 235 | .map_io = rpc_map_io, |
225 | .init_irq = rpc_init_irq, | 236 | .init_irq = rpc_init_irq, |
226 | .timer = &ioc_timer, | 237 | .timer = &ioc_timer, |
238 | .restart = rpc_restart, | ||
227 | MACHINE_END | 239 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/common.h b/arch/arm/mach-s3c2410/common.h new file mode 100644 index 000000000000..f65dc8062961 --- /dev/null +++ b/arch/arm/mach-s3c2410/common.h | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Header for S3C2410 machines | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H | ||
13 | #define __ARCH_ARM_MACH_S3C2410_COMMON_H | ||
14 | |||
15 | void s3c2410_restart(char mode, const char *cmd); | ||
16 | |||
17 | #endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */ | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/reset.h b/arch/arm/mach-s3c2410/include/mach/reset.h deleted file mode 100644 index f8c9387b049d..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/reset.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/reset.h | ||
2 | * | ||
3 | * Copyright (c) 2007 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * S3C2410 CPU reset controls | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_RESET_H | ||
15 | #define __ASM_ARCH_RESET_H __FILE__ | ||
16 | |||
17 | /* This allows the over-ride of the default reset code | ||
18 | */ | ||
19 | |||
20 | extern void (*s3c24xx_reset_hook)(void); | ||
21 | |||
22 | #endif /* __ASM_ARCH_RESET_H */ | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h deleted file mode 100644 index 913893d44650..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/system-reset.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/system-reset.h | ||
2 | * | ||
3 | * Copyright (c) 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - System define for arch_reset() function | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <mach/hardware.h> | ||
14 | #include <plat/watchdog-reset.h> | ||
15 | |||
16 | extern void (*s3c24xx_reset_hook)(void); | ||
17 | |||
18 | static void | ||
19 | arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | if (mode == 's') { | ||
22 | soft_restart(0); | ||
23 | } | ||
24 | |||
25 | if (s3c24xx_reset_hook) | ||
26 | s3c24xx_reset_hook(); | ||
27 | |||
28 | arch_wdt_reset(); | ||
29 | |||
30 | /* we'll take a jump through zero as a poor second */ | ||
31 | soft_restart(0); | ||
32 | } | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h index a8cbca6701e5..5e215c1a5c8f 100644 --- a/arch/arm/mach-s3c2410/include/mach/system.h +++ b/arch/arm/mach-s3c2410/include/mach/system.h | |||
@@ -15,12 +15,10 @@ | |||
15 | 15 | ||
16 | #include <mach/map.h> | 16 | #include <mach/map.h> |
17 | #include <mach/idle.h> | 17 | #include <mach/idle.h> |
18 | #include <mach/reset.h> | ||
19 | 18 | ||
20 | #include <mach/regs-clock.h> | 19 | #include <mach/regs-clock.h> |
21 | 20 | ||
22 | void (*s3c24xx_idle)(void); | 21 | void (*s3c24xx_idle)(void); |
23 | void (*s3c24xx_reset_hook)(void); | ||
24 | 22 | ||
25 | void s3c24xx_default_idle(void) | 23 | void s3c24xx_default_idle(void) |
26 | { | 24 | { |
@@ -54,5 +52,3 @@ static void arch_idle(void) | |||
54 | else | 52 | else |
55 | s3c24xx_default_idle(); | 53 | s3c24xx_default_idle(); |
56 | } | 54 | } |
57 | |||
58 | #include <mach/system-reset.h> | ||
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index 79838942b0ac..4220cc60de3c 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c | |||
@@ -63,6 +63,8 @@ | |||
63 | #include <linux/mtd/map.h> | 63 | #include <linux/mtd/map.h> |
64 | #include <linux/mtd/physmap.h> | 64 | #include <linux/mtd/physmap.h> |
65 | 65 | ||
66 | #include "common.h" | ||
67 | |||
66 | static struct resource amlm5900_nor_resource = { | 68 | static struct resource amlm5900_nor_resource = { |
67 | .start = 0x00000000, | 69 | .start = 0x00000000, |
68 | .end = 0x01000000 - 1, | 70 | .end = 0x01000000 - 1, |
@@ -241,4 +243,5 @@ MACHINE_START(AML_M5900, "AML_M5900") | |||
241 | .init_irq = s3c24xx_init_irq, | 243 | .init_irq = s3c24xx_init_irq, |
242 | .init_machine = amlm5900_init, | 244 | .init_machine = amlm5900_init, |
243 | .timer = &s3c24xx_timer, | 245 | .timer = &s3c24xx_timer, |
246 | .restart = s3c2410_restart, | ||
244 | MACHINE_END | 247 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index a20ae1ad4062..feeaf73933dc 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c | |||
@@ -66,6 +66,7 @@ | |||
66 | 66 | ||
67 | #include "usb-simtec.h" | 67 | #include "usb-simtec.h" |
68 | #include "nor-simtec.h" | 68 | #include "nor-simtec.h" |
69 | #include "common.h" | ||
69 | 70 | ||
70 | #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" | 71 | #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" |
71 | 72 | ||
@@ -164,22 +165,6 @@ static struct map_desc bast_iodesc[] __initdata = { | |||
164 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 165 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
165 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 166 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
166 | 167 | ||
167 | static struct s3c24xx_uart_clksrc bast_serial_clocks[] = { | ||
168 | [0] = { | ||
169 | .name = "uclk", | ||
170 | .divisor = 1, | ||
171 | .min_baud = 0, | ||
172 | .max_baud = 0, | ||
173 | }, | ||
174 | [1] = { | ||
175 | .name = "pclk", | ||
176 | .divisor = 1, | ||
177 | .min_baud = 0, | ||
178 | .max_baud = 0, | ||
179 | } | ||
180 | }; | ||
181 | |||
182 | |||
183 | static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { | 168 | static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { |
184 | [0] = { | 169 | [0] = { |
185 | .hwport = 0, | 170 | .hwport = 0, |
@@ -187,8 +172,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { | |||
187 | .ucon = UCON, | 172 | .ucon = UCON, |
188 | .ulcon = ULCON, | 173 | .ulcon = ULCON, |
189 | .ufcon = UFCON, | 174 | .ufcon = UFCON, |
190 | .clocks = bast_serial_clocks, | ||
191 | .clocks_size = ARRAY_SIZE(bast_serial_clocks), | ||
192 | }, | 175 | }, |
193 | [1] = { | 176 | [1] = { |
194 | .hwport = 1, | 177 | .hwport = 1, |
@@ -196,8 +179,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { | |||
196 | .ucon = UCON, | 179 | .ucon = UCON, |
197 | .ulcon = ULCON, | 180 | .ulcon = ULCON, |
198 | .ufcon = UFCON, | 181 | .ufcon = UFCON, |
199 | .clocks = bast_serial_clocks, | ||
200 | .clocks_size = ARRAY_SIZE(bast_serial_clocks), | ||
201 | }, | 182 | }, |
202 | /* port 2 is not actually used */ | 183 | /* port 2 is not actually used */ |
203 | [2] = { | 184 | [2] = { |
@@ -206,8 +187,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { | |||
206 | .ucon = UCON, | 187 | .ucon = UCON, |
207 | .ulcon = ULCON, | 188 | .ulcon = ULCON, |
208 | .ufcon = UFCON, | 189 | .ufcon = UFCON, |
209 | .clocks = bast_serial_clocks, | ||
210 | .clocks_size = ARRAY_SIZE(bast_serial_clocks), | ||
211 | } | 190 | } |
212 | }; | 191 | }; |
213 | 192 | ||
@@ -662,4 +641,5 @@ MACHINE_START(BAST, "Simtec-BAST") | |||
662 | .init_irq = s3c24xx_init_irq, | 641 | .init_irq = s3c24xx_init_irq, |
663 | .init_machine = bast_init, | 642 | .init_machine = bast_init, |
664 | .timer = &s3c24xx_timer, | 643 | .timer = &s3c24xx_timer, |
644 | .restart = s3c2410_restart, | ||
665 | MACHINE_END | 645 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 05a7d16e59f5..ad9d865651d7 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c | |||
@@ -70,6 +70,8 @@ | |||
70 | 70 | ||
71 | #include <sound/uda1380.h> | 71 | #include <sound/uda1380.h> |
72 | 72 | ||
73 | #include "common.h" | ||
74 | |||
73 | #define H1940_LATCH ((void __force __iomem *)0xF8000000) | 75 | #define H1940_LATCH ((void __force __iomem *)0xF8000000) |
74 | 76 | ||
75 | #define H1940_PA_LATCH S3C2410_CS2 | 77 | #define H1940_PA_LATCH S3C2410_CS2 |
@@ -751,4 +753,5 @@ MACHINE_START(H1940, "IPAQ-H1940") | |||
751 | .init_irq = h1940_init_irq, | 753 | .init_irq = h1940_init_irq, |
752 | .init_machine = h1940_init, | 754 | .init_machine = h1940_init, |
753 | .timer = &s3c24xx_timer, | 755 | .timer = &s3c24xx_timer, |
756 | .restart = s3c2410_restart, | ||
754 | MACHINE_END | 757 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 1dc3e3234417..383d00ca8f60 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c | |||
@@ -51,6 +51,8 @@ | |||
51 | #include <plat/s3c2410.h> | 51 | #include <plat/s3c2410.h> |
52 | #include <plat/udc.h> | 52 | #include <plat/udc.h> |
53 | 53 | ||
54 | #include "common.h" | ||
55 | |||
54 | static struct map_desc n30_iodesc[] __initdata = { | 56 | static struct map_desc n30_iodesc[] __initdata = { |
55 | /* nothing here yet */ | 57 | /* nothing here yet */ |
56 | }; | 58 | }; |
@@ -591,6 +593,7 @@ MACHINE_START(N30, "Acer-N30") | |||
591 | .init_machine = n30_init, | 593 | .init_machine = n30_init, |
592 | .init_irq = s3c24xx_init_irq, | 594 | .init_irq = s3c24xx_init_irq, |
593 | .map_io = n30_map_io, | 595 | .map_io = n30_map_io, |
596 | .restart = s3c2410_restart, | ||
594 | MACHINE_END | 597 | MACHINE_END |
595 | 598 | ||
596 | MACHINE_START(N35, "Acer-N35") | 599 | MACHINE_START(N35, "Acer-N35") |
@@ -601,4 +604,5 @@ MACHINE_START(N35, "Acer-N35") | |||
601 | .init_machine = n30_init, | 604 | .init_machine = n30_init, |
602 | .init_irq = s3c24xx_init_irq, | 605 | .init_irq = s3c24xx_init_irq, |
603 | .map_io = n30_map_io, | 606 | .map_io = n30_map_io, |
607 | .restart = s3c2410_restart, | ||
604 | MACHINE_END | 608 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index f03f3fd9cec9..5f1e0eeb38a9 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c | |||
@@ -38,6 +38,8 @@ | |||
38 | #include <plat/iic.h> | 38 | #include <plat/iic.h> |
39 | #include <plat/cpu.h> | 39 | #include <plat/cpu.h> |
40 | 40 | ||
41 | #include "common.h" | ||
42 | |||
41 | static struct map_desc otom11_iodesc[] __initdata = { | 43 | static struct map_desc otom11_iodesc[] __initdata = { |
42 | /* Device area */ | 44 | /* Device area */ |
43 | { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE }, | 45 | { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE }, |
@@ -121,4 +123,5 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1") | |||
121 | .init_machine = otom11_init, | 123 | .init_machine = otom11_init, |
122 | .init_irq = s3c24xx_init_irq, | 124 | .init_irq = s3c24xx_init_irq, |
123 | .timer = &s3c24xx_timer, | 125 | .timer = &s3c24xx_timer, |
126 | .restart = s3c2410_restart, | ||
124 | MACHINE_END | 127 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index 451852156254..58f2c17b9f0d 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c | |||
@@ -62,6 +62,8 @@ | |||
62 | #include <plat/cpu.h> | 62 | #include <plat/cpu.h> |
63 | #include <plat/pm.h> | 63 | #include <plat/pm.h> |
64 | 64 | ||
65 | #include "common.h" | ||
66 | |||
65 | static struct map_desc qt2410_iodesc[] __initdata = { | 67 | static struct map_desc qt2410_iodesc[] __initdata = { |
66 | { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } | 68 | { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } |
67 | }; | 69 | }; |
@@ -350,6 +352,5 @@ MACHINE_START(QT2410, "QT2410") | |||
350 | .init_irq = s3c24xx_init_irq, | 352 | .init_irq = s3c24xx_init_irq, |
351 | .init_machine = qt2410_machine_init, | 353 | .init_machine = qt2410_machine_init, |
352 | .timer = &s3c24xx_timer, | 354 | .timer = &s3c24xx_timer, |
355 | .restart = s3c2410_restart, | ||
353 | MACHINE_END | 356 | MACHINE_END |
354 | |||
355 | |||
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index 99c9dfdb71c7..bdc27e772876 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c | |||
@@ -54,6 +54,8 @@ | |||
54 | 54 | ||
55 | #include <plat/common-smdk.h> | 55 | #include <plat/common-smdk.h> |
56 | 56 | ||
57 | #include "common.h" | ||
58 | |||
57 | static struct map_desc smdk2410_iodesc[] __initdata = { | 59 | static struct map_desc smdk2410_iodesc[] __initdata = { |
58 | /* nothing here yet */ | 60 | /* nothing here yet */ |
59 | }; | 61 | }; |
@@ -116,6 +118,5 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc | |||
116 | .init_irq = s3c24xx_init_irq, | 118 | .init_irq = s3c24xx_init_irq, |
117 | .init_machine = smdk2410_init, | 119 | .init_machine = smdk2410_init, |
118 | .timer = &s3c24xx_timer, | 120 | .timer = &s3c24xx_timer, |
121 | .restart = s3c2410_restart, | ||
119 | MACHINE_END | 122 | MACHINE_END |
120 | |||
121 | |||
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c index e0d0b6fb2800..1114666f0efb 100644 --- a/arch/arm/mach-s3c2410/mach-tct_hammer.c +++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c | |||
@@ -54,6 +54,8 @@ | |||
54 | #include <linux/mtd/map.h> | 54 | #include <linux/mtd/map.h> |
55 | #include <linux/mtd/physmap.h> | 55 | #include <linux/mtd/physmap.h> |
56 | 56 | ||
57 | #include "common.h" | ||
58 | |||
57 | static struct resource tct_hammer_nor_resource = { | 59 | static struct resource tct_hammer_nor_resource = { |
58 | .start = 0x00000000, | 60 | .start = 0x00000000, |
59 | .end = 0x01000000 - 1, | 61 | .end = 0x01000000 - 1, |
@@ -151,4 +153,5 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER") | |||
151 | .init_irq = s3c24xx_init_irq, | 153 | .init_irq = s3c24xx_init_irq, |
152 | .init_machine = tct_hammer_init, | 154 | .init_machine = tct_hammer_init, |
153 | .timer = &s3c24xx_timer, | 155 | .timer = &s3c24xx_timer, |
156 | .restart = s3c2410_restart, | ||
154 | MACHINE_END | 157 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index df47e8e90065..dbe668a803ef 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c | |||
@@ -53,6 +53,7 @@ | |||
53 | 53 | ||
54 | #include "usb-simtec.h" | 54 | #include "usb-simtec.h" |
55 | #include "nor-simtec.h" | 55 | #include "nor-simtec.h" |
56 | #include "common.h" | ||
56 | 57 | ||
57 | /* macros for virtual address mods for the io space entries */ | 58 | /* macros for virtual address mods for the io space entries */ |
58 | #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) | 59 | #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) |
@@ -109,23 +110,6 @@ static struct map_desc vr1000_iodesc[] __initdata = { | |||
109 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 110 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
110 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 111 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
111 | 112 | ||
112 | /* uart clock source(s) */ | ||
113 | |||
114 | static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = { | ||
115 | [0] = { | ||
116 | .name = "uclk", | ||
117 | .divisor = 1, | ||
118 | .min_baud = 0, | ||
119 | .max_baud = 0, | ||
120 | }, | ||
121 | [1] = { | ||
122 | .name = "pclk", | ||
123 | .divisor = 1, | ||
124 | .min_baud = 0, | ||
125 | .max_baud = 0. | ||
126 | } | ||
127 | }; | ||
128 | |||
129 | static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { | 113 | static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { |
130 | [0] = { | 114 | [0] = { |
131 | .hwport = 0, | 115 | .hwport = 0, |
@@ -133,8 +117,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { | |||
133 | .ucon = UCON, | 117 | .ucon = UCON, |
134 | .ulcon = ULCON, | 118 | .ulcon = ULCON, |
135 | .ufcon = UFCON, | 119 | .ufcon = UFCON, |
136 | .clocks = vr1000_serial_clocks, | ||
137 | .clocks_size = ARRAY_SIZE(vr1000_serial_clocks), | ||
138 | }, | 120 | }, |
139 | [1] = { | 121 | [1] = { |
140 | .hwport = 1, | 122 | .hwport = 1, |
@@ -142,8 +124,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { | |||
142 | .ucon = UCON, | 124 | .ucon = UCON, |
143 | .ulcon = ULCON, | 125 | .ulcon = ULCON, |
144 | .ufcon = UFCON, | 126 | .ufcon = UFCON, |
145 | .clocks = vr1000_serial_clocks, | ||
146 | .clocks_size = ARRAY_SIZE(vr1000_serial_clocks), | ||
147 | }, | 127 | }, |
148 | /* port 2 is not actually used */ | 128 | /* port 2 is not actually used */ |
149 | [2] = { | 129 | [2] = { |
@@ -152,9 +132,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { | |||
152 | .ucon = UCON, | 132 | .ucon = UCON, |
153 | .ulcon = ULCON, | 133 | .ulcon = ULCON, |
154 | .ufcon = UFCON, | 134 | .ufcon = UFCON, |
155 | .clocks = vr1000_serial_clocks, | ||
156 | .clocks_size = ARRAY_SIZE(vr1000_serial_clocks), | ||
157 | |||
158 | } | 135 | } |
159 | }; | 136 | }; |
160 | 137 | ||
@@ -405,4 +382,5 @@ MACHINE_START(VR1000, "Thorcom-VR1000") | |||
405 | .init_machine = vr1000_init, | 382 | .init_machine = vr1000_init, |
406 | .init_irq = s3c24xx_init_irq, | 383 | .init_irq = s3c24xx_init_irq, |
407 | .timer = &s3c24xx_timer, | 384 | .timer = &s3c24xx_timer, |
385 | .restart = s3c2410_restart, | ||
408 | MACHINE_END | 386 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 3d7ebc557a72..dad596332c5e 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <plat/clock.h> | 42 | #include <plat/clock.h> |
43 | #include <plat/pll.h> | 43 | #include <plat/pll.h> |
44 | #include <plat/pm.h> | 44 | #include <plat/pm.h> |
45 | #include <plat/watchdog-reset.h> | ||
45 | 46 | ||
46 | #include <plat/gpio-core.h> | 47 | #include <plat/gpio-core.h> |
47 | #include <plat/gpio-cfg.h> | 48 | #include <plat/gpio-cfg.h> |
@@ -123,12 +124,18 @@ static struct clk s3c2410_armclk = { | |||
123 | .id = -1, | 124 | .id = -1, |
124 | }; | 125 | }; |
125 | 126 | ||
127 | static struct clk_lookup s3c2410_clk_lookup[] = { | ||
128 | CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p), | ||
129 | CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), | ||
130 | }; | ||
131 | |||
126 | void __init s3c2410_init_clocks(int xtal) | 132 | void __init s3c2410_init_clocks(int xtal) |
127 | { | 133 | { |
128 | s3c24xx_register_baseclocks(xtal); | 134 | s3c24xx_register_baseclocks(xtal); |
129 | s3c2410_setup_clocks(); | 135 | s3c2410_setup_clocks(); |
130 | s3c2410_baseclk_add(); | 136 | s3c2410_baseclk_add(); |
131 | s3c24xx_register_clock(&s3c2410_armclk); | 137 | s3c24xx_register_clock(&s3c2410_armclk); |
138 | clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup)); | ||
132 | } | 139 | } |
133 | 140 | ||
134 | struct sysdev_class s3c2410_sysclass = { | 141 | struct sysdev_class s3c2410_sysclass = { |
@@ -183,3 +190,15 @@ int __init s3c2410a_init(void) | |||
183 | s3c2410_sysdev.cls = &s3c2410a_sysclass; | 190 | s3c2410_sysdev.cls = &s3c2410a_sysclass; |
184 | return s3c2410_init(); | 191 | return s3c2410_init(); |
185 | } | 192 | } |
193 | |||
194 | void s3c2410_restart(char mode, const char *cmd) | ||
195 | { | ||
196 | if (mode == 's') { | ||
197 | soft_restart(0); | ||
198 | } | ||
199 | |||
200 | arch_wdt_reset(); | ||
201 | |||
202 | /* we'll take a jump through zero as a poor second */ | ||
203 | soft_restart(0); | ||
204 | } | ||
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c index 140711db6c89..cd50291931f7 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c2412/clock.c | |||
@@ -659,6 +659,12 @@ static struct clk *clks[] __initdata = { | |||
659 | &clk_armclk, | 659 | &clk_armclk, |
660 | }; | 660 | }; |
661 | 661 | ||
662 | static struct clk_lookup s3c2412_clk_lookup[] = { | ||
663 | CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), | ||
664 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), | ||
665 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_usysclk), | ||
666 | }; | ||
667 | |||
662 | int __init s3c2412_baseclk_add(void) | 668 | int __init s3c2412_baseclk_add(void) |
663 | { | 669 | { |
664 | unsigned long clkcon = __raw_readl(S3C2410_CLKCON); | 670 | unsigned long clkcon = __raw_readl(S3C2410_CLKCON); |
@@ -751,6 +757,7 @@ int __init s3c2412_baseclk_add(void) | |||
751 | s3c2412_clkcon_enable(clkp, 0); | 757 | s3c2412_clkcon_enable(clkp, 0); |
752 | } | 758 | } |
753 | 759 | ||
760 | clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup)); | ||
754 | s3c_pwmclk_init(); | 761 | s3c_pwmclk_init(); |
755 | return 0; | 762 | return 0; |
756 | } | 763 | } |
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c index 286ef1738c61..ae73ba34ecc6 100644 --- a/arch/arm/mach-s3c2412/mach-jive.c +++ b/arch/arm/mach-s3c2412/mach-jive.c | |||
@@ -48,6 +48,7 @@ | |||
48 | #include <linux/mtd/nand_ecc.h> | 48 | #include <linux/mtd/nand_ecc.h> |
49 | #include <linux/mtd/partitions.h> | 49 | #include <linux/mtd/partitions.h> |
50 | 50 | ||
51 | #include <plat/s3c2412.h> | ||
51 | #include <plat/gpio-cfg.h> | 52 | #include <plat/gpio-cfg.h> |
52 | #include <plat/clock.h> | 53 | #include <plat/clock.h> |
53 | #include <plat/devs.h> | 54 | #include <plat/devs.h> |
@@ -661,4 +662,5 @@ MACHINE_START(JIVE, "JIVE") | |||
661 | .map_io = jive_map_io, | 662 | .map_io = jive_map_io, |
662 | .init_machine = jive_machine_init, | 663 | .init_machine = jive_machine_init, |
663 | .timer = &s3c24xx_timer, | 664 | .timer = &s3c24xx_timer, |
665 | .restart = s3c2412_restart, | ||
664 | MACHINE_END | 666 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index f1eec1b54932..b11451b853d8 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c | |||
@@ -134,6 +134,7 @@ MACHINE_START(S3C2413, "S3C2413") | |||
134 | .map_io = smdk2413_map_io, | 134 | .map_io = smdk2413_map_io, |
135 | .init_machine = smdk2413_machine_init, | 135 | .init_machine = smdk2413_machine_init, |
136 | .timer = &s3c24xx_timer, | 136 | .timer = &s3c24xx_timer, |
137 | .restart = s3c2412_restart, | ||
137 | MACHINE_END | 138 | MACHINE_END |
138 | 139 | ||
139 | MACHINE_START(SMDK2412, "SMDK2412") | 140 | MACHINE_START(SMDK2412, "SMDK2412") |
@@ -145,6 +146,7 @@ MACHINE_START(SMDK2412, "SMDK2412") | |||
145 | .map_io = smdk2413_map_io, | 146 | .map_io = smdk2413_map_io, |
146 | .init_machine = smdk2413_machine_init, | 147 | .init_machine = smdk2413_machine_init, |
147 | .timer = &s3c24xx_timer, | 148 | .timer = &s3c24xx_timer, |
149 | .restart = s3c2412_restart, | ||
148 | MACHINE_END | 150 | MACHINE_END |
149 | 151 | ||
150 | MACHINE_START(SMDK2413, "SMDK2413") | 152 | MACHINE_START(SMDK2413, "SMDK2413") |
@@ -156,4 +158,5 @@ MACHINE_START(SMDK2413, "SMDK2413") | |||
156 | .map_io = smdk2413_map_io, | 158 | .map_io = smdk2413_map_io, |
157 | .init_machine = smdk2413_machine_init, | 159 | .init_machine = smdk2413_machine_init, |
158 | .timer = &s3c24xx_timer, | 160 | .timer = &s3c24xx_timer, |
161 | .restart = s3c2412_restart, | ||
159 | MACHINE_END | 162 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index 1bbb1ef5f4ff..94bfaa1fb148 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c | |||
@@ -162,4 +162,5 @@ MACHINE_START(VSTMS, "VSTMS") | |||
162 | .init_machine = vstms_init, | 162 | .init_machine = vstms_init, |
163 | .map_io = vstms_map_io, | 163 | .map_io = vstms_map_io, |
164 | .timer = &s3c24xx_timer, | 164 | .timer = &s3c24xx_timer, |
165 | .restart = s3c2412_restart, | ||
165 | MACHINE_END | 166 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 57a1e01e4e50..867ce2e269f6 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <asm/proc-fns.h> | 32 | #include <asm/proc-fns.h> |
33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
34 | 34 | ||
35 | #include <mach/reset.h> | ||
36 | #include <mach/idle.h> | 35 | #include <mach/idle.h> |
37 | 36 | ||
38 | #include <plat/cpu-freq.h> | 37 | #include <plat/cpu-freq.h> |
@@ -131,8 +130,11 @@ static void s3c2412_idle(void) | |||
131 | cpu_do_idle(); | 130 | cpu_do_idle(); |
132 | } | 131 | } |
133 | 132 | ||
134 | static void s3c2412_hard_reset(void) | 133 | void s3c2412_restart(char mode, const char *cmd) |
135 | { | 134 | { |
135 | if (mode == 's') | ||
136 | soft_restart(0); | ||
137 | |||
136 | /* errata "Watch-dog/Software Reset Problem" specifies that | 138 | /* errata "Watch-dog/Software Reset Problem" specifies that |
137 | * this reset must be done with the SYSCLK sourced from | 139 | * this reset must be done with the SYSCLK sourced from |
138 | * EXTCLK instead of FOUT to avoid a glitch in the reset | 140 | * EXTCLK instead of FOUT to avoid a glitch in the reset |
@@ -164,10 +166,6 @@ void __init s3c2412_map_io(void) | |||
164 | 166 | ||
165 | s3c24xx_idle = s3c2412_idle; | 167 | s3c24xx_idle = s3c2412_idle; |
166 | 168 | ||
167 | /* set custom reset hook */ | ||
168 | |||
169 | s3c24xx_reset_hook = s3c2412_hard_reset; | ||
170 | |||
171 | /* register our io-tables */ | 169 | /* register our io-tables */ |
172 | 170 | ||
173 | iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); | 171 | iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); |
diff --git a/arch/arm/mach-s3c2416/Makefile b/arch/arm/mach-s3c2416/Makefile index 7b805b279caf..ca0cd227f873 100644 --- a/arch/arm/mach-s3c2416/Makefile +++ b/arch/arm/mach-s3c2416/Makefile | |||
@@ -15,7 +15,6 @@ obj-$(CONFIG_S3C2416_PM) += pm.o | |||
15 | #obj-$(CONFIG_S3C2416_DMA) += dma.o | 15 | #obj-$(CONFIG_S3C2416_DMA) += dma.o |
16 | 16 | ||
17 | # Device setup | 17 | # Device setup |
18 | obj-$(CONFIG_S3C2416_SETUP_SDHCI) += setup-sdhci.o | ||
19 | obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 18 | obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
20 | 19 | ||
21 | # Machine support | 20 | # Machine support |
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index afbbe8bc21d1..59f54d1d7f8b 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c | |||
@@ -90,39 +90,38 @@ static struct clksrc_clk hsmmc_div[] = { | |||
90 | }, | 90 | }, |
91 | }; | 91 | }; |
92 | 92 | ||
93 | static struct clksrc_clk hsmmc_mux[] = { | 93 | static struct clksrc_clk hsmmc_mux0 = { |
94 | [0] = { | 94 | .clk = { |
95 | .clk = { | 95 | .name = "hsmmc-if", |
96 | .name = "hsmmc-if", | 96 | .devname = "s3c-sdhci.0", |
97 | .devname = "s3c-sdhci.0", | 97 | .ctrlbit = (1 << 6), |
98 | .ctrlbit = (1 << 6), | 98 | .enable = s3c2443_clkcon_enable_s, |
99 | .enable = s3c2443_clkcon_enable_s, | ||
100 | }, | ||
101 | .sources = &(struct clksrc_sources) { | ||
102 | .nr_sources = 2, | ||
103 | .sources = (struct clk *[]) { | ||
104 | [0] = &hsmmc_div[0].clk, | ||
105 | [1] = NULL, /* to fix */ | ||
106 | }, | ||
107 | }, | ||
108 | .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 }, | ||
109 | }, | 99 | }, |
110 | [1] = { | 100 | .sources = &(struct clksrc_sources) { |
111 | .clk = { | 101 | .nr_sources = 2, |
112 | .name = "hsmmc-if", | 102 | .sources = (struct clk * []) { |
113 | .devname = "s3c-sdhci.1", | 103 | [0] = &hsmmc_div[0].clk, |
114 | .ctrlbit = (1 << 12), | 104 | [1] = NULL, /* to fix */ |
115 | .enable = s3c2443_clkcon_enable_s, | ||
116 | }, | 105 | }, |
117 | .sources = &(struct clksrc_sources) { | 106 | }, |
118 | .nr_sources = 2, | 107 | .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 }, |
119 | .sources = (struct clk *[]) { | 108 | }; |
120 | [0] = &hsmmc_div[1].clk, | 109 | |
121 | [1] = NULL, /* to fix */ | 110 | static struct clksrc_clk hsmmc_mux1 = { |
122 | }, | 111 | .clk = { |
112 | .name = "hsmmc-if", | ||
113 | .devname = "s3c-sdhci.1", | ||
114 | .ctrlbit = (1 << 12), | ||
115 | .enable = s3c2443_clkcon_enable_s, | ||
116 | }, | ||
117 | .sources = &(struct clksrc_sources) { | ||
118 | .nr_sources = 2, | ||
119 | .sources = (struct clk * []) { | ||
120 | [0] = &hsmmc_div[1].clk, | ||
121 | [1] = NULL, /* to fix */ | ||
123 | }, | 122 | }, |
124 | .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 }, | ||
125 | }, | 123 | }, |
124 | .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 }, | ||
126 | }; | 125 | }; |
127 | 126 | ||
128 | static struct clk hsmmc0_clk = { | 127 | static struct clk hsmmc0_clk = { |
@@ -144,8 +143,14 @@ static struct clksrc_clk *clksrcs[] __initdata = { | |||
144 | &hsspi_mux, | 143 | &hsspi_mux, |
145 | &hsmmc_div[0], | 144 | &hsmmc_div[0], |
146 | &hsmmc_div[1], | 145 | &hsmmc_div[1], |
147 | &hsmmc_mux[0], | 146 | &hsmmc_mux0, |
148 | &hsmmc_mux[1], | 147 | &hsmmc_mux1, |
148 | }; | ||
149 | |||
150 | static struct clk_lookup s3c2416_clk_lookup[] = { | ||
151 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk), | ||
152 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk), | ||
153 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk), | ||
149 | }; | 154 | }; |
150 | 155 | ||
151 | void __init s3c2416_init_clocks(int xtal) | 156 | void __init s3c2416_init_clocks(int xtal) |
@@ -167,6 +172,7 @@ void __init s3c2416_init_clocks(int xtal) | |||
167 | s3c_register_clksrc(clksrcs[ptr], 1); | 172 | s3c_register_clksrc(clksrcs[ptr], 1); |
168 | 173 | ||
169 | s3c24xx_register_clock(&hsmmc0_clk); | 174 | s3c24xx_register_clock(&hsmmc0_clk); |
175 | clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup)); | ||
170 | 176 | ||
171 | s3c_pwmclk_init(); | 177 | s3c_pwmclk_init(); |
172 | 178 | ||
diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c index a9eee531ca76..66b71736609c 100644 --- a/arch/arm/mach-s3c2416/mach-smdk2416.c +++ b/arch/arm/mach-s3c2416/mach-smdk2416.c | |||
@@ -251,4 +251,5 @@ MACHINE_START(SMDK2416, "SMDK2416") | |||
251 | .map_io = smdk2416_map_io, | 251 | .map_io = smdk2416_map_io, |
252 | .init_machine = smdk2416_machine_init, | 252 | .init_machine = smdk2416_machine_init, |
253 | .timer = &s3c24xx_timer, | 253 | .timer = &s3c24xx_timer, |
254 | .restart = s3c2416_restart, | ||
254 | MACHINE_END | 255 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index ee214bc83c83..46062232bbc7 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c | |||
@@ -44,7 +44,6 @@ | |||
44 | #include <asm/proc-fns.h> | 44 | #include <asm/proc-fns.h> |
45 | #include <asm/irq.h> | 45 | #include <asm/irq.h> |
46 | 46 | ||
47 | #include <mach/reset.h> | ||
48 | #include <mach/idle.h> | 47 | #include <mach/idle.h> |
49 | #include <mach/regs-s3c2443-clock.h> | 48 | #include <mach/regs-s3c2443-clock.h> |
50 | 49 | ||
@@ -76,8 +75,11 @@ static struct sys_device s3c2416_sysdev = { | |||
76 | .cls = &s3c2416_sysclass, | 75 | .cls = &s3c2416_sysclass, |
77 | }; | 76 | }; |
78 | 77 | ||
79 | static void s3c2416_hard_reset(void) | 78 | void s3c2416_restart(char mode, const char *cmd) |
80 | { | 79 | { |
80 | if (mode == 's') | ||
81 | soft_restart(0); | ||
82 | |||
81 | __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); | 83 | __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); |
82 | } | 84 | } |
83 | 85 | ||
@@ -85,7 +87,6 @@ int __init s3c2416_init(void) | |||
85 | { | 87 | { |
86 | printk(KERN_INFO "S3C2416: Initializing architecture\n"); | 88 | printk(KERN_INFO "S3C2416: Initializing architecture\n"); |
87 | 89 | ||
88 | s3c24xx_reset_hook = s3c2416_hard_reset; | ||
89 | /* s3c24xx_idle = s3c2416_idle; */ | 90 | /* s3c24xx_idle = s3c2416_idle; */ |
90 | 91 | ||
91 | /* change WDT IRQ number */ | 92 | /* change WDT IRQ number */ |
diff --git a/arch/arm/mach-s3c2416/setup-sdhci.c b/arch/arm/mach-s3c2416/setup-sdhci.c deleted file mode 100644 index cee53955eb02..000000000000 --- a/arch/arm/mach-s3c2416/setup-sdhci.c +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c2416/setup-sdhci.c | ||
2 | * | ||
3 | * Copyright 2010 Promwad Innovation Company | ||
4 | * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> | ||
5 | * | ||
6 | * S3C2416 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
7 | * | ||
8 | * Based on mach-s3c64xx/setup-sdhci.c | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/types.h> | ||
16 | |||
17 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
18 | |||
19 | char *s3c2416_hsmmc_clksrcs[4] = { | ||
20 | [0] = "hsmmc", | ||
21 | [1] = "hsmmc", | ||
22 | [2] = "hsmmc-if", | ||
23 | /* [3] = "48m", - note not successfully used yet */ | ||
24 | }; | ||
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c index f9e6bdaf41d2..c9879af42b08 100644 --- a/arch/arm/mach-s3c2440/clock.c +++ b/arch/arm/mach-s3c2440/clock.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <linux/mutex.h> | 34 | #include <linux/mutex.h> |
35 | #include <linux/clk.h> | 35 | #include <linux/clk.h> |
36 | #include <linux/io.h> | 36 | #include <linux/io.h> |
37 | #include <linux/serial_core.h> | ||
37 | 38 | ||
38 | #include <mach/hardware.h> | 39 | #include <mach/hardware.h> |
39 | #include <linux/atomic.h> | 40 | #include <linux/atomic.h> |
@@ -43,6 +44,7 @@ | |||
43 | 44 | ||
44 | #include <plat/clock.h> | 45 | #include <plat/clock.h> |
45 | #include <plat/cpu.h> | 46 | #include <plat/cpu.h> |
47 | #include <plat/regs-serial.h> | ||
46 | 48 | ||
47 | /* S3C2440 extended clock support */ | 49 | /* S3C2440 extended clock support */ |
48 | 50 | ||
@@ -108,6 +110,46 @@ static struct clk s3c2440_clk_ac97 = { | |||
108 | .ctrlbit = S3C2440_CLKCON_CAMERA, | 110 | .ctrlbit = S3C2440_CLKCON_CAMERA, |
109 | }; | 111 | }; |
110 | 112 | ||
113 | static unsigned long s3c2440_fclk_n_getrate(struct clk *clk) | ||
114 | { | ||
115 | unsigned long ucon0, ucon1, ucon2, divisor; | ||
116 | |||
117 | /* the fun of calculating the uart divisors on the s3c2440 */ | ||
118 | ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON); | ||
119 | ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON); | ||
120 | ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON); | ||
121 | |||
122 | ucon0 &= S3C2440_UCON0_DIVMASK; | ||
123 | ucon1 &= S3C2440_UCON1_DIVMASK; | ||
124 | ucon2 &= S3C2440_UCON2_DIVMASK; | ||
125 | |||
126 | if (ucon0 != 0) | ||
127 | divisor = (ucon0 >> S3C2440_UCON_DIVSHIFT) + 6; | ||
128 | else if (ucon1 != 0) | ||
129 | divisor = (ucon1 >> S3C2440_UCON_DIVSHIFT) + 21; | ||
130 | else if (ucon2 != 0) | ||
131 | divisor = (ucon2 >> S3C2440_UCON_DIVSHIFT) + 36; | ||
132 | else | ||
133 | /* manual calims 44, seems to be 9 */ | ||
134 | divisor = 9; | ||
135 | |||
136 | return clk_get_rate(clk->parent) / divisor; | ||
137 | } | ||
138 | |||
139 | static struct clk s3c2440_clk_fclk_n = { | ||
140 | .name = "fclk_n", | ||
141 | .parent = &clk_f, | ||
142 | .ops = &(struct clk_ops) { | ||
143 | .get_rate = s3c2440_fclk_n_getrate, | ||
144 | }, | ||
145 | }; | ||
146 | |||
147 | static struct clk_lookup s3c2440_clk_lookup[] = { | ||
148 | CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), | ||
149 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), | ||
150 | CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), | ||
151 | }; | ||
152 | |||
111 | static int s3c2440_clk_add(struct sys_device *sysdev) | 153 | static int s3c2440_clk_add(struct sys_device *sysdev) |
112 | { | 154 | { |
113 | struct clk *clock_upll; | 155 | struct clk *clock_upll; |
@@ -126,10 +168,12 @@ static int s3c2440_clk_add(struct sys_device *sysdev) | |||
126 | s3c2440_clk_cam.parent = clock_h; | 168 | s3c2440_clk_cam.parent = clock_h; |
127 | s3c2440_clk_ac97.parent = clock_p; | 169 | s3c2440_clk_ac97.parent = clock_p; |
128 | s3c2440_clk_cam_upll.parent = clock_upll; | 170 | s3c2440_clk_cam_upll.parent = clock_upll; |
171 | s3c24xx_register_clock(&s3c2440_clk_fclk_n); | ||
129 | 172 | ||
130 | s3c24xx_register_clock(&s3c2440_clk_ac97); | 173 | s3c24xx_register_clock(&s3c2440_clk_ac97); |
131 | s3c24xx_register_clock(&s3c2440_clk_cam); | 174 | s3c24xx_register_clock(&s3c2440_clk_cam); |
132 | s3c24xx_register_clock(&s3c2440_clk_cam_upll); | 175 | s3c24xx_register_clock(&s3c2440_clk_cam_upll); |
176 | clkdev_add_table(s3c2440_clk_lookup, ARRAY_SIZE(s3c2440_clk_lookup)); | ||
133 | 177 | ||
134 | clk_disable(&s3c2440_clk_ac97); | 178 | clk_disable(&s3c2440_clk_ac97); |
135 | clk_disable(&s3c2440_clk_cam); | 179 | clk_disable(&s3c2440_clk_cam); |
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h new file mode 100644 index 000000000000..db8a98ac68c5 --- /dev/null +++ b/arch/arm/mach-s3c2440/common.h | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Header for S3C2440 machines | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H | ||
13 | #define __ARCH_ARM_MACH_S3C2440_COMMON_H | ||
14 | |||
15 | void s3c2440_restart(char mode, const char *cmd); | ||
16 | |||
17 | #endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */ | ||
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 74f92fc3fd04..24569550de1a 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c | |||
@@ -55,6 +55,8 @@ | |||
55 | #include <plat/cpu.h> | 55 | #include <plat/cpu.h> |
56 | #include <plat/audio-simtec.h> | 56 | #include <plat/audio-simtec.h> |
57 | 57 | ||
58 | #include "common.h" | ||
59 | |||
58 | #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" | 60 | #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" |
59 | 61 | ||
60 | static struct map_desc anubis_iodesc[] __initdata = { | 62 | static struct map_desc anubis_iodesc[] __initdata = { |
@@ -96,22 +98,6 @@ static struct map_desc anubis_iodesc[] __initdata = { | |||
96 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 98 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
97 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 99 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
98 | 100 | ||
99 | static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = { | ||
100 | [0] = { | ||
101 | .name = "uclk", | ||
102 | .divisor = 1, | ||
103 | .min_baud = 0, | ||
104 | .max_baud = 0, | ||
105 | }, | ||
106 | [1] = { | ||
107 | .name = "pclk", | ||
108 | .divisor = 1, | ||
109 | .min_baud = 0, | ||
110 | .max_baud = 0, | ||
111 | } | ||
112 | }; | ||
113 | |||
114 | |||
115 | static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { | 101 | static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { |
116 | [0] = { | 102 | [0] = { |
117 | .hwport = 0, | 103 | .hwport = 0, |
@@ -119,8 +105,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { | |||
119 | .ucon = UCON, | 105 | .ucon = UCON, |
120 | .ulcon = ULCON, | 106 | .ulcon = ULCON, |
121 | .ufcon = UFCON, | 107 | .ufcon = UFCON, |
122 | .clocks = anubis_serial_clocks, | 108 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
123 | .clocks_size = ARRAY_SIZE(anubis_serial_clocks), | ||
124 | }, | 109 | }, |
125 | [1] = { | 110 | [1] = { |
126 | .hwport = 2, | 111 | .hwport = 2, |
@@ -128,8 +113,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { | |||
128 | .ucon = UCON, | 113 | .ucon = UCON, |
129 | .ulcon = ULCON, | 114 | .ulcon = ULCON, |
130 | .ufcon = UFCON, | 115 | .ufcon = UFCON, |
131 | .clocks = anubis_serial_clocks, | 116 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
132 | .clocks_size = ARRAY_SIZE(anubis_serial_clocks), | ||
133 | }, | 117 | }, |
134 | }; | 118 | }; |
135 | 119 | ||
@@ -503,4 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis") | |||
503 | .init_machine = anubis_init, | 487 | .init_machine = anubis_init, |
504 | .init_irq = s3c24xx_init_irq, | 488 | .init_irq = s3c24xx_init_irq, |
505 | .timer = &s3c24xx_timer, | 489 | .timer = &s3c24xx_timer, |
490 | .restart = s3c2440_restart, | ||
506 | MACHINE_END | 491 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c index 38887ee0c784..d6a9763110cd 100644 --- a/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/arch/arm/mach-s3c2440/mach-at2440evb.c | |||
@@ -49,6 +49,8 @@ | |||
49 | #include <plat/cpu.h> | 49 | #include <plat/cpu.h> |
50 | #include <plat/mci.h> | 50 | #include <plat/mci.h> |
51 | 51 | ||
52 | #include "common.h" | ||
53 | |||
52 | static struct map_desc at2440evb_iodesc[] __initdata = { | 54 | static struct map_desc at2440evb_iodesc[] __initdata = { |
53 | /* Nothing here */ | 55 | /* Nothing here */ |
54 | }; | 56 | }; |
@@ -57,22 +59,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = { | |||
57 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) | 59 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) |
58 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 60 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
59 | 61 | ||
60 | static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = { | ||
61 | [0] = { | ||
62 | .name = "uclk", | ||
63 | .divisor = 1, | ||
64 | .min_baud = 0, | ||
65 | .max_baud = 0, | ||
66 | }, | ||
67 | [1] = { | ||
68 | .name = "pclk", | ||
69 | .divisor = 1, | ||
70 | .min_baud = 0, | ||
71 | .max_baud = 0, | ||
72 | } | ||
73 | }; | ||
74 | |||
75 | |||
76 | static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { | 62 | static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { |
77 | [0] = { | 63 | [0] = { |
78 | .hwport = 0, | 64 | .hwport = 0, |
@@ -80,8 +66,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { | |||
80 | .ucon = UCON, | 66 | .ucon = UCON, |
81 | .ulcon = ULCON, | 67 | .ulcon = ULCON, |
82 | .ufcon = UFCON, | 68 | .ufcon = UFCON, |
83 | .clocks = at2440evb_serial_clocks, | 69 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
84 | .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks), | ||
85 | }, | 70 | }, |
86 | [1] = { | 71 | [1] = { |
87 | .hwport = 1, | 72 | .hwport = 1, |
@@ -89,8 +74,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { | |||
89 | .ucon = UCON, | 74 | .ucon = UCON, |
90 | .ulcon = ULCON, | 75 | .ulcon = ULCON, |
91 | .ufcon = UFCON, | 76 | .ufcon = UFCON, |
92 | .clocks = at2440evb_serial_clocks, | 77 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
93 | .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks), | ||
94 | }, | 78 | }, |
95 | }; | 79 | }; |
96 | 80 | ||
@@ -238,4 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB") | |||
238 | .init_machine = at2440evb_init, | 222 | .init_machine = at2440evb_init, |
239 | .init_irq = s3c24xx_init_irq, | 223 | .init_irq = s3c24xx_init_irq, |
240 | .timer = &s3c24xx_timer, | 224 | .timer = &s3c24xx_timer, |
225 | .restart = s3c2440_restart, | ||
241 | MACHINE_END | 226 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c index de1e0ff46cec..5859e609d28c 100644 --- a/arch/arm/mach-s3c2440/mach-gta02.c +++ b/arch/arm/mach-s3c2440/mach-gta02.c | |||
@@ -90,6 +90,7 @@ | |||
90 | #include <plat/iic.h> | 90 | #include <plat/iic.h> |
91 | #include <plat/ts.h> | 91 | #include <plat/ts.h> |
92 | 92 | ||
93 | #include "common.h" | ||
93 | 94 | ||
94 | static struct pcf50633 *gta02_pcf; | 95 | static struct pcf50633 *gta02_pcf; |
95 | 96 | ||
@@ -600,4 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02") | |||
600 | .init_irq = s3c24xx_init_irq, | 601 | .init_irq = s3c24xx_init_irq, |
601 | .init_machine = gta02_machine_init, | 602 | .init_machine = gta02_machine_init, |
602 | .timer = &s3c24xx_timer, | 603 | .timer = &s3c24xx_timer, |
604 | .restart = s3c2440_restart, | ||
603 | MACHINE_END | 605 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index 937eb7818c1a..adbbb85bc4cd 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c | |||
@@ -60,6 +60,8 @@ | |||
60 | 60 | ||
61 | #include <sound/s3c24xx_uda134x.h> | 61 | #include <sound/s3c24xx_uda134x.h> |
62 | 62 | ||
63 | #include "common.h" | ||
64 | |||
63 | #define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300) | 65 | #define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300) |
64 | 66 | ||
65 | static struct map_desc mini2440_iodesc[] __initdata = { | 67 | static struct map_desc mini2440_iodesc[] __initdata = { |
@@ -699,4 +701,5 @@ MACHINE_START(MINI2440, "MINI2440") | |||
699 | .init_machine = mini2440_init, | 701 | .init_machine = mini2440_init, |
700 | .init_irq = s3c24xx_init_irq, | 702 | .init_irq = s3c24xx_init_irq, |
701 | .timer = &s3c24xx_timer, | 703 | .timer = &s3c24xx_timer, |
704 | .restart = s3c2440_restart, | ||
702 | MACHINE_END | 705 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 61c0bf148165..40eaf844bc1f 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c | |||
@@ -47,6 +47,8 @@ | |||
47 | #include <plat/devs.h> | 47 | #include <plat/devs.h> |
48 | #include <plat/cpu.h> | 48 | #include <plat/cpu.h> |
49 | 49 | ||
50 | #include "common.h" | ||
51 | |||
50 | static struct map_desc nexcoder_iodesc[] __initdata = { | 52 | static struct map_desc nexcoder_iodesc[] __initdata = { |
51 | /* nothing here yet */ | 53 | /* nothing here yet */ |
52 | }; | 54 | }; |
@@ -156,4 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") | |||
156 | .init_machine = nexcoder_init, | 158 | .init_machine = nexcoder_init, |
157 | .init_irq = s3c24xx_init_irq, | 159 | .init_irq = s3c24xx_init_irq, |
158 | .timer = &s3c24xx_timer, | 160 | .timer = &s3c24xx_timer, |
161 | .restart = s3c2440_restart, | ||
159 | MACHINE_END | 162 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index dc142ebf8cba..4c480ef734f6 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c | |||
@@ -54,6 +54,8 @@ | |||
54 | #include <plat/devs.h> | 54 | #include <plat/devs.h> |
55 | #include <plat/cpu.h> | 55 | #include <plat/cpu.h> |
56 | 56 | ||
57 | #include "common.h" | ||
58 | |||
57 | /* onboard perihperal map */ | 59 | /* onboard perihperal map */ |
58 | 60 | ||
59 | static struct map_desc osiris_iodesc[] __initdata = { | 61 | static struct map_desc osiris_iodesc[] __initdata = { |
@@ -100,21 +102,6 @@ static struct map_desc osiris_iodesc[] __initdata = { | |||
100 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 102 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
101 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 103 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
102 | 104 | ||
103 | static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = { | ||
104 | [0] = { | ||
105 | .name = "uclk", | ||
106 | .divisor = 1, | ||
107 | .min_baud = 0, | ||
108 | .max_baud = 0, | ||
109 | }, | ||
110 | [1] = { | ||
111 | .name = "pclk", | ||
112 | .divisor = 1, | ||
113 | .min_baud = 0, | ||
114 | .max_baud = 0, | ||
115 | } | ||
116 | }; | ||
117 | |||
118 | static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | 105 | static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { |
119 | [0] = { | 106 | [0] = { |
120 | .hwport = 0, | 107 | .hwport = 0, |
@@ -122,8 +109,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | |||
122 | .ucon = UCON, | 109 | .ucon = UCON, |
123 | .ulcon = ULCON, | 110 | .ulcon = ULCON, |
124 | .ufcon = UFCON, | 111 | .ufcon = UFCON, |
125 | .clocks = osiris_serial_clocks, | 112 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
126 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks), | ||
127 | }, | 113 | }, |
128 | [1] = { | 114 | [1] = { |
129 | .hwport = 1, | 115 | .hwport = 1, |
@@ -131,8 +117,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | |||
131 | .ucon = UCON, | 117 | .ucon = UCON, |
132 | .ulcon = ULCON, | 118 | .ulcon = ULCON, |
133 | .ufcon = UFCON, | 119 | .ufcon = UFCON, |
134 | .clocks = osiris_serial_clocks, | 120 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
135 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks), | ||
136 | }, | 121 | }, |
137 | [2] = { | 122 | [2] = { |
138 | .hwport = 2, | 123 | .hwport = 2, |
@@ -140,8 +125,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | |||
140 | .ucon = UCON, | 125 | .ucon = UCON, |
141 | .ulcon = ULCON, | 126 | .ulcon = ULCON, |
142 | .ufcon = UFCON, | 127 | .ufcon = UFCON, |
143 | .clocks = osiris_serial_clocks, | 128 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
144 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks), | ||
145 | } | 129 | } |
146 | }; | 130 | }; |
147 | 131 | ||
@@ -452,4 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS") | |||
452 | .init_irq = s3c24xx_init_irq, | 436 | .init_irq = s3c24xx_init_irq, |
453 | .init_machine = osiris_init, | 437 | .init_machine = osiris_init, |
454 | .timer = &s3c24xx_timer, | 438 | .timer = &s3c24xx_timer, |
439 | .restart = s3c2440_restart, | ||
455 | MACHINE_END | 440 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c index 0d3453bf567c..f892e8befca8 100644 --- a/arch/arm/mach-s3c2440/mach-rx1950.c +++ b/arch/arm/mach-s3c2440/mach-rx1950.c | |||
@@ -62,21 +62,14 @@ | |||
62 | 62 | ||
63 | #include <sound/uda1380.h> | 63 | #include <sound/uda1380.h> |
64 | 64 | ||
65 | #include "common.h" | ||
66 | |||
65 | #define LCD_PWM_PERIOD 192960 | 67 | #define LCD_PWM_PERIOD 192960 |
66 | #define LCD_PWM_DUTY 127353 | 68 | #define LCD_PWM_DUTY 127353 |
67 | 69 | ||
68 | static struct map_desc rx1950_iodesc[] __initdata = { | 70 | static struct map_desc rx1950_iodesc[] __initdata = { |
69 | }; | 71 | }; |
70 | 72 | ||
71 | static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = { | ||
72 | [0] = { | ||
73 | .name = "fclk", | ||
74 | .divisor = 0x0a, | ||
75 | .min_baud = 0, | ||
76 | .max_baud = 0, | ||
77 | }, | ||
78 | }; | ||
79 | |||
80 | static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { | 73 | static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { |
81 | [0] = { | 74 | [0] = { |
82 | .hwport = 0, | 75 | .hwport = 0, |
@@ -84,8 +77,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { | |||
84 | .ucon = 0x3c5, | 77 | .ucon = 0x3c5, |
85 | .ulcon = 0x03, | 78 | .ulcon = 0x03, |
86 | .ufcon = 0x51, | 79 | .ufcon = 0x51, |
87 | .clocks = rx1950_serial_clocks, | 80 | .clk_sel = S3C2410_UCON_CLKSEL3, |
88 | .clocks_size = ARRAY_SIZE(rx1950_serial_clocks), | ||
89 | }, | 81 | }, |
90 | [1] = { | 82 | [1] = { |
91 | .hwport = 1, | 83 | .hwport = 1, |
@@ -93,8 +85,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { | |||
93 | .ucon = 0x3c5, | 85 | .ucon = 0x3c5, |
94 | .ulcon = 0x03, | 86 | .ulcon = 0x03, |
95 | .ufcon = 0x51, | 87 | .ufcon = 0x51, |
96 | .clocks = rx1950_serial_clocks, | 88 | .clk_sel = S3C2410_UCON_CLKSEL3, |
97 | .clocks_size = ARRAY_SIZE(rx1950_serial_clocks), | ||
98 | }, | 89 | }, |
99 | /* IR port */ | 90 | /* IR port */ |
100 | [2] = { | 91 | [2] = { |
@@ -103,8 +94,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { | |||
103 | .ucon = 0x3c5, | 94 | .ucon = 0x3c5, |
104 | .ulcon = 0x43, | 95 | .ulcon = 0x43, |
105 | .ufcon = 0xf1, | 96 | .ufcon = 0xf1, |
106 | .clocks = rx1950_serial_clocks, | 97 | .clk_sel = S3C2410_UCON_CLKSEL3, |
107 | .clocks_size = ARRAY_SIZE(rx1950_serial_clocks), | ||
108 | }, | 98 | }, |
109 | }; | 99 | }; |
110 | 100 | ||
@@ -832,4 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950") | |||
832 | .init_irq = s3c24xx_init_irq, | 822 | .init_irq = s3c24xx_init_irq, |
833 | .init_machine = rx1950_init_machine, | 823 | .init_machine = rx1950_init_machine, |
834 | .timer = &s3c24xx_timer, | 824 | .timer = &s3c24xx_timer, |
825 | .restart = s3c2440_restart, | ||
835 | MACHINE_END | 826 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index e19499c2f909..88d648a874d4 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c | |||
@@ -51,6 +51,8 @@ | |||
51 | #include <plat/cpu.h> | 51 | #include <plat/cpu.h> |
52 | #include <plat/pm.h> | 52 | #include <plat/pm.h> |
53 | 53 | ||
54 | #include "common.h" | ||
55 | |||
54 | static struct map_desc rx3715_iodesc[] __initdata = { | 56 | static struct map_desc rx3715_iodesc[] __initdata = { |
55 | /* dump ISA space somewhere unused */ | 57 | /* dump ISA space somewhere unused */ |
56 | 58 | ||
@@ -67,16 +69,6 @@ static struct map_desc rx3715_iodesc[] __initdata = { | |||
67 | }, | 69 | }, |
68 | }; | 70 | }; |
69 | 71 | ||
70 | |||
71 | static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = { | ||
72 | [0] = { | ||
73 | .name = "fclk", | ||
74 | .divisor = 0, | ||
75 | .min_baud = 0, | ||
76 | .max_baud = 0, | ||
77 | } | ||
78 | }; | ||
79 | |||
80 | static struct s3c2410_uartcfg rx3715_uartcfgs[] = { | 72 | static struct s3c2410_uartcfg rx3715_uartcfgs[] = { |
81 | [0] = { | 73 | [0] = { |
82 | .hwport = 0, | 74 | .hwport = 0, |
@@ -84,8 +76,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = { | |||
84 | .ucon = 0x3c5, | 76 | .ucon = 0x3c5, |
85 | .ulcon = 0x03, | 77 | .ulcon = 0x03, |
86 | .ufcon = 0x51, | 78 | .ufcon = 0x51, |
87 | .clocks = rx3715_serial_clocks, | 79 | .clk_sel = S3C2410_UCON_CLKSEL3, |
88 | .clocks_size = ARRAY_SIZE(rx3715_serial_clocks), | ||
89 | }, | 80 | }, |
90 | [1] = { | 81 | [1] = { |
91 | .hwport = 1, | 82 | .hwport = 1, |
@@ -93,8 +84,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = { | |||
93 | .ucon = 0x3c5, | 84 | .ucon = 0x3c5, |
94 | .ulcon = 0x03, | 85 | .ulcon = 0x03, |
95 | .ufcon = 0x00, | 86 | .ufcon = 0x00, |
96 | .clocks = rx3715_serial_clocks, | 87 | .clk_sel = S3C2410_UCON_CLKSEL3, |
97 | .clocks_size = ARRAY_SIZE(rx3715_serial_clocks), | ||
98 | }, | 88 | }, |
99 | /* IR port */ | 89 | /* IR port */ |
100 | [2] = { | 90 | [2] = { |
@@ -103,8 +93,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = { | |||
103 | .ucon = 0x3c5, | 93 | .ucon = 0x3c5, |
104 | .ulcon = 0x43, | 94 | .ulcon = 0x43, |
105 | .ufcon = 0x51, | 95 | .ufcon = 0x51, |
106 | .clocks = rx3715_serial_clocks, | 96 | .clk_sel = S3C2410_UCON_CLKSEL3, |
107 | .clocks_size = ARRAY_SIZE(rx3715_serial_clocks), | ||
108 | } | 97 | } |
109 | }; | 98 | }; |
110 | 99 | ||
@@ -224,4 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715") | |||
224 | .init_irq = rx3715_init_irq, | 213 | .init_irq = rx3715_init_irq, |
225 | .init_machine = rx3715_init_machine, | 214 | .init_machine = rx3715_init_machine, |
226 | .timer = &s3c24xx_timer, | 215 | .timer = &s3c24xx_timer, |
216 | .restart = s3c2440_restart, | ||
227 | MACHINE_END | 217 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index 36eeb4197a84..1deb60d12a60 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c | |||
@@ -47,6 +47,8 @@ | |||
47 | 47 | ||
48 | #include <plat/common-smdk.h> | 48 | #include <plat/common-smdk.h> |
49 | 49 | ||
50 | #include "common.h" | ||
51 | |||
50 | static struct map_desc smdk2440_iodesc[] __initdata = { | 52 | static struct map_desc smdk2440_iodesc[] __initdata = { |
51 | /* ISA IO Space map (memory space selected by A24) */ | 53 | /* ISA IO Space map (memory space selected by A24) */ |
52 | 54 | ||
@@ -181,4 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440") | |||
181 | .map_io = smdk2440_map_io, | 183 | .map_io = smdk2440_map_io, |
182 | .init_machine = smdk2440_machine_init, | 184 | .init_machine = smdk2440_machine_init, |
183 | .timer = &s3c24xx_timer, | 185 | .timer = &s3c24xx_timer, |
186 | .restart = s3c2440_restart, | ||
184 | MACHINE_END | 187 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index 37f8cc6aabd4..42d73f1e0cef 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <plat/cpu.h> | 35 | #include <plat/cpu.h> |
36 | #include <plat/s3c244x.h> | 36 | #include <plat/s3c244x.h> |
37 | #include <plat/pm.h> | 37 | #include <plat/pm.h> |
38 | #include <plat/watchdog-reset.h> | ||
38 | 39 | ||
39 | #include <plat/gpio-core.h> | 40 | #include <plat/gpio-core.h> |
40 | #include <plat/gpio-cfg.h> | 41 | #include <plat/gpio-cfg.h> |
@@ -73,3 +74,15 @@ void __init s3c2440_map_io(void) | |||
73 | s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; | 74 | s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; |
74 | s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; | 75 | s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; |
75 | } | 76 | } |
77 | |||
78 | void s3c2440_restart(char mode, const char *cmd) | ||
79 | { | ||
80 | if (mode == 's') { | ||
81 | soft_restart(0); | ||
82 | } | ||
83 | |||
84 | arch_wdt_reset(); | ||
85 | |||
86 | /* we'll take a jump through zero as a poor second */ | ||
87 | soft_restart(0); | ||
88 | } | ||
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index bec107e00441..209236956222 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c | |||
@@ -145,4 +145,5 @@ MACHINE_START(SMDK2443, "SMDK2443") | |||
145 | .map_io = smdk2443_map_io, | 145 | .map_io = smdk2443_map_io, |
146 | .init_machine = smdk2443_machine_init, | 146 | .init_machine = smdk2443_machine_init, |
147 | .timer = &s3c24xx_timer, | 147 | .timer = &s3c24xx_timer, |
148 | .restart = s3c2443_restart, | ||
148 | MACHINE_END | 149 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index a22b771b0f36..4568ded338d0 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <asm/irq.h> | 31 | #include <asm/irq.h> |
32 | 32 | ||
33 | #include <mach/regs-s3c2443-clock.h> | 33 | #include <mach/regs-s3c2443-clock.h> |
34 | #include <mach/reset.h> | ||
35 | 34 | ||
36 | #include <plat/gpio-core.h> | 35 | #include <plat/gpio-core.h> |
37 | #include <plat/gpio-cfg.h> | 36 | #include <plat/gpio-cfg.h> |
@@ -57,8 +56,11 @@ static struct sys_device s3c2443_sysdev = { | |||
57 | .cls = &s3c2443_sysclass, | 56 | .cls = &s3c2443_sysclass, |
58 | }; | 57 | }; |
59 | 58 | ||
60 | static void s3c2443_hard_reset(void) | 59 | void s3c2443_restart(char mode, const char *cmd) |
61 | { | 60 | { |
61 | if (mode == 's') | ||
62 | soft_restart(0); | ||
63 | |||
62 | __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); | 64 | __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); |
63 | } | 65 | } |
64 | 66 | ||
@@ -66,8 +68,6 @@ int __init s3c2443_init(void) | |||
66 | { | 68 | { |
67 | printk("S3C2443: Initialising architecture\n"); | 69 | printk("S3C2443: Initialising architecture\n"); |
68 | 70 | ||
69 | s3c24xx_reset_hook = s3c2443_hard_reset; | ||
70 | |||
71 | s3c_nand_setname("s3c2412-nand"); | 71 | s3c_nand_setname("s3c2412-nand"); |
72 | s3c_fb_setname("s3c2443-fb"); | 72 | s3c_fb_setname("s3c2443-fb"); |
73 | 73 | ||
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 4d8c489edc04..e9dae9105df6 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig | |||
@@ -77,6 +77,11 @@ config S3C64XX_SETUP_SDHCI_GPIO | |||
77 | help | 77 | help |
78 | Common setup code for S3C64XX SDHCI GPIO configurations | 78 | Common setup code for S3C64XX SDHCI GPIO configurations |
79 | 79 | ||
80 | config S3C64XX_SETUP_SPI | ||
81 | bool | ||
82 | help | ||
83 | Common setup code for SPI GPIO configurations | ||
84 | |||
80 | # S36400 Macchine support | 85 | # S36400 Macchine support |
81 | 86 | ||
82 | config MACH_SMDK6400 | 87 | config MACH_SMDK6400 |
@@ -276,6 +281,7 @@ config MACH_WLF_CRAGG_6410 | |||
276 | select S3C64XX_SETUP_IDE | 281 | select S3C64XX_SETUP_IDE |
277 | select S3C64XX_SETUP_FB_24BPP | 282 | select S3C64XX_SETUP_FB_24BPP |
278 | select S3C64XX_SETUP_KEYPAD | 283 | select S3C64XX_SETUP_KEYPAD |
284 | select S3C64XX_SETUP_SPI | ||
279 | select SAMSUNG_DEV_ADC | 285 | select SAMSUNG_DEV_ADC |
280 | select SAMSUNG_DEV_KEYPAD | 286 | select SAMSUNG_DEV_KEYPAD |
281 | select S3C_DEV_USB_HOST | 287 | select S3C_DEV_USB_HOST |
@@ -286,7 +292,7 @@ config MACH_WLF_CRAGG_6410 | |||
286 | select S3C_DEV_I2C1 | 292 | select S3C_DEV_I2C1 |
287 | select S3C_DEV_WDT | 293 | select S3C_DEV_WDT |
288 | select S3C_DEV_RTC | 294 | select S3C_DEV_RTC |
289 | select S3C64XX_DEV_SPI | 295 | select S3C64XX_DEV_SPI0 |
290 | select SAMSUNG_GPIO_EXTRA128 | 296 | select SAMSUNG_GPIO_EXTRA128 |
291 | select I2C | 297 | select I2C |
292 | help | 298 | help |
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index cfc0b9941808..1822ac2eba31 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile | |||
@@ -10,54 +10,49 @@ obj-m := | |||
10 | obj-n := | 10 | obj-n := |
11 | obj- := | 11 | obj- := |
12 | 12 | ||
13 | # Core files | 13 | # Core |
14 | obj-y += cpu.o | ||
15 | obj-y += clock.o | ||
16 | 14 | ||
17 | # Core support for S3C6400 system | 15 | obj-y += common.o clock.o |
16 | |||
17 | # Core support | ||
18 | 18 | ||
19 | obj-$(CONFIG_CPU_S3C6400) += s3c6400.o | 19 | obj-$(CONFIG_CPU_S3C6400) += s3c6400.o |
20 | obj-$(CONFIG_CPU_S3C6410) += s3c6410.o | 20 | obj-$(CONFIG_CPU_S3C6410) += s3c6410.o |
21 | 21 | ||
22 | obj-y += irq.o | 22 | # PM |
23 | obj-y += irq-eint.o | 23 | |
24 | obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o | ||
24 | 25 | ||
25 | # DMA support | 26 | # DMA support |
26 | 27 | ||
27 | obj-$(CONFIG_S3C64XX_DMA) += dma.o | 28 | obj-$(CONFIG_S3C64XX_DMA) += dma.o |
28 | 29 | ||
29 | # Device setup | 30 | # Device support |
30 | 31 | ||
31 | obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o | 32 | obj-y += dev-uart.o |
32 | obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o | 33 | obj-y += dev-audio.o |
33 | obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o | 34 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o |
34 | obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o | ||
35 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o | ||
36 | obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o | ||
37 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
38 | 35 | ||
39 | # PM | 36 | # Device setup |
40 | 37 | ||
41 | obj-$(CONFIG_PM) += pm.o | 38 | obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o |
42 | obj-$(CONFIG_PM) += sleep.o | 39 | obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o |
43 | obj-$(CONFIG_PM) += irq-pm.o | 40 | obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o |
41 | obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o | ||
42 | obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o | ||
43 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
44 | obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi.o | ||
44 | 45 | ||
45 | # Machine support | 46 | # Machine support |
46 | 47 | ||
47 | obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o | 48 | obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o |
48 | obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o | 49 | obj-$(CONFIG_MACH_HMT) += mach-hmt.o |
49 | obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o | 50 | obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o |
50 | obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o | 51 | obj-$(CONFIG_MACH_NCP) += mach-ncp.o |
51 | obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o | 52 | obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o |
52 | obj-$(CONFIG_MACH_NCP) += mach-ncp.o | 53 | obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o |
53 | obj-$(CONFIG_MACH_HMT) += mach-hmt.o | 54 | obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o |
54 | obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o | 55 | obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o |
55 | obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o | 56 | obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o |
56 | obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o | 57 | obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o |
57 | obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o | 58 | obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o |
58 | |||
59 | # device support | ||
60 | |||
61 | obj-y += dev-uart.o | ||
62 | obj-y += dev-audio.o | ||
63 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 39c238d7a3dc..31bb27dc4aeb 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -184,18 +184,6 @@ static struct clk init_clocks_off[] = { | |||
184 | .enable = s3c64xx_pclk_ctrl, | 184 | .enable = s3c64xx_pclk_ctrl, |
185 | .ctrlbit = S3C_CLKCON_PCLK_SPI1, | 185 | .ctrlbit = S3C_CLKCON_PCLK_SPI1, |
186 | }, { | 186 | }, { |
187 | .name = "spi_48m", | ||
188 | .devname = "s3c64xx-spi.0", | ||
189 | .parent = &clk_48m, | ||
190 | .enable = s3c64xx_sclk_ctrl, | ||
191 | .ctrlbit = S3C_CLKCON_SCLK_SPI0_48, | ||
192 | }, { | ||
193 | .name = "spi_48m", | ||
194 | .devname = "s3c64xx-spi.1", | ||
195 | .parent = &clk_48m, | ||
196 | .enable = s3c64xx_sclk_ctrl, | ||
197 | .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, | ||
198 | }, { | ||
199 | .name = "48m", | 187 | .name = "48m", |
200 | .devname = "s3c-sdhci.0", | 188 | .devname = "s3c-sdhci.0", |
201 | .parent = &clk_48m, | 189 | .parent = &clk_48m, |
@@ -226,6 +214,22 @@ static struct clk init_clocks_off[] = { | |||
226 | }, | 214 | }, |
227 | }; | 215 | }; |
228 | 216 | ||
217 | static struct clk clk_48m_spi0 = { | ||
218 | .name = "spi_48m", | ||
219 | .devname = "s3c64xx-spi.0", | ||
220 | .parent = &clk_48m, | ||
221 | .enable = s3c64xx_sclk_ctrl, | ||
222 | .ctrlbit = S3C_CLKCON_SCLK_SPI0_48, | ||
223 | }; | ||
224 | |||
225 | static struct clk clk_48m_spi1 = { | ||
226 | .name = "spi_48m", | ||
227 | .devname = "s3c64xx-spi.1", | ||
228 | .parent = &clk_48m, | ||
229 | .enable = s3c64xx_sclk_ctrl, | ||
230 | .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, | ||
231 | }; | ||
232 | |||
229 | static struct clk init_clocks[] = { | 233 | static struct clk init_clocks[] = { |
230 | { | 234 | { |
231 | .name = "lcd", | 235 | .name = "lcd", |
@@ -243,24 +247,6 @@ static struct clk init_clocks[] = { | |||
243 | .enable = s3c64xx_hclk_ctrl, | 247 | .enable = s3c64xx_hclk_ctrl, |
244 | .ctrlbit = S3C_CLKCON_HCLK_UHOST, | 248 | .ctrlbit = S3C_CLKCON_HCLK_UHOST, |
245 | }, { | 249 | }, { |
246 | .name = "hsmmc", | ||
247 | .devname = "s3c-sdhci.0", | ||
248 | .parent = &clk_h, | ||
249 | .enable = s3c64xx_hclk_ctrl, | ||
250 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC0, | ||
251 | }, { | ||
252 | .name = "hsmmc", | ||
253 | .devname = "s3c-sdhci.1", | ||
254 | .parent = &clk_h, | ||
255 | .enable = s3c64xx_hclk_ctrl, | ||
256 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC1, | ||
257 | }, { | ||
258 | .name = "hsmmc", | ||
259 | .devname = "s3c-sdhci.2", | ||
260 | .parent = &clk_h, | ||
261 | .enable = s3c64xx_hclk_ctrl, | ||
262 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, | ||
263 | }, { | ||
264 | .name = "otg", | 250 | .name = "otg", |
265 | .parent = &clk_h, | 251 | .parent = &clk_h, |
266 | .enable = s3c64xx_hclk_ctrl, | 252 | .enable = s3c64xx_hclk_ctrl, |
@@ -310,6 +296,29 @@ static struct clk init_clocks[] = { | |||
310 | } | 296 | } |
311 | }; | 297 | }; |
312 | 298 | ||
299 | static struct clk clk_hsmmc0 = { | ||
300 | .name = "hsmmc", | ||
301 | .devname = "s3c-sdhci.0", | ||
302 | .parent = &clk_h, | ||
303 | .enable = s3c64xx_hclk_ctrl, | ||
304 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC0, | ||
305 | }; | ||
306 | |||
307 | static struct clk clk_hsmmc1 = { | ||
308 | .name = "hsmmc", | ||
309 | .devname = "s3c-sdhci.1", | ||
310 | .parent = &clk_h, | ||
311 | .enable = s3c64xx_hclk_ctrl, | ||
312 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC1, | ||
313 | }; | ||
314 | |||
315 | static struct clk clk_hsmmc2 = { | ||
316 | .name = "hsmmc", | ||
317 | .devname = "s3c-sdhci.2", | ||
318 | .parent = &clk_h, | ||
319 | .enable = s3c64xx_hclk_ctrl, | ||
320 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, | ||
321 | }; | ||
313 | 322 | ||
314 | static struct clk clk_fout_apll = { | 323 | static struct clk clk_fout_apll = { |
315 | .name = "fout_apll", | 324 | .name = "fout_apll", |
@@ -578,36 +587,6 @@ static struct clksrc_sources clkset_camif = { | |||
578 | static struct clksrc_clk clksrcs[] = { | 587 | static struct clksrc_clk clksrcs[] = { |
579 | { | 588 | { |
580 | .clk = { | 589 | .clk = { |
581 | .name = "mmc_bus", | ||
582 | .devname = "s3c-sdhci.0", | ||
583 | .ctrlbit = S3C_CLKCON_SCLK_MMC0, | ||
584 | .enable = s3c64xx_sclk_ctrl, | ||
585 | }, | ||
586 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2 }, | ||
587 | .reg_div = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4 }, | ||
588 | .sources = &clkset_spi_mmc, | ||
589 | }, { | ||
590 | .clk = { | ||
591 | .name = "mmc_bus", | ||
592 | .devname = "s3c-sdhci.1", | ||
593 | .ctrlbit = S3C_CLKCON_SCLK_MMC1, | ||
594 | .enable = s3c64xx_sclk_ctrl, | ||
595 | }, | ||
596 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2 }, | ||
597 | .reg_div = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4 }, | ||
598 | .sources = &clkset_spi_mmc, | ||
599 | }, { | ||
600 | .clk = { | ||
601 | .name = "mmc_bus", | ||
602 | .devname = "s3c-sdhci.2", | ||
603 | .ctrlbit = S3C_CLKCON_SCLK_MMC2, | ||
604 | .enable = s3c64xx_sclk_ctrl, | ||
605 | }, | ||
606 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2 }, | ||
607 | .reg_div = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4 }, | ||
608 | .sources = &clkset_spi_mmc, | ||
609 | }, { | ||
610 | .clk = { | ||
611 | .name = "usb-bus-host", | 590 | .name = "usb-bus-host", |
612 | .ctrlbit = S3C_CLKCON_SCLK_UHOST, | 591 | .ctrlbit = S3C_CLKCON_SCLK_UHOST, |
613 | .enable = s3c64xx_sclk_ctrl, | 592 | .enable = s3c64xx_sclk_ctrl, |
@@ -617,35 +596,6 @@ static struct clksrc_clk clksrcs[] = { | |||
617 | .sources = &clkset_uhost, | 596 | .sources = &clkset_uhost, |
618 | }, { | 597 | }, { |
619 | .clk = { | 598 | .clk = { |
620 | .name = "uclk1", | ||
621 | .ctrlbit = S3C_CLKCON_SCLK_UART, | ||
622 | .enable = s3c64xx_sclk_ctrl, | ||
623 | }, | ||
624 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1 }, | ||
625 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 }, | ||
626 | .sources = &clkset_uart, | ||
627 | }, { | ||
628 | /* Where does UCLK0 come from? */ | ||
629 | .clk = { | ||
630 | .name = "spi-bus", | ||
631 | .devname = "s3c64xx-spi.0", | ||
632 | .ctrlbit = S3C_CLKCON_SCLK_SPI0, | ||
633 | .enable = s3c64xx_sclk_ctrl, | ||
634 | }, | ||
635 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 }, | ||
636 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 }, | ||
637 | .sources = &clkset_spi_mmc, | ||
638 | }, { | ||
639 | .clk = { | ||
640 | .name = "spi-bus", | ||
641 | .devname = "s3c64xx-spi.1", | ||
642 | .enable = s3c64xx_sclk_ctrl, | ||
643 | }, | ||
644 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 }, | ||
645 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 }, | ||
646 | .sources = &clkset_spi_mmc, | ||
647 | }, { | ||
648 | .clk = { | ||
649 | .name = "audio-bus", | 599 | .name = "audio-bus", |
650 | .devname = "samsung-i2s.0", | 600 | .devname = "samsung-i2s.0", |
651 | .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, | 601 | .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, |
@@ -695,6 +645,78 @@ static struct clksrc_clk clksrcs[] = { | |||
695 | }, | 645 | }, |
696 | }; | 646 | }; |
697 | 647 | ||
648 | /* Where does UCLK0 come from? */ | ||
649 | static struct clksrc_clk clk_sclk_uclk = { | ||
650 | .clk = { | ||
651 | .name = "uclk1", | ||
652 | .ctrlbit = S3C_CLKCON_SCLK_UART, | ||
653 | .enable = s3c64xx_sclk_ctrl, | ||
654 | }, | ||
655 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1 }, | ||
656 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 }, | ||
657 | .sources = &clkset_uart, | ||
658 | }; | ||
659 | |||
660 | static struct clksrc_clk clk_sclk_mmc0 = { | ||
661 | .clk = { | ||
662 | .name = "mmc_bus", | ||
663 | .devname = "s3c-sdhci.0", | ||
664 | .ctrlbit = S3C_CLKCON_SCLK_MMC0, | ||
665 | .enable = s3c64xx_sclk_ctrl, | ||
666 | }, | ||
667 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2 }, | ||
668 | .reg_div = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4 }, | ||
669 | .sources = &clkset_spi_mmc, | ||
670 | }; | ||
671 | |||
672 | static struct clksrc_clk clk_sclk_mmc1 = { | ||
673 | .clk = { | ||
674 | .name = "mmc_bus", | ||
675 | .devname = "s3c-sdhci.1", | ||
676 | .ctrlbit = S3C_CLKCON_SCLK_MMC1, | ||
677 | .enable = s3c64xx_sclk_ctrl, | ||
678 | }, | ||
679 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2 }, | ||
680 | .reg_div = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4 }, | ||
681 | .sources = &clkset_spi_mmc, | ||
682 | }; | ||
683 | |||
684 | static struct clksrc_clk clk_sclk_mmc2 = { | ||
685 | .clk = { | ||
686 | .name = "mmc_bus", | ||
687 | .devname = "s3c-sdhci.2", | ||
688 | .ctrlbit = S3C_CLKCON_SCLK_MMC2, | ||
689 | .enable = s3c64xx_sclk_ctrl, | ||
690 | }, | ||
691 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2 }, | ||
692 | .reg_div = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4 }, | ||
693 | .sources = &clkset_spi_mmc, | ||
694 | }; | ||
695 | |||
696 | static struct clksrc_clk clk_sclk_spi0 = { | ||
697 | .clk = { | ||
698 | .name = "spi-bus", | ||
699 | .devname = "s3c64xx-spi.0", | ||
700 | .ctrlbit = S3C_CLKCON_SCLK_SPI0, | ||
701 | .enable = s3c64xx_sclk_ctrl, | ||
702 | }, | ||
703 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 }, | ||
704 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 }, | ||
705 | .sources = &clkset_spi_mmc, | ||
706 | }; | ||
707 | |||
708 | static struct clksrc_clk clk_sclk_spi1 = { | ||
709 | .clk = { | ||
710 | .name = "spi-bus", | ||
711 | .devname = "s3c64xx-spi.1", | ||
712 | .ctrlbit = S3C_CLKCON_SCLK_SPI1, | ||
713 | .enable = s3c64xx_sclk_ctrl, | ||
714 | }, | ||
715 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 }, | ||
716 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 }, | ||
717 | .sources = &clkset_spi_mmc, | ||
718 | }; | ||
719 | |||
698 | /* Clock initialisation code */ | 720 | /* Clock initialisation code */ |
699 | 721 | ||
700 | static struct clksrc_clk *init_parents[] = { | 722 | static struct clksrc_clk *init_parents[] = { |
@@ -703,9 +725,42 @@ static struct clksrc_clk *init_parents[] = { | |||
703 | &clk_mout_mpll, | 725 | &clk_mout_mpll, |
704 | }; | 726 | }; |
705 | 727 | ||
728 | static struct clksrc_clk *clksrc_cdev[] = { | ||
729 | &clk_sclk_uclk, | ||
730 | &clk_sclk_mmc0, | ||
731 | &clk_sclk_mmc1, | ||
732 | &clk_sclk_mmc2, | ||
733 | &clk_sclk_spi0, | ||
734 | &clk_sclk_spi1, | ||
735 | }; | ||
736 | |||
737 | static struct clk *clk_cdev[] = { | ||
738 | &clk_hsmmc0, | ||
739 | &clk_hsmmc1, | ||
740 | &clk_hsmmc2, | ||
741 | &clk_48m_spi0, | ||
742 | &clk_48m_spi1, | ||
743 | }; | ||
744 | |||
745 | static struct clk_lookup s3c64xx_clk_lookup[] = { | ||
746 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), | ||
747 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), | ||
748 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0), | ||
749 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1), | ||
750 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2), | ||
751 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | ||
752 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | ||
753 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | ||
754 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | ||
755 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), | ||
756 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_48m_spi0), | ||
757 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | ||
758 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk2", &clk_48m_spi1), | ||
759 | }; | ||
760 | |||
706 | #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) | 761 | #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) |
707 | 762 | ||
708 | void __init_or_cpufreq s3c6400_setup_clocks(void) | 763 | void __init_or_cpufreq s3c64xx_setup_clocks(void) |
709 | { | 764 | { |
710 | struct clk *xtal_clk; | 765 | struct clk *xtal_clk; |
711 | unsigned long xtal; | 766 | unsigned long xtal; |
@@ -804,13 +859,15 @@ static struct clk *clks[] __initdata = { | |||
804 | * as ARMCLK as well as the necessary parent clocks. | 859 | * as ARMCLK as well as the necessary parent clocks. |
805 | * | 860 | * |
806 | * This call does not setup the clocks, which is left to the | 861 | * This call does not setup the clocks, which is left to the |
807 | * s3c6400_setup_clocks() call which may be needed by the cpufreq | 862 | * s3c64xx_setup_clocks() call which may be needed by the cpufreq |
808 | * or resume code to re-set the clocks if the bootloader has changed | 863 | * or resume code to re-set the clocks if the bootloader has changed |
809 | * them. | 864 | * them. |
810 | */ | 865 | */ |
811 | void __init s3c64xx_register_clocks(unsigned long xtal, | 866 | void __init s3c64xx_register_clocks(unsigned long xtal, |
812 | unsigned armclk_divlimit) | 867 | unsigned armclk_divlimit) |
813 | { | 868 | { |
869 | unsigned int cnt; | ||
870 | |||
814 | armclk_mask = armclk_divlimit; | 871 | armclk_mask = armclk_divlimit; |
815 | 872 | ||
816 | s3c24xx_register_baseclocks(xtal); | 873 | s3c24xx_register_baseclocks(xtal); |
@@ -821,7 +878,15 @@ void __init s3c64xx_register_clocks(unsigned long xtal, | |||
821 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 878 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
822 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 879 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
823 | 880 | ||
881 | s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); | ||
882 | for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++) | ||
883 | s3c_disable_clocks(clk_cdev[cnt], 1); | ||
884 | |||
824 | s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); | 885 | s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); |
825 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 886 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
887 | for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++) | ||
888 | s3c_register_clksrc(clksrc_cdev[cnt], 1); | ||
889 | clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup)); | ||
890 | |||
826 | s3c_pwmclk_init(); | 891 | s3c_pwmclk_init(); |
827 | } | 892 | } |
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/common.c index 4d203be1f4c3..35182ba049da 100644 --- a/arch/arm/mach-s3c64xx/irq-eint.c +++ b/arch/arm/mach-s3c64xx/common.c | |||
@@ -1,11 +1,13 @@ | |||
1 | /* arch/arm/plat-s3c64xx/irq-eint.c | 1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
2 | * | 4 | * |
3 | * Copyright 2008 Openmoko, Inc. | 5 | * Copyright 2008 Openmoko, Inc. |
4 | * Copyright 2008 Simtec Electronics | 6 | * Copyright 2008 Simtec Electronics |
5 | * Ben Dooks <ben@simtec.co.uk> | 7 | * Ben Dooks <ben@simtec.co.uk> |
6 | * http://armlinux.simtec.co.uk/ | 8 | * http://armlinux.simtec.co.uk/ |
7 | * | 9 | * |
8 | * S3C64XX - Interrupt handling for IRQ_EINT(x) | 10 | * Common Codes for S3C64XX machines |
9 | * | 11 | * |
10 | * This program is free software; you can redistribute it and/or modify | 12 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as | 13 | * it under the terms of the GNU General Public License version 2 as |
@@ -13,21 +15,183 @@ | |||
13 | */ | 15 | */ |
14 | 16 | ||
15 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/init.h> | ||
19 | #include <linux/module.h> | ||
16 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
21 | #include <linux/ioport.h> | ||
17 | #include <linux/sysdev.h> | 22 | #include <linux/sysdev.h> |
18 | #include <linux/gpio.h> | 23 | #include <linux/serial_core.h> |
19 | #include <linux/irq.h> | 24 | #include <linux/platform_device.h> |
20 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | #include <linux/dma-mapping.h> | ||
27 | #include <linux/irq.h> | ||
28 | #include <linux/gpio.h> | ||
21 | 29 | ||
30 | #include <asm/mach/arch.h> | ||
31 | #include <asm/mach/map.h> | ||
22 | #include <asm/hardware/vic.h> | 32 | #include <asm/hardware/vic.h> |
23 | 33 | ||
24 | #include <plat/regs-irqtype.h> | 34 | #include <mach/map.h> |
35 | #include <mach/hardware.h> | ||
25 | #include <mach/regs-gpio.h> | 36 | #include <mach/regs-gpio.h> |
26 | #include <plat/gpio-cfg.h> | ||
27 | 37 | ||
28 | #include <mach/map.h> | ||
29 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
39 | #include <plat/clock.h> | ||
40 | #include <plat/devs.h> | ||
30 | #include <plat/pm.h> | 41 | #include <plat/pm.h> |
42 | #include <plat/gpio-cfg.h> | ||
43 | #include <plat/irq-uart.h> | ||
44 | #include <plat/irq-vic-timer.h> | ||
45 | #include <plat/regs-irqtype.h> | ||
46 | #include <plat/regs-serial.h> | ||
47 | #include <plat/watchdog-reset.h> | ||
48 | |||
49 | #include "common.h" | ||
50 | |||
51 | /* uart registration process */ | ||
52 | |||
53 | void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
54 | { | ||
55 | s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); | ||
56 | } | ||
57 | |||
58 | /* table of supported CPUs */ | ||
59 | |||
60 | static const char name_s3c6400[] = "S3C6400"; | ||
61 | static const char name_s3c6410[] = "S3C6410"; | ||
62 | |||
63 | static struct cpu_table cpu_ids[] __initdata = { | ||
64 | { | ||
65 | .idcode = S3C6400_CPU_ID, | ||
66 | .idmask = S3C64XX_CPU_MASK, | ||
67 | .map_io = s3c6400_map_io, | ||
68 | .init_clocks = s3c6400_init_clocks, | ||
69 | .init_uarts = s3c64xx_init_uarts, | ||
70 | .init = s3c6400_init, | ||
71 | .name = name_s3c6400, | ||
72 | }, { | ||
73 | .idcode = S3C6410_CPU_ID, | ||
74 | .idmask = S3C64XX_CPU_MASK, | ||
75 | .map_io = s3c6410_map_io, | ||
76 | .init_clocks = s3c6410_init_clocks, | ||
77 | .init_uarts = s3c64xx_init_uarts, | ||
78 | .init = s3c6410_init, | ||
79 | .name = name_s3c6410, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | /* minimal IO mapping */ | ||
84 | |||
85 | /* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */ | ||
86 | #define UART_OFFS (S3C_PA_UART & 0xfffff) | ||
87 | |||
88 | static struct map_desc s3c_iodesc[] __initdata = { | ||
89 | { | ||
90 | .virtual = (unsigned long)S3C_VA_SYS, | ||
91 | .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON), | ||
92 | .length = SZ_4K, | ||
93 | .type = MT_DEVICE, | ||
94 | }, { | ||
95 | .virtual = (unsigned long)S3C_VA_MEM, | ||
96 | .pfn = __phys_to_pfn(S3C64XX_PA_SROM), | ||
97 | .length = SZ_4K, | ||
98 | .type = MT_DEVICE, | ||
99 | }, { | ||
100 | .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS), | ||
101 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
102 | .length = SZ_4K, | ||
103 | .type = MT_DEVICE, | ||
104 | }, { | ||
105 | .virtual = (unsigned long)VA_VIC0, | ||
106 | .pfn = __phys_to_pfn(S3C64XX_PA_VIC0), | ||
107 | .length = SZ_16K, | ||
108 | .type = MT_DEVICE, | ||
109 | }, { | ||
110 | .virtual = (unsigned long)VA_VIC1, | ||
111 | .pfn = __phys_to_pfn(S3C64XX_PA_VIC1), | ||
112 | .length = SZ_16K, | ||
113 | .type = MT_DEVICE, | ||
114 | }, { | ||
115 | .virtual = (unsigned long)S3C_VA_TIMER, | ||
116 | .pfn = __phys_to_pfn(S3C_PA_TIMER), | ||
117 | .length = SZ_16K, | ||
118 | .type = MT_DEVICE, | ||
119 | }, { | ||
120 | .virtual = (unsigned long)S3C64XX_VA_GPIO, | ||
121 | .pfn = __phys_to_pfn(S3C64XX_PA_GPIO), | ||
122 | .length = SZ_4K, | ||
123 | .type = MT_DEVICE, | ||
124 | }, { | ||
125 | .virtual = (unsigned long)S3C64XX_VA_MODEM, | ||
126 | .pfn = __phys_to_pfn(S3C64XX_PA_MODEM), | ||
127 | .length = SZ_4K, | ||
128 | .type = MT_DEVICE, | ||
129 | }, { | ||
130 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
131 | .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG), | ||
132 | .length = SZ_4K, | ||
133 | .type = MT_DEVICE, | ||
134 | }, { | ||
135 | .virtual = (unsigned long)S3C_VA_USB_HSPHY, | ||
136 | .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY), | ||
137 | .length = SZ_1K, | ||
138 | .type = MT_DEVICE, | ||
139 | }, | ||
140 | }; | ||
141 | |||
142 | struct sysdev_class s3c64xx_sysclass = { | ||
143 | .name = "s3c64xx-core", | ||
144 | }; | ||
145 | |||
146 | static struct sys_device s3c64xx_sysdev = { | ||
147 | .cls = &s3c64xx_sysclass, | ||
148 | }; | ||
149 | |||
150 | /* read cpu identification code */ | ||
151 | |||
152 | void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) | ||
153 | { | ||
154 | /* initialise the io descriptors we need for initialisation */ | ||
155 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | ||
156 | iotable_init(mach_desc, size); | ||
157 | init_consistent_dma_size(SZ_8M); | ||
158 | |||
159 | /* detect cpu id */ | ||
160 | s3c64xx_init_cpu(); | ||
161 | |||
162 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
163 | } | ||
164 | |||
165 | static __init int s3c64xx_sysdev_init(void) | ||
166 | { | ||
167 | sysdev_class_register(&s3c64xx_sysclass); | ||
168 | return sysdev_register(&s3c64xx_sysdev); | ||
169 | } | ||
170 | core_initcall(s3c64xx_sysdev_init); | ||
171 | |||
172 | /* | ||
173 | * setup the sources the vic should advertise resume | ||
174 | * for, even though it is not doing the wake | ||
175 | * (set_irq_wake needs to be valid) | ||
176 | */ | ||
177 | #define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE)) | ||
178 | #define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \ | ||
179 | 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \ | ||
180 | 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \ | ||
181 | 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \ | ||
182 | 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE)) | ||
183 | |||
184 | void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) | ||
185 | { | ||
186 | printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); | ||
187 | |||
188 | /* initialise the pair of VICs */ | ||
189 | vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); | ||
190 | vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); | ||
191 | |||
192 | /* add the timer sub-irqs */ | ||
193 | s3c_init_vic_timer_irq(5, IRQ_TIMER0); | ||
194 | } | ||
31 | 195 | ||
32 | #define eint_offset(irq) ((irq) - IRQ_EINT(0)) | 196 | #define eint_offset(irq) ((irq) - IRQ_EINT(0)) |
33 | #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) | 197 | #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) |
@@ -209,5 +373,13 @@ static int __init s3c64xx_init_irq_eint(void) | |||
209 | 373 | ||
210 | return 0; | 374 | return 0; |
211 | } | 375 | } |
212 | |||
213 | arch_initcall(s3c64xx_init_irq_eint); | 376 | arch_initcall(s3c64xx_init_irq_eint); |
377 | |||
378 | void s3c64xx_restart(char mode, const char *cmd) | ||
379 | { | ||
380 | if (mode != 's') | ||
381 | arch_wdt_reset(); | ||
382 | |||
383 | /* if all else fails, or mode was for soft, jump to 0 */ | ||
384 | soft_restart(0); | ||
385 | } | ||
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h new file mode 100644 index 000000000000..8dc8ab6d8d6d --- /dev/null +++ b/arch/arm/mach-s3c64xx/common.h | |||
@@ -0,0 +1,57 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Copyright 2008 Openmoko, Inc. | ||
6 | * Copyright 2008 Simtec Electronics | ||
7 | * Ben Dooks <ben@simtec.co.uk> | ||
8 | * http://armlinux.simtec.co.uk/ | ||
9 | * | ||
10 | * Common Header for S3C64XX machines | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | |||
17 | #ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H | ||
18 | #define __ARCH_ARM_MACH_S3C64XX_COMMON_H | ||
19 | |||
20 | void s3c64xx_init_irq(u32 vic0, u32 vic1); | ||
21 | void s3c64xx_init_io(struct map_desc *mach_desc, int size); | ||
22 | |||
23 | void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); | ||
24 | void s3c64xx_setup_clocks(void); | ||
25 | |||
26 | void s3c64xx_restart(char mode, const char *cmd); | ||
27 | |||
28 | extern struct syscore_ops s3c64xx_irq_syscore_ops; | ||
29 | extern struct sysdev_class s3c64xx_sysclass; | ||
30 | |||
31 | #ifdef CONFIG_CPU_S3C6400 | ||
32 | |||
33 | extern int s3c6400_init(void); | ||
34 | extern void s3c6400_init_irq(void); | ||
35 | extern void s3c6400_map_io(void); | ||
36 | extern void s3c6400_init_clocks(int xtal); | ||
37 | |||
38 | #else | ||
39 | #define s3c6400_init_clocks NULL | ||
40 | #define s3c6400_map_io NULL | ||
41 | #define s3c6400_init NULL | ||
42 | #endif | ||
43 | |||
44 | #ifdef CONFIG_CPU_S3C6410 | ||
45 | |||
46 | extern int s3c6410_init(void); | ||
47 | extern void s3c6410_init_irq(void); | ||
48 | extern void s3c6410_map_io(void); | ||
49 | extern void s3c6410_init_clocks(int xtal); | ||
50 | |||
51 | #else | ||
52 | #define s3c6410_init_clocks NULL | ||
53 | #define s3c6410_map_io NULL | ||
54 | #define s3c6410_init NULL | ||
55 | #endif | ||
56 | |||
57 | #endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */ | ||
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c deleted file mode 100644 index de085b798aa4..000000000000 --- a/arch/arm/mach-s3c64xx/cpu.c +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c64xx/cpu.c | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX CPU Support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/init.h> | ||
16 | #include <linux/module.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/ioport.h> | ||
19 | #include <linux/sysdev.h> | ||
20 | #include <linux/serial_core.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/io.h> | ||
23 | #include <linux/dma-mapping.h> | ||
24 | |||
25 | #include <mach/hardware.h> | ||
26 | #include <mach/map.h> | ||
27 | |||
28 | #include <asm/mach/arch.h> | ||
29 | #include <asm/mach/map.h> | ||
30 | |||
31 | #include <plat/regs-serial.h> | ||
32 | |||
33 | #include <plat/cpu.h> | ||
34 | #include <plat/devs.h> | ||
35 | #include <plat/clock.h> | ||
36 | |||
37 | #include <plat/s3c6400.h> | ||
38 | #include <plat/s3c6410.h> | ||
39 | |||
40 | /* table of supported CPUs */ | ||
41 | |||
42 | static const char name_s3c6400[] = "S3C6400"; | ||
43 | static const char name_s3c6410[] = "S3C6410"; | ||
44 | |||
45 | static struct cpu_table cpu_ids[] __initdata = { | ||
46 | { | ||
47 | .idcode = S3C6400_CPU_ID, | ||
48 | .idmask = S3C64XX_CPU_MASK, | ||
49 | .map_io = s3c6400_map_io, | ||
50 | .init_clocks = s3c6400_init_clocks, | ||
51 | .init_uarts = s3c6400_init_uarts, | ||
52 | .init = s3c6400_init, | ||
53 | .name = name_s3c6400, | ||
54 | }, { | ||
55 | .idcode = S3C6410_CPU_ID, | ||
56 | .idmask = S3C64XX_CPU_MASK, | ||
57 | .map_io = s3c6410_map_io, | ||
58 | .init_clocks = s3c6410_init_clocks, | ||
59 | .init_uarts = s3c6410_init_uarts, | ||
60 | .init = s3c6410_init, | ||
61 | .name = name_s3c6410, | ||
62 | }, | ||
63 | }; | ||
64 | |||
65 | /* minimal IO mapping */ | ||
66 | |||
67 | /* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */ | ||
68 | #define UART_OFFS (S3C_PA_UART & 0xfffff) | ||
69 | |||
70 | static struct map_desc s3c_iodesc[] __initdata = { | ||
71 | { | ||
72 | .virtual = (unsigned long)S3C_VA_SYS, | ||
73 | .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON), | ||
74 | .length = SZ_4K, | ||
75 | .type = MT_DEVICE, | ||
76 | }, { | ||
77 | .virtual = (unsigned long)S3C_VA_MEM, | ||
78 | .pfn = __phys_to_pfn(S3C64XX_PA_SROM), | ||
79 | .length = SZ_4K, | ||
80 | .type = MT_DEVICE, | ||
81 | }, { | ||
82 | .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS), | ||
83 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
84 | .length = SZ_4K, | ||
85 | .type = MT_DEVICE, | ||
86 | }, { | ||
87 | .virtual = (unsigned long)VA_VIC0, | ||
88 | .pfn = __phys_to_pfn(S3C64XX_PA_VIC0), | ||
89 | .length = SZ_16K, | ||
90 | .type = MT_DEVICE, | ||
91 | }, { | ||
92 | .virtual = (unsigned long)VA_VIC1, | ||
93 | .pfn = __phys_to_pfn(S3C64XX_PA_VIC1), | ||
94 | .length = SZ_16K, | ||
95 | .type = MT_DEVICE, | ||
96 | }, { | ||
97 | .virtual = (unsigned long)S3C_VA_TIMER, | ||
98 | .pfn = __phys_to_pfn(S3C_PA_TIMER), | ||
99 | .length = SZ_16K, | ||
100 | .type = MT_DEVICE, | ||
101 | }, { | ||
102 | .virtual = (unsigned long)S3C64XX_VA_GPIO, | ||
103 | .pfn = __phys_to_pfn(S3C64XX_PA_GPIO), | ||
104 | .length = SZ_4K, | ||
105 | .type = MT_DEVICE, | ||
106 | }, { | ||
107 | .virtual = (unsigned long)S3C64XX_VA_MODEM, | ||
108 | .pfn = __phys_to_pfn(S3C64XX_PA_MODEM), | ||
109 | .length = SZ_4K, | ||
110 | .type = MT_DEVICE, | ||
111 | }, { | ||
112 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
113 | .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG), | ||
114 | .length = SZ_4K, | ||
115 | .type = MT_DEVICE, | ||
116 | }, { | ||
117 | .virtual = (unsigned long)S3C_VA_USB_HSPHY, | ||
118 | .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY), | ||
119 | .length = SZ_1K, | ||
120 | .type = MT_DEVICE, | ||
121 | }, | ||
122 | }; | ||
123 | |||
124 | |||
125 | struct sysdev_class s3c64xx_sysclass = { | ||
126 | .name = "s3c64xx-core", | ||
127 | }; | ||
128 | |||
129 | static struct sys_device s3c64xx_sysdev = { | ||
130 | .cls = &s3c64xx_sysclass, | ||
131 | }; | ||
132 | |||
133 | /* uart registration process */ | ||
134 | |||
135 | void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
136 | { | ||
137 | s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); | ||
138 | } | ||
139 | |||
140 | /* read cpu identification code */ | ||
141 | |||
142 | void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) | ||
143 | { | ||
144 | /* initialise the io descriptors we need for initialisation */ | ||
145 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | ||
146 | iotable_init(mach_desc, size); | ||
147 | init_consistent_dma_size(SZ_8M); | ||
148 | |||
149 | /* detect cpu id */ | ||
150 | s3c64xx_init_cpu(); | ||
151 | |||
152 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
153 | } | ||
154 | |||
155 | static __init int s3c64xx_sysdev_init(void) | ||
156 | { | ||
157 | sysdev_class_register(&s3c64xx_sysclass); | ||
158 | return sysdev_register(&s3c64xx_sysdev); | ||
159 | } | ||
160 | |||
161 | core_initcall(s3c64xx_sysdev_init); | ||
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c deleted file mode 100644 index 3341fd118723..000000000000 --- a/arch/arm/mach-s3c64xx/dev-spi.c +++ /dev/null | |||
@@ -1,180 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c64xx/dev-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2009 Samsung Electronics Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/string.h> | ||
13 | #include <linux/export.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/dma-mapping.h> | ||
16 | #include <linux/gpio.h> | ||
17 | |||
18 | #include <mach/dma.h> | ||
19 | #include <mach/map.h> | ||
20 | #include <mach/spi-clocks.h> | ||
21 | #include <mach/irqs.h> | ||
22 | |||
23 | #include <plat/s3c64xx-spi.h> | ||
24 | #include <plat/gpio-cfg.h> | ||
25 | #include <plat/devs.h> | ||
26 | |||
27 | static char *spi_src_clks[] = { | ||
28 | [S3C64XX_SPI_SRCCLK_PCLK] = "pclk", | ||
29 | [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus", | ||
30 | [S3C64XX_SPI_SRCCLK_48M] = "spi_48m", | ||
31 | }; | ||
32 | |||
33 | /* SPI Controller platform_devices */ | ||
34 | |||
35 | /* Since we emulate multi-cs capability, we do not touch the GPC-3,7. | ||
36 | * The emulated CS is toggled by board specific mechanism, as it can | ||
37 | * be either some immediate GPIO or some signal out of some other | ||
38 | * chip in between ... or some yet another way. | ||
39 | * We simply do not assume anything about CS. | ||
40 | */ | ||
41 | static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev) | ||
42 | { | ||
43 | unsigned int base; | ||
44 | |||
45 | switch (pdev->id) { | ||
46 | case 0: | ||
47 | base = S3C64XX_GPC(0); | ||
48 | break; | ||
49 | |||
50 | case 1: | ||
51 | base = S3C64XX_GPC(4); | ||
52 | break; | ||
53 | |||
54 | default: | ||
55 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
56 | return -EINVAL; | ||
57 | } | ||
58 | |||
59 | s3c_gpio_cfgall_range(base, 3, | ||
60 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
61 | |||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | static struct resource s3c64xx_spi0_resource[] = { | ||
66 | [0] = { | ||
67 | .start = S3C64XX_PA_SPI0, | ||
68 | .end = S3C64XX_PA_SPI0 + 0x100 - 1, | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }, | ||
71 | [1] = { | ||
72 | .start = DMACH_SPI0_TX, | ||
73 | .end = DMACH_SPI0_TX, | ||
74 | .flags = IORESOURCE_DMA, | ||
75 | }, | ||
76 | [2] = { | ||
77 | .start = DMACH_SPI0_RX, | ||
78 | .end = DMACH_SPI0_RX, | ||
79 | .flags = IORESOURCE_DMA, | ||
80 | }, | ||
81 | [3] = { | ||
82 | .start = IRQ_SPI0, | ||
83 | .end = IRQ_SPI0, | ||
84 | .flags = IORESOURCE_IRQ, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static struct s3c64xx_spi_info s3c64xx_spi0_pdata = { | ||
89 | .cfg_gpio = s3c64xx_spi_cfg_gpio, | ||
90 | .fifo_lvl_mask = 0x7f, | ||
91 | .rx_lvl_offset = 13, | ||
92 | .tx_st_done = 21, | ||
93 | }; | ||
94 | |||
95 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
96 | |||
97 | struct platform_device s3c64xx_device_spi0 = { | ||
98 | .name = "s3c64xx-spi", | ||
99 | .id = 0, | ||
100 | .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), | ||
101 | .resource = s3c64xx_spi0_resource, | ||
102 | .dev = { | ||
103 | .dma_mask = &spi_dmamask, | ||
104 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
105 | .platform_data = &s3c64xx_spi0_pdata, | ||
106 | }, | ||
107 | }; | ||
108 | EXPORT_SYMBOL(s3c64xx_device_spi0); | ||
109 | |||
110 | static struct resource s3c64xx_spi1_resource[] = { | ||
111 | [0] = { | ||
112 | .start = S3C64XX_PA_SPI1, | ||
113 | .end = S3C64XX_PA_SPI1 + 0x100 - 1, | ||
114 | .flags = IORESOURCE_MEM, | ||
115 | }, | ||
116 | [1] = { | ||
117 | .start = DMACH_SPI1_TX, | ||
118 | .end = DMACH_SPI1_TX, | ||
119 | .flags = IORESOURCE_DMA, | ||
120 | }, | ||
121 | [2] = { | ||
122 | .start = DMACH_SPI1_RX, | ||
123 | .end = DMACH_SPI1_RX, | ||
124 | .flags = IORESOURCE_DMA, | ||
125 | }, | ||
126 | [3] = { | ||
127 | .start = IRQ_SPI1, | ||
128 | .end = IRQ_SPI1, | ||
129 | .flags = IORESOURCE_IRQ, | ||
130 | }, | ||
131 | }; | ||
132 | |||
133 | static struct s3c64xx_spi_info s3c64xx_spi1_pdata = { | ||
134 | .cfg_gpio = s3c64xx_spi_cfg_gpio, | ||
135 | .fifo_lvl_mask = 0x7f, | ||
136 | .rx_lvl_offset = 13, | ||
137 | .tx_st_done = 21, | ||
138 | }; | ||
139 | |||
140 | struct platform_device s3c64xx_device_spi1 = { | ||
141 | .name = "s3c64xx-spi", | ||
142 | .id = 1, | ||
143 | .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), | ||
144 | .resource = s3c64xx_spi1_resource, | ||
145 | .dev = { | ||
146 | .dma_mask = &spi_dmamask, | ||
147 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
148 | .platform_data = &s3c64xx_spi1_pdata, | ||
149 | }, | ||
150 | }; | ||
151 | EXPORT_SYMBOL(s3c64xx_device_spi1); | ||
152 | |||
153 | void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
154 | { | ||
155 | struct s3c64xx_spi_info *pd; | ||
156 | |||
157 | /* Reject invalid configuration */ | ||
158 | if (!num_cs || src_clk_nr < 0 | ||
159 | || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) { | ||
160 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
161 | return; | ||
162 | } | ||
163 | |||
164 | switch (cntrlr) { | ||
165 | case 0: | ||
166 | pd = &s3c64xx_spi0_pdata; | ||
167 | break; | ||
168 | case 1: | ||
169 | pd = &s3c64xx_spi1_pdata; | ||
170 | break; | ||
171 | default: | ||
172 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
173 | __func__, cntrlr); | ||
174 | return; | ||
175 | } | ||
176 | |||
177 | pd->num_cs = num_cs; | ||
178 | pd->src_clk_nr = src_clk_nr; | ||
179 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
180 | } | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index 23a1d71e4d53..8e2097bb208a 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h | |||
@@ -115,6 +115,8 @@ | |||
115 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG | 115 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG |
116 | #define S3C_PA_RTC S3C64XX_PA_RTC | 116 | #define S3C_PA_RTC S3C64XX_PA_RTC |
117 | #define S3C_PA_WDT S3C64XX_PA_WATCHDOG | 117 | #define S3C_PA_WDT S3C64XX_PA_WATCHDOG |
118 | #define S3C_PA_SPI0 S3C64XX_PA_SPI0 | ||
119 | #define S3C_PA_SPI1 S3C64XX_PA_SPI1 | ||
118 | 120 | ||
119 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC | 121 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC |
120 | #define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON | 122 | #define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON |
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h index d8ca5786ba25..353ed4389ae7 100644 --- a/arch/arm/mach-s3c64xx/include/mach/system.h +++ b/arch/arm/mach-s3c64xx/include/mach/system.h | |||
@@ -11,20 +11,9 @@ | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | 11 | #ifndef __ASM_ARCH_SYSTEM_H |
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 12 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
13 | 13 | ||
14 | #include <plat/watchdog-reset.h> | ||
15 | |||
16 | static void arch_idle(void) | 14 | static void arch_idle(void) |
17 | { | 15 | { |
18 | /* nothing here yet */ | 16 | /* nothing here yet */ |
19 | } | 17 | } |
20 | 18 | ||
21 | static void arch_reset(char mode, const char *cmd) | ||
22 | { | ||
23 | if (mode != 's') | ||
24 | arch_wdt_reset(); | ||
25 | |||
26 | /* if all else fails, or mode was for soft, jump to 0 */ | ||
27 | soft_restart(0); | ||
28 | } | ||
29 | |||
30 | #endif /* __ASM_ARCH_IRQ_H */ | 19 | #endif /* __ASM_ARCH_IRQ_H */ |
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c deleted file mode 100644 index b07357e94958..000000000000 --- a/arch/arm/mach-s3c64xx/irq.c +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* arch/arm/plat-s3c64xx/irq.c | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX - Interrupt handling | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/serial_core.h> | ||
18 | #include <linux/irq.h> | ||
19 | #include <linux/io.h> | ||
20 | |||
21 | #include <asm/hardware/vic.h> | ||
22 | |||
23 | #include <mach/map.h> | ||
24 | #include <plat/irq-vic-timer.h> | ||
25 | #include <plat/irq-uart.h> | ||
26 | #include <plat/cpu.h> | ||
27 | |||
28 | /* setup the sources the vic should advertise resume for, even though it | ||
29 | * is not doing the wake (set_irq_wake needs to be valid) */ | ||
30 | #define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE)) | ||
31 | #define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \ | ||
32 | 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \ | ||
33 | 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \ | ||
34 | 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \ | ||
35 | 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE)) | ||
36 | |||
37 | void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) | ||
38 | { | ||
39 | printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); | ||
40 | |||
41 | /* initialise the pair of VICs */ | ||
42 | vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); | ||
43 | vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); | ||
44 | |||
45 | /* add the timer sub-irqs */ | ||
46 | s3c_init_vic_timer_irq(5, IRQ_TIMER0); | ||
47 | } | ||
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 2bbc14d93428..b86f2779e4e6 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c | |||
@@ -46,13 +46,14 @@ | |||
46 | #include <plat/fb.h> | 46 | #include <plat/fb.h> |
47 | #include <plat/regs-fb-v4.h> | 47 | #include <plat/regs-fb-v4.h> |
48 | 48 | ||
49 | #include <plat/s3c6410.h> | ||
50 | #include <plat/clock.h> | 49 | #include <plat/clock.h> |
51 | #include <plat/devs.h> | 50 | #include <plat/devs.h> |
52 | #include <plat/cpu.h> | 51 | #include <plat/cpu.h> |
53 | #include <mach/regs-gpio.h> | 52 | #include <mach/regs-gpio.h> |
54 | #include <mach/regs-modem.h> | 53 | #include <mach/regs-modem.h> |
55 | 54 | ||
55 | #include "common.h" | ||
56 | |||
56 | /* DM9000 */ | 57 | /* DM9000 */ |
57 | #define ANW6410_PA_DM9000 (0x18000000) | 58 | #define ANW6410_PA_DM9000 (0x18000000) |
58 | 59 | ||
@@ -241,4 +242,5 @@ MACHINE_START(ANW6410, "A&W6410") | |||
241 | .map_io = anw6410_map_io, | 242 | .map_io = anw6410_map_io, |
242 | .init_machine = anw6410_machine_init, | 243 | .init_machine = anw6410_machine_init, |
243 | .timer = &s3c24xx_timer, | 244 | .timer = &s3c24xx_timer, |
245 | .restart = s3c64xx_restart, | ||
244 | MACHINE_END | 246 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index 799558c15b4e..25d9f0cf9451 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c | |||
@@ -53,7 +53,6 @@ | |||
53 | 53 | ||
54 | #include <mach/regs-gpio-memport.h> | 54 | #include <mach/regs-gpio-memport.h> |
55 | 55 | ||
56 | #include <plat/s3c6410.h> | ||
57 | #include <plat/regs-serial.h> | 56 | #include <plat/regs-serial.h> |
58 | #include <plat/regs-fb-v4.h> | 57 | #include <plat/regs-fb-v4.h> |
59 | #include <plat/fb.h> | 58 | #include <plat/fb.h> |
@@ -69,6 +68,8 @@ | |||
69 | #include <plat/iic.h> | 68 | #include <plat/iic.h> |
70 | #include <plat/pm.h> | 69 | #include <plat/pm.h> |
71 | 70 | ||
71 | #include "common.h" | ||
72 | |||
72 | /* serial port setup */ | 73 | /* serial port setup */ |
73 | 74 | ||
74 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 75 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) |
@@ -749,4 +750,5 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410") | |||
749 | .map_io = crag6410_map_io, | 750 | .map_io = crag6410_map_io, |
750 | .init_machine = crag6410_machine_init, | 751 | .init_machine = crag6410_machine_init, |
751 | .timer = &s3c24xx_timer, | 752 | .timer = &s3c24xx_timer, |
753 | .restart = s3c64xx_restart, | ||
752 | MACHINE_END | 754 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index c5955f301709..521e07b8501b 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c | |||
@@ -38,12 +38,13 @@ | |||
38 | #include <plat/fb.h> | 38 | #include <plat/fb.h> |
39 | #include <plat/nand.h> | 39 | #include <plat/nand.h> |
40 | 40 | ||
41 | #include <plat/s3c6410.h> | ||
42 | #include <plat/clock.h> | 41 | #include <plat/clock.h> |
43 | #include <plat/devs.h> | 42 | #include <plat/devs.h> |
44 | #include <plat/cpu.h> | 43 | #include <plat/cpu.h> |
45 | #include <plat/regs-fb-v4.h> | 44 | #include <plat/regs-fb-v4.h> |
46 | 45 | ||
46 | #include "common.h" | ||
47 | |||
47 | #define UCON S3C2410_UCON_DEFAULT | 48 | #define UCON S3C2410_UCON_DEFAULT |
48 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) | 49 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) |
49 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 50 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
@@ -272,4 +273,5 @@ MACHINE_START(HMT, "Airgoo-HMT") | |||
272 | .map_io = hmt_map_io, | 273 | .map_io = hmt_map_io, |
273 | .init_machine = hmt_machine_init, | 274 | .init_machine = hmt_machine_init, |
274 | .timer = &s3c24xx_timer, | 275 | .timer = &s3c24xx_timer, |
276 | .restart = s3c64xx_restart, | ||
275 | MACHINE_END | 277 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 4415c85e3f6f..c34c2ab22ead 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <mach/regs-modem.h> | 34 | #include <mach/regs-modem.h> |
35 | #include <mach/regs-srom.h> | 35 | #include <mach/regs-srom.h> |
36 | 36 | ||
37 | #include <plat/s3c6410.h> | ||
38 | #include <plat/adc.h> | 37 | #include <plat/adc.h> |
39 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
40 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
@@ -46,6 +45,8 @@ | |||
46 | 45 | ||
47 | #include <video/platform_lcd.h> | 46 | #include <video/platform_lcd.h> |
48 | 47 | ||
48 | #include "common.h" | ||
49 | |||
49 | #define UCON S3C2410_UCON_DEFAULT | 50 | #define UCON S3C2410_UCON_DEFAULT |
50 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 51 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
51 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 52 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
@@ -350,4 +351,5 @@ MACHINE_START(MINI6410, "MINI6410") | |||
350 | .map_io = mini6410_map_io, | 351 | .map_io = mini6410_map_io, |
351 | .init_machine = mini6410_machine_init, | 352 | .init_machine = mini6410_machine_init, |
352 | .timer = &s3c24xx_timer, | 353 | .timer = &s3c24xx_timer, |
354 | .restart = s3c64xx_restart, | ||
353 | MACHINE_END | 355 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index 9b2c610eac2a..0efa2ba783b2 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c | |||
@@ -40,12 +40,13 @@ | |||
40 | #include <plat/iic.h> | 40 | #include <plat/iic.h> |
41 | #include <plat/fb.h> | 41 | #include <plat/fb.h> |
42 | 42 | ||
43 | #include <plat/s3c6410.h> | ||
44 | #include <plat/clock.h> | 43 | #include <plat/clock.h> |
45 | #include <plat/devs.h> | 44 | #include <plat/devs.h> |
46 | #include <plat/cpu.h> | 45 | #include <plat/cpu.h> |
47 | #include <plat/regs-fb-v4.h> | 46 | #include <plat/regs-fb-v4.h> |
48 | 47 | ||
48 | #include "common.h" | ||
49 | |||
49 | #define UCON S3C2410_UCON_DEFAULT | 50 | #define UCON S3C2410_UCON_DEFAULT |
50 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | 51 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE |
51 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 52 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
@@ -104,4 +105,5 @@ MACHINE_START(NCP, "NCP") | |||
104 | .map_io = ncp_map_io, | 105 | .map_io = ncp_map_io, |
105 | .init_machine = ncp_machine_init, | 106 | .init_machine = ncp_machine_init, |
106 | .timer = &s3c24xx_timer, | 107 | .timer = &s3c24xx_timer, |
108 | .restart = s3c64xx_restart, | ||
107 | MACHINE_END | 109 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index dbab49f2713e..be2a9a22ab74 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <mach/regs-modem.h> | 35 | #include <mach/regs-modem.h> |
36 | #include <mach/regs-srom.h> | 36 | #include <mach/regs-srom.h> |
37 | 37 | ||
38 | #include <plat/s3c6410.h> | ||
39 | #include <plat/adc.h> | 38 | #include <plat/adc.h> |
40 | #include <plat/cpu.h> | 39 | #include <plat/cpu.h> |
41 | #include <plat/devs.h> | 40 | #include <plat/devs.h> |
@@ -47,6 +46,8 @@ | |||
47 | 46 | ||
48 | #include <video/platform_lcd.h> | 47 | #include <video/platform_lcd.h> |
49 | 48 | ||
49 | #include "common.h" | ||
50 | |||
50 | #define UCON S3C2410_UCON_DEFAULT | 51 | #define UCON S3C2410_UCON_DEFAULT |
51 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 52 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
52 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 53 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
@@ -331,4 +332,5 @@ MACHINE_START(REAL6410, "REAL6410") | |||
331 | .map_io = real6410_map_io, | 332 | .map_io = real6410_map_io, |
332 | .init_machine = real6410_machine_init, | 333 | .init_machine = real6410_machine_init, |
333 | .timer = &s3c24xx_timer, | 334 | .timer = &s3c24xx_timer, |
335 | .restart = s3c64xx_restart, | ||
334 | MACHINE_END | 336 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c index cb1ebeb08763..ce31db136231 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq.c +++ b/arch/arm/mach-s3c64xx/mach-smartq.c | |||
@@ -40,6 +40,8 @@ | |||
40 | 40 | ||
41 | #include <video/platform_lcd.h> | 41 | #include <video/platform_lcd.h> |
42 | 42 | ||
43 | #include "common.h" | ||
44 | |||
43 | #define UCON S3C2410_UCON_DEFAULT | 45 | #define UCON S3C2410_UCON_DEFAULT |
44 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) | 46 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) |
45 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 47 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c index 053945282652..3f42431d4dda 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c | |||
@@ -24,13 +24,13 @@ | |||
24 | #include <mach/map.h> | 24 | #include <mach/map.h> |
25 | #include <mach/regs-gpio.h> | 25 | #include <mach/regs-gpio.h> |
26 | 26 | ||
27 | #include <plat/s3c6410.h> | ||
28 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
29 | #include <plat/devs.h> | 28 | #include <plat/devs.h> |
30 | #include <plat/fb.h> | 29 | #include <plat/fb.h> |
31 | #include <plat/gpio-cfg.h> | 30 | #include <plat/gpio-cfg.h> |
32 | #include <plat/regs-fb-v4.h> | 31 | #include <plat/regs-fb-v4.h> |
33 | 32 | ||
33 | #include "common.h" | ||
34 | #include "mach-smartq.h" | 34 | #include "mach-smartq.h" |
35 | 35 | ||
36 | static struct gpio_led smartq5_leds[] = { | 36 | static struct gpio_led smartq5_leds[] = { |
@@ -153,4 +153,5 @@ MACHINE_START(SMARTQ5, "SmartQ 5") | |||
153 | .map_io = smartq_map_io, | 153 | .map_io = smartq_map_io, |
154 | .init_machine = smartq5_machine_init, | 154 | .init_machine = smartq5_machine_init, |
155 | .timer = &s3c24xx_timer, | 155 | .timer = &s3c24xx_timer, |
156 | .restart = s3c64xx_restart, | ||
156 | MACHINE_END | 157 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c index a58d1ba5cba2..e5c09b6db967 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c | |||
@@ -24,13 +24,13 @@ | |||
24 | #include <mach/map.h> | 24 | #include <mach/map.h> |
25 | #include <mach/regs-gpio.h> | 25 | #include <mach/regs-gpio.h> |
26 | 26 | ||
27 | #include <plat/s3c6410.h> | ||
28 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
29 | #include <plat/devs.h> | 28 | #include <plat/devs.h> |
30 | #include <plat/fb.h> | 29 | #include <plat/fb.h> |
31 | #include <plat/gpio-cfg.h> | 30 | #include <plat/gpio-cfg.h> |
32 | #include <plat/regs-fb-v4.h> | 31 | #include <plat/regs-fb-v4.h> |
33 | 32 | ||
33 | #include "common.h" | ||
34 | #include "mach-smartq.h" | 34 | #include "mach-smartq.h" |
35 | 35 | ||
36 | static struct gpio_led smartq7_leds[] = { | 36 | static struct gpio_led smartq7_leds[] = { |
@@ -169,4 +169,5 @@ MACHINE_START(SMARTQ7, "SmartQ 7") | |||
169 | .map_io = smartq_map_io, | 169 | .map_io = smartq_map_io, |
170 | .init_machine = smartq7_machine_init, | 170 | .init_machine = smartq7_machine_init, |
171 | .timer = &s3c24xx_timer, | 171 | .timer = &s3c24xx_timer, |
172 | .restart = s3c64xx_restart, | ||
172 | MACHINE_END | 173 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c index be28a59e3f57..5f096534f4c4 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c | |||
@@ -32,12 +32,13 @@ | |||
32 | 32 | ||
33 | #include <plat/regs-serial.h> | 33 | #include <plat/regs-serial.h> |
34 | 34 | ||
35 | #include <plat/s3c6400.h> | ||
36 | #include <plat/clock.h> | 35 | #include <plat/clock.h> |
37 | #include <plat/devs.h> | 36 | #include <plat/devs.h> |
38 | #include <plat/cpu.h> | 37 | #include <plat/cpu.h> |
39 | #include <plat/iic.h> | 38 | #include <plat/iic.h> |
40 | 39 | ||
40 | #include "common.h" | ||
41 | |||
41 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | 42 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
42 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 43 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
43 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 44 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
@@ -93,4 +94,5 @@ MACHINE_START(SMDK6400, "SMDK6400") | |||
93 | .map_io = smdk6400_map_io, | 94 | .map_io = smdk6400_map_io, |
94 | .init_machine = smdk6400_machine_init, | 95 | .init_machine = smdk6400_machine_init, |
95 | .timer = &s3c24xx_timer, | 96 | .timer = &s3c24xx_timer, |
97 | .restart = s3c64xx_restart, | ||
96 | MACHINE_END | 98 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 08309155d087..ca6fc204f0ea 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
@@ -64,7 +64,6 @@ | |||
64 | #include <plat/fb.h> | 64 | #include <plat/fb.h> |
65 | #include <plat/gpio-cfg.h> | 65 | #include <plat/gpio-cfg.h> |
66 | 66 | ||
67 | #include <plat/s3c6410.h> | ||
68 | #include <plat/clock.h> | 67 | #include <plat/clock.h> |
69 | #include <plat/devs.h> | 68 | #include <plat/devs.h> |
70 | #include <plat/cpu.h> | 69 | #include <plat/cpu.h> |
@@ -74,6 +73,8 @@ | |||
74 | #include <plat/backlight.h> | 73 | #include <plat/backlight.h> |
75 | #include <plat/regs-fb-v4.h> | 74 | #include <plat/regs-fb-v4.h> |
76 | 75 | ||
76 | #include "common.h" | ||
77 | |||
77 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | 78 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
78 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 79 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
79 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 80 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
@@ -705,4 +706,5 @@ MACHINE_START(SMDK6410, "SMDK6410") | |||
705 | .map_io = smdk6410_map_io, | 706 | .map_io = smdk6410_map_io, |
706 | .init_machine = smdk6410_machine_init, | 707 | .init_machine = smdk6410_machine_init, |
707 | .timer = &s3c24xx_timer, | 708 | .timer = &s3c24xx_timer, |
709 | .restart = s3c64xx_restart, | ||
708 | MACHINE_END | 710 | MACHINE_END |
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 51c00f2453c6..b1e1571f2f6b 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c | |||
@@ -38,7 +38,8 @@ | |||
38 | #include <plat/sdhci.h> | 38 | #include <plat/sdhci.h> |
39 | #include <plat/iic-core.h> | 39 | #include <plat/iic-core.h> |
40 | #include <plat/onenand-core.h> | 40 | #include <plat/onenand-core.h> |
41 | #include <plat/s3c6400.h> | 41 | |
42 | #include "common.h" | ||
42 | 43 | ||
43 | void __init s3c6400_map_io(void) | 44 | void __init s3c6400_map_io(void) |
44 | { | 45 | { |
@@ -60,7 +61,7 @@ void __init s3c6400_map_io(void) | |||
60 | void __init s3c6400_init_clocks(int xtal) | 61 | void __init s3c6400_init_clocks(int xtal) |
61 | { | 62 | { |
62 | s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK); | 63 | s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK); |
63 | s3c6400_setup_clocks(); | 64 | s3c64xx_setup_clocks(); |
64 | } | 65 | } |
65 | 66 | ||
66 | void __init s3c6400_init_irq(void) | 67 | void __init s3c6400_init_irq(void) |
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 4117003464ad..fba71bd991c7 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c | |||
@@ -41,8 +41,8 @@ | |||
41 | #include <plat/adc-core.h> | 41 | #include <plat/adc-core.h> |
42 | #include <plat/iic-core.h> | 42 | #include <plat/iic-core.h> |
43 | #include <plat/onenand-core.h> | 43 | #include <plat/onenand-core.h> |
44 | #include <plat/s3c6400.h> | 44 | |
45 | #include <plat/s3c6410.h> | 45 | #include "common.h" |
46 | 46 | ||
47 | void __init s3c6410_map_io(void) | 47 | void __init s3c6410_map_io(void) |
48 | { | 48 | { |
@@ -66,7 +66,7 @@ void __init s3c6410_init_clocks(int xtal) | |||
66 | { | 66 | { |
67 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); | 67 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); |
68 | s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK); | 68 | s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK); |
69 | s3c6400_setup_clocks(); | 69 | s3c64xx_setup_clocks(); |
70 | } | 70 | } |
71 | 71 | ||
72 | void __init s3c6410_init_irq(void) | 72 | void __init s3c6410_init_irq(void) |
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c deleted file mode 100644 index c75a71b21165..000000000000 --- a/arch/arm/mach-s3c64xx/setup-sdhci.c +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/setup-sdhci.c | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/types.h> | ||
16 | |||
17 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
18 | |||
19 | char *s3c64xx_hsmmc_clksrcs[4] = { | ||
20 | [0] = "hsmmc", | ||
21 | [1] = "hsmmc", | ||
22 | [2] = "mmc_bus", | ||
23 | /* [3] = "48m", - note not successfully used yet */ | ||
24 | }; | ||
diff --git a/arch/arm/mach-s3c64xx/setup-spi.c b/arch/arm/mach-s3c64xx/setup-spi.c new file mode 100644 index 000000000000..d9592ad7a825 --- /dev/null +++ b/arch/arm/mach-s3c64xx/setup-spi.c | |||
@@ -0,0 +1,45 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/setup-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2011 Samsung Electronics Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/gpio.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | #include <plat/gpio-cfg.h> | ||
15 | #include <plat/s3c64xx-spi.h> | ||
16 | |||
17 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | ||
18 | struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = { | ||
19 | .fifo_lvl_mask = 0x7f, | ||
20 | .rx_lvl_offset = 13, | ||
21 | .tx_st_done = 21, | ||
22 | }; | ||
23 | |||
24 | int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) | ||
25 | { | ||
26 | s3c_gpio_cfgall_range(S3C64XX_GPC(0), 3, | ||
27 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
28 | return 0; | ||
29 | } | ||
30 | #endif | ||
31 | |||
32 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | ||
33 | struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = { | ||
34 | .fifo_lvl_mask = 0x7f, | ||
35 | .rx_lvl_offset = 13, | ||
36 | .tx_st_done = 21, | ||
37 | }; | ||
38 | |||
39 | int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) | ||
40 | { | ||
41 | s3c_gpio_cfgall_range(S3C64XX_GPC(4), 3, | ||
42 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
43 | return 0; | ||
44 | } | ||
45 | #endif | ||
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig index 18690c5f99e6..dd8c85ef6dab 100644 --- a/arch/arm/mach-s5p64x0/Kconfig +++ b/arch/arm/mach-s5p64x0/Kconfig | |||
@@ -36,6 +36,11 @@ config S5P64X0_SETUP_I2C1 | |||
36 | help | 36 | help |
37 | Common setup code for i2c bus 1. | 37 | Common setup code for i2c bus 1. |
38 | 38 | ||
39 | config S5P64X0_SETUP_SPI | ||
40 | bool | ||
41 | help | ||
42 | Common setup code for SPI GPIO configurations | ||
43 | |||
39 | # machine support | 44 | # machine support |
40 | 45 | ||
41 | config MACH_SMDK6440 | 46 | config MACH_SMDK6440 |
@@ -45,7 +50,6 @@ config MACH_SMDK6440 | |||
45 | select S3C_DEV_I2C1 | 50 | select S3C_DEV_I2C1 |
46 | select S3C_DEV_RTC | 51 | select S3C_DEV_RTC |
47 | select S3C_DEV_WDT | 52 | select S3C_DEV_WDT |
48 | select S3C64XX_DEV_SPI | ||
49 | select SAMSUNG_DEV_ADC | 53 | select SAMSUNG_DEV_ADC |
50 | select SAMSUNG_DEV_BACKLIGHT | 54 | select SAMSUNG_DEV_BACKLIGHT |
51 | select SAMSUNG_DEV_PWM | 55 | select SAMSUNG_DEV_PWM |
@@ -62,7 +66,6 @@ config MACH_SMDK6450 | |||
62 | select S3C_DEV_I2C1 | 66 | select S3C_DEV_I2C1 |
63 | select S3C_DEV_RTC | 67 | select S3C_DEV_RTC |
64 | select S3C_DEV_WDT | 68 | select S3C_DEV_WDT |
65 | select S3C64XX_DEV_SPI | ||
66 | select SAMSUNG_DEV_ADC | 69 | select SAMSUNG_DEV_ADC |
67 | select SAMSUNG_DEV_BACKLIGHT | 70 | select SAMSUNG_DEV_BACKLIGHT |
68 | select SAMSUNG_DEV_PWM | 71 | select SAMSUNG_DEV_PWM |
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile index a1324d8dc4e0..e167ca136f5d 100644 --- a/arch/arm/mach-s5p64x0/Makefile +++ b/arch/arm/mach-s5p64x0/Makefile | |||
@@ -10,14 +10,16 @@ obj-m := | |||
10 | obj-n := | 10 | obj-n := |
11 | obj- := | 11 | obj- := |
12 | 12 | ||
13 | # Core support for S5P64X0 system | 13 | # Core |
14 | 14 | ||
15 | obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o | 15 | obj-y += common.o clock.o |
16 | obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o | ||
17 | obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o | 16 | obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o |
18 | obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o | 17 | obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o |
18 | |||
19 | obj-$(CONFIG_PM) += pm.o irq-pm.o | 19 | obj-$(CONFIG_PM) += pm.o irq-pm.o |
20 | 20 | ||
21 | obj-y += dma.o | ||
22 | |||
21 | # machine support | 23 | # machine support |
22 | 24 | ||
23 | obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o | 25 | obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o |
@@ -26,7 +28,8 @@ obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o | |||
26 | # device support | 28 | # device support |
27 | 29 | ||
28 | obj-y += dev-audio.o | 30 | obj-y += dev-audio.o |
29 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
30 | 31 | ||
32 | obj-y += setup-i2c0.o | ||
31 | obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o | 33 | obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o |
32 | obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o | 34 | obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o |
35 | obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o | ||
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index c54c65d511f0..58811ba89eef 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -31,7 +31,8 @@ | |||
31 | #include <plat/pll.h> | 31 | #include <plat/pll.h> |
32 | #include <plat/s5p-clock.h> | 32 | #include <plat/s5p-clock.h> |
33 | #include <plat/clock-clksrc.h> | 33 | #include <plat/clock-clksrc.h> |
34 | #include <plat/s5p6440.h> | 34 | |
35 | #include "common.h" | ||
35 | 36 | ||
36 | static u32 epll_div[][5] = { | 37 | static u32 epll_div[][5] = { |
37 | { 36000000, 0, 48, 1, 4 }, | 38 | { 36000000, 0, 48, 1, 4 }, |
@@ -268,18 +269,6 @@ static struct clk init_clocks_off[] = { | |||
268 | .enable = s5p64x0_pclk_ctrl, | 269 | .enable = s5p64x0_pclk_ctrl, |
269 | .ctrlbit = (1 << 31), | 270 | .ctrlbit = (1 << 31), |
270 | }, { | 271 | }, { |
271 | .name = "sclk_spi_48", | ||
272 | .devname = "s3c64xx-spi.0", | ||
273 | .parent = &clk_48m, | ||
274 | .enable = s5p64x0_sclk_ctrl, | ||
275 | .ctrlbit = (1 << 22), | ||
276 | }, { | ||
277 | .name = "sclk_spi_48", | ||
278 | .devname = "s3c64xx-spi.1", | ||
279 | .parent = &clk_48m, | ||
280 | .enable = s5p64x0_sclk_ctrl, | ||
281 | .ctrlbit = (1 << 23), | ||
282 | }, { | ||
283 | .name = "mmc_48m", | 272 | .name = "mmc_48m", |
284 | .devname = "s3c-sdhci.0", | 273 | .devname = "s3c-sdhci.0", |
285 | .parent = &clk_48m, | 274 | .parent = &clk_48m, |
@@ -421,35 +410,6 @@ static struct clksrc_clk clksrcs[] = { | |||
421 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, | 410 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, |
422 | }, { | 411 | }, { |
423 | .clk = { | 412 | .clk = { |
424 | .name = "uclk1", | ||
425 | .ctrlbit = (1 << 5), | ||
426 | .enable = s5p64x0_sclk_ctrl, | ||
427 | }, | ||
428 | .sources = &clkset_uart, | ||
429 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 }, | ||
430 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, | ||
431 | }, { | ||
432 | .clk = { | ||
433 | .name = "sclk_spi", | ||
434 | .devname = "s3c64xx-spi.0", | ||
435 | .ctrlbit = (1 << 20), | ||
436 | .enable = s5p64x0_sclk_ctrl, | ||
437 | }, | ||
438 | .sources = &clkset_group1, | ||
439 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 }, | ||
440 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 }, | ||
441 | }, { | ||
442 | .clk = { | ||
443 | .name = "sclk_spi", | ||
444 | .devname = "s3c64xx-spi.1", | ||
445 | .ctrlbit = (1 << 21), | ||
446 | .enable = s5p64x0_sclk_ctrl, | ||
447 | }, | ||
448 | .sources = &clkset_group1, | ||
449 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 }, | ||
450 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, | ||
451 | }, { | ||
452 | .clk = { | ||
453 | .name = "sclk_post", | 413 | .name = "sclk_post", |
454 | .ctrlbit = (1 << 10), | 414 | .ctrlbit = (1 << 10), |
455 | .enable = s5p64x0_sclk_ctrl, | 415 | .enable = s5p64x0_sclk_ctrl, |
@@ -487,6 +447,41 @@ static struct clksrc_clk clksrcs[] = { | |||
487 | }, | 447 | }, |
488 | }; | 448 | }; |
489 | 449 | ||
450 | static struct clksrc_clk clk_sclk_uclk = { | ||
451 | .clk = { | ||
452 | .name = "uclk1", | ||
453 | .ctrlbit = (1 << 5), | ||
454 | .enable = s5p64x0_sclk_ctrl, | ||
455 | }, | ||
456 | .sources = &clkset_uart, | ||
457 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 }, | ||
458 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, | ||
459 | }; | ||
460 | |||
461 | static struct clksrc_clk clk_sclk_spi0 = { | ||
462 | .clk = { | ||
463 | .name = "sclk_spi", | ||
464 | .devname = "s3c64xx-spi.0", | ||
465 | .ctrlbit = (1 << 20), | ||
466 | .enable = s5p64x0_sclk_ctrl, | ||
467 | }, | ||
468 | .sources = &clkset_group1, | ||
469 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 }, | ||
470 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 }, | ||
471 | }; | ||
472 | |||
473 | static struct clksrc_clk clk_sclk_spi1 = { | ||
474 | .clk = { | ||
475 | .name = "sclk_spi", | ||
476 | .devname = "s3c64xx-spi.1", | ||
477 | .ctrlbit = (1 << 21), | ||
478 | .enable = s5p64x0_sclk_ctrl, | ||
479 | }, | ||
480 | .sources = &clkset_group1, | ||
481 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 }, | ||
482 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, | ||
483 | }; | ||
484 | |||
490 | /* Clock initialization code */ | 485 | /* Clock initialization code */ |
491 | static struct clksrc_clk *sysclks[] = { | 486 | static struct clksrc_clk *sysclks[] = { |
492 | &clk_mout_apll, | 487 | &clk_mout_apll, |
@@ -505,6 +500,20 @@ static struct clk dummy_apb_pclk = { | |||
505 | .id = -1, | 500 | .id = -1, |
506 | }; | 501 | }; |
507 | 502 | ||
503 | static struct clksrc_clk *clksrc_cdev[] = { | ||
504 | &clk_sclk_uclk, | ||
505 | &clk_sclk_spi0, | ||
506 | &clk_sclk_spi1, | ||
507 | }; | ||
508 | |||
509 | static struct clk_lookup s5p6440_clk_lookup[] = { | ||
510 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk), | ||
511 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), | ||
512 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | ||
513 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), | ||
514 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | ||
515 | }; | ||
516 | |||
508 | void __init_or_cpufreq s5p6440_setup_clocks(void) | 517 | void __init_or_cpufreq s5p6440_setup_clocks(void) |
509 | { | 518 | { |
510 | struct clk *xtal_clk; | 519 | struct clk *xtal_clk; |
@@ -583,9 +592,12 @@ void __init s5p6440_register_clocks(void) | |||
583 | 592 | ||
584 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 593 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
585 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 594 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
595 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) | ||
596 | s3c_register_clksrc(clksrc_cdev[ptr], 1); | ||
586 | 597 | ||
587 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 598 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
588 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 599 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
600 | clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup)); | ||
589 | 601 | ||
590 | s3c24xx_register_clock(&dummy_apb_pclk); | 602 | s3c24xx_register_clock(&dummy_apb_pclk); |
591 | 603 | ||
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index 2d04abfba12e..bd9d1e6fc5e2 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c | |||
@@ -31,7 +31,8 @@ | |||
31 | #include <plat/pll.h> | 31 | #include <plat/pll.h> |
32 | #include <plat/s5p-clock.h> | 32 | #include <plat/s5p-clock.h> |
33 | #include <plat/clock-clksrc.h> | 33 | #include <plat/clock-clksrc.h> |
34 | #include <plat/s5p6450.h> | 34 | |
35 | #include "common.h" | ||
35 | 36 | ||
36 | static struct clksrc_clk clk_mout_dpll = { | 37 | static struct clksrc_clk clk_mout_dpll = { |
37 | .clk = { | 38 | .clk = { |
@@ -443,35 +444,6 @@ static struct clksrc_clk clksrcs[] = { | |||
443 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, | 444 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, |
444 | }, { | 445 | }, { |
445 | .clk = { | 446 | .clk = { |
446 | .name = "uclk1", | ||
447 | .ctrlbit = (1 << 5), | ||
448 | .enable = s5p64x0_sclk_ctrl, | ||
449 | }, | ||
450 | .sources = &clkset_uart, | ||
451 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 }, | ||
452 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, | ||
453 | }, { | ||
454 | .clk = { | ||
455 | .name = "sclk_spi", | ||
456 | .devname = "s3c64xx-spi.0", | ||
457 | .ctrlbit = (1 << 20), | ||
458 | .enable = s5p64x0_sclk_ctrl, | ||
459 | }, | ||
460 | .sources = &clkset_group2, | ||
461 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 }, | ||
462 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 }, | ||
463 | }, { | ||
464 | .clk = { | ||
465 | .name = "sclk_spi", | ||
466 | .devname = "s3c64xx-spi.1", | ||
467 | .ctrlbit = (1 << 21), | ||
468 | .enable = s5p64x0_sclk_ctrl, | ||
469 | }, | ||
470 | .sources = &clkset_group2, | ||
471 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 }, | ||
472 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, | ||
473 | }, { | ||
474 | .clk = { | ||
475 | .name = "sclk_fimc", | 447 | .name = "sclk_fimc", |
476 | .ctrlbit = (1 << 10), | 448 | .ctrlbit = (1 << 10), |
477 | .enable = s5p64x0_sclk_ctrl, | 449 | .enable = s5p64x0_sclk_ctrl, |
@@ -536,6 +508,55 @@ static struct clksrc_clk clksrcs[] = { | |||
536 | }, | 508 | }, |
537 | }; | 509 | }; |
538 | 510 | ||
511 | static struct clksrc_clk clk_sclk_uclk = { | ||
512 | .clk = { | ||
513 | .name = "uclk1", | ||
514 | .ctrlbit = (1 << 5), | ||
515 | .enable = s5p64x0_sclk_ctrl, | ||
516 | }, | ||
517 | .sources = &clkset_uart, | ||
518 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 }, | ||
519 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, | ||
520 | }; | ||
521 | |||
522 | static struct clksrc_clk clk_sclk_spi0 = { | ||
523 | .clk = { | ||
524 | .name = "sclk_spi", | ||
525 | .devname = "s3c64xx-spi.0", | ||
526 | .ctrlbit = (1 << 20), | ||
527 | .enable = s5p64x0_sclk_ctrl, | ||
528 | }, | ||
529 | .sources = &clkset_group2, | ||
530 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 }, | ||
531 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 }, | ||
532 | }; | ||
533 | |||
534 | static struct clksrc_clk clk_sclk_spi1 = { | ||
535 | .clk = { | ||
536 | .name = "sclk_spi", | ||
537 | .devname = "s3c64xx-spi.1", | ||
538 | .ctrlbit = (1 << 21), | ||
539 | .enable = s5p64x0_sclk_ctrl, | ||
540 | }, | ||
541 | .sources = &clkset_group2, | ||
542 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 }, | ||
543 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, | ||
544 | }; | ||
545 | |||
546 | static struct clksrc_clk *clksrc_cdev[] = { | ||
547 | &clk_sclk_uclk, | ||
548 | &clk_sclk_spi0, | ||
549 | &clk_sclk_spi1, | ||
550 | }; | ||
551 | |||
552 | static struct clk_lookup s5p6450_clk_lookup[] = { | ||
553 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk), | ||
554 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), | ||
555 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | ||
556 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), | ||
557 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | ||
558 | }; | ||
559 | |||
539 | /* Clock initialization code */ | 560 | /* Clock initialization code */ |
540 | static struct clksrc_clk *sysclks[] = { | 561 | static struct clksrc_clk *sysclks[] = { |
541 | &clk_mout_apll, | 562 | &clk_mout_apll, |
@@ -634,9 +655,12 @@ void __init s5p6450_register_clocks(void) | |||
634 | 655 | ||
635 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 656 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
636 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 657 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
658 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) | ||
659 | s3c_register_clksrc(clksrc_cdev[ptr], 1); | ||
637 | 660 | ||
638 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 661 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
639 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 662 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
663 | clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup)); | ||
640 | 664 | ||
641 | s3c24xx_register_clock(&dummy_apb_pclk); | 665 | s3c24xx_register_clock(&dummy_apb_pclk); |
642 | 666 | ||
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c index b52c6e2f37a6..b289b726a7d6 100644 --- a/arch/arm/mach-s5p64x0/clock.c +++ b/arch/arm/mach-s5p64x0/clock.c | |||
@@ -30,8 +30,8 @@ | |||
30 | #include <plat/pll.h> | 30 | #include <plat/pll.h> |
31 | #include <plat/s5p-clock.h> | 31 | #include <plat/s5p-clock.h> |
32 | #include <plat/clock-clksrc.h> | 32 | #include <plat/clock-clksrc.h> |
33 | #include <plat/s5p6440.h> | 33 | |
34 | #include <plat/s5p6450.h> | 34 | #include "common.h" |
35 | 35 | ||
36 | struct clksrc_clk clk_mout_apll = { | 36 | struct clksrc_clk clk_mout_apll = { |
37 | .clk = { | 37 | .clk = { |
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c new file mode 100644 index 000000000000..fcf0778ae5c4 --- /dev/null +++ b/arch/arm/mach-s5p64x0/common.c | |||
@@ -0,0 +1,437 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Codes for S5P64X0 machines | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/types.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/list.h> | ||
16 | #include <linux/timer.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/clk.h> | ||
19 | #include <linux/io.h> | ||
20 | #include <linux/sysdev.h> | ||
21 | #include <linux/serial_core.h> | ||
22 | #include <linux/platform_device.h> | ||
23 | #include <linux/sched.h> | ||
24 | #include <linux/dma-mapping.h> | ||
25 | #include <linux/gpio.h> | ||
26 | #include <linux/irq.h> | ||
27 | |||
28 | #include <asm/irq.h> | ||
29 | #include <asm/proc-fns.h> | ||
30 | #include <asm/mach/arch.h> | ||
31 | #include <asm/mach/map.h> | ||
32 | #include <asm/mach/irq.h> | ||
33 | |||
34 | #include <mach/map.h> | ||
35 | #include <mach/hardware.h> | ||
36 | #include <mach/regs-clock.h> | ||
37 | #include <mach/regs-gpio.h> | ||
38 | |||
39 | #include <plat/cpu.h> | ||
40 | #include <plat/clock.h> | ||
41 | #include <plat/devs.h> | ||
42 | #include <plat/pm.h> | ||
43 | #include <plat/adc-core.h> | ||
44 | #include <plat/fb-core.h> | ||
45 | #include <plat/gpio-cfg.h> | ||
46 | #include <plat/regs-irqtype.h> | ||
47 | #include <plat/regs-serial.h> | ||
48 | #include <plat/watchdog-reset.h> | ||
49 | |||
50 | #include "common.h" | ||
51 | |||
52 | static const char name_s5p6440[] = "S5P6440"; | ||
53 | static const char name_s5p6450[] = "S5P6450"; | ||
54 | |||
55 | static struct cpu_table cpu_ids[] __initdata = { | ||
56 | { | ||
57 | .idcode = S5P6440_CPU_ID, | ||
58 | .idmask = S5P64XX_CPU_MASK, | ||
59 | .map_io = s5p6440_map_io, | ||
60 | .init_clocks = s5p6440_init_clocks, | ||
61 | .init_uarts = s5p6440_init_uarts, | ||
62 | .init = s5p64x0_init, | ||
63 | .name = name_s5p6440, | ||
64 | }, { | ||
65 | .idcode = S5P6450_CPU_ID, | ||
66 | .idmask = S5P64XX_CPU_MASK, | ||
67 | .map_io = s5p6450_map_io, | ||
68 | .init_clocks = s5p6450_init_clocks, | ||
69 | .init_uarts = s5p6450_init_uarts, | ||
70 | .init = s5p64x0_init, | ||
71 | .name = name_s5p6450, | ||
72 | }, | ||
73 | }; | ||
74 | |||
75 | /* Initial IO mappings */ | ||
76 | |||
77 | static struct map_desc s5p64x0_iodesc[] __initdata = { | ||
78 | { | ||
79 | .virtual = (unsigned long)S5P_VA_CHIPID, | ||
80 | .pfn = __phys_to_pfn(S5P64X0_PA_CHIPID), | ||
81 | .length = SZ_4K, | ||
82 | .type = MT_DEVICE, | ||
83 | }, { | ||
84 | .virtual = (unsigned long)S3C_VA_SYS, | ||
85 | .pfn = __phys_to_pfn(S5P64X0_PA_SYSCON), | ||
86 | .length = SZ_64K, | ||
87 | .type = MT_DEVICE, | ||
88 | }, { | ||
89 | .virtual = (unsigned long)S3C_VA_TIMER, | ||
90 | .pfn = __phys_to_pfn(S5P64X0_PA_TIMER), | ||
91 | .length = SZ_16K, | ||
92 | .type = MT_DEVICE, | ||
93 | }, { | ||
94 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
95 | .pfn = __phys_to_pfn(S5P64X0_PA_WDT), | ||
96 | .length = SZ_4K, | ||
97 | .type = MT_DEVICE, | ||
98 | }, { | ||
99 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
100 | .pfn = __phys_to_pfn(S5P64X0_PA_SROMC), | ||
101 | .length = SZ_4K, | ||
102 | .type = MT_DEVICE, | ||
103 | }, { | ||
104 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
105 | .pfn = __phys_to_pfn(S5P64X0_PA_GPIO), | ||
106 | .length = SZ_4K, | ||
107 | .type = MT_DEVICE, | ||
108 | }, { | ||
109 | .virtual = (unsigned long)VA_VIC0, | ||
110 | .pfn = __phys_to_pfn(S5P64X0_PA_VIC0), | ||
111 | .length = SZ_16K, | ||
112 | .type = MT_DEVICE, | ||
113 | }, { | ||
114 | .virtual = (unsigned long)VA_VIC1, | ||
115 | .pfn = __phys_to_pfn(S5P64X0_PA_VIC1), | ||
116 | .length = SZ_16K, | ||
117 | .type = MT_DEVICE, | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | static struct map_desc s5p6440_iodesc[] __initdata = { | ||
122 | { | ||
123 | .virtual = (unsigned long)S3C_VA_UART, | ||
124 | .pfn = __phys_to_pfn(S5P6440_PA_UART(0)), | ||
125 | .length = SZ_4K, | ||
126 | .type = MT_DEVICE, | ||
127 | }, | ||
128 | }; | ||
129 | |||
130 | static struct map_desc s5p6450_iodesc[] __initdata = { | ||
131 | { | ||
132 | .virtual = (unsigned long)S3C_VA_UART, | ||
133 | .pfn = __phys_to_pfn(S5P6450_PA_UART(0)), | ||
134 | .length = SZ_512K, | ||
135 | .type = MT_DEVICE, | ||
136 | }, { | ||
137 | .virtual = (unsigned long)S3C_VA_UART + SZ_512K, | ||
138 | .pfn = __phys_to_pfn(S5P6450_PA_UART(5)), | ||
139 | .length = SZ_4K, | ||
140 | .type = MT_DEVICE, | ||
141 | }, | ||
142 | }; | ||
143 | |||
144 | static void s5p64x0_idle(void) | ||
145 | { | ||
146 | unsigned long val; | ||
147 | |||
148 | if (!need_resched()) { | ||
149 | val = __raw_readl(S5P64X0_PWR_CFG); | ||
150 | val &= ~(0x3 << 5); | ||
151 | val |= (0x1 << 5); | ||
152 | __raw_writel(val, S5P64X0_PWR_CFG); | ||
153 | |||
154 | cpu_do_idle(); | ||
155 | } | ||
156 | local_irq_enable(); | ||
157 | } | ||
158 | |||
159 | /* | ||
160 | * s5p64x0_map_io | ||
161 | * | ||
162 | * register the standard CPU IO areas | ||
163 | */ | ||
164 | |||
165 | void __init s5p64x0_init_io(struct map_desc *mach_desc, int size) | ||
166 | { | ||
167 | /* initialize the io descriptors we need for initialization */ | ||
168 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); | ||
169 | if (mach_desc) | ||
170 | iotable_init(mach_desc, size); | ||
171 | |||
172 | /* detect cpu id and rev. */ | ||
173 | s5p_init_cpu(S5P64X0_SYS_ID); | ||
174 | |||
175 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
176 | } | ||
177 | |||
178 | void __init s5p6440_map_io(void) | ||
179 | { | ||
180 | /* initialize any device information early */ | ||
181 | s3c_adc_setname("s3c64xx-adc"); | ||
182 | s3c_fb_setname("s5p64x0-fb"); | ||
183 | |||
184 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); | ||
185 | init_consistent_dma_size(SZ_8M); | ||
186 | } | ||
187 | |||
188 | void __init s5p6450_map_io(void) | ||
189 | { | ||
190 | /* initialize any device information early */ | ||
191 | s3c_adc_setname("s3c64xx-adc"); | ||
192 | s3c_fb_setname("s5p64x0-fb"); | ||
193 | |||
194 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); | ||
195 | init_consistent_dma_size(SZ_8M); | ||
196 | } | ||
197 | |||
198 | /* | ||
199 | * s5p64x0_init_clocks | ||
200 | * | ||
201 | * register and setup the CPU clocks | ||
202 | */ | ||
203 | |||
204 | void __init s5p6440_init_clocks(int xtal) | ||
205 | { | ||
206 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
207 | |||
208 | s3c24xx_register_baseclocks(xtal); | ||
209 | s5p_register_clocks(xtal); | ||
210 | s5p6440_register_clocks(); | ||
211 | s5p6440_setup_clocks(); | ||
212 | } | ||
213 | |||
214 | void __init s5p6450_init_clocks(int xtal) | ||
215 | { | ||
216 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
217 | |||
218 | s3c24xx_register_baseclocks(xtal); | ||
219 | s5p_register_clocks(xtal); | ||
220 | s5p6450_register_clocks(); | ||
221 | s5p6450_setup_clocks(); | ||
222 | } | ||
223 | |||
224 | /* | ||
225 | * s5p64x0_init_irq | ||
226 | * | ||
227 | * register the CPU interrupts | ||
228 | */ | ||
229 | |||
230 | void __init s5p6440_init_irq(void) | ||
231 | { | ||
232 | /* S5P6440 supports 2 VIC */ | ||
233 | u32 vic[2]; | ||
234 | |||
235 | /* | ||
236 | * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)] | ||
237 | * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22] | ||
238 | */ | ||
239 | vic[0] = 0xff800ae7; | ||
240 | vic[1] = 0xffbf23e5; | ||
241 | |||
242 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
243 | } | ||
244 | |||
245 | void __init s5p6450_init_irq(void) | ||
246 | { | ||
247 | /* S5P6450 supports only 2 VIC */ | ||
248 | u32 vic[2]; | ||
249 | |||
250 | /* | ||
251 | * VIC0 is missing IRQ_VIC0[(13-15), (21-22)] | ||
252 | * VIC1 is missing IRQ VIC1[12, 14, 23] | ||
253 | */ | ||
254 | vic[0] = 0xff9f1fff; | ||
255 | vic[1] = 0xff7fafff; | ||
256 | |||
257 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
258 | } | ||
259 | |||
260 | struct sysdev_class s5p64x0_sysclass = { | ||
261 | .name = "s5p64x0-core", | ||
262 | }; | ||
263 | |||
264 | static struct sys_device s5p64x0_sysdev = { | ||
265 | .cls = &s5p64x0_sysclass, | ||
266 | }; | ||
267 | |||
268 | static int __init s5p64x0_core_init(void) | ||
269 | { | ||
270 | return sysdev_class_register(&s5p64x0_sysclass); | ||
271 | } | ||
272 | core_initcall(s5p64x0_core_init); | ||
273 | |||
274 | int __init s5p64x0_init(void) | ||
275 | { | ||
276 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); | ||
277 | |||
278 | /* set idle function */ | ||
279 | pm_idle = s5p64x0_idle; | ||
280 | |||
281 | return sysdev_register(&s5p64x0_sysdev); | ||
282 | } | ||
283 | |||
284 | /* uart registration process */ | ||
285 | void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
286 | { | ||
287 | int uart; | ||
288 | |||
289 | for (uart = 0; uart < no; uart++) { | ||
290 | s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart); | ||
291 | s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; | ||
292 | } | ||
293 | |||
294 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
295 | } | ||
296 | |||
297 | void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
298 | { | ||
299 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
300 | } | ||
301 | |||
302 | #define eint_offset(irq) ((irq) - IRQ_EINT(0)) | ||
303 | |||
304 | static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type) | ||
305 | { | ||
306 | int offs = eint_offset(data->irq); | ||
307 | int shift; | ||
308 | u32 ctrl, mask; | ||
309 | u32 newvalue = 0; | ||
310 | |||
311 | if (offs > 15) | ||
312 | return -EINVAL; | ||
313 | |||
314 | switch (type) { | ||
315 | case IRQ_TYPE_NONE: | ||
316 | printk(KERN_WARNING "No edge setting!\n"); | ||
317 | break; | ||
318 | case IRQ_TYPE_EDGE_RISING: | ||
319 | newvalue = S3C2410_EXTINT_RISEEDGE; | ||
320 | break; | ||
321 | case IRQ_TYPE_EDGE_FALLING: | ||
322 | newvalue = S3C2410_EXTINT_FALLEDGE; | ||
323 | break; | ||
324 | case IRQ_TYPE_EDGE_BOTH: | ||
325 | newvalue = S3C2410_EXTINT_BOTHEDGE; | ||
326 | break; | ||
327 | case IRQ_TYPE_LEVEL_LOW: | ||
328 | newvalue = S3C2410_EXTINT_LOWLEV; | ||
329 | break; | ||
330 | case IRQ_TYPE_LEVEL_HIGH: | ||
331 | newvalue = S3C2410_EXTINT_HILEV; | ||
332 | break; | ||
333 | default: | ||
334 | printk(KERN_ERR "No such irq type %d", type); | ||
335 | return -EINVAL; | ||
336 | } | ||
337 | |||
338 | shift = (offs / 2) * 4; | ||
339 | mask = 0x7 << shift; | ||
340 | |||
341 | ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask; | ||
342 | ctrl |= newvalue << shift; | ||
343 | __raw_writel(ctrl, S5P64X0_EINT0CON0); | ||
344 | |||
345 | /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */ | ||
346 | if (soc_is_s5p6450()) | ||
347 | s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2)); | ||
348 | else | ||
349 | s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2)); | ||
350 | |||
351 | return 0; | ||
352 | } | ||
353 | |||
354 | /* | ||
355 | * s5p64x0_irq_demux_eint | ||
356 | * | ||
357 | * This function demuxes the IRQ from the group0 external interrupts, | ||
358 | * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into | ||
359 | * the specific handlers s5p64x0_irq_demux_eintX_Y. | ||
360 | */ | ||
361 | static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end) | ||
362 | { | ||
363 | u32 status = __raw_readl(S5P64X0_EINT0PEND); | ||
364 | u32 mask = __raw_readl(S5P64X0_EINT0MASK); | ||
365 | unsigned int irq; | ||
366 | |||
367 | status &= ~mask; | ||
368 | status >>= start; | ||
369 | status &= (1 << (end - start + 1)) - 1; | ||
370 | |||
371 | for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { | ||
372 | if (status & 1) | ||
373 | generic_handle_irq(irq); | ||
374 | status >>= 1; | ||
375 | } | ||
376 | } | ||
377 | |||
378 | static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc) | ||
379 | { | ||
380 | s5p64x0_irq_demux_eint(0, 3); | ||
381 | } | ||
382 | |||
383 | static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc) | ||
384 | { | ||
385 | s5p64x0_irq_demux_eint(4, 11); | ||
386 | } | ||
387 | |||
388 | static void s5p64x0_irq_demux_eint12_15(unsigned int irq, | ||
389 | struct irq_desc *desc) | ||
390 | { | ||
391 | s5p64x0_irq_demux_eint(12, 15); | ||
392 | } | ||
393 | |||
394 | static int s5p64x0_alloc_gc(void) | ||
395 | { | ||
396 | struct irq_chip_generic *gc; | ||
397 | struct irq_chip_type *ct; | ||
398 | |||
399 | gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE, | ||
400 | S5P_VA_GPIO, handle_level_irq); | ||
401 | if (!gc) { | ||
402 | printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0" | ||
403 | "external interrupts failed\n", __func__); | ||
404 | return -EINVAL; | ||
405 | } | ||
406 | |||
407 | ct = gc->chip_types; | ||
408 | ct->chip.irq_ack = irq_gc_ack_set_bit; | ||
409 | ct->chip.irq_mask = irq_gc_mask_set_bit; | ||
410 | ct->chip.irq_unmask = irq_gc_mask_clr_bit; | ||
411 | ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; | ||
412 | ct->chip.irq_set_wake = s3c_irqext_wake; | ||
413 | ct->regs.ack = EINT0PEND_OFFSET; | ||
414 | ct->regs.mask = EINT0MASK_OFFSET; | ||
415 | irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE, | ||
416 | IRQ_NOREQUEST | IRQ_NOPROBE, 0); | ||
417 | return 0; | ||
418 | } | ||
419 | |||
420 | static int __init s5p64x0_init_irq_eint(void) | ||
421 | { | ||
422 | int ret = s5p64x0_alloc_gc(); | ||
423 | irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3); | ||
424 | irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11); | ||
425 | irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15); | ||
426 | |||
427 | return ret; | ||
428 | } | ||
429 | arch_initcall(s5p64x0_init_irq_eint); | ||
430 | |||
431 | void s5p64x0_restart(char mode, const char *cmd) | ||
432 | { | ||
433 | if (mode != 's') | ||
434 | arch_wdt_reset(); | ||
435 | |||
436 | soft_restart(0); | ||
437 | } | ||
diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h new file mode 100644 index 000000000000..f8a60fdc5884 --- /dev/null +++ b/arch/arm/mach-s5p64x0/common.h | |||
@@ -0,0 +1,57 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Header for S5P64X0 machines | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H | ||
13 | #define __ARCH_ARM_MACH_S5P64X0_COMMON_H | ||
14 | |||
15 | void s5p6440_init_irq(void); | ||
16 | void s5p6450_init_irq(void); | ||
17 | void s5p64x0_init_io(struct map_desc *mach_desc, int size); | ||
18 | |||
19 | void s5p6440_register_clocks(void); | ||
20 | void s5p6440_setup_clocks(void); | ||
21 | |||
22 | void s5p6450_register_clocks(void); | ||
23 | void s5p6450_setup_clocks(void); | ||
24 | |||
25 | void s5p64x0_restart(char mode, const char *cmd); | ||
26 | |||
27 | #ifdef CONFIG_CPU_S5P6440 | ||
28 | |||
29 | extern int s5p64x0_init(void); | ||
30 | extern void s5p6440_map_io(void); | ||
31 | extern void s5p6440_init_clocks(int xtal); | ||
32 | |||
33 | extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
34 | |||
35 | #else | ||
36 | #define s5p6440_init_clocks NULL | ||
37 | #define s5p6440_init_uarts NULL | ||
38 | #define s5p6440_map_io NULL | ||
39 | #define s5p64x0_init NULL | ||
40 | #endif | ||
41 | |||
42 | #ifdef CONFIG_CPU_S5P6450 | ||
43 | |||
44 | extern int s5p64x0_init(void); | ||
45 | extern void s5p6450_map_io(void); | ||
46 | extern void s5p6450_init_clocks(int xtal); | ||
47 | |||
48 | extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
49 | |||
50 | #else | ||
51 | #define s5p6450_init_clocks NULL | ||
52 | #define s5p6450_init_uarts NULL | ||
53 | #define s5p6450_map_io NULL | ||
54 | #define s5p64x0_init NULL | ||
55 | #endif | ||
56 | |||
57 | #endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */ | ||
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c deleted file mode 100644 index ecab40cf19ab..000000000000 --- a/arch/arm/mach-s5p64x0/cpu.c +++ /dev/null | |||
@@ -1,215 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/list.h> | ||
15 | #include <linux/timer.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/clk.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/sysdev.h> | ||
20 | #include <linux/serial_core.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/sched.h> | ||
23 | #include <linux/dma-mapping.h> | ||
24 | |||
25 | #include <asm/mach/arch.h> | ||
26 | #include <asm/mach/map.h> | ||
27 | #include <asm/mach/irq.h> | ||
28 | #include <asm/proc-fns.h> | ||
29 | #include <asm/irq.h> | ||
30 | |||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/map.h> | ||
33 | #include <mach/regs-clock.h> | ||
34 | |||
35 | #include <plat/regs-serial.h> | ||
36 | #include <plat/cpu.h> | ||
37 | #include <plat/devs.h> | ||
38 | #include <plat/clock.h> | ||
39 | #include <plat/s5p6440.h> | ||
40 | #include <plat/s5p6450.h> | ||
41 | #include <plat/adc-core.h> | ||
42 | #include <plat/fb-core.h> | ||
43 | |||
44 | /* Initial IO mappings */ | ||
45 | |||
46 | static struct map_desc s5p64x0_iodesc[] __initdata = { | ||
47 | { | ||
48 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
49 | .pfn = __phys_to_pfn(S5P64X0_PA_GPIO), | ||
50 | .length = SZ_4K, | ||
51 | .type = MT_DEVICE, | ||
52 | }, { | ||
53 | .virtual = (unsigned long)VA_VIC0, | ||
54 | .pfn = __phys_to_pfn(S5P64X0_PA_VIC0), | ||
55 | .length = SZ_16K, | ||
56 | .type = MT_DEVICE, | ||
57 | }, { | ||
58 | .virtual = (unsigned long)VA_VIC1, | ||
59 | .pfn = __phys_to_pfn(S5P64X0_PA_VIC1), | ||
60 | .length = SZ_16K, | ||
61 | .type = MT_DEVICE, | ||
62 | }, | ||
63 | }; | ||
64 | |||
65 | static struct map_desc s5p6440_iodesc[] __initdata = { | ||
66 | { | ||
67 | .virtual = (unsigned long)S3C_VA_UART, | ||
68 | .pfn = __phys_to_pfn(S5P6440_PA_UART(0)), | ||
69 | .length = SZ_4K, | ||
70 | .type = MT_DEVICE, | ||
71 | }, | ||
72 | }; | ||
73 | |||
74 | static struct map_desc s5p6450_iodesc[] __initdata = { | ||
75 | { | ||
76 | .virtual = (unsigned long)S3C_VA_UART, | ||
77 | .pfn = __phys_to_pfn(S5P6450_PA_UART(0)), | ||
78 | .length = SZ_512K, | ||
79 | .type = MT_DEVICE, | ||
80 | }, { | ||
81 | .virtual = (unsigned long)S3C_VA_UART + SZ_512K, | ||
82 | .pfn = __phys_to_pfn(S5P6450_PA_UART(5)), | ||
83 | .length = SZ_4K, | ||
84 | .type = MT_DEVICE, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static void s5p64x0_idle(void) | ||
89 | { | ||
90 | unsigned long val; | ||
91 | |||
92 | if (!need_resched()) { | ||
93 | val = __raw_readl(S5P64X0_PWR_CFG); | ||
94 | val &= ~(0x3 << 5); | ||
95 | val |= (0x1 << 5); | ||
96 | __raw_writel(val, S5P64X0_PWR_CFG); | ||
97 | |||
98 | cpu_do_idle(); | ||
99 | } | ||
100 | local_irq_enable(); | ||
101 | } | ||
102 | |||
103 | /* | ||
104 | * s5p64x0_map_io | ||
105 | * | ||
106 | * register the standard CPU IO areas | ||
107 | */ | ||
108 | |||
109 | void __init s5p6440_map_io(void) | ||
110 | { | ||
111 | /* initialize any device information early */ | ||
112 | s3c_adc_setname("s3c64xx-adc"); | ||
113 | s3c_fb_setname("s5p64x0-fb"); | ||
114 | |||
115 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); | ||
116 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); | ||
117 | init_consistent_dma_size(SZ_8M); | ||
118 | } | ||
119 | |||
120 | void __init s5p6450_map_io(void) | ||
121 | { | ||
122 | /* initialize any device information early */ | ||
123 | s3c_adc_setname("s3c64xx-adc"); | ||
124 | s3c_fb_setname("s5p64x0-fb"); | ||
125 | |||
126 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); | ||
127 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); | ||
128 | init_consistent_dma_size(SZ_8M); | ||
129 | } | ||
130 | |||
131 | /* | ||
132 | * s5p64x0_init_clocks | ||
133 | * | ||
134 | * register and setup the CPU clocks | ||
135 | */ | ||
136 | |||
137 | void __init s5p6440_init_clocks(int xtal) | ||
138 | { | ||
139 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
140 | |||
141 | s3c24xx_register_baseclocks(xtal); | ||
142 | s5p_register_clocks(xtal); | ||
143 | s5p6440_register_clocks(); | ||
144 | s5p6440_setup_clocks(); | ||
145 | } | ||
146 | |||
147 | void __init s5p6450_init_clocks(int xtal) | ||
148 | { | ||
149 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
150 | |||
151 | s3c24xx_register_baseclocks(xtal); | ||
152 | s5p_register_clocks(xtal); | ||
153 | s5p6450_register_clocks(); | ||
154 | s5p6450_setup_clocks(); | ||
155 | } | ||
156 | |||
157 | /* | ||
158 | * s5p64x0_init_irq | ||
159 | * | ||
160 | * register the CPU interrupts | ||
161 | */ | ||
162 | |||
163 | void __init s5p6440_init_irq(void) | ||
164 | { | ||
165 | /* S5P6440 supports 2 VIC */ | ||
166 | u32 vic[2]; | ||
167 | |||
168 | /* | ||
169 | * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)] | ||
170 | * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22] | ||
171 | */ | ||
172 | vic[0] = 0xff800ae7; | ||
173 | vic[1] = 0xffbf23e5; | ||
174 | |||
175 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
176 | } | ||
177 | |||
178 | void __init s5p6450_init_irq(void) | ||
179 | { | ||
180 | /* S5P6450 supports only 2 VIC */ | ||
181 | u32 vic[2]; | ||
182 | |||
183 | /* | ||
184 | * VIC0 is missing IRQ_VIC0[(13-15), (21-22)] | ||
185 | * VIC1 is missing IRQ VIC1[12, 14, 23] | ||
186 | */ | ||
187 | vic[0] = 0xff9f1fff; | ||
188 | vic[1] = 0xff7fafff; | ||
189 | |||
190 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
191 | } | ||
192 | |||
193 | struct sysdev_class s5p64x0_sysclass = { | ||
194 | .name = "s5p64x0-core", | ||
195 | }; | ||
196 | |||
197 | static struct sys_device s5p64x0_sysdev = { | ||
198 | .cls = &s5p64x0_sysclass, | ||
199 | }; | ||
200 | |||
201 | static int __init s5p64x0_core_init(void) | ||
202 | { | ||
203 | return sysdev_class_register(&s5p64x0_sysclass); | ||
204 | } | ||
205 | core_initcall(s5p64x0_core_init); | ||
206 | |||
207 | int __init s5p64x0_init(void) | ||
208 | { | ||
209 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); | ||
210 | |||
211 | /* set idle function */ | ||
212 | pm_idle = s5p64x0_idle; | ||
213 | |||
214 | return sysdev_register(&s5p64x0_sysdev); | ||
215 | } | ||
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c deleted file mode 100644 index 1fd9c79c7dbc..000000000000 --- a/arch/arm/mach-s5p64x0/dev-spi.c +++ /dev/null | |||
@@ -1,224 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/dev-spi.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
7 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/dma-mapping.h> | ||
16 | #include <linux/gpio.h> | ||
17 | |||
18 | #include <mach/dma.h> | ||
19 | #include <mach/map.h> | ||
20 | #include <mach/irqs.h> | ||
21 | #include <mach/regs-clock.h> | ||
22 | #include <mach/spi-clocks.h> | ||
23 | |||
24 | #include <plat/cpu.h> | ||
25 | #include <plat/s3c64xx-spi.h> | ||
26 | #include <plat/gpio-cfg.h> | ||
27 | |||
28 | static char *s5p64x0_spi_src_clks[] = { | ||
29 | [S5P64X0_SPI_SRCCLK_PCLK] = "pclk", | ||
30 | [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi", | ||
31 | }; | ||
32 | |||
33 | /* SPI Controller platform_devices */ | ||
34 | |||
35 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
36 | * The emulated CS is toggled by board specific mechanism, as it can | ||
37 | * be either some immediate GPIO or some signal out of some other | ||
38 | * chip in between ... or some yet another way. | ||
39 | * We simply do not assume anything about CS. | ||
40 | */ | ||
41 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | ||
42 | { | ||
43 | unsigned int base; | ||
44 | |||
45 | switch (pdev->id) { | ||
46 | case 0: | ||
47 | base = S5P6440_GPC(0); | ||
48 | break; | ||
49 | |||
50 | case 1: | ||
51 | base = S5P6440_GPC(4); | ||
52 | break; | ||
53 | |||
54 | default: | ||
55 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
56 | return -EINVAL; | ||
57 | } | ||
58 | |||
59 | s3c_gpio_cfgall_range(base, 3, | ||
60 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
61 | |||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) | ||
66 | { | ||
67 | unsigned int base; | ||
68 | |||
69 | switch (pdev->id) { | ||
70 | case 0: | ||
71 | base = S5P6450_GPC(0); | ||
72 | break; | ||
73 | |||
74 | case 1: | ||
75 | base = S5P6450_GPC(4); | ||
76 | break; | ||
77 | |||
78 | default: | ||
79 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
80 | return -EINVAL; | ||
81 | } | ||
82 | |||
83 | s3c_gpio_cfgall_range(base, 3, | ||
84 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
85 | |||
86 | return 0; | ||
87 | } | ||
88 | |||
89 | static struct resource s5p64x0_spi0_resource[] = { | ||
90 | [0] = { | ||
91 | .start = S5P64X0_PA_SPI0, | ||
92 | .end = S5P64X0_PA_SPI0 + 0x100 - 1, | ||
93 | .flags = IORESOURCE_MEM, | ||
94 | }, | ||
95 | [1] = { | ||
96 | .start = DMACH_SPI0_TX, | ||
97 | .end = DMACH_SPI0_TX, | ||
98 | .flags = IORESOURCE_DMA, | ||
99 | }, | ||
100 | [2] = { | ||
101 | .start = DMACH_SPI0_RX, | ||
102 | .end = DMACH_SPI0_RX, | ||
103 | .flags = IORESOURCE_DMA, | ||
104 | }, | ||
105 | [3] = { | ||
106 | .start = IRQ_SPI0, | ||
107 | .end = IRQ_SPI0, | ||
108 | .flags = IORESOURCE_IRQ, | ||
109 | }, | ||
110 | }; | ||
111 | |||
112 | static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | ||
113 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
114 | .fifo_lvl_mask = 0x1ff, | ||
115 | .rx_lvl_offset = 15, | ||
116 | .tx_st_done = 25, | ||
117 | }; | ||
118 | |||
119 | static struct s3c64xx_spi_info s5p6450_spi0_pdata = { | ||
120 | .cfg_gpio = s5p6450_spi_cfg_gpio, | ||
121 | .fifo_lvl_mask = 0x1ff, | ||
122 | .rx_lvl_offset = 15, | ||
123 | .tx_st_done = 25, | ||
124 | }; | ||
125 | |||
126 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
127 | |||
128 | struct platform_device s5p64x0_device_spi0 = { | ||
129 | .name = "s3c64xx-spi", | ||
130 | .id = 0, | ||
131 | .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource), | ||
132 | .resource = s5p64x0_spi0_resource, | ||
133 | .dev = { | ||
134 | .dma_mask = &spi_dmamask, | ||
135 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
136 | }, | ||
137 | }; | ||
138 | |||
139 | static struct resource s5p64x0_spi1_resource[] = { | ||
140 | [0] = { | ||
141 | .start = S5P64X0_PA_SPI1, | ||
142 | .end = S5P64X0_PA_SPI1 + 0x100 - 1, | ||
143 | .flags = IORESOURCE_MEM, | ||
144 | }, | ||
145 | [1] = { | ||
146 | .start = DMACH_SPI1_TX, | ||
147 | .end = DMACH_SPI1_TX, | ||
148 | .flags = IORESOURCE_DMA, | ||
149 | }, | ||
150 | [2] = { | ||
151 | .start = DMACH_SPI1_RX, | ||
152 | .end = DMACH_SPI1_RX, | ||
153 | .flags = IORESOURCE_DMA, | ||
154 | }, | ||
155 | [3] = { | ||
156 | .start = IRQ_SPI1, | ||
157 | .end = IRQ_SPI1, | ||
158 | .flags = IORESOURCE_IRQ, | ||
159 | }, | ||
160 | }; | ||
161 | |||
162 | static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | ||
163 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
164 | .fifo_lvl_mask = 0x7f, | ||
165 | .rx_lvl_offset = 15, | ||
166 | .tx_st_done = 25, | ||
167 | }; | ||
168 | |||
169 | static struct s3c64xx_spi_info s5p6450_spi1_pdata = { | ||
170 | .cfg_gpio = s5p6450_spi_cfg_gpio, | ||
171 | .fifo_lvl_mask = 0x7f, | ||
172 | .rx_lvl_offset = 15, | ||
173 | .tx_st_done = 25, | ||
174 | }; | ||
175 | |||
176 | struct platform_device s5p64x0_device_spi1 = { | ||
177 | .name = "s3c64xx-spi", | ||
178 | .id = 1, | ||
179 | .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource), | ||
180 | .resource = s5p64x0_spi1_resource, | ||
181 | .dev = { | ||
182 | .dma_mask = &spi_dmamask, | ||
183 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
184 | }, | ||
185 | }; | ||
186 | |||
187 | void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
188 | { | ||
189 | struct s3c64xx_spi_info *pd; | ||
190 | |||
191 | /* Reject invalid configuration */ | ||
192 | if (!num_cs || src_clk_nr < 0 | ||
193 | || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) { | ||
194 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
195 | return; | ||
196 | } | ||
197 | |||
198 | switch (cntrlr) { | ||
199 | case 0: | ||
200 | if (soc_is_s5p6450()) | ||
201 | pd = &s5p6450_spi0_pdata; | ||
202 | else | ||
203 | pd = &s5p6440_spi0_pdata; | ||
204 | |||
205 | s5p64x0_device_spi0.dev.platform_data = pd; | ||
206 | break; | ||
207 | case 1: | ||
208 | if (soc_is_s5p6450()) | ||
209 | pd = &s5p6450_spi1_pdata; | ||
210 | else | ||
211 | pd = &s5p6440_spi1_pdata; | ||
212 | |||
213 | s5p64x0_device_spi1.dev.platform_data = pd; | ||
214 | break; | ||
215 | default: | ||
216 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
217 | __func__, cntrlr); | ||
218 | return; | ||
219 | } | ||
220 | |||
221 | pd->num_cs = num_cs; | ||
222 | pd->src_clk_nr = src_clk_nr; | ||
223 | pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr]; | ||
224 | } | ||
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index 442dd4ad12da..f820c0744405 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -38,176 +38,74 @@ | |||
38 | 38 | ||
39 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 39 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
40 | 40 | ||
41 | struct dma_pl330_peri s5p6440_pdma_peri[22] = { | 41 | u8 s5p6440_pdma_peri[] = { |
42 | { | 42 | DMACH_UART0_RX, |
43 | .peri_id = (u8)DMACH_UART0_RX, | 43 | DMACH_UART0_TX, |
44 | .rqtype = DEVTOMEM, | 44 | DMACH_UART1_RX, |
45 | }, { | 45 | DMACH_UART1_TX, |
46 | .peri_id = (u8)DMACH_UART0_TX, | 46 | DMACH_UART2_RX, |
47 | .rqtype = MEMTODEV, | 47 | DMACH_UART2_TX, |
48 | }, { | 48 | DMACH_UART3_RX, |
49 | .peri_id = (u8)DMACH_UART1_RX, | 49 | DMACH_UART3_TX, |
50 | .rqtype = DEVTOMEM, | 50 | DMACH_MAX, |
51 | }, { | 51 | DMACH_MAX, |
52 | .peri_id = (u8)DMACH_UART1_TX, | 52 | DMACH_PCM0_TX, |
53 | .rqtype = MEMTODEV, | 53 | DMACH_PCM0_RX, |
54 | }, { | 54 | DMACH_I2S0_TX, |
55 | .peri_id = (u8)DMACH_UART2_RX, | 55 | DMACH_I2S0_RX, |
56 | .rqtype = DEVTOMEM, | 56 | DMACH_SPI0_TX, |
57 | }, { | 57 | DMACH_SPI0_RX, |
58 | .peri_id = (u8)DMACH_UART2_TX, | 58 | DMACH_MAX, |
59 | .rqtype = MEMTODEV, | 59 | DMACH_MAX, |
60 | }, { | 60 | DMACH_MAX, |
61 | .peri_id = (u8)DMACH_UART3_RX, | 61 | DMACH_MAX, |
62 | .rqtype = DEVTOMEM, | 62 | DMACH_SPI1_TX, |
63 | }, { | 63 | DMACH_SPI1_RX, |
64 | .peri_id = (u8)DMACH_UART3_TX, | ||
65 | .rqtype = MEMTODEV, | ||
66 | }, { | ||
67 | .peri_id = DMACH_MAX, | ||
68 | }, { | ||
69 | .peri_id = DMACH_MAX, | ||
70 | }, { | ||
71 | .peri_id = (u8)DMACH_PCM0_TX, | ||
72 | .rqtype = MEMTODEV, | ||
73 | }, { | ||
74 | .peri_id = (u8)DMACH_PCM0_RX, | ||
75 | .rqtype = DEVTOMEM, | ||
76 | }, { | ||
77 | .peri_id = (u8)DMACH_I2S0_TX, | ||
78 | .rqtype = MEMTODEV, | ||
79 | }, { | ||
80 | .peri_id = (u8)DMACH_I2S0_RX, | ||
81 | .rqtype = DEVTOMEM, | ||
82 | }, { | ||
83 | .peri_id = (u8)DMACH_SPI0_TX, | ||
84 | .rqtype = MEMTODEV, | ||
85 | }, { | ||
86 | .peri_id = (u8)DMACH_SPI0_RX, | ||
87 | .rqtype = DEVTOMEM, | ||
88 | }, { | ||
89 | .peri_id = (u8)DMACH_MAX, | ||
90 | }, { | ||
91 | .peri_id = (u8)DMACH_MAX, | ||
92 | }, { | ||
93 | .peri_id = (u8)DMACH_MAX, | ||
94 | }, { | ||
95 | .peri_id = (u8)DMACH_MAX, | ||
96 | }, { | ||
97 | .peri_id = (u8)DMACH_SPI1_TX, | ||
98 | .rqtype = MEMTODEV, | ||
99 | }, { | ||
100 | .peri_id = (u8)DMACH_SPI1_RX, | ||
101 | .rqtype = DEVTOMEM, | ||
102 | }, | ||
103 | }; | 64 | }; |
104 | 65 | ||
105 | struct dma_pl330_platdata s5p6440_pdma_pdata = { | 66 | struct dma_pl330_platdata s5p6440_pdma_pdata = { |
106 | .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), | 67 | .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), |
107 | .peri = s5p6440_pdma_peri, | 68 | .peri_id = s5p6440_pdma_peri, |
108 | }; | 69 | }; |
109 | 70 | ||
110 | struct dma_pl330_peri s5p6450_pdma_peri[32] = { | 71 | u8 s5p6450_pdma_peri[] = { |
111 | { | 72 | DMACH_UART0_RX, |
112 | .peri_id = (u8)DMACH_UART0_RX, | 73 | DMACH_UART0_TX, |
113 | .rqtype = DEVTOMEM, | 74 | DMACH_UART1_RX, |
114 | }, { | 75 | DMACH_UART1_TX, |
115 | .peri_id = (u8)DMACH_UART0_TX, | 76 | DMACH_UART2_RX, |
116 | .rqtype = MEMTODEV, | 77 | DMACH_UART2_TX, |
117 | }, { | 78 | DMACH_UART3_RX, |
118 | .peri_id = (u8)DMACH_UART1_RX, | 79 | DMACH_UART3_TX, |
119 | .rqtype = DEVTOMEM, | 80 | DMACH_UART4_RX, |
120 | }, { | 81 | DMACH_UART4_TX, |
121 | .peri_id = (u8)DMACH_UART1_TX, | 82 | DMACH_PCM0_TX, |
122 | .rqtype = MEMTODEV, | 83 | DMACH_PCM0_RX, |
123 | }, { | 84 | DMACH_I2S0_TX, |
124 | .peri_id = (u8)DMACH_UART2_RX, | 85 | DMACH_I2S0_RX, |
125 | .rqtype = DEVTOMEM, | 86 | DMACH_SPI0_TX, |
126 | }, { | 87 | DMACH_SPI0_RX, |
127 | .peri_id = (u8)DMACH_UART2_TX, | 88 | DMACH_PCM1_TX, |
128 | .rqtype = MEMTODEV, | 89 | DMACH_PCM1_RX, |
129 | }, { | 90 | DMACH_PCM2_TX, |
130 | .peri_id = (u8)DMACH_UART3_RX, | 91 | DMACH_PCM2_RX, |
131 | .rqtype = DEVTOMEM, | 92 | DMACH_SPI1_TX, |
132 | }, { | 93 | DMACH_SPI1_RX, |
133 | .peri_id = (u8)DMACH_UART3_TX, | 94 | DMACH_USI_TX, |
134 | .rqtype = MEMTODEV, | 95 | DMACH_USI_RX, |
135 | }, { | 96 | DMACH_MAX, |
136 | .peri_id = (u8)DMACH_UART4_RX, | 97 | DMACH_I2S1_TX, |
137 | .rqtype = DEVTOMEM, | 98 | DMACH_I2S1_RX, |
138 | }, { | 99 | DMACH_I2S2_TX, |
139 | .peri_id = (u8)DMACH_UART4_TX, | 100 | DMACH_I2S2_RX, |
140 | .rqtype = MEMTODEV, | 101 | DMACH_PWM, |
141 | }, { | 102 | DMACH_UART5_RX, |
142 | .peri_id = (u8)DMACH_PCM0_TX, | 103 | DMACH_UART5_TX, |
143 | .rqtype = MEMTODEV, | ||
144 | }, { | ||
145 | .peri_id = (u8)DMACH_PCM0_RX, | ||
146 | .rqtype = DEVTOMEM, | ||
147 | }, { | ||
148 | .peri_id = (u8)DMACH_I2S0_TX, | ||
149 | .rqtype = MEMTODEV, | ||
150 | }, { | ||
151 | .peri_id = (u8)DMACH_I2S0_RX, | ||
152 | .rqtype = DEVTOMEM, | ||
153 | }, { | ||
154 | .peri_id = (u8)DMACH_SPI0_TX, | ||
155 | .rqtype = MEMTODEV, | ||
156 | }, { | ||
157 | .peri_id = (u8)DMACH_SPI0_RX, | ||
158 | .rqtype = DEVTOMEM, | ||
159 | }, { | ||
160 | .peri_id = (u8)DMACH_PCM1_TX, | ||
161 | .rqtype = MEMTODEV, | ||
162 | }, { | ||
163 | .peri_id = (u8)DMACH_PCM1_RX, | ||
164 | .rqtype = DEVTOMEM, | ||
165 | }, { | ||
166 | .peri_id = (u8)DMACH_PCM2_TX, | ||
167 | .rqtype = MEMTODEV, | ||
168 | }, { | ||
169 | .peri_id = (u8)DMACH_PCM2_RX, | ||
170 | .rqtype = DEVTOMEM, | ||
171 | }, { | ||
172 | .peri_id = (u8)DMACH_SPI1_TX, | ||
173 | .rqtype = MEMTODEV, | ||
174 | }, { | ||
175 | .peri_id = (u8)DMACH_SPI1_RX, | ||
176 | .rqtype = DEVTOMEM, | ||
177 | }, { | ||
178 | .peri_id = (u8)DMACH_USI_TX, | ||
179 | .rqtype = MEMTODEV, | ||
180 | }, { | ||
181 | .peri_id = (u8)DMACH_USI_RX, | ||
182 | .rqtype = DEVTOMEM, | ||
183 | }, { | ||
184 | .peri_id = (u8)DMACH_MAX, | ||
185 | }, { | ||
186 | .peri_id = (u8)DMACH_I2S1_TX, | ||
187 | .rqtype = MEMTODEV, | ||
188 | }, { | ||
189 | .peri_id = (u8)DMACH_I2S1_RX, | ||
190 | .rqtype = DEVTOMEM, | ||
191 | }, { | ||
192 | .peri_id = (u8)DMACH_I2S2_TX, | ||
193 | .rqtype = MEMTODEV, | ||
194 | }, { | ||
195 | .peri_id = (u8)DMACH_I2S2_RX, | ||
196 | .rqtype = DEVTOMEM, | ||
197 | }, { | ||
198 | .peri_id = (u8)DMACH_PWM, | ||
199 | }, { | ||
200 | .peri_id = (u8)DMACH_UART5_RX, | ||
201 | .rqtype = DEVTOMEM, | ||
202 | }, { | ||
203 | .peri_id = (u8)DMACH_UART5_TX, | ||
204 | .rqtype = MEMTODEV, | ||
205 | }, | ||
206 | }; | 104 | }; |
207 | 105 | ||
208 | struct dma_pl330_platdata s5p6450_pdma_pdata = { | 106 | struct dma_pl330_platdata s5p6450_pdma_pdata = { |
209 | .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), | 107 | .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), |
210 | .peri = s5p6450_pdma_peri, | 108 | .peri_id = s5p6450_pdma_peri, |
211 | }; | 109 | }; |
212 | 110 | ||
213 | struct amba_device s5p64x0_device_pdma = { | 111 | struct amba_device s5p64x0_device_pdma = { |
@@ -227,10 +125,15 @@ struct amba_device s5p64x0_device_pdma = { | |||
227 | 125 | ||
228 | static int __init s5p64x0_dma_init(void) | 126 | static int __init s5p64x0_dma_init(void) |
229 | { | 127 | { |
230 | if (soc_is_s5p6450()) | 128 | if (soc_is_s5p6450()) { |
129 | dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); | ||
130 | dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); | ||
231 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; | 131 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; |
232 | else | 132 | } else { |
133 | dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); | ||
134 | dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); | ||
233 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; | 135 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; |
136 | } | ||
234 | 137 | ||
235 | amba_device_register(&s5p64x0_device_pdma, &iomem_resource); | 138 | amba_device_register(&s5p64x0_device_pdma, &iomem_resource); |
236 | 139 | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h index 53982db9d259..5b845e849b30 100644 --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h | |||
@@ -141,6 +141,8 @@ | |||
141 | 141 | ||
142 | #define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x)) | 142 | #define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x)) |
143 | 143 | ||
144 | #define IRQ_TIMER_BASE (11) | ||
145 | |||
144 | /* Set the default NR_IRQS */ | 146 | /* Set the default NR_IRQS */ |
145 | 147 | ||
146 | #define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) | 148 | #define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) |
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h index 4d3ac8a3709d..0c0175dbfa34 100644 --- a/arch/arm/mach-s5p64x0/include/mach/map.h +++ b/arch/arm/mach-s5p64x0/include/mach/map.h | |||
@@ -67,6 +67,8 @@ | |||
67 | #define S3C_PA_RTC S5P64X0_PA_RTC | 67 | #define S3C_PA_RTC S5P64X0_PA_RTC |
68 | #define S3C_PA_WDT S5P64X0_PA_WDT | 68 | #define S3C_PA_WDT S5P64X0_PA_WDT |
69 | #define S3C_PA_FB S5P64X0_PA_FB | 69 | #define S3C_PA_FB S5P64X0_PA_FB |
70 | #define S3C_PA_SPI0 S5P64X0_PA_SPI0 | ||
71 | #define S3C_PA_SPI1 S5P64X0_PA_SPI1 | ||
70 | 72 | ||
71 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | 73 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID |
72 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | 74 | #define S5P_PA_SROMC S5P64X0_PA_SROMC |
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h index 60f57532c970..cf26e0954a2f 100644 --- a/arch/arm/mach-s5p64x0/include/mach/system.h +++ b/arch/arm/mach-s5p64x0/include/mach/system.h | |||
@@ -13,8 +13,6 @@ | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | 13 | #ifndef __ASM_ARCH_SYSTEM_H |
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 14 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
15 | 15 | ||
16 | #include <plat/system-reset.h> | ||
17 | |||
18 | static void arch_idle(void) | 16 | static void arch_idle(void) |
19 | { | 17 | { |
20 | /* nothing here yet */ | 18 | /* nothing here yet */ |
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c deleted file mode 100644 index 79833caf8165..000000000000 --- a/arch/arm/mach-s5p64x0/init.c +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/init.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - Init support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/serial_core.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | |||
20 | #include <plat/cpu.h> | ||
21 | #include <plat/devs.h> | ||
22 | #include <plat/s5p6440.h> | ||
23 | #include <plat/s5p6450.h> | ||
24 | #include <plat/regs-serial.h> | ||
25 | |||
26 | static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = { | ||
27 | [0] = { | ||
28 | .name = "pclk_low", | ||
29 | .divisor = 1, | ||
30 | .min_baud = 0, | ||
31 | .max_baud = 0, | ||
32 | }, | ||
33 | [1] = { | ||
34 | .name = "uclk1", | ||
35 | .divisor = 1, | ||
36 | .min_baud = 0, | ||
37 | .max_baud = 0, | ||
38 | }, | ||
39 | }; | ||
40 | |||
41 | /* uart registration process */ | ||
42 | |||
43 | void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
44 | { | ||
45 | struct s3c2410_uartcfg *tcfg = cfg; | ||
46 | u32 ucnt; | ||
47 | |||
48 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | ||
49 | if (!tcfg->clocks) { | ||
50 | tcfg->clocks = s5p64x0_serial_clocks; | ||
51 | tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks); | ||
52 | } | ||
53 | } | ||
54 | } | ||
55 | |||
56 | void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
57 | { | ||
58 | int uart; | ||
59 | |||
60 | for (uart = 0; uart < no; uart++) { | ||
61 | s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart); | ||
62 | s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; | ||
63 | } | ||
64 | |||
65 | s5p64x0_common_init_uarts(cfg, no); | ||
66 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
67 | } | ||
68 | |||
69 | void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
70 | { | ||
71 | s5p64x0_common_init_uarts(cfg, no); | ||
72 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
73 | } | ||
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c deleted file mode 100644 index 275dc74f4a7b..000000000000 --- a/arch/arm/mach-s5p64x0/irq-eint.c +++ /dev/null | |||
@@ -1,155 +0,0 @@ | |||
1 | /* arch/arm/mach-s5p64x0/irq-eint.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c | ||
7 | * | ||
8 | * S5P64X0 - Interrupt handling for External Interrupts. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/gpio.h> | ||
17 | #include <linux/irq.h> | ||
18 | #include <linux/io.h> | ||
19 | |||
20 | #include <plat/cpu.h> | ||
21 | #include <plat/regs-irqtype.h> | ||
22 | #include <plat/gpio-cfg.h> | ||
23 | #include <plat/pm.h> | ||
24 | |||
25 | #include <mach/regs-gpio.h> | ||
26 | #include <mach/regs-clock.h> | ||
27 | |||
28 | #define eint_offset(irq) ((irq) - IRQ_EINT(0)) | ||
29 | |||
30 | static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type) | ||
31 | { | ||
32 | int offs = eint_offset(data->irq); | ||
33 | int shift; | ||
34 | u32 ctrl, mask; | ||
35 | u32 newvalue = 0; | ||
36 | |||
37 | if (offs > 15) | ||
38 | return -EINVAL; | ||
39 | |||
40 | switch (type) { | ||
41 | case IRQ_TYPE_NONE: | ||
42 | printk(KERN_WARNING "No edge setting!\n"); | ||
43 | break; | ||
44 | case IRQ_TYPE_EDGE_RISING: | ||
45 | newvalue = S3C2410_EXTINT_RISEEDGE; | ||
46 | break; | ||
47 | case IRQ_TYPE_EDGE_FALLING: | ||
48 | newvalue = S3C2410_EXTINT_FALLEDGE; | ||
49 | break; | ||
50 | case IRQ_TYPE_EDGE_BOTH: | ||
51 | newvalue = S3C2410_EXTINT_BOTHEDGE; | ||
52 | break; | ||
53 | case IRQ_TYPE_LEVEL_LOW: | ||
54 | newvalue = S3C2410_EXTINT_LOWLEV; | ||
55 | break; | ||
56 | case IRQ_TYPE_LEVEL_HIGH: | ||
57 | newvalue = S3C2410_EXTINT_HILEV; | ||
58 | break; | ||
59 | default: | ||
60 | printk(KERN_ERR "No such irq type %d", type); | ||
61 | return -EINVAL; | ||
62 | } | ||
63 | |||
64 | shift = (offs / 2) * 4; | ||
65 | mask = 0x7 << shift; | ||
66 | |||
67 | ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask; | ||
68 | ctrl |= newvalue << shift; | ||
69 | __raw_writel(ctrl, S5P64X0_EINT0CON0); | ||
70 | |||
71 | /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */ | ||
72 | if (soc_is_s5p6450()) | ||
73 | s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2)); | ||
74 | else | ||
75 | s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2)); | ||
76 | |||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * s5p64x0_irq_demux_eint | ||
82 | * | ||
83 | * This function demuxes the IRQ from the group0 external interrupts, | ||
84 | * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into | ||
85 | * the specific handlers s5p64x0_irq_demux_eintX_Y. | ||
86 | */ | ||
87 | static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end) | ||
88 | { | ||
89 | u32 status = __raw_readl(S5P64X0_EINT0PEND); | ||
90 | u32 mask = __raw_readl(S5P64X0_EINT0MASK); | ||
91 | unsigned int irq; | ||
92 | |||
93 | status &= ~mask; | ||
94 | status >>= start; | ||
95 | status &= (1 << (end - start + 1)) - 1; | ||
96 | |||
97 | for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { | ||
98 | if (status & 1) | ||
99 | generic_handle_irq(irq); | ||
100 | status >>= 1; | ||
101 | } | ||
102 | } | ||
103 | |||
104 | static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc) | ||
105 | { | ||
106 | s5p64x0_irq_demux_eint(0, 3); | ||
107 | } | ||
108 | |||
109 | static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc) | ||
110 | { | ||
111 | s5p64x0_irq_demux_eint(4, 11); | ||
112 | } | ||
113 | |||
114 | static void s5p64x0_irq_demux_eint12_15(unsigned int irq, | ||
115 | struct irq_desc *desc) | ||
116 | { | ||
117 | s5p64x0_irq_demux_eint(12, 15); | ||
118 | } | ||
119 | |||
120 | static int s5p64x0_alloc_gc(void) | ||
121 | { | ||
122 | struct irq_chip_generic *gc; | ||
123 | struct irq_chip_type *ct; | ||
124 | |||
125 | gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE, | ||
126 | S5P_VA_GPIO, handle_level_irq); | ||
127 | if (!gc) { | ||
128 | printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0" | ||
129 | "external interrupts failed\n", __func__); | ||
130 | return -EINVAL; | ||
131 | } | ||
132 | |||
133 | ct = gc->chip_types; | ||
134 | ct->chip.irq_ack = irq_gc_ack_set_bit; | ||
135 | ct->chip.irq_mask = irq_gc_mask_set_bit; | ||
136 | ct->chip.irq_unmask = irq_gc_mask_clr_bit; | ||
137 | ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; | ||
138 | ct->chip.irq_set_wake = s3c_irqext_wake; | ||
139 | ct->regs.ack = EINT0PEND_OFFSET; | ||
140 | ct->regs.mask = EINT0MASK_OFFSET; | ||
141 | irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE, | ||
142 | IRQ_NOREQUEST | IRQ_NOPROBE, 0); | ||
143 | return 0; | ||
144 | } | ||
145 | |||
146 | static int __init s5p64x0_init_irq_eint(void) | ||
147 | { | ||
148 | int ret = s5p64x0_alloc_gc(); | ||
149 | irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3); | ||
150 | irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11); | ||
151 | irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15); | ||
152 | |||
153 | return ret; | ||
154 | } | ||
155 | arch_initcall(s5p64x0_init_irq_eint); | ||
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c index c272c3f7d6de..34d98a1dae57 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6440.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c | |||
@@ -41,7 +41,6 @@ | |||
41 | 41 | ||
42 | #include <plat/regs-serial.h> | 42 | #include <plat/regs-serial.h> |
43 | #include <plat/gpio-cfg.h> | 43 | #include <plat/gpio-cfg.h> |
44 | #include <plat/s5p6440.h> | ||
45 | #include <plat/clock.h> | 44 | #include <plat/clock.h> |
46 | #include <plat/devs.h> | 45 | #include <plat/devs.h> |
47 | #include <plat/cpu.h> | 46 | #include <plat/cpu.h> |
@@ -54,6 +53,8 @@ | |||
54 | #include <plat/fb.h> | 53 | #include <plat/fb.h> |
55 | #include <plat/regs-fb.h> | 54 | #include <plat/regs-fb.h> |
56 | 55 | ||
56 | #include "common.h" | ||
57 | |||
57 | #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 58 | #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
58 | S3C2410_UCON_RXILEVEL | \ | 59 | S3C2410_UCON_RXILEVEL | \ |
59 | S3C2410_UCON_TXIRQMODE | \ | 60 | S3C2410_UCON_TXIRQMODE | \ |
@@ -202,7 +203,7 @@ static struct platform_pwm_backlight_data smdk6440_bl_data = { | |||
202 | 203 | ||
203 | static void __init smdk6440_map_io(void) | 204 | static void __init smdk6440_map_io(void) |
204 | { | 205 | { |
205 | s5p_init_io(NULL, 0, S5P64X0_SYS_ID); | 206 | s5p64x0_init_io(NULL, 0); |
206 | s3c24xx_init_clocks(12000000); | 207 | s3c24xx_init_clocks(12000000); |
207 | s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); | 208 | s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); |
208 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); | 209 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
@@ -247,4 +248,5 @@ MACHINE_START(SMDK6440, "SMDK6440") | |||
247 | .map_io = smdk6440_map_io, | 248 | .map_io = smdk6440_map_io, |
248 | .init_machine = smdk6440_machine_init, | 249 | .init_machine = smdk6440_machine_init, |
249 | .timer = &s5p_timer, | 250 | .timer = &s5p_timer, |
251 | .restart = s5p64x0_restart, | ||
250 | MACHINE_END | 252 | MACHINE_END |
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c index 7a4700959616..135cf5d84737 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c | |||
@@ -41,7 +41,6 @@ | |||
41 | 41 | ||
42 | #include <plat/regs-serial.h> | 42 | #include <plat/regs-serial.h> |
43 | #include <plat/gpio-cfg.h> | 43 | #include <plat/gpio-cfg.h> |
44 | #include <plat/s5p6450.h> | ||
45 | #include <plat/clock.h> | 44 | #include <plat/clock.h> |
46 | #include <plat/devs.h> | 45 | #include <plat/devs.h> |
47 | #include <plat/cpu.h> | 46 | #include <plat/cpu.h> |
@@ -54,6 +53,8 @@ | |||
54 | #include <plat/fb.h> | 53 | #include <plat/fb.h> |
55 | #include <plat/regs-fb.h> | 54 | #include <plat/regs-fb.h> |
56 | 55 | ||
56 | #include "common.h" | ||
57 | |||
57 | #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 58 | #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
58 | S3C2410_UCON_RXILEVEL | \ | 59 | S3C2410_UCON_RXILEVEL | \ |
59 | S3C2410_UCON_TXIRQMODE | \ | 60 | S3C2410_UCON_TXIRQMODE | \ |
@@ -222,7 +223,7 @@ static struct platform_pwm_backlight_data smdk6450_bl_data = { | |||
222 | 223 | ||
223 | static void __init smdk6450_map_io(void) | 224 | static void __init smdk6450_map_io(void) |
224 | { | 225 | { |
225 | s5p_init_io(NULL, 0, S5P64X0_SYS_ID); | 226 | s5p64x0_init_io(NULL, 0); |
226 | s3c24xx_init_clocks(19200000); | 227 | s3c24xx_init_clocks(19200000); |
227 | s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); | 228 | s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); |
228 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); | 229 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
@@ -267,4 +268,5 @@ MACHINE_START(SMDK6450, "SMDK6450") | |||
267 | .map_io = smdk6450_map_io, | 268 | .map_io = smdk6450_map_io, |
268 | .init_machine = smdk6450_machine_init, | 269 | .init_machine = smdk6450_machine_init, |
269 | .timer = &s5p_timer, | 270 | .timer = &s5p_timer, |
271 | .restart = s5p64x0_restart, | ||
270 | MACHINE_END | 272 | MACHINE_END |
diff --git a/arch/arm/mach-s5p64x0/setup-spi.c b/arch/arm/mach-s5p64x0/setup-spi.c new file mode 100644 index 000000000000..e9b841240352 --- /dev/null +++ b/arch/arm/mach-s5p64x0/setup-spi.c | |||
@@ -0,0 +1,55 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/setup-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2011 Samsung Electronics Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/gpio.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | #include <linux/io.h> | ||
14 | |||
15 | #include <plat/gpio-cfg.h> | ||
16 | #include <plat/cpu.h> | ||
17 | #include <plat/s3c64xx-spi.h> | ||
18 | |||
19 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | ||
20 | struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = { | ||
21 | .fifo_lvl_mask = 0x1ff, | ||
22 | .rx_lvl_offset = 15, | ||
23 | .tx_st_done = 25, | ||
24 | }; | ||
25 | |||
26 | int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) | ||
27 | { | ||
28 | if (soc_is_s5p6450()) | ||
29 | s3c_gpio_cfgall_range(S5P6450_GPC(0), 3, | ||
30 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
31 | else | ||
32 | s3c_gpio_cfgall_range(S5P6440_GPC(0), 3, | ||
33 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
34 | return 0; | ||
35 | } | ||
36 | #endif | ||
37 | |||
38 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | ||
39 | struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = { | ||
40 | .fifo_lvl_mask = 0x7f, | ||
41 | .rx_lvl_offset = 15, | ||
42 | .tx_st_done = 25, | ||
43 | }; | ||
44 | |||
45 | int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) | ||
46 | { | ||
47 | if (soc_is_s5p6450()) | ||
48 | s3c_gpio_cfgall_range(S5P6450_GPC(4), 3, | ||
49 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
50 | else | ||
51 | s3c_gpio_cfgall_range(S5P6440_GPC(4), 3, | ||
52 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
53 | return 0; | ||
54 | } | ||
55 | #endif | ||
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index e538a4c67e9c..75a26eaf2633 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig | |||
@@ -45,6 +45,11 @@ config S5PC100_SETUP_SDHCI_GPIO | |||
45 | help | 45 | help |
46 | Common setup code for SDHCI gpio. | 46 | Common setup code for SDHCI gpio. |
47 | 47 | ||
48 | config S5PC100_SETUP_SPI | ||
49 | bool | ||
50 | help | ||
51 | Common setup code for SPI GPIO configurations. | ||
52 | |||
48 | config MACH_SMDKC100 | 53 | config MACH_SMDKC100 |
49 | bool "SMDKC100" | 54 | bool "SMDKC100" |
50 | select CPU_S5PC100 | 55 | select CPU_S5PC100 |
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index a5e6e608b498..118c711f74e8 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile | |||
@@ -9,28 +9,24 @@ obj-m := | |||
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
11 | 11 | ||
12 | # Core support for S5PC100 system | 12 | # Core |
13 | 13 | ||
14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o | 14 | obj-y += common.o clock.o |
15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o | ||
16 | obj-$(CONFIG_CPU_S5PC100) += dma.o | ||
17 | 15 | ||
18 | # Helper and device support | 16 | obj-y += dma.o |
19 | |||
20 | obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o | ||
21 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o | ||
22 | obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o | ||
23 | obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o | ||
24 | obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o | ||
25 | obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
26 | |||
27 | # device support | ||
28 | obj-y += dev-audio.o | ||
29 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
30 | 17 | ||
31 | # machine support | 18 | # machine support |
32 | 19 | ||
33 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o | 20 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o |
34 | 21 | ||
35 | # device support | 22 | # device support |
23 | |||
36 | obj-y += dev-audio.o | 24 | obj-y += dev-audio.o |
25 | |||
26 | obj-y += setup-i2c0.o | ||
27 | obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o | ||
28 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o | ||
29 | obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o | ||
30 | obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o | ||
31 | obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
32 | obj-$(CONFIG_S5PC100_SETUP_SPI) += setup-spi.o | ||
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index 8d47709da713..247194dd366c 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c | |||
@@ -27,7 +27,8 @@ | |||
27 | #include <plat/pll.h> | 27 | #include <plat/pll.h> |
28 | #include <plat/s5p-clock.h> | 28 | #include <plat/s5p-clock.h> |
29 | #include <plat/clock-clksrc.h> | 29 | #include <plat/clock-clksrc.h> |
30 | #include <plat/s5pc100.h> | 30 | |
31 | #include "common.h" | ||
31 | 32 | ||
32 | static struct clk s5p_clk_otgphy = { | 33 | static struct clk s5p_clk_otgphy = { |
33 | .name = "otg_phy", | 34 | .name = "otg_phy", |
@@ -426,24 +427,6 @@ static struct clk init_clocks_off[] = { | |||
426 | .enable = s5pc100_d0_2_ctrl, | 427 | .enable = s5pc100_d0_2_ctrl, |
427 | .ctrlbit = (1 << 1), | 428 | .ctrlbit = (1 << 1), |
428 | }, { | 429 | }, { |
429 | .name = "hsmmc", | ||
430 | .devname = "s3c-sdhci.2", | ||
431 | .parent = &clk_div_d1_bus.clk, | ||
432 | .enable = s5pc100_d1_0_ctrl, | ||
433 | .ctrlbit = (1 << 7), | ||
434 | }, { | ||
435 | .name = "hsmmc", | ||
436 | .devname = "s3c-sdhci.1", | ||
437 | .parent = &clk_div_d1_bus.clk, | ||
438 | .enable = s5pc100_d1_0_ctrl, | ||
439 | .ctrlbit = (1 << 6), | ||
440 | }, { | ||
441 | .name = "hsmmc", | ||
442 | .devname = "s3c-sdhci.0", | ||
443 | .parent = &clk_div_d1_bus.clk, | ||
444 | .enable = s5pc100_d1_0_ctrl, | ||
445 | .ctrlbit = (1 << 5), | ||
446 | }, { | ||
447 | .name = "modemif", | 430 | .name = "modemif", |
448 | .parent = &clk_div_d1_bus.clk, | 431 | .parent = &clk_div_d1_bus.clk, |
449 | .enable = s5pc100_d1_0_ctrl, | 432 | .enable = s5pc100_d1_0_ctrl, |
@@ -673,24 +656,6 @@ static struct clk init_clocks_off[] = { | |||
673 | .enable = s5pc100_d1_5_ctrl, | 656 | .enable = s5pc100_d1_5_ctrl, |
674 | .ctrlbit = (1 << 8), | 657 | .ctrlbit = (1 << 8), |
675 | }, { | 658 | }, { |
676 | .name = "spi_48m", | ||
677 | .devname = "s3c64xx-spi.0", | ||
678 | .parent = &clk_mout_48m.clk, | ||
679 | .enable = s5pc100_sclk0_ctrl, | ||
680 | .ctrlbit = (1 << 7), | ||
681 | }, { | ||
682 | .name = "spi_48m", | ||
683 | .devname = "s3c64xx-spi.1", | ||
684 | .parent = &clk_mout_48m.clk, | ||
685 | .enable = s5pc100_sclk0_ctrl, | ||
686 | .ctrlbit = (1 << 8), | ||
687 | }, { | ||
688 | .name = "spi_48m", | ||
689 | .devname = "s3c64xx-spi.2", | ||
690 | .parent = &clk_mout_48m.clk, | ||
691 | .enable = s5pc100_sclk0_ctrl, | ||
692 | .ctrlbit = (1 << 9), | ||
693 | }, { | ||
694 | .name = "mmc_48m", | 659 | .name = "mmc_48m", |
695 | .devname = "s3c-sdhci.0", | 660 | .devname = "s3c-sdhci.0", |
696 | .parent = &clk_mout_48m.clk, | 661 | .parent = &clk_mout_48m.clk, |
@@ -711,6 +676,54 @@ static struct clk init_clocks_off[] = { | |||
711 | }, | 676 | }, |
712 | }; | 677 | }; |
713 | 678 | ||
679 | static struct clk clk_hsmmc2 = { | ||
680 | .name = "hsmmc", | ||
681 | .devname = "s3c-sdhci.2", | ||
682 | .parent = &clk_div_d1_bus.clk, | ||
683 | .enable = s5pc100_d1_0_ctrl, | ||
684 | .ctrlbit = (1 << 7), | ||
685 | }; | ||
686 | |||
687 | static struct clk clk_hsmmc1 = { | ||
688 | .name = "hsmmc", | ||
689 | .devname = "s3c-sdhci.1", | ||
690 | .parent = &clk_div_d1_bus.clk, | ||
691 | .enable = s5pc100_d1_0_ctrl, | ||
692 | .ctrlbit = (1 << 6), | ||
693 | }; | ||
694 | |||
695 | static struct clk clk_hsmmc0 = { | ||
696 | .name = "hsmmc", | ||
697 | .devname = "s3c-sdhci.0", | ||
698 | .parent = &clk_div_d1_bus.clk, | ||
699 | .enable = s5pc100_d1_0_ctrl, | ||
700 | .ctrlbit = (1 << 5), | ||
701 | }; | ||
702 | |||
703 | static struct clk clk_48m_spi0 = { | ||
704 | .name = "spi_48m", | ||
705 | .devname = "s3c64xx-spi.0", | ||
706 | .parent = &clk_mout_48m.clk, | ||
707 | .enable = s5pc100_sclk0_ctrl, | ||
708 | .ctrlbit = (1 << 7), | ||
709 | }; | ||
710 | |||
711 | static struct clk clk_48m_spi1 = { | ||
712 | .name = "spi_48m", | ||
713 | .devname = "s3c64xx-spi.1", | ||
714 | .parent = &clk_mout_48m.clk, | ||
715 | .enable = s5pc100_sclk0_ctrl, | ||
716 | .ctrlbit = (1 << 8), | ||
717 | }; | ||
718 | |||
719 | static struct clk clk_48m_spi2 = { | ||
720 | .name = "spi_48m", | ||
721 | .devname = "s3c64xx-spi.2", | ||
722 | .parent = &clk_mout_48m.clk, | ||
723 | .enable = s5pc100_sclk0_ctrl, | ||
724 | .ctrlbit = (1 << 9), | ||
725 | }; | ||
726 | |||
714 | static struct clk clk_vclk54m = { | 727 | static struct clk clk_vclk54m = { |
715 | .name = "vclk_54m", | 728 | .name = "vclk_54m", |
716 | .rate = 54000000, | 729 | .rate = 54000000, |
@@ -929,49 +942,6 @@ static struct clksrc_clk clk_sclk_spdif = { | |||
929 | static struct clksrc_clk clksrcs[] = { | 942 | static struct clksrc_clk clksrcs[] = { |
930 | { | 943 | { |
931 | .clk = { | 944 | .clk = { |
932 | .name = "sclk_spi", | ||
933 | .devname = "s3c64xx-spi.0", | ||
934 | .ctrlbit = (1 << 4), | ||
935 | .enable = s5pc100_sclk0_ctrl, | ||
936 | |||
937 | }, | ||
938 | .sources = &clk_src_group1, | ||
939 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 }, | ||
940 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, | ||
941 | }, { | ||
942 | .clk = { | ||
943 | .name = "sclk_spi", | ||
944 | .devname = "s3c64xx-spi.1", | ||
945 | .ctrlbit = (1 << 5), | ||
946 | .enable = s5pc100_sclk0_ctrl, | ||
947 | |||
948 | }, | ||
949 | .sources = &clk_src_group1, | ||
950 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 }, | ||
951 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, | ||
952 | }, { | ||
953 | .clk = { | ||
954 | .name = "sclk_spi", | ||
955 | .devname = "s3c64xx-spi.2", | ||
956 | .ctrlbit = (1 << 6), | ||
957 | .enable = s5pc100_sclk0_ctrl, | ||
958 | |||
959 | }, | ||
960 | .sources = &clk_src_group1, | ||
961 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 }, | ||
962 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 }, | ||
963 | }, { | ||
964 | .clk = { | ||
965 | .name = "uclk1", | ||
966 | .ctrlbit = (1 << 3), | ||
967 | .enable = s5pc100_sclk0_ctrl, | ||
968 | |||
969 | }, | ||
970 | .sources = &clk_src_group2, | ||
971 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 }, | ||
972 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, | ||
973 | }, { | ||
974 | .clk = { | ||
975 | .name = "sclk_mixer", | 945 | .name = "sclk_mixer", |
976 | .ctrlbit = (1 << 6), | 946 | .ctrlbit = (1 << 6), |
977 | .enable = s5pc100_sclk0_ctrl, | 947 | .enable = s5pc100_sclk0_ctrl, |
@@ -1024,39 +994,6 @@ static struct clksrc_clk clksrcs[] = { | |||
1024 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 }, | 994 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 }, |
1025 | }, { | 995 | }, { |
1026 | .clk = { | 996 | .clk = { |
1027 | .name = "sclk_mmc", | ||
1028 | .devname = "s3c-sdhci.0", | ||
1029 | .ctrlbit = (1 << 12), | ||
1030 | .enable = s5pc100_sclk1_ctrl, | ||
1031 | |||
1032 | }, | ||
1033 | .sources = &clk_src_mmc0, | ||
1034 | .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 }, | ||
1035 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, | ||
1036 | }, { | ||
1037 | .clk = { | ||
1038 | .name = "sclk_mmc", | ||
1039 | .devname = "s3c-sdhci.1", | ||
1040 | .ctrlbit = (1 << 13), | ||
1041 | .enable = s5pc100_sclk1_ctrl, | ||
1042 | |||
1043 | }, | ||
1044 | .sources = &clk_src_mmc12, | ||
1045 | .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 }, | ||
1046 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, | ||
1047 | }, { | ||
1048 | .clk = { | ||
1049 | .name = "sclk_mmc", | ||
1050 | .devname = "s3c-sdhci.2", | ||
1051 | .ctrlbit = (1 << 14), | ||
1052 | .enable = s5pc100_sclk1_ctrl, | ||
1053 | |||
1054 | }, | ||
1055 | .sources = &clk_src_mmc12, | ||
1056 | .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 }, | ||
1057 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 }, | ||
1058 | }, { | ||
1059 | .clk = { | ||
1060 | .name = "sclk_irda", | 997 | .name = "sclk_irda", |
1061 | .ctrlbit = (1 << 10), | 998 | .ctrlbit = (1 << 10), |
1062 | .enable = s5pc100_sclk0_ctrl, | 999 | .enable = s5pc100_sclk0_ctrl, |
@@ -1098,6 +1035,89 @@ static struct clksrc_clk clksrcs[] = { | |||
1098 | }, | 1035 | }, |
1099 | }; | 1036 | }; |
1100 | 1037 | ||
1038 | static struct clksrc_clk clk_sclk_uart = { | ||
1039 | .clk = { | ||
1040 | .name = "uclk1", | ||
1041 | .ctrlbit = (1 << 3), | ||
1042 | .enable = s5pc100_sclk0_ctrl, | ||
1043 | }, | ||
1044 | .sources = &clk_src_group2, | ||
1045 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 }, | ||
1046 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, | ||
1047 | }; | ||
1048 | |||
1049 | static struct clksrc_clk clk_sclk_mmc0 = { | ||
1050 | .clk = { | ||
1051 | .name = "sclk_mmc", | ||
1052 | .devname = "s3c-sdhci.0", | ||
1053 | .ctrlbit = (1 << 12), | ||
1054 | .enable = s5pc100_sclk1_ctrl, | ||
1055 | }, | ||
1056 | .sources = &clk_src_mmc0, | ||
1057 | .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 }, | ||
1058 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, | ||
1059 | }; | ||
1060 | |||
1061 | static struct clksrc_clk clk_sclk_mmc1 = { | ||
1062 | .clk = { | ||
1063 | .name = "sclk_mmc", | ||
1064 | .devname = "s3c-sdhci.1", | ||
1065 | .ctrlbit = (1 << 13), | ||
1066 | .enable = s5pc100_sclk1_ctrl, | ||
1067 | }, | ||
1068 | .sources = &clk_src_mmc12, | ||
1069 | .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 }, | ||
1070 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, | ||
1071 | }; | ||
1072 | |||
1073 | static struct clksrc_clk clk_sclk_mmc2 = { | ||
1074 | .clk = { | ||
1075 | .name = "sclk_mmc", | ||
1076 | .devname = "s3c-sdhci.2", | ||
1077 | .ctrlbit = (1 << 14), | ||
1078 | .enable = s5pc100_sclk1_ctrl, | ||
1079 | }, | ||
1080 | .sources = &clk_src_mmc12, | ||
1081 | .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 }, | ||
1082 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 }, | ||
1083 | }; | ||
1084 | |||
1085 | static struct clksrc_clk clk_sclk_spi0 = { | ||
1086 | .clk = { | ||
1087 | .name = "sclk_spi", | ||
1088 | .devname = "s3c64xx-spi.0", | ||
1089 | .ctrlbit = (1 << 4), | ||
1090 | .enable = s5pc100_sclk0_ctrl, | ||
1091 | }, | ||
1092 | .sources = &clk_src_group1, | ||
1093 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 }, | ||
1094 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, | ||
1095 | }; | ||
1096 | |||
1097 | static struct clksrc_clk clk_sclk_spi1 = { | ||
1098 | .clk = { | ||
1099 | .name = "sclk_spi", | ||
1100 | .devname = "s3c64xx-spi.1", | ||
1101 | .ctrlbit = (1 << 5), | ||
1102 | .enable = s5pc100_sclk0_ctrl, | ||
1103 | }, | ||
1104 | .sources = &clk_src_group1, | ||
1105 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 }, | ||
1106 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, | ||
1107 | }; | ||
1108 | |||
1109 | static struct clksrc_clk clk_sclk_spi2 = { | ||
1110 | .clk = { | ||
1111 | .name = "sclk_spi", | ||
1112 | .devname = "s3c64xx-spi.2", | ||
1113 | .ctrlbit = (1 << 6), | ||
1114 | .enable = s5pc100_sclk0_ctrl, | ||
1115 | }, | ||
1116 | .sources = &clk_src_group1, | ||
1117 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 }, | ||
1118 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 }, | ||
1119 | }; | ||
1120 | |||
1101 | /* Clock initialisation code */ | 1121 | /* Clock initialisation code */ |
1102 | static struct clksrc_clk *sysclks[] = { | 1122 | static struct clksrc_clk *sysclks[] = { |
1103 | &clk_mout_apll, | 1123 | &clk_mout_apll, |
@@ -1127,6 +1147,25 @@ static struct clksrc_clk *sysclks[] = { | |||
1127 | &clk_sclk_spdif, | 1147 | &clk_sclk_spdif, |
1128 | }; | 1148 | }; |
1129 | 1149 | ||
1150 | static struct clk *clk_cdev[] = { | ||
1151 | &clk_hsmmc0, | ||
1152 | &clk_hsmmc1, | ||
1153 | &clk_hsmmc2, | ||
1154 | &clk_48m_spi0, | ||
1155 | &clk_48m_spi1, | ||
1156 | &clk_48m_spi2, | ||
1157 | }; | ||
1158 | |||
1159 | static struct clksrc_clk *clksrc_cdev[] = { | ||
1160 | &clk_sclk_uart, | ||
1161 | &clk_sclk_mmc0, | ||
1162 | &clk_sclk_mmc1, | ||
1163 | &clk_sclk_mmc2, | ||
1164 | &clk_sclk_spi0, | ||
1165 | &clk_sclk_spi1, | ||
1166 | &clk_sclk_spi2, | ||
1167 | }; | ||
1168 | |||
1130 | void __init_or_cpufreq s5pc100_setup_clocks(void) | 1169 | void __init_or_cpufreq s5pc100_setup_clocks(void) |
1131 | { | 1170 | { |
1132 | unsigned long xtal; | 1171 | unsigned long xtal; |
@@ -1266,6 +1305,24 @@ static struct clk *clks[] __initdata = { | |||
1266 | &clk_pcmcdclk1, | 1305 | &clk_pcmcdclk1, |
1267 | }; | 1306 | }; |
1268 | 1307 | ||
1308 | static struct clk_lookup s5pc100_clk_lookup[] = { | ||
1309 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), | ||
1310 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uart.clk), | ||
1311 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0), | ||
1312 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1), | ||
1313 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2), | ||
1314 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | ||
1315 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | ||
1316 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | ||
1317 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | ||
1318 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_48m_spi0), | ||
1319 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_sclk_spi0.clk), | ||
1320 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_48m_spi1), | ||
1321 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk2", &clk_sclk_spi1.clk), | ||
1322 | CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk1", &clk_48m_spi2), | ||
1323 | CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk2", &clk_sclk_spi2.clk), | ||
1324 | }; | ||
1325 | |||
1269 | void __init s5pc100_register_clocks(void) | 1326 | void __init s5pc100_register_clocks(void) |
1270 | { | 1327 | { |
1271 | int ptr; | 1328 | int ptr; |
@@ -1277,9 +1334,16 @@ void __init s5pc100_register_clocks(void) | |||
1277 | 1334 | ||
1278 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1335 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1279 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1336 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1337 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) | ||
1338 | s3c_register_clksrc(clksrc_cdev[ptr], 1); | ||
1280 | 1339 | ||
1281 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1340 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1282 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1341 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1342 | clkdev_add_table(s5pc100_clk_lookup, ARRAY_SIZE(s5pc100_clk_lookup)); | ||
1343 | |||
1344 | s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); | ||
1345 | for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) | ||
1346 | s3c_disable_clocks(clk_cdev[ptr], 1); | ||
1283 | 1347 | ||
1284 | s3c24xx_register_clock(&dummy_apb_pclk); | 1348 | s3c24xx_register_clock(&dummy_apb_pclk); |
1285 | 1349 | ||
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/common.c index fd2708e7d8a9..73594a2fcf26 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/common.c | |||
@@ -1,17 +1,16 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/cpu.c | 1 | /* |
2 | * | 2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | 3 | * http://www.samsung.com |
5 | * | 4 | * |
6 | * Copyright 2009 Samsung Electronics Co. | 5 | * Copyright 2009 Samsung Electronics Co. |
7 | * Byungho Min <bhmin@samsung.com> | 6 | * Byungho Min <bhmin@samsung.com> |
8 | * | 7 | * |
9 | * Based on mach-s3c6410/cpu.c | 8 | * Common Codes for S5PC100 |
10 | * | 9 | * |
11 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
13 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
14 | */ | 13 | */ |
15 | 14 | ||
16 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
17 | #include <linux/types.h> | 16 | #include <linux/types.h> |
@@ -26,35 +25,73 @@ | |||
26 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
27 | #include <linux/sched.h> | 26 | #include <linux/sched.h> |
28 | 27 | ||
28 | #include <asm/irq.h> | ||
29 | #include <asm/proc-fns.h> | ||
29 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
30 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
31 | #include <asm/mach/irq.h> | 32 | #include <asm/mach/irq.h> |
32 | 33 | ||
33 | #include <asm/proc-fns.h> | ||
34 | |||
35 | #include <mach/hardware.h> | ||
36 | #include <mach/map.h> | 34 | #include <mach/map.h> |
37 | #include <asm/irq.h> | 35 | #include <mach/hardware.h> |
38 | |||
39 | #include <plat/regs-serial.h> | ||
40 | #include <mach/regs-clock.h> | 36 | #include <mach/regs-clock.h> |
41 | 37 | ||
42 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
43 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
44 | #include <plat/clock.h> | 40 | #include <plat/clock.h> |
45 | #include <plat/ata-core.h> | ||
46 | #include <plat/iic-core.h> | ||
47 | #include <plat/sdhci.h> | 41 | #include <plat/sdhci.h> |
48 | #include <plat/adc-core.h> | 42 | #include <plat/adc-core.h> |
49 | #include <plat/onenand-core.h> | 43 | #include <plat/ata-core.h> |
50 | #include <plat/fb-core.h> | 44 | #include <plat/fb-core.h> |
45 | #include <plat/iic-core.h> | ||
46 | #include <plat/onenand-core.h> | ||
47 | #include <plat/regs-serial.h> | ||
48 | #include <plat/watchdog-reset.h> | ||
49 | |||
50 | #include "common.h" | ||
51 | |||
52 | static const char name_s5pc100[] = "S5PC100"; | ||
51 | 53 | ||
52 | #include <plat/s5pc100.h> | 54 | static struct cpu_table cpu_ids[] __initdata = { |
55 | { | ||
56 | .idcode = S5PC100_CPU_ID, | ||
57 | .idmask = S5PC100_CPU_MASK, | ||
58 | .map_io = s5pc100_map_io, | ||
59 | .init_clocks = s5pc100_init_clocks, | ||
60 | .init_uarts = s5pc100_init_uarts, | ||
61 | .init = s5pc100_init, | ||
62 | .name = name_s5pc100, | ||
63 | }, | ||
64 | }; | ||
53 | 65 | ||
54 | /* Initial IO mappings */ | 66 | /* Initial IO mappings */ |
55 | 67 | ||
56 | static struct map_desc s5pc100_iodesc[] __initdata = { | 68 | static struct map_desc s5pc100_iodesc[] __initdata = { |
57 | { | 69 | { |
70 | .virtual = (unsigned long)S5P_VA_CHIPID, | ||
71 | .pfn = __phys_to_pfn(S5PC100_PA_CHIPID), | ||
72 | .length = SZ_4K, | ||
73 | .type = MT_DEVICE, | ||
74 | }, { | ||
75 | .virtual = (unsigned long)S3C_VA_SYS, | ||
76 | .pfn = __phys_to_pfn(S5PC100_PA_SYSCON), | ||
77 | .length = SZ_64K, | ||
78 | .type = MT_DEVICE, | ||
79 | }, { | ||
80 | .virtual = (unsigned long)S3C_VA_TIMER, | ||
81 | .pfn = __phys_to_pfn(S5PC100_PA_TIMER), | ||
82 | .length = SZ_16K, | ||
83 | .type = MT_DEVICE, | ||
84 | }, { | ||
85 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
86 | .pfn = __phys_to_pfn(S5PC100_PA_WATCHDOG), | ||
87 | .length = SZ_4K, | ||
88 | .type = MT_DEVICE, | ||
89 | }, { | ||
90 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
91 | .pfn = __phys_to_pfn(S5PC100_PA_SROMC), | ||
92 | .length = SZ_4K, | ||
93 | .type = MT_DEVICE, | ||
94 | }, { | ||
58 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | 95 | .virtual = (unsigned long)S5P_VA_SYSTIMER, |
59 | .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), | 96 | .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), |
60 | .length = SZ_16K, | 97 | .length = SZ_16K, |
@@ -100,15 +137,27 @@ static void s5pc100_idle(void) | |||
100 | local_irq_enable(); | 137 | local_irq_enable(); |
101 | } | 138 | } |
102 | 139 | ||
103 | /* s5pc100_map_io | 140 | /* |
141 | * s5pc100_map_io | ||
104 | * | 142 | * |
105 | * register the standard cpu IO areas | 143 | * register the standard CPU IO areas |
106 | */ | 144 | */ |
107 | 145 | ||
108 | void __init s5pc100_map_io(void) | 146 | void __init s5pc100_init_io(struct map_desc *mach_desc, int size) |
109 | { | 147 | { |
148 | /* initialize the io descriptors we need for initialization */ | ||
110 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); | 149 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); |
150 | if (mach_desc) | ||
151 | iotable_init(mach_desc, size); | ||
152 | |||
153 | /* detect cpu id and rev. */ | ||
154 | s5p_init_cpu(S5P_VA_CHIPID); | ||
111 | 155 | ||
156 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
157 | } | ||
158 | |||
159 | void __init s5pc100_map_io(void) | ||
160 | { | ||
112 | /* initialise device information early */ | 161 | /* initialise device information early */ |
113 | s5pc100_default_sdhci0(); | 162 | s5pc100_default_sdhci0(); |
114 | s5pc100_default_sdhci1(); | 163 | s5pc100_default_sdhci1(); |
@@ -155,7 +204,6 @@ static int __init s5pc100_core_init(void) | |||
155 | { | 204 | { |
156 | return sysdev_class_register(&s5pc100_sysclass); | 205 | return sysdev_class_register(&s5pc100_sysclass); |
157 | } | 206 | } |
158 | |||
159 | core_initcall(s5pc100_core_init); | 207 | core_initcall(s5pc100_core_init); |
160 | 208 | ||
161 | int __init s5pc100_init(void) | 209 | int __init s5pc100_init(void) |
@@ -167,3 +215,18 @@ int __init s5pc100_init(void) | |||
167 | 215 | ||
168 | return sysdev_register(&s5pc100_sysdev); | 216 | return sysdev_register(&s5pc100_sysdev); |
169 | } | 217 | } |
218 | |||
219 | /* uart registration process */ | ||
220 | |||
221 | void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
222 | { | ||
223 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
224 | } | ||
225 | |||
226 | void s5pc100_restart(char mode, const char *cmd) | ||
227 | { | ||
228 | if (mode != 's') | ||
229 | arch_wdt_reset(); | ||
230 | |||
231 | soft_restart(0); | ||
232 | } | ||
diff --git a/arch/arm/mach-s5pc100/common.h b/arch/arm/mach-s5pc100/common.h new file mode 100644 index 000000000000..9fbd3ae2b401 --- /dev/null +++ b/arch/arm/mach-s5pc100/common.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Header for S5PC100 machines | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ARCH_ARM_MACH_S5PC100_COMMON_H | ||
13 | #define __ARCH_ARM_MACH_S5PC100_COMMON_H | ||
14 | |||
15 | void s5pc100_init_io(struct map_desc *mach_desc, int size); | ||
16 | void s5pc100_init_irq(void); | ||
17 | |||
18 | void s5pc100_register_clocks(void); | ||
19 | void s5pc100_setup_clocks(void); | ||
20 | |||
21 | void s5pc100_restart(char mode, const char *cmd); | ||
22 | |||
23 | #ifdef CONFIG_CPU_S5PC100 | ||
24 | |||
25 | extern int s5pc100_init(void); | ||
26 | extern void s5pc100_map_io(void); | ||
27 | extern void s5pc100_init_clocks(int xtal); | ||
28 | extern void s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
29 | |||
30 | #else | ||
31 | #define s5pc100_init_clocks NULL | ||
32 | #define s5pc100_init_uarts NULL | ||
33 | #define s5pc100_map_io NULL | ||
34 | #define s5pc100_init NULL | ||
35 | #endif | ||
36 | |||
37 | #endif /* __ARCH_ARM_MACH_S5PC100_COMMON_H */ | ||
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c deleted file mode 100644 index e5d6c4dceb56..000000000000 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ /dev/null | |||
@@ -1,227 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/dev-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <mach/dma.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <mach/spi-clocks.h> | ||
18 | #include <mach/irqs.h> | ||
19 | |||
20 | #include <plat/s3c64xx-spi.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | #include <plat/irqs.h> | ||
23 | |||
24 | static char *spi_src_clks[] = { | ||
25 | [S5PC100_SPI_SRCCLK_PCLK] = "pclk", | ||
26 | [S5PC100_SPI_SRCCLK_48M] = "spi_48m", | ||
27 | [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus", | ||
28 | }; | ||
29 | |||
30 | /* SPI Controller platform_devices */ | ||
31 | |||
32 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
33 | * The emulated CS is toggled by board specific mechanism, as it can | ||
34 | * be either some immediate GPIO or some signal out of some other | ||
35 | * chip in between ... or some yet another way. | ||
36 | * We simply do not assume anything about CS. | ||
37 | */ | ||
38 | static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) | ||
39 | { | ||
40 | switch (pdev->id) { | ||
41 | case 0: | ||
42 | s3c_gpio_cfgall_range(S5PC100_GPB(0), 3, | ||
43 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
44 | break; | ||
45 | |||
46 | case 1: | ||
47 | s3c_gpio_cfgall_range(S5PC100_GPB(4), 3, | ||
48 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
49 | break; | ||
50 | |||
51 | case 2: | ||
52 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); | ||
53 | s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); | ||
54 | s3c_gpio_cfgall_range(S5PC100_GPB(2), 2, | ||
55 | S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); | ||
56 | break; | ||
57 | |||
58 | default: | ||
59 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
60 | return -EINVAL; | ||
61 | } | ||
62 | |||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | static struct resource s5pc100_spi0_resource[] = { | ||
67 | [0] = { | ||
68 | .start = S5PC100_PA_SPI0, | ||
69 | .end = S5PC100_PA_SPI0 + 0x100 - 1, | ||
70 | .flags = IORESOURCE_MEM, | ||
71 | }, | ||
72 | [1] = { | ||
73 | .start = DMACH_SPI0_TX, | ||
74 | .end = DMACH_SPI0_TX, | ||
75 | .flags = IORESOURCE_DMA, | ||
76 | }, | ||
77 | [2] = { | ||
78 | .start = DMACH_SPI0_RX, | ||
79 | .end = DMACH_SPI0_RX, | ||
80 | .flags = IORESOURCE_DMA, | ||
81 | }, | ||
82 | [3] = { | ||
83 | .start = IRQ_SPI0, | ||
84 | .end = IRQ_SPI0, | ||
85 | .flags = IORESOURCE_IRQ, | ||
86 | }, | ||
87 | }; | ||
88 | |||
89 | static struct s3c64xx_spi_info s5pc100_spi0_pdata = { | ||
90 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
91 | .fifo_lvl_mask = 0x7f, | ||
92 | .rx_lvl_offset = 13, | ||
93 | .high_speed = 1, | ||
94 | .tx_st_done = 21, | ||
95 | }; | ||
96 | |||
97 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
98 | |||
99 | struct platform_device s5pc100_device_spi0 = { | ||
100 | .name = "s3c64xx-spi", | ||
101 | .id = 0, | ||
102 | .num_resources = ARRAY_SIZE(s5pc100_spi0_resource), | ||
103 | .resource = s5pc100_spi0_resource, | ||
104 | .dev = { | ||
105 | .dma_mask = &spi_dmamask, | ||
106 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
107 | .platform_data = &s5pc100_spi0_pdata, | ||
108 | }, | ||
109 | }; | ||
110 | |||
111 | static struct resource s5pc100_spi1_resource[] = { | ||
112 | [0] = { | ||
113 | .start = S5PC100_PA_SPI1, | ||
114 | .end = S5PC100_PA_SPI1 + 0x100 - 1, | ||
115 | .flags = IORESOURCE_MEM, | ||
116 | }, | ||
117 | [1] = { | ||
118 | .start = DMACH_SPI1_TX, | ||
119 | .end = DMACH_SPI1_TX, | ||
120 | .flags = IORESOURCE_DMA, | ||
121 | }, | ||
122 | [2] = { | ||
123 | .start = DMACH_SPI1_RX, | ||
124 | .end = DMACH_SPI1_RX, | ||
125 | .flags = IORESOURCE_DMA, | ||
126 | }, | ||
127 | [3] = { | ||
128 | .start = IRQ_SPI1, | ||
129 | .end = IRQ_SPI1, | ||
130 | .flags = IORESOURCE_IRQ, | ||
131 | }, | ||
132 | }; | ||
133 | |||
134 | static struct s3c64xx_spi_info s5pc100_spi1_pdata = { | ||
135 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
136 | .fifo_lvl_mask = 0x7f, | ||
137 | .rx_lvl_offset = 13, | ||
138 | .high_speed = 1, | ||
139 | .tx_st_done = 21, | ||
140 | }; | ||
141 | |||
142 | struct platform_device s5pc100_device_spi1 = { | ||
143 | .name = "s3c64xx-spi", | ||
144 | .id = 1, | ||
145 | .num_resources = ARRAY_SIZE(s5pc100_spi1_resource), | ||
146 | .resource = s5pc100_spi1_resource, | ||
147 | .dev = { | ||
148 | .dma_mask = &spi_dmamask, | ||
149 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
150 | .platform_data = &s5pc100_spi1_pdata, | ||
151 | }, | ||
152 | }; | ||
153 | |||
154 | static struct resource s5pc100_spi2_resource[] = { | ||
155 | [0] = { | ||
156 | .start = S5PC100_PA_SPI2, | ||
157 | .end = S5PC100_PA_SPI2 + 0x100 - 1, | ||
158 | .flags = IORESOURCE_MEM, | ||
159 | }, | ||
160 | [1] = { | ||
161 | .start = DMACH_SPI2_TX, | ||
162 | .end = DMACH_SPI2_TX, | ||
163 | .flags = IORESOURCE_DMA, | ||
164 | }, | ||
165 | [2] = { | ||
166 | .start = DMACH_SPI2_RX, | ||
167 | .end = DMACH_SPI2_RX, | ||
168 | .flags = IORESOURCE_DMA, | ||
169 | }, | ||
170 | [3] = { | ||
171 | .start = IRQ_SPI2, | ||
172 | .end = IRQ_SPI2, | ||
173 | .flags = IORESOURCE_IRQ, | ||
174 | }, | ||
175 | }; | ||
176 | |||
177 | static struct s3c64xx_spi_info s5pc100_spi2_pdata = { | ||
178 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
179 | .fifo_lvl_mask = 0x7f, | ||
180 | .rx_lvl_offset = 13, | ||
181 | .high_speed = 1, | ||
182 | .tx_st_done = 21, | ||
183 | }; | ||
184 | |||
185 | struct platform_device s5pc100_device_spi2 = { | ||
186 | .name = "s3c64xx-spi", | ||
187 | .id = 2, | ||
188 | .num_resources = ARRAY_SIZE(s5pc100_spi2_resource), | ||
189 | .resource = s5pc100_spi2_resource, | ||
190 | .dev = { | ||
191 | .dma_mask = &spi_dmamask, | ||
192 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
193 | .platform_data = &s5pc100_spi2_pdata, | ||
194 | }, | ||
195 | }; | ||
196 | |||
197 | void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
198 | { | ||
199 | struct s3c64xx_spi_info *pd; | ||
200 | |||
201 | /* Reject invalid configuration */ | ||
202 | if (!num_cs || src_clk_nr < 0 | ||
203 | || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) { | ||
204 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
205 | return; | ||
206 | } | ||
207 | |||
208 | switch (cntrlr) { | ||
209 | case 0: | ||
210 | pd = &s5pc100_spi0_pdata; | ||
211 | break; | ||
212 | case 1: | ||
213 | pd = &s5pc100_spi1_pdata; | ||
214 | break; | ||
215 | case 2: | ||
216 | pd = &s5pc100_spi2_pdata; | ||
217 | break; | ||
218 | default: | ||
219 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
220 | __func__, cntrlr); | ||
221 | return; | ||
222 | } | ||
223 | |||
224 | pd->num_cs = num_cs; | ||
225 | pd->src_clk_nr = src_clk_nr; | ||
226 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
227 | } | ||
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c index 065a087f5a8b..c841f4d313f2 100644 --- a/arch/arm/mach-s5pc100/dma.c +++ b/arch/arm/mach-s5pc100/dma.c | |||
@@ -35,100 +35,42 @@ | |||
35 | 35 | ||
36 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 36 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
37 | 37 | ||
38 | struct dma_pl330_peri pdma0_peri[30] = { | 38 | u8 pdma0_peri[] = { |
39 | { | 39 | DMACH_UART0_RX, |
40 | .peri_id = (u8)DMACH_UART0_RX, | 40 | DMACH_UART0_TX, |
41 | .rqtype = DEVTOMEM, | 41 | DMACH_UART1_RX, |
42 | }, { | 42 | DMACH_UART1_TX, |
43 | .peri_id = (u8)DMACH_UART0_TX, | 43 | DMACH_UART2_RX, |
44 | .rqtype = MEMTODEV, | 44 | DMACH_UART2_TX, |
45 | }, { | 45 | DMACH_UART3_RX, |
46 | .peri_id = (u8)DMACH_UART1_RX, | 46 | DMACH_UART3_TX, |
47 | .rqtype = DEVTOMEM, | 47 | DMACH_IRDA, |
48 | }, { | 48 | DMACH_I2S0_RX, |
49 | .peri_id = (u8)DMACH_UART1_TX, | 49 | DMACH_I2S0_TX, |
50 | .rqtype = MEMTODEV, | 50 | DMACH_I2S0S_TX, |
51 | }, { | 51 | DMACH_I2S1_RX, |
52 | .peri_id = (u8)DMACH_UART2_RX, | 52 | DMACH_I2S1_TX, |
53 | .rqtype = DEVTOMEM, | 53 | DMACH_I2S2_RX, |
54 | }, { | 54 | DMACH_I2S2_TX, |
55 | .peri_id = (u8)DMACH_UART2_TX, | 55 | DMACH_SPI0_RX, |
56 | .rqtype = MEMTODEV, | 56 | DMACH_SPI0_TX, |
57 | }, { | 57 | DMACH_SPI1_RX, |
58 | .peri_id = (u8)DMACH_UART3_RX, | 58 | DMACH_SPI1_TX, |
59 | .rqtype = DEVTOMEM, | 59 | DMACH_SPI2_RX, |
60 | }, { | 60 | DMACH_SPI2_TX, |
61 | .peri_id = (u8)DMACH_UART3_TX, | 61 | DMACH_AC97_MICIN, |
62 | .rqtype = MEMTODEV, | 62 | DMACH_AC97_PCMIN, |
63 | }, { | 63 | DMACH_AC97_PCMOUT, |
64 | .peri_id = DMACH_IRDA, | 64 | DMACH_EXTERNAL, |
65 | }, { | 65 | DMACH_PWM, |
66 | .peri_id = (u8)DMACH_I2S0_RX, | 66 | DMACH_SPDIF, |
67 | .rqtype = DEVTOMEM, | 67 | DMACH_HSI_RX, |
68 | }, { | 68 | DMACH_HSI_TX, |
69 | .peri_id = (u8)DMACH_I2S0_TX, | ||
70 | .rqtype = MEMTODEV, | ||
71 | }, { | ||
72 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
73 | .rqtype = MEMTODEV, | ||
74 | }, { | ||
75 | .peri_id = (u8)DMACH_I2S1_RX, | ||
76 | .rqtype = DEVTOMEM, | ||
77 | }, { | ||
78 | .peri_id = (u8)DMACH_I2S1_TX, | ||
79 | .rqtype = MEMTODEV, | ||
80 | }, { | ||
81 | .peri_id = (u8)DMACH_I2S2_RX, | ||
82 | .rqtype = DEVTOMEM, | ||
83 | }, { | ||
84 | .peri_id = (u8)DMACH_I2S2_TX, | ||
85 | .rqtype = MEMTODEV, | ||
86 | }, { | ||
87 | .peri_id = (u8)DMACH_SPI0_RX, | ||
88 | .rqtype = DEVTOMEM, | ||
89 | }, { | ||
90 | .peri_id = (u8)DMACH_SPI0_TX, | ||
91 | .rqtype = MEMTODEV, | ||
92 | }, { | ||
93 | .peri_id = (u8)DMACH_SPI1_RX, | ||
94 | .rqtype = DEVTOMEM, | ||
95 | }, { | ||
96 | .peri_id = (u8)DMACH_SPI1_TX, | ||
97 | .rqtype = MEMTODEV, | ||
98 | }, { | ||
99 | .peri_id = (u8)DMACH_SPI2_RX, | ||
100 | .rqtype = DEVTOMEM, | ||
101 | }, { | ||
102 | .peri_id = (u8)DMACH_SPI2_TX, | ||
103 | .rqtype = MEMTODEV, | ||
104 | }, { | ||
105 | .peri_id = (u8)DMACH_AC97_MICIN, | ||
106 | .rqtype = DEVTOMEM, | ||
107 | }, { | ||
108 | .peri_id = (u8)DMACH_AC97_PCMIN, | ||
109 | .rqtype = DEVTOMEM, | ||
110 | }, { | ||
111 | .peri_id = (u8)DMACH_AC97_PCMOUT, | ||
112 | .rqtype = MEMTODEV, | ||
113 | }, { | ||
114 | .peri_id = (u8)DMACH_EXTERNAL, | ||
115 | }, { | ||
116 | .peri_id = (u8)DMACH_PWM, | ||
117 | }, { | ||
118 | .peri_id = (u8)DMACH_SPDIF, | ||
119 | .rqtype = MEMTODEV, | ||
120 | }, { | ||
121 | .peri_id = (u8)DMACH_HSI_RX, | ||
122 | .rqtype = DEVTOMEM, | ||
123 | }, { | ||
124 | .peri_id = (u8)DMACH_HSI_TX, | ||
125 | .rqtype = MEMTODEV, | ||
126 | }, | ||
127 | }; | 69 | }; |
128 | 70 | ||
129 | struct dma_pl330_platdata s5pc100_pdma0_pdata = { | 71 | struct dma_pl330_platdata s5pc100_pdma0_pdata = { |
130 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), | 72 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), |
131 | .peri = pdma0_peri, | 73 | .peri_id = pdma0_peri, |
132 | }; | 74 | }; |
133 | 75 | ||
134 | struct amba_device s5pc100_device_pdma0 = { | 76 | struct amba_device s5pc100_device_pdma0 = { |
@@ -147,98 +89,42 @@ struct amba_device s5pc100_device_pdma0 = { | |||
147 | .periphid = 0x00041330, | 89 | .periphid = 0x00041330, |
148 | }; | 90 | }; |
149 | 91 | ||
150 | struct dma_pl330_peri pdma1_peri[30] = { | 92 | u8 pdma1_peri[] = { |
151 | { | 93 | DMACH_UART0_RX, |
152 | .peri_id = (u8)DMACH_UART0_RX, | 94 | DMACH_UART0_TX, |
153 | .rqtype = DEVTOMEM, | 95 | DMACH_UART1_RX, |
154 | }, { | 96 | DMACH_UART1_TX, |
155 | .peri_id = (u8)DMACH_UART0_TX, | 97 | DMACH_UART2_RX, |
156 | .rqtype = MEMTODEV, | 98 | DMACH_UART2_TX, |
157 | }, { | 99 | DMACH_UART3_RX, |
158 | .peri_id = (u8)DMACH_UART1_RX, | 100 | DMACH_UART3_TX, |
159 | .rqtype = DEVTOMEM, | 101 | DMACH_IRDA, |
160 | }, { | 102 | DMACH_I2S0_RX, |
161 | .peri_id = (u8)DMACH_UART1_TX, | 103 | DMACH_I2S0_TX, |
162 | .rqtype = MEMTODEV, | 104 | DMACH_I2S0S_TX, |
163 | }, { | 105 | DMACH_I2S1_RX, |
164 | .peri_id = (u8)DMACH_UART2_RX, | 106 | DMACH_I2S1_TX, |
165 | .rqtype = DEVTOMEM, | 107 | DMACH_I2S2_RX, |
166 | }, { | 108 | DMACH_I2S2_TX, |
167 | .peri_id = (u8)DMACH_UART2_TX, | 109 | DMACH_SPI0_RX, |
168 | .rqtype = MEMTODEV, | 110 | DMACH_SPI0_TX, |
169 | }, { | 111 | DMACH_SPI1_RX, |
170 | .peri_id = (u8)DMACH_UART3_RX, | 112 | DMACH_SPI1_TX, |
171 | .rqtype = DEVTOMEM, | 113 | DMACH_SPI2_RX, |
172 | }, { | 114 | DMACH_SPI2_TX, |
173 | .peri_id = (u8)DMACH_UART3_TX, | 115 | DMACH_PCM0_RX, |
174 | .rqtype = MEMTODEV, | 116 | DMACH_PCM0_TX, |
175 | }, { | 117 | DMACH_PCM1_RX, |
176 | .peri_id = DMACH_IRDA, | 118 | DMACH_PCM1_TX, |
177 | }, { | 119 | DMACH_MSM_REQ0, |
178 | .peri_id = (u8)DMACH_I2S0_RX, | 120 | DMACH_MSM_REQ1, |
179 | .rqtype = DEVTOMEM, | 121 | DMACH_MSM_REQ2, |
180 | }, { | 122 | DMACH_MSM_REQ3, |
181 | .peri_id = (u8)DMACH_I2S0_TX, | ||
182 | .rqtype = MEMTODEV, | ||
183 | }, { | ||
184 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
185 | .rqtype = MEMTODEV, | ||
186 | }, { | ||
187 | .peri_id = (u8)DMACH_I2S1_RX, | ||
188 | .rqtype = DEVTOMEM, | ||
189 | }, { | ||
190 | .peri_id = (u8)DMACH_I2S1_TX, | ||
191 | .rqtype = MEMTODEV, | ||
192 | }, { | ||
193 | .peri_id = (u8)DMACH_I2S2_RX, | ||
194 | .rqtype = DEVTOMEM, | ||
195 | }, { | ||
196 | .peri_id = (u8)DMACH_I2S2_TX, | ||
197 | .rqtype = MEMTODEV, | ||
198 | }, { | ||
199 | .peri_id = (u8)DMACH_SPI0_RX, | ||
200 | .rqtype = DEVTOMEM, | ||
201 | }, { | ||
202 | .peri_id = (u8)DMACH_SPI0_TX, | ||
203 | .rqtype = MEMTODEV, | ||
204 | }, { | ||
205 | .peri_id = (u8)DMACH_SPI1_RX, | ||
206 | .rqtype = DEVTOMEM, | ||
207 | }, { | ||
208 | .peri_id = (u8)DMACH_SPI1_TX, | ||
209 | .rqtype = MEMTODEV, | ||
210 | }, { | ||
211 | .peri_id = (u8)DMACH_SPI2_RX, | ||
212 | .rqtype = DEVTOMEM, | ||
213 | }, { | ||
214 | .peri_id = (u8)DMACH_SPI2_TX, | ||
215 | .rqtype = MEMTODEV, | ||
216 | }, { | ||
217 | .peri_id = (u8)DMACH_PCM0_RX, | ||
218 | .rqtype = DEVTOMEM, | ||
219 | }, { | ||
220 | .peri_id = (u8)DMACH_PCM1_TX, | ||
221 | .rqtype = MEMTODEV, | ||
222 | }, { | ||
223 | .peri_id = (u8)DMACH_PCM1_RX, | ||
224 | .rqtype = DEVTOMEM, | ||
225 | }, { | ||
226 | .peri_id = (u8)DMACH_PCM1_TX, | ||
227 | .rqtype = MEMTODEV, | ||
228 | }, { | ||
229 | .peri_id = (u8)DMACH_MSM_REQ0, | ||
230 | }, { | ||
231 | .peri_id = (u8)DMACH_MSM_REQ1, | ||
232 | }, { | ||
233 | .peri_id = (u8)DMACH_MSM_REQ2, | ||
234 | }, { | ||
235 | .peri_id = (u8)DMACH_MSM_REQ3, | ||
236 | }, | ||
237 | }; | 123 | }; |
238 | 124 | ||
239 | struct dma_pl330_platdata s5pc100_pdma1_pdata = { | 125 | struct dma_pl330_platdata s5pc100_pdma1_pdata = { |
240 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), | 126 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), |
241 | .peri = pdma1_peri, | 127 | .peri_id = pdma1_peri, |
242 | }; | 128 | }; |
243 | 129 | ||
244 | struct amba_device s5pc100_device_pdma1 = { | 130 | struct amba_device s5pc100_device_pdma1 = { |
@@ -259,7 +145,12 @@ struct amba_device s5pc100_device_pdma1 = { | |||
259 | 145 | ||
260 | static int __init s5pc100_dma_init(void) | 146 | static int __init s5pc100_dma_init(void) |
261 | { | 147 | { |
148 | dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); | ||
149 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); | ||
262 | amba_device_register(&s5pc100_device_pdma0, &iomem_resource); | 150 | amba_device_register(&s5pc100_device_pdma0, &iomem_resource); |
151 | |||
152 | dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); | ||
153 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); | ||
263 | amba_device_register(&s5pc100_device_pdma1, &iomem_resource); | 154 | amba_device_register(&s5pc100_device_pdma1, &iomem_resource); |
264 | 155 | ||
265 | return 0; | 156 | return 0; |
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index d2eb4757381f..2870f12c7926 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h | |||
@@ -97,6 +97,8 @@ | |||
97 | #define IRQ_SDMFIQ S5P_IRQ_VIC2(31) | 97 | #define IRQ_SDMFIQ S5P_IRQ_VIC2(31) |
98 | #define IRQ_VIC_END S5P_IRQ_VIC2(31) | 98 | #define IRQ_VIC_END S5P_IRQ_VIC2(31) |
99 | 99 | ||
100 | #define IRQ_TIMER_BASE (11) | ||
101 | |||
100 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | 102 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) |
101 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | 103 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) |
102 | 104 | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index ccbe6b767f7d..54bc4f82e17a 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
@@ -100,6 +100,9 @@ | |||
100 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | 100 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG |
101 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | 101 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY |
102 | #define S3C_PA_WDT S5PC100_PA_WATCHDOG | 102 | #define S3C_PA_WDT S5PC100_PA_WATCHDOG |
103 | #define S3C_PA_SPI0 S5PC100_PA_SPI0 | ||
104 | #define S3C_PA_SPI1 S5PC100_PA_SPI1 | ||
105 | #define S3C_PA_SPI2 S5PC100_PA_SPI2 | ||
103 | 106 | ||
104 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID | 107 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID |
105 | #define S5P_PA_FIMC0 S5PC100_PA_FIMC0 | 108 | #define S5P_PA_FIMC0 S5PC100_PA_FIMC0 |
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index a9ea57c06600..afc96c298518 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h | |||
@@ -11,8 +11,6 @@ | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | 11 | #ifndef __ASM_ARCH_SYSTEM_H |
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 12 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
13 | 13 | ||
14 | #include <plat/system-reset.h> | ||
15 | |||
16 | static void arch_idle(void) | 14 | static void arch_idle(void) |
17 | { | 15 | { |
18 | /* nothing here yet */ | 16 | /* nothing here yet */ |
diff --git a/arch/arm/mach-s5pc100/init.c b/arch/arm/mach-s5pc100/init.c deleted file mode 100644 index 19d7b523c137..000000000000 --- a/arch/arm/mach-s5pc100/init.c +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5pc100/s5pc100-init.c | ||
2 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | ||
4 | * Byungho Min <bhmin@samsung.com> | ||
5 | * | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/types.h> | ||
14 | #include <linux/init.h> | ||
15 | |||
16 | #include <plat/cpu.h> | ||
17 | #include <plat/devs.h> | ||
18 | #include <plat/s5pc100.h> | ||
19 | |||
20 | /* uart registration process */ | ||
21 | void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
22 | { | ||
23 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
24 | } | ||
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index 93ebe3a92d10..674d22992f3c 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c | |||
@@ -43,7 +43,6 @@ | |||
43 | #include <plat/clock.h> | 43 | #include <plat/clock.h> |
44 | #include <plat/devs.h> | 44 | #include <plat/devs.h> |
45 | #include <plat/cpu.h> | 45 | #include <plat/cpu.h> |
46 | #include <plat/s5pc100.h> | ||
47 | #include <plat/fb.h> | 46 | #include <plat/fb.h> |
48 | #include <plat/iic.h> | 47 | #include <plat/iic.h> |
49 | #include <plat/ata.h> | 48 | #include <plat/ata.h> |
@@ -54,6 +53,8 @@ | |||
54 | #include <plat/backlight.h> | 53 | #include <plat/backlight.h> |
55 | #include <plat/regs-fb-v4.h> | 54 | #include <plat/regs-fb-v4.h> |
56 | 55 | ||
56 | #include "common.h" | ||
57 | |||
57 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 58 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
58 | #define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 59 | #define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
59 | S3C2410_UCON_RXILEVEL | \ | 60 | S3C2410_UCON_RXILEVEL | \ |
@@ -216,7 +217,7 @@ static struct platform_pwm_backlight_data smdkc100_bl_data = { | |||
216 | 217 | ||
217 | static void __init smdkc100_map_io(void) | 218 | static void __init smdkc100_map_io(void) |
218 | { | 219 | { |
219 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 220 | s5pc100_init_io(NULL, 0); |
220 | s3c24xx_init_clocks(12000000); | 221 | s3c24xx_init_clocks(12000000); |
221 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); | 222 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); |
222 | } | 223 | } |
@@ -255,4 +256,5 @@ MACHINE_START(SMDKC100, "SMDKC100") | |||
255 | .map_io = smdkc100_map_io, | 256 | .map_io = smdkc100_map_io, |
256 | .init_machine = smdkc100_machine_init, | 257 | .init_machine = smdkc100_machine_init, |
257 | .timer = &s3c24xx_timer, | 258 | .timer = &s3c24xx_timer, |
259 | .restart = s5pc100_restart, | ||
258 | MACHINE_END | 260 | MACHINE_END |
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c deleted file mode 100644 index 6418c6e8a7b7..000000000000 --- a/arch/arm/mach-s5pc100/setup-sdhci.c +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/setup-sdhci.c | ||
2 | * | ||
3 | * Copyright 2008 Samsung Electronics | ||
4 | * | ||
5 | * S5PC100 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
6 | * | ||
7 | * Based on mach-s3c6410/setup-sdhci.c | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | |||
16 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
17 | |||
18 | char *s5pc100_hsmmc_clksrcs[4] = { | ||
19 | [0] = "hsmmc", /* HCLK */ | ||
20 | /* [1] = "hsmmc", - duplicate HCLK entry */ | ||
21 | [2] = "sclk_mmc", /* mmc_bus */ | ||
22 | /* [3] = "48m", - note not successfully used yet */ | ||
23 | }; | ||
diff --git a/arch/arm/mach-s5pc100/setup-spi.c b/arch/arm/mach-s5pc100/setup-spi.c new file mode 100644 index 000000000000..431a6f747caa --- /dev/null +++ b/arch/arm/mach-s5pc100/setup-spi.c | |||
@@ -0,0 +1,65 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/setup-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2011 Samsung Electronics Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/gpio.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | #include <plat/gpio-cfg.h> | ||
15 | #include <plat/s3c64xx-spi.h> | ||
16 | |||
17 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | ||
18 | struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = { | ||
19 | .fifo_lvl_mask = 0x7f, | ||
20 | .rx_lvl_offset = 13, | ||
21 | .high_speed = 1, | ||
22 | .tx_st_done = 21, | ||
23 | }; | ||
24 | |||
25 | int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) | ||
26 | { | ||
27 | s3c_gpio_cfgall_range(S5PC100_GPB(0), 3, | ||
28 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
29 | return 0; | ||
30 | } | ||
31 | #endif | ||
32 | |||
33 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | ||
34 | struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = { | ||
35 | .fifo_lvl_mask = 0x7f, | ||
36 | .rx_lvl_offset = 13, | ||
37 | .high_speed = 1, | ||
38 | .tx_st_done = 21, | ||
39 | }; | ||
40 | |||
41 | int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) | ||
42 | { | ||
43 | s3c_gpio_cfgall_range(S5PC100_GPB(4), 3, | ||
44 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
45 | return 0; | ||
46 | } | ||
47 | #endif | ||
48 | |||
49 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | ||
50 | struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = { | ||
51 | .fifo_lvl_mask = 0x7f, | ||
52 | .rx_lvl_offset = 13, | ||
53 | .high_speed = 1, | ||
54 | .tx_st_done = 21, | ||
55 | }; | ||
56 | |||
57 | int s3c64xx_spi2_cfg_gpio(struct platform_device *dev) | ||
58 | { | ||
59 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); | ||
60 | s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); | ||
61 | s3c_gpio_cfgall_range(S5PC100_GPB(2), 2, | ||
62 | S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); | ||
63 | return 0; | ||
64 | } | ||
65 | #endif | ||
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 646057ab2e4c..2cdc42e838b8 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig | |||
@@ -60,6 +60,11 @@ config S5PV210_SETUP_FIMC | |||
60 | help | 60 | help |
61 | Common setup code for the camera interfaces. | 61 | Common setup code for the camera interfaces. |
62 | 62 | ||
63 | config S5PV210_SETUP_SPI | ||
64 | bool | ||
65 | help | ||
66 | Common setup code for SPI GPIO configurations. | ||
67 | |||
63 | menu "S5PC110 Machines" | 68 | menu "S5PC110 Machines" |
64 | 69 | ||
65 | config MACH_AQUILA | 70 | config MACH_AQUILA |
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 009fbe53df96..76a121dd52b4 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile | |||
@@ -10,30 +10,32 @@ obj-m := | |||
10 | obj-n := | 10 | obj-n := |
11 | obj- := | 11 | obj- := |
12 | 12 | ||
13 | # Core support for S5PV210 system | 13 | # Core |
14 | |||
15 | obj-y += common.o clock.o | ||
14 | 16 | ||
15 | obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o | ||
16 | obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o | ||
17 | obj-$(CONFIG_PM) += pm.o | 17 | obj-$(CONFIG_PM) += pm.o |
18 | 18 | ||
19 | obj-y += dma.o | ||
20 | |||
19 | # machine support | 21 | # machine support |
20 | 22 | ||
21 | obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o | 23 | obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o |
22 | obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o | ||
23 | obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o | ||
24 | obj-$(CONFIG_MACH_GONI) += mach-goni.o | 24 | obj-$(CONFIG_MACH_GONI) += mach-goni.o |
25 | obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o | ||
26 | obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o | ||
25 | obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o | 27 | obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o |
26 | 28 | ||
27 | # device support | 29 | # device support |
28 | 30 | ||
29 | obj-y += dev-audio.o | 31 | obj-y += dev-audio.o |
30 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
31 | 32 | ||
33 | obj-y += setup-i2c0.o | ||
32 | obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o | 34 | obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o |
33 | obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o | 35 | obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o |
34 | obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o | 36 | obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o |
35 | obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o | 37 | obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o |
36 | obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o | 38 | obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o |
37 | obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o | 39 | obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o |
38 | obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o | ||
39 | obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 40 | obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
41 | obj-$(CONFIG_S5PV210_SETUP_SPI) += setup-spi.o | ||
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index 4c5ac7a69e9e..11db6c0fb666 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c | |||
@@ -29,7 +29,8 @@ | |||
29 | #include <plat/pll.h> | 29 | #include <plat/pll.h> |
30 | #include <plat/s5p-clock.h> | 30 | #include <plat/s5p-clock.h> |
31 | #include <plat/clock-clksrc.h> | 31 | #include <plat/clock-clksrc.h> |
32 | #include <plat/s5pv210.h> | 32 | |
33 | #include "common.h" | ||
33 | 34 | ||
34 | static unsigned long xtal; | 35 | static unsigned long xtal; |
35 | 36 | ||
@@ -399,30 +400,6 @@ static struct clk init_clocks_off[] = { | |||
399 | .enable = s5pv210_clk_ip1_ctrl, | 400 | .enable = s5pv210_clk_ip1_ctrl, |
400 | .ctrlbit = (1<<25), | 401 | .ctrlbit = (1<<25), |
401 | }, { | 402 | }, { |
402 | .name = "hsmmc", | ||
403 | .devname = "s3c-sdhci.0", | ||
404 | .parent = &clk_hclk_psys.clk, | ||
405 | .enable = s5pv210_clk_ip2_ctrl, | ||
406 | .ctrlbit = (1<<16), | ||
407 | }, { | ||
408 | .name = "hsmmc", | ||
409 | .devname = "s3c-sdhci.1", | ||
410 | .parent = &clk_hclk_psys.clk, | ||
411 | .enable = s5pv210_clk_ip2_ctrl, | ||
412 | .ctrlbit = (1<<17), | ||
413 | }, { | ||
414 | .name = "hsmmc", | ||
415 | .devname = "s3c-sdhci.2", | ||
416 | .parent = &clk_hclk_psys.clk, | ||
417 | .enable = s5pv210_clk_ip2_ctrl, | ||
418 | .ctrlbit = (1<<18), | ||
419 | }, { | ||
420 | .name = "hsmmc", | ||
421 | .devname = "s3c-sdhci.3", | ||
422 | .parent = &clk_hclk_psys.clk, | ||
423 | .enable = s5pv210_clk_ip2_ctrl, | ||
424 | .ctrlbit = (1<<19), | ||
425 | }, { | ||
426 | .name = "systimer", | 403 | .name = "systimer", |
427 | .parent = &clk_pclk_psys.clk, | 404 | .parent = &clk_pclk_psys.clk, |
428 | .enable = s5pv210_clk_ip3_ctrl, | 405 | .enable = s5pv210_clk_ip3_ctrl, |
@@ -559,6 +536,38 @@ static struct clk init_clocks[] = { | |||
559 | }, | 536 | }, |
560 | }; | 537 | }; |
561 | 538 | ||
539 | static struct clk clk_hsmmc0 = { | ||
540 | .name = "hsmmc", | ||
541 | .devname = "s3c-sdhci.0", | ||
542 | .parent = &clk_hclk_psys.clk, | ||
543 | .enable = s5pv210_clk_ip2_ctrl, | ||
544 | .ctrlbit = (1<<16), | ||
545 | }; | ||
546 | |||
547 | static struct clk clk_hsmmc1 = { | ||
548 | .name = "hsmmc", | ||
549 | .devname = "s3c-sdhci.1", | ||
550 | .parent = &clk_hclk_psys.clk, | ||
551 | .enable = s5pv210_clk_ip2_ctrl, | ||
552 | .ctrlbit = (1<<17), | ||
553 | }; | ||
554 | |||
555 | static struct clk clk_hsmmc2 = { | ||
556 | .name = "hsmmc", | ||
557 | .devname = "s3c-sdhci.2", | ||
558 | .parent = &clk_hclk_psys.clk, | ||
559 | .enable = s5pv210_clk_ip2_ctrl, | ||
560 | .ctrlbit = (1<<18), | ||
561 | }; | ||
562 | |||
563 | static struct clk clk_hsmmc3 = { | ||
564 | .name = "hsmmc", | ||
565 | .devname = "s3c-sdhci.3", | ||
566 | .parent = &clk_hclk_psys.clk, | ||
567 | .enable = s5pv210_clk_ip2_ctrl, | ||
568 | .ctrlbit = (1<<19), | ||
569 | }; | ||
570 | |||
562 | static struct clk *clkset_uart_list[] = { | 571 | static struct clk *clkset_uart_list[] = { |
563 | [6] = &clk_mout_mpll.clk, | 572 | [6] = &clk_mout_mpll.clk, |
564 | [7] = &clk_mout_epll.clk, | 573 | [7] = &clk_mout_epll.clk, |
@@ -809,46 +818,6 @@ static struct clksrc_clk clksrcs[] = { | |||
809 | .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 }, | 818 | .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 }, |
810 | }, { | 819 | }, { |
811 | .clk = { | 820 | .clk = { |
812 | .name = "uclk1", | ||
813 | .devname = "s5pv210-uart.0", | ||
814 | .enable = s5pv210_clk_mask0_ctrl, | ||
815 | .ctrlbit = (1 << 12), | ||
816 | }, | ||
817 | .sources = &clkset_uart, | ||
818 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, | ||
819 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, | ||
820 | }, { | ||
821 | .clk = { | ||
822 | .name = "uclk1", | ||
823 | .devname = "s5pv210-uart.1", | ||
824 | .enable = s5pv210_clk_mask0_ctrl, | ||
825 | .ctrlbit = (1 << 13), | ||
826 | }, | ||
827 | .sources = &clkset_uart, | ||
828 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 }, | ||
829 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 }, | ||
830 | }, { | ||
831 | .clk = { | ||
832 | .name = "uclk1", | ||
833 | .devname = "s5pv210-uart.2", | ||
834 | .enable = s5pv210_clk_mask0_ctrl, | ||
835 | .ctrlbit = (1 << 14), | ||
836 | }, | ||
837 | .sources = &clkset_uart, | ||
838 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 }, | ||
839 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 }, | ||
840 | }, { | ||
841 | .clk = { | ||
842 | .name = "uclk1", | ||
843 | .devname = "s5pv210-uart.3", | ||
844 | .enable = s5pv210_clk_mask0_ctrl, | ||
845 | .ctrlbit = (1 << 15), | ||
846 | }, | ||
847 | .sources = &clkset_uart, | ||
848 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 }, | ||
849 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 }, | ||
850 | }, { | ||
851 | .clk = { | ||
852 | .name = "sclk_fimc", | 821 | .name = "sclk_fimc", |
853 | .devname = "s5pv210-fimc.0", | 822 | .devname = "s5pv210-fimc.0", |
854 | .enable = s5pv210_clk_mask1_ctrl, | 823 | .enable = s5pv210_clk_mask1_ctrl, |
@@ -906,46 +875,6 @@ static struct clksrc_clk clksrcs[] = { | |||
906 | .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 }, | 875 | .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 }, |
907 | }, { | 876 | }, { |
908 | .clk = { | 877 | .clk = { |
909 | .name = "sclk_mmc", | ||
910 | .devname = "s3c-sdhci.0", | ||
911 | .enable = s5pv210_clk_mask0_ctrl, | ||
912 | .ctrlbit = (1 << 8), | ||
913 | }, | ||
914 | .sources = &clkset_group2, | ||
915 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 }, | ||
916 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 }, | ||
917 | }, { | ||
918 | .clk = { | ||
919 | .name = "sclk_mmc", | ||
920 | .devname = "s3c-sdhci.1", | ||
921 | .enable = s5pv210_clk_mask0_ctrl, | ||
922 | .ctrlbit = (1 << 9), | ||
923 | }, | ||
924 | .sources = &clkset_group2, | ||
925 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 }, | ||
926 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 }, | ||
927 | }, { | ||
928 | .clk = { | ||
929 | .name = "sclk_mmc", | ||
930 | .devname = "s3c-sdhci.2", | ||
931 | .enable = s5pv210_clk_mask0_ctrl, | ||
932 | .ctrlbit = (1 << 10), | ||
933 | }, | ||
934 | .sources = &clkset_group2, | ||
935 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 }, | ||
936 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 }, | ||
937 | }, { | ||
938 | .clk = { | ||
939 | .name = "sclk_mmc", | ||
940 | .devname = "s3c-sdhci.3", | ||
941 | .enable = s5pv210_clk_mask0_ctrl, | ||
942 | .ctrlbit = (1 << 11), | ||
943 | }, | ||
944 | .sources = &clkset_group2, | ||
945 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 }, | ||
946 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 }, | ||
947 | }, { | ||
948 | .clk = { | ||
949 | .name = "sclk_mfc", | 878 | .name = "sclk_mfc", |
950 | .devname = "s5p-mfc", | 879 | .devname = "s5p-mfc", |
951 | .enable = s5pv210_clk_ip0_ctrl, | 880 | .enable = s5pv210_clk_ip0_ctrl, |
@@ -983,26 +912,6 @@ static struct clksrc_clk clksrcs[] = { | |||
983 | .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 }, | 912 | .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 }, |
984 | }, { | 913 | }, { |
985 | .clk = { | 914 | .clk = { |
986 | .name = "sclk_spi", | ||
987 | .devname = "s3c64xx-spi.0", | ||
988 | .enable = s5pv210_clk_mask0_ctrl, | ||
989 | .ctrlbit = (1 << 16), | ||
990 | }, | ||
991 | .sources = &clkset_group2, | ||
992 | .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 }, | ||
993 | .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 }, | ||
994 | }, { | ||
995 | .clk = { | ||
996 | .name = "sclk_spi", | ||
997 | .devname = "s3c64xx-spi.1", | ||
998 | .enable = s5pv210_clk_mask0_ctrl, | ||
999 | .ctrlbit = (1 << 17), | ||
1000 | }, | ||
1001 | .sources = &clkset_group2, | ||
1002 | .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 }, | ||
1003 | .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 }, | ||
1004 | }, { | ||
1005 | .clk = { | ||
1006 | .name = "sclk_pwi", | 915 | .name = "sclk_pwi", |
1007 | .enable = s5pv210_clk_mask0_ctrl, | 916 | .enable = s5pv210_clk_mask0_ctrl, |
1008 | .ctrlbit = (1 << 29), | 917 | .ctrlbit = (1 << 29), |
@@ -1022,6 +931,147 @@ static struct clksrc_clk clksrcs[] = { | |||
1022 | }, | 931 | }, |
1023 | }; | 932 | }; |
1024 | 933 | ||
934 | static struct clksrc_clk clk_sclk_uart0 = { | ||
935 | .clk = { | ||
936 | .name = "uclk1", | ||
937 | .devname = "s5pv210-uart.0", | ||
938 | .enable = s5pv210_clk_mask0_ctrl, | ||
939 | .ctrlbit = (1 << 12), | ||
940 | }, | ||
941 | .sources = &clkset_uart, | ||
942 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, | ||
943 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, | ||
944 | }; | ||
945 | |||
946 | static struct clksrc_clk clk_sclk_uart1 = { | ||
947 | .clk = { | ||
948 | .name = "uclk1", | ||
949 | .devname = "s5pv210-uart.1", | ||
950 | .enable = s5pv210_clk_mask0_ctrl, | ||
951 | .ctrlbit = (1 << 13), | ||
952 | }, | ||
953 | .sources = &clkset_uart, | ||
954 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 }, | ||
955 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 }, | ||
956 | }; | ||
957 | |||
958 | static struct clksrc_clk clk_sclk_uart2 = { | ||
959 | .clk = { | ||
960 | .name = "uclk1", | ||
961 | .devname = "s5pv210-uart.2", | ||
962 | .enable = s5pv210_clk_mask0_ctrl, | ||
963 | .ctrlbit = (1 << 14), | ||
964 | }, | ||
965 | .sources = &clkset_uart, | ||
966 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 }, | ||
967 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 }, | ||
968 | }; | ||
969 | |||
970 | static struct clksrc_clk clk_sclk_uart3 = { | ||
971 | .clk = { | ||
972 | .name = "uclk1", | ||
973 | .devname = "s5pv210-uart.3", | ||
974 | .enable = s5pv210_clk_mask0_ctrl, | ||
975 | .ctrlbit = (1 << 15), | ||
976 | }, | ||
977 | .sources = &clkset_uart, | ||
978 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 }, | ||
979 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 }, | ||
980 | }; | ||
981 | |||
982 | static struct clksrc_clk clk_sclk_mmc0 = { | ||
983 | .clk = { | ||
984 | .name = "sclk_mmc", | ||
985 | .devname = "s3c-sdhci.0", | ||
986 | .enable = s5pv210_clk_mask0_ctrl, | ||
987 | .ctrlbit = (1 << 8), | ||
988 | }, | ||
989 | .sources = &clkset_group2, | ||
990 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 }, | ||
991 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 }, | ||
992 | }; | ||
993 | |||
994 | static struct clksrc_clk clk_sclk_mmc1 = { | ||
995 | .clk = { | ||
996 | .name = "sclk_mmc", | ||
997 | .devname = "s3c-sdhci.1", | ||
998 | .enable = s5pv210_clk_mask0_ctrl, | ||
999 | .ctrlbit = (1 << 9), | ||
1000 | }, | ||
1001 | .sources = &clkset_group2, | ||
1002 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 }, | ||
1003 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 }, | ||
1004 | }; | ||
1005 | |||
1006 | static struct clksrc_clk clk_sclk_mmc2 = { | ||
1007 | .clk = { | ||
1008 | .name = "sclk_mmc", | ||
1009 | .devname = "s3c-sdhci.2", | ||
1010 | .enable = s5pv210_clk_mask0_ctrl, | ||
1011 | .ctrlbit = (1 << 10), | ||
1012 | }, | ||
1013 | .sources = &clkset_group2, | ||
1014 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 }, | ||
1015 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 }, | ||
1016 | }; | ||
1017 | |||
1018 | static struct clksrc_clk clk_sclk_mmc3 = { | ||
1019 | .clk = { | ||
1020 | .name = "sclk_mmc", | ||
1021 | .devname = "s3c-sdhci.3", | ||
1022 | .enable = s5pv210_clk_mask0_ctrl, | ||
1023 | .ctrlbit = (1 << 11), | ||
1024 | }, | ||
1025 | .sources = &clkset_group2, | ||
1026 | .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 }, | ||
1027 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 }, | ||
1028 | }; | ||
1029 | |||
1030 | static struct clksrc_clk clk_sclk_spi0 = { | ||
1031 | .clk = { | ||
1032 | .name = "sclk_spi", | ||
1033 | .devname = "s3c64xx-spi.0", | ||
1034 | .enable = s5pv210_clk_mask0_ctrl, | ||
1035 | .ctrlbit = (1 << 16), | ||
1036 | }, | ||
1037 | .sources = &clkset_group2, | ||
1038 | .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 }, | ||
1039 | .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 }, | ||
1040 | }; | ||
1041 | |||
1042 | static struct clksrc_clk clk_sclk_spi1 = { | ||
1043 | .clk = { | ||
1044 | .name = "sclk_spi", | ||
1045 | .devname = "s3c64xx-spi.1", | ||
1046 | .enable = s5pv210_clk_mask0_ctrl, | ||
1047 | .ctrlbit = (1 << 17), | ||
1048 | }, | ||
1049 | .sources = &clkset_group2, | ||
1050 | .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 }, | ||
1051 | .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 }, | ||
1052 | }; | ||
1053 | |||
1054 | |||
1055 | static struct clksrc_clk *clksrc_cdev[] = { | ||
1056 | &clk_sclk_uart0, | ||
1057 | &clk_sclk_uart1, | ||
1058 | &clk_sclk_uart2, | ||
1059 | &clk_sclk_uart3, | ||
1060 | &clk_sclk_mmc0, | ||
1061 | &clk_sclk_mmc1, | ||
1062 | &clk_sclk_mmc2, | ||
1063 | &clk_sclk_mmc3, | ||
1064 | &clk_sclk_spi0, | ||
1065 | &clk_sclk_spi1, | ||
1066 | }; | ||
1067 | |||
1068 | static struct clk *clk_cdev[] = { | ||
1069 | &clk_hsmmc0, | ||
1070 | &clk_hsmmc1, | ||
1071 | &clk_hsmmc2, | ||
1072 | &clk_hsmmc3, | ||
1073 | }; | ||
1074 | |||
1025 | /* Clock initialisation code */ | 1075 | /* Clock initialisation code */ |
1026 | static struct clksrc_clk *sysclks[] = { | 1076 | static struct clksrc_clk *sysclks[] = { |
1027 | &clk_mout_apll, | 1077 | &clk_mout_apll, |
@@ -1261,6 +1311,25 @@ static struct clk *clks[] __initdata = { | |||
1261 | &clk_pcmcdclk2, | 1311 | &clk_pcmcdclk2, |
1262 | }; | 1312 | }; |
1263 | 1313 | ||
1314 | static struct clk_lookup s5pv210_clk_lookup[] = { | ||
1315 | CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p), | ||
1316 | CLKDEV_INIT("s5pv210-uart.0", "clk_uart_baud1", &clk_sclk_uart0.clk), | ||
1317 | CLKDEV_INIT("s5pv210-uart.1", "clk_uart_baud1", &clk_sclk_uart1.clk), | ||
1318 | CLKDEV_INIT("s5pv210-uart.2", "clk_uart_baud1", &clk_sclk_uart2.clk), | ||
1319 | CLKDEV_INIT("s5pv210-uart.3", "clk_uart_baud1", &clk_sclk_uart3.clk), | ||
1320 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0), | ||
1321 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1), | ||
1322 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2), | ||
1323 | CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.0", &clk_hsmmc3), | ||
1324 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | ||
1325 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | ||
1326 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | ||
1327 | CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk), | ||
1328 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | ||
1329 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), | ||
1330 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | ||
1331 | }; | ||
1332 | |||
1264 | void __init s5pv210_register_clocks(void) | 1333 | void __init s5pv210_register_clocks(void) |
1265 | { | 1334 | { |
1266 | int ptr; | 1335 | int ptr; |
@@ -1273,11 +1342,19 @@ void __init s5pv210_register_clocks(void) | |||
1273 | for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) | 1342 | for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) |
1274 | s3c_register_clksrc(sclk_tv[ptr], 1); | 1343 | s3c_register_clksrc(sclk_tv[ptr], 1); |
1275 | 1344 | ||
1345 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) | ||
1346 | s3c_register_clksrc(clksrc_cdev[ptr], 1); | ||
1347 | |||
1276 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1348 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1277 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1349 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1278 | 1350 | ||
1279 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1351 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1280 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1352 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1353 | clkdev_add_table(s5pv210_clk_lookup, ARRAY_SIZE(s5pv210_clk_lookup)); | ||
1354 | |||
1355 | s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); | ||
1356 | for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) | ||
1357 | s3c_disable_clocks(clk_cdev[ptr], 1); | ||
1281 | 1358 | ||
1282 | s3c24xx_register_clock(&dummy_apb_pclk); | 1359 | s3c24xx_register_clock(&dummy_apb_pclk); |
1283 | s3c_pwmclk_init(); | 1360 | s3c_pwmclk_init(); |
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/common.c index 84ec74633232..b9adefd9838e 100644 --- a/arch/arm/mach-s5pv210/cpu.c +++ b/arch/arm/mach-s5pv210/common.c | |||
@@ -1,12 +1,13 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/cpu.c | 1 | /* |
2 | * | 2 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | 3 | * http://www.samsung.com |
5 | * | 4 | * |
5 | * Common Codes for S5PV210 | ||
6 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
9 | */ | 10 | */ |
10 | 11 | ||
11 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
12 | #include <linux/types.h> | 13 | #include <linux/types.h> |
@@ -21,33 +22,74 @@ | |||
21 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
22 | #include <linux/sched.h> | 23 | #include <linux/sched.h> |
23 | #include <linux/dma-mapping.h> | 24 | #include <linux/dma-mapping.h> |
25 | #include <linux/serial_core.h> | ||
24 | 26 | ||
27 | #include <asm/proc-fns.h> | ||
25 | #include <asm/mach/arch.h> | 28 | #include <asm/mach/arch.h> |
26 | #include <asm/mach/map.h> | 29 | #include <asm/mach/map.h> |
27 | #include <asm/mach/irq.h> | 30 | #include <asm/mach/irq.h> |
28 | 31 | ||
29 | #include <asm/proc-fns.h> | ||
30 | #include <mach/map.h> | 32 | #include <mach/map.h> |
31 | #include <mach/regs-clock.h> | 33 | #include <mach/regs-clock.h> |
32 | 34 | ||
33 | #include <plat/cpu.h> | 35 | #include <plat/cpu.h> |
34 | #include <plat/devs.h> | ||
35 | #include <plat/clock.h> | 36 | #include <plat/clock.h> |
36 | #include <plat/fb-core.h> | 37 | #include <plat/devs.h> |
37 | #include <plat/s5pv210.h> | 38 | #include <plat/sdhci.h> |
38 | #include <plat/adc-core.h> | 39 | #include <plat/adc-core.h> |
39 | #include <plat/ata-core.h> | 40 | #include <plat/ata-core.h> |
41 | #include <plat/fb-core.h> | ||
40 | #include <plat/fimc-core.h> | 42 | #include <plat/fimc-core.h> |
41 | #include <plat/iic-core.h> | 43 | #include <plat/iic-core.h> |
42 | #include <plat/keypad-core.h> | 44 | #include <plat/keypad-core.h> |
43 | #include <plat/sdhci.h> | ||
44 | #include <plat/reset.h> | ||
45 | #include <plat/tv-core.h> | 45 | #include <plat/tv-core.h> |
46 | #include <plat/regs-serial.h> | ||
47 | |||
48 | #include "common.h" | ||
49 | |||
50 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | ||
51 | |||
52 | static struct cpu_table cpu_ids[] __initdata = { | ||
53 | { | ||
54 | .idcode = S5PV210_CPU_ID, | ||
55 | .idmask = S5PV210_CPU_MASK, | ||
56 | .map_io = s5pv210_map_io, | ||
57 | .init_clocks = s5pv210_init_clocks, | ||
58 | .init_uarts = s5pv210_init_uarts, | ||
59 | .init = s5pv210_init, | ||
60 | .name = name_s5pv210, | ||
61 | }, | ||
62 | }; | ||
46 | 63 | ||
47 | /* Initial IO mappings */ | 64 | /* Initial IO mappings */ |
48 | 65 | ||
49 | static struct map_desc s5pv210_iodesc[] __initdata = { | 66 | static struct map_desc s5pv210_iodesc[] __initdata = { |
50 | { | 67 | { |
68 | .virtual = (unsigned long)S5P_VA_CHIPID, | ||
69 | .pfn = __phys_to_pfn(S5PV210_PA_CHIPID), | ||
70 | .length = SZ_4K, | ||
71 | .type = MT_DEVICE, | ||
72 | }, { | ||
73 | .virtual = (unsigned long)S3C_VA_SYS, | ||
74 | .pfn = __phys_to_pfn(S5PV210_PA_SYSCON), | ||
75 | .length = SZ_64K, | ||
76 | .type = MT_DEVICE, | ||
77 | }, { | ||
78 | .virtual = (unsigned long)S3C_VA_TIMER, | ||
79 | .pfn = __phys_to_pfn(S5PV210_PA_TIMER), | ||
80 | .length = SZ_16K, | ||
81 | .type = MT_DEVICE, | ||
82 | }, { | ||
83 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
84 | .pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG), | ||
85 | .length = SZ_4K, | ||
86 | .type = MT_DEVICE, | ||
87 | }, { | ||
88 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
89 | .pfn = __phys_to_pfn(S5PV210_PA_SROMC), | ||
90 | .length = SZ_4K, | ||
91 | .type = MT_DEVICE, | ||
92 | }, { | ||
51 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | 93 | .virtual = (unsigned long)S5P_VA_SYSTIMER, |
52 | .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), | 94 | .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), |
53 | .length = SZ_4K, | 95 | .length = SZ_4K, |
@@ -108,19 +150,32 @@ static void s5pv210_idle(void) | |||
108 | local_irq_enable(); | 150 | local_irq_enable(); |
109 | } | 151 | } |
110 | 152 | ||
111 | static void s5pv210_sw_reset(void) | 153 | void s5pv210_restart(char mode, const char *cmd) |
112 | { | 154 | { |
113 | __raw_writel(0x1, S5P_SWRESET); | 155 | __raw_writel(0x1, S5P_SWRESET); |
114 | } | 156 | } |
115 | 157 | ||
116 | /* s5pv210_map_io | 158 | /* |
159 | * s5pv210_map_io | ||
117 | * | 160 | * |
118 | * register the standard cpu IO areas | 161 | * register the standard cpu IO areas |
119 | */ | 162 | */ |
120 | 163 | ||
121 | void __init s5pv210_map_io(void) | 164 | void __init s5pv210_init_io(struct map_desc *mach_desc, int size) |
122 | { | 165 | { |
166 | /* initialize the io descriptors we need for initialization */ | ||
123 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); | 167 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); |
168 | if (mach_desc) | ||
169 | iotable_init(mach_desc, size); | ||
170 | |||
171 | /* detect cpu id and rev. */ | ||
172 | s5p_init_cpu(S5P_VA_CHIPID); | ||
173 | |||
174 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
175 | } | ||
176 | |||
177 | void __init s5pv210_map_io(void) | ||
178 | { | ||
124 | init_consistent_dma_size(14 << 20); | 179 | init_consistent_dma_size(14 << 20); |
125 | 180 | ||
126 | /* initialise device information early */ | 181 | /* initialise device information early */ |
@@ -186,7 +241,6 @@ static int __init s5pv210_core_init(void) | |||
186 | { | 241 | { |
187 | return sysdev_class_register(&s5pv210_sysclass); | 242 | return sysdev_class_register(&s5pv210_sysclass); |
188 | } | 243 | } |
189 | |||
190 | core_initcall(s5pv210_core_init); | 244 | core_initcall(s5pv210_core_init); |
191 | 245 | ||
192 | int __init s5pv210_init(void) | 246 | int __init s5pv210_init(void) |
@@ -196,8 +250,12 @@ int __init s5pv210_init(void) | |||
196 | /* set idle function */ | 250 | /* set idle function */ |
197 | pm_idle = s5pv210_idle; | 251 | pm_idle = s5pv210_idle; |
198 | 252 | ||
199 | /* set sw_reset function */ | ||
200 | s5p_reset_hook = s5pv210_sw_reset; | ||
201 | |||
202 | return sysdev_register(&s5pv210_sysdev); | 253 | return sysdev_register(&s5pv210_sysdev); |
203 | } | 254 | } |
255 | |||
256 | /* uart registration process */ | ||
257 | |||
258 | void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
259 | { | ||
260 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); | ||
261 | } | ||
diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h new file mode 100644 index 000000000000..6ed2af5c7518 --- /dev/null +++ b/arch/arm/mach-s5pv210/common.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Header for S5PV210 machines | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H | ||
13 | #define __ARCH_ARM_MACH_S5PV210_COMMON_H | ||
14 | |||
15 | void s5pv210_init_io(struct map_desc *mach_desc, int size); | ||
16 | void s5pv210_init_irq(void); | ||
17 | |||
18 | void s5pv210_register_clocks(void); | ||
19 | void s5pv210_setup_clocks(void); | ||
20 | |||
21 | void s5pv210_restart(char mode, const char *cmd); | ||
22 | |||
23 | #ifdef CONFIG_CPU_S5PV210 | ||
24 | |||
25 | extern int s5pv210_init(void); | ||
26 | extern void s5pv210_map_io(void); | ||
27 | extern void s5pv210_init_clocks(int xtal); | ||
28 | extern void s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
29 | |||
30 | #else | ||
31 | #define s5pv210_init_clocks NULL | ||
32 | #define s5pv210_init_uarts NULL | ||
33 | #define s5pv210_map_io NULL | ||
34 | #define s5pv210_init NULL | ||
35 | #endif | ||
36 | |||
37 | #endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */ | ||
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c deleted file mode 100644 index eaf9a7bff7a0..000000000000 --- a/arch/arm/mach-s5pv210/dev-spi.c +++ /dev/null | |||
@@ -1,175 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/dev-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <mach/dma.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <mach/irqs.h> | ||
18 | #include <mach/spi-clocks.h> | ||
19 | |||
20 | #include <plat/s3c64xx-spi.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | |||
23 | static char *spi_src_clks[] = { | ||
24 | [S5PV210_SPI_SRCCLK_PCLK] = "pclk", | ||
25 | [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi", | ||
26 | }; | ||
27 | |||
28 | /* SPI Controller platform_devices */ | ||
29 | |||
30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
32 | * be either some immediate GPIO or some signal out of some other | ||
33 | * chip in between ... or some yet another way. | ||
34 | * We simply do not assume anything about CS. | ||
35 | */ | ||
36 | static int s5pv210_spi_cfg_gpio(struct platform_device *pdev) | ||
37 | { | ||
38 | unsigned int base; | ||
39 | |||
40 | switch (pdev->id) { | ||
41 | case 0: | ||
42 | base = S5PV210_GPB(0); | ||
43 | break; | ||
44 | |||
45 | case 1: | ||
46 | base = S5PV210_GPB(4); | ||
47 | break; | ||
48 | |||
49 | default: | ||
50 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
51 | return -EINVAL; | ||
52 | } | ||
53 | |||
54 | s3c_gpio_cfgall_range(base, 3, | ||
55 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
56 | |||
57 | return 0; | ||
58 | } | ||
59 | |||
60 | static struct resource s5pv210_spi0_resource[] = { | ||
61 | [0] = { | ||
62 | .start = S5PV210_PA_SPI0, | ||
63 | .end = S5PV210_PA_SPI0 + 0x100 - 1, | ||
64 | .flags = IORESOURCE_MEM, | ||
65 | }, | ||
66 | [1] = { | ||
67 | .start = DMACH_SPI0_TX, | ||
68 | .end = DMACH_SPI0_TX, | ||
69 | .flags = IORESOURCE_DMA, | ||
70 | }, | ||
71 | [2] = { | ||
72 | .start = DMACH_SPI0_RX, | ||
73 | .end = DMACH_SPI0_RX, | ||
74 | .flags = IORESOURCE_DMA, | ||
75 | }, | ||
76 | [3] = { | ||
77 | .start = IRQ_SPI0, | ||
78 | .end = IRQ_SPI0, | ||
79 | .flags = IORESOURCE_IRQ, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | static struct s3c64xx_spi_info s5pv210_spi0_pdata = { | ||
84 | .cfg_gpio = s5pv210_spi_cfg_gpio, | ||
85 | .fifo_lvl_mask = 0x1ff, | ||
86 | .rx_lvl_offset = 15, | ||
87 | .high_speed = 1, | ||
88 | .tx_st_done = 25, | ||
89 | }; | ||
90 | |||
91 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
92 | |||
93 | struct platform_device s5pv210_device_spi0 = { | ||
94 | .name = "s3c64xx-spi", | ||
95 | .id = 0, | ||
96 | .num_resources = ARRAY_SIZE(s5pv210_spi0_resource), | ||
97 | .resource = s5pv210_spi0_resource, | ||
98 | .dev = { | ||
99 | .dma_mask = &spi_dmamask, | ||
100 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
101 | .platform_data = &s5pv210_spi0_pdata, | ||
102 | }, | ||
103 | }; | ||
104 | |||
105 | static struct resource s5pv210_spi1_resource[] = { | ||
106 | [0] = { | ||
107 | .start = S5PV210_PA_SPI1, | ||
108 | .end = S5PV210_PA_SPI1 + 0x100 - 1, | ||
109 | .flags = IORESOURCE_MEM, | ||
110 | }, | ||
111 | [1] = { | ||
112 | .start = DMACH_SPI1_TX, | ||
113 | .end = DMACH_SPI1_TX, | ||
114 | .flags = IORESOURCE_DMA, | ||
115 | }, | ||
116 | [2] = { | ||
117 | .start = DMACH_SPI1_RX, | ||
118 | .end = DMACH_SPI1_RX, | ||
119 | .flags = IORESOURCE_DMA, | ||
120 | }, | ||
121 | [3] = { | ||
122 | .start = IRQ_SPI1, | ||
123 | .end = IRQ_SPI1, | ||
124 | .flags = IORESOURCE_IRQ, | ||
125 | }, | ||
126 | }; | ||
127 | |||
128 | static struct s3c64xx_spi_info s5pv210_spi1_pdata = { | ||
129 | .cfg_gpio = s5pv210_spi_cfg_gpio, | ||
130 | .fifo_lvl_mask = 0x7f, | ||
131 | .rx_lvl_offset = 15, | ||
132 | .high_speed = 1, | ||
133 | .tx_st_done = 25, | ||
134 | }; | ||
135 | |||
136 | struct platform_device s5pv210_device_spi1 = { | ||
137 | .name = "s3c64xx-spi", | ||
138 | .id = 1, | ||
139 | .num_resources = ARRAY_SIZE(s5pv210_spi1_resource), | ||
140 | .resource = s5pv210_spi1_resource, | ||
141 | .dev = { | ||
142 | .dma_mask = &spi_dmamask, | ||
143 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
144 | .platform_data = &s5pv210_spi1_pdata, | ||
145 | }, | ||
146 | }; | ||
147 | |||
148 | void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
149 | { | ||
150 | struct s3c64xx_spi_info *pd; | ||
151 | |||
152 | /* Reject invalid configuration */ | ||
153 | if (!num_cs || src_clk_nr < 0 | ||
154 | || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) { | ||
155 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
156 | return; | ||
157 | } | ||
158 | |||
159 | switch (cntrlr) { | ||
160 | case 0: | ||
161 | pd = &s5pv210_spi0_pdata; | ||
162 | break; | ||
163 | case 1: | ||
164 | pd = &s5pv210_spi1_pdata; | ||
165 | break; | ||
166 | default: | ||
167 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
168 | __func__, cntrlr); | ||
169 | return; | ||
170 | } | ||
171 | |||
172 | pd->num_cs = num_cs; | ||
173 | pd->src_clk_nr = src_clk_nr; | ||
174 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
175 | } | ||
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c index 86b749c18b77..a6113e0267f2 100644 --- a/arch/arm/mach-s5pv210/dma.c +++ b/arch/arm/mach-s5pv210/dma.c | |||
@@ -35,90 +35,40 @@ | |||
35 | 35 | ||
36 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 36 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
37 | 37 | ||
38 | struct dma_pl330_peri pdma0_peri[28] = { | 38 | u8 pdma0_peri[] = { |
39 | { | 39 | DMACH_UART0_RX, |
40 | .peri_id = (u8)DMACH_UART0_RX, | 40 | DMACH_UART0_TX, |
41 | .rqtype = DEVTOMEM, | 41 | DMACH_UART1_RX, |
42 | }, { | 42 | DMACH_UART1_TX, |
43 | .peri_id = (u8)DMACH_UART0_TX, | 43 | DMACH_UART2_RX, |
44 | .rqtype = MEMTODEV, | 44 | DMACH_UART2_TX, |
45 | }, { | 45 | DMACH_UART3_RX, |
46 | .peri_id = (u8)DMACH_UART1_RX, | 46 | DMACH_UART3_TX, |
47 | .rqtype = DEVTOMEM, | 47 | DMACH_MAX, |
48 | }, { | 48 | DMACH_I2S0_RX, |
49 | .peri_id = (u8)DMACH_UART1_TX, | 49 | DMACH_I2S0_TX, |
50 | .rqtype = MEMTODEV, | 50 | DMACH_I2S0S_TX, |
51 | }, { | 51 | DMACH_I2S1_RX, |
52 | .peri_id = (u8)DMACH_UART2_RX, | 52 | DMACH_I2S1_TX, |
53 | .rqtype = DEVTOMEM, | 53 | DMACH_MAX, |
54 | }, { | 54 | DMACH_MAX, |
55 | .peri_id = (u8)DMACH_UART2_TX, | 55 | DMACH_SPI0_RX, |
56 | .rqtype = MEMTODEV, | 56 | DMACH_SPI0_TX, |
57 | }, { | 57 | DMACH_SPI1_RX, |
58 | .peri_id = (u8)DMACH_UART3_RX, | 58 | DMACH_SPI1_TX, |
59 | .rqtype = DEVTOMEM, | 59 | DMACH_MAX, |
60 | }, { | 60 | DMACH_MAX, |
61 | .peri_id = (u8)DMACH_UART3_TX, | 61 | DMACH_AC97_MICIN, |
62 | .rqtype = MEMTODEV, | 62 | DMACH_AC97_PCMIN, |
63 | }, { | 63 | DMACH_AC97_PCMOUT, |
64 | .peri_id = DMACH_MAX, | 64 | DMACH_MAX, |
65 | }, { | 65 | DMACH_PWM, |
66 | .peri_id = (u8)DMACH_I2S0_RX, | 66 | DMACH_SPDIF, |
67 | .rqtype = DEVTOMEM, | ||
68 | }, { | ||
69 | .peri_id = (u8)DMACH_I2S0_TX, | ||
70 | .rqtype = MEMTODEV, | ||
71 | }, { | ||
72 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
73 | .rqtype = MEMTODEV, | ||
74 | }, { | ||
75 | .peri_id = (u8)DMACH_I2S1_RX, | ||
76 | .rqtype = DEVTOMEM, | ||
77 | }, { | ||
78 | .peri_id = (u8)DMACH_I2S1_TX, | ||
79 | .rqtype = MEMTODEV, | ||
80 | }, { | ||
81 | .peri_id = (u8)DMACH_MAX, | ||
82 | }, { | ||
83 | .peri_id = (u8)DMACH_MAX, | ||
84 | }, { | ||
85 | .peri_id = (u8)DMACH_SPI0_RX, | ||
86 | .rqtype = DEVTOMEM, | ||
87 | }, { | ||
88 | .peri_id = (u8)DMACH_SPI0_TX, | ||
89 | .rqtype = MEMTODEV, | ||
90 | }, { | ||
91 | .peri_id = (u8)DMACH_SPI1_RX, | ||
92 | .rqtype = DEVTOMEM, | ||
93 | }, { | ||
94 | .peri_id = (u8)DMACH_SPI1_TX, | ||
95 | .rqtype = MEMTODEV, | ||
96 | }, { | ||
97 | .peri_id = (u8)DMACH_MAX, | ||
98 | }, { | ||
99 | .peri_id = (u8)DMACH_MAX, | ||
100 | }, { | ||
101 | .peri_id = (u8)DMACH_AC97_MICIN, | ||
102 | .rqtype = DEVTOMEM, | ||
103 | }, { | ||
104 | .peri_id = (u8)DMACH_AC97_PCMIN, | ||
105 | .rqtype = DEVTOMEM, | ||
106 | }, { | ||
107 | .peri_id = (u8)DMACH_AC97_PCMOUT, | ||
108 | .rqtype = MEMTODEV, | ||
109 | }, { | ||
110 | .peri_id = (u8)DMACH_MAX, | ||
111 | }, { | ||
112 | .peri_id = (u8)DMACH_PWM, | ||
113 | }, { | ||
114 | .peri_id = (u8)DMACH_SPDIF, | ||
115 | .rqtype = MEMTODEV, | ||
116 | }, | ||
117 | }; | 67 | }; |
118 | 68 | ||
119 | struct dma_pl330_platdata s5pv210_pdma0_pdata = { | 69 | struct dma_pl330_platdata s5pv210_pdma0_pdata = { |
120 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), | 70 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), |
121 | .peri = pdma0_peri, | 71 | .peri_id = pdma0_peri, |
122 | }; | 72 | }; |
123 | 73 | ||
124 | struct amba_device s5pv210_device_pdma0 = { | 74 | struct amba_device s5pv210_device_pdma0 = { |
@@ -137,102 +87,44 @@ struct amba_device s5pv210_device_pdma0 = { | |||
137 | .periphid = 0x00041330, | 87 | .periphid = 0x00041330, |
138 | }; | 88 | }; |
139 | 89 | ||
140 | struct dma_pl330_peri pdma1_peri[32] = { | 90 | u8 pdma1_peri[] = { |
141 | { | 91 | DMACH_UART0_RX, |
142 | .peri_id = (u8)DMACH_UART0_RX, | 92 | DMACH_UART0_TX, |
143 | .rqtype = DEVTOMEM, | 93 | DMACH_UART1_RX, |
144 | }, { | 94 | DMACH_UART1_TX, |
145 | .peri_id = (u8)DMACH_UART0_TX, | 95 | DMACH_UART2_RX, |
146 | .rqtype = MEMTODEV, | 96 | DMACH_UART2_TX, |
147 | }, { | 97 | DMACH_UART3_RX, |
148 | .peri_id = (u8)DMACH_UART1_RX, | 98 | DMACH_UART3_TX, |
149 | .rqtype = DEVTOMEM, | 99 | DMACH_MAX, |
150 | }, { | 100 | DMACH_I2S0_RX, |
151 | .peri_id = (u8)DMACH_UART1_TX, | 101 | DMACH_I2S0_TX, |
152 | .rqtype = MEMTODEV, | 102 | DMACH_I2S0S_TX, |
153 | }, { | 103 | DMACH_I2S1_RX, |
154 | .peri_id = (u8)DMACH_UART2_RX, | 104 | DMACH_I2S1_TX, |
155 | .rqtype = DEVTOMEM, | 105 | DMACH_I2S2_RX, |
156 | }, { | 106 | DMACH_I2S2_TX, |
157 | .peri_id = (u8)DMACH_UART2_TX, | 107 | DMACH_SPI0_RX, |
158 | .rqtype = MEMTODEV, | 108 | DMACH_SPI0_TX, |
159 | }, { | 109 | DMACH_SPI1_RX, |
160 | .peri_id = (u8)DMACH_UART3_RX, | 110 | DMACH_SPI1_TX, |
161 | .rqtype = DEVTOMEM, | 111 | DMACH_MAX, |
162 | }, { | 112 | DMACH_MAX, |
163 | .peri_id = (u8)DMACH_UART3_TX, | 113 | DMACH_PCM0_RX, |
164 | .rqtype = MEMTODEV, | 114 | DMACH_PCM0_TX, |
165 | }, { | 115 | DMACH_PCM1_RX, |
166 | .peri_id = DMACH_MAX, | 116 | DMACH_PCM1_TX, |
167 | }, { | 117 | DMACH_MSM_REQ0, |
168 | .peri_id = (u8)DMACH_I2S0_RX, | 118 | DMACH_MSM_REQ1, |
169 | .rqtype = DEVTOMEM, | 119 | DMACH_MSM_REQ2, |
170 | }, { | 120 | DMACH_MSM_REQ3, |
171 | .peri_id = (u8)DMACH_I2S0_TX, | 121 | DMACH_PCM2_RX, |
172 | .rqtype = MEMTODEV, | 122 | DMACH_PCM2_TX, |
173 | }, { | ||
174 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
175 | .rqtype = MEMTODEV, | ||
176 | }, { | ||
177 | .peri_id = (u8)DMACH_I2S1_RX, | ||
178 | .rqtype = DEVTOMEM, | ||
179 | }, { | ||
180 | .peri_id = (u8)DMACH_I2S1_TX, | ||
181 | .rqtype = MEMTODEV, | ||
182 | }, { | ||
183 | .peri_id = (u8)DMACH_I2S2_RX, | ||
184 | .rqtype = DEVTOMEM, | ||
185 | }, { | ||
186 | .peri_id = (u8)DMACH_I2S2_TX, | ||
187 | .rqtype = MEMTODEV, | ||
188 | }, { | ||
189 | .peri_id = (u8)DMACH_SPI0_RX, | ||
190 | .rqtype = DEVTOMEM, | ||
191 | }, { | ||
192 | .peri_id = (u8)DMACH_SPI0_TX, | ||
193 | .rqtype = MEMTODEV, | ||
194 | }, { | ||
195 | .peri_id = (u8)DMACH_SPI1_RX, | ||
196 | .rqtype = DEVTOMEM, | ||
197 | }, { | ||
198 | .peri_id = (u8)DMACH_SPI1_TX, | ||
199 | .rqtype = MEMTODEV, | ||
200 | }, { | ||
201 | .peri_id = (u8)DMACH_MAX, | ||
202 | }, { | ||
203 | .peri_id = (u8)DMACH_MAX, | ||
204 | }, { | ||
205 | .peri_id = (u8)DMACH_PCM0_RX, | ||
206 | .rqtype = DEVTOMEM, | ||
207 | }, { | ||
208 | .peri_id = (u8)DMACH_PCM0_TX, | ||
209 | .rqtype = MEMTODEV, | ||
210 | }, { | ||
211 | .peri_id = (u8)DMACH_PCM1_RX, | ||
212 | .rqtype = DEVTOMEM, | ||
213 | }, { | ||
214 | .peri_id = (u8)DMACH_PCM1_TX, | ||
215 | .rqtype = MEMTODEV, | ||
216 | }, { | ||
217 | .peri_id = (u8)DMACH_MSM_REQ0, | ||
218 | }, { | ||
219 | .peri_id = (u8)DMACH_MSM_REQ1, | ||
220 | }, { | ||
221 | .peri_id = (u8)DMACH_MSM_REQ2, | ||
222 | }, { | ||
223 | .peri_id = (u8)DMACH_MSM_REQ3, | ||
224 | }, { | ||
225 | .peri_id = (u8)DMACH_PCM2_RX, | ||
226 | .rqtype = DEVTOMEM, | ||
227 | }, { | ||
228 | .peri_id = (u8)DMACH_PCM2_TX, | ||
229 | .rqtype = MEMTODEV, | ||
230 | }, | ||
231 | }; | 123 | }; |
232 | 124 | ||
233 | struct dma_pl330_platdata s5pv210_pdma1_pdata = { | 125 | struct dma_pl330_platdata s5pv210_pdma1_pdata = { |
234 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), | 126 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), |
235 | .peri = pdma1_peri, | 127 | .peri_id = pdma1_peri, |
236 | }; | 128 | }; |
237 | 129 | ||
238 | struct amba_device s5pv210_device_pdma1 = { | 130 | struct amba_device s5pv210_device_pdma1 = { |
@@ -253,7 +145,12 @@ struct amba_device s5pv210_device_pdma1 = { | |||
253 | 145 | ||
254 | static int __init s5pv210_dma_init(void) | 146 | static int __init s5pv210_dma_init(void) |
255 | { | 147 | { |
148 | dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); | ||
149 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); | ||
256 | amba_device_register(&s5pv210_device_pdma0, &iomem_resource); | 150 | amba_device_register(&s5pv210_device_pdma0, &iomem_resource); |
151 | |||
152 | dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); | ||
153 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); | ||
257 | amba_device_register(&s5pv210_device_pdma1, &iomem_resource); | 154 | amba_device_register(&s5pv210_device_pdma1, &iomem_resource); |
258 | 155 | ||
259 | return 0; | 156 | return 0; |
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index 5e0de3a31f3d..e777e010ed2e 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h | |||
@@ -118,6 +118,8 @@ | |||
118 | #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) | 118 | #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) |
119 | #define IRQ_VIC_END S5P_IRQ_VIC3(31) | 119 | #define IRQ_VIC_END S5P_IRQ_VIC3(31) |
120 | 120 | ||
121 | #define IRQ_TIMER_BASE (11) | ||
122 | |||
121 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | 123 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) |
122 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | 124 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) |
123 | 125 | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 7ff609f1568b..89c34b8f73bf 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -109,6 +109,8 @@ | |||
109 | #define S3C_PA_RTC S5PV210_PA_RTC | 109 | #define S3C_PA_RTC S5PV210_PA_RTC |
110 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG | 110 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG |
111 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | 111 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG |
112 | #define S3C_PA_SPI0 S5PV210_PA_SPI0 | ||
113 | #define S3C_PA_SPI1 S5PV210_PA_SPI1 | ||
112 | 114 | ||
113 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID | 115 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID |
114 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 | 116 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 |
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h index af8a200b2135..bf288ced860a 100644 --- a/arch/arm/mach-s5pv210/include/mach/system.h +++ b/arch/arm/mach-s5pv210/include/mach/system.h | |||
@@ -13,8 +13,6 @@ | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | 13 | #ifndef __ASM_ARCH_SYSTEM_H |
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 14 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
15 | 15 | ||
16 | #include <plat/system-reset.h> | ||
17 | |||
18 | static void arch_idle(void) | 16 | static void arch_idle(void) |
19 | { | 17 | { |
20 | /* nothing here yet */ | 18 | /* nothing here yet */ |
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c deleted file mode 100644 index 4865ae2c475a..000000000000 --- a/arch/arm/mach-s5pv210/init.c +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/init.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/serial_core.h> | ||
15 | |||
16 | #include <plat/cpu.h> | ||
17 | #include <plat/devs.h> | ||
18 | #include <plat/s5pv210.h> | ||
19 | #include <plat/regs-serial.h> | ||
20 | |||
21 | static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = { | ||
22 | [0] = { | ||
23 | .name = "pclk", | ||
24 | .divisor = 1, | ||
25 | .min_baud = 0, | ||
26 | .max_baud = 0, | ||
27 | }, | ||
28 | }; | ||
29 | |||
30 | /* uart registration process */ | ||
31 | void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
32 | { | ||
33 | struct s3c2410_uartcfg *tcfg = cfg; | ||
34 | u32 ucnt; | ||
35 | |||
36 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | ||
37 | if (!tcfg->clocks) { | ||
38 | tcfg->clocks = s5pv210_serial_clocks; | ||
39 | tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks); | ||
40 | } | ||
41 | } | ||
42 | |||
43 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); | ||
44 | } | ||
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 71ca95604d63..5e734d025a6a 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c | |||
@@ -33,7 +33,6 @@ | |||
33 | 33 | ||
34 | #include <plat/gpio-cfg.h> | 34 | #include <plat/gpio-cfg.h> |
35 | #include <plat/regs-serial.h> | 35 | #include <plat/regs-serial.h> |
36 | #include <plat/s5pv210.h> | ||
37 | #include <plat/devs.h> | 36 | #include <plat/devs.h> |
38 | #include <plat/cpu.h> | 37 | #include <plat/cpu.h> |
39 | #include <plat/fb.h> | 38 | #include <plat/fb.h> |
@@ -42,6 +41,8 @@ | |||
42 | #include <plat/s5p-time.h> | 41 | #include <plat/s5p-time.h> |
43 | #include <plat/regs-fb-v4.h> | 42 | #include <plat/regs-fb-v4.h> |
44 | 43 | ||
44 | #include "common.h" | ||
45 | |||
45 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 46 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
46 | #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 47 | #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
47 | S3C2410_UCON_RXILEVEL | \ | 48 | S3C2410_UCON_RXILEVEL | \ |
@@ -596,8 +597,7 @@ static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = { | |||
596 | 597 | ||
597 | static void aquila_setup_sdhci(void) | 598 | static void aquila_setup_sdhci(void) |
598 | { | 599 | { |
599 | gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN"); | 600 | gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN"); |
600 | gpio_direction_output(AQUILA_EXT_FLASH_EN, 1); | ||
601 | 601 | ||
602 | s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); | 602 | s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); |
603 | s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); | 603 | s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); |
@@ -645,7 +645,7 @@ static void __init aquila_sound_init(void) | |||
645 | 645 | ||
646 | static void __init aquila_map_io(void) | 646 | static void __init aquila_map_io(void) |
647 | { | 647 | { |
648 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 648 | s5pv210_init_io(NULL, 0); |
649 | s3c24xx_init_clocks(24000000); | 649 | s3c24xx_init_clocks(24000000); |
650 | s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); | 650 | s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); |
651 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); | 651 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
@@ -685,4 +685,5 @@ MACHINE_START(AQUILA, "Aquila") | |||
685 | .map_io = aquila_map_io, | 685 | .map_io = aquila_map_io, |
686 | .init_machine = aquila_machine_init, | 686 | .init_machine = aquila_machine_init, |
687 | .timer = &s5p_timer, | 687 | .timer = &s5p_timer, |
688 | .restart = s5pv210_restart, | ||
688 | MACHINE_END | 689 | MACHINE_END |
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 448fd9ea96f2..ff9152610439 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -38,7 +38,6 @@ | |||
38 | 38 | ||
39 | #include <plat/gpio-cfg.h> | 39 | #include <plat/gpio-cfg.h> |
40 | #include <plat/regs-serial.h> | 40 | #include <plat/regs-serial.h> |
41 | #include <plat/s5pv210.h> | ||
42 | #include <plat/devs.h> | 41 | #include <plat/devs.h> |
43 | #include <plat/cpu.h> | 42 | #include <plat/cpu.h> |
44 | #include <plat/fb.h> | 43 | #include <plat/fb.h> |
@@ -55,6 +54,8 @@ | |||
55 | #include <media/s5p_fimc.h> | 54 | #include <media/s5p_fimc.h> |
56 | #include <media/noon010pc30.h> | 55 | #include <media/noon010pc30.h> |
57 | 56 | ||
57 | #include "common.h" | ||
58 | |||
58 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 59 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
59 | #define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 60 | #define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
60 | S3C2410_UCON_RXILEVEL | \ | 61 | S3C2410_UCON_RXILEVEL | \ |
@@ -228,8 +229,7 @@ static void __init goni_radio_init(void) | |||
228 | i2c1_devs[0].irq = gpio_to_irq(gpio); | 229 | i2c1_devs[0].irq = gpio_to_irq(gpio); |
229 | 230 | ||
230 | gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */ | 231 | gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */ |
231 | gpio_request(gpio, "FM_RST"); | 232 | gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "FM_RST"); |
232 | gpio_direction_output(gpio, 1); | ||
233 | } | 233 | } |
234 | 234 | ||
235 | /* TSP */ | 235 | /* TSP */ |
@@ -265,8 +265,7 @@ static void __init goni_tsp_init(void) | |||
265 | int gpio; | 265 | int gpio; |
266 | 266 | ||
267 | gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */ | 267 | gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */ |
268 | gpio_request(gpio, "TSP_LDO_ON"); | 268 | gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON"); |
269 | gpio_direction_output(gpio, 1); | ||
270 | gpio_export(gpio, 0); | 269 | gpio_export(gpio, 0); |
271 | 270 | ||
272 | gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */ | 271 | gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */ |
@@ -891,7 +890,7 @@ static void __init goni_sound_init(void) | |||
891 | 890 | ||
892 | static void __init goni_map_io(void) | 891 | static void __init goni_map_io(void) |
893 | { | 892 | { |
894 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 893 | s5pv210_init_io(NULL, 0); |
895 | s3c24xx_init_clocks(24000000); | 894 | s3c24xx_init_clocks(24000000); |
896 | s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); | 895 | s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); |
897 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); | 896 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
@@ -962,4 +961,5 @@ MACHINE_START(GONI, "GONI") | |||
962 | .init_machine = goni_machine_init, | 961 | .init_machine = goni_machine_init, |
963 | .timer = &s5p_timer, | 962 | .timer = &s5p_timer, |
964 | .reserve = &goni_reserve, | 963 | .reserve = &goni_reserve, |
964 | .restart = s5pv210_restart, | ||
965 | MACHINE_END | 965 | MACHINE_END |
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index c2531ffc720b..9405da4ae3a3 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include <mach/regs-clock.h> | 25 | #include <mach/regs-clock.h> |
26 | 26 | ||
27 | #include <plat/regs-serial.h> | 27 | #include <plat/regs-serial.h> |
28 | #include <plat/s5pv210.h> | ||
29 | #include <plat/devs.h> | 28 | #include <plat/devs.h> |
30 | #include <plat/cpu.h> | 29 | #include <plat/cpu.h> |
31 | #include <plat/ata.h> | 30 | #include <plat/ata.h> |
@@ -33,6 +32,8 @@ | |||
33 | #include <plat/pm.h> | 32 | #include <plat/pm.h> |
34 | #include <plat/s5p-time.h> | 33 | #include <plat/s5p-time.h> |
35 | 34 | ||
35 | #include "common.h" | ||
36 | |||
36 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 37 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
37 | #define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 38 | #define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
38 | S3C2410_UCON_RXILEVEL | \ | 39 | S3C2410_UCON_RXILEVEL | \ |
@@ -110,7 +111,7 @@ static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = { | |||
110 | 111 | ||
111 | static void __init smdkc110_map_io(void) | 112 | static void __init smdkc110_map_io(void) |
112 | { | 113 | { |
113 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 114 | s5pv210_init_io(NULL, 0); |
114 | s3c24xx_init_clocks(24000000); | 115 | s3c24xx_init_clocks(24000000); |
115 | s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); | 116 | s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); |
116 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); | 117 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
@@ -143,4 +144,5 @@ MACHINE_START(SMDKC110, "SMDKC110") | |||
143 | .map_io = smdkc110_map_io, | 144 | .map_io = smdkc110_map_io, |
144 | .init_machine = smdkc110_machine_init, | 145 | .init_machine = smdkc110_machine_init, |
145 | .timer = &s5p_timer, | 146 | .timer = &s5p_timer, |
147 | .restart = s5pv210_restart, | ||
146 | MACHINE_END | 148 | MACHINE_END |
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index 3ac9e57d9705..f6feef4dce65 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <plat/regs-serial.h> | 34 | #include <plat/regs-serial.h> |
35 | #include <plat/regs-srom.h> | 35 | #include <plat/regs-srom.h> |
36 | #include <plat/gpio-cfg.h> | 36 | #include <plat/gpio-cfg.h> |
37 | #include <plat/s5pv210.h> | ||
38 | #include <plat/devs.h> | 37 | #include <plat/devs.h> |
39 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
40 | #include <plat/adc.h> | 39 | #include <plat/adc.h> |
@@ -48,6 +47,8 @@ | |||
48 | #include <plat/backlight.h> | 47 | #include <plat/backlight.h> |
49 | #include <plat/regs-fb-v4.h> | 48 | #include <plat/regs-fb-v4.h> |
50 | 49 | ||
50 | #include "common.h" | ||
51 | |||
51 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 52 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
52 | #define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 53 | #define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
53 | S3C2410_UCON_RXILEVEL | \ | 54 | S3C2410_UCON_RXILEVEL | \ |
@@ -154,15 +155,12 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd, | |||
154 | { | 155 | { |
155 | if (power) { | 156 | if (power) { |
156 | #if !defined(CONFIG_BACKLIGHT_PWM) | 157 | #if !defined(CONFIG_BACKLIGHT_PWM) |
157 | gpio_request(S5PV210_GPD0(3), "GPD0"); | 158 | gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_HIGH, "GPD0"); |
158 | gpio_direction_output(S5PV210_GPD0(3), 1); | ||
159 | gpio_free(S5PV210_GPD0(3)); | 159 | gpio_free(S5PV210_GPD0(3)); |
160 | #endif | 160 | #endif |
161 | 161 | ||
162 | /* fire nRESET on power up */ | 162 | /* fire nRESET on power up */ |
163 | gpio_request(S5PV210_GPH0(6), "GPH0"); | 163 | gpio_request_one(S5PV210_GPH0(6), GPIOF_OUT_INIT_HIGH, "GPH0"); |
164 | |||
165 | gpio_direction_output(S5PV210_GPH0(6), 1); | ||
166 | 164 | ||
167 | gpio_set_value(S5PV210_GPH0(6), 0); | 165 | gpio_set_value(S5PV210_GPH0(6), 0); |
168 | mdelay(10); | 166 | mdelay(10); |
@@ -173,8 +171,7 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd, | |||
173 | gpio_free(S5PV210_GPH0(6)); | 171 | gpio_free(S5PV210_GPH0(6)); |
174 | } else { | 172 | } else { |
175 | #if !defined(CONFIG_BACKLIGHT_PWM) | 173 | #if !defined(CONFIG_BACKLIGHT_PWM) |
176 | gpio_request(S5PV210_GPD0(3), "GPD0"); | 174 | gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_LOW, "GPD0"); |
177 | gpio_direction_output(S5PV210_GPD0(3), 0); | ||
178 | gpio_free(S5PV210_GPD0(3)); | 175 | gpio_free(S5PV210_GPD0(3)); |
179 | #endif | 176 | #endif |
180 | } | 177 | } |
@@ -279,7 +276,7 @@ static struct platform_pwm_backlight_data smdkv210_bl_data = { | |||
279 | 276 | ||
280 | static void __init smdkv210_map_io(void) | 277 | static void __init smdkv210_map_io(void) |
281 | { | 278 | { |
282 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 279 | s5pv210_init_io(NULL, 0); |
283 | s3c24xx_init_clocks(24000000); | 280 | s3c24xx_init_clocks(24000000); |
284 | s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); | 281 | s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); |
285 | s5p_set_timer_source(S5P_PWM2, S5P_PWM4); | 282 | s5p_set_timer_source(S5P_PWM2, S5P_PWM4); |
@@ -321,4 +318,5 @@ MACHINE_START(SMDKV210, "SMDKV210") | |||
321 | .map_io = smdkv210_map_io, | 318 | .map_io = smdkv210_map_io, |
322 | .init_machine = smdkv210_machine_init, | 319 | .init_machine = smdkv210_machine_init, |
323 | .timer = &s5p_timer, | 320 | .timer = &s5p_timer, |
321 | .restart = s5pv210_restart, | ||
324 | MACHINE_END | 322 | MACHINE_END |
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c index df70fcb34516..74e99bc0dc9b 100644 --- a/arch/arm/mach-s5pv210/mach-torbreck.c +++ b/arch/arm/mach-s5pv210/mach-torbreck.c | |||
@@ -24,12 +24,13 @@ | |||
24 | #include <mach/regs-clock.h> | 24 | #include <mach/regs-clock.h> |
25 | 25 | ||
26 | #include <plat/regs-serial.h> | 26 | #include <plat/regs-serial.h> |
27 | #include <plat/s5pv210.h> | ||
28 | #include <plat/devs.h> | 27 | #include <plat/devs.h> |
29 | #include <plat/cpu.h> | 28 | #include <plat/cpu.h> |
30 | #include <plat/iic.h> | 29 | #include <plat/iic.h> |
31 | #include <plat/s5p-time.h> | 30 | #include <plat/s5p-time.h> |
32 | 31 | ||
32 | #include "common.h" | ||
33 | |||
33 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 34 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
34 | #define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 35 | #define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
35 | S3C2410_UCON_RXILEVEL | \ | 36 | S3C2410_UCON_RXILEVEL | \ |
@@ -103,7 +104,7 @@ static struct i2c_board_info torbreck_i2c_devs2[] __initdata = { | |||
103 | 104 | ||
104 | static void __init torbreck_map_io(void) | 105 | static void __init torbreck_map_io(void) |
105 | { | 106 | { |
106 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 107 | s5pv210_init_io(NULL, 0); |
107 | s3c24xx_init_clocks(24000000); | 108 | s3c24xx_init_clocks(24000000); |
108 | s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); | 109 | s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); |
109 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); | 110 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
@@ -132,4 +133,5 @@ MACHINE_START(TORBRECK, "TORBRECK") | |||
132 | .map_io = torbreck_map_io, | 133 | .map_io = torbreck_map_io, |
133 | .init_machine = torbreck_machine_init, | 134 | .init_machine = torbreck_machine_init, |
134 | .timer = &s5p_timer, | 135 | .timer = &s5p_timer, |
136 | .restart = s5pv210_restart, | ||
135 | MACHINE_END | 137 | MACHINE_END |
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c deleted file mode 100644 index 6b8ccc4d35fd..000000000000 --- a/arch/arm/mach-s5pv210/setup-sdhci.c +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/setup-sdhci.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | |||
15 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
16 | |||
17 | char *s5pv210_hsmmc_clksrcs[4] = { | ||
18 | [0] = "hsmmc", /* HCLK */ | ||
19 | /* [1] = "hsmmc", - duplicate HCLK entry */ | ||
20 | [2] = "sclk_mmc", /* mmc_bus */ | ||
21 | /* [3] = NULL, - reserved */ | ||
22 | }; | ||
diff --git a/arch/arm/mach-s5pv210/setup-spi.c b/arch/arm/mach-s5pv210/setup-spi.c new file mode 100644 index 000000000000..f43c5048a37d --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-spi.c | |||
@@ -0,0 +1,51 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/setup-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2011 Samsung Electronics Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/gpio.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | #include <plat/gpio-cfg.h> | ||
15 | #include <plat/s3c64xx-spi.h> | ||
16 | |||
17 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | ||
18 | struct s3c64xx_spi_info s3c64xx_spi0_pdata = { | ||
19 | .fifo_lvl_mask = 0x1ff, | ||
20 | .rx_lvl_offset = 15, | ||
21 | .high_speed = 1, | ||
22 | .tx_st_done = 25, | ||
23 | }; | ||
24 | |||
25 | int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) | ||
26 | { | ||
27 | s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2)); | ||
28 | s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP); | ||
29 | s3c_gpio_cfgall_range(S5PV210_GPB(2), 2, | ||
30 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
31 | return 0; | ||
32 | } | ||
33 | #endif | ||
34 | |||
35 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | ||
36 | struct s3c64xx_spi_info s3c64xx_spi1_pdata = { | ||
37 | .fifo_lvl_mask = 0x7f, | ||
38 | .rx_lvl_offset = 15, | ||
39 | .high_speed = 1, | ||
40 | .tx_st_done = 25, | ||
41 | }; | ||
42 | |||
43 | int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) | ||
44 | { | ||
45 | s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2)); | ||
46 | s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP); | ||
47 | s3c_gpio_cfgall_range(S5PV210_GPB(6), 2, | ||
48 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
49 | return 0; | ||
50 | } | ||
51 | #endif | ||
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 3dd133f18415..6b93e200bcac 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c | |||
@@ -455,4 +455,5 @@ MACHINE_START(ASSABET, "Intel-Assabet") | |||
455 | #ifdef CONFIG_SA1111 | 455 | #ifdef CONFIG_SA1111 |
456 | .dma_zone_size = SZ_1M, | 456 | .dma_zone_size = SZ_1M, |
457 | #endif | 457 | #endif |
458 | .restart = sa11x0_restart, | ||
458 | MACHINE_END | 459 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c index bda83e1ab078..b07a2c024cb7 100644 --- a/arch/arm/mach-sa1100/badge4.c +++ b/arch/arm/mach-sa1100/badge4.c | |||
@@ -309,4 +309,5 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4") | |||
309 | #ifdef CONFIG_SA1111 | 309 | #ifdef CONFIG_SA1111 |
310 | .dma_zone_size = SZ_1M, | 310 | .dma_zone_size = SZ_1M, |
311 | #endif | 311 | #endif |
312 | .restart = sa11x0_restart, | ||
312 | MACHINE_END | 313 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index 7f3da4b11ec9..11bb6d0b9be3 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c | |||
@@ -139,4 +139,5 @@ MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube") | |||
139 | .init_irq = cerf_init_irq, | 139 | .init_irq = cerf_init_irq, |
140 | .timer = &sa1100_timer, | 140 | .timer = &sa1100_timer, |
141 | .init_machine = cerf_init, | 141 | .init_machine = cerf_init, |
142 | .restart = sa11x0_restart, | ||
142 | MACHINE_END | 143 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index 2965cc9d424e..b9060e236def 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c | |||
@@ -387,4 +387,5 @@ MACHINE_START(COLLIE, "Sharp-Collie") | |||
387 | .init_irq = sa1100_init_irq, | 387 | .init_irq = sa1100_init_irq, |
388 | .timer = &sa1100_timer, | 388 | .timer = &sa1100_timer, |
389 | .init_machine = collie_init, | 389 | .init_machine = collie_init, |
390 | .restart = sa11x0_restart, | ||
390 | MACHINE_END | 391 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 5fa5ae1f39e1..bb10ee2cb89f 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c | |||
@@ -126,6 +126,17 @@ static void sa1100_power_off(void) | |||
126 | PMCR = PMCR_SF; | 126 | PMCR = PMCR_SF; |
127 | } | 127 | } |
128 | 128 | ||
129 | void sa11x0_restart(char mode, const char *cmd) | ||
130 | { | ||
131 | if (mode == 's') { | ||
132 | /* Jump into ROM at address 0 */ | ||
133 | soft_restart(0); | ||
134 | } else { | ||
135 | /* Use on-chip reset capability */ | ||
136 | RSRR = RSRR_SWR; | ||
137 | } | ||
138 | } | ||
139 | |||
129 | static void sa11x0_register_device(struct platform_device *dev, void *data) | 140 | static void sa11x0_register_device(struct platform_device *dev, void *data) |
130 | { | 141 | { |
131 | int err; | 142 | int err; |
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h index b7a9a601c2d1..33268cf6be36 100644 --- a/arch/arm/mach-sa1100/generic.h +++ b/arch/arm/mach-sa1100/generic.h | |||
@@ -10,6 +10,7 @@ extern struct sys_timer sa1100_timer; | |||
10 | extern void __init sa1100_map_io(void); | 10 | extern void __init sa1100_map_io(void); |
11 | extern void __init sa1100_init_irq(void); | 11 | extern void __init sa1100_init_irq(void); |
12 | extern void __init sa1100_init_gpio(void); | 12 | extern void __init sa1100_init_gpio(void); |
13 | extern void sa11x0_restart(char, const char *); | ||
13 | 14 | ||
14 | #define SET_BANK(__nr,__start,__size) \ | 15 | #define SET_BANK(__nr,__start,__size) \ |
15 | mi->bank[__nr].start = (__start), \ | 16 | mi->bank[__nr].start = (__start), \ |
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c index b30733a2b82e..1e6b3c105ba6 100644 --- a/arch/arm/mach-sa1100/h3100.c +++ b/arch/arm/mach-sa1100/h3100.c | |||
@@ -89,5 +89,6 @@ MACHINE_START(H3100, "Compaq iPAQ H3100") | |||
89 | .init_irq = sa1100_init_irq, | 89 | .init_irq = sa1100_init_irq, |
90 | .timer = &sa1100_timer, | 90 | .timer = &sa1100_timer, |
91 | .init_machine = h3100_mach_init, | 91 | .init_machine = h3100_mach_init, |
92 | .restart = sa11x0_restart, | ||
92 | MACHINE_END | 93 | MACHINE_END |
93 | 94 | ||
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index 6fd324d92389..6b58e7460ecf 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c | |||
@@ -130,5 +130,6 @@ MACHINE_START(H3600, "Compaq iPAQ H3600") | |||
130 | .init_irq = sa1100_init_irq, | 130 | .init_irq = sa1100_init_irq, |
131 | .timer = &sa1100_timer, | 131 | .timer = &sa1100_timer, |
132 | .init_machine = h3600_mach_init, | 132 | .init_machine = h3600_mach_init, |
133 | .restart = sa11x0_restart, | ||
133 | MACHINE_END | 134 | MACHINE_END |
134 | 135 | ||
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c index 30f4a551b8e5..c01bb36db940 100644 --- a/arch/arm/mach-sa1100/hackkit.c +++ b/arch/arm/mach-sa1100/hackkit.c | |||
@@ -200,4 +200,5 @@ MACHINE_START(HACKKIT, "HackKit Cpu Board") | |||
200 | .init_irq = sa1100_init_irq, | 200 | .init_irq = sa1100_init_irq, |
201 | .timer = &sa1100_timer, | 201 | .timer = &sa1100_timer, |
202 | .init_machine = hackkit_init, | 202 | .init_machine = hackkit_init, |
203 | .restart = sa11x0_restart, | ||
203 | MACHINE_END | 204 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h index 345d35b7450c..e17b208f76d4 100644 --- a/arch/arm/mach-sa1100/include/mach/system.h +++ b/arch/arm/mach-sa1100/include/mach/system.h | |||
@@ -3,20 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> | 4 | * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> |
5 | */ | 5 | */ |
6 | #include <mach/hardware.h> | ||
7 | |||
8 | static inline void arch_idle(void) | 6 | static inline void arch_idle(void) |
9 | { | 7 | { |
10 | cpu_do_idle(); | 8 | cpu_do_idle(); |
11 | } | 9 | } |
12 | |||
13 | static inline void arch_reset(char mode, const char *cmd) | ||
14 | { | ||
15 | if (mode == 's') { | ||
16 | /* Jump into ROM at address 0 */ | ||
17 | soft_restart(0); | ||
18 | } else { | ||
19 | /* Use on-chip reset capability */ | ||
20 | RSRR = RSRR_SWR; | ||
21 | } | ||
22 | } | ||
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 77198fe02bc5..ee121d6f0480 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c | |||
@@ -373,4 +373,5 @@ MACHINE_START(JORNADA720, "HP Jornada 720") | |||
373 | #ifdef CONFIG_SA1111 | 373 | #ifdef CONFIG_SA1111 |
374 | .dma_zone_size = SZ_1M, | 374 | .dma_zone_size = SZ_1M, |
375 | #endif | 375 | #endif |
376 | .restart = sa11x0_restart, | ||
376 | MACHINE_END | 377 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c index 5bc59d0947ba..af4e2761f3db 100644 --- a/arch/arm/mach-sa1100/lart.c +++ b/arch/arm/mach-sa1100/lart.c | |||
@@ -66,4 +66,5 @@ MACHINE_START(LART, "LART") | |||
66 | .init_irq = sa1100_init_irq, | 66 | .init_irq = sa1100_init_irq, |
67 | .init_machine = lart_init, | 67 | .init_machine = lart_init, |
68 | .timer = &sa1100_timer, | 68 | .timer = &sa1100_timer, |
69 | .restart = sa11x0_restart, | ||
69 | MACHINE_END | 70 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c index 032f3881d145..85f6ee672225 100644 --- a/arch/arm/mach-sa1100/nanoengine.c +++ b/arch/arm/mach-sa1100/nanoengine.c | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
21 | #include <asm/setup.h> | 21 | #include <asm/setup.h> |
22 | #include <asm/page.h> | ||
22 | 23 | ||
23 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
24 | #include <asm/mach/flash.h> | 25 | #include <asm/mach/flash.h> |
@@ -116,4 +117,5 @@ MACHINE_START(NANOENGINE, "BSE nanoEngine") | |||
116 | .init_irq = sa1100_init_irq, | 117 | .init_irq = sa1100_init_irq, |
117 | .timer = &sa1100_timer, | 118 | .timer = &sa1100_timer, |
118 | .init_machine = nanoengine_init, | 119 | .init_machine = nanoengine_init, |
120 | .restart = sa11x0_restart, | ||
119 | MACHINE_END | 121 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index 65161f2bea29..9307df053533 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c | |||
@@ -150,4 +150,5 @@ MACHINE_START(PLEB, "PLEB") | |||
150 | .init_irq = sa1100_init_irq, | 150 | .init_irq = sa1100_init_irq, |
151 | .timer = &sa1100_timer, | 151 | .timer = &sa1100_timer, |
152 | .init_machine = pleb_init, | 152 | .init_machine = pleb_init, |
153 | .restart = sa11x0_restart, | ||
153 | MACHINE_END | 154 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c index 1cccbf5b9e9a..318b2b766a0b 100644 --- a/arch/arm/mach-sa1100/shannon.c +++ b/arch/arm/mach-sa1100/shannon.c | |||
@@ -87,4 +87,5 @@ MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)") | |||
87 | .init_irq = sa1100_init_irq, | 87 | .init_irq = sa1100_init_irq, |
88 | .timer = &sa1100_timer, | 88 | .timer = &sa1100_timer, |
89 | .init_machine = shannon_init, | 89 | .init_machine = shannon_init, |
90 | .restart = sa11x0_restart, | ||
90 | MACHINE_END | 91 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 4790f3f3d008..e17c04d6e324 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c | |||
@@ -396,4 +396,5 @@ MACHINE_START(SIMPAD, "Simpad") | |||
396 | .map_io = simpad_map_io, | 396 | .map_io = simpad_map_io, |
397 | .init_irq = sa1100_init_irq, | 397 | .init_irq = sa1100_init_irq, |
398 | .timer = &sa1100_timer, | 398 | .timer = &sa1100_timer, |
399 | .restart = sa11x0_restart, | ||
399 | MACHINE_END | 400 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index fa6602491d54..69e33535dee6 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -12,7 +12,6 @@ | |||
12 | #include <linux/errno.h> | 12 | #include <linux/errno.h> |
13 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
14 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
15 | #include <linux/sched.h> /* just for sched_clock() - funny that */ | ||
16 | #include <linux/timex.h> | 15 | #include <linux/timex.h> |
17 | #include <linux/clockchips.h> | 16 | #include <linux/clockchips.h> |
18 | 17 | ||
@@ -20,29 +19,9 @@ | |||
20 | #include <asm/sched_clock.h> | 19 | #include <asm/sched_clock.h> |
21 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
22 | 21 | ||
23 | /* | 22 | static u32 notrace sa1100_read_sched_clock(void) |
24 | * This is the SA11x0 sched_clock implementation. | ||
25 | */ | ||
26 | static DEFINE_CLOCK_DATA(cd); | ||
27 | |||
28 | /* | ||
29 | * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz, | ||
30 | * NSEC_PER_SEC, 60). | ||
31 | * This gives a resolution of about 271ns and a wrap period of about 19min. | ||
32 | */ | ||
33 | #define SC_MULT 2275555556u | ||
34 | #define SC_SHIFT 23 | ||
35 | |||
36 | unsigned long long notrace sched_clock(void) | ||
37 | { | ||
38 | u32 cyc = OSCR; | ||
39 | return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); | ||
40 | } | ||
41 | |||
42 | static void notrace sa1100_update_sched_clock(void) | ||
43 | { | 23 | { |
44 | u32 cyc = OSCR; | 24 | return OSCR; |
45 | update_sched_clock(&cd, cyc, (u32)~0); | ||
46 | } | 25 | } |
47 | 26 | ||
48 | #define MIN_OSCR_DELTA 2 | 27 | #define MIN_OSCR_DELTA 2 |
@@ -109,8 +88,7 @@ static void __init sa1100_timer_init(void) | |||
109 | OIER = 0; | 88 | OIER = 0; |
110 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; | 89 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; |
111 | 90 | ||
112 | init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32, | 91 | setup_sched_clock(sa1100_read_sched_clock, 32, 3686400); |
113 | 3686400, SC_MULT, SC_SHIFT); | ||
114 | 92 | ||
115 | clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4); | 93 | clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4); |
116 | ckevt_sa1100_osmr0.max_delta_ns = | 94 | ckevt_sa1100_osmr0.max_delta_ns = |
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index f4b25d875f3d..a851c254ad6c 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c | |||
@@ -26,7 +26,7 @@ | |||
26 | #define ROMCARD_SIZE 0x08000000 | 26 | #define ROMCARD_SIZE 0x08000000 |
27 | #define ROMCARD_START 0x10000000 | 27 | #define ROMCARD_START 0x10000000 |
28 | 28 | ||
29 | void arch_reset(char mode, const char *cmd) | 29 | static void shark_restart(char mode, const char *cmd) |
30 | { | 30 | { |
31 | short temp; | 31 | short temp; |
32 | /* Reset the Machine via pc[3] of the sequoia chipset */ | 32 | /* Reset the Machine via pc[3] of the sequoia chipset */ |
@@ -156,4 +156,5 @@ MACHINE_START(SHARK, "Shark") | |||
156 | .init_irq = shark_init_irq, | 156 | .init_irq = shark_init_irq, |
157 | .timer = &shark_timer, | 157 | .timer = &shark_timer, |
158 | .dma_zone_size = SZ_4M, | 158 | .dma_zone_size = SZ_4M, |
159 | .restart = shark_restart, | ||
159 | MACHINE_END | 160 | MACHINE_END |
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h index 21c373b30bbc..1b2f2c5050a8 100644 --- a/arch/arm/mach-shark/include/mach/system.h +++ b/arch/arm/mach-shark/include/mach/system.h | |||
@@ -6,9 +6,6 @@ | |||
6 | #ifndef __ASM_ARCH_SYSTEM_H | 6 | #ifndef __ASM_ARCH_SYSTEM_H |
7 | #define __ASM_ARCH_SYSTEM_H | 7 | #define __ASM_ARCH_SYSTEM_H |
8 | 8 | ||
9 | /* Found in arch/mach-shark/core.c */ | ||
10 | extern void arch_reset(char mode, const char *cmd); | ||
11 | |||
12 | static inline void arch_idle(void) | 9 | static inline void arch_idle(void) |
13 | { | 10 | { |
14 | } | 11 | } |
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 202c3c6ec9d8..a4e6ca04e319 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -466,8 +466,6 @@ static struct map_desc ag5evm_io_desc[] __initdata = { | |||
466 | static void __init ag5evm_map_io(void) | 466 | static void __init ag5evm_map_io(void) |
467 | { | 467 | { |
468 | iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc)); | 468 | iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc)); |
469 | /* DMA memory at 0xf6000000 - 0xffdfffff */ | ||
470 | init_consistent_dma_size(158 << 20); | ||
471 | 469 | ||
472 | /* setup early devices and console here as well */ | 470 | /* setup early devices and console here as well */ |
473 | sh73a0_add_early_devices(); | 471 | sh73a0_add_early_devices(); |
@@ -607,6 +605,7 @@ struct sys_timer ag5evm_timer = { | |||
607 | 605 | ||
608 | MACHINE_START(AG5EVM, "ag5evm") | 606 | MACHINE_START(AG5EVM, "ag5evm") |
609 | .map_io = ag5evm_map_io, | 607 | .map_io = ag5evm_map_io, |
608 | .nr_irqs = NR_IRQS_LEGACY, | ||
610 | .init_irq = sh73a0_init_irq, | 609 | .init_irq = sh73a0_init_irq, |
611 | .handle_irq = gic_handle_irq, | 610 | .handle_irq = gic_handle_irq, |
612 | .init_machine = ag5evm_init, | 611 | .init_machine = ag5evm_init, |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 4c865ece9ac4..6a6f9f7568c2 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -1172,8 +1172,6 @@ static struct map_desc ap4evb_io_desc[] __initdata = { | |||
1172 | static void __init ap4evb_map_io(void) | 1172 | static void __init ap4evb_map_io(void) |
1173 | { | 1173 | { |
1174 | iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc)); | 1174 | iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc)); |
1175 | /* DMA memory at 0xf6000000 - 0xffdfffff */ | ||
1176 | init_consistent_dma_size(158 << 20); | ||
1177 | 1175 | ||
1178 | /* setup early devices and console here as well */ | 1176 | /* setup early devices and console here as well */ |
1179 | sh7372_add_early_devices(); | 1177 | sh7372_add_early_devices(); |
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c index 8b620bf06221..72d557281b1f 100644 --- a/arch/arm/mach-shmobile/board-g3evm.c +++ b/arch/arm/mach-shmobile/board-g3evm.c | |||
@@ -261,8 +261,6 @@ static struct map_desc g3evm_io_desc[] __initdata = { | |||
261 | static void __init g3evm_map_io(void) | 261 | static void __init g3evm_map_io(void) |
262 | { | 262 | { |
263 | iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc)); | 263 | iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc)); |
264 | /* DMA memory at 0xf6000000 - 0xffdfffff */ | ||
265 | init_consistent_dma_size(158 << 20); | ||
266 | 264 | ||
267 | /* setup early devices and console here as well */ | 265 | /* setup early devices and console here as well */ |
268 | sh7367_add_early_devices(); | 266 | sh7367_add_early_devices(); |
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c index 7719ddc5f591..2220b885cff5 100644 --- a/arch/arm/mach-shmobile/board-g4evm.c +++ b/arch/arm/mach-shmobile/board-g4evm.c | |||
@@ -275,8 +275,6 @@ static struct map_desc g4evm_io_desc[] __initdata = { | |||
275 | static void __init g4evm_map_io(void) | 275 | static void __init g4evm_map_io(void) |
276 | { | 276 | { |
277 | iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc)); | 277 | iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc)); |
278 | /* DMA memory at 0xf6000000 - 0xffdfffff */ | ||
279 | init_consistent_dma_size(158 << 20); | ||
280 | 278 | ||
281 | /* setup early devices and console here as well */ | 279 | /* setup early devices and console here as well */ |
282 | sh7377_add_early_devices(); | 280 | sh7377_add_early_devices(); |
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c index 1b4439d3f9d5..857ceeec1bb0 100644 --- a/arch/arm/mach-shmobile/board-kota2.c +++ b/arch/arm/mach-shmobile/board-kota2.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/input/sh_keysc.h> | 33 | #include <linux/input/sh_keysc.h> |
34 | #include <linux/gpio_keys.h> | 34 | #include <linux/gpio_keys.h> |
35 | #include <linux/leds.h> | 35 | #include <linux/leds.h> |
36 | #include <linux/platform_data/leds-renesas-tpu.h> | ||
36 | #include <linux/mmc/host.h> | 37 | #include <linux/mmc/host.h> |
37 | #include <linux/mmc/sh_mmcif.h> | 38 | #include <linux/mmc/sh_mmcif.h> |
38 | #include <linux/mfd/tmio.h> | 39 | #include <linux/mfd/tmio.h> |
@@ -56,7 +57,7 @@ static struct resource smsc9220_resources[] = { | |||
56 | .flags = IORESOURCE_MEM, | 57 | .flags = IORESOURCE_MEM, |
57 | }, | 58 | }, |
58 | [1] = { | 59 | [1] = { |
59 | .start = gic_spi(33), /* PINTA2 @ PORT144 */ | 60 | .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */ |
60 | .flags = IORESOURCE_IRQ, | 61 | .flags = IORESOURCE_IRQ, |
61 | }, | 62 | }, |
62 | }; | 63 | }; |
@@ -157,10 +158,6 @@ static struct platform_device gpio_keys_device = { | |||
157 | #define GPIO_LED(n, g) { .name = n, .gpio = g } | 158 | #define GPIO_LED(n, g) { .name = n, .gpio = g } |
158 | 159 | ||
159 | static struct gpio_led gpio_leds[] = { | 160 | static struct gpio_led gpio_leds[] = { |
160 | GPIO_LED("V2513", GPIO_PORT153), /* PORT153 [TPU1T02] -> V2513 */ | ||
161 | GPIO_LED("V2514", GPIO_PORT199), /* PORT199 [TPU4TO1] -> V2514 */ | ||
162 | GPIO_LED("V2515", GPIO_PORT197), /* PORT197 [TPU2TO1] -> V2515 */ | ||
163 | GPIO_LED("KEYLED", GPIO_PORT163), /* PORT163 [TPU3TO0] -> KEYLED */ | ||
164 | GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ | 161 | GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ |
165 | GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ | 162 | GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ |
166 | GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ | 163 | GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ |
@@ -179,6 +176,119 @@ static struct platform_device gpio_leds_device = { | |||
179 | }, | 176 | }, |
180 | }; | 177 | }; |
181 | 178 | ||
179 | /* TPU LED */ | ||
180 | static struct led_renesas_tpu_config led_renesas_tpu12_pdata = { | ||
181 | .name = "V2513", | ||
182 | .pin_gpio_fn = GPIO_FN_TPU1TO2, | ||
183 | .pin_gpio = GPIO_PORT153, | ||
184 | .channel_offset = 0x90, | ||
185 | .timer_bit = 2, | ||
186 | .max_brightness = 1000, | ||
187 | }; | ||
188 | |||
189 | static struct resource tpu12_resources[] = { | ||
190 | [0] = { | ||
191 | .name = "TPU12", | ||
192 | .start = 0xe6610090, | ||
193 | .end = 0xe66100b5, | ||
194 | .flags = IORESOURCE_MEM, | ||
195 | }, | ||
196 | }; | ||
197 | |||
198 | static struct platform_device leds_tpu12_device = { | ||
199 | .name = "leds-renesas-tpu", | ||
200 | .id = 12, | ||
201 | .dev = { | ||
202 | .platform_data = &led_renesas_tpu12_pdata, | ||
203 | }, | ||
204 | .num_resources = ARRAY_SIZE(tpu12_resources), | ||
205 | .resource = tpu12_resources, | ||
206 | }; | ||
207 | |||
208 | static struct led_renesas_tpu_config led_renesas_tpu41_pdata = { | ||
209 | .name = "V2514", | ||
210 | .pin_gpio_fn = GPIO_FN_TPU4TO1, | ||
211 | .pin_gpio = GPIO_PORT199, | ||
212 | .channel_offset = 0x50, | ||
213 | .timer_bit = 1, | ||
214 | .max_brightness = 1000, | ||
215 | }; | ||
216 | |||
217 | static struct resource tpu41_resources[] = { | ||
218 | [0] = { | ||
219 | .name = "TPU41", | ||
220 | .start = 0xe6640050, | ||
221 | .end = 0xe6640075, | ||
222 | .flags = IORESOURCE_MEM, | ||
223 | }, | ||
224 | }; | ||
225 | |||
226 | static struct platform_device leds_tpu41_device = { | ||
227 | .name = "leds-renesas-tpu", | ||
228 | .id = 41, | ||
229 | .dev = { | ||
230 | .platform_data = &led_renesas_tpu41_pdata, | ||
231 | }, | ||
232 | .num_resources = ARRAY_SIZE(tpu41_resources), | ||
233 | .resource = tpu41_resources, | ||
234 | }; | ||
235 | |||
236 | static struct led_renesas_tpu_config led_renesas_tpu21_pdata = { | ||
237 | .name = "V2515", | ||
238 | .pin_gpio_fn = GPIO_FN_TPU2TO1, | ||
239 | .pin_gpio = GPIO_PORT197, | ||
240 | .channel_offset = 0x50, | ||
241 | .timer_bit = 1, | ||
242 | .max_brightness = 1000, | ||
243 | }; | ||
244 | |||
245 | static struct resource tpu21_resources[] = { | ||
246 | [0] = { | ||
247 | .name = "TPU21", | ||
248 | .start = 0xe6620050, | ||
249 | .end = 0xe6620075, | ||
250 | .flags = IORESOURCE_MEM, | ||
251 | }, | ||
252 | }; | ||
253 | |||
254 | static struct platform_device leds_tpu21_device = { | ||
255 | .name = "leds-renesas-tpu", | ||
256 | .id = 21, | ||
257 | .dev = { | ||
258 | .platform_data = &led_renesas_tpu21_pdata, | ||
259 | }, | ||
260 | .num_resources = ARRAY_SIZE(tpu21_resources), | ||
261 | .resource = tpu21_resources, | ||
262 | }; | ||
263 | |||
264 | static struct led_renesas_tpu_config led_renesas_tpu30_pdata = { | ||
265 | .name = "KEYLED", | ||
266 | .pin_gpio_fn = GPIO_FN_TPU3TO0, | ||
267 | .pin_gpio = GPIO_PORT163, | ||
268 | .channel_offset = 0x10, | ||
269 | .timer_bit = 0, | ||
270 | .max_brightness = 1000, | ||
271 | }; | ||
272 | |||
273 | static struct resource tpu30_resources[] = { | ||
274 | [0] = { | ||
275 | .name = "TPU30", | ||
276 | .start = 0xe6630010, | ||
277 | .end = 0xe6630035, | ||
278 | .flags = IORESOURCE_MEM, | ||
279 | }, | ||
280 | }; | ||
281 | |||
282 | static struct platform_device leds_tpu30_device = { | ||
283 | .name = "leds-renesas-tpu", | ||
284 | .id = 30, | ||
285 | .dev = { | ||
286 | .platform_data = &led_renesas_tpu30_pdata, | ||
287 | }, | ||
288 | .num_resources = ARRAY_SIZE(tpu30_resources), | ||
289 | .resource = tpu30_resources, | ||
290 | }; | ||
291 | |||
182 | /* MMCIF */ | 292 | /* MMCIF */ |
183 | static struct resource mmcif_resources[] = { | 293 | static struct resource mmcif_resources[] = { |
184 | [0] = { | 294 | [0] = { |
@@ -291,6 +401,10 @@ static struct platform_device *kota2_devices[] __initdata = { | |||
291 | &keysc_device, | 401 | &keysc_device, |
292 | &gpio_keys_device, | 402 | &gpio_keys_device, |
293 | &gpio_leds_device, | 403 | &gpio_leds_device, |
404 | &leds_tpu12_device, | ||
405 | &leds_tpu41_device, | ||
406 | &leds_tpu21_device, | ||
407 | &leds_tpu30_device, | ||
294 | &mmcif_device, | 408 | &mmcif_device, |
295 | &sdhi0_device, | 409 | &sdhi0_device, |
296 | &sdhi1_device, | 410 | &sdhi1_device, |
@@ -317,18 +431,6 @@ static void __init kota2_map_io(void) | |||
317 | shmobile_setup_console(); | 431 | shmobile_setup_console(); |
318 | } | 432 | } |
319 | 433 | ||
320 | #define PINTER0A 0xe69000a0 | ||
321 | #define PINTCR0A 0xe69000b0 | ||
322 | |||
323 | void __init kota2_init_irq(void) | ||
324 | { | ||
325 | sh73a0_init_irq(); | ||
326 | |||
327 | /* setup PINT: enable PINTA2 as active low */ | ||
328 | __raw_writel(1 << 29, PINTER0A); | ||
329 | __raw_writew(2 << 10, PINTCR0A); | ||
330 | } | ||
331 | |||
332 | static void __init kota2_init(void) | 434 | static void __init kota2_init(void) |
333 | { | 435 | { |
334 | sh73a0_pinmux_init(); | 436 | sh73a0_pinmux_init(); |
@@ -447,7 +549,8 @@ struct sys_timer kota2_timer = { | |||
447 | 549 | ||
448 | MACHINE_START(KOTA2, "kota2") | 550 | MACHINE_START(KOTA2, "kota2") |
449 | .map_io = kota2_map_io, | 551 | .map_io = kota2_map_io, |
450 | .init_irq = kota2_init_irq, | 552 | .nr_irqs = NR_IRQS_LEGACY, |
553 | .init_irq = sh73a0_init_irq, | ||
451 | .handle_irq = gic_handle_irq, | 554 | .handle_irq = gic_handle_irq, |
452 | .init_machine = kota2_init, | 555 | .init_machine = kota2_init, |
453 | .timer = &kota2_timer, | 556 | .timer = &kota2_timer, |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 9c5e598e0e3d..ed5256687397 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -1390,8 +1390,6 @@ static struct map_desc mackerel_io_desc[] __initdata = { | |||
1390 | static void __init mackerel_map_io(void) | 1390 | static void __init mackerel_map_io(void) |
1391 | { | 1391 | { |
1392 | iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc)); | 1392 | iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc)); |
1393 | /* DMA memory at 0xf6000000 - 0xffdfffff */ | ||
1394 | init_consistent_dma_size(158 << 20); | ||
1395 | 1393 | ||
1396 | /* setup early devices and console here as well */ | 1394 | /* setup early devices and console here as well */ |
1397 | sh7372_add_early_devices(); | 1395 | sh7372_add_early_devices(); |
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 61a846bb30f2..1370a89ca358 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c | |||
@@ -113,6 +113,12 @@ static struct clk main_clk = { | |||
113 | .ops = &main_clk_ops, | 113 | .ops = &main_clk_ops, |
114 | }; | 114 | }; |
115 | 115 | ||
116 | /* Divide Main clock by two */ | ||
117 | static struct clk main_div2_clk = { | ||
118 | .ops = &div2_clk_ops, | ||
119 | .parent = &main_clk, | ||
120 | }; | ||
121 | |||
116 | /* PLL0, PLL1, PLL2, PLL3 */ | 122 | /* PLL0, PLL1, PLL2, PLL3 */ |
117 | static unsigned long pll_recalc(struct clk *clk) | 123 | static unsigned long pll_recalc(struct clk *clk) |
118 | { | 124 | { |
@@ -181,6 +187,7 @@ static struct clk *main_clks[] = { | |||
181 | &extal1_div2_clk, | 187 | &extal1_div2_clk, |
182 | &extal2_div2_clk, | 188 | &extal2_div2_clk, |
183 | &main_clk, | 189 | &main_clk, |
190 | &main_div2_clk, | ||
184 | &pll0_clk, | 191 | &pll0_clk, |
185 | &pll1_clk, | 192 | &pll1_clk, |
186 | &pll2_clk, | 193 | &pll2_clk, |
@@ -243,7 +250,7 @@ static struct clk div6_clks[DIV6_NR] = { | |||
243 | [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0), | 250 | [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0), |
244 | [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0), | 251 | [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0), |
245 | [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0), | 252 | [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0), |
246 | [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0), | 253 | [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT), |
247 | [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0), | 254 | [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0), |
248 | [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0), | 255 | [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0), |
249 | [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0), | 256 | [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0), |
@@ -268,6 +275,7 @@ enum { MSTP001, | |||
268 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, | 275 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, |
269 | MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, | 276 | MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, |
270 | MSTP314, MSTP313, MSTP312, MSTP311, | 277 | MSTP314, MSTP313, MSTP312, MSTP311, |
278 | MSTP303, MSTP302, MSTP301, MSTP300, | ||
271 | MSTP411, MSTP410, MSTP403, | 279 | MSTP411, MSTP410, MSTP403, |
272 | MSTP_NR }; | 280 | MSTP_NR }; |
273 | 281 | ||
@@ -301,6 +309,10 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
301 | [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ | 309 | [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ |
302 | [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ | 310 | [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ |
303 | [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */ | 311 | [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */ |
312 | [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */ | ||
313 | [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */ | ||
314 | [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */ | ||
315 | [MSTP300] = MSTP(&main_div2_clk, SMSTPCR3, 0, 0), /* TPU4 */ | ||
304 | [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ | 316 | [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ |
305 | [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ | 317 | [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ |
306 | [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ | 318 | [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ |
@@ -350,6 +362,10 @@ static struct clk_lookup lookups[] = { | |||
350 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ | 362 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ |
351 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ | 363 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ |
352 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ | 364 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ |
365 | CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */ | ||
366 | CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */ | ||
367 | CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */ | ||
368 | CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */ | ||
353 | CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ | 369 | CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ |
354 | CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ | 370 | CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ |
355 | CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ | 371 | CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ |
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h index 7bf0890e16ba..de795b42232a 100644 --- a/arch/arm/mach-shmobile/include/mach/gpio.h +++ b/arch/arm/mach-shmobile/include/mach/gpio.h | |||
@@ -12,8 +12,6 @@ | |||
12 | 12 | ||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/errno.h> | 14 | #include <linux/errno.h> |
15 | |||
16 | #define ARCH_NR_GPIOS 1024 | ||
17 | #include <linux/sh_pfc.h> | 15 | #include <linux/sh_pfc.h> |
18 | 16 | ||
19 | #ifdef CONFIG_GPIOLIB | 17 | #ifdef CONFIG_GPIOLIB |
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h index b8f31c3935f7..14276e5a98d2 100644 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ b/arch/arm/mach-spear3xx/include/mach/generic.h | |||
@@ -42,6 +42,8 @@ void __init spear3xx_map_io(void); | |||
42 | void __init spear3xx_init_irq(void); | 42 | void __init spear3xx_init_irq(void); |
43 | void __init spear3xx_init(void); | 43 | void __init spear3xx_init(void); |
44 | 44 | ||
45 | void spear_restart(char, const char *); | ||
46 | |||
45 | /* pad mux declarations */ | 47 | /* pad mux declarations */ |
46 | #define PMX_FIRDA_MASK (1 << 14) | 48 | #define PMX_FIRDA_MASK (1 << 14) |
47 | #define PMX_I2C_MASK (1 << 13) | 49 | #define PMX_I2C_MASK (1 << 13) |
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c index 61068ba67923..3462ab9d6122 100644 --- a/arch/arm/mach-spear3xx/spear300_evb.c +++ b/arch/arm/mach-spear3xx/spear300_evb.c | |||
@@ -71,4 +71,5 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB") | |||
71 | .handle_irq = vic_handle_irq, | 71 | .handle_irq = vic_handle_irq, |
72 | .timer = &spear3xx_timer, | 72 | .timer = &spear3xx_timer, |
73 | .init_machine = spear300_evb_init, | 73 | .init_machine = spear300_evb_init, |
74 | .restart = spear_restart, | ||
74 | MACHINE_END | 75 | MACHINE_END |
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c index 7903abe92bf6..f92c4993f65a 100644 --- a/arch/arm/mach-spear3xx/spear310_evb.c +++ b/arch/arm/mach-spear3xx/spear310_evb.c | |||
@@ -77,4 +77,5 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB") | |||
77 | .handle_irq = vic_handle_irq, | 77 | .handle_irq = vic_handle_irq, |
78 | .timer = &spear3xx_timer, | 78 | .timer = &spear3xx_timer, |
79 | .init_machine = spear310_evb_init, | 79 | .init_machine = spear310_evb_init, |
80 | .restart = spear_restart, | ||
80 | MACHINE_END | 81 | MACHINE_END |
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c index e9751f970933..105334ab7021 100644 --- a/arch/arm/mach-spear3xx/spear320_evb.c +++ b/arch/arm/mach-spear3xx/spear320_evb.c | |||
@@ -75,4 +75,5 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB") | |||
75 | .handle_irq = vic_handle_irq, | 75 | .handle_irq = vic_handle_irq, |
76 | .timer = &spear3xx_timer, | 76 | .timer = &spear3xx_timer, |
77 | .init_machine = spear320_evb_init, | 77 | .init_machine = spear320_evb_init, |
78 | .restart = spear_restart, | ||
78 | MACHINE_END | 79 | MACHINE_END |
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h index 183f0238c5e2..116b99301cf5 100644 --- a/arch/arm/mach-spear6xx/include/mach/generic.h +++ b/arch/arm/mach-spear6xx/include/mach/generic.h | |||
@@ -41,6 +41,8 @@ void __init spear6xx_init(void); | |||
41 | void __init spear600_init(void); | 41 | void __init spear600_init(void); |
42 | void __init spear6xx_clk_init(void); | 42 | void __init spear6xx_clk_init(void); |
43 | 43 | ||
44 | void spear_restart(char, const char *); | ||
45 | |||
44 | /* Add spear600 machine device structure declarations here */ | 46 | /* Add spear600 machine device structure declarations here */ |
45 | 47 | ||
46 | #endif /* __MACH_GENERIC_H */ | 48 | #endif /* __MACH_GENERIC_H */ |
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c index ff139ed0a61e..c6e4254741cc 100644 --- a/arch/arm/mach-spear6xx/spear600_evb.c +++ b/arch/arm/mach-spear6xx/spear600_evb.c | |||
@@ -50,4 +50,5 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB") | |||
50 | .handle_irq = vic_handle_irq, | 50 | .handle_irq = vic_handle_irq, |
51 | .timer = &spear6xx_timer, | 51 | .timer = &spear6xx_timer, |
52 | .init_machine = spear600_evb_init, | 52 | .init_machine = spear600_evb_init, |
53 | .restart = spear_restart, | ||
53 | MACHINE_END | 54 | MACHINE_END |
diff --git a/arch/arm/mach-tcc8k/Kconfig b/arch/arm/mach-tcc8k/Kconfig deleted file mode 100644 index ad86415d1577..000000000000 --- a/arch/arm/mach-tcc8k/Kconfig +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | if ARCH_TCC8K | ||
2 | |||
3 | comment "TCC8000 systems:" | ||
4 | |||
5 | config MACH_TCC8000_SDK | ||
6 | bool "Telechips TCC8000-SDK development kit" | ||
7 | default y | ||
8 | help | ||
9 | Support for the Telechips TCC8000-SDK board. | ||
10 | |||
11 | endif | ||
diff --git a/arch/arm/mach-tcc8k/Makefile b/arch/arm/mach-tcc8k/Makefile deleted file mode 100644 index 9bacf31e49ba..000000000000 --- a/arch/arm/mach-tcc8k/Makefile +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for TCC8K boards and common files. | ||
3 | # | ||
4 | |||
5 | # Common support | ||
6 | obj-y += clock.o irq.o time.o io.o devices.o | ||
7 | |||
8 | # Board specific support | ||
9 | obj-$(CONFIG_MACH_TCC8000_SDK) += board-tcc8000-sdk.o | ||
diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot deleted file mode 100644 index 5e02d4156b04..000000000000 --- a/arch/arm/mach-tcc8k/Makefile.boot +++ /dev/null | |||
@@ -1,3 +0,0 @@ | |||
1 | zreladdr-y += 0x20008000 | ||
2 | params_phys-y := 0x20000100 | ||
3 | initrd_phys-y := 0x20800000 | ||
diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c deleted file mode 100644 index 777a5bb9eed2..000000000000 --- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/delay.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | #include <asm/mach-types.h> | ||
15 | |||
16 | #include <asm/mach/arch.h> | ||
17 | #include <asm/mach/map.h> | ||
18 | #include <asm/mach/time.h> | ||
19 | |||
20 | #include <mach/clock.h> | ||
21 | #include <mach/tcc-nand.h> | ||
22 | #include <mach/tcc8k-regs.h> | ||
23 | |||
24 | #include "common.h" | ||
25 | |||
26 | #define XI_FREQUENCY 12000000 | ||
27 | #define XTI_FREQUENCY 32768 | ||
28 | |||
29 | #ifdef CONFIG_MTD_NAND_TCC | ||
30 | /* NAND */ | ||
31 | static struct tcc_nand_platform_data tcc8k_sdk_nand_data = { | ||
32 | .width = 1, | ||
33 | .hw_ecc = 0, | ||
34 | }; | ||
35 | #endif | ||
36 | |||
37 | static void __init tcc8k_init(void) | ||
38 | { | ||
39 | #ifdef CONFIG_MTD_NAND_TCC | ||
40 | tcc_nand_device.dev.platform_data = &tcc8k_sdk_nand_data; | ||
41 | platform_device_register(&tcc_nand_device); | ||
42 | #endif | ||
43 | } | ||
44 | |||
45 | static void __init tcc8k_init_timer(void) | ||
46 | { | ||
47 | tcc_clocks_init(XI_FREQUENCY, XTI_FREQUENCY); | ||
48 | } | ||
49 | |||
50 | static struct sys_timer tcc8k_timer = { | ||
51 | .init = tcc8k_init_timer, | ||
52 | }; | ||
53 | |||
54 | static void __init tcc8k_map_io(void) | ||
55 | { | ||
56 | tcc8k_map_common_io(); | ||
57 | |||
58 | /* set PLL0 clock to 96MHz, adapt UART0 divisor */ | ||
59 | __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS); | ||
60 | __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS); | ||
61 | |||
62 | /* set PLL1 clock to 192MHz */ | ||
63 | __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS); | ||
64 | |||
65 | /* set PLL2 clock to 48MHz */ | ||
66 | __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS); | ||
67 | |||
68 | /* with CPU freq higher than 150 MHz, need extra DTCM wait */ | ||
69 | __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS); | ||
70 | |||
71 | /* PLL locking time as specified */ | ||
72 | udelay(300); | ||
73 | } | ||
74 | |||
75 | MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board") | ||
76 | .atag_offset = 0x100, | ||
77 | .map_io = tcc8k_map_io, | ||
78 | .init_irq = tcc8k_init_irq, | ||
79 | .init_machine = tcc8k_init, | ||
80 | .timer = &tcc8k_timer, | ||
81 | MACHINE_END | ||
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c deleted file mode 100644 index e7cdae5c77a4..000000000000 --- a/arch/arm/mach-tcc8k/clock.c +++ /dev/null | |||
@@ -1,580 +0,0 @@ | |||
1 | /* | ||
2 | * Lowlevel clock handling for Telechips TCC8xxx SoCs | ||
3 | * | ||
4 | * Copyright (C) 2010 by Hans J. Koch <hjk@linutronix.de> | ||
5 | * | ||
6 | * Licensed under the terms of the GPL v2 | ||
7 | */ | ||
8 | |||
9 | #include <linux/clk.h> | ||
10 | #include <linux/delay.h> | ||
11 | #include <linux/err.h> | ||
12 | #include <linux/io.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/spinlock.h> | ||
15 | #include <linux/clkdev.h> | ||
16 | |||
17 | #include <mach/clock.h> | ||
18 | #include <mach/irqs.h> | ||
19 | #include <mach/tcc8k-regs.h> | ||
20 | |||
21 | #include "common.h" | ||
22 | |||
23 | #define BCLKCTR0 (CKC_BASE + BCLKCTR0_OFFS) | ||
24 | #define BCLKCTR1 (CKC_BASE + BCLKCTR1_OFFS) | ||
25 | |||
26 | #define ACLKREF (CKC_BASE + ACLKREF_OFFS) | ||
27 | #define ACLKUART0 (CKC_BASE + ACLKUART0_OFFS) | ||
28 | #define ACLKUART1 (CKC_BASE + ACLKUART1_OFFS) | ||
29 | #define ACLKUART2 (CKC_BASE + ACLKUART2_OFFS) | ||
30 | #define ACLKUART3 (CKC_BASE + ACLKUART3_OFFS) | ||
31 | #define ACLKUART4 (CKC_BASE + ACLKUART4_OFFS) | ||
32 | #define ACLKI2C (CKC_BASE + ACLKI2C_OFFS) | ||
33 | #define ACLKADC (CKC_BASE + ACLKADC_OFFS) | ||
34 | #define ACLKUSBH (CKC_BASE + ACLKUSBH_OFFS) | ||
35 | #define ACLKLCD (CKC_BASE + ACLKLCD_OFFS) | ||
36 | #define ACLKSDH0 (CKC_BASE + ACLKSDH0_OFFS) | ||
37 | #define ACLKSDH1 (CKC_BASE + ACLKSDH1_OFFS) | ||
38 | #define ACLKSPI0 (CKC_BASE + ACLKSPI0_OFFS) | ||
39 | #define ACLKSPI1 (CKC_BASE + ACLKSPI1_OFFS) | ||
40 | #define ACLKSPDIF (CKC_BASE + ACLKSPDIF_OFFS) | ||
41 | #define ACLKC3DEC (CKC_BASE + ACLKC3DEC_OFFS) | ||
42 | #define ACLKCAN0 (CKC_BASE + ACLKCAN0_OFFS) | ||
43 | #define ACLKCAN1 (CKC_BASE + ACLKCAN1_OFFS) | ||
44 | #define ACLKGSB0 (CKC_BASE + ACLKGSB0_OFFS) | ||
45 | #define ACLKGSB1 (CKC_BASE + ACLKGSB1_OFFS) | ||
46 | #define ACLKGSB2 (CKC_BASE + ACLKGSB2_OFFS) | ||
47 | #define ACLKGSB3 (CKC_BASE + ACLKGSB3_OFFS) | ||
48 | #define ACLKTCT (CKC_BASE + ACLKTCT_OFFS) | ||
49 | #define ACLKTCX (CKC_BASE + ACLKTCX_OFFS) | ||
50 | #define ACLKTCZ (CKC_BASE + ACLKTCZ_OFFS) | ||
51 | |||
52 | #define ACLK_MAX_DIV (0xfff + 1) | ||
53 | |||
54 | /* Crystal frequencies */ | ||
55 | static unsigned long xi_rate, xti_rate; | ||
56 | |||
57 | static void __iomem *pll_cfg_addr(int pll) | ||
58 | { | ||
59 | switch (pll) { | ||
60 | case 0: return (CKC_BASE + PLL0CFG_OFFS); | ||
61 | case 1: return (CKC_BASE + PLL1CFG_OFFS); | ||
62 | case 2: return (CKC_BASE + PLL2CFG_OFFS); | ||
63 | default: | ||
64 | BUG(); | ||
65 | } | ||
66 | } | ||
67 | |||
68 | static int pll_enable(int pll, int enable) | ||
69 | { | ||
70 | u32 reg; | ||
71 | void __iomem *addr = pll_cfg_addr(pll); | ||
72 | |||
73 | reg = __raw_readl(addr); | ||
74 | if (enable) | ||
75 | reg &= ~PLLxCFG_PD; | ||
76 | else | ||
77 | reg |= PLLxCFG_PD; | ||
78 | |||
79 | __raw_writel(reg, addr); | ||
80 | return 0; | ||
81 | } | ||
82 | |||
83 | static int xi_enable(int enable) | ||
84 | { | ||
85 | u32 reg; | ||
86 | |||
87 | reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS); | ||
88 | if (enable) | ||
89 | reg |= CLKCTRL_XE; | ||
90 | else | ||
91 | reg &= ~CLKCTRL_XE; | ||
92 | |||
93 | __raw_writel(reg, CKC_BASE + CLKCTRL_OFFS); | ||
94 | return 0; | ||
95 | } | ||
96 | |||
97 | static int root_clk_enable(enum root_clks src) | ||
98 | { | ||
99 | switch (src) { | ||
100 | case CLK_SRC_PLL0: return pll_enable(0, 1); | ||
101 | case CLK_SRC_PLL1: return pll_enable(1, 1); | ||
102 | case CLK_SRC_PLL2: return pll_enable(2, 1); | ||
103 | case CLK_SRC_XI: return xi_enable(1); | ||
104 | default: | ||
105 | BUG(); | ||
106 | } | ||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | static int root_clk_disable(enum root_clks src) | ||
111 | { | ||
112 | switch (src) { | ||
113 | case CLK_SRC_PLL0: return pll_enable(0, 0); | ||
114 | case CLK_SRC_PLL1: return pll_enable(1, 0); | ||
115 | case CLK_SRC_PLL2: return pll_enable(2, 0); | ||
116 | case CLK_SRC_XI: return xi_enable(0); | ||
117 | default: | ||
118 | BUG(); | ||
119 | } | ||
120 | return 0; | ||
121 | } | ||
122 | |||
123 | static int enable_clk(struct clk *clk) | ||
124 | { | ||
125 | u32 reg; | ||
126 | |||
127 | if (clk->root_id != CLK_SRC_NOROOT) | ||
128 | return root_clk_enable(clk->root_id); | ||
129 | |||
130 | if (clk->aclkreg) { | ||
131 | reg = __raw_readl(clk->aclkreg); | ||
132 | reg |= ACLK_EN; | ||
133 | __raw_writel(reg, clk->aclkreg); | ||
134 | } | ||
135 | if (clk->bclkctr) { | ||
136 | reg = __raw_readl(clk->bclkctr); | ||
137 | reg |= 1 << clk->bclk_shift; | ||
138 | __raw_writel(reg, clk->bclkctr); | ||
139 | } | ||
140 | return 0; | ||
141 | } | ||
142 | |||
143 | static void disable_clk(struct clk *clk) | ||
144 | { | ||
145 | u32 reg; | ||
146 | |||
147 | if (clk->root_id != CLK_SRC_NOROOT) { | ||
148 | root_clk_disable(clk->root_id); | ||
149 | return; | ||
150 | } | ||
151 | |||
152 | if (clk->bclkctr) { | ||
153 | reg = __raw_readl(clk->bclkctr); | ||
154 | reg &= ~(1 << clk->bclk_shift); | ||
155 | __raw_writel(reg, clk->bclkctr); | ||
156 | } | ||
157 | if (clk->aclkreg) { | ||
158 | reg = __raw_readl(clk->aclkreg); | ||
159 | reg &= ~ACLK_EN; | ||
160 | __raw_writel(reg, clk->aclkreg); | ||
161 | } | ||
162 | } | ||
163 | |||
164 | static unsigned long get_rate_pll(int pll) | ||
165 | { | ||
166 | u32 reg; | ||
167 | unsigned long s, m, p; | ||
168 | void __iomem *addr = pll_cfg_addr(pll); | ||
169 | |||
170 | reg = __raw_readl(addr); | ||
171 | s = (reg >> 16) & 0x07; | ||
172 | m = (reg >> 8) & 0xff; | ||
173 | p = reg & 0x3f; | ||
174 | |||
175 | return (m * xi_rate) / (p * (1 << s)); | ||
176 | } | ||
177 | |||
178 | static unsigned long get_rate_pll_div(int pll) | ||
179 | { | ||
180 | u32 reg; | ||
181 | unsigned long div = 0; | ||
182 | void __iomem *addr; | ||
183 | |||
184 | switch (pll) { | ||
185 | case 0: | ||
186 | addr = CKC_BASE + CLKDIVC0_OFFS; | ||
187 | reg = __raw_readl(addr); | ||
188 | if (reg & CLKDIVC0_P0E) | ||
189 | div = (reg >> 24) & 0x3f; | ||
190 | break; | ||
191 | case 1: | ||
192 | addr = CKC_BASE + CLKDIVC0_OFFS; | ||
193 | reg = __raw_readl(addr); | ||
194 | if (reg & CLKDIVC0_P1E) | ||
195 | div = (reg >> 16) & 0x3f; | ||
196 | break; | ||
197 | case 2: | ||
198 | addr = CKC_BASE + CLKDIVC1_OFFS; | ||
199 | reg = __raw_readl(addr); | ||
200 | if (reg & CLKDIVC1_P2E) | ||
201 | div = reg & 0x3f; | ||
202 | break; | ||
203 | } | ||
204 | return get_rate_pll(pll) / (div + 1); | ||
205 | } | ||
206 | |||
207 | static unsigned long get_rate_xi_div(void) | ||
208 | { | ||
209 | unsigned long div = 0; | ||
210 | u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS); | ||
211 | |||
212 | if (reg & CLKDIVC0_XE) | ||
213 | div = (reg >> 8) & 0x3f; | ||
214 | |||
215 | return xi_rate / (div + 1); | ||
216 | } | ||
217 | |||
218 | static unsigned long get_rate_xti_div(void) | ||
219 | { | ||
220 | unsigned long div = 0; | ||
221 | u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS); | ||
222 | |||
223 | if (reg & CLKDIVC0_XTE) | ||
224 | div = reg & 0x3f; | ||
225 | |||
226 | return xti_rate / (div + 1); | ||
227 | } | ||
228 | |||
229 | static unsigned long root_clk_get_rate(enum root_clks src) | ||
230 | { | ||
231 | switch (src) { | ||
232 | case CLK_SRC_PLL0: return get_rate_pll(0); | ||
233 | case CLK_SRC_PLL1: return get_rate_pll(1); | ||
234 | case CLK_SRC_PLL2: return get_rate_pll(2); | ||
235 | case CLK_SRC_PLL0DIV: return get_rate_pll_div(0); | ||
236 | case CLK_SRC_PLL1DIV: return get_rate_pll_div(1); | ||
237 | case CLK_SRC_PLL2DIV: return get_rate_pll_div(2); | ||
238 | case CLK_SRC_XI: return xi_rate; | ||
239 | case CLK_SRC_XTI: return xti_rate; | ||
240 | case CLK_SRC_XIDIV: return get_rate_xi_div(); | ||
241 | case CLK_SRC_XTIDIV: return get_rate_xti_div(); | ||
242 | default: return 0; | ||
243 | } | ||
244 | } | ||
245 | |||
246 | static unsigned long aclk_get_rate(struct clk *clk) | ||
247 | { | ||
248 | u32 reg; | ||
249 | unsigned long div; | ||
250 | unsigned int src; | ||
251 | |||
252 | reg = __raw_readl(clk->aclkreg); | ||
253 | div = reg & 0x0fff; | ||
254 | src = (reg >> ACLK_SEL_SHIFT) & CLK_SRC_MASK; | ||
255 | return root_clk_get_rate(src) / (div + 1); | ||
256 | } | ||
257 | |||
258 | static unsigned long aclk_best_div(struct clk *clk, unsigned long rate) | ||
259 | { | ||
260 | unsigned long div, src, freq, r1, r2; | ||
261 | |||
262 | if (!rate) | ||
263 | return ACLK_MAX_DIV; | ||
264 | |||
265 | src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT; | ||
266 | src &= CLK_SRC_MASK; | ||
267 | freq = root_clk_get_rate(src); | ||
268 | div = freq / rate; | ||
269 | if (!div) | ||
270 | return 1; | ||
271 | if (div >= ACLK_MAX_DIV) | ||
272 | return ACLK_MAX_DIV; | ||
273 | r1 = freq / div; | ||
274 | r2 = freq / (div + 1); | ||
275 | if ((rate - r2) < (r1 - rate)) | ||
276 | return div + 1; | ||
277 | |||
278 | return div; | ||
279 | } | ||
280 | |||
281 | static unsigned long aclk_round_rate(struct clk *clk, unsigned long rate) | ||
282 | { | ||
283 | unsigned int src; | ||
284 | |||
285 | src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT; | ||
286 | src &= CLK_SRC_MASK; | ||
287 | |||
288 | return root_clk_get_rate(src) / aclk_best_div(clk, rate); | ||
289 | } | ||
290 | |||
291 | static int aclk_set_rate(struct clk *clk, unsigned long rate) | ||
292 | { | ||
293 | u32 reg; | ||
294 | |||
295 | reg = __raw_readl(clk->aclkreg) & ~ACLK_DIV_MASK; | ||
296 | reg |= aclk_best_div(clk, rate) - 1; | ||
297 | __raw_writel(reg, clk->aclkreg); | ||
298 | return 0; | ||
299 | } | ||
300 | |||
301 | static unsigned long get_rate_sys(struct clk *clk) | ||
302 | { | ||
303 | unsigned int src; | ||
304 | |||
305 | src = __raw_readl(CKC_BASE + CLKCTRL_OFFS) & CLK_SRC_MASK; | ||
306 | return root_clk_get_rate(src); | ||
307 | } | ||
308 | |||
309 | static unsigned long get_rate_bus(struct clk *clk) | ||
310 | { | ||
311 | unsigned int reg, sdiv, bdiv, rate; | ||
312 | |||
313 | reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS); | ||
314 | rate = get_rate_sys(clk); | ||
315 | sdiv = (reg >> 20) & 3; | ||
316 | if (sdiv) | ||
317 | rate /= sdiv + 1; | ||
318 | bdiv = (reg >> 4) & 0xff; | ||
319 | if (bdiv) | ||
320 | rate /= bdiv + 1; | ||
321 | return rate; | ||
322 | } | ||
323 | |||
324 | static unsigned long get_rate_cpu(struct clk *clk) | ||
325 | { | ||
326 | unsigned int reg, div, fsys, fbus; | ||
327 | |||
328 | fbus = get_rate_bus(clk); | ||
329 | reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS); | ||
330 | if (reg & (1 << 29)) | ||
331 | return fbus; | ||
332 | fsys = get_rate_sys(clk); | ||
333 | div = (reg >> 16) & 0x0f; | ||
334 | return fbus + ((fsys - fbus) * (div + 1)) / 16; | ||
335 | } | ||
336 | |||
337 | static unsigned long get_rate_root(struct clk *clk) | ||
338 | { | ||
339 | return root_clk_get_rate(clk->root_id); | ||
340 | } | ||
341 | |||
342 | static int aclk_set_parent(struct clk *clock, struct clk *parent) | ||
343 | { | ||
344 | u32 reg; | ||
345 | |||
346 | if (clock->parent == parent) | ||
347 | return 0; | ||
348 | |||
349 | clock->parent = parent; | ||
350 | |||
351 | if (!parent) | ||
352 | return 0; | ||
353 | |||
354 | if (parent->root_id == CLK_SRC_NOROOT) | ||
355 | return 0; | ||
356 | reg = __raw_readl(clock->aclkreg); | ||
357 | reg &= ~ACLK_SEL_MASK; | ||
358 | reg |= (parent->root_id << ACLK_SEL_SHIFT) & ACLK_SEL_MASK; | ||
359 | __raw_writel(reg, clock->aclkreg); | ||
360 | |||
361 | return 0; | ||
362 | } | ||
363 | |||
364 | #define DEFINE_ROOT_CLOCK(name, ri, p) \ | ||
365 | static struct clk name = { \ | ||
366 | .root_id = ri, \ | ||
367 | .get_rate = get_rate_root, \ | ||
368 | .enable = enable_clk, \ | ||
369 | .disable = disable_clk, \ | ||
370 | .parent = p, \ | ||
371 | }; | ||
372 | |||
373 | #define DEFINE_SPECIAL_CLOCK(name, gr, p) \ | ||
374 | static struct clk name = { \ | ||
375 | .root_id = CLK_SRC_NOROOT, \ | ||
376 | .get_rate = gr, \ | ||
377 | .parent = p, \ | ||
378 | }; | ||
379 | |||
380 | #define DEFINE_ACLOCK(name, bc, bs, ar) \ | ||
381 | static struct clk name = { \ | ||
382 | .root_id = CLK_SRC_NOROOT, \ | ||
383 | .bclkctr = bc, \ | ||
384 | .bclk_shift = bs, \ | ||
385 | .aclkreg = ar, \ | ||
386 | .get_rate = aclk_get_rate, \ | ||
387 | .set_rate = aclk_set_rate, \ | ||
388 | .round_rate = aclk_round_rate, \ | ||
389 | .enable = enable_clk, \ | ||
390 | .disable = disable_clk, \ | ||
391 | .set_parent = aclk_set_parent, \ | ||
392 | }; | ||
393 | |||
394 | #define DEFINE_BCLOCK(name, bc, bs, gr, p) \ | ||
395 | static struct clk name = { \ | ||
396 | .root_id = CLK_SRC_NOROOT, \ | ||
397 | .bclkctr = bc, \ | ||
398 | .bclk_shift = bs, \ | ||
399 | .get_rate = gr, \ | ||
400 | .enable = enable_clk, \ | ||
401 | .disable = disable_clk, \ | ||
402 | .parent = p, \ | ||
403 | }; | ||
404 | |||
405 | DEFINE_ROOT_CLOCK(xi, CLK_SRC_XI, NULL) | ||
406 | DEFINE_ROOT_CLOCK(xti, CLK_SRC_XTI, NULL) | ||
407 | DEFINE_ROOT_CLOCK(xidiv, CLK_SRC_XIDIV, &xi) | ||
408 | DEFINE_ROOT_CLOCK(xtidiv, CLK_SRC_XTIDIV, &xti) | ||
409 | DEFINE_ROOT_CLOCK(pll0, CLK_SRC_PLL0, &xi) | ||
410 | DEFINE_ROOT_CLOCK(pll1, CLK_SRC_PLL1, &xi) | ||
411 | DEFINE_ROOT_CLOCK(pll2, CLK_SRC_PLL2, &xi) | ||
412 | DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0) | ||
413 | DEFINE_ROOT_CLOCK(pll1div, CLK_SRC_PLL1DIV, &pll1) | ||
414 | DEFINE_ROOT_CLOCK(pll2div, CLK_SRC_PLL2DIV, &pll2) | ||
415 | |||
416 | /* The following 3 clocks are special and are initialized explicitly later */ | ||
417 | DEFINE_SPECIAL_CLOCK(sys, get_rate_sys, NULL) | ||
418 | DEFINE_SPECIAL_CLOCK(bus, get_rate_bus, &sys) | ||
419 | DEFINE_SPECIAL_CLOCK(cpu, get_rate_cpu, &sys) | ||
420 | |||
421 | DEFINE_ACLOCK(tct, NULL, 0, ACLKTCT) | ||
422 | DEFINE_ACLOCK(tcx, NULL, 0, ACLKTCX) | ||
423 | DEFINE_ACLOCK(tcz, NULL, 0, ACLKTCZ) | ||
424 | DEFINE_ACLOCK(ref, NULL, 0, ACLKREF) | ||
425 | DEFINE_ACLOCK(uart0, BCLKCTR0, 5, ACLKUART0) | ||
426 | DEFINE_ACLOCK(uart1, BCLKCTR0, 23, ACLKUART1) | ||
427 | DEFINE_ACLOCK(uart2, BCLKCTR0, 6, ACLKUART2) | ||
428 | DEFINE_ACLOCK(uart3, BCLKCTR0, 8, ACLKUART3) | ||
429 | DEFINE_ACLOCK(uart4, BCLKCTR1, 6, ACLKUART4) | ||
430 | DEFINE_ACLOCK(i2c, BCLKCTR0, 7, ACLKI2C) | ||
431 | DEFINE_ACLOCK(adc, BCLKCTR0, 10, ACLKADC) | ||
432 | DEFINE_ACLOCK(usbh0, BCLKCTR0, 11, ACLKUSBH) | ||
433 | DEFINE_ACLOCK(lcd, BCLKCTR0, 13, ACLKLCD) | ||
434 | DEFINE_ACLOCK(sd0, BCLKCTR0, 17, ACLKSDH0) | ||
435 | DEFINE_ACLOCK(sd1, BCLKCTR1, 5, ACLKSDH1) | ||
436 | DEFINE_ACLOCK(spi0, BCLKCTR0, 24, ACLKSPI0) | ||
437 | DEFINE_ACLOCK(spi1, BCLKCTR0, 30, ACLKSPI1) | ||
438 | DEFINE_ACLOCK(spdif, BCLKCTR1, 2, ACLKSPDIF) | ||
439 | DEFINE_ACLOCK(c3dec, BCLKCTR1, 9, ACLKC3DEC) | ||
440 | DEFINE_ACLOCK(can0, BCLKCTR1, 10, ACLKCAN0) | ||
441 | DEFINE_ACLOCK(can1, BCLKCTR1, 11, ACLKCAN1) | ||
442 | DEFINE_ACLOCK(gsb0, BCLKCTR1, 13, ACLKGSB0) | ||
443 | DEFINE_ACLOCK(gsb1, BCLKCTR1, 14, ACLKGSB1) | ||
444 | DEFINE_ACLOCK(gsb2, BCLKCTR1, 15, ACLKGSB2) | ||
445 | DEFINE_ACLOCK(gsb3, BCLKCTR1, 16, ACLKGSB3) | ||
446 | DEFINE_ACLOCK(usbh1, BCLKCTR1, 20, ACLKUSBH) | ||
447 | |||
448 | DEFINE_BCLOCK(dai0, BCLKCTR0, 0, NULL, NULL) | ||
449 | DEFINE_BCLOCK(pic, BCLKCTR0, 1, NULL, NULL) | ||
450 | DEFINE_BCLOCK(tc, BCLKCTR0, 2, NULL, NULL) | ||
451 | DEFINE_BCLOCK(gpio, BCLKCTR0, 3, NULL, NULL) | ||
452 | DEFINE_BCLOCK(usbd, BCLKCTR0, 4, NULL, NULL) | ||
453 | DEFINE_BCLOCK(ecc, BCLKCTR0, 9, NULL, NULL) | ||
454 | DEFINE_BCLOCK(gdma0, BCLKCTR0, 12, NULL, NULL) | ||
455 | DEFINE_BCLOCK(rtc, BCLKCTR0, 15, NULL, NULL) | ||
456 | DEFINE_BCLOCK(nfc, BCLKCTR0, 16, NULL, NULL) | ||
457 | DEFINE_BCLOCK(g2d, BCLKCTR0, 18, NULL, NULL) | ||
458 | DEFINE_BCLOCK(gdma1, BCLKCTR0, 22, NULL, NULL) | ||
459 | DEFINE_BCLOCK(mscl, BCLKCTR0, 25, NULL, NULL) | ||
460 | DEFINE_BCLOCK(bdma, BCLKCTR1, 0, NULL, NULL) | ||
461 | DEFINE_BCLOCK(adma0, BCLKCTR1, 1, NULL, NULL) | ||
462 | DEFINE_BCLOCK(scfg, BCLKCTR1, 3, NULL, NULL) | ||
463 | DEFINE_BCLOCK(cid, BCLKCTR1, 4, NULL, NULL) | ||
464 | DEFINE_BCLOCK(dai1, BCLKCTR1, 7, NULL, NULL) | ||
465 | DEFINE_BCLOCK(adma1, BCLKCTR1, 8, NULL, NULL) | ||
466 | DEFINE_BCLOCK(gps, BCLKCTR1, 12, NULL, NULL) | ||
467 | DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL) | ||
468 | DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL) | ||
469 | DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL) | ||
470 | |||
471 | #define _REGISTER_CLOCK(d, n, c) \ | ||
472 | { \ | ||
473 | .dev_id = d, \ | ||
474 | .con_id = n, \ | ||
475 | .clk = &c, \ | ||
476 | }, | ||
477 | |||
478 | static struct clk_lookup lookups[] = { | ||
479 | _REGISTER_CLOCK(NULL, "bus", bus) | ||
480 | _REGISTER_CLOCK(NULL, "cpu", cpu) | ||
481 | _REGISTER_CLOCK(NULL, "tct", tct) | ||
482 | _REGISTER_CLOCK(NULL, "tcx", tcx) | ||
483 | _REGISTER_CLOCK(NULL, "tcz", tcz) | ||
484 | _REGISTER_CLOCK(NULL, "ref", ref) | ||
485 | _REGISTER_CLOCK(NULL, "dai0", dai0) | ||
486 | _REGISTER_CLOCK(NULL, "pic", pic) | ||
487 | _REGISTER_CLOCK(NULL, "tc", tc) | ||
488 | _REGISTER_CLOCK(NULL, "gpio", gpio) | ||
489 | _REGISTER_CLOCK(NULL, "usbd", usbd) | ||
490 | _REGISTER_CLOCK("tcc-uart.0", NULL, uart0) | ||
491 | _REGISTER_CLOCK("tcc-uart.2", NULL, uart2) | ||
492 | _REGISTER_CLOCK("tcc-i2c", NULL, i2c) | ||
493 | _REGISTER_CLOCK("tcc-uart.3", NULL, uart3) | ||
494 | _REGISTER_CLOCK(NULL, "ecc", ecc) | ||
495 | _REGISTER_CLOCK(NULL, "adc", adc) | ||
496 | _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0) | ||
497 | _REGISTER_CLOCK(NULL, "gdma0", gdma0) | ||
498 | _REGISTER_CLOCK(NULL, "lcd", lcd) | ||
499 | _REGISTER_CLOCK(NULL, "rtc", rtc) | ||
500 | _REGISTER_CLOCK(NULL, "nfc", nfc) | ||
501 | _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0) | ||
502 | _REGISTER_CLOCK(NULL, "g2d", g2d) | ||
503 | _REGISTER_CLOCK(NULL, "gdma1", gdma1) | ||
504 | _REGISTER_CLOCK("tcc-uart.1", NULL, uart1) | ||
505 | _REGISTER_CLOCK("tcc-spi.0", NULL, spi0) | ||
506 | _REGISTER_CLOCK(NULL, "mscl", mscl) | ||
507 | _REGISTER_CLOCK("tcc-spi.1", NULL, spi1) | ||
508 | _REGISTER_CLOCK(NULL, "bdma", bdma) | ||
509 | _REGISTER_CLOCK(NULL, "adma0", adma0) | ||
510 | _REGISTER_CLOCK(NULL, "spdif", spdif) | ||
511 | _REGISTER_CLOCK(NULL, "scfg", scfg) | ||
512 | _REGISTER_CLOCK(NULL, "cid", cid) | ||
513 | _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1) | ||
514 | _REGISTER_CLOCK("tcc-uart.4", NULL, uart4) | ||
515 | _REGISTER_CLOCK(NULL, "dai1", dai1) | ||
516 | _REGISTER_CLOCK(NULL, "adma1", adma1) | ||
517 | _REGISTER_CLOCK(NULL, "c3dec", c3dec) | ||
518 | _REGISTER_CLOCK("tcc-can.0", NULL, can0) | ||
519 | _REGISTER_CLOCK("tcc-can.1", NULL, can1) | ||
520 | _REGISTER_CLOCK(NULL, "gps", gps) | ||
521 | _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0) | ||
522 | _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1) | ||
523 | _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2) | ||
524 | _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3) | ||
525 | _REGISTER_CLOCK(NULL, "gdma2", gdma2) | ||
526 | _REGISTER_CLOCK(NULL, "gdma3", gdma3) | ||
527 | _REGISTER_CLOCK(NULL, "ddrc", ddrc) | ||
528 | _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1) | ||
529 | }; | ||
530 | |||
531 | static struct clk *root_clk_by_index(enum root_clks src) | ||
532 | { | ||
533 | switch (src) { | ||
534 | case CLK_SRC_PLL0: return &pll0; | ||
535 | case CLK_SRC_PLL1: return &pll1; | ||
536 | case CLK_SRC_PLL2: return &pll2; | ||
537 | case CLK_SRC_PLL0DIV: return &pll0div; | ||
538 | case CLK_SRC_PLL1DIV: return &pll1div; | ||
539 | case CLK_SRC_PLL2DIV: return &pll2div; | ||
540 | case CLK_SRC_XI: return ξ | ||
541 | case CLK_SRC_XTI: return &xti; | ||
542 | case CLK_SRC_XIDIV: return &xidiv; | ||
543 | case CLK_SRC_XTIDIV: return &xtidiv; | ||
544 | default: return NULL; | ||
545 | } | ||
546 | } | ||
547 | |||
548 | static void find_aclk_parent(struct clk *clk) | ||
549 | { | ||
550 | unsigned int src; | ||
551 | struct clk *clock; | ||
552 | |||
553 | if (!clk->aclkreg) | ||
554 | return; | ||
555 | |||
556 | src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT; | ||
557 | src &= CLK_SRC_MASK; | ||
558 | |||
559 | clock = root_clk_by_index(src); | ||
560 | if (!clock) | ||
561 | return; | ||
562 | |||
563 | clk->parent = clock; | ||
564 | clk->set_parent = aclk_set_parent; | ||
565 | } | ||
566 | |||
567 | void __init tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq) | ||
568 | { | ||
569 | int i; | ||
570 | |||
571 | xi_rate = xi_freq; | ||
572 | xti_rate = xti_freq; | ||
573 | |||
574 | /* fixup parents and add the clock */ | ||
575 | for (i = 0; i < ARRAY_SIZE(lookups); i++) { | ||
576 | find_aclk_parent(lookups[i].clk); | ||
577 | clkdev_add(&lookups[i]); | ||
578 | } | ||
579 | tcc8k_timer_init(&tcz, (void __iomem *)TIMER_BASE, INT_TC32); | ||
580 | } | ||
diff --git a/arch/arm/mach-tcc8k/common.h b/arch/arm/mach-tcc8k/common.h deleted file mode 100644 index 705690add395..000000000000 --- a/arch/arm/mach-tcc8k/common.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | #ifndef MACH_TCC8K_COMMON_H | ||
2 | #define MACH_TCC8K_COMMON_H | ||
3 | |||
4 | #include <linux/platform_device.h> | ||
5 | |||
6 | extern struct platform_device tcc_nand_device; | ||
7 | |||
8 | struct clk; | ||
9 | |||
10 | extern void tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq); | ||
11 | extern void tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq); | ||
12 | extern void tcc8k_init_irq(void); | ||
13 | extern void tcc8k_map_common_io(void); | ||
14 | |||
15 | #endif | ||
diff --git a/arch/arm/mach-tcc8k/devices.c b/arch/arm/mach-tcc8k/devices.c deleted file mode 100644 index 6722ad7c2836..000000000000 --- a/arch/arm/mach-tcc8k/devices.c +++ /dev/null | |||
@@ -1,239 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-tcc8k/devices.c | ||
3 | * | ||
4 | * Copyright (C) Telechips, Inc. | ||
5 | * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
6 | * | ||
7 | * Licensed under the terms of GPL v2. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #include <linux/dma-mapping.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/io.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/module.h> | ||
16 | |||
17 | #include <asm/mach/map.h> | ||
18 | |||
19 | #include <mach/tcc8k-regs.h> | ||
20 | #include <mach/irqs.h> | ||
21 | |||
22 | #include "common.h" | ||
23 | |||
24 | static u64 tcc8k_dmamask = DMA_BIT_MASK(32); | ||
25 | |||
26 | #ifdef CONFIG_MTD_NAND_TCC | ||
27 | /* NAND controller */ | ||
28 | static struct resource tcc_nand_resources[] = { | ||
29 | { | ||
30 | .start = (resource_size_t)NFC_BASE, | ||
31 | .end = (resource_size_t)NFC_BASE + 0x7f, | ||
32 | .flags = IORESOURCE_MEM, | ||
33 | }, { | ||
34 | .start = INT_NFC, | ||
35 | .end = INT_NFC, | ||
36 | .flags = IORESOURCE_IRQ, | ||
37 | }, | ||
38 | }; | ||
39 | |||
40 | struct platform_device tcc_nand_device = { | ||
41 | .name = "tcc_nand", | ||
42 | .id = 0, | ||
43 | .num_resources = ARRAY_SIZE(tcc_nand_resources), | ||
44 | .resource = tcc_nand_resources, | ||
45 | }; | ||
46 | #endif | ||
47 | |||
48 | #ifdef CONFIG_MMC_TCC8K | ||
49 | /* MMC controller */ | ||
50 | static struct resource tcc8k_mmc0_resource[] = { | ||
51 | { | ||
52 | .start = INT_SD0, | ||
53 | .end = INT_SD0, | ||
54 | .flags = IORESOURCE_IRQ, | ||
55 | }, | ||
56 | }; | ||
57 | |||
58 | static struct resource tcc8k_mmc1_resource[] = { | ||
59 | { | ||
60 | .start = INT_SD1, | ||
61 | .end = INT_SD1, | ||
62 | .flags = IORESOURCE_IRQ, | ||
63 | }, | ||
64 | }; | ||
65 | |||
66 | struct platform_device tcc8k_mmc0_device = { | ||
67 | .name = "tcc-mmc", | ||
68 | .id = 0, | ||
69 | .num_resources = ARRAY_SIZE(tcc8k_mmc0_resource), | ||
70 | .resource = tcc8k_mmc0_resource, | ||
71 | .dev = { | ||
72 | .dma_mask = &tcc8k_dmamask, | ||
73 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
74 | } | ||
75 | }; | ||
76 | |||
77 | struct platform_device tcc8k_mmc1_device = { | ||
78 | .name = "tcc-mmc", | ||
79 | .id = 1, | ||
80 | .num_resources = ARRAY_SIZE(tcc8k_mmc1_resource), | ||
81 | .resource = tcc8k_mmc1_resource, | ||
82 | .dev = { | ||
83 | .dma_mask = &tcc8k_dmamask, | ||
84 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
85 | } | ||
86 | }; | ||
87 | |||
88 | static inline void tcc8k_init_mmc(void) | ||
89 | { | ||
90 | u32 reg = __raw_readl(GPIOPS_BASE + GPIOPS_FS1_OFFS); | ||
91 | |||
92 | reg |= GPIOPS_FS1_SDH0_BITS | GPIOPS_FS1_SDH1_BITS; | ||
93 | __raw_writel(reg, GPIOPS_BASE + GPIOPS_FS1_OFFS); | ||
94 | |||
95 | platform_device_register(&tcc8k_mmc0_device); | ||
96 | platform_device_register(&tcc8k_mmc1_device); | ||
97 | } | ||
98 | #else | ||
99 | static inline void tcc8k_init_mmc(void) { } | ||
100 | #endif | ||
101 | |||
102 | #ifdef CONFIG_USB_OHCI_HCD | ||
103 | static int tcc8k_ohci_init(struct device *dev) | ||
104 | { | ||
105 | u32 reg; | ||
106 | |||
107 | /* Use GPIO PK19 as VBUS control output */ | ||
108 | reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS0_OFFS); | ||
109 | reg &= ~(1 << 19); | ||
110 | __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS0_OFFS); | ||
111 | reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS1_OFFS); | ||
112 | reg &= ~(1 << 19); | ||
113 | __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS1_OFFS); | ||
114 | |||
115 | reg = __raw_readl(GPIOPK_BASE + GPIOPK_DOE_OFFS); | ||
116 | reg |= (1 << 19); | ||
117 | __raw_writel(reg, GPIOPK_BASE + GPIOPK_DOE_OFFS); | ||
118 | /* Turn on VBUS */ | ||
119 | reg = __raw_readl(GPIOPK_BASE + GPIOPK_DAT_OFFS); | ||
120 | reg |= (1 << 19); | ||
121 | __raw_writel(reg, GPIOPK_BASE + GPIOPK_DAT_OFFS); | ||
122 | |||
123 | return 0; | ||
124 | } | ||
125 | |||
126 | static struct resource tcc8k_ohci0_resources[] = { | ||
127 | [0] = { | ||
128 | .start = (resource_size_t)USBH0_BASE, | ||
129 | .end = (resource_size_t)USBH0_BASE + 0x5c, | ||
130 | .flags = IORESOURCE_MEM, | ||
131 | }, | ||
132 | [1] = { | ||
133 | .start = INT_USBH0, | ||
134 | .end = INT_USBH0, | ||
135 | .flags = IORESOURCE_IRQ, | ||
136 | } | ||
137 | }; | ||
138 | |||
139 | static struct resource tcc8k_ohci1_resources[] = { | ||
140 | [0] = { | ||
141 | .start = (resource_size_t)USBH1_BASE, | ||
142 | .end = (resource_size_t)USBH1_BASE + 0x5c, | ||
143 | .flags = IORESOURCE_MEM, | ||
144 | }, | ||
145 | [1] = { | ||
146 | .start = INT_USBH1, | ||
147 | .end = INT_USBH1, | ||
148 | .flags = IORESOURCE_IRQ, | ||
149 | } | ||
150 | }; | ||
151 | |||
152 | static struct tccohci_platform_data tcc8k_ohci0_platform_data = { | ||
153 | .controller = 0, | ||
154 | .port_mode = PMM_PERPORT_MODE, | ||
155 | .init = tcc8k_ohci_init, | ||
156 | }; | ||
157 | |||
158 | static struct tccohci_platform_data tcc8k_ohci1_platform_data = { | ||
159 | .controller = 1, | ||
160 | .port_mode = PMM_PERPORT_MODE, | ||
161 | .init = tcc8k_ohci_init, | ||
162 | }; | ||
163 | |||
164 | static struct platform_device ohci0_device = { | ||
165 | .name = "tcc-ohci", | ||
166 | .id = 0, | ||
167 | .dev = { | ||
168 | .dma_mask = &tcc8k_dmamask, | ||
169 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
170 | .platform_data = &tcc8k_ohci0_platform_data, | ||
171 | }, | ||
172 | .num_resources = ARRAY_SIZE(tcc8k_ohci0_resources), | ||
173 | .resource = tcc8k_ohci0_resources, | ||
174 | }; | ||
175 | |||
176 | static struct platform_device ohci1_device = { | ||
177 | .name = "tcc-ohci", | ||
178 | .id = 1, | ||
179 | .dev = { | ||
180 | .dma_mask = &tcc8k_dmamask, | ||
181 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
182 | .platform_data = &tcc8k_ohci1_platform_data, | ||
183 | }, | ||
184 | .num_resources = ARRAY_SIZE(tcc8k_ohci1_resources), | ||
185 | .resource = tcc8k_ohci1_resources, | ||
186 | }; | ||
187 | |||
188 | static void __init tcc8k_init_usbhost(void) | ||
189 | { | ||
190 | platform_device_register(&ohci0_device); | ||
191 | platform_device_register(&ohci1_device); | ||
192 | } | ||
193 | #else | ||
194 | static void __init tcc8k_init_usbhost(void) { } | ||
195 | #endif | ||
196 | |||
197 | /* USB device controller*/ | ||
198 | #ifdef CONFIG_USB_GADGET_TCC8K | ||
199 | static struct resource udc_resources[] = { | ||
200 | [0] = { | ||
201 | .start = INT_USBD, | ||
202 | .end = INT_USBD, | ||
203 | .flags = IORESOURCE_IRQ, | ||
204 | }, | ||
205 | [1] = { | ||
206 | .start = INT_UDMA, | ||
207 | .end = INT_UDMA, | ||
208 | .flags = IORESOURCE_IRQ, | ||
209 | }, | ||
210 | }; | ||
211 | |||
212 | static struct platform_device tcc8k_udc_device = { | ||
213 | .name = "tcc-udc", | ||
214 | .id = 0, | ||
215 | .resource = udc_resources, | ||
216 | .num_resources = ARRAY_SIZE(udc_resources), | ||
217 | .dev = { | ||
218 | .dma_mask = &tcc8k_dmamask, | ||
219 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
220 | }, | ||
221 | }; | ||
222 | |||
223 | static void __init tcc8k_init_usb_gadget(void) | ||
224 | { | ||
225 | platform_device_register(&tcc8k_udc_device); | ||
226 | } | ||
227 | #else | ||
228 | static void __init tcc8k_init_usb_gadget(void) { } | ||
229 | #endif /* CONFIG_USB_GADGET_TCC83X */ | ||
230 | |||
231 | static int __init tcc8k_init_devices(void) | ||
232 | { | ||
233 | tcc8k_init_mmc(); | ||
234 | tcc8k_init_usbhost(); | ||
235 | tcc8k_init_usb_gadget(); | ||
236 | return 0; | ||
237 | } | ||
238 | |||
239 | arch_initcall(tcc8k_init_devices); | ||
diff --git a/arch/arm/mach-tcc8k/io.c b/arch/arm/mach-tcc8k/io.c deleted file mode 100644 index 9b39d7fa658f..000000000000 --- a/arch/arm/mach-tcc8k/io.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-tcc8k/io.c | ||
3 | * | ||
4 | * (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
5 | * | ||
6 | * derived from TCC83xx io.c | ||
7 | * Copyright (C) Telechips, Inc. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/kernel.h> | ||
17 | |||
18 | #include <asm/mach/map.h> | ||
19 | |||
20 | #include <mach/tcc8k-regs.h> | ||
21 | |||
22 | /* | ||
23 | * The machine specific code may provide the extra mapping besides the | ||
24 | * default mapping provided here. | ||
25 | */ | ||
26 | static struct map_desc tcc8k_io_desc[] __initdata = { | ||
27 | { | ||
28 | .virtual = (unsigned long)CS1_BASE_VIRT, | ||
29 | .pfn = __phys_to_pfn(CS1_BASE), | ||
30 | .length = CS1_SIZE, | ||
31 | .type = MT_DEVICE, | ||
32 | }, { | ||
33 | .virtual = (unsigned long)AHB_PERI_BASE_VIRT, | ||
34 | .pfn = __phys_to_pfn(AHB_PERI_BASE), | ||
35 | .length = AHB_PERI_SIZE, | ||
36 | .type = MT_DEVICE, | ||
37 | }, { | ||
38 | .virtual = (unsigned long)APB0_PERI_BASE_VIRT, | ||
39 | .pfn = __phys_to_pfn(APB0_PERI_BASE), | ||
40 | .length = APB0_PERI_SIZE, | ||
41 | .type = MT_DEVICE, | ||
42 | }, { | ||
43 | .virtual = (unsigned long)APB1_PERI_BASE_VIRT, | ||
44 | .pfn = __phys_to_pfn(APB1_PERI_BASE), | ||
45 | .length = APB1_PERI_SIZE, | ||
46 | .type = MT_DEVICE, | ||
47 | }, { | ||
48 | .virtual = (unsigned long)EXT_MEM_CTRL_BASE_VIRT, | ||
49 | .pfn = __phys_to_pfn(EXT_MEM_CTRL_BASE), | ||
50 | .length = EXT_MEM_CTRL_SIZE, | ||
51 | .type = MT_DEVICE, | ||
52 | }, | ||
53 | }; | ||
54 | |||
55 | /* | ||
56 | * Maps common IO regions for tcc8k. | ||
57 | * | ||
58 | */ | ||
59 | void __init tcc8k_map_common_io(void) | ||
60 | { | ||
61 | iotable_init(tcc8k_io_desc, ARRAY_SIZE(tcc8k_io_desc)); | ||
62 | } | ||
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c deleted file mode 100644 index 209fa5c65d4c..000000000000 --- a/arch/arm/mach-tcc8k/irq.c +++ /dev/null | |||
@@ -1,111 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) Telechips, Inc. | ||
3 | * Copyright (C) 2009-2010 Hans J. Koch <hjk@linutronix.de> | ||
4 | * | ||
5 | * Licensed under the terms of the GNU GPL version 2. | ||
6 | */ | ||
7 | |||
8 | #include <linux/init.h> | ||
9 | #include <linux/interrupt.h> | ||
10 | #include <linux/io.h> | ||
11 | |||
12 | #include <asm/irq.h> | ||
13 | #include <asm/mach/irq.h> | ||
14 | |||
15 | #include <mach/tcc8k-regs.h> | ||
16 | #include <mach/irqs.h> | ||
17 | |||
18 | #include "common.h" | ||
19 | |||
20 | /* Disable IRQ */ | ||
21 | static void tcc8000_mask_ack_irq0(struct irq_data *d) | ||
22 | { | ||
23 | PIC0_IEN &= ~(1 << d->irq); | ||
24 | PIC0_CREQ |= (1 << d->irq); | ||
25 | } | ||
26 | |||
27 | static void tcc8000_mask_ack_irq1(struct irq_data *d) | ||
28 | { | ||
29 | PIC1_IEN &= ~(1 << (d->irq - 32)); | ||
30 | PIC1_CREQ |= (1 << (d->irq - 32)); | ||
31 | } | ||
32 | |||
33 | static void tcc8000_mask_irq0(struct irq_data *d) | ||
34 | { | ||
35 | PIC0_IEN &= ~(1 << d->irq); | ||
36 | } | ||
37 | |||
38 | static void tcc8000_mask_irq1(struct irq_data *d) | ||
39 | { | ||
40 | PIC1_IEN &= ~(1 << (d->irq - 32)); | ||
41 | } | ||
42 | |||
43 | static void tcc8000_ack_irq0(struct irq_data *d) | ||
44 | { | ||
45 | PIC0_CREQ |= (1 << d->irq); | ||
46 | } | ||
47 | |||
48 | static void tcc8000_ack_irq1(struct irq_data *d) | ||
49 | { | ||
50 | PIC1_CREQ |= (1 << (d->irq - 32)); | ||
51 | } | ||
52 | |||
53 | /* Enable IRQ */ | ||
54 | static void tcc8000_unmask_irq0(struct irq_data *d) | ||
55 | { | ||
56 | PIC0_IEN |= (1 << d->irq); | ||
57 | PIC0_INTOEN |= (1 << d->irq); | ||
58 | } | ||
59 | |||
60 | static void tcc8000_unmask_irq1(struct irq_data *d) | ||
61 | { | ||
62 | PIC1_IEN |= (1 << (d->irq - 32)); | ||
63 | PIC1_INTOEN |= (1 << (d->irq - 32)); | ||
64 | } | ||
65 | |||
66 | static struct irq_chip tcc8000_irq_chip0 = { | ||
67 | .name = "tcc_irq0", | ||
68 | .irq_mask = tcc8000_mask_irq0, | ||
69 | .irq_ack = tcc8000_ack_irq0, | ||
70 | .irq_mask_ack = tcc8000_mask_ack_irq0, | ||
71 | .irq_unmask = tcc8000_unmask_irq0, | ||
72 | }; | ||
73 | |||
74 | static struct irq_chip tcc8000_irq_chip1 = { | ||
75 | .name = "tcc_irq1", | ||
76 | .irq_mask = tcc8000_mask_irq1, | ||
77 | .irq_ack = tcc8000_ack_irq1, | ||
78 | .irq_mask_ack = tcc8000_mask_ack_irq1, | ||
79 | .irq_unmask = tcc8000_unmask_irq1, | ||
80 | }; | ||
81 | |||
82 | void __init tcc8k_init_irq(void) | ||
83 | { | ||
84 | int irqno; | ||
85 | |||
86 | /* Mask and clear all interrupts */ | ||
87 | PIC0_IEN = 0x00000000; | ||
88 | PIC0_CREQ = 0xffffffff; | ||
89 | PIC1_IEN = 0x00000000; | ||
90 | PIC1_CREQ = 0xffffffff; | ||
91 | |||
92 | PIC0_MEN0 = 0x00000003; | ||
93 | PIC1_MEN1 = 0x00000003; | ||
94 | PIC1_MEN = 0x00000003; | ||
95 | |||
96 | /* let all IRQs be level triggered */ | ||
97 | PIC0_TMODE = 0xffffffff; | ||
98 | PIC1_TMODE = 0xffffffff; | ||
99 | /* all IRQs are IRQs (not FIQs) */ | ||
100 | PIC0_IRQSEL = 0xffffffff; | ||
101 | PIC1_IRQSEL = 0xffffffff; | ||
102 | |||
103 | for (irqno = 0; irqno < NR_IRQS; irqno++) { | ||
104 | if (irqno < 32) | ||
105 | irq_set_chip(irqno, &tcc8000_irq_chip0); | ||
106 | else | ||
107 | irq_set_chip(irqno, &tcc8000_irq_chip1); | ||
108 | irq_set_handler(irqno, handle_level_irq); | ||
109 | set_irq_flags(irqno, IRQF_VALID); | ||
110 | } | ||
111 | } | ||
diff --git a/arch/arm/mach-tcc8k/time.c b/arch/arm/mach-tcc8k/time.c deleted file mode 100644 index a96babe83771..000000000000 --- a/arch/arm/mach-tcc8k/time.c +++ /dev/null | |||
@@ -1,134 +0,0 @@ | |||
1 | /* | ||
2 | * TCC8000 system timer setup | ||
3 | * | ||
4 | * (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
5 | * | ||
6 | * Licensed under the terms of the GPL version 2. | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <linux/clk.h> | ||
11 | #include <linux/clockchips.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/io.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/spinlock.h> | ||
18 | |||
19 | #include <asm/mach/time.h> | ||
20 | |||
21 | #include <mach/tcc8k-regs.h> | ||
22 | #include <mach/irqs.h> | ||
23 | |||
24 | #include "common.h" | ||
25 | |||
26 | static void __iomem *timer_base; | ||
27 | |||
28 | static int tcc_set_next_event(unsigned long evt, | ||
29 | struct clock_event_device *unused) | ||
30 | { | ||
31 | unsigned long reg = __raw_readl(timer_base + TC32MCNT_OFFS); | ||
32 | |||
33 | __raw_writel(reg + evt, timer_base + TC32CMP0_OFFS); | ||
34 | return 0; | ||
35 | } | ||
36 | |||
37 | static void tcc_set_mode(enum clock_event_mode mode, | ||
38 | struct clock_event_device *evt) | ||
39 | { | ||
40 | unsigned long tc32irq; | ||
41 | |||
42 | switch (mode) { | ||
43 | case CLOCK_EVT_MODE_ONESHOT: | ||
44 | tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS); | ||
45 | tc32irq |= TC32IRQ_IRQEN0; | ||
46 | __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS); | ||
47 | break; | ||
48 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
49 | case CLOCK_EVT_MODE_UNUSED: | ||
50 | tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS); | ||
51 | tc32irq &= ~TC32IRQ_IRQEN0; | ||
52 | __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS); | ||
53 | break; | ||
54 | case CLOCK_EVT_MODE_PERIODIC: | ||
55 | case CLOCK_EVT_MODE_RESUME: | ||
56 | break; | ||
57 | } | ||
58 | } | ||
59 | |||
60 | static irqreturn_t tcc8k_timer_interrupt(int irq, void *dev_id) | ||
61 | { | ||
62 | struct clock_event_device *evt = dev_id; | ||
63 | |||
64 | /* Acknowledge TC32 interrupt by reading TC32IRQ */ | ||
65 | __raw_readl(timer_base + TC32IRQ_OFFS); | ||
66 | |||
67 | evt->event_handler(evt); | ||
68 | |||
69 | return IRQ_HANDLED; | ||
70 | } | ||
71 | |||
72 | static struct clock_event_device clockevent_tcc = { | ||
73 | .name = "tcc_timer1", | ||
74 | .features = CLOCK_EVT_FEAT_ONESHOT, | ||
75 | .shift = 32, | ||
76 | .set_mode = tcc_set_mode, | ||
77 | .set_next_event = tcc_set_next_event, | ||
78 | .rating = 200, | ||
79 | }; | ||
80 | |||
81 | static struct irqaction tcc8k_timer_irq = { | ||
82 | .name = "TC32_timer", | ||
83 | .flags = IRQF_DISABLED | IRQF_TIMER, | ||
84 | .handler = tcc8k_timer_interrupt, | ||
85 | .dev_id = &clockevent_tcc, | ||
86 | }; | ||
87 | |||
88 | static int __init tcc_clockevent_init(struct clk *clock) | ||
89 | { | ||
90 | unsigned int c = clk_get_rate(clock); | ||
91 | |||
92 | clocksource_mmio_init(timer_base + TC32MCNT_OFFS, "tcc_tc32", c, | ||
93 | 200, 32, clocksource_mmio_readl_up); | ||
94 | |||
95 | clockevent_tcc.mult = div_sc(c, NSEC_PER_SEC, | ||
96 | clockevent_tcc.shift); | ||
97 | clockevent_tcc.max_delta_ns = | ||
98 | clockevent_delta2ns(0xfffffffe, &clockevent_tcc); | ||
99 | clockevent_tcc.min_delta_ns = | ||
100 | clockevent_delta2ns(0xff, &clockevent_tcc); | ||
101 | |||
102 | clockevent_tcc.cpumask = cpumask_of(0); | ||
103 | |||
104 | clockevents_register_device(&clockevent_tcc); | ||
105 | |||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | void __init tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq) | ||
110 | { | ||
111 | u32 reg; | ||
112 | |||
113 | timer_base = base; | ||
114 | tcc8k_timer_irq.irq = irq; | ||
115 | |||
116 | /* Enable clocks */ | ||
117 | clk_enable(clock); | ||
118 | |||
119 | /* Initialize 32-bit timer */ | ||
120 | reg = __raw_readl(timer_base + TC32EN_OFFS); | ||
121 | reg &= ~TC32EN_ENABLE; /* Disable timer */ | ||
122 | __raw_writel(reg, timer_base + TC32EN_OFFS); | ||
123 | /* Free running timer, counting from 0 to 0xffffffff */ | ||
124 | __raw_writel(0, timer_base + TC32EN_OFFS); | ||
125 | __raw_writel(0, timer_base + TC32LDV_OFFS); | ||
126 | reg = __raw_readl(timer_base + TC32IRQ_OFFS); | ||
127 | reg |= TC32IRQ_IRQEN0; /* irq at match with CMP0 */ | ||
128 | __raw_writel(reg, timer_base + TC32IRQ_OFFS); | ||
129 | |||
130 | __raw_writel(TC32EN_ENABLE, timer_base + TC32EN_OFFS); | ||
131 | |||
132 | tcc_clockevent_init(clock); | ||
133 | setup_irq(irq, &tcc8k_timer_irq); | ||
134 | } | ||
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 70f060251f00..c2ff8e020105 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c | |||
@@ -146,5 +146,6 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") | |||
146 | .handle_irq = gic_handle_irq, | 146 | .handle_irq = gic_handle_irq, |
147 | .timer = &tegra_timer, | 147 | .timer = &tegra_timer, |
148 | .init_machine = tegra_dt_init, | 148 | .init_machine = tegra_dt_init, |
149 | .restart = tegra_assert_system_reset, | ||
149 | .dt_compat = tegra20_dt_board_compat, | 150 | .dt_compat = tegra20_dt_board_compat, |
150 | MACHINE_END | 151 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index d60a0d45f2f7..a0f9634f6727 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c | |||
@@ -191,4 +191,5 @@ MACHINE_START(HARMONY, "harmony") | |||
191 | .handle_irq = gic_handle_irq, | 191 | .handle_irq = gic_handle_irq, |
192 | .timer = &tegra_timer, | 192 | .timer = &tegra_timer, |
193 | .init_machine = tegra_harmony_init, | 193 | .init_machine = tegra_harmony_init, |
194 | .restart = tegra_assert_system_reset, | ||
194 | MACHINE_END | 195 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index 8a5245919456..fcf4f377b1dc 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c | |||
@@ -221,4 +221,5 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ") | |||
221 | .handle_irq = gic_handle_irq, | 221 | .handle_irq = gic_handle_irq, |
222 | .timer = &tegra_timer, | 222 | .timer = &tegra_timer, |
223 | .init_machine = tegra_paz00_init, | 223 | .init_machine = tegra_paz00_init, |
224 | .restart = tegra_assert_system_reset, | ||
224 | MACHINE_END | 225 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c index b79f9ce9941c..cfc74d46a09e 100644 --- a/arch/arm/mach-tegra/board-seaboard.c +++ b/arch/arm/mach-tegra/board-seaboard.c | |||
@@ -288,6 +288,7 @@ MACHINE_START(SEABOARD, "seaboard") | |||
288 | .handle_irq = gic_handle_irq, | 288 | .handle_irq = gic_handle_irq, |
289 | .timer = &tegra_timer, | 289 | .timer = &tegra_timer, |
290 | .init_machine = tegra_seaboard_init, | 290 | .init_machine = tegra_seaboard_init, |
291 | .restart = tegra_assert_system_reset, | ||
291 | MACHINE_END | 292 | MACHINE_END |
292 | 293 | ||
293 | MACHINE_START(KAEN, "kaen") | 294 | MACHINE_START(KAEN, "kaen") |
@@ -298,6 +299,7 @@ MACHINE_START(KAEN, "kaen") | |||
298 | .handle_irq = gic_handle_irq, | 299 | .handle_irq = gic_handle_irq, |
299 | .timer = &tegra_timer, | 300 | .timer = &tegra_timer, |
300 | .init_machine = tegra_kaen_init, | 301 | .init_machine = tegra_kaen_init, |
302 | .restart = tegra_assert_system_reset, | ||
301 | MACHINE_END | 303 | MACHINE_END |
302 | 304 | ||
303 | MACHINE_START(WARIO, "wario") | 305 | MACHINE_START(WARIO, "wario") |
@@ -308,4 +310,5 @@ MACHINE_START(WARIO, "wario") | |||
308 | .handle_irq = gic_handle_irq, | 310 | .handle_irq = gic_handle_irq, |
309 | .timer = &tegra_timer, | 311 | .timer = &tegra_timer, |
310 | .init_machine = tegra_wario_init, | 312 | .init_machine = tegra_wario_init, |
313 | .restart = tegra_assert_system_reset, | ||
311 | MACHINE_END | 314 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c index 4a197a20be93..cd52820a3e37 100644 --- a/arch/arm/mach-tegra/board-trimslice.c +++ b/arch/arm/mach-tegra/board-trimslice.c | |||
@@ -180,4 +180,5 @@ MACHINE_START(TRIMSLICE, "trimslice") | |||
180 | .handle_irq = gic_handle_irq, | 180 | .handle_irq = gic_handle_irq, |
181 | .timer = &tegra_timer, | 181 | .timer = &tegra_timer, |
182 | .init_machine = tegra_trimslice_init, | 182 | .init_machine = tegra_trimslice_init, |
183 | .restart = tegra_assert_system_reset, | ||
183 | MACHINE_END | 184 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 72b666bd3043..a2eb90169aed 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
@@ -33,8 +33,6 @@ | |||
33 | #include "clock.h" | 33 | #include "clock.h" |
34 | #include "fuse.h" | 34 | #include "fuse.h" |
35 | 35 | ||
36 | void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset; | ||
37 | |||
38 | #ifdef CONFIG_OF | 36 | #ifdef CONFIG_OF |
39 | static const struct of_device_id tegra_dt_irq_match[] __initconst = { | 37 | static const struct of_device_id tegra_dt_irq_match[] __initconst = { |
40 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, | 38 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, |
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S index ac11262149c7..e577cfe27e72 100644 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/arch/arm/mach-tegra/include/mach/entry-macro.S | |||
@@ -18,21 +18,3 @@ | |||
18 | 18 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | 19 | .macro arch_ret_to_user, tmp1, tmp2 |
20 | .endm | 20 | .endm |
21 | |||
22 | #if !defined(CONFIG_ARM_GIC) | ||
23 | /* legacy interrupt controller for AP16 */ | ||
24 | |||
25 | .macro get_irqnr_preamble, base, tmp | ||
26 | @ enable imprecise aborts | ||
27 | cpsie a | ||
28 | @ EVP base at 0xf010f000 | ||
29 | mov \base, #0xf0000000 | ||
30 | orr \base, #0x00100000 | ||
31 | orr \base, #0x0000f000 | ||
32 | .endm | ||
33 | |||
34 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
35 | ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS | ||
36 | cmp \irqnr, #0x80 | ||
37 | .endm | ||
38 | #endif | ||
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h index 027c4215d313..a312988bf6f8 100644 --- a/arch/arm/mach-tegra/include/mach/system.h +++ b/arch/arm/mach-tegra/include/mach/system.h | |||
@@ -21,10 +21,6 @@ | |||
21 | #ifndef __MACH_TEGRA_SYSTEM_H | 21 | #ifndef __MACH_TEGRA_SYSTEM_H |
22 | #define __MACH_TEGRA_SYSTEM_H | 22 | #define __MACH_TEGRA_SYSTEM_H |
23 | 23 | ||
24 | #include <mach/iomap.h> | ||
25 | |||
26 | extern void (*arch_reset)(char mode, const char *cmd); | ||
27 | |||
28 | static inline void arch_idle(void) | 24 | static inline void arch_idle(void) |
29 | { | 25 | { |
30 | } | 26 | } |
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 004b0fdf0d76..4e1afcd54fae 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c | |||
@@ -29,10 +29,6 @@ | |||
29 | 29 | ||
30 | #include "board.h" | 30 | #include "board.h" |
31 | 31 | ||
32 | #define INT_SYS_NR (INT_GPIO_BASE - INT_PRI_BASE) | ||
33 | #define INT_SYS_SZ (INT_SEC_BASE - INT_PRI_BASE) | ||
34 | #define PPI_NR ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ) | ||
35 | |||
36 | #define ICTLR_CPU_IEP_VFIQ 0x08 | 32 | #define ICTLR_CPU_IEP_VFIQ 0x08 |
37 | #define ICTLR_CPU_IEP_FIR 0x14 | 33 | #define ICTLR_CPU_IEP_FIR 0x14 |
38 | #define ICTLR_CPU_IEP_FIR_SET 0x18 | 34 | #define ICTLR_CPU_IEP_FIR_SET 0x18 |
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index 6366654b54c5..1d1acda4f3e0 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c | |||
@@ -19,7 +19,6 @@ | |||
19 | 19 | ||
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/err.h> | 21 | #include <linux/err.h> |
22 | #include <linux/sched.h> | ||
23 | #include <linux/time.h> | 22 | #include <linux/time.h> |
24 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
25 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
@@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = { | |||
106 | .set_mode = tegra_timer_set_mode, | 105 | .set_mode = tegra_timer_set_mode, |
107 | }; | 106 | }; |
108 | 107 | ||
109 | static DEFINE_CLOCK_DATA(cd); | 108 | static u32 notrace tegra_read_sched_clock(void) |
110 | |||
111 | /* | ||
112 | * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60). | ||
113 | * This gives a resolution of about 1us and a wrap period of about 1h11min. | ||
114 | */ | ||
115 | #define SC_MULT 4194304000u | ||
116 | #define SC_SHIFT 22 | ||
117 | |||
118 | unsigned long long notrace sched_clock(void) | ||
119 | { | ||
120 | u32 cyc = timer_readl(TIMERUS_CNTR_1US); | ||
121 | return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); | ||
122 | } | ||
123 | |||
124 | static void notrace tegra_update_sched_clock(void) | ||
125 | { | 109 | { |
126 | u32 cyc = timer_readl(TIMERUS_CNTR_1US); | 110 | return timer_readl(TIMERUS_CNTR_1US); |
127 | update_sched_clock(&cd, cyc, (u32)~0); | ||
128 | } | 111 | } |
129 | 112 | ||
130 | /* | 113 | /* |
@@ -226,8 +209,7 @@ static void __init tegra_init_timer(void) | |||
226 | WARN(1, "Unknown clock rate"); | 209 | WARN(1, "Unknown clock rate"); |
227 | } | 210 | } |
228 | 211 | ||
229 | init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32, | 212 | setup_sched_clock(tegra_read_sched_clock, 32, 1000000); |
230 | 1000000, SC_MULT, SC_SHIFT); | ||
231 | 213 | ||
232 | if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, | 214 | if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, |
233 | "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { | 215 | "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { |
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index ac0791e924bc..697930761b3e 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c | |||
@@ -1888,3 +1888,23 @@ static int core_module_init(void) | |||
1888 | return mmc_init(&mmcsd_device); | 1888 | return mmc_init(&mmcsd_device); |
1889 | } | 1889 | } |
1890 | module_init(core_module_init); | 1890 | module_init(core_module_init); |
1891 | |||
1892 | /* Forward declare this function from the watchdog */ | ||
1893 | void coh901327_watchdog_reset(void); | ||
1894 | |||
1895 | void u300_restart(char mode, const char *cmd) | ||
1896 | { | ||
1897 | switch (mode) { | ||
1898 | case 's': | ||
1899 | case 'h': | ||
1900 | #ifdef CONFIG_COH901327_WATCHDOG | ||
1901 | coh901327_watchdog_reset(); | ||
1902 | #endif | ||
1903 | break; | ||
1904 | default: | ||
1905 | /* Do nothing */ | ||
1906 | break; | ||
1907 | } | ||
1908 | /* Wait for system do die/reset. */ | ||
1909 | while (1); | ||
1910 | } | ||
diff --git a/arch/arm/mach-u300/include/mach/memory.h b/arch/arm/mach-u300/include/mach/memory.h deleted file mode 100644 index c808f347a081..000000000000 --- a/arch/arm/mach-u300/include/mach/memory.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch/arm/mach-u300/include/mach/memory.h | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2007-2009 ST-Ericsson AB | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * Memory virtual/physical mapping constants. | ||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
10 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | ||
11 | */ | ||
12 | |||
13 | #ifndef __MACH_MEMORY_H | ||
14 | #define __MACH_MEMORY_H | ||
15 | |||
16 | #define PLAT_PHYS_OFFSET UL(0x48000000) | ||
17 | #define BOOT_PARAMS_OFFSET 0x100 | ||
18 | |||
19 | #endif | ||
diff --git a/arch/arm/mach-u300/include/mach/platform.h b/arch/arm/mach-u300/include/mach/platform.h index 77d9210a82e2..096333f32fc3 100644 --- a/arch/arm/mach-u300/include/mach/platform.h +++ b/arch/arm/mach-u300/include/mach/platform.h | |||
@@ -14,6 +14,7 @@ | |||
14 | void u300_map_io(void); | 14 | void u300_map_io(void); |
15 | void u300_init_irq(void); | 15 | void u300_init_irq(void); |
16 | void u300_init_devices(void); | 16 | void u300_init_devices(void); |
17 | void u300_restart(char, const char *); | ||
17 | extern struct sys_timer u300_timer; | 18 | extern struct sys_timer u300_timer; |
18 | 19 | ||
19 | #endif | 20 | #endif |
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h index 6b6fef7a438c..574d46e38290 100644 --- a/arch/arm/mach-u300/include/mach/system.h +++ b/arch/arm/mach-u300/include/mach/system.h | |||
@@ -8,33 +8,7 @@ | |||
8 | * System shutdown and reset functions. | 8 | * System shutdown and reset functions. |
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | 9 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
10 | */ | 10 | */ |
11 | #include <mach/hardware.h> | ||
12 | #include <asm/io.h> | ||
13 | #include <asm/hardware/vic.h> | ||
14 | #include <asm/irq.h> | ||
15 | |||
16 | /* Forward declare this function from the watchdog */ | ||
17 | void coh901327_watchdog_reset(void); | ||
18 | |||
19 | static inline void arch_idle(void) | 11 | static inline void arch_idle(void) |
20 | { | 12 | { |
21 | cpu_do_idle(); | 13 | cpu_do_idle(); |
22 | } | 14 | } |
23 | |||
24 | static void arch_reset(char mode, const char *cmd) | ||
25 | { | ||
26 | switch (mode) { | ||
27 | case 's': | ||
28 | case 'h': | ||
29 | printk(KERN_CRIT "RESET: shutting down/rebooting system\n"); | ||
30 | #ifdef CONFIG_COH901327_WATCHDOG | ||
31 | coh901327_watchdog_reset(); | ||
32 | #endif | ||
33 | break; | ||
34 | default: | ||
35 | /* Do nothing */ | ||
36 | break; | ||
37 | } | ||
38 | /* Wait for system do die/reset. */ | ||
39 | while (1); | ||
40 | } | ||
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c index 5f51bdeef0ef..bc1c7897e82d 100644 --- a/arch/arm/mach-u300/timer.c +++ b/arch/arm/mach-u300/timer.c | |||
@@ -9,7 +9,6 @@ | |||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | 9 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
10 | */ | 10 | */ |
11 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
12 | #include <linux/sched.h> | ||
13 | #include <linux/time.h> | 12 | #include <linux/time.h> |
14 | #include <linux/timex.h> | 13 | #include <linux/timex.h> |
15 | #include <linux/clockchips.h> | 14 | #include <linux/clockchips.h> |
@@ -337,18 +336,10 @@ static struct irqaction u300_timer_irq = { | |||
337 | * this wraps around for now, since it is just a relative time | 336 | * this wraps around for now, since it is just a relative time |
338 | * stamp. (Inspired by OMAP implementation.) | 337 | * stamp. (Inspired by OMAP implementation.) |
339 | */ | 338 | */ |
340 | static DEFINE_CLOCK_DATA(cd); | ||
341 | 339 | ||
342 | unsigned long long notrace sched_clock(void) | 340 | static u32 notrace u300_read_sched_clock(void) |
343 | { | 341 | { |
344 | u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC); | 342 | return readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC); |
345 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
346 | } | ||
347 | |||
348 | static void notrace u300_update_sched_clock(void) | ||
349 | { | ||
350 | u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC); | ||
351 | update_sched_clock(&cd, cyc, (u32)~0); | ||
352 | } | 343 | } |
353 | 344 | ||
354 | 345 | ||
@@ -366,7 +357,7 @@ static void __init u300_timer_init(void) | |||
366 | clk_enable(clk); | 357 | clk_enable(clk); |
367 | rate = clk_get_rate(clk); | 358 | rate = clk_get_rate(clk); |
368 | 359 | ||
369 | init_sched_clock(&cd, u300_update_sched_clock, 32, rate); | 360 | setup_sched_clock(u300_read_sched_clock, 32, rate); |
370 | 361 | ||
371 | /* | 362 | /* |
372 | * Disable the "OS" and "DD" timers - these are designed for Symbian! | 363 | * Disable the "OS" and "DD" timers - these are designed for Symbian! |
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c index 4a4fd334eb6e..f30c69d91d99 100644 --- a/arch/arm/mach-u300/u300.c +++ b/arch/arm/mach-u300/u300.c | |||
@@ -47,10 +47,11 @@ static void __init u300_init_machine(void) | |||
47 | 47 | ||
48 | MACHINE_START(U300, MACH_U300_STRING) | 48 | MACHINE_START(U300, MACH_U300_STRING) |
49 | /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ | 49 | /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ |
50 | .atag_offset = BOOT_PARAMS_OFFSET, | 50 | .atag_offset = 0x100, |
51 | .map_io = u300_map_io, | 51 | .map_io = u300_map_io, |
52 | .init_irq = u300_init_irq, | 52 | .init_irq = u300_init_irq, |
53 | .handle_irq = vic_handle_irq, | 53 | .handle_irq = vic_handle_irq, |
54 | .timer = &u300_timer, | 54 | .timer = &u300_timer, |
55 | .init_machine = u300_init_machine, | 55 | .init_machine = u300_init_machine, |
56 | .restart = u300_restart, | ||
56 | MACHINE_END | 57 | MACHINE_END |
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c index 9de1af008094..5323286b265e 100644 --- a/arch/arm/mach-ux500/cpu-db5500.c +++ b/arch/arm/mach-ux500/cpu-db5500.c | |||
@@ -30,12 +30,11 @@ static struct map_desc u5500_uart_io_desc[] __initdata = { | |||
30 | }; | 30 | }; |
31 | 31 | ||
32 | static struct map_desc u5500_io_desc[] __initdata = { | 32 | static struct map_desc u5500_io_desc[] __initdata = { |
33 | __IO_DEV_DESC(U5500_GIC_CPU_BASE, SZ_4K), | 33 | /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ |
34 | __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K), | ||
34 | __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K), | 35 | __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K), |
35 | __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K), | 36 | __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K), |
36 | __IO_DEV_DESC(U5500_TWD_BASE, SZ_4K), | ||
37 | __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K), | 37 | __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K), |
38 | __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K), | ||
39 | __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K), | 38 | __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K), |
40 | 39 | ||
41 | __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K), | 40 | __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K), |
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 13e8890a8b8a..7f2729c05db3 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
@@ -35,12 +35,11 @@ static struct map_desc u8500_uart_io_desc[] __initdata = { | |||
35 | }; | 35 | }; |
36 | 36 | ||
37 | static struct map_desc u8500_io_desc[] __initdata = { | 37 | static struct map_desc u8500_io_desc[] __initdata = { |
38 | __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K), | 38 | /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ |
39 | __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), | ||
39 | __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), | 40 | __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), |
40 | __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), | 41 | __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), |
41 | __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K), | ||
42 | __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), | 42 | __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), |
43 | __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), | ||
44 | __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), | 43 | __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), |
45 | 44 | ||
46 | __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), | 45 | __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), |
diff --git a/arch/arm/mach-ux500/include/mach/gpio.h b/arch/arm/mach-ux500/include/mach/gpio.h index 7389df911b1a..c01ef66537f3 100644 --- a/arch/arm/mach-ux500/include/mach/gpio.h +++ b/arch/arm/mach-ux500/include/mach/gpio.h | |||
@@ -1,10 +1,5 @@ | |||
1 | #ifndef __ASM_ARCH_GPIO_H | 1 | #ifndef __ASM_ARCH_GPIO_H |
2 | #define __ASM_ARCH_GPIO_H | 2 | #define __ASM_ARCH_GPIO_H |
3 | 3 | ||
4 | /* | ||
5 | * 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough | ||
6 | * room for a couple of GPIO expanders. | ||
7 | */ | ||
8 | #define ARCH_NR_GPIOS 350 | ||
9 | 4 | ||
10 | #endif /* __ASM_ARCH_GPIO_H */ | 5 | #endif /* __ASM_ARCH_GPIO_H */ |
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h index c0cd8006f1a2..258e5c919c24 100644 --- a/arch/arm/mach-ux500/include/mach/system.h +++ b/arch/arm/mach-ux500/include/mach/system.h | |||
@@ -17,9 +17,4 @@ static inline void arch_idle(void) | |||
17 | cpu_do_idle(); | 17 | cpu_do_idle(); |
18 | } | 18 | } |
19 | 19 | ||
20 | static inline void arch_reset(char mode, const char *cmd) | ||
21 | { | ||
22 | /* yet to be implemented - TODO */ | ||
23 | } | ||
24 | |||
25 | #endif | 20 | #endif |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 4d8dfc15f3e6..cbcda61162d3 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -740,6 +740,19 @@ static void versatile_leds_event(led_event_t ledevt) | |||
740 | } | 740 | } |
741 | #endif /* CONFIG_LEDS */ | 741 | #endif /* CONFIG_LEDS */ |
742 | 742 | ||
743 | void versatile_restart(char mode, const char *cmd) | ||
744 | { | ||
745 | void __iomem *sys = __io_address(VERSATILE_SYS_BASE); | ||
746 | u32 val; | ||
747 | |||
748 | val = __raw_readl(sys + VERSATILE_SYS_RESETCTL_OFFSET); | ||
749 | val |= 0x105; | ||
750 | |||
751 | __raw_writel(0xa05f, sys + VERSATILE_SYS_LOCK_OFFSET); | ||
752 | __raw_writel(val, sys + VERSATILE_SYS_RESETCTL_OFFSET); | ||
753 | __raw_writel(0, sys + VERSATILE_SYS_LOCK_OFFSET); | ||
754 | } | ||
755 | |||
743 | /* Early initializations */ | 756 | /* Early initializations */ |
744 | void __init versatile_init_early(void) | 757 | void __init versatile_init_early(void) |
745 | { | 758 | { |
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h index e01422700ebb..2ef2f555f315 100644 --- a/arch/arm/mach-versatile/core.h +++ b/arch/arm/mach-versatile/core.h | |||
@@ -30,6 +30,7 @@ extern void __init versatile_init_early(void); | |||
30 | extern void __init versatile_init_irq(void); | 30 | extern void __init versatile_init_irq(void); |
31 | extern void __init versatile_map_io(void); | 31 | extern void __init versatile_map_io(void); |
32 | extern struct sys_timer versatile_timer; | 32 | extern struct sys_timer versatile_timer; |
33 | extern void versatile_restart(char, const char *); | ||
33 | extern unsigned int mmc_status(struct device *dev); | 34 | extern unsigned int mmc_status(struct device *dev); |
34 | #ifdef CONFIG_OF | 35 | #ifdef CONFIG_OF |
35 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; | 36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; |
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h index 8ffc12a7cb25..f3fa347895f0 100644 --- a/arch/arm/mach-versatile/include/mach/system.h +++ b/arch/arm/mach-versatile/include/mach/system.h | |||
@@ -21,10 +21,6 @@ | |||
21 | #ifndef __ASM_ARCH_SYSTEM_H | 21 | #ifndef __ASM_ARCH_SYSTEM_H |
22 | #define __ASM_ARCH_SYSTEM_H | 22 | #define __ASM_ARCH_SYSTEM_H |
23 | 23 | ||
24 | #include <linux/io.h> | ||
25 | #include <mach/hardware.h> | ||
26 | #include <mach/platform.h> | ||
27 | |||
28 | static inline void arch_idle(void) | 24 | static inline void arch_idle(void) |
29 | { | 25 | { |
30 | /* | 26 | /* |
@@ -34,16 +30,4 @@ static inline void arch_idle(void) | |||
34 | cpu_do_idle(); | 30 | cpu_do_idle(); |
35 | } | 31 | } |
36 | 32 | ||
37 | static inline void arch_reset(char mode, const char *cmd) | ||
38 | { | ||
39 | u32 val; | ||
40 | |||
41 | val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7; | ||
42 | val |= 0x105; | ||
43 | |||
44 | __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK)); | ||
45 | __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL)); | ||
46 | __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK)); | ||
47 | } | ||
48 | |||
49 | #endif | 33 | #endif |
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c index c83a1f379f7a..63b8dd2b9f4d 100644 --- a/arch/arm/mach-versatile/versatile_ab.c +++ b/arch/arm/mach-versatile/versatile_ab.c | |||
@@ -43,4 +43,5 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB") | |||
43 | .handle_irq = vic_handle_irq, | 43 | .handle_irq = vic_handle_irq, |
44 | .timer = &versatile_timer, | 44 | .timer = &versatile_timer, |
45 | .init_machine = versatile_init, | 45 | .init_machine = versatile_init, |
46 | .restart = versatile_restart, | ||
46 | MACHINE_END | 47 | MACHINE_END |
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c index f4d1e0f072c8..ae5ad3c8f3dd 100644 --- a/arch/arm/mach-versatile/versatile_dt.c +++ b/arch/arm/mach-versatile/versatile_dt.c | |||
@@ -50,4 +50,5 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)") | |||
50 | .timer = &versatile_timer, | 50 | .timer = &versatile_timer, |
51 | .init_machine = versatile_dt_init, | 51 | .init_machine = versatile_dt_init, |
52 | .dt_compat = versatile_dt_match, | 52 | .dt_compat = versatile_dt_match, |
53 | .restart = versatile_restart, | ||
53 | MACHINE_END | 54 | MACHINE_END |
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 4d31eeb6c101..7aab79b665e7 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c | |||
@@ -111,4 +111,5 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") | |||
111 | .handle_irq = vic_handle_irq, | 111 | .handle_irq = vic_handle_irq, |
112 | .timer = &versatile_timer, | 112 | .timer = &versatile_timer, |
113 | .init_machine = versatile_pb_init, | 113 | .init_machine = versatile_pb_init, |
114 | .restart = versatile_restart, | ||
114 | MACHINE_END | 115 | MACHINE_END |
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 931148487f0b..9b3d0fbaee72 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig | |||
@@ -8,5 +8,7 @@ config ARCH_VEXPRESS_CA9X4 | |||
8 | select ARM_ERRATA_720789 | 8 | select ARM_ERRATA_720789 |
9 | select ARM_ERRATA_751472 | 9 | select ARM_ERRATA_751472 |
10 | select ARM_ERRATA_753970 | 10 | select ARM_ERRATA_753970 |
11 | select HAVE_SMP | ||
12 | select MIGHT_HAVE_CACHE_L2X0 | ||
11 | 13 | ||
12 | endmenu | 14 | endmenu |
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h index 899a4e628a4c..f653a8e265bd 100644 --- a/arch/arm/mach-vexpress/include/mach/system.h +++ b/arch/arm/mach-vexpress/include/mach/system.h | |||
@@ -30,8 +30,4 @@ static inline void arch_idle(void) | |||
30 | cpu_do_idle(); | 30 | cpu_do_idle(); |
31 | } | 31 | } |
32 | 32 | ||
33 | static inline void arch_reset(char mode, const char *cmd) | ||
34 | { | ||
35 | } | ||
36 | |||
37 | #endif | 33 | #endif |
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 7aa07a8ce232..6dd10e320ef6 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -438,7 +438,6 @@ static void __init v2m_init(void) | |||
438 | amba_device_register(v2m_amba_devs[i], &iomem_resource); | 438 | amba_device_register(v2m_amba_devs[i], &iomem_resource); |
439 | 439 | ||
440 | pm_power_off = v2m_power_off; | 440 | pm_power_off = v2m_power_off; |
441 | arm_pm_restart = v2m_restart; | ||
442 | 441 | ||
443 | ct_desc->init_tile(); | 442 | ct_desc->init_tile(); |
444 | } | 443 | } |
@@ -451,4 +450,5 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express") | |||
451 | .timer = &v2m_timer, | 450 | .timer = &v2m_timer, |
452 | .handle_irq = gic_handle_irq, | 451 | .handle_irq = gic_handle_irq, |
453 | .init_machine = v2m_init, | 452 | .init_machine = v2m_init, |
453 | .restart = v2m_restart, | ||
454 | MACHINE_END | 454 | MACHINE_END |
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c index 0a235e502330..604e1db266e8 100644 --- a/arch/arm/mach-w90x900/cpu.c +++ b/arch/arm/mach-w90x900/cpu.c | |||
@@ -33,9 +33,11 @@ | |||
33 | #include <mach/regs-serial.h> | 33 | #include <mach/regs-serial.h> |
34 | #include <mach/regs-clock.h> | 34 | #include <mach/regs-clock.h> |
35 | #include <mach/regs-ebi.h> | 35 | #include <mach/regs-ebi.h> |
36 | #include <mach/regs-timer.h> | ||
36 | 37 | ||
37 | #include "cpu.h" | 38 | #include "cpu.h" |
38 | #include "clock.h" | 39 | #include "clock.h" |
40 | #include "nuc9xx.h" | ||
39 | 41 | ||
40 | /* Initial IO mappings */ | 42 | /* Initial IO mappings */ |
41 | 43 | ||
@@ -222,3 +224,17 @@ void __init nuc900_init_clocks(void) | |||
222 | clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs)); | 224 | clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs)); |
223 | } | 225 | } |
224 | 226 | ||
227 | #define WTCR (TMR_BA + 0x1C) | ||
228 | #define WTCLK (1 << 10) | ||
229 | #define WTE (1 << 7) | ||
230 | #define WTRE (1 << 1) | ||
231 | |||
232 | void nuc9xx_restart(char mode, const char *cmd) | ||
233 | { | ||
234 | if (mode == 's') { | ||
235 | /* Jump into ROM at address 0 */ | ||
236 | soft_restart(0); | ||
237 | } else { | ||
238 | __raw_writel(WTE | WTRE | WTCLK, WTCR); | ||
239 | } | ||
240 | } | ||
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h index 68875a1c16be..2aaeb9311619 100644 --- a/arch/arm/mach-w90x900/include/mach/system.h +++ b/arch/arm/mach-w90x900/include/mach/system.h | |||
@@ -14,28 +14,6 @@ | |||
14 | * (at your option) any later version. | 14 | * (at your option) any later version. |
15 | * | 15 | * |
16 | */ | 16 | */ |
17 | |||
18 | #include <linux/io.h> | ||
19 | #include <asm/proc-fns.h> | ||
20 | #include <mach/map.h> | ||
21 | #include <mach/regs-timer.h> | ||
22 | |||
23 | #define WTCR (TMR_BA + 0x1C) | ||
24 | #define WTCLK (1 << 10) | ||
25 | #define WTE (1 << 7) | ||
26 | #define WTRE (1 << 1) | ||
27 | |||
28 | static void arch_idle(void) | 17 | static void arch_idle(void) |
29 | { | 18 | { |
30 | } | 19 | } |
31 | |||
32 | static void arch_reset(char mode, const char *cmd) | ||
33 | { | ||
34 | if (mode == 's') { | ||
35 | /* Jump into ROM at address 0 */ | ||
36 | soft_restart(0); | ||
37 | } else { | ||
38 | __raw_writel(WTE | WTRE | WTCLK, WTCR); | ||
39 | } | ||
40 | } | ||
41 | |||
diff --git a/arch/arm/mach-w90x900/mach-nuc910evb.c b/arch/arm/mach-w90x900/mach-nuc910evb.c index 31c109018228..b4243e4f1565 100644 --- a/arch/arm/mach-w90x900/mach-nuc910evb.c +++ b/arch/arm/mach-w90x900/mach-nuc910evb.c | |||
@@ -38,4 +38,5 @@ MACHINE_START(W90P910EVB, "W90P910EVB") | |||
38 | .init_irq = nuc900_init_irq, | 38 | .init_irq = nuc900_init_irq, |
39 | .init_machine = nuc910evb_init, | 39 | .init_machine = nuc910evb_init, |
40 | .timer = &nuc900_timer, | 40 | .timer = &nuc900_timer, |
41 | .restart = nuc9xx_restart, | ||
41 | MACHINE_END | 42 | MACHINE_END |
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c index 4062e55a57d8..067d8f9166dc 100644 --- a/arch/arm/mach-w90x900/mach-nuc950evb.c +++ b/arch/arm/mach-w90x900/mach-nuc950evb.c | |||
@@ -41,4 +41,5 @@ MACHINE_START(W90P950EVB, "W90P950EVB") | |||
41 | .init_irq = nuc900_init_irq, | 41 | .init_irq = nuc900_init_irq, |
42 | .init_machine = nuc950evb_init, | 42 | .init_machine = nuc950evb_init, |
43 | .timer = &nuc900_timer, | 43 | .timer = &nuc900_timer, |
44 | .restart = nuc9xx_restart, | ||
44 | MACHINE_END | 45 | MACHINE_END |
diff --git a/arch/arm/mach-w90x900/mach-nuc960evb.c b/arch/arm/mach-w90x900/mach-nuc960evb.c index 0ab9995d5b58..cbb3adc3db10 100644 --- a/arch/arm/mach-w90x900/mach-nuc960evb.c +++ b/arch/arm/mach-w90x900/mach-nuc960evb.c | |||
@@ -38,4 +38,5 @@ MACHINE_START(W90N960EVB, "W90N960EVB") | |||
38 | .init_irq = nuc900_init_irq, | 38 | .init_irq = nuc900_init_irq, |
39 | .init_machine = nuc960evb_init, | 39 | .init_machine = nuc960evb_init, |
40 | .timer = &nuc900_timer, | 40 | .timer = &nuc900_timer, |
41 | .restart = nuc9xx_restart, | ||
41 | MACHINE_END | 42 | MACHINE_END |
diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h index 847c4f3e0440..91acb4047793 100644 --- a/arch/arm/mach-w90x900/nuc9xx.h +++ b/arch/arm/mach-w90x900/nuc9xx.h | |||
@@ -21,3 +21,4 @@ struct sys_timer; | |||
21 | 21 | ||
22 | extern void nuc900_init_irq(void); | 22 | extern void nuc900_init_irq(void); |
23 | extern struct sys_timer nuc900_timer; | 23 | extern struct sys_timer nuc900_timer; |
24 | extern void nuc9xx_restart(char, const char *); | ||
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h index 1b84d705c675..8e88e0b8d2ba 100644 --- a/arch/arm/mach-zynq/include/mach/system.h +++ b/arch/arm/mach-zynq/include/mach/system.h | |||
@@ -20,9 +20,4 @@ static inline void arch_idle(void) | |||
20 | cpu_do_idle(); | 20 | cpu_do_idle(); |
21 | } | 21 | } |
22 | 22 | ||
23 | static inline void arch_reset(char mode, const char *cmd) | ||
24 | { | ||
25 | /* Add architecture specific reset processing here */ | ||
26 | } | ||
27 | |||
28 | #endif | 23 | #endif |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 5cf7922ff5e7..4cefb57d9ed2 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -833,14 +833,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH | |||
833 | Say Y here to use the Feroceon L2 cache in writethrough mode. | 833 | Say Y here to use the Feroceon L2 cache in writethrough mode. |
834 | Unless you specifically require this, say N for writeback mode. | 834 | Unless you specifically require this, say N for writeback mode. |
835 | 835 | ||
836 | config MIGHT_HAVE_CACHE_L2X0 | ||
837 | bool | ||
838 | help | ||
839 | This option should be selected by machines which have a L2x0 | ||
840 | or PL310 cache controller, but where its use is optional. | ||
841 | |||
842 | The only effect of this option is to make CACHE_L2X0 and | ||
843 | related options available to the user for configuration. | ||
844 | |||
845 | Boards or SoCs which always require the cache controller | ||
846 | support to be present should select CACHE_L2X0 directly | ||
847 | instead of this option, thus preventing the user from | ||
848 | inadvertently configuring a broken kernel. | ||
849 | |||
836 | config CACHE_L2X0 | 850 | config CACHE_L2X0 |
837 | bool "Enable the L2x0 outer cache controller" | 851 | bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0 |
838 | depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ | 852 | default MIGHT_HAVE_CACHE_L2X0 |
839 | REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \ | ||
840 | ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ | ||
841 | ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \ | ||
842 | ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK | ||
843 | default y | ||
844 | select OUTER_CACHE | 853 | select OUTER_CACHE |
845 | select OUTER_CACHE_SYNC | 854 | select OUTER_CACHE_SYNC |
846 | help | 855 | help |
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index eb5520fc755f..bb7eac381a8e 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c | |||
@@ -220,7 +220,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma) | |||
220 | 220 | ||
221 | static int __kprobes | 221 | static int __kprobes |
222 | __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr, | 222 | __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr, |
223 | struct task_struct *tsk) | 223 | unsigned int flags, struct task_struct *tsk) |
224 | { | 224 | { |
225 | struct vm_area_struct *vma; | 225 | struct vm_area_struct *vma; |
226 | int fault; | 226 | int fault; |
@@ -242,18 +242,7 @@ good_area: | |||
242 | goto out; | 242 | goto out; |
243 | } | 243 | } |
244 | 244 | ||
245 | /* | 245 | return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags); |
246 | * If for any reason at all we couldn't handle the fault, make | ||
247 | * sure we exit gracefully rather than endlessly redo the fault. | ||
248 | */ | ||
249 | fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & FSR_WRITE) ? FAULT_FLAG_WRITE : 0); | ||
250 | if (unlikely(fault & VM_FAULT_ERROR)) | ||
251 | return fault; | ||
252 | if (fault & VM_FAULT_MAJOR) | ||
253 | tsk->maj_flt++; | ||
254 | else | ||
255 | tsk->min_flt++; | ||
256 | return fault; | ||
257 | 246 | ||
258 | check_stack: | 247 | check_stack: |
259 | if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) | 248 | if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) |
@@ -268,6 +257,9 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
268 | struct task_struct *tsk; | 257 | struct task_struct *tsk; |
269 | struct mm_struct *mm; | 258 | struct mm_struct *mm; |
270 | int fault, sig, code; | 259 | int fault, sig, code; |
260 | int write = fsr & FSR_WRITE; | ||
261 | unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE | | ||
262 | (write ? FAULT_FLAG_WRITE : 0); | ||
271 | 263 | ||
272 | if (notify_page_fault(regs, fsr)) | 264 | if (notify_page_fault(regs, fsr)) |
273 | return 0; | 265 | return 0; |
@@ -294,6 +286,7 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
294 | if (!down_read_trylock(&mm->mmap_sem)) { | 286 | if (!down_read_trylock(&mm->mmap_sem)) { |
295 | if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc)) | 287 | if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc)) |
296 | goto no_context; | 288 | goto no_context; |
289 | retry: | ||
297 | down_read(&mm->mmap_sem); | 290 | down_read(&mm->mmap_sem); |
298 | } else { | 291 | } else { |
299 | /* | 292 | /* |
@@ -309,14 +302,41 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
309 | #endif | 302 | #endif |
310 | } | 303 | } |
311 | 304 | ||
312 | fault = __do_page_fault(mm, addr, fsr, tsk); | 305 | fault = __do_page_fault(mm, addr, fsr, flags, tsk); |
313 | up_read(&mm->mmap_sem); | 306 | |
307 | /* If we need to retry but a fatal signal is pending, handle the | ||
308 | * signal first. We do not need to release the mmap_sem because | ||
309 | * it would already be released in __lock_page_or_retry in | ||
310 | * mm/filemap.c. */ | ||
311 | if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) | ||
312 | return 0; | ||
313 | |||
314 | /* | ||
315 | * Major/minor page fault accounting is only done on the | ||
316 | * initial attempt. If we go through a retry, it is extremely | ||
317 | * likely that the page will be found in page cache at that point. | ||
318 | */ | ||
314 | 319 | ||
315 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); | 320 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); |
316 | if (fault & VM_FAULT_MAJOR) | 321 | if (flags & FAULT_FLAG_ALLOW_RETRY) { |
317 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, addr); | 322 | if (fault & VM_FAULT_MAJOR) { |
318 | else if (fault & VM_FAULT_MINOR) | 323 | tsk->maj_flt++; |
319 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, addr); | 324 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, |
325 | regs, addr); | ||
326 | } else { | ||
327 | tsk->min_flt++; | ||
328 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, | ||
329 | regs, addr); | ||
330 | } | ||
331 | if (fault & VM_FAULT_RETRY) { | ||
332 | /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk | ||
333 | * of starvation. */ | ||
334 | flags &= ~FAULT_FLAG_ALLOW_RETRY; | ||
335 | goto retry; | ||
336 | } | ||
337 | } | ||
338 | |||
339 | up_read(&mm->mmap_sem); | ||
320 | 340 | ||
321 | /* | 341 | /* |
322 | * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR | 342 | * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR |
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c index 44b628e4d6ea..ce8cb1970d7a 100644 --- a/arch/arm/mm/mmap.c +++ b/arch/arm/mm/mmap.c | |||
@@ -11,10 +11,49 @@ | |||
11 | #include <linux/random.h> | 11 | #include <linux/random.h> |
12 | #include <asm/cachetype.h> | 12 | #include <asm/cachetype.h> |
13 | 13 | ||
14 | static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr, | ||
15 | unsigned long pgoff) | ||
16 | { | ||
17 | unsigned long base = addr & ~(SHMLBA-1); | ||
18 | unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1); | ||
19 | |||
20 | if (base + off <= addr) | ||
21 | return base + off; | ||
22 | |||
23 | return base - off; | ||
24 | } | ||
25 | |||
14 | #define COLOUR_ALIGN(addr,pgoff) \ | 26 | #define COLOUR_ALIGN(addr,pgoff) \ |
15 | ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ | 27 | ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ |
16 | (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1))) | 28 | (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1))) |
17 | 29 | ||
30 | /* gap between mmap and stack */ | ||
31 | #define MIN_GAP (128*1024*1024UL) | ||
32 | #define MAX_GAP ((TASK_SIZE)/6*5) | ||
33 | |||
34 | static int mmap_is_legacy(void) | ||
35 | { | ||
36 | if (current->personality & ADDR_COMPAT_LAYOUT) | ||
37 | return 1; | ||
38 | |||
39 | if (rlimit(RLIMIT_STACK) == RLIM_INFINITY) | ||
40 | return 1; | ||
41 | |||
42 | return sysctl_legacy_va_layout; | ||
43 | } | ||
44 | |||
45 | static unsigned long mmap_base(unsigned long rnd) | ||
46 | { | ||
47 | unsigned long gap = rlimit(RLIMIT_STACK); | ||
48 | |||
49 | if (gap < MIN_GAP) | ||
50 | gap = MIN_GAP; | ||
51 | else if (gap > MAX_GAP) | ||
52 | gap = MAX_GAP; | ||
53 | |||
54 | return PAGE_ALIGN(TASK_SIZE - gap - rnd); | ||
55 | } | ||
56 | |||
18 | /* | 57 | /* |
19 | * We need to ensure that shared mappings are correctly aligned to | 58 | * We need to ensure that shared mappings are correctly aligned to |
20 | * avoid aliasing issues with VIPT caches. We need to ensure that | 59 | * avoid aliasing issues with VIPT caches. We need to ensure that |
@@ -68,13 +107,9 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, | |||
68 | if (len > mm->cached_hole_size) { | 107 | if (len > mm->cached_hole_size) { |
69 | start_addr = addr = mm->free_area_cache; | 108 | start_addr = addr = mm->free_area_cache; |
70 | } else { | 109 | } else { |
71 | start_addr = addr = TASK_UNMAPPED_BASE; | 110 | start_addr = addr = mm->mmap_base; |
72 | mm->cached_hole_size = 0; | 111 | mm->cached_hole_size = 0; |
73 | } | 112 | } |
74 | /* 8 bits of randomness in 20 address space bits */ | ||
75 | if ((current->flags & PF_RANDOMIZE) && | ||
76 | !(current->personality & ADDR_NO_RANDOMIZE)) | ||
77 | addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT; | ||
78 | 113 | ||
79 | full_search: | 114 | full_search: |
80 | if (do_align) | 115 | if (do_align) |
@@ -111,6 +146,134 @@ full_search: | |||
111 | } | 146 | } |
112 | } | 147 | } |
113 | 148 | ||
149 | unsigned long | ||
150 | arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, | ||
151 | const unsigned long len, const unsigned long pgoff, | ||
152 | const unsigned long flags) | ||
153 | { | ||
154 | struct vm_area_struct *vma; | ||
155 | struct mm_struct *mm = current->mm; | ||
156 | unsigned long addr = addr0; | ||
157 | int do_align = 0; | ||
158 | int aliasing = cache_is_vipt_aliasing(); | ||
159 | |||
160 | /* | ||
161 | * We only need to do colour alignment if either the I or D | ||
162 | * caches alias. | ||
163 | */ | ||
164 | if (aliasing) | ||
165 | do_align = filp || (flags & MAP_SHARED); | ||
166 | |||
167 | /* requested length too big for entire address space */ | ||
168 | if (len > TASK_SIZE) | ||
169 | return -ENOMEM; | ||
170 | |||
171 | if (flags & MAP_FIXED) { | ||
172 | if (aliasing && flags & MAP_SHARED && | ||
173 | (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)) | ||
174 | return -EINVAL; | ||
175 | return addr; | ||
176 | } | ||
177 | |||
178 | /* requesting a specific address */ | ||
179 | if (addr) { | ||
180 | if (do_align) | ||
181 | addr = COLOUR_ALIGN(addr, pgoff); | ||
182 | else | ||
183 | addr = PAGE_ALIGN(addr); | ||
184 | vma = find_vma(mm, addr); | ||
185 | if (TASK_SIZE - len >= addr && | ||
186 | (!vma || addr + len <= vma->vm_start)) | ||
187 | return addr; | ||
188 | } | ||
189 | |||
190 | /* check if free_area_cache is useful for us */ | ||
191 | if (len <= mm->cached_hole_size) { | ||
192 | mm->cached_hole_size = 0; | ||
193 | mm->free_area_cache = mm->mmap_base; | ||
194 | } | ||
195 | |||
196 | /* either no address requested or can't fit in requested address hole */ | ||
197 | addr = mm->free_area_cache; | ||
198 | if (do_align) { | ||
199 | unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff); | ||
200 | addr = base + len; | ||
201 | } | ||
202 | |||
203 | /* make sure it can fit in the remaining address space */ | ||
204 | if (addr > len) { | ||
205 | vma = find_vma(mm, addr-len); | ||
206 | if (!vma || addr <= vma->vm_start) | ||
207 | /* remember the address as a hint for next time */ | ||
208 | return (mm->free_area_cache = addr-len); | ||
209 | } | ||
210 | |||
211 | if (mm->mmap_base < len) | ||
212 | goto bottomup; | ||
213 | |||
214 | addr = mm->mmap_base - len; | ||
215 | if (do_align) | ||
216 | addr = COLOUR_ALIGN_DOWN(addr, pgoff); | ||
217 | |||
218 | do { | ||
219 | /* | ||
220 | * Lookup failure means no vma is above this address, | ||
221 | * else if new region fits below vma->vm_start, | ||
222 | * return with success: | ||
223 | */ | ||
224 | vma = find_vma(mm, addr); | ||
225 | if (!vma || addr+len <= vma->vm_start) | ||
226 | /* remember the address as a hint for next time */ | ||
227 | return (mm->free_area_cache = addr); | ||
228 | |||
229 | /* remember the largest hole we saw so far */ | ||
230 | if (addr + mm->cached_hole_size < vma->vm_start) | ||
231 | mm->cached_hole_size = vma->vm_start - addr; | ||
232 | |||
233 | /* try just below the current vma->vm_start */ | ||
234 | addr = vma->vm_start - len; | ||
235 | if (do_align) | ||
236 | addr = COLOUR_ALIGN_DOWN(addr, pgoff); | ||
237 | } while (len < vma->vm_start); | ||
238 | |||
239 | bottomup: | ||
240 | /* | ||
241 | * A failed mmap() very likely causes application failure, | ||
242 | * so fall back to the bottom-up function here. This scenario | ||
243 | * can happen with large stack limits and large mmap() | ||
244 | * allocations. | ||
245 | */ | ||
246 | mm->cached_hole_size = ~0UL; | ||
247 | mm->free_area_cache = TASK_UNMAPPED_BASE; | ||
248 | addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags); | ||
249 | /* | ||
250 | * Restore the topdown base: | ||
251 | */ | ||
252 | mm->free_area_cache = mm->mmap_base; | ||
253 | mm->cached_hole_size = ~0UL; | ||
254 | |||
255 | return addr; | ||
256 | } | ||
257 | |||
258 | void arch_pick_mmap_layout(struct mm_struct *mm) | ||
259 | { | ||
260 | unsigned long random_factor = 0UL; | ||
261 | |||
262 | /* 8 bits of randomness in 20 address space bits */ | ||
263 | if ((current->flags & PF_RANDOMIZE) && | ||
264 | !(current->personality & ADDR_NO_RANDOMIZE)) | ||
265 | random_factor = (get_random_int() % (1 << 8)) << PAGE_SHIFT; | ||
266 | |||
267 | if (mmap_is_legacy()) { | ||
268 | mm->mmap_base = TASK_UNMAPPED_BASE + random_factor; | ||
269 | mm->get_unmapped_area = arch_get_unmapped_area; | ||
270 | mm->unmap_area = arch_unmap_area; | ||
271 | } else { | ||
272 | mm->mmap_base = mmap_base(random_factor); | ||
273 | mm->get_unmapped_area = arch_get_unmapped_area_topdown; | ||
274 | mm->unmap_area = arch_unmap_area_topdown; | ||
275 | } | ||
276 | } | ||
114 | 277 | ||
115 | /* | 278 | /* |
116 | * You really shouldn't be using read() or write() on /dev/mem. This | 279 | * You really shouldn't be using read() or write() on /dev/mem. This |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 7efa2a721d5d..7e9b5bf910c1 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -161,6 +161,7 @@ __v7_ca5mp_setup: | |||
161 | __v7_ca9mp_setup: | 161 | __v7_ca9mp_setup: |
162 | mov r10, #(1 << 0) @ TLB ops broadcasting | 162 | mov r10, #(1 << 0) @ TLB ops broadcasting |
163 | b 1f | 163 | b 1f |
164 | __v7_ca7mp_setup: | ||
164 | __v7_ca15mp_setup: | 165 | __v7_ca15mp_setup: |
165 | mov r10, #0 | 166 | mov r10, #0 |
166 | 1: | 167 | 1: |
@@ -240,11 +241,13 @@ __v7_setup: | |||
240 | orreq r10, r10, #1 << 6 @ set bit #6 | 241 | orreq r10, r10, #1 << 6 @ set bit #6 |
241 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register | 242 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register |
242 | #endif | 243 | #endif |
243 | #ifdef CONFIG_ARM_ERRATA_751472 | 244 | #if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP) |
244 | cmp r6, #0x30 @ present prior to r3p0 | 245 | ALT_SMP(cmp r6, #0x30) @ present prior to r3p0 |
246 | ALT_UP_B(1f) | ||
245 | mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register | 247 | mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register |
246 | orrlt r10, r10, #1 << 11 @ set bit #11 | 248 | orrlt r10, r10, #1 << 11 @ set bit #11 |
247 | mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register | 249 | mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register |
250 | 1: | ||
248 | #endif | 251 | #endif |
249 | 252 | ||
250 | 3: mov r10, #0 | 253 | 3: mov r10, #0 |
@@ -327,6 +330,16 @@ __v7_ca5mp_proc_info: | |||
327 | .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info | 330 | .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info |
328 | 331 | ||
329 | /* | 332 | /* |
333 | * ARM Ltd. Cortex A7 processor. | ||
334 | */ | ||
335 | .type __v7_ca7mp_proc_info, #object | ||
336 | __v7_ca7mp_proc_info: | ||
337 | .long 0x410fc070 | ||
338 | .long 0xff0ffff0 | ||
339 | __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV | ||
340 | .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info | ||
341 | |||
342 | /* | ||
330 | * ARM Ltd. Cortex A9 processor. | 343 | * ARM Ltd. Cortex A9 processor. |
331 | */ | 344 | */ |
332 | .type __v7_ca9mp_proc_info, #object | 345 | .type __v7_ca9mp_proc_info, #object |
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S index cafa18354339..d18dde95b8aa 100644 --- a/arch/arm/nwfpe/entry.S +++ b/arch/arm/nwfpe/entry.S | |||
@@ -20,6 +20,8 @@ | |||
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #include <asm/opcodes.h> | ||
24 | |||
23 | /* This is the kernel's entry point into the floating point emulator. | 25 | /* This is the kernel's entry point into the floating point emulator. |
24 | It is called from the kernel with code similar to this: | 26 | It is called from the kernel with code similar to this: |
25 | 27 | ||
@@ -81,11 +83,11 @@ nwfpe_enter: | |||
81 | mov r6, r0 @ save the opcode | 83 | mov r6, r0 @ save the opcode |
82 | emulate: | 84 | emulate: |
83 | ldr r1, [sp, #S_PSR] @ fetch the PSR | 85 | ldr r1, [sp, #S_PSR] @ fetch the PSR |
84 | bl checkCondition @ check the condition | 86 | bl arm_check_condition @ check the condition |
85 | cmp r0, #0 @ r0 = 0 ==> condition failed | 87 | cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed? |
86 | 88 | ||
87 | @ if condition code failed to match, next insn | 89 | @ if condition code failed to match, next insn |
88 | beq next @ get the next instruction; | 90 | bne next @ get the next instruction; |
89 | 91 | ||
90 | mov r0, r6 @ prepare for EmulateAll() | 92 | mov r0, r6 @ prepare for EmulateAll() |
91 | bl EmulateAll @ emulate the instruction | 93 | bl EmulateAll @ emulate the instruction |
diff --git a/arch/arm/nwfpe/fpopcode.c b/arch/arm/nwfpe/fpopcode.c index 922b81107585..ff9834673085 100644 --- a/arch/arm/nwfpe/fpopcode.c +++ b/arch/arm/nwfpe/fpopcode.c | |||
@@ -61,29 +61,3 @@ const float32 float32Constant[] = { | |||
61 | 0x41200000 /* single 10.0 */ | 61 | 0x41200000 /* single 10.0 */ |
62 | }; | 62 | }; |
63 | 63 | ||
64 | /* condition code lookup table | ||
65 | index into the table is test code: EQ, NE, ... LT, GT, AL, NV | ||
66 | bit position in short is condition code: NZCV */ | ||
67 | static const unsigned short aCC[16] = { | ||
68 | 0xF0F0, // EQ == Z set | ||
69 | 0x0F0F, // NE | ||
70 | 0xCCCC, // CS == C set | ||
71 | 0x3333, // CC | ||
72 | 0xFF00, // MI == N set | ||
73 | 0x00FF, // PL | ||
74 | 0xAAAA, // VS == V set | ||
75 | 0x5555, // VC | ||
76 | 0x0C0C, // HI == C set && Z clear | ||
77 | 0xF3F3, // LS == C clear || Z set | ||
78 | 0xAA55, // GE == (N==V) | ||
79 | 0x55AA, // LT == (N!=V) | ||
80 | 0x0A05, // GT == (!Z && (N==V)) | ||
81 | 0xF5FA, // LE == (Z || (N!=V)) | ||
82 | 0xFFFF, // AL always | ||
83 | 0 // NV | ||
84 | }; | ||
85 | |||
86 | unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes) | ||
87 | { | ||
88 | return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1; | ||
89 | } | ||
diff --git a/arch/arm/nwfpe/fpopcode.h b/arch/arm/nwfpe/fpopcode.h index 786e4c96156d..78f02dbfaa8f 100644 --- a/arch/arm/nwfpe/fpopcode.h +++ b/arch/arm/nwfpe/fpopcode.h | |||
@@ -475,9 +475,6 @@ static inline unsigned int getDestinationSize(const unsigned int opcode) | |||
475 | return (nRc); | 475 | return (nRc); |
476 | } | 476 | } |
477 | 477 | ||
478 | extern unsigned int checkCondition(const unsigned int opcode, | ||
479 | const unsigned int ccodes); | ||
480 | |||
481 | extern const float64 float64Constant[]; | 478 | extern const float64 float64Constant[]; |
482 | extern const float32 float32Constant[]; | 479 | extern const float32 float32Constant[]; |
483 | 480 | ||
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c index c074e66ad224..4e0a371630b3 100644 --- a/arch/arm/oprofile/common.c +++ b/arch/arm/oprofile/common.c | |||
@@ -116,7 +116,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
116 | return oprofile_perf_init(ops); | 116 | return oprofile_perf_init(ops); |
117 | } | 117 | } |
118 | 118 | ||
119 | void __exit oprofile_arch_exit(void) | 119 | void oprofile_arch_exit(void) |
120 | { | 120 | { |
121 | oprofile_perf_exit(); | 121 | oprofile_perf_exit(); |
122 | } | 122 | } |
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile index 90f7153a8d78..a99dc15a70f7 100644 --- a/arch/arm/plat-iop/Makefile +++ b/arch/arm/plat-iop/Makefile | |||
@@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_IOP32X) += time.o | |||
13 | obj-$(CONFIG_ARCH_IOP32X) += cp6.o | 13 | obj-$(CONFIG_ARCH_IOP32X) += cp6.o |
14 | obj-$(CONFIG_ARCH_IOP32X) += adma.o | 14 | obj-$(CONFIG_ARCH_IOP32X) += adma.o |
15 | obj-$(CONFIG_ARCH_IOP32X) += pmu.o | 15 | obj-$(CONFIG_ARCH_IOP32X) += pmu.o |
16 | obj-$(CONFIG_ARCH_IOP32X) += restart.o | ||
16 | 17 | ||
17 | # IOP33X | 18 | # IOP33X |
18 | obj-$(CONFIG_ARCH_IOP33X) += gpio.o | 19 | obj-$(CONFIG_ARCH_IOP33X) += gpio.o |
@@ -23,6 +24,7 @@ obj-$(CONFIG_ARCH_IOP33X) += time.o | |||
23 | obj-$(CONFIG_ARCH_IOP33X) += cp6.o | 24 | obj-$(CONFIG_ARCH_IOP33X) += cp6.o |
24 | obj-$(CONFIG_ARCH_IOP33X) += adma.o | 25 | obj-$(CONFIG_ARCH_IOP33X) += adma.o |
25 | obj-$(CONFIG_ARCH_IOP33X) += pmu.o | 26 | obj-$(CONFIG_ARCH_IOP33X) += pmu.o |
27 | obj-$(CONFIG_ARCH_IOP33X) += restart.o | ||
26 | 28 | ||
27 | # IOP13XX | 29 | # IOP13XX |
28 | obj-$(CONFIG_ARCH_IOP13XX) += cp6.o | 30 | obj-$(CONFIG_ARCH_IOP13XX) += cp6.o |
diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c new file mode 100644 index 000000000000..6a85a0c502e6 --- /dev/null +++ b/arch/arm/plat-iop/restart.c | |||
@@ -0,0 +1,19 @@ | |||
1 | /* | ||
2 | * restart.c | ||
3 | * | ||
4 | * Copyright (C) 2001 MontaVista Software, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <asm/hardware/iop3xx.h> | ||
11 | #include <mach/hardware.h> | ||
12 | |||
13 | void iop3xx_restart(char mode, const char *cmd) | ||
14 | { | ||
15 | *IOP3XX_PCSR = 0x30; | ||
16 | |||
17 | /* Jump into ROM at address 0 */ | ||
18 | soft_restart(0); | ||
19 | } | ||
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 568dd0223d17..cbfbbe461788 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
@@ -18,7 +18,6 @@ | |||
18 | #include <linux/time.h> | 18 | #include <linux/time.h> |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/timex.h> | 20 | #include <linux/timex.h> |
21 | #include <linux/sched.h> | ||
22 | #include <linux/io.h> | 21 | #include <linux/io.h> |
23 | #include <linux/clocksource.h> | 22 | #include <linux/clocksource.h> |
24 | #include <linux/clockchips.h> | 23 | #include <linux/clockchips.h> |
@@ -52,21 +51,12 @@ static struct clocksource iop_clocksource = { | |||
52 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 51 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
53 | }; | 52 | }; |
54 | 53 | ||
55 | static DEFINE_CLOCK_DATA(cd); | ||
56 | |||
57 | /* | 54 | /* |
58 | * IOP sched_clock() implementation via its clocksource. | 55 | * IOP sched_clock() implementation via its clocksource. |
59 | */ | 56 | */ |
60 | unsigned long long notrace sched_clock(void) | 57 | static u32 notrace iop_read_sched_clock(void) |
61 | { | 58 | { |
62 | u32 cyc = 0xffffffffu - read_tcr1(); | 59 | return 0xffffffffu - read_tcr1(); |
63 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
64 | } | ||
65 | |||
66 | static void notrace iop_update_sched_clock(void) | ||
67 | { | ||
68 | u32 cyc = 0xffffffffu - read_tcr1(); | ||
69 | update_sched_clock(&cd, cyc, (u32)~0); | ||
70 | } | 60 | } |
71 | 61 | ||
72 | /* | 62 | /* |
@@ -152,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate) | |||
152 | { | 142 | { |
153 | u32 timer_ctl; | 143 | u32 timer_ctl; |
154 | 144 | ||
155 | init_sched_clock(&cd, iop_update_sched_clock, 32, tick_rate); | 145 | setup_sched_clock(iop_read_sched_clock, 32, tick_rate); |
156 | 146 | ||
157 | ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ); | 147 | ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ); |
158 | iop_tick_rate = tick_rate; | 148 | iop_tick_rate = tick_rate; |
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index b3a1f2b3ada3..b30708e28c1d 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig | |||
@@ -20,6 +20,7 @@ config ARCH_IMX_V6_V7 | |||
20 | bool "i.MX3, i.MX6" | 20 | bool "i.MX3, i.MX6" |
21 | select AUTO_ZRELADDR if !ZBOOT_ROM | 21 | select AUTO_ZRELADDR if !ZBOOT_ROM |
22 | select ARM_PATCH_PHYS_VIRT | 22 | select ARM_PATCH_PHYS_VIRT |
23 | select MIGHT_HAVE_CACHE_L2X0 | ||
23 | help | 24 | help |
24 | This enables support for systems based on the Freescale i.MX3 and i.MX6 | 25 | This enables support for systems based on the Freescale i.MX3 and i.MX6 |
25 | family. | 26 | family. |
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c index adbff706ef6f..73db34bf588a 100644 --- a/arch/arm/plat-mxc/cpufreq.c +++ b/arch/arm/plat-mxc/cpufreq.c | |||
@@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy, | |||
98 | return ret; | 98 | return ret; |
99 | } | 99 | } |
100 | 100 | ||
101 | static int __init mxc_cpufreq_init(struct cpufreq_policy *policy) | 101 | static int mxc_cpufreq_init(struct cpufreq_policy *policy) |
102 | { | 102 | { |
103 | int ret; | 103 | int ret; |
104 | int i; | 104 | int i; |
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 6698cae942f7..83cca9bcfc97 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -71,8 +71,8 @@ extern int mx6q_clocks_init(void); | |||
71 | extern struct platform_device *mxc_register_gpio(char *name, int id, | 71 | extern struct platform_device *mxc_register_gpio(char *name, int id, |
72 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); | 72 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); |
73 | extern void mxc_set_cpu_type(unsigned int type); | 73 | extern void mxc_set_cpu_type(unsigned int type); |
74 | extern void mxc_restart(char, const char *); | ||
74 | extern void mxc_arch_reset_init(void __iomem *); | 75 | extern void mxc_arch_reset_init(void __iomem *); |
75 | extern void mx51_efikamx_reset(void); | ||
76 | extern int mx53_revision(void); | 76 | extern int mx53_revision(void); |
77 | extern int mx53_display_revision(void); | 77 | extern int mx53_display_revision(void); |
78 | 78 | ||
@@ -121,6 +121,7 @@ static inline void imx_smp_prepare(void) {} | |||
121 | extern void imx_enable_cpu(int cpu, bool enable); | 121 | extern void imx_enable_cpu(int cpu, bool enable); |
122 | extern void imx_set_cpu_jump(int cpu, void *jump_addr); | 122 | extern void imx_set_cpu_jump(int cpu, void *jump_addr); |
123 | extern void imx_src_init(void); | 123 | extern void imx_src_init(void); |
124 | extern void imx_src_prepare_restart(void); | ||
124 | extern void imx_gpc_init(void); | 125 | extern void imx_gpc_init(void); |
125 | extern void imx_gpc_pre_suspend(void); | 126 | extern void imx_gpc_pre_suspend(void); |
126 | extern void imx_gpc_post_resume(void); | 127 | extern void imx_gpc_post_resume(void); |
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h index b9895d250167..13ad0df2e860 100644 --- a/arch/arm/plat-mxc/include/mach/system.h +++ b/arch/arm/plat-mxc/include/mach/system.h | |||
@@ -22,6 +22,4 @@ static inline void arch_idle(void) | |||
22 | cpu_do_idle(); | 22 | cpu_do_idle(); |
23 | } | 23 | } |
24 | 24 | ||
25 | void arch_reset(char mode, const char *cmd); | ||
26 | |||
27 | #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ | 25 | #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index 88fd40452567..477971b00930 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h | |||
@@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) | |||
98 | case MACH_TYPE_PCM043: | 98 | case MACH_TYPE_PCM043: |
99 | case MACH_TYPE_LILLY1131: | 99 | case MACH_TYPE_LILLY1131: |
100 | case MACH_TYPE_VPR200: | 100 | case MACH_TYPE_VPR200: |
101 | case MACH_TYPE_EUKREA_CPUIMX35SD: | ||
101 | uart_base = MX3X_UART1_BASE_ADDR; | 102 | uart_base = MX3X_UART1_BASE_ADDR; |
102 | break; | 103 | break; |
103 | case MACH_TYPE_MAGX_ZN5: | 104 | case MACH_TYPE_MAGX_ZN5: |
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 845de59f07ed..e032717f7d02 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c | |||
@@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | |||
77 | do_div(c, period_ns); | 77 | do_div(c, period_ns); |
78 | duty_cycles = c; | 78 | duty_cycles = c; |
79 | 79 | ||
80 | /* | ||
81 | * according to imx pwm RM, the real period value should be | ||
82 | * PERIOD value in PWMPR plus 2. | ||
83 | */ | ||
84 | if (period_cycles > 2) | ||
85 | period_cycles -= 2; | ||
86 | else | ||
87 | period_cycles = 0; | ||
88 | |||
80 | writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); | 89 | writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); |
81 | writel(period_cycles, pwm->mmio_base + MX3_PWMPR); | 90 | writel(period_cycles, pwm->mmio_base + MX3_PWMPR); |
82 | 91 | ||
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c index 7e5c76ea4466..3599bf2cfd4f 100644 --- a/arch/arm/plat-mxc/system.c +++ b/arch/arm/plat-mxc/system.c | |||
@@ -37,17 +37,10 @@ static void __iomem *wdog_base; | |||
37 | /* | 37 | /* |
38 | * Reset the system. It is called by machine_restart(). | 38 | * Reset the system. It is called by machine_restart(). |
39 | */ | 39 | */ |
40 | void arch_reset(char mode, const char *cmd) | 40 | void mxc_restart(char mode, const char *cmd) |
41 | { | 41 | { |
42 | unsigned int wcr_enable; | 42 | unsigned int wcr_enable; |
43 | 43 | ||
44 | #ifdef CONFIG_MACH_MX51_EFIKAMX | ||
45 | if (machine_is_mx51_efikamx()) { | ||
46 | mx51_efikamx_reset(); | ||
47 | return; | ||
48 | } | ||
49 | #endif | ||
50 | |||
51 | if (cpu_is_mx1()) { | 44 | if (cpu_is_mx1()) { |
52 | wcr_enable = (1 << 0); | 45 | wcr_enable = (1 << 0); |
53 | } else { | 46 | } else { |
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index 4b0fe285e83c..1c96cdb4c35e 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c | |||
@@ -108,18 +108,9 @@ static void gpt_irq_acknowledge(void) | |||
108 | 108 | ||
109 | static void __iomem *sched_clock_reg; | 109 | static void __iomem *sched_clock_reg; |
110 | 110 | ||
111 | static DEFINE_CLOCK_DATA(cd); | 111 | static u32 notrace mxc_read_sched_clock(void) |
112 | unsigned long long notrace sched_clock(void) | ||
113 | { | 112 | { |
114 | cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0; | 113 | return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0; |
115 | |||
116 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
117 | } | ||
118 | |||
119 | static void notrace mxc_update_sched_clock(void) | ||
120 | { | ||
121 | cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0; | ||
122 | update_sched_clock(&cd, cyc, (u32)~0); | ||
123 | } | 114 | } |
124 | 115 | ||
125 | static int __init mxc_clocksource_init(struct clk *timer_clk) | 116 | static int __init mxc_clocksource_init(struct clk *timer_clk) |
@@ -129,7 +120,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk) | |||
129 | 120 | ||
130 | sched_clock_reg = reg; | 121 | sched_clock_reg = reg; |
131 | 122 | ||
132 | init_sched_clock(&cd, mxc_update_sched_clock, 32, c); | 123 | setup_sched_clock(mxc_read_sched_clock, 32, c); |
133 | return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32, | 124 | return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32, |
134 | clocksource_mmio_readl_up); | 125 | clocksource_mmio_readl_up); |
135 | } | 126 | } |
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index 30b6433d910d..ad1b45b605a4 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/jiffies.h> | 18 | #include <linux/jiffies.h> |
19 | #include <linux/err.h> | 19 | #include <linux/err.h> |
20 | #include <linux/sched.h> | ||
21 | #include <asm/mach/time.h> | 20 | #include <asm/mach/time.h> |
22 | #include <asm/sched_clock.h> | 21 | #include <asm/sched_clock.h> |
23 | 22 | ||
@@ -79,23 +78,12 @@ void __iomem *mtu_base; /* Assigned by machine code */ | |||
79 | * local implementation which uses the clocksource to get some | 78 | * local implementation which uses the clocksource to get some |
80 | * better resolution when scheduling the kernel. | 79 | * better resolution when scheduling the kernel. |
81 | */ | 80 | */ |
82 | static DEFINE_CLOCK_DATA(cd); | 81 | static u32 notrace nomadik_read_sched_clock(void) |
83 | |||
84 | unsigned long long notrace sched_clock(void) | ||
85 | { | 82 | { |
86 | u32 cyc; | ||
87 | |||
88 | if (unlikely(!mtu_base)) | 83 | if (unlikely(!mtu_base)) |
89 | return 0; | 84 | return 0; |
90 | 85 | ||
91 | cyc = -readl(mtu_base + MTU_VAL(0)); | 86 | return -readl(mtu_base + MTU_VAL(0)); |
92 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
93 | } | ||
94 | |||
95 | static void notrace nomadik_update_sched_clock(void) | ||
96 | { | ||
97 | u32 cyc = -readl(mtu_base + MTU_VAL(0)); | ||
98 | update_sched_clock(&cd, cyc, (u32)~0); | ||
99 | } | 87 | } |
100 | #endif | 88 | #endif |
101 | 89 | ||
@@ -231,9 +219,11 @@ void __init nmdk_timer_init(void) | |||
231 | rate, 200, 32, clocksource_mmio_readl_down)) | 219 | rate, 200, 32, clocksource_mmio_readl_down)) |
232 | pr_err("timer: failed to initialize clock source %s\n", | 220 | pr_err("timer: failed to initialize clock source %s\n", |
233 | "mtu_0"); | 221 | "mtu_0"); |
222 | |||
234 | #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK | 223 | #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK |
235 | init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate); | 224 | setup_sched_clock(nomadik_read_sched_clock, 32, rate); |
236 | #endif | 225 | #endif |
226 | |||
237 | /* Timer 1 is used for events */ | 227 | /* Timer 1 is used for events */ |
238 | 228 | ||
239 | clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); | 229 | clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); |
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index a6cbb712da51..5f0f2292b7fb 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | #include <linux/sched.h> | ||
21 | #include <linux/clocksource.h> | 20 | #include <linux/clocksource.h> |
22 | 21 | ||
23 | #include <asm/sched_clock.h> | 22 | #include <asm/sched_clock.h> |
@@ -37,41 +36,9 @@ static void __iomem *timer_32k_base; | |||
37 | 36 | ||
38 | #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 | 37 | #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 |
39 | 38 | ||
40 | /* | 39 | static u32 notrace omap_32k_read_sched_clock(void) |
41 | * Returns current time from boot in nsecs. It's OK for this to wrap | ||
42 | * around for now, as it's just a relative time stamp. | ||
43 | */ | ||
44 | static DEFINE_CLOCK_DATA(cd); | ||
45 | |||
46 | /* | ||
47 | * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60). | ||
48 | * This gives a resolution of about 30us and a wrap period of about 36hrs. | ||
49 | */ | ||
50 | #define SC_MULT 4000000000u | ||
51 | #define SC_SHIFT 17 | ||
52 | |||
53 | static inline unsigned long long notrace _omap_32k_sched_clock(void) | ||
54 | { | ||
55 | u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; | ||
56 | return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); | ||
57 | } | ||
58 | |||
59 | #if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER) | ||
60 | unsigned long long notrace sched_clock(void) | ||
61 | { | ||
62 | return _omap_32k_sched_clock(); | ||
63 | } | ||
64 | #else | ||
65 | unsigned long long notrace omap_32k_sched_clock(void) | ||
66 | { | ||
67 | return _omap_32k_sched_clock(); | ||
68 | } | ||
69 | #endif | ||
70 | |||
71 | static void notrace omap_update_sched_clock(void) | ||
72 | { | 40 | { |
73 | u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; | 41 | return timer_32k_base ? __raw_readl(timer_32k_base) : 0; |
74 | update_sched_clock(&cd, cyc, (u32)~0); | ||
75 | } | 42 | } |
76 | 43 | ||
77 | /** | 44 | /** |
@@ -147,8 +114,7 @@ int __init omap_init_clocksource_32k(void) | |||
147 | clocksource_mmio_readl_up)) | 114 | clocksource_mmio_readl_up)) |
148 | printk(err, "32k_counter"); | 115 | printk(err, "32k_counter"); |
149 | 116 | ||
150 | init_fixed_sched_clock(&cd, omap_update_sched_clock, 32, | 117 | setup_sched_clock(omap_32k_read_sched_clock, 32, 32768); |
151 | 32768, SC_MULT, SC_SHIFT); | ||
152 | } | 118 | } |
153 | return 0; | 119 | return 0; |
154 | } | 120 | } |
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 257f9770b2da..b4d7ec3fbfbe 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <plat/omap_hwmod.h> | 31 | #include <plat/omap_hwmod.h> |
32 | 32 | ||
33 | extern int __init omap_init_clocksource_32k(void); | 33 | extern int __init omap_init_clocksource_32k(void); |
34 | extern unsigned long long notrace omap_32k_sched_clock(void); | ||
35 | 34 | ||
36 | extern void omap_reserve(void); | 35 | extern void omap_reserve(void); |
37 | extern int omap_dss_reset(struct omap_hwmod *); | 36 | extern int omap_dss_reset(struct omap_hwmod *); |
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h index c5fa9e929009..8e5ebd74b129 100644 --- a/arch/arm/plat-omap/include/plat/system.h +++ b/arch/arm/plat-omap/include/plat/system.h | |||
@@ -12,6 +12,4 @@ static inline void arch_idle(void) | |||
12 | cpu_do_idle(); | 12 | cpu_do_idle(); |
13 | } | 13 | } |
14 | 14 | ||
15 | extern void (*arch_reset)(char, const char *); | ||
16 | |||
17 | #endif | 15 | #endif |
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index 41ab97ebe4cf..10d160888133 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c | |||
@@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio, | |||
384 | struct orion_gpio_chip *ochip; | 384 | struct orion_gpio_chip *ochip; |
385 | struct irq_chip_generic *gc; | 385 | struct irq_chip_generic *gc; |
386 | struct irq_chip_type *ct; | 386 | struct irq_chip_type *ct; |
387 | char gc_label[16]; | ||
387 | 388 | ||
388 | if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips)) | 389 | if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips)) |
389 | return; | 390 | return; |
390 | 391 | ||
392 | snprintf(gc_label, sizeof(gc_label), "orion_gpio%d", | ||
393 | orion_gpio_chip_count); | ||
394 | |||
391 | ochip = orion_gpio_chips + orion_gpio_chip_count; | 395 | ochip = orion_gpio_chips + orion_gpio_chip_count; |
392 | ochip->chip.label = "orion_gpio"; | 396 | ochip->chip.label = kstrdup(gc_label, GFP_KERNEL); |
393 | ochip->chip.request = orion_gpio_request; | 397 | ochip->chip.request = orion_gpio_request; |
394 | ochip->chip.direction_input = orion_gpio_direction_input; | 398 | ochip->chip.direction_input = orion_gpio_direction_input; |
395 | ochip->chip.get = orion_gpio_get; | 399 | ochip->chip.get = orion_gpio_get; |
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c index 69a61367e4b8..1ed8d1397fcf 100644 --- a/arch/arm/plat-orion/time.c +++ b/arch/arm/plat-orion/time.c | |||
@@ -12,7 +12,6 @@ | |||
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/sched.h> | ||
16 | #include <linux/timer.h> | 15 | #include <linux/timer.h> |
17 | #include <linux/clockchips.h> | 16 | #include <linux/clockchips.h> |
18 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
@@ -60,24 +59,10 @@ static u32 ticks_per_jiffy; | |||
60 | * Orion's sched_clock implementation. It has a resolution of | 59 | * Orion's sched_clock implementation. It has a resolution of |
61 | * at least 7.5ns (133MHz TCLK). | 60 | * at least 7.5ns (133MHz TCLK). |
62 | */ | 61 | */ |
63 | static DEFINE_CLOCK_DATA(cd); | ||
64 | 62 | ||
65 | unsigned long long notrace sched_clock(void) | 63 | static u32 notrace orion_read_sched_clock(void) |
66 | { | 64 | { |
67 | u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF); | 65 | return ~readl(timer_base + TIMER0_VAL_OFF); |
68 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
69 | } | ||
70 | |||
71 | |||
72 | static void notrace orion_update_sched_clock(void) | ||
73 | { | ||
74 | u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF); | ||
75 | update_sched_clock(&cd, cyc, (u32)~0); | ||
76 | } | ||
77 | |||
78 | static void __init setup_sched_clock(unsigned long tclk) | ||
79 | { | ||
80 | init_sched_clock(&cd, orion_update_sched_clock, 32, tclk); | ||
81 | } | 66 | } |
82 | 67 | ||
83 | /* | 68 | /* |
@@ -217,7 +202,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask, | |||
217 | /* | 202 | /* |
218 | * Set scale and timer for sched_clock. | 203 | * Set scale and timer for sched_clock. |
219 | */ | 204 | */ |
220 | setup_sched_clock(tclk); | 205 | setup_sched_clock(orion_read_sched_clock, 32, tclk); |
221 | 206 | ||
222 | /* | 207 | /* |
223 | * Setup free-running clocksource timer (interrupts | 208 | * Setup free-running clocksource timer (interrupts |
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 3c6335307fb1..1121df13e15f 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c | |||
@@ -192,27 +192,6 @@ static unsigned long s3c24xx_read_idcode_v4(void) | |||
192 | return __raw_readl(S3C2410_GSTATUS1); | 192 | return __raw_readl(S3C2410_GSTATUS1); |
193 | } | 193 | } |
194 | 194 | ||
195 | /* Hook for arm_pm_restart to ensure we execute the reset code | ||
196 | * with the caches enabled. It seems at least the S3C2440 has a problem | ||
197 | * resetting if there is bus activity interrupted by the reset. | ||
198 | */ | ||
199 | static void s3c24xx_pm_restart(char mode, const char *cmd) | ||
200 | { | ||
201 | if (mode != 's') { | ||
202 | unsigned long flags; | ||
203 | |||
204 | local_irq_save(flags); | ||
205 | __cpuc_flush_kern_all(); | ||
206 | __cpuc_flush_user_all(); | ||
207 | |||
208 | arch_reset(mode, cmd); | ||
209 | local_irq_restore(flags); | ||
210 | } | ||
211 | |||
212 | /* fallback, or unhandled */ | ||
213 | arm_machine_restart(mode, cmd); | ||
214 | } | ||
215 | |||
216 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) | 195 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) |
217 | { | 196 | { |
218 | /* initialise the io descriptors we need for initialisation */ | 197 | /* initialise the io descriptors we need for initialisation */ |
@@ -226,7 +205,5 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) | |||
226 | } | 205 | } |
227 | s3c24xx_init_cpu(); | 206 | s3c24xx_init_cpu(); |
228 | 207 | ||
229 | arm_pm_restart = s3c24xx_pm_restart; | ||
230 | |||
231 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | 208 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); |
232 | } | 209 | } |
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 53754bcf15a7..9fe35348e03b 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
@@ -1437,11 +1437,10 @@ int __init s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel) | |||
1437 | size_t map_sz = sizeof(*nmap) * sel->map_size; | 1437 | size_t map_sz = sizeof(*nmap) * sel->map_size; |
1438 | int ptr; | 1438 | int ptr; |
1439 | 1439 | ||
1440 | nmap = kmalloc(map_sz, GFP_KERNEL); | 1440 | nmap = kmemdup(sel->map, map_sz, GFP_KERNEL); |
1441 | if (nmap == NULL) | 1441 | if (nmap == NULL) |
1442 | return -ENOMEM; | 1442 | return -ENOMEM; |
1443 | 1443 | ||
1444 | memcpy(nmap, sel->map, map_sz); | ||
1445 | memcpy(&dma_sel, sel, sizeof(*sel)); | 1444 | memcpy(&dma_sel, sel, sizeof(*sel)); |
1446 | 1445 | ||
1447 | dma_sel.map = nmap; | 1446 | dma_sel.map = nmap; |
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c index 5a21b15b2a97..95e68190d593 100644 --- a/arch/arm/plat-s3c24xx/s3c2443-clock.c +++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c | |||
@@ -297,13 +297,6 @@ static struct clksrc_clk clk_usb_bus_host = { | |||
297 | 297 | ||
298 | static struct clksrc_clk clksrc_clks[] = { | 298 | static struct clksrc_clk clksrc_clks[] = { |
299 | { | 299 | { |
300 | /* ART baud-rate clock sourced from esysclk via a divisor */ | ||
301 | .clk = { | ||
302 | .name = "uartclk", | ||
303 | .parent = &clk_esysclk.clk, | ||
304 | }, | ||
305 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 }, | ||
306 | }, { | ||
307 | /* camera interface bus-clock, divided down from esysclk */ | 300 | /* camera interface bus-clock, divided down from esysclk */ |
308 | .clk = { | 301 | .clk = { |
309 | .name = "camif-upll", /* same as 2440 name */ | 302 | .name = "camif-upll", /* same as 2440 name */ |
@@ -323,6 +316,15 @@ static struct clksrc_clk clksrc_clks[] = { | |||
323 | }, | 316 | }, |
324 | }; | 317 | }; |
325 | 318 | ||
319 | static struct clksrc_clk clk_esys_uart = { | ||
320 | /* ART baud-rate clock sourced from esysclk via a divisor */ | ||
321 | .clk = { | ||
322 | .name = "uartclk", | ||
323 | .parent = &clk_esysclk.clk, | ||
324 | }, | ||
325 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 }, | ||
326 | }; | ||
327 | |||
326 | static struct clk clk_i2s_ext = { | 328 | static struct clk clk_i2s_ext = { |
327 | .name = "i2s-ext", | 329 | .name = "i2s-ext", |
328 | }; | 330 | }; |
@@ -425,12 +427,6 @@ static struct clk init_clocks[] = { | |||
425 | .enable = s3c2443_clkcon_enable_h, | 427 | .enable = s3c2443_clkcon_enable_h, |
426 | .ctrlbit = S3C2443_HCLKCON_DMA5, | 428 | .ctrlbit = S3C2443_HCLKCON_DMA5, |
427 | }, { | 429 | }, { |
428 | .name = "hsmmc", | ||
429 | .devname = "s3c-sdhci.1", | ||
430 | .parent = &clk_h, | ||
431 | .enable = s3c2443_clkcon_enable_h, | ||
432 | .ctrlbit = S3C2443_HCLKCON_HSMMC, | ||
433 | }, { | ||
434 | .name = "gpio", | 430 | .name = "gpio", |
435 | .parent = &clk_p, | 431 | .parent = &clk_p, |
436 | .enable = s3c2443_clkcon_enable_p, | 432 | .enable = s3c2443_clkcon_enable_p, |
@@ -512,6 +508,14 @@ static struct clk init_clocks[] = { | |||
512 | } | 508 | } |
513 | }; | 509 | }; |
514 | 510 | ||
511 | static struct clk hsmmc1_clk = { | ||
512 | .name = "hsmmc", | ||
513 | .devname = "s3c-sdhci.1", | ||
514 | .parent = &clk_h, | ||
515 | .enable = s3c2443_clkcon_enable_h, | ||
516 | .ctrlbit = S3C2443_HCLKCON_HSMMC, | ||
517 | }; | ||
518 | |||
515 | static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0) | 519 | static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0) |
516 | { | 520 | { |
517 | clkcon0 &= S3C2443_CLKDIV0_HCLKDIV_MASK; | 521 | clkcon0 &= S3C2443_CLKDIV0_HCLKDIV_MASK; |
@@ -577,6 +581,7 @@ static struct clk *clks[] __initdata = { | |||
577 | &clk_epll, | 581 | &clk_epll, |
578 | &clk_usb_bus, | 582 | &clk_usb_bus, |
579 | &clk_armdiv, | 583 | &clk_armdiv, |
584 | &hsmmc1_clk, | ||
580 | }; | 585 | }; |
581 | 586 | ||
582 | static struct clksrc_clk *clksrcs[] __initdata = { | 587 | static struct clksrc_clk *clksrcs[] __initdata = { |
@@ -589,6 +594,13 @@ static struct clksrc_clk *clksrcs[] __initdata = { | |||
589 | &clk_arm, | 594 | &clk_arm, |
590 | }; | 595 | }; |
591 | 596 | ||
597 | static struct clk_lookup s3c2443_clk_lookup[] = { | ||
598 | CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), | ||
599 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), | ||
600 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk), | ||
601 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk), | ||
602 | }; | ||
603 | |||
592 | void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, | 604 | void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, |
593 | unsigned int *divs, int nr_divs, | 605 | unsigned int *divs, int nr_divs, |
594 | int divmask) | 606 | int divmask) |
@@ -618,6 +630,7 @@ void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, | |||
618 | /* See s3c2443/etc notes on disabling clocks at init time */ | 630 | /* See s3c2443/etc notes on disabling clocks at init time */ |
619 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 631 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
620 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 632 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
633 | clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup)); | ||
621 | 634 | ||
622 | s3c2443_common_setup_clocks(get_mpll); | 635 | s3c2443_common_setup_clocks(get_mpll); |
623 | } | 636 | } |
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index 876344038b8d..30d8c3016e6b 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile | |||
@@ -13,7 +13,6 @@ obj- := | |||
13 | # Core files | 13 | # Core files |
14 | 14 | ||
15 | obj-y += dev-uart.o | 15 | obj-y += dev-uart.o |
16 | obj-y += cpu.o | ||
17 | obj-y += clock.o | 16 | obj-y += clock.o |
18 | obj-y += irq.o | 17 | obj-y += irq.o |
19 | obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o | 18 | obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o |
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c deleted file mode 100644 index a56959e83516..000000000000 --- a/arch/arm/plat-s5p/cpu.c +++ /dev/null | |||
@@ -1,144 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5p/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P CPU Support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | |||
16 | #include <asm/mach/arch.h> | ||
17 | #include <asm/mach/map.h> | ||
18 | |||
19 | #include <mach/map.h> | ||
20 | #include <mach/regs-clock.h> | ||
21 | |||
22 | #include <plat/cpu.h> | ||
23 | #include <plat/s5p6440.h> | ||
24 | #include <plat/s5p6450.h> | ||
25 | #include <plat/s5pc100.h> | ||
26 | #include <plat/s5pv210.h> | ||
27 | #include <plat/exynos4.h> | ||
28 | |||
29 | /* table of supported CPUs */ | ||
30 | |||
31 | static const char name_s5p6440[] = "S5P6440"; | ||
32 | static const char name_s5p6450[] = "S5P6450"; | ||
33 | static const char name_s5pc100[] = "S5PC100"; | ||
34 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | ||
35 | static const char name_exynos4210[] = "EXYNOS4210"; | ||
36 | static const char name_exynos4212[] = "EXYNOS4212"; | ||
37 | static const char name_exynos4412[] = "EXYNOS4412"; | ||
38 | |||
39 | static struct cpu_table cpu_ids[] __initdata = { | ||
40 | { | ||
41 | .idcode = S5P6440_CPU_ID, | ||
42 | .idmask = S5P64XX_CPU_MASK, | ||
43 | .map_io = s5p6440_map_io, | ||
44 | .init_clocks = s5p6440_init_clocks, | ||
45 | .init_uarts = s5p6440_init_uarts, | ||
46 | .init = s5p64x0_init, | ||
47 | .name = name_s5p6440, | ||
48 | }, { | ||
49 | .idcode = S5P6450_CPU_ID, | ||
50 | .idmask = S5P64XX_CPU_MASK, | ||
51 | .map_io = s5p6450_map_io, | ||
52 | .init_clocks = s5p6450_init_clocks, | ||
53 | .init_uarts = s5p6450_init_uarts, | ||
54 | .init = s5p64x0_init, | ||
55 | .name = name_s5p6450, | ||
56 | }, { | ||
57 | .idcode = S5PC100_CPU_ID, | ||
58 | .idmask = S5PC100_CPU_MASK, | ||
59 | .map_io = s5pc100_map_io, | ||
60 | .init_clocks = s5pc100_init_clocks, | ||
61 | .init_uarts = s5pc100_init_uarts, | ||
62 | .init = s5pc100_init, | ||
63 | .name = name_s5pc100, | ||
64 | }, { | ||
65 | .idcode = S5PV210_CPU_ID, | ||
66 | .idmask = S5PV210_CPU_MASK, | ||
67 | .map_io = s5pv210_map_io, | ||
68 | .init_clocks = s5pv210_init_clocks, | ||
69 | .init_uarts = s5pv210_init_uarts, | ||
70 | .init = s5pv210_init, | ||
71 | .name = name_s5pv210, | ||
72 | }, { | ||
73 | .idcode = EXYNOS4210_CPU_ID, | ||
74 | .idmask = EXYNOS4_CPU_MASK, | ||
75 | .map_io = exynos4_map_io, | ||
76 | .init_clocks = exynos4_init_clocks, | ||
77 | .init_uarts = exynos4_init_uarts, | ||
78 | .init = exynos_init, | ||
79 | .name = name_exynos4210, | ||
80 | }, { | ||
81 | .idcode = EXYNOS4212_CPU_ID, | ||
82 | .idmask = EXYNOS4_CPU_MASK, | ||
83 | .map_io = exynos4_map_io, | ||
84 | .init_clocks = exynos4_init_clocks, | ||
85 | .init_uarts = exynos4_init_uarts, | ||
86 | .init = exynos_init, | ||
87 | .name = name_exynos4212, | ||
88 | }, { | ||
89 | .idcode = EXYNOS4412_CPU_ID, | ||
90 | .idmask = EXYNOS4_CPU_MASK, | ||
91 | .map_io = exynos4_map_io, | ||
92 | .init_clocks = exynos4_init_clocks, | ||
93 | .init_uarts = exynos4_init_uarts, | ||
94 | .init = exynos_init, | ||
95 | .name = name_exynos4412, | ||
96 | }, | ||
97 | }; | ||
98 | |||
99 | /* minimal IO mapping */ | ||
100 | |||
101 | static struct map_desc s5p_iodesc[] __initdata = { | ||
102 | { | ||
103 | .virtual = (unsigned long)S5P_VA_CHIPID, | ||
104 | .pfn = __phys_to_pfn(S5P_PA_CHIPID), | ||
105 | .length = SZ_4K, | ||
106 | .type = MT_DEVICE, | ||
107 | }, { | ||
108 | .virtual = (unsigned long)S3C_VA_SYS, | ||
109 | .pfn = __phys_to_pfn(S5P_PA_SYSCON), | ||
110 | .length = SZ_64K, | ||
111 | .type = MT_DEVICE, | ||
112 | }, { | ||
113 | .virtual = (unsigned long)S3C_VA_TIMER, | ||
114 | .pfn = __phys_to_pfn(S5P_PA_TIMER), | ||
115 | .length = SZ_16K, | ||
116 | .type = MT_DEVICE, | ||
117 | }, { | ||
118 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
119 | .pfn = __phys_to_pfn(S3C_PA_WDT), | ||
120 | .length = SZ_4K, | ||
121 | .type = MT_DEVICE, | ||
122 | }, { | ||
123 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
124 | .pfn = __phys_to_pfn(S5P_PA_SROMC), | ||
125 | .length = SZ_4K, | ||
126 | .type = MT_DEVICE, | ||
127 | }, | ||
128 | }; | ||
129 | |||
130 | /* read cpu identification code */ | ||
131 | |||
132 | void __init s5p_init_io(struct map_desc *mach_desc, | ||
133 | int size, void __iomem *cpuid_addr) | ||
134 | { | ||
135 | /* initialize the io descriptors we need for initialization */ | ||
136 | iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc)); | ||
137 | if (mach_desc) | ||
138 | iotable_init(mach_desc, size); | ||
139 | |||
140 | /* detect cpu id and rev. */ | ||
141 | s5p_init_cpu(cpuid_addr); | ||
142 | |||
143 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
144 | } | ||
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c index c833e7b57599..17c0a2c58dfd 100644 --- a/arch/arm/plat-s5p/s5p-time.c +++ b/arch/arm/plat-s5p/s5p-time.c | |||
@@ -10,7 +10,6 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/sched.h> | ||
14 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
15 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
16 | #include <linux/err.h> | 15 | #include <linux/err.h> |
@@ -321,26 +320,14 @@ static void __iomem *s5p_timer_reg(void) | |||
321 | * this wraps around for now, since it is just a relative time | 320 | * this wraps around for now, since it is just a relative time |
322 | * stamp. (Inspired by U300 implementation.) | 321 | * stamp. (Inspired by U300 implementation.) |
323 | */ | 322 | */ |
324 | static DEFINE_CLOCK_DATA(cd); | 323 | static u32 notrace s5p_read_sched_clock(void) |
325 | |||
326 | unsigned long long notrace sched_clock(void) | ||
327 | { | 324 | { |
328 | void __iomem *reg = s5p_timer_reg(); | 325 | void __iomem *reg = s5p_timer_reg(); |
329 | 326 | ||
330 | if (!reg) | 327 | if (!reg) |
331 | return 0; | 328 | return 0; |
332 | 329 | ||
333 | return cyc_to_sched_clock(&cd, ~__raw_readl(reg), (u32)~0); | 330 | return ~__raw_readl(reg); |
334 | } | ||
335 | |||
336 | static void notrace s5p_update_sched_clock(void) | ||
337 | { | ||
338 | void __iomem *reg = s5p_timer_reg(); | ||
339 | |||
340 | if (!reg) | ||
341 | return; | ||
342 | |||
343 | update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0); | ||
344 | } | 331 | } |
345 | 332 | ||
346 | static void __init s5p_clocksource_init(void) | 333 | static void __init s5p_clocksource_init(void) |
@@ -358,7 +345,7 @@ static void __init s5p_clocksource_init(void) | |||
358 | s5p_time_setup(timer_source.source_id, TCNT_MAX); | 345 | s5p_time_setup(timer_source.source_id, TCNT_MAX); |
359 | s5p_time_start(timer_source.source_id, PERIODIC); | 346 | s5p_time_start(timer_source.source_id, PERIODIC); |
360 | 347 | ||
361 | init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); | 348 | setup_sched_clock(s5p_read_sched_clock, 32, clock_rate); |
362 | 349 | ||
363 | if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer", | 350 | if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer", |
364 | clock_rate, 250, 32, clocksource_mmio_readl_down)) | 351 | clock_rate, 250, 32, clocksource_mmio_readl_down)) |
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index bb0af66bb487..6a2abe67c8b2 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
@@ -234,11 +234,23 @@ config SAMSUNG_DEV_IDE | |||
234 | help | 234 | help |
235 | Compile in platform device definitions for IDE | 235 | Compile in platform device definitions for IDE |
236 | 236 | ||
237 | config S3C64XX_DEV_SPI | 237 | config S3C64XX_DEV_SPI0 |
238 | bool | 238 | bool |
239 | help | 239 | help |
240 | Compile in platform device definitions for S3C64XX's type | 240 | Compile in platform device definitions for S3C64XX's type |
241 | SPI controllers. | 241 | SPI controller 0 |
242 | |||
243 | config S3C64XX_DEV_SPI1 | ||
244 | bool | ||
245 | help | ||
246 | Compile in platform device definitions for S3C64XX's type | ||
247 | SPI controller 1 | ||
248 | |||
249 | config S3C64XX_DEV_SPI2 | ||
250 | bool | ||
251 | help | ||
252 | Compile in platform device definitions for S3C64XX's type | ||
253 | SPI controller 2 | ||
242 | 254 | ||
243 | config SAMSUNG_DEV_TS | 255 | config SAMSUNG_DEV_TS |
244 | bool | 256 | bool |
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 4ca8b571f971..de0d88d6a0f1 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -61,6 +61,7 @@ | |||
61 | #include <plat/regs-iic.h> | 61 | #include <plat/regs-iic.h> |
62 | #include <plat/regs-serial.h> | 62 | #include <plat/regs-serial.h> |
63 | #include <plat/regs-spi.h> | 63 | #include <plat/regs-spi.h> |
64 | #include <plat/s3c64xx-spi.h> | ||
64 | 65 | ||
65 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | 66 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); |
66 | 67 | ||
@@ -1461,3 +1462,129 @@ struct platform_device s3c_device_wdt = { | |||
1461 | .resource = s3c_wdt_resource, | 1462 | .resource = s3c_wdt_resource, |
1462 | }; | 1463 | }; |
1463 | #endif /* CONFIG_S3C_DEV_WDT */ | 1464 | #endif /* CONFIG_S3C_DEV_WDT */ |
1465 | |||
1466 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | ||
1467 | static struct resource s3c64xx_spi0_resource[] = { | ||
1468 | [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), | ||
1469 | [1] = DEFINE_RES_DMA(DMACH_SPI0_TX), | ||
1470 | [2] = DEFINE_RES_DMA(DMACH_SPI0_RX), | ||
1471 | [3] = DEFINE_RES_IRQ(IRQ_SPI0), | ||
1472 | }; | ||
1473 | |||
1474 | struct platform_device s3c64xx_device_spi0 = { | ||
1475 | .name = "s3c64xx-spi", | ||
1476 | .id = 0, | ||
1477 | .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), | ||
1478 | .resource = s3c64xx_spi0_resource, | ||
1479 | .dev = { | ||
1480 | .dma_mask = &samsung_device_dma_mask, | ||
1481 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1482 | }, | ||
1483 | }; | ||
1484 | |||
1485 | void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd, | ||
1486 | int src_clk_nr, int num_cs) | ||
1487 | { | ||
1488 | if (!pd) { | ||
1489 | pr_err("%s:Need to pass platform data\n", __func__); | ||
1490 | return; | ||
1491 | } | ||
1492 | |||
1493 | /* Reject invalid configuration */ | ||
1494 | if (!num_cs || src_clk_nr < 0) { | ||
1495 | pr_err("%s: Invalid SPI configuration\n", __func__); | ||
1496 | return; | ||
1497 | } | ||
1498 | |||
1499 | pd->num_cs = num_cs; | ||
1500 | pd->src_clk_nr = src_clk_nr; | ||
1501 | if (!pd->cfg_gpio) | ||
1502 | pd->cfg_gpio = s3c64xx_spi0_cfg_gpio; | ||
1503 | |||
1504 | s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0); | ||
1505 | } | ||
1506 | #endif /* CONFIG_S3C64XX_DEV_SPI0 */ | ||
1507 | |||
1508 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | ||
1509 | static struct resource s3c64xx_spi1_resource[] = { | ||
1510 | [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), | ||
1511 | [1] = DEFINE_RES_DMA(DMACH_SPI1_TX), | ||
1512 | [2] = DEFINE_RES_DMA(DMACH_SPI1_RX), | ||
1513 | [3] = DEFINE_RES_IRQ(IRQ_SPI1), | ||
1514 | }; | ||
1515 | |||
1516 | struct platform_device s3c64xx_device_spi1 = { | ||
1517 | .name = "s3c64xx-spi", | ||
1518 | .id = 1, | ||
1519 | .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), | ||
1520 | .resource = s3c64xx_spi1_resource, | ||
1521 | .dev = { | ||
1522 | .dma_mask = &samsung_device_dma_mask, | ||
1523 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1524 | }, | ||
1525 | }; | ||
1526 | |||
1527 | void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd, | ||
1528 | int src_clk_nr, int num_cs) | ||
1529 | { | ||
1530 | if (!pd) { | ||
1531 | pr_err("%s:Need to pass platform data\n", __func__); | ||
1532 | return; | ||
1533 | } | ||
1534 | |||
1535 | /* Reject invalid configuration */ | ||
1536 | if (!num_cs || src_clk_nr < 0) { | ||
1537 | pr_err("%s: Invalid SPI configuration\n", __func__); | ||
1538 | return; | ||
1539 | } | ||
1540 | |||
1541 | pd->num_cs = num_cs; | ||
1542 | pd->src_clk_nr = src_clk_nr; | ||
1543 | if (!pd->cfg_gpio) | ||
1544 | pd->cfg_gpio = s3c64xx_spi1_cfg_gpio; | ||
1545 | |||
1546 | s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1); | ||
1547 | } | ||
1548 | #endif /* CONFIG_S3C64XX_DEV_SPI1 */ | ||
1549 | |||
1550 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | ||
1551 | static struct resource s3c64xx_spi2_resource[] = { | ||
1552 | [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), | ||
1553 | [1] = DEFINE_RES_DMA(DMACH_SPI2_TX), | ||
1554 | [2] = DEFINE_RES_DMA(DMACH_SPI2_RX), | ||
1555 | [3] = DEFINE_RES_IRQ(IRQ_SPI2), | ||
1556 | }; | ||
1557 | |||
1558 | struct platform_device s3c64xx_device_spi2 = { | ||
1559 | .name = "s3c64xx-spi", | ||
1560 | .id = 2, | ||
1561 | .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), | ||
1562 | .resource = s3c64xx_spi2_resource, | ||
1563 | .dev = { | ||
1564 | .dma_mask = &samsung_device_dma_mask, | ||
1565 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1566 | }, | ||
1567 | }; | ||
1568 | |||
1569 | void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd, | ||
1570 | int src_clk_nr, int num_cs) | ||
1571 | { | ||
1572 | if (!pd) { | ||
1573 | pr_err("%s:Need to pass platform data\n", __func__); | ||
1574 | return; | ||
1575 | } | ||
1576 | |||
1577 | /* Reject invalid configuration */ | ||
1578 | if (!num_cs || src_clk_nr < 0) { | ||
1579 | pr_err("%s: Invalid SPI configuration\n", __func__); | ||
1580 | return; | ||
1581 | } | ||
1582 | |||
1583 | pd->num_cs = num_cs; | ||
1584 | pd->src_clk_nr = src_clk_nr; | ||
1585 | if (!pd->cfg_gpio) | ||
1586 | pd->cfg_gpio = s3c64xx_spi2_cfg_gpio; | ||
1587 | |||
1588 | s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2); | ||
1589 | } | ||
1590 | #endif /* CONFIG_S3C64XX_DEV_SPI2 */ | ||
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c index 93a994a5dd8f..2cded872f22b 100644 --- a/arch/arm/plat-samsung/dma-ops.c +++ b/arch/arm/plat-samsung/dma-ops.c | |||
@@ -18,23 +18,24 @@ | |||
18 | 18 | ||
19 | #include <mach/dma.h> | 19 | #include <mach/dma.h> |
20 | 20 | ||
21 | static inline bool pl330_filter(struct dma_chan *chan, void *param) | ||
22 | { | ||
23 | struct dma_pl330_peri *peri = chan->private; | ||
24 | return peri->peri_id == (unsigned)param; | ||
25 | } | ||
26 | |||
27 | static unsigned samsung_dmadev_request(enum dma_ch dma_ch, | 21 | static unsigned samsung_dmadev_request(enum dma_ch dma_ch, |
28 | struct samsung_dma_info *info) | 22 | struct samsung_dma_info *info) |
29 | { | 23 | { |
30 | struct dma_chan *chan; | 24 | struct dma_chan *chan; |
31 | dma_cap_mask_t mask; | 25 | dma_cap_mask_t mask; |
32 | struct dma_slave_config slave_config; | 26 | struct dma_slave_config slave_config; |
27 | void *filter_param; | ||
33 | 28 | ||
34 | dma_cap_zero(mask); | 29 | dma_cap_zero(mask); |
35 | dma_cap_set(info->cap, mask); | 30 | dma_cap_set(info->cap, mask); |
36 | 31 | ||
37 | chan = dma_request_channel(mask, pl330_filter, (void *)dma_ch); | 32 | /* |
33 | * If a dma channel property of a device node from device tree is | ||
34 | * specified, use that as the fliter parameter. | ||
35 | */ | ||
36 | filter_param = (dma_ch == DMACH_DT_PROP) ? (void *)info->dt_dmach_prop : | ||
37 | (void *)dma_ch; | ||
38 | chan = dma_request_channel(mask, pl330_filter, filter_param); | ||
38 | 39 | ||
39 | if (info->direction == DMA_FROM_DEVICE) { | 40 | if (info->direction == DMA_FROM_DEVICE) { |
40 | memset(&slave_config, 0, sizeof(struct dma_slave_config)); | 41 | memset(&slave_config, 0, sizeof(struct dma_slave_config)); |
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h index dac4760c0f0a..95509d8eb140 100644 --- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h | |||
@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, | |||
202 | extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); | 202 | extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); |
203 | extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); | 203 | extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); |
204 | 204 | ||
205 | extern void s3c2410_iotiming_debugfs(struct seq_file *seq, | ||
206 | struct s3c_cpufreq_config *cfg, | ||
207 | union s3c_iobank *iob); | ||
208 | |||
209 | extern void s3c2412_iotiming_debugfs(struct seq_file *seq, | ||
210 | struct s3c_cpufreq_config *cfg, | ||
211 | union s3c_iobank *iob); | ||
212 | |||
213 | #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS | 205 | #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS |
214 | #define s3c_cpufreq_debugfs_call(x) x | 206 | #define s3c_cpufreq_debugfs_call(x) x |
215 | #else | 207 | #else |
@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); | |||
226 | extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); | 218 | extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); |
227 | 219 | ||
228 | #ifdef CONFIG_S3C2410_IOTIMING | 220 | #ifdef CONFIG_S3C2410_IOTIMING |
221 | extern void s3c2410_iotiming_debugfs(struct seq_file *seq, | ||
222 | struct s3c_cpufreq_config *cfg, | ||
223 | union s3c_iobank *iob); | ||
224 | |||
229 | extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, | 225 | extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, |
230 | struct s3c_iotimings *iot); | 226 | struct s3c_iotimings *iot); |
231 | 227 | ||
@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, | |||
235 | extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, | 231 | extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, |
236 | struct s3c_iotimings *iot); | 232 | struct s3c_iotimings *iot); |
237 | #else | 233 | #else |
234 | #define s3c2410_iotiming_debugfs NULL | ||
238 | #define s3c2410_iotiming_calc NULL | 235 | #define s3c2410_iotiming_calc NULL |
239 | #define s3c2410_iotiming_get NULL | 236 | #define s3c2410_iotiming_get NULL |
240 | #define s3c2410_iotiming_set NULL | 237 | #define s3c2410_iotiming_set NULL |
@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, | |||
242 | 239 | ||
243 | /* S3C2412 compatible routines */ | 240 | /* S3C2412 compatible routines */ |
244 | 241 | ||
245 | extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, | 242 | #ifdef CONFIG_S3C2412_IOTIMING |
246 | struct s3c_iotimings *timings); | 243 | extern void s3c2412_iotiming_debugfs(struct seq_file *seq, |
244 | struct s3c_cpufreq_config *cfg, | ||
245 | union s3c_iobank *iob); | ||
247 | 246 | ||
248 | extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, | 247 | extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, |
249 | struct s3c_iotimings *timings); | 248 | struct s3c_iotimings *timings); |
@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, | |||
253 | 252 | ||
254 | extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, | 253 | extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, |
255 | struct s3c_iotimings *iot); | 254 | struct s3c_iotimings *iot); |
255 | #else | ||
256 | #define s3c2412_iotiming_debugfs NULL | ||
257 | #define s3c2412_iotiming_calc NULL | ||
258 | #define s3c2412_iotiming_get NULL | ||
259 | #define s3c2412_iotiming_set NULL | ||
260 | #endif /* CONFIG_S3C2412_IOTIMING */ | ||
256 | 261 | ||
257 | #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG | 262 | #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG |
258 | #define s3c_freq_dbg(x...) printk(KERN_INFO x) | 263 | #define s3c_freq_dbg(x...) printk(KERN_INFO x) |
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 40fd7b6b5e66..258d9d8a94f2 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h | |||
@@ -152,13 +152,9 @@ extern void s3c_init_cpu(unsigned long idcode, | |||
152 | /* core initialisation functions */ | 152 | /* core initialisation functions */ |
153 | 153 | ||
154 | extern void s3c24xx_init_irq(void); | 154 | extern void s3c24xx_init_irq(void); |
155 | extern void s3c64xx_init_irq(u32 vic0, u32 vic1); | ||
156 | extern void s5p_init_irq(u32 *vic, u32 num_vic); | 155 | extern void s5p_init_irq(u32 *vic, u32 num_vic); |
157 | 156 | ||
158 | extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); | 157 | extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); |
159 | extern void s3c64xx_init_io(struct map_desc *mach_desc, int size); | ||
160 | extern void s5p_init_io(struct map_desc *mach_desc, | ||
161 | int size, void __iomem *cpuid_addr); | ||
162 | 158 | ||
163 | extern void s3c24xx_init_cpu(void); | 159 | extern void s3c24xx_init_cpu(void); |
164 | extern void s3c64xx_init_cpu(void); | 160 | extern void s3c64xx_init_cpu(void); |
@@ -183,7 +179,6 @@ extern struct syscore_ops s3c2410_pm_syscore_ops; | |||
183 | extern struct syscore_ops s3c2412_pm_syscore_ops; | 179 | extern struct syscore_ops s3c2412_pm_syscore_ops; |
184 | extern struct syscore_ops s3c2416_pm_syscore_ops; | 180 | extern struct syscore_ops s3c2416_pm_syscore_ops; |
185 | extern struct syscore_ops s3c244x_pm_syscore_ops; | 181 | extern struct syscore_ops s3c244x_pm_syscore_ops; |
186 | extern struct syscore_ops s3c64xx_irq_syscore_ops; | ||
187 | 182 | ||
188 | /* system device classes */ | 183 | /* system device classes */ |
189 | 184 | ||
@@ -195,7 +190,6 @@ extern struct sysdev_class s3c2440_sysclass; | |||
195 | extern struct sysdev_class s3c2442_sysclass; | 190 | extern struct sysdev_class s3c2442_sysclass; |
196 | extern struct sysdev_class s3c2443_sysclass; | 191 | extern struct sysdev_class s3c2443_sysclass; |
197 | extern struct sysdev_class s3c6410_sysclass; | 192 | extern struct sysdev_class s3c6410_sysclass; |
198 | extern struct sysdev_class s3c64xx_sysclass; | ||
199 | extern struct sysdev_class s5p64x0_sysclass; | 193 | extern struct sysdev_class s5p64x0_sysclass; |
200 | extern struct sysdev_class s5pv210_sysclass; | 194 | extern struct sysdev_class s5pv210_sysclass; |
201 | extern struct sysdev_class exynos4_sysclass; | 195 | extern struct sysdev_class exynos4_sysclass; |
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index ab633c9c2aec..83b1e31696d9 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -39,6 +39,7 @@ extern struct platform_device s3c64xx_device_pcm0; | |||
39 | extern struct platform_device s3c64xx_device_pcm1; | 39 | extern struct platform_device s3c64xx_device_pcm1; |
40 | extern struct platform_device s3c64xx_device_spi0; | 40 | extern struct platform_device s3c64xx_device_spi0; |
41 | extern struct platform_device s3c64xx_device_spi1; | 41 | extern struct platform_device s3c64xx_device_spi1; |
42 | extern struct platform_device s3c64xx_device_spi2; | ||
42 | 43 | ||
43 | extern struct platform_device s3c_device_adc; | 44 | extern struct platform_device s3c_device_adc; |
44 | extern struct platform_device s3c_device_cfcon; | 45 | extern struct platform_device s3c_device_cfcon; |
@@ -98,8 +99,6 @@ extern struct platform_device s5p6450_device_iis1; | |||
98 | extern struct platform_device s5p6450_device_iis2; | 99 | extern struct platform_device s5p6450_device_iis2; |
99 | extern struct platform_device s5p6450_device_pcm0; | 100 | extern struct platform_device s5p6450_device_pcm0; |
100 | 101 | ||
101 | extern struct platform_device s5p64x0_device_spi0; | ||
102 | extern struct platform_device s5p64x0_device_spi1; | ||
103 | 102 | ||
104 | extern struct platform_device s5pc100_device_ac97; | 103 | extern struct platform_device s5pc100_device_ac97; |
105 | extern struct platform_device s5pc100_device_iis0; | 104 | extern struct platform_device s5pc100_device_iis0; |
@@ -108,9 +107,6 @@ extern struct platform_device s5pc100_device_iis2; | |||
108 | extern struct platform_device s5pc100_device_pcm0; | 107 | extern struct platform_device s5pc100_device_pcm0; |
109 | extern struct platform_device s5pc100_device_pcm1; | 108 | extern struct platform_device s5pc100_device_pcm1; |
110 | extern struct platform_device s5pc100_device_spdif; | 109 | extern struct platform_device s5pc100_device_spdif; |
111 | extern struct platform_device s5pc100_device_spi0; | ||
112 | extern struct platform_device s5pc100_device_spi1; | ||
113 | extern struct platform_device s5pc100_device_spi2; | ||
114 | 110 | ||
115 | extern struct platform_device s5pv210_device_ac97; | 111 | extern struct platform_device s5pv210_device_ac97; |
116 | extern struct platform_device s5pv210_device_iis0; | 112 | extern struct platform_device s5pv210_device_iis0; |
@@ -120,8 +116,6 @@ extern struct platform_device s5pv210_device_pcm0; | |||
120 | extern struct platform_device s5pv210_device_pcm1; | 116 | extern struct platform_device s5pv210_device_pcm1; |
121 | extern struct platform_device s5pv210_device_pcm2; | 117 | extern struct platform_device s5pv210_device_pcm2; |
122 | extern struct platform_device s5pv210_device_spdif; | 118 | extern struct platform_device s5pv210_device_spdif; |
123 | extern struct platform_device s5pv210_device_spi0; | ||
124 | extern struct platform_device s5pv210_device_spi1; | ||
125 | 119 | ||
126 | extern struct platform_device exynos4_device_ac97; | 120 | extern struct platform_device exynos4_device_ac97; |
127 | extern struct platform_device exynos4_device_ahci; | 121 | extern struct platform_device exynos4_device_ahci; |
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h index 4c1a363526cf..22eafc310bd7 100644 --- a/arch/arm/plat-samsung/include/plat/dma-ops.h +++ b/arch/arm/plat-samsung/include/plat/dma-ops.h | |||
@@ -31,6 +31,7 @@ struct samsung_dma_info { | |||
31 | enum dma_slave_buswidth width; | 31 | enum dma_slave_buswidth width; |
32 | dma_addr_t fifo; | 32 | dma_addr_t fifo; |
33 | struct s3c2410_dma_client *client; | 33 | struct s3c2410_dma_client *client; |
34 | struct property *dt_dmach_prop; | ||
34 | }; | 35 | }; |
35 | 36 | ||
36 | struct samsung_dma_ops { | 37 | struct samsung_dma_ops { |
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h index 2e55e5958674..c5eaad529de5 100644 --- a/arch/arm/plat-samsung/include/plat/dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h | |||
@@ -21,7 +21,8 @@ | |||
21 | * use these just as IDs. | 21 | * use these just as IDs. |
22 | */ | 22 | */ |
23 | enum dma_ch { | 23 | enum dma_ch { |
24 | DMACH_UART0_RX, | 24 | DMACH_DT_PROP = -1, |
25 | DMACH_UART0_RX = 0, | ||
25 | DMACH_UART0_TX, | 26 | DMACH_UART0_TX, |
26 | DMACH_UART1_RX, | 27 | DMACH_UART1_RX, |
27 | DMACH_UART1_TX, | 28 | DMACH_UART1_TX, |
diff --git a/arch/arm/plat-samsung/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h deleted file mode 100644 index f546e88ebc94..000000000000 --- a/arch/arm/plat-samsung/include/plat/exynos4.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/exynos4.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Header file for exynos4 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for EXYNOS4 related SoCs */ | ||
14 | |||
15 | extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void exynos4_register_clocks(void); | ||
17 | extern void exynos4210_register_clocks(void); | ||
18 | extern void exynos4212_register_clocks(void); | ||
19 | extern void exynos4_setup_clocks(void); | ||
20 | |||
21 | #ifdef CONFIG_ARCH_EXYNOS | ||
22 | extern int exynos_init(void); | ||
23 | extern void exynos4_init_irq(void); | ||
24 | extern void exynos4_map_io(void); | ||
25 | extern void exynos4_init_clocks(int xtal); | ||
26 | extern struct sys_timer exynos4_timer; | ||
27 | |||
28 | #define exynos4_init_uarts exynos4_common_init_uarts | ||
29 | |||
30 | #else | ||
31 | #define exynos4_init_clocks NULL | ||
32 | #define exynos4_init_uarts NULL | ||
33 | #define exynos4_map_io NULL | ||
34 | #define exynos_init NULL | ||
35 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h index 08d1a7ef97b7..df46b776976a 100644 --- a/arch/arm/plat-samsung/include/plat/irqs.h +++ b/arch/arm/plat-samsung/include/plat/irqs.h | |||
@@ -44,13 +44,14 @@ | |||
44 | #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) | 44 | #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) |
45 | #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) | 45 | #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) |
46 | 46 | ||
47 | #define S5P_TIMER_IRQ(x) (11 + (x)) | 47 | #define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x)) |
48 | 48 | ||
49 | #define IRQ_TIMER0 S5P_TIMER_IRQ(0) | 49 | #define IRQ_TIMER0 S5P_TIMER_IRQ(0) |
50 | #define IRQ_TIMER1 S5P_TIMER_IRQ(1) | 50 | #define IRQ_TIMER1 S5P_TIMER_IRQ(1) |
51 | #define IRQ_TIMER2 S5P_TIMER_IRQ(2) | 51 | #define IRQ_TIMER2 S5P_TIMER_IRQ(2) |
52 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) | 52 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) |
53 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) | 53 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) |
54 | #define IRQ_TIMER_COUNT (5) | ||
54 | 55 | ||
55 | #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ | 56 | #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ |
56 | : ((x) - 16 + S5P_EINT_BASE2)) | 57 | : ((x) - 16 + S5P_EINT_BASE2)) |
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index 720734847027..29c26a818842 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h | |||
@@ -71,6 +71,7 @@ | |||
71 | #define S3C2410_LCON_IRM (1<<6) | 71 | #define S3C2410_LCON_IRM (1<<6) |
72 | 72 | ||
73 | #define S3C2440_UCON_CLKMASK (3<<10) | 73 | #define S3C2440_UCON_CLKMASK (3<<10) |
74 | #define S3C2440_UCON_CLKSHIFT (10) | ||
74 | #define S3C2440_UCON_PCLK (0<<10) | 75 | #define S3C2440_UCON_PCLK (0<<10) |
75 | #define S3C2440_UCON_UCLK (1<<10) | 76 | #define S3C2440_UCON_UCLK (1<<10) |
76 | #define S3C2440_UCON_PCLK2 (2<<10) | 77 | #define S3C2440_UCON_PCLK2 (2<<10) |
@@ -78,6 +79,7 @@ | |||
78 | #define S3C2443_UCON_EPLL (3<<10) | 79 | #define S3C2443_UCON_EPLL (3<<10) |
79 | 80 | ||
80 | #define S3C6400_UCON_CLKMASK (3<<10) | 81 | #define S3C6400_UCON_CLKMASK (3<<10) |
82 | #define S3C6400_UCON_CLKSHIFT (10) | ||
81 | #define S3C6400_UCON_PCLK (0<<10) | 83 | #define S3C6400_UCON_PCLK (0<<10) |
82 | #define S3C6400_UCON_PCLK2 (2<<10) | 84 | #define S3C6400_UCON_PCLK2 (2<<10) |
83 | #define S3C6400_UCON_UCLK0 (1<<10) | 85 | #define S3C6400_UCON_UCLK0 (1<<10) |
@@ -90,11 +92,14 @@ | |||
90 | #define S3C2440_UCON_DIVSHIFT (12) | 92 | #define S3C2440_UCON_DIVSHIFT (12) |
91 | 93 | ||
92 | #define S3C2412_UCON_CLKMASK (3<<10) | 94 | #define S3C2412_UCON_CLKMASK (3<<10) |
95 | #define S3C2412_UCON_CLKSHIFT (10) | ||
93 | #define S3C2412_UCON_UCLK (1<<10) | 96 | #define S3C2412_UCON_UCLK (1<<10) |
94 | #define S3C2412_UCON_USYSCLK (3<<10) | 97 | #define S3C2412_UCON_USYSCLK (3<<10) |
95 | #define S3C2412_UCON_PCLK (0<<10) | 98 | #define S3C2412_UCON_PCLK (0<<10) |
96 | #define S3C2412_UCON_PCLK2 (2<<10) | 99 | #define S3C2412_UCON_PCLK2 (2<<10) |
97 | 100 | ||
101 | #define S3C2410_UCON_CLKMASK (1 << 10) | ||
102 | #define S3C2410_UCON_CLKSHIFT (10) | ||
98 | #define S3C2410_UCON_UCLK (1<<10) | 103 | #define S3C2410_UCON_UCLK (1<<10) |
99 | #define S3C2410_UCON_SBREAK (1<<4) | 104 | #define S3C2410_UCON_SBREAK (1<<4) |
100 | 105 | ||
@@ -193,6 +198,7 @@ | |||
193 | 198 | ||
194 | /* Following are specific to S5PV210 */ | 199 | /* Following are specific to S5PV210 */ |
195 | #define S5PV210_UCON_CLKMASK (1<<10) | 200 | #define S5PV210_UCON_CLKMASK (1<<10) |
201 | #define S5PV210_UCON_CLKSHIFT (10) | ||
196 | #define S5PV210_UCON_PCLK (0<<10) | 202 | #define S5PV210_UCON_PCLK (0<<10) |
197 | #define S5PV210_UCON_UCLK (1<<10) | 203 | #define S5PV210_UCON_UCLK (1<<10) |
198 | 204 | ||
@@ -221,29 +227,24 @@ | |||
221 | #define S5PV210_UFSTAT_RXMASK (255<<0) | 227 | #define S5PV210_UFSTAT_RXMASK (255<<0) |
222 | #define S5PV210_UFSTAT_RXSHIFT (0) | 228 | #define S5PV210_UFSTAT_RXSHIFT (0) |
223 | 229 | ||
224 | #define NO_NEED_CHECK_CLKSRC 1 | 230 | #define S3C2410_UCON_CLKSEL0 (1 << 0) |
231 | #define S3C2410_UCON_CLKSEL1 (1 << 1) | ||
232 | #define S3C2410_UCON_CLKSEL2 (1 << 2) | ||
233 | #define S3C2410_UCON_CLKSEL3 (1 << 3) | ||
225 | 234 | ||
226 | #ifndef __ASSEMBLY__ | 235 | /* Default values for s5pv210 UCON and UFCON uart registers */ |
236 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
237 | S3C2410_UCON_RXILEVEL | \ | ||
238 | S3C2410_UCON_TXIRQMODE | \ | ||
239 | S3C2410_UCON_RXIRQMODE | \ | ||
240 | S3C2410_UCON_RXFIFO_TOI | \ | ||
241 | S3C2443_UCON_RXERR_IRQEN) | ||
227 | 242 | ||
228 | /* struct s3c24xx_uart_clksrc | 243 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
229 | * | 244 | S5PV210_UFCON_TXTRIG4 | \ |
230 | * this structure defines a named clock source that can be used for the | 245 | S5PV210_UFCON_RXTRIG4) |
231 | * uart, so that the best clock can be selected for the requested baud | ||
232 | * rate. | ||
233 | * | ||
234 | * min_baud and max_baud define the range of baud-rates this clock is | ||
235 | * acceptable for, if they are both zero, it is assumed any baud rate that | ||
236 | * can be generated from this clock will be used. | ||
237 | * | ||
238 | * divisor gives the divisor from the clock to the one seen by the uart | ||
239 | */ | ||
240 | 246 | ||
241 | struct s3c24xx_uart_clksrc { | 247 | #ifndef __ASSEMBLY__ |
242 | const char *name; | ||
243 | unsigned int divisor; | ||
244 | unsigned int min_baud; | ||
245 | unsigned int max_baud; | ||
246 | }; | ||
247 | 248 | ||
248 | /* configuration structure for per-machine configurations for the | 249 | /* configuration structure for per-machine configurations for the |
249 | * serial port | 250 | * serial port |
@@ -257,15 +258,13 @@ struct s3c2410_uartcfg { | |||
257 | unsigned char unused; | 258 | unsigned char unused; |
258 | unsigned short flags; | 259 | unsigned short flags; |
259 | upf_t uart_flags; /* default uart flags */ | 260 | upf_t uart_flags; /* default uart flags */ |
261 | unsigned int clk_sel; | ||
260 | 262 | ||
261 | unsigned int has_fracval; | 263 | unsigned int has_fracval; |
262 | 264 | ||
263 | unsigned long ucon; /* value of ucon for port */ | 265 | unsigned long ucon; /* value of ucon for port */ |
264 | unsigned long ulcon; /* value of ulcon for port */ | 266 | unsigned long ulcon; /* value of ulcon for port */ |
265 | unsigned long ufcon; /* value of ufcon for port */ | 267 | unsigned long ufcon; /* value of ufcon for port */ |
266 | |||
267 | struct s3c24xx_uart_clksrc *clocks; | ||
268 | unsigned int clocks_size; | ||
269 | }; | 268 | }; |
270 | 269 | ||
271 | /* s3c24xx_uart_devs | 270 | /* s3c24xx_uart_devs |
diff --git a/arch/arm/plat-samsung/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h deleted file mode 100644 index 32ca5179c6e1..000000000000 --- a/arch/arm/plat-samsung/include/plat/reset.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/reset.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __PLAT_SAMSUNG_RESET_H | ||
12 | #define __PLAT_SAMSUNG_RESET_H __FILE__ | ||
13 | |||
14 | extern void (*s5p_reset_hook)(void); | ||
15 | |||
16 | #endif /* __PLAT_SAMSUNG_RESET_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h index 5bcfd143ba16..cbae50ddacc8 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2412.h +++ b/arch/arm/plat-samsung/include/plat/s3c2412.h | |||
@@ -21,9 +21,12 @@ extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); | |||
21 | extern void s3c2412_init_clocks(int xtal); | 21 | extern void s3c2412_init_clocks(int xtal); |
22 | 22 | ||
23 | extern int s3c2412_baseclk_add(void); | 23 | extern int s3c2412_baseclk_add(void); |
24 | |||
25 | extern void s3c2412_restart(char mode, const char *cmd); | ||
24 | #else | 26 | #else |
25 | #define s3c2412_init_clocks NULL | 27 | #define s3c2412_init_clocks NULL |
26 | #define s3c2412_init_uarts NULL | 28 | #define s3c2412_init_uarts NULL |
27 | #define s3c2412_map_io NULL | 29 | #define s3c2412_map_io NULL |
28 | #define s3c2412_init NULL | 30 | #define s3c2412_init NULL |
31 | #define s3c2412_restart NULL | ||
29 | #endif | 32 | #endif |
diff --git a/arch/arm/plat-samsung/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h index a764f8503f52..de2b5bdc5ebd 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2416.h +++ b/arch/arm/plat-samsung/include/plat/s3c2416.h | |||
@@ -23,9 +23,11 @@ extern void s3c2416_init_clocks(int xtal); | |||
23 | 23 | ||
24 | extern int s3c2416_baseclk_add(void); | 24 | extern int s3c2416_baseclk_add(void); |
25 | 25 | ||
26 | extern void s3c2416_restart(char mode, const char *cmd); | ||
26 | #else | 27 | #else |
27 | #define s3c2416_init_clocks NULL | 28 | #define s3c2416_init_clocks NULL |
28 | #define s3c2416_init_uarts NULL | 29 | #define s3c2416_init_uarts NULL |
29 | #define s3c2416_map_io NULL | 30 | #define s3c2416_map_io NULL |
30 | #define s3c2416_init NULL | 31 | #define s3c2416_init NULL |
32 | #define s3c2416_restart NULL | ||
31 | #endif | 33 | #endif |
diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h index 7fae1a050694..dce05b43d51c 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2443.h +++ b/arch/arm/plat-samsung/include/plat/s3c2443.h | |||
@@ -24,11 +24,13 @@ extern void s3c2443_init_clocks(int xtal); | |||
24 | 24 | ||
25 | extern int s3c2443_baseclk_add(void); | 25 | extern int s3c2443_baseclk_add(void); |
26 | 26 | ||
27 | extern void s3c2443_restart(char mode, const char *cmd); | ||
27 | #else | 28 | #else |
28 | #define s3c2443_init_clocks NULL | 29 | #define s3c2443_init_clocks NULL |
29 | #define s3c2443_init_uarts NULL | 30 | #define s3c2443_init_uarts NULL |
30 | #define s3c2443_map_io NULL | 31 | #define s3c2443_map_io NULL |
31 | #define s3c2443_init NULL | 32 | #define s3c2443_init NULL |
33 | #define s3c2443_restart NULL | ||
32 | #endif | 34 | #endif |
33 | 35 | ||
34 | /* common code used by s3c2443 and others. | 36 | /* common code used by s3c2443 and others. |
diff --git a/arch/arm/plat-samsung/include/plat/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h deleted file mode 100644 index 37d428aaaebb..000000000000 --- a/arch/arm/plat-samsung/include/plat/s3c6400.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s3c6400.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * Header file for s3c6400 cpu support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | /* Common init code for S3C6400 related SoCs */ | ||
16 | |||
17 | extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
18 | extern void s3c6400_setup_clocks(void); | ||
19 | |||
20 | extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); | ||
21 | |||
22 | #ifdef CONFIG_CPU_S3C6400 | ||
23 | |||
24 | extern int s3c6400_init(void); | ||
25 | extern void s3c6400_init_irq(void); | ||
26 | extern void s3c6400_map_io(void); | ||
27 | extern void s3c6400_init_clocks(int xtal); | ||
28 | |||
29 | #define s3c6400_init_uarts s3c6400_common_init_uarts | ||
30 | |||
31 | #else | ||
32 | #define s3c6400_init_clocks NULL | ||
33 | #define s3c6400_init_uarts NULL | ||
34 | #define s3c6400_map_io NULL | ||
35 | #define s3c6400_init NULL | ||
36 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h deleted file mode 100644 index 20a6675b9d17..000000000000 --- a/arch/arm/plat-samsung/include/plat/s3c6410.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s3c6410.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * Header file for s3c6410 cpu support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifdef CONFIG_CPU_S3C6410 | ||
16 | |||
17 | extern int s3c6410_init(void); | ||
18 | extern void s3c6410_init_irq(void); | ||
19 | extern void s3c6410_map_io(void); | ||
20 | extern void s3c6410_init_clocks(int xtal); | ||
21 | |||
22 | #define s3c6410_init_uarts s3c6400_common_init_uarts | ||
23 | |||
24 | #else | ||
25 | #define s3c6410_init_clocks NULL | ||
26 | #define s3c6410_init_uarts NULL | ||
27 | #define s3c6410_map_io NULL | ||
28 | #define s3c6410_init NULL | ||
29 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index 4c16fa3621bb..aea68b60ef98 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
@@ -31,7 +31,6 @@ struct s3c64xx_spi_csinfo { | |||
31 | /** | 31 | /** |
32 | * struct s3c64xx_spi_info - SPI Controller defining structure | 32 | * struct s3c64xx_spi_info - SPI Controller defining structure |
33 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. | 33 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. |
34 | * @src_clk_name: Platform name of the corresponding clock. | ||
35 | * @clk_from_cmu: If the SPI clock/prescalar control block is present | 34 | * @clk_from_cmu: If the SPI clock/prescalar control block is present |
36 | * by the platform's clock-management-unit and not in SPI controller. | 35 | * by the platform's clock-management-unit and not in SPI controller. |
37 | * @num_cs: Number of CS this controller emulates. | 36 | * @num_cs: Number of CS this controller emulates. |
@@ -43,7 +42,6 @@ struct s3c64xx_spi_csinfo { | |||
43 | */ | 42 | */ |
44 | struct s3c64xx_spi_info { | 43 | struct s3c64xx_spi_info { |
45 | int src_clk_nr; | 44 | int src_clk_nr; |
46 | char *src_clk_name; | ||
47 | bool clk_from_cmu; | 45 | bool clk_from_cmu; |
48 | 46 | ||
49 | int num_cs; | 47 | int num_cs; |
@@ -58,18 +56,28 @@ struct s3c64xx_spi_info { | |||
58 | }; | 56 | }; |
59 | 57 | ||
60 | /** | 58 | /** |
61 | * s3c64xx_spi_set_info - SPI Controller configure callback by the board | 59 | * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board |
62 | * initialization code. | 60 | * initialization code. |
63 | * @cntrlr: SPI controller number the configuration is for. | 61 | * @pd: SPI platform data to set. |
64 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. | 62 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. |
65 | * @num_cs: Number of elements in the 'cs' array. | 63 | * @num_cs: Number of elements in the 'cs' array. |
66 | * | 64 | * |
67 | * Call this from machine init code for each SPI Controller that | 65 | * Call this from machine init code for each SPI Controller that |
68 | * has some chips attached to it. | 66 | * has some chips attached to it. |
69 | */ | 67 | */ |
70 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 68 | extern void s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd, |
71 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 69 | int src_clk_nr, int num_cs); |
72 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 70 | extern void s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd, |
73 | extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 71 | int src_clk_nr, int num_cs); |
72 | extern void s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd, | ||
73 | int src_clk_nr, int num_cs); | ||
74 | 74 | ||
75 | /* defined by architecture to configure gpio */ | ||
76 | extern int s3c64xx_spi0_cfg_gpio(struct platform_device *dev); | ||
77 | extern int s3c64xx_spi1_cfg_gpio(struct platform_device *dev); | ||
78 | extern int s3c64xx_spi2_cfg_gpio(struct platform_device *dev); | ||
79 | |||
80 | extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; | ||
81 | extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; | ||
82 | extern struct s3c64xx_spi_info s3c64xx_spi2_pdata; | ||
75 | #endif /* __S3C64XX_PLAT_SPI_H */ | 83 | #endif /* __S3C64XX_PLAT_SPI_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h deleted file mode 100644 index bf85ebbb4fbc..000000000000 --- a/arch/arm/plat-samsung/include/plat/s5p6440.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s5p6440.h | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5p6440 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5P6440 related SoCs */ | ||
14 | |||
15 | extern void s5p6440_register_clocks(void); | ||
16 | extern void s5p6440_setup_clocks(void); | ||
17 | |||
18 | #ifdef CONFIG_CPU_S5P6440 | ||
19 | |||
20 | extern int s5p64x0_init(void); | ||
21 | extern void s5p6440_init_irq(void); | ||
22 | extern void s5p6440_map_io(void); | ||
23 | extern void s5p6440_init_clocks(int xtal); | ||
24 | |||
25 | extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
26 | |||
27 | #else | ||
28 | #define s5p6440_init_clocks NULL | ||
29 | #define s5p6440_init_uarts NULL | ||
30 | #define s5p6440_map_io NULL | ||
31 | #define s5p64x0_init NULL | ||
32 | #endif | ||
33 | |||
34 | /* S5P6440 timer */ | ||
35 | |||
36 | extern struct sys_timer s5p6440_timer; | ||
diff --git a/arch/arm/plat-samsung/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h deleted file mode 100644 index da25f9a1c54a..000000000000 --- a/arch/arm/plat-samsung/include/plat/s5p6450.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s5p6450.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Header file for s5p6450 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5P6450 related SoCs */ | ||
14 | |||
15 | extern void s5p6450_register_clocks(void); | ||
16 | extern void s5p6450_setup_clocks(void); | ||
17 | |||
18 | #ifdef CONFIG_CPU_S5P6450 | ||
19 | |||
20 | extern int s5p64x0_init(void); | ||
21 | extern void s5p6450_init_irq(void); | ||
22 | extern void s5p6450_map_io(void); | ||
23 | extern void s5p6450_init_clocks(int xtal); | ||
24 | |||
25 | extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
26 | |||
27 | #else | ||
28 | #define s5p6450_init_clocks NULL | ||
29 | #define s5p6450_init_uarts NULL | ||
30 | #define s5p6450_map_io NULL | ||
31 | #define s5p64x0_init NULL | ||
32 | #endif | ||
33 | |||
34 | /* S5P6450 timer */ | ||
35 | |||
36 | extern struct sys_timer s5p6450_timer; | ||
diff --git a/arch/arm/plat-samsung/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h deleted file mode 100644 index 9a21aeaaf452..000000000000 --- a/arch/arm/plat-samsung/include/plat/s5pc100.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s5pc100.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5pc100 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5PC100 related SoCs */ | ||
14 | |||
15 | extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void s5pc100_register_clocks(void); | ||
17 | extern void s5pc100_setup_clocks(void); | ||
18 | |||
19 | #ifdef CONFIG_CPU_S5PC100 | ||
20 | |||
21 | extern int s5pc100_init(void); | ||
22 | extern void s5pc100_init_irq(void); | ||
23 | extern void s5pc100_map_io(void); | ||
24 | extern void s5pc100_init_clocks(int xtal); | ||
25 | |||
26 | #define s5pc100_init_uarts s5pc100_common_init_uarts | ||
27 | |||
28 | #else | ||
29 | #define s5pc100_init_clocks NULL | ||
30 | #define s5pc100_init_uarts NULL | ||
31 | #define s5pc100_map_io NULL | ||
32 | #define s5pc100_init NULL | ||
33 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h deleted file mode 100644 index b4bc6be77072..000000000000 --- a/arch/arm/plat-samsung/include/plat/s5pv210.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s5pv210.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5pv210 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5PV210 related SoCs */ | ||
14 | |||
15 | extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void s5pv210_register_clocks(void); | ||
17 | extern void s5pv210_setup_clocks(void); | ||
18 | |||
19 | #ifdef CONFIG_CPU_S5PV210 | ||
20 | |||
21 | extern int s5pv210_init(void); | ||
22 | extern void s5pv210_init_irq(void); | ||
23 | extern void s5pv210_map_io(void); | ||
24 | extern void s5pv210_init_clocks(int xtal); | ||
25 | |||
26 | #define s5pv210_init_uarts s5pv210_common_init_uarts | ||
27 | |||
28 | #else | ||
29 | #define s5pv210_init_clocks NULL | ||
30 | #define s5pv210_init_uarts NULL | ||
31 | #define s5pv210_map_io NULL | ||
32 | #define s5pv210_init NULL | ||
33 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index e7b3c752e919..dcff7dd1ae8a 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -66,8 +66,6 @@ struct s3c_sdhci_platdata { | |||
66 | enum cd_types cd_type; | 66 | enum cd_types cd_type; |
67 | enum clk_types clk_type; | 67 | enum clk_types clk_type; |
68 | 68 | ||
69 | char **clocks; /* set of clock sources */ | ||
70 | |||
71 | int ext_cd_gpio; | 69 | int ext_cd_gpio; |
72 | bool ext_cd_gpio_invert; | 70 | bool ext_cd_gpio_invert; |
73 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, | 71 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, |
@@ -129,12 +127,9 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | |||
129 | /* S3C2416 SDHCI setup */ | 127 | /* S3C2416 SDHCI setup */ |
130 | 128 | ||
131 | #ifdef CONFIG_S3C2416_SETUP_SDHCI | 129 | #ifdef CONFIG_S3C2416_SETUP_SDHCI |
132 | extern char *s3c2416_hsmmc_clksrcs[4]; | ||
133 | |||
134 | static inline void s3c2416_default_sdhci0(void) | 130 | static inline void s3c2416_default_sdhci0(void) |
135 | { | 131 | { |
136 | #ifdef CONFIG_S3C_DEV_HSMMC | 132 | #ifdef CONFIG_S3C_DEV_HSMMC |
137 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
138 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; | 133 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; |
139 | #endif /* CONFIG_S3C_DEV_HSMMC */ | 134 | #endif /* CONFIG_S3C_DEV_HSMMC */ |
140 | } | 135 | } |
@@ -142,7 +137,6 @@ static inline void s3c2416_default_sdhci0(void) | |||
142 | static inline void s3c2416_default_sdhci1(void) | 137 | static inline void s3c2416_default_sdhci1(void) |
143 | { | 138 | { |
144 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 139 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
145 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
146 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; | 140 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; |
147 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 141 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
148 | } | 142 | } |
@@ -155,12 +149,9 @@ static inline void s3c2416_default_sdhci1(void) { } | |||
155 | /* S3C64XX SDHCI setup */ | 149 | /* S3C64XX SDHCI setup */ |
156 | 150 | ||
157 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 151 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
158 | extern char *s3c64xx_hsmmc_clksrcs[4]; | ||
159 | |||
160 | static inline void s3c6400_default_sdhci0(void) | 152 | static inline void s3c6400_default_sdhci0(void) |
161 | { | 153 | { |
162 | #ifdef CONFIG_S3C_DEV_HSMMC | 154 | #ifdef CONFIG_S3C_DEV_HSMMC |
163 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
164 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 155 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
165 | #endif | 156 | #endif |
166 | } | 157 | } |
@@ -168,7 +159,6 @@ static inline void s3c6400_default_sdhci0(void) | |||
168 | static inline void s3c6400_default_sdhci1(void) | 159 | static inline void s3c6400_default_sdhci1(void) |
169 | { | 160 | { |
170 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 161 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
171 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
172 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 162 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
173 | #endif | 163 | #endif |
174 | } | 164 | } |
@@ -176,7 +166,6 @@ static inline void s3c6400_default_sdhci1(void) | |||
176 | static inline void s3c6400_default_sdhci2(void) | 166 | static inline void s3c6400_default_sdhci2(void) |
177 | { | 167 | { |
178 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 168 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
179 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
180 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 169 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
181 | #endif | 170 | #endif |
182 | } | 171 | } |
@@ -184,7 +173,6 @@ static inline void s3c6400_default_sdhci2(void) | |||
184 | static inline void s3c6410_default_sdhci0(void) | 173 | static inline void s3c6410_default_sdhci0(void) |
185 | { | 174 | { |
186 | #ifdef CONFIG_S3C_DEV_HSMMC | 175 | #ifdef CONFIG_S3C_DEV_HSMMC |
187 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
188 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 176 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
189 | #endif | 177 | #endif |
190 | } | 178 | } |
@@ -192,7 +180,6 @@ static inline void s3c6410_default_sdhci0(void) | |||
192 | static inline void s3c6410_default_sdhci1(void) | 180 | static inline void s3c6410_default_sdhci1(void) |
193 | { | 181 | { |
194 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 182 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
195 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
196 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 183 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
197 | #endif | 184 | #endif |
198 | } | 185 | } |
@@ -200,7 +187,6 @@ static inline void s3c6410_default_sdhci1(void) | |||
200 | static inline void s3c6410_default_sdhci2(void) | 187 | static inline void s3c6410_default_sdhci2(void) |
201 | { | 188 | { |
202 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 189 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
203 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
204 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 190 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
205 | #endif | 191 | #endif |
206 | } | 192 | } |
@@ -218,12 +204,9 @@ static inline void s3c6400_default_sdhci2(void) { } | |||
218 | /* S5PC100 SDHCI setup */ | 204 | /* S5PC100 SDHCI setup */ |
219 | 205 | ||
220 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | 206 | #ifdef CONFIG_S5PC100_SETUP_SDHCI |
221 | extern char *s5pc100_hsmmc_clksrcs[4]; | ||
222 | |||
223 | static inline void s5pc100_default_sdhci0(void) | 207 | static inline void s5pc100_default_sdhci0(void) |
224 | { | 208 | { |
225 | #ifdef CONFIG_S3C_DEV_HSMMC | 209 | #ifdef CONFIG_S3C_DEV_HSMMC |
226 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
227 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | 210 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; |
228 | #endif | 211 | #endif |
229 | } | 212 | } |
@@ -231,7 +214,6 @@ static inline void s5pc100_default_sdhci0(void) | |||
231 | static inline void s5pc100_default_sdhci1(void) | 214 | static inline void s5pc100_default_sdhci1(void) |
232 | { | 215 | { |
233 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 216 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
234 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
235 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | 217 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; |
236 | #endif | 218 | #endif |
237 | } | 219 | } |
@@ -239,7 +221,6 @@ static inline void s5pc100_default_sdhci1(void) | |||
239 | static inline void s5pc100_default_sdhci2(void) | 221 | static inline void s5pc100_default_sdhci2(void) |
240 | { | 222 | { |
241 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 223 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
242 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
243 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | 224 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; |
244 | #endif | 225 | #endif |
245 | } | 226 | } |
@@ -254,12 +235,9 @@ static inline void s5pc100_default_sdhci2(void) { } | |||
254 | /* S5PV210 SDHCI setup */ | 235 | /* S5PV210 SDHCI setup */ |
255 | 236 | ||
256 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | 237 | #ifdef CONFIG_S5PV210_SETUP_SDHCI |
257 | extern char *s5pv210_hsmmc_clksrcs[4]; | ||
258 | |||
259 | static inline void s5pv210_default_sdhci0(void) | 238 | static inline void s5pv210_default_sdhci0(void) |
260 | { | 239 | { |
261 | #ifdef CONFIG_S3C_DEV_HSMMC | 240 | #ifdef CONFIG_S3C_DEV_HSMMC |
262 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
263 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | 241 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; |
264 | #endif | 242 | #endif |
265 | } | 243 | } |
@@ -267,7 +245,6 @@ static inline void s5pv210_default_sdhci0(void) | |||
267 | static inline void s5pv210_default_sdhci1(void) | 245 | static inline void s5pv210_default_sdhci1(void) |
268 | { | 246 | { |
269 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 247 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
270 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
271 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | 248 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; |
272 | #endif | 249 | #endif |
273 | } | 250 | } |
@@ -275,7 +252,6 @@ static inline void s5pv210_default_sdhci1(void) | |||
275 | static inline void s5pv210_default_sdhci2(void) | 252 | static inline void s5pv210_default_sdhci2(void) |
276 | { | 253 | { |
277 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 254 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
278 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
279 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | 255 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; |
280 | #endif | 256 | #endif |
281 | } | 257 | } |
@@ -283,7 +259,6 @@ static inline void s5pv210_default_sdhci2(void) | |||
283 | static inline void s5pv210_default_sdhci3(void) | 259 | static inline void s5pv210_default_sdhci3(void) |
284 | { | 260 | { |
285 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 261 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
286 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
287 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | 262 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; |
288 | #endif | 263 | #endif |
289 | } | 264 | } |
@@ -298,12 +273,9 @@ static inline void s5pv210_default_sdhci3(void) { } | |||
298 | 273 | ||
299 | /* EXYNOS4 SDHCI setup */ | 274 | /* EXYNOS4 SDHCI setup */ |
300 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI | 275 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI |
301 | extern char *exynos4_hsmmc_clksrcs[4]; | ||
302 | |||
303 | static inline void exynos4_default_sdhci0(void) | 276 | static inline void exynos4_default_sdhci0(void) |
304 | { | 277 | { |
305 | #ifdef CONFIG_S3C_DEV_HSMMC | 278 | #ifdef CONFIG_S3C_DEV_HSMMC |
306 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
307 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; | 279 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; |
308 | #endif | 280 | #endif |
309 | } | 281 | } |
@@ -311,7 +283,6 @@ static inline void exynos4_default_sdhci0(void) | |||
311 | static inline void exynos4_default_sdhci1(void) | 283 | static inline void exynos4_default_sdhci1(void) |
312 | { | 284 | { |
313 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 285 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
314 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
315 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; | 286 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; |
316 | #endif | 287 | #endif |
317 | } | 288 | } |
@@ -319,7 +290,6 @@ static inline void exynos4_default_sdhci1(void) | |||
319 | static inline void exynos4_default_sdhci2(void) | 290 | static inline void exynos4_default_sdhci2(void) |
320 | { | 291 | { |
321 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 292 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
322 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
323 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; | 293 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; |
324 | #endif | 294 | #endif |
325 | } | 295 | } |
@@ -327,7 +297,6 @@ static inline void exynos4_default_sdhci2(void) | |||
327 | static inline void exynos4_default_sdhci3(void) | 297 | static inline void exynos4_default_sdhci3(void) |
328 | { | 298 | { |
329 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 299 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
330 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
331 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; | 300 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; |
332 | #endif | 301 | #endif |
333 | } | 302 | } |
diff --git a/arch/arm/plat-samsung/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h deleted file mode 100644 index a448e990964d..000000000000 --- a/arch/arm/plat-samsung/include/plat/system-reset.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/system-reset.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h | ||
7 | * | ||
8 | * S5P - System define for arch_reset() | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <plat/watchdog-reset.h> | ||
16 | |||
17 | void (*s5p_reset_hook)(void); | ||
18 | |||
19 | static void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | /* SWRESET support in s5p_reset_hook() */ | ||
22 | |||
23 | if (s5p_reset_hook) | ||
24 | s5p_reset_hook(); | ||
25 | |||
26 | /* Perform reset using Watchdog reset | ||
27 | * if there is no s5p_reset_hook() | ||
28 | */ | ||
29 | |||
30 | arch_wdt_reset(); | ||
31 | } | ||
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h index 40dbb2b0ae22..f19aff19205c 100644 --- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h +++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | #include <linux/delay.h> | ||
20 | 21 | ||
21 | static inline void arch_wdt_reset(void) | 22 | static inline void arch_wdt_reset(void) |
22 | { | 23 | { |
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile index b4f340b8f1f1..e0f2e5b9530c 100644 --- a/arch/arm/plat-spear/Makefile +++ b/arch/arm/plat-spear/Makefile | |||
@@ -3,6 +3,6 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := clock.o time.o | 6 | obj-y := clock.o restart.o time.o |
7 | 7 | ||
8 | obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o | 8 | obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o |
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h index 1171f228d718..86c6f83b44cc 100644 --- a/arch/arm/plat-spear/include/plat/system.h +++ b/arch/arm/plat-spear/include/plat/system.h | |||
@@ -14,10 +14,6 @@ | |||
14 | #ifndef __PLAT_SYSTEM_H | 14 | #ifndef __PLAT_SYSTEM_H |
15 | #define __PLAT_SYSTEM_H | 15 | #define __PLAT_SYSTEM_H |
16 | 16 | ||
17 | #include <linux/io.h> | ||
18 | #include <asm/hardware/sp810.h> | ||
19 | #include <mach/hardware.h> | ||
20 | |||
21 | static inline void arch_idle(void) | 17 | static inline void arch_idle(void) |
22 | { | 18 | { |
23 | /* | 19 | /* |
@@ -27,15 +23,4 @@ static inline void arch_idle(void) | |||
27 | cpu_do_idle(); | 23 | cpu_do_idle(); |
28 | } | 24 | } |
29 | 25 | ||
30 | static inline void arch_reset(char mode, const char *cmd) | ||
31 | { | ||
32 | if (mode == 's') { | ||
33 | /* software reset, Jump into ROM at address 0 */ | ||
34 | soft_restart(0); | ||
35 | } else { | ||
36 | /* hardware reset, Use on-chip reset capability */ | ||
37 | sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); | ||
38 | } | ||
39 | } | ||
40 | |||
41 | #endif /* __PLAT_SYSTEM_H */ | 26 | #endif /* __PLAT_SYSTEM_H */ |
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c new file mode 100644 index 000000000000..2b4e3d82957c --- /dev/null +++ b/arch/arm/plat-spear/restart.c | |||
@@ -0,0 +1,27 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-spear/restart.c | ||
3 | * | ||
4 | * SPEAr platform specific restart functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | #include <linux/io.h> | ||
14 | #include <asm/hardware/sp810.h> | ||
15 | #include <mach/hardware.h> | ||
16 | #include <mach/generic.h> | ||
17 | |||
18 | void spear_restart(char mode, const char *cmd) | ||
19 | { | ||
20 | if (mode == 's') { | ||
21 | /* software reset, Jump into ROM at address 0 */ | ||
22 | soft_restart(0); | ||
23 | } else { | ||
24 | /* hardware reset, Use on-chip reset capability */ | ||
25 | sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); | ||
26 | } | ||
27 | } | ||
diff --git a/arch/arm/plat-tcc/Kconfig b/arch/arm/plat-tcc/Kconfig deleted file mode 100644 index 1bf499570f42..000000000000 --- a/arch/arm/plat-tcc/Kconfig +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | if ARCH_TCC_926 | ||
2 | |||
3 | menu "Telechips ARM926-based CPUs" | ||
4 | |||
5 | choice | ||
6 | prompt "Telechips CPU type:" | ||
7 | default ARCH_TCC8K | ||
8 | |||
9 | config ARCH_TCC8K | ||
10 | bool TCC8000 | ||
11 | select USB_ARCH_HAS_OHCI | ||
12 | help | ||
13 | Support for Telechips TCC8000 systems | ||
14 | |||
15 | endchoice | ||
16 | |||
17 | source "arch/arm/mach-tcc8k/Kconfig" | ||
18 | |||
19 | endmenu | ||
20 | endif | ||
diff --git a/arch/arm/plat-tcc/Makefile b/arch/arm/plat-tcc/Makefile deleted file mode 100644 index eceabc869b8f..000000000000 --- a/arch/arm/plat-tcc/Makefile +++ /dev/null | |||
@@ -1,3 +0,0 @@ | |||
1 | # "Telechips Platform Common Modules" | ||
2 | |||
3 | obj-y := clock.o system.o | ||
diff --git a/arch/arm/plat-tcc/clock.c b/arch/arm/plat-tcc/clock.c deleted file mode 100644 index f3ced10d5271..000000000000 --- a/arch/arm/plat-tcc/clock.c +++ /dev/null | |||
@@ -1,179 +0,0 @@ | |||
1 | /* | ||
2 | * Clock framework for Telechips SoCs | ||
3 | * Based on arch/arm/plat-mxc/clock.c | ||
4 | * | ||
5 | * Copyright (C) 2004 - 2005 Nokia corporation | ||
6 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> | ||
7 | * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> | ||
8 | * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
9 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | ||
10 | * Copyright 2010 Hans J. Koch, hjk@linutronix.de | ||
11 | * | ||
12 | * Licensed under the terms of the GPL v2. | ||
13 | */ | ||
14 | |||
15 | #include <linux/clk.h> | ||
16 | #include <linux/err.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/module.h> | ||
19 | #include <linux/mutex.h> | ||
20 | #include <linux/string.h> | ||
21 | |||
22 | #include <mach/clock.h> | ||
23 | #include <mach/hardware.h> | ||
24 | |||
25 | static DEFINE_MUTEX(clocks_mutex); | ||
26 | |||
27 | /*------------------------------------------------------------------------- | ||
28 | * Standard clock functions defined in include/linux/clk.h | ||
29 | *-------------------------------------------------------------------------*/ | ||
30 | |||
31 | static void __clk_disable(struct clk *clk) | ||
32 | { | ||
33 | BUG_ON(clk->refcount == 0); | ||
34 | |||
35 | if (!(--clk->refcount) && clk->disable) { | ||
36 | /* Unconditionally disable the clock in hardware */ | ||
37 | clk->disable(clk); | ||
38 | /* recursively disable parents */ | ||
39 | if (clk->parent) | ||
40 | __clk_disable(clk->parent); | ||
41 | } | ||
42 | } | ||
43 | |||
44 | static int __clk_enable(struct clk *clk) | ||
45 | { | ||
46 | int ret = 0; | ||
47 | |||
48 | if (clk->refcount++ == 0 && clk->enable) { | ||
49 | if (clk->parent) | ||
50 | ret = __clk_enable(clk->parent); | ||
51 | if (ret) | ||
52 | return ret; | ||
53 | else | ||
54 | return clk->enable(clk); | ||
55 | } | ||
56 | |||
57 | return 0; | ||
58 | } | ||
59 | |||
60 | /* This function increments the reference count on the clock and enables the | ||
61 | * clock if not already enabled. The parent clock tree is recursively enabled | ||
62 | */ | ||
63 | int clk_enable(struct clk *clk) | ||
64 | { | ||
65 | int ret = 0; | ||
66 | |||
67 | if (!clk) | ||
68 | return -EINVAL; | ||
69 | |||
70 | mutex_lock(&clocks_mutex); | ||
71 | ret = __clk_enable(clk); | ||
72 | mutex_unlock(&clocks_mutex); | ||
73 | |||
74 | return ret; | ||
75 | } | ||
76 | EXPORT_SYMBOL_GPL(clk_enable); | ||
77 | |||
78 | /* This function decrements the reference count on the clock and disables | ||
79 | * the clock when reference count is 0. The parent clock tree is | ||
80 | * recursively disabled | ||
81 | */ | ||
82 | void clk_disable(struct clk *clk) | ||
83 | { | ||
84 | if (!clk) | ||
85 | return; | ||
86 | |||
87 | mutex_lock(&clocks_mutex); | ||
88 | __clk_disable(clk); | ||
89 | mutex_unlock(&clocks_mutex); | ||
90 | } | ||
91 | EXPORT_SYMBOL_GPL(clk_disable); | ||
92 | |||
93 | /* Retrieve the *current* clock rate. If the clock itself | ||
94 | * does not provide a special calculation routine, ask | ||
95 | * its parent and so on, until one is able to return | ||
96 | * a valid clock rate | ||
97 | */ | ||
98 | unsigned long clk_get_rate(struct clk *clk) | ||
99 | { | ||
100 | if (!clk) | ||
101 | return 0UL; | ||
102 | |||
103 | if (clk->get_rate) | ||
104 | return clk->get_rate(clk); | ||
105 | |||
106 | return clk_get_rate(clk->parent); | ||
107 | } | ||
108 | EXPORT_SYMBOL_GPL(clk_get_rate); | ||
109 | |||
110 | /* Round the requested clock rate to the nearest supported | ||
111 | * rate that is less than or equal to the requested rate. | ||
112 | * This is dependent on the clock's current parent. | ||
113 | */ | ||
114 | long clk_round_rate(struct clk *clk, unsigned long rate) | ||
115 | { | ||
116 | if (!clk) | ||
117 | return 0; | ||
118 | if (!clk->round_rate) | ||
119 | return 0; | ||
120 | |||
121 | return clk->round_rate(clk, rate); | ||
122 | } | ||
123 | EXPORT_SYMBOL_GPL(clk_round_rate); | ||
124 | |||
125 | /* Set the clock to the requested clock rate. The rate must | ||
126 | * match a supported rate exactly based on what clk_round_rate returns | ||
127 | */ | ||
128 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
129 | { | ||
130 | int ret = -EINVAL; | ||
131 | |||
132 | if (!clk) | ||
133 | return ret; | ||
134 | if (!clk->set_rate || !rate) | ||
135 | return ret; | ||
136 | |||
137 | mutex_lock(&clocks_mutex); | ||
138 | ret = clk->set_rate(clk, rate); | ||
139 | mutex_unlock(&clocks_mutex); | ||
140 | |||
141 | return ret; | ||
142 | } | ||
143 | EXPORT_SYMBOL_GPL(clk_set_rate); | ||
144 | |||
145 | /* Set the clock's parent to another clock source */ | ||
146 | int clk_set_parent(struct clk *clk, struct clk *parent) | ||
147 | { | ||
148 | struct clk *old; | ||
149 | int ret = -EINVAL; | ||
150 | |||
151 | if (!clk) | ||
152 | return ret; | ||
153 | if (!clk->set_parent || !parent) | ||
154 | return ret; | ||
155 | |||
156 | mutex_lock(&clocks_mutex); | ||
157 | old = clk->parent; | ||
158 | if (clk->refcount) | ||
159 | __clk_enable(parent); | ||
160 | ret = clk->set_parent(clk, parent); | ||
161 | if (ret) | ||
162 | old = parent; | ||
163 | if (clk->refcount) | ||
164 | __clk_disable(old); | ||
165 | mutex_unlock(&clocks_mutex); | ||
166 | |||
167 | return ret; | ||
168 | } | ||
169 | EXPORT_SYMBOL_GPL(clk_set_parent); | ||
170 | |||
171 | /* Retrieve the clock's parent clock source */ | ||
172 | struct clk *clk_get_parent(struct clk *clk) | ||
173 | { | ||
174 | if (!clk) | ||
175 | return NULL; | ||
176 | |||
177 | return clk->parent; | ||
178 | } | ||
179 | EXPORT_SYMBOL_GPL(clk_get_parent); | ||
diff --git a/arch/arm/plat-tcc/include/mach/clock.h b/arch/arm/plat-tcc/include/mach/clock.h deleted file mode 100644 index a12f58ad71a8..000000000000 --- a/arch/arm/plat-tcc/include/mach/clock.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * Low level clock header file for Telechips TCC architecture | ||
3 | * (C) 2010 Hans J. Koch <hjk@linutronix.de> | ||
4 | * | ||
5 | * Licensed under the GPL v2. | ||
6 | */ | ||
7 | |||
8 | #ifndef __ASM_ARCH_TCC_CLOCK_H__ | ||
9 | #define __ASM_ARCH_TCC_CLOCK_H__ | ||
10 | |||
11 | #ifndef __ASSEMBLY__ | ||
12 | |||
13 | struct clk { | ||
14 | struct clk *parent; | ||
15 | /* id number of a root clock, 0 for normal clocks */ | ||
16 | int root_id; | ||
17 | /* Reference count of clock enable/disable */ | ||
18 | int refcount; | ||
19 | /* Address of associated BCLKCTRx register. Must be set. */ | ||
20 | void __iomem *bclkctr; | ||
21 | /* Bit position for BCLKCTRx. Must be set. */ | ||
22 | int bclk_shift; | ||
23 | /* Address of ACLKxxx register, if any. */ | ||
24 | void __iomem *aclkreg; | ||
25 | /* get the current clock rate (always a fresh value) */ | ||
26 | unsigned long (*get_rate) (struct clk *); | ||
27 | /* Function ptr to set the clock to a new rate. The rate must match a | ||
28 | supported rate returned from round_rate. Leave blank if clock is not | ||
29 | programmable */ | ||
30 | int (*set_rate) (struct clk *, unsigned long); | ||
31 | /* Function ptr to round the requested clock rate to the nearest | ||
32 | supported rate that is less than or equal to the requested rate. */ | ||
33 | unsigned long (*round_rate) (struct clk *, unsigned long); | ||
34 | /* Function ptr to enable the clock. Leave blank if clock can not | ||
35 | be gated. */ | ||
36 | int (*enable) (struct clk *); | ||
37 | /* Function ptr to disable the clock. Leave blank if clock can not | ||
38 | be gated. */ | ||
39 | void (*disable) (struct clk *); | ||
40 | /* Function ptr to set the parent clock of the clock. */ | ||
41 | int (*set_parent) (struct clk *, struct clk *); | ||
42 | }; | ||
43 | |||
44 | int clk_register(struct clk *clk); | ||
45 | void clk_unregister(struct clk *clk); | ||
46 | |||
47 | #endif /* __ASSEMBLY__ */ | ||
48 | #endif /* __ASM_ARCH_MXC_CLOCK_H__ */ | ||
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S deleted file mode 100644 index cf17d04ec30d..000000000000 --- a/arch/arm/plat-tcc/include/mach/debug-macro.S +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1994-1999 Russell King | ||
3 | * Copyright (C) 2008-2009 Telechips | ||
4 | * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | .macro addruart, rp, rv, tmp | ||
13 | moveq \rp, #0x90000000 @ physical base address | ||
14 | movne \rv, #0xF1000000 @ virtual base | ||
15 | orr \rp, \rp, #0x00007000 @ UART0 | ||
16 | orr \rv, \rv, #0x00007000 @ UART0 | ||
17 | .endm | ||
18 | |||
19 | .macro senduart,rd,rx | ||
20 | strb \rd, [\rx, #0x44] | ||
21 | .endm | ||
22 | |||
23 | .macro waituart,rd,rx | ||
24 | .endm | ||
25 | |||
26 | .macro busyuart,rd,rx | ||
27 | 1001: | ||
28 | ldr \rd, [\rx, #0x14] | ||
29 | tst \rd, #0x20 | ||
30 | |||
31 | beq 1001b | ||
32 | .endm | ||
diff --git a/arch/arm/plat-tcc/include/mach/entry-macro.S b/arch/arm/plat-tcc/include/mach/entry-macro.S deleted file mode 100644 index 748f401e4b6d..000000000000 --- a/arch/arm/plat-tcc/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-tcc83x/entry-macro.S | ||
3 | * | ||
4 | * Author : <linux@telechips.com> | ||
5 | * Created: June 10, 2008 | ||
6 | * Description: Low-level IRQ helper macros for Telechips-based platforms | ||
7 | * | ||
8 | * Copyright (C) 2008-2009 Telechips | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | #include <mach/hardware.h> | ||
16 | #include <mach/irqs.h> | ||
17 | |||
18 | .macro disable_fiq | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_preamble, base, tmp | ||
22 | .endm | ||
23 | |||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
28 | |||
29 | ldr \base, =0xF2003000 @ base address of PIC registers | ||
30 | |||
31 | @@ read MREQ register of PIC0 | ||
32 | |||
33 | mov \irqnr, #0 | ||
34 | ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts | ||
35 | cmp \irqstat, #0 | ||
36 | bne 1001f | ||
37 | |||
38 | @@ read MREQ register of PIC1 | ||
39 | |||
40 | ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts | ||
41 | cmp \irqstat, #0 | ||
42 | beq 1002f | ||
43 | mov \irqnr, #0x20 | ||
44 | |||
45 | 1001: | ||
46 | movs \tmp, \irqstat, lsl #16 | ||
47 | movne \irqstat, \tmp | ||
48 | addeq \irqnr, \irqnr, #16 | ||
49 | |||
50 | movs \tmp, \irqstat, lsl #8 | ||
51 | movne \irqstat, \tmp | ||
52 | addeq \irqnr, \irqnr, #8 | ||
53 | |||
54 | movs \tmp, \irqstat, lsl #4 | ||
55 | movne \irqstat, \tmp | ||
56 | addeq \irqnr, \irqnr, #4 | ||
57 | |||
58 | movs \tmp, \irqstat, lsl #2 | ||
59 | movne \irqstat, \tmp | ||
60 | addeq \irqnr, \irqnr, #2 | ||
61 | |||
62 | movs \tmp, \irqstat, lsl #1 | ||
63 | addeq \irqnr, \irqnr, #1 | ||
64 | orrs \base, \base, #1 | ||
65 | 1002: | ||
66 | @@ exit here, Z flag unset if IRQ | ||
67 | |||
68 | .endm | ||
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h deleted file mode 100644 index e70d126ccaf3..000000000000 --- a/arch/arm/plat-tcc/include/mach/hardware.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com> | ||
3 | * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com> | ||
4 | * and Dirk Behme <dirk.behme@de.bosch.com> | ||
5 | * Rewritten by: <linux@telechips.com> | ||
6 | * Description: Hardware definitions for TCC8300 processors and boards | ||
7 | * | ||
8 | * Copyright (C) 2001 RidgeRun, Inc. | ||
9 | * Copyright (C) 2008-2009 Telechips | ||
10 | * | ||
11 | * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
12 | * | ||
13 | * Licensed under the terms of the GNU Pulic License version 2. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARCH_TCC_HARDWARE_H | ||
17 | #define __ASM_ARCH_TCC_HARDWARE_H | ||
18 | |||
19 | #include <asm/sizes.h> | ||
20 | #ifndef __ASSEMBLER__ | ||
21 | #include <asm/types.h> | ||
22 | #endif | ||
23 | #include <mach/io.h> | ||
24 | |||
25 | /* | ||
26 | * ---------------------------------------------------------------------------- | ||
27 | * Clocks | ||
28 | * ---------------------------------------------------------------------------- | ||
29 | */ | ||
30 | #define CLKGEN_REG_BASE 0xfffece00 | ||
31 | #define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) | ||
32 | #define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) | ||
33 | #define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) | ||
34 | #define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) | ||
35 | #define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) | ||
36 | #define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) | ||
37 | #define ARM_SYSST (CLKGEN_REG_BASE + 0x18) | ||
38 | #define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) | ||
39 | |||
40 | /* DPLL control registers */ | ||
41 | #define DPLL_CTL 0xfffecf00 | ||
42 | |||
43 | #endif /* __ASM_ARCH_TCC_HARDWARE_H */ | ||
diff --git a/arch/arm/plat-tcc/include/mach/io.h b/arch/arm/plat-tcc/include/mach/io.h deleted file mode 100644 index 3e911d3ea0f1..000000000000 --- a/arch/arm/plat-tcc/include/mach/io.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * IO definitions for TCC8000 processors and boards | ||
3 | * | ||
4 | * Copyright (C) 1997-1999 Russell King | ||
5 | * Copyright (C) 2008-2009 Telechips | ||
6 | * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de> | ||
7 | * | ||
8 | * Licensed under the terms of the GNU Public License version 2. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARM_ARCH_IO_H | ||
12 | #define __ASM_ARM_ARCH_IO_H | ||
13 | |||
14 | #define IO_SPACE_LIMIT 0xffffffff | ||
15 | |||
16 | /* | ||
17 | * We don't actually have real ISA nor PCI buses, but there is so many | ||
18 | * drivers out there that might just work if we fake them... | ||
19 | */ | ||
20 | #define __io(a) __typesafe_io(a) | ||
21 | #define __mem_pci(a) (a) | ||
22 | |||
23 | #endif | ||
diff --git a/arch/arm/plat-tcc/include/mach/irqs.h b/arch/arm/plat-tcc/include/mach/irqs.h deleted file mode 100644 index da863894d498..000000000000 --- a/arch/arm/plat-tcc/include/mach/irqs.h +++ /dev/null | |||
@@ -1,83 +0,0 @@ | |||
1 | /* | ||
2 | * IRQ definitions for TCC8xxx | ||
3 | * | ||
4 | * Copyright (C) 2008-2009 Telechips | ||
5 | * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
6 | * | ||
7 | * Licensed under the terms of the GPL v2. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_TCC_IRQS_H | ||
12 | #define __ASM_ARCH_TCC_IRQS_H | ||
13 | |||
14 | #define NR_IRQS 64 | ||
15 | |||
16 | /* PIC0 interrupts */ | ||
17 | #define INT_ADMA1 0 | ||
18 | #define INT_BDMA 1 | ||
19 | #define INT_ADMA0 2 | ||
20 | #define INT_GDMA1 3 | ||
21 | #define INT_I2S0RX 4 | ||
22 | #define INT_I2S0TX 5 | ||
23 | #define INT_TC 6 | ||
24 | #define INT_UART0 7 | ||
25 | #define INT_USBD 8 | ||
26 | #define INT_SPI0TX 9 | ||
27 | #define INT_UDMA 10 | ||
28 | #define INT_LIRQ 11 | ||
29 | #define INT_GDMA2 12 | ||
30 | #define INT_GDMA0 13 | ||
31 | #define INT_TC32 14 | ||
32 | #define INT_LCD 15 | ||
33 | #define INT_ADC 16 | ||
34 | #define INT_I2C 17 | ||
35 | #define INT_RTCP 18 | ||
36 | #define INT_RTCA 19 | ||
37 | #define INT_NFC 20 | ||
38 | #define INT_SD0 21 | ||
39 | #define INT_GSB0 22 | ||
40 | #define INT_PK 23 | ||
41 | #define INT_USBH0 24 | ||
42 | #define INT_USBH1 25 | ||
43 | #define INT_G2D 26 | ||
44 | #define INT_ECC 27 | ||
45 | #define INT_SPI0RX 28 | ||
46 | #define INT_UART1 29 | ||
47 | #define INT_MSCL 30 | ||
48 | #define INT_GSB1 31 | ||
49 | /* PIC1 interrupts */ | ||
50 | #define INT_E0 32 | ||
51 | #define INT_E1 33 | ||
52 | #define INT_E2 34 | ||
53 | #define INT_E3 35 | ||
54 | #define INT_E4 36 | ||
55 | #define INT_E5 37 | ||
56 | #define INT_E6 38 | ||
57 | #define INT_E7 39 | ||
58 | #define INT_UART2 40 | ||
59 | #define INT_UART3 41 | ||
60 | #define INT_SPI1TX 42 | ||
61 | #define INT_SPI1RX 43 | ||
62 | #define INT_GSB2 44 | ||
63 | #define INT_SPDIF 45 | ||
64 | #define INT_CDIF 46 | ||
65 | #define INT_VBON 47 | ||
66 | #define INT_VBOFF 48 | ||
67 | #define INT_SD1 49 | ||
68 | #define INT_UART4 50 | ||
69 | #define INT_GDMA3 51 | ||
70 | #define INT_I2S1RX 52 | ||
71 | #define INT_I2S1TX 53 | ||
72 | #define INT_CAN0 54 | ||
73 | #define INT_CAN1 55 | ||
74 | #define INT_GSB3 56 | ||
75 | #define INT_KRST 57 | ||
76 | #define INT_UNUSED 58 | ||
77 | #define INT_SD0D3 59 | ||
78 | #define INT_SD1D3 60 | ||
79 | #define INT_GPS0 61 | ||
80 | #define INT_GPS1 62 | ||
81 | #define INT_GPS2 63 | ||
82 | |||
83 | #endif /* ASM_ARCH_TCC_IRQS_H */ | ||
diff --git a/arch/arm/plat-tcc/include/mach/system.h b/arch/arm/plat-tcc/include/mach/system.h deleted file mode 100644 index 909e6035d843..000000000000 --- a/arch/arm/plat-tcc/include/mach/system.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * Author: <linux@telechips.com> | ||
3 | * Created: June 10, 2008 | ||
4 | * Description: LINUX SYSTEM FUNCTIONS for TCC83x | ||
5 | * | ||
6 | * Copyright (C) 2008-2009 Telechips | ||
7 | * | ||
8 | * Licensed under the terms of the GPL v2. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARCH_SYSTEM_H | ||
13 | #define __ASM_ARCH_SYSTEM_H | ||
14 | #include <linux/clk.h> | ||
15 | |||
16 | #include <asm/mach-types.h> | ||
17 | #include <mach/hardware.h> | ||
18 | |||
19 | extern void plat_tcc_reboot(void); | ||
20 | |||
21 | static inline void arch_idle(void) | ||
22 | { | ||
23 | cpu_do_idle(); | ||
24 | } | ||
25 | |||
26 | static inline void arch_reset(char mode, const char *cmd) | ||
27 | { | ||
28 | plat_tcc_reboot(); | ||
29 | } | ||
30 | |||
31 | #endif | ||
diff --git a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/arch/arm/plat-tcc/include/mach/tcc8k-regs.h deleted file mode 100644 index 1d9428295332..000000000000 --- a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h +++ /dev/null | |||
@@ -1,807 +0,0 @@ | |||
1 | /* | ||
2 | * Telechips TCC8000 register definitions | ||
3 | * | ||
4 | * (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
5 | * | ||
6 | * Licensed under the terms of the GPLv2. | ||
7 | */ | ||
8 | |||
9 | #ifndef TCC8K_REGS_H | ||
10 | #define TCC8K_REGS_H | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | |||
14 | #define EXT_SDRAM_BASE 0x20000000 | ||
15 | #define INT_SRAM_BASE 0x30000000 | ||
16 | #define INT_SRAM_SIZE SZ_32K | ||
17 | #define CS0_BASE 0x40000000 | ||
18 | #define CS1_BASE 0x50000000 | ||
19 | #define CS1_SIZE SZ_64K | ||
20 | #define CS2_BASE 0x60000000 | ||
21 | #define CS3_BASE 0x70000000 | ||
22 | #define AHB_PERI_BASE 0x80000000 | ||
23 | #define AHB_PERI_SIZE SZ_64K | ||
24 | #define APB0_PERI_BASE 0x90000000 | ||
25 | #define APB0_PERI_SIZE SZ_128K | ||
26 | #define APB1_PERI_BASE 0x98000000 | ||
27 | #define APB1_PERI_SIZE SZ_128K | ||
28 | #define DATA_TCM_BASE 0xa0000000 | ||
29 | #define DATA_TCM_SIZE SZ_8K | ||
30 | #define EXT_MEM_CTRL_BASE 0xf0000000 | ||
31 | #define EXT_MEM_CTRL_SIZE SZ_4K | ||
32 | |||
33 | #define CS1_BASE_VIRT (void __iomem *)0xf7000000 | ||
34 | #define AHB_PERI_BASE_VIRT (void __iomem *)0xf4000000 | ||
35 | #define APB0_PERI_BASE_VIRT (void __iomem *)0xf1000000 | ||
36 | #define APB1_PERI_BASE_VIRT (void __iomem *)0xf2000000 | ||
37 | #define EXT_MEM_CTRL_BASE_VIRT (void __iomem *)0xf3000000 | ||
38 | #define INT_SRAM_BASE_VIRT (void __iomem *)0xf5000000 | ||
39 | #define DATA_TCM_BASE_VIRT (void __iomem *)0xf6000000 | ||
40 | |||
41 | #define __REG(x) (*((volatile u32 *)(x))) | ||
42 | |||
43 | /* USB Device Controller Registers */ | ||
44 | #define UDC_BASE (AHB_PERI_BASE_VIRT + 0x8000) | ||
45 | #define UDC_BASE_PHYS (AHB_PERI_BASE + 0x8000) | ||
46 | |||
47 | #define UDC_IR_OFFS 0x00 | ||
48 | #define UDC_EIR_OFFS 0x04 | ||
49 | #define UDC_EIER_OFFS 0x08 | ||
50 | #define UDC_FAR_OFFS 0x0c | ||
51 | #define UDC_FNR_OFFS 0x10 | ||
52 | #define UDC_EDR_OFFS 0x14 | ||
53 | #define UDC_RT_OFFS 0x18 | ||
54 | #define UDC_SSR_OFFS 0x1c | ||
55 | #define UDC_SCR_OFFS 0x20 | ||
56 | #define UDC_EP0SR_OFFS 0x24 | ||
57 | #define UDC_EP0CR_OFFS 0x28 | ||
58 | |||
59 | #define UDC_ESR_OFFS 0x2c | ||
60 | #define UDC_ECR_OFFS 0x30 | ||
61 | #define UDC_BRCR_OFFS 0x34 | ||
62 | #define UDC_BWCR_OFFS 0x38 | ||
63 | #define UDC_MPR_OFFS 0x3c | ||
64 | #define UDC_DCR_OFFS 0x40 | ||
65 | #define UDC_DTCR_OFFS 0x44 | ||
66 | #define UDC_DFCR_OFFS 0x48 | ||
67 | #define UDC_DTTCR1_OFFS 0x4c | ||
68 | #define UDC_DTTCR2_OFFS 0x50 | ||
69 | #define UDC_ESR2_OFFS 0x54 | ||
70 | |||
71 | #define UDC_SCR2_OFFS 0x58 | ||
72 | #define UDC_EP0BUF_OFFS 0x60 | ||
73 | #define UDC_EP1BUF_OFFS 0x64 | ||
74 | #define UDC_EP2BUF_OFFS 0x68 | ||
75 | #define UDC_EP3BUF_OFFS 0x6c | ||
76 | #define UDC_PLICR_OFFS 0xa0 | ||
77 | #define UDC_PCR_OFFS 0xa4 | ||
78 | |||
79 | #define UDC_UPCR0_OFFS 0xc8 | ||
80 | #define UDC_UPCR1_OFFS 0xcc | ||
81 | #define UDC_UPCR2_OFFS 0xd0 | ||
82 | #define UDC_UPCR3_OFFS 0xd4 | ||
83 | |||
84 | /* Bits in UDC_EIR */ | ||
85 | #define UDC_EIR_EP0I (1 << 0) | ||
86 | #define UDC_EIR_EP1I (1 << 1) | ||
87 | #define UDC_EIR_EP2I (1 << 2) | ||
88 | #define UDC_EIR_EP3I (1 << 3) | ||
89 | #define UDC_EIR_EPI_MASK 0x0f | ||
90 | |||
91 | /* Bits in UDC_EIER */ | ||
92 | #define UDC_EIER_EP0IE (1 << 0) | ||
93 | #define UDC_EIER_EP1IE (1 << 1) | ||
94 | #define UDC_EIER_EP2IE (1 << 2) | ||
95 | #define UDC_EIER_EP3IE (1 << 3) | ||
96 | |||
97 | /* Bits in UDC_FNR */ | ||
98 | #define UDC_FNR_FN_MASK 0x7ff | ||
99 | #define UDC_FNR_SM (1 << 13) | ||
100 | #define UDC_FNR_FTL (1 << 14) | ||
101 | |||
102 | /* Bits in UDC_SSR */ | ||
103 | #define UDC_SSR_HFRES (1 << 0) | ||
104 | #define UDC_SSR_HFSUSP (1 << 1) | ||
105 | #define UDC_SSR_HFRM (1 << 2) | ||
106 | #define UDC_SSR_SDE (1 << 3) | ||
107 | #define UDC_SSR_HSP (1 << 4) | ||
108 | #define UDC_SSR_DM (1 << 5) | ||
109 | #define UDC_SSR_DP (1 << 6) | ||
110 | #define UDC_SSR_TBM (1 << 7) | ||
111 | #define UDC_SSR_VBON (1 << 8) | ||
112 | #define UDC_SSR_VBOFF (1 << 9) | ||
113 | #define UDC_SSR_EOERR (1 << 10) | ||
114 | #define UDC_SSR_DCERR (1 << 11) | ||
115 | #define UDC_SSR_TCERR (1 << 12) | ||
116 | #define UDC_SSR_BSERR (1 << 13) | ||
117 | #define UDC_SSR_TMERR (1 << 14) | ||
118 | #define UDC_SSR_BAERR (1 << 15) | ||
119 | |||
120 | /* Bits in UDC_SCR */ | ||
121 | #define UDC_SCR_HRESE (1 << 0) | ||
122 | #define UDC_SCR_HSSPE (1 << 1) | ||
123 | #define UDC_SCR_RRDE (1 << 5) | ||
124 | #define UDC_SCR_SPDEN (1 << 6) | ||
125 | #define UDC_SCR_DIEN (1 << 12) | ||
126 | |||
127 | /* Bits in UDC_EP0SR */ | ||
128 | #define UDC_EP0SR_RSR (1 << 0) | ||
129 | #define UDC_EP0SR_TST (1 << 1) | ||
130 | #define UDC_EP0SR_SHT (1 << 4) | ||
131 | #define UDC_EP0SR_LWO (1 << 6) | ||
132 | |||
133 | /* Bits in UDC_EP0CR */ | ||
134 | #define UDC_EP0CR_ESS (1 << 1) | ||
135 | |||
136 | /* Bits in UDC_ESR */ | ||
137 | #define UDC_ESR_RPS (1 << 0) | ||
138 | #define UDC_ESR_TPS (1 << 1) | ||
139 | #define UDC_ESR_LWO (1 << 4) | ||
140 | #define UDC_ESR_FFS (1 << 6) | ||
141 | |||
142 | /* Bits in UDC_ECR */ | ||
143 | #define UDC_ECR_ESS (1 << 1) | ||
144 | #define UDC_ECR_CDP (1 << 2) | ||
145 | |||
146 | #define UDC_ECR_FLUSH (1 << 6) | ||
147 | #define UDC_ECR_DUEN (1 << 7) | ||
148 | |||
149 | /* Bits in UDC_UPCR0 */ | ||
150 | #define UDC_UPCR0_VBD (1 << 1) | ||
151 | #define UDC_UPCR0_VBDS (1 << 6) | ||
152 | #define UDC_UPCR0_RCD_12 (0x0 << 9) | ||
153 | #define UDC_UPCR0_RCD_24 (0x1 << 9) | ||
154 | #define UDC_UPCR0_RCD_48 (0x2 << 9) | ||
155 | #define UDC_UPCR0_RCS_EXT (0x1 << 11) | ||
156 | #define UDC_UPCR0_RCS_XTAL (0x0 << 11) | ||
157 | |||
158 | /* Bits in UDC_UPCR1 */ | ||
159 | #define UDC_UPCR1_CDT(x) ((x) << 0) | ||
160 | #define UDC_UPCR1_OTGT(x) ((x) << 3) | ||
161 | #define UDC_UPCR1_SQRXT(x) ((x) << 8) | ||
162 | #define UDC_UPCR1_TXFSLST(x) ((x) << 12) | ||
163 | |||
164 | /* Bits in UDC_UPCR2 */ | ||
165 | #define UDC_UPCR2_TP (1 << 0) | ||
166 | #define UDC_UPCR2_TXRT(x) ((x) << 2) | ||
167 | #define UDC_UPCR2_TXVRT(x) ((x) << 5) | ||
168 | #define UDC_UPCR2_OPMODE(x) ((x) << 9) | ||
169 | #define UDC_UPCR2_XCVRSEL(x) ((x) << 12) | ||
170 | #define UDC_UPCR2_TM (1 << 14) | ||
171 | |||
172 | /* USB Host Controller registers */ | ||
173 | #define USBH0_BASE (AHB_PERI_BASE_VIRT + 0xb000) | ||
174 | #define USBH1_BASE (AHB_PERI_BASE_VIRT + 0xb800) | ||
175 | |||
176 | #define OHCI_INT_ENABLE_OFFS 0x10 | ||
177 | |||
178 | #define RH_DESCRIPTOR_A_OFFS 0x48 | ||
179 | #define RH_DESCRIPTOR_B_OFFS 0x4c | ||
180 | |||
181 | #define USBHTCFG0_OFFS 0x100 | ||
182 | #define USBHHCFG0_OFFS 0x104 | ||
183 | #define USBHHCFG1_OFFS 0x104 | ||
184 | |||
185 | /* DMA controller registers */ | ||
186 | #define DMAC0_BASE (AHB_PERI_BASE + 0x4000) | ||
187 | #define DMAC1_BASE (AHB_PERI_BASE + 0xa000) | ||
188 | #define DMAC2_BASE (AHB_PERI_BASE + 0x4800) | ||
189 | #define DMAC3_BASE (AHB_PERI_BASE + 0xa800) | ||
190 | |||
191 | #define DMAC_CH_OFFSET(ch) (ch * 0x30) | ||
192 | |||
193 | #define ST_SADR_OFFS 0x00 | ||
194 | #define SPARAM_OFFS 0x04 | ||
195 | #define C_SADR_OFFS 0x0c | ||
196 | #define ST_DADR_OFFS 0x10 | ||
197 | #define DPARAM_OFFS 0x14 | ||
198 | #define C_DADR_OFFS 0x1c | ||
199 | #define HCOUNT_OFFS 0x20 | ||
200 | #define CHCTRL_OFFS 0x24 | ||
201 | #define RPTCTRL_OFFS 0x28 | ||
202 | #define EXTREQ_A_OFFS 0x2c | ||
203 | |||
204 | /* Bits in CHCTRL register */ | ||
205 | #define CHCTRL_EN (1 << 0) | ||
206 | |||
207 | #define CHCTRL_IEN (1 << 2) | ||
208 | #define CHCTRL_FLAG (1 << 3) | ||
209 | #define CHCTRL_WSIZE8 (0 << 4) | ||
210 | #define CHCTRL_WSIZE16 (1 << 4) | ||
211 | #define CHCTRL_WSIZE32 (2 << 4) | ||
212 | |||
213 | #define CHCTRL_BSIZE1 (0 << 6) | ||
214 | #define CHCTRL_BSIZE2 (1 << 6) | ||
215 | #define CHCTRL_BSIZE4 (2 << 6) | ||
216 | #define CHCTRL_BSIZE8 (3 << 6) | ||
217 | |||
218 | #define CHCTRL_TYPE_SINGLE_E (0 << 8) | ||
219 | #define CHCTRL_TYPE_HW (1 << 8) | ||
220 | #define CHCTRL_TYPE_SW (2 << 8) | ||
221 | #define CHCTRL_TYPE_SINGLE_L (3 << 8) | ||
222 | |||
223 | #define CHCTRL_BST (1 << 10) | ||
224 | |||
225 | /* Use DMA controller 0, channel 2 for USB */ | ||
226 | #define USB_DMA_BASE (DMAC0_BASE + DMAC_CH_OFFSET(2)) | ||
227 | |||
228 | /* NAND flash controller registers */ | ||
229 | #define NFC_BASE (AHB_PERI_BASE_VIRT + 0xd000) | ||
230 | #define NFC_BASE_PHYS (AHB_PERI_BASE + 0xd000) | ||
231 | |||
232 | #define NFC_CMD_OFFS 0x00 | ||
233 | #define NFC_LADDR_OFFS 0x04 | ||
234 | #define NFC_BADDR_OFFS 0x08 | ||
235 | #define NFC_SADDR_OFFS 0x0c | ||
236 | #define NFC_WDATA_OFFS 0x10 | ||
237 | #define NFC_LDATA_OFFS 0x20 | ||
238 | #define NFC_SDATA_OFFS 0x40 | ||
239 | #define NFC_CTRL_OFFS 0x50 | ||
240 | #define NFC_PSTART_OFFS 0x54 | ||
241 | #define NFC_RSTART_OFFS 0x58 | ||
242 | #define NFC_DSIZE_OFFS 0x5c | ||
243 | #define NFC_IREQ_OFFS 0x60 | ||
244 | #define NFC_RST_OFFS 0x64 | ||
245 | #define NFC_CTRL1_OFFS 0x68 | ||
246 | #define NFC_MDATA_OFFS 0x70 | ||
247 | |||
248 | #define NFC_WDATA_PHYS_ADDR (NFC_BASE_PHYS + NFC_WDATA_OFFS) | ||
249 | |||
250 | /* Bits in NFC_CTRL */ | ||
251 | #define NFC_CTRL_BHLD_MASK (0xf << 0) | ||
252 | #define NFC_CTRL_BPW_MASK (0xf << 4) | ||
253 | #define NFC_CTRL_BSTP_MASK (0xf << 8) | ||
254 | #define NFC_CTRL_CADDR_MASK (0x7 << 12) | ||
255 | #define NFC_CTRL_CADDR_1 (0x0 << 12) | ||
256 | #define NFC_CTRL_CADDR_2 (0x1 << 12) | ||
257 | #define NFC_CTRL_CADDR_3 (0x2 << 12) | ||
258 | #define NFC_CTRL_CADDR_4 (0x3 << 12) | ||
259 | #define NFC_CTRL_CADDR_5 (0x4 << 12) | ||
260 | #define NFC_CTRL_MSK (1 << 15) | ||
261 | #define NFC_CTRL_PSIZE256 (0 << 16) | ||
262 | #define NFC_CTRL_PSIZE512 (1 << 16) | ||
263 | #define NFC_CTRL_PSIZE1024 (2 << 16) | ||
264 | #define NFC_CTRL_PSIZE2048 (3 << 16) | ||
265 | #define NFC_CTRL_PSIZE4096 (4 << 16) | ||
266 | #define NFC_CTRL_PSIZE_MASK (7 << 16) | ||
267 | #define NFC_CTRL_BSIZE1 (0 << 19) | ||
268 | #define NFC_CTRL_BSIZE2 (1 << 19) | ||
269 | #define NFC_CTRL_BSIZE4 (2 << 19) | ||
270 | #define NFC_CTRL_BSIZE8 (3 << 19) | ||
271 | #define NFC_CTRL_BSIZE_MASK (3 << 19) | ||
272 | #define NFC_CTRL_RDY (1 << 21) | ||
273 | #define NFC_CTRL_CS0SEL (1 << 22) | ||
274 | #define NFC_CTRL_CS1SEL (1 << 23) | ||
275 | #define NFC_CTRL_CS2SEL (1 << 24) | ||
276 | #define NFC_CTRL_CS3SEL (1 << 25) | ||
277 | #define NFC_CTRL_CSMASK (0xf << 22) | ||
278 | #define NFC_CTRL_BW (1 << 26) | ||
279 | #define NFC_CTRL_FS (1 << 27) | ||
280 | #define NFC_CTRL_DEN (1 << 28) | ||
281 | #define NFC_CTRL_READ_IEN (1 << 29) | ||
282 | #define NFC_CTRL_PROG_IEN (1 << 30) | ||
283 | #define NFC_CTRL_RDY_IEN (1 << 31) | ||
284 | |||
285 | /* Bits in NFC_IREQ */ | ||
286 | #define NFC_IREQ_IRQ0 (1 << 0) | ||
287 | #define NFC_IREQ_IRQ1 (1 << 1) | ||
288 | #define NFC_IREQ_IRQ2 (1 << 2) | ||
289 | |||
290 | #define NFC_IREQ_FLAG0 (1 << 4) | ||
291 | #define NFC_IREQ_FLAG1 (1 << 5) | ||
292 | #define NFC_IREQ_FLAG2 (1 << 6) | ||
293 | |||
294 | /* MMC controller registers */ | ||
295 | #define MMC0_BASE (AHB_PERI_BASE_VIRT + 0xe000) | ||
296 | #define MMC1_BASE (AHB_PERI_BASE_VIRT + 0xe800) | ||
297 | |||
298 | /* UART base addresses */ | ||
299 | |||
300 | #define UART0_BASE (APB0_PERI_BASE_VIRT + 0x07000) | ||
301 | #define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000) | ||
302 | #define UART1_BASE (APB0_PERI_BASE_VIRT + 0x08000) | ||
303 | #define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000) | ||
304 | #define UART2_BASE (APB0_PERI_BASE_VIRT + 0x09000) | ||
305 | #define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000) | ||
306 | #define UART3_BASE (APB0_PERI_BASE_VIRT + 0x0a000) | ||
307 | #define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000) | ||
308 | #define UART4_BASE (APB0_PERI_BASE_VIRT + 0x15000) | ||
309 | #define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000) | ||
310 | |||
311 | #define UART_BASE UART0_BASE | ||
312 | #define UART_BASE_PHYS UART0_BASE_PHYS | ||
313 | |||
314 | /* ECC controller */ | ||
315 | #define ECC_CTR_BASE (APB0_PERI_BASE_VIRT + 0xd000) | ||
316 | |||
317 | #define ECC_CTRL_OFFS 0x00 | ||
318 | #define ECC_BASE_OFFS 0x04 | ||
319 | #define ECC_MASK_OFFS 0x08 | ||
320 | #define ECC_CLEAR_OFFS 0x0c | ||
321 | #define ECC4_0_OFFS 0x10 | ||
322 | #define ECC4_1_OFFS 0x14 | ||
323 | |||
324 | #define ECC_EADDR0_OFFS 0x50 | ||
325 | |||
326 | #define ECC_ERRNUM_OFFS 0x90 | ||
327 | #define ECC_IREQ_OFFS 0x94 | ||
328 | |||
329 | /* Bits in ECC_CTRL */ | ||
330 | #define ECC_CTRL_ECC4_DIEN (1 << 28) | ||
331 | #define ECC_CTRL_ECC8_DIEN (1 << 29) | ||
332 | #define ECC_CTRL_ECC12_DIEN (1 << 30) | ||
333 | #define ECC_CTRL_ECC_DISABLE 0x0 | ||
334 | #define ECC_CTRL_ECC_SLC_ENC 0x8 | ||
335 | #define ECC_CTRL_ECC_SLC_DEC 0x9 | ||
336 | #define ECC_CTRL_ECC4_ENC 0xa | ||
337 | #define ECC_CTRL_ECC4_DEC 0xb | ||
338 | #define ECC_CTRL_ECC8_ENC 0xc | ||
339 | #define ECC_CTRL_ECC8_DEC 0xd | ||
340 | #define ECC_CTRL_ECC12_ENC 0xe | ||
341 | #define ECC_CTRL_ECC12_DEC 0xf | ||
342 | |||
343 | /* Bits in ECC_IREQ */ | ||
344 | #define ECC_IREQ_E4DI (1 << 4) | ||
345 | |||
346 | #define ECC_IREQ_E4DF (1 << 20) | ||
347 | #define ECC_IREQ_E4EF (1 << 21) | ||
348 | |||
349 | /* Interrupt controller */ | ||
350 | |||
351 | #define PIC0_BASE (APB1_PERI_BASE_VIRT + 0x3000) | ||
352 | #define PIC0_BASE_PHYS (APB1_PERI_BASE + 0x3000) | ||
353 | |||
354 | #define PIC0_IEN_OFFS 0x00 | ||
355 | #define PIC0_CREQ_OFFS 0x04 | ||
356 | #define PIC0_IREQ_OFFS 0x08 | ||
357 | #define PIC0_IRQSEL_OFFS 0x0c | ||
358 | #define PIC0_SRC_OFFS 0x10 | ||
359 | #define PIC0_MREQ_OFFS 0x14 | ||
360 | #define PIC0_TSTREQ_OFFS 0x18 | ||
361 | #define PIC0_POL_OFFS 0x1c | ||
362 | #define PIC0_IRQ_OFFS 0x20 | ||
363 | #define PIC0_FIQ_OFFS 0x24 | ||
364 | #define PIC0_MIRQ_OFFS 0x28 | ||
365 | #define PIC0_MFIQ_OFFS 0x2c | ||
366 | #define PIC0_TMODE_OFFS 0x30 | ||
367 | #define PIC0_SYNC_OFFS 0x34 | ||
368 | #define PIC0_WKUP_OFFS 0x38 | ||
369 | #define PIC0_TMODEA_OFFS 0x3c | ||
370 | #define PIC0_INTOEN_OFFS 0x40 | ||
371 | #define PIC0_MEN0_OFFS 0x44 | ||
372 | #define PIC0_MEN_OFFS 0x48 | ||
373 | |||
374 | #define PIC0_IEN __REG(PIC0_BASE + PIC0_IEN_OFFS) | ||
375 | #define PIC0_IEN_PHYS __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS) | ||
376 | #define PIC0_CREQ __REG(PIC0_BASE + PIC0_CREQ_OFFS) | ||
377 | #define PIC0_CREQ_PHYS __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS) | ||
378 | #define PIC0_IREQ __REG(PIC0_BASE + PIC0_IREQ_OFFS) | ||
379 | #define PIC0_IRQSEL __REG(PIC0_BASE + PIC0_IRQSEL_OFFS) | ||
380 | #define PIC0_IRQSEL_PHYS __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS) | ||
381 | #define PIC0_SRC __REG(PIC0_BASE + PIC0_SRC_OFFS) | ||
382 | #define PIC0_MREQ __REG(PIC0_BASE + PIC0_MREQ_OFFS) | ||
383 | #define PIC0_TSTREQ __REG(PIC0_BASE + PIC0_TSTREQ_OFFS) | ||
384 | #define PIC0_POL __REG(PIC0_BASE + PIC0_POL_OFFS) | ||
385 | #define PIC0_IRQ __REG(PIC0_BASE + PIC0_IRQ_OFFS) | ||
386 | #define PIC0_FIQ __REG(PIC0_BASE + PIC0_FIQ_OFFS) | ||
387 | #define PIC0_MIRQ __REG(PIC0_BASE + PIC0_MIRQ_OFFS) | ||
388 | #define PIC0_MFIQ __REG(PIC0_BASE + PIC0_MFIQ_OFFS) | ||
389 | #define PIC0_TMODE __REG(PIC0_BASE + PIC0_TMODE_OFFS) | ||
390 | #define PIC0_TMODE_PHYS __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS) | ||
391 | #define PIC0_SYNC __REG(PIC0_BASE + PIC0_SYNC_OFFS) | ||
392 | #define PIC0_WKUP __REG(PIC0_BASE + PIC0_WKUP_OFFS) | ||
393 | #define PIC0_TMODEA __REG(PIC0_BASE + PIC0_TMODEA_OFFS) | ||
394 | #define PIC0_INTOEN __REG(PIC0_BASE + PIC0_INTOEN_OFFS) | ||
395 | #define PIC0_MEN0 __REG(PIC0_BASE + PIC0_MEN0_OFFS) | ||
396 | #define PIC0_MEN __REG(PIC0_BASE + PIC0_MEN_OFFS) | ||
397 | |||
398 | #define PIC1_BASE (APB1_PERI_BASE_VIRT + 0x3080) | ||
399 | |||
400 | #define PIC1_IEN_OFFS 0x00 | ||
401 | #define PIC1_CREQ_OFFS 0x04 | ||
402 | #define PIC1_IREQ_OFFS 0x08 | ||
403 | #define PIC1_IRQSEL_OFFS 0x0c | ||
404 | #define PIC1_SRC_OFFS 0x10 | ||
405 | #define PIC1_MREQ_OFFS 0x14 | ||
406 | #define PIC1_TSTREQ_OFFS 0x18 | ||
407 | #define PIC1_POL_OFFS 0x1c | ||
408 | #define PIC1_IRQ_OFFS 0x20 | ||
409 | #define PIC1_FIQ_OFFS 0x24 | ||
410 | #define PIC1_MIRQ_OFFS 0x28 | ||
411 | #define PIC1_MFIQ_OFFS 0x2c | ||
412 | #define PIC1_TMODE_OFFS 0x30 | ||
413 | #define PIC1_SYNC_OFFS 0x34 | ||
414 | #define PIC1_WKUP_OFFS 0x38 | ||
415 | #define PIC1_TMODEA_OFFS 0x3c | ||
416 | #define PIC1_INTOEN_OFFS 0x40 | ||
417 | #define PIC1_MEN1_OFFS 0x44 | ||
418 | #define PIC1_MEN_OFFS 0x48 | ||
419 | |||
420 | #define PIC1_IEN __REG(PIC1_BASE + PIC1_IEN_OFFS) | ||
421 | #define PIC1_CREQ __REG(PIC1_BASE + PIC1_CREQ_OFFS) | ||
422 | #define PIC1_IREQ __REG(PIC1_BASE + PIC1_IREQ_OFFS) | ||
423 | #define PIC1_IRQSEL __REG(PIC1_BASE + PIC1_IRQSEL_OFFS) | ||
424 | #define PIC1_SRC __REG(PIC1_BASE + PIC1_SRC_OFFS) | ||
425 | #define PIC1_MREQ __REG(PIC1_BASE + PIC1_MREQ_OFFS) | ||
426 | #define PIC1_TSTREQ __REG(PIC1_BASE + PIC1_TSTREQ_OFFS) | ||
427 | #define PIC1_POL __REG(PIC1_BASE + PIC1_POL_OFFS) | ||
428 | #define PIC1_IRQ __REG(PIC1_BASE + PIC1_IRQ_OFFS) | ||
429 | #define PIC1_FIQ __REG(PIC1_BASE + PIC1_FIQ_OFFS) | ||
430 | #define PIC1_MIRQ __REG(PIC1_BASE + PIC1_MIRQ_OFFS) | ||
431 | #define PIC1_MFIQ __REG(PIC1_BASE + PIC1_MFIQ_OFFS) | ||
432 | #define PIC1_TMODE __REG(PIC1_BASE + PIC1_TMODE_OFFS) | ||
433 | #define PIC1_SYNC __REG(PIC1_BASE + PIC1_SYNC_OFFS) | ||
434 | #define PIC1_WKUP __REG(PIC1_BASE + PIC1_WKUP_OFFS) | ||
435 | #define PIC1_TMODEA __REG(PIC1_BASE + PIC1_TMODEA_OFFS) | ||
436 | #define PIC1_INTOEN __REG(PIC1_BASE + PIC1_INTOEN_OFFS) | ||
437 | #define PIC1_MEN1 __REG(PIC1_BASE + PIC1_MEN1_OFFS) | ||
438 | #define PIC1_MEN __REG(PIC1_BASE + PIC1_MEN_OFFS) | ||
439 | |||
440 | /* Timer registers */ | ||
441 | #define TIMER_BASE (APB1_PERI_BASE_VIRT + 0x4000) | ||
442 | #define TIMER_BASE_PHYS (APB1_PERI_BASE + 0x4000) | ||
443 | |||
444 | #define TWDCFG_OFFS 0x70 | ||
445 | |||
446 | #define TC32EN_OFFS 0x80 | ||
447 | #define TC32LDV_OFFS 0x84 | ||
448 | #define TC32CMP0_OFFS 0x88 | ||
449 | #define TC32CMP1_OFFS 0x8c | ||
450 | #define TC32PCNT_OFFS 0x90 | ||
451 | #define TC32MCNT_OFFS 0x94 | ||
452 | #define TC32IRQ_OFFS 0x98 | ||
453 | |||
454 | /* Bits in TC32EN */ | ||
455 | #define TC32EN_PRESCALE_MASK 0x00ffffff | ||
456 | #define TC32EN_ENABLE (1 << 24) | ||
457 | #define TC32EN_LOADZERO (1 << 25) | ||
458 | #define TC32EN_STOPMODE (1 << 26) | ||
459 | #define TC32EN_LDM0 (1 << 28) | ||
460 | #define TC32EN_LDM1 (1 << 29) | ||
461 | |||
462 | /* Bits in TC32IRQ */ | ||
463 | #define TC32IRQ_MSTAT_MASK 0x0000001f | ||
464 | #define TC32IRQ_RSTAT_MASK (0x1f << 8) | ||
465 | #define TC32IRQ_IRQEN0 (1 << 16) | ||
466 | #define TC32IRQ_IRQEN1 (1 << 17) | ||
467 | #define TC32IRQ_IRQEN2 (1 << 18) | ||
468 | #define TC32IRQ_IRQEN3 (1 << 19) | ||
469 | #define TC32IRQ_IRQEN4 (1 << 20) | ||
470 | #define TC32IRQ_RSYNC (1 << 30) | ||
471 | #define TC32IRQ_IRQCLR (1 << 31) | ||
472 | |||
473 | /* GPIO registers */ | ||
474 | #define GPIOPD_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
475 | |||
476 | #define GPIOPD_DAT_OFFS 0x00 | ||
477 | #define GPIOPD_DOE_OFFS 0x04 | ||
478 | #define GPIOPD_FS0_OFFS 0x08 | ||
479 | #define GPIOPD_FS1_OFFS 0x0c | ||
480 | #define GPIOPD_FS2_OFFS 0x10 | ||
481 | #define GPIOPD_RPU_OFFS 0x30 | ||
482 | #define GPIOPD_RPD_OFFS 0x34 | ||
483 | #define GPIOPD_DV0_OFFS 0x38 | ||
484 | #define GPIOPD_DV1_OFFS 0x3c | ||
485 | |||
486 | #define GPIOPS_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
487 | |||
488 | #define GPIOPS_DAT_OFFS 0x40 | ||
489 | #define GPIOPS_DOE_OFFS 0x44 | ||
490 | #define GPIOPS_FS0_OFFS 0x48 | ||
491 | #define GPIOPS_FS1_OFFS 0x4c | ||
492 | #define GPIOPS_FS2_OFFS 0x50 | ||
493 | #define GPIOPS_FS3_OFFS 0x54 | ||
494 | #define GPIOPS_RPU_OFFS 0x70 | ||
495 | #define GPIOPS_RPD_OFFS 0x74 | ||
496 | #define GPIOPS_DV0_OFFS 0x78 | ||
497 | #define GPIOPS_DV1_OFFS 0x7c | ||
498 | |||
499 | #define GPIOPS_FS1_SDH0_BITS 0x000000ff | ||
500 | #define GPIOPS_FS1_SDH1_BITS 0x0000ff00 | ||
501 | |||
502 | #define GPIOPU_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
503 | |||
504 | #define GPIOPU_DAT_OFFS 0x80 | ||
505 | #define GPIOPU_DOE_OFFS 0x84 | ||
506 | #define GPIOPU_FS0_OFFS 0x88 | ||
507 | #define GPIOPU_FS1_OFFS 0x8c | ||
508 | #define GPIOPU_FS2_OFFS 0x90 | ||
509 | #define GPIOPU_RPU_OFFS 0xb0 | ||
510 | #define GPIOPU_RPD_OFFS 0xb4 | ||
511 | #define GPIOPU_DV0_OFFS 0xb8 | ||
512 | #define GPIOPU_DV1_OFFS 0xbc | ||
513 | |||
514 | #define GPIOPU_FS0_TXD0 (1 << 0) | ||
515 | #define GPIOPU_FS0_RXD0 (1 << 1) | ||
516 | #define GPIOPU_FS0_CTS0 (1 << 2) | ||
517 | #define GPIOPU_FS0_RTS0 (1 << 3) | ||
518 | #define GPIOPU_FS0_TXD1 (1 << 4) | ||
519 | #define GPIOPU_FS0_RXD1 (1 << 5) | ||
520 | #define GPIOPU_FS0_CTS1 (1 << 6) | ||
521 | #define GPIOPU_FS0_RTS1 (1 << 7) | ||
522 | #define GPIOPU_FS0_TXD2 (1 << 8) | ||
523 | #define GPIOPU_FS0_RXD2 (1 << 9) | ||
524 | #define GPIOPU_FS0_CTS2 (1 << 10) | ||
525 | #define GPIOPU_FS0_RTS2 (1 << 11) | ||
526 | #define GPIOPU_FS0_TXD3 (1 << 12) | ||
527 | #define GPIOPU_FS0_RXD3 (1 << 13) | ||
528 | #define GPIOPU_FS0_CTS3 (1 << 14) | ||
529 | #define GPIOPU_FS0_RTS3 (1 << 15) | ||
530 | #define GPIOPU_FS0_TXD4 (1 << 16) | ||
531 | #define GPIOPU_FS0_RXD4 (1 << 17) | ||
532 | #define GPIOPU_FS0_CTS4 (1 << 18) | ||
533 | #define GPIOPU_FS0_RTS4 (1 << 19) | ||
534 | |||
535 | #define GPIOFC_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
536 | |||
537 | #define GPIOFC_DAT_OFFS 0xc0 | ||
538 | #define GPIOFC_DOE_OFFS 0xc4 | ||
539 | #define GPIOFC_FS0_OFFS 0xc8 | ||
540 | #define GPIOFC_FS1_OFFS 0xcc | ||
541 | #define GPIOFC_FS2_OFFS 0xd0 | ||
542 | #define GPIOFC_FS3_OFFS 0xd4 | ||
543 | #define GPIOFC_RPU_OFFS 0xf0 | ||
544 | #define GPIOFC_RPD_OFFS 0xf4 | ||
545 | #define GPIOFC_DV0_OFFS 0xf8 | ||
546 | #define GPIOFC_DV1_OFFS 0xfc | ||
547 | |||
548 | #define GPIOFD_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
549 | |||
550 | #define GPIOFD_DAT_OFFS 0x100 | ||
551 | #define GPIOFD_DOE_OFFS 0x104 | ||
552 | #define GPIOFD_FS0_OFFS 0x108 | ||
553 | #define GPIOFD_FS1_OFFS 0x10c | ||
554 | #define GPIOFD_FS2_OFFS 0x110 | ||
555 | #define GPIOFD_RPU_OFFS 0x130 | ||
556 | #define GPIOFD_RPD_OFFS 0x134 | ||
557 | #define GPIOFD_DV0_OFFS 0x138 | ||
558 | #define GPIOFD_DV1_OFFS 0x13c | ||
559 | |||
560 | #define GPIOLC_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
561 | |||
562 | #define GPIOLC_DAT_OFFS 0x140 | ||
563 | #define GPIOLC_DOE_OFFS 0x144 | ||
564 | #define GPIOLC_FS0_OFFS 0x148 | ||
565 | #define GPIOLC_FS1_OFFS 0x14c | ||
566 | #define GPIOLC_RPU_OFFS 0x170 | ||
567 | #define GPIOLC_RPD_OFFS 0x174 | ||
568 | #define GPIOLC_DV0_OFFS 0x178 | ||
569 | #define GPIOLC_DV1_OFFS 0x17c | ||
570 | |||
571 | #define GPIOLD_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
572 | |||
573 | #define GPIOLD_DAT_OFFS 0x180 | ||
574 | #define GPIOLD_DOE_OFFS 0x184 | ||
575 | #define GPIOLD_FS0_OFFS 0x188 | ||
576 | #define GPIOLD_FS1_OFFS 0x18c | ||
577 | #define GPIOLD_FS2_OFFS 0x190 | ||
578 | #define GPIOLD_RPU_OFFS 0x1b0 | ||
579 | #define GPIOLD_RPD_OFFS 0x1b4 | ||
580 | #define GPIOLD_DV0_OFFS 0x1b8 | ||
581 | #define GPIOLD_DV1_OFFS 0x1bc | ||
582 | |||
583 | #define GPIOAD_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
584 | |||
585 | #define GPIOAD_DAT_OFFS 0x1c0 | ||
586 | #define GPIOAD_DOE_OFFS 0x1c4 | ||
587 | #define GPIOAD_FS0_OFFS 0x1c8 | ||
588 | #define GPIOAD_RPU_OFFS 0x1f0 | ||
589 | #define GPIOAD_RPD_OFFS 0x1f4 | ||
590 | #define GPIOAD_DV0_OFFS 0x1f8 | ||
591 | #define GPIOAD_DV1_OFFS 0x1fc | ||
592 | |||
593 | #define GPIOXC_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
594 | |||
595 | #define GPIOXC_DAT_OFFS 0x200 | ||
596 | #define GPIOXC_DOE_OFFS 0x204 | ||
597 | #define GPIOXC_FS0_OFFS 0x208 | ||
598 | #define GPIOXC_RPU_OFFS 0x230 | ||
599 | #define GPIOXC_RPD_OFFS 0x234 | ||
600 | #define GPIOXC_DV0_OFFS 0x238 | ||
601 | #define GPIOXC_DV1_OFFS 0x23c | ||
602 | |||
603 | #define GPIOXC_FS0 __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS) | ||
604 | |||
605 | #define GPIOXC_FS0_CS0 (1 << 26) | ||
606 | #define GPIOXC_FS0_CS1 (1 << 27) | ||
607 | |||
608 | #define GPIOXD_BASE (APB1_PERI_BASE_VIRT + 0x5000) | ||
609 | |||
610 | #define GPIOXD_DAT_OFFS 0x240 | ||
611 | #define GPIOXD_FS0_OFFS 0x248 | ||
612 | #define GPIOXD_RPU_OFFS 0x270 | ||
613 | #define GPIOXD_RPD_OFFS 0x274 | ||
614 | #define GPIOXD_DV0_OFFS 0x278 | ||
615 | #define GPIOXD_DV1_OFFS 0x27c | ||
616 | |||
617 | #define GPIOPK_BASE (APB1_PERI_BASE_VIRT + 0x1c000) | ||
618 | |||
619 | #define GPIOPK_RST_OFFS 0x008 | ||
620 | #define GPIOPK_DAT_OFFS 0x100 | ||
621 | #define GPIOPK_DOE_OFFS 0x104 | ||
622 | #define GPIOPK_FS0_OFFS 0x108 | ||
623 | #define GPIOPK_FS1_OFFS 0x10c | ||
624 | #define GPIOPK_FS2_OFFS 0x110 | ||
625 | #define GPIOPK_IRQST_OFFS 0x210 | ||
626 | #define GPIOPK_IRQEN_OFFS 0x214 | ||
627 | #define GPIOPK_IRQPOL_OFFS 0x218 | ||
628 | #define GPIOPK_IRQTM0_OFFS 0x21c | ||
629 | #define GPIOPK_IRQTM1_OFFS 0x220 | ||
630 | #define GPIOPK_CTL_OFFS 0x22c | ||
631 | |||
632 | #define PMGPIO_BASE (APB1_PERI_BASE_VIRT + 0x10000) | ||
633 | #define BACKUP_RAM_BASE PMGPIO_BASE | ||
634 | |||
635 | #define PMGPIO_DAT_OFFS 0x800 | ||
636 | #define PMGPIO_DOE_OFFS 0x804 | ||
637 | #define PMGPIO_FS0_OFFS 0x808 | ||
638 | #define PMGPIO_RPU_OFFS 0x810 | ||
639 | #define PMGPIO_RPD_OFFS 0x814 | ||
640 | #define PMGPIO_DV0_OFFS 0x818 | ||
641 | #define PMGPIO_DV1_OFFS 0x81c | ||
642 | #define PMGPIO_EE0_OFFS 0x820 | ||
643 | #define PMGPIO_EE1_OFFS 0x824 | ||
644 | #define PMGPIO_CTL_OFFS 0x828 | ||
645 | #define PMGPIO_DI_OFFS 0x82c | ||
646 | #define PMGPIO_STR_OFFS 0x830 | ||
647 | #define PMGPIO_STF_OFFS 0x834 | ||
648 | #define PMGPIO_POL_OFFS 0x838 | ||
649 | #define PMGPIO_APB_OFFS 0x800 | ||
650 | |||
651 | /* Clock controller registers */ | ||
652 | #define CKC_BASE ((void __iomem *)(APB1_PERI_BASE_VIRT + 0x6000)) | ||
653 | |||
654 | #define CLKCTRL_OFFS 0x00 | ||
655 | #define PLL0CFG_OFFS 0x04 | ||
656 | #define PLL1CFG_OFFS 0x08 | ||
657 | #define CLKDIVC0_OFFS 0x0c | ||
658 | |||
659 | #define BCLKCTR0_OFFS 0x14 | ||
660 | #define SWRESET0_OFFS 0x18 | ||
661 | |||
662 | #define BCLKCTR1_OFFS 0x60 | ||
663 | #define SWRESET1_OFFS 0x64 | ||
664 | #define PWDCTL_OFFS 0x68 | ||
665 | #define PLL2CFG_OFFS 0x6c | ||
666 | #define CLKDIVC1_OFFS 0x70 | ||
667 | |||
668 | #define ACLKREF_OFFS 0x80 | ||
669 | #define ACLKI2C_OFFS 0x84 | ||
670 | #define ACLKSPI0_OFFS 0x88 | ||
671 | #define ACLKSPI1_OFFS 0x8c | ||
672 | #define ACLKUART0_OFFS 0x90 | ||
673 | #define ACLKUART1_OFFS 0x94 | ||
674 | #define ACLKUART2_OFFS 0x98 | ||
675 | #define ACLKUART3_OFFS 0x9c | ||
676 | #define ACLKUART4_OFFS 0xa0 | ||
677 | #define ACLKTCT_OFFS 0xa4 | ||
678 | #define ACLKTCX_OFFS 0xa8 | ||
679 | #define ACLKTCZ_OFFS 0xac | ||
680 | #define ACLKADC_OFFS 0xb0 | ||
681 | #define ACLKDAI0_OFFS 0xb4 | ||
682 | #define ACLKDAI1_OFFS 0xb8 | ||
683 | #define ACLKLCD_OFFS 0xbc | ||
684 | #define ACLKSPDIF_OFFS 0xc0 | ||
685 | #define ACLKUSBH_OFFS 0xc4 | ||
686 | #define ACLKSDH0_OFFS 0xc8 | ||
687 | #define ACLKSDH1_OFFS 0xcc | ||
688 | #define ACLKC3DEC_OFFS 0xd0 | ||
689 | #define ACLKEXT_OFFS 0xd4 | ||
690 | #define ACLKCAN0_OFFS 0xd8 | ||
691 | #define ACLKCAN1_OFFS 0xdc | ||
692 | #define ACLKGSB0_OFFS 0xe0 | ||
693 | #define ACLKGSB1_OFFS 0xe4 | ||
694 | #define ACLKGSB2_OFFS 0xe8 | ||
695 | #define ACLKGSB3_OFFS 0xec | ||
696 | |||
697 | #define PLLxCFG_PD (1 << 31) | ||
698 | |||
699 | /* CLKCTRL bits */ | ||
700 | #define CLKCTRL_XE (1 << 31) | ||
701 | |||
702 | /* CLKDIVCx bits */ | ||
703 | #define CLKDIVC0_XTE (1 << 7) | ||
704 | #define CLKDIVC0_XE (1 << 15) | ||
705 | #define CLKDIVC0_P1E (1 << 23) | ||
706 | #define CLKDIVC0_P0E (1 << 31) | ||
707 | |||
708 | #define CLKDIVC1_P2E (1 << 7) | ||
709 | |||
710 | /* BCLKCTR0 clock bits */ | ||
711 | #define BCLKCTR0_USBD (1 << 4) | ||
712 | #define BCLKCTR0_ECC (1 << 9) | ||
713 | #define BCLKCTR0_USBH0 (1 << 11) | ||
714 | #define BCLKCTR0_NFC (1 << 16) | ||
715 | |||
716 | /* BCLKCTR1 clock bits */ | ||
717 | #define BCLKCTR1_USBH1 (1 << 20) | ||
718 | |||
719 | /* SWRESET0 bits */ | ||
720 | #define SWRESET0_USBD (1 << 4) | ||
721 | #define SWRESET0_USBH0 (1 << 11) | ||
722 | |||
723 | /* SWRESET1 bits */ | ||
724 | #define SWRESET1_USBH1 (1 << 20) | ||
725 | |||
726 | /* System clock sources. | ||
727 | * Note: These are the clock sources that serve as parents for | ||
728 | * all other clocks. They have no parents themselves. | ||
729 | * | ||
730 | * These values are used for struct clk->root_id. All clocks | ||
731 | * that are not system clock sources have this value set to | ||
732 | * CLK_SRC_NOROOT. | ||
733 | * The values for system clocks start with CLK_SRC_PLL0 == 0 | ||
734 | * because this gives us exactly the values needed for the lower | ||
735 | * 4 bits of ACLK_* registers. Therefore, CLK_SRC_NOROOT is | ||
736 | * defined as -1 to not disturb the order. | ||
737 | */ | ||
738 | enum root_clks { | ||
739 | CLK_SRC_NOROOT = -1, | ||
740 | CLK_SRC_PLL0 = 0, | ||
741 | CLK_SRC_PLL1, | ||
742 | CLK_SRC_PLL0DIV, | ||
743 | CLK_SRC_PLL1DIV, | ||
744 | CLK_SRC_XI, | ||
745 | CLK_SRC_XIDIV, | ||
746 | CLK_SRC_XTI, | ||
747 | CLK_SRC_XTIDIV, | ||
748 | CLK_SRC_PLL2, | ||
749 | CLK_SRC_PLL2DIV, | ||
750 | CLK_SRC_PK0, | ||
751 | CLK_SRC_PK1, | ||
752 | CLK_SRC_PK2, | ||
753 | CLK_SRC_PK3, | ||
754 | CLK_SRC_PK4, | ||
755 | CLK_SRC_48MHZ | ||
756 | }; | ||
757 | |||
758 | #define CLK_SRC_MASK 0xf | ||
759 | |||
760 | /* Bits in ACLK* registers */ | ||
761 | #define ACLK_EN (1 << 28) | ||
762 | #define ACLK_SEL_SHIFT 24 | ||
763 | #define ACLK_SEL_MASK 0x0f000000 | ||
764 | #define ACLK_DIV_MASK 0x00000fff | ||
765 | |||
766 | /* System configuration registers */ | ||
767 | |||
768 | #define SCFG_BASE (APB1_PERI_BASE_VIRT + 0x13000) | ||
769 | |||
770 | #define BMI_OFFS 0x00 | ||
771 | #define AHBCON0_OFFS 0x04 | ||
772 | #define APBPWE_OFFS 0x08 | ||
773 | #define DTCMWAIT_OFFS 0x0c | ||
774 | #define ECCSEL_OFFS 0x10 | ||
775 | #define AHBCON1_OFFS 0x14 | ||
776 | #define SDHCFG_OFFS 0x18 | ||
777 | #define REMAP_OFFS 0x20 | ||
778 | #define LCDSIAE_OFFS 0x24 | ||
779 | #define XMCCFG_OFFS 0xe0 | ||
780 | #define IMCCFG_OFFS 0xe4 | ||
781 | |||
782 | /* Values for ECCSEL */ | ||
783 | #define ECCSEL_EXTMEM 0x0 | ||
784 | #define ECCSEL_DTCM 0x1 | ||
785 | #define ECCSEL_INT_SRAM 0x2 | ||
786 | #define ECCSEL_AHB 0x3 | ||
787 | |||
788 | /* Bits in XMCCFG */ | ||
789 | #define XMCCFG_NFCE (1 << 1) | ||
790 | #define XMCCFG_FDXD (1 << 2) | ||
791 | |||
792 | /* External memory controller registers */ | ||
793 | |||
794 | #define EMC_BASE EXT_MEM_CTRL_BASE | ||
795 | |||
796 | #define SDCFG_OFFS 0x00 | ||
797 | #define SDFSM_OFFS 0x04 | ||
798 | #define MCFG_OFFS 0x08 | ||
799 | |||
800 | #define CSCFG0_OFFS 0x10 | ||
801 | #define CSCFG1_OFFS 0x14 | ||
802 | #define CSCFG2_OFFS 0x18 | ||
803 | #define CSCFG3_OFFS 0x1c | ||
804 | |||
805 | #define MCFG_SDEN (1 << 4) | ||
806 | |||
807 | #endif /* TCC8K_REGS_H */ | ||
diff --git a/arch/arm/plat-tcc/include/mach/timex.h b/arch/arm/plat-tcc/include/mach/timex.h deleted file mode 100644 index 057acbe651d9..000000000000 --- a/arch/arm/plat-tcc/include/mach/timex.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* | ||
2 | * A definition needed by arch core code. | ||
3 | * | ||
4 | */ | ||
5 | #define CLOCK_TICK_RATE (HZ * 100000UL) | ||
diff --git a/arch/arm/plat-tcc/include/mach/uncompress.h b/arch/arm/plat-tcc/include/mach/uncompress.h deleted file mode 100644 index 7a3e33a27a30..000000000000 --- a/arch/arm/plat-tcc/include/mach/uncompress.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
3 | * | ||
4 | * This file is licensed under the terms of the GPL version 2. | ||
5 | */ | ||
6 | |||
7 | #include <linux/serial_reg.h> | ||
8 | #include <linux/types.h> | ||
9 | |||
10 | #include <mach/tcc8k-regs.h> | ||
11 | |||
12 | unsigned int system_rev; | ||
13 | |||
14 | #define ID_MASK 0x7fff | ||
15 | |||
16 | static void putc(int c) | ||
17 | { | ||
18 | u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2)); | ||
19 | u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2)); | ||
20 | |||
21 | while (!(*uart_lsr & UART_LSR_THRE)) | ||
22 | barrier(); | ||
23 | *uart_tx = c; | ||
24 | } | ||
25 | |||
26 | static inline void flush(void) | ||
27 | { | ||
28 | } | ||
29 | |||
30 | /* | ||
31 | * nothing to do | ||
32 | */ | ||
33 | #define arch_decomp_setup() | ||
34 | #define arch_decomp_wdog() | ||
diff --git a/arch/arm/plat-tcc/system.c b/arch/arm/plat-tcc/system.c deleted file mode 100644 index cc208fae3e7a..000000000000 --- a/arch/arm/plat-tcc/system.c +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * System functions for Telechips TCCxxxx SoCs | ||
3 | * | ||
4 | * Copyright (C) Hans J. Koch <hjk@linutronix.de> | ||
5 | * | ||
6 | * Licensed under the terms of the GPL v2. | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <linux/io.h> | ||
11 | |||
12 | #include <mach/tcc8k-regs.h> | ||
13 | |||
14 | /* System reboot */ | ||
15 | void plat_tcc_reboot(void) | ||
16 | { | ||
17 | /* Make sure clocks are on */ | ||
18 | __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS); | ||
19 | |||
20 | /* Enable watchdog reset */ | ||
21 | __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS); | ||
22 | /* Wait for reset */ | ||
23 | while(1) | ||
24 | ; | ||
25 | } | ||
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c index 3d6a4c292cab..b33b74c87232 100644 --- a/arch/arm/plat-versatile/sched-clock.c +++ b/arch/arm/plat-versatile/sched-clock.c | |||
@@ -18,41 +18,24 @@ | |||
18 | * along with this program; if not, write to the Free Software | 18 | * along with this program; if not, write to the Free Software |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
20 | */ | 20 | */ |
21 | #include <linux/kernel.h> | ||
21 | #include <linux/io.h> | 22 | #include <linux/io.h> |
22 | #include <linux/sched.h> | ||
23 | 23 | ||
24 | #include <asm/sched_clock.h> | 24 | #include <asm/sched_clock.h> |
25 | #include <plat/sched_clock.h> | 25 | #include <plat/sched_clock.h> |
26 | 26 | ||
27 | static DEFINE_CLOCK_DATA(cd); | ||
28 | static void __iomem *ctr; | 27 | static void __iomem *ctr; |
29 | 28 | ||
30 | /* | 29 | static u32 notrace versatile_read_sched_clock(void) |
31 | * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60). | ||
32 | * This gives a resolution of about 41ns and a wrap period of about 178s. | ||
33 | */ | ||
34 | #define SC_MULT 2796202667u | ||
35 | #define SC_SHIFT 26 | ||
36 | |||
37 | unsigned long long notrace sched_clock(void) | ||
38 | { | 30 | { |
39 | if (ctr) { | 31 | if (ctr) |
40 | u32 cyc = readl(ctr); | 32 | return readl(ctr); |
41 | return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, | ||
42 | SC_MULT, SC_SHIFT); | ||
43 | } else | ||
44 | return 0; | ||
45 | } | ||
46 | 33 | ||
47 | static void notrace versatile_update_sched_clock(void) | 34 | return 0; |
48 | { | ||
49 | u32 cyc = readl(ctr); | ||
50 | update_sched_clock(&cd, cyc, (u32)~0); | ||
51 | } | 35 | } |
52 | 36 | ||
53 | void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate) | 37 | void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate) |
54 | { | 38 | { |
55 | ctr = reg; | 39 | ctr = reg; |
56 | init_fixed_sched_clock(&cd, versatile_update_sched_clock, | 40 | setup_sched_clock(versatile_read_sched_clock, 32, rate); |
57 | 32, rate, SC_MULT, SC_SHIFT); | ||
58 | } | 41 | } |
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index ccbe16f47227..f9c9f33f8cbe 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types | |||
@@ -16,7 +16,7 @@ | |||
16 | # are merged into mainline or have been edited in the machine database | 16 | # are merged into mainline or have been edited in the machine database |
17 | # within the last 12 months. References to machine_is_NAME() do not count! | 17 | # within the last 12 months. References to machine_is_NAME() do not count! |
18 | # | 18 | # |
19 | # Last update: Sat May 7 08:48:24 2011 | 19 | # Last update: Tue Dec 6 11:07:38 2011 |
20 | # | 20 | # |
21 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number | 21 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number |
22 | # | 22 | # |
@@ -269,7 +269,7 @@ dns323 MACH_DNS323 DNS323 1542 | |||
269 | omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 | 269 | omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 |
270 | nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 | 270 | nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 |
271 | pcm038 MACH_PCM038 PCM038 1551 | 271 | pcm038 MACH_PCM038 PCM038 1551 |
272 | ts_x09 MACH_TS209 TS209 1565 | 272 | ts209 MACH_TS209 TS209 1565 |
273 | at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 | 273 | at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 |
274 | mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 | 274 | mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 |
275 | vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578 | 275 | vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578 |
@@ -321,7 +321,6 @@ lb88rc8480 MACH_LB88RC8480 LB88RC8480 1769 | |||
321 | mx25_3ds MACH_MX25_3DS MX25_3DS 1771 | 321 | mx25_3ds MACH_MX25_3DS MX25_3DS 1771 |
322 | omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773 | 322 | omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773 |
323 | davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781 | 323 | davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781 |
324 | at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783 | ||
325 | dove_db MACH_DOVE_DB DOVE_DB 1788 | 324 | dove_db MACH_DOVE_DB DOVE_DB 1788 |
326 | overo MACH_OVERO OVERO 1798 | 325 | overo MACH_OVERO OVERO 1798 |
327 | at2440evb MACH_AT2440EVB AT2440EVB 1799 | 326 | at2440evb MACH_AT2440EVB AT2440EVB 1799 |
@@ -459,7 +458,7 @@ guruplug MACH_GURUPLUG GURUPLUG 2659 | |||
459 | spear310 MACH_SPEAR310 SPEAR310 2660 | 458 | spear310 MACH_SPEAR310 SPEAR310 2660 |
460 | spear320 MACH_SPEAR320 SPEAR320 2661 | 459 | spear320 MACH_SPEAR320 SPEAR320 2661 |
461 | aquila MACH_AQUILA AQUILA 2676 | 460 | aquila MACH_AQUILA AQUILA 2676 |
462 | sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 | 461 | esata_sheevaplug MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 |
463 | msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 | 462 | msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 |
464 | ea2478devkit MACH_EA2478DEVKIT EA2478DEVKIT 2683 | 463 | ea2478devkit MACH_EA2478DEVKIT EA2478DEVKIT 2683 |
465 | terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 | 464 | terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 |
@@ -491,380 +490,53 @@ eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35SD EUKREA_CPUIMX35SD 2821 | |||
491 | eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822 | 490 | eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822 |
492 | eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823 | 491 | eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823 |
493 | smdkc210 MACH_SMDKC210 SMDKC210 2838 | 492 | smdkc210 MACH_SMDKC210 SMDKC210 2838 |
494 | omap3_braillo MACH_OMAP3_BRAILLO OMAP3_BRAILLO 2839 | ||
495 | spyplug MACH_SPYPLUG SPYPLUG 2840 | ||
496 | ginger MACH_GINGER GINGER 2841 | ||
497 | tny_t3530 MACH_TNY_T3530 TNY_T3530 2842 | ||
498 | pca102 MACH_PCA102 PCA102 2843 | 493 | pca102 MACH_PCA102 PCA102 2843 |
499 | spade MACH_SPADE SPADE 2844 | ||
500 | mxc25_topaz MACH_MXC25_TOPAZ MXC25_TOPAZ 2845 | ||
501 | t5325 MACH_T5325 T5325 2846 | 494 | t5325 MACH_T5325 T5325 2846 |
502 | gw2361 MACH_GW2361 GW2361 2847 | ||
503 | elog MACH_ELOG ELOG 2848 | ||
504 | income MACH_INCOME INCOME 2849 | 495 | income MACH_INCOME INCOME 2849 |
505 | bcm589x MACH_BCM589X BCM589X 2850 | ||
506 | etna MACH_ETNA ETNA 2851 | ||
507 | hawks MACH_HAWKS HAWKS 2852 | ||
508 | meson MACH_MESON MESON 2853 | ||
509 | xsbase255 MACH_XSBASE255 XSBASE255 2854 | ||
510 | pvm2030 MACH_PVM2030 PVM2030 2855 | ||
511 | mioa502 MACH_MIOA502 MIOA502 2856 | ||
512 | vvbox_sdorig2 MACH_VVBOX_SDORIG2 VVBOX_SDORIG2 2857 | 496 | vvbox_sdorig2 MACH_VVBOX_SDORIG2 VVBOX_SDORIG2 2857 |
513 | vvbox_sdlite2 MACH_VVBOX_SDLITE2 VVBOX_SDLITE2 2858 | 497 | vvbox_sdlite2 MACH_VVBOX_SDLITE2 VVBOX_SDLITE2 2858 |
514 | vvbox_sdpro4 MACH_VVBOX_SDPRO4 VVBOX_SDPRO4 2859 | 498 | vvbox_sdpro4 MACH_VVBOX_SDPRO4 VVBOX_SDPRO4 2859 |
515 | htc_spv_m700 MACH_HTC_SPV_M700 HTC_SPV_M700 2860 | ||
516 | mx257sx MACH_MX257SX MX257SX 2861 | 499 | mx257sx MACH_MX257SX MX257SX 2861 |
517 | goni MACH_GONI GONI 2862 | 500 | goni MACH_GONI GONI 2862 |
518 | msm8x55_svlte_ffa MACH_MSM8X55_SVLTE_FFA MSM8X55_SVLTE_FFA 2863 | ||
519 | msm8x55_svlte_surf MACH_MSM8X55_SVLTE_SURF MSM8X55_SVLTE_SURF 2864 | ||
520 | quickstep MACH_QUICKSTEP QUICKSTEP 2865 | ||
521 | dmw96 MACH_DMW96 DMW96 2866 | ||
522 | hammerhead MACH_HAMMERHEAD HAMMERHEAD 2867 | ||
523 | trident MACH_TRIDENT TRIDENT 2868 | ||
524 | lightning MACH_LIGHTNING LIGHTNING 2869 | ||
525 | iconnect MACH_ICONNECT ICONNECT 2870 | ||
526 | autobot MACH_AUTOBOT AUTOBOT 2871 | ||
527 | coconut MACH_COCONUT COCONUT 2872 | ||
528 | durian MACH_DURIAN DURIAN 2873 | ||
529 | cayenne MACH_CAYENNE CAYENNE 2874 | ||
530 | fuji MACH_FUJI FUJI 2875 | ||
531 | synology_6282 MACH_SYNOLOGY_6282 SYNOLOGY_6282 2876 | ||
532 | em1sy MACH_EM1SY EM1SY 2877 | ||
533 | m502 MACH_M502 M502 2878 | ||
534 | matrix518 MACH_MATRIX518 MATRIX518 2879 | ||
535 | tiny_gurnard MACH_TINY_GURNARD TINY_GURNARD 2880 | ||
536 | spear1310 MACH_SPEAR1310 SPEAR1310 2881 | ||
537 | bv07 MACH_BV07 BV07 2882 | 501 | bv07 MACH_BV07 BV07 2882 |
538 | mxt_td61 MACH_MXT_TD61 MXT_TD61 2883 | ||
539 | openrd_ultimate MACH_OPENRD_ULTIMATE OPENRD_ULTIMATE 2884 | 502 | openrd_ultimate MACH_OPENRD_ULTIMATE OPENRD_ULTIMATE 2884 |
540 | devixp MACH_DEVIXP DEVIXP 2885 | 503 | devixp MACH_DEVIXP DEVIXP 2885 |
541 | miccpt MACH_MICCPT MICCPT 2886 | 504 | miccpt MACH_MICCPT MICCPT 2886 |
542 | mic256 MACH_MIC256 MIC256 2887 | 505 | mic256 MACH_MIC256 MIC256 2887 |
543 | as1167 MACH_AS1167 AS1167 2888 | ||
544 | omap3_ibiza MACH_OMAP3_IBIZA OMAP3_IBIZA 2889 | ||
545 | u5500 MACH_U5500 U5500 2890 | 506 | u5500 MACH_U5500 U5500 2890 |
546 | davinci_picto MACH_DAVINCI_PICTO DAVINCI_PICTO 2891 | ||
547 | mecha MACH_MECHA MECHA 2892 | ||
548 | bubba3 MACH_BUBBA3 BUBBA3 2893 | ||
549 | pupitre MACH_PUPITRE PUPITRE 2894 | ||
550 | tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896 | ||
551 | tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897 | ||
552 | simplenet MACH_SIMPLENET SIMPLENET 2898 | ||
553 | ec4350tbm MACH_EC4350TBM EC4350TBM 2899 | ||
554 | pec_tc MACH_PEC_TC PEC_TC 2900 | ||
555 | pec_hc2 MACH_PEC_HC2 PEC_HC2 2901 | ||
556 | esl_mobilis_a MACH_ESL_MOBILIS_A ESL_MOBILIS_A 2902 | ||
557 | esl_mobilis_b MACH_ESL_MOBILIS_B ESL_MOBILIS_B 2903 | ||
558 | esl_wave_a MACH_ESL_WAVE_A ESL_WAVE_A 2904 | ||
559 | esl_wave_b MACH_ESL_WAVE_B ESL_WAVE_B 2905 | ||
560 | unisense_mmm MACH_UNISENSE_MMM UNISENSE_MMM 2906 | ||
561 | blueshark MACH_BLUESHARK BLUESHARK 2907 | ||
562 | e10 MACH_E10 E10 2908 | ||
563 | app3k_robin MACH_APP3K_ROBIN APP3K_ROBIN 2909 | ||
564 | pov15hd MACH_POV15HD POV15HD 2910 | ||
565 | stella MACH_STELLA STELLA 2911 | ||
566 | linkstation_lschl MACH_LINKSTATION_LSCHL LINKSTATION_LSCHL 2913 | 507 | linkstation_lschl MACH_LINKSTATION_LSCHL LINKSTATION_LSCHL 2913 |
567 | netwalker MACH_NETWALKER NETWALKER 2914 | ||
568 | acsx106 MACH_ACSX106 ACSX106 2915 | ||
569 | atlas5_c1 MACH_ATLAS5_C1 ATLAS5_C1 2916 | ||
570 | nsb3ast MACH_NSB3AST NSB3AST 2917 | ||
571 | gnet_slc MACH_GNET_SLC GNET_SLC 2918 | ||
572 | af4000 MACH_AF4000 AF4000 2919 | ||
573 | ark9431 MACH_ARK9431 ARK9431 2920 | ||
574 | fs_s5pc100 MACH_FS_S5PC100 FS_S5PC100 2921 | ||
575 | omap3505nova8 MACH_OMAP3505NOVA8 OMAP3505NOVA8 2922 | ||
576 | omap3621_edp1 MACH_OMAP3621_EDP1 OMAP3621_EDP1 2923 | ||
577 | oratisaes MACH_ORATISAES ORATISAES 2924 | ||
578 | smdkv310 MACH_SMDKV310 SMDKV310 2925 | 508 | smdkv310 MACH_SMDKV310 SMDKV310 2925 |
579 | siemens_l0 MACH_SIEMENS_L0 SIEMENS_L0 2926 | ||
580 | ventana MACH_VENTANA VENTANA 2927 | ||
581 | wm8505_7in_netbook MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK 2928 | 509 | wm8505_7in_netbook MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK 2928 |
582 | ec4350sdb MACH_EC4350SDB EC4350SDB 2929 | ||
583 | mimas MACH_MIMAS MIMAS 2930 | ||
584 | titan MACH_TITAN TITAN 2931 | ||
585 | craneboard MACH_CRANEBOARD CRANEBOARD 2932 | 510 | craneboard MACH_CRANEBOARD CRANEBOARD 2932 |
586 | es2440 MACH_ES2440 ES2440 2933 | ||
587 | najay_a9263 MACH_NAJAY_A9263 NAJAY_A9263 2934 | ||
588 | htctornado MACH_HTCTORNADO HTCTORNADO 2935 | ||
589 | dimm_mx257 MACH_DIMM_MX257 DIMM_MX257 2936 | ||
590 | jigen301 MACH_JIGEN JIGEN 2937 | ||
591 | smdk6450 MACH_SMDK6450 SMDK6450 2938 | 511 | smdk6450 MACH_SMDK6450 SMDK6450 2938 |
592 | meno_qng MACH_MENO_QNG MENO_QNG 2939 | ||
593 | ns2416 MACH_NS2416 NS2416 2940 | ||
594 | rpc353 MACH_RPC353 RPC353 2941 | ||
595 | tq6410 MACH_TQ6410 TQ6410 2942 | ||
596 | sky6410 MACH_SKY6410 SKY6410 2943 | ||
597 | dynasty MACH_DYNASTY DYNASTY 2944 | ||
598 | vivo MACH_VIVO VIVO 2945 | ||
599 | bury_bl7582 MACH_BURY_BL7582 BURY_BL7582 2946 | ||
600 | bury_bps5270 MACH_BURY_BPS5270 BURY_BPS5270 2947 | ||
601 | basi MACH_BASI BASI 2948 | ||
602 | tn200 MACH_TN200 TN200 2949 | ||
603 | c2mmi MACH_C2MMI C2MMI 2950 | ||
604 | meson_6236m MACH_MESON_6236M MESON_6236M 2951 | ||
605 | meson_8626m MACH_MESON_8626M MESON_8626M 2952 | ||
606 | tube MACH_TUBE TUBE 2953 | ||
607 | messina MACH_MESSINA MESSINA 2954 | ||
608 | mx50_arm2 MACH_MX50_ARM2 MX50_ARM2 2955 | ||
609 | cetus9263 MACH_CETUS9263 CETUS9263 2956 | ||
610 | brownstone MACH_BROWNSTONE BROWNSTONE 2957 | 512 | brownstone MACH_BROWNSTONE BROWNSTONE 2957 |
611 | vmx25 MACH_VMX25 VMX25 2958 | ||
612 | vmx51 MACH_VMX51 VMX51 2959 | ||
613 | abacus MACH_ABACUS ABACUS 2960 | ||
614 | cm4745 MACH_CM4745 CM4745 2961 | ||
615 | oratislink MACH_ORATISLINK ORATISLINK 2962 | ||
616 | davinci_dm365_dvr MACH_DAVINCI_DM365_DVR DAVINCI_DM365_DVR 2963 | ||
617 | netviz MACH_NETVIZ NETVIZ 2964 | ||
618 | flexibity MACH_FLEXIBITY FLEXIBITY 2965 | 513 | flexibity MACH_FLEXIBITY FLEXIBITY 2965 |
619 | wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966 | ||
620 | lpc24xx MACH_LPC24XX LPC24XX 2967 | ||
621 | spica MACH_SPICA SPICA 2968 | ||
622 | gpsdisplay MACH_GPSDISPLAY GPSDISPLAY 2969 | ||
623 | bipnet MACH_BIPNET BIPNET 2970 | ||
624 | overo_ctu_inertial MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL 2971 | ||
625 | davinci_dm355_mmm MACH_DAVINCI_DM355_MMM DAVINCI_DM355_MMM 2972 | ||
626 | pc9260_v2 MACH_PC9260_V2 PC9260_V2 2973 | ||
627 | ptx7545 MACH_PTX7545 PTX7545 2974 | ||
628 | tm_efdc MACH_TM_EFDC TM_EFDC 2975 | ||
629 | omap3_waldo1 MACH_OMAP3_WALDO1 OMAP3_WALDO1 2977 | ||
630 | flyer MACH_FLYER FLYER 2978 | ||
631 | tornado3240 MACH_TORNADO3240 TORNADO3240 2979 | ||
632 | soli_01 MACH_SOLI_01 SOLI_01 2980 | ||
633 | omapl138_europalc MACH_OMAPL138_EUROPALC OMAPL138_EUROPALC 2981 | ||
634 | helios_v1 MACH_HELIOS_V1 HELIOS_V1 2982 | ||
635 | netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983 | ||
636 | ssc MACH_SSC SSC 2984 | ||
637 | premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985 | ||
638 | wasabi MACH_WASABI WASABI 2986 | ||
639 | mx50_rdp MACH_MX50_RDP MX50_RDP 2988 | 514 | mx50_rdp MACH_MX50_RDP MX50_RDP 2988 |
640 | universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 | 515 | universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 |
641 | real6410 MACH_REAL6410 REAL6410 2990 | 516 | real6410 MACH_REAL6410 REAL6410 2990 |
642 | spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991 | ||
643 | ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992 | ||
644 | omap3_bc10 MACH_OMAP3_BC10 OMAP3_BC10 2993 | ||
645 | thebe MACH_THEBE THEBE 2994 | ||
646 | rv082 MACH_RV082 RV082 2995 | ||
647 | armlguest MACH_ARMLGUEST ARMLGUEST 2996 | ||
648 | tjinc1000 MACH_TJINC1000 TJINC1000 2997 | ||
649 | dockstar MACH_DOCKSTAR DOCKSTAR 2998 | 517 | dockstar MACH_DOCKSTAR DOCKSTAR 2998 |
650 | ax8008 MACH_AX8008 AX8008 2999 | ||
651 | gnet_sgce MACH_GNET_SGCE GNET_SGCE 3000 | ||
652 | pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001 | ||
653 | ea20 MACH_EA20 EA20 3002 | ||
654 | awm2 MACH_AWM2 AWM2 3003 | ||
655 | ti8148evm MACH_TI8148EVM TI8148EVM 3004 | 518 | ti8148evm MACH_TI8148EVM TI8148EVM 3004 |
656 | seaboard MACH_SEABOARD SEABOARD 3005 | 519 | seaboard MACH_SEABOARD SEABOARD 3005 |
657 | linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006 | ||
658 | tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007 | ||
659 | rubys MACH_RUBYS RUBYS 3008 | ||
660 | aquarius MACH_AQUARIUS AQUARIUS 3009 | ||
661 | mx53_ard MACH_MX53_ARD MX53_ARD 3010 | 520 | mx53_ard MACH_MX53_ARD MX53_ARD 3010 |
662 | mx53_smd MACH_MX53_SMD MX53_SMD 3011 | 521 | mx53_smd MACH_MX53_SMD MX53_SMD 3011 |
663 | lswxl MACH_LSWXL LSWXL 3012 | ||
664 | dove_avng_v3 MACH_DOVE_AVNG_V3 DOVE_AVNG_V3 3013 | ||
665 | sdi_ess_9263 MACH_SDI_ESS_9263 SDI_ESS_9263 3014 | ||
666 | jocpu550 MACH_JOCPU550 JOCPU550 3015 | ||
667 | msm8x60_rumi3 MACH_MSM8X60_RUMI3 MSM8X60_RUMI3 3016 | 522 | msm8x60_rumi3 MACH_MSM8X60_RUMI3 MSM8X60_RUMI3 3016 |
668 | msm8x60_ffa MACH_MSM8X60_FFA MSM8X60_FFA 3017 | 523 | msm8x60_ffa MACH_MSM8X60_FFA MSM8X60_FFA 3017 |
669 | yanomami MACH_YANOMAMI YANOMAMI 3018 | ||
670 | gta04 MACH_GTA04 GTA04 3019 | ||
671 | cm_a510 MACH_CM_A510 CM_A510 3020 | 524 | cm_a510 MACH_CM_A510 CM_A510 3020 |
672 | omap3_rfs200 MACH_OMAP3_RFS200 OMAP3_RFS200 3021 | ||
673 | kx33xx MACH_KX33XX KX33XX 3022 | ||
674 | ptx7510 MACH_PTX7510 PTX7510 3023 | ||
675 | top9000 MACH_TOP9000 TOP9000 3024 | ||
676 | teenote MACH_TEENOTE TEENOTE 3025 | ||
677 | ts3 MACH_TS3 TS3 3026 | ||
678 | a0 MACH_A0 A0 3027 | ||
679 | fsm9xxx_surf MACH_FSM9XXX_SURF FSM9XXX_SURF 3028 | ||
680 | fsm9xxx_ffa MACH_FSM9XXX_FFA FSM9XXX_FFA 3029 | ||
681 | frrhwcdma60w MACH_FRRHWCDMA60W FRRHWCDMA60W 3030 | ||
682 | remus MACH_REMUS REMUS 3031 | ||
683 | at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032 | ||
684 | at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033 | ||
685 | kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034 | ||
686 | armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036 | ||
687 | spdm MACH_SPDM SPDM 3037 | ||
688 | gtib MACH_GTIB GTIB 3038 | ||
689 | dgm3240 MACH_DGM3240 DGM3240 3039 | ||
690 | htcmega MACH_HTCMEGA HTCMEGA 3041 | ||
691 | tricorder MACH_TRICORDER TRICORDER 3042 | ||
692 | tx28 MACH_TX28 TX28 3043 | 525 | tx28 MACH_TX28 TX28 3043 |
693 | bstbrd MACH_BSTBRD BSTBRD 3044 | ||
694 | pwb3090 MACH_PWB3090 PWB3090 3045 | ||
695 | idea6410 MACH_IDEA6410 IDEA6410 3046 | ||
696 | qbc9263 MACH_QBC9263 QBC9263 3047 | ||
697 | borabora MACH_BORABORA BORABORA 3048 | ||
698 | valdez MACH_VALDEZ VALDEZ 3049 | ||
699 | ls9g20 MACH_LS9G20 LS9G20 3050 | ||
700 | mios_v1 MACH_MIOS_V1 MIOS_V1 3051 | ||
701 | s5pc110_crespo MACH_S5PC110_CRESPO S5PC110_CRESPO 3052 | ||
702 | controltek9g20 MACH_CONTROLTEK9G20 CONTROLTEK9G20 3053 | ||
703 | tin307 MACH_TIN307 TIN307 3054 | ||
704 | tin510 MACH_TIN510 TIN510 3055 | ||
705 | bluecheese MACH_BLUECHEESE BLUECHEESE 3057 | ||
706 | tem3x30 MACH_TEM3X30 TEM3X30 3058 | ||
707 | harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059 | ||
708 | msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060 | ||
709 | spear900 MACH_SPEAR900 SPEAR900 3061 | ||
710 | pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 | 526 | pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 |
711 | rdstor MACH_RDSTOR RDSTOR 3063 | ||
712 | usdloader MACH_USDLOADER USDLOADER 3064 | ||
713 | tsoploader MACH_TSOPLOADER TSOPLOADER 3065 | ||
714 | kronos MACH_KRONOS KRONOS 3066 | ||
715 | ffcore MACH_FFCORE FFCORE 3067 | ||
716 | mone MACH_MONE MONE 3068 | ||
717 | unit2s MACH_UNIT2S UNIT2S 3069 | ||
718 | acer_a5 MACH_ACER_A5 ACER_A5 3070 | ||
719 | etherpro_isp MACH_ETHERPRO_ISP ETHERPRO_ISP 3071 | ||
720 | stretchs7000 MACH_STRETCHS7000 STRETCHS7000 3072 | ||
721 | p87_smartsim MACH_P87_SMARTSIM P87_SMARTSIM 3073 | ||
722 | tulip MACH_TULIP TULIP 3074 | ||
723 | sunflower MACH_SUNFLOWER SUNFLOWER 3075 | ||
724 | rib MACH_RIB RIB 3076 | ||
725 | clod MACH_CLOD CLOD 3077 | ||
726 | rump MACH_RUMP RUMP 3078 | ||
727 | tenderloin MACH_TENDERLOIN TENDERLOIN 3079 | ||
728 | shortloin MACH_SHORTLOIN SHORTLOIN 3080 | ||
729 | antares MACH_ANTARES ANTARES 3082 | ||
730 | wb40n MACH_WB40N WB40N 3083 | ||
731 | herring MACH_HERRING HERRING 3084 | ||
732 | naxy400 MACH_NAXY400 NAXY400 3085 | ||
733 | naxy1200 MACH_NAXY1200 NAXY1200 3086 | ||
734 | vpr200 MACH_VPR200 VPR200 3087 | 527 | vpr200 MACH_VPR200 VPR200 3087 |
735 | bug20 MACH_BUG20 BUG20 3088 | ||
736 | goflexnet MACH_GOFLEXNET GOFLEXNET 3089 | ||
737 | torbreck MACH_TORBRECK TORBRECK 3090 | 528 | torbreck MACH_TORBRECK TORBRECK 3090 |
738 | saarb_mg1 MACH_SAARB_MG1 SAARB_MG1 3091 | ||
739 | callisto MACH_CALLISTO CALLISTO 3092 | ||
740 | multhsu MACH_MULTHSU MULTHSU 3093 | ||
741 | saluda MACH_SALUDA SALUDA 3094 | ||
742 | pemp_omap3_apollo MACH_PEMP_OMAP3_APOLLO PEMP_OMAP3_APOLLO 3095 | ||
743 | vc0718 MACH_VC0718 VC0718 3096 | ||
744 | mvblx MACH_MVBLX MVBLX 3097 | ||
745 | inhand_apeiron MACH_INHAND_APEIRON INHAND_APEIRON 3098 | ||
746 | inhand_fury MACH_INHAND_FURY INHAND_FURY 3099 | ||
747 | inhand_siren MACH_INHAND_SIREN INHAND_SIREN 3100 | ||
748 | hdnvp MACH_HDNVP HDNVP 3101 | ||
749 | softwinner MACH_SOFTWINNER SOFTWINNER 3102 | ||
750 | prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103 | 529 | prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103 |
751 | nas6210 MACH_NAS6210 NAS6210 3104 | ||
752 | unisdev MACH_UNISDEV UNISDEV 3105 | ||
753 | sbca11 MACH_SBCA11 SBCA11 3106 | ||
754 | saga MACH_SAGA SAGA 3107 | ||
755 | ns_k330 MACH_NS_K330 NS_K330 3108 | ||
756 | tanna MACH_TANNA TANNA 3109 | ||
757 | imate8502 MACH_IMATE8502 IMATE8502 3110 | ||
758 | aspen MACH_ASPEN ASPEN 3111 | ||
759 | daintree_cwac MACH_DAINTREE_CWAC DAINTREE_CWAC 3112 | ||
760 | zmx25 MACH_ZMX25 ZMX25 3113 | ||
761 | maple1 MACH_MAPLE1 MAPLE1 3114 | ||
762 | qsd8x72_surf MACH_QSD8X72_SURF QSD8X72_SURF 3115 | ||
763 | qsd8x72_ffa MACH_QSD8X72_FFA QSD8X72_FFA 3116 | ||
764 | abilene MACH_ABILENE ABILENE 3117 | ||
765 | eigen_ttr MACH_EIGEN_TTR EIGEN_TTR 3118 | ||
766 | iomega_ix2_200 MACH_IOMEGA_IX2_200 IOMEGA_IX2_200 3119 | ||
767 | coretec_vcx7400 MACH_CORETEC_VCX7400 CORETEC_VCX7400 3120 | ||
768 | santiago MACH_SANTIAGO SANTIAGO 3121 | ||
769 | mx257sol MACH_MX257SOL MX257SOL 3122 | ||
770 | strasbourg MACH_STRASBOURG STRASBOURG 3123 | ||
771 | msm8x60_fluid MACH_MSM8X60_FLUID MSM8X60_FLUID 3124 | ||
772 | smartqv5 MACH_SMARTQV5 SMARTQV5 3125 | ||
773 | smartqv3 MACH_SMARTQV3 SMARTQV3 3126 | ||
774 | smartqv7 MACH_SMARTQV7 SMARTQV7 3127 | ||
775 | paz00 MACH_PAZ00 PAZ00 3128 | 530 | paz00 MACH_PAZ00 PAZ00 3128 |
776 | acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 | 531 | acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 |
777 | fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131 | ||
778 | hdgu MACH_HDGU HDGU 3132 | ||
779 | pyramid MACH_PYRAMID PYRAMID 3133 | ||
780 | epiphan MACH_EPIPHAN EPIPHAN 3134 | ||
781 | omap_bender MACH_OMAP_BENDER OMAP_BENDER 3135 | ||
782 | gurnard MACH_GURNARD GURNARD 3136 | ||
783 | gtl_it5100 MACH_GTL_IT5100 GTL_IT5100 3137 | ||
784 | bcm2708 MACH_BCM2708 BCM2708 3138 | ||
785 | mx51_ggc MACH_MX51_GGC MX51_GGC 3139 | ||
786 | sharespace MACH_SHARESPACE SHARESPACE 3140 | ||
787 | haba_knx_explorer MACH_HABA_KNX_EXPLORER HABA_KNX_EXPLORER 3141 | ||
788 | simtec_kirkmod MACH_SIMTEC_KIRKMOD SIMTEC_KIRKMOD 3142 | ||
789 | crux MACH_CRUX CRUX 3143 | ||
790 | mx51_bravo MACH_MX51_BRAVO MX51_BRAVO 3144 | ||
791 | charon MACH_CHARON CHARON 3145 | ||
792 | picocom3 MACH_PICOCOM3 PICOCOM3 3146 | ||
793 | picocom4 MACH_PICOCOM4 PICOCOM4 3147 | ||
794 | serrano MACH_SERRANO SERRANO 3148 | ||
795 | doubleshot MACH_DOUBLESHOT DOUBLESHOT 3149 | ||
796 | evsy MACH_EVSY EVSY 3150 | ||
797 | huashan MACH_HUASHAN HUASHAN 3151 | ||
798 | lausanne MACH_LAUSANNE LAUSANNE 3152 | ||
799 | emerald MACH_EMERALD EMERALD 3153 | ||
800 | tqma35 MACH_TQMA35 TQMA35 3154 | ||
801 | marvel MACH_MARVEL MARVEL 3155 | ||
802 | manuae MACH_MANUAE MANUAE 3156 | ||
803 | chacha MACH_CHACHA CHACHA 3157 | ||
804 | lemon MACH_LEMON LEMON 3158 | ||
805 | csc MACH_CSC CSC 3159 | ||
806 | gira_knxip_router MACH_GIRA_KNXIP_ROUTER GIRA_KNXIP_ROUTER 3160 | ||
807 | t20 MACH_T20 T20 3161 | ||
808 | hdmini MACH_HDMINI HDMINI 3162 | ||
809 | sciphone_g2 MACH_SCIPHONE_G2 SCIPHONE_G2 3163 | ||
810 | express MACH_EXPRESS EXPRESS 3164 | ||
811 | express_kt MACH_EXPRESS_KT EXPRESS_KT 3165 | ||
812 | maximasp MACH_MAXIMASP MAXIMASP 3166 | ||
813 | nitrogen_imx51 MACH_NITROGEN_IMX51 NITROGEN_IMX51 3167 | ||
814 | nitrogen_imx53 MACH_NITROGEN_IMX53 NITROGEN_IMX53 3168 | ||
815 | sunfire MACH_SUNFIRE SUNFIRE 3169 | ||
816 | arowana MACH_AROWANA AROWANA 3170 | ||
817 | tegra_daytona MACH_TEGRA_DAYTONA TEGRA_DAYTONA 3171 | ||
818 | tegra_swordfish MACH_TEGRA_SWORDFISH TEGRA_SWORDFISH 3172 | ||
819 | edison MACH_EDISON EDISON 3173 | ||
820 | svp8500v1 MACH_SVP8500V1 SVP8500V1 3174 | ||
821 | svp8500v2 MACH_SVP8500V2 SVP8500V2 3175 | ||
822 | svp5500 MACH_SVP5500 SVP5500 3176 | ||
823 | b5500 MACH_B5500 B5500 3177 | ||
824 | s5500 MACH_S5500 S5500 3178 | ||
825 | icon MACH_ICON ICON 3179 | ||
826 | elephant MACH_ELEPHANT ELEPHANT 3180 | ||
827 | shooter MACH_SHOOTER SHOOTER 3182 | ||
828 | spade_lte MACH_SPADE_LTE SPADE_LTE 3183 | ||
829 | philhwani MACH_PHILHWANI PHILHWANI 3184 | ||
830 | gsncomm MACH_GSNCOMM GSNCOMM 3185 | ||
831 | strasbourg_a2 MACH_STRASBOURG_A2 STRASBOURG_A2 3186 | ||
832 | mmm MACH_MMM MMM 3187 | ||
833 | davinci_dm365_bv MACH_DAVINCI_DM365_BV DAVINCI_DM365_BV 3188 | ||
834 | ag5evm MACH_AG5EVM AG5EVM 3189 | 532 | ag5evm MACH_AG5EVM AG5EVM 3189 |
835 | sc575plc MACH_SC575PLC SC575PLC 3190 | ||
836 | sc575hmi MACH_SC575IPC SC575IPC 3191 | ||
837 | omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192 | ||
838 | top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194 | ||
839 | top9000_su MACH_TOP9000_SU TOP9000_SU 3195 | ||
840 | utm300 MACH_UTM300 UTM300 3196 | ||
841 | tsunagi MACH_TSUNAGI TSUNAGI 3197 | 533 | tsunagi MACH_TSUNAGI TSUNAGI 3197 |
842 | ts75xx MACH_TS75XX TS75XX 3198 | ||
843 | ts47xx MACH_TS47XX TS47XX 3200 | ||
844 | da850_k5 MACH_DA850_K5 DA850_K5 3201 | ||
845 | ax502 MACH_AX502 AX502 3202 | ||
846 | igep0032 MACH_IGEP0032 IGEP0032 3203 | ||
847 | antero MACH_ANTERO ANTERO 3204 | ||
848 | synergy MACH_SYNERGY SYNERGY 3205 | ||
849 | ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 | 534 | ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 |
850 | wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 | 535 | wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 |
851 | punica MACH_PUNICA PUNICA 3208 | ||
852 | trimslice MACH_TRIMSLICE TRIMSLICE 3209 | 536 | trimslice MACH_TRIMSLICE TRIMSLICE 3209 |
853 | mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210 | ||
854 | mackerel MACH_MACKEREL MACKEREL 3211 | 537 | mackerel MACH_MACKEREL MACKEREL 3211 |
855 | fa9x27 MACH_FA9X27 FA9X27 3213 | ||
856 | ns2816tb MACH_NS2816TB NS2816TB 3214 | ||
857 | ns2816_ntpad MACH_NS2816_NTPAD NS2816_NTPAD 3215 | ||
858 | ns2816_ntnb MACH_NS2816_NTNB NS2816_NTNB 3216 | ||
859 | kaen MACH_KAEN KAEN 3217 | 538 | kaen MACH_KAEN KAEN 3217 |
860 | nv1000 MACH_NV1000 NV1000 3218 | ||
861 | nuc950ts MACH_NUC950TS NUC950TS 3219 | ||
862 | nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220 | 539 | nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220 |
863 | ast2200 MACH_AST2200 AST2200 3221 | ||
864 | lead MACH_LEAD LEAD 3222 | ||
865 | unino1 MACH_UNINO1 UNINO1 3223 | ||
866 | greeco MACH_GREECO GREECO 3224 | ||
867 | verdi MACH_VERDI VERDI 3225 | ||
868 | dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226 | 540 | dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226 |
869 | quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227 | 541 | quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227 |
870 | abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228 | 542 | abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228 |
@@ -949,13 +621,11 @@ koi MACH_KOI KOI 3312 | |||
949 | ts4800 MACH_TS4800 TS4800 3313 | 621 | ts4800 MACH_TS4800 TS4800 3313 |
950 | tqma9263 MACH_TQMA9263 TQMA9263 3314 | 622 | tqma9263 MACH_TQMA9263 TQMA9263 3314 |
951 | holiday MACH_HOLIDAY HOLIDAY 3315 | 623 | holiday MACH_HOLIDAY HOLIDAY 3315 |
952 | dma_6410 MACH_DMA6410 DMA6410 3316 | ||
953 | pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317 | 624 | pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317 |
954 | hwgw6410 MACH_HWGW6410 HWGW6410 3318 | 625 | hwgw6410 MACH_HWGW6410 HWGW6410 3318 |
955 | shenzhou MACH_SHENZHOU SHENZHOU 3319 | 626 | shenzhou MACH_SHENZHOU SHENZHOU 3319 |
956 | cwme9210 MACH_CWME9210 CWME9210 3320 | 627 | cwme9210 MACH_CWME9210 CWME9210 3320 |
957 | cwme9210js MACH_CWME9210JS CWME9210JS 3321 | 628 | cwme9210js MACH_CWME9210JS CWME9210JS 3321 |
958 | pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322 | ||
959 | colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323 | 629 | colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323 |
960 | w21 MACH_W21 W21 3324 | 630 | w21 MACH_W21 W21 3324 |
961 | polysat1 MACH_POLYSAT1 POLYSAT1 3325 | 631 | polysat1 MACH_POLYSAT1 POLYSAT1 3325 |
@@ -1021,13 +691,11 @@ viprinet MACH_VIPRINET VIPRINET 3385 | |||
1021 | bockw MACH_BOCKW BOCKW 3386 | 691 | bockw MACH_BOCKW BOCKW 3386 |
1022 | eva2000 MACH_EVA2000 EVA2000 3387 | 692 | eva2000 MACH_EVA2000 EVA2000 3387 |
1023 | steelyard MACH_STEELYARD STEELYARD 3388 | 693 | steelyard MACH_STEELYARD STEELYARD 3388 |
1024 | sdh001 MACH_MACH_SDH001 MACH_SDH001 3390 | ||
1025 | nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392 | 694 | nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392 |
1026 | geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393 | 695 | geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393 |
1027 | spear1340 MACH_SPEAR1340 SPEAR1340 3394 | 696 | spear1340 MACH_SPEAR1340 SPEAR1340 3394 |
1028 | rexmas MACH_REXMAS REXMAS 3395 | 697 | rexmas MACH_REXMAS REXMAS 3395 |
1029 | msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396 | 698 | msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396 |
1030 | msm8960_mdp MACH_MSM8960_MDP MSM8960_MDP 3397 | ||
1031 | msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398 | 699 | msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398 |
1032 | msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399 | 700 | msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399 |
1033 | helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400 | 701 | helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400 |
@@ -1123,6 +791,381 @@ blissc MACH_BLISSC BLISSC 3491 | |||
1123 | thales_adc MACH_THALES_ADC THALES_ADC 3492 | 791 | thales_adc MACH_THALES_ADC THALES_ADC 3492 |
1124 | ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 | 792 | ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 |
1125 | atdgp318 MACH_ATDGP318 ATDGP318 3494 | 793 | atdgp318 MACH_ATDGP318 ATDGP318 3494 |
794 | dma210u MACH_DMA210U DMA210U 3495 | ||
795 | em_t3 MACH_EM_T3 EM_T3 3496 | ||
796 | htx3250 MACH_HTX3250 HTX3250 3497 | ||
797 | g50 MACH_G50 G50 3498 | ||
798 | eco5 MACH_ECO5 ECO5 3499 | ||
799 | wintergrasp MACH_WINTERGRASP WINTERGRASP 3500 | ||
800 | puro MACH_PURO PURO 3501 | ||
801 | shooter_k MACH_SHOOTER_K SHOOTER_K 3502 | ||
802 | nspire MACH_NSPIRE NSPIRE 3503 | ||
803 | mickxx MACH_MICKXX MICKXX 3504 | ||
804 | lxmb MACH_LXMB LXMB 3505 | ||
805 | adam MACH_ADAM ADAM 3507 | ||
806 | b1004 MACH_B1004 B1004 3508 | ||
807 | oboea MACH_OBOEA OBOEA 3509 | ||
808 | a1015 MACH_A1015 A1015 3510 | ||
809 | robin_vbdt30 MACH_ROBIN_VBDT30 ROBIN_VBDT30 3511 | ||
810 | tegra_enterprise MACH_TEGRA_ENTERPRISE TEGRA_ENTERPRISE 3512 | ||
811 | rfl108200_mk10 MACH_RFL108200_MK10 RFL108200_MK10 3513 | ||
812 | rfl108300_mk16 MACH_RFL108300_MK16 RFL108300_MK16 3514 | ||
813 | rover_v7 MACH_ROVER_V7 ROVER_V7 3515 | ||
814 | miphone MACH_MIPHONE MIPHONE 3516 | ||
815 | femtobts MACH_FEMTOBTS FEMTOBTS 3517 | ||
816 | monopoli MACH_MONOPOLI MONOPOLI 3518 | ||
817 | boss MACH_BOSS BOSS 3519 | ||
818 | davinci_dm368_vtam MACH_DAVINCI_DM368_VTAM DAVINCI_DM368_VTAM 3520 | ||
819 | clcon MACH_CLCON CLCON 3521 | ||
820 | nokia_rm696 MACH_NOKIA_RM696 NOKIA_RM696 3522 | ||
821 | tahiti MACH_TAHITI TAHITI 3523 | ||
822 | fighter MACH_FIGHTER FIGHTER 3524 | ||
823 | sgh_i710 MACH_SGH_I710 SGH_I710 3525 | ||
824 | integreproscb MACH_INTEGREPROSCB INTEGREPROSCB 3526 | ||
825 | monza MACH_MONZA MONZA 3527 | ||
826 | calimain MACH_CALIMAIN CALIMAIN 3528 | ||
827 | mx6q_sabreauto MACH_MX6Q_SABREAUTO MX6Q_SABREAUTO 3529 | ||
828 | gma01x MACH_GMA01X GMA01X 3530 | ||
829 | sbc51 MACH_SBC51 SBC51 3531 | ||
830 | fit MACH_FIT FIT 3532 | ||
831 | steelhead MACH_STEELHEAD STEELHEAD 3533 | ||
832 | panther MACH_PANTHER PANTHER 3534 | ||
833 | msm8960_liquid MACH_MSM8960_LIQUID MSM8960_LIQUID 3535 | ||
834 | lexikonct MACH_LEXIKONCT LEXIKONCT 3536 | ||
835 | ns2816_stb MACH_NS2816_STB NS2816_STB 3537 | ||
836 | sei_mm2_lpc3250 MACH_SEI_MM2_LPC3250 SEI_MM2_LPC3250 3538 | ||
837 | cmimx53 MACH_CMIMX53 CMIMX53 3539 | ||
838 | sandwich MACH_SANDWICH SANDWICH 3540 | ||
839 | chief MACH_CHIEF CHIEF 3541 | ||
840 | pogo_e02 MACH_POGO_E02 POGO_E02 3542 | ||
841 | mikrap_x168 MACH_MIKRAP_X168 MIKRAP_X168 3543 | ||
842 | htcmozart MACH_HTCMOZART HTCMOZART 3544 | ||
843 | htcgold MACH_HTCGOLD HTCGOLD 3545 | ||
844 | mt72xx MACH_MT72XX MT72XX 3546 | ||
845 | mx51_ivy MACH_MX51_IVY MX51_IVY 3547 | ||
846 | mx51_lvd MACH_MX51_LVD MX51_LVD 3548 | ||
847 | omap3_wiser2 MACH_OMAP3_WISER2 OMAP3_WISER2 3549 | ||
848 | dreamplug MACH_DREAMPLUG DREAMPLUG 3550 | ||
849 | cobas_c_111 MACH_COBAS_C_111 COBAS_C_111 3551 | ||
850 | cobas_u_411 MACH_COBAS_U_411 COBAS_U_411 3552 | ||
851 | hssd MACH_HSSD HSSD 3553 | ||
852 | iom35x MACH_IOM35X IOM35X 3554 | ||
853 | psom_omap MACH_PSOM_OMAP PSOM_OMAP 3555 | ||
854 | iphone_2g MACH_IPHONE_2G IPHONE_2G 3556 | ||
855 | iphone_3g MACH_IPHONE_3G IPHONE_3G 3557 | ||
856 | ipod_touch_1g MACH_IPOD_TOUCH_1G IPOD_TOUCH_1G 3558 | ||
857 | pharos_tpc MACH_PHAROS_TPC PHAROS_TPC 3559 | ||
858 | mx53_hydra MACH_MX53_HYDRA MX53_HYDRA 3560 | ||
859 | ns2816_dev_board MACH_NS2816_DEV_BOARD NS2816_DEV_BOARD 3561 | ||
860 | iphone_3gs MACH_IPHONE_3GS IPHONE_3GS 3562 | ||
861 | iphone_4 MACH_IPHONE_4 IPHONE_4 3563 | ||
862 | ipod_touch_4g MACH_IPOD_TOUCH_4G IPOD_TOUCH_4G 3564 | ||
863 | dragon_e1100 MACH_DRAGON_E1100 DRAGON_E1100 3565 | ||
864 | topside MACH_TOPSIDE TOPSIDE 3566 | ||
865 | irisiii MACH_IRISIII IRISIII 3567 | ||
866 | deto_macarm9 MACH_DETO_MACARM9 DETO_MACARM9 3568 | ||
867 | eti_d1 MACH_ETI_D1 ETI_D1 3569 | ||
868 | som3530sdk MACH_SOM3530SDK SOM3530SDK 3570 | ||
869 | oc_engine MACH_OC_ENGINE OC_ENGINE 3571 | ||
870 | apq8064_sim MACH_APQ8064_SIM APQ8064_SIM 3572 | ||
871 | alps MACH_ALPS ALPS 3575 | ||
872 | tny_t3730 MACH_TNY_T3730 TNY_T3730 3576 | ||
873 | geryon_nfe MACH_GERYON_NFE GERYON_NFE 3577 | ||
874 | ns2816_ref_board MACH_NS2816_REF_BOARD NS2816_REF_BOARD 3578 | ||
875 | silverstone MACH_SILVERSTONE SILVERSTONE 3579 | ||
876 | mtt2440 MACH_MTT2440 MTT2440 3580 | ||
877 | ynicdb MACH_YNICDB YNICDB 3581 | ||
878 | bct MACH_BCT BCT 3582 | ||
879 | tuscan MACH_TUSCAN TUSCAN 3583 | ||
880 | xbt_sam9g45 MACH_XBT_SAM9G45 XBT_SAM9G45 3584 | ||
881 | enbw_cmc MACH_ENBW_CMC ENBW_CMC 3585 | ||
882 | ch104mx257 MACH_CH104MX257 CH104MX257 3587 | ||
883 | openpri MACH_OPENPRI OPENPRI 3588 | ||
884 | am335xevm MACH_AM335XEVM AM335XEVM 3589 | ||
885 | picodmb MACH_PICODMB PICODMB 3590 | ||
886 | waluigi MACH_WALUIGI WALUIGI 3591 | ||
887 | punicag7 MACH_PUNICAG7 PUNICAG7 3592 | ||
888 | ipad_1g MACH_IPAD_1G IPAD_1G 3593 | ||
889 | appletv_2g MACH_APPLETV_2G APPLETV_2G 3594 | ||
890 | mach_ecog45 MACH_MACH_ECOG45 MACH_ECOG45 3595 | ||
891 | ait_cam_enc_4xx MACH_AIT_CAM_ENC_4XX AIT_CAM_ENC_4XX 3596 | ||
892 | runnymede MACH_RUNNYMEDE RUNNYMEDE 3597 | ||
893 | play MACH_PLAY PLAY 3598 | ||
894 | hw90260 MACH_HW90260 HW90260 3599 | ||
895 | tagh MACH_TAGH TAGH 3600 | ||
896 | filbert MACH_FILBERT FILBERT 3601 | ||
897 | getinge_netcomv3 MACH_GETINGE_NETCOMV3 GETINGE_NETCOMV3 3602 | ||
898 | cw20 MACH_CW20 CW20 3603 | ||
899 | cinema MACH_CINEMA CINEMA 3604 | ||
900 | cinema_tea MACH_CINEMA_TEA CINEMA_TEA 3605 | ||
901 | cinema_coffee MACH_CINEMA_COFFEE CINEMA_COFFEE 3606 | ||
902 | cinema_juice MACH_CINEMA_JUICE CINEMA_JUICE 3607 | ||
903 | mx53_mirage2 MACH_MX53_MIRAGE2 MX53_MIRAGE2 3609 | ||
904 | mx53_efikasb MACH_MX53_EFIKASB MX53_EFIKASB 3610 | ||
905 | stm_b2000 MACH_STM_B2000 STM_B2000 3612 | ||
1126 | m28evk MACH_M28EVK M28EVK 3613 | 906 | m28evk MACH_M28EVK M28EVK 3613 |
907 | pda MACH_PDA PDA 3614 | ||
908 | meraki_mr58 MACH_MERAKI_MR58 MERAKI_MR58 3615 | ||
909 | kota2 MACH_KOTA2 KOTA2 3616 | ||
910 | letcool MACH_LETCOOL LETCOOL 3617 | ||
911 | mx27iat MACH_MX27IAT MX27IAT 3618 | ||
912 | apollo_td MACH_APOLLO_TD APOLLO_TD 3619 | ||
913 | arena MACH_ARENA ARENA 3620 | ||
914 | gsngateway MACH_GSNGATEWAY GSNGATEWAY 3621 | ||
915 | lf2000 MACH_LF2000 LF2000 3622 | ||
916 | bonito MACH_BONITO BONITO 3623 | ||
917 | asymptote MACH_ASYMPTOTE ASYMPTOTE 3624 | ||
918 | bst2brd MACH_BST2BRD BST2BRD 3625 | ||
919 | tx335s MACH_TX335S TX335S 3626 | ||
920 | pelco_tesla MACH_PELCO_TESLA PELCO_TESLA 3627 | ||
921 | rrhtestplat MACH_RRHTESTPLAT RRHTESTPLAT 3628 | ||
922 | vidtonic_pro MACH_VIDTONIC_PRO VIDTONIC_PRO 3629 | ||
923 | pl_apollo MACH_PL_APOLLO PL_APOLLO 3630 | ||
924 | pl_phoenix MACH_PL_PHOENIX PL_PHOENIX 3631 | ||
925 | m28cu3 MACH_M28CU3 M28CU3 3632 | ||
926 | vvbox_hd MACH_VVBOX_HD VVBOX_HD 3633 | ||
927 | coreware_sam9260_ MACH_COREWARE_SAM9260_ COREWARE_SAM9260_ 3634 | ||
928 | marmaduke MACH_MARMADUKE MARMADUKE 3635 | ||
929 | amg_xlcore_camera MACH_AMG_XLCORE_CAMERA AMG_XLCORE_CAMERA 3636 | ||
930 | omap3_egf MACH_OMAP3_EGF OMAP3_EGF 3637 | ||
1127 | smdk4212 MACH_SMDK4212 SMDK4212 3638 | 931 | smdk4212 MACH_SMDK4212 SMDK4212 3638 |
932 | dnp9200 MACH_DNP9200 DNP9200 3639 | ||
933 | tf101 MACH_TF101 TF101 3640 | ||
934 | omap3silvio MACH_OMAP3SILVIO OMAP3SILVIO 3641 | ||
935 | picasso2 MACH_PICASSO2 PICASSO2 3642 | ||
936 | vangogh2 MACH_VANGOGH2 VANGOGH2 3643 | ||
937 | olpc_xo_1_75 MACH_OLPC_XO_1_75 OLPC_XO_1_75 3644 | ||
938 | gx400 MACH_GX400 GX400 3645 | ||
939 | gs300 MACH_GS300 GS300 3646 | ||
940 | acer_a9 MACH_ACER_A9 ACER_A9 3647 | ||
941 | vivow_evm MACH_VIVOW_EVM VIVOW_EVM 3648 | ||
942 | veloce_cxq MACH_VELOCE_CXQ VELOCE_CXQ 3649 | ||
943 | veloce_cxm MACH_VELOCE_CXM VELOCE_CXM 3650 | ||
944 | p1852 MACH_P1852 P1852 3651 | ||
945 | naxy100 MACH_NAXY100 NAXY100 3652 | ||
946 | taishan MACH_TAISHAN TAISHAN 3653 | ||
947 | touchlink MACH_TOUCHLINK TOUCHLINK 3654 | ||
948 | stm32f103ze MACH_STM32F103ZE STM32F103ZE 3655 | ||
949 | mcx MACH_MCX MCX 3656 | ||
950 | stm_nmhdk_fli7610 MACH_STM_NMHDK_FLI7610 STM_NMHDK_FLI7610 3657 | ||
951 | top28x MACH_TOP28X TOP28X 3658 | ||
952 | okl4vp_microvisor MACH_OKL4VP_MICROVISOR OKL4VP_MICROVISOR 3659 | ||
953 | pop MACH_POP POP 3660 | ||
954 | layer MACH_LAYER LAYER 3661 | ||
955 | trondheim MACH_TRONDHEIM TRONDHEIM 3662 | ||
956 | eva MACH_EVA EVA 3663 | ||
957 | trust_taurus MACH_TRUST_TAURUS TRUST_TAURUS 3664 | ||
958 | ns2816_huashan MACH_NS2816_HUASHAN NS2816_HUASHAN 3665 | ||
959 | ns2816_yangcheng MACH_NS2816_YANGCHENG NS2816_YANGCHENG 3666 | ||
960 | p852 MACH_P852 P852 3667 | ||
961 | flea3 MACH_FLEA3 FLEA3 3668 | ||
962 | bowfin MACH_BOWFIN BOWFIN 3669 | ||
963 | mv88de3100 MACH_MV88DE3100 MV88DE3100 3670 | ||
964 | pia_am35x MACH_PIA_AM35X PIA_AM35X 3671 | ||
965 | cedar MACH_CEDAR CEDAR 3672 | ||
966 | picasso_e MACH_PICASSO_E PICASSO_E 3673 | ||
967 | samsung_e60 MACH_SAMSUNG_E60 SAMSUNG_E60 3674 | ||
968 | sdvr_mini MACH_SDVR_MINI SDVR_MINI 3676 | ||
969 | omap3_ij3k MACH_OMAP3_IJ3K OMAP3_IJ3K 3677 | ||
970 | modasmc1 MACH_MODASMC1 MODASMC1 3678 | ||
971 | apq8064_rumi3 MACH_APQ8064_RUMI3 APQ8064_RUMI3 3679 | ||
972 | matrix506 MACH_MATRIX506 MATRIX506 3680 | ||
973 | msm9615_mtp MACH_MSM9615_MTP MSM9615_MTP 3681 | ||
974 | dm36x_spawndc MACH_DM36X_SPAWNDC DM36X_SPAWNDC 3682 | ||
975 | sff792 MACH_SFF792 SFF792 3683 | ||
976 | am335xiaevm MACH_AM335XIAEVM AM335XIAEVM 3684 | ||
977 | g3c2440 MACH_G3C2440 G3C2440 3685 | ||
978 | tion270 MACH_TION270 TION270 3686 | ||
979 | w22q7arm02 MACH_W22Q7ARM02 W22Q7ARM02 3687 | ||
980 | omap_cat MACH_OMAP_CAT OMAP_CAT 3688 | ||
981 | at91sam9n12ek MACH_AT91SAM9N12EK AT91SAM9N12EK 3689 | ||
982 | morrison MACH_MORRISON MORRISON 3690 | ||
983 | svdu MACH_SVDU SVDU 3691 | ||
984 | lpp01 MACH_LPP01 LPP01 3692 | ||
985 | ubc283 MACH_UBC283 UBC283 3693 | ||
986 | zeppelin MACH_ZEPPELIN ZEPPELIN 3694 | ||
987 | motus MACH_MOTUS MOTUS 3695 | ||
988 | neomainboard MACH_NEOMAINBOARD NEOMAINBOARD 3696 | ||
989 | devkit3250 MACH_DEVKIT3250 DEVKIT3250 3697 | ||
990 | devkit7000 MACH_DEVKIT7000 DEVKIT7000 3698 | ||
991 | fmc_uic MACH_FMC_UIC FMC_UIC 3699 | ||
992 | fmc_dcm MACH_FMC_DCM FMC_DCM 3700 | ||
993 | batwm MACH_BATWM BATWM 3701 | ||
994 | atlas6cb MACH_ATLAS6CB ATLAS6CB 3702 | ||
995 | blue MACH_BLUE BLUE 3705 | ||
996 | colorado MACH_COLORADO COLORADO 3706 | ||
997 | popc MACH_POPC POPC 3707 | ||
998 | promwad_jade MACH_PROMWAD_JADE PROMWAD_JADE 3708 | ||
999 | amp MACH_AMP AMP 3709 | ||
1000 | gnet_amp MACH_GNET_AMP GNET_AMP 3710 | ||
1001 | toques MACH_TOQUES TOQUES 3711 | ||
1002 | dct_storm MACH_DCT_STORM DCT_STORM 3713 | ||
1003 | owl MACH_OWL OWL 3715 | ||
1004 | cogent_csb1741 MACH_COGENT_CSB1741 COGENT_CSB1741 3716 | ||
1005 | adillustra610 MACH_ADILLUSTRA610 ADILLUSTRA610 3718 | ||
1006 | ecafe_na04 MACH_ECAFE_NA04 ECAFE_NA04 3719 | ||
1007 | popct MACH_POPCT POPCT 3720 | ||
1008 | omap3_helena MACH_OMAP3_HELENA OMAP3_HELENA 3721 | ||
1009 | ach MACH_ACH ACH 3722 | ||
1010 | module_dtb MACH_MODULE_DTB MODULE_DTB 3723 | ||
1011 | oslo_elisabeth MACH_OSLO_ELISABETH OSLO_ELISABETH 3725 | ||
1012 | tt01 MACH_TT01 TT01 3726 | ||
1013 | msm8930_cdp MACH_MSM8930_CDP MSM8930_CDP 3727 | ||
1014 | msm8930_mtp MACH_MSM8930_MTP MSM8930_MTP 3728 | ||
1015 | msm8930_fluid MACH_MSM8930_FLUID MSM8930_FLUID 3729 | ||
1016 | ltu11 MACH_LTU11 LTU11 3730 | ||
1017 | am1808_spawnco MACH_AM1808_SPAWNCO AM1808_SPAWNCO 3731 | ||
1018 | flx6410 MACH_FLX6410 FLX6410 3732 | ||
1019 | mx6q_qsb MACH_MX6Q_QSB MX6Q_QSB 3733 | ||
1020 | mx53_plt424 MACH_MX53_PLT424 MX53_PLT424 3734 | ||
1021 | jasmine MACH_JASMINE JASMINE 3735 | ||
1022 | l138_owlboard_plus MACH_L138_OWLBOARD_PLUS L138_OWLBOARD_PLUS 3736 | ||
1023 | wr21 MACH_WR21 WR21 3737 | ||
1024 | peaboy MACH_PEABOY PEABOY 3739 | ||
1025 | mx28_plato MACH_MX28_PLATO MX28_PLATO 3740 | ||
1026 | kacom2 MACH_KACOM2 KACOM2 3741 | ||
1027 | slco MACH_SLCO SLCO 3742 | ||
1028 | imx51pico MACH_IMX51PICO IMX51PICO 3743 | ||
1029 | glink1 MACH_GLINK1 GLINK1 3744 | ||
1030 | diamond MACH_DIAMOND DIAMOND 3745 | ||
1031 | d9000 MACH_D9000 D9000 3746 | ||
1032 | w5300e01 MACH_W5300E01 W5300E01 3747 | ||
1033 | im6000 MACH_IM6000 IM6000 3748 | ||
1034 | mx51_fred51 MACH_MX51_FRED51 MX51_FRED51 3749 | ||
1035 | stm32f2 MACH_STM32F2 STM32F2 3750 | ||
1036 | ville MACH_VILLE VILLE 3751 | ||
1037 | ptip_murnau MACH_PTIP_MURNAU PTIP_MURNAU 3752 | ||
1038 | ptip_classic MACH_PTIP_CLASSIC PTIP_CLASSIC 3753 | ||
1039 | mx53grb MACH_MX53GRB MX53GRB 3754 | ||
1040 | gagarin MACH_GAGARIN GAGARIN 3755 | ||
1041 | nas2big MACH_NAS2BIG NAS2BIG 3757 | ||
1042 | superfemto MACH_SUPERFEMTO SUPERFEMTO 3758 | ||
1043 | teufel MACH_TEUFEL TEUFEL 3759 | ||
1044 | dinara MACH_DINARA DINARA 3760 | ||
1045 | vanquish MACH_VANQUISH VANQUISH 3761 | ||
1046 | zipabox1 MACH_ZIPABOX1 ZIPABOX1 3762 | ||
1047 | u9540 MACH_U9540 U9540 3763 | ||
1048 | jet MACH_JET JET 3764 | ||
1128 | smdk4412 MACH_SMDK4412 SMDK4412 3765 | 1049 | smdk4412 MACH_SMDK4412 SMDK4412 3765 |
1050 | elite MACH_ELITE ELITE 3766 | ||
1051 | spear320_hmi MACH_SPEAR320_HMI SPEAR320_HMI 3767 | ||
1052 | ontario MACH_ONTARIO ONTARIO 3768 | ||
1053 | mx6q_sabrelite MACH_MX6Q_SABRELITE MX6Q_SABRELITE 3769 | ||
1054 | vc200 MACH_VC200 VC200 3770 | ||
1055 | msm7625a_ffa MACH_MSM7625A_FFA MSM7625A_FFA 3771 | ||
1056 | msm7625a_surf MACH_MSM7625A_SURF MSM7625A_SURF 3772 | ||
1057 | benthossbp MACH_BENTHOSSBP BENTHOSSBP 3773 | ||
1058 | smdk5210 MACH_SMDK5210 SMDK5210 3774 | ||
1059 | empq2300 MACH_EMPQ2300 EMPQ2300 3775 | ||
1060 | minipos MACH_MINIPOS MINIPOS 3776 | ||
1061 | omap5_sevm MACH_OMAP5_SEVM OMAP5_SEVM 3777 | ||
1062 | shelter MACH_SHELTER SHELTER 3778 | ||
1063 | omap3_devkit8500 MACH_OMAP3_DEVKIT8500 OMAP3_DEVKIT8500 3779 | ||
1064 | edgetd MACH_EDGETD EDGETD 3780 | ||
1065 | copperyard MACH_COPPERYARD COPPERYARD 3781 | ||
1066 | edge MACH_EDGE EDGE 3782 | ||
1067 | edge_u MACH_EDGE_U EDGE_U 3783 | ||
1068 | edge_td MACH_EDGE_TD EDGE_TD 3784 | ||
1069 | wdss MACH_WDSS WDSS 3785 | ||
1070 | dl_pb25 MACH_DL_PB25 DL_PB25 3786 | ||
1071 | dss11 MACH_DSS11 DSS11 3787 | ||
1072 | cpa MACH_CPA CPA 3788 | ||
1073 | aptp2000 MACH_APTP2000 APTP2000 3789 | ||
1074 | marzen MACH_MARZEN MARZEN 3790 | ||
1075 | st_turbine MACH_ST_TURBINE ST_TURBINE 3791 | ||
1076 | gtl_it3300 MACH_GTL_IT3300 GTL_IT3300 3792 | ||
1077 | mx6_mule MACH_MX6_MULE MX6_MULE 3793 | ||
1078 | v7pxa_dt MACH_V7PXA_DT V7PXA_DT 3794 | ||
1079 | v7mmp_dt MACH_V7MMP_DT V7MMP_DT 3795 | ||
1080 | dragon7 MACH_DRAGON7 DRAGON7 3796 | ||
1081 | krome MACH_KROME KROME 3797 | ||
1082 | oratisdante MACH_ORATISDANTE ORATISDANTE 3798 | ||
1083 | fathom MACH_FATHOM FATHOM 3799 | ||
1084 | dns325 MACH_DNS325 DNS325 3800 | ||
1085 | sarnen MACH_SARNEN SARNEN 3801 | ||
1086 | ubisys_g1 MACH_UBISYS_G1 UBISYS_G1 3802 | ||
1087 | mx53_pf1 MACH_MX53_PF1 MX53_PF1 3803 | ||
1088 | asanti MACH_ASANTI ASANTI 3804 | ||
1089 | volta MACH_VOLTA VOLTA 3805 | ||
1090 | knight MACH_KNIGHT KNIGHT 3807 | ||
1091 | beaglebone MACH_BEAGLEBONE BEAGLEBONE 3808 | ||
1092 | becker MACH_BECKER BECKER 3809 | ||
1093 | fc360 MACH_FC360 FC360 3810 | ||
1094 | pmi2_xls MACH_PMI2_XLS PMI2_XLS 3811 | ||
1095 | taranto MACH_TARANTO TARANTO 3812 | ||
1096 | plutux MACH_PLUTUX PLUTUX 3813 | ||
1097 | ipmp_medcom MACH_IPMP_MEDCOM IPMP_MEDCOM 3814 | ||
1098 | absolut MACH_ABSOLUT ABSOLUT 3815 | ||
1099 | awpb3 MACH_AWPB3 AWPB3 3816 | ||
1100 | nfp32xx_dt MACH_NFP32XX_DT NFP32XX_DT 3817 | ||
1101 | dl_pb53 MACH_DL_PB53 DL_PB53 3818 | ||
1102 | acu_ii MACH_ACU_II ACU_II 3819 | ||
1103 | avalon MACH_AVALON AVALON 3820 | ||
1104 | sphinx MACH_SPHINX SPHINX 3821 | ||
1105 | titan_t MACH_TITAN_T TITAN_T 3822 | ||
1106 | harvest_boris MACH_HARVEST_BORIS HARVEST_BORIS 3823 | ||
1107 | mach_msm7x30_m3s MACH_MACH_MSM7X30_M3S MACH_MSM7X30_M3S 3824 | ||
1108 | smdk5250 MACH_SMDK5250 SMDK5250 3825 | ||
1109 | imxt_lite MACH_IMXT_LITE IMXT_LITE 3826 | ||
1110 | imxt_std MACH_IMXT_STD IMXT_STD 3827 | ||
1111 | imxt_log MACH_IMXT_LOG IMXT_LOG 3828 | ||
1112 | imxt_nav MACH_IMXT_NAV IMXT_NAV 3829 | ||
1113 | imxt_full MACH_IMXT_FULL IMXT_FULL 3830 | ||
1114 | ag09015 MACH_AG09015 AG09015 3831 | ||
1115 | am3517_mt_ventoux MACH_AM3517_MT_VENTOUX AM3517_MT_VENTOUX 3832 | ||
1116 | dp1arm9 MACH_DP1ARM9 DP1ARM9 3833 | ||
1117 | picasso_m MACH_PICASSO_M PICASSO_M 3834 | ||
1118 | video_gadget MACH_VIDEO_GADGET VIDEO_GADGET 3835 | ||
1119 | mtt_om3x MACH_MTT_OM3X MTT_OM3X 3836 | ||
1120 | mx6q_arm2 MACH_MX6Q_ARM2 MX6Q_ARM2 3837 | ||
1121 | picosam9g45 MACH_PICOSAM9G45 PICOSAM9G45 3838 | ||
1122 | vpm_dm365 MACH_VPM_DM365 VPM_DM365 3839 | ||
1123 | bonfire MACH_BONFIRE BONFIRE 3840 | ||
1124 | mt2p2d MACH_MT2P2D MT2P2D 3841 | ||
1125 | sigpda01 MACH_SIGPDA01 SIGPDA01 3842 | ||
1126 | cn27 MACH_CN27 CN27 3843 | ||
1127 | mx25_cwtap MACH_MX25_CWTAP MX25_CWTAP 3844 | ||
1128 | apf28 MACH_APF28 APF28 3845 | ||
1129 | pelco_maxwell MACH_PELCO_MAXWELL PELCO_MAXWELL 3846 | ||
1130 | ge_phoenix MACH_GE_PHOENIX GE_PHOENIX 3847 | ||
1131 | empc_a500 MACH_EMPC_A500 EMPC_A500 3848 | ||
1132 | ims_arm9 MACH_IMS_ARM9 IMS_ARM9 3849 | ||
1133 | mini2416 MACH_MINI2416 MINI2416 3850 | ||
1134 | mini2450 MACH_MINI2450 MINI2450 3851 | ||
1135 | mini310 MACH_MINI310 MINI310 3852 | ||
1136 | spear_hurricane MACH_SPEAR_HURRICANE SPEAR_HURRICANE 3853 | ||
1137 | mt7208 MACH_MT7208 MT7208 3854 | ||
1138 | lpc178x MACH_LPC178X LPC178X 3855 | ||
1139 | farleys MACH_FARLEYS FARLEYS 3856 | ||
1140 | efm32gg_dk3750 MACH_EFM32GG_DK3750 EFM32GG_DK3750 3857 | ||
1141 | zeus_board MACH_ZEUS_BOARD ZEUS_BOARD 3858 | ||
1142 | cc51 MACH_CC51 CC51 3859 | ||
1143 | fxi_c210 MACH_FXI_C210 FXI_C210 3860 | ||
1144 | msm8627_cdp MACH_MSM8627_CDP MSM8627_CDP 3861 | ||
1145 | msm8627_mtp MACH_MSM8627_MTP MSM8627_MTP 3862 | ||
1146 | armadillo800eva MACH_ARMADILLO800EVA ARMADILLO800EVA 3863 | ||
1147 | primou MACH_PRIMOU PRIMOU 3864 | ||
1148 | primoc MACH_PRIMOC PRIMOC 3865 | ||
1149 | primoct MACH_PRIMOCT PRIMOCT 3866 | ||
1150 | a9500 MACH_A9500 A9500 3867 | ||
1151 | pluto MACH_PLUTO PLUTO 3869 | ||
1152 | acfx100 MACH_ACFX100 ACFX100 3870 | ||
1153 | msm8625_rumi3 MACH_MSM8625_RUMI3 MSM8625_RUMI3 3871 | ||
1154 | valente MACH_VALENTE VALENTE 3872 | ||
1155 | crfs_rfeye MACH_CRFS_RFEYE CRFS_RFEYE 3873 | ||
1156 | rfeye MACH_RFEYE RFEYE 3874 | ||
1157 | phidget_sbc3 MACH_PHIDGET_SBC3 PHIDGET_SBC3 3875 | ||
1158 | tcw_mika MACH_TCW_MIKA TCW_MIKA 3876 | ||
1159 | imx28_egf MACH_IMX28_EGF IMX28_EGF 3877 | ||
1160 | valente_wx MACH_VALENTE_WX VALENTE_WX 3878 | ||
1161 | huangshans MACH_HUANGSHANS HUANGSHANS 3879 | ||
1162 | bosphorus1 MACH_BOSPHORUS1 BOSPHORUS1 3880 | ||
1163 | prima MACH_PRIMA PRIMA 3881 | ||
1164 | evita_ulk MACH_EVITA_ULK EVITA_ULK 3884 | ||
1165 | merisc600 MACH_MERISC600 MERISC600 3885 | ||
1166 | dolak MACH_DOLAK DOLAK 3886 | ||
1167 | sbc53 MACH_SBC53 SBC53 3887 | ||
1168 | elite_ulk MACH_ELITE_ULK ELITE_ULK 3888 | ||
1169 | pov2 MACH_POV2 POV2 3889 | ||
1170 | ipod_touch_2g MACH_IPOD_TOUCH_2G IPOD_TOUCH_2G 3890 | ||
1171 | da850_pqab MACH_DA850_PQAB DA850_PQAB 3891 | ||
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c index 1f17bde52cd4..7c756fb189f7 100644 --- a/arch/avr32/boards/atngw100/setup.c +++ b/arch/avr32/boards/atngw100/setup.c | |||
@@ -109,7 +109,7 @@ struct eth_addr { | |||
109 | u8 addr[6]; | 109 | u8 addr[6]; |
110 | }; | 110 | }; |
111 | static struct eth_addr __initdata hw_addr[2]; | 111 | static struct eth_addr __initdata hw_addr[2]; |
112 | static struct eth_platform_data __initdata eth_data[2]; | 112 | static struct macb_platform_data __initdata eth_data[2]; |
113 | 113 | ||
114 | static struct spi_board_info spi0_board_info[] __initdata = { | 114 | static struct spi_board_info spi0_board_info[] __initdata = { |
115 | { | 115 | { |
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c index 4643ff5107c9..c56ddac85d61 100644 --- a/arch/avr32/boards/atstk1000/atstk1002.c +++ b/arch/avr32/boards/atstk1000/atstk1002.c | |||
@@ -105,7 +105,7 @@ struct eth_addr { | |||
105 | }; | 105 | }; |
106 | 106 | ||
107 | static struct eth_addr __initdata hw_addr[2]; | 107 | static struct eth_addr __initdata hw_addr[2]; |
108 | static struct eth_platform_data __initdata eth_data[2] = { | 108 | static struct macb_platform_data __initdata eth_data[2] = { |
109 | { | 109 | { |
110 | /* | 110 | /* |
111 | * The MDIO pullups on STK1000 are a bit too weak for | 111 | * The MDIO pullups on STK1000 are a bit too weak for |
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c index 86fab77a5a00..27bd6fbe21cb 100644 --- a/arch/avr32/boards/favr-32/setup.c +++ b/arch/avr32/boards/favr-32/setup.c | |||
@@ -50,7 +50,7 @@ struct eth_addr { | |||
50 | u8 addr[6]; | 50 | u8 addr[6]; |
51 | }; | 51 | }; |
52 | static struct eth_addr __initdata hw_addr[1]; | 52 | static struct eth_addr __initdata hw_addr[1]; |
53 | static struct eth_platform_data __initdata eth_data[1] = { | 53 | static struct macb_platform_data __initdata eth_data[1] = { |
54 | { | 54 | { |
55 | .phy_mask = ~(1U << 1), | 55 | .phy_mask = ~(1U << 1), |
56 | }, | 56 | }, |
diff --git a/arch/avr32/boards/hammerhead/setup.c b/arch/avr32/boards/hammerhead/setup.c index da14fbdd4e8e..9d1efd1cd425 100644 --- a/arch/avr32/boards/hammerhead/setup.c +++ b/arch/avr32/boards/hammerhead/setup.c | |||
@@ -102,7 +102,7 @@ struct eth_addr { | |||
102 | }; | 102 | }; |
103 | 103 | ||
104 | static struct eth_addr __initdata hw_addr[1]; | 104 | static struct eth_addr __initdata hw_addr[1]; |
105 | static struct eth_platform_data __initdata eth_data[1]; | 105 | static struct macb_platform_data __initdata eth_data[1]; |
106 | 106 | ||
107 | /* | 107 | /* |
108 | * The next two functions should go away as the boot loader is | 108 | * The next two functions should go away as the boot loader is |
diff --git a/arch/avr32/boards/merisc/setup.c b/arch/avr32/boards/merisc/setup.c index e61bc948f959..ed137e335796 100644 --- a/arch/avr32/boards/merisc/setup.c +++ b/arch/avr32/boards/merisc/setup.c | |||
@@ -52,7 +52,7 @@ struct eth_addr { | |||
52 | }; | 52 | }; |
53 | 53 | ||
54 | static struct eth_addr __initdata hw_addr[2]; | 54 | static struct eth_addr __initdata hw_addr[2]; |
55 | static struct eth_platform_data __initdata eth_data[2]; | 55 | static struct macb_platform_data __initdata eth_data[2]; |
56 | 56 | ||
57 | static int ads7846_get_pendown_state_PB26(void) | 57 | static int ads7846_get_pendown_state_PB26(void) |
58 | { | 58 | { |
diff --git a/arch/avr32/boards/mimc200/setup.c b/arch/avr32/boards/mimc200/setup.c index c4da5cba2dbf..05358aa5ef7d 100644 --- a/arch/avr32/boards/mimc200/setup.c +++ b/arch/avr32/boards/mimc200/setup.c | |||
@@ -86,7 +86,7 @@ struct eth_addr { | |||
86 | u8 addr[6]; | 86 | u8 addr[6]; |
87 | }; | 87 | }; |
88 | static struct eth_addr __initdata hw_addr[2]; | 88 | static struct eth_addr __initdata hw_addr[2]; |
89 | static struct eth_platform_data __initdata eth_data[2]; | 89 | static struct macb_platform_data __initdata eth_data[2]; |
90 | 90 | ||
91 | static struct spi_eeprom eeprom_25lc010 = { | 91 | static struct spi_eeprom eeprom_25lc010 = { |
92 | .name = "25lc010", | 92 | .name = "25lc010", |
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index 7fbf0dcb9afe..402a7bb72669 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c | |||
@@ -1067,7 +1067,7 @@ void __init at32_setup_serial_console(unsigned int usart_id) | |||
1067 | * -------------------------------------------------------------------- */ | 1067 | * -------------------------------------------------------------------- */ |
1068 | 1068 | ||
1069 | #ifdef CONFIG_CPU_AT32AP7000 | 1069 | #ifdef CONFIG_CPU_AT32AP7000 |
1070 | static struct eth_platform_data macb0_data; | 1070 | static struct macb_platform_data macb0_data; |
1071 | static struct resource macb0_resource[] = { | 1071 | static struct resource macb0_resource[] = { |
1072 | PBMEM(0xfff01800), | 1072 | PBMEM(0xfff01800), |
1073 | IRQ(25), | 1073 | IRQ(25), |
@@ -1076,7 +1076,7 @@ DEFINE_DEV_DATA(macb, 0); | |||
1076 | DEV_CLK(hclk, macb0, hsb, 8); | 1076 | DEV_CLK(hclk, macb0, hsb, 8); |
1077 | DEV_CLK(pclk, macb0, pbb, 6); | 1077 | DEV_CLK(pclk, macb0, pbb, 6); |
1078 | 1078 | ||
1079 | static struct eth_platform_data macb1_data; | 1079 | static struct macb_platform_data macb1_data; |
1080 | static struct resource macb1_resource[] = { | 1080 | static struct resource macb1_resource[] = { |
1081 | PBMEM(0xfff01c00), | 1081 | PBMEM(0xfff01c00), |
1082 | IRQ(26), | 1082 | IRQ(26), |
@@ -1086,7 +1086,7 @@ DEV_CLK(hclk, macb1, hsb, 9); | |||
1086 | DEV_CLK(pclk, macb1, pbb, 7); | 1086 | DEV_CLK(pclk, macb1, pbb, 7); |
1087 | 1087 | ||
1088 | struct platform_device *__init | 1088 | struct platform_device *__init |
1089 | at32_add_device_eth(unsigned int id, struct eth_platform_data *data) | 1089 | at32_add_device_eth(unsigned int id, struct macb_platform_data *data) |
1090 | { | 1090 | { |
1091 | struct platform_device *pdev; | 1091 | struct platform_device *pdev; |
1092 | u32 pin_mask; | 1092 | u32 pin_mask; |
@@ -1163,7 +1163,7 @@ at32_add_device_eth(unsigned int id, struct eth_platform_data *data) | |||
1163 | return NULL; | 1163 | return NULL; |
1164 | } | 1164 | } |
1165 | 1165 | ||
1166 | memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); | 1166 | memcpy(pdev->dev.platform_data, data, sizeof(struct macb_platform_data)); |
1167 | platform_device_register(pdev); | 1167 | platform_device_register(pdev); |
1168 | 1168 | ||
1169 | return pdev; | 1169 | return pdev; |
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h index 5d7ffca7d69f..67b111ce332d 100644 --- a/arch/avr32/mach-at32ap/include/mach/board.h +++ b/arch/avr32/mach-at32ap/include/mach/board.h | |||
@@ -6,6 +6,7 @@ | |||
6 | 6 | ||
7 | #include <linux/types.h> | 7 | #include <linux/types.h> |
8 | #include <linux/serial.h> | 8 | #include <linux/serial.h> |
9 | #include <linux/platform_data/macb.h> | ||
9 | 10 | ||
10 | #define GPIO_PIN_NONE (-1) | 11 | #define GPIO_PIN_NONE (-1) |
11 | 12 | ||
@@ -42,12 +43,8 @@ struct atmel_uart_data { | |||
42 | void at32_map_usart(unsigned int hw_id, unsigned int line, int flags); | 43 | void at32_map_usart(unsigned int hw_id, unsigned int line, int flags); |
43 | struct platform_device *at32_add_device_usart(unsigned int id); | 44 | struct platform_device *at32_add_device_usart(unsigned int id); |
44 | 45 | ||
45 | struct eth_platform_data { | ||
46 | u32 phy_mask; | ||
47 | u8 is_rmii; | ||
48 | }; | ||
49 | struct platform_device * | 46 | struct platform_device * |
50 | at32_add_device_eth(unsigned int id, struct eth_platform_data *data); | 47 | at32_add_device_eth(unsigned int id, struct macb_platform_data *data); |
51 | 48 | ||
52 | struct spi_board_info; | 49 | struct spi_board_info; |
53 | struct platform_device * | 50 | struct platform_device * |
diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h index 6073b187528a..5a274af31b2b 100644 --- a/arch/ia64/include/asm/cputime.h +++ b/arch/ia64/include/asm/cputime.h | |||
@@ -60,6 +60,7 @@ typedef u64 cputime64_t; | |||
60 | */ | 60 | */ |
61 | #define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC) | 61 | #define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC) |
62 | #define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC) | 62 | #define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC) |
63 | #define usecs_to_cputime64(__usecs) usecs_to_cputime(__usecs) | ||
63 | 64 | ||
64 | /* | 65 | /* |
65 | * Convert cputime <-> seconds | 66 | * Convert cputime <-> seconds |
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h index 1cf20bdfbeca..98b7c4b49c9d 100644 --- a/arch/powerpc/include/asm/cputime.h +++ b/arch/powerpc/include/asm/cputime.h | |||
@@ -150,6 +150,8 @@ static inline cputime_t usecs_to_cputime(const unsigned long us) | |||
150 | return ct; | 150 | return ct; |
151 | } | 151 | } |
152 | 152 | ||
153 | #define usecs_to_cputime64(us) usecs_to_cputime(us) | ||
154 | |||
153 | /* | 155 | /* |
154 | * Convert cputime <-> seconds | 156 | * Convert cputime <-> seconds |
155 | */ | 157 | */ |
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h index d4df013ad779..69c7377d2071 100644 --- a/arch/powerpc/include/asm/kvm_book3s.h +++ b/arch/powerpc/include/asm/kvm_book3s.h | |||
@@ -381,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) | |||
381 | } | 381 | } |
382 | #endif | 382 | #endif |
383 | 383 | ||
384 | static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r, | ||
385 | unsigned long pte_index) | ||
386 | { | ||
387 | unsigned long rb, va_low; | ||
388 | |||
389 | rb = (v & ~0x7fUL) << 16; /* AVA field */ | ||
390 | va_low = pte_index >> 3; | ||
391 | if (v & HPTE_V_SECONDARY) | ||
392 | va_low = ~va_low; | ||
393 | /* xor vsid from AVA */ | ||
394 | if (!(v & HPTE_V_1TB_SEG)) | ||
395 | va_low ^= v >> 12; | ||
396 | else | ||
397 | va_low ^= v >> 24; | ||
398 | va_low &= 0x7ff; | ||
399 | if (v & HPTE_V_LARGE) { | ||
400 | rb |= 1; /* L field */ | ||
401 | if (cpu_has_feature(CPU_FTR_ARCH_206) && | ||
402 | (r & 0xff000)) { | ||
403 | /* non-16MB large page, must be 64k */ | ||
404 | /* (masks depend on page size) */ | ||
405 | rb |= 0x1000; /* page encoding in LP field */ | ||
406 | rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */ | ||
407 | rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */ | ||
408 | } | ||
409 | } else { | ||
410 | /* 4kB page */ | ||
411 | rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */ | ||
412 | } | ||
413 | rb |= (v >> 54) & 0x300; /* B field */ | ||
414 | return rb; | ||
415 | } | ||
416 | |||
417 | /* Magic register values loaded into r3 and r4 before the 'sc' assembly | 384 | /* Magic register values loaded into r3 and r4 before the 'sc' assembly |
418 | * instruction for the OSI hypercalls */ | 385 | * instruction for the OSI hypercalls */ |
419 | #define OSI_SC_MAGIC_R3 0x113724FA | 386 | #define OSI_SC_MAGIC_R3 0x113724FA |
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h index e43fe42b9875..d0ac94f98f9e 100644 --- a/arch/powerpc/include/asm/kvm_book3s_64.h +++ b/arch/powerpc/include/asm/kvm_book3s_64.h | |||
@@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu) | |||
29 | 29 | ||
30 | #define SPAPR_TCE_SHIFT 12 | 30 | #define SPAPR_TCE_SHIFT 12 |
31 | 31 | ||
32 | static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r, | ||
33 | unsigned long pte_index) | ||
34 | { | ||
35 | unsigned long rb, va_low; | ||
36 | |||
37 | rb = (v & ~0x7fUL) << 16; /* AVA field */ | ||
38 | va_low = pte_index >> 3; | ||
39 | if (v & HPTE_V_SECONDARY) | ||
40 | va_low = ~va_low; | ||
41 | /* xor vsid from AVA */ | ||
42 | if (!(v & HPTE_V_1TB_SEG)) | ||
43 | va_low ^= v >> 12; | ||
44 | else | ||
45 | va_low ^= v >> 24; | ||
46 | va_low &= 0x7ff; | ||
47 | if (v & HPTE_V_LARGE) { | ||
48 | rb |= 1; /* L field */ | ||
49 | if (cpu_has_feature(CPU_FTR_ARCH_206) && | ||
50 | (r & 0xff000)) { | ||
51 | /* non-16MB large page, must be 64k */ | ||
52 | /* (masks depend on page size) */ | ||
53 | rb |= 0x1000; /* page encoding in LP field */ | ||
54 | rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */ | ||
55 | rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */ | ||
56 | } | ||
57 | } else { | ||
58 | /* 4kB page */ | ||
59 | rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */ | ||
60 | } | ||
61 | rb |= (v >> 54) & 0x300; /* B field */ | ||
62 | return rb; | ||
63 | } | ||
64 | |||
32 | #endif /* __ASM_KVM_BOOK3S_64_H__ */ | 65 | #endif /* __ASM_KVM_BOOK3S_64_H__ */ |
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index 0cb137a9b038..336983da9e72 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c | |||
@@ -538,7 +538,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu) | |||
538 | tpaca->kvm_hstate.napping = 0; | 538 | tpaca->kvm_hstate.napping = 0; |
539 | vcpu->cpu = vc->pcpu; | 539 | vcpu->cpu = vc->pcpu; |
540 | smp_wmb(); | 540 | smp_wmb(); |
541 | #ifdef CONFIG_PPC_ICP_NATIVE | 541 | #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) |
542 | if (vcpu->arch.ptid) { | 542 | if (vcpu->arch.ptid) { |
543 | tpaca->cpu_start = 0x80; | 543 | tpaca->cpu_start = 0x80; |
544 | wmb(); | 544 | wmb(); |
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c index 3c791e1eb675..e2cfb9e1e20e 100644 --- a/arch/powerpc/kvm/book3s_pr.c +++ b/arch/powerpc/kvm/book3s_pr.c | |||
@@ -658,10 +658,12 @@ program_interrupt: | |||
658 | ulong cmd = kvmppc_get_gpr(vcpu, 3); | 658 | ulong cmd = kvmppc_get_gpr(vcpu, 3); |
659 | int i; | 659 | int i; |
660 | 660 | ||
661 | #ifdef CONFIG_KVM_BOOK3S_64_PR | ||
661 | if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { | 662 | if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { |
662 | r = RESUME_GUEST; | 663 | r = RESUME_GUEST; |
663 | break; | 664 | break; |
664 | } | 665 | } |
666 | #endif | ||
665 | 667 | ||
666 | run->papr_hcall.nr = cmd; | 668 | run->papr_hcall.nr = cmd; |
667 | for (i = 0; i < 9; ++i) { | 669 | for (i = 0; i < 9; ++i) { |
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c index 26d20903f2bc..8c0d45a6faf7 100644 --- a/arch/powerpc/kvm/e500.c +++ b/arch/powerpc/kvm/e500.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/kvm_host.h> | 15 | #include <linux/kvm_host.h> |
16 | #include <linux/slab.h> | 16 | #include <linux/slab.h> |
17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
18 | #include <linux/export.h> | ||
18 | 19 | ||
19 | #include <asm/reg.h> | 20 | #include <asm/reg.h> |
20 | #include <asm/cputable.h> | 21 | #include <asm/cputable.h> |
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h index 081434878296..b9acaaa175d8 100644 --- a/arch/s390/include/asm/cputime.h +++ b/arch/s390/include/asm/cputime.h | |||
@@ -87,6 +87,8 @@ usecs_to_cputime(const unsigned int m) | |||
87 | return (cputime_t) m * 4096; | 87 | return (cputime_t) m * 4096; |
88 | } | 88 | } |
89 | 89 | ||
90 | #define usecs_to_cputime64(m) usecs_to_cputime(m) | ||
91 | |||
90 | /* | 92 | /* |
91 | * Convert cputime to milliseconds and back. | 93 | * Convert cputime to milliseconds and back. |
92 | */ | 94 | */ |
diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c index 6efc18b5e60a..bd58b72454cf 100644 --- a/arch/s390/oprofile/init.c +++ b/arch/s390/oprofile/init.c | |||
@@ -88,7 +88,7 @@ static ssize_t hwsampler_write(struct file *file, char const __user *buf, | |||
88 | return -EINVAL; | 88 | return -EINVAL; |
89 | 89 | ||
90 | retval = oprofilefs_ulong_from_user(&val, buf, count); | 90 | retval = oprofilefs_ulong_from_user(&val, buf, count); |
91 | if (retval) | 91 | if (retval <= 0) |
92 | return retval; | 92 | return retval; |
93 | 93 | ||
94 | if (oprofile_started) | 94 | if (oprofile_started) |
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c index ec8c84c14b17..895e337c79b6 100644 --- a/arch/sh/boards/board-sh7757lcr.c +++ b/arch/sh/boards/board-sh7757lcr.c | |||
@@ -50,9 +50,9 @@ static struct platform_device heartbeat_device = { | |||
50 | #define GBECONT 0xffc10100 | 50 | #define GBECONT 0xffc10100 |
51 | #define GBECONT_RMII1 BIT(17) | 51 | #define GBECONT_RMII1 BIT(17) |
52 | #define GBECONT_RMII0 BIT(16) | 52 | #define GBECONT_RMII0 BIT(16) |
53 | static void sh7757_eth_set_mdio_gate(unsigned long addr) | 53 | static void sh7757_eth_set_mdio_gate(void *addr) |
54 | { | 54 | { |
55 | if ((addr & 0x00000fff) < 0x0800) | 55 | if (((unsigned long)addr & 0x00000fff) < 0x0800) |
56 | writel(readl(GBECONT) | GBECONT_RMII0, GBECONT); | 56 | writel(readl(GBECONT) | GBECONT_RMII0, GBECONT); |
57 | else | 57 | else |
58 | writel(readl(GBECONT) | GBECONT_RMII1, GBECONT); | 58 | writel(readl(GBECONT) | GBECONT_RMII1, GBECONT); |
@@ -116,9 +116,9 @@ static struct platform_device sh7757_eth1_device = { | |||
116 | }, | 116 | }, |
117 | }; | 117 | }; |
118 | 118 | ||
119 | static void sh7757_eth_giga_set_mdio_gate(unsigned long addr) | 119 | static void sh7757_eth_giga_set_mdio_gate(void *addr) |
120 | { | 120 | { |
121 | if ((addr & 0x00000fff) < 0x0800) { | 121 | if (((unsigned long)addr & 0x00000fff) < 0x0800) { |
122 | gpio_set_value(GPIO_PTT4, 1); | 122 | gpio_set_value(GPIO_PTT4, 1); |
123 | writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT); | 123 | writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT); |
124 | } else { | 124 | } else { |
@@ -210,8 +210,12 @@ static struct resource sh_mmcif_resources[] = { | |||
210 | }; | 210 | }; |
211 | 211 | ||
212 | static struct sh_mmcif_dma sh7757lcr_mmcif_dma = { | 212 | static struct sh_mmcif_dma sh7757lcr_mmcif_dma = { |
213 | .chan_priv_tx = SHDMA_SLAVE_MMCIF_TX, | 213 | .chan_priv_tx = { |
214 | .chan_priv_rx = SHDMA_SLAVE_MMCIF_RX, | 214 | .slave_id = SHDMA_SLAVE_MMCIF_TX, |
215 | }, | ||
216 | .chan_priv_rx = { | ||
217 | .slave_id = SHDMA_SLAVE_MMCIF_RX, | ||
218 | } | ||
215 | }; | 219 | }; |
216 | 220 | ||
217 | static struct sh_mmcif_plat_data sh_mmcif_plat = { | 221 | static struct sh_mmcif_plat_data sh_mmcif_plat = { |
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c index b4c2d2b946dd..e4dd5d5a1115 100644 --- a/arch/sh/oprofile/common.c +++ b/arch/sh/oprofile/common.c | |||
@@ -49,7 +49,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
49 | return oprofile_perf_init(ops); | 49 | return oprofile_perf_init(ops); |
50 | } | 50 | } |
51 | 51 | ||
52 | void __exit oprofile_arch_exit(void) | 52 | void oprofile_arch_exit(void) |
53 | { | 53 | { |
54 | oprofile_perf_exit(); | 54 | oprofile_perf_exit(); |
55 | kfree(sh_pmu_op_name); | 55 | kfree(sh_pmu_op_name); |
@@ -60,5 +60,5 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
60 | ops->backtrace = sh_backtrace; | 60 | ops->backtrace = sh_backtrace; |
61 | return -ENODEV; | 61 | return -ENODEV; |
62 | } | 62 | } |
63 | void __exit oprofile_arch_exit(void) {} | 63 | void oprofile_arch_exit(void) {} |
64 | #endif /* CONFIG_HW_PERF_EVENTS */ | 64 | #endif /* CONFIG_HW_PERF_EVENTS */ |
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c index b272cda35a01..af5755d20fbe 100644 --- a/arch/sparc/kernel/pci_sun4v.c +++ b/arch/sparc/kernel/pci_sun4v.c | |||
@@ -849,10 +849,10 @@ static int pci_sun4v_msiq_build_irq(struct pci_pbm_info *pbm, | |||
849 | if (!irq) | 849 | if (!irq) |
850 | return -ENOMEM; | 850 | return -ENOMEM; |
851 | 851 | ||
852 | if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE)) | ||
853 | return -EINVAL; | ||
854 | if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID)) | 852 | if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID)) |
855 | return -EINVAL; | 853 | return -EINVAL; |
854 | if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE)) | ||
855 | return -EINVAL; | ||
856 | 856 | ||
857 | return irq; | 857 | return irq; |
858 | } | 858 | } |
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 8d601b18bf9f..121f1be4da19 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c | |||
@@ -1169,7 +1169,7 @@ again: | |||
1169 | */ | 1169 | */ |
1170 | c = &unconstrained; | 1170 | c = &unconstrained; |
1171 | } else if (intel_try_alt_er(event, orig_idx)) { | 1171 | } else if (intel_try_alt_er(event, orig_idx)) { |
1172 | raw_spin_unlock(&era->lock); | 1172 | raw_spin_unlock_irqrestore(&era->lock, flags); |
1173 | goto again; | 1173 | goto again; |
1174 | } | 1174 | } |
1175 | raw_spin_unlock_irqrestore(&era->lock, flags); | 1175 | raw_spin_unlock_irqrestore(&era->lock, flags); |
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c index 3b97a80ce329..c99f9ed013d5 100644 --- a/arch/x86/kernel/dumpstack_32.c +++ b/arch/x86/kernel/dumpstack_32.c | |||
@@ -116,16 +116,16 @@ void show_registers(struct pt_regs *regs) | |||
116 | for (i = 0; i < code_len; i++, ip++) { | 116 | for (i = 0; i < code_len; i++, ip++) { |
117 | if (ip < (u8 *)PAGE_OFFSET || | 117 | if (ip < (u8 *)PAGE_OFFSET || |
118 | probe_kernel_address(ip, c)) { | 118 | probe_kernel_address(ip, c)) { |
119 | printk(" Bad EIP value."); | 119 | printk(KERN_CONT " Bad EIP value."); |
120 | break; | 120 | break; |
121 | } | 121 | } |
122 | if (ip == (u8 *)regs->ip) | 122 | if (ip == (u8 *)regs->ip) |
123 | printk("<%02x> ", c); | 123 | printk(KERN_CONT "<%02x> ", c); |
124 | else | 124 | else |
125 | printk("%02x ", c); | 125 | printk(KERN_CONT "%02x ", c); |
126 | } | 126 | } |
127 | } | 127 | } |
128 | printk("\n"); | 128 | printk(KERN_CONT "\n"); |
129 | } | 129 | } |
130 | 130 | ||
131 | int is_valid_bugaddr(unsigned long ip) | 131 | int is_valid_bugaddr(unsigned long ip) |
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c index 19853ad8afc5..6d728d9284bd 100644 --- a/arch/x86/kernel/dumpstack_64.c +++ b/arch/x86/kernel/dumpstack_64.c | |||
@@ -284,16 +284,16 @@ void show_registers(struct pt_regs *regs) | |||
284 | for (i = 0; i < code_len; i++, ip++) { | 284 | for (i = 0; i < code_len; i++, ip++) { |
285 | if (ip < (u8 *)PAGE_OFFSET || | 285 | if (ip < (u8 *)PAGE_OFFSET || |
286 | probe_kernel_address(ip, c)) { | 286 | probe_kernel_address(ip, c)) { |
287 | printk(" Bad RIP value."); | 287 | printk(KERN_CONT " Bad RIP value."); |
288 | break; | 288 | break; |
289 | } | 289 | } |
290 | if (ip == (u8 *)regs->ip) | 290 | if (ip == (u8 *)regs->ip) |
291 | printk("<%02x> ", c); | 291 | printk(KERN_CONT "<%02x> ", c); |
292 | else | 292 | else |
293 | printk("%02x ", c); | 293 | printk(KERN_CONT "%02x ", c); |
294 | } | 294 | } |
295 | } | 295 | } |
296 | printk("\n"); | 296 | printk(KERN_CONT "\n"); |
297 | } | 297 | } |
298 | 298 | ||
299 | int is_valid_bugaddr(unsigned long ip) | 299 | int is_valid_bugaddr(unsigned long ip) |
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c index 76e3f1cd0369..405f2620392f 100644 --- a/arch/x86/kvm/i8254.c +++ b/arch/x86/kvm/i8254.c | |||
@@ -338,11 +338,15 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) | |||
338 | return HRTIMER_NORESTART; | 338 | return HRTIMER_NORESTART; |
339 | } | 339 | } |
340 | 340 | ||
341 | static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) | 341 | static void create_pit_timer(struct kvm *kvm, u32 val, int is_period) |
342 | { | 342 | { |
343 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | ||
343 | struct kvm_timer *pt = &ps->pit_timer; | 344 | struct kvm_timer *pt = &ps->pit_timer; |
344 | s64 interval; | 345 | s64 interval; |
345 | 346 | ||
347 | if (!irqchip_in_kernel(kvm)) | ||
348 | return; | ||
349 | |||
346 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); | 350 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); |
347 | 351 | ||
348 | pr_debug("create pit timer, interval is %llu nsec\n", interval); | 352 | pr_debug("create pit timer, interval is %llu nsec\n", interval); |
@@ -394,13 +398,13 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val) | |||
394 | /* FIXME: enhance mode 4 precision */ | 398 | /* FIXME: enhance mode 4 precision */ |
395 | case 4: | 399 | case 4: |
396 | if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) { | 400 | if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) { |
397 | create_pit_timer(ps, val, 0); | 401 | create_pit_timer(kvm, val, 0); |
398 | } | 402 | } |
399 | break; | 403 | break; |
400 | case 2: | 404 | case 2: |
401 | case 3: | 405 | case 3: |
402 | if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){ | 406 | if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){ |
403 | create_pit_timer(ps, val, 1); | 407 | create_pit_timer(kvm, val, 1); |
404 | } | 408 | } |
405 | break; | 409 | break; |
406 | default: | 410 | default: |
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c38efd7b792e..4c938da2ba00 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c | |||
@@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu) | |||
602 | { | 602 | { |
603 | struct kvm_cpuid_entry2 *best; | 603 | struct kvm_cpuid_entry2 *best; |
604 | struct kvm_lapic *apic = vcpu->arch.apic; | 604 | struct kvm_lapic *apic = vcpu->arch.apic; |
605 | u32 timer_mode_mask; | ||
606 | 605 | ||
607 | best = kvm_find_cpuid_entry(vcpu, 1, 0); | 606 | best = kvm_find_cpuid_entry(vcpu, 1, 0); |
608 | if (!best) | 607 | if (!best) |
@@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu) | |||
615 | best->ecx |= bit(X86_FEATURE_OSXSAVE); | 614 | best->ecx |= bit(X86_FEATURE_OSXSAVE); |
616 | } | 615 | } |
617 | 616 | ||
618 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && | 617 | if (apic) { |
619 | best->function == 0x1) { | 618 | if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER)) |
620 | best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER); | 619 | apic->lapic_timer.timer_mode_mask = 3 << 17; |
621 | timer_mode_mask = 3 << 17; | 620 | else |
622 | } else | 621 | apic->lapic_timer.timer_mode_mask = 1 << 17; |
623 | timer_mode_mask = 1 << 17; | 622 | } |
624 | |||
625 | if (apic) | ||
626 | apic->lapic_timer.timer_mode_mask = timer_mode_mask; | ||
627 | } | 623 | } |
628 | 624 | ||
629 | int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) | 625 | int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) |
@@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext) | |||
2135 | case KVM_CAP_TSC_CONTROL: | 2131 | case KVM_CAP_TSC_CONTROL: |
2136 | r = kvm_has_tsc_control; | 2132 | r = kvm_has_tsc_control; |
2137 | break; | 2133 | break; |
2134 | case KVM_CAP_TSC_DEADLINE_TIMER: | ||
2135 | r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER); | ||
2136 | break; | ||
2138 | default: | 2137 | default: |
2139 | r = 0; | 2138 | r = 0; |
2140 | break; | 2139 | break; |
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c index bfab3fa10edc..7b65f752c5f8 100644 --- a/arch/x86/net/bpf_jit_comp.c +++ b/arch/x86/net/bpf_jit_comp.c | |||
@@ -568,8 +568,8 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i]; | |||
568 | break; | 568 | break; |
569 | } | 569 | } |
570 | if (filter[i].jt != 0) { | 570 | if (filter[i].jt != 0) { |
571 | if (filter[i].jf) | 571 | if (filter[i].jf && f_offset) |
572 | t_offset += is_near(f_offset) ? 2 : 6; | 572 | t_offset += is_near(f_offset) ? 2 : 5; |
573 | EMIT_COND_JMP(t_op, t_offset); | 573 | EMIT_COND_JMP(t_op, t_offset); |
574 | if (filter[i].jf) | 574 | if (filter[i].jf) |
575 | EMIT_JMP(f_offset); | 575 | EMIT_JMP(f_offset); |
diff --git a/block/blk-map.c b/block/blk-map.c index 164cd0059706..623e1cd4cffe 100644 --- a/block/blk-map.c +++ b/block/blk-map.c | |||
@@ -311,7 +311,7 @@ int blk_rq_map_kern(struct request_queue *q, struct request *rq, void *kbuf, | |||
311 | if (IS_ERR(bio)) | 311 | if (IS_ERR(bio)) |
312 | return PTR_ERR(bio); | 312 | return PTR_ERR(bio); |
313 | 313 | ||
314 | if (rq_data_dir(rq) == WRITE) | 314 | if (!reading) |
315 | bio->bi_rw |= REQ_WRITE; | 315 | bio->bi_rw |= REQ_WRITE; |
316 | 316 | ||
317 | if (do_copy) | 317 | if (do_copy) |
diff --git a/block/blk-tag.c b/block/blk-tag.c index e74d6d13838f..4af6f5cc1167 100644 --- a/block/blk-tag.c +++ b/block/blk-tag.c | |||
@@ -282,18 +282,9 @@ EXPORT_SYMBOL(blk_queue_resize_tags); | |||
282 | void blk_queue_end_tag(struct request_queue *q, struct request *rq) | 282 | void blk_queue_end_tag(struct request_queue *q, struct request *rq) |
283 | { | 283 | { |
284 | struct blk_queue_tag *bqt = q->queue_tags; | 284 | struct blk_queue_tag *bqt = q->queue_tags; |
285 | int tag = rq->tag; | 285 | unsigned tag = rq->tag; /* negative tags invalid */ |
286 | 286 | ||
287 | BUG_ON(tag == -1); | 287 | BUG_ON(tag >= bqt->real_max_depth); |
288 | |||
289 | if (unlikely(tag >= bqt->max_depth)) { | ||
290 | /* | ||
291 | * This can happen after tag depth has been reduced. | ||
292 | * But tag shouldn't be larger than real_max_depth. | ||
293 | */ | ||
294 | WARN_ON(tag >= bqt->real_max_depth); | ||
295 | return; | ||
296 | } | ||
297 | 288 | ||
298 | list_del_init(&rq->queuelist); | 289 | list_del_init(&rq->queuelist); |
299 | rq->cmd_flags &= ~REQ_QUEUED; | 290 | rq->cmd_flags &= ~REQ_QUEUED; |
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index 4c12869fcf77..3548705b04e4 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c | |||
@@ -1655,6 +1655,8 @@ cfq_merged_requests(struct request_queue *q, struct request *rq, | |||
1655 | struct request *next) | 1655 | struct request *next) |
1656 | { | 1656 | { |
1657 | struct cfq_queue *cfqq = RQ_CFQQ(rq); | 1657 | struct cfq_queue *cfqq = RQ_CFQQ(rq); |
1658 | struct cfq_data *cfqd = q->elevator->elevator_data; | ||
1659 | |||
1658 | /* | 1660 | /* |
1659 | * reposition in fifo if next is older than rq | 1661 | * reposition in fifo if next is older than rq |
1660 | */ | 1662 | */ |
@@ -1669,6 +1671,16 @@ cfq_merged_requests(struct request_queue *q, struct request *rq, | |||
1669 | cfq_remove_request(next); | 1671 | cfq_remove_request(next); |
1670 | cfq_blkiocg_update_io_merged_stats(&(RQ_CFQG(rq))->blkg, | 1672 | cfq_blkiocg_update_io_merged_stats(&(RQ_CFQG(rq))->blkg, |
1671 | rq_data_dir(next), rq_is_sync(next)); | 1673 | rq_data_dir(next), rq_is_sync(next)); |
1674 | |||
1675 | cfqq = RQ_CFQQ(next); | ||
1676 | /* | ||
1677 | * all requests of this queue are merged to other queues, delete it | ||
1678 | * from the service tree. If it's the active_queue, | ||
1679 | * cfq_dispatch_requests() will choose to expire it or do idle | ||
1680 | */ | ||
1681 | if (cfq_cfqq_on_rr(cfqq) && RB_EMPTY_ROOT(&cfqq->sort_list) && | ||
1682 | cfqq != cfqd->active_queue) | ||
1683 | cfq_del_cfqq_rr(cfqd, cfqq); | ||
1672 | } | 1684 | } |
1673 | 1685 | ||
1674 | static int cfq_allow_merge(struct request_queue *q, struct request *rq, | 1686 | static int cfq_allow_merge(struct request_queue *q, struct request *rq, |
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 6bdedd7cca2c..cf047c406d92 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig | |||
@@ -820,7 +820,7 @@ config PATA_PLATFORM | |||
820 | 820 | ||
821 | config PATA_OF_PLATFORM | 821 | config PATA_OF_PLATFORM |
822 | tristate "OpenFirmware platform device PATA support" | 822 | tristate "OpenFirmware platform device PATA support" |
823 | depends on PATA_PLATFORM && OF | 823 | depends on PATA_PLATFORM && OF && OF_IRQ |
824 | help | 824 | help |
825 | This option enables support for generic directly connected ATA | 825 | This option enables support for generic directly connected ATA |
826 | devices commonly found on embedded systems with OpenFirmware | 826 | devices commonly found on embedded systems with OpenFirmware |
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c index a76f24a8e5db..5249e6d918a3 100644 --- a/drivers/ata/pata_at91.c +++ b/drivers/ata/pata_at91.c | |||
@@ -360,7 +360,7 @@ static int __devinit pata_at91_probe(struct platform_device *pdev) | |||
360 | ap->flags |= ATA_FLAG_SLAVE_POSS; | 360 | ap->flags |= ATA_FLAG_SLAVE_POSS; |
361 | ap->pio_mask = ATA_PIO4; | 361 | ap->pio_mask = ATA_PIO4; |
362 | 362 | ||
363 | if (!irq) { | 363 | if (!gpio_is_valid(irq)) { |
364 | ap->flags |= ATA_FLAG_PIO_POLLING; | 364 | ap->flags |= ATA_FLAG_PIO_POLLING; |
365 | ata_port_desc(ap, "no IRQ, using PIO polling"); | 365 | ata_port_desc(ap, "no IRQ, using PIO polling"); |
366 | } | 366 | } |
@@ -414,8 +414,8 @@ static int __devinit pata_at91_probe(struct platform_device *pdev) | |||
414 | 414 | ||
415 | host->private_data = info; | 415 | host->private_data = info; |
416 | 416 | ||
417 | ret = ata_host_activate(host, irq ? gpio_to_irq(irq) : 0, | 417 | return ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0, |
418 | irq ? ata_sff_interrupt : NULL, | 418 | gpio_is_valid(irq) ? ata_sff_interrupt : NULL, |
419 | irq_flags, &pata_at91_sht); | 419 | irq_flags, &pata_at91_sht); |
420 | 420 | ||
421 | if (!ret) | 421 | if (!ret) |
diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c index c2917ffad2c2..34767a6d7f42 100644 --- a/drivers/char/ipmi/ipmi_watchdog.c +++ b/drivers/char/ipmi/ipmi_watchdog.c | |||
@@ -139,6 +139,8 @@ | |||
139 | #define IPMI_WDOG_SET_TIMER 0x24 | 139 | #define IPMI_WDOG_SET_TIMER 0x24 |
140 | #define IPMI_WDOG_GET_TIMER 0x25 | 140 | #define IPMI_WDOG_GET_TIMER 0x25 |
141 | 141 | ||
142 | #define IPMI_WDOG_TIMER_NOT_INIT_RESP 0x80 | ||
143 | |||
142 | /* These are here until the real ones get into the watchdog.h interface. */ | 144 | /* These are here until the real ones get into the watchdog.h interface. */ |
143 | #ifndef WDIOC_GETTIMEOUT | 145 | #ifndef WDIOC_GETTIMEOUT |
144 | #define WDIOC_GETTIMEOUT _IOW(WATCHDOG_IOCTL_BASE, 20, int) | 146 | #define WDIOC_GETTIMEOUT _IOW(WATCHDOG_IOCTL_BASE, 20, int) |
@@ -596,6 +598,7 @@ static int ipmi_heartbeat(void) | |||
596 | struct kernel_ipmi_msg msg; | 598 | struct kernel_ipmi_msg msg; |
597 | int rv; | 599 | int rv; |
598 | struct ipmi_system_interface_addr addr; | 600 | struct ipmi_system_interface_addr addr; |
601 | int timeout_retries = 0; | ||
599 | 602 | ||
600 | if (ipmi_ignore_heartbeat) | 603 | if (ipmi_ignore_heartbeat) |
601 | return 0; | 604 | return 0; |
@@ -616,6 +619,7 @@ static int ipmi_heartbeat(void) | |||
616 | 619 | ||
617 | mutex_lock(&heartbeat_lock); | 620 | mutex_lock(&heartbeat_lock); |
618 | 621 | ||
622 | restart: | ||
619 | atomic_set(&heartbeat_tofree, 2); | 623 | atomic_set(&heartbeat_tofree, 2); |
620 | 624 | ||
621 | /* | 625 | /* |
@@ -653,7 +657,33 @@ static int ipmi_heartbeat(void) | |||
653 | /* Wait for the heartbeat to be sent. */ | 657 | /* Wait for the heartbeat to be sent. */ |
654 | wait_for_completion(&heartbeat_wait); | 658 | wait_for_completion(&heartbeat_wait); |
655 | 659 | ||
656 | if (heartbeat_recv_msg.msg.data[0] != 0) { | 660 | if (heartbeat_recv_msg.msg.data[0] == IPMI_WDOG_TIMER_NOT_INIT_RESP) { |
661 | timeout_retries++; | ||
662 | if (timeout_retries > 3) { | ||
663 | printk(KERN_ERR PFX ": Unable to restore the IPMI" | ||
664 | " watchdog's settings, giving up.\n"); | ||
665 | rv = -EIO; | ||
666 | goto out_unlock; | ||
667 | } | ||
668 | |||
669 | /* | ||
670 | * The timer was not initialized, that means the BMC was | ||
671 | * probably reset and lost the watchdog information. Attempt | ||
672 | * to restore the timer's info. Note that we still hold | ||
673 | * the heartbeat lock, to keep a heartbeat from happening | ||
674 | * in this process, so must say no heartbeat to avoid a | ||
675 | * deadlock on this mutex. | ||
676 | */ | ||
677 | rv = ipmi_set_timeout(IPMI_SET_TIMEOUT_NO_HB); | ||
678 | if (rv) { | ||
679 | printk(KERN_ERR PFX ": Unable to send the command to" | ||
680 | " set the watchdog's settings, giving up.\n"); | ||
681 | goto out_unlock; | ||
682 | } | ||
683 | |||
684 | /* We might need a new heartbeat, so do it now */ | ||
685 | goto restart; | ||
686 | } else if (heartbeat_recv_msg.msg.data[0] != 0) { | ||
657 | /* | 687 | /* |
658 | * Got an error in the heartbeat response. It was already | 688 | * Got an error in the heartbeat response. It was already |
659 | * reported in ipmi_wdog_msg_handler, but we should return | 689 | * reported in ipmi_wdog_msg_handler, but we should return |
@@ -662,6 +692,7 @@ static int ipmi_heartbeat(void) | |||
662 | rv = -EINVAL; | 692 | rv = -EINVAL; |
663 | } | 693 | } |
664 | 694 | ||
695 | out_unlock: | ||
665 | mutex_unlock(&heartbeat_lock); | 696 | mutex_unlock(&heartbeat_lock); |
666 | 697 | ||
667 | return rv; | 698 | return rv; |
@@ -922,11 +953,15 @@ static struct miscdevice ipmi_wdog_miscdev = { | |||
922 | static void ipmi_wdog_msg_handler(struct ipmi_recv_msg *msg, | 953 | static void ipmi_wdog_msg_handler(struct ipmi_recv_msg *msg, |
923 | void *handler_data) | 954 | void *handler_data) |
924 | { | 955 | { |
925 | if (msg->msg.data[0] != 0) { | 956 | if (msg->msg.cmd == IPMI_WDOG_RESET_TIMER && |
957 | msg->msg.data[0] == IPMI_WDOG_TIMER_NOT_INIT_RESP) | ||
958 | printk(KERN_INFO PFX "response: The IPMI controller appears" | ||
959 | " to have been reset, will attempt to reinitialize" | ||
960 | " the watchdog timer\n"); | ||
961 | else if (msg->msg.data[0] != 0) | ||
926 | printk(KERN_ERR PFX "response: Error %x on cmd %x\n", | 962 | printk(KERN_ERR PFX "response: Error %x on cmd %x\n", |
927 | msg->msg.data[0], | 963 | msg->msg.data[0], |
928 | msg->msg.cmd); | 964 | msg->msg.cmd); |
929 | } | ||
930 | 965 | ||
931 | ipmi_free_recv_msg(msg); | 966 | ipmi_free_recv_msg(msg); |
932 | } | 967 | } |
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index 59feefe0e3e6..fb6b6d28b60e 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c | |||
@@ -58,25 +58,15 @@ static struct clocksource clocksource_dbx500_prcmu = { | |||
58 | }; | 58 | }; |
59 | 59 | ||
60 | #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK | 60 | #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK |
61 | static DEFINE_CLOCK_DATA(cd); | ||
62 | 61 | ||
63 | unsigned long long notrace sched_clock(void) | 62 | static u32 notrace dbx500_prcmu_sched_clock_read(void) |
64 | { | 63 | { |
65 | u32 cyc; | ||
66 | |||
67 | if (unlikely(!clksrc_dbx500_timer_base)) | 64 | if (unlikely(!clksrc_dbx500_timer_base)) |
68 | return 0; | 65 | return 0; |
69 | 66 | ||
70 | cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); | 67 | return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); |
71 | |||
72 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
73 | } | 68 | } |
74 | 69 | ||
75 | static void notrace clksrc_dbx500_prcmu_update_sched_clock(void) | ||
76 | { | ||
77 | u32 cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); | ||
78 | update_sched_clock(&cd, cyc, (u32)~0); | ||
79 | } | ||
80 | #endif | 70 | #endif |
81 | 71 | ||
82 | void __init clksrc_dbx500_prcmu_init(void __iomem *base) | 72 | void __init clksrc_dbx500_prcmu_init(void __iomem *base) |
@@ -97,7 +87,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base) | |||
97 | clksrc_dbx500_timer_base + PRCMU_TIMER_REF); | 87 | clksrc_dbx500_timer_base + PRCMU_TIMER_REF); |
98 | } | 88 | } |
99 | #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK | 89 | #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK |
100 | init_sched_clock(&cd, clksrc_dbx500_prcmu_update_sched_clock, | 90 | setup_sched_clock(dbx500_prcmu_sched_clock_read, |
101 | 32, RATE_32K); | 91 | 32, RATE_32K); |
102 | #endif | 92 | #endif |
103 | clocksource_calc_mult_shift(&clocksource_dbx500_prcmu, | 93 | clocksource_calc_mult_shift(&clocksource_dbx500_prcmu, |
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index ab8f469f5cf8..5a99bb3f255a 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig | |||
@@ -124,7 +124,7 @@ config MV_XOR | |||
124 | 124 | ||
125 | config MX3_IPU | 125 | config MX3_IPU |
126 | bool "MX3x Image Processing Unit support" | 126 | bool "MX3x Image Processing Unit support" |
127 | depends on ARCH_MX3 | 127 | depends on SOC_IMX31 ||Â SOC_IMX35 |
128 | select DMA_ENGINE | 128 | select DMA_ENGINE |
129 | default y | 129 | default y |
130 | help | 130 | help |
@@ -216,7 +216,7 @@ config PCH_DMA | |||
216 | 216 | ||
217 | config IMX_SDMA | 217 | config IMX_SDMA |
218 | tristate "i.MX SDMA support" | 218 | tristate "i.MX SDMA support" |
219 | depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5 | 219 | depends on ARCH_MX25 || SOC_IMX31 ||Â SOC_IMX35 || ARCH_MX5 |
220 | select DMA_ENGINE | 220 | select DMA_ENGINE |
221 | help | 221 | help |
222 | Support the i.MX SDMA engine. This engine is integrated into | 222 | Support the i.MX SDMA engine. This engine is integrated into |
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 571041477ab2..a626e15799a5 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/amba/pl330.h> | 19 | #include <linux/amba/pl330.h> |
20 | #include <linux/pm_runtime.h> | 20 | #include <linux/pm_runtime.h> |
21 | #include <linux/scatterlist.h> | 21 | #include <linux/scatterlist.h> |
22 | #include <linux/of.h> | ||
22 | 23 | ||
23 | #define NR_DEFAULT_DESC 16 | 24 | #define NR_DEFAULT_DESC 16 |
24 | 25 | ||
@@ -116,6 +117,9 @@ struct dma_pl330_desc { | |||
116 | struct dma_pl330_chan *pchan; | 117 | struct dma_pl330_chan *pchan; |
117 | }; | 118 | }; |
118 | 119 | ||
120 | /* forward declaration */ | ||
121 | static struct amba_driver pl330_driver; | ||
122 | |||
119 | static inline struct dma_pl330_chan * | 123 | static inline struct dma_pl330_chan * |
120 | to_pchan(struct dma_chan *ch) | 124 | to_pchan(struct dma_chan *ch) |
121 | { | 125 | { |
@@ -267,6 +271,32 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err err) | |||
267 | tasklet_schedule(&pch->task); | 271 | tasklet_schedule(&pch->task); |
268 | } | 272 | } |
269 | 273 | ||
274 | bool pl330_filter(struct dma_chan *chan, void *param) | ||
275 | { | ||
276 | u8 *peri_id; | ||
277 | |||
278 | if (chan->device->dev->driver != &pl330_driver.drv) | ||
279 | return false; | ||
280 | |||
281 | #ifdef CONFIG_OF | ||
282 | if (chan->device->dev->of_node) { | ||
283 | const __be32 *prop_value; | ||
284 | phandle phandle; | ||
285 | struct device_node *node; | ||
286 | |||
287 | prop_value = ((struct property *)param)->value; | ||
288 | phandle = be32_to_cpup(prop_value++); | ||
289 | node = of_find_node_by_phandle(phandle); | ||
290 | return ((chan->private == node) && | ||
291 | (chan->chan_id == be32_to_cpup(prop_value))); | ||
292 | } | ||
293 | #endif | ||
294 | |||
295 | peri_id = chan->private; | ||
296 | return *peri_id == (unsigned)param; | ||
297 | } | ||
298 | EXPORT_SYMBOL(pl330_filter); | ||
299 | |||
270 | static int pl330_alloc_chan_resources(struct dma_chan *chan) | 300 | static int pl330_alloc_chan_resources(struct dma_chan *chan) |
271 | { | 301 | { |
272 | struct dma_pl330_chan *pch = to_pchan(chan); | 302 | struct dma_pl330_chan *pch = to_pchan(chan); |
@@ -497,7 +527,7 @@ pluck_desc(struct dma_pl330_dmac *pdmac) | |||
497 | static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) | 527 | static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) |
498 | { | 528 | { |
499 | struct dma_pl330_dmac *pdmac = pch->dmac; | 529 | struct dma_pl330_dmac *pdmac = pch->dmac; |
500 | struct dma_pl330_peri *peri = pch->chan.private; | 530 | u8 *peri_id = pch->chan.private; |
501 | struct dma_pl330_desc *desc; | 531 | struct dma_pl330_desc *desc; |
502 | 532 | ||
503 | /* Pluck one desc from the pool of DMAC */ | 533 | /* Pluck one desc from the pool of DMAC */ |
@@ -522,13 +552,7 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) | |||
522 | desc->txd.cookie = 0; | 552 | desc->txd.cookie = 0; |
523 | async_tx_ack(&desc->txd); | 553 | async_tx_ack(&desc->txd); |
524 | 554 | ||
525 | if (peri) { | 555 | desc->req.peri = peri_id ? pch->chan.chan_id : 0; |
526 | desc->req.rqtype = peri->rqtype; | ||
527 | desc->req.peri = pch->chan.chan_id; | ||
528 | } else { | ||
529 | desc->req.rqtype = MEMTOMEM; | ||
530 | desc->req.peri = 0; | ||
531 | } | ||
532 | 556 | ||
533 | dma_async_tx_descriptor_init(&desc->txd, &pch->chan); | 557 | dma_async_tx_descriptor_init(&desc->txd, &pch->chan); |
534 | 558 | ||
@@ -615,12 +639,14 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( | |||
615 | case DMA_TO_DEVICE: | 639 | case DMA_TO_DEVICE: |
616 | desc->rqcfg.src_inc = 1; | 640 | desc->rqcfg.src_inc = 1; |
617 | desc->rqcfg.dst_inc = 0; | 641 | desc->rqcfg.dst_inc = 0; |
642 | desc->req.rqtype = MEMTODEV; | ||
618 | src = dma_addr; | 643 | src = dma_addr; |
619 | dst = pch->fifo_addr; | 644 | dst = pch->fifo_addr; |
620 | break; | 645 | break; |
621 | case DMA_FROM_DEVICE: | 646 | case DMA_FROM_DEVICE: |
622 | desc->rqcfg.src_inc = 0; | 647 | desc->rqcfg.src_inc = 0; |
623 | desc->rqcfg.dst_inc = 1; | 648 | desc->rqcfg.dst_inc = 1; |
649 | desc->req.rqtype = DEVTOMEM; | ||
624 | src = pch->fifo_addr; | 650 | src = pch->fifo_addr; |
625 | dst = dma_addr; | 651 | dst = dma_addr; |
626 | break; | 652 | break; |
@@ -646,16 +672,12 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, | |||
646 | { | 672 | { |
647 | struct dma_pl330_desc *desc; | 673 | struct dma_pl330_desc *desc; |
648 | struct dma_pl330_chan *pch = to_pchan(chan); | 674 | struct dma_pl330_chan *pch = to_pchan(chan); |
649 | struct dma_pl330_peri *peri = chan->private; | ||
650 | struct pl330_info *pi; | 675 | struct pl330_info *pi; |
651 | int burst; | 676 | int burst; |
652 | 677 | ||
653 | if (unlikely(!pch || !len)) | 678 | if (unlikely(!pch || !len)) |
654 | return NULL; | 679 | return NULL; |
655 | 680 | ||
656 | if (peri && peri->rqtype != MEMTOMEM) | ||
657 | return NULL; | ||
658 | |||
659 | pi = &pch->dmac->pif; | 681 | pi = &pch->dmac->pif; |
660 | 682 | ||
661 | desc = __pl330_prep_dma_memcpy(pch, dst, src, len); | 683 | desc = __pl330_prep_dma_memcpy(pch, dst, src, len); |
@@ -664,6 +686,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, | |||
664 | 686 | ||
665 | desc->rqcfg.src_inc = 1; | 687 | desc->rqcfg.src_inc = 1; |
666 | desc->rqcfg.dst_inc = 1; | 688 | desc->rqcfg.dst_inc = 1; |
689 | desc->req.rqtype = MEMTOMEM; | ||
667 | 690 | ||
668 | /* Select max possible burst size */ | 691 | /* Select max possible burst size */ |
669 | burst = pi->pcfg.data_bus_width / 8; | 692 | burst = pi->pcfg.data_bus_width / 8; |
@@ -692,25 +715,14 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, | |||
692 | { | 715 | { |
693 | struct dma_pl330_desc *first, *desc = NULL; | 716 | struct dma_pl330_desc *first, *desc = NULL; |
694 | struct dma_pl330_chan *pch = to_pchan(chan); | 717 | struct dma_pl330_chan *pch = to_pchan(chan); |
695 | struct dma_pl330_peri *peri = chan->private; | ||
696 | struct scatterlist *sg; | 718 | struct scatterlist *sg; |
697 | unsigned long flags; | 719 | unsigned long flags; |
698 | int i; | 720 | int i; |
699 | dma_addr_t addr; | 721 | dma_addr_t addr; |
700 | 722 | ||
701 | if (unlikely(!pch || !sgl || !sg_len || !peri)) | 723 | if (unlikely(!pch || !sgl || !sg_len)) |
702 | return NULL; | 724 | return NULL; |
703 | 725 | ||
704 | /* Make sure the direction is consistent */ | ||
705 | if ((direction == DMA_TO_DEVICE && | ||
706 | peri->rqtype != MEMTODEV) || | ||
707 | (direction == DMA_FROM_DEVICE && | ||
708 | peri->rqtype != DEVTOMEM)) { | ||
709 | dev_err(pch->dmac->pif.dev, "%s:%d Invalid Direction\n", | ||
710 | __func__, __LINE__); | ||
711 | return NULL; | ||
712 | } | ||
713 | |||
714 | addr = pch->fifo_addr; | 726 | addr = pch->fifo_addr; |
715 | 727 | ||
716 | first = NULL; | 728 | first = NULL; |
@@ -750,11 +762,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, | |||
750 | if (direction == DMA_TO_DEVICE) { | 762 | if (direction == DMA_TO_DEVICE) { |
751 | desc->rqcfg.src_inc = 1; | 763 | desc->rqcfg.src_inc = 1; |
752 | desc->rqcfg.dst_inc = 0; | 764 | desc->rqcfg.dst_inc = 0; |
765 | desc->req.rqtype = MEMTODEV; | ||
753 | fill_px(&desc->px, | 766 | fill_px(&desc->px, |
754 | addr, sg_dma_address(sg), sg_dma_len(sg)); | 767 | addr, sg_dma_address(sg), sg_dma_len(sg)); |
755 | } else { | 768 | } else { |
756 | desc->rqcfg.src_inc = 0; | 769 | desc->rqcfg.src_inc = 0; |
757 | desc->rqcfg.dst_inc = 1; | 770 | desc->rqcfg.dst_inc = 1; |
771 | desc->req.rqtype = DEVTOMEM; | ||
758 | fill_px(&desc->px, | 772 | fill_px(&desc->px, |
759 | sg_dma_address(sg), addr, sg_dma_len(sg)); | 773 | sg_dma_address(sg), addr, sg_dma_len(sg)); |
760 | } | 774 | } |
@@ -856,32 +870,16 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) | |||
856 | INIT_LIST_HEAD(&pd->channels); | 870 | INIT_LIST_HEAD(&pd->channels); |
857 | 871 | ||
858 | /* Initialize channel parameters */ | 872 | /* Initialize channel parameters */ |
859 | num_chan = max(pdat ? pdat->nr_valid_peri : 0, (u8)pi->pcfg.num_chan); | 873 | num_chan = max(pdat ? pdat->nr_valid_peri : (u8)pi->pcfg.num_peri, |
874 | (u8)pi->pcfg.num_chan); | ||
860 | pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL); | 875 | pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL); |
861 | 876 | ||
862 | for (i = 0; i < num_chan; i++) { | 877 | for (i = 0; i < num_chan; i++) { |
863 | pch = &pdmac->peripherals[i]; | 878 | pch = &pdmac->peripherals[i]; |
864 | if (pdat) { | 879 | if (!adev->dev.of_node) |
865 | struct dma_pl330_peri *peri = &pdat->peri[i]; | 880 | pch->chan.private = pdat ? &pdat->peri_id[i] : NULL; |
866 | 881 | else | |
867 | switch (peri->rqtype) { | 882 | pch->chan.private = adev->dev.of_node; |
868 | case MEMTOMEM: | ||
869 | dma_cap_set(DMA_MEMCPY, pd->cap_mask); | ||
870 | break; | ||
871 | case MEMTODEV: | ||
872 | case DEVTOMEM: | ||
873 | dma_cap_set(DMA_SLAVE, pd->cap_mask); | ||
874 | dma_cap_set(DMA_CYCLIC, pd->cap_mask); | ||
875 | break; | ||
876 | default: | ||
877 | dev_err(&adev->dev, "DEVTODEV Not Supported\n"); | ||
878 | continue; | ||
879 | } | ||
880 | pch->chan.private = peri; | ||
881 | } else { | ||
882 | dma_cap_set(DMA_MEMCPY, pd->cap_mask); | ||
883 | pch->chan.private = NULL; | ||
884 | } | ||
885 | 883 | ||
886 | INIT_LIST_HEAD(&pch->work_list); | 884 | INIT_LIST_HEAD(&pch->work_list); |
887 | spin_lock_init(&pch->lock); | 885 | spin_lock_init(&pch->lock); |
@@ -894,6 +892,15 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) | |||
894 | } | 892 | } |
895 | 893 | ||
896 | pd->dev = &adev->dev; | 894 | pd->dev = &adev->dev; |
895 | if (pdat) { | ||
896 | pd->cap_mask = pdat->cap_mask; | ||
897 | } else { | ||
898 | dma_cap_set(DMA_MEMCPY, pd->cap_mask); | ||
899 | if (pi->pcfg.num_peri) { | ||
900 | dma_cap_set(DMA_SLAVE, pd->cap_mask); | ||
901 | dma_cap_set(DMA_CYCLIC, pd->cap_mask); | ||
902 | } | ||
903 | } | ||
897 | 904 | ||
898 | pd->device_alloc_chan_resources = pl330_alloc_chan_resources; | 905 | pd->device_alloc_chan_resources = pl330_alloc_chan_resources; |
899 | pd->device_free_chan_resources = pl330_free_chan_resources; | 906 | pd->device_free_chan_resources = pl330_free_chan_resources; |
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 866251852719..6b4d23fd158e 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c | |||
@@ -24,6 +24,9 @@ | |||
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/sysdev.h> | 25 | #include <linux/sysdev.h> |
26 | #include <linux/ioport.h> | 26 | #include <linux/ioport.h> |
27 | #include <linux/of.h> | ||
28 | #include <linux/slab.h> | ||
29 | #include <linux/of_address.h> | ||
27 | 30 | ||
28 | #include <asm/irq.h> | 31 | #include <asm/irq.h> |
29 | 32 | ||
@@ -2374,6 +2377,63 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = { | |||
2374 | #endif | 2377 | #endif |
2375 | }; | 2378 | }; |
2376 | 2379 | ||
2380 | #if defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF) | ||
2381 | static int exynos4_gpio_xlate(struct gpio_chip *gc, struct device_node *np, | ||
2382 | const void *gpio_spec, u32 *flags) | ||
2383 | { | ||
2384 | const __be32 *gpio = gpio_spec; | ||
2385 | const u32 n = be32_to_cpup(gpio); | ||
2386 | unsigned int pin = gc->base + be32_to_cpu(gpio[0]); | ||
2387 | |||
2388 | if (WARN_ON(gc->of_gpio_n_cells < 4)) | ||
2389 | return -EINVAL; | ||
2390 | |||
2391 | if (n > gc->ngpio) | ||
2392 | return -EINVAL; | ||
2393 | |||
2394 | if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(be32_to_cpu(gpio[1])))) | ||
2395 | pr_warn("gpio_xlate: failed to set pin function\n"); | ||
2396 | if (s3c_gpio_setpull(pin, be32_to_cpu(gpio[2]))) | ||
2397 | pr_warn("gpio_xlate: failed to set pin pull up/down\n"); | ||
2398 | if (s5p_gpio_set_drvstr(pin, be32_to_cpu(gpio[3]))) | ||
2399 | pr_warn("gpio_xlate: failed to set pin drive strength\n"); | ||
2400 | |||
2401 | return n; | ||
2402 | } | ||
2403 | |||
2404 | static const struct of_device_id exynos4_gpio_dt_match[] __initdata = { | ||
2405 | { .compatible = "samsung,exynos4-gpio", }, | ||
2406 | {} | ||
2407 | }; | ||
2408 | |||
2409 | static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip, | ||
2410 | u64 base, u64 offset) | ||
2411 | { | ||
2412 | struct gpio_chip *gc = &chip->chip; | ||
2413 | u64 address; | ||
2414 | |||
2415 | if (!of_have_populated_dt()) | ||
2416 | return; | ||
2417 | |||
2418 | address = chip->base ? base + ((u32)chip->base & 0xfff) : base + offset; | ||
2419 | gc->of_node = of_find_matching_node_by_address(NULL, | ||
2420 | exynos4_gpio_dt_match, address); | ||
2421 | if (!gc->of_node) { | ||
2422 | pr_info("gpio: device tree node not found for gpio controller" | ||
2423 | " with base address %08llx\n", address); | ||
2424 | return; | ||
2425 | } | ||
2426 | gc->of_gpio_n_cells = 4; | ||
2427 | gc->of_xlate = exynos4_gpio_xlate; | ||
2428 | } | ||
2429 | #elif defined(CONFIG_ARCH_EXYNOS4) | ||
2430 | static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip, | ||
2431 | u64 base, u64 offset) | ||
2432 | { | ||
2433 | return; | ||
2434 | } | ||
2435 | #endif /* defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF) */ | ||
2436 | |||
2377 | /* TODO: cleanup soc_is_* */ | 2437 | /* TODO: cleanup soc_is_* */ |
2378 | static __init int samsung_gpiolib_init(void) | 2438 | static __init int samsung_gpiolib_init(void) |
2379 | { | 2439 | { |
@@ -2455,6 +2515,10 @@ static __init int samsung_gpiolib_init(void) | |||
2455 | chip->config = &exynos4_gpio_cfg; | 2515 | chip->config = &exynos4_gpio_cfg; |
2456 | chip->group = group++; | 2516 | chip->group = group++; |
2457 | } | 2517 | } |
2518 | #ifdef CONFIG_CPU_EXYNOS4210 | ||
2519 | exynos4_gpiolib_attach_ofnode(chip, | ||
2520 | EXYNOS4_PA_GPIO1, i * 0x20); | ||
2521 | #endif | ||
2458 | } | 2522 | } |
2459 | samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1); | 2523 | samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1); |
2460 | 2524 | ||
@@ -2467,6 +2531,10 @@ static __init int samsung_gpiolib_init(void) | |||
2467 | chip->config = &exynos4_gpio_cfg; | 2531 | chip->config = &exynos4_gpio_cfg; |
2468 | chip->group = group++; | 2532 | chip->group = group++; |
2469 | } | 2533 | } |
2534 | #ifdef CONFIG_CPU_EXYNOS4210 | ||
2535 | exynos4_gpiolib_attach_ofnode(chip, | ||
2536 | EXYNOS4_PA_GPIO2, i * 0x20); | ||
2537 | #endif | ||
2470 | } | 2538 | } |
2471 | samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2); | 2539 | samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2); |
2472 | 2540 | ||
@@ -2479,6 +2547,10 @@ static __init int samsung_gpiolib_init(void) | |||
2479 | chip->config = &exynos4_gpio_cfg; | 2547 | chip->config = &exynos4_gpio_cfg; |
2480 | chip->group = group++; | 2548 | chip->group = group++; |
2481 | } | 2549 | } |
2550 | #ifdef CONFIG_CPU_EXYNOS4210 | ||
2551 | exynos4_gpiolib_attach_ofnode(chip, | ||
2552 | EXYNOS4_PA_GPIO3, i * 0x20); | ||
2553 | #endif | ||
2482 | } | 2554 | } |
2483 | samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3); | 2555 | samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3); |
2484 | 2556 | ||
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index c681dc149d2a..b9da8900ae4e 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
@@ -756,9 +756,9 @@ intel_enable_semaphores(struct drm_device *dev) | |||
756 | if (i915_semaphores >= 0) | 756 | if (i915_semaphores >= 0) |
757 | return i915_semaphores; | 757 | return i915_semaphores; |
758 | 758 | ||
759 | /* Enable semaphores on SNB when IO remapping is off */ | 759 | /* Disable semaphores on SNB */ |
760 | if (INTEL_INFO(dev)->gen == 6) | 760 | if (INTEL_INFO(dev)->gen == 6) |
761 | return !intel_iommu_enabled; | 761 | return 0; |
762 | 762 | ||
763 | return 1; | 763 | return 1; |
764 | } | 764 | } |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d809b038ca88..daa5743ccbd6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -7922,13 +7922,11 @@ static bool intel_enable_rc6(struct drm_device *dev) | |||
7922 | return 0; | 7922 | return 0; |
7923 | 7923 | ||
7924 | /* | 7924 | /* |
7925 | * Enable rc6 on Sandybridge if DMA remapping is disabled | 7925 | * Disable rc6 on Sandybridge |
7926 | */ | 7926 | */ |
7927 | if (INTEL_INFO(dev)->gen == 6) { | 7927 | if (INTEL_INFO(dev)->gen == 6) { |
7928 | DRM_DEBUG_DRIVER("Sandybridge: intel_iommu_enabled %s -- RC6 %sabled\n", | 7928 | DRM_DEBUG_DRIVER("Sandybridge: RC6 disabled\n"); |
7929 | intel_iommu_enabled ? "true" : "false", | 7929 | return 0; |
7930 | !intel_iommu_enabled ? "en" : "dis"); | ||
7931 | return !intel_iommu_enabled; | ||
7932 | } | 7930 | } |
7933 | DRM_DEBUG_DRIVER("RC6 enabled\n"); | 7931 | DRM_DEBUG_DRIVER("RC6 enabled\n"); |
7934 | return 1; | 7932 | return 1; |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 5e00d1670aa9..92c9628c572d 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -3276,6 +3276,18 @@ int evergreen_init(struct radeon_device *rdev) | |||
3276 | rdev->accel_working = false; | 3276 | rdev->accel_working = false; |
3277 | } | 3277 | } |
3278 | } | 3278 | } |
3279 | |||
3280 | /* Don't start up if the MC ucode is missing on BTC parts. | ||
3281 | * The default clocks and voltages before the MC ucode | ||
3282 | * is loaded are not suffient for advanced operations. | ||
3283 | */ | ||
3284 | if (ASIC_IS_DCE5(rdev)) { | ||
3285 | if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) { | ||
3286 | DRM_ERROR("radeon: MC ucode required for NI+.\n"); | ||
3287 | return -EINVAL; | ||
3288 | } | ||
3289 | } | ||
3290 | |||
3279 | return 0; | 3291 | return 0; |
3280 | } | 3292 | } |
3281 | 3293 | ||
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h index 8cca91a93bde..dc279706ca70 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | |||
@@ -390,6 +390,11 @@ extern int vmw_context_check(struct vmw_private *dev_priv, | |||
390 | struct ttm_object_file *tfile, | 390 | struct ttm_object_file *tfile, |
391 | int id, | 391 | int id, |
392 | struct vmw_resource **p_res); | 392 | struct vmw_resource **p_res); |
393 | extern int vmw_user_lookup_handle(struct vmw_private *dev_priv, | ||
394 | struct ttm_object_file *tfile, | ||
395 | uint32_t handle, | ||
396 | struct vmw_surface **out_surf, | ||
397 | struct vmw_dma_buffer **out_buf); | ||
393 | extern void vmw_surface_res_free(struct vmw_resource *res); | 398 | extern void vmw_surface_res_free(struct vmw_resource *res); |
394 | extern int vmw_surface_init(struct vmw_private *dev_priv, | 399 | extern int vmw_surface_init(struct vmw_private *dev_priv, |
395 | struct vmw_surface *srf, | 400 | struct vmw_surface *srf, |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c index 03bbc2a6f9a7..a0c2f12b1e1b 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c | |||
@@ -33,6 +33,7 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv) | |||
33 | { | 33 | { |
34 | __le32 __iomem *fifo_mem = dev_priv->mmio_virt; | 34 | __le32 __iomem *fifo_mem = dev_priv->mmio_virt; |
35 | uint32_t fifo_min, hwversion; | 35 | uint32_t fifo_min, hwversion; |
36 | const struct vmw_fifo_state *fifo = &dev_priv->fifo; | ||
36 | 37 | ||
37 | if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)) | 38 | if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)) |
38 | return false; | 39 | return false; |
@@ -41,7 +42,12 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv) | |||
41 | if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int)) | 42 | if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int)) |
42 | return false; | 43 | return false; |
43 | 44 | ||
44 | hwversion = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION); | 45 | hwversion = ioread32(fifo_mem + |
46 | ((fifo->capabilities & | ||
47 | SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ? | ||
48 | SVGA_FIFO_3D_HWVERSION_REVISED : | ||
49 | SVGA_FIFO_3D_HWVERSION)); | ||
50 | |||
45 | if (hwversion == 0) | 51 | if (hwversion == 0) |
46 | return false; | 52 | return false; |
47 | 53 | ||
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c index 5ff561d4e0b4..66917c6c3813 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | |||
@@ -58,8 +58,14 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data, | |||
58 | case DRM_VMW_PARAM_FIFO_HW_VERSION: | 58 | case DRM_VMW_PARAM_FIFO_HW_VERSION: |
59 | { | 59 | { |
60 | __le32 __iomem *fifo_mem = dev_priv->mmio_virt; | 60 | __le32 __iomem *fifo_mem = dev_priv->mmio_virt; |
61 | 61 | const struct vmw_fifo_state *fifo = &dev_priv->fifo; | |
62 | param->value = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION); | 62 | |
63 | param->value = | ||
64 | ioread32(fifo_mem + | ||
65 | ((fifo->capabilities & | ||
66 | SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ? | ||
67 | SVGA_FIFO_3D_HWVERSION_REVISED : | ||
68 | SVGA_FIFO_3D_HWVERSION)); | ||
63 | break; | 69 | break; |
64 | } | 70 | } |
65 | default: | 71 | default: |
@@ -166,13 +172,7 @@ int vmw_present_ioctl(struct drm_device *dev, void *data, | |||
166 | ret = -EINVAL; | 172 | ret = -EINVAL; |
167 | goto out_no_fb; | 173 | goto out_no_fb; |
168 | } | 174 | } |
169 | |||
170 | vfb = vmw_framebuffer_to_vfb(obj_to_fb(obj)); | 175 | vfb = vmw_framebuffer_to_vfb(obj_to_fb(obj)); |
171 | if (!vfb->dmabuf) { | ||
172 | DRM_ERROR("Framebuffer not dmabuf backed.\n"); | ||
173 | ret = -EINVAL; | ||
174 | goto out_no_fb; | ||
175 | } | ||
176 | 176 | ||
177 | ret = ttm_read_lock(&vmaster->lock, true); | 177 | ret = ttm_read_lock(&vmaster->lock, true); |
178 | if (unlikely(ret != 0)) | 178 | if (unlikely(ret != 0)) |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 37d40545ed77..f94b33ae2215 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | |||
@@ -31,6 +31,44 @@ | |||
31 | /* Might need a hrtimer here? */ | 31 | /* Might need a hrtimer here? */ |
32 | #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1) | 32 | #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1) |
33 | 33 | ||
34 | |||
35 | struct vmw_clip_rect { | ||
36 | int x1, x2, y1, y2; | ||
37 | }; | ||
38 | |||
39 | /** | ||
40 | * Clip @num_rects number of @rects against @clip storing the | ||
41 | * results in @out_rects and the number of passed rects in @out_num. | ||
42 | */ | ||
43 | void vmw_clip_cliprects(struct drm_clip_rect *rects, | ||
44 | int num_rects, | ||
45 | struct vmw_clip_rect clip, | ||
46 | SVGASignedRect *out_rects, | ||
47 | int *out_num) | ||
48 | { | ||
49 | int i, k; | ||
50 | |||
51 | for (i = 0, k = 0; i < num_rects; i++) { | ||
52 | int x1 = max_t(int, clip.x1, rects[i].x1); | ||
53 | int y1 = max_t(int, clip.y1, rects[i].y1); | ||
54 | int x2 = min_t(int, clip.x2, rects[i].x2); | ||
55 | int y2 = min_t(int, clip.y2, rects[i].y2); | ||
56 | |||
57 | if (x1 >= x2) | ||
58 | continue; | ||
59 | if (y1 >= y2) | ||
60 | continue; | ||
61 | |||
62 | out_rects[k].left = x1; | ||
63 | out_rects[k].top = y1; | ||
64 | out_rects[k].right = x2; | ||
65 | out_rects[k].bottom = y2; | ||
66 | k++; | ||
67 | } | ||
68 | |||
69 | *out_num = k; | ||
70 | } | ||
71 | |||
34 | void vmw_display_unit_cleanup(struct vmw_display_unit *du) | 72 | void vmw_display_unit_cleanup(struct vmw_display_unit *du) |
35 | { | 73 | { |
36 | if (du->cursor_surface) | 74 | if (du->cursor_surface) |
@@ -82,6 +120,43 @@ int vmw_cursor_update_image(struct vmw_private *dev_priv, | |||
82 | return 0; | 120 | return 0; |
83 | } | 121 | } |
84 | 122 | ||
123 | int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv, | ||
124 | struct vmw_dma_buffer *dmabuf, | ||
125 | u32 width, u32 height, | ||
126 | u32 hotspotX, u32 hotspotY) | ||
127 | { | ||
128 | struct ttm_bo_kmap_obj map; | ||
129 | unsigned long kmap_offset; | ||
130 | unsigned long kmap_num; | ||
131 | void *virtual; | ||
132 | bool dummy; | ||
133 | int ret; | ||
134 | |||
135 | kmap_offset = 0; | ||
136 | kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT; | ||
137 | |||
138 | ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0); | ||
139 | if (unlikely(ret != 0)) { | ||
140 | DRM_ERROR("reserve failed\n"); | ||
141 | return -EINVAL; | ||
142 | } | ||
143 | |||
144 | ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map); | ||
145 | if (unlikely(ret != 0)) | ||
146 | goto err_unreserve; | ||
147 | |||
148 | virtual = ttm_kmap_obj_virtual(&map, &dummy); | ||
149 | ret = vmw_cursor_update_image(dev_priv, virtual, width, height, | ||
150 | hotspotX, hotspotY); | ||
151 | |||
152 | ttm_bo_kunmap(&map); | ||
153 | err_unreserve: | ||
154 | ttm_bo_unreserve(&dmabuf->base); | ||
155 | |||
156 | return ret; | ||
157 | } | ||
158 | |||
159 | |||
85 | void vmw_cursor_update_position(struct vmw_private *dev_priv, | 160 | void vmw_cursor_update_position(struct vmw_private *dev_priv, |
86 | bool show, int x, int y) | 161 | bool show, int x, int y) |
87 | { | 162 | { |
@@ -110,24 +185,21 @@ int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, | |||
110 | return -EINVAL; | 185 | return -EINVAL; |
111 | 186 | ||
112 | if (handle) { | 187 | if (handle) { |
113 | ret = vmw_user_surface_lookup_handle(dev_priv, tfile, | 188 | ret = vmw_user_lookup_handle(dev_priv, tfile, |
114 | handle, &surface); | 189 | handle, &surface, &dmabuf); |
115 | if (!ret) { | 190 | if (ret) { |
116 | if (!surface->snooper.image) { | 191 | DRM_ERROR("failed to find surface or dmabuf: %i\n", ret); |
117 | DRM_ERROR("surface not suitable for cursor\n"); | 192 | return -EINVAL; |
118 | vmw_surface_unreference(&surface); | ||
119 | return -EINVAL; | ||
120 | } | ||
121 | } else { | ||
122 | ret = vmw_user_dmabuf_lookup(tfile, | ||
123 | handle, &dmabuf); | ||
124 | if (ret) { | ||
125 | DRM_ERROR("failed to find surface or dmabuf: %i\n", ret); | ||
126 | return -EINVAL; | ||
127 | } | ||
128 | } | 193 | } |
129 | } | 194 | } |
130 | 195 | ||
196 | /* need to do this before taking down old image */ | ||
197 | if (surface && !surface->snooper.image) { | ||
198 | DRM_ERROR("surface not suitable for cursor\n"); | ||
199 | vmw_surface_unreference(&surface); | ||
200 | return -EINVAL; | ||
201 | } | ||
202 | |||
131 | /* takedown old cursor */ | 203 | /* takedown old cursor */ |
132 | if (du->cursor_surface) { | 204 | if (du->cursor_surface) { |
133 | du->cursor_surface->snooper.crtc = NULL; | 205 | du->cursor_surface->snooper.crtc = NULL; |
@@ -146,36 +218,11 @@ int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, | |||
146 | vmw_cursor_update_image(dev_priv, surface->snooper.image, | 218 | vmw_cursor_update_image(dev_priv, surface->snooper.image, |
147 | 64, 64, du->hotspot_x, du->hotspot_y); | 219 | 64, 64, du->hotspot_x, du->hotspot_y); |
148 | } else if (dmabuf) { | 220 | } else if (dmabuf) { |
149 | struct ttm_bo_kmap_obj map; | ||
150 | unsigned long kmap_offset; | ||
151 | unsigned long kmap_num; | ||
152 | void *virtual; | ||
153 | bool dummy; | ||
154 | |||
155 | /* vmw_user_surface_lookup takes one reference */ | 221 | /* vmw_user_surface_lookup takes one reference */ |
156 | du->cursor_dmabuf = dmabuf; | 222 | du->cursor_dmabuf = dmabuf; |
157 | 223 | ||
158 | kmap_offset = 0; | 224 | ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height, |
159 | kmap_num = (64*64*4) >> PAGE_SHIFT; | 225 | du->hotspot_x, du->hotspot_y); |
160 | |||
161 | ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0); | ||
162 | if (unlikely(ret != 0)) { | ||
163 | DRM_ERROR("reserve failed\n"); | ||
164 | return -EINVAL; | ||
165 | } | ||
166 | |||
167 | ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map); | ||
168 | if (unlikely(ret != 0)) | ||
169 | goto err_unreserve; | ||
170 | |||
171 | virtual = ttm_kmap_obj_virtual(&map, &dummy); | ||
172 | vmw_cursor_update_image(dev_priv, virtual, 64, 64, | ||
173 | du->hotspot_x, du->hotspot_y); | ||
174 | |||
175 | ttm_bo_kunmap(&map); | ||
176 | err_unreserve: | ||
177 | ttm_bo_unreserve(&dmabuf->base); | ||
178 | |||
179 | } else { | 226 | } else { |
180 | vmw_cursor_update_position(dev_priv, false, 0, 0); | 227 | vmw_cursor_update_position(dev_priv, false, 0, 0); |
181 | return 0; | 228 | return 0; |
@@ -377,8 +424,9 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, | |||
377 | struct drm_clip_rect *clips, | 424 | struct drm_clip_rect *clips, |
378 | unsigned num_clips, int inc) | 425 | unsigned num_clips, int inc) |
379 | { | 426 | { |
380 | struct drm_clip_rect *clips_ptr; | ||
381 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; | 427 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; |
428 | struct drm_clip_rect *clips_ptr; | ||
429 | struct drm_clip_rect *tmp; | ||
382 | struct drm_crtc *crtc; | 430 | struct drm_crtc *crtc; |
383 | size_t fifo_size; | 431 | size_t fifo_size; |
384 | int i, num_units; | 432 | int i, num_units; |
@@ -391,7 +439,6 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, | |||
391 | } *cmd; | 439 | } *cmd; |
392 | SVGASignedRect *blits; | 440 | SVGASignedRect *blits; |
393 | 441 | ||
394 | |||
395 | num_units = 0; | 442 | num_units = 0; |
396 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, | 443 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, |
397 | head) { | 444 | head) { |
@@ -402,13 +449,24 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, | |||
402 | 449 | ||
403 | BUG_ON(!clips || !num_clips); | 450 | BUG_ON(!clips || !num_clips); |
404 | 451 | ||
452 | tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL); | ||
453 | if (unlikely(tmp == NULL)) { | ||
454 | DRM_ERROR("Temporary cliprect memory alloc failed.\n"); | ||
455 | return -ENOMEM; | ||
456 | } | ||
457 | |||
405 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; | 458 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; |
406 | cmd = kzalloc(fifo_size, GFP_KERNEL); | 459 | cmd = kzalloc(fifo_size, GFP_KERNEL); |
407 | if (unlikely(cmd == NULL)) { | 460 | if (unlikely(cmd == NULL)) { |
408 | DRM_ERROR("Temporary fifo memory alloc failed.\n"); | 461 | DRM_ERROR("Temporary fifo memory alloc failed.\n"); |
409 | return -ENOMEM; | 462 | ret = -ENOMEM; |
463 | goto out_free_tmp; | ||
410 | } | 464 | } |
411 | 465 | ||
466 | /* setup blits pointer */ | ||
467 | blits = (SVGASignedRect *)&cmd[1]; | ||
468 | |||
469 | /* initial clip region */ | ||
412 | left = clips->x1; | 470 | left = clips->x1; |
413 | right = clips->x2; | 471 | right = clips->x2; |
414 | top = clips->y1; | 472 | top = clips->y1; |
@@ -434,45 +492,60 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, | |||
434 | cmd->body.srcRect.bottom = bottom; | 492 | cmd->body.srcRect.bottom = bottom; |
435 | 493 | ||
436 | clips_ptr = clips; | 494 | clips_ptr = clips; |
437 | blits = (SVGASignedRect *)&cmd[1]; | ||
438 | for (i = 0; i < num_clips; i++, clips_ptr += inc) { | 495 | for (i = 0; i < num_clips; i++, clips_ptr += inc) { |
439 | blits[i].left = clips_ptr->x1 - left; | 496 | tmp[i].x1 = clips_ptr->x1 - left; |
440 | blits[i].right = clips_ptr->x2 - left; | 497 | tmp[i].x2 = clips_ptr->x2 - left; |
441 | blits[i].top = clips_ptr->y1 - top; | 498 | tmp[i].y1 = clips_ptr->y1 - top; |
442 | blits[i].bottom = clips_ptr->y2 - top; | 499 | tmp[i].y2 = clips_ptr->y2 - top; |
443 | } | 500 | } |
444 | 501 | ||
445 | /* do per unit writing, reuse fifo for each */ | 502 | /* do per unit writing, reuse fifo for each */ |
446 | for (i = 0; i < num_units; i++) { | 503 | for (i = 0; i < num_units; i++) { |
447 | struct vmw_display_unit *unit = units[i]; | 504 | struct vmw_display_unit *unit = units[i]; |
448 | int clip_x1 = left - unit->crtc.x; | 505 | struct vmw_clip_rect clip; |
449 | int clip_y1 = top - unit->crtc.y; | 506 | int num; |
450 | int clip_x2 = right - unit->crtc.x; | 507 | |
451 | int clip_y2 = bottom - unit->crtc.y; | 508 | clip.x1 = left - unit->crtc.x; |
509 | clip.y1 = top - unit->crtc.y; | ||
510 | clip.x2 = right - unit->crtc.x; | ||
511 | clip.y2 = bottom - unit->crtc.y; | ||
452 | 512 | ||
453 | /* skip any crtcs that misses the clip region */ | 513 | /* skip any crtcs that misses the clip region */ |
454 | if (clip_x1 >= unit->crtc.mode.hdisplay || | 514 | if (clip.x1 >= unit->crtc.mode.hdisplay || |
455 | clip_y1 >= unit->crtc.mode.vdisplay || | 515 | clip.y1 >= unit->crtc.mode.vdisplay || |
456 | clip_x2 <= 0 || clip_y2 <= 0) | 516 | clip.x2 <= 0 || clip.y2 <= 0) |
457 | continue; | 517 | continue; |
458 | 518 | ||
519 | /* | ||
520 | * In order for the clip rects to be correctly scaled | ||
521 | * the src and dest rects needs to be the same size. | ||
522 | */ | ||
523 | cmd->body.destRect.left = clip.x1; | ||
524 | cmd->body.destRect.right = clip.x2; | ||
525 | cmd->body.destRect.top = clip.y1; | ||
526 | cmd->body.destRect.bottom = clip.y2; | ||
527 | |||
528 | /* create a clip rect of the crtc in dest coords */ | ||
529 | clip.x2 = unit->crtc.mode.hdisplay - clip.x1; | ||
530 | clip.y2 = unit->crtc.mode.vdisplay - clip.y1; | ||
531 | clip.x1 = 0 - clip.x1; | ||
532 | clip.y1 = 0 - clip.y1; | ||
533 | |||
459 | /* need to reset sid as it is changed by execbuf */ | 534 | /* need to reset sid as it is changed by execbuf */ |
460 | cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle); | 535 | cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle); |
461 | |||
462 | cmd->body.destScreenId = unit->unit; | 536 | cmd->body.destScreenId = unit->unit; |
463 | 537 | ||
464 | /* | 538 | /* clip and write blits to cmd stream */ |
465 | * The blit command is a lot more resilient then the | 539 | vmw_clip_cliprects(tmp, num_clips, clip, blits, &num); |
466 | * readback command when it comes to clip rects. So its | ||
467 | * okay to go out of bounds. | ||
468 | */ | ||
469 | 540 | ||
470 | cmd->body.destRect.left = clip_x1; | 541 | /* if no cliprects hit skip this */ |
471 | cmd->body.destRect.right = clip_x2; | 542 | if (num == 0) |
472 | cmd->body.destRect.top = clip_y1; | 543 | continue; |
473 | cmd->body.destRect.bottom = clip_y2; | ||
474 | 544 | ||
475 | 545 | ||
546 | /* recalculate package length */ | ||
547 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num; | ||
548 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | ||
476 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, | 549 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, |
477 | fifo_size, 0, NULL); | 550 | fifo_size, 0, NULL); |
478 | 551 | ||
@@ -480,7 +553,10 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, | |||
480 | break; | 553 | break; |
481 | } | 554 | } |
482 | 555 | ||
556 | |||
483 | kfree(cmd); | 557 | kfree(cmd); |
558 | out_free_tmp: | ||
559 | kfree(tmp); | ||
484 | 560 | ||
485 | return ret; | 561 | return ret; |
486 | } | 562 | } |
@@ -556,6 +632,10 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, | |||
556 | * Sanity checks. | 632 | * Sanity checks. |
557 | */ | 633 | */ |
558 | 634 | ||
635 | /* Surface must be marked as a scanout. */ | ||
636 | if (unlikely(!surface->scanout)) | ||
637 | return -EINVAL; | ||
638 | |||
559 | if (unlikely(surface->mip_levels[0] != 1 || | 639 | if (unlikely(surface->mip_levels[0] != 1 || |
560 | surface->num_sizes != 1 || | 640 | surface->num_sizes != 1 || |
561 | surface->sizes[0].width < mode_cmd->width || | 641 | surface->sizes[0].width < mode_cmd->width || |
@@ -782,6 +862,7 @@ static int do_dmabuf_dirty_sou(struct drm_file *file_priv, | |||
782 | int clip_y1 = clips_ptr->y1 - unit->crtc.y; | 862 | int clip_y1 = clips_ptr->y1 - unit->crtc.y; |
783 | int clip_x2 = clips_ptr->x2 - unit->crtc.x; | 863 | int clip_x2 = clips_ptr->x2 - unit->crtc.x; |
784 | int clip_y2 = clips_ptr->y2 - unit->crtc.y; | 864 | int clip_y2 = clips_ptr->y2 - unit->crtc.y; |
865 | int move_x, move_y; | ||
785 | 866 | ||
786 | /* skip any crtcs that misses the clip region */ | 867 | /* skip any crtcs that misses the clip region */ |
787 | if (clip_x1 >= unit->crtc.mode.hdisplay || | 868 | if (clip_x1 >= unit->crtc.mode.hdisplay || |
@@ -789,12 +870,21 @@ static int do_dmabuf_dirty_sou(struct drm_file *file_priv, | |||
789 | clip_x2 <= 0 || clip_y2 <= 0) | 870 | clip_x2 <= 0 || clip_y2 <= 0) |
790 | continue; | 871 | continue; |
791 | 872 | ||
873 | /* clip size to crtc size */ | ||
874 | clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay); | ||
875 | clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay); | ||
876 | |||
877 | /* translate both src and dest to bring clip into screen */ | ||
878 | move_x = min_t(int, clip_x1, 0); | ||
879 | move_y = min_t(int, clip_y1, 0); | ||
880 | |||
881 | /* actual translate done here */ | ||
792 | blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; | 882 | blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; |
793 | blits[hit_num].body.destScreenId = unit->unit; | 883 | blits[hit_num].body.destScreenId = unit->unit; |
794 | blits[hit_num].body.srcOrigin.x = clips_ptr->x1; | 884 | blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x; |
795 | blits[hit_num].body.srcOrigin.y = clips_ptr->y1; | 885 | blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y; |
796 | blits[hit_num].body.destRect.left = clip_x1; | 886 | blits[hit_num].body.destRect.left = clip_x1 - move_x; |
797 | blits[hit_num].body.destRect.top = clip_y1; | 887 | blits[hit_num].body.destRect.top = clip_y1 - move_y; |
798 | blits[hit_num].body.destRect.right = clip_x2; | 888 | blits[hit_num].body.destRect.right = clip_x2; |
799 | blits[hit_num].body.destRect.bottom = clip_y2; | 889 | blits[hit_num].body.destRect.bottom = clip_y2; |
800 | hit_num++; | 890 | hit_num++; |
@@ -1003,7 +1093,6 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, | |||
1003 | struct vmw_surface *surface = NULL; | 1093 | struct vmw_surface *surface = NULL; |
1004 | struct vmw_dma_buffer *bo = NULL; | 1094 | struct vmw_dma_buffer *bo = NULL; |
1005 | struct ttm_base_object *user_obj; | 1095 | struct ttm_base_object *user_obj; |
1006 | u64 required_size; | ||
1007 | int ret; | 1096 | int ret; |
1008 | 1097 | ||
1009 | /** | 1098 | /** |
@@ -1012,8 +1101,9 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, | |||
1012 | * requested framebuffer. | 1101 | * requested framebuffer. |
1013 | */ | 1102 | */ |
1014 | 1103 | ||
1015 | required_size = mode_cmd->pitch * mode_cmd->height; | 1104 | if (!vmw_kms_validate_mode_vram(dev_priv, |
1016 | if (unlikely(required_size > (u64) dev_priv->vram_size)) { | 1105 | mode_cmd->pitch, |
1106 | mode_cmd->height)) { | ||
1017 | DRM_ERROR("VRAM size is too small for requested mode.\n"); | 1107 | DRM_ERROR("VRAM size is too small for requested mode.\n"); |
1018 | return ERR_PTR(-ENOMEM); | 1108 | return ERR_PTR(-ENOMEM); |
1019 | } | 1109 | } |
@@ -1033,46 +1123,29 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, | |||
1033 | return ERR_PTR(-ENOENT); | 1123 | return ERR_PTR(-ENOENT); |
1034 | } | 1124 | } |
1035 | 1125 | ||
1036 | /** | 1126 | /* returns either a dmabuf or surface */ |
1037 | * End conditioned code. | 1127 | ret = vmw_user_lookup_handle(dev_priv, tfile, |
1038 | */ | 1128 | mode_cmd->handle, |
1039 | 1129 | &surface, &bo); | |
1040 | ret = vmw_user_surface_lookup_handle(dev_priv, tfile, | ||
1041 | mode_cmd->handle, &surface); | ||
1042 | if (ret) | 1130 | if (ret) |
1043 | goto try_dmabuf; | 1131 | goto err_out; |
1044 | 1132 | ||
1045 | if (!surface->scanout) | 1133 | /* Create the new framebuffer depending one what we got back */ |
1046 | goto err_not_scanout; | 1134 | if (bo) |
1047 | 1135 | ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb, | |
1048 | ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface, | 1136 | mode_cmd); |
1049 | &vfb, mode_cmd); | 1137 | else if (surface) |
1050 | 1138 | ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, | |
1051 | /* vmw_user_surface_lookup takes one ref so does new_fb */ | 1139 | surface, &vfb, mode_cmd); |
1052 | vmw_surface_unreference(&surface); | 1140 | else |
1053 | 1141 | BUG(); | |
1054 | if (ret) { | ||
1055 | DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); | ||
1056 | ttm_base_object_unref(&user_obj); | ||
1057 | return ERR_PTR(ret); | ||
1058 | } else | ||
1059 | vfb->user_obj = user_obj; | ||
1060 | return &vfb->base; | ||
1061 | |||
1062 | try_dmabuf: | ||
1063 | DRM_INFO("%s: trying buffer\n", __func__); | ||
1064 | |||
1065 | ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo); | ||
1066 | if (ret) { | ||
1067 | DRM_ERROR("failed to find buffer: %i\n", ret); | ||
1068 | return ERR_PTR(-ENOENT); | ||
1069 | } | ||
1070 | |||
1071 | ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb, | ||
1072 | mode_cmd); | ||
1073 | 1142 | ||
1074 | /* vmw_user_dmabuf_lookup takes one ref so does new_fb */ | 1143 | err_out: |
1075 | vmw_dmabuf_unreference(&bo); | 1144 | /* vmw_user_lookup_handle takes one ref so does new_fb */ |
1145 | if (bo) | ||
1146 | vmw_dmabuf_unreference(&bo); | ||
1147 | if (surface) | ||
1148 | vmw_surface_unreference(&surface); | ||
1076 | 1149 | ||
1077 | if (ret) { | 1150 | if (ret) { |
1078 | DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); | 1151 | DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); |
@@ -1082,14 +1155,6 @@ try_dmabuf: | |||
1082 | vfb->user_obj = user_obj; | 1155 | vfb->user_obj = user_obj; |
1083 | 1156 | ||
1084 | return &vfb->base; | 1157 | return &vfb->base; |
1085 | |||
1086 | err_not_scanout: | ||
1087 | DRM_ERROR("surface not marked as scanout\n"); | ||
1088 | /* vmw_user_surface_lookup takes one ref */ | ||
1089 | vmw_surface_unreference(&surface); | ||
1090 | ttm_base_object_unref(&user_obj); | ||
1091 | |||
1092 | return ERR_PTR(-EINVAL); | ||
1093 | } | 1158 | } |
1094 | 1159 | ||
1095 | static struct drm_mode_config_funcs vmw_kms_funcs = { | 1160 | static struct drm_mode_config_funcs vmw_kms_funcs = { |
@@ -1106,10 +1171,12 @@ int vmw_kms_present(struct vmw_private *dev_priv, | |||
1106 | uint32_t num_clips) | 1171 | uint32_t num_clips) |
1107 | { | 1172 | { |
1108 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; | 1173 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; |
1174 | struct drm_clip_rect *tmp; | ||
1109 | struct drm_crtc *crtc; | 1175 | struct drm_crtc *crtc; |
1110 | size_t fifo_size; | 1176 | size_t fifo_size; |
1111 | int i, k, num_units; | 1177 | int i, k, num_units; |
1112 | int ret = 0; /* silence warning */ | 1178 | int ret = 0; /* silence warning */ |
1179 | int left, right, top, bottom; | ||
1113 | 1180 | ||
1114 | struct { | 1181 | struct { |
1115 | SVGA3dCmdHeader header; | 1182 | SVGA3dCmdHeader header; |
@@ -1127,60 +1194,95 @@ int vmw_kms_present(struct vmw_private *dev_priv, | |||
1127 | BUG_ON(surface == NULL); | 1194 | BUG_ON(surface == NULL); |
1128 | BUG_ON(!clips || !num_clips); | 1195 | BUG_ON(!clips || !num_clips); |
1129 | 1196 | ||
1197 | tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL); | ||
1198 | if (unlikely(tmp == NULL)) { | ||
1199 | DRM_ERROR("Temporary cliprect memory alloc failed.\n"); | ||
1200 | return -ENOMEM; | ||
1201 | } | ||
1202 | |||
1130 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; | 1203 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; |
1131 | cmd = kmalloc(fifo_size, GFP_KERNEL); | 1204 | cmd = kmalloc(fifo_size, GFP_KERNEL); |
1132 | if (unlikely(cmd == NULL)) { | 1205 | if (unlikely(cmd == NULL)) { |
1133 | DRM_ERROR("Failed to allocate temporary fifo memory.\n"); | 1206 | DRM_ERROR("Failed to allocate temporary fifo memory.\n"); |
1134 | return -ENOMEM; | 1207 | ret = -ENOMEM; |
1208 | goto out_free_tmp; | ||
1209 | } | ||
1210 | |||
1211 | left = clips->x; | ||
1212 | right = clips->x + clips->w; | ||
1213 | top = clips->y; | ||
1214 | bottom = clips->y + clips->h; | ||
1215 | |||
1216 | for (i = 1; i < num_clips; i++) { | ||
1217 | left = min_t(int, left, (int)clips[i].x); | ||
1218 | right = max_t(int, right, (int)clips[i].x + clips[i].w); | ||
1219 | top = min_t(int, top, (int)clips[i].y); | ||
1220 | bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h); | ||
1135 | } | 1221 | } |
1136 | 1222 | ||
1137 | /* only need to do this once */ | 1223 | /* only need to do this once */ |
1138 | memset(cmd, 0, fifo_size); | 1224 | memset(cmd, 0, fifo_size); |
1139 | cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN); | 1225 | cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN); |
1140 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | ||
1141 | |||
1142 | cmd->body.srcRect.left = 0; | ||
1143 | cmd->body.srcRect.right = surface->sizes[0].width; | ||
1144 | cmd->body.srcRect.top = 0; | ||
1145 | cmd->body.srcRect.bottom = surface->sizes[0].height; | ||
1146 | 1226 | ||
1147 | blits = (SVGASignedRect *)&cmd[1]; | 1227 | blits = (SVGASignedRect *)&cmd[1]; |
1228 | |||
1229 | cmd->body.srcRect.left = left; | ||
1230 | cmd->body.srcRect.right = right; | ||
1231 | cmd->body.srcRect.top = top; | ||
1232 | cmd->body.srcRect.bottom = bottom; | ||
1233 | |||
1148 | for (i = 0; i < num_clips; i++) { | 1234 | for (i = 0; i < num_clips; i++) { |
1149 | blits[i].left = clips[i].x; | 1235 | tmp[i].x1 = clips[i].x - left; |
1150 | blits[i].right = clips[i].x + clips[i].w; | 1236 | tmp[i].x2 = clips[i].x + clips[i].w - left; |
1151 | blits[i].top = clips[i].y; | 1237 | tmp[i].y1 = clips[i].y - top; |
1152 | blits[i].bottom = clips[i].y + clips[i].h; | 1238 | tmp[i].y2 = clips[i].y + clips[i].h - top; |
1153 | } | 1239 | } |
1154 | 1240 | ||
1155 | for (k = 0; k < num_units; k++) { | 1241 | for (k = 0; k < num_units; k++) { |
1156 | struct vmw_display_unit *unit = units[k]; | 1242 | struct vmw_display_unit *unit = units[k]; |
1157 | int clip_x1 = destX - unit->crtc.x; | 1243 | struct vmw_clip_rect clip; |
1158 | int clip_y1 = destY - unit->crtc.y; | 1244 | int num; |
1159 | int clip_x2 = clip_x1 + surface->sizes[0].width; | 1245 | |
1160 | int clip_y2 = clip_y1 + surface->sizes[0].height; | 1246 | clip.x1 = left + destX - unit->crtc.x; |
1247 | clip.y1 = top + destY - unit->crtc.y; | ||
1248 | clip.x2 = right + destX - unit->crtc.x; | ||
1249 | clip.y2 = bottom + destY - unit->crtc.y; | ||
1161 | 1250 | ||
1162 | /* skip any crtcs that misses the clip region */ | 1251 | /* skip any crtcs that misses the clip region */ |
1163 | if (clip_x1 >= unit->crtc.mode.hdisplay || | 1252 | if (clip.x1 >= unit->crtc.mode.hdisplay || |
1164 | clip_y1 >= unit->crtc.mode.vdisplay || | 1253 | clip.y1 >= unit->crtc.mode.vdisplay || |
1165 | clip_x2 <= 0 || clip_y2 <= 0) | 1254 | clip.x2 <= 0 || clip.y2 <= 0) |
1166 | continue; | 1255 | continue; |
1167 | 1256 | ||
1257 | /* | ||
1258 | * In order for the clip rects to be correctly scaled | ||
1259 | * the src and dest rects needs to be the same size. | ||
1260 | */ | ||
1261 | cmd->body.destRect.left = clip.x1; | ||
1262 | cmd->body.destRect.right = clip.x2; | ||
1263 | cmd->body.destRect.top = clip.y1; | ||
1264 | cmd->body.destRect.bottom = clip.y2; | ||
1265 | |||
1266 | /* create a clip rect of the crtc in dest coords */ | ||
1267 | clip.x2 = unit->crtc.mode.hdisplay - clip.x1; | ||
1268 | clip.y2 = unit->crtc.mode.vdisplay - clip.y1; | ||
1269 | clip.x1 = 0 - clip.x1; | ||
1270 | clip.y1 = 0 - clip.y1; | ||
1271 | |||
1168 | /* need to reset sid as it is changed by execbuf */ | 1272 | /* need to reset sid as it is changed by execbuf */ |
1169 | cmd->body.srcImage.sid = sid; | 1273 | cmd->body.srcImage.sid = sid; |
1170 | |||
1171 | cmd->body.destScreenId = unit->unit; | 1274 | cmd->body.destScreenId = unit->unit; |
1172 | 1275 | ||
1173 | /* | 1276 | /* clip and write blits to cmd stream */ |
1174 | * The blit command is a lot more resilient then the | 1277 | vmw_clip_cliprects(tmp, num_clips, clip, blits, &num); |
1175 | * readback command when it comes to clip rects. So its | ||
1176 | * okay to go out of bounds. | ||
1177 | */ | ||
1178 | 1278 | ||
1179 | cmd->body.destRect.left = clip_x1; | 1279 | /* if no cliprects hit skip this */ |
1180 | cmd->body.destRect.right = clip_x2; | 1280 | if (num == 0) |
1181 | cmd->body.destRect.top = clip_y1; | 1281 | continue; |
1182 | cmd->body.destRect.bottom = clip_y2; | ||
1183 | 1282 | ||
1283 | /* recalculate package length */ | ||
1284 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num; | ||
1285 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | ||
1184 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, | 1286 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, |
1185 | fifo_size, 0, NULL); | 1287 | fifo_size, 0, NULL); |
1186 | 1288 | ||
@@ -1189,6 +1291,8 @@ int vmw_kms_present(struct vmw_private *dev_priv, | |||
1189 | } | 1291 | } |
1190 | 1292 | ||
1191 | kfree(cmd); | 1293 | kfree(cmd); |
1294 | out_free_tmp: | ||
1295 | kfree(tmp); | ||
1192 | 1296 | ||
1193 | return ret; | 1297 | return ret; |
1194 | } | 1298 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h index af8e6e5bd964..e1cb8556355f 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | |||
@@ -62,9 +62,14 @@ struct vmw_framebuffer { | |||
62 | int vmw_cursor_update_image(struct vmw_private *dev_priv, | 62 | int vmw_cursor_update_image(struct vmw_private *dev_priv, |
63 | u32 *image, u32 width, u32 height, | 63 | u32 *image, u32 width, u32 height, |
64 | u32 hotspotX, u32 hotspotY); | 64 | u32 hotspotX, u32 hotspotY); |
65 | int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv, | ||
66 | struct vmw_dma_buffer *dmabuf, | ||
67 | u32 width, u32 height, | ||
68 | u32 hotspotX, u32 hotspotY); | ||
65 | void vmw_cursor_update_position(struct vmw_private *dev_priv, | 69 | void vmw_cursor_update_position(struct vmw_private *dev_priv, |
66 | bool show, int x, int y); | 70 | bool show, int x, int y); |
67 | 71 | ||
72 | |||
68 | /** | 73 | /** |
69 | * Base class display unit. | 74 | * Base class display unit. |
70 | * | 75 | * |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c index 90c5e3928491..8f8dbd43c33d 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | |||
@@ -74,9 +74,10 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv) | |||
74 | { | 74 | { |
75 | struct vmw_legacy_display *lds = dev_priv->ldu_priv; | 75 | struct vmw_legacy_display *lds = dev_priv->ldu_priv; |
76 | struct vmw_legacy_display_unit *entry; | 76 | struct vmw_legacy_display_unit *entry; |
77 | struct vmw_display_unit *du = NULL; | ||
77 | struct drm_framebuffer *fb = NULL; | 78 | struct drm_framebuffer *fb = NULL; |
78 | struct drm_crtc *crtc = NULL; | 79 | struct drm_crtc *crtc = NULL; |
79 | int i = 0; | 80 | int i = 0, ret; |
80 | 81 | ||
81 | /* If there is no display topology the host just assumes | 82 | /* If there is no display topology the host just assumes |
82 | * that the guest will set the same layout as the host. | 83 | * that the guest will set the same layout as the host. |
@@ -129,6 +130,25 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv) | |||
129 | 130 | ||
130 | lds->last_num_active = lds->num_active; | 131 | lds->last_num_active = lds->num_active; |
131 | 132 | ||
133 | |||
134 | /* Find the first du with a cursor. */ | ||
135 | list_for_each_entry(entry, &lds->active, active) { | ||
136 | du = &entry->base; | ||
137 | |||
138 | if (!du->cursor_dmabuf) | ||
139 | continue; | ||
140 | |||
141 | ret = vmw_cursor_update_dmabuf(dev_priv, | ||
142 | du->cursor_dmabuf, | ||
143 | 64, 64, | ||
144 | du->hotspot_x, | ||
145 | du->hotspot_y); | ||
146 | if (ret == 0) | ||
147 | break; | ||
148 | |||
149 | DRM_ERROR("Could not update cursor image\n"); | ||
150 | } | ||
151 | |||
132 | return 0; | 152 | return 0; |
133 | } | 153 | } |
134 | 154 | ||
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c index 86c5e4cceb31..1c7f09e26819 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | |||
@@ -1190,6 +1190,29 @@ void vmw_resource_unreserve(struct list_head *list) | |||
1190 | write_unlock(lock); | 1190 | write_unlock(lock); |
1191 | } | 1191 | } |
1192 | 1192 | ||
1193 | /** | ||
1194 | * Helper function that looks either a surface or dmabuf. | ||
1195 | * | ||
1196 | * The pointer this pointed at by out_surf and out_buf needs to be null. | ||
1197 | */ | ||
1198 | int vmw_user_lookup_handle(struct vmw_private *dev_priv, | ||
1199 | struct ttm_object_file *tfile, | ||
1200 | uint32_t handle, | ||
1201 | struct vmw_surface **out_surf, | ||
1202 | struct vmw_dma_buffer **out_buf) | ||
1203 | { | ||
1204 | int ret; | ||
1205 | |||
1206 | BUG_ON(*out_surf || *out_buf); | ||
1207 | |||
1208 | ret = vmw_user_surface_lookup_handle(dev_priv, tfile, handle, out_surf); | ||
1209 | if (!ret) | ||
1210 | return 0; | ||
1211 | |||
1212 | ret = vmw_user_dmabuf_lookup(tfile, handle, out_buf); | ||
1213 | return ret; | ||
1214 | } | ||
1215 | |||
1193 | 1216 | ||
1194 | int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv, | 1217 | int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv, |
1195 | struct ttm_object_file *tfile, | 1218 | struct ttm_object_file *tfile, |
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 8cebef49aeac..18936ac9d51c 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c | |||
@@ -893,6 +893,13 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev, | |||
893 | /* Set the number of I2C channel instance */ | 893 | /* Set the number of I2C channel instance */ |
894 | adap_info->ch_num = id->driver_data; | 894 | adap_info->ch_num = id->driver_data; |
895 | 895 | ||
896 | ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED, | ||
897 | KBUILD_MODNAME, adap_info); | ||
898 | if (ret) { | ||
899 | pch_pci_err(pdev, "request_irq FAILED\n"); | ||
900 | goto err_request_irq; | ||
901 | } | ||
902 | |||
896 | for (i = 0; i < adap_info->ch_num; i++) { | 903 | for (i = 0; i < adap_info->ch_num; i++) { |
897 | pch_adap = &adap_info->pch_data[i].pch_adapter; | 904 | pch_adap = &adap_info->pch_data[i].pch_adapter; |
898 | adap_info->pch_i2c_suspended = false; | 905 | adap_info->pch_i2c_suspended = false; |
@@ -910,28 +917,23 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev, | |||
910 | 917 | ||
911 | pch_adap->dev.parent = &pdev->dev; | 918 | pch_adap->dev.parent = &pdev->dev; |
912 | 919 | ||
920 | pch_i2c_init(&adap_info->pch_data[i]); | ||
913 | ret = i2c_add_adapter(pch_adap); | 921 | ret = i2c_add_adapter(pch_adap); |
914 | if (ret) { | 922 | if (ret) { |
915 | pch_pci_err(pdev, "i2c_add_adapter[ch:%d] FAILED\n", i); | 923 | pch_pci_err(pdev, "i2c_add_adapter[ch:%d] FAILED\n", i); |
916 | goto err_i2c_add_adapter; | 924 | goto err_add_adapter; |
917 | } | 925 | } |
918 | |||
919 | pch_i2c_init(&adap_info->pch_data[i]); | ||
920 | } | ||
921 | ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED, | ||
922 | KBUILD_MODNAME, adap_info); | ||
923 | if (ret) { | ||
924 | pch_pci_err(pdev, "request_irq FAILED\n"); | ||
925 | goto err_i2c_add_adapter; | ||
926 | } | 926 | } |
927 | 927 | ||
928 | pci_set_drvdata(pdev, adap_info); | 928 | pci_set_drvdata(pdev, adap_info); |
929 | pch_pci_dbg(pdev, "returns %d.\n", ret); | 929 | pch_pci_dbg(pdev, "returns %d.\n", ret); |
930 | return 0; | 930 | return 0; |
931 | 931 | ||
932 | err_i2c_add_adapter: | 932 | err_add_adapter: |
933 | for (j = 0; j < i; j++) | 933 | for (j = 0; j < i; j++) |
934 | i2c_del_adapter(&adap_info->pch_data[j].pch_adapter); | 934 | i2c_del_adapter(&adap_info->pch_data[j].pch_adapter); |
935 | free_irq(pdev->irq, adap_info); | ||
936 | err_request_irq: | ||
935 | pci_iounmap(pdev, base_addr); | 937 | pci_iounmap(pdev, base_addr); |
936 | err_pci_iomap: | 938 | err_pci_iomap: |
937 | pci_release_regions(pdev); | 939 | pci_release_regions(pdev); |
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index a43d0023446a..fa23faa20f0e 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c | |||
@@ -1047,13 +1047,14 @@ omap_i2c_probe(struct platform_device *pdev) | |||
1047 | * size. This is to ensure that we can handle the status on int | 1047 | * size. This is to ensure that we can handle the status on int |
1048 | * call back latencies. | 1048 | * call back latencies. |
1049 | */ | 1049 | */ |
1050 | if (dev->rev >= OMAP_I2C_REV_ON_3530_4430) { | 1050 | |
1051 | dev->fifo_size = 0; | 1051 | dev->fifo_size = (dev->fifo_size / 2); |
1052 | |||
1053 | if (dev->rev >= OMAP_I2C_REV_ON_3530_4430) | ||
1052 | dev->b_hw = 0; /* Disable hardware fixes */ | 1054 | dev->b_hw = 0; /* Disable hardware fixes */ |
1053 | } else { | 1055 | else |
1054 | dev->fifo_size = (dev->fifo_size / 2); | ||
1055 | dev->b_hw = 1; /* Enable hardware fixes */ | 1056 | dev->b_hw = 1; /* Enable hardware fixes */ |
1056 | } | 1057 | |
1057 | /* calculate wakeup latency constraint for MPU */ | 1058 | /* calculate wakeup latency constraint for MPU */ |
1058 | if (dev->set_mpu_wkup_lat != NULL) | 1059 | if (dev->set_mpu_wkup_lat != NULL) |
1059 | dev->latency = (1000000 * dev->fifo_size) / | 1060 | dev->latency = (1000000 * dev->fifo_size) / |
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 2754cef86a06..4c1718081685 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c | |||
@@ -534,6 +534,7 @@ static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, | |||
534 | 534 | ||
535 | /* first, try busy waiting briefly */ | 535 | /* first, try busy waiting briefly */ |
536 | do { | 536 | do { |
537 | cpu_relax(); | ||
537 | iicstat = readl(i2c->regs + S3C2410_IICSTAT); | 538 | iicstat = readl(i2c->regs + S3C2410_IICSTAT); |
538 | } while ((iicstat & S3C2410_IICSTAT_START) && --spins); | 539 | } while ((iicstat & S3C2410_IICSTAT_START) && --spins); |
539 | 540 | ||
@@ -786,7 +787,7 @@ static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) | |||
786 | #else | 787 | #else |
787 | static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) | 788 | static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) |
788 | { | 789 | { |
789 | return -EINVAL; | 790 | return 0; |
790 | } | 791 | } |
791 | 792 | ||
792 | static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) | 793 | static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) |
diff --git a/drivers/ide/at91_ide.c b/drivers/ide/at91_ide.c index 6dede8f366c5..41d415529479 100644 --- a/drivers/ide/at91_ide.c +++ b/drivers/ide/at91_ide.c | |||
@@ -314,7 +314,7 @@ static int __init at91_ide_probe(struct platform_device *pdev) | |||
314 | apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0); | 314 | apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0); |
315 | 315 | ||
316 | /* with GPIO interrupt we have to do quirks in handler */ | 316 | /* with GPIO interrupt we have to do quirks in handler */ |
317 | if (board->irq_pin >= PIN_BASE) | 317 | if (gpio_is_valid(board->irq_pin)) |
318 | host->irq_handler = at91_irq_handler; | 318 | host->irq_handler = at91_irq_handler; |
319 | 319 | ||
320 | host->ports[0]->select_data = board->chipselect; | 320 | host->ports[0]->select_data = board->chipselect; |
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c index 75ff821c0af0..d0d4aa9f4802 100644 --- a/drivers/infiniband/core/cma.c +++ b/drivers/infiniband/core/cma.c | |||
@@ -2513,6 +2513,9 @@ static int cma_resolve_ib_udp(struct rdma_id_private *id_priv, | |||
2513 | 2513 | ||
2514 | req.private_data_len = sizeof(struct cma_hdr) + | 2514 | req.private_data_len = sizeof(struct cma_hdr) + |
2515 | conn_param->private_data_len; | 2515 | conn_param->private_data_len; |
2516 | if (req.private_data_len < conn_param->private_data_len) | ||
2517 | return -EINVAL; | ||
2518 | |||
2516 | req.private_data = kzalloc(req.private_data_len, GFP_ATOMIC); | 2519 | req.private_data = kzalloc(req.private_data_len, GFP_ATOMIC); |
2517 | if (!req.private_data) | 2520 | if (!req.private_data) |
2518 | return -ENOMEM; | 2521 | return -ENOMEM; |
@@ -2562,6 +2565,9 @@ static int cma_connect_ib(struct rdma_id_private *id_priv, | |||
2562 | memset(&req, 0, sizeof req); | 2565 | memset(&req, 0, sizeof req); |
2563 | offset = cma_user_data_offset(id_priv->id.ps); | 2566 | offset = cma_user_data_offset(id_priv->id.ps); |
2564 | req.private_data_len = offset + conn_param->private_data_len; | 2567 | req.private_data_len = offset + conn_param->private_data_len; |
2568 | if (req.private_data_len < conn_param->private_data_len) | ||
2569 | return -EINVAL; | ||
2570 | |||
2565 | private_data = kzalloc(req.private_data_len, GFP_ATOMIC); | 2571 | private_data = kzalloc(req.private_data_len, GFP_ATOMIC); |
2566 | if (!private_data) | 2572 | if (!private_data) |
2567 | return -ENOMEM; | 2573 | return -ENOMEM; |
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c index 77f3dbc0aaa1..18836cdf1e10 100644 --- a/drivers/infiniband/hw/mlx4/main.c +++ b/drivers/infiniband/hw/mlx4/main.c | |||
@@ -1244,7 +1244,8 @@ err_reg: | |||
1244 | 1244 | ||
1245 | err_counter: | 1245 | err_counter: |
1246 | for (; i; --i) | 1246 | for (; i; --i) |
1247 | mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]); | 1247 | if (ibdev->counters[i - 1] != -1) |
1248 | mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]); | ||
1248 | 1249 | ||
1249 | err_map: | 1250 | err_map: |
1250 | iounmap(ibdev->uar_map); | 1251 | iounmap(ibdev->uar_map); |
@@ -1275,7 +1276,8 @@ static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) | |||
1275 | } | 1276 | } |
1276 | iounmap(ibdev->uar_map); | 1277 | iounmap(ibdev->uar_map); |
1277 | for (p = 0; p < ibdev->num_ports; ++p) | 1278 | for (p = 0; p < ibdev->num_ports; ++p) |
1278 | mlx4_counter_free(ibdev->dev, ibdev->counters[p]); | 1279 | if (ibdev->counters[p] != -1) |
1280 | mlx4_counter_free(ibdev->dev, ibdev->counters[p]); | ||
1279 | mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) | 1281 | mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) |
1280 | mlx4_CLOSE_PORT(dev, p); | 1282 | mlx4_CLOSE_PORT(dev, p); |
1281 | 1283 | ||
diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c b/drivers/infiniband/hw/qib/qib_file_ops.c index 574600ef5b42..a7403248d83d 100644 --- a/drivers/infiniband/hw/qib/qib_file_ops.c +++ b/drivers/infiniband/hw/qib/qib_file_ops.c | |||
@@ -1285,7 +1285,7 @@ static int setup_ctxt(struct qib_pportdata *ppd, int ctxt, | |||
1285 | strlcpy(rcd->comm, current->comm, sizeof(rcd->comm)); | 1285 | strlcpy(rcd->comm, current->comm, sizeof(rcd->comm)); |
1286 | ctxt_fp(fp) = rcd; | 1286 | ctxt_fp(fp) = rcd; |
1287 | qib_stats.sps_ctxts++; | 1287 | qib_stats.sps_ctxts++; |
1288 | dd->freectxts++; | 1288 | dd->freectxts--; |
1289 | ret = 0; | 1289 | ret = 0; |
1290 | goto bail; | 1290 | goto bail; |
1291 | 1291 | ||
@@ -1794,7 +1794,7 @@ static int qib_close(struct inode *in, struct file *fp) | |||
1794 | if (dd->pageshadow) | 1794 | if (dd->pageshadow) |
1795 | unlock_expected_tids(rcd); | 1795 | unlock_expected_tids(rcd); |
1796 | qib_stats.sps_ctxts--; | 1796 | qib_stats.sps_ctxts--; |
1797 | dd->freectxts--; | 1797 | dd->freectxts++; |
1798 | } | 1798 | } |
1799 | 1799 | ||
1800 | mutex_unlock(&qib_mutex); | 1800 | mutex_unlock(&qib_mutex); |
diff --git a/drivers/input/keyboard/samsung-keypad.c b/drivers/input/keyboard/samsung-keypad.c index f689f49e3109..8a0060cd3982 100644 --- a/drivers/input/keyboard/samsung-keypad.c +++ b/drivers/input/keyboard/samsung-keypad.c | |||
@@ -21,6 +21,8 @@ | |||
21 | #include <linux/module.h> | 21 | #include <linux/module.h> |
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
24 | #include <linux/of.h> | ||
25 | #include <linux/of_gpio.h> | ||
24 | #include <linux/sched.h> | 26 | #include <linux/sched.h> |
25 | #include <plat/keypad.h> | 27 | #include <plat/keypad.h> |
26 | 28 | ||
@@ -68,31 +70,26 @@ struct samsung_keypad { | |||
68 | wait_queue_head_t wait; | 70 | wait_queue_head_t wait; |
69 | bool stopped; | 71 | bool stopped; |
70 | int irq; | 72 | int irq; |
73 | enum samsung_keypad_type type; | ||
71 | unsigned int row_shift; | 74 | unsigned int row_shift; |
72 | unsigned int rows; | 75 | unsigned int rows; |
73 | unsigned int cols; | 76 | unsigned int cols; |
74 | unsigned int row_state[SAMSUNG_MAX_COLS]; | 77 | unsigned int row_state[SAMSUNG_MAX_COLS]; |
78 | #ifdef CONFIG_OF | ||
79 | int row_gpios[SAMSUNG_MAX_ROWS]; | ||
80 | int col_gpios[SAMSUNG_MAX_COLS]; | ||
81 | #endif | ||
75 | unsigned short keycodes[]; | 82 | unsigned short keycodes[]; |
76 | }; | 83 | }; |
77 | 84 | ||
78 | static int samsung_keypad_is_s5pv210(struct device *dev) | ||
79 | { | ||
80 | struct platform_device *pdev = to_platform_device(dev); | ||
81 | enum samsung_keypad_type type = | ||
82 | platform_get_device_id(pdev)->driver_data; | ||
83 | |||
84 | return type == KEYPAD_TYPE_S5PV210; | ||
85 | } | ||
86 | |||
87 | static void samsung_keypad_scan(struct samsung_keypad *keypad, | 85 | static void samsung_keypad_scan(struct samsung_keypad *keypad, |
88 | unsigned int *row_state) | 86 | unsigned int *row_state) |
89 | { | 87 | { |
90 | struct device *dev = keypad->input_dev->dev.parent; | ||
91 | unsigned int col; | 88 | unsigned int col; |
92 | unsigned int val; | 89 | unsigned int val; |
93 | 90 | ||
94 | for (col = 0; col < keypad->cols; col++) { | 91 | for (col = 0; col < keypad->cols; col++) { |
95 | if (samsung_keypad_is_s5pv210(dev)) { | 92 | if (keypad->type == KEYPAD_TYPE_S5PV210) { |
96 | val = S5PV210_KEYIFCOLEN_MASK; | 93 | val = S5PV210_KEYIFCOLEN_MASK; |
97 | val &= ~(1 << col) << 8; | 94 | val &= ~(1 << col) << 8; |
98 | } else { | 95 | } else { |
@@ -235,6 +232,126 @@ static void samsung_keypad_close(struct input_dev *input_dev) | |||
235 | samsung_keypad_stop(keypad); | 232 | samsung_keypad_stop(keypad); |
236 | } | 233 | } |
237 | 234 | ||
235 | #ifdef CONFIG_OF | ||
236 | static struct samsung_keypad_platdata *samsung_keypad_parse_dt( | ||
237 | struct device *dev) | ||
238 | { | ||
239 | struct samsung_keypad_platdata *pdata; | ||
240 | struct matrix_keymap_data *keymap_data; | ||
241 | uint32_t *keymap, num_rows = 0, num_cols = 0; | ||
242 | struct device_node *np = dev->of_node, *key_np; | ||
243 | unsigned int key_count = 0; | ||
244 | |||
245 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | ||
246 | if (!pdata) { | ||
247 | dev_err(dev, "could not allocate memory for platform data\n"); | ||
248 | return NULL; | ||
249 | } | ||
250 | |||
251 | of_property_read_u32(np, "samsung,keypad-num-rows", &num_rows); | ||
252 | of_property_read_u32(np, "samsung,keypad-num-columns", &num_cols); | ||
253 | if (!num_rows || !num_cols) { | ||
254 | dev_err(dev, "number of keypad rows/columns not specified\n"); | ||
255 | return NULL; | ||
256 | } | ||
257 | pdata->rows = num_rows; | ||
258 | pdata->cols = num_cols; | ||
259 | |||
260 | keymap_data = devm_kzalloc(dev, sizeof(*keymap_data), GFP_KERNEL); | ||
261 | if (!keymap_data) { | ||
262 | dev_err(dev, "could not allocate memory for keymap data\n"); | ||
263 | return NULL; | ||
264 | } | ||
265 | pdata->keymap_data = keymap_data; | ||
266 | |||
267 | for_each_child_of_node(np, key_np) | ||
268 | key_count++; | ||
269 | |||
270 | keymap_data->keymap_size = key_count; | ||
271 | keymap = devm_kzalloc(dev, sizeof(uint32_t) * key_count, GFP_KERNEL); | ||
272 | if (!keymap) { | ||
273 | dev_err(dev, "could not allocate memory for keymap\n"); | ||
274 | return NULL; | ||
275 | } | ||
276 | keymap_data->keymap = keymap; | ||
277 | |||
278 | for_each_child_of_node(np, key_np) { | ||
279 | u32 row, col, key_code; | ||
280 | of_property_read_u32(key_np, "keypad,row", &row); | ||
281 | of_property_read_u32(key_np, "keypad,column", &col); | ||
282 | of_property_read_u32(key_np, "linux,code", &key_code); | ||
283 | *keymap++ = KEY(row, col, key_code); | ||
284 | } | ||
285 | |||
286 | if (of_get_property(np, "linux,input-no-autorepeat", NULL)) | ||
287 | pdata->no_autorepeat = true; | ||
288 | if (of_get_property(np, "linux,input-wakeup", NULL)) | ||
289 | pdata->wakeup = true; | ||
290 | |||
291 | return pdata; | ||
292 | } | ||
293 | |||
294 | static void samsung_keypad_parse_dt_gpio(struct device *dev, | ||
295 | struct samsung_keypad *keypad) | ||
296 | { | ||
297 | struct device_node *np = dev->of_node; | ||
298 | int gpio, ret, row, col; | ||
299 | |||
300 | for (row = 0; row < keypad->rows; row++) { | ||
301 | gpio = of_get_named_gpio(np, "row-gpios", row); | ||
302 | keypad->row_gpios[row] = gpio; | ||
303 | if (!gpio_is_valid(gpio)) { | ||
304 | dev_err(dev, "keypad row[%d]: invalid gpio %d\n", | ||
305 | row, gpio); | ||
306 | continue; | ||
307 | } | ||
308 | |||
309 | ret = gpio_request(gpio, "keypad-row"); | ||
310 | if (ret) | ||
311 | dev_err(dev, "keypad row[%d] gpio request failed\n", | ||
312 | row); | ||
313 | } | ||
314 | |||
315 | for (col = 0; col < keypad->cols; col++) { | ||
316 | gpio = of_get_named_gpio(np, "col-gpios", col); | ||
317 | keypad->col_gpios[col] = gpio; | ||
318 | if (!gpio_is_valid(gpio)) { | ||
319 | dev_err(dev, "keypad column[%d]: invalid gpio %d\n", | ||
320 | col, gpio); | ||
321 | continue; | ||
322 | } | ||
323 | |||
324 | ret = gpio_request(gpio, "keypad-col"); | ||
325 | if (ret) | ||
326 | dev_err(dev, "keypad column[%d] gpio request failed\n", | ||
327 | col); | ||
328 | } | ||
329 | } | ||
330 | |||
331 | static void samsung_keypad_dt_gpio_free(struct samsung_keypad *keypad) | ||
332 | { | ||
333 | int cnt; | ||
334 | |||
335 | for (cnt = 0; cnt < keypad->rows; cnt++) | ||
336 | if (gpio_is_valid(keypad->row_gpios[cnt])) | ||
337 | gpio_free(keypad->row_gpios[cnt]); | ||
338 | |||
339 | for (cnt = 0; cnt < keypad->cols; cnt++) | ||
340 | if (gpio_is_valid(keypad->col_gpios[cnt])) | ||
341 | gpio_free(keypad->col_gpios[cnt]); | ||
342 | } | ||
343 | #else | ||
344 | static | ||
345 | struct samsung_keypad_platdata *samsung_keypad_parse_dt(struct device *dev) | ||
346 | { | ||
347 | return NULL; | ||
348 | } | ||
349 | |||
350 | static void samsung_keypad_dt_gpio_free(struct samsung_keypad *keypad) | ||
351 | { | ||
352 | } | ||
353 | #endif | ||
354 | |||
238 | static int __devinit samsung_keypad_probe(struct platform_device *pdev) | 355 | static int __devinit samsung_keypad_probe(struct platform_device *pdev) |
239 | { | 356 | { |
240 | const struct samsung_keypad_platdata *pdata; | 357 | const struct samsung_keypad_platdata *pdata; |
@@ -246,7 +363,10 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev) | |||
246 | unsigned int keymap_size; | 363 | unsigned int keymap_size; |
247 | int error; | 364 | int error; |
248 | 365 | ||
249 | pdata = pdev->dev.platform_data; | 366 | if (pdev->dev.of_node) |
367 | pdata = samsung_keypad_parse_dt(&pdev->dev); | ||
368 | else | ||
369 | pdata = pdev->dev.platform_data; | ||
250 | if (!pdata) { | 370 | if (!pdata) { |
251 | dev_err(&pdev->dev, "no platform data defined\n"); | 371 | dev_err(&pdev->dev, "no platform data defined\n"); |
252 | return -EINVAL; | 372 | return -EINVAL; |
@@ -303,6 +423,16 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev) | |||
303 | keypad->cols = pdata->cols; | 423 | keypad->cols = pdata->cols; |
304 | init_waitqueue_head(&keypad->wait); | 424 | init_waitqueue_head(&keypad->wait); |
305 | 425 | ||
426 | if (pdev->dev.of_node) { | ||
427 | #ifdef CONFIG_OF | ||
428 | samsung_keypad_parse_dt_gpio(&pdev->dev, keypad); | ||
429 | keypad->type = of_device_is_compatible(pdev->dev.of_node, | ||
430 | "samsung,s5pv210-keypad"); | ||
431 | #endif | ||
432 | } else { | ||
433 | keypad->type = platform_get_device_id(pdev)->driver_data; | ||
434 | } | ||
435 | |||
306 | input_dev->name = pdev->name; | 436 | input_dev->name = pdev->name; |
307 | input_dev->id.bustype = BUS_HOST; | 437 | input_dev->id.bustype = BUS_HOST; |
308 | input_dev->dev.parent = &pdev->dev; | 438 | input_dev->dev.parent = &pdev->dev; |
@@ -343,12 +473,19 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev) | |||
343 | 473 | ||
344 | device_init_wakeup(&pdev->dev, pdata->wakeup); | 474 | device_init_wakeup(&pdev->dev, pdata->wakeup); |
345 | platform_set_drvdata(pdev, keypad); | 475 | platform_set_drvdata(pdev, keypad); |
476 | |||
477 | if (pdev->dev.of_node) { | ||
478 | devm_kfree(&pdev->dev, (void *)pdata->keymap_data->keymap); | ||
479 | devm_kfree(&pdev->dev, (void *)pdata->keymap_data); | ||
480 | devm_kfree(&pdev->dev, (void *)pdata); | ||
481 | } | ||
346 | return 0; | 482 | return 0; |
347 | 483 | ||
348 | err_free_irq: | 484 | err_free_irq: |
349 | free_irq(keypad->irq, keypad); | 485 | free_irq(keypad->irq, keypad); |
350 | err_put_clk: | 486 | err_put_clk: |
351 | clk_put(keypad->clk); | 487 | clk_put(keypad->clk); |
488 | samsung_keypad_dt_gpio_free(keypad); | ||
352 | err_unmap_base: | 489 | err_unmap_base: |
353 | iounmap(keypad->base); | 490 | iounmap(keypad->base); |
354 | err_free_mem: | 491 | err_free_mem: |
@@ -374,6 +511,7 @@ static int __devexit samsung_keypad_remove(struct platform_device *pdev) | |||
374 | free_irq(keypad->irq, keypad); | 511 | free_irq(keypad->irq, keypad); |
375 | 512 | ||
376 | clk_put(keypad->clk); | 513 | clk_put(keypad->clk); |
514 | samsung_keypad_dt_gpio_free(keypad); | ||
377 | 515 | ||
378 | iounmap(keypad->base); | 516 | iounmap(keypad->base); |
379 | kfree(keypad); | 517 | kfree(keypad); |
@@ -447,6 +585,17 @@ static const struct dev_pm_ops samsung_keypad_pm_ops = { | |||
447 | }; | 585 | }; |
448 | #endif | 586 | #endif |
449 | 587 | ||
588 | #ifdef CONFIG_OF | ||
589 | static const struct of_device_id samsung_keypad_dt_match[] = { | ||
590 | { .compatible = "samsung,s3c6410-keypad" }, | ||
591 | { .compatible = "samsung,s5pv210-keypad" }, | ||
592 | {}, | ||
593 | }; | ||
594 | MODULE_DEVICE_TABLE(of, samsung_keypad_dt_match); | ||
595 | #else | ||
596 | #define samsung_keypad_dt_match NULL | ||
597 | #endif | ||
598 | |||
450 | static struct platform_device_id samsung_keypad_driver_ids[] = { | 599 | static struct platform_device_id samsung_keypad_driver_ids[] = { |
451 | { | 600 | { |
452 | .name = "samsung-keypad", | 601 | .name = "samsung-keypad", |
@@ -465,6 +614,7 @@ static struct platform_driver samsung_keypad_driver = { | |||
465 | .driver = { | 614 | .driver = { |
466 | .name = "samsung-keypad", | 615 | .name = "samsung-keypad", |
467 | .owner = THIS_MODULE, | 616 | .owner = THIS_MODULE, |
617 | .of_match_table = samsung_keypad_dt_match, | ||
468 | #ifdef CONFIG_PM | 618 | #ifdef CONFIG_PM |
469 | .pm = &samsung_keypad_pm_ops, | 619 | .pm = &samsung_keypad_pm_ops, |
470 | #endif | 620 | #endif |
diff --git a/drivers/input/misc/cma3000_d0x.c b/drivers/input/misc/cma3000_d0x.c index 80793f1608eb..06517e60e50c 100644 --- a/drivers/input/misc/cma3000_d0x.c +++ b/drivers/input/misc/cma3000_d0x.c | |||
@@ -115,8 +115,8 @@ static void decode_mg(struct cma3000_accl_data *data, int *datax, | |||
115 | static irqreturn_t cma3000_thread_irq(int irq, void *dev_id) | 115 | static irqreturn_t cma3000_thread_irq(int irq, void *dev_id) |
116 | { | 116 | { |
117 | struct cma3000_accl_data *data = dev_id; | 117 | struct cma3000_accl_data *data = dev_id; |
118 | int datax, datay, dataz; | 118 | int datax, datay, dataz, intr_status; |
119 | u8 ctrl, mode, range, intr_status; | 119 | u8 ctrl, mode, range; |
120 | 120 | ||
121 | intr_status = CMA3000_READ(data, CMA3000_INTSTATUS, "interrupt status"); | 121 | intr_status = CMA3000_READ(data, CMA3000_INTSTATUS, "interrupt status"); |
122 | if (intr_status < 0) | 122 | if (intr_status < 0) |
diff --git a/drivers/input/mouse/sentelic.c b/drivers/input/mouse/sentelic.c index c5b12d2e955a..86d6f39178b0 100644 --- a/drivers/input/mouse/sentelic.c +++ b/drivers/input/mouse/sentelic.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Finger Sensing Pad PS/2 mouse driver. | 2 | * Finger Sensing Pad PS/2 mouse driver. |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. | 4 | * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. |
5 | * Copyright (C) 2005-2010 Tai-hwa Liang, Sentelic Corporation. | 5 | * Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or | 7 | * This program is free software; you can redistribute it and/or |
8 | * modify it under the terms of the GNU General Public License | 8 | * modify it under the terms of the GNU General Public License |
@@ -162,7 +162,7 @@ static int fsp_reg_write(struct psmouse *psmouse, int reg_addr, int reg_val) | |||
162 | ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2); | 162 | ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2); |
163 | 163 | ||
164 | if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0) | 164 | if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0) |
165 | return -1; | 165 | goto out; |
166 | 166 | ||
167 | if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { | 167 | if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { |
168 | /* inversion is required */ | 168 | /* inversion is required */ |
@@ -261,7 +261,7 @@ static int fsp_page_reg_write(struct psmouse *psmouse, int reg_val) | |||
261 | ps2_sendbyte(ps2dev, 0x88, FSP_CMD_TIMEOUT2); | 261 | ps2_sendbyte(ps2dev, 0x88, FSP_CMD_TIMEOUT2); |
262 | 262 | ||
263 | if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0) | 263 | if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0) |
264 | return -1; | 264 | goto out; |
265 | 265 | ||
266 | if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { | 266 | if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { |
267 | ps2_sendbyte(ps2dev, 0x47, FSP_CMD_TIMEOUT2); | 267 | ps2_sendbyte(ps2dev, 0x47, FSP_CMD_TIMEOUT2); |
@@ -309,7 +309,7 @@ static int fsp_get_buttons(struct psmouse *psmouse, int *btn) | |||
309 | }; | 309 | }; |
310 | int val; | 310 | int val; |
311 | 311 | ||
312 | if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS1, &val) == -1) | 312 | if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS, &val) == -1) |
313 | return -EIO; | 313 | return -EIO; |
314 | 314 | ||
315 | *btn = buttons[(val & 0x30) >> 4]; | 315 | *btn = buttons[(val & 0x30) >> 4]; |
diff --git a/drivers/input/mouse/sentelic.h b/drivers/input/mouse/sentelic.h index ed1395ac7b8b..2e4af24f8c15 100644 --- a/drivers/input/mouse/sentelic.h +++ b/drivers/input/mouse/sentelic.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * Finger Sensing Pad PS/2 mouse driver. | 2 | * Finger Sensing Pad PS/2 mouse driver. |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. | 4 | * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. |
5 | * Copyright (C) 2005-2009 Tai-hwa Liang, Sentelic Corporation. | 5 | * Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or | 7 | * This program is free software; you can redistribute it and/or |
8 | * modify it under the terms of the GNU General Public License | 8 | * modify it under the terms of the GNU General Public License |
@@ -33,6 +33,7 @@ | |||
33 | /* Finger-sensing Pad control registers */ | 33 | /* Finger-sensing Pad control registers */ |
34 | #define FSP_REG_SYSCTL1 0x10 | 34 | #define FSP_REG_SYSCTL1 0x10 |
35 | #define FSP_BIT_EN_REG_CLK BIT(5) | 35 | #define FSP_BIT_EN_REG_CLK BIT(5) |
36 | #define FSP_REG_TMOD_STATUS 0x20 | ||
36 | #define FSP_REG_OPC_QDOWN 0x31 | 37 | #define FSP_REG_OPC_QDOWN 0x31 |
37 | #define FSP_BIT_EN_OPC_TAG BIT(7) | 38 | #define FSP_BIT_EN_OPC_TAG BIT(7) |
38 | #define FSP_REG_OPTZ_XLO 0x34 | 39 | #define FSP_REG_OPTZ_XLO 0x34 |
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c index c080b828e5dc..a6dcd18e9adf 100644 --- a/drivers/input/mouse/synaptics.c +++ b/drivers/input/mouse/synaptics.c | |||
@@ -24,6 +24,7 @@ | |||
24 | */ | 24 | */ |
25 | 25 | ||
26 | #include <linux/module.h> | 26 | #include <linux/module.h> |
27 | #include <linux/delay.h> | ||
27 | #include <linux/dmi.h> | 28 | #include <linux/dmi.h> |
28 | #include <linux/input/mt.h> | 29 | #include <linux/input/mt.h> |
29 | #include <linux/serio.h> | 30 | #include <linux/serio.h> |
@@ -1220,6 +1221,16 @@ static int synaptics_reconnect(struct psmouse *psmouse) | |||
1220 | 1221 | ||
1221 | do { | 1222 | do { |
1222 | psmouse_reset(psmouse); | 1223 | psmouse_reset(psmouse); |
1224 | if (retry) { | ||
1225 | /* | ||
1226 | * On some boxes, right after resuming, the touchpad | ||
1227 | * needs some time to finish initializing (I assume | ||
1228 | * it needs time to calibrate) and start responding | ||
1229 | * to Synaptics-specific queries, so let's wait a | ||
1230 | * bit. | ||
1231 | */ | ||
1232 | ssleep(1); | ||
1233 | } | ||
1223 | error = synaptics_detect(psmouse, 0); | 1234 | error = synaptics_detect(psmouse, 0); |
1224 | } while (error && ++retry < 3); | 1235 | } while (error && ++retry < 3); |
1225 | 1236 | ||
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index da0d8761e778..2ee47d01a3b4 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c | |||
@@ -1470,6 +1470,9 @@ static const struct wacom_features wacom_features_0xE3 = | |||
1470 | static const struct wacom_features wacom_features_0xE6 = | 1470 | static const struct wacom_features wacom_features_0xE6 = |
1471 | { "Wacom ISDv4 E6", WACOM_PKGLEN_TPC2FG, 27760, 15694, 255, | 1471 | { "Wacom ISDv4 E6", WACOM_PKGLEN_TPC2FG, 27760, 15694, 255, |
1472 | 0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; | 1472 | 0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; |
1473 | static const struct wacom_features wacom_features_0xEC = | ||
1474 | { "Wacom ISDv4 EC", WACOM_PKGLEN_GRAPHIRE, 25710, 14500, 255, | ||
1475 | 0, TABLETPC, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; | ||
1473 | static const struct wacom_features wacom_features_0x47 = | 1476 | static const struct wacom_features wacom_features_0x47 = |
1474 | { "Wacom Intuos2 6x8", WACOM_PKGLEN_INTUOS, 20320, 16240, 1023, | 1477 | { "Wacom Intuos2 6x8", WACOM_PKGLEN_INTUOS, 20320, 16240, 1023, |
1475 | 31, INTUOS, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; | 1478 | 31, INTUOS, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; |
@@ -1611,6 +1614,7 @@ const struct usb_device_id wacom_ids[] = { | |||
1611 | { USB_DEVICE_WACOM(0xE2) }, | 1614 | { USB_DEVICE_WACOM(0xE2) }, |
1612 | { USB_DEVICE_WACOM(0xE3) }, | 1615 | { USB_DEVICE_WACOM(0xE3) }, |
1613 | { USB_DEVICE_WACOM(0xE6) }, | 1616 | { USB_DEVICE_WACOM(0xE6) }, |
1617 | { USB_DEVICE_WACOM(0xEC) }, | ||
1614 | { USB_DEVICE_WACOM(0x47) }, | 1618 | { USB_DEVICE_WACOM(0x47) }, |
1615 | { USB_DEVICE_LENOVO(0x6004) }, | 1619 | { USB_DEVICE_LENOVO(0x6004) }, |
1616 | { } | 1620 | { } |
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 2fb2963df553..5b5fa5cdaa31 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c | |||
@@ -90,7 +90,7 @@ struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) | |||
90 | if (bus == NULL || bus->iommu_ops == NULL) | 90 | if (bus == NULL || bus->iommu_ops == NULL) |
91 | return NULL; | 91 | return NULL; |
92 | 92 | ||
93 | domain = kmalloc(sizeof(*domain), GFP_KERNEL); | 93 | domain = kzalloc(sizeof(*domain), GFP_KERNEL); |
94 | if (!domain) | 94 | if (!domain) |
95 | return NULL; | 95 | return NULL; |
96 | 96 | ||
diff --git a/drivers/md/bitmap.c b/drivers/md/bitmap.c index b6907118283a..6d03774b176e 100644 --- a/drivers/md/bitmap.c +++ b/drivers/md/bitmap.c | |||
@@ -1393,9 +1393,6 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto | |||
1393 | atomic_read(&bitmap->behind_writes), | 1393 | atomic_read(&bitmap->behind_writes), |
1394 | bitmap->mddev->bitmap_info.max_write_behind); | 1394 | bitmap->mddev->bitmap_info.max_write_behind); |
1395 | } | 1395 | } |
1396 | if (bitmap->mddev->degraded) | ||
1397 | /* Never clear bits or update events_cleared when degraded */ | ||
1398 | success = 0; | ||
1399 | 1396 | ||
1400 | while (sectors) { | 1397 | while (sectors) { |
1401 | sector_t blocks; | 1398 | sector_t blocks; |
@@ -1409,7 +1406,7 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto | |||
1409 | return; | 1406 | return; |
1410 | } | 1407 | } |
1411 | 1408 | ||
1412 | if (success && | 1409 | if (success && !bitmap->mddev->degraded && |
1413 | bitmap->events_cleared < bitmap->mddev->events) { | 1410 | bitmap->events_cleared < bitmap->mddev->events) { |
1414 | bitmap->events_cleared = bitmap->mddev->events; | 1411 | bitmap->events_cleared = bitmap->mddev->events; |
1415 | bitmap->need_sync = 1; | 1412 | bitmap->need_sync = 1; |
diff --git a/drivers/md/linear.c b/drivers/md/linear.c index c3273efd08cb..627456542fb3 100644 --- a/drivers/md/linear.c +++ b/drivers/md/linear.c | |||
@@ -230,6 +230,7 @@ static int linear_add(struct mddev *mddev, struct md_rdev *rdev) | |||
230 | return -EINVAL; | 230 | return -EINVAL; |
231 | 231 | ||
232 | rdev->raid_disk = rdev->saved_raid_disk; | 232 | rdev->raid_disk = rdev->saved_raid_disk; |
233 | rdev->saved_raid_disk = -1; | ||
233 | 234 | ||
234 | newconf = linear_conf(mddev,mddev->raid_disks+1); | 235 | newconf = linear_conf(mddev,mddev->raid_disks+1); |
235 | 236 | ||
diff --git a/drivers/md/md.c b/drivers/md/md.c index ee981737edfc..f47f1f8ac44b 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -7360,8 +7360,7 @@ static int remove_and_add_spares(struct mddev *mddev) | |||
7360 | spares++; | 7360 | spares++; |
7361 | md_new_event(mddev); | 7361 | md_new_event(mddev); |
7362 | set_bit(MD_CHANGE_DEVS, &mddev->flags); | 7362 | set_bit(MD_CHANGE_DEVS, &mddev->flags); |
7363 | } else | 7363 | } |
7364 | break; | ||
7365 | } | 7364 | } |
7366 | } | 7365 | } |
7367 | } | 7366 | } |
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 31670f8d6b65..858fdbb7eb07 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c | |||
@@ -3065,11 +3065,17 @@ static void analyse_stripe(struct stripe_head *sh, struct stripe_head_state *s) | |||
3065 | } | 3065 | } |
3066 | } else if (test_bit(In_sync, &rdev->flags)) | 3066 | } else if (test_bit(In_sync, &rdev->flags)) |
3067 | set_bit(R5_Insync, &dev->flags); | 3067 | set_bit(R5_Insync, &dev->flags); |
3068 | else { | 3068 | else if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset) |
3069 | /* in sync if before recovery_offset */ | 3069 | /* in sync if before recovery_offset */ |
3070 | if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset) | 3070 | set_bit(R5_Insync, &dev->flags); |
3071 | set_bit(R5_Insync, &dev->flags); | 3071 | else if (test_bit(R5_UPTODATE, &dev->flags) && |
3072 | } | 3072 | test_bit(R5_Expanded, &dev->flags)) |
3073 | /* If we've reshaped into here, we assume it is Insync. | ||
3074 | * We will shortly update recovery_offset to make | ||
3075 | * it official. | ||
3076 | */ | ||
3077 | set_bit(R5_Insync, &dev->flags); | ||
3078 | |||
3073 | if (rdev && test_bit(R5_WriteError, &dev->flags)) { | 3079 | if (rdev && test_bit(R5_WriteError, &dev->flags)) { |
3074 | clear_bit(R5_Insync, &dev->flags); | 3080 | clear_bit(R5_Insync, &dev->flags); |
3075 | if (!test_bit(Faulty, &rdev->flags)) { | 3081 | if (!test_bit(Faulty, &rdev->flags)) { |
diff --git a/drivers/media/common/tuners/mxl5007t.c b/drivers/media/common/tuners/mxl5007t.c index 7eb1bf75cd07..5d02221e99dd 100644 --- a/drivers/media/common/tuners/mxl5007t.c +++ b/drivers/media/common/tuners/mxl5007t.c | |||
@@ -488,9 +488,10 @@ static int mxl5007t_write_regs(struct mxl5007t_state *state, | |||
488 | 488 | ||
489 | static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val) | 489 | static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val) |
490 | { | 490 | { |
491 | u8 buf[2] = { 0xfb, reg }; | ||
491 | struct i2c_msg msg[] = { | 492 | struct i2c_msg msg[] = { |
492 | { .addr = state->i2c_props.addr, .flags = 0, | 493 | { .addr = state->i2c_props.addr, .flags = 0, |
493 | .buf = ®, .len = 1 }, | 494 | .buf = buf, .len = 2 }, |
494 | { .addr = state->i2c_props.addr, .flags = I2C_M_RD, | 495 | { .addr = state->i2c_props.addr, .flags = I2C_M_RD, |
495 | .buf = val, .len = 1 }, | 496 | .buf = val, .len = 1 }, |
496 | }; | 497 | }; |
diff --git a/drivers/media/common/tuners/tda18218.c b/drivers/media/common/tuners/tda18218.c index aacfe2387e28..4fc29730a12c 100644 --- a/drivers/media/common/tuners/tda18218.c +++ b/drivers/media/common/tuners/tda18218.c | |||
@@ -141,7 +141,7 @@ static int tda18218_set_params(struct dvb_frontend *fe, | |||
141 | switch (params->u.ofdm.bandwidth) { | 141 | switch (params->u.ofdm.bandwidth) { |
142 | case BANDWIDTH_6_MHZ: | 142 | case BANDWIDTH_6_MHZ: |
143 | LP_Fc = 0; | 143 | LP_Fc = 0; |
144 | LO_Frac = params->frequency + 4000000; | 144 | LO_Frac = params->frequency + 3000000; |
145 | break; | 145 | break; |
146 | case BANDWIDTH_7_MHZ: | 146 | case BANDWIDTH_7_MHZ: |
147 | LP_Fc = 1; | 147 | LP_Fc = 1; |
diff --git a/drivers/media/rc/ati_remote.c b/drivers/media/rc/ati_remote.c index 303f22ea04c0..01bb8daf4b09 100644 --- a/drivers/media/rc/ati_remote.c +++ b/drivers/media/rc/ati_remote.c | |||
@@ -189,7 +189,7 @@ struct ati_remote { | |||
189 | dma_addr_t inbuf_dma; | 189 | dma_addr_t inbuf_dma; |
190 | dma_addr_t outbuf_dma; | 190 | dma_addr_t outbuf_dma; |
191 | 191 | ||
192 | unsigned char old_data[2]; /* Detect duplicate events */ | 192 | unsigned char old_data; /* Detect duplicate events */ |
193 | unsigned long old_jiffies; | 193 | unsigned long old_jiffies; |
194 | unsigned long acc_jiffies; /* handle acceleration */ | 194 | unsigned long acc_jiffies; /* handle acceleration */ |
195 | unsigned long first_jiffies; | 195 | unsigned long first_jiffies; |
@@ -221,35 +221,35 @@ struct ati_remote { | |||
221 | /* Translation table from hardware messages to input events. */ | 221 | /* Translation table from hardware messages to input events. */ |
222 | static const struct { | 222 | static const struct { |
223 | short kind; | 223 | short kind; |
224 | unsigned char data1, data2; | 224 | unsigned char data; |
225 | int type; | 225 | int type; |
226 | unsigned int code; | 226 | unsigned int code; |
227 | int value; | 227 | int value; |
228 | } ati_remote_tbl[] = { | 228 | } ati_remote_tbl[] = { |
229 | /* Directional control pad axes */ | 229 | /* Directional control pad axes */ |
230 | {KIND_ACCEL, 0x35, 0x70, EV_REL, REL_X, -1}, /* left */ | 230 | {KIND_ACCEL, 0x70, EV_REL, REL_X, -1}, /* left */ |
231 | {KIND_ACCEL, 0x36, 0x71, EV_REL, REL_X, 1}, /* right */ | 231 | {KIND_ACCEL, 0x71, EV_REL, REL_X, 1}, /* right */ |
232 | {KIND_ACCEL, 0x37, 0x72, EV_REL, REL_Y, -1}, /* up */ | 232 | {KIND_ACCEL, 0x72, EV_REL, REL_Y, -1}, /* up */ |
233 | {KIND_ACCEL, 0x38, 0x73, EV_REL, REL_Y, 1}, /* down */ | 233 | {KIND_ACCEL, 0x73, EV_REL, REL_Y, 1}, /* down */ |
234 | /* Directional control pad diagonals */ | 234 | /* Directional control pad diagonals */ |
235 | {KIND_LU, 0x39, 0x74, EV_REL, 0, 0}, /* left up */ | 235 | {KIND_LU, 0x74, EV_REL, 0, 0}, /* left up */ |
236 | {KIND_RU, 0x3a, 0x75, EV_REL, 0, 0}, /* right up */ | 236 | {KIND_RU, 0x75, EV_REL, 0, 0}, /* right up */ |
237 | {KIND_LD, 0x3c, 0x77, EV_REL, 0, 0}, /* left down */ | 237 | {KIND_LD, 0x77, EV_REL, 0, 0}, /* left down */ |
238 | {KIND_RD, 0x3b, 0x76, EV_REL, 0, 0}, /* right down */ | 238 | {KIND_RD, 0x76, EV_REL, 0, 0}, /* right down */ |
239 | 239 | ||
240 | /* "Mouse button" buttons */ | 240 | /* "Mouse button" buttons */ |
241 | {KIND_LITERAL, 0x3d, 0x78, EV_KEY, BTN_LEFT, 1}, /* left btn down */ | 241 | {KIND_LITERAL, 0x78, EV_KEY, BTN_LEFT, 1}, /* left btn down */ |
242 | {KIND_LITERAL, 0x3e, 0x79, EV_KEY, BTN_LEFT, 0}, /* left btn up */ | 242 | {KIND_LITERAL, 0x79, EV_KEY, BTN_LEFT, 0}, /* left btn up */ |
243 | {KIND_LITERAL, 0x41, 0x7c, EV_KEY, BTN_RIGHT, 1},/* right btn down */ | 243 | {KIND_LITERAL, 0x7c, EV_KEY, BTN_RIGHT, 1},/* right btn down */ |
244 | {KIND_LITERAL, 0x42, 0x7d, EV_KEY, BTN_RIGHT, 0},/* right btn up */ | 244 | {KIND_LITERAL, 0x7d, EV_KEY, BTN_RIGHT, 0},/* right btn up */ |
245 | 245 | ||
246 | /* Artificial "doubleclick" events are generated by the hardware. | 246 | /* Artificial "doubleclick" events are generated by the hardware. |
247 | * They are mapped to the "side" and "extra" mouse buttons here. */ | 247 | * They are mapped to the "side" and "extra" mouse buttons here. */ |
248 | {KIND_FILTERED, 0x3f, 0x7a, EV_KEY, BTN_SIDE, 1}, /* left dblclick */ | 248 | {KIND_FILTERED, 0x7a, EV_KEY, BTN_SIDE, 1}, /* left dblclick */ |
249 | {KIND_FILTERED, 0x43, 0x7e, EV_KEY, BTN_EXTRA, 1},/* right dblclick */ | 249 | {KIND_FILTERED, 0x7e, EV_KEY, BTN_EXTRA, 1},/* right dblclick */ |
250 | 250 | ||
251 | /* Non-mouse events are handled by rc-core */ | 251 | /* Non-mouse events are handled by rc-core */ |
252 | {KIND_END, 0x00, 0x00, EV_MAX + 1, 0, 0} | 252 | {KIND_END, 0x00, EV_MAX + 1, 0, 0} |
253 | }; | 253 | }; |
254 | 254 | ||
255 | /* Local function prototypes */ | 255 | /* Local function prototypes */ |
@@ -397,25 +397,6 @@ static int ati_remote_sendpacket(struct ati_remote *ati_remote, u16 cmd, unsigne | |||
397 | } | 397 | } |
398 | 398 | ||
399 | /* | 399 | /* |
400 | * ati_remote_event_lookup | ||
401 | */ | ||
402 | static int ati_remote_event_lookup(int rem, unsigned char d1, unsigned char d2) | ||
403 | { | ||
404 | int i; | ||
405 | |||
406 | for (i = 0; ati_remote_tbl[i].kind != KIND_END; i++) { | ||
407 | /* | ||
408 | * Decide if the table entry matches the remote input. | ||
409 | */ | ||
410 | if (ati_remote_tbl[i].data1 == d1 && | ||
411 | ati_remote_tbl[i].data2 == d2) | ||
412 | return i; | ||
413 | |||
414 | } | ||
415 | return -1; | ||
416 | } | ||
417 | |||
418 | /* | ||
419 | * ati_remote_compute_accel | 400 | * ati_remote_compute_accel |
420 | * | 401 | * |
421 | * Implements acceleration curve for directional control pad | 402 | * Implements acceleration curve for directional control pad |
@@ -463,7 +444,15 @@ static void ati_remote_input_report(struct urb *urb) | |||
463 | int index = -1; | 444 | int index = -1; |
464 | int acc; | 445 | int acc; |
465 | int remote_num; | 446 | int remote_num; |
466 | unsigned char scancode[2]; | 447 | unsigned char scancode; |
448 | int i; | ||
449 | |||
450 | /* | ||
451 | * data[0] = 0x14 | ||
452 | * data[1] = data[2] + data[3] + 0xd5 (a checksum byte) | ||
453 | * data[2] = the key code (with toggle bit in MSB with some models) | ||
454 | * data[3] = channel << 4 (the low 4 bits must be zero) | ||
455 | */ | ||
467 | 456 | ||
468 | /* Deal with strange looking inputs */ | 457 | /* Deal with strange looking inputs */ |
469 | if ( (urb->actual_length != 4) || (data[0] != 0x14) || | 458 | if ( (urb->actual_length != 4) || (data[0] != 0x14) || |
@@ -472,6 +461,13 @@ static void ati_remote_input_report(struct urb *urb) | |||
472 | return; | 461 | return; |
473 | } | 462 | } |
474 | 463 | ||
464 | if (data[1] != ((data[2] + data[3] + 0xd5) & 0xff)) { | ||
465 | dbginfo(&ati_remote->interface->dev, | ||
466 | "wrong checksum in input: %02x %02x %02x %02x\n", | ||
467 | data[0], data[1], data[2], data[3]); | ||
468 | return; | ||
469 | } | ||
470 | |||
475 | /* Mask unwanted remote channels. */ | 471 | /* Mask unwanted remote channels. */ |
476 | /* note: remote_num is 0-based, channel 1 on remote == 0 here */ | 472 | /* note: remote_num is 0-based, channel 1 on remote == 0 here */ |
477 | remote_num = (data[3] >> 4) & 0x0f; | 473 | remote_num = (data[3] >> 4) & 0x0f; |
@@ -482,31 +478,30 @@ static void ati_remote_input_report(struct urb *urb) | |||
482 | return; | 478 | return; |
483 | } | 479 | } |
484 | 480 | ||
485 | scancode[0] = (((data[1] - ((remote_num + 1) << 4)) & 0xf0) | (data[1] & 0x0f)); | ||
486 | |||
487 | /* | 481 | /* |
488 | * Some devices (e.g. SnapStream Firefly) use 8080 as toggle code, | 482 | * MSB is a toggle code, though only used by some devices |
489 | * so we have to clear them. The first bit is a bit tricky as the | 483 | * (e.g. SnapStream Firefly) |
490 | * "non-toggled" state depends on remote_num, so we xor it with the | ||
491 | * second bit which is only used for toggle. | ||
492 | */ | 484 | */ |
493 | scancode[0] ^= (data[2] & 0x80); | 485 | scancode = data[2] & 0x7f; |
494 | |||
495 | scancode[1] = data[2] & ~0x80; | ||
496 | 486 | ||
497 | /* Look up event code index in mouse translation table. */ | 487 | /* Look up event code index in the mouse translation table. */ |
498 | index = ati_remote_event_lookup(remote_num, scancode[0], scancode[1]); | 488 | for (i = 0; ati_remote_tbl[i].kind != KIND_END; i++) { |
489 | if (scancode == ati_remote_tbl[i].data) { | ||
490 | index = i; | ||
491 | break; | ||
492 | } | ||
493 | } | ||
499 | 494 | ||
500 | if (index >= 0) { | 495 | if (index >= 0) { |
501 | dbginfo(&ati_remote->interface->dev, | 496 | dbginfo(&ati_remote->interface->dev, |
502 | "channel 0x%02x; mouse data %02x,%02x; index %d; keycode %d\n", | 497 | "channel 0x%02x; mouse data %02x; index %d; keycode %d\n", |
503 | remote_num, data[1], data[2], index, ati_remote_tbl[index].code); | 498 | remote_num, data[2], index, ati_remote_tbl[index].code); |
504 | if (!dev) | 499 | if (!dev) |
505 | return; /* no mouse device */ | 500 | return; /* no mouse device */ |
506 | } else | 501 | } else |
507 | dbginfo(&ati_remote->interface->dev, | 502 | dbginfo(&ati_remote->interface->dev, |
508 | "channel 0x%02x; key data %02x,%02x, scancode %02x,%02x\n", | 503 | "channel 0x%02x; key data %02x, scancode %02x\n", |
509 | remote_num, data[1], data[2], scancode[0], scancode[1]); | 504 | remote_num, data[2], scancode); |
510 | 505 | ||
511 | 506 | ||
512 | if (index >= 0 && ati_remote_tbl[index].kind == KIND_LITERAL) { | 507 | if (index >= 0 && ati_remote_tbl[index].kind == KIND_LITERAL) { |
@@ -523,8 +518,7 @@ static void ati_remote_input_report(struct urb *urb) | |||
523 | unsigned long now = jiffies; | 518 | unsigned long now = jiffies; |
524 | 519 | ||
525 | /* Filter duplicate events which happen "too close" together. */ | 520 | /* Filter duplicate events which happen "too close" together. */ |
526 | if (ati_remote->old_data[0] == data[1] && | 521 | if (ati_remote->old_data == data[2] && |
527 | ati_remote->old_data[1] == data[2] && | ||
528 | time_before(now, ati_remote->old_jiffies + | 522 | time_before(now, ati_remote->old_jiffies + |
529 | msecs_to_jiffies(repeat_filter))) { | 523 | msecs_to_jiffies(repeat_filter))) { |
530 | ati_remote->repeat_count++; | 524 | ati_remote->repeat_count++; |
@@ -533,8 +527,7 @@ static void ati_remote_input_report(struct urb *urb) | |||
533 | ati_remote->first_jiffies = now; | 527 | ati_remote->first_jiffies = now; |
534 | } | 528 | } |
535 | 529 | ||
536 | ati_remote->old_data[0] = data[1]; | 530 | ati_remote->old_data = data[2]; |
537 | ati_remote->old_data[1] = data[2]; | ||
538 | ati_remote->old_jiffies = now; | 531 | ati_remote->old_jiffies = now; |
539 | 532 | ||
540 | /* Ensure we skip at least the 4 first duplicate events (generated | 533 | /* Ensure we skip at least the 4 first duplicate events (generated |
@@ -549,14 +542,13 @@ static void ati_remote_input_report(struct urb *urb) | |||
549 | 542 | ||
550 | if (index < 0) { | 543 | if (index < 0) { |
551 | /* Not a mouse event, hand it to rc-core. */ | 544 | /* Not a mouse event, hand it to rc-core. */ |
552 | u32 rc_code = (scancode[0] << 8) | scancode[1]; | ||
553 | 545 | ||
554 | /* | 546 | /* |
555 | * We don't use the rc-core repeat handling yet as | 547 | * We don't use the rc-core repeat handling yet as |
556 | * it would cause ghost repeats which would be a | 548 | * it would cause ghost repeats which would be a |
557 | * regression for this driver. | 549 | * regression for this driver. |
558 | */ | 550 | */ |
559 | rc_keydown_notimeout(ati_remote->rdev, rc_code, | 551 | rc_keydown_notimeout(ati_remote->rdev, scancode, |
560 | data[2]); | 552 | data[2]); |
561 | rc_keyup(ati_remote->rdev); | 553 | rc_keyup(ati_remote->rdev); |
562 | return; | 554 | return; |
@@ -607,8 +599,7 @@ static void ati_remote_input_report(struct urb *urb) | |||
607 | input_sync(dev); | 599 | input_sync(dev); |
608 | 600 | ||
609 | ati_remote->old_jiffies = jiffies; | 601 | ati_remote->old_jiffies = jiffies; |
610 | ati_remote->old_data[0] = data[1]; | 602 | ati_remote->old_data = data[2]; |
611 | ati_remote->old_data[1] = data[2]; | ||
612 | } | 603 | } |
613 | } | 604 | } |
614 | 605 | ||
diff --git a/drivers/media/rc/keymaps/rc-ati-x10.c b/drivers/media/rc/keymaps/rc-ati-x10.c index e1b8b2605c48..81506440eded 100644 --- a/drivers/media/rc/keymaps/rc-ati-x10.c +++ b/drivers/media/rc/keymaps/rc-ati-x10.c | |||
@@ -27,55 +27,55 @@ | |||
27 | #include <media/rc-map.h> | 27 | #include <media/rc-map.h> |
28 | 28 | ||
29 | static struct rc_map_table ati_x10[] = { | 29 | static struct rc_map_table ati_x10[] = { |
30 | { 0xd20d, KEY_1 }, | 30 | { 0x0d, KEY_1 }, |
31 | { 0xd30e, KEY_2 }, | 31 | { 0x0e, KEY_2 }, |
32 | { 0xd40f, KEY_3 }, | 32 | { 0x0f, KEY_3 }, |
33 | { 0xd510, KEY_4 }, | 33 | { 0x10, KEY_4 }, |
34 | { 0xd611, KEY_5 }, | 34 | { 0x11, KEY_5 }, |
35 | { 0xd712, KEY_6 }, | 35 | { 0x12, KEY_6 }, |
36 | { 0xd813, KEY_7 }, | 36 | { 0x13, KEY_7 }, |
37 | { 0xd914, KEY_8 }, | 37 | { 0x14, KEY_8 }, |
38 | { 0xda15, KEY_9 }, | 38 | { 0x15, KEY_9 }, |
39 | { 0xdc17, KEY_0 }, | 39 | { 0x17, KEY_0 }, |
40 | { 0xc500, KEY_A }, | 40 | { 0x00, KEY_A }, |
41 | { 0xc601, KEY_B }, | 41 | { 0x01, KEY_B }, |
42 | { 0xde19, KEY_C }, | 42 | { 0x19, KEY_C }, |
43 | { 0xe01b, KEY_D }, | 43 | { 0x1b, KEY_D }, |
44 | { 0xe621, KEY_E }, | 44 | { 0x21, KEY_E }, |
45 | { 0xe823, KEY_F }, | 45 | { 0x23, KEY_F }, |
46 | 46 | ||
47 | { 0xdd18, KEY_KPENTER }, /* "check" */ | 47 | { 0x18, KEY_KPENTER }, /* "check" */ |
48 | { 0xdb16, KEY_MENU }, /* "menu" */ | 48 | { 0x16, KEY_MENU }, /* "menu" */ |
49 | { 0xc702, KEY_POWER }, /* Power */ | 49 | { 0x02, KEY_POWER }, /* Power */ |
50 | { 0xc803, KEY_TV }, /* TV */ | 50 | { 0x03, KEY_TV }, /* TV */ |
51 | { 0xc904, KEY_DVD }, /* DVD */ | 51 | { 0x04, KEY_DVD }, /* DVD */ |
52 | { 0xca05, KEY_WWW }, /* WEB */ | 52 | { 0x05, KEY_WWW }, /* WEB */ |
53 | { 0xcb06, KEY_BOOKMARKS }, /* "book" */ | 53 | { 0x06, KEY_BOOKMARKS }, /* "book" */ |
54 | { 0xcc07, KEY_EDIT }, /* "hand" */ | 54 | { 0x07, KEY_EDIT }, /* "hand" */ |
55 | { 0xe11c, KEY_COFFEE }, /* "timer" */ | 55 | { 0x1c, KEY_COFFEE }, /* "timer" */ |
56 | { 0xe520, KEY_FRONT }, /* "max" */ | 56 | { 0x20, KEY_FRONT }, /* "max" */ |
57 | { 0xe21d, KEY_LEFT }, /* left */ | 57 | { 0x1d, KEY_LEFT }, /* left */ |
58 | { 0xe41f, KEY_RIGHT }, /* right */ | 58 | { 0x1f, KEY_RIGHT }, /* right */ |
59 | { 0xe722, KEY_DOWN }, /* down */ | 59 | { 0x22, KEY_DOWN }, /* down */ |
60 | { 0xdf1a, KEY_UP }, /* up */ | 60 | { 0x1a, KEY_UP }, /* up */ |
61 | { 0xe31e, KEY_OK }, /* "OK" */ | 61 | { 0x1e, KEY_OK }, /* "OK" */ |
62 | { 0xce09, KEY_VOLUMEDOWN }, /* VOL + */ | 62 | { 0x09, KEY_VOLUMEDOWN }, /* VOL + */ |
63 | { 0xcd08, KEY_VOLUMEUP }, /* VOL - */ | 63 | { 0x08, KEY_VOLUMEUP }, /* VOL - */ |
64 | { 0xcf0a, KEY_MUTE }, /* MUTE */ | 64 | { 0x0a, KEY_MUTE }, /* MUTE */ |
65 | { 0xd00b, KEY_CHANNELUP }, /* CH + */ | 65 | { 0x0b, KEY_CHANNELUP }, /* CH + */ |
66 | { 0xd10c, KEY_CHANNELDOWN },/* CH - */ | 66 | { 0x0c, KEY_CHANNELDOWN },/* CH - */ |
67 | { 0xec27, KEY_RECORD }, /* ( o) red */ | 67 | { 0x27, KEY_RECORD }, /* ( o) red */ |
68 | { 0xea25, KEY_PLAY }, /* ( >) */ | 68 | { 0x25, KEY_PLAY }, /* ( >) */ |
69 | { 0xe924, KEY_REWIND }, /* (<<) */ | 69 | { 0x24, KEY_REWIND }, /* (<<) */ |
70 | { 0xeb26, KEY_FORWARD }, /* (>>) */ | 70 | { 0x26, KEY_FORWARD }, /* (>>) */ |
71 | { 0xed28, KEY_STOP }, /* ([]) */ | 71 | { 0x28, KEY_STOP }, /* ([]) */ |
72 | { 0xee29, KEY_PAUSE }, /* ('') */ | 72 | { 0x29, KEY_PAUSE }, /* ('') */ |
73 | { 0xf02b, KEY_PREVIOUS }, /* (<-) */ | 73 | { 0x2b, KEY_PREVIOUS }, /* (<-) */ |
74 | { 0xef2a, KEY_NEXT }, /* (>+) */ | 74 | { 0x2a, KEY_NEXT }, /* (>+) */ |
75 | { 0xf22d, KEY_INFO }, /* PLAYING */ | 75 | { 0x2d, KEY_INFO }, /* PLAYING */ |
76 | { 0xf32e, KEY_HOME }, /* TOP */ | 76 | { 0x2e, KEY_HOME }, /* TOP */ |
77 | { 0xf42f, KEY_END }, /* END */ | 77 | { 0x2f, KEY_END }, /* END */ |
78 | { 0xf530, KEY_SELECT }, /* SELECT */ | 78 | { 0x30, KEY_SELECT }, /* SELECT */ |
79 | }; | 79 | }; |
80 | 80 | ||
81 | static struct rc_map_list ati_x10_map = { | 81 | static struct rc_map_list ati_x10_map = { |
diff --git a/drivers/media/rc/keymaps/rc-medion-x10.c b/drivers/media/rc/keymaps/rc-medion-x10.c index 09e2cc01d110..479cdb897810 100644 --- a/drivers/media/rc/keymaps/rc-medion-x10.c +++ b/drivers/media/rc/keymaps/rc-medion-x10.c | |||
@@ -25,70 +25,70 @@ | |||
25 | #include <media/rc-map.h> | 25 | #include <media/rc-map.h> |
26 | 26 | ||
27 | static struct rc_map_table medion_x10[] = { | 27 | static struct rc_map_table medion_x10[] = { |
28 | { 0xf12c, KEY_TV }, /* TV */ | 28 | { 0x2c, KEY_TV }, /* TV */ |
29 | { 0xf22d, KEY_VCR }, /* VCR */ | 29 | { 0x2d, KEY_VCR }, /* VCR */ |
30 | { 0xc904, KEY_DVD }, /* DVD */ | 30 | { 0x04, KEY_DVD }, /* DVD */ |
31 | { 0xcb06, KEY_AUDIO }, /* MUSIC */ | 31 | { 0x06, KEY_AUDIO }, /* MUSIC */ |
32 | 32 | ||
33 | { 0xf32e, KEY_RADIO }, /* RADIO */ | 33 | { 0x2e, KEY_RADIO }, /* RADIO */ |
34 | { 0xca05, KEY_DIRECTORY }, /* PHOTO */ | 34 | { 0x05, KEY_DIRECTORY }, /* PHOTO */ |
35 | { 0xf42f, KEY_INFO }, /* TV-PREVIEW */ | 35 | { 0x2f, KEY_INFO }, /* TV-PREVIEW */ |
36 | { 0xf530, KEY_LIST }, /* CHANNEL-LST */ | 36 | { 0x30, KEY_LIST }, /* CHANNEL-LST */ |
37 | 37 | ||
38 | { 0xe01b, KEY_SETUP }, /* SETUP */ | 38 | { 0x1b, KEY_SETUP }, /* SETUP */ |
39 | { 0xf631, KEY_VIDEO }, /* VIDEO DESKTOP */ | 39 | { 0x31, KEY_VIDEO }, /* VIDEO DESKTOP */ |
40 | 40 | ||
41 | { 0xcd08, KEY_VOLUMEDOWN }, /* VOL - */ | 41 | { 0x08, KEY_VOLUMEDOWN }, /* VOL - */ |
42 | { 0xce09, KEY_VOLUMEUP }, /* VOL + */ | 42 | { 0x09, KEY_VOLUMEUP }, /* VOL + */ |
43 | { 0xd00b, KEY_CHANNELUP }, /* CHAN + */ | 43 | { 0x0b, KEY_CHANNELUP }, /* CHAN + */ |
44 | { 0xd10c, KEY_CHANNELDOWN }, /* CHAN - */ | 44 | { 0x0c, KEY_CHANNELDOWN }, /* CHAN - */ |
45 | { 0xc500, KEY_MUTE }, /* MUTE */ | 45 | { 0x00, KEY_MUTE }, /* MUTE */ |
46 | 46 | ||
47 | { 0xf732, KEY_RED }, /* red */ | 47 | { 0x32, KEY_RED }, /* red */ |
48 | { 0xf833, KEY_GREEN }, /* green */ | 48 | { 0x33, KEY_GREEN }, /* green */ |
49 | { 0xf934, KEY_YELLOW }, /* yellow */ | 49 | { 0x34, KEY_YELLOW }, /* yellow */ |
50 | { 0xfa35, KEY_BLUE }, /* blue */ | 50 | { 0x35, KEY_BLUE }, /* blue */ |
51 | { 0xdb16, KEY_TEXT }, /* TXT */ | 51 | { 0x16, KEY_TEXT }, /* TXT */ |
52 | 52 | ||
53 | { 0xd20d, KEY_1 }, | 53 | { 0x0d, KEY_1 }, |
54 | { 0xd30e, KEY_2 }, | 54 | { 0x0e, KEY_2 }, |
55 | { 0xd40f, KEY_3 }, | 55 | { 0x0f, KEY_3 }, |
56 | { 0xd510, KEY_4 }, | 56 | { 0x10, KEY_4 }, |
57 | { 0xd611, KEY_5 }, | 57 | { 0x11, KEY_5 }, |
58 | { 0xd712, KEY_6 }, | 58 | { 0x12, KEY_6 }, |
59 | { 0xd813, KEY_7 }, | 59 | { 0x13, KEY_7 }, |
60 | { 0xd914, KEY_8 }, | 60 | { 0x14, KEY_8 }, |
61 | { 0xda15, KEY_9 }, | 61 | { 0x15, KEY_9 }, |
62 | { 0xdc17, KEY_0 }, | 62 | { 0x17, KEY_0 }, |
63 | { 0xe11c, KEY_SEARCH }, /* TV/RAD, CH SRC */ | 63 | { 0x1c, KEY_SEARCH }, /* TV/RAD, CH SRC */ |
64 | { 0xe520, KEY_DELETE }, /* DELETE */ | 64 | { 0x20, KEY_DELETE }, /* DELETE */ |
65 | 65 | ||
66 | { 0xfb36, KEY_KEYBOARD }, /* RENAME */ | 66 | { 0x36, KEY_KEYBOARD }, /* RENAME */ |
67 | { 0xdd18, KEY_SCREEN }, /* SNAPSHOT */ | 67 | { 0x18, KEY_SCREEN }, /* SNAPSHOT */ |
68 | 68 | ||
69 | { 0xdf1a, KEY_UP }, /* up */ | 69 | { 0x1a, KEY_UP }, /* up */ |
70 | { 0xe722, KEY_DOWN }, /* down */ | 70 | { 0x22, KEY_DOWN }, /* down */ |
71 | { 0xe21d, KEY_LEFT }, /* left */ | 71 | { 0x1d, KEY_LEFT }, /* left */ |
72 | { 0xe41f, KEY_RIGHT }, /* right */ | 72 | { 0x1f, KEY_RIGHT }, /* right */ |
73 | { 0xe31e, KEY_OK }, /* OK */ | 73 | { 0x1e, KEY_OK }, /* OK */ |
74 | 74 | ||
75 | { 0xfc37, KEY_SELECT }, /* ACQUIRE IMAGE */ | 75 | { 0x37, KEY_SELECT }, /* ACQUIRE IMAGE */ |
76 | { 0xfd38, KEY_EDIT }, /* EDIT IMAGE */ | 76 | { 0x38, KEY_EDIT }, /* EDIT IMAGE */ |
77 | 77 | ||
78 | { 0xe924, KEY_REWIND }, /* rewind (<<) */ | 78 | { 0x24, KEY_REWIND }, /* rewind (<<) */ |
79 | { 0xea25, KEY_PLAY }, /* play ( >) */ | 79 | { 0x25, KEY_PLAY }, /* play ( >) */ |
80 | { 0xeb26, KEY_FORWARD }, /* forward (>>) */ | 80 | { 0x26, KEY_FORWARD }, /* forward (>>) */ |
81 | { 0xec27, KEY_RECORD }, /* record ( o) */ | 81 | { 0x27, KEY_RECORD }, /* record ( o) */ |
82 | { 0xed28, KEY_STOP }, /* stop ([]) */ | 82 | { 0x28, KEY_STOP }, /* stop ([]) */ |
83 | { 0xee29, KEY_PAUSE }, /* pause ('') */ | 83 | { 0x29, KEY_PAUSE }, /* pause ('') */ |
84 | 84 | ||
85 | { 0xe621, KEY_PREVIOUS }, /* prev */ | 85 | { 0x21, KEY_PREVIOUS }, /* prev */ |
86 | { 0xfe39, KEY_SWITCHVIDEOMODE }, /* F SCR */ | 86 | { 0x39, KEY_SWITCHVIDEOMODE }, /* F SCR */ |
87 | { 0xe823, KEY_NEXT }, /* next */ | 87 | { 0x23, KEY_NEXT }, /* next */ |
88 | { 0xde19, KEY_MENU }, /* MENU */ | 88 | { 0x19, KEY_MENU }, /* MENU */ |
89 | { 0xff3a, KEY_LANGUAGE }, /* AUDIO */ | 89 | { 0x3a, KEY_LANGUAGE }, /* AUDIO */ |
90 | 90 | ||
91 | { 0xc702, KEY_POWER }, /* POWER */ | 91 | { 0x02, KEY_POWER }, /* POWER */ |
92 | }; | 92 | }; |
93 | 93 | ||
94 | static struct rc_map_list medion_x10_map = { | 94 | static struct rc_map_list medion_x10_map = { |
diff --git a/drivers/media/rc/keymaps/rc-snapstream-firefly.c b/drivers/media/rc/keymaps/rc-snapstream-firefly.c index ef146520931c..c7f33ec719b4 100644 --- a/drivers/media/rc/keymaps/rc-snapstream-firefly.c +++ b/drivers/media/rc/keymaps/rc-snapstream-firefly.c | |||
@@ -22,63 +22,63 @@ | |||
22 | #include <media/rc-map.h> | 22 | #include <media/rc-map.h> |
23 | 23 | ||
24 | static struct rc_map_table snapstream_firefly[] = { | 24 | static struct rc_map_table snapstream_firefly[] = { |
25 | { 0xf12c, KEY_ZOOM }, /* Maximize */ | 25 | { 0x2c, KEY_ZOOM }, /* Maximize */ |
26 | { 0xc702, KEY_CLOSE }, | 26 | { 0x02, KEY_CLOSE }, |
27 | 27 | ||
28 | { 0xd20d, KEY_1 }, | 28 | { 0x0d, KEY_1 }, |
29 | { 0xd30e, KEY_2 }, | 29 | { 0x0e, KEY_2 }, |
30 | { 0xd40f, KEY_3 }, | 30 | { 0x0f, KEY_3 }, |
31 | { 0xd510, KEY_4 }, | 31 | { 0x10, KEY_4 }, |
32 | { 0xd611, KEY_5 }, | 32 | { 0x11, KEY_5 }, |
33 | { 0xd712, KEY_6 }, | 33 | { 0x12, KEY_6 }, |
34 | { 0xd813, KEY_7 }, | 34 | { 0x13, KEY_7 }, |
35 | { 0xd914, KEY_8 }, | 35 | { 0x14, KEY_8 }, |
36 | { 0xda15, KEY_9 }, | 36 | { 0x15, KEY_9 }, |
37 | { 0xdc17, KEY_0 }, | 37 | { 0x17, KEY_0 }, |
38 | { 0xdb16, KEY_BACK }, | 38 | { 0x16, KEY_BACK }, |
39 | { 0xdd18, KEY_KPENTER }, /* ent */ | 39 | { 0x18, KEY_KPENTER }, /* ent */ |
40 | 40 | ||
41 | { 0xce09, KEY_VOLUMEUP }, | 41 | { 0x09, KEY_VOLUMEUP }, |
42 | { 0xcd08, KEY_VOLUMEDOWN }, | 42 | { 0x08, KEY_VOLUMEDOWN }, |
43 | { 0xcf0a, KEY_MUTE }, | 43 | { 0x0a, KEY_MUTE }, |
44 | { 0xd00b, KEY_CHANNELUP }, | 44 | { 0x0b, KEY_CHANNELUP }, |
45 | { 0xd10c, KEY_CHANNELDOWN }, | 45 | { 0x0c, KEY_CHANNELDOWN }, |
46 | { 0xc500, KEY_VENDOR }, /* firefly */ | 46 | { 0x00, KEY_VENDOR }, /* firefly */ |
47 | 47 | ||
48 | { 0xf32e, KEY_INFO }, | 48 | { 0x2e, KEY_INFO }, |
49 | { 0xf42f, KEY_OPTION }, | 49 | { 0x2f, KEY_OPTION }, |
50 | 50 | ||
51 | { 0xe21d, KEY_LEFT }, | 51 | { 0x1d, KEY_LEFT }, |
52 | { 0xe41f, KEY_RIGHT }, | 52 | { 0x1f, KEY_RIGHT }, |
53 | { 0xe722, KEY_DOWN }, | 53 | { 0x22, KEY_DOWN }, |
54 | { 0xdf1a, KEY_UP }, | 54 | { 0x1a, KEY_UP }, |
55 | { 0xe31e, KEY_OK }, | 55 | { 0x1e, KEY_OK }, |
56 | 56 | ||
57 | { 0xe11c, KEY_MENU }, | 57 | { 0x1c, KEY_MENU }, |
58 | { 0xe520, KEY_EXIT }, | 58 | { 0x20, KEY_EXIT }, |
59 | 59 | ||
60 | { 0xec27, KEY_RECORD }, | 60 | { 0x27, KEY_RECORD }, |
61 | { 0xea25, KEY_PLAY }, | 61 | { 0x25, KEY_PLAY }, |
62 | { 0xed28, KEY_STOP }, | 62 | { 0x28, KEY_STOP }, |
63 | { 0xe924, KEY_REWIND }, | 63 | { 0x24, KEY_REWIND }, |
64 | { 0xeb26, KEY_FORWARD }, | 64 | { 0x26, KEY_FORWARD }, |
65 | { 0xee29, KEY_PAUSE }, | 65 | { 0x29, KEY_PAUSE }, |
66 | { 0xf02b, KEY_PREVIOUS }, | 66 | { 0x2b, KEY_PREVIOUS }, |
67 | { 0xef2a, KEY_NEXT }, | 67 | { 0x2a, KEY_NEXT }, |
68 | 68 | ||
69 | { 0xcb06, KEY_AUDIO }, /* Music */ | 69 | { 0x06, KEY_AUDIO }, /* Music */ |
70 | { 0xca05, KEY_IMAGES }, /* Photos */ | 70 | { 0x05, KEY_IMAGES }, /* Photos */ |
71 | { 0xc904, KEY_DVD }, | 71 | { 0x04, KEY_DVD }, |
72 | { 0xc803, KEY_TV }, | 72 | { 0x03, KEY_TV }, |
73 | { 0xcc07, KEY_VIDEO }, | 73 | { 0x07, KEY_VIDEO }, |
74 | 74 | ||
75 | { 0xc601, KEY_HELP }, | 75 | { 0x01, KEY_HELP }, |
76 | { 0xf22d, KEY_MODE }, /* Mouse */ | 76 | { 0x2d, KEY_MODE }, /* Mouse */ |
77 | 77 | ||
78 | { 0xde19, KEY_A }, | 78 | { 0x19, KEY_A }, |
79 | { 0xe01b, KEY_B }, | 79 | { 0x1b, KEY_B }, |
80 | { 0xe621, KEY_C }, | 80 | { 0x21, KEY_C }, |
81 | { 0xe823, KEY_D }, | 81 | { 0x23, KEY_D }, |
82 | }; | 82 | }; |
83 | 83 | ||
84 | static struct rc_map_list snapstream_firefly_map = { | 84 | static struct rc_map_list snapstream_firefly_map = { |
diff --git a/drivers/media/video/au0828/au0828-cards.c b/drivers/media/video/au0828/au0828-cards.c index 39fc923fc46b..1c6015a04f96 100644 --- a/drivers/media/video/au0828/au0828-cards.c +++ b/drivers/media/video/au0828/au0828-cards.c | |||
@@ -162,11 +162,14 @@ static void hauppauge_eeprom(struct au0828_dev *dev, u8 *eeprom_data) | |||
162 | switch (tv.model) { | 162 | switch (tv.model) { |
163 | case 72000: /* WinTV-HVR950q (Retail, IR, ATSC/QAM */ | 163 | case 72000: /* WinTV-HVR950q (Retail, IR, ATSC/QAM */ |
164 | case 72001: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ | 164 | case 72001: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ |
165 | case 72101: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ | ||
166 | case 72201: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ | ||
165 | case 72211: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ | 167 | case 72211: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ |
166 | case 72221: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ | 168 | case 72221: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ |
167 | case 72231: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ | 169 | case 72231: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ |
168 | case 72241: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM and analog video */ | 170 | case 72241: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM and analog video */ |
169 | case 72251: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ | 171 | case 72251: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ |
172 | case 72261: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ | ||
170 | case 72301: /* WinTV-HVR850 (Retail, IR, ATSC and analog video */ | 173 | case 72301: /* WinTV-HVR850 (Retail, IR, ATSC and analog video */ |
171 | case 72500: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM */ | 174 | case 72500: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM */ |
172 | break; | 175 | break; |
@@ -324,6 +327,10 @@ struct usb_device_id au0828_usb_id_table[] = { | |||
324 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL }, | 327 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL }, |
325 | { USB_DEVICE(0x2040, 0x8200), | 328 | { USB_DEVICE(0x2040, 0x8200), |
326 | .driver_info = AU0828_BOARD_HAUPPAUGE_WOODBURY }, | 329 | .driver_info = AU0828_BOARD_HAUPPAUGE_WOODBURY }, |
330 | { USB_DEVICE(0x2040, 0x7260), | ||
331 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, | ||
332 | { USB_DEVICE(0x2040, 0x7213), | ||
333 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, | ||
327 | { }, | 334 | { }, |
328 | }; | 335 | }; |
329 | 336 | ||
diff --git a/drivers/media/video/davinci/vpif.h b/drivers/media/video/davinci/vpif.h index 10550bd93b06..25036cb11bea 100644 --- a/drivers/media/video/davinci/vpif.h +++ b/drivers/media/video/davinci/vpif.h | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/videodev2.h> | 20 | #include <linux/videodev2.h> |
21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
22 | #include <mach/dm646x.h> | 22 | #include <mach/dm646x.h> |
23 | #include <media/davinci/vpif_types.h> | ||
23 | 24 | ||
24 | /* Maximum channel allowed */ | 25 | /* Maximum channel allowed */ |
25 | #define VPIF_NUM_CHANNELS (4) | 26 | #define VPIF_NUM_CHANNELS (4) |
diff --git a/drivers/media/video/davinci/vpif_capture.h b/drivers/media/video/davinci/vpif_capture.h index 064550f5ce4a..a693d4ebda55 100644 --- a/drivers/media/video/davinci/vpif_capture.h +++ b/drivers/media/video/davinci/vpif_capture.h | |||
@@ -27,7 +27,7 @@ | |||
27 | #include <media/v4l2-device.h> | 27 | #include <media/v4l2-device.h> |
28 | #include <media/videobuf-core.h> | 28 | #include <media/videobuf-core.h> |
29 | #include <media/videobuf-dma-contig.h> | 29 | #include <media/videobuf-dma-contig.h> |
30 | #include <mach/dm646x.h> | 30 | #include <media/davinci/vpif_types.h> |
31 | 31 | ||
32 | #include "vpif.h" | 32 | #include "vpif.h" |
33 | 33 | ||
diff --git a/drivers/media/video/davinci/vpif_display.h b/drivers/media/video/davinci/vpif_display.h index 5d1936dafed2..56879d1a0684 100644 --- a/drivers/media/video/davinci/vpif_display.h +++ b/drivers/media/video/davinci/vpif_display.h | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <media/v4l2-device.h> | 22 | #include <media/v4l2-device.h> |
23 | #include <media/videobuf-core.h> | 23 | #include <media/videobuf-core.h> |
24 | #include <media/videobuf-dma-contig.h> | 24 | #include <media/videobuf-dma-contig.h> |
25 | #include <media/davinci/vpif_types.h> | ||
25 | 26 | ||
26 | #include "vpif.h" | 27 | #include "vpif.h" |
27 | 28 | ||
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c index 881e04c7ffe6..2ca10dfec91f 100644 --- a/drivers/media/video/gspca/gspca.c +++ b/drivers/media/video/gspca/gspca.c | |||
@@ -838,13 +838,13 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev) | |||
838 | gspca_dev->usb_err = 0; | 838 | gspca_dev->usb_err = 0; |
839 | 839 | ||
840 | /* do the specific subdriver stuff before endpoint selection */ | 840 | /* do the specific subdriver stuff before endpoint selection */ |
841 | gspca_dev->alt = 0; | 841 | intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface); |
842 | gspca_dev->alt = gspca_dev->cam.bulk ? intf->num_altsetting : 0; | ||
842 | if (gspca_dev->sd_desc->isoc_init) { | 843 | if (gspca_dev->sd_desc->isoc_init) { |
843 | ret = gspca_dev->sd_desc->isoc_init(gspca_dev); | 844 | ret = gspca_dev->sd_desc->isoc_init(gspca_dev); |
844 | if (ret < 0) | 845 | if (ret < 0) |
845 | goto unlock; | 846 | goto unlock; |
846 | } | 847 | } |
847 | intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface); | ||
848 | xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK | 848 | xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK |
849 | : USB_ENDPOINT_XFER_ISOC; | 849 | : USB_ENDPOINT_XFER_ISOC; |
850 | 850 | ||
@@ -957,7 +957,7 @@ retry: | |||
957 | ret = -EIO; | 957 | ret = -EIO; |
958 | goto out; | 958 | goto out; |
959 | } | 959 | } |
960 | alt = ep_tb[--alt_idx].alt; | 960 | gspca_dev->alt = ep_tb[--alt_idx].alt; |
961 | } | 961 | } |
962 | } | 962 | } |
963 | out: | 963 | out: |
diff --git a/drivers/media/video/m5mols/m5mols.h b/drivers/media/video/m5mols/m5mols.h index 89d09a8914f8..82c8817bd32d 100644 --- a/drivers/media/video/m5mols/m5mols.h +++ b/drivers/media/video/m5mols/m5mols.h | |||
@@ -162,7 +162,6 @@ struct m5mols_version { | |||
162 | * @pad: media pad | 162 | * @pad: media pad |
163 | * @ffmt: current fmt according to resolution type | 163 | * @ffmt: current fmt according to resolution type |
164 | * @res_type: current resolution type | 164 | * @res_type: current resolution type |
165 | * @code: current code | ||
166 | * @irq_waitq: waitqueue for the capture | 165 | * @irq_waitq: waitqueue for the capture |
167 | * @work_irq: workqueue for the IRQ | 166 | * @work_irq: workqueue for the IRQ |
168 | * @flags: state variable for the interrupt handler | 167 | * @flags: state variable for the interrupt handler |
@@ -192,7 +191,6 @@ struct m5mols_info { | |||
192 | struct media_pad pad; | 191 | struct media_pad pad; |
193 | struct v4l2_mbus_framefmt ffmt[M5MOLS_RESTYPE_MAX]; | 192 | struct v4l2_mbus_framefmt ffmt[M5MOLS_RESTYPE_MAX]; |
194 | int res_type; | 193 | int res_type; |
195 | enum v4l2_mbus_pixelcode code; | ||
196 | wait_queue_head_t irq_waitq; | 194 | wait_queue_head_t irq_waitq; |
197 | struct work_struct work_irq; | 195 | struct work_struct work_irq; |
198 | unsigned long flags; | 196 | unsigned long flags; |
diff --git a/drivers/media/video/m5mols/m5mols_core.c b/drivers/media/video/m5mols/m5mols_core.c index 05ab3700647e..e0f09e531800 100644 --- a/drivers/media/video/m5mols/m5mols_core.c +++ b/drivers/media/video/m5mols/m5mols_core.c | |||
@@ -334,7 +334,7 @@ int m5mols_mode(struct m5mols_info *info, u8 mode) | |||
334 | int ret = -EINVAL; | 334 | int ret = -EINVAL; |
335 | u8 reg; | 335 | u8 reg; |
336 | 336 | ||
337 | if (mode < REG_PARAMETER && mode > REG_CAPTURE) | 337 | if (mode < REG_PARAMETER || mode > REG_CAPTURE) |
338 | return ret; | 338 | return ret; |
339 | 339 | ||
340 | ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, ®); | 340 | ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, ®); |
@@ -511,9 +511,6 @@ static int m5mols_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, | |||
511 | struct m5mols_info *info = to_m5mols(sd); | 511 | struct m5mols_info *info = to_m5mols(sd); |
512 | struct v4l2_mbus_framefmt *format; | 512 | struct v4l2_mbus_framefmt *format; |
513 | 513 | ||
514 | if (fmt->pad != 0) | ||
515 | return -EINVAL; | ||
516 | |||
517 | format = __find_format(info, fh, fmt->which, info->res_type); | 514 | format = __find_format(info, fh, fmt->which, info->res_type); |
518 | if (!format) | 515 | if (!format) |
519 | return -EINVAL; | 516 | return -EINVAL; |
@@ -532,9 +529,6 @@ static int m5mols_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, | |||
532 | u32 resolution = 0; | 529 | u32 resolution = 0; |
533 | int ret; | 530 | int ret; |
534 | 531 | ||
535 | if (fmt->pad != 0) | ||
536 | return -EINVAL; | ||
537 | |||
538 | ret = __find_resolution(sd, format, &type, &resolution); | 532 | ret = __find_resolution(sd, format, &type, &resolution); |
539 | if (ret < 0) | 533 | if (ret < 0) |
540 | return ret; | 534 | return ret; |
@@ -543,13 +537,14 @@ static int m5mols_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, | |||
543 | if (!sfmt) | 537 | if (!sfmt) |
544 | return 0; | 538 | return 0; |
545 | 539 | ||
546 | *sfmt = m5mols_default_ffmt[type]; | 540 | |
547 | sfmt->width = format->width; | 541 | format->code = m5mols_default_ffmt[type].code; |
548 | sfmt->height = format->height; | 542 | format->colorspace = V4L2_COLORSPACE_JPEG; |
543 | format->field = V4L2_FIELD_NONE; | ||
549 | 544 | ||
550 | if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { | 545 | if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { |
546 | *sfmt = *format; | ||
551 | info->resolution = resolution; | 547 | info->resolution = resolution; |
552 | info->code = format->code; | ||
553 | info->res_type = type; | 548 | info->res_type = type; |
554 | } | 549 | } |
555 | 550 | ||
@@ -626,13 +621,14 @@ static int m5mols_start_monitor(struct m5mols_info *info) | |||
626 | static int m5mols_s_stream(struct v4l2_subdev *sd, int enable) | 621 | static int m5mols_s_stream(struct v4l2_subdev *sd, int enable) |
627 | { | 622 | { |
628 | struct m5mols_info *info = to_m5mols(sd); | 623 | struct m5mols_info *info = to_m5mols(sd); |
624 | u32 code = info->ffmt[info->res_type].code; | ||
629 | 625 | ||
630 | if (enable) { | 626 | if (enable) { |
631 | int ret = -EINVAL; | 627 | int ret = -EINVAL; |
632 | 628 | ||
633 | if (is_code(info->code, M5MOLS_RESTYPE_MONITOR)) | 629 | if (is_code(code, M5MOLS_RESTYPE_MONITOR)) |
634 | ret = m5mols_start_monitor(info); | 630 | ret = m5mols_start_monitor(info); |
635 | if (is_code(info->code, M5MOLS_RESTYPE_CAPTURE)) | 631 | if (is_code(code, M5MOLS_RESTYPE_CAPTURE)) |
636 | ret = m5mols_start_capture(info); | 632 | ret = m5mols_start_capture(info); |
637 | 633 | ||
638 | return ret; | 634 | return ret; |
diff --git a/drivers/media/video/mt9m111.c b/drivers/media/video/mt9m111.c index cf2c0fb95f2f..398f96ffd35e 100644 --- a/drivers/media/video/mt9m111.c +++ b/drivers/media/video/mt9m111.c | |||
@@ -955,6 +955,7 @@ static int mt9m111_probe(struct i2c_client *client, | |||
955 | mt9m111->rect.height = MT9M111_MAX_HEIGHT; | 955 | mt9m111->rect.height = MT9M111_MAX_HEIGHT; |
956 | mt9m111->fmt = &mt9m111_colour_fmts[0]; | 956 | mt9m111->fmt = &mt9m111_colour_fmts[0]; |
957 | mt9m111->lastpage = -1; | 957 | mt9m111->lastpage = -1; |
958 | mutex_init(&mt9m111->power_lock); | ||
958 | 959 | ||
959 | ret = mt9m111_video_probe(client); | 960 | ret = mt9m111_video_probe(client); |
960 | if (ret) { | 961 | if (ret) { |
diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c index 32114a3c0ca7..7b34b11daf24 100644 --- a/drivers/media/video/mt9t112.c +++ b/drivers/media/video/mt9t112.c | |||
@@ -1083,8 +1083,10 @@ static int mt9t112_probe(struct i2c_client *client, | |||
1083 | v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops); | 1083 | v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops); |
1084 | 1084 | ||
1085 | ret = mt9t112_camera_probe(client); | 1085 | ret = mt9t112_camera_probe(client); |
1086 | if (ret) | 1086 | if (ret) { |
1087 | kfree(priv); | 1087 | kfree(priv); |
1088 | return ret; | ||
1089 | } | ||
1088 | 1090 | ||
1089 | /* Cannot fail: using the default supported pixel code */ | 1091 | /* Cannot fail: using the default supported pixel code */ |
1090 | mt9t112_set_params(priv, &rect, V4L2_MBUS_FMT_UYVY8_2X8); | 1092 | mt9t112_set_params(priv, &rect, V4L2_MBUS_FMT_UYVY8_2X8); |
diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c index 9c5c19f142de..ee0d0b39cd17 100644 --- a/drivers/media/video/omap/omap_vout.c +++ b/drivers/media/video/omap/omap_vout.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <linux/irq.h> | 38 | #include <linux/irq.h> |
39 | #include <linux/videodev2.h> | 39 | #include <linux/videodev2.h> |
40 | #include <linux/dma-mapping.h> | 40 | #include <linux/dma-mapping.h> |
41 | #include <linux/slab.h> | ||
41 | 42 | ||
42 | #include <media/videobuf-dma-contig.h> | 43 | #include <media/videobuf-dma-contig.h> |
43 | #include <media/v4l2-device.h> | 44 | #include <media/v4l2-device.h> |
@@ -2169,6 +2170,14 @@ static int __init omap_vout_probe(struct platform_device *pdev) | |||
2169 | vid_dev->num_displays = 0; | 2170 | vid_dev->num_displays = 0; |
2170 | for_each_dss_dev(dssdev) { | 2171 | for_each_dss_dev(dssdev) { |
2171 | omap_dss_get_device(dssdev); | 2172 | omap_dss_get_device(dssdev); |
2173 | |||
2174 | if (!dssdev->driver) { | ||
2175 | dev_warn(&pdev->dev, "no driver for display: %s\n", | ||
2176 | dssdev->name); | ||
2177 | omap_dss_put_device(dssdev); | ||
2178 | continue; | ||
2179 | } | ||
2180 | |||
2172 | vid_dev->displays[vid_dev->num_displays++] = dssdev; | 2181 | vid_dev->displays[vid_dev->num_displays++] = dssdev; |
2173 | } | 2182 | } |
2174 | 2183 | ||
diff --git a/drivers/media/video/omap1_camera.c b/drivers/media/video/omap1_camera.c index e87ae2f634b2..6a6cf388bae4 100644 --- a/drivers/media/video/omap1_camera.c +++ b/drivers/media/video/omap1_camera.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
25 | #include <linux/dma-mapping.h> | 25 | #include <linux/dma-mapping.h> |
26 | #include <linux/interrupt.h> | 26 | #include <linux/interrupt.h> |
27 | #include <linux/module.h> | ||
27 | #include <linux/platform_device.h> | 28 | #include <linux/platform_device.h> |
28 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
29 | 30 | ||
diff --git a/drivers/media/video/omap24xxcam-dma.c b/drivers/media/video/omap24xxcam-dma.c index 1d54b86c936b..3ea38a8def8e 100644 --- a/drivers/media/video/omap24xxcam-dma.c +++ b/drivers/media/video/omap24xxcam-dma.c | |||
@@ -506,7 +506,7 @@ int omap24xxcam_sgdma_queue(struct omap24xxcam_sgdma *sgdma, | |||
506 | unsigned long flags; | 506 | unsigned long flags; |
507 | struct sgdma_state *sg_state; | 507 | struct sgdma_state *sg_state; |
508 | 508 | ||
509 | if ((sglen < 0) || ((sglen > 0) & !sglist)) | 509 | if ((sglen < 0) || ((sglen > 0) && !sglist)) |
510 | return -EINVAL; | 510 | return -EINVAL; |
511 | 511 | ||
512 | spin_lock_irqsave(&sgdma->lock, flags); | 512 | spin_lock_irqsave(&sgdma->lock, flags); |
diff --git a/drivers/media/video/omap3isp/ispccdc.c b/drivers/media/video/omap3isp/ispccdc.c index b0b0fa5a3572..54a4a3f22e2e 100644 --- a/drivers/media/video/omap3isp/ispccdc.c +++ b/drivers/media/video/omap3isp/ispccdc.c | |||
@@ -1408,7 +1408,7 @@ static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc) | |||
1408 | { | 1408 | { |
1409 | struct isp_pipeline *pipe = | 1409 | struct isp_pipeline *pipe = |
1410 | to_isp_pipeline(&ccdc->video_out.video.entity); | 1410 | to_isp_pipeline(&ccdc->video_out.video.entity); |
1411 | struct video_device *vdev = &ccdc->subdev.devnode; | 1411 | struct video_device *vdev = ccdc->subdev.devnode; |
1412 | struct v4l2_event event; | 1412 | struct v4l2_event event; |
1413 | 1413 | ||
1414 | memset(&event, 0, sizeof(event)); | 1414 | memset(&event, 0, sizeof(event)); |
diff --git a/drivers/media/video/omap3isp/ispstat.c b/drivers/media/video/omap3isp/ispstat.c index 68d539456c55..bc0b2c7349b9 100644 --- a/drivers/media/video/omap3isp/ispstat.c +++ b/drivers/media/video/omap3isp/ispstat.c | |||
@@ -496,7 +496,7 @@ static int isp_stat_bufs_alloc(struct ispstat *stat, u32 size) | |||
496 | 496 | ||
497 | static void isp_stat_queue_event(struct ispstat *stat, int err) | 497 | static void isp_stat_queue_event(struct ispstat *stat, int err) |
498 | { | 498 | { |
499 | struct video_device *vdev = &stat->subdev.devnode; | 499 | struct video_device *vdev = stat->subdev.devnode; |
500 | struct v4l2_event event; | 500 | struct v4l2_event event; |
501 | struct omap3isp_stat_event_status *status = (void *)event.u.data; | 501 | struct omap3isp_stat_event_status *status = (void *)event.u.data; |
502 | 502 | ||
diff --git a/drivers/media/video/omap3isp/ispvideo.c b/drivers/media/video/omap3isp/ispvideo.c index d1000723c5ae..f2290578448c 100644 --- a/drivers/media/video/omap3isp/ispvideo.c +++ b/drivers/media/video/omap3isp/ispvideo.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/cacheflush.h> | 26 | #include <asm/cacheflush.h> |
27 | #include <linux/clk.h> | 27 | #include <linux/clk.h> |
28 | #include <linux/mm.h> | 28 | #include <linux/mm.h> |
29 | #include <linux/module.h> | ||
29 | #include <linux/pagemap.h> | 30 | #include <linux/pagemap.h> |
30 | #include <linux/scatterlist.h> | 31 | #include <linux/scatterlist.h> |
31 | #include <linux/sched.h> | 32 | #include <linux/sched.h> |
diff --git a/drivers/media/video/ov6650.c b/drivers/media/video/ov6650.c index 9f2d26b1d4cb..6806345ec2f0 100644 --- a/drivers/media/video/ov6650.c +++ b/drivers/media/video/ov6650.c | |||
@@ -540,7 +540,7 @@ static u8 to_clkrc(struct v4l2_fract *timeperframe, | |||
540 | static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf) | 540 | static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf) |
541 | { | 541 | { |
542 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 542 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
543 | struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; | 543 | struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd); |
544 | struct soc_camera_sense *sense = icd->sense; | 544 | struct soc_camera_sense *sense = icd->sense; |
545 | struct ov6650 *priv = to_ov6650(client); | 545 | struct ov6650 *priv = to_ov6650(client); |
546 | bool half_scale = !is_unscaled_ok(mf->width, mf->height, &priv->rect); | 546 | bool half_scale = !is_unscaled_ok(mf->width, mf->height, &priv->rect); |
diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index c8d91b0cd9bd..2cc3b9166724 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c | |||
@@ -98,6 +98,10 @@ static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend) | |||
98 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | 98 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); |
99 | } | 99 | } |
100 | set_bit(ST_CAPT_SUSPENDED, &fimc->state); | 100 | set_bit(ST_CAPT_SUSPENDED, &fimc->state); |
101 | |||
102 | fimc_hw_reset(fimc); | ||
103 | cap->buf_index = 0; | ||
104 | |||
101 | spin_unlock_irqrestore(&fimc->slock, flags); | 105 | spin_unlock_irqrestore(&fimc->slock, flags); |
102 | 106 | ||
103 | if (streaming) | 107 | if (streaming) |
@@ -137,7 +141,7 @@ int fimc_capture_config_update(struct fimc_ctx *ctx) | |||
137 | struct fimc_dev *fimc = ctx->fimc_dev; | 141 | struct fimc_dev *fimc = ctx->fimc_dev; |
138 | int ret; | 142 | int ret; |
139 | 143 | ||
140 | if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) | 144 | if (!test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) |
141 | return 0; | 145 | return 0; |
142 | 146 | ||
143 | spin_lock(&ctx->slock); | 147 | spin_lock(&ctx->slock); |
@@ -150,7 +154,7 @@ int fimc_capture_config_update(struct fimc_ctx *ctx) | |||
150 | fimc_hw_set_rotation(ctx); | 154 | fimc_hw_set_rotation(ctx); |
151 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); | 155 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); |
152 | fimc_hw_set_out_dma(ctx); | 156 | fimc_hw_set_out_dma(ctx); |
153 | set_bit(ST_CAPT_APPLY_CFG, &fimc->state); | 157 | clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); |
154 | } | 158 | } |
155 | spin_unlock(&ctx->slock); | 159 | spin_unlock(&ctx->slock); |
156 | return ret; | 160 | return ret; |
@@ -164,7 +168,6 @@ static int start_streaming(struct vb2_queue *q, unsigned int count) | |||
164 | int min_bufs; | 168 | int min_bufs; |
165 | int ret; | 169 | int ret; |
166 | 170 | ||
167 | fimc_hw_reset(fimc); | ||
168 | vid_cap->frame_count = 0; | 171 | vid_cap->frame_count = 0; |
169 | 172 | ||
170 | ret = fimc_init_capture(fimc); | 173 | ret = fimc_init_capture(fimc); |
@@ -523,7 +526,7 @@ static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx, | |||
523 | max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w; | 526 | max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w; |
524 | min_w = ctx->state & FIMC_DST_CROP ? dst->width : var->min_out_pixsize; | 527 | min_w = ctx->state & FIMC_DST_CROP ? dst->width : var->min_out_pixsize; |
525 | min_h = ctx->state & FIMC_DST_CROP ? dst->height : var->min_out_pixsize; | 528 | min_h = ctx->state & FIMC_DST_CROP ? dst->height : var->min_out_pixsize; |
526 | if (fimc->id == 1 && var->pix_hoff) | 529 | if (var->min_vsize_align == 1 && !rotation) |
527 | align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1; | 530 | align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1; |
528 | 531 | ||
529 | depth = fimc_get_format_depth(ffmt); | 532 | depth = fimc_get_format_depth(ffmt); |
@@ -1239,6 +1242,7 @@ static int fimc_subdev_set_fmt(struct v4l2_subdev *sd, | |||
1239 | 1242 | ||
1240 | mutex_lock(&fimc->lock); | 1243 | mutex_lock(&fimc->lock); |
1241 | set_frame_bounds(ff, mf->width, mf->height); | 1244 | set_frame_bounds(ff, mf->width, mf->height); |
1245 | fimc->vid_cap.mf = *mf; | ||
1242 | ff->fmt = ffmt; | 1246 | ff->fmt = ffmt; |
1243 | 1247 | ||
1244 | /* Reset the crop rectangle if required. */ | 1248 | /* Reset the crop rectangle if required. */ |
@@ -1375,7 +1379,7 @@ static void fimc_destroy_capture_subdev(struct fimc_dev *fimc) | |||
1375 | media_entity_cleanup(&sd->entity); | 1379 | media_entity_cleanup(&sd->entity); |
1376 | v4l2_device_unregister_subdev(sd); | 1380 | v4l2_device_unregister_subdev(sd); |
1377 | kfree(sd); | 1381 | kfree(sd); |
1378 | sd = NULL; | 1382 | fimc->vid_cap.subdev = NULL; |
1379 | } | 1383 | } |
1380 | 1384 | ||
1381 | /* Set default format at the sensor and host interface */ | 1385 | /* Set default format at the sensor and host interface */ |
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index 19ca6db38b2f..07c6254faee3 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c | |||
@@ -37,7 +37,7 @@ static char *fimc_clocks[MAX_FIMC_CLOCKS] = { | |||
37 | static struct fimc_fmt fimc_formats[] = { | 37 | static struct fimc_fmt fimc_formats[] = { |
38 | { | 38 | { |
39 | .name = "RGB565", | 39 | .name = "RGB565", |
40 | .fourcc = V4L2_PIX_FMT_RGB565X, | 40 | .fourcc = V4L2_PIX_FMT_RGB565, |
41 | .depth = { 16 }, | 41 | .depth = { 16 }, |
42 | .color = S5P_FIMC_RGB565, | 42 | .color = S5P_FIMC_RGB565, |
43 | .memplanes = 1, | 43 | .memplanes = 1, |
@@ -1038,12 +1038,11 @@ static int fimc_try_fmt_mplane(struct fimc_ctx *ctx, struct v4l2_format *f) | |||
1038 | mod_x = 6; /* 64 x 32 pixels tile */ | 1038 | mod_x = 6; /* 64 x 32 pixels tile */ |
1039 | mod_y = 5; | 1039 | mod_y = 5; |
1040 | } else { | 1040 | } else { |
1041 | if (fimc->id == 1 && variant->pix_hoff) | 1041 | if (variant->min_vsize_align == 1) |
1042 | mod_y = fimc_fmt_is_rgb(fmt->color) ? 0 : 1; | 1042 | mod_y = fimc_fmt_is_rgb(fmt->color) ? 0 : 1; |
1043 | else | 1043 | else |
1044 | mod_y = mod_x; | 1044 | mod_y = ffs(variant->min_vsize_align) - 1; |
1045 | } | 1045 | } |
1046 | dbg("mod_x: %d, mod_y: %d, max_w: %d", mod_x, mod_y, max_w); | ||
1047 | 1046 | ||
1048 | v4l_bound_align_image(&pix->width, 16, max_w, mod_x, | 1047 | v4l_bound_align_image(&pix->width, 16, max_w, mod_x, |
1049 | &pix->height, 8, variant->pix_limit->scaler_dis_w, mod_y, 0); | 1048 | &pix->height, 8, variant->pix_limit->scaler_dis_w, mod_y, 0); |
@@ -1226,10 +1225,10 @@ static int fimc_m2m_try_crop(struct fimc_ctx *ctx, struct v4l2_crop *cr) | |||
1226 | fimc->variant->min_inp_pixsize : fimc->variant->min_out_pixsize; | 1225 | fimc->variant->min_inp_pixsize : fimc->variant->min_out_pixsize; |
1227 | 1226 | ||
1228 | /* Get pixel alignment constraints. */ | 1227 | /* Get pixel alignment constraints. */ |
1229 | if (fimc->id == 1 && fimc->variant->pix_hoff) | 1228 | if (fimc->variant->min_vsize_align == 1) |
1230 | halign = fimc_fmt_is_rgb(f->fmt->color) ? 0 : 1; | 1229 | halign = fimc_fmt_is_rgb(f->fmt->color) ? 0 : 1; |
1231 | else | 1230 | else |
1232 | halign = ffs(min_size) - 1; | 1231 | halign = ffs(fimc->variant->min_vsize_align) - 1; |
1233 | 1232 | ||
1234 | for (i = 0; i < f->fmt->colplanes; i++) | 1233 | for (i = 0; i < f->fmt->colplanes; i++) |
1235 | depth += f->fmt->depth[i]; | 1234 | depth += f->fmt->depth[i]; |
@@ -1615,7 +1614,6 @@ static int fimc_probe(struct platform_device *pdev) | |||
1615 | pdata = pdev->dev.platform_data; | 1614 | pdata = pdev->dev.platform_data; |
1616 | fimc->pdata = pdata; | 1615 | fimc->pdata = pdata; |
1617 | 1616 | ||
1618 | set_bit(ST_LPM, &fimc->state); | ||
1619 | 1617 | ||
1620 | init_waitqueue_head(&fimc->irq_queue); | 1618 | init_waitqueue_head(&fimc->irq_queue); |
1621 | spin_lock_init(&fimc->slock); | 1619 | spin_lock_init(&fimc->slock); |
@@ -1707,8 +1705,6 @@ static int fimc_runtime_resume(struct device *dev) | |||
1707 | /* Enable clocks and perform basic initalization */ | 1705 | /* Enable clocks and perform basic initalization */ |
1708 | clk_enable(fimc->clock[CLK_GATE]); | 1706 | clk_enable(fimc->clock[CLK_GATE]); |
1709 | fimc_hw_reset(fimc); | 1707 | fimc_hw_reset(fimc); |
1710 | if (fimc->variant->out_buf_count > 4) | ||
1711 | fimc_hw_set_dma_seq(fimc, 0xF); | ||
1712 | 1708 | ||
1713 | /* Resume the capture or mem-to-mem device */ | 1709 | /* Resume the capture or mem-to-mem device */ |
1714 | if (fimc_capture_busy(fimc)) | 1710 | if (fimc_capture_busy(fimc)) |
@@ -1750,8 +1746,6 @@ static int fimc_resume(struct device *dev) | |||
1750 | return 0; | 1746 | return 0; |
1751 | } | 1747 | } |
1752 | fimc_hw_reset(fimc); | 1748 | fimc_hw_reset(fimc); |
1753 | if (fimc->variant->out_buf_count > 4) | ||
1754 | fimc_hw_set_dma_seq(fimc, 0xF); | ||
1755 | spin_unlock_irqrestore(&fimc->slock, flags); | 1749 | spin_unlock_irqrestore(&fimc->slock, flags); |
1756 | 1750 | ||
1757 | if (fimc_capture_busy(fimc)) | 1751 | if (fimc_capture_busy(fimc)) |
@@ -1780,7 +1774,6 @@ static int __devexit fimc_remove(struct platform_device *pdev) | |||
1780 | struct fimc_dev *fimc = platform_get_drvdata(pdev); | 1774 | struct fimc_dev *fimc = platform_get_drvdata(pdev); |
1781 | 1775 | ||
1782 | pm_runtime_disable(&pdev->dev); | 1776 | pm_runtime_disable(&pdev->dev); |
1783 | fimc_runtime_suspend(&pdev->dev); | ||
1784 | pm_runtime_set_suspended(&pdev->dev); | 1777 | pm_runtime_set_suspended(&pdev->dev); |
1785 | 1778 | ||
1786 | vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx); | 1779 | vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx); |
@@ -1840,6 +1833,7 @@ static struct samsung_fimc_variant fimc0_variant_s5p = { | |||
1840 | .min_inp_pixsize = 16, | 1833 | .min_inp_pixsize = 16, |
1841 | .min_out_pixsize = 16, | 1834 | .min_out_pixsize = 16, |
1842 | .hor_offs_align = 8, | 1835 | .hor_offs_align = 8, |
1836 | .min_vsize_align = 16, | ||
1843 | .out_buf_count = 4, | 1837 | .out_buf_count = 4, |
1844 | .pix_limit = &s5p_pix_limit[0], | 1838 | .pix_limit = &s5p_pix_limit[0], |
1845 | }; | 1839 | }; |
@@ -1849,6 +1843,7 @@ static struct samsung_fimc_variant fimc2_variant_s5p = { | |||
1849 | .min_inp_pixsize = 16, | 1843 | .min_inp_pixsize = 16, |
1850 | .min_out_pixsize = 16, | 1844 | .min_out_pixsize = 16, |
1851 | .hor_offs_align = 8, | 1845 | .hor_offs_align = 8, |
1846 | .min_vsize_align = 16, | ||
1852 | .out_buf_count = 4, | 1847 | .out_buf_count = 4, |
1853 | .pix_limit = &s5p_pix_limit[1], | 1848 | .pix_limit = &s5p_pix_limit[1], |
1854 | }; | 1849 | }; |
@@ -1861,6 +1856,7 @@ static struct samsung_fimc_variant fimc0_variant_s5pv210 = { | |||
1861 | .min_inp_pixsize = 16, | 1856 | .min_inp_pixsize = 16, |
1862 | .min_out_pixsize = 16, | 1857 | .min_out_pixsize = 16, |
1863 | .hor_offs_align = 8, | 1858 | .hor_offs_align = 8, |
1859 | .min_vsize_align = 16, | ||
1864 | .out_buf_count = 4, | 1860 | .out_buf_count = 4, |
1865 | .pix_limit = &s5p_pix_limit[1], | 1861 | .pix_limit = &s5p_pix_limit[1], |
1866 | }; | 1862 | }; |
@@ -1874,6 +1870,7 @@ static struct samsung_fimc_variant fimc1_variant_s5pv210 = { | |||
1874 | .min_inp_pixsize = 16, | 1870 | .min_inp_pixsize = 16, |
1875 | .min_out_pixsize = 16, | 1871 | .min_out_pixsize = 16, |
1876 | .hor_offs_align = 1, | 1872 | .hor_offs_align = 1, |
1873 | .min_vsize_align = 1, | ||
1877 | .out_buf_count = 4, | 1874 | .out_buf_count = 4, |
1878 | .pix_limit = &s5p_pix_limit[2], | 1875 | .pix_limit = &s5p_pix_limit[2], |
1879 | }; | 1876 | }; |
@@ -1884,6 +1881,7 @@ static struct samsung_fimc_variant fimc2_variant_s5pv210 = { | |||
1884 | .min_inp_pixsize = 16, | 1881 | .min_inp_pixsize = 16, |
1885 | .min_out_pixsize = 16, | 1882 | .min_out_pixsize = 16, |
1886 | .hor_offs_align = 8, | 1883 | .hor_offs_align = 8, |
1884 | .min_vsize_align = 16, | ||
1887 | .out_buf_count = 4, | 1885 | .out_buf_count = 4, |
1888 | .pix_limit = &s5p_pix_limit[2], | 1886 | .pix_limit = &s5p_pix_limit[2], |
1889 | }; | 1887 | }; |
@@ -1898,6 +1896,7 @@ static struct samsung_fimc_variant fimc0_variant_exynos4 = { | |||
1898 | .min_inp_pixsize = 16, | 1896 | .min_inp_pixsize = 16, |
1899 | .min_out_pixsize = 16, | 1897 | .min_out_pixsize = 16, |
1900 | .hor_offs_align = 2, | 1898 | .hor_offs_align = 2, |
1899 | .min_vsize_align = 1, | ||
1901 | .out_buf_count = 32, | 1900 | .out_buf_count = 32, |
1902 | .pix_limit = &s5p_pix_limit[1], | 1901 | .pix_limit = &s5p_pix_limit[1], |
1903 | }; | 1902 | }; |
@@ -1910,6 +1909,7 @@ static struct samsung_fimc_variant fimc3_variant_exynos4 = { | |||
1910 | .min_inp_pixsize = 16, | 1909 | .min_inp_pixsize = 16, |
1911 | .min_out_pixsize = 16, | 1910 | .min_out_pixsize = 16, |
1912 | .hor_offs_align = 2, | 1911 | .hor_offs_align = 2, |
1912 | .min_vsize_align = 1, | ||
1913 | .out_buf_count = 32, | 1913 | .out_buf_count = 32, |
1914 | .pix_limit = &s5p_pix_limit[3], | 1914 | .pix_limit = &s5p_pix_limit[3], |
1915 | }; | 1915 | }; |
diff --git a/drivers/media/video/s5p-fimc/fimc-core.h b/drivers/media/video/s5p-fimc/fimc-core.h index a6936dad5b10..c7f01c47b20f 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.h +++ b/drivers/media/video/s5p-fimc/fimc-core.h | |||
@@ -377,6 +377,7 @@ struct fimc_pix_limit { | |||
377 | * @min_inp_pixsize: minimum input pixel size | 377 | * @min_inp_pixsize: minimum input pixel size |
378 | * @min_out_pixsize: minimum output pixel size | 378 | * @min_out_pixsize: minimum output pixel size |
379 | * @hor_offs_align: horizontal pixel offset aligment | 379 | * @hor_offs_align: horizontal pixel offset aligment |
380 | * @min_vsize_align: minimum vertical pixel size alignment | ||
380 | * @out_buf_count: the number of buffers in output DMA sequence | 381 | * @out_buf_count: the number of buffers in output DMA sequence |
381 | */ | 382 | */ |
382 | struct samsung_fimc_variant { | 383 | struct samsung_fimc_variant { |
@@ -390,6 +391,7 @@ struct samsung_fimc_variant { | |||
390 | u16 min_inp_pixsize; | 391 | u16 min_inp_pixsize; |
391 | u16 min_out_pixsize; | 392 | u16 min_out_pixsize; |
392 | u16 hor_offs_align; | 393 | u16 hor_offs_align; |
394 | u16 min_vsize_align; | ||
393 | u16 out_buf_count; | 395 | u16 out_buf_count; |
394 | }; | 396 | }; |
395 | 397 | ||
diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.c b/drivers/media/video/s5p-fimc/fimc-mdevice.c index cc337b1de913..615c862f0360 100644 --- a/drivers/media/video/s5p-fimc/fimc-mdevice.c +++ b/drivers/media/video/s5p-fimc/fimc-mdevice.c | |||
@@ -220,6 +220,7 @@ static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd, | |||
220 | sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter, | 220 | sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter, |
221 | s_info->pdata->board_info, NULL); | 221 | s_info->pdata->board_info, NULL); |
222 | if (IS_ERR_OR_NULL(sd)) { | 222 | if (IS_ERR_OR_NULL(sd)) { |
223 | i2c_put_adapter(adapter); | ||
223 | v4l2_err(&fmd->v4l2_dev, "Failed to acquire subdev\n"); | 224 | v4l2_err(&fmd->v4l2_dev, "Failed to acquire subdev\n"); |
224 | return NULL; | 225 | return NULL; |
225 | } | 226 | } |
@@ -234,12 +235,15 @@ static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd, | |||
234 | static void fimc_md_unregister_sensor(struct v4l2_subdev *sd) | 235 | static void fimc_md_unregister_sensor(struct v4l2_subdev *sd) |
235 | { | 236 | { |
236 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 237 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
238 | struct i2c_adapter *adapter; | ||
237 | 239 | ||
238 | if (!client) | 240 | if (!client) |
239 | return; | 241 | return; |
240 | v4l2_device_unregister_subdev(sd); | 242 | v4l2_device_unregister_subdev(sd); |
243 | adapter = client->adapter; | ||
241 | i2c_unregister_device(client); | 244 | i2c_unregister_device(client); |
242 | i2c_put_adapter(client->adapter); | 245 | if (adapter) |
246 | i2c_put_adapter(adapter); | ||
243 | } | 247 | } |
244 | 248 | ||
245 | static int fimc_md_register_sensor_entities(struct fimc_md *fmd) | 249 | static int fimc_md_register_sensor_entities(struct fimc_md *fmd) |
@@ -381,20 +385,28 @@ static void fimc_md_unregister_entities(struct fimc_md *fmd) | |||
381 | 385 | ||
382 | static int fimc_md_register_video_nodes(struct fimc_md *fmd) | 386 | static int fimc_md_register_video_nodes(struct fimc_md *fmd) |
383 | { | 387 | { |
388 | struct video_device *vdev; | ||
384 | int i, ret = 0; | 389 | int i, ret = 0; |
385 | 390 | ||
386 | for (i = 0; i < FIMC_MAX_DEVS && !ret; i++) { | 391 | for (i = 0; i < FIMC_MAX_DEVS && !ret; i++) { |
387 | if (!fmd->fimc[i]) | 392 | if (!fmd->fimc[i]) |
388 | continue; | 393 | continue; |
389 | 394 | ||
390 | if (fmd->fimc[i]->m2m.vfd) | 395 | vdev = fmd->fimc[i]->m2m.vfd; |
391 | ret = video_register_device(fmd->fimc[i]->m2m.vfd, | 396 | if (vdev) { |
392 | VFL_TYPE_GRABBER, -1); | 397 | ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1); |
393 | if (ret) | 398 | if (ret) |
394 | break; | 399 | break; |
395 | if (fmd->fimc[i]->vid_cap.vfd) | 400 | v4l2_info(&fmd->v4l2_dev, "Registered %s as /dev/%s\n", |
396 | ret = video_register_device(fmd->fimc[i]->vid_cap.vfd, | 401 | vdev->name, video_device_node_name(vdev)); |
397 | VFL_TYPE_GRABBER, -1); | 402 | } |
403 | |||
404 | vdev = fmd->fimc[i]->vid_cap.vfd; | ||
405 | if (vdev == NULL) | ||
406 | continue; | ||
407 | ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1); | ||
408 | v4l2_info(&fmd->v4l2_dev, "Registered %s as /dev/%s\n", | ||
409 | vdev->name, video_device_node_name(vdev)); | ||
398 | } | 410 | } |
399 | 411 | ||
400 | return ret; | 412 | return ret; |
@@ -502,7 +514,7 @@ static int fimc_md_create_links(struct fimc_md *fmd) | |||
502 | if (WARN(csis == NULL, | 514 | if (WARN(csis == NULL, |
503 | "MIPI-CSI interface specified " | 515 | "MIPI-CSI interface specified " |
504 | "but s5p-csis module is not loaded!\n")) | 516 | "but s5p-csis module is not loaded!\n")) |
505 | continue; | 517 | return -EINVAL; |
506 | 518 | ||
507 | ret = media_entity_create_link(&sensor->entity, 0, | 519 | ret = media_entity_create_link(&sensor->entity, 0, |
508 | &csis->entity, CSIS_PAD_SINK, | 520 | &csis->entity, CSIS_PAD_SINK, |
@@ -742,9 +754,6 @@ static int __devinit fimc_md_probe(struct platform_device *pdev) | |||
742 | struct fimc_md *fmd; | 754 | struct fimc_md *fmd; |
743 | int ret; | 755 | int ret; |
744 | 756 | ||
745 | if (WARN(!pdev->dev.platform_data, "Platform data not specified!\n")) | ||
746 | return -EINVAL; | ||
747 | |||
748 | fmd = kzalloc(sizeof(struct fimc_md), GFP_KERNEL); | 757 | fmd = kzalloc(sizeof(struct fimc_md), GFP_KERNEL); |
749 | if (!fmd) | 758 | if (!fmd) |
750 | return -ENOMEM; | 759 | return -ENOMEM; |
@@ -782,9 +791,11 @@ static int __devinit fimc_md_probe(struct platform_device *pdev) | |||
782 | if (ret) | 791 | if (ret) |
783 | goto err3; | 792 | goto err3; |
784 | 793 | ||
785 | ret = fimc_md_register_sensor_entities(fmd); | 794 | if (pdev->dev.platform_data) { |
786 | if (ret) | 795 | ret = fimc_md_register_sensor_entities(fmd); |
787 | goto err3; | 796 | if (ret) |
797 | goto err3; | ||
798 | } | ||
788 | ret = fimc_md_create_links(fmd); | 799 | ret = fimc_md_create_links(fmd); |
789 | if (ret) | 800 | if (ret) |
790 | goto err3; | 801 | goto err3; |
diff --git a/drivers/media/video/s5p-fimc/fimc-reg.c b/drivers/media/video/s5p-fimc/fimc-reg.c index 20e664e34163..44f5c2d1920b 100644 --- a/drivers/media/video/s5p-fimc/fimc-reg.c +++ b/drivers/media/video/s5p-fimc/fimc-reg.c | |||
@@ -35,6 +35,9 @@ void fimc_hw_reset(struct fimc_dev *dev) | |||
35 | cfg = readl(dev->regs + S5P_CIGCTRL); | 35 | cfg = readl(dev->regs + S5P_CIGCTRL); |
36 | cfg &= ~S5P_CIGCTRL_SWRST; | 36 | cfg &= ~S5P_CIGCTRL_SWRST; |
37 | writel(cfg, dev->regs + S5P_CIGCTRL); | 37 | writel(cfg, dev->regs + S5P_CIGCTRL); |
38 | |||
39 | if (dev->variant->out_buf_count > 4) | ||
40 | fimc_hw_set_dma_seq(dev, 0xF); | ||
38 | } | 41 | } |
39 | 42 | ||
40 | static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx) | 43 | static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx) |
@@ -251,7 +254,14 @@ static void fimc_hw_set_scaler(struct fimc_ctx *ctx) | |||
251 | struct fimc_scaler *sc = &ctx->scaler; | 254 | struct fimc_scaler *sc = &ctx->scaler; |
252 | struct fimc_frame *src_frame = &ctx->s_frame; | 255 | struct fimc_frame *src_frame = &ctx->s_frame; |
253 | struct fimc_frame *dst_frame = &ctx->d_frame; | 256 | struct fimc_frame *dst_frame = &ctx->d_frame; |
254 | u32 cfg = 0; | 257 | |
258 | u32 cfg = readl(dev->regs + S5P_CISCCTRL); | ||
259 | |||
260 | cfg &= ~(S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE | | ||
261 | S5P_CISCCTRL_SCALEUP_H | S5P_CISCCTRL_SCALEUP_V | | ||
262 | S5P_CISCCTRL_SCALERBYPASS | S5P_CISCCTRL_ONE2ONE | | ||
263 | S5P_CISCCTRL_INRGB_FMT_MASK | S5P_CISCCTRL_OUTRGB_FMT_MASK | | ||
264 | S5P_CISCCTRL_INTERLACE | S5P_CISCCTRL_RGB_EXT); | ||
255 | 265 | ||
256 | if (!(ctx->flags & FIMC_COLOR_RANGE_NARROW)) | 266 | if (!(ctx->flags & FIMC_COLOR_RANGE_NARROW)) |
257 | cfg |= (S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE); | 267 | cfg |= (S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE); |
@@ -308,9 +318,9 @@ void fimc_hw_set_mainscaler(struct fimc_ctx *ctx) | |||
308 | fimc_hw_set_scaler(ctx); | 318 | fimc_hw_set_scaler(ctx); |
309 | 319 | ||
310 | cfg = readl(dev->regs + S5P_CISCCTRL); | 320 | cfg = readl(dev->regs + S5P_CISCCTRL); |
321 | cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK); | ||
311 | 322 | ||
312 | if (variant->has_mainscaler_ext) { | 323 | if (variant->has_mainscaler_ext) { |
313 | cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK); | ||
314 | cfg |= S5P_CISCCTRL_MHRATIO_EXT(sc->main_hratio); | 324 | cfg |= S5P_CISCCTRL_MHRATIO_EXT(sc->main_hratio); |
315 | cfg |= S5P_CISCCTRL_MVRATIO_EXT(sc->main_vratio); | 325 | cfg |= S5P_CISCCTRL_MVRATIO_EXT(sc->main_vratio); |
316 | writel(cfg, dev->regs + S5P_CISCCTRL); | 326 | writel(cfg, dev->regs + S5P_CISCCTRL); |
@@ -323,7 +333,6 @@ void fimc_hw_set_mainscaler(struct fimc_ctx *ctx) | |||
323 | cfg |= S5P_CIEXTEN_MVRATIO_EXT(sc->main_vratio); | 333 | cfg |= S5P_CIEXTEN_MVRATIO_EXT(sc->main_vratio); |
324 | writel(cfg, dev->regs + S5P_CIEXTEN); | 334 | writel(cfg, dev->regs + S5P_CIEXTEN); |
325 | } else { | 335 | } else { |
326 | cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK); | ||
327 | cfg |= S5P_CISCCTRL_MHRATIO(sc->main_hratio); | 336 | cfg |= S5P_CISCCTRL_MHRATIO(sc->main_hratio); |
328 | cfg |= S5P_CISCCTRL_MVRATIO(sc->main_vratio); | 337 | cfg |= S5P_CISCCTRL_MVRATIO(sc->main_vratio); |
329 | writel(cfg, dev->regs + S5P_CISCCTRL); | 338 | writel(cfg, dev->regs + S5P_CISCCTRL); |
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c index 1e8cdb77d4b8..dff9dc798795 100644 --- a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c | |||
@@ -61,7 +61,7 @@ static struct s5p_mfc_fmt formats[] = { | |||
61 | .num_planes = 1, | 61 | .num_planes = 1, |
62 | }, | 62 | }, |
63 | { | 63 | { |
64 | .name = "H264 Encoded Stream", | 64 | .name = "H263 Encoded Stream", |
65 | .fourcc = V4L2_PIX_FMT_H263, | 65 | .fourcc = V4L2_PIX_FMT_H263, |
66 | .codec_mode = S5P_FIMV_CODEC_H263_ENC, | 66 | .codec_mode = S5P_FIMV_CODEC_H263_ENC, |
67 | .type = MFC_FMT_ENC, | 67 | .type = MFC_FMT_ENC, |
diff --git a/drivers/media/video/s5p-tv/mixer_video.c b/drivers/media/video/s5p-tv/mixer_video.c index e16d3a4bc1dc..b47d0c06ecf5 100644 --- a/drivers/media/video/s5p-tv/mixer_video.c +++ b/drivers/media/video/s5p-tv/mixer_video.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <media/v4l2-ioctl.h> | 16 | #include <media/v4l2-ioctl.h> |
17 | #include <linux/videodev2.h> | 17 | #include <linux/videodev2.h> |
18 | #include <linux/mm.h> | 18 | #include <linux/mm.h> |
19 | #include <linux/module.h> | ||
19 | #include <linux/version.h> | 20 | #include <linux/version.h> |
20 | #include <linux/timer.h> | 21 | #include <linux/timer.h> |
21 | #include <media/videobuf2-dma-contig.h> | 22 | #include <media/videobuf2-dma-contig.h> |
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c index f390682629cf..c51decfcae19 100644 --- a/drivers/media/video/sh_mobile_ceu_camera.c +++ b/drivers/media/video/sh_mobile_ceu_camera.c | |||
@@ -566,8 +566,10 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd) | |||
566 | ret = sh_mobile_ceu_soft_reset(pcdev); | 566 | ret = sh_mobile_ceu_soft_reset(pcdev); |
567 | 567 | ||
568 | csi2_sd = find_csi2(pcdev); | 568 | csi2_sd = find_csi2(pcdev); |
569 | if (csi2_sd) | 569 | if (csi2_sd) { |
570 | csi2_sd->grp_id = (long)icd; | 570 | csi2_sd->grp_id = soc_camera_grp_id(icd); |
571 | v4l2_set_subdev_hostdata(csi2_sd, icd); | ||
572 | } | ||
571 | 573 | ||
572 | ret = v4l2_subdev_call(csi2_sd, core, s_power, 1); | 574 | ret = v4l2_subdev_call(csi2_sd, core, s_power, 1); |
573 | if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { | 575 | if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { |
@@ -768,7 +770,7 @@ static struct v4l2_subdev *find_bus_subdev(struct sh_mobile_ceu_dev *pcdev, | |||
768 | { | 770 | { |
769 | if (pcdev->csi2_pdev) { | 771 | if (pcdev->csi2_pdev) { |
770 | struct v4l2_subdev *csi2_sd = find_csi2(pcdev); | 772 | struct v4l2_subdev *csi2_sd = find_csi2(pcdev); |
771 | if (csi2_sd && csi2_sd->grp_id == (u32)icd) | 773 | if (csi2_sd && csi2_sd->grp_id == soc_camera_grp_id(icd)) |
772 | return csi2_sd; | 774 | return csi2_sd; |
773 | } | 775 | } |
774 | 776 | ||
@@ -1089,8 +1091,9 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int | |||
1089 | /* Try 2560x1920, 1280x960, 640x480, 320x240 */ | 1091 | /* Try 2560x1920, 1280x960, 640x480, 320x240 */ |
1090 | mf.width = 2560 >> shift; | 1092 | mf.width = 2560 >> shift; |
1091 | mf.height = 1920 >> shift; | 1093 | mf.height = 1920 >> shift; |
1092 | ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, | 1094 | ret = v4l2_device_call_until_err(sd->v4l2_dev, |
1093 | s_mbus_fmt, &mf); | 1095 | soc_camera_grp_id(icd), video, |
1096 | s_mbus_fmt, &mf); | ||
1094 | if (ret < 0) | 1097 | if (ret < 0) |
1095 | return ret; | 1098 | return ret; |
1096 | shift++; | 1099 | shift++; |
@@ -1389,7 +1392,8 @@ static int client_s_fmt(struct soc_camera_device *icd, | |||
1389 | bool ceu_1to1; | 1392 | bool ceu_1to1; |
1390 | int ret; | 1393 | int ret; |
1391 | 1394 | ||
1392 | ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, | 1395 | ret = v4l2_device_call_until_err(sd->v4l2_dev, |
1396 | soc_camera_grp_id(icd), video, | ||
1393 | s_mbus_fmt, mf); | 1397 | s_mbus_fmt, mf); |
1394 | if (ret < 0) | 1398 | if (ret < 0) |
1395 | return ret; | 1399 | return ret; |
@@ -1426,8 +1430,9 @@ static int client_s_fmt(struct soc_camera_device *icd, | |||
1426 | tmp_h = min(2 * tmp_h, max_height); | 1430 | tmp_h = min(2 * tmp_h, max_height); |
1427 | mf->width = tmp_w; | 1431 | mf->width = tmp_w; |
1428 | mf->height = tmp_h; | 1432 | mf->height = tmp_h; |
1429 | ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, | 1433 | ret = v4l2_device_call_until_err(sd->v4l2_dev, |
1430 | s_mbus_fmt, mf); | 1434 | soc_camera_grp_id(icd), video, |
1435 | s_mbus_fmt, mf); | ||
1431 | dev_geo(dev, "Camera scaled to %ux%u\n", | 1436 | dev_geo(dev, "Camera scaled to %ux%u\n", |
1432 | mf->width, mf->height); | 1437 | mf->width, mf->height); |
1433 | if (ret < 0) { | 1438 | if (ret < 0) { |
@@ -1580,8 +1585,9 @@ static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd, | |||
1580 | } | 1585 | } |
1581 | 1586 | ||
1582 | if (interm_width < icd->user_width || interm_height < icd->user_height) { | 1587 | if (interm_width < icd->user_width || interm_height < icd->user_height) { |
1583 | ret = v4l2_device_call_until_err(sd->v4l2_dev, (int)icd, video, | 1588 | ret = v4l2_device_call_until_err(sd->v4l2_dev, |
1584 | s_mbus_fmt, &mf); | 1589 | soc_camera_grp_id(icd), video, |
1590 | s_mbus_fmt, &mf); | ||
1585 | if (ret < 0) | 1591 | if (ret < 0) |
1586 | return ret; | 1592 | return ret; |
1587 | 1593 | ||
@@ -1867,7 +1873,8 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, | |||
1867 | mf.code = xlate->code; | 1873 | mf.code = xlate->code; |
1868 | mf.colorspace = pix->colorspace; | 1874 | mf.colorspace = pix->colorspace; |
1869 | 1875 | ||
1870 | ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, try_mbus_fmt, &mf); | 1876 | ret = v4l2_device_call_until_err(sd->v4l2_dev, soc_camera_grp_id(icd), |
1877 | video, try_mbus_fmt, &mf); | ||
1871 | if (ret < 0) | 1878 | if (ret < 0) |
1872 | return ret; | 1879 | return ret; |
1873 | 1880 | ||
@@ -1891,8 +1898,9 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, | |||
1891 | */ | 1898 | */ |
1892 | mf.width = 2560; | 1899 | mf.width = 2560; |
1893 | mf.height = 1920; | 1900 | mf.height = 1920; |
1894 | ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, | 1901 | ret = v4l2_device_call_until_err(sd->v4l2_dev, |
1895 | try_mbus_fmt, &mf); | 1902 | soc_camera_grp_id(icd), video, |
1903 | try_mbus_fmt, &mf); | ||
1896 | if (ret < 0) { | 1904 | if (ret < 0) { |
1897 | /* Shouldn't actually happen... */ | 1905 | /* Shouldn't actually happen... */ |
1898 | dev_err(icd->parent, | 1906 | dev_err(icd->parent, |
diff --git a/drivers/media/video/sh_mobile_csi2.c b/drivers/media/video/sh_mobile_csi2.c index ea4f0473ed3b..8a652b53ff7e 100644 --- a/drivers/media/video/sh_mobile_csi2.c +++ b/drivers/media/video/sh_mobile_csi2.c | |||
@@ -143,7 +143,7 @@ static int sh_csi2_s_mbus_config(struct v4l2_subdev *sd, | |||
143 | const struct v4l2_mbus_config *cfg) | 143 | const struct v4l2_mbus_config *cfg) |
144 | { | 144 | { |
145 | struct sh_csi2 *priv = container_of(sd, struct sh_csi2, subdev); | 145 | struct sh_csi2 *priv = container_of(sd, struct sh_csi2, subdev); |
146 | struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; | 146 | struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd); |
147 | struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd); | 147 | struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd); |
148 | struct v4l2_mbus_config client_cfg = {.type = V4L2_MBUS_CSI2, | 148 | struct v4l2_mbus_config client_cfg = {.type = V4L2_MBUS_CSI2, |
149 | .flags = priv->mipi_flags}; | 149 | .flags = priv->mipi_flags}; |
@@ -202,7 +202,7 @@ static void sh_csi2_hwinit(struct sh_csi2 *priv) | |||
202 | static int sh_csi2_client_connect(struct sh_csi2 *priv) | 202 | static int sh_csi2_client_connect(struct sh_csi2 *priv) |
203 | { | 203 | { |
204 | struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data; | 204 | struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data; |
205 | struct soc_camera_device *icd = (struct soc_camera_device *)priv->subdev.grp_id; | 205 | struct soc_camera_device *icd = v4l2_get_subdev_hostdata(&priv->subdev); |
206 | struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd); | 206 | struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd); |
207 | struct device *dev = v4l2_get_subdevdata(&priv->subdev); | 207 | struct device *dev = v4l2_get_subdevdata(&priv->subdev); |
208 | struct v4l2_mbus_config cfg; | 208 | struct v4l2_mbus_config cfg; |
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c index b72580c38957..62e4312515cb 100644 --- a/drivers/media/video/soc_camera.c +++ b/drivers/media/video/soc_camera.c | |||
@@ -1103,7 +1103,8 @@ static int soc_camera_probe(struct soc_camera_device *icd) | |||
1103 | } | 1103 | } |
1104 | 1104 | ||
1105 | sd = soc_camera_to_subdev(icd); | 1105 | sd = soc_camera_to_subdev(icd); |
1106 | sd->grp_id = (long)icd; | 1106 | sd->grp_id = soc_camera_grp_id(icd); |
1107 | v4l2_set_subdev_hostdata(sd, icd); | ||
1107 | 1108 | ||
1108 | if (v4l2_ctrl_add_handler(&icd->ctrl_handler, sd->ctrl_handler)) | 1109 | if (v4l2_ctrl_add_handler(&icd->ctrl_handler, sd->ctrl_handler)) |
1109 | goto ectrl; | 1110 | goto ectrl; |
diff --git a/drivers/mfd/ab5500-debugfs.c b/drivers/mfd/ab5500-debugfs.c index 43c0ebb81956..b7b2d3483fd4 100644 --- a/drivers/mfd/ab5500-debugfs.c +++ b/drivers/mfd/ab5500-debugfs.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * Debugfs support for the AB5500 MFD driver | 4 | * Debugfs support for the AB5500 MFD driver |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #include <linux/export.h> | 7 | #include <linux/module.h> |
8 | #include <linux/debugfs.h> | 8 | #include <linux/debugfs.h> |
9 | #include <linux/seq_file.h> | 9 | #include <linux/seq_file.h> |
10 | #include <linux/mfd/ab5500/ab5500.h> | 10 | #include <linux/mfd/ab5500/ab5500.h> |
diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index 1e9173804ede..d3d572b2317b 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c | |||
@@ -620,6 +620,7 @@ static struct resource __devinitdata ab8500_fg_resources[] = { | |||
620 | 620 | ||
621 | static struct resource __devinitdata ab8500_chargalg_resources[] = {}; | 621 | static struct resource __devinitdata ab8500_chargalg_resources[] = {}; |
622 | 622 | ||
623 | #ifdef CONFIG_DEBUG_FS | ||
623 | static struct resource __devinitdata ab8500_debug_resources[] = { | 624 | static struct resource __devinitdata ab8500_debug_resources[] = { |
624 | { | 625 | { |
625 | .name = "IRQ_FIRST", | 626 | .name = "IRQ_FIRST", |
@@ -634,6 +635,7 @@ static struct resource __devinitdata ab8500_debug_resources[] = { | |||
634 | .flags = IORESOURCE_IRQ, | 635 | .flags = IORESOURCE_IRQ, |
635 | }, | 636 | }, |
636 | }; | 637 | }; |
638 | #endif | ||
637 | 639 | ||
638 | static struct resource __devinitdata ab8500_usb_resources[] = { | 640 | static struct resource __devinitdata ab8500_usb_resources[] = { |
639 | { | 641 | { |
diff --git a/drivers/mfd/adp5520.c b/drivers/mfd/adp5520.c index f1d88483112c..8d816cce8322 100644 --- a/drivers/mfd/adp5520.c +++ b/drivers/mfd/adp5520.c | |||
@@ -109,7 +109,7 @@ int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask) | |||
109 | 109 | ||
110 | ret = __adp5520_read(chip->client, reg, ®_val); | 110 | ret = __adp5520_read(chip->client, reg, ®_val); |
111 | 111 | ||
112 | if (!ret && ((reg_val & bit_mask) == 0)) { | 112 | if (!ret && ((reg_val & bit_mask) != bit_mask)) { |
113 | reg_val |= bit_mask; | 113 | reg_val |= bit_mask; |
114 | ret = __adp5520_write(chip->client, reg, reg_val); | 114 | ret = __adp5520_write(chip->client, reg, reg_val); |
115 | } | 115 | } |
diff --git a/drivers/mfd/da903x.c b/drivers/mfd/da903x.c index 1b79c37fd599..1924b857a0fb 100644 --- a/drivers/mfd/da903x.c +++ b/drivers/mfd/da903x.c | |||
@@ -182,7 +182,7 @@ int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask) | |||
182 | if (ret) | 182 | if (ret) |
183 | goto out; | 183 | goto out; |
184 | 184 | ||
185 | if ((reg_val & bit_mask) == 0) { | 185 | if ((reg_val & bit_mask) != bit_mask) { |
186 | reg_val |= bit_mask; | 186 | reg_val |= bit_mask; |
187 | ret = __da903x_write(chip->client, reg, reg_val); | 187 | ret = __da903x_write(chip->client, reg, reg_val); |
188 | } | 188 | } |
@@ -549,6 +549,7 @@ static int __devexit da903x_remove(struct i2c_client *client) | |||
549 | struct da903x_chip *chip = i2c_get_clientdata(client); | 549 | struct da903x_chip *chip = i2c_get_clientdata(client); |
550 | 550 | ||
551 | da903x_remove_subdevs(chip); | 551 | da903x_remove_subdevs(chip); |
552 | free_irq(client->irq, chip); | ||
552 | kfree(chip); | 553 | kfree(chip); |
553 | return 0; | 554 | return 0; |
554 | } | 555 | } |
diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c index 1e9ee533eacb..ef39528088f2 100644 --- a/drivers/mfd/jz4740-adc.c +++ b/drivers/mfd/jz4740-adc.c | |||
@@ -16,6 +16,7 @@ | |||
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
19 | #include <linux/io.h> | ||
19 | #include <linux/irq.h> | 20 | #include <linux/irq.h> |
20 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
21 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c index bba26d96c240..a5ddf31b60ca 100644 --- a/drivers/mfd/tps6586x.c +++ b/drivers/mfd/tps6586x.c | |||
@@ -197,7 +197,7 @@ int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask) | |||
197 | if (ret) | 197 | if (ret) |
198 | goto out; | 198 | goto out; |
199 | 199 | ||
200 | if ((reg_val & bit_mask) == 0) { | 200 | if ((reg_val & bit_mask) != bit_mask) { |
201 | reg_val |= bit_mask; | 201 | reg_val |= bit_mask; |
202 | ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val); | 202 | ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val); |
203 | } | 203 | } |
diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 6f5b8cf2f652..c1da84bc1573 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c | |||
@@ -120,7 +120,7 @@ int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask) | |||
120 | goto out; | 120 | goto out; |
121 | } | 121 | } |
122 | 122 | ||
123 | data &= mask; | 123 | data &= ~mask; |
124 | err = tps65910_i2c_write(tps65910, reg, 1, &data); | 124 | err = tps65910_i2c_write(tps65910, reg, 1, &data); |
125 | if (err) | 125 | if (err) |
126 | dev_err(tps65910->dev, "write to reg %x failed\n", reg); | 126 | dev_err(tps65910->dev, "write to reg %x failed\n", reg); |
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c index bfbd66021afd..61e70cfaa774 100644 --- a/drivers/mfd/twl-core.c +++ b/drivers/mfd/twl-core.c | |||
@@ -363,13 +363,13 @@ int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) | |||
363 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); | 363 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); |
364 | return -EPERM; | 364 | return -EPERM; |
365 | } | 365 | } |
366 | sid = twl_map[mod_no].sid; | ||
367 | twl = &twl_modules[sid]; | ||
368 | |||
369 | if (unlikely(!inuse)) { | 366 | if (unlikely(!inuse)) { |
370 | pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); | 367 | pr_err("%s: not initialized\n", DRIVER_NAME); |
371 | return -EPERM; | 368 | return -EPERM; |
372 | } | 369 | } |
370 | sid = twl_map[mod_no].sid; | ||
371 | twl = &twl_modules[sid]; | ||
372 | |||
373 | mutex_lock(&twl->xfer_lock); | 373 | mutex_lock(&twl->xfer_lock); |
374 | /* | 374 | /* |
375 | * [MSG1]: fill the register address data | 375 | * [MSG1]: fill the register address data |
@@ -420,13 +420,13 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) | |||
420 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); | 420 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); |
421 | return -EPERM; | 421 | return -EPERM; |
422 | } | 422 | } |
423 | sid = twl_map[mod_no].sid; | ||
424 | twl = &twl_modules[sid]; | ||
425 | |||
426 | if (unlikely(!inuse)) { | 423 | if (unlikely(!inuse)) { |
427 | pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); | 424 | pr_err("%s: not initialized\n", DRIVER_NAME); |
428 | return -EPERM; | 425 | return -EPERM; |
429 | } | 426 | } |
427 | sid = twl_map[mod_no].sid; | ||
428 | twl = &twl_modules[sid]; | ||
429 | |||
430 | mutex_lock(&twl->xfer_lock); | 430 | mutex_lock(&twl->xfer_lock); |
431 | /* [MSG1] fill the register address data */ | 431 | /* [MSG1] fill the register address data */ |
432 | msg = &twl->xfer_msg[0]; | 432 | msg = &twl->xfer_msg[0]; |
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c index f062c8cc6c38..29f11e0765fe 100644 --- a/drivers/mfd/twl4030-irq.c +++ b/drivers/mfd/twl4030-irq.c | |||
@@ -432,6 +432,7 @@ struct sih_agent { | |||
432 | u32 edge_change; | 432 | u32 edge_change; |
433 | 433 | ||
434 | struct mutex irq_lock; | 434 | struct mutex irq_lock; |
435 | char *irq_name; | ||
435 | }; | 436 | }; |
436 | 437 | ||
437 | /*----------------------------------------------------------------------*/ | 438 | /*----------------------------------------------------------------------*/ |
@@ -589,7 +590,7 @@ static inline int sih_read_isr(const struct sih *sih) | |||
589 | * Generic handler for SIH interrupts ... we "know" this is called | 590 | * Generic handler for SIH interrupts ... we "know" this is called |
590 | * in task context, with IRQs enabled. | 591 | * in task context, with IRQs enabled. |
591 | */ | 592 | */ |
592 | static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) | 593 | static irqreturn_t handle_twl4030_sih(int irq, void *data) |
593 | { | 594 | { |
594 | struct sih_agent *agent = irq_get_handler_data(irq); | 595 | struct sih_agent *agent = irq_get_handler_data(irq); |
595 | const struct sih *sih = agent->sih; | 596 | const struct sih *sih = agent->sih; |
@@ -602,7 +603,7 @@ static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) | |||
602 | pr_err("twl4030: %s SIH, read ISR error %d\n", | 603 | pr_err("twl4030: %s SIH, read ISR error %d\n", |
603 | sih->name, isr); | 604 | sih->name, isr); |
604 | /* REVISIT: recover; eventually mask it all, etc */ | 605 | /* REVISIT: recover; eventually mask it all, etc */ |
605 | return; | 606 | return IRQ_HANDLED; |
606 | } | 607 | } |
607 | 608 | ||
608 | while (isr) { | 609 | while (isr) { |
@@ -616,6 +617,7 @@ static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) | |||
616 | pr_err("twl4030: %s SIH, invalid ISR bit %d\n", | 617 | pr_err("twl4030: %s SIH, invalid ISR bit %d\n", |
617 | sih->name, irq); | 618 | sih->name, irq); |
618 | } | 619 | } |
620 | return IRQ_HANDLED; | ||
619 | } | 621 | } |
620 | 622 | ||
621 | static unsigned twl4030_irq_next; | 623 | static unsigned twl4030_irq_next; |
@@ -668,18 +670,19 @@ int twl4030_sih_setup(int module) | |||
668 | activate_irq(irq); | 670 | activate_irq(irq); |
669 | } | 671 | } |
670 | 672 | ||
671 | status = irq_base; | ||
672 | twl4030_irq_next += i; | 673 | twl4030_irq_next += i; |
673 | 674 | ||
674 | /* replace generic PIH handler (handle_simple_irq) */ | 675 | /* replace generic PIH handler (handle_simple_irq) */ |
675 | irq = sih_mod + twl4030_irq_base; | 676 | irq = sih_mod + twl4030_irq_base; |
676 | irq_set_handler_data(irq, agent); | 677 | irq_set_handler_data(irq, agent); |
677 | irq_set_chained_handler(irq, handle_twl4030_sih); | 678 | agent->irq_name = kasprintf(GFP_KERNEL, "twl4030_%s", sih->name); |
679 | status = request_threaded_irq(irq, NULL, handle_twl4030_sih, 0, | ||
680 | agent->irq_name ?: sih->name, NULL); | ||
678 | 681 | ||
679 | pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name, | 682 | pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name, |
680 | irq, irq_base, twl4030_irq_next - 1); | 683 | irq, irq_base, twl4030_irq_next - 1); |
681 | 684 | ||
682 | return status; | 685 | return status < 0 ? status : irq_base; |
683 | } | 686 | } |
684 | 687 | ||
685 | /* FIXME need a call to reverse twl4030_sih_setup() ... */ | 688 | /* FIXME need a call to reverse twl4030_sih_setup() ... */ |
@@ -733,8 +736,9 @@ int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end) | |||
733 | } | 736 | } |
734 | 737 | ||
735 | /* install an irq handler to demultiplex the TWL4030 interrupt */ | 738 | /* install an irq handler to demultiplex the TWL4030 interrupt */ |
736 | status = request_threaded_irq(irq_num, NULL, handle_twl4030_pih, 0, | 739 | status = request_threaded_irq(irq_num, NULL, handle_twl4030_pih, |
737 | "TWL4030-PIH", NULL); | 740 | IRQF_ONESHOT, |
741 | "TWL4030-PIH", NULL); | ||
738 | if (status < 0) { | 742 | if (status < 0) { |
739 | pr_err("twl4030: could not claim irq%d: %d\n", irq_num, status); | 743 | pr_err("twl4030: could not claim irq%d: %d\n", irq_num, status); |
740 | goto fail_rqirq; | 744 | goto fail_rqirq; |
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index 5d6ba132837e..61894fced8ea 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c | |||
@@ -239,6 +239,7 @@ static int wm8994_suspend(struct device *dev) | |||
239 | 239 | ||
240 | switch (wm8994->type) { | 240 | switch (wm8994->type) { |
241 | case WM8958: | 241 | case WM8958: |
242 | case WM1811: | ||
242 | ret = wm8994_reg_read(wm8994, WM8958_MIC_DETECT_1); | 243 | ret = wm8994_reg_read(wm8994, WM8958_MIC_DETECT_1); |
243 | if (ret < 0) { | 244 | if (ret < 0) { |
244 | dev_err(dev, "Failed to read power status: %d\n", ret); | 245 | dev_err(dev, "Failed to read power status: %d\n", ret); |
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index e8a5eb38748b..d31c78b72b0f 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c | |||
@@ -302,17 +302,6 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev) | |||
302 | host->max_blk_size = 512; | 302 | host->max_blk_size = 512; |
303 | host->max_blk_count = PAGE_CACHE_SIZE / 512; | 303 | host->max_blk_count = PAGE_CACHE_SIZE / 512; |
304 | 304 | ||
305 | /* | ||
306 | * Enable runtime power management by default. This flag was added due | ||
307 | * to runtime power management causing disruption for some users, but | ||
308 | * the power on/off code has been improved since then. | ||
309 | * | ||
310 | * We'll enable this flag by default as an experiment, and if no | ||
311 | * problems are reported, we will follow up later and remove the flag | ||
312 | * altogether. | ||
313 | */ | ||
314 | host->caps = MMC_CAP_POWER_OFF_CARD; | ||
315 | |||
316 | return host; | 305 | return host; |
317 | 306 | ||
318 | free: | 307 | free: |
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c index a8b4d2aa18e5..f437c3e6f3aa 100644 --- a/drivers/mmc/host/at91_mci.c +++ b/drivers/mmc/host/at91_mci.c | |||
@@ -741,7 +741,7 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
741 | at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); | 741 | at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); |
742 | 742 | ||
743 | /* maybe switch power to the card */ | 743 | /* maybe switch power to the card */ |
744 | if (host->board->vcc_pin) { | 744 | if (gpio_is_valid(host->board->vcc_pin)) { |
745 | switch (ios->power_mode) { | 745 | switch (ios->power_mode) { |
746 | case MMC_POWER_OFF: | 746 | case MMC_POWER_OFF: |
747 | gpio_set_value(host->board->vcc_pin, 0); | 747 | gpio_set_value(host->board->vcc_pin, 0); |
@@ -897,7 +897,7 @@ static int at91_mci_get_ro(struct mmc_host *mmc) | |||
897 | { | 897 | { |
898 | struct at91mci_host *host = mmc_priv(mmc); | 898 | struct at91mci_host *host = mmc_priv(mmc); |
899 | 899 | ||
900 | if (host->board->wp_pin) | 900 | if (gpio_is_valid(host->board->wp_pin)) |
901 | return !!gpio_get_value(host->board->wp_pin); | 901 | return !!gpio_get_value(host->board->wp_pin); |
902 | /* | 902 | /* |
903 | * Board doesn't support read only detection; let the mmc core | 903 | * Board doesn't support read only detection; let the mmc core |
@@ -991,21 +991,21 @@ static int __init at91_mci_probe(struct platform_device *pdev) | |||
991 | * Reserve GPIOs ... board init code makes sure these pins are set | 991 | * Reserve GPIOs ... board init code makes sure these pins are set |
992 | * up as GPIOs with the right direction (input, except for vcc) | 992 | * up as GPIOs with the right direction (input, except for vcc) |
993 | */ | 993 | */ |
994 | if (host->board->det_pin) { | 994 | if (gpio_is_valid(host->board->det_pin)) { |
995 | ret = gpio_request(host->board->det_pin, "mmc_detect"); | 995 | ret = gpio_request(host->board->det_pin, "mmc_detect"); |
996 | if (ret < 0) { | 996 | if (ret < 0) { |
997 | dev_dbg(&pdev->dev, "couldn't claim card detect pin\n"); | 997 | dev_dbg(&pdev->dev, "couldn't claim card detect pin\n"); |
998 | goto fail4b; | 998 | goto fail4b; |
999 | } | 999 | } |
1000 | } | 1000 | } |
1001 | if (host->board->wp_pin) { | 1001 | if (gpio_is_valid(host->board->wp_pin)) { |
1002 | ret = gpio_request(host->board->wp_pin, "mmc_wp"); | 1002 | ret = gpio_request(host->board->wp_pin, "mmc_wp"); |
1003 | if (ret < 0) { | 1003 | if (ret < 0) { |
1004 | dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n"); | 1004 | dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n"); |
1005 | goto fail4; | 1005 | goto fail4; |
1006 | } | 1006 | } |
1007 | } | 1007 | } |
1008 | if (host->board->vcc_pin) { | 1008 | if (gpio_is_valid(host->board->vcc_pin)) { |
1009 | ret = gpio_request(host->board->vcc_pin, "mmc_vcc"); | 1009 | ret = gpio_request(host->board->vcc_pin, "mmc_vcc"); |
1010 | if (ret < 0) { | 1010 | if (ret < 0) { |
1011 | dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n"); | 1011 | dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n"); |
@@ -1057,7 +1057,7 @@ static int __init at91_mci_probe(struct platform_device *pdev) | |||
1057 | /* | 1057 | /* |
1058 | * Add host to MMC layer | 1058 | * Add host to MMC layer |
1059 | */ | 1059 | */ |
1060 | if (host->board->det_pin) { | 1060 | if (gpio_is_valid(host->board->det_pin)) { |
1061 | host->present = !gpio_get_value(host->board->det_pin); | 1061 | host->present = !gpio_get_value(host->board->det_pin); |
1062 | } | 1062 | } |
1063 | else | 1063 | else |
@@ -1068,7 +1068,7 @@ static int __init at91_mci_probe(struct platform_device *pdev) | |||
1068 | /* | 1068 | /* |
1069 | * monitor card insertion/removal if we can | 1069 | * monitor card insertion/removal if we can |
1070 | */ | 1070 | */ |
1071 | if (host->board->det_pin) { | 1071 | if (gpio_is_valid(host->board->det_pin)) { |
1072 | ret = request_irq(gpio_to_irq(host->board->det_pin), | 1072 | ret = request_irq(gpio_to_irq(host->board->det_pin), |
1073 | at91_mmc_det_irq, 0, mmc_hostname(mmc), host); | 1073 | at91_mmc_det_irq, 0, mmc_hostname(mmc), host); |
1074 | if (ret) | 1074 | if (ret) |
@@ -1087,13 +1087,13 @@ fail0: | |||
1087 | fail1: | 1087 | fail1: |
1088 | clk_put(host->mci_clk); | 1088 | clk_put(host->mci_clk); |
1089 | fail2: | 1089 | fail2: |
1090 | if (host->board->vcc_pin) | 1090 | if (gpio_is_valid(host->board->vcc_pin)) |
1091 | gpio_free(host->board->vcc_pin); | 1091 | gpio_free(host->board->vcc_pin); |
1092 | fail3: | 1092 | fail3: |
1093 | if (host->board->wp_pin) | 1093 | if (gpio_is_valid(host->board->wp_pin)) |
1094 | gpio_free(host->board->wp_pin); | 1094 | gpio_free(host->board->wp_pin); |
1095 | fail4: | 1095 | fail4: |
1096 | if (host->board->det_pin) | 1096 | if (gpio_is_valid(host->board->det_pin)) |
1097 | gpio_free(host->board->det_pin); | 1097 | gpio_free(host->board->det_pin); |
1098 | fail4b: | 1098 | fail4b: |
1099 | if (host->buffer) | 1099 | if (host->buffer) |
@@ -1125,7 +1125,7 @@ static int __exit at91_mci_remove(struct platform_device *pdev) | |||
1125 | dma_free_coherent(&pdev->dev, MCI_BUFSIZE, | 1125 | dma_free_coherent(&pdev->dev, MCI_BUFSIZE, |
1126 | host->buffer, host->physical_address); | 1126 | host->buffer, host->physical_address); |
1127 | 1127 | ||
1128 | if (host->board->det_pin) { | 1128 | if (gpio_is_valid(host->board->det_pin)) { |
1129 | if (device_can_wakeup(&pdev->dev)) | 1129 | if (device_can_wakeup(&pdev->dev)) |
1130 | free_irq(gpio_to_irq(host->board->det_pin), host); | 1130 | free_irq(gpio_to_irq(host->board->det_pin), host); |
1131 | device_init_wakeup(&pdev->dev, 0); | 1131 | device_init_wakeup(&pdev->dev, 0); |
@@ -1140,9 +1140,9 @@ static int __exit at91_mci_remove(struct platform_device *pdev) | |||
1140 | clk_disable(host->mci_clk); /* Disable the peripheral clock */ | 1140 | clk_disable(host->mci_clk); /* Disable the peripheral clock */ |
1141 | clk_put(host->mci_clk); | 1141 | clk_put(host->mci_clk); |
1142 | 1142 | ||
1143 | if (host->board->vcc_pin) | 1143 | if (gpio_is_valid(host->board->vcc_pin)) |
1144 | gpio_free(host->board->vcc_pin); | 1144 | gpio_free(host->board->vcc_pin); |
1145 | if (host->board->wp_pin) | 1145 | if (gpio_is_valid(host->board->wp_pin)) |
1146 | gpio_free(host->board->wp_pin); | 1146 | gpio_free(host->board->wp_pin); |
1147 | 1147 | ||
1148 | iounmap(host->baseaddr); | 1148 | iounmap(host->baseaddr); |
@@ -1163,7 +1163,7 @@ static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state) | |||
1163 | struct at91mci_host *host = mmc_priv(mmc); | 1163 | struct at91mci_host *host = mmc_priv(mmc); |
1164 | int ret = 0; | 1164 | int ret = 0; |
1165 | 1165 | ||
1166 | if (host->board->det_pin && device_may_wakeup(&pdev->dev)) | 1166 | if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev)) |
1167 | enable_irq_wake(host->board->det_pin); | 1167 | enable_irq_wake(host->board->det_pin); |
1168 | 1168 | ||
1169 | if (mmc) | 1169 | if (mmc) |
@@ -1178,7 +1178,7 @@ static int at91_mci_resume(struct platform_device *pdev) | |||
1178 | struct at91mci_host *host = mmc_priv(mmc); | 1178 | struct at91mci_host *host = mmc_priv(mmc); |
1179 | int ret = 0; | 1179 | int ret = 0; |
1180 | 1180 | ||
1181 | if (host->board->det_pin && device_may_wakeup(&pdev->dev)) | 1181 | if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev)) |
1182 | disable_irq_wake(host->board->det_pin); | 1182 | disable_irq_wake(host->board->det_pin); |
1183 | 1183 | ||
1184 | if (mmc) | 1184 | if (mmc) |
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 50b5f9926f64..0726e59fd418 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c | |||
@@ -675,7 +675,8 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, | |||
675 | unsigned int status) | 675 | unsigned int status) |
676 | { | 676 | { |
677 | /* First check for errors */ | 677 | /* First check for errors */ |
678 | if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { | 678 | if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR| |
679 | MCI_TXUNDERRUN|MCI_RXOVERRUN)) { | ||
679 | u32 remain, success; | 680 | u32 remain, success; |
680 | 681 | ||
681 | /* Terminate the DMA transfer */ | 682 | /* Terminate the DMA transfer */ |
@@ -754,8 +755,12 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, | |||
754 | } | 755 | } |
755 | 756 | ||
756 | if (!cmd->data || cmd->error) { | 757 | if (!cmd->data || cmd->error) { |
757 | if (host->data) | 758 | if (host->data) { |
759 | /* Terminate the DMA transfer */ | ||
760 | if (dma_inprogress(host)) | ||
761 | mmci_dma_data_error(host); | ||
758 | mmci_stop_data(host); | 762 | mmci_stop_data(host); |
763 | } | ||
759 | mmci_request_end(host, cmd->mrq); | 764 | mmci_request_end(host, cmd->mrq); |
760 | } else if (!(cmd->data->flags & MMC_DATA_READ)) { | 765 | } else if (!(cmd->data->flags & MMC_DATA_READ)) { |
761 | mmci_start_data(host, cmd->data); | 766 | mmci_start_data(host, cmd->data); |
@@ -955,8 +960,9 @@ static irqreturn_t mmci_irq(int irq, void *dev_id) | |||
955 | dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); | 960 | dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); |
956 | 961 | ||
957 | data = host->data; | 962 | data = host->data; |
958 | if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN| | 963 | if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR| |
959 | MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data) | 964 | MCI_TXUNDERRUN|MCI_RXOVERRUN|MCI_DATAEND| |
965 | MCI_DATABLOCKEND) && data) | ||
960 | mmci_data_irq(host, data, status); | 966 | mmci_data_irq(host, data, status); |
961 | 967 | ||
962 | cmd = host->cmd; | 968 | cmd = host->cmd; |
diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c index 87b6f079b6e0..b4257e700617 100644 --- a/drivers/mmc/host/sdhci-cns3xxx.c +++ b/drivers/mmc/host/sdhci-cns3xxx.c | |||
@@ -109,13 +109,10 @@ static struct platform_driver sdhci_cns3xxx_driver = { | |||
109 | .driver = { | 109 | .driver = { |
110 | .name = "sdhci-cns3xxx", | 110 | .name = "sdhci-cns3xxx", |
111 | .owner = THIS_MODULE, | 111 | .owner = THIS_MODULE, |
112 | .pm = SDHCI_PLTFM_PMOPS, | ||
112 | }, | 113 | }, |
113 | .probe = sdhci_cns3xxx_probe, | 114 | .probe = sdhci_cns3xxx_probe, |
114 | .remove = __devexit_p(sdhci_cns3xxx_remove), | 115 | .remove = __devexit_p(sdhci_cns3xxx_remove), |
115 | #ifdef CONFIG_PM | ||
116 | .suspend = sdhci_pltfm_suspend, | ||
117 | .resume = sdhci_pltfm_resume, | ||
118 | #endif | ||
119 | }; | 116 | }; |
120 | 117 | ||
121 | static int __init sdhci_cns3xxx_init(void) | 118 | static int __init sdhci_cns3xxx_init(void) |
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index f2d29dca4420..a81312c91f70 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c | |||
@@ -82,13 +82,10 @@ static struct platform_driver sdhci_dove_driver = { | |||
82 | .driver = { | 82 | .driver = { |
83 | .name = "sdhci-dove", | 83 | .name = "sdhci-dove", |
84 | .owner = THIS_MODULE, | 84 | .owner = THIS_MODULE, |
85 | .pm = SDHCI_PLTFM_PMOPS, | ||
85 | }, | 86 | }, |
86 | .probe = sdhci_dove_probe, | 87 | .probe = sdhci_dove_probe, |
87 | .remove = __devexit_p(sdhci_dove_remove), | 88 | .remove = __devexit_p(sdhci_dove_remove), |
88 | #ifdef CONFIG_PM | ||
89 | .suspend = sdhci_pltfm_suspend, | ||
90 | .resume = sdhci_pltfm_resume, | ||
91 | #endif | ||
92 | }; | 89 | }; |
93 | 90 | ||
94 | static int __init sdhci_dove_init(void) | 91 | static int __init sdhci_dove_init(void) |
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 4b976f00ea85..38ebc4ea259f 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c | |||
@@ -599,14 +599,11 @@ static struct platform_driver sdhci_esdhc_imx_driver = { | |||
599 | .name = "sdhci-esdhc-imx", | 599 | .name = "sdhci-esdhc-imx", |
600 | .owner = THIS_MODULE, | 600 | .owner = THIS_MODULE, |
601 | .of_match_table = imx_esdhc_dt_ids, | 601 | .of_match_table = imx_esdhc_dt_ids, |
602 | .pm = SDHCI_PLTFM_PMOPS, | ||
602 | }, | 603 | }, |
603 | .id_table = imx_esdhc_devtype, | 604 | .id_table = imx_esdhc_devtype, |
604 | .probe = sdhci_esdhc_imx_probe, | 605 | .probe = sdhci_esdhc_imx_probe, |
605 | .remove = __devexit_p(sdhci_esdhc_imx_remove), | 606 | .remove = __devexit_p(sdhci_esdhc_imx_remove), |
606 | #ifdef CONFIG_PM | ||
607 | .suspend = sdhci_pltfm_suspend, | ||
608 | .resume = sdhci_pltfm_resume, | ||
609 | #endif | ||
610 | }; | 607 | }; |
611 | 608 | ||
612 | static int __init sdhci_esdhc_imx_init(void) | 609 | static int __init sdhci_esdhc_imx_init(void) |
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index 59e9d003e589..01e5f627e0f0 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c | |||
@@ -125,13 +125,10 @@ static struct platform_driver sdhci_esdhc_driver = { | |||
125 | .name = "sdhci-esdhc", | 125 | .name = "sdhci-esdhc", |
126 | .owner = THIS_MODULE, | 126 | .owner = THIS_MODULE, |
127 | .of_match_table = sdhci_esdhc_of_match, | 127 | .of_match_table = sdhci_esdhc_of_match, |
128 | .pm = SDHCI_PLTFM_PMOPS, | ||
128 | }, | 129 | }, |
129 | .probe = sdhci_esdhc_probe, | 130 | .probe = sdhci_esdhc_probe, |
130 | .remove = __devexit_p(sdhci_esdhc_remove), | 131 | .remove = __devexit_p(sdhci_esdhc_remove), |
131 | #ifdef CONFIG_PM | ||
132 | .suspend = sdhci_pltfm_suspend, | ||
133 | .resume = sdhci_pltfm_resume, | ||
134 | #endif | ||
135 | }; | 132 | }; |
136 | 133 | ||
137 | static int __init sdhci_esdhc_init(void) | 134 | static int __init sdhci_esdhc_init(void) |
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c index 9b0d794a4f69..3619adc7d9fc 100644 --- a/drivers/mmc/host/sdhci-of-hlwd.c +++ b/drivers/mmc/host/sdhci-of-hlwd.c | |||
@@ -87,13 +87,10 @@ static struct platform_driver sdhci_hlwd_driver = { | |||
87 | .name = "sdhci-hlwd", | 87 | .name = "sdhci-hlwd", |
88 | .owner = THIS_MODULE, | 88 | .owner = THIS_MODULE, |
89 | .of_match_table = sdhci_hlwd_of_match, | 89 | .of_match_table = sdhci_hlwd_of_match, |
90 | .pm = SDHCI_PLTFM_PMOPS, | ||
90 | }, | 91 | }, |
91 | .probe = sdhci_hlwd_probe, | 92 | .probe = sdhci_hlwd_probe, |
92 | .remove = __devexit_p(sdhci_hlwd_remove), | 93 | .remove = __devexit_p(sdhci_hlwd_remove), |
93 | #ifdef CONFIG_PM | ||
94 | .suspend = sdhci_pltfm_suspend, | ||
95 | .resume = sdhci_pltfm_resume, | ||
96 | #endif | ||
97 | }; | 94 | }; |
98 | 95 | ||
99 | static int __init sdhci_hlwd_init(void) | 96 | static int __init sdhci_hlwd_init(void) |
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index d833d9c2f7e3..6878a94626bc 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c | |||
@@ -54,8 +54,7 @@ struct sdhci_pci_fixes { | |||
54 | int (*probe_slot) (struct sdhci_pci_slot *); | 54 | int (*probe_slot) (struct sdhci_pci_slot *); |
55 | void (*remove_slot) (struct sdhci_pci_slot *, int); | 55 | void (*remove_slot) (struct sdhci_pci_slot *, int); |
56 | 56 | ||
57 | int (*suspend) (struct sdhci_pci_chip *, | 57 | int (*suspend) (struct sdhci_pci_chip *); |
58 | pm_message_t); | ||
59 | int (*resume) (struct sdhci_pci_chip *); | 58 | int (*resume) (struct sdhci_pci_chip *); |
60 | }; | 59 | }; |
61 | 60 | ||
@@ -549,7 +548,7 @@ static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead) | |||
549 | jmicron_enable_mmc(slot->host, 0); | 548 | jmicron_enable_mmc(slot->host, 0); |
550 | } | 549 | } |
551 | 550 | ||
552 | static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state) | 551 | static int jmicron_suspend(struct sdhci_pci_chip *chip) |
553 | { | 552 | { |
554 | int i; | 553 | int i; |
555 | 554 | ||
@@ -993,8 +992,9 @@ static struct sdhci_ops sdhci_pci_ops = { | |||
993 | 992 | ||
994 | #ifdef CONFIG_PM | 993 | #ifdef CONFIG_PM |
995 | 994 | ||
996 | static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) | 995 | static int sdhci_pci_suspend(struct device *dev) |
997 | { | 996 | { |
997 | struct pci_dev *pdev = to_pci_dev(dev); | ||
998 | struct sdhci_pci_chip *chip; | 998 | struct sdhci_pci_chip *chip; |
999 | struct sdhci_pci_slot *slot; | 999 | struct sdhci_pci_slot *slot; |
1000 | mmc_pm_flag_t slot_pm_flags; | 1000 | mmc_pm_flag_t slot_pm_flags; |
@@ -1010,7 +1010,7 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |||
1010 | if (!slot) | 1010 | if (!slot) |
1011 | continue; | 1011 | continue; |
1012 | 1012 | ||
1013 | ret = sdhci_suspend_host(slot->host, state); | 1013 | ret = sdhci_suspend_host(slot->host); |
1014 | 1014 | ||
1015 | if (ret) { | 1015 | if (ret) { |
1016 | for (i--; i >= 0; i--) | 1016 | for (i--; i >= 0; i--) |
@@ -1026,7 +1026,7 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |||
1026 | } | 1026 | } |
1027 | 1027 | ||
1028 | if (chip->fixes && chip->fixes->suspend) { | 1028 | if (chip->fixes && chip->fixes->suspend) { |
1029 | ret = chip->fixes->suspend(chip, state); | 1029 | ret = chip->fixes->suspend(chip); |
1030 | if (ret) { | 1030 | if (ret) { |
1031 | for (i = chip->num_slots - 1; i >= 0; i--) | 1031 | for (i = chip->num_slots - 1; i >= 0; i--) |
1032 | sdhci_resume_host(chip->slots[i]->host); | 1032 | sdhci_resume_host(chip->slots[i]->host); |
@@ -1042,16 +1042,17 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |||
1042 | } | 1042 | } |
1043 | pci_set_power_state(pdev, PCI_D3hot); | 1043 | pci_set_power_state(pdev, PCI_D3hot); |
1044 | } else { | 1044 | } else { |
1045 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); | 1045 | pci_enable_wake(pdev, PCI_D3hot, 0); |
1046 | pci_disable_device(pdev); | 1046 | pci_disable_device(pdev); |
1047 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 1047 | pci_set_power_state(pdev, PCI_D3hot); |
1048 | } | 1048 | } |
1049 | 1049 | ||
1050 | return 0; | 1050 | return 0; |
1051 | } | 1051 | } |
1052 | 1052 | ||
1053 | static int sdhci_pci_resume(struct pci_dev *pdev) | 1053 | static int sdhci_pci_resume(struct device *dev) |
1054 | { | 1054 | { |
1055 | struct pci_dev *pdev = to_pci_dev(dev); | ||
1055 | struct sdhci_pci_chip *chip; | 1056 | struct sdhci_pci_chip *chip; |
1056 | struct sdhci_pci_slot *slot; | 1057 | struct sdhci_pci_slot *slot; |
1057 | int i, ret; | 1058 | int i, ret; |
@@ -1099,7 +1100,6 @@ static int sdhci_pci_runtime_suspend(struct device *dev) | |||
1099 | struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); | 1100 | struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); |
1100 | struct sdhci_pci_chip *chip; | 1101 | struct sdhci_pci_chip *chip; |
1101 | struct sdhci_pci_slot *slot; | 1102 | struct sdhci_pci_slot *slot; |
1102 | pm_message_t state = { .event = PM_EVENT_SUSPEND }; | ||
1103 | int i, ret; | 1103 | int i, ret; |
1104 | 1104 | ||
1105 | chip = pci_get_drvdata(pdev); | 1105 | chip = pci_get_drvdata(pdev); |
@@ -1121,7 +1121,7 @@ static int sdhci_pci_runtime_suspend(struct device *dev) | |||
1121 | } | 1121 | } |
1122 | 1122 | ||
1123 | if (chip->fixes && chip->fixes->suspend) { | 1123 | if (chip->fixes && chip->fixes->suspend) { |
1124 | ret = chip->fixes->suspend(chip, state); | 1124 | ret = chip->fixes->suspend(chip); |
1125 | if (ret) { | 1125 | if (ret) { |
1126 | for (i = chip->num_slots - 1; i >= 0; i--) | 1126 | for (i = chip->num_slots - 1; i >= 0; i--) |
1127 | sdhci_runtime_resume_host(chip->slots[i]->host); | 1127 | sdhci_runtime_resume_host(chip->slots[i]->host); |
@@ -1176,6 +1176,8 @@ static int sdhci_pci_runtime_idle(struct device *dev) | |||
1176 | #endif | 1176 | #endif |
1177 | 1177 | ||
1178 | static const struct dev_pm_ops sdhci_pci_pm_ops = { | 1178 | static const struct dev_pm_ops sdhci_pci_pm_ops = { |
1179 | .suspend = sdhci_pci_suspend, | ||
1180 | .resume = sdhci_pci_resume, | ||
1179 | .runtime_suspend = sdhci_pci_runtime_suspend, | 1181 | .runtime_suspend = sdhci_pci_runtime_suspend, |
1180 | .runtime_resume = sdhci_pci_runtime_resume, | 1182 | .runtime_resume = sdhci_pci_runtime_resume, |
1181 | .runtime_idle = sdhci_pci_runtime_idle, | 1183 | .runtime_idle = sdhci_pci_runtime_idle, |
@@ -1428,8 +1430,6 @@ static struct pci_driver sdhci_driver = { | |||
1428 | .id_table = pci_ids, | 1430 | .id_table = pci_ids, |
1429 | .probe = sdhci_pci_probe, | 1431 | .probe = sdhci_pci_probe, |
1430 | .remove = __devexit_p(sdhci_pci_remove), | 1432 | .remove = __devexit_p(sdhci_pci_remove), |
1431 | .suspend = sdhci_pci_suspend, | ||
1432 | .resume = sdhci_pci_resume, | ||
1433 | .driver = { | 1433 | .driver = { |
1434 | .pm = &sdhci_pci_pm_ops | 1434 | .pm = &sdhci_pci_pm_ops |
1435 | }, | 1435 | }, |
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index a9e12ea05583..03970bcb3495 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c | |||
@@ -194,21 +194,25 @@ int sdhci_pltfm_unregister(struct platform_device *pdev) | |||
194 | EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister); | 194 | EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister); |
195 | 195 | ||
196 | #ifdef CONFIG_PM | 196 | #ifdef CONFIG_PM |
197 | int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state) | 197 | static int sdhci_pltfm_suspend(struct device *dev) |
198 | { | 198 | { |
199 | struct sdhci_host *host = platform_get_drvdata(dev); | 199 | struct sdhci_host *host = dev_get_drvdata(dev); |
200 | 200 | ||
201 | return sdhci_suspend_host(host, state); | 201 | return sdhci_suspend_host(host); |
202 | } | 202 | } |
203 | EXPORT_SYMBOL_GPL(sdhci_pltfm_suspend); | ||
204 | 203 | ||
205 | int sdhci_pltfm_resume(struct platform_device *dev) | 204 | static int sdhci_pltfm_resume(struct device *dev) |
206 | { | 205 | { |
207 | struct sdhci_host *host = platform_get_drvdata(dev); | 206 | struct sdhci_host *host = dev_get_drvdata(dev); |
208 | 207 | ||
209 | return sdhci_resume_host(host); | 208 | return sdhci_resume_host(host); |
210 | } | 209 | } |
211 | EXPORT_SYMBOL_GPL(sdhci_pltfm_resume); | 210 | |
211 | const struct dev_pm_ops sdhci_pltfm_pmops = { | ||
212 | .suspend = sdhci_pltfm_suspend, | ||
213 | .resume = sdhci_pltfm_resume, | ||
214 | }; | ||
215 | EXPORT_SYMBOL_GPL(sdhci_pltfm_pmops); | ||
212 | #endif /* CONFIG_PM */ | 216 | #endif /* CONFIG_PM */ |
213 | 217 | ||
214 | static int __init sdhci_pltfm_drv_init(void) | 218 | static int __init sdhci_pltfm_drv_init(void) |
diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h index 3a9fc3f40840..37e0e184a0bb 100644 --- a/drivers/mmc/host/sdhci-pltfm.h +++ b/drivers/mmc/host/sdhci-pltfm.h | |||
@@ -99,8 +99,10 @@ extern int sdhci_pltfm_register(struct platform_device *pdev, | |||
99 | extern int sdhci_pltfm_unregister(struct platform_device *pdev); | 99 | extern int sdhci_pltfm_unregister(struct platform_device *pdev); |
100 | 100 | ||
101 | #ifdef CONFIG_PM | 101 | #ifdef CONFIG_PM |
102 | extern int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state); | 102 | extern const struct dev_pm_ops sdhci_pltfm_pmops; |
103 | extern int sdhci_pltfm_resume(struct platform_device *dev); | 103 | #define SDHCI_PLTFM_PMOPS (&sdhci_pltfm_pmops) |
104 | #else | ||
105 | #define SDHCI_PLTFM_PMOPS NULL | ||
104 | #endif | 106 | #endif |
105 | 107 | ||
106 | #endif /* _DRIVERS_MMC_SDHCI_PLTFM_H */ | 108 | #endif /* _DRIVERS_MMC_SDHCI_PLTFM_H */ |
diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index d4bf6d30c7ba..7a039c3cb1f1 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c | |||
@@ -218,13 +218,10 @@ static struct platform_driver sdhci_pxav2_driver = { | |||
218 | .driver = { | 218 | .driver = { |
219 | .name = "sdhci-pxav2", | 219 | .name = "sdhci-pxav2", |
220 | .owner = THIS_MODULE, | 220 | .owner = THIS_MODULE, |
221 | .pm = SDHCI_PLTFM_PMOPS, | ||
221 | }, | 222 | }, |
222 | .probe = sdhci_pxav2_probe, | 223 | .probe = sdhci_pxav2_probe, |
223 | .remove = __devexit_p(sdhci_pxav2_remove), | 224 | .remove = __devexit_p(sdhci_pxav2_remove), |
224 | #ifdef CONFIG_PM | ||
225 | .suspend = sdhci_pltfm_suspend, | ||
226 | .resume = sdhci_pltfm_resume, | ||
227 | #endif | ||
228 | }; | 225 | }; |
229 | static int __init sdhci_pxav2_init(void) | 226 | static int __init sdhci_pxav2_init(void) |
230 | { | 227 | { |
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index cff4ad3e7a59..15673a7ee6a5 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c | |||
@@ -264,13 +264,10 @@ static struct platform_driver sdhci_pxav3_driver = { | |||
264 | .driver = { | 264 | .driver = { |
265 | .name = "sdhci-pxav3", | 265 | .name = "sdhci-pxav3", |
266 | .owner = THIS_MODULE, | 266 | .owner = THIS_MODULE, |
267 | .pm = SDHCI_PLTFM_PMOPS, | ||
267 | }, | 268 | }, |
268 | .probe = sdhci_pxav3_probe, | 269 | .probe = sdhci_pxav3_probe, |
269 | .remove = __devexit_p(sdhci_pxav3_remove), | 270 | .remove = __devexit_p(sdhci_pxav3_remove), |
270 | #ifdef CONFIG_PM | ||
271 | .suspend = sdhci_pltfm_suspend, | ||
272 | .resume = sdhci_pltfm_resume, | ||
273 | #endif | ||
274 | }; | 271 | }; |
275 | static int __init sdhci_pxav3_init(void) | 272 | static int __init sdhci_pxav3_init(void) |
276 | { | 273 | { |
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index cb60c4197e0a..9a20d1f55bb7 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c | |||
@@ -435,14 +435,11 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
435 | 435 | ||
436 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 436 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
437 | struct clk *clk; | 437 | struct clk *clk; |
438 | char *name = pdata->clocks[ptr]; | 438 | char name[14]; |
439 | |||
440 | if (name == NULL) | ||
441 | continue; | ||
442 | 439 | ||
440 | snprintf(name, 14, "mmc_busclk.%d", ptr); | ||
443 | clk = clk_get(dev, name); | 441 | clk = clk_get(dev, name); |
444 | if (IS_ERR(clk)) { | 442 | if (IS_ERR(clk)) { |
445 | dev_err(dev, "failed to get clock %s\n", name); | ||
446 | continue; | 443 | continue; |
447 | } | 444 | } |
448 | 445 | ||
@@ -622,23 +619,29 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) | |||
622 | 619 | ||
623 | #ifdef CONFIG_PM | 620 | #ifdef CONFIG_PM |
624 | 621 | ||
625 | static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm) | 622 | static int sdhci_s3c_suspend(struct device *dev) |
626 | { | 623 | { |
627 | struct sdhci_host *host = platform_get_drvdata(dev); | 624 | struct sdhci_host *host = dev_get_drvdata(dev); |
628 | 625 | ||
629 | return sdhci_suspend_host(host, pm); | 626 | return sdhci_suspend_host(host); |
630 | } | 627 | } |
631 | 628 | ||
632 | static int sdhci_s3c_resume(struct platform_device *dev) | 629 | static int sdhci_s3c_resume(struct device *dev) |
633 | { | 630 | { |
634 | struct sdhci_host *host = platform_get_drvdata(dev); | 631 | struct sdhci_host *host = dev_get_drvdata(dev); |
635 | 632 | ||
636 | return sdhci_resume_host(host); | 633 | return sdhci_resume_host(host); |
637 | } | 634 | } |
638 | 635 | ||
636 | static const struct dev_pm_ops sdhci_s3c_pmops = { | ||
637 | .suspend = sdhci_s3c_suspend, | ||
638 | .resume = sdhci_s3c_resume, | ||
639 | }; | ||
640 | |||
641 | #define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops) | ||
642 | |||
639 | #else | 643 | #else |
640 | #define sdhci_s3c_suspend NULL | 644 | #define SDHCI_S3C_PMOPS NULL |
641 | #define sdhci_s3c_resume NULL | ||
642 | #endif | 645 | #endif |
643 | 646 | ||
644 | static struct platform_driver sdhci_s3c_driver = { | 647 | static struct platform_driver sdhci_s3c_driver = { |
@@ -647,6 +650,7 @@ static struct platform_driver sdhci_s3c_driver = { | |||
647 | .driver = { | 650 | .driver = { |
648 | .owner = THIS_MODULE, | 651 | .owner = THIS_MODULE, |
649 | .name = "s3c-sdhci", | 652 | .name = "s3c-sdhci", |
653 | .pm = SDHCI_S3C_PMOPS, | ||
650 | }, | 654 | }, |
651 | }; | 655 | }; |
652 | 656 | ||
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 89699e861fc1..e2e18d3f949c 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c | |||
@@ -318,13 +318,10 @@ static struct platform_driver sdhci_tegra_driver = { | |||
318 | .name = "sdhci-tegra", | 318 | .name = "sdhci-tegra", |
319 | .owner = THIS_MODULE, | 319 | .owner = THIS_MODULE, |
320 | .of_match_table = sdhci_tegra_dt_match, | 320 | .of_match_table = sdhci_tegra_dt_match, |
321 | .pm = SDHCI_PLTFM_PMOPS, | ||
321 | }, | 322 | }, |
322 | .probe = sdhci_tegra_probe, | 323 | .probe = sdhci_tegra_probe, |
323 | .remove = __devexit_p(sdhci_tegra_remove), | 324 | .remove = __devexit_p(sdhci_tegra_remove), |
324 | #ifdef CONFIG_PM | ||
325 | .suspend = sdhci_pltfm_suspend, | ||
326 | .resume = sdhci_pltfm_resume, | ||
327 | #endif | ||
328 | }; | 325 | }; |
329 | 326 | ||
330 | static int __init sdhci_tegra_init(void) | 327 | static int __init sdhci_tegra_init(void) |
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 6d8eea323541..19ed580f2cab 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c | |||
@@ -2327,7 +2327,7 @@ out: | |||
2327 | 2327 | ||
2328 | #ifdef CONFIG_PM | 2328 | #ifdef CONFIG_PM |
2329 | 2329 | ||
2330 | int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state) | 2330 | int sdhci_suspend_host(struct sdhci_host *host) |
2331 | { | 2331 | { |
2332 | int ret; | 2332 | int ret; |
2333 | 2333 | ||
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 0a5b65460d8a..a04d4d0c6fd2 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h | |||
@@ -374,7 +374,7 @@ extern int sdhci_add_host(struct sdhci_host *host); | |||
374 | extern void sdhci_remove_host(struct sdhci_host *host, int dead); | 374 | extern void sdhci_remove_host(struct sdhci_host *host, int dead); |
375 | 375 | ||
376 | #ifdef CONFIG_PM | 376 | #ifdef CONFIG_PM |
377 | extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state); | 377 | extern int sdhci_suspend_host(struct sdhci_host *host); |
378 | extern int sdhci_resume_host(struct sdhci_host *host); | 378 | extern int sdhci_resume_host(struct sdhci_host *host); |
379 | extern void sdhci_enable_irq_wakeups(struct sdhci_host *host); | 379 | extern void sdhci_enable_irq_wakeups(struct sdhci_host *host); |
380 | #endif | 380 | #endif |
diff --git a/drivers/mmc/host/vub300.c b/drivers/mmc/host/vub300.c index e8f6e65183d7..2ec978bc32ba 100644 --- a/drivers/mmc/host/vub300.c +++ b/drivers/mmc/host/vub300.c | |||
@@ -259,7 +259,7 @@ static int firmware_rom_wait_states = 0x04; | |||
259 | static int firmware_rom_wait_states = 0x1C; | 259 | static int firmware_rom_wait_states = 0x1C; |
260 | #endif | 260 | #endif |
261 | 261 | ||
262 | module_param(firmware_rom_wait_states, bool, 0644); | 262 | module_param(firmware_rom_wait_states, int, 0644); |
263 | MODULE_PARM_DESC(firmware_rom_wait_states, | 263 | MODULE_PARM_DESC(firmware_rom_wait_states, |
264 | "ROM wait states byte=RRRIIEEE (Reserved Internal External)"); | 264 | "ROM wait states byte=RRRIIEEE (Reserved Internal External)"); |
265 | 265 | ||
diff --git a/drivers/mtd/maps/plat-ram.c b/drivers/mtd/maps/plat-ram.c index 94f553489725..45876d0e5b8e 100644 --- a/drivers/mtd/maps/plat-ram.c +++ b/drivers/mtd/maps/plat-ram.c | |||
@@ -227,10 +227,14 @@ static int platram_probe(struct platform_device *pdev) | |||
227 | if (!err) | 227 | if (!err) |
228 | dev_info(&pdev->dev, "registered mtd device\n"); | 228 | dev_info(&pdev->dev, "registered mtd device\n"); |
229 | 229 | ||
230 | /* add the whole device. */ | 230 | if (pdata->nr_partitions) { |
231 | err = mtd_device_register(info->mtd, NULL, 0); | 231 | /* add the whole device. */ |
232 | if (err) | 232 | err = mtd_device_register(info->mtd, NULL, 0); |
233 | dev_err(&pdev->dev, "failed to register the entire device\n"); | 233 | if (err) { |
234 | dev_err(&pdev->dev, | ||
235 | "failed to register the entire device\n"); | ||
236 | } | ||
237 | } | ||
234 | 238 | ||
235 | return err; | 239 | return err; |
236 | 240 | ||
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c index 411a17df9fc1..2a25b6789af4 100644 --- a/drivers/mtd/maps/pxa2xx-flash.c +++ b/drivers/mtd/maps/pxa2xx-flash.c | |||
@@ -98,7 +98,7 @@ static int __devinit pxa2xx_flash_probe(struct platform_device *pdev) | |||
98 | } | 98 | } |
99 | info->mtd->owner = THIS_MODULE; | 99 | info->mtd->owner = THIS_MODULE; |
100 | 100 | ||
101 | mtd_device_parse_register(info->mtd, probes, 0, NULL, 0); | 101 | mtd_device_parse_register(info->mtd, probes, 0, flash->parts, flash->nr_parts); |
102 | 102 | ||
103 | platform_set_drvdata(pdev, info); | 103 | platform_set_drvdata(pdev, info); |
104 | return 0; | 104 | return 0; |
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 23e5d77c39fc..4dd056e2e16a 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c | |||
@@ -113,7 +113,7 @@ static int cpu_has_dma(void) | |||
113 | */ | 113 | */ |
114 | static void atmel_nand_enable(struct atmel_nand_host *host) | 114 | static void atmel_nand_enable(struct atmel_nand_host *host) |
115 | { | 115 | { |
116 | if (host->board->enable_pin) | 116 | if (gpio_is_valid(host->board->enable_pin)) |
117 | gpio_set_value(host->board->enable_pin, 0); | 117 | gpio_set_value(host->board->enable_pin, 0); |
118 | } | 118 | } |
119 | 119 | ||
@@ -122,7 +122,7 @@ static void atmel_nand_enable(struct atmel_nand_host *host) | |||
122 | */ | 122 | */ |
123 | static void atmel_nand_disable(struct atmel_nand_host *host) | 123 | static void atmel_nand_disable(struct atmel_nand_host *host) |
124 | { | 124 | { |
125 | if (host->board->enable_pin) | 125 | if (gpio_is_valid(host->board->enable_pin)) |
126 | gpio_set_value(host->board->enable_pin, 1); | 126 | gpio_set_value(host->board->enable_pin, 1); |
127 | } | 127 | } |
128 | 128 | ||
@@ -492,7 +492,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) | |||
492 | nand_chip->IO_ADDR_W = host->io_base; | 492 | nand_chip->IO_ADDR_W = host->io_base; |
493 | nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl; | 493 | nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl; |
494 | 494 | ||
495 | if (host->board->rdy_pin) | 495 | if (gpio_is_valid(host->board->rdy_pin)) |
496 | nand_chip->dev_ready = atmel_nand_device_ready; | 496 | nand_chip->dev_ready = atmel_nand_device_ready; |
497 | 497 | ||
498 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); | 498 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
@@ -530,7 +530,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) | |||
530 | platform_set_drvdata(pdev, host); | 530 | platform_set_drvdata(pdev, host); |
531 | atmel_nand_enable(host); | 531 | atmel_nand_enable(host); |
532 | 532 | ||
533 | if (host->board->det_pin) { | 533 | if (gpio_is_valid(host->board->det_pin)) { |
534 | if (gpio_get_value(host->board->det_pin)) { | 534 | if (gpio_get_value(host->board->det_pin)) { |
535 | printk(KERN_INFO "No SmartMedia card inserted.\n"); | 535 | printk(KERN_INFO "No SmartMedia card inserted.\n"); |
536 | res = -ENXIO; | 536 | res = -ENXIO; |
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c index 071b63420f0e..493ec2fcf97f 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c | |||
@@ -21,9 +21,9 @@ | |||
21 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
22 | #include <linux/slab.h> | 22 | #include <linux/slab.h> |
23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/module.h> | ||
24 | #include <linux/mtd/gpmi-nand.h> | 25 | #include <linux/mtd/gpmi-nand.h> |
25 | #include <linux/mtd/partitions.h> | 26 | #include <linux/mtd/partitions.h> |
26 | |||
27 | #include "gpmi-nand.h" | 27 | #include "gpmi-nand.h" |
28 | 28 | ||
29 | /* add our owner bbt descriptor */ | 29 | /* add our owner bbt descriptor */ |
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index ee1713907b92..f8aacf48ecdd 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c | |||
@@ -188,7 +188,7 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc, | |||
188 | if (!flash_np) | 188 | if (!flash_np) |
189 | return -ENODEV; | 189 | return -ENODEV; |
190 | 190 | ||
191 | ppdata->of_node = flash_np; | 191 | ppdata.of_node = flash_np; |
192 | ndfc->mtd.name = kasprintf(GFP_KERNEL, "%s.%s", | 192 | ndfc->mtd.name = kasprintf(GFP_KERNEL, "%s.%s", |
193 | dev_name(&ndfc->ofdev->dev), flash_np->name); | 193 | dev_name(&ndfc->ofdev->dev), flash_np->name); |
194 | if (!ndfc->mtd.name) { | 194 | if (!ndfc->mtd.name) { |
diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c index 56624d303487..dfeb46cb3f74 100644 --- a/drivers/net/ethernet/cadence/at91_ether.c +++ b/drivers/net/ethernet/cadence/at91_ether.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/skbuff.h> | 26 | #include <linux/skbuff.h> |
27 | #include <linux/dma-mapping.h> | 27 | #include <linux/dma-mapping.h> |
28 | #include <linux/ethtool.h> | 28 | #include <linux/ethtool.h> |
29 | #include <linux/platform_data/macb.h> | ||
29 | #include <linux/platform_device.h> | 30 | #include <linux/platform_device.h> |
30 | #include <linux/clk.h> | 31 | #include <linux/clk.h> |
31 | #include <linux/gfp.h> | 32 | #include <linux/gfp.h> |
@@ -984,7 +985,7 @@ static const struct net_device_ops at91ether_netdev_ops = { | |||
984 | static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address, | 985 | static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address, |
985 | struct platform_device *pdev, struct clk *ether_clk) | 986 | struct platform_device *pdev, struct clk *ether_clk) |
986 | { | 987 | { |
987 | struct at91_eth_data *board_data = pdev->dev.platform_data; | 988 | struct macb_platform_data *board_data = pdev->dev.platform_data; |
988 | struct net_device *dev; | 989 | struct net_device *dev; |
989 | struct at91_private *lp; | 990 | struct at91_private *lp; |
990 | unsigned int val; | 991 | unsigned int val; |
diff --git a/drivers/net/ethernet/cadence/at91_ether.h b/drivers/net/ethernet/cadence/at91_ether.h index 353f4dab62be..3725fbb0defe 100644 --- a/drivers/net/ethernet/cadence/at91_ether.h +++ b/drivers/net/ethernet/cadence/at91_ether.h | |||
@@ -85,7 +85,9 @@ struct recv_desc_bufs | |||
85 | struct at91_private | 85 | struct at91_private |
86 | { | 86 | { |
87 | struct mii_if_info mii; /* ethtool support */ | 87 | struct mii_if_info mii; /* ethtool support */ |
88 | struct at91_eth_data board_data; /* board-specific configuration */ | 88 | struct macb_platform_data board_data; /* board-specific |
89 | * configuration (shared with | ||
90 | * macb for common data */ | ||
89 | struct clk *ether_clk; /* clock */ | 91 | struct clk *ether_clk; /* clock */ |
90 | 92 | ||
91 | /* PHY */ | 93 | /* PHY */ |
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index a437b46e5490..aa1d597091a8 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c | |||
@@ -8,6 +8,7 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
11 | #include <linux/clk.h> | 12 | #include <linux/clk.h> |
12 | #include <linux/module.h> | 13 | #include <linux/module.h> |
13 | #include <linux/moduleparam.h> | 14 | #include <linux/moduleparam.h> |
@@ -19,12 +20,10 @@ | |||
19 | #include <linux/netdevice.h> | 20 | #include <linux/netdevice.h> |
20 | #include <linux/etherdevice.h> | 21 | #include <linux/etherdevice.h> |
21 | #include <linux/dma-mapping.h> | 22 | #include <linux/dma-mapping.h> |
23 | #include <linux/platform_data/macb.h> | ||
22 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
23 | #include <linux/phy.h> | 25 | #include <linux/phy.h> |
24 | 26 | ||
25 | #include <mach/board.h> | ||
26 | #include <mach/cpu.h> | ||
27 | |||
28 | #include "macb.h" | 27 | #include "macb.h" |
29 | 28 | ||
30 | #define RX_BUFFER_SIZE 128 | 29 | #define RX_BUFFER_SIZE 128 |
@@ -84,7 +83,7 @@ static void __init macb_get_hwaddr(struct macb *bp) | |||
84 | if (is_valid_ether_addr(addr)) { | 83 | if (is_valid_ether_addr(addr)) { |
85 | memcpy(bp->dev->dev_addr, addr, sizeof(addr)); | 84 | memcpy(bp->dev->dev_addr, addr, sizeof(addr)); |
86 | } else { | 85 | } else { |
87 | dev_info(&bp->pdev->dev, "invalid hw address, using random\n"); | 86 | netdev_info(bp->dev, "invalid hw address, using random\n"); |
88 | random_ether_addr(bp->dev->dev_addr); | 87 | random_ether_addr(bp->dev->dev_addr); |
89 | } | 88 | } |
90 | } | 89 | } |
@@ -178,11 +177,12 @@ static void macb_handle_link_change(struct net_device *dev) | |||
178 | 177 | ||
179 | if (status_change) { | 178 | if (status_change) { |
180 | if (phydev->link) | 179 | if (phydev->link) |
181 | printk(KERN_INFO "%s: link up (%d/%s)\n", | 180 | netdev_info(dev, "link up (%d/%s)\n", |
182 | dev->name, phydev->speed, | 181 | phydev->speed, |
183 | DUPLEX_FULL == phydev->duplex ? "Full":"Half"); | 182 | phydev->duplex == DUPLEX_FULL ? |
183 | "Full" : "Half"); | ||
184 | else | 184 | else |
185 | printk(KERN_INFO "%s: link down\n", dev->name); | 185 | netdev_info(dev, "link down\n"); |
186 | } | 186 | } |
187 | } | 187 | } |
188 | 188 | ||
@@ -191,12 +191,12 @@ static int macb_mii_probe(struct net_device *dev) | |||
191 | { | 191 | { |
192 | struct macb *bp = netdev_priv(dev); | 192 | struct macb *bp = netdev_priv(dev); |
193 | struct phy_device *phydev; | 193 | struct phy_device *phydev; |
194 | struct eth_platform_data *pdata; | 194 | struct macb_platform_data *pdata; |
195 | int ret; | 195 | int ret; |
196 | 196 | ||
197 | phydev = phy_find_first(bp->mii_bus); | 197 | phydev = phy_find_first(bp->mii_bus); |
198 | if (!phydev) { | 198 | if (!phydev) { |
199 | printk (KERN_ERR "%s: no PHY found\n", dev->name); | 199 | netdev_err(dev, "no PHY found\n"); |
200 | return -1; | 200 | return -1; |
201 | } | 201 | } |
202 | 202 | ||
@@ -209,7 +209,7 @@ static int macb_mii_probe(struct net_device *dev) | |||
209 | PHY_INTERFACE_MODE_RMII : | 209 | PHY_INTERFACE_MODE_RMII : |
210 | PHY_INTERFACE_MODE_MII); | 210 | PHY_INTERFACE_MODE_MII); |
211 | if (ret) { | 211 | if (ret) { |
212 | printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); | 212 | netdev_err(dev, "Could not attach to PHY\n"); |
213 | return ret; | 213 | return ret; |
214 | } | 214 | } |
215 | 215 | ||
@@ -228,7 +228,7 @@ static int macb_mii_probe(struct net_device *dev) | |||
228 | 228 | ||
229 | static int macb_mii_init(struct macb *bp) | 229 | static int macb_mii_init(struct macb *bp) |
230 | { | 230 | { |
231 | struct eth_platform_data *pdata; | 231 | struct macb_platform_data *pdata; |
232 | int err = -ENXIO, i; | 232 | int err = -ENXIO, i; |
233 | 233 | ||
234 | /* Enable management port */ | 234 | /* Enable management port */ |
@@ -303,14 +303,13 @@ static void macb_tx(struct macb *bp) | |||
303 | status = macb_readl(bp, TSR); | 303 | status = macb_readl(bp, TSR); |
304 | macb_writel(bp, TSR, status); | 304 | macb_writel(bp, TSR, status); |
305 | 305 | ||
306 | dev_dbg(&bp->pdev->dev, "macb_tx status = %02lx\n", | 306 | netdev_dbg(bp->dev, "macb_tx status = %02lx\n", (unsigned long)status); |
307 | (unsigned long)status); | ||
308 | 307 | ||
309 | if (status & (MACB_BIT(UND) | MACB_BIT(TSR_RLE))) { | 308 | if (status & (MACB_BIT(UND) | MACB_BIT(TSR_RLE))) { |
310 | int i; | 309 | int i; |
311 | printk(KERN_ERR "%s: TX %s, resetting buffers\n", | 310 | netdev_err(bp->dev, "TX %s, resetting buffers\n", |
312 | bp->dev->name, status & MACB_BIT(UND) ? | 311 | status & MACB_BIT(UND) ? |
313 | "underrun" : "retry limit exceeded"); | 312 | "underrun" : "retry limit exceeded"); |
314 | 313 | ||
315 | /* Transfer ongoing, disable transmitter, to avoid confusion */ | 314 | /* Transfer ongoing, disable transmitter, to avoid confusion */ |
316 | if (status & MACB_BIT(TGO)) | 315 | if (status & MACB_BIT(TGO)) |
@@ -369,8 +368,8 @@ static void macb_tx(struct macb *bp) | |||
369 | if (!(bufstat & MACB_BIT(TX_USED))) | 368 | if (!(bufstat & MACB_BIT(TX_USED))) |
370 | break; | 369 | break; |
371 | 370 | ||
372 | dev_dbg(&bp->pdev->dev, "skb %u (data %p) TX complete\n", | 371 | netdev_dbg(bp->dev, "skb %u (data %p) TX complete\n", |
373 | tail, skb->data); | 372 | tail, skb->data); |
374 | dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len, | 373 | dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len, |
375 | DMA_TO_DEVICE); | 374 | DMA_TO_DEVICE); |
376 | bp->stats.tx_packets++; | 375 | bp->stats.tx_packets++; |
@@ -395,8 +394,8 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, | |||
395 | 394 | ||
396 | len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl); | 395 | len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl); |
397 | 396 | ||
398 | dev_dbg(&bp->pdev->dev, "macb_rx_frame frags %u - %u (len %u)\n", | 397 | netdev_dbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", |
399 | first_frag, last_frag, len); | 398 | first_frag, last_frag, len); |
400 | 399 | ||
401 | skb = dev_alloc_skb(len + RX_OFFSET); | 400 | skb = dev_alloc_skb(len + RX_OFFSET); |
402 | if (!skb) { | 401 | if (!skb) { |
@@ -437,8 +436,8 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, | |||
437 | 436 | ||
438 | bp->stats.rx_packets++; | 437 | bp->stats.rx_packets++; |
439 | bp->stats.rx_bytes += len; | 438 | bp->stats.rx_bytes += len; |
440 | dev_dbg(&bp->pdev->dev, "received skb of length %u, csum: %08x\n", | 439 | netdev_dbg(bp->dev, "received skb of length %u, csum: %08x\n", |
441 | skb->len, skb->csum); | 440 | skb->len, skb->csum); |
442 | netif_receive_skb(skb); | 441 | netif_receive_skb(skb); |
443 | 442 | ||
444 | return 0; | 443 | return 0; |
@@ -515,8 +514,8 @@ static int macb_poll(struct napi_struct *napi, int budget) | |||
515 | 514 | ||
516 | work_done = 0; | 515 | work_done = 0; |
517 | 516 | ||
518 | dev_dbg(&bp->pdev->dev, "poll: status = %08lx, budget = %d\n", | 517 | netdev_dbg(bp->dev, "poll: status = %08lx, budget = %d\n", |
519 | (unsigned long)status, budget); | 518 | (unsigned long)status, budget); |
520 | 519 | ||
521 | work_done = macb_rx(bp, budget); | 520 | work_done = macb_rx(bp, budget); |
522 | if (work_done < budget) { | 521 | if (work_done < budget) { |
@@ -565,8 +564,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) | |||
565 | macb_writel(bp, IDR, MACB_RX_INT_FLAGS); | 564 | macb_writel(bp, IDR, MACB_RX_INT_FLAGS); |
566 | 565 | ||
567 | if (napi_schedule_prep(&bp->napi)) { | 566 | if (napi_schedule_prep(&bp->napi)) { |
568 | dev_dbg(&bp->pdev->dev, | 567 | netdev_dbg(bp->dev, "scheduling RX softirq\n"); |
569 | "scheduling RX softirq\n"); | ||
570 | __napi_schedule(&bp->napi); | 568 | __napi_schedule(&bp->napi); |
571 | } | 569 | } |
572 | } | 570 | } |
@@ -587,11 +585,11 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) | |||
587 | 585 | ||
588 | if (status & MACB_BIT(HRESP)) { | 586 | if (status & MACB_BIT(HRESP)) { |
589 | /* | 587 | /* |
590 | * TODO: Reset the hardware, and maybe move the printk | 588 | * TODO: Reset the hardware, and maybe move the |
591 | * to a lower-priority context as well (work queue?) | 589 | * netdev_err to a lower-priority context as well |
590 | * (work queue?) | ||
592 | */ | 591 | */ |
593 | printk(KERN_ERR "%s: DMA bus error: HRESP not OK\n", | 592 | netdev_err(dev, "DMA bus error: HRESP not OK\n"); |
594 | dev->name); | ||
595 | } | 593 | } |
596 | 594 | ||
597 | status = macb_readl(bp, ISR); | 595 | status = macb_readl(bp, ISR); |
@@ -626,16 +624,12 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
626 | unsigned long flags; | 624 | unsigned long flags; |
627 | 625 | ||
628 | #ifdef DEBUG | 626 | #ifdef DEBUG |
629 | int i; | 627 | netdev_dbg(bp->dev, |
630 | dev_dbg(&bp->pdev->dev, | 628 | "start_xmit: len %u head %p data %p tail %p end %p\n", |
631 | "start_xmit: len %u head %p data %p tail %p end %p\n", | 629 | skb->len, skb->head, skb->data, |
632 | skb->len, skb->head, skb->data, | 630 | skb_tail_pointer(skb), skb_end_pointer(skb)); |
633 | skb_tail_pointer(skb), skb_end_pointer(skb)); | 631 | print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_OFFSET, 16, 1, |
634 | dev_dbg(&bp->pdev->dev, | 632 | skb->data, 16, true); |
635 | "data:"); | ||
636 | for (i = 0; i < 16; i++) | ||
637 | printk(" %02x", (unsigned int)skb->data[i]); | ||
638 | printk("\n"); | ||
639 | #endif | 633 | #endif |
640 | 634 | ||
641 | len = skb->len; | 635 | len = skb->len; |
@@ -645,21 +639,20 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
645 | if (TX_BUFFS_AVAIL(bp) < 1) { | 639 | if (TX_BUFFS_AVAIL(bp) < 1) { |
646 | netif_stop_queue(dev); | 640 | netif_stop_queue(dev); |
647 | spin_unlock_irqrestore(&bp->lock, flags); | 641 | spin_unlock_irqrestore(&bp->lock, flags); |
648 | dev_err(&bp->pdev->dev, | 642 | netdev_err(bp->dev, "BUG! Tx Ring full when queue awake!\n"); |
649 | "BUG! Tx Ring full when queue awake!\n"); | 643 | netdev_dbg(bp->dev, "tx_head = %u, tx_tail = %u\n", |
650 | dev_dbg(&bp->pdev->dev, "tx_head = %u, tx_tail = %u\n", | 644 | bp->tx_head, bp->tx_tail); |
651 | bp->tx_head, bp->tx_tail); | ||
652 | return NETDEV_TX_BUSY; | 645 | return NETDEV_TX_BUSY; |
653 | } | 646 | } |
654 | 647 | ||
655 | entry = bp->tx_head; | 648 | entry = bp->tx_head; |
656 | dev_dbg(&bp->pdev->dev, "Allocated ring entry %u\n", entry); | 649 | netdev_dbg(bp->dev, "Allocated ring entry %u\n", entry); |
657 | mapping = dma_map_single(&bp->pdev->dev, skb->data, | 650 | mapping = dma_map_single(&bp->pdev->dev, skb->data, |
658 | len, DMA_TO_DEVICE); | 651 | len, DMA_TO_DEVICE); |
659 | bp->tx_skb[entry].skb = skb; | 652 | bp->tx_skb[entry].skb = skb; |
660 | bp->tx_skb[entry].mapping = mapping; | 653 | bp->tx_skb[entry].mapping = mapping; |
661 | dev_dbg(&bp->pdev->dev, "Mapped skb data %p to DMA addr %08lx\n", | 654 | netdev_dbg(bp->dev, "Mapped skb data %p to DMA addr %08lx\n", |
662 | skb->data, (unsigned long)mapping); | 655 | skb->data, (unsigned long)mapping); |
663 | 656 | ||
664 | ctrl = MACB_BF(TX_FRMLEN, len); | 657 | ctrl = MACB_BF(TX_FRMLEN, len); |
665 | ctrl |= MACB_BIT(TX_LAST); | 658 | ctrl |= MACB_BIT(TX_LAST); |
@@ -723,27 +716,27 @@ static int macb_alloc_consistent(struct macb *bp) | |||
723 | &bp->rx_ring_dma, GFP_KERNEL); | 716 | &bp->rx_ring_dma, GFP_KERNEL); |
724 | if (!bp->rx_ring) | 717 | if (!bp->rx_ring) |
725 | goto out_err; | 718 | goto out_err; |
726 | dev_dbg(&bp->pdev->dev, | 719 | netdev_dbg(bp->dev, |
727 | "Allocated RX ring of %d bytes at %08lx (mapped %p)\n", | 720 | "Allocated RX ring of %d bytes at %08lx (mapped %p)\n", |
728 | size, (unsigned long)bp->rx_ring_dma, bp->rx_ring); | 721 | size, (unsigned long)bp->rx_ring_dma, bp->rx_ring); |
729 | 722 | ||
730 | size = TX_RING_BYTES; | 723 | size = TX_RING_BYTES; |
731 | bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size, | 724 | bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size, |
732 | &bp->tx_ring_dma, GFP_KERNEL); | 725 | &bp->tx_ring_dma, GFP_KERNEL); |
733 | if (!bp->tx_ring) | 726 | if (!bp->tx_ring) |
734 | goto out_err; | 727 | goto out_err; |
735 | dev_dbg(&bp->pdev->dev, | 728 | netdev_dbg(bp->dev, |
736 | "Allocated TX ring of %d bytes at %08lx (mapped %p)\n", | 729 | "Allocated TX ring of %d bytes at %08lx (mapped %p)\n", |
737 | size, (unsigned long)bp->tx_ring_dma, bp->tx_ring); | 730 | size, (unsigned long)bp->tx_ring_dma, bp->tx_ring); |
738 | 731 | ||
739 | size = RX_RING_SIZE * RX_BUFFER_SIZE; | 732 | size = RX_RING_SIZE * RX_BUFFER_SIZE; |
740 | bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, | 733 | bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, |
741 | &bp->rx_buffers_dma, GFP_KERNEL); | 734 | &bp->rx_buffers_dma, GFP_KERNEL); |
742 | if (!bp->rx_buffers) | 735 | if (!bp->rx_buffers) |
743 | goto out_err; | 736 | goto out_err; |
744 | dev_dbg(&bp->pdev->dev, | 737 | netdev_dbg(bp->dev, |
745 | "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n", | 738 | "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n", |
746 | size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers); | 739 | size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers); |
747 | 740 | ||
748 | return 0; | 741 | return 0; |
749 | 742 | ||
@@ -954,7 +947,7 @@ static int macb_open(struct net_device *dev) | |||
954 | struct macb *bp = netdev_priv(dev); | 947 | struct macb *bp = netdev_priv(dev); |
955 | int err; | 948 | int err; |
956 | 949 | ||
957 | dev_dbg(&bp->pdev->dev, "open\n"); | 950 | netdev_dbg(bp->dev, "open\n"); |
958 | 951 | ||
959 | /* if the phy is not yet register, retry later*/ | 952 | /* if the phy is not yet register, retry later*/ |
960 | if (!bp->phy_dev) | 953 | if (!bp->phy_dev) |
@@ -965,9 +958,8 @@ static int macb_open(struct net_device *dev) | |||
965 | 958 | ||
966 | err = macb_alloc_consistent(bp); | 959 | err = macb_alloc_consistent(bp); |
967 | if (err) { | 960 | if (err) { |
968 | printk(KERN_ERR | 961 | netdev_err(dev, "Unable to allocate DMA memory (error %d)\n", |
969 | "%s: Unable to allocate DMA memory (error %d)\n", | 962 | err); |
970 | dev->name, err); | ||
971 | return err; | 963 | return err; |
972 | } | 964 | } |
973 | 965 | ||
@@ -1119,7 +1111,7 @@ static const struct net_device_ops macb_netdev_ops = { | |||
1119 | 1111 | ||
1120 | static int __init macb_probe(struct platform_device *pdev) | 1112 | static int __init macb_probe(struct platform_device *pdev) |
1121 | { | 1113 | { |
1122 | struct eth_platform_data *pdata; | 1114 | struct macb_platform_data *pdata; |
1123 | struct resource *regs; | 1115 | struct resource *regs; |
1124 | struct net_device *dev; | 1116 | struct net_device *dev; |
1125 | struct macb *bp; | 1117 | struct macb *bp; |
@@ -1152,28 +1144,19 @@ static int __init macb_probe(struct platform_device *pdev) | |||
1152 | 1144 | ||
1153 | spin_lock_init(&bp->lock); | 1145 | spin_lock_init(&bp->lock); |
1154 | 1146 | ||
1155 | #if defined(CONFIG_ARCH_AT91) | 1147 | bp->pclk = clk_get(&pdev->dev, "pclk"); |
1156 | bp->pclk = clk_get(&pdev->dev, "macb_clk"); | ||
1157 | if (IS_ERR(bp->pclk)) { | 1148 | if (IS_ERR(bp->pclk)) { |
1158 | dev_err(&pdev->dev, "failed to get macb_clk\n"); | 1149 | dev_err(&pdev->dev, "failed to get macb_clk\n"); |
1159 | goto err_out_free_dev; | 1150 | goto err_out_free_dev; |
1160 | } | 1151 | } |
1161 | clk_enable(bp->pclk); | 1152 | clk_enable(bp->pclk); |
1162 | #else | 1153 | |
1163 | bp->pclk = clk_get(&pdev->dev, "pclk"); | ||
1164 | if (IS_ERR(bp->pclk)) { | ||
1165 | dev_err(&pdev->dev, "failed to get pclk\n"); | ||
1166 | goto err_out_free_dev; | ||
1167 | } | ||
1168 | bp->hclk = clk_get(&pdev->dev, "hclk"); | 1154 | bp->hclk = clk_get(&pdev->dev, "hclk"); |
1169 | if (IS_ERR(bp->hclk)) { | 1155 | if (IS_ERR(bp->hclk)) { |
1170 | dev_err(&pdev->dev, "failed to get hclk\n"); | 1156 | dev_err(&pdev->dev, "failed to get hclk\n"); |
1171 | goto err_out_put_pclk; | 1157 | goto err_out_put_pclk; |
1172 | } | 1158 | } |
1173 | |||
1174 | clk_enable(bp->pclk); | ||
1175 | clk_enable(bp->hclk); | 1159 | clk_enable(bp->hclk); |
1176 | #endif | ||
1177 | 1160 | ||
1178 | bp->regs = ioremap(regs->start, resource_size(regs)); | 1161 | bp->regs = ioremap(regs->start, resource_size(regs)); |
1179 | if (!bp->regs) { | 1162 | if (!bp->regs) { |
@@ -1185,9 +1168,8 @@ static int __init macb_probe(struct platform_device *pdev) | |||
1185 | dev->irq = platform_get_irq(pdev, 0); | 1168 | dev->irq = platform_get_irq(pdev, 0); |
1186 | err = request_irq(dev->irq, macb_interrupt, 0, dev->name, dev); | 1169 | err = request_irq(dev->irq, macb_interrupt, 0, dev->name, dev); |
1187 | if (err) { | 1170 | if (err) { |
1188 | printk(KERN_ERR | 1171 | dev_err(&pdev->dev, "Unable to request IRQ %d (error %d)\n", |
1189 | "%s: Unable to request IRQ %d (error %d)\n", | 1172 | dev->irq, err); |
1190 | dev->name, dev->irq, err); | ||
1191 | goto err_out_iounmap; | 1173 | goto err_out_iounmap; |
1192 | } | 1174 | } |
1193 | 1175 | ||
@@ -1239,13 +1221,12 @@ static int __init macb_probe(struct platform_device *pdev) | |||
1239 | 1221 | ||
1240 | platform_set_drvdata(pdev, dev); | 1222 | platform_set_drvdata(pdev, dev); |
1241 | 1223 | ||
1242 | printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d (%pM)\n", | 1224 | netdev_info(dev, "Atmel MACB at 0x%08lx irq %d (%pM)\n", |
1243 | dev->name, dev->base_addr, dev->irq, dev->dev_addr); | 1225 | dev->base_addr, dev->irq, dev->dev_addr); |
1244 | 1226 | ||
1245 | phydev = bp->phy_dev; | 1227 | phydev = bp->phy_dev; |
1246 | printk(KERN_INFO "%s: attached PHY driver [%s] " | 1228 | netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", |
1247 | "(mii_bus:phy_addr=%s, irq=%d)\n", dev->name, | 1229 | phydev->drv->name, dev_name(&phydev->dev), phydev->irq); |
1248 | phydev->drv->name, dev_name(&phydev->dev), phydev->irq); | ||
1249 | 1230 | ||
1250 | return 0; | 1231 | return 0; |
1251 | 1232 | ||
@@ -1256,14 +1237,10 @@ err_out_free_irq: | |||
1256 | err_out_iounmap: | 1237 | err_out_iounmap: |
1257 | iounmap(bp->regs); | 1238 | iounmap(bp->regs); |
1258 | err_out_disable_clocks: | 1239 | err_out_disable_clocks: |
1259 | #ifndef CONFIG_ARCH_AT91 | ||
1260 | clk_disable(bp->hclk); | 1240 | clk_disable(bp->hclk); |
1261 | clk_put(bp->hclk); | 1241 | clk_put(bp->hclk); |
1262 | #endif | ||
1263 | clk_disable(bp->pclk); | 1242 | clk_disable(bp->pclk); |
1264 | #ifndef CONFIG_ARCH_AT91 | ||
1265 | err_out_put_pclk: | 1243 | err_out_put_pclk: |
1266 | #endif | ||
1267 | clk_put(bp->pclk); | 1244 | clk_put(bp->pclk); |
1268 | err_out_free_dev: | 1245 | err_out_free_dev: |
1269 | free_netdev(dev); | 1246 | free_netdev(dev); |
@@ -1289,10 +1266,8 @@ static int __exit macb_remove(struct platform_device *pdev) | |||
1289 | unregister_netdev(dev); | 1266 | unregister_netdev(dev); |
1290 | free_irq(dev->irq, dev); | 1267 | free_irq(dev->irq, dev); |
1291 | iounmap(bp->regs); | 1268 | iounmap(bp->regs); |
1292 | #ifndef CONFIG_ARCH_AT91 | ||
1293 | clk_disable(bp->hclk); | 1269 | clk_disable(bp->hclk); |
1294 | clk_put(bp->hclk); | 1270 | clk_put(bp->hclk); |
1295 | #endif | ||
1296 | clk_disable(bp->pclk); | 1271 | clk_disable(bp->pclk); |
1297 | clk_put(bp->pclk); | 1272 | clk_put(bp->pclk); |
1298 | free_netdev(dev); | 1273 | free_netdev(dev); |
@@ -1310,9 +1285,7 @@ static int macb_suspend(struct platform_device *pdev, pm_message_t state) | |||
1310 | 1285 | ||
1311 | netif_device_detach(netdev); | 1286 | netif_device_detach(netdev); |
1312 | 1287 | ||
1313 | #ifndef CONFIG_ARCH_AT91 | ||
1314 | clk_disable(bp->hclk); | 1288 | clk_disable(bp->hclk); |
1315 | #endif | ||
1316 | clk_disable(bp->pclk); | 1289 | clk_disable(bp->pclk); |
1317 | 1290 | ||
1318 | return 0; | 1291 | return 0; |
@@ -1324,9 +1297,7 @@ static int macb_resume(struct platform_device *pdev) | |||
1324 | struct macb *bp = netdev_priv(netdev); | 1297 | struct macb *bp = netdev_priv(netdev); |
1325 | 1298 | ||
1326 | clk_enable(bp->pclk); | 1299 | clk_enable(bp->pclk); |
1327 | #ifndef CONFIG_ARCH_AT91 | ||
1328 | clk_enable(bp->hclk); | 1300 | clk_enable(bp->hclk); |
1329 | #endif | ||
1330 | 1301 | ||
1331 | netif_device_attach(netdev); | 1302 | netif_device_attach(netdev); |
1332 | 1303 | ||
diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c index c7b60839ac99..dea0cb4400e2 100644 --- a/drivers/net/ethernet/marvell/skge.c +++ b/drivers/net/ethernet/marvell/skge.c | |||
@@ -2606,6 +2606,9 @@ static int skge_up(struct net_device *dev) | |||
2606 | spin_unlock_irq(&hw->hw_lock); | 2606 | spin_unlock_irq(&hw->hw_lock); |
2607 | 2607 | ||
2608 | napi_enable(&skge->napi); | 2608 | napi_enable(&skge->napi); |
2609 | |||
2610 | skge_set_multicast(dev); | ||
2611 | |||
2609 | return 0; | 2612 | return 0; |
2610 | 2613 | ||
2611 | free_tx_ring: | 2614 | free_tx_ring: |
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c index 227997d775e8..5829e0b47e7e 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c | |||
@@ -147,6 +147,7 @@ void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq) | |||
147 | mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); | 147 | mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); |
148 | if (priv->mdev->dev->caps.comp_pool && cq->vector) | 148 | if (priv->mdev->dev->caps.comp_pool && cq->vector) |
149 | mlx4_release_eq(priv->mdev->dev, cq->vector); | 149 | mlx4_release_eq(priv->mdev->dev, cq->vector); |
150 | cq->vector = 0; | ||
150 | cq->buf_size = 0; | 151 | cq->buf_size = 0; |
151 | cq->buf = NULL; | 152 | cq->buf = NULL; |
152 | } | 153 | } |
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index 67bf07819992..c8f47f17186f 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c | |||
@@ -477,7 +477,6 @@ enum rtl_register_content { | |||
477 | /* Config1 register p.24 */ | 477 | /* Config1 register p.24 */ |
478 | LEDS1 = (1 << 7), | 478 | LEDS1 = (1 << 7), |
479 | LEDS0 = (1 << 6), | 479 | LEDS0 = (1 << 6), |
480 | MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */ | ||
481 | Speed_down = (1 << 4), | 480 | Speed_down = (1 << 4), |
482 | MEMMAP = (1 << 3), | 481 | MEMMAP = (1 << 3), |
483 | IOMAP = (1 << 2), | 482 | IOMAP = (1 << 2), |
@@ -485,6 +484,7 @@ enum rtl_register_content { | |||
485 | PMEnable = (1 << 0), /* Power Management Enable */ | 484 | PMEnable = (1 << 0), /* Power Management Enable */ |
486 | 485 | ||
487 | /* Config2 register p. 25 */ | 486 | /* Config2 register p. 25 */ |
487 | MSIEnable = (1 << 5), /* 8169 only. Reserved in the 8168. */ | ||
488 | PCI_Clock_66MHz = 0x01, | 488 | PCI_Clock_66MHz = 0x01, |
489 | PCI_Clock_33MHz = 0x00, | 489 | PCI_Clock_33MHz = 0x00, |
490 | 490 | ||
@@ -3426,22 +3426,24 @@ static const struct rtl_cfg_info { | |||
3426 | }; | 3426 | }; |
3427 | 3427 | ||
3428 | /* Cfg9346_Unlock assumed. */ | 3428 | /* Cfg9346_Unlock assumed. */ |
3429 | static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, | 3429 | static unsigned rtl_try_msi(struct rtl8169_private *tp, |
3430 | const struct rtl_cfg_info *cfg) | 3430 | const struct rtl_cfg_info *cfg) |
3431 | { | 3431 | { |
3432 | void __iomem *ioaddr = tp->mmio_addr; | ||
3432 | unsigned msi = 0; | 3433 | unsigned msi = 0; |
3433 | u8 cfg2; | 3434 | u8 cfg2; |
3434 | 3435 | ||
3435 | cfg2 = RTL_R8(Config2) & ~MSIEnable; | 3436 | cfg2 = RTL_R8(Config2) & ~MSIEnable; |
3436 | if (cfg->features & RTL_FEATURE_MSI) { | 3437 | if (cfg->features & RTL_FEATURE_MSI) { |
3437 | if (pci_enable_msi(pdev)) { | 3438 | if (pci_enable_msi(tp->pci_dev)) { |
3438 | dev_info(&pdev->dev, "no MSI. Back to INTx.\n"); | 3439 | netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n"); |
3439 | } else { | 3440 | } else { |
3440 | cfg2 |= MSIEnable; | 3441 | cfg2 |= MSIEnable; |
3441 | msi = RTL_FEATURE_MSI; | 3442 | msi = RTL_FEATURE_MSI; |
3442 | } | 3443 | } |
3443 | } | 3444 | } |
3444 | RTL_W8(Config2, cfg2); | 3445 | if (tp->mac_version <= RTL_GIGA_MAC_VER_06) |
3446 | RTL_W8(Config2, cfg2); | ||
3445 | return msi; | 3447 | return msi; |
3446 | } | 3448 | } |
3447 | 3449 | ||
@@ -4077,7 +4079,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
4077 | tp->features |= RTL_FEATURE_WOL; | 4079 | tp->features |= RTL_FEATURE_WOL; |
4078 | if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0) | 4080 | if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0) |
4079 | tp->features |= RTL_FEATURE_WOL; | 4081 | tp->features |= RTL_FEATURE_WOL; |
4080 | tp->features |= rtl_try_msi(pdev, ioaddr, cfg); | 4082 | tp->features |= rtl_try_msi(tp, cfg); |
4081 | RTL_W8(Cfg9346, Cfg9346_Lock); | 4083 | RTL_W8(Cfg9346, Cfg9346_Lock); |
4082 | 4084 | ||
4083 | if (rtl_tbi_enabled(tp)) { | 4085 | if (rtl_tbi_enabled(tp)) { |
diff --git a/drivers/net/ethernet/ti/davinci_cpdma.c b/drivers/net/ethernet/ti/davinci_cpdma.c index dca9d3369cdd..c97d2f590855 100644 --- a/drivers/net/ethernet/ti/davinci_cpdma.c +++ b/drivers/net/ethernet/ti/davinci_cpdma.c | |||
@@ -836,11 +836,13 @@ int cpdma_chan_stop(struct cpdma_chan *chan) | |||
836 | chan_write(chan, cp, CPDMA_TEARDOWN_VALUE); | 836 | chan_write(chan, cp, CPDMA_TEARDOWN_VALUE); |
837 | 837 | ||
838 | /* handle completed packets */ | 838 | /* handle completed packets */ |
839 | spin_unlock_irqrestore(&chan->lock, flags); | ||
839 | do { | 840 | do { |
840 | ret = __cpdma_chan_process(chan); | 841 | ret = __cpdma_chan_process(chan); |
841 | if (ret < 0) | 842 | if (ret < 0) |
842 | break; | 843 | break; |
843 | } while ((ret & CPDMA_DESC_TD_COMPLETE) == 0); | 844 | } while ((ret & CPDMA_DESC_TD_COMPLETE) == 0); |
845 | spin_lock_irqsave(&chan->lock, flags); | ||
844 | 846 | ||
845 | /* remaining packets haven't been tx/rx'ed, clean them up */ | 847 | /* remaining packets haven't been tx/rx'ed, clean them up */ |
846 | while (chan->head) { | 848 | while (chan->head) { |
diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c index e6fed4d4cb77..e95f0e60a9bc 100644 --- a/drivers/net/usb/asix.c +++ b/drivers/net/usb/asix.c | |||
@@ -1655,6 +1655,10 @@ static const struct usb_device_id products [] = { | |||
1655 | // ASIX 88772a | 1655 | // ASIX 88772a |
1656 | USB_DEVICE(0x0db0, 0xa877), | 1656 | USB_DEVICE(0x0db0, 0xa877), |
1657 | .driver_info = (unsigned long) &ax88772_info, | 1657 | .driver_info = (unsigned long) &ax88772_info, |
1658 | }, { | ||
1659 | // Asus USB Ethernet Adapter | ||
1660 | USB_DEVICE (0x0b95, 0x7e2b), | ||
1661 | .driver_info = (unsigned long) &ax88772_info, | ||
1658 | }, | 1662 | }, |
1659 | { }, // END | 1663 | { }, // END |
1660 | }; | 1664 | }; |
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index 888abc2be3a5..528d5f3e868c 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c | |||
@@ -1271,7 +1271,9 @@ static void ath_rc_init(struct ath_softc *sc, | |||
1271 | 1271 | ||
1272 | ath_rc_priv->max_valid_rate = k; | 1272 | ath_rc_priv->max_valid_rate = k; |
1273 | ath_rc_sort_validrates(rate_table, ath_rc_priv); | 1273 | ath_rc_sort_validrates(rate_table, ath_rc_priv); |
1274 | ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4]; | 1274 | ath_rc_priv->rate_max_phy = (k > 4) ? |
1275 | ath_rc_priv->valid_rate_index[k-4] : | ||
1276 | ath_rc_priv->valid_rate_index[k-1]; | ||
1275 | ath_rc_priv->rate_table = rate_table; | 1277 | ath_rc_priv->rate_table = rate_table; |
1276 | 1278 | ||
1277 | ath_dbg(common, ATH_DBG_CONFIG, | 1279 | ath_dbg(common, ATH_DBG_CONFIG, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c index a7a6def40d05..5c7c17c7166a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c | |||
@@ -606,8 +606,8 @@ int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
606 | if (ctx->ht.enabled) { | 606 | if (ctx->ht.enabled) { |
607 | /* if HT40 is used, it should not change | 607 | /* if HT40 is used, it should not change |
608 | * after associated except channel switch */ | 608 | * after associated except channel switch */ |
609 | if (iwl_is_associated_ctx(ctx) && | 609 | if (!ctx->ht.is_40mhz || |
610 | !ctx->ht.is_40mhz) | 610 | !iwl_is_associated_ctx(ctx)) |
611 | iwlagn_config_ht40(conf, ctx); | 611 | iwlagn_config_ht40(conf, ctx); |
612 | } else | 612 | } else |
613 | ctx->ht.is_40mhz = false; | 613 | ctx->ht.is_40mhz = false; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c index 35a6b71f358c..df1540ca6102 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c | |||
@@ -91,7 +91,10 @@ static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv, | |||
91 | tx_cmd->tid_tspec = qc[0] & 0xf; | 91 | tx_cmd->tid_tspec = qc[0] & 0xf; |
92 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | 92 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; |
93 | } else { | 93 | } else { |
94 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | 94 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) |
95 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | ||
96 | else | ||
97 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | ||
95 | } | 98 | } |
96 | 99 | ||
97 | iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags); | 100 | iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index bacc06c95e7a..e0e9a3dfbc00 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -2850,6 +2850,9 @@ static int iwlagn_mac_tx_sync(struct ieee80211_hw *hw, | |||
2850 | int ret; | 2850 | int ret; |
2851 | u8 sta_id; | 2851 | u8 sta_id; |
2852 | 2852 | ||
2853 | if (ctx->ctxid != IWL_RXON_CTX_PAN) | ||
2854 | return 0; | ||
2855 | |||
2853 | IWL_DEBUG_MAC80211(priv, "enter\n"); | 2856 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
2854 | mutex_lock(&priv->shrd->mutex); | 2857 | mutex_lock(&priv->shrd->mutex); |
2855 | 2858 | ||
@@ -2898,6 +2901,9 @@ static void iwlagn_mac_finish_tx_sync(struct ieee80211_hw *hw, | |||
2898 | struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; | 2901 | struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; |
2899 | struct iwl_rxon_context *ctx = vif_priv->ctx; | 2902 | struct iwl_rxon_context *ctx = vif_priv->ctx; |
2900 | 2903 | ||
2904 | if (ctx->ctxid != IWL_RXON_CTX_PAN) | ||
2905 | return; | ||
2906 | |||
2901 | IWL_DEBUG_MAC80211(priv, "enter\n"); | 2907 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
2902 | mutex_lock(&priv->shrd->mutex); | 2908 | mutex_lock(&priv->shrd->mutex); |
2903 | 2909 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c index ce918980e977..5f17ab8e76ba 100644 --- a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c +++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c | |||
@@ -1197,9 +1197,7 @@ static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb, | |||
1197 | iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len); | 1197 | iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len); |
1198 | 1198 | ||
1199 | /* Set up entry for this TFD in Tx byte-count array */ | 1199 | /* Set up entry for this TFD in Tx byte-count array */ |
1200 | if (is_agg) | 1200 | iwl_trans_txq_update_byte_cnt_tbl(trans, txq, le16_to_cpu(tx_cmd->len)); |
1201 | iwl_trans_txq_update_byte_cnt_tbl(trans, txq, | ||
1202 | le16_to_cpu(tx_cmd->len)); | ||
1203 | 1201 | ||
1204 | dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen, | 1202 | dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen, |
1205 | DMA_BIDIRECTIONAL); | 1203 | DMA_BIDIRECTIONAL); |
diff --git a/drivers/net/wireless/mwifiex/cmdevt.c b/drivers/net/wireless/mwifiex/cmdevt.c index ac278156d390..6e0a3eaecf70 100644 --- a/drivers/net/wireless/mwifiex/cmdevt.c +++ b/drivers/net/wireless/mwifiex/cmdevt.c | |||
@@ -939,7 +939,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter) | |||
939 | { | 939 | { |
940 | struct cmd_ctrl_node *cmd_node = NULL, *tmp_node = NULL; | 940 | struct cmd_ctrl_node *cmd_node = NULL, *tmp_node = NULL; |
941 | unsigned long cmd_flags; | 941 | unsigned long cmd_flags; |
942 | unsigned long cmd_pending_q_flags; | ||
943 | unsigned long scan_pending_q_flags; | 942 | unsigned long scan_pending_q_flags; |
944 | uint16_t cancel_scan_cmd = false; | 943 | uint16_t cancel_scan_cmd = false; |
945 | 944 | ||
@@ -949,12 +948,9 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter) | |||
949 | cmd_node = adapter->curr_cmd; | 948 | cmd_node = adapter->curr_cmd; |
950 | cmd_node->wait_q_enabled = false; | 949 | cmd_node->wait_q_enabled = false; |
951 | cmd_node->cmd_flag |= CMD_F_CANCELED; | 950 | cmd_node->cmd_flag |= CMD_F_CANCELED; |
952 | spin_lock_irqsave(&adapter->cmd_pending_q_lock, | ||
953 | cmd_pending_q_flags); | ||
954 | list_del(&cmd_node->list); | ||
955 | spin_unlock_irqrestore(&adapter->cmd_pending_q_lock, | ||
956 | cmd_pending_q_flags); | ||
957 | mwifiex_insert_cmd_to_free_q(adapter, cmd_node); | 951 | mwifiex_insert_cmd_to_free_q(adapter, cmd_node); |
952 | mwifiex_complete_cmd(adapter, adapter->curr_cmd); | ||
953 | adapter->curr_cmd = NULL; | ||
958 | spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags); | 954 | spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags); |
959 | } | 955 | } |
960 | 956 | ||
@@ -981,7 +977,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter) | |||
981 | spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags); | 977 | spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags); |
982 | } | 978 | } |
983 | adapter->cmd_wait_q.status = -1; | 979 | adapter->cmd_wait_q.status = -1; |
984 | mwifiex_complete_cmd(adapter, adapter->curr_cmd); | ||
985 | } | 980 | } |
986 | 981 | ||
987 | /* | 982 | /* |
diff --git a/drivers/of/platform.c b/drivers/of/platform.c index cbd5d701c7e0..63b3ec48c203 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c | |||
@@ -314,7 +314,7 @@ static const struct of_dev_auxdata *of_dev_lookup(const struct of_dev_auxdata *l | |||
314 | if (!lookup) | 314 | if (!lookup) |
315 | return NULL; | 315 | return NULL; |
316 | 316 | ||
317 | for(; lookup->name != NULL; lookup++) { | 317 | for(; lookup->compatible != NULL; lookup++) { |
318 | if (!of_device_is_compatible(np, lookup->compatible)) | 318 | if (!of_device_is_compatible(np, lookup->compatible)) |
319 | continue; | 319 | continue; |
320 | if (of_address_to_resource(np, 0, &res)) | 320 | if (of_address_to_resource(np, 0, &res)) |
diff --git a/drivers/oprofile/oprofile_files.c b/drivers/oprofile/oprofile_files.c index 89f63456646f..84a208dbed93 100644 --- a/drivers/oprofile/oprofile_files.c +++ b/drivers/oprofile/oprofile_files.c | |||
@@ -45,7 +45,7 @@ static ssize_t timeout_write(struct file *file, char const __user *buf, | |||
45 | return -EINVAL; | 45 | return -EINVAL; |
46 | 46 | ||
47 | retval = oprofilefs_ulong_from_user(&val, buf, count); | 47 | retval = oprofilefs_ulong_from_user(&val, buf, count); |
48 | if (retval) | 48 | if (retval <= 0) |
49 | return retval; | 49 | return retval; |
50 | 50 | ||
51 | retval = oprofile_set_timeout(val); | 51 | retval = oprofile_set_timeout(val); |
@@ -84,7 +84,7 @@ static ssize_t depth_write(struct file *file, char const __user *buf, size_t cou | |||
84 | return -EINVAL; | 84 | return -EINVAL; |
85 | 85 | ||
86 | retval = oprofilefs_ulong_from_user(&val, buf, count); | 86 | retval = oprofilefs_ulong_from_user(&val, buf, count); |
87 | if (retval) | 87 | if (retval <= 0) |
88 | return retval; | 88 | return retval; |
89 | 89 | ||
90 | retval = oprofile_set_ulong(&oprofile_backtrace_depth, val); | 90 | retval = oprofile_set_ulong(&oprofile_backtrace_depth, val); |
@@ -141,9 +141,10 @@ static ssize_t enable_write(struct file *file, char const __user *buf, size_t co | |||
141 | return -EINVAL; | 141 | return -EINVAL; |
142 | 142 | ||
143 | retval = oprofilefs_ulong_from_user(&val, buf, count); | 143 | retval = oprofilefs_ulong_from_user(&val, buf, count); |
144 | if (retval) | 144 | if (retval <= 0) |
145 | return retval; | 145 | return retval; |
146 | 146 | ||
147 | retval = 0; | ||
147 | if (val) | 148 | if (val) |
148 | retval = oprofile_start(); | 149 | retval = oprofile_start(); |
149 | else | 150 | else |
diff --git a/drivers/oprofile/oprofilefs.c b/drivers/oprofile/oprofilefs.c index d0de6cc2d7a5..2f0aa0f700e6 100644 --- a/drivers/oprofile/oprofilefs.c +++ b/drivers/oprofile/oprofilefs.c | |||
@@ -60,6 +60,13 @@ ssize_t oprofilefs_ulong_to_user(unsigned long val, char __user *buf, size_t cou | |||
60 | } | 60 | } |
61 | 61 | ||
62 | 62 | ||
63 | /* | ||
64 | * Note: If oprofilefs_ulong_from_user() returns 0, then *val remains | ||
65 | * unchanged and might be uninitialized. This follows write syscall | ||
66 | * implementation when count is zero: "If count is zero ... [and if] | ||
67 | * no errors are detected, 0 will be returned without causing any | ||
68 | * other effect." (man 2 write) | ||
69 | */ | ||
63 | int oprofilefs_ulong_from_user(unsigned long *val, char const __user *buf, size_t count) | 70 | int oprofilefs_ulong_from_user(unsigned long *val, char const __user *buf, size_t count) |
64 | { | 71 | { |
65 | char tmpbuf[TMPBUFSIZE]; | 72 | char tmpbuf[TMPBUFSIZE]; |
@@ -79,7 +86,7 @@ int oprofilefs_ulong_from_user(unsigned long *val, char const __user *buf, size_ | |||
79 | raw_spin_lock_irqsave(&oprofilefs_lock, flags); | 86 | raw_spin_lock_irqsave(&oprofilefs_lock, flags); |
80 | *val = simple_strtoul(tmpbuf, NULL, 0); | 87 | *val = simple_strtoul(tmpbuf, NULL, 0); |
81 | raw_spin_unlock_irqrestore(&oprofilefs_lock, flags); | 88 | raw_spin_unlock_irqrestore(&oprofilefs_lock, flags); |
82 | return 0; | 89 | return count; |
83 | } | 90 | } |
84 | 91 | ||
85 | 92 | ||
@@ -99,7 +106,7 @@ static ssize_t ulong_write_file(struct file *file, char const __user *buf, size_ | |||
99 | return -EINVAL; | 106 | return -EINVAL; |
100 | 107 | ||
101 | retval = oprofilefs_ulong_from_user(&value, buf, count); | 108 | retval = oprofilefs_ulong_from_user(&value, buf, count); |
102 | if (retval) | 109 | if (retval <= 0) |
103 | return retval; | 110 | return retval; |
104 | 111 | ||
105 | retval = oprofile_set_ulong(file->private_data, value); | 112 | retval = oprofile_set_ulong(file->private_data, value); |
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index 7ec56fb0bd78..b0dd08e6a9da 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/export.h> | 13 | #include <linux/export.h> |
14 | #include <linux/pci-ats.h> | 14 | #include <linux/pci-ats.h> |
15 | #include <linux/pci.h> | 15 | #include <linux/pci.h> |
16 | #include <linux/slab.h> | ||
16 | 17 | ||
17 | #include "pci.h" | 18 | #include "pci.h" |
18 | 19 | ||
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c index fce1c54a0c8d..9ddf69e3bbef 100644 --- a/drivers/pci/hotplug/acpiphp_glue.c +++ b/drivers/pci/hotplug/acpiphp_glue.c | |||
@@ -132,6 +132,18 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv) | |||
132 | if (!acpi_pci_check_ejectable(pbus, handle) && !is_dock_device(handle)) | 132 | if (!acpi_pci_check_ejectable(pbus, handle) && !is_dock_device(handle)) |
133 | return AE_OK; | 133 | return AE_OK; |
134 | 134 | ||
135 | pdev = pbus->self; | ||
136 | if (pdev && pci_is_pcie(pdev)) { | ||
137 | tmp = acpi_find_root_bridge_handle(pdev); | ||
138 | if (tmp) { | ||
139 | struct acpi_pci_root *root = acpi_pci_find_root(tmp); | ||
140 | |||
141 | if (root && (root->osc_control_set & | ||
142 | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) | ||
143 | return AE_OK; | ||
144 | } | ||
145 | } | ||
146 | |||
135 | acpi_evaluate_integer(handle, "_ADR", NULL, &adr); | 147 | acpi_evaluate_integer(handle, "_ADR", NULL, &adr); |
136 | device = (adr >> 16) & 0xffff; | 148 | device = (adr >> 16) & 0xffff; |
137 | function = adr & 0xffff; | 149 | function = adr & 0xffff; |
@@ -213,7 +225,6 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv) | |||
213 | 225 | ||
214 | pdev = pci_get_slot(pbus, PCI_DEVFN(device, function)); | 226 | pdev = pci_get_slot(pbus, PCI_DEVFN(device, function)); |
215 | if (pdev) { | 227 | if (pdev) { |
216 | pdev->current_state = PCI_D0; | ||
217 | slot->flags |= (SLOT_ENABLED | SLOT_POWEREDON); | 228 | slot->flags |= (SLOT_ENABLED | SLOT_POWEREDON); |
218 | pci_dev_put(pdev); | 229 | pci_dev_put(pdev); |
219 | } | 230 | } |
@@ -459,17 +470,8 @@ static int add_bridge(acpi_handle handle) | |||
459 | { | 470 | { |
460 | acpi_status status; | 471 | acpi_status status; |
461 | unsigned long long tmp; | 472 | unsigned long long tmp; |
462 | struct acpi_pci_root *root; | ||
463 | acpi_handle dummy_handle; | 473 | acpi_handle dummy_handle; |
464 | 474 | ||
465 | /* | ||
466 | * We shouldn't use this bridge if PCIe native hotplug control has been | ||
467 | * granted by the BIOS for it. | ||
468 | */ | ||
469 | root = acpi_pci_find_root(handle); | ||
470 | if (root && (root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) | ||
471 | return -ENODEV; | ||
472 | |||
473 | /* if the bridge doesn't have _STA, we assume it is always there */ | 475 | /* if the bridge doesn't have _STA, we assume it is always there */ |
474 | status = acpi_get_handle(handle, "_STA", &dummy_handle); | 476 | status = acpi_get_handle(handle, "_STA", &dummy_handle); |
475 | if (ACPI_SUCCESS(status)) { | 477 | if (ACPI_SUCCESS(status)) { |
@@ -1385,19 +1387,11 @@ static void handle_hotplug_event_func(acpi_handle handle, u32 type, | |||
1385 | static acpi_status | 1387 | static acpi_status |
1386 | find_root_bridges(acpi_handle handle, u32 lvl, void *context, void **rv) | 1388 | find_root_bridges(acpi_handle handle, u32 lvl, void *context, void **rv) |
1387 | { | 1389 | { |
1388 | struct acpi_pci_root *root; | ||
1389 | int *count = (int *)context; | 1390 | int *count = (int *)context; |
1390 | 1391 | ||
1391 | if (!acpi_is_root_bridge(handle)) | 1392 | if (!acpi_is_root_bridge(handle)) |
1392 | return AE_OK; | 1393 | return AE_OK; |
1393 | 1394 | ||
1394 | root = acpi_pci_find_root(handle); | ||
1395 | if (!root) | ||
1396 | return AE_OK; | ||
1397 | |||
1398 | if (root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL) | ||
1399 | return AE_OK; | ||
1400 | |||
1401 | (*count)++; | 1395 | (*count)++; |
1402 | acpi_install_notify_handler(handle, ACPI_SYSTEM_NOTIFY, | 1396 | acpi_install_notify_handler(handle, ACPI_SYSTEM_NOTIFY, |
1403 | handle_hotplug_event_bridge, NULL); | 1397 | handle_hotplug_event_bridge, NULL); |
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index b82c155d7b37..1969a3ee3058 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c | |||
@@ -283,6 +283,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) | |||
283 | struct resource *res; | 283 | struct resource *res; |
284 | struct pci_dev *pdev; | 284 | struct pci_dev *pdev; |
285 | struct pci_sriov *iov = dev->sriov; | 285 | struct pci_sriov *iov = dev->sriov; |
286 | int bars = 0; | ||
286 | 287 | ||
287 | if (!nr_virtfn) | 288 | if (!nr_virtfn) |
288 | return 0; | 289 | return 0; |
@@ -307,6 +308,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) | |||
307 | 308 | ||
308 | nres = 0; | 309 | nres = 0; |
309 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | 310 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { |
311 | bars |= (1 << (i + PCI_IOV_RESOURCES)); | ||
310 | res = dev->resource + PCI_IOV_RESOURCES + i; | 312 | res = dev->resource + PCI_IOV_RESOURCES + i; |
311 | if (res->parent) | 313 | if (res->parent) |
312 | nres++; | 314 | nres++; |
@@ -324,6 +326,11 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) | |||
324 | return -ENOMEM; | 326 | return -ENOMEM; |
325 | } | 327 | } |
326 | 328 | ||
329 | if (pci_enable_resources(dev, bars)) { | ||
330 | dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); | ||
331 | return -ENOMEM; | ||
332 | } | ||
333 | |||
327 | if (iov->link != dev->devfn) { | 334 | if (iov->link != dev->devfn) { |
328 | pdev = pci_get_slot(dev->bus, iov->link); | 335 | pdev = pci_get_slot(dev->bus, iov->link); |
329 | if (!pdev) | 336 | if (!pdev) |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 6f45a73c6e9f..6d4a5319148d 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -664,6 +664,9 @@ static int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state) | |||
664 | error = platform_pci_set_power_state(dev, state); | 664 | error = platform_pci_set_power_state(dev, state); |
665 | if (!error) | 665 | if (!error) |
666 | pci_update_current_state(dev, state); | 666 | pci_update_current_state(dev, state); |
667 | /* Fall back to PCI_D0 if native PM is not supported */ | ||
668 | if (!dev->pm_cap) | ||
669 | dev->current_state = PCI_D0; | ||
667 | } else { | 670 | } else { |
668 | error = -ENODEV; | 671 | error = -ENODEV; |
669 | /* Fall back to PCI_D0 if native PM is not supported */ | 672 | /* Fall back to PCI_D0 if native PM is not supported */ |
@@ -1126,7 +1129,11 @@ static int __pci_enable_device_flags(struct pci_dev *dev, | |||
1126 | if (atomic_add_return(1, &dev->enable_cnt) > 1) | 1129 | if (atomic_add_return(1, &dev->enable_cnt) > 1) |
1127 | return 0; /* already enabled */ | 1130 | return 0; /* already enabled */ |
1128 | 1131 | ||
1129 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) | 1132 | /* only skip sriov related */ |
1133 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) | ||
1134 | if (dev->resource[i].flags & flags) | ||
1135 | bars |= (1 << i); | ||
1136 | for (i = PCI_BRIDGE_RESOURCES; i < DEVICE_COUNT_RESOURCE; i++) | ||
1130 | if (dev->resource[i].flags & flags) | 1137 | if (dev->resource[i].flags & flags) |
1131 | bars |= (1 << i); | 1138 | bars |= (1 << i); |
1132 | 1139 | ||
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c index fa4d9f324189..3bcc7cfcaba7 100644 --- a/drivers/rtc/interface.c +++ b/drivers/rtc/interface.c | |||
@@ -73,6 +73,8 @@ int rtc_set_time(struct rtc_device *rtc, struct rtc_time *tm) | |||
73 | err = -EINVAL; | 73 | err = -EINVAL; |
74 | 74 | ||
75 | mutex_unlock(&rtc->ops_lock); | 75 | mutex_unlock(&rtc->ops_lock); |
76 | /* A timer might have just expired */ | ||
77 | schedule_work(&rtc->irqwork); | ||
76 | return err; | 78 | return err; |
77 | } | 79 | } |
78 | EXPORT_SYMBOL_GPL(rtc_set_time); | 80 | EXPORT_SYMBOL_GPL(rtc_set_time); |
@@ -112,6 +114,8 @@ int rtc_set_mmss(struct rtc_device *rtc, unsigned long secs) | |||
112 | err = -EINVAL; | 114 | err = -EINVAL; |
113 | 115 | ||
114 | mutex_unlock(&rtc->ops_lock); | 116 | mutex_unlock(&rtc->ops_lock); |
117 | /* A timer might have just expired */ | ||
118 | schedule_work(&rtc->irqwork); | ||
115 | 119 | ||
116 | return err; | 120 | return err; |
117 | } | 121 | } |
@@ -403,6 +407,8 @@ int rtc_initialize_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm) | |||
403 | timerqueue_add(&rtc->timerqueue, &rtc->aie_timer.node); | 407 | timerqueue_add(&rtc->timerqueue, &rtc->aie_timer.node); |
404 | } | 408 | } |
405 | mutex_unlock(&rtc->ops_lock); | 409 | mutex_unlock(&rtc->ops_lock); |
410 | /* maybe that was in the past.*/ | ||
411 | schedule_work(&rtc->irqwork); | ||
406 | return err; | 412 | return err; |
407 | } | 413 | } |
408 | EXPORT_SYMBOL_GPL(rtc_initialize_alarm); | 414 | EXPORT_SYMBOL_GPL(rtc_initialize_alarm); |
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c index e39b77a4609a..dc474bc6522d 100644 --- a/drivers/rtc/rtc-at91rm9200.c +++ b/drivers/rtc/rtc-at91rm9200.c | |||
@@ -32,11 +32,17 @@ | |||
32 | 32 | ||
33 | #include <mach/at91_rtc.h> | 33 | #include <mach/at91_rtc.h> |
34 | 34 | ||
35 | #define at91_rtc_read(field) \ | ||
36 | __raw_readl(at91_rtc_regs + field) | ||
37 | #define at91_rtc_write(field, val) \ | ||
38 | __raw_writel((val), at91_rtc_regs + field) | ||
35 | 39 | ||
36 | #define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ | 40 | #define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ |
37 | 41 | ||
38 | static DECLARE_COMPLETION(at91_rtc_updated); | 42 | static DECLARE_COMPLETION(at91_rtc_updated); |
39 | static unsigned int at91_alarm_year = AT91_RTC_EPOCH; | 43 | static unsigned int at91_alarm_year = AT91_RTC_EPOCH; |
44 | static void __iomem *at91_rtc_regs; | ||
45 | static int irq; | ||
40 | 46 | ||
41 | /* | 47 | /* |
42 | * Decode time/date into rtc_time structure | 48 | * Decode time/date into rtc_time structure |
@@ -48,10 +54,10 @@ static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, | |||
48 | 54 | ||
49 | /* must read twice in case it changes */ | 55 | /* must read twice in case it changes */ |
50 | do { | 56 | do { |
51 | time = at91_sys_read(timereg); | 57 | time = at91_rtc_read(timereg); |
52 | date = at91_sys_read(calreg); | 58 | date = at91_rtc_read(calreg); |
53 | } while ((time != at91_sys_read(timereg)) || | 59 | } while ((time != at91_rtc_read(timereg)) || |
54 | (date != at91_sys_read(calreg))); | 60 | (date != at91_rtc_read(calreg))); |
55 | 61 | ||
56 | tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); | 62 | tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); |
57 | tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); | 63 | tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); |
@@ -98,19 +104,19 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) | |||
98 | tm->tm_hour, tm->tm_min, tm->tm_sec); | 104 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
99 | 105 | ||
100 | /* Stop Time/Calendar from counting */ | 106 | /* Stop Time/Calendar from counting */ |
101 | cr = at91_sys_read(AT91_RTC_CR); | 107 | cr = at91_rtc_read(AT91_RTC_CR); |
102 | at91_sys_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); | 108 | at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); |
103 | 109 | ||
104 | at91_sys_write(AT91_RTC_IER, AT91_RTC_ACKUPD); | 110 | at91_rtc_write(AT91_RTC_IER, AT91_RTC_ACKUPD); |
105 | wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ | 111 | wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ |
106 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); | 112 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); |
107 | 113 | ||
108 | at91_sys_write(AT91_RTC_TIMR, | 114 | at91_rtc_write(AT91_RTC_TIMR, |
109 | bin2bcd(tm->tm_sec) << 0 | 115 | bin2bcd(tm->tm_sec) << 0 |
110 | | bin2bcd(tm->tm_min) << 8 | 116 | | bin2bcd(tm->tm_min) << 8 |
111 | | bin2bcd(tm->tm_hour) << 16); | 117 | | bin2bcd(tm->tm_hour) << 16); |
112 | 118 | ||
113 | at91_sys_write(AT91_RTC_CALR, | 119 | at91_rtc_write(AT91_RTC_CALR, |
114 | bin2bcd((tm->tm_year + 1900) / 100) /* century */ | 120 | bin2bcd((tm->tm_year + 1900) / 100) /* century */ |
115 | | bin2bcd(tm->tm_year % 100) << 8 /* year */ | 121 | | bin2bcd(tm->tm_year % 100) << 8 /* year */ |
116 | | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ | 122 | | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ |
@@ -118,8 +124,8 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) | |||
118 | | bin2bcd(tm->tm_mday) << 24); | 124 | | bin2bcd(tm->tm_mday) << 24); |
119 | 125 | ||
120 | /* Restart Time/Calendar */ | 126 | /* Restart Time/Calendar */ |
121 | cr = at91_sys_read(AT91_RTC_CR); | 127 | cr = at91_rtc_read(AT91_RTC_CR); |
122 | at91_sys_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); | 128 | at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); |
123 | 129 | ||
124 | return 0; | 130 | return 0; |
125 | } | 131 | } |
@@ -135,7 +141,7 @@ static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
135 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); | 141 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); |
136 | tm->tm_year = at91_alarm_year - 1900; | 142 | tm->tm_year = at91_alarm_year - 1900; |
137 | 143 | ||
138 | alrm->enabled = (at91_sys_read(AT91_RTC_IMR) & AT91_RTC_ALARM) | 144 | alrm->enabled = (at91_rtc_read(AT91_RTC_IMR) & AT91_RTC_ALARM) |
139 | ? 1 : 0; | 145 | ? 1 : 0; |
140 | 146 | ||
141 | pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, | 147 | pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
@@ -160,20 +166,20 @@ static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
160 | tm.tm_min = alrm->time.tm_min; | 166 | tm.tm_min = alrm->time.tm_min; |
161 | tm.tm_sec = alrm->time.tm_sec; | 167 | tm.tm_sec = alrm->time.tm_sec; |
162 | 168 | ||
163 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); | 169 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM); |
164 | at91_sys_write(AT91_RTC_TIMALR, | 170 | at91_rtc_write(AT91_RTC_TIMALR, |
165 | bin2bcd(tm.tm_sec) << 0 | 171 | bin2bcd(tm.tm_sec) << 0 |
166 | | bin2bcd(tm.tm_min) << 8 | 172 | | bin2bcd(tm.tm_min) << 8 |
167 | | bin2bcd(tm.tm_hour) << 16 | 173 | | bin2bcd(tm.tm_hour) << 16 |
168 | | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); | 174 | | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); |
169 | at91_sys_write(AT91_RTC_CALALR, | 175 | at91_rtc_write(AT91_RTC_CALALR, |
170 | bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ | 176 | bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ |
171 | | bin2bcd(tm.tm_mday) << 24 | 177 | | bin2bcd(tm.tm_mday) << 24 |
172 | | AT91_RTC_DATEEN | AT91_RTC_MTHEN); | 178 | | AT91_RTC_DATEEN | AT91_RTC_MTHEN); |
173 | 179 | ||
174 | if (alrm->enabled) { | 180 | if (alrm->enabled) { |
175 | at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); | 181 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
176 | at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); | 182 | at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM); |
177 | } | 183 | } |
178 | 184 | ||
179 | pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, | 185 | pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
@@ -188,10 +194,10 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | |||
188 | pr_debug("%s(): cmd=%08x\n", __func__, enabled); | 194 | pr_debug("%s(): cmd=%08x\n", __func__, enabled); |
189 | 195 | ||
190 | if (enabled) { | 196 | if (enabled) { |
191 | at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); | 197 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
192 | at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); | 198 | at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM); |
193 | } else | 199 | } else |
194 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); | 200 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM); |
195 | 201 | ||
196 | return 0; | 202 | return 0; |
197 | } | 203 | } |
@@ -200,7 +206,7 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | |||
200 | */ | 206 | */ |
201 | static int at91_rtc_proc(struct device *dev, struct seq_file *seq) | 207 | static int at91_rtc_proc(struct device *dev, struct seq_file *seq) |
202 | { | 208 | { |
203 | unsigned long imr = at91_sys_read(AT91_RTC_IMR); | 209 | unsigned long imr = at91_rtc_read(AT91_RTC_IMR); |
204 | 210 | ||
205 | seq_printf(seq, "update_IRQ\t: %s\n", | 211 | seq_printf(seq, "update_IRQ\t: %s\n", |
206 | (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); | 212 | (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); |
@@ -220,7 +226,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) | |||
220 | unsigned int rtsr; | 226 | unsigned int rtsr; |
221 | unsigned long events = 0; | 227 | unsigned long events = 0; |
222 | 228 | ||
223 | rtsr = at91_sys_read(AT91_RTC_SR) & at91_sys_read(AT91_RTC_IMR); | 229 | rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read(AT91_RTC_IMR); |
224 | if (rtsr) { /* this interrupt is shared! Is it ours? */ | 230 | if (rtsr) { /* this interrupt is shared! Is it ours? */ |
225 | if (rtsr & AT91_RTC_ALARM) | 231 | if (rtsr & AT91_RTC_ALARM) |
226 | events |= (RTC_AF | RTC_IRQF); | 232 | events |= (RTC_AF | RTC_IRQF); |
@@ -229,7 +235,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) | |||
229 | if (rtsr & AT91_RTC_ACKUPD) | 235 | if (rtsr & AT91_RTC_ACKUPD) |
230 | complete(&at91_rtc_updated); | 236 | complete(&at91_rtc_updated); |
231 | 237 | ||
232 | at91_sys_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ | 238 | at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ |
233 | 239 | ||
234 | rtc_update_irq(rtc, 1, events); | 240 | rtc_update_irq(rtc, 1, events); |
235 | 241 | ||
@@ -256,22 +262,41 @@ static const struct rtc_class_ops at91_rtc_ops = { | |||
256 | static int __init at91_rtc_probe(struct platform_device *pdev) | 262 | static int __init at91_rtc_probe(struct platform_device *pdev) |
257 | { | 263 | { |
258 | struct rtc_device *rtc; | 264 | struct rtc_device *rtc; |
259 | int ret; | 265 | struct resource *regs; |
266 | int ret = 0; | ||
260 | 267 | ||
261 | at91_sys_write(AT91_RTC_CR, 0); | 268 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
262 | at91_sys_write(AT91_RTC_MR, 0); /* 24 hour mode */ | 269 | if (!regs) { |
270 | dev_err(&pdev->dev, "no mmio resource defined\n"); | ||
271 | return -ENXIO; | ||
272 | } | ||
273 | |||
274 | irq = platform_get_irq(pdev, 0); | ||
275 | if (irq < 0) { | ||
276 | dev_err(&pdev->dev, "no irq resource defined\n"); | ||
277 | return -ENXIO; | ||
278 | } | ||
279 | |||
280 | at91_rtc_regs = ioremap(regs->start, resource_size(regs)); | ||
281 | if (!at91_rtc_regs) { | ||
282 | dev_err(&pdev->dev, "failed to map registers, aborting.\n"); | ||
283 | return -ENOMEM; | ||
284 | } | ||
285 | |||
286 | at91_rtc_write(AT91_RTC_CR, 0); | ||
287 | at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */ | ||
263 | 288 | ||
264 | /* Disable all interrupts */ | 289 | /* Disable all interrupts */ |
265 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | | 290 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
266 | AT91_RTC_SECEV | AT91_RTC_TIMEV | | 291 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
267 | AT91_RTC_CALEV); | 292 | AT91_RTC_CALEV); |
268 | 293 | ||
269 | ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt, | 294 | ret = request_irq(irq, at91_rtc_interrupt, |
270 | IRQF_SHARED, | 295 | IRQF_SHARED, |
271 | "at91_rtc", pdev); | 296 | "at91_rtc", pdev); |
272 | if (ret) { | 297 | if (ret) { |
273 | printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n", | 298 | printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n", |
274 | AT91_ID_SYS); | 299 | irq); |
275 | return ret; | 300 | return ret; |
276 | } | 301 | } |
277 | 302 | ||
@@ -284,7 +309,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev) | |||
284 | rtc = rtc_device_register(pdev->name, &pdev->dev, | 309 | rtc = rtc_device_register(pdev->name, &pdev->dev, |
285 | &at91_rtc_ops, THIS_MODULE); | 310 | &at91_rtc_ops, THIS_MODULE); |
286 | if (IS_ERR(rtc)) { | 311 | if (IS_ERR(rtc)) { |
287 | free_irq(AT91_ID_SYS, pdev); | 312 | free_irq(irq, pdev); |
288 | return PTR_ERR(rtc); | 313 | return PTR_ERR(rtc); |
289 | } | 314 | } |
290 | platform_set_drvdata(pdev, rtc); | 315 | platform_set_drvdata(pdev, rtc); |
@@ -301,10 +326,10 @@ static int __exit at91_rtc_remove(struct platform_device *pdev) | |||
301 | struct rtc_device *rtc = platform_get_drvdata(pdev); | 326 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
302 | 327 | ||
303 | /* Disable all interrupts */ | 328 | /* Disable all interrupts */ |
304 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | | 329 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
305 | AT91_RTC_SECEV | AT91_RTC_TIMEV | | 330 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
306 | AT91_RTC_CALEV); | 331 | AT91_RTC_CALEV); |
307 | free_irq(AT91_ID_SYS, pdev); | 332 | free_irq(irq, pdev); |
308 | 333 | ||
309 | rtc_device_unregister(rtc); | 334 | rtc_device_unregister(rtc); |
310 | platform_set_drvdata(pdev, NULL); | 335 | platform_set_drvdata(pdev, NULL); |
@@ -323,13 +348,13 @@ static int at91_rtc_suspend(struct device *dev) | |||
323 | /* this IRQ is shared with DBGU and other hardware which isn't | 348 | /* this IRQ is shared with DBGU and other hardware which isn't |
324 | * necessarily doing PM like we are... | 349 | * necessarily doing PM like we are... |
325 | */ | 350 | */ |
326 | at91_rtc_imr = at91_sys_read(AT91_RTC_IMR) | 351 | at91_rtc_imr = at91_rtc_read(AT91_RTC_IMR) |
327 | & (AT91_RTC_ALARM|AT91_RTC_SECEV); | 352 | & (AT91_RTC_ALARM|AT91_RTC_SECEV); |
328 | if (at91_rtc_imr) { | 353 | if (at91_rtc_imr) { |
329 | if (device_may_wakeup(dev)) | 354 | if (device_may_wakeup(dev)) |
330 | enable_irq_wake(AT91_ID_SYS); | 355 | enable_irq_wake(irq); |
331 | else | 356 | else |
332 | at91_sys_write(AT91_RTC_IDR, at91_rtc_imr); | 357 | at91_rtc_write(AT91_RTC_IDR, at91_rtc_imr); |
333 | } | 358 | } |
334 | return 0; | 359 | return 0; |
335 | } | 360 | } |
@@ -338,9 +363,9 @@ static int at91_rtc_resume(struct device *dev) | |||
338 | { | 363 | { |
339 | if (at91_rtc_imr) { | 364 | if (at91_rtc_imr) { |
340 | if (device_may_wakeup(dev)) | 365 | if (device_may_wakeup(dev)) |
341 | disable_irq_wake(AT91_ID_SYS); | 366 | disable_irq_wake(irq); |
342 | else | 367 | else |
343 | at91_sys_write(AT91_RTC_IER, at91_rtc_imr); | 368 | at91_rtc_write(AT91_RTC_IER, at91_rtc_imr); |
344 | } | 369 | } |
345 | return 0; | 370 | return 0; |
346 | } | 371 | } |
diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c index eda128fc1d38..64aedd8cc095 100644 --- a/drivers/rtc/rtc-m41t80.c +++ b/drivers/rtc/rtc-m41t80.c | |||
@@ -357,10 +357,19 @@ static int m41t80_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
357 | static struct rtc_class_ops m41t80_rtc_ops = { | 357 | static struct rtc_class_ops m41t80_rtc_ops = { |
358 | .read_time = m41t80_rtc_read_time, | 358 | .read_time = m41t80_rtc_read_time, |
359 | .set_time = m41t80_rtc_set_time, | 359 | .set_time = m41t80_rtc_set_time, |
360 | /* | ||
361 | * XXX - m41t80 alarm functionality is reported broken. | ||
362 | * until it is fixed, don't register alarm functions. | ||
363 | * | ||
360 | .read_alarm = m41t80_rtc_read_alarm, | 364 | .read_alarm = m41t80_rtc_read_alarm, |
361 | .set_alarm = m41t80_rtc_set_alarm, | 365 | .set_alarm = m41t80_rtc_set_alarm, |
366 | */ | ||
362 | .proc = m41t80_rtc_proc, | 367 | .proc = m41t80_rtc_proc, |
368 | /* | ||
369 | * See above comment on broken alarm | ||
370 | * | ||
363 | .alarm_irq_enable = m41t80_rtc_alarm_irq_enable, | 371 | .alarm_irq_enable = m41t80_rtc_alarm_irq_enable, |
372 | */ | ||
364 | }; | 373 | }; |
365 | 374 | ||
366 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | 375 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index 5b979d9cc332..175067a17c46 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/clk.h> | 25 | #include <linux/clk.h> |
26 | #include <linux/log2.h> | 26 | #include <linux/log2.h> |
27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
28 | #include <linux/of.h> | ||
28 | 29 | ||
29 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
30 | #include <asm/uaccess.h> | 31 | #include <asm/uaccess.h> |
@@ -507,7 +508,13 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) | |||
507 | goto err_nortc; | 508 | goto err_nortc; |
508 | } | 509 | } |
509 | 510 | ||
510 | s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; | 511 | #ifdef CONFIG_OF |
512 | if (pdev->dev.of_node) | ||
513 | s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node, | ||
514 | "samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410; | ||
515 | else | ||
516 | #endif | ||
517 | s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; | ||
511 | 518 | ||
512 | /* Check RTC Time */ | 519 | /* Check RTC Time */ |
513 | 520 | ||
@@ -629,6 +636,17 @@ static int s3c_rtc_resume(struct platform_device *pdev) | |||
629 | #define s3c_rtc_resume NULL | 636 | #define s3c_rtc_resume NULL |
630 | #endif | 637 | #endif |
631 | 638 | ||
639 | #ifdef CONFIG_OF | ||
640 | static const struct of_device_id s3c_rtc_dt_match[] = { | ||
641 | { .compatible = "samsung,s3c2410-rtc" }, | ||
642 | { .compatible = "samsung,s3c6410-rtc" }, | ||
643 | {}, | ||
644 | }; | ||
645 | MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match); | ||
646 | #else | ||
647 | #define s3c_rtc_dt_match NULL | ||
648 | #endif | ||
649 | |||
632 | static struct platform_device_id s3c_rtc_driver_ids[] = { | 650 | static struct platform_device_id s3c_rtc_driver_ids[] = { |
633 | { | 651 | { |
634 | .name = "s3c2410-rtc", | 652 | .name = "s3c2410-rtc", |
@@ -651,6 +669,7 @@ static struct platform_driver s3c_rtc_driver = { | |||
651 | .driver = { | 669 | .driver = { |
652 | .name = "s3c-rtc", | 670 | .name = "s3c-rtc", |
653 | .owner = THIS_MODULE, | 671 | .owner = THIS_MODULE, |
672 | .of_match_table = s3c_rtc_dt_match, | ||
654 | }, | 673 | }, |
655 | }; | 674 | }; |
656 | 675 | ||
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c index 11f07f888223..b79576b64f45 100644 --- a/drivers/s390/scsi/zfcp_scsi.c +++ b/drivers/s390/scsi/zfcp_scsi.c | |||
@@ -55,6 +55,10 @@ static void zfcp_scsi_slave_destroy(struct scsi_device *sdev) | |||
55 | { | 55 | { |
56 | struct zfcp_scsi_dev *zfcp_sdev = sdev_to_zfcp(sdev); | 56 | struct zfcp_scsi_dev *zfcp_sdev = sdev_to_zfcp(sdev); |
57 | 57 | ||
58 | /* if previous slave_alloc returned early, there is nothing to do */ | ||
59 | if (!zfcp_sdev->port) | ||
60 | return; | ||
61 | |||
58 | zfcp_erp_lun_shutdown_wait(sdev, "scssd_1"); | 62 | zfcp_erp_lun_shutdown_wait(sdev, "scssd_1"); |
59 | put_device(&zfcp_sdev->port->dev); | 63 | put_device(&zfcp_sdev->port->dev); |
60 | } | 64 | } |
diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c index dba72a4e6a1c..1ad0b8225560 100644 --- a/drivers/scsi/bnx2i/bnx2i_hwi.c +++ b/drivers/scsi/bnx2i/bnx2i_hwi.c | |||
@@ -1906,18 +1906,19 @@ static int bnx2i_queue_scsi_cmd_resp(struct iscsi_session *session, | |||
1906 | spin_lock(&session->lock); | 1906 | spin_lock(&session->lock); |
1907 | task = iscsi_itt_to_task(bnx2i_conn->cls_conn->dd_data, | 1907 | task = iscsi_itt_to_task(bnx2i_conn->cls_conn->dd_data, |
1908 | cqe->itt & ISCSI_CMD_RESPONSE_INDEX); | 1908 | cqe->itt & ISCSI_CMD_RESPONSE_INDEX); |
1909 | if (!task) { | 1909 | if (!task || !task->sc) { |
1910 | spin_unlock(&session->lock); | 1910 | spin_unlock(&session->lock); |
1911 | return -EINVAL; | 1911 | return -EINVAL; |
1912 | } | 1912 | } |
1913 | sc = task->sc; | 1913 | sc = task->sc; |
1914 | spin_unlock(&session->lock); | ||
1915 | 1914 | ||
1916 | if (!blk_rq_cpu_valid(sc->request)) | 1915 | if (!blk_rq_cpu_valid(sc->request)) |
1917 | cpu = smp_processor_id(); | 1916 | cpu = smp_processor_id(); |
1918 | else | 1917 | else |
1919 | cpu = sc->request->cpu; | 1918 | cpu = sc->request->cpu; |
1920 | 1919 | ||
1920 | spin_unlock(&session->lock); | ||
1921 | |||
1921 | p = &per_cpu(bnx2i_percpu, cpu); | 1922 | p = &per_cpu(bnx2i_percpu, cpu); |
1922 | spin_lock(&p->p_work_lock); | 1923 | spin_lock(&p->p_work_lock); |
1923 | if (unlikely(!p->iothread)) { | 1924 | if (unlikely(!p->iothread)) { |
diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c index cefbe44bb84a..8d67467dd9ce 100644 --- a/drivers/scsi/fcoe/fcoe.c +++ b/drivers/scsi/fcoe/fcoe.c | |||
@@ -31,6 +31,8 @@ | |||
31 | #include <linux/sysfs.h> | 31 | #include <linux/sysfs.h> |
32 | #include <linux/ctype.h> | 32 | #include <linux/ctype.h> |
33 | #include <linux/workqueue.h> | 33 | #include <linux/workqueue.h> |
34 | #include <net/dcbnl.h> | ||
35 | #include <net/dcbevent.h> | ||
34 | #include <scsi/scsi_tcq.h> | 36 | #include <scsi/scsi_tcq.h> |
35 | #include <scsi/scsicam.h> | 37 | #include <scsi/scsicam.h> |
36 | #include <scsi/scsi_transport.h> | 38 | #include <scsi/scsi_transport.h> |
@@ -101,6 +103,8 @@ static int fcoe_ddp_done(struct fc_lport *, u16); | |||
101 | static int fcoe_ddp_target(struct fc_lport *, u16, struct scatterlist *, | 103 | static int fcoe_ddp_target(struct fc_lport *, u16, struct scatterlist *, |
102 | unsigned int); | 104 | unsigned int); |
103 | static int fcoe_cpu_callback(struct notifier_block *, unsigned long, void *); | 105 | static int fcoe_cpu_callback(struct notifier_block *, unsigned long, void *); |
106 | static int fcoe_dcb_app_notification(struct notifier_block *notifier, | ||
107 | ulong event, void *ptr); | ||
104 | 108 | ||
105 | static bool fcoe_match(struct net_device *netdev); | 109 | static bool fcoe_match(struct net_device *netdev); |
106 | static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode); | 110 | static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode); |
@@ -129,6 +133,11 @@ static struct notifier_block fcoe_cpu_notifier = { | |||
129 | .notifier_call = fcoe_cpu_callback, | 133 | .notifier_call = fcoe_cpu_callback, |
130 | }; | 134 | }; |
131 | 135 | ||
136 | /* notification function for DCB events */ | ||
137 | static struct notifier_block dcb_notifier = { | ||
138 | .notifier_call = fcoe_dcb_app_notification, | ||
139 | }; | ||
140 | |||
132 | static struct scsi_transport_template *fcoe_nport_scsi_transport; | 141 | static struct scsi_transport_template *fcoe_nport_scsi_transport; |
133 | static struct scsi_transport_template *fcoe_vport_scsi_transport; | 142 | static struct scsi_transport_template *fcoe_vport_scsi_transport; |
134 | 143 | ||
@@ -1522,6 +1531,8 @@ int fcoe_xmit(struct fc_lport *lport, struct fc_frame *fp) | |||
1522 | skb_reset_network_header(skb); | 1531 | skb_reset_network_header(skb); |
1523 | skb->mac_len = elen; | 1532 | skb->mac_len = elen; |
1524 | skb->protocol = htons(ETH_P_FCOE); | 1533 | skb->protocol = htons(ETH_P_FCOE); |
1534 | skb->priority = port->priority; | ||
1535 | |||
1525 | if (fcoe->netdev->priv_flags & IFF_802_1Q_VLAN && | 1536 | if (fcoe->netdev->priv_flags & IFF_802_1Q_VLAN && |
1526 | fcoe->realdev->features & NETIF_F_HW_VLAN_TX) { | 1537 | fcoe->realdev->features & NETIF_F_HW_VLAN_TX) { |
1527 | skb->vlan_tci = VLAN_TAG_PRESENT | | 1538 | skb->vlan_tci = VLAN_TAG_PRESENT | |
@@ -1624,6 +1635,7 @@ static inline int fcoe_filter_frames(struct fc_lport *lport, | |||
1624 | stats->InvalidCRCCount++; | 1635 | stats->InvalidCRCCount++; |
1625 | if (stats->InvalidCRCCount < 5) | 1636 | if (stats->InvalidCRCCount < 5) |
1626 | printk(KERN_WARNING "fcoe: dropping frame with CRC error\n"); | 1637 | printk(KERN_WARNING "fcoe: dropping frame with CRC error\n"); |
1638 | put_cpu(); | ||
1627 | return -EINVAL; | 1639 | return -EINVAL; |
1628 | } | 1640 | } |
1629 | 1641 | ||
@@ -1746,6 +1758,7 @@ int fcoe_percpu_receive_thread(void *arg) | |||
1746 | */ | 1758 | */ |
1747 | static void fcoe_dev_setup(void) | 1759 | static void fcoe_dev_setup(void) |
1748 | { | 1760 | { |
1761 | register_dcbevent_notifier(&dcb_notifier); | ||
1749 | register_netdevice_notifier(&fcoe_notifier); | 1762 | register_netdevice_notifier(&fcoe_notifier); |
1750 | } | 1763 | } |
1751 | 1764 | ||
@@ -1754,9 +1767,69 @@ static void fcoe_dev_setup(void) | |||
1754 | */ | 1767 | */ |
1755 | static void fcoe_dev_cleanup(void) | 1768 | static void fcoe_dev_cleanup(void) |
1756 | { | 1769 | { |
1770 | unregister_dcbevent_notifier(&dcb_notifier); | ||
1757 | unregister_netdevice_notifier(&fcoe_notifier); | 1771 | unregister_netdevice_notifier(&fcoe_notifier); |
1758 | } | 1772 | } |
1759 | 1773 | ||
1774 | static struct fcoe_interface * | ||
1775 | fcoe_hostlist_lookup_realdev_port(struct net_device *netdev) | ||
1776 | { | ||
1777 | struct fcoe_interface *fcoe; | ||
1778 | struct net_device *real_dev; | ||
1779 | |||
1780 | list_for_each_entry(fcoe, &fcoe_hostlist, list) { | ||
1781 | if (fcoe->netdev->priv_flags & IFF_802_1Q_VLAN) | ||
1782 | real_dev = vlan_dev_real_dev(fcoe->netdev); | ||
1783 | else | ||
1784 | real_dev = fcoe->netdev; | ||
1785 | |||
1786 | if (netdev == real_dev) | ||
1787 | return fcoe; | ||
1788 | } | ||
1789 | return NULL; | ||
1790 | } | ||
1791 | |||
1792 | static int fcoe_dcb_app_notification(struct notifier_block *notifier, | ||
1793 | ulong event, void *ptr) | ||
1794 | { | ||
1795 | struct dcb_app_type *entry = ptr; | ||
1796 | struct fcoe_interface *fcoe; | ||
1797 | struct net_device *netdev; | ||
1798 | struct fcoe_port *port; | ||
1799 | int prio; | ||
1800 | |||
1801 | if (entry->app.selector != DCB_APP_IDTYPE_ETHTYPE) | ||
1802 | return NOTIFY_OK; | ||
1803 | |||
1804 | netdev = dev_get_by_index(&init_net, entry->ifindex); | ||
1805 | if (!netdev) | ||
1806 | return NOTIFY_OK; | ||
1807 | |||
1808 | fcoe = fcoe_hostlist_lookup_realdev_port(netdev); | ||
1809 | dev_put(netdev); | ||
1810 | if (!fcoe) | ||
1811 | return NOTIFY_OK; | ||
1812 | |||
1813 | if (entry->dcbx & DCB_CAP_DCBX_VER_CEE) | ||
1814 | prio = ffs(entry->app.priority) - 1; | ||
1815 | else | ||
1816 | prio = entry->app.priority; | ||
1817 | |||
1818 | if (prio < 0) | ||
1819 | return NOTIFY_OK; | ||
1820 | |||
1821 | if (entry->app.protocol == ETH_P_FIP || | ||
1822 | entry->app.protocol == ETH_P_FCOE) | ||
1823 | fcoe->ctlr.priority = prio; | ||
1824 | |||
1825 | if (entry->app.protocol == ETH_P_FCOE) { | ||
1826 | port = lport_priv(fcoe->ctlr.lp); | ||
1827 | port->priority = prio; | ||
1828 | } | ||
1829 | |||
1830 | return NOTIFY_OK; | ||
1831 | } | ||
1832 | |||
1760 | /** | 1833 | /** |
1761 | * fcoe_device_notification() - Handler for net device events | 1834 | * fcoe_device_notification() - Handler for net device events |
1762 | * @notifier: The context of the notification | 1835 | * @notifier: The context of the notification |
@@ -1965,6 +2038,46 @@ static bool fcoe_match(struct net_device *netdev) | |||
1965 | } | 2038 | } |
1966 | 2039 | ||
1967 | /** | 2040 | /** |
2041 | * fcoe_dcb_create() - Initialize DCB attributes and hooks | ||
2042 | * @netdev: The net_device object of the L2 link that should be queried | ||
2043 | * @port: The fcoe_port to bind FCoE APP priority with | ||
2044 | * @ | ||
2045 | */ | ||
2046 | static void fcoe_dcb_create(struct fcoe_interface *fcoe) | ||
2047 | { | ||
2048 | #ifdef CONFIG_DCB | ||
2049 | int dcbx; | ||
2050 | u8 fup, up; | ||
2051 | struct net_device *netdev = fcoe->realdev; | ||
2052 | struct fcoe_port *port = lport_priv(fcoe->ctlr.lp); | ||
2053 | struct dcb_app app = { | ||
2054 | .priority = 0, | ||
2055 | .protocol = ETH_P_FCOE | ||
2056 | }; | ||
2057 | |||
2058 | /* setup DCB priority attributes. */ | ||
2059 | if (netdev && netdev->dcbnl_ops && netdev->dcbnl_ops->getdcbx) { | ||
2060 | dcbx = netdev->dcbnl_ops->getdcbx(netdev); | ||
2061 | |||
2062 | if (dcbx & DCB_CAP_DCBX_VER_IEEE) { | ||
2063 | app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; | ||
2064 | up = dcb_ieee_getapp_mask(netdev, &app); | ||
2065 | app.protocol = ETH_P_FIP; | ||
2066 | fup = dcb_ieee_getapp_mask(netdev, &app); | ||
2067 | } else { | ||
2068 | app.selector = DCB_APP_IDTYPE_ETHTYPE; | ||
2069 | up = dcb_getapp(netdev, &app); | ||
2070 | app.protocol = ETH_P_FIP; | ||
2071 | fup = dcb_getapp(netdev, &app); | ||
2072 | } | ||
2073 | |||
2074 | port->priority = ffs(up) ? ffs(up) - 1 : 0; | ||
2075 | fcoe->ctlr.priority = ffs(fup) ? ffs(fup) - 1 : port->priority; | ||
2076 | } | ||
2077 | #endif | ||
2078 | } | ||
2079 | |||
2080 | /** | ||
1968 | * fcoe_create() - Create a fcoe interface | 2081 | * fcoe_create() - Create a fcoe interface |
1969 | * @netdev : The net_device object the Ethernet interface to create on | 2082 | * @netdev : The net_device object the Ethernet interface to create on |
1970 | * @fip_mode: The FIP mode for this creation | 2083 | * @fip_mode: The FIP mode for this creation |
@@ -2007,6 +2120,9 @@ static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode) | |||
2007 | /* Make this the "master" N_Port */ | 2120 | /* Make this the "master" N_Port */ |
2008 | fcoe->ctlr.lp = lport; | 2121 | fcoe->ctlr.lp = lport; |
2009 | 2122 | ||
2123 | /* setup DCB priority attributes. */ | ||
2124 | fcoe_dcb_create(fcoe); | ||
2125 | |||
2010 | /* add to lports list */ | 2126 | /* add to lports list */ |
2011 | fcoe_hostlist_add(lport); | 2127 | fcoe_hostlist_add(lport); |
2012 | 2128 | ||
diff --git a/drivers/scsi/fcoe/fcoe_ctlr.c b/drivers/scsi/fcoe/fcoe_ctlr.c index c74c4b8e71ef..e7522dcc296e 100644 --- a/drivers/scsi/fcoe/fcoe_ctlr.c +++ b/drivers/scsi/fcoe/fcoe_ctlr.c | |||
@@ -320,6 +320,7 @@ static void fcoe_ctlr_solicit(struct fcoe_ctlr *fip, struct fcoe_fcf *fcf) | |||
320 | 320 | ||
321 | skb_put(skb, sizeof(*sol)); | 321 | skb_put(skb, sizeof(*sol)); |
322 | skb->protocol = htons(ETH_P_FIP); | 322 | skb->protocol = htons(ETH_P_FIP); |
323 | skb->priority = fip->priority; | ||
323 | skb_reset_mac_header(skb); | 324 | skb_reset_mac_header(skb); |
324 | skb_reset_network_header(skb); | 325 | skb_reset_network_header(skb); |
325 | fip->send(fip, skb); | 326 | fip->send(fip, skb); |
@@ -474,6 +475,7 @@ static void fcoe_ctlr_send_keep_alive(struct fcoe_ctlr *fip, | |||
474 | } | 475 | } |
475 | skb_put(skb, len); | 476 | skb_put(skb, len); |
476 | skb->protocol = htons(ETH_P_FIP); | 477 | skb->protocol = htons(ETH_P_FIP); |
478 | skb->priority = fip->priority; | ||
477 | skb_reset_mac_header(skb); | 479 | skb_reset_mac_header(skb); |
478 | skb_reset_network_header(skb); | 480 | skb_reset_network_header(skb); |
479 | fip->send(fip, skb); | 481 | fip->send(fip, skb); |
@@ -566,6 +568,7 @@ static int fcoe_ctlr_encaps(struct fcoe_ctlr *fip, struct fc_lport *lport, | |||
566 | cap->fip.fip_dl_len = htons(dlen / FIP_BPW); | 568 | cap->fip.fip_dl_len = htons(dlen / FIP_BPW); |
567 | 569 | ||
568 | skb->protocol = htons(ETH_P_FIP); | 570 | skb->protocol = htons(ETH_P_FIP); |
571 | skb->priority = fip->priority; | ||
569 | skb_reset_mac_header(skb); | 572 | skb_reset_mac_header(skb); |
570 | skb_reset_network_header(skb); | 573 | skb_reset_network_header(skb); |
571 | return 0; | 574 | return 0; |
@@ -1911,6 +1914,7 @@ static void fcoe_ctlr_vn_send(struct fcoe_ctlr *fip, | |||
1911 | 1914 | ||
1912 | skb_put(skb, len); | 1915 | skb_put(skb, len); |
1913 | skb->protocol = htons(ETH_P_FIP); | 1916 | skb->protocol = htons(ETH_P_FIP); |
1917 | skb->priority = fip->priority; | ||
1914 | skb_reset_mac_header(skb); | 1918 | skb_reset_mac_header(skb); |
1915 | skb_reset_network_header(skb); | 1919 | skb_reset_network_header(skb); |
1916 | 1920 | ||
diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c index 4e041f6d808c..d570573b7963 100644 --- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c +++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c | |||
@@ -4335,7 +4335,7 @@ _scsih_smart_predicted_fault(struct MPT2SAS_ADAPTER *ioc, u16 handle) | |||
4335 | /* insert into event log */ | 4335 | /* insert into event log */ |
4336 | sz = offsetof(Mpi2EventNotificationReply_t, EventData) + | 4336 | sz = offsetof(Mpi2EventNotificationReply_t, EventData) + |
4337 | sizeof(Mpi2EventDataSasDeviceStatusChange_t); | 4337 | sizeof(Mpi2EventDataSasDeviceStatusChange_t); |
4338 | event_reply = kzalloc(sz, GFP_KERNEL); | 4338 | event_reply = kzalloc(sz, GFP_ATOMIC); |
4339 | if (!event_reply) { | 4339 | if (!event_reply) { |
4340 | printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", | 4340 | printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", |
4341 | ioc->name, __FILE__, __LINE__, __func__); | 4341 | ioc->name, __FILE__, __LINE__, __func__); |
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c index ac326c41e931..6465dae5883a 100644 --- a/drivers/scsi/qla2xxx/qla_attr.c +++ b/drivers/scsi/qla2xxx/qla_attr.c | |||
@@ -1762,12 +1762,31 @@ qla2x00_get_host_port_state(struct Scsi_Host *shost) | |||
1762 | scsi_qla_host_t *vha = shost_priv(shost); | 1762 | scsi_qla_host_t *vha = shost_priv(shost); |
1763 | struct scsi_qla_host *base_vha = pci_get_drvdata(vha->hw->pdev); | 1763 | struct scsi_qla_host *base_vha = pci_get_drvdata(vha->hw->pdev); |
1764 | 1764 | ||
1765 | if (!base_vha->flags.online) | 1765 | if (!base_vha->flags.online) { |
1766 | fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE; | 1766 | fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE; |
1767 | else if (atomic_read(&base_vha->loop_state) == LOOP_TIMEOUT) | 1767 | return; |
1768 | fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN; | 1768 | } |
1769 | else | 1769 | |
1770 | switch (atomic_read(&base_vha->loop_state)) { | ||
1771 | case LOOP_UPDATE: | ||
1772 | fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS; | ||
1773 | break; | ||
1774 | case LOOP_DOWN: | ||
1775 | if (test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags)) | ||
1776 | fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS; | ||
1777 | else | ||
1778 | fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN; | ||
1779 | break; | ||
1780 | case LOOP_DEAD: | ||
1781 | fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN; | ||
1782 | break; | ||
1783 | case LOOP_READY: | ||
1770 | fc_host_port_state(shost) = FC_PORTSTATE_ONLINE; | 1784 | fc_host_port_state(shost) = FC_PORTSTATE_ONLINE; |
1785 | break; | ||
1786 | default: | ||
1787 | fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN; | ||
1788 | break; | ||
1789 | } | ||
1771 | } | 1790 | } |
1772 | 1791 | ||
1773 | static int | 1792 | static int |
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c index 9df4787715c0..f3cddd5800c3 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.c +++ b/drivers/scsi/qla2xxx/qla_dbg.c | |||
@@ -12,17 +12,17 @@ | |||
12 | * | Level | Last Value Used | Holes | | 12 | * | Level | Last Value Used | Holes | |
13 | * ---------------------------------------------------------------------- | 13 | * ---------------------------------------------------------------------- |
14 | * | Module Init and Probe | 0x0116 | | | 14 | * | Module Init and Probe | 0x0116 | | |
15 | * | Mailbox commands | 0x1129 | | | 15 | * | Mailbox commands | 0x112b | | |
16 | * | Device Discovery | 0x2083 | | | 16 | * | Device Discovery | 0x2083 | | |
17 | * | Queue Command and IO tracing | 0x302e | 0x3008 | | 17 | * | Queue Command and IO tracing | 0x302e | 0x3008 | |
18 | * | DPC Thread | 0x401c | | | 18 | * | DPC Thread | 0x401c | | |
19 | * | Async Events | 0x5059 | | | 19 | * | Async Events | 0x5059 | | |
20 | * | Timer Routines | 0x600d | | | 20 | * | Timer Routines | 0x6010 | 0x600e,0x600f | |
21 | * | User Space Interactions | 0x709d | | | 21 | * | User Space Interactions | 0x709d | | |
22 | * | Task Management | 0x8041 | | | 22 | * | Task Management | 0x8041 | 0x800b | |
23 | * | AER/EEH | 0x900f | | | 23 | * | AER/EEH | 0x900f | | |
24 | * | Virtual Port | 0xa007 | | | 24 | * | Virtual Port | 0xa007 | | |
25 | * | ISP82XX Specific | 0xb051 | | | 25 | * | ISP82XX Specific | 0xb052 | | |
26 | * | MultiQ | 0xc00b | | | 26 | * | MultiQ | 0xc00b | | |
27 | * | Misc | 0xd00b | | | 27 | * | Misc | 0xd00b | | |
28 | * ---------------------------------------------------------------------- | 28 | * ---------------------------------------------------------------------- |
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h index ce32d8135c9e..c0c11afb685c 100644 --- a/drivers/scsi/qla2xxx/qla_gbl.h +++ b/drivers/scsi/qla2xxx/qla_gbl.h | |||
@@ -578,6 +578,7 @@ extern int qla82xx_check_md_needed(scsi_qla_host_t *); | |||
578 | extern void qla82xx_chip_reset_cleanup(scsi_qla_host_t *); | 578 | extern void qla82xx_chip_reset_cleanup(scsi_qla_host_t *); |
579 | extern int qla82xx_mbx_beacon_ctl(scsi_qla_host_t *, int); | 579 | extern int qla82xx_mbx_beacon_ctl(scsi_qla_host_t *, int); |
580 | extern char *qdev_state(uint32_t); | 580 | extern char *qdev_state(uint32_t); |
581 | extern void qla82xx_clear_pending_mbx(scsi_qla_host_t *); | ||
581 | 582 | ||
582 | /* BSG related functions */ | 583 | /* BSG related functions */ |
583 | extern int qla24xx_bsg_request(struct fc_bsg_job *); | 584 | extern int qla24xx_bsg_request(struct fc_bsg_job *); |
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index f03e915f1877..54ea68cec4c5 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
@@ -1509,7 +1509,8 @@ enable_82xx_npiv: | |||
1509 | &ha->fw_xcb_count, NULL, NULL, | 1509 | &ha->fw_xcb_count, NULL, NULL, |
1510 | &ha->max_npiv_vports, NULL); | 1510 | &ha->max_npiv_vports, NULL); |
1511 | 1511 | ||
1512 | if (!fw_major_version && ql2xallocfwdump) | 1512 | if (!fw_major_version && ql2xallocfwdump |
1513 | && !IS_QLA82XX(ha)) | ||
1513 | qla2x00_alloc_fw_dump(vha); | 1514 | qla2x00_alloc_fw_dump(vha); |
1514 | } | 1515 | } |
1515 | } else { | 1516 | } else { |
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c index dbec89622a0f..a4b267e60a35 100644 --- a/drivers/scsi/qla2xxx/qla_iocb.c +++ b/drivers/scsi/qla2xxx/qla_iocb.c | |||
@@ -120,11 +120,10 @@ qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha) | |||
120 | * Returns a pointer to the continuation type 1 IOCB packet. | 120 | * Returns a pointer to the continuation type 1 IOCB packet. |
121 | */ | 121 | */ |
122 | static inline cont_a64_entry_t * | 122 | static inline cont_a64_entry_t * |
123 | qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha) | 123 | qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req) |
124 | { | 124 | { |
125 | cont_a64_entry_t *cont_pkt; | 125 | cont_a64_entry_t *cont_pkt; |
126 | 126 | ||
127 | struct req_que *req = vha->req; | ||
128 | /* Adjust ring index. */ | 127 | /* Adjust ring index. */ |
129 | req->ring_index++; | 128 | req->ring_index++; |
130 | if (req->ring_index == req->length) { | 129 | if (req->ring_index == req->length) { |
@@ -292,7 +291,7 @@ void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt, | |||
292 | * Five DSDs are available in the Continuation | 291 | * Five DSDs are available in the Continuation |
293 | * Type 1 IOCB. | 292 | * Type 1 IOCB. |
294 | */ | 293 | */ |
295 | cont_pkt = qla2x00_prep_cont_type1_iocb(vha); | 294 | cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req); |
296 | cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; | 295 | cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; |
297 | avail_dsds = 5; | 296 | avail_dsds = 5; |
298 | } | 297 | } |
@@ -684,7 +683,7 @@ qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt, | |||
684 | * Five DSDs are available in the Continuation | 683 | * Five DSDs are available in the Continuation |
685 | * Type 1 IOCB. | 684 | * Type 1 IOCB. |
686 | */ | 685 | */ |
687 | cont_pkt = qla2x00_prep_cont_type1_iocb(vha); | 686 | cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req); |
688 | cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; | 687 | cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; |
689 | avail_dsds = 5; | 688 | avail_dsds = 5; |
690 | } | 689 | } |
@@ -2070,7 +2069,8 @@ qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb) | |||
2070 | * Five DSDs are available in the Cont. | 2069 | * Five DSDs are available in the Cont. |
2071 | * Type 1 IOCB. | 2070 | * Type 1 IOCB. |
2072 | */ | 2071 | */ |
2073 | cont_pkt = qla2x00_prep_cont_type1_iocb(vha); | 2072 | cont_pkt = qla2x00_prep_cont_type1_iocb(vha, |
2073 | vha->hw->req_q_map[0]); | ||
2074 | cur_dsd = (uint32_t *) cont_pkt->dseg_0_address; | 2074 | cur_dsd = (uint32_t *) cont_pkt->dseg_0_address; |
2075 | avail_dsds = 5; | 2075 | avail_dsds = 5; |
2076 | cont_iocb_prsnt = 1; | 2076 | cont_iocb_prsnt = 1; |
@@ -2096,6 +2096,7 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb) | |||
2096 | int index; | 2096 | int index; |
2097 | uint16_t tot_dsds; | 2097 | uint16_t tot_dsds; |
2098 | scsi_qla_host_t *vha = sp->fcport->vha; | 2098 | scsi_qla_host_t *vha = sp->fcport->vha; |
2099 | struct qla_hw_data *ha = vha->hw; | ||
2099 | struct fc_bsg_job *bsg_job = ((struct srb_ctx *)sp->ctx)->u.bsg_job; | 2100 | struct fc_bsg_job *bsg_job = ((struct srb_ctx *)sp->ctx)->u.bsg_job; |
2100 | int loop_iterartion = 0; | 2101 | int loop_iterartion = 0; |
2101 | int cont_iocb_prsnt = 0; | 2102 | int cont_iocb_prsnt = 0; |
@@ -2141,7 +2142,8 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb) | |||
2141 | * Five DSDs are available in the Cont. | 2142 | * Five DSDs are available in the Cont. |
2142 | * Type 1 IOCB. | 2143 | * Type 1 IOCB. |
2143 | */ | 2144 | */ |
2144 | cont_pkt = qla2x00_prep_cont_type1_iocb(vha); | 2145 | cont_pkt = qla2x00_prep_cont_type1_iocb(vha, |
2146 | ha->req_q_map[0]); | ||
2145 | cur_dsd = (uint32_t *) cont_pkt->dseg_0_address; | 2147 | cur_dsd = (uint32_t *) cont_pkt->dseg_0_address; |
2146 | avail_dsds = 5; | 2148 | avail_dsds = 5; |
2147 | cont_iocb_prsnt = 1; | 2149 | cont_iocb_prsnt = 1; |
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index 2516adf1aeea..7b91b290ffd6 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c | |||
@@ -1741,7 +1741,7 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) | |||
1741 | resid, scsi_bufflen(cp)); | 1741 | resid, scsi_bufflen(cp)); |
1742 | 1742 | ||
1743 | cp->result = DID_ERROR << 16 | lscsi_status; | 1743 | cp->result = DID_ERROR << 16 | lscsi_status; |
1744 | break; | 1744 | goto check_scsi_status; |
1745 | } | 1745 | } |
1746 | 1746 | ||
1747 | if (!lscsi_status && | 1747 | if (!lscsi_status && |
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index 3b3cec9f6ac2..82a33533ed26 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c | |||
@@ -79,8 +79,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
79 | mcp->mb[0] = MBS_LINK_DOWN_ERROR; | 79 | mcp->mb[0] = MBS_LINK_DOWN_ERROR; |
80 | ql_log(ql_log_warn, base_vha, 0x1004, | 80 | ql_log(ql_log_warn, base_vha, 0x1004, |
81 | "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); | 81 | "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); |
82 | rval = QLA_FUNCTION_FAILED; | 82 | return QLA_FUNCTION_TIMEOUT; |
83 | goto premature_exit; | ||
84 | } | 83 | } |
85 | 84 | ||
86 | /* | 85 | /* |
@@ -163,6 +162,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
163 | HINT_MBX_INT_PENDING) { | 162 | HINT_MBX_INT_PENDING) { |
164 | spin_unlock_irqrestore(&ha->hardware_lock, | 163 | spin_unlock_irqrestore(&ha->hardware_lock, |
165 | flags); | 164 | flags); |
165 | ha->flags.mbox_busy = 0; | ||
166 | ql_dbg(ql_dbg_mbx, base_vha, 0x1010, | 166 | ql_dbg(ql_dbg_mbx, base_vha, 0x1010, |
167 | "Pending mailbox timeout, exiting.\n"); | 167 | "Pending mailbox timeout, exiting.\n"); |
168 | rval = QLA_FUNCTION_TIMEOUT; | 168 | rval = QLA_FUNCTION_TIMEOUT; |
@@ -188,6 +188,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
188 | HINT_MBX_INT_PENDING) { | 188 | HINT_MBX_INT_PENDING) { |
189 | spin_unlock_irqrestore(&ha->hardware_lock, | 189 | spin_unlock_irqrestore(&ha->hardware_lock, |
190 | flags); | 190 | flags); |
191 | ha->flags.mbox_busy = 0; | ||
191 | ql_dbg(ql_dbg_mbx, base_vha, 0x1012, | 192 | ql_dbg(ql_dbg_mbx, base_vha, 0x1012, |
192 | "Pending mailbox timeout, exiting.\n"); | 193 | "Pending mailbox timeout, exiting.\n"); |
193 | rval = QLA_FUNCTION_TIMEOUT; | 194 | rval = QLA_FUNCTION_TIMEOUT; |
@@ -302,7 +303,15 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
302 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && | 303 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && |
303 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && | 304 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && |
304 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | 305 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { |
305 | 306 | if (IS_QLA82XX(ha)) { | |
307 | ql_dbg(ql_dbg_mbx, vha, 0x112a, | ||
308 | "disabling pause transmit on port " | ||
309 | "0 & 1.\n"); | ||
310 | qla82xx_wr_32(ha, | ||
311 | QLA82XX_CRB_NIU + 0x98, | ||
312 | CRB_NIU_XG_PAUSE_CTL_P0| | ||
313 | CRB_NIU_XG_PAUSE_CTL_P1); | ||
314 | } | ||
306 | ql_log(ql_log_info, base_vha, 0x101c, | 315 | ql_log(ql_log_info, base_vha, 0x101c, |
307 | "Mailbox cmd timeout occured. " | 316 | "Mailbox cmd timeout occured. " |
308 | "Scheduling ISP abort eeh_busy=0x%x.\n", | 317 | "Scheduling ISP abort eeh_busy=0x%x.\n", |
@@ -318,7 +327,15 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
318 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && | 327 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && |
319 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && | 328 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && |
320 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | 329 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { |
321 | 330 | if (IS_QLA82XX(ha)) { | |
331 | ql_dbg(ql_dbg_mbx, vha, 0x112b, | ||
332 | "disabling pause transmit on port " | ||
333 | "0 & 1.\n"); | ||
334 | qla82xx_wr_32(ha, | ||
335 | QLA82XX_CRB_NIU + 0x98, | ||
336 | CRB_NIU_XG_PAUSE_CTL_P0| | ||
337 | CRB_NIU_XG_PAUSE_CTL_P1); | ||
338 | } | ||
322 | ql_log(ql_log_info, base_vha, 0x101e, | 339 | ql_log(ql_log_info, base_vha, 0x101e, |
323 | "Mailbox cmd timeout occured. " | 340 | "Mailbox cmd timeout occured. " |
324 | "Scheduling ISP abort.\n"); | 341 | "Scheduling ISP abort.\n"); |
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index 94bded5ddce4..03554934b0a5 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c | |||
@@ -3817,6 +3817,20 @@ exit: | |||
3817 | return rval; | 3817 | return rval; |
3818 | } | 3818 | } |
3819 | 3819 | ||
3820 | void qla82xx_clear_pending_mbx(scsi_qla_host_t *vha) | ||
3821 | { | ||
3822 | struct qla_hw_data *ha = vha->hw; | ||
3823 | |||
3824 | if (ha->flags.mbox_busy) { | ||
3825 | ha->flags.mbox_int = 1; | ||
3826 | ha->flags.mbox_busy = 0; | ||
3827 | ql_log(ql_log_warn, vha, 0x6010, | ||
3828 | "Doing premature completion of mbx command.\n"); | ||
3829 | if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) | ||
3830 | complete(&ha->mbx_intr_comp); | ||
3831 | } | ||
3832 | } | ||
3833 | |||
3820 | void qla82xx_watchdog(scsi_qla_host_t *vha) | 3834 | void qla82xx_watchdog(scsi_qla_host_t *vha) |
3821 | { | 3835 | { |
3822 | uint32_t dev_state, halt_status; | 3836 | uint32_t dev_state, halt_status; |
@@ -3839,9 +3853,13 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) | |||
3839 | qla2xxx_wake_dpc(vha); | 3853 | qla2xxx_wake_dpc(vha); |
3840 | } else { | 3854 | } else { |
3841 | if (qla82xx_check_fw_alive(vha)) { | 3855 | if (qla82xx_check_fw_alive(vha)) { |
3856 | ql_dbg(ql_dbg_timer, vha, 0x6011, | ||
3857 | "disabling pause transmit on port 0 & 1.\n"); | ||
3858 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, | ||
3859 | CRB_NIU_XG_PAUSE_CTL_P0|CRB_NIU_XG_PAUSE_CTL_P1); | ||
3842 | halt_status = qla82xx_rd_32(ha, | 3860 | halt_status = qla82xx_rd_32(ha, |
3843 | QLA82XX_PEG_HALT_STATUS1); | 3861 | QLA82XX_PEG_HALT_STATUS1); |
3844 | ql_dbg(ql_dbg_timer, vha, 0x6005, | 3862 | ql_log(ql_log_info, vha, 0x6005, |
3845 | "dumping hw/fw registers:.\n " | 3863 | "dumping hw/fw registers:.\n " |
3846 | " PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,.\n " | 3864 | " PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,.\n " |
3847 | " PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,.\n " | 3865 | " PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,.\n " |
@@ -3858,6 +3876,11 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) | |||
3858 | QLA82XX_CRB_PEG_NET_3 + 0x3c), | 3876 | QLA82XX_CRB_PEG_NET_3 + 0x3c), |
3859 | qla82xx_rd_32(ha, | 3877 | qla82xx_rd_32(ha, |
3860 | QLA82XX_CRB_PEG_NET_4 + 0x3c)); | 3878 | QLA82XX_CRB_PEG_NET_4 + 0x3c)); |
3879 | if (LSW(MSB(halt_status)) == 0x67) | ||
3880 | ql_log(ql_log_warn, vha, 0xb052, | ||
3881 | "Firmware aborted with " | ||
3882 | "error code 0x00006700. Device is " | ||
3883 | "being reset.\n"); | ||
3861 | if (halt_status & HALT_STATUS_UNRECOVERABLE) { | 3884 | if (halt_status & HALT_STATUS_UNRECOVERABLE) { |
3862 | set_bit(ISP_UNRECOVERABLE, | 3885 | set_bit(ISP_UNRECOVERABLE, |
3863 | &vha->dpc_flags); | 3886 | &vha->dpc_flags); |
@@ -3869,16 +3892,8 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) | |||
3869 | } | 3892 | } |
3870 | qla2xxx_wake_dpc(vha); | 3893 | qla2xxx_wake_dpc(vha); |
3871 | ha->flags.isp82xx_fw_hung = 1; | 3894 | ha->flags.isp82xx_fw_hung = 1; |
3872 | if (ha->flags.mbox_busy) { | 3895 | ql_log(ql_log_warn, vha, 0x6007, "Firmware hung.\n"); |
3873 | ha->flags.mbox_int = 1; | 3896 | qla82xx_clear_pending_mbx(vha); |
3874 | ql_log(ql_log_warn, vha, 0x6007, | ||
3875 | "Due to FW hung, doing " | ||
3876 | "premature completion of mbx " | ||
3877 | "command.\n"); | ||
3878 | if (test_bit(MBX_INTR_WAIT, | ||
3879 | &ha->mbx_cmd_flags)) | ||
3880 | complete(&ha->mbx_intr_comp); | ||
3881 | } | ||
3882 | } | 3897 | } |
3883 | } | 3898 | } |
3884 | } | 3899 | } |
@@ -4073,10 +4088,7 @@ qla82xx_chip_reset_cleanup(scsi_qla_host_t *vha) | |||
4073 | msleep(1000); | 4088 | msleep(1000); |
4074 | if (qla82xx_check_fw_alive(vha)) { | 4089 | if (qla82xx_check_fw_alive(vha)) { |
4075 | ha->flags.isp82xx_fw_hung = 1; | 4090 | ha->flags.isp82xx_fw_hung = 1; |
4076 | if (ha->flags.mbox_busy) { | 4091 | qla82xx_clear_pending_mbx(vha); |
4077 | ha->flags.mbox_int = 1; | ||
4078 | complete(&ha->mbx_intr_comp); | ||
4079 | } | ||
4080 | break; | 4092 | break; |
4081 | } | 4093 | } |
4082 | } | 4094 | } |
diff --git a/drivers/scsi/qla2xxx/qla_nx.h b/drivers/scsi/qla2xxx/qla_nx.h index 57820c199bc2..57a226be339a 100644 --- a/drivers/scsi/qla2xxx/qla_nx.h +++ b/drivers/scsi/qla2xxx/qla_nx.h | |||
@@ -1173,4 +1173,8 @@ struct qla82xx_md_entry_queue { | |||
1173 | 1173 | ||
1174 | static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC, | 1174 | static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC, |
1175 | 0x410000B8, 0x410000BC }; | 1175 | 0x410000B8, 0x410000BC }; |
1176 | |||
1177 | #define CRB_NIU_XG_PAUSE_CTL_P0 0x1 | ||
1178 | #define CRB_NIU_XG_PAUSE_CTL_P1 0x8 | ||
1179 | |||
1176 | #endif | 1180 | #endif |
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index fd14c7bfc626..f9e5b85e84d8 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -201,12 +201,12 @@ MODULE_PARM_DESC(ql2xmdcapmask, | |||
201 | "Set the Minidump driver capture mask level. " | 201 | "Set the Minidump driver capture mask level. " |
202 | "Default is 0x7F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F."); | 202 | "Default is 0x7F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F."); |
203 | 203 | ||
204 | int ql2xmdenable; | 204 | int ql2xmdenable = 1; |
205 | module_param(ql2xmdenable, int, S_IRUGO); | 205 | module_param(ql2xmdenable, int, S_IRUGO); |
206 | MODULE_PARM_DESC(ql2xmdenable, | 206 | MODULE_PARM_DESC(ql2xmdenable, |
207 | "Enable/disable MiniDump. " | 207 | "Enable/disable MiniDump. " |
208 | "0 (Default) - MiniDump disabled. " | 208 | "0 - MiniDump disabled. " |
209 | "1 - MiniDump enabled."); | 209 | "1 (Default) - MiniDump enabled."); |
210 | 210 | ||
211 | /* | 211 | /* |
212 | * SCSI host template entry points | 212 | * SCSI host template entry points |
@@ -423,6 +423,7 @@ fail2: | |||
423 | qla25xx_delete_queues(vha); | 423 | qla25xx_delete_queues(vha); |
424 | destroy_workqueue(ha->wq); | 424 | destroy_workqueue(ha->wq); |
425 | ha->wq = NULL; | 425 | ha->wq = NULL; |
426 | vha->req = ha->req_q_map[0]; | ||
426 | fail: | 427 | fail: |
427 | ha->mqenable = 0; | 428 | ha->mqenable = 0; |
428 | kfree(ha->req_q_map); | 429 | kfree(ha->req_q_map); |
@@ -814,49 +815,6 @@ qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha) | |||
814 | return return_status; | 815 | return return_status; |
815 | } | 816 | } |
816 | 817 | ||
817 | /* | ||
818 | * qla2x00_wait_for_loop_ready | ||
819 | * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop | ||
820 | * to be in LOOP_READY state. | ||
821 | * Input: | ||
822 | * ha - pointer to host adapter structure | ||
823 | * | ||
824 | * Note: | ||
825 | * Does context switching-Release SPIN_LOCK | ||
826 | * (if any) before calling this routine. | ||
827 | * | ||
828 | * | ||
829 | * Return: | ||
830 | * Success (LOOP_READY) : 0 | ||
831 | * Failed (LOOP_NOT_READY) : 1 | ||
832 | */ | ||
833 | static inline int | ||
834 | qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha) | ||
835 | { | ||
836 | int return_status = QLA_SUCCESS; | ||
837 | unsigned long loop_timeout ; | ||
838 | struct qla_hw_data *ha = vha->hw; | ||
839 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | ||
840 | |||
841 | /* wait for 5 min at the max for loop to be ready */ | ||
842 | loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ); | ||
843 | |||
844 | while ((!atomic_read(&base_vha->loop_down_timer) && | ||
845 | atomic_read(&base_vha->loop_state) == LOOP_DOWN) || | ||
846 | atomic_read(&base_vha->loop_state) != LOOP_READY) { | ||
847 | if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) { | ||
848 | return_status = QLA_FUNCTION_FAILED; | ||
849 | break; | ||
850 | } | ||
851 | msleep(1000); | ||
852 | if (time_after_eq(jiffies, loop_timeout)) { | ||
853 | return_status = QLA_FUNCTION_FAILED; | ||
854 | break; | ||
855 | } | ||
856 | } | ||
857 | return (return_status); | ||
858 | } | ||
859 | |||
860 | static void | 818 | static void |
861 | sp_get(struct srb *sp) | 819 | sp_get(struct srb *sp) |
862 | { | 820 | { |
@@ -1035,12 +993,6 @@ __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type, | |||
1035 | "Wait for hba online failed for cmd=%p.\n", cmd); | 993 | "Wait for hba online failed for cmd=%p.\n", cmd); |
1036 | goto eh_reset_failed; | 994 | goto eh_reset_failed; |
1037 | } | 995 | } |
1038 | err = 1; | ||
1039 | if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS) { | ||
1040 | ql_log(ql_log_warn, vha, 0x800b, | ||
1041 | "Wait for loop ready failed for cmd=%p.\n", cmd); | ||
1042 | goto eh_reset_failed; | ||
1043 | } | ||
1044 | err = 2; | 996 | err = 2; |
1045 | if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1) | 997 | if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1) |
1046 | != QLA_SUCCESS) { | 998 | != QLA_SUCCESS) { |
@@ -1137,10 +1089,9 @@ qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd) | |||
1137 | goto eh_bus_reset_done; | 1089 | goto eh_bus_reset_done; |
1138 | } | 1090 | } |
1139 | 1091 | ||
1140 | if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) { | 1092 | if (qla2x00_loop_reset(vha) == QLA_SUCCESS) |
1141 | if (qla2x00_loop_reset(vha) == QLA_SUCCESS) | 1093 | ret = SUCCESS; |
1142 | ret = SUCCESS; | 1094 | |
1143 | } | ||
1144 | if (ret == FAILED) | 1095 | if (ret == FAILED) |
1145 | goto eh_bus_reset_done; | 1096 | goto eh_bus_reset_done; |
1146 | 1097 | ||
@@ -1206,15 +1157,6 @@ qla2xxx_eh_host_reset(struct scsi_cmnd *cmd) | |||
1206 | if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS) | 1157 | if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS) |
1207 | goto eh_host_reset_lock; | 1158 | goto eh_host_reset_lock; |
1208 | 1159 | ||
1209 | /* | ||
1210 | * Fixme-may be dpc thread is active and processing | ||
1211 | * loop_resync,so wait a while for it to | ||
1212 | * be completed and then issue big hammer.Otherwise | ||
1213 | * it may cause I/O failure as big hammer marks the | ||
1214 | * devices as lost kicking of the port_down_timer | ||
1215 | * while dpc is stuck for the mailbox to complete. | ||
1216 | */ | ||
1217 | qla2x00_wait_for_loop_ready(vha); | ||
1218 | if (vha != base_vha) { | 1160 | if (vha != base_vha) { |
1219 | if (qla2x00_vp_abort_isp(vha)) | 1161 | if (qla2x00_vp_abort_isp(vha)) |
1220 | goto eh_host_reset_lock; | 1162 | goto eh_host_reset_lock; |
@@ -1297,16 +1239,13 @@ qla2x00_loop_reset(scsi_qla_host_t *vha) | |||
1297 | atomic_set(&vha->loop_state, LOOP_DOWN); | 1239 | atomic_set(&vha->loop_state, LOOP_DOWN); |
1298 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | 1240 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
1299 | qla2x00_mark_all_devices_lost(vha, 0); | 1241 | qla2x00_mark_all_devices_lost(vha, 0); |
1300 | qla2x00_wait_for_loop_ready(vha); | ||
1301 | } | 1242 | } |
1302 | 1243 | ||
1303 | if (ha->flags.enable_lip_reset) { | 1244 | if (ha->flags.enable_lip_reset) { |
1304 | ret = qla2x00_lip_reset(vha); | 1245 | ret = qla2x00_lip_reset(vha); |
1305 | if (ret != QLA_SUCCESS) { | 1246 | if (ret != QLA_SUCCESS) |
1306 | ql_dbg(ql_dbg_taskm, vha, 0x802e, | 1247 | ql_dbg(ql_dbg_taskm, vha, 0x802e, |
1307 | "lip_reset failed (%d).\n", ret); | 1248 | "lip_reset failed (%d).\n", ret); |
1308 | } else | ||
1309 | qla2x00_wait_for_loop_ready(vha); | ||
1310 | } | 1249 | } |
1311 | 1250 | ||
1312 | /* Issue marker command only when we are going to start the I/O */ | 1251 | /* Issue marker command only when we are going to start the I/O */ |
@@ -4070,13 +4009,8 @@ qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |||
4070 | /* For ISP82XX complete any pending mailbox cmd */ | 4009 | /* For ISP82XX complete any pending mailbox cmd */ |
4071 | if (IS_QLA82XX(ha)) { | 4010 | if (IS_QLA82XX(ha)) { |
4072 | ha->flags.isp82xx_fw_hung = 1; | 4011 | ha->flags.isp82xx_fw_hung = 1; |
4073 | if (ha->flags.mbox_busy) { | 4012 | ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n"); |
4074 | ha->flags.mbox_int = 1; | 4013 | qla82xx_clear_pending_mbx(vha); |
4075 | ql_dbg(ql_dbg_aer, vha, 0x9001, | ||
4076 | "Due to pci channel io frozen, doing premature " | ||
4077 | "completion of mbx command.\n"); | ||
4078 | complete(&ha->mbx_intr_comp); | ||
4079 | } | ||
4080 | } | 4014 | } |
4081 | qla2x00_free_irqs(vha); | 4015 | qla2x00_free_irqs(vha); |
4082 | pci_disable_device(pdev); | 4016 | pci_disable_device(pdev); |
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h index 13b6357c1fa2..23f33a6d52d7 100644 --- a/drivers/scsi/qla2xxx/qla_version.h +++ b/drivers/scsi/qla2xxx/qla_version.h | |||
@@ -7,7 +7,7 @@ | |||
7 | /* | 7 | /* |
8 | * Driver version | 8 | * Driver version |
9 | */ | 9 | */ |
10 | #define QLA2XXX_VERSION "8.03.07.07-k" | 10 | #define QLA2XXX_VERSION "8.03.07.12-k" |
11 | 11 | ||
12 | #define QLA_DRIVER_MAJOR_VER 8 | 12 | #define QLA_DRIVER_MAJOR_VER 8 |
13 | #define QLA_DRIVER_MINOR_VER 3 | 13 | #define QLA_DRIVER_MINOR_VER 3 |
diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h index ace637bf254e..fd5edc6e166d 100644 --- a/drivers/scsi/qla4xxx/ql4_def.h +++ b/drivers/scsi/qla4xxx/ql4_def.h | |||
@@ -147,7 +147,7 @@ | |||
147 | #define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */ | 147 | #define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */ |
148 | #define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */ | 148 | #define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */ |
149 | 149 | ||
150 | #define QL4_SESS_RECOVERY_TMO 30 /* iSCSI session */ | 150 | #define QL4_SESS_RECOVERY_TMO 120 /* iSCSI session */ |
151 | /* recovery timeout */ | 151 | /* recovery timeout */ |
152 | 152 | ||
153 | #define LSDW(x) ((u32)((u64)(x))) | 153 | #define LSDW(x) ((u32)((u64)(x))) |
@@ -173,6 +173,8 @@ | |||
173 | #define ISNS_DEREG_TOV 5 | 173 | #define ISNS_DEREG_TOV 5 |
174 | #define HBA_ONLINE_TOV 30 | 174 | #define HBA_ONLINE_TOV 30 |
175 | #define DISABLE_ACB_TOV 30 | 175 | #define DISABLE_ACB_TOV 30 |
176 | #define IP_CONFIG_TOV 30 | ||
177 | #define LOGIN_TOV 12 | ||
176 | 178 | ||
177 | #define MAX_RESET_HA_RETRIES 2 | 179 | #define MAX_RESET_HA_RETRIES 2 |
178 | 180 | ||
@@ -240,6 +242,45 @@ struct ddb_entry { | |||
240 | 242 | ||
241 | uint16_t fw_ddb_index; /* DDB firmware index */ | 243 | uint16_t fw_ddb_index; /* DDB firmware index */ |
242 | uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */ | 244 | uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */ |
245 | uint16_t ddb_type; | ||
246 | #define FLASH_DDB 0x01 | ||
247 | |||
248 | struct dev_db_entry fw_ddb_entry; | ||
249 | int (*unblock_sess)(struct iscsi_cls_session *cls_session); | ||
250 | int (*ddb_change)(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | ||
251 | struct ddb_entry *ddb_entry, uint32_t state); | ||
252 | |||
253 | /* Driver Re-login */ | ||
254 | unsigned long flags; /* DDB Flags */ | ||
255 | uint16_t default_relogin_timeout; /* Max time to wait for | ||
256 | * relogin to complete */ | ||
257 | atomic_t retry_relogin_timer; /* Min Time between relogins | ||
258 | * (4000 only) */ | ||
259 | atomic_t relogin_timer; /* Max Time to wait for | ||
260 | * relogin to complete */ | ||
261 | atomic_t relogin_retry_count; /* Num of times relogin has been | ||
262 | * retried */ | ||
263 | uint32_t default_time2wait; /* Default Min time between | ||
264 | * relogins (+aens) */ | ||
265 | |||
266 | }; | ||
267 | |||
268 | struct qla_ddb_index { | ||
269 | struct list_head list; | ||
270 | uint16_t fw_ddb_idx; | ||
271 | struct dev_db_entry fw_ddb; | ||
272 | }; | ||
273 | |||
274 | #define DDB_IPADDR_LEN 64 | ||
275 | |||
276 | struct ql4_tuple_ddb { | ||
277 | int port; | ||
278 | int tpgt; | ||
279 | char ip_addr[DDB_IPADDR_LEN]; | ||
280 | char iscsi_name[ISCSI_NAME_SIZE]; | ||
281 | uint16_t options; | ||
282 | #define DDB_OPT_IPV6 0x0e0e | ||
283 | #define DDB_OPT_IPV4 0x0f0f | ||
243 | }; | 284 | }; |
244 | 285 | ||
245 | /* | 286 | /* |
@@ -411,7 +452,7 @@ struct scsi_qla_host { | |||
411 | #define AF_FW_RECOVERY 19 /* 0x00080000 */ | 452 | #define AF_FW_RECOVERY 19 /* 0x00080000 */ |
412 | #define AF_EEH_BUSY 20 /* 0x00100000 */ | 453 | #define AF_EEH_BUSY 20 /* 0x00100000 */ |
413 | #define AF_PCI_CHANNEL_IO_PERM_FAILURE 21 /* 0x00200000 */ | 454 | #define AF_PCI_CHANNEL_IO_PERM_FAILURE 21 /* 0x00200000 */ |
414 | 455 | #define AF_BUILD_DDB_LIST 22 /* 0x00400000 */ | |
415 | unsigned long dpc_flags; | 456 | unsigned long dpc_flags; |
416 | 457 | ||
417 | #define DPC_RESET_HA 1 /* 0x00000002 */ | 458 | #define DPC_RESET_HA 1 /* 0x00000002 */ |
@@ -604,6 +645,7 @@ struct scsi_qla_host { | |||
604 | uint16_t bootload_minor; | 645 | uint16_t bootload_minor; |
605 | uint16_t bootload_patch; | 646 | uint16_t bootload_patch; |
606 | uint16_t bootload_build; | 647 | uint16_t bootload_build; |
648 | uint16_t def_timeout; /* Default login timeout */ | ||
607 | 649 | ||
608 | uint32_t flash_state; | 650 | uint32_t flash_state; |
609 | #define QLFLASH_WAITING 0 | 651 | #define QLFLASH_WAITING 0 |
@@ -623,6 +665,11 @@ struct scsi_qla_host { | |||
623 | uint16_t iscsi_pci_func_cnt; | 665 | uint16_t iscsi_pci_func_cnt; |
624 | uint8_t model_name[16]; | 666 | uint8_t model_name[16]; |
625 | struct completion disable_acb_comp; | 667 | struct completion disable_acb_comp; |
668 | struct dma_pool *fw_ddb_dma_pool; | ||
669 | #define DDB_DMA_BLOCK_SIZE 512 | ||
670 | uint16_t pri_ddb_idx; | ||
671 | uint16_t sec_ddb_idx; | ||
672 | int is_reset; | ||
626 | }; | 673 | }; |
627 | 674 | ||
628 | struct ql4_task_data { | 675 | struct ql4_task_data { |
@@ -835,6 +882,10 @@ static inline int ql4xxx_reset_active(struct scsi_qla_host *ha) | |||
835 | /*---------------------------------------------------------------------------*/ | 882 | /*---------------------------------------------------------------------------*/ |
836 | 883 | ||
837 | /* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */ | 884 | /* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */ |
885 | |||
886 | #define INIT_ADAPTER 0 | ||
887 | #define RESET_ADAPTER 1 | ||
888 | |||
838 | #define PRESERVE_DDB_LIST 0 | 889 | #define PRESERVE_DDB_LIST 0 |
839 | #define REBUILD_DDB_LIST 1 | 890 | #define REBUILD_DDB_LIST 1 |
840 | 891 | ||
diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h index cbd5a20dbbd1..4ac07f882521 100644 --- a/drivers/scsi/qla4xxx/ql4_fw.h +++ b/drivers/scsi/qla4xxx/ql4_fw.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #define MAX_PRST_DEV_DB_ENTRIES 64 | 12 | #define MAX_PRST_DEV_DB_ENTRIES 64 |
13 | #define MIN_DISC_DEV_DB_ENTRY MAX_PRST_DEV_DB_ENTRIES | 13 | #define MIN_DISC_DEV_DB_ENTRY MAX_PRST_DEV_DB_ENTRIES |
14 | #define MAX_DEV_DB_ENTRIES 512 | 14 | #define MAX_DEV_DB_ENTRIES 512 |
15 | #define MAX_DEV_DB_ENTRIES_40XX 256 | ||
15 | 16 | ||
16 | /************************************************************************* | 17 | /************************************************************************* |
17 | * | 18 | * |
@@ -604,6 +605,13 @@ struct addr_ctrl_blk { | |||
604 | uint8_t res14[140]; /* 274-2FF */ | 605 | uint8_t res14[140]; /* 274-2FF */ |
605 | }; | 606 | }; |
606 | 607 | ||
608 | #define IP_ADDR_COUNT 4 /* Total 4 IP address supported in one interface | ||
609 | * One IPv4, one IPv6 link local and 2 IPv6 | ||
610 | */ | ||
611 | |||
612 | #define IP_STATE_MASK 0x0F000000 | ||
613 | #define IP_STATE_SHIFT 24 | ||
614 | |||
607 | struct init_fw_ctrl_blk { | 615 | struct init_fw_ctrl_blk { |
608 | struct addr_ctrl_blk pri; | 616 | struct addr_ctrl_blk pri; |
609 | /* struct addr_ctrl_blk sec;*/ | 617 | /* struct addr_ctrl_blk sec;*/ |
diff --git a/drivers/scsi/qla4xxx/ql4_glbl.h b/drivers/scsi/qla4xxx/ql4_glbl.h index 160db9d5ea21..d0dd4b330206 100644 --- a/drivers/scsi/qla4xxx/ql4_glbl.h +++ b/drivers/scsi/qla4xxx/ql4_glbl.h | |||
@@ -13,7 +13,7 @@ struct iscsi_cls_conn; | |||
13 | int qla4xxx_hw_reset(struct scsi_qla_host *ha); | 13 | int qla4xxx_hw_reset(struct scsi_qla_host *ha); |
14 | int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a); | 14 | int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a); |
15 | int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb *srb); | 15 | int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb *srb); |
16 | int qla4xxx_initialize_adapter(struct scsi_qla_host *ha); | 16 | int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset); |
17 | int qla4xxx_soft_reset(struct scsi_qla_host *ha); | 17 | int qla4xxx_soft_reset(struct scsi_qla_host *ha); |
18 | irqreturn_t qla4xxx_intr_handler(int irq, void *dev_id); | 18 | irqreturn_t qla4xxx_intr_handler(int irq, void *dev_id); |
19 | 19 | ||
@@ -153,10 +153,13 @@ int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | |||
153 | uint32_t *mbx_sts); | 153 | uint32_t *mbx_sts); |
154 | int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index); | 154 | int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index); |
155 | int qla4xxx_send_passthru0(struct iscsi_task *task); | 155 | int qla4xxx_send_passthru0(struct iscsi_task *task); |
156 | void qla4xxx_free_ddb_index(struct scsi_qla_host *ha); | ||
156 | int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index, | 157 | int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index, |
157 | uint16_t stats_size, dma_addr_t stats_dma); | 158 | uint16_t stats_size, dma_addr_t stats_dma); |
158 | void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, | 159 | void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, |
159 | struct ddb_entry *ddb_entry); | 160 | struct ddb_entry *ddb_entry); |
161 | void qla4xxx_update_session_conn_fwddb_param(struct scsi_qla_host *ha, | ||
162 | struct ddb_entry *ddb_entry); | ||
160 | int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha, | 163 | int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha, |
161 | struct dev_db_entry *fw_ddb_entry, | 164 | struct dev_db_entry *fw_ddb_entry, |
162 | dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index); | 165 | dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index); |
@@ -169,11 +172,22 @@ int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma, | |||
169 | int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha, | 172 | int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha, |
170 | uint32_t region, uint32_t field0, | 173 | uint32_t region, uint32_t field0, |
171 | uint32_t field1); | 174 | uint32_t field1); |
175 | int qla4xxx_get_ddb_index(struct scsi_qla_host *ha, uint16_t *ddb_index); | ||
176 | void qla4xxx_login_flash_ddb(struct iscsi_cls_session *cls_session); | ||
177 | int qla4xxx_unblock_ddb(struct iscsi_cls_session *cls_session); | ||
178 | int qla4xxx_unblock_flash_ddb(struct iscsi_cls_session *cls_session); | ||
179 | int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | ||
180 | struct ddb_entry *ddb_entry, uint32_t state); | ||
181 | int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | ||
182 | struct ddb_entry *ddb_entry, uint32_t state); | ||
183 | void qla4xxx_build_ddb_list(struct scsi_qla_host *ha, int is_reset); | ||
172 | 184 | ||
173 | /* BSG Functions */ | 185 | /* BSG Functions */ |
174 | int qla4xxx_bsg_request(struct bsg_job *bsg_job); | 186 | int qla4xxx_bsg_request(struct bsg_job *bsg_job); |
175 | int qla4xxx_process_vendor_specific(struct bsg_job *bsg_job); | 187 | int qla4xxx_process_vendor_specific(struct bsg_job *bsg_job); |
176 | 188 | ||
189 | void qla4xxx_arm_relogin_timer(struct ddb_entry *ddb_entry); | ||
190 | |||
177 | extern int ql4xextended_error_logging; | 191 | extern int ql4xextended_error_logging; |
178 | extern int ql4xdontresethba; | 192 | extern int ql4xdontresethba; |
179 | extern int ql4xenablemsix; | 193 | extern int ql4xenablemsix; |
diff --git a/drivers/scsi/qla4xxx/ql4_init.c b/drivers/scsi/qla4xxx/ql4_init.c index 3075fbaef553..1bdfa8120ac8 100644 --- a/drivers/scsi/qla4xxx/ql4_init.c +++ b/drivers/scsi/qla4xxx/ql4_init.c | |||
@@ -773,22 +773,24 @@ int qla4xxx_start_firmware(struct scsi_qla_host *ha) | |||
773 | * be freed so that when login happens from user space there are free DDB | 773 | * be freed so that when login happens from user space there are free DDB |
774 | * indices available. | 774 | * indices available. |
775 | **/ | 775 | **/ |
776 | static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) | 776 | void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) |
777 | { | 777 | { |
778 | int max_ddbs; | 778 | int max_ddbs; |
779 | int ret; | 779 | int ret; |
780 | uint32_t idx = 0, next_idx = 0; | 780 | uint32_t idx = 0, next_idx = 0; |
781 | uint32_t state = 0, conn_err = 0; | 781 | uint32_t state = 0, conn_err = 0; |
782 | 782 | ||
783 | max_ddbs = is_qla40XX(ha) ? MAX_PRST_DEV_DB_ENTRIES : | 783 | max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : |
784 | MAX_DEV_DB_ENTRIES; | 784 | MAX_DEV_DB_ENTRIES; |
785 | 785 | ||
786 | for (idx = 0; idx < max_ddbs; idx = next_idx) { | 786 | for (idx = 0; idx < max_ddbs; idx = next_idx) { |
787 | ret = qla4xxx_get_fwddb_entry(ha, idx, NULL, 0, NULL, | 787 | ret = qla4xxx_get_fwddb_entry(ha, idx, NULL, 0, NULL, |
788 | &next_idx, &state, &conn_err, | 788 | &next_idx, &state, &conn_err, |
789 | NULL, NULL); | 789 | NULL, NULL); |
790 | if (ret == QLA_ERROR) | 790 | if (ret == QLA_ERROR) { |
791 | next_idx++; | ||
791 | continue; | 792 | continue; |
793 | } | ||
792 | if (state == DDB_DS_NO_CONNECTION_ACTIVE || | 794 | if (state == DDB_DS_NO_CONNECTION_ACTIVE || |
793 | state == DDB_DS_SESSION_FAILED) { | 795 | state == DDB_DS_SESSION_FAILED) { |
794 | DEBUG2(ql4_printk(KERN_INFO, ha, | 796 | DEBUG2(ql4_printk(KERN_INFO, ha, |
@@ -804,7 +806,6 @@ static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) | |||
804 | } | 806 | } |
805 | } | 807 | } |
806 | 808 | ||
807 | |||
808 | /** | 809 | /** |
809 | * qla4xxx_initialize_adapter - initiailizes hba | 810 | * qla4xxx_initialize_adapter - initiailizes hba |
810 | * @ha: Pointer to host adapter structure. | 811 | * @ha: Pointer to host adapter structure. |
@@ -812,7 +813,7 @@ static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) | |||
812 | * This routine parforms all of the steps necessary to initialize the adapter. | 813 | * This routine parforms all of the steps necessary to initialize the adapter. |
813 | * | 814 | * |
814 | **/ | 815 | **/ |
815 | int qla4xxx_initialize_adapter(struct scsi_qla_host *ha) | 816 | int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset) |
816 | { | 817 | { |
817 | int status = QLA_ERROR; | 818 | int status = QLA_ERROR; |
818 | 819 | ||
@@ -840,7 +841,8 @@ int qla4xxx_initialize_adapter(struct scsi_qla_host *ha) | |||
840 | if (status == QLA_ERROR) | 841 | if (status == QLA_ERROR) |
841 | goto exit_init_hba; | 842 | goto exit_init_hba; |
842 | 843 | ||
843 | qla4xxx_free_ddb_index(ha); | 844 | if (is_reset == RESET_ADAPTER) |
845 | qla4xxx_build_ddb_list(ha, is_reset); | ||
844 | 846 | ||
845 | set_bit(AF_ONLINE, &ha->flags); | 847 | set_bit(AF_ONLINE, &ha->flags); |
846 | exit_init_hba: | 848 | exit_init_hba: |
@@ -855,38 +857,12 @@ exit_init_hba: | |||
855 | return status; | 857 | return status; |
856 | } | 858 | } |
857 | 859 | ||
858 | /** | 860 | int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, |
859 | * qla4xxx_process_ddb_changed - process ddb state change | 861 | struct ddb_entry *ddb_entry, uint32_t state) |
860 | * @ha - Pointer to host adapter structure. | ||
861 | * @fw_ddb_index - Firmware's device database index | ||
862 | * @state - Device state | ||
863 | * | ||
864 | * This routine processes a Decive Database Changed AEN Event. | ||
865 | **/ | ||
866 | int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | ||
867 | uint32_t state, uint32_t conn_err) | ||
868 | { | 862 | { |
869 | struct ddb_entry * ddb_entry; | ||
870 | uint32_t old_fw_ddb_device_state; | 863 | uint32_t old_fw_ddb_device_state; |
871 | int status = QLA_ERROR; | 864 | int status = QLA_ERROR; |
872 | 865 | ||
873 | /* check for out of range index */ | ||
874 | if (fw_ddb_index >= MAX_DDB_ENTRIES) | ||
875 | goto exit_ddb_event; | ||
876 | |||
877 | /* Get the corresponging ddb entry */ | ||
878 | ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index); | ||
879 | /* Device does not currently exist in our database. */ | ||
880 | if (ddb_entry == NULL) { | ||
881 | ql4_printk(KERN_ERR, ha, "%s: No ddb_entry at FW index [%d]\n", | ||
882 | __func__, fw_ddb_index); | ||
883 | |||
884 | if (state == DDB_DS_NO_CONNECTION_ACTIVE) | ||
885 | clear_bit(fw_ddb_index, ha->ddb_idx_map); | ||
886 | |||
887 | goto exit_ddb_event; | ||
888 | } | ||
889 | |||
890 | old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state; | 866 | old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state; |
891 | DEBUG2(ql4_printk(KERN_INFO, ha, | 867 | DEBUG2(ql4_printk(KERN_INFO, ha, |
892 | "%s: DDB - old state = 0x%x, new state = 0x%x for " | 868 | "%s: DDB - old state = 0x%x, new state = 0x%x for " |
@@ -900,9 +876,7 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | |||
900 | switch (state) { | 876 | switch (state) { |
901 | case DDB_DS_SESSION_ACTIVE: | 877 | case DDB_DS_SESSION_ACTIVE: |
902 | case DDB_DS_DISCOVERY: | 878 | case DDB_DS_DISCOVERY: |
903 | iscsi_conn_start(ddb_entry->conn); | 879 | ddb_entry->unblock_sess(ddb_entry->sess); |
904 | iscsi_conn_login_event(ddb_entry->conn, | ||
905 | ISCSI_CONN_STATE_LOGGED_IN); | ||
906 | qla4xxx_update_session_conn_param(ha, ddb_entry); | 880 | qla4xxx_update_session_conn_param(ha, ddb_entry); |
907 | status = QLA_SUCCESS; | 881 | status = QLA_SUCCESS; |
908 | break; | 882 | break; |
@@ -936,9 +910,7 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | |||
936 | switch (state) { | 910 | switch (state) { |
937 | case DDB_DS_SESSION_ACTIVE: | 911 | case DDB_DS_SESSION_ACTIVE: |
938 | case DDB_DS_DISCOVERY: | 912 | case DDB_DS_DISCOVERY: |
939 | iscsi_conn_start(ddb_entry->conn); | 913 | ddb_entry->unblock_sess(ddb_entry->sess); |
940 | iscsi_conn_login_event(ddb_entry->conn, | ||
941 | ISCSI_CONN_STATE_LOGGED_IN); | ||
942 | qla4xxx_update_session_conn_param(ha, ddb_entry); | 914 | qla4xxx_update_session_conn_param(ha, ddb_entry); |
943 | status = QLA_SUCCESS; | 915 | status = QLA_SUCCESS; |
944 | break; | 916 | break; |
@@ -954,7 +926,198 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | |||
954 | __func__)); | 926 | __func__)); |
955 | break; | 927 | break; |
956 | } | 928 | } |
929 | return status; | ||
930 | } | ||
931 | |||
932 | void qla4xxx_arm_relogin_timer(struct ddb_entry *ddb_entry) | ||
933 | { | ||
934 | /* | ||
935 | * This triggers a relogin. After the relogin_timer | ||
936 | * expires, the relogin gets scheduled. We must wait a | ||
937 | * minimum amount of time since receiving an 0x8014 AEN | ||
938 | * with failed device_state or a logout response before | ||
939 | * we can issue another relogin. | ||
940 | * | ||
941 | * Firmware pads this timeout: (time2wait +1). | ||
942 | * Driver retry to login should be longer than F/W. | ||
943 | * Otherwise F/W will fail | ||
944 | * set_ddb() mbx cmd with 0x4005 since it still | ||
945 | * counting down its time2wait. | ||
946 | */ | ||
947 | atomic_set(&ddb_entry->relogin_timer, 0); | ||
948 | atomic_set(&ddb_entry->retry_relogin_timer, | ||
949 | ddb_entry->default_time2wait + 4); | ||
950 | |||
951 | } | ||
952 | |||
953 | int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, | ||
954 | struct ddb_entry *ddb_entry, uint32_t state) | ||
955 | { | ||
956 | uint32_t old_fw_ddb_device_state; | ||
957 | int status = QLA_ERROR; | ||
958 | |||
959 | old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state; | ||
960 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
961 | "%s: DDB - old state = 0x%x, new state = 0x%x for " | ||
962 | "index [%d]\n", __func__, | ||
963 | ddb_entry->fw_ddb_device_state, state, fw_ddb_index)); | ||
964 | |||
965 | ddb_entry->fw_ddb_device_state = state; | ||
966 | |||
967 | switch (old_fw_ddb_device_state) { | ||
968 | case DDB_DS_LOGIN_IN_PROCESS: | ||
969 | case DDB_DS_NO_CONNECTION_ACTIVE: | ||
970 | switch (state) { | ||
971 | case DDB_DS_SESSION_ACTIVE: | ||
972 | ddb_entry->unblock_sess(ddb_entry->sess); | ||
973 | qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry); | ||
974 | status = QLA_SUCCESS; | ||
975 | break; | ||
976 | case DDB_DS_SESSION_FAILED: | ||
977 | iscsi_block_session(ddb_entry->sess); | ||
978 | if (!test_bit(DF_RELOGIN, &ddb_entry->flags)) | ||
979 | qla4xxx_arm_relogin_timer(ddb_entry); | ||
980 | status = QLA_SUCCESS; | ||
981 | break; | ||
982 | } | ||
983 | break; | ||
984 | case DDB_DS_SESSION_ACTIVE: | ||
985 | switch (state) { | ||
986 | case DDB_DS_SESSION_FAILED: | ||
987 | iscsi_block_session(ddb_entry->sess); | ||
988 | if (!test_bit(DF_RELOGIN, &ddb_entry->flags)) | ||
989 | qla4xxx_arm_relogin_timer(ddb_entry); | ||
990 | status = QLA_SUCCESS; | ||
991 | break; | ||
992 | } | ||
993 | break; | ||
994 | case DDB_DS_SESSION_FAILED: | ||
995 | switch (state) { | ||
996 | case DDB_DS_SESSION_ACTIVE: | ||
997 | ddb_entry->unblock_sess(ddb_entry->sess); | ||
998 | qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry); | ||
999 | status = QLA_SUCCESS; | ||
1000 | break; | ||
1001 | case DDB_DS_SESSION_FAILED: | ||
1002 | if (!test_bit(DF_RELOGIN, &ddb_entry->flags)) | ||
1003 | qla4xxx_arm_relogin_timer(ddb_entry); | ||
1004 | status = QLA_SUCCESS; | ||
1005 | break; | ||
1006 | } | ||
1007 | break; | ||
1008 | default: | ||
1009 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Unknown Event\n", | ||
1010 | __func__)); | ||
1011 | break; | ||
1012 | } | ||
1013 | return status; | ||
1014 | } | ||
1015 | |||
1016 | /** | ||
1017 | * qla4xxx_process_ddb_changed - process ddb state change | ||
1018 | * @ha - Pointer to host adapter structure. | ||
1019 | * @fw_ddb_index - Firmware's device database index | ||
1020 | * @state - Device state | ||
1021 | * | ||
1022 | * This routine processes a Decive Database Changed AEN Event. | ||
1023 | **/ | ||
1024 | int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, | ||
1025 | uint32_t fw_ddb_index, | ||
1026 | uint32_t state, uint32_t conn_err) | ||
1027 | { | ||
1028 | struct ddb_entry *ddb_entry; | ||
1029 | int status = QLA_ERROR; | ||
1030 | |||
1031 | /* check for out of range index */ | ||
1032 | if (fw_ddb_index >= MAX_DDB_ENTRIES) | ||
1033 | goto exit_ddb_event; | ||
1034 | |||
1035 | /* Get the corresponging ddb entry */ | ||
1036 | ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index); | ||
1037 | /* Device does not currently exist in our database. */ | ||
1038 | if (ddb_entry == NULL) { | ||
1039 | ql4_printk(KERN_ERR, ha, "%s: No ddb_entry at FW index [%d]\n", | ||
1040 | __func__, fw_ddb_index); | ||
1041 | |||
1042 | if (state == DDB_DS_NO_CONNECTION_ACTIVE) | ||
1043 | clear_bit(fw_ddb_index, ha->ddb_idx_map); | ||
1044 | |||
1045 | goto exit_ddb_event; | ||
1046 | } | ||
1047 | |||
1048 | ddb_entry->ddb_change(ha, fw_ddb_index, ddb_entry, state); | ||
957 | 1049 | ||
958 | exit_ddb_event: | 1050 | exit_ddb_event: |
959 | return status; | 1051 | return status; |
960 | } | 1052 | } |
1053 | |||
1054 | /** | ||
1055 | * qla4xxx_login_flash_ddb - Login to target (DDB) | ||
1056 | * @cls_session: Pointer to the session to login | ||
1057 | * | ||
1058 | * This routine logins to the target. | ||
1059 | * Issues setddb and conn open mbx | ||
1060 | **/ | ||
1061 | void qla4xxx_login_flash_ddb(struct iscsi_cls_session *cls_session) | ||
1062 | { | ||
1063 | struct iscsi_session *sess; | ||
1064 | struct ddb_entry *ddb_entry; | ||
1065 | struct scsi_qla_host *ha; | ||
1066 | struct dev_db_entry *fw_ddb_entry = NULL; | ||
1067 | dma_addr_t fw_ddb_dma; | ||
1068 | uint32_t mbx_sts = 0; | ||
1069 | int ret; | ||
1070 | |||
1071 | sess = cls_session->dd_data; | ||
1072 | ddb_entry = sess->dd_data; | ||
1073 | ha = ddb_entry->ha; | ||
1074 | |||
1075 | if (!test_bit(AF_LINK_UP, &ha->flags)) | ||
1076 | return; | ||
1077 | |||
1078 | if (ddb_entry->ddb_type != FLASH_DDB) { | ||
1079 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1080 | "Skipping login to non FLASH DB")); | ||
1081 | goto exit_login; | ||
1082 | } | ||
1083 | |||
1084 | fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, | ||
1085 | &fw_ddb_dma); | ||
1086 | if (fw_ddb_entry == NULL) { | ||
1087 | DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n")); | ||
1088 | goto exit_login; | ||
1089 | } | ||
1090 | |||
1091 | if (ddb_entry->fw_ddb_index == INVALID_ENTRY) { | ||
1092 | ret = qla4xxx_get_ddb_index(ha, &ddb_entry->fw_ddb_index); | ||
1093 | if (ret == QLA_ERROR) | ||
1094 | goto exit_login; | ||
1095 | |||
1096 | ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry; | ||
1097 | ha->tot_ddbs++; | ||
1098 | } | ||
1099 | |||
1100 | memcpy(fw_ddb_entry, &ddb_entry->fw_ddb_entry, | ||
1101 | sizeof(struct dev_db_entry)); | ||
1102 | ddb_entry->sess->target_id = ddb_entry->fw_ddb_index; | ||
1103 | |||
1104 | ret = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index, | ||
1105 | fw_ddb_dma, &mbx_sts); | ||
1106 | if (ret == QLA_ERROR) { | ||
1107 | DEBUG2(ql4_printk(KERN_ERR, ha, "Set DDB failed\n")); | ||
1108 | goto exit_login; | ||
1109 | } | ||
1110 | |||
1111 | ddb_entry->fw_ddb_device_state = DDB_DS_LOGIN_IN_PROCESS; | ||
1112 | ret = qla4xxx_conn_open(ha, ddb_entry->fw_ddb_index); | ||
1113 | if (ret == QLA_ERROR) { | ||
1114 | ql4_printk(KERN_ERR, ha, "%s: Login failed: %s\n", __func__, | ||
1115 | sess->targetname); | ||
1116 | goto exit_login; | ||
1117 | } | ||
1118 | |||
1119 | exit_login: | ||
1120 | if (fw_ddb_entry) | ||
1121 | dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); | ||
1122 | } | ||
1123 | |||
diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c index 4c2b84870392..c2593782fbbe 100644 --- a/drivers/scsi/qla4xxx/ql4_mbx.c +++ b/drivers/scsi/qla4xxx/ql4_mbx.c | |||
@@ -41,6 +41,16 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount, | |||
41 | return status; | 41 | return status; |
42 | } | 42 | } |
43 | 43 | ||
44 | if (is_qla40XX(ha)) { | ||
45 | if (test_bit(AF_HA_REMOVAL, &ha->flags)) { | ||
46 | DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: " | ||
47 | "prematurely completing mbx cmd as " | ||
48 | "adapter removal detected\n", | ||
49 | ha->host_no, __func__)); | ||
50 | return status; | ||
51 | } | ||
52 | } | ||
53 | |||
44 | if (is_qla8022(ha)) { | 54 | if (is_qla8022(ha)) { |
45 | if (test_bit(AF_FW_RECOVERY, &ha->flags)) { | 55 | if (test_bit(AF_FW_RECOVERY, &ha->flags)) { |
46 | DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: " | 56 | DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: " |
@@ -413,6 +423,7 @@ qla4xxx_update_local_ifcb(struct scsi_qla_host *ha, | |||
413 | memcpy(ha->name_string, init_fw_cb->iscsi_name, | 423 | memcpy(ha->name_string, init_fw_cb->iscsi_name, |
414 | min(sizeof(ha->name_string), | 424 | min(sizeof(ha->name_string), |
415 | sizeof(init_fw_cb->iscsi_name))); | 425 | sizeof(init_fw_cb->iscsi_name))); |
426 | ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout); | ||
416 | /*memcpy(ha->alias, init_fw_cb->Alias, | 427 | /*memcpy(ha->alias, init_fw_cb->Alias, |
417 | min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/ | 428 | min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/ |
418 | 429 | ||
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c index 30f31b127f33..4169c8baa112 100644 --- a/drivers/scsi/qla4xxx/ql4_os.c +++ b/drivers/scsi/qla4xxx/ql4_os.c | |||
@@ -8,6 +8,7 @@ | |||
8 | #include <linux/slab.h> | 8 | #include <linux/slab.h> |
9 | #include <linux/blkdev.h> | 9 | #include <linux/blkdev.h> |
10 | #include <linux/iscsi_boot_sysfs.h> | 10 | #include <linux/iscsi_boot_sysfs.h> |
11 | #include <linux/inet.h> | ||
11 | 12 | ||
12 | #include <scsi/scsi_tcq.h> | 13 | #include <scsi/scsi_tcq.h> |
13 | #include <scsi/scsicam.h> | 14 | #include <scsi/scsicam.h> |
@@ -31,6 +32,13 @@ static struct kmem_cache *srb_cachep; | |||
31 | /* | 32 | /* |
32 | * Module parameter information and variables | 33 | * Module parameter information and variables |
33 | */ | 34 | */ |
35 | int ql4xdisablesysfsboot = 1; | ||
36 | module_param(ql4xdisablesysfsboot, int, S_IRUGO | S_IWUSR); | ||
37 | MODULE_PARM_DESC(ql4xdisablesysfsboot, | ||
38 | "Set to disable exporting boot targets to sysfs\n" | ||
39 | " 0 - Export boot targets\n" | ||
40 | " 1 - Do not export boot targets (Default)"); | ||
41 | |||
34 | int ql4xdontresethba = 0; | 42 | int ql4xdontresethba = 0; |
35 | module_param(ql4xdontresethba, int, S_IRUGO | S_IWUSR); | 43 | module_param(ql4xdontresethba, int, S_IRUGO | S_IWUSR); |
36 | MODULE_PARM_DESC(ql4xdontresethba, | 44 | MODULE_PARM_DESC(ql4xdontresethba, |
@@ -63,7 +71,7 @@ static int ql4xsess_recovery_tmo = QL4_SESS_RECOVERY_TMO; | |||
63 | module_param(ql4xsess_recovery_tmo, int, S_IRUGO); | 71 | module_param(ql4xsess_recovery_tmo, int, S_IRUGO); |
64 | MODULE_PARM_DESC(ql4xsess_recovery_tmo, | 72 | MODULE_PARM_DESC(ql4xsess_recovery_tmo, |
65 | "Target Session Recovery Timeout.\n" | 73 | "Target Session Recovery Timeout.\n" |
66 | " Default: 30 sec."); | 74 | " Default: 120 sec."); |
67 | 75 | ||
68 | static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha); | 76 | static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha); |
69 | /* | 77 | /* |
@@ -415,7 +423,7 @@ static int qla4xxx_ep_poll(struct iscsi_endpoint *ep, int timeout_ms) | |||
415 | qla_ep = ep->dd_data; | 423 | qla_ep = ep->dd_data; |
416 | ha = to_qla_host(qla_ep->host); | 424 | ha = to_qla_host(qla_ep->host); |
417 | 425 | ||
418 | if (adapter_up(ha)) | 426 | if (adapter_up(ha) && !test_bit(AF_BUILD_DDB_LIST, &ha->flags)) |
419 | ret = 1; | 427 | ret = 1; |
420 | 428 | ||
421 | return ret; | 429 | return ret; |
@@ -975,6 +983,150 @@ static int qla4xxx_conn_get_param(struct iscsi_cls_conn *cls_conn, | |||
975 | 983 | ||
976 | } | 984 | } |
977 | 985 | ||
986 | int qla4xxx_get_ddb_index(struct scsi_qla_host *ha, uint16_t *ddb_index) | ||
987 | { | ||
988 | uint32_t mbx_sts = 0; | ||
989 | uint16_t tmp_ddb_index; | ||
990 | int ret; | ||
991 | |||
992 | get_ddb_index: | ||
993 | tmp_ddb_index = find_first_zero_bit(ha->ddb_idx_map, MAX_DDB_ENTRIES); | ||
994 | |||
995 | if (tmp_ddb_index >= MAX_DDB_ENTRIES) { | ||
996 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
997 | "Free DDB index not available\n")); | ||
998 | ret = QLA_ERROR; | ||
999 | goto exit_get_ddb_index; | ||
1000 | } | ||
1001 | |||
1002 | if (test_and_set_bit(tmp_ddb_index, ha->ddb_idx_map)) | ||
1003 | goto get_ddb_index; | ||
1004 | |||
1005 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1006 | "Found a free DDB index at %d\n", tmp_ddb_index)); | ||
1007 | ret = qla4xxx_req_ddb_entry(ha, tmp_ddb_index, &mbx_sts); | ||
1008 | if (ret == QLA_ERROR) { | ||
1009 | if (mbx_sts == MBOX_STS_COMMAND_ERROR) { | ||
1010 | ql4_printk(KERN_INFO, ha, | ||
1011 | "DDB index = %d not available trying next\n", | ||
1012 | tmp_ddb_index); | ||
1013 | goto get_ddb_index; | ||
1014 | } | ||
1015 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1016 | "Free FW DDB not available\n")); | ||
1017 | } | ||
1018 | |||
1019 | *ddb_index = tmp_ddb_index; | ||
1020 | |||
1021 | exit_get_ddb_index: | ||
1022 | return ret; | ||
1023 | } | ||
1024 | |||
1025 | static int qla4xxx_match_ipaddress(struct scsi_qla_host *ha, | ||
1026 | struct ddb_entry *ddb_entry, | ||
1027 | char *existing_ipaddr, | ||
1028 | char *user_ipaddr) | ||
1029 | { | ||
1030 | uint8_t dst_ipaddr[IPv6_ADDR_LEN]; | ||
1031 | char formatted_ipaddr[DDB_IPADDR_LEN]; | ||
1032 | int status = QLA_SUCCESS, ret = 0; | ||
1033 | |||
1034 | if (ddb_entry->fw_ddb_entry.options & DDB_OPT_IPV6_DEVICE) { | ||
1035 | ret = in6_pton(user_ipaddr, strlen(user_ipaddr), dst_ipaddr, | ||
1036 | '\0', NULL); | ||
1037 | if (ret == 0) { | ||
1038 | status = QLA_ERROR; | ||
1039 | goto out_match; | ||
1040 | } | ||
1041 | ret = sprintf(formatted_ipaddr, "%pI6", dst_ipaddr); | ||
1042 | } else { | ||
1043 | ret = in4_pton(user_ipaddr, strlen(user_ipaddr), dst_ipaddr, | ||
1044 | '\0', NULL); | ||
1045 | if (ret == 0) { | ||
1046 | status = QLA_ERROR; | ||
1047 | goto out_match; | ||
1048 | } | ||
1049 | ret = sprintf(formatted_ipaddr, "%pI4", dst_ipaddr); | ||
1050 | } | ||
1051 | |||
1052 | if (strcmp(existing_ipaddr, formatted_ipaddr)) | ||
1053 | status = QLA_ERROR; | ||
1054 | |||
1055 | out_match: | ||
1056 | return status; | ||
1057 | } | ||
1058 | |||
1059 | static int qla4xxx_match_fwdb_session(struct scsi_qla_host *ha, | ||
1060 | struct iscsi_cls_conn *cls_conn) | ||
1061 | { | ||
1062 | int idx = 0, max_ddbs, rval; | ||
1063 | struct iscsi_cls_session *cls_sess = iscsi_conn_to_session(cls_conn); | ||
1064 | struct iscsi_session *sess, *existing_sess; | ||
1065 | struct iscsi_conn *conn, *existing_conn; | ||
1066 | struct ddb_entry *ddb_entry; | ||
1067 | |||
1068 | sess = cls_sess->dd_data; | ||
1069 | conn = cls_conn->dd_data; | ||
1070 | |||
1071 | if (sess->targetname == NULL || | ||
1072 | conn->persistent_address == NULL || | ||
1073 | conn->persistent_port == 0) | ||
1074 | return QLA_ERROR; | ||
1075 | |||
1076 | max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : | ||
1077 | MAX_DEV_DB_ENTRIES; | ||
1078 | |||
1079 | for (idx = 0; idx < max_ddbs; idx++) { | ||
1080 | ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); | ||
1081 | if (ddb_entry == NULL) | ||
1082 | continue; | ||
1083 | |||
1084 | if (ddb_entry->ddb_type != FLASH_DDB) | ||
1085 | continue; | ||
1086 | |||
1087 | existing_sess = ddb_entry->sess->dd_data; | ||
1088 | existing_conn = ddb_entry->conn->dd_data; | ||
1089 | |||
1090 | if (existing_sess->targetname == NULL || | ||
1091 | existing_conn->persistent_address == NULL || | ||
1092 | existing_conn->persistent_port == 0) | ||
1093 | continue; | ||
1094 | |||
1095 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1096 | "IQN = %s User IQN = %s\n", | ||
1097 | existing_sess->targetname, | ||
1098 | sess->targetname)); | ||
1099 | |||
1100 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1101 | "IP = %s User IP = %s\n", | ||
1102 | existing_conn->persistent_address, | ||
1103 | conn->persistent_address)); | ||
1104 | |||
1105 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1106 | "Port = %d User Port = %d\n", | ||
1107 | existing_conn->persistent_port, | ||
1108 | conn->persistent_port)); | ||
1109 | |||
1110 | if (strcmp(existing_sess->targetname, sess->targetname)) | ||
1111 | continue; | ||
1112 | rval = qla4xxx_match_ipaddress(ha, ddb_entry, | ||
1113 | existing_conn->persistent_address, | ||
1114 | conn->persistent_address); | ||
1115 | if (rval == QLA_ERROR) | ||
1116 | continue; | ||
1117 | if (existing_conn->persistent_port != conn->persistent_port) | ||
1118 | continue; | ||
1119 | break; | ||
1120 | } | ||
1121 | |||
1122 | if (idx == max_ddbs) | ||
1123 | return QLA_ERROR; | ||
1124 | |||
1125 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1126 | "Match found in fwdb sessions\n")); | ||
1127 | return QLA_SUCCESS; | ||
1128 | } | ||
1129 | |||
978 | static struct iscsi_cls_session * | 1130 | static struct iscsi_cls_session * |
979 | qla4xxx_session_create(struct iscsi_endpoint *ep, | 1131 | qla4xxx_session_create(struct iscsi_endpoint *ep, |
980 | uint16_t cmds_max, uint16_t qdepth, | 1132 | uint16_t cmds_max, uint16_t qdepth, |
@@ -984,8 +1136,7 @@ qla4xxx_session_create(struct iscsi_endpoint *ep, | |||
984 | struct scsi_qla_host *ha; | 1136 | struct scsi_qla_host *ha; |
985 | struct qla_endpoint *qla_ep; | 1137 | struct qla_endpoint *qla_ep; |
986 | struct ddb_entry *ddb_entry; | 1138 | struct ddb_entry *ddb_entry; |
987 | uint32_t ddb_index; | 1139 | uint16_t ddb_index; |
988 | uint32_t mbx_sts = 0; | ||
989 | struct iscsi_session *sess; | 1140 | struct iscsi_session *sess; |
990 | struct sockaddr *dst_addr; | 1141 | struct sockaddr *dst_addr; |
991 | int ret; | 1142 | int ret; |
@@ -1000,32 +1151,9 @@ qla4xxx_session_create(struct iscsi_endpoint *ep, | |||
1000 | dst_addr = (struct sockaddr *)&qla_ep->dst_addr; | 1151 | dst_addr = (struct sockaddr *)&qla_ep->dst_addr; |
1001 | ha = to_qla_host(qla_ep->host); | 1152 | ha = to_qla_host(qla_ep->host); |
1002 | 1153 | ||
1003 | get_ddb_index: | 1154 | ret = qla4xxx_get_ddb_index(ha, &ddb_index); |
1004 | ddb_index = find_first_zero_bit(ha->ddb_idx_map, MAX_DDB_ENTRIES); | 1155 | if (ret == QLA_ERROR) |
1005 | |||
1006 | if (ddb_index >= MAX_DDB_ENTRIES) { | ||
1007 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1008 | "Free DDB index not available\n")); | ||
1009 | return NULL; | ||
1010 | } | ||
1011 | |||
1012 | if (test_and_set_bit(ddb_index, ha->ddb_idx_map)) | ||
1013 | goto get_ddb_index; | ||
1014 | |||
1015 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1016 | "Found a free DDB index at %d\n", ddb_index)); | ||
1017 | ret = qla4xxx_req_ddb_entry(ha, ddb_index, &mbx_sts); | ||
1018 | if (ret == QLA_ERROR) { | ||
1019 | if (mbx_sts == MBOX_STS_COMMAND_ERROR) { | ||
1020 | ql4_printk(KERN_INFO, ha, | ||
1021 | "DDB index = %d not available trying next\n", | ||
1022 | ddb_index); | ||
1023 | goto get_ddb_index; | ||
1024 | } | ||
1025 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
1026 | "Free FW DDB not available\n")); | ||
1027 | return NULL; | 1156 | return NULL; |
1028 | } | ||
1029 | 1157 | ||
1030 | cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport, qla_ep->host, | 1158 | cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport, qla_ep->host, |
1031 | cmds_max, sizeof(struct ddb_entry), | 1159 | cmds_max, sizeof(struct ddb_entry), |
@@ -1040,6 +1168,8 @@ get_ddb_index: | |||
1040 | ddb_entry->fw_ddb_device_state = DDB_DS_NO_CONNECTION_ACTIVE; | 1168 | ddb_entry->fw_ddb_device_state = DDB_DS_NO_CONNECTION_ACTIVE; |
1041 | ddb_entry->ha = ha; | 1169 | ddb_entry->ha = ha; |
1042 | ddb_entry->sess = cls_sess; | 1170 | ddb_entry->sess = cls_sess; |
1171 | ddb_entry->unblock_sess = qla4xxx_unblock_ddb; | ||
1172 | ddb_entry->ddb_change = qla4xxx_ddb_change; | ||
1043 | cls_sess->recovery_tmo = ql4xsess_recovery_tmo; | 1173 | cls_sess->recovery_tmo = ql4xsess_recovery_tmo; |
1044 | ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry; | 1174 | ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry; |
1045 | ha->tot_ddbs++; | 1175 | ha->tot_ddbs++; |
@@ -1077,6 +1207,9 @@ qla4xxx_conn_create(struct iscsi_cls_session *cls_sess, uint32_t conn_idx) | |||
1077 | DEBUG2(printk(KERN_INFO "Func: %s\n", __func__)); | 1207 | DEBUG2(printk(KERN_INFO "Func: %s\n", __func__)); |
1078 | cls_conn = iscsi_conn_setup(cls_sess, sizeof(struct qla_conn), | 1208 | cls_conn = iscsi_conn_setup(cls_sess, sizeof(struct qla_conn), |
1079 | conn_idx); | 1209 | conn_idx); |
1210 | if (!cls_conn) | ||
1211 | return NULL; | ||
1212 | |||
1080 | sess = cls_sess->dd_data; | 1213 | sess = cls_sess->dd_data; |
1081 | ddb_entry = sess->dd_data; | 1214 | ddb_entry = sess->dd_data; |
1082 | ddb_entry->conn = cls_conn; | 1215 | ddb_entry->conn = cls_conn; |
@@ -1109,7 +1242,7 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn) | |||
1109 | struct iscsi_session *sess; | 1242 | struct iscsi_session *sess; |
1110 | struct ddb_entry *ddb_entry; | 1243 | struct ddb_entry *ddb_entry; |
1111 | struct scsi_qla_host *ha; | 1244 | struct scsi_qla_host *ha; |
1112 | struct dev_db_entry *fw_ddb_entry; | 1245 | struct dev_db_entry *fw_ddb_entry = NULL; |
1113 | dma_addr_t fw_ddb_entry_dma; | 1246 | dma_addr_t fw_ddb_entry_dma; |
1114 | uint32_t mbx_sts = 0; | 1247 | uint32_t mbx_sts = 0; |
1115 | int ret = 0; | 1248 | int ret = 0; |
@@ -1120,12 +1253,25 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn) | |||
1120 | ddb_entry = sess->dd_data; | 1253 | ddb_entry = sess->dd_data; |
1121 | ha = ddb_entry->ha; | 1254 | ha = ddb_entry->ha; |
1122 | 1255 | ||
1256 | /* Check if we have matching FW DDB, if yes then do not | ||
1257 | * login to this target. This could cause target to logout previous | ||
1258 | * connection | ||
1259 | */ | ||
1260 | ret = qla4xxx_match_fwdb_session(ha, cls_conn); | ||
1261 | if (ret == QLA_SUCCESS) { | ||
1262 | ql4_printk(KERN_INFO, ha, | ||
1263 | "Session already exist in FW.\n"); | ||
1264 | ret = -EEXIST; | ||
1265 | goto exit_conn_start; | ||
1266 | } | ||
1267 | |||
1123 | fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), | 1268 | fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), |
1124 | &fw_ddb_entry_dma, GFP_KERNEL); | 1269 | &fw_ddb_entry_dma, GFP_KERNEL); |
1125 | if (!fw_ddb_entry) { | 1270 | if (!fw_ddb_entry) { |
1126 | ql4_printk(KERN_ERR, ha, | 1271 | ql4_printk(KERN_ERR, ha, |
1127 | "%s: Unable to allocate dma buffer\n", __func__); | 1272 | "%s: Unable to allocate dma buffer\n", __func__); |
1128 | return -ENOMEM; | 1273 | ret = -ENOMEM; |
1274 | goto exit_conn_start; | ||
1129 | } | 1275 | } |
1130 | 1276 | ||
1131 | ret = qla4xxx_set_param_ddbentry(ha, ddb_entry, cls_conn, &mbx_sts); | 1277 | ret = qla4xxx_set_param_ddbentry(ha, ddb_entry, cls_conn, &mbx_sts); |
@@ -1138,9 +1284,7 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn) | |||
1138 | if (mbx_sts) | 1284 | if (mbx_sts) |
1139 | if (ddb_entry->fw_ddb_device_state == | 1285 | if (ddb_entry->fw_ddb_device_state == |
1140 | DDB_DS_SESSION_ACTIVE) { | 1286 | DDB_DS_SESSION_ACTIVE) { |
1141 | iscsi_conn_start(ddb_entry->conn); | 1287 | ddb_entry->unblock_sess(ddb_entry->sess); |
1142 | iscsi_conn_login_event(ddb_entry->conn, | ||
1143 | ISCSI_CONN_STATE_LOGGED_IN); | ||
1144 | goto exit_set_param; | 1288 | goto exit_set_param; |
1145 | } | 1289 | } |
1146 | 1290 | ||
@@ -1167,8 +1311,9 @@ exit_set_param: | |||
1167 | ret = 0; | 1311 | ret = 0; |
1168 | 1312 | ||
1169 | exit_conn_start: | 1313 | exit_conn_start: |
1170 | dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), | 1314 | if (fw_ddb_entry) |
1171 | fw_ddb_entry, fw_ddb_entry_dma); | 1315 | dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), |
1316 | fw_ddb_entry, fw_ddb_entry_dma); | ||
1172 | return ret; | 1317 | return ret; |
1173 | } | 1318 | } |
1174 | 1319 | ||
@@ -1344,6 +1489,101 @@ static int qla4xxx_task_xmit(struct iscsi_task *task) | |||
1344 | return -ENOSYS; | 1489 | return -ENOSYS; |
1345 | } | 1490 | } |
1346 | 1491 | ||
1492 | static void qla4xxx_copy_fwddb_param(struct scsi_qla_host *ha, | ||
1493 | struct dev_db_entry *fw_ddb_entry, | ||
1494 | struct iscsi_cls_session *cls_sess, | ||
1495 | struct iscsi_cls_conn *cls_conn) | ||
1496 | { | ||
1497 | int buflen = 0; | ||
1498 | struct iscsi_session *sess; | ||
1499 | struct iscsi_conn *conn; | ||
1500 | char ip_addr[DDB_IPADDR_LEN]; | ||
1501 | uint16_t options = 0; | ||
1502 | |||
1503 | sess = cls_sess->dd_data; | ||
1504 | conn = cls_conn->dd_data; | ||
1505 | |||
1506 | conn->max_recv_dlength = BYTE_UNITS * | ||
1507 | le16_to_cpu(fw_ddb_entry->iscsi_max_rcv_data_seg_len); | ||
1508 | |||
1509 | conn->max_xmit_dlength = BYTE_UNITS * | ||
1510 | le16_to_cpu(fw_ddb_entry->iscsi_max_snd_data_seg_len); | ||
1511 | |||
1512 | sess->initial_r2t_en = | ||
1513 | (BIT_10 & le16_to_cpu(fw_ddb_entry->iscsi_options)); | ||
1514 | |||
1515 | sess->max_r2t = le16_to_cpu(fw_ddb_entry->iscsi_max_outsnd_r2t); | ||
1516 | |||
1517 | sess->imm_data_en = (BIT_11 & le16_to_cpu(fw_ddb_entry->iscsi_options)); | ||
1518 | |||
1519 | sess->first_burst = BYTE_UNITS * | ||
1520 | le16_to_cpu(fw_ddb_entry->iscsi_first_burst_len); | ||
1521 | |||
1522 | sess->max_burst = BYTE_UNITS * | ||
1523 | le16_to_cpu(fw_ddb_entry->iscsi_max_burst_len); | ||
1524 | |||
1525 | sess->time2wait = le16_to_cpu(fw_ddb_entry->iscsi_def_time2wait); | ||
1526 | |||
1527 | sess->time2retain = le16_to_cpu(fw_ddb_entry->iscsi_def_time2retain); | ||
1528 | |||
1529 | conn->persistent_port = le16_to_cpu(fw_ddb_entry->port); | ||
1530 | |||
1531 | sess->tpgt = le32_to_cpu(fw_ddb_entry->tgt_portal_grp); | ||
1532 | |||
1533 | options = le16_to_cpu(fw_ddb_entry->options); | ||
1534 | if (options & DDB_OPT_IPV6_DEVICE) | ||
1535 | sprintf(ip_addr, "%pI6", fw_ddb_entry->ip_addr); | ||
1536 | else | ||
1537 | sprintf(ip_addr, "%pI4", fw_ddb_entry->ip_addr); | ||
1538 | |||
1539 | iscsi_set_param(cls_conn, ISCSI_PARAM_TARGET_NAME, | ||
1540 | (char *)fw_ddb_entry->iscsi_name, buflen); | ||
1541 | iscsi_set_param(cls_conn, ISCSI_PARAM_INITIATOR_NAME, | ||
1542 | (char *)ha->name_string, buflen); | ||
1543 | iscsi_set_param(cls_conn, ISCSI_PARAM_PERSISTENT_ADDRESS, | ||
1544 | (char *)ip_addr, buflen); | ||
1545 | } | ||
1546 | |||
1547 | void qla4xxx_update_session_conn_fwddb_param(struct scsi_qla_host *ha, | ||
1548 | struct ddb_entry *ddb_entry) | ||
1549 | { | ||
1550 | struct iscsi_cls_session *cls_sess; | ||
1551 | struct iscsi_cls_conn *cls_conn; | ||
1552 | uint32_t ddb_state; | ||
1553 | dma_addr_t fw_ddb_entry_dma; | ||
1554 | struct dev_db_entry *fw_ddb_entry; | ||
1555 | |||
1556 | fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), | ||
1557 | &fw_ddb_entry_dma, GFP_KERNEL); | ||
1558 | if (!fw_ddb_entry) { | ||
1559 | ql4_printk(KERN_ERR, ha, | ||
1560 | "%s: Unable to allocate dma buffer\n", __func__); | ||
1561 | goto exit_session_conn_fwddb_param; | ||
1562 | } | ||
1563 | |||
1564 | if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry, | ||
1565 | fw_ddb_entry_dma, NULL, NULL, &ddb_state, | ||
1566 | NULL, NULL, NULL) == QLA_ERROR) { | ||
1567 | DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed " | ||
1568 | "get_ddb_entry for fw_ddb_index %d\n", | ||
1569 | ha->host_no, __func__, | ||
1570 | ddb_entry->fw_ddb_index)); | ||
1571 | goto exit_session_conn_fwddb_param; | ||
1572 | } | ||
1573 | |||
1574 | cls_sess = ddb_entry->sess; | ||
1575 | |||
1576 | cls_conn = ddb_entry->conn; | ||
1577 | |||
1578 | /* Update params */ | ||
1579 | qla4xxx_copy_fwddb_param(ha, fw_ddb_entry, cls_sess, cls_conn); | ||
1580 | |||
1581 | exit_session_conn_fwddb_param: | ||
1582 | if (fw_ddb_entry) | ||
1583 | dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), | ||
1584 | fw_ddb_entry, fw_ddb_entry_dma); | ||
1585 | } | ||
1586 | |||
1347 | void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, | 1587 | void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, |
1348 | struct ddb_entry *ddb_entry) | 1588 | struct ddb_entry *ddb_entry) |
1349 | { | 1589 | { |
@@ -1360,7 +1600,7 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, | |||
1360 | if (!fw_ddb_entry) { | 1600 | if (!fw_ddb_entry) { |
1361 | ql4_printk(KERN_ERR, ha, | 1601 | ql4_printk(KERN_ERR, ha, |
1362 | "%s: Unable to allocate dma buffer\n", __func__); | 1602 | "%s: Unable to allocate dma buffer\n", __func__); |
1363 | return; | 1603 | goto exit_session_conn_param; |
1364 | } | 1604 | } |
1365 | 1605 | ||
1366 | if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry, | 1606 | if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry, |
@@ -1370,7 +1610,7 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, | |||
1370 | "get_ddb_entry for fw_ddb_index %d\n", | 1610 | "get_ddb_entry for fw_ddb_index %d\n", |
1371 | ha->host_no, __func__, | 1611 | ha->host_no, __func__, |
1372 | ddb_entry->fw_ddb_index)); | 1612 | ddb_entry->fw_ddb_index)); |
1373 | return; | 1613 | goto exit_session_conn_param; |
1374 | } | 1614 | } |
1375 | 1615 | ||
1376 | cls_sess = ddb_entry->sess; | 1616 | cls_sess = ddb_entry->sess; |
@@ -1379,6 +1619,12 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, | |||
1379 | cls_conn = ddb_entry->conn; | 1619 | cls_conn = ddb_entry->conn; |
1380 | conn = cls_conn->dd_data; | 1620 | conn = cls_conn->dd_data; |
1381 | 1621 | ||
1622 | /* Update timers after login */ | ||
1623 | ddb_entry->default_relogin_timeout = | ||
1624 | le16_to_cpu(fw_ddb_entry->def_timeout); | ||
1625 | ddb_entry->default_time2wait = | ||
1626 | le16_to_cpu(fw_ddb_entry->iscsi_def_time2wait); | ||
1627 | |||
1382 | /* Update params */ | 1628 | /* Update params */ |
1383 | conn->max_recv_dlength = BYTE_UNITS * | 1629 | conn->max_recv_dlength = BYTE_UNITS * |
1384 | le16_to_cpu(fw_ddb_entry->iscsi_max_rcv_data_seg_len); | 1630 | le16_to_cpu(fw_ddb_entry->iscsi_max_rcv_data_seg_len); |
@@ -1407,6 +1653,11 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, | |||
1407 | 1653 | ||
1408 | memcpy(sess->initiatorname, ha->name_string, | 1654 | memcpy(sess->initiatorname, ha->name_string, |
1409 | min(sizeof(ha->name_string), sizeof(sess->initiatorname))); | 1655 | min(sizeof(ha->name_string), sizeof(sess->initiatorname))); |
1656 | |||
1657 | exit_session_conn_param: | ||
1658 | if (fw_ddb_entry) | ||
1659 | dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), | ||
1660 | fw_ddb_entry, fw_ddb_entry_dma); | ||
1410 | } | 1661 | } |
1411 | 1662 | ||
1412 | /* | 1663 | /* |
@@ -1607,6 +1858,9 @@ static void qla4xxx_mem_free(struct scsi_qla_host *ha) | |||
1607 | vfree(ha->chap_list); | 1858 | vfree(ha->chap_list); |
1608 | ha->chap_list = NULL; | 1859 | ha->chap_list = NULL; |
1609 | 1860 | ||
1861 | if (ha->fw_ddb_dma_pool) | ||
1862 | dma_pool_destroy(ha->fw_ddb_dma_pool); | ||
1863 | |||
1610 | /* release io space registers */ | 1864 | /* release io space registers */ |
1611 | if (is_qla8022(ha)) { | 1865 | if (is_qla8022(ha)) { |
1612 | if (ha->nx_pcibase) | 1866 | if (ha->nx_pcibase) |
@@ -1689,6 +1943,16 @@ static int qla4xxx_mem_alloc(struct scsi_qla_host *ha) | |||
1689 | goto mem_alloc_error_exit; | 1943 | goto mem_alloc_error_exit; |
1690 | } | 1944 | } |
1691 | 1945 | ||
1946 | ha->fw_ddb_dma_pool = dma_pool_create("ql4_fw_ddb", &ha->pdev->dev, | ||
1947 | DDB_DMA_BLOCK_SIZE, 8, 0); | ||
1948 | |||
1949 | if (ha->fw_ddb_dma_pool == NULL) { | ||
1950 | ql4_printk(KERN_WARNING, ha, | ||
1951 | "%s: fw_ddb_dma_pool allocation failed..\n", | ||
1952 | __func__); | ||
1953 | goto mem_alloc_error_exit; | ||
1954 | } | ||
1955 | |||
1692 | return QLA_SUCCESS; | 1956 | return QLA_SUCCESS; |
1693 | 1957 | ||
1694 | mem_alloc_error_exit: | 1958 | mem_alloc_error_exit: |
@@ -1800,6 +2064,60 @@ void qla4_8xxx_watchdog(struct scsi_qla_host *ha) | |||
1800 | } | 2064 | } |
1801 | } | 2065 | } |
1802 | 2066 | ||
2067 | void qla4xxx_check_relogin_flash_ddb(struct iscsi_cls_session *cls_sess) | ||
2068 | { | ||
2069 | struct iscsi_session *sess; | ||
2070 | struct ddb_entry *ddb_entry; | ||
2071 | struct scsi_qla_host *ha; | ||
2072 | |||
2073 | sess = cls_sess->dd_data; | ||
2074 | ddb_entry = sess->dd_data; | ||
2075 | ha = ddb_entry->ha; | ||
2076 | |||
2077 | if (!(ddb_entry->ddb_type == FLASH_DDB)) | ||
2078 | return; | ||
2079 | |||
2080 | if (adapter_up(ha) && !test_bit(DF_RELOGIN, &ddb_entry->flags) && | ||
2081 | !iscsi_is_session_online(cls_sess)) { | ||
2082 | if (atomic_read(&ddb_entry->retry_relogin_timer) != | ||
2083 | INVALID_ENTRY) { | ||
2084 | if (atomic_read(&ddb_entry->retry_relogin_timer) == | ||
2085 | 0) { | ||
2086 | atomic_set(&ddb_entry->retry_relogin_timer, | ||
2087 | INVALID_ENTRY); | ||
2088 | set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); | ||
2089 | set_bit(DF_RELOGIN, &ddb_entry->flags); | ||
2090 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
2091 | "%s: index [%d] login device\n", | ||
2092 | __func__, ddb_entry->fw_ddb_index)); | ||
2093 | } else | ||
2094 | atomic_dec(&ddb_entry->retry_relogin_timer); | ||
2095 | } | ||
2096 | } | ||
2097 | |||
2098 | /* Wait for relogin to timeout */ | ||
2099 | if (atomic_read(&ddb_entry->relogin_timer) && | ||
2100 | (atomic_dec_and_test(&ddb_entry->relogin_timer) != 0)) { | ||
2101 | /* | ||
2102 | * If the relogin times out and the device is | ||
2103 | * still NOT ONLINE then try and relogin again. | ||
2104 | */ | ||
2105 | if (!iscsi_is_session_online(cls_sess)) { | ||
2106 | /* Reset retry relogin timer */ | ||
2107 | atomic_inc(&ddb_entry->relogin_retry_count); | ||
2108 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
2109 | "%s: index[%d] relogin timed out-retrying" | ||
2110 | " relogin (%d), retry (%d)\n", __func__, | ||
2111 | ddb_entry->fw_ddb_index, | ||
2112 | atomic_read(&ddb_entry->relogin_retry_count), | ||
2113 | ddb_entry->default_time2wait + 4)); | ||
2114 | set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); | ||
2115 | atomic_set(&ddb_entry->retry_relogin_timer, | ||
2116 | ddb_entry->default_time2wait + 4); | ||
2117 | } | ||
2118 | } | ||
2119 | } | ||
2120 | |||
1803 | /** | 2121 | /** |
1804 | * qla4xxx_timer - checks every second for work to do. | 2122 | * qla4xxx_timer - checks every second for work to do. |
1805 | * @ha: Pointer to host adapter structure. | 2123 | * @ha: Pointer to host adapter structure. |
@@ -1809,6 +2127,8 @@ static void qla4xxx_timer(struct scsi_qla_host *ha) | |||
1809 | int start_dpc = 0; | 2127 | int start_dpc = 0; |
1810 | uint16_t w; | 2128 | uint16_t w; |
1811 | 2129 | ||
2130 | iscsi_host_for_each_session(ha->host, qla4xxx_check_relogin_flash_ddb); | ||
2131 | |||
1812 | /* If we are in the middle of AER/EEH processing | 2132 | /* If we are in the middle of AER/EEH processing |
1813 | * skip any processing and reschedule the timer | 2133 | * skip any processing and reschedule the timer |
1814 | */ | 2134 | */ |
@@ -2078,7 +2398,12 @@ static void qla4xxx_fail_session(struct iscsi_cls_session *cls_session) | |||
2078 | sess = cls_session->dd_data; | 2398 | sess = cls_session->dd_data; |
2079 | ddb_entry = sess->dd_data; | 2399 | ddb_entry = sess->dd_data; |
2080 | ddb_entry->fw_ddb_device_state = DDB_DS_SESSION_FAILED; | 2400 | ddb_entry->fw_ddb_device_state = DDB_DS_SESSION_FAILED; |
2081 | iscsi_session_failure(cls_session->dd_data, ISCSI_ERR_CONN_FAILED); | 2401 | |
2402 | if (ddb_entry->ddb_type == FLASH_DDB) | ||
2403 | iscsi_block_session(ddb_entry->sess); | ||
2404 | else | ||
2405 | iscsi_session_failure(cls_session->dd_data, | ||
2406 | ISCSI_ERR_CONN_FAILED); | ||
2082 | } | 2407 | } |
2083 | 2408 | ||
2084 | /** | 2409 | /** |
@@ -2163,7 +2488,7 @@ recover_ha_init_adapter: | |||
2163 | 2488 | ||
2164 | /* NOTE: AF_ONLINE flag set upon successful completion of | 2489 | /* NOTE: AF_ONLINE flag set upon successful completion of |
2165 | * qla4xxx_initialize_adapter */ | 2490 | * qla4xxx_initialize_adapter */ |
2166 | status = qla4xxx_initialize_adapter(ha); | 2491 | status = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); |
2167 | } | 2492 | } |
2168 | 2493 | ||
2169 | /* Retry failed adapter initialization, if necessary | 2494 | /* Retry failed adapter initialization, if necessary |
@@ -2245,17 +2570,108 @@ static void qla4xxx_relogin_devices(struct iscsi_cls_session *cls_session) | |||
2245 | iscsi_unblock_session(ddb_entry->sess); | 2570 | iscsi_unblock_session(ddb_entry->sess); |
2246 | } else { | 2571 | } else { |
2247 | /* Trigger relogin */ | 2572 | /* Trigger relogin */ |
2248 | iscsi_session_failure(cls_session->dd_data, | 2573 | if (ddb_entry->ddb_type == FLASH_DDB) { |
2249 | ISCSI_ERR_CONN_FAILED); | 2574 | if (!test_bit(DF_RELOGIN, &ddb_entry->flags)) |
2575 | qla4xxx_arm_relogin_timer(ddb_entry); | ||
2576 | } else | ||
2577 | iscsi_session_failure(cls_session->dd_data, | ||
2578 | ISCSI_ERR_CONN_FAILED); | ||
2250 | } | 2579 | } |
2251 | } | 2580 | } |
2252 | } | 2581 | } |
2253 | 2582 | ||
2583 | int qla4xxx_unblock_flash_ddb(struct iscsi_cls_session *cls_session) | ||
2584 | { | ||
2585 | struct iscsi_session *sess; | ||
2586 | struct ddb_entry *ddb_entry; | ||
2587 | struct scsi_qla_host *ha; | ||
2588 | |||
2589 | sess = cls_session->dd_data; | ||
2590 | ddb_entry = sess->dd_data; | ||
2591 | ha = ddb_entry->ha; | ||
2592 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" | ||
2593 | " unblock session\n", ha->host_no, __func__, | ||
2594 | ddb_entry->fw_ddb_index); | ||
2595 | |||
2596 | iscsi_unblock_session(ddb_entry->sess); | ||
2597 | |||
2598 | /* Start scan target */ | ||
2599 | if (test_bit(AF_ONLINE, &ha->flags)) { | ||
2600 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" | ||
2601 | " start scan\n", ha->host_no, __func__, | ||
2602 | ddb_entry->fw_ddb_index); | ||
2603 | scsi_queue_work(ha->host, &ddb_entry->sess->scan_work); | ||
2604 | } | ||
2605 | return QLA_SUCCESS; | ||
2606 | } | ||
2607 | |||
2608 | int qla4xxx_unblock_ddb(struct iscsi_cls_session *cls_session) | ||
2609 | { | ||
2610 | struct iscsi_session *sess; | ||
2611 | struct ddb_entry *ddb_entry; | ||
2612 | struct scsi_qla_host *ha; | ||
2613 | |||
2614 | sess = cls_session->dd_data; | ||
2615 | ddb_entry = sess->dd_data; | ||
2616 | ha = ddb_entry->ha; | ||
2617 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" | ||
2618 | " unblock user space session\n", ha->host_no, __func__, | ||
2619 | ddb_entry->fw_ddb_index); | ||
2620 | iscsi_conn_start(ddb_entry->conn); | ||
2621 | iscsi_conn_login_event(ddb_entry->conn, | ||
2622 | ISCSI_CONN_STATE_LOGGED_IN); | ||
2623 | |||
2624 | return QLA_SUCCESS; | ||
2625 | } | ||
2626 | |||
2254 | static void qla4xxx_relogin_all_devices(struct scsi_qla_host *ha) | 2627 | static void qla4xxx_relogin_all_devices(struct scsi_qla_host *ha) |
2255 | { | 2628 | { |
2256 | iscsi_host_for_each_session(ha->host, qla4xxx_relogin_devices); | 2629 | iscsi_host_for_each_session(ha->host, qla4xxx_relogin_devices); |
2257 | } | 2630 | } |
2258 | 2631 | ||
2632 | static void qla4xxx_relogin_flash_ddb(struct iscsi_cls_session *cls_sess) | ||
2633 | { | ||
2634 | uint16_t relogin_timer; | ||
2635 | struct iscsi_session *sess; | ||
2636 | struct ddb_entry *ddb_entry; | ||
2637 | struct scsi_qla_host *ha; | ||
2638 | |||
2639 | sess = cls_sess->dd_data; | ||
2640 | ddb_entry = sess->dd_data; | ||
2641 | ha = ddb_entry->ha; | ||
2642 | |||
2643 | relogin_timer = max(ddb_entry->default_relogin_timeout, | ||
2644 | (uint16_t)RELOGIN_TOV); | ||
2645 | atomic_set(&ddb_entry->relogin_timer, relogin_timer); | ||
2646 | |||
2647 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
2648 | "scsi%ld: Relogin index [%d]. TOV=%d\n", ha->host_no, | ||
2649 | ddb_entry->fw_ddb_index, relogin_timer)); | ||
2650 | |||
2651 | qla4xxx_login_flash_ddb(cls_sess); | ||
2652 | } | ||
2653 | |||
2654 | static void qla4xxx_dpc_relogin(struct iscsi_cls_session *cls_sess) | ||
2655 | { | ||
2656 | struct iscsi_session *sess; | ||
2657 | struct ddb_entry *ddb_entry; | ||
2658 | struct scsi_qla_host *ha; | ||
2659 | |||
2660 | sess = cls_sess->dd_data; | ||
2661 | ddb_entry = sess->dd_data; | ||
2662 | ha = ddb_entry->ha; | ||
2663 | |||
2664 | if (!(ddb_entry->ddb_type == FLASH_DDB)) | ||
2665 | return; | ||
2666 | |||
2667 | if (test_and_clear_bit(DF_RELOGIN, &ddb_entry->flags) && | ||
2668 | !iscsi_is_session_online(cls_sess)) { | ||
2669 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
2670 | "relogin issued\n")); | ||
2671 | qla4xxx_relogin_flash_ddb(cls_sess); | ||
2672 | } | ||
2673 | } | ||
2674 | |||
2259 | void qla4xxx_wake_dpc(struct scsi_qla_host *ha) | 2675 | void qla4xxx_wake_dpc(struct scsi_qla_host *ha) |
2260 | { | 2676 | { |
2261 | if (ha->dpc_thread) | 2677 | if (ha->dpc_thread) |
@@ -2356,6 +2772,12 @@ dpc_post_reset_ha: | |||
2356 | if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags)) | 2772 | if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags)) |
2357 | qla4xxx_get_dhcp_ip_address(ha); | 2773 | qla4xxx_get_dhcp_ip_address(ha); |
2358 | 2774 | ||
2775 | /* ---- relogin device? --- */ | ||
2776 | if (adapter_up(ha) && | ||
2777 | test_and_clear_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags)) { | ||
2778 | iscsi_host_for_each_session(ha->host, qla4xxx_dpc_relogin); | ||
2779 | } | ||
2780 | |||
2359 | /* ---- link change? --- */ | 2781 | /* ---- link change? --- */ |
2360 | if (test_and_clear_bit(DPC_LINK_CHANGED, &ha->dpc_flags)) { | 2782 | if (test_and_clear_bit(DPC_LINK_CHANGED, &ha->dpc_flags)) { |
2361 | if (!test_bit(AF_LINK_UP, &ha->flags)) { | 2783 | if (!test_bit(AF_LINK_UP, &ha->flags)) { |
@@ -2368,8 +2790,12 @@ dpc_post_reset_ha: | |||
2368 | * fatal error recovery. Therefore, the driver must | 2790 | * fatal error recovery. Therefore, the driver must |
2369 | * manually relogin to devices when recovering from | 2791 | * manually relogin to devices when recovering from |
2370 | * connection failures, logouts, expired KATO, etc. */ | 2792 | * connection failures, logouts, expired KATO, etc. */ |
2371 | 2793 | if (test_and_clear_bit(AF_BUILD_DDB_LIST, &ha->flags)) { | |
2372 | qla4xxx_relogin_all_devices(ha); | 2794 | qla4xxx_build_ddb_list(ha, ha->is_reset); |
2795 | iscsi_host_for_each_session(ha->host, | ||
2796 | qla4xxx_login_flash_ddb); | ||
2797 | } else | ||
2798 | qla4xxx_relogin_all_devices(ha); | ||
2373 | } | 2799 | } |
2374 | } | 2800 | } |
2375 | } | 2801 | } |
@@ -2867,6 +3293,9 @@ static int get_fw_boot_info(struct scsi_qla_host *ha, uint16_t ddb_index[]) | |||
2867 | " target ID %d\n", __func__, ddb_index[0], | 3293 | " target ID %d\n", __func__, ddb_index[0], |
2868 | ddb_index[1])); | 3294 | ddb_index[1])); |
2869 | 3295 | ||
3296 | ha->pri_ddb_idx = ddb_index[0]; | ||
3297 | ha->sec_ddb_idx = ddb_index[1]; | ||
3298 | |||
2870 | exit_boot_info_free: | 3299 | exit_boot_info_free: |
2871 | dma_free_coherent(&ha->pdev->dev, size, buf, buf_dma); | 3300 | dma_free_coherent(&ha->pdev->dev, size, buf, buf_dma); |
2872 | exit_boot_info: | 3301 | exit_boot_info: |
@@ -3034,6 +3463,9 @@ static int qla4xxx_get_boot_info(struct scsi_qla_host *ha) | |||
3034 | return ret; | 3463 | return ret; |
3035 | } | 3464 | } |
3036 | 3465 | ||
3466 | if (ql4xdisablesysfsboot) | ||
3467 | return QLA_SUCCESS; | ||
3468 | |||
3037 | if (ddb_index[0] == 0xffff) | 3469 | if (ddb_index[0] == 0xffff) |
3038 | goto sec_target; | 3470 | goto sec_target; |
3039 | 3471 | ||
@@ -3066,7 +3498,15 @@ static int qla4xxx_setup_boot_info(struct scsi_qla_host *ha) | |||
3066 | struct iscsi_boot_kobj *boot_kobj; | 3498 | struct iscsi_boot_kobj *boot_kobj; |
3067 | 3499 | ||
3068 | if (qla4xxx_get_boot_info(ha) != QLA_SUCCESS) | 3500 | if (qla4xxx_get_boot_info(ha) != QLA_SUCCESS) |
3069 | return 0; | 3501 | return QLA_ERROR; |
3502 | |||
3503 | if (ql4xdisablesysfsboot) { | ||
3504 | ql4_printk(KERN_INFO, ha, | ||
3505 | "%s: syfsboot disabled - driver will trigger login" | ||
3506 | "and publish session for discovery .\n", __func__); | ||
3507 | return QLA_SUCCESS; | ||
3508 | } | ||
3509 | |||
3070 | 3510 | ||
3071 | ha->boot_kset = iscsi_boot_create_host_kset(ha->host->host_no); | 3511 | ha->boot_kset = iscsi_boot_create_host_kset(ha->host->host_no); |
3072 | if (!ha->boot_kset) | 3512 | if (!ha->boot_kset) |
@@ -3108,7 +3548,7 @@ static int qla4xxx_setup_boot_info(struct scsi_qla_host *ha) | |||
3108 | if (!boot_kobj) | 3548 | if (!boot_kobj) |
3109 | goto put_host; | 3549 | goto put_host; |
3110 | 3550 | ||
3111 | return 0; | 3551 | return QLA_SUCCESS; |
3112 | 3552 | ||
3113 | put_host: | 3553 | put_host: |
3114 | scsi_host_put(ha->host); | 3554 | scsi_host_put(ha->host); |
@@ -3174,9 +3614,507 @@ static void qla4xxx_create_chap_list(struct scsi_qla_host *ha) | |||
3174 | exit_chap_list: | 3614 | exit_chap_list: |
3175 | dma_free_coherent(&ha->pdev->dev, chap_size, | 3615 | dma_free_coherent(&ha->pdev->dev, chap_size, |
3176 | chap_flash_data, chap_dma); | 3616 | chap_flash_data, chap_dma); |
3177 | return; | ||
3178 | } | 3617 | } |
3179 | 3618 | ||
3619 | static void qla4xxx_get_param_ddb(struct ddb_entry *ddb_entry, | ||
3620 | struct ql4_tuple_ddb *tddb) | ||
3621 | { | ||
3622 | struct scsi_qla_host *ha; | ||
3623 | struct iscsi_cls_session *cls_sess; | ||
3624 | struct iscsi_cls_conn *cls_conn; | ||
3625 | struct iscsi_session *sess; | ||
3626 | struct iscsi_conn *conn; | ||
3627 | |||
3628 | DEBUG2(printk(KERN_INFO "Func: %s\n", __func__)); | ||
3629 | ha = ddb_entry->ha; | ||
3630 | cls_sess = ddb_entry->sess; | ||
3631 | sess = cls_sess->dd_data; | ||
3632 | cls_conn = ddb_entry->conn; | ||
3633 | conn = cls_conn->dd_data; | ||
3634 | |||
3635 | tddb->tpgt = sess->tpgt; | ||
3636 | tddb->port = conn->persistent_port; | ||
3637 | strncpy(tddb->iscsi_name, sess->targetname, ISCSI_NAME_SIZE); | ||
3638 | strncpy(tddb->ip_addr, conn->persistent_address, DDB_IPADDR_LEN); | ||
3639 | } | ||
3640 | |||
3641 | static void qla4xxx_convert_param_ddb(struct dev_db_entry *fw_ddb_entry, | ||
3642 | struct ql4_tuple_ddb *tddb) | ||
3643 | { | ||
3644 | uint16_t options = 0; | ||
3645 | |||
3646 | tddb->tpgt = le32_to_cpu(fw_ddb_entry->tgt_portal_grp); | ||
3647 | memcpy(&tddb->iscsi_name[0], &fw_ddb_entry->iscsi_name[0], | ||
3648 | min(sizeof(tddb->iscsi_name), sizeof(fw_ddb_entry->iscsi_name))); | ||
3649 | |||
3650 | options = le16_to_cpu(fw_ddb_entry->options); | ||
3651 | if (options & DDB_OPT_IPV6_DEVICE) | ||
3652 | sprintf(tddb->ip_addr, "%pI6", fw_ddb_entry->ip_addr); | ||
3653 | else | ||
3654 | sprintf(tddb->ip_addr, "%pI4", fw_ddb_entry->ip_addr); | ||
3655 | |||
3656 | tddb->port = le16_to_cpu(fw_ddb_entry->port); | ||
3657 | } | ||
3658 | |||
3659 | static int qla4xxx_compare_tuple_ddb(struct scsi_qla_host *ha, | ||
3660 | struct ql4_tuple_ddb *old_tddb, | ||
3661 | struct ql4_tuple_ddb *new_tddb) | ||
3662 | { | ||
3663 | if (strcmp(old_tddb->iscsi_name, new_tddb->iscsi_name)) | ||
3664 | return QLA_ERROR; | ||
3665 | |||
3666 | if (strcmp(old_tddb->ip_addr, new_tddb->ip_addr)) | ||
3667 | return QLA_ERROR; | ||
3668 | |||
3669 | if (old_tddb->port != new_tddb->port) | ||
3670 | return QLA_ERROR; | ||
3671 | |||
3672 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
3673 | "Match Found, fw[%d,%d,%s,%s], [%d,%d,%s,%s]", | ||
3674 | old_tddb->port, old_tddb->tpgt, old_tddb->ip_addr, | ||
3675 | old_tddb->iscsi_name, new_tddb->port, new_tddb->tpgt, | ||
3676 | new_tddb->ip_addr, new_tddb->iscsi_name)); | ||
3677 | |||
3678 | return QLA_SUCCESS; | ||
3679 | } | ||
3680 | |||
3681 | static int qla4xxx_is_session_exists(struct scsi_qla_host *ha, | ||
3682 | struct dev_db_entry *fw_ddb_entry) | ||
3683 | { | ||
3684 | struct ddb_entry *ddb_entry; | ||
3685 | struct ql4_tuple_ddb *fw_tddb = NULL; | ||
3686 | struct ql4_tuple_ddb *tmp_tddb = NULL; | ||
3687 | int idx; | ||
3688 | int ret = QLA_ERROR; | ||
3689 | |||
3690 | fw_tddb = vzalloc(sizeof(*fw_tddb)); | ||
3691 | if (!fw_tddb) { | ||
3692 | DEBUG2(ql4_printk(KERN_WARNING, ha, | ||
3693 | "Memory Allocation failed.\n")); | ||
3694 | ret = QLA_SUCCESS; | ||
3695 | goto exit_check; | ||
3696 | } | ||
3697 | |||
3698 | tmp_tddb = vzalloc(sizeof(*tmp_tddb)); | ||
3699 | if (!tmp_tddb) { | ||
3700 | DEBUG2(ql4_printk(KERN_WARNING, ha, | ||
3701 | "Memory Allocation failed.\n")); | ||
3702 | ret = QLA_SUCCESS; | ||
3703 | goto exit_check; | ||
3704 | } | ||
3705 | |||
3706 | qla4xxx_convert_param_ddb(fw_ddb_entry, fw_tddb); | ||
3707 | |||
3708 | for (idx = 0; idx < MAX_DDB_ENTRIES; idx++) { | ||
3709 | ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); | ||
3710 | if (ddb_entry == NULL) | ||
3711 | continue; | ||
3712 | |||
3713 | qla4xxx_get_param_ddb(ddb_entry, tmp_tddb); | ||
3714 | if (!qla4xxx_compare_tuple_ddb(ha, fw_tddb, tmp_tddb)) { | ||
3715 | ret = QLA_SUCCESS; /* found */ | ||
3716 | goto exit_check; | ||
3717 | } | ||
3718 | } | ||
3719 | |||
3720 | exit_check: | ||
3721 | if (fw_tddb) | ||
3722 | vfree(fw_tddb); | ||
3723 | if (tmp_tddb) | ||
3724 | vfree(tmp_tddb); | ||
3725 | return ret; | ||
3726 | } | ||
3727 | |||
3728 | static int qla4xxx_is_flash_ddb_exists(struct scsi_qla_host *ha, | ||
3729 | struct list_head *list_nt, | ||
3730 | struct dev_db_entry *fw_ddb_entry) | ||
3731 | { | ||
3732 | struct qla_ddb_index *nt_ddb_idx, *nt_ddb_idx_tmp; | ||
3733 | struct ql4_tuple_ddb *fw_tddb = NULL; | ||
3734 | struct ql4_tuple_ddb *tmp_tddb = NULL; | ||
3735 | int ret = QLA_ERROR; | ||
3736 | |||
3737 | fw_tddb = vzalloc(sizeof(*fw_tddb)); | ||
3738 | if (!fw_tddb) { | ||
3739 | DEBUG2(ql4_printk(KERN_WARNING, ha, | ||
3740 | "Memory Allocation failed.\n")); | ||
3741 | ret = QLA_SUCCESS; | ||
3742 | goto exit_check; | ||
3743 | } | ||
3744 | |||
3745 | tmp_tddb = vzalloc(sizeof(*tmp_tddb)); | ||
3746 | if (!tmp_tddb) { | ||
3747 | DEBUG2(ql4_printk(KERN_WARNING, ha, | ||
3748 | "Memory Allocation failed.\n")); | ||
3749 | ret = QLA_SUCCESS; | ||
3750 | goto exit_check; | ||
3751 | } | ||
3752 | |||
3753 | qla4xxx_convert_param_ddb(fw_ddb_entry, fw_tddb); | ||
3754 | |||
3755 | list_for_each_entry_safe(nt_ddb_idx, nt_ddb_idx_tmp, list_nt, list) { | ||
3756 | qla4xxx_convert_param_ddb(&nt_ddb_idx->fw_ddb, tmp_tddb); | ||
3757 | if (!qla4xxx_compare_tuple_ddb(ha, fw_tddb, tmp_tddb)) { | ||
3758 | ret = QLA_SUCCESS; /* found */ | ||
3759 | goto exit_check; | ||
3760 | } | ||
3761 | } | ||
3762 | |||
3763 | exit_check: | ||
3764 | if (fw_tddb) | ||
3765 | vfree(fw_tddb); | ||
3766 | if (tmp_tddb) | ||
3767 | vfree(tmp_tddb); | ||
3768 | return ret; | ||
3769 | } | ||
3770 | |||
3771 | static void qla4xxx_free_nt_list(struct list_head *list_nt) | ||
3772 | { | ||
3773 | struct qla_ddb_index *nt_ddb_idx, *nt_ddb_idx_tmp; | ||
3774 | |||
3775 | /* Free up the normaltargets list */ | ||
3776 | list_for_each_entry_safe(nt_ddb_idx, nt_ddb_idx_tmp, list_nt, list) { | ||
3777 | list_del_init(&nt_ddb_idx->list); | ||
3778 | vfree(nt_ddb_idx); | ||
3779 | } | ||
3780 | |||
3781 | } | ||
3782 | |||
3783 | static struct iscsi_endpoint *qla4xxx_get_ep_fwdb(struct scsi_qla_host *ha, | ||
3784 | struct dev_db_entry *fw_ddb_entry) | ||
3785 | { | ||
3786 | struct iscsi_endpoint *ep; | ||
3787 | struct sockaddr_in *addr; | ||
3788 | struct sockaddr_in6 *addr6; | ||
3789 | struct sockaddr *dst_addr; | ||
3790 | char *ip; | ||
3791 | |||
3792 | /* TODO: need to destroy on unload iscsi_endpoint*/ | ||
3793 | dst_addr = vmalloc(sizeof(*dst_addr)); | ||
3794 | if (!dst_addr) | ||
3795 | return NULL; | ||
3796 | |||
3797 | if (fw_ddb_entry->options & DDB_OPT_IPV6_DEVICE) { | ||
3798 | dst_addr->sa_family = AF_INET6; | ||
3799 | addr6 = (struct sockaddr_in6 *)dst_addr; | ||
3800 | ip = (char *)&addr6->sin6_addr; | ||
3801 | memcpy(ip, fw_ddb_entry->ip_addr, IPv6_ADDR_LEN); | ||
3802 | addr6->sin6_port = htons(le16_to_cpu(fw_ddb_entry->port)); | ||
3803 | |||
3804 | } else { | ||
3805 | dst_addr->sa_family = AF_INET; | ||
3806 | addr = (struct sockaddr_in *)dst_addr; | ||
3807 | ip = (char *)&addr->sin_addr; | ||
3808 | memcpy(ip, fw_ddb_entry->ip_addr, IP_ADDR_LEN); | ||
3809 | addr->sin_port = htons(le16_to_cpu(fw_ddb_entry->port)); | ||
3810 | } | ||
3811 | |||
3812 | ep = qla4xxx_ep_connect(ha->host, dst_addr, 0); | ||
3813 | vfree(dst_addr); | ||
3814 | return ep; | ||
3815 | } | ||
3816 | |||
3817 | static int qla4xxx_verify_boot_idx(struct scsi_qla_host *ha, uint16_t idx) | ||
3818 | { | ||
3819 | if (ql4xdisablesysfsboot) | ||
3820 | return QLA_SUCCESS; | ||
3821 | if (idx == ha->pri_ddb_idx || idx == ha->sec_ddb_idx) | ||
3822 | return QLA_ERROR; | ||
3823 | return QLA_SUCCESS; | ||
3824 | } | ||
3825 | |||
3826 | static void qla4xxx_setup_flash_ddb_entry(struct scsi_qla_host *ha, | ||
3827 | struct ddb_entry *ddb_entry) | ||
3828 | { | ||
3829 | ddb_entry->ddb_type = FLASH_DDB; | ||
3830 | ddb_entry->fw_ddb_index = INVALID_ENTRY; | ||
3831 | ddb_entry->fw_ddb_device_state = DDB_DS_NO_CONNECTION_ACTIVE; | ||
3832 | ddb_entry->ha = ha; | ||
3833 | ddb_entry->unblock_sess = qla4xxx_unblock_flash_ddb; | ||
3834 | ddb_entry->ddb_change = qla4xxx_flash_ddb_change; | ||
3835 | |||
3836 | atomic_set(&ddb_entry->retry_relogin_timer, INVALID_ENTRY); | ||
3837 | atomic_set(&ddb_entry->relogin_timer, 0); | ||
3838 | atomic_set(&ddb_entry->relogin_retry_count, 0); | ||
3839 | |||
3840 | ddb_entry->default_relogin_timeout = | ||
3841 | le16_to_cpu(ddb_entry->fw_ddb_entry.def_timeout); | ||
3842 | ddb_entry->default_time2wait = | ||
3843 | le16_to_cpu(ddb_entry->fw_ddb_entry.iscsi_def_time2wait); | ||
3844 | } | ||
3845 | |||
3846 | static void qla4xxx_wait_for_ip_configuration(struct scsi_qla_host *ha) | ||
3847 | { | ||
3848 | uint32_t idx = 0; | ||
3849 | uint32_t ip_idx[IP_ADDR_COUNT] = {0, 1, 2, 3}; /* 4 IP interfaces */ | ||
3850 | uint32_t sts[MBOX_REG_COUNT]; | ||
3851 | uint32_t ip_state; | ||
3852 | unsigned long wtime; | ||
3853 | int ret; | ||
3854 | |||
3855 | wtime = jiffies + (HZ * IP_CONFIG_TOV); | ||
3856 | do { | ||
3857 | for (idx = 0; idx < IP_ADDR_COUNT; idx++) { | ||
3858 | if (ip_idx[idx] == -1) | ||
3859 | continue; | ||
3860 | |||
3861 | ret = qla4xxx_get_ip_state(ha, 0, ip_idx[idx], sts); | ||
3862 | |||
3863 | if (ret == QLA_ERROR) { | ||
3864 | ip_idx[idx] = -1; | ||
3865 | continue; | ||
3866 | } | ||
3867 | |||
3868 | ip_state = (sts[1] & IP_STATE_MASK) >> IP_STATE_SHIFT; | ||
3869 | |||
3870 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
3871 | "Waiting for IP state for idx = %d, state = 0x%x\n", | ||
3872 | ip_idx[idx], ip_state)); | ||
3873 | if (ip_state == IP_ADDRSTATE_UNCONFIGURED || | ||
3874 | ip_state == IP_ADDRSTATE_INVALID || | ||
3875 | ip_state == IP_ADDRSTATE_PREFERRED || | ||
3876 | ip_state == IP_ADDRSTATE_DEPRICATED || | ||
3877 | ip_state == IP_ADDRSTATE_DISABLING) | ||
3878 | ip_idx[idx] = -1; | ||
3879 | |||
3880 | } | ||
3881 | |||
3882 | /* Break if all IP states checked */ | ||
3883 | if ((ip_idx[0] == -1) && | ||
3884 | (ip_idx[1] == -1) && | ||
3885 | (ip_idx[2] == -1) && | ||
3886 | (ip_idx[3] == -1)) | ||
3887 | break; | ||
3888 | schedule_timeout_uninterruptible(HZ); | ||
3889 | } while (time_after(wtime, jiffies)); | ||
3890 | } | ||
3891 | |||
3892 | void qla4xxx_build_ddb_list(struct scsi_qla_host *ha, int is_reset) | ||
3893 | { | ||
3894 | int max_ddbs; | ||
3895 | int ret; | ||
3896 | uint32_t idx = 0, next_idx = 0; | ||
3897 | uint32_t state = 0, conn_err = 0; | ||
3898 | uint16_t conn_id; | ||
3899 | struct dev_db_entry *fw_ddb_entry; | ||
3900 | struct ddb_entry *ddb_entry = NULL; | ||
3901 | dma_addr_t fw_ddb_dma; | ||
3902 | struct iscsi_cls_session *cls_sess; | ||
3903 | struct iscsi_session *sess; | ||
3904 | struct iscsi_cls_conn *cls_conn; | ||
3905 | struct iscsi_endpoint *ep; | ||
3906 | uint16_t cmds_max = 32, tmo = 0; | ||
3907 | uint32_t initial_cmdsn = 0; | ||
3908 | struct list_head list_st, list_nt; /* List of sendtargets */ | ||
3909 | struct qla_ddb_index *st_ddb_idx, *st_ddb_idx_tmp; | ||
3910 | int fw_idx_size; | ||
3911 | unsigned long wtime; | ||
3912 | struct qla_ddb_index *nt_ddb_idx; | ||
3913 | |||
3914 | if (!test_bit(AF_LINK_UP, &ha->flags)) { | ||
3915 | set_bit(AF_BUILD_DDB_LIST, &ha->flags); | ||
3916 | ha->is_reset = is_reset; | ||
3917 | return; | ||
3918 | } | ||
3919 | max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : | ||
3920 | MAX_DEV_DB_ENTRIES; | ||
3921 | |||
3922 | fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, | ||
3923 | &fw_ddb_dma); | ||
3924 | if (fw_ddb_entry == NULL) { | ||
3925 | DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n")); | ||
3926 | goto exit_ddb_list; | ||
3927 | } | ||
3928 | |||
3929 | INIT_LIST_HEAD(&list_st); | ||
3930 | INIT_LIST_HEAD(&list_nt); | ||
3931 | fw_idx_size = sizeof(struct qla_ddb_index); | ||
3932 | |||
3933 | for (idx = 0; idx < max_ddbs; idx = next_idx) { | ||
3934 | ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry, | ||
3935 | fw_ddb_dma, NULL, | ||
3936 | &next_idx, &state, &conn_err, | ||
3937 | NULL, &conn_id); | ||
3938 | if (ret == QLA_ERROR) | ||
3939 | break; | ||
3940 | |||
3941 | if (qla4xxx_verify_boot_idx(ha, idx) != QLA_SUCCESS) | ||
3942 | goto continue_next_st; | ||
3943 | |||
3944 | /* Check if ST, add to the list_st */ | ||
3945 | if (strlen((char *) fw_ddb_entry->iscsi_name) != 0) | ||
3946 | goto continue_next_st; | ||
3947 | |||
3948 | st_ddb_idx = vzalloc(fw_idx_size); | ||
3949 | if (!st_ddb_idx) | ||
3950 | break; | ||
3951 | |||
3952 | st_ddb_idx->fw_ddb_idx = idx; | ||
3953 | |||
3954 | list_add_tail(&st_ddb_idx->list, &list_st); | ||
3955 | continue_next_st: | ||
3956 | if (next_idx == 0) | ||
3957 | break; | ||
3958 | } | ||
3959 | |||
3960 | /* Before issuing conn open mbox, ensure all IPs states are configured | ||
3961 | * Note, conn open fails if IPs are not configured | ||
3962 | */ | ||
3963 | qla4xxx_wait_for_ip_configuration(ha); | ||
3964 | |||
3965 | /* Go thru the STs and fire the sendtargets by issuing conn open mbx */ | ||
3966 | list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st, list) { | ||
3967 | qla4xxx_conn_open(ha, st_ddb_idx->fw_ddb_idx); | ||
3968 | } | ||
3969 | |||
3970 | /* Wait to ensure all sendtargets are done for min 12 sec wait */ | ||
3971 | tmo = ((ha->def_timeout < LOGIN_TOV) ? LOGIN_TOV : ha->def_timeout); | ||
3972 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
3973 | "Default time to wait for build ddb %d\n", tmo)); | ||
3974 | |||
3975 | wtime = jiffies + (HZ * tmo); | ||
3976 | do { | ||
3977 | list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st, | ||
3978 | list) { | ||
3979 | ret = qla4xxx_get_fwddb_entry(ha, | ||
3980 | st_ddb_idx->fw_ddb_idx, | ||
3981 | NULL, 0, NULL, &next_idx, | ||
3982 | &state, &conn_err, NULL, | ||
3983 | NULL); | ||
3984 | if (ret == QLA_ERROR) | ||
3985 | continue; | ||
3986 | |||
3987 | if (state == DDB_DS_NO_CONNECTION_ACTIVE || | ||
3988 | state == DDB_DS_SESSION_FAILED) { | ||
3989 | list_del_init(&st_ddb_idx->list); | ||
3990 | vfree(st_ddb_idx); | ||
3991 | } | ||
3992 | } | ||
3993 | schedule_timeout_uninterruptible(HZ / 10); | ||
3994 | } while (time_after(wtime, jiffies)); | ||
3995 | |||
3996 | /* Free up the sendtargets list */ | ||
3997 | list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st, list) { | ||
3998 | list_del_init(&st_ddb_idx->list); | ||
3999 | vfree(st_ddb_idx); | ||
4000 | } | ||
4001 | |||
4002 | for (idx = 0; idx < max_ddbs; idx = next_idx) { | ||
4003 | ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry, | ||
4004 | fw_ddb_dma, NULL, | ||
4005 | &next_idx, &state, &conn_err, | ||
4006 | NULL, &conn_id); | ||
4007 | if (ret == QLA_ERROR) | ||
4008 | break; | ||
4009 | |||
4010 | if (qla4xxx_verify_boot_idx(ha, idx) != QLA_SUCCESS) | ||
4011 | goto continue_next_nt; | ||
4012 | |||
4013 | /* Check if NT, then add to list it */ | ||
4014 | if (strlen((char *) fw_ddb_entry->iscsi_name) == 0) | ||
4015 | goto continue_next_nt; | ||
4016 | |||
4017 | if (state == DDB_DS_NO_CONNECTION_ACTIVE || | ||
4018 | state == DDB_DS_SESSION_FAILED) { | ||
4019 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
4020 | "Adding DDB to session = 0x%x\n", | ||
4021 | idx)); | ||
4022 | if (is_reset == INIT_ADAPTER) { | ||
4023 | nt_ddb_idx = vmalloc(fw_idx_size); | ||
4024 | if (!nt_ddb_idx) | ||
4025 | break; | ||
4026 | |||
4027 | nt_ddb_idx->fw_ddb_idx = idx; | ||
4028 | |||
4029 | memcpy(&nt_ddb_idx->fw_ddb, fw_ddb_entry, | ||
4030 | sizeof(struct dev_db_entry)); | ||
4031 | |||
4032 | if (qla4xxx_is_flash_ddb_exists(ha, &list_nt, | ||
4033 | fw_ddb_entry) == QLA_SUCCESS) { | ||
4034 | vfree(nt_ddb_idx); | ||
4035 | goto continue_next_nt; | ||
4036 | } | ||
4037 | list_add_tail(&nt_ddb_idx->list, &list_nt); | ||
4038 | } else if (is_reset == RESET_ADAPTER) { | ||
4039 | if (qla4xxx_is_session_exists(ha, | ||
4040 | fw_ddb_entry) == QLA_SUCCESS) | ||
4041 | goto continue_next_nt; | ||
4042 | } | ||
4043 | |||
4044 | /* Create session object, with INVALID_ENTRY, | ||
4045 | * the targer_id would get set when we issue the login | ||
4046 | */ | ||
4047 | cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport, | ||
4048 | ha->host, cmds_max, | ||
4049 | sizeof(struct ddb_entry), | ||
4050 | sizeof(struct ql4_task_data), | ||
4051 | initial_cmdsn, INVALID_ENTRY); | ||
4052 | if (!cls_sess) | ||
4053 | goto exit_ddb_list; | ||
4054 | |||
4055 | /* | ||
4056 | * iscsi_session_setup increments the driver reference | ||
4057 | * count which wouldn't let the driver to be unloaded. | ||
4058 | * so calling module_put function to decrement the | ||
4059 | * reference count. | ||
4060 | **/ | ||
4061 | module_put(qla4xxx_iscsi_transport.owner); | ||
4062 | sess = cls_sess->dd_data; | ||
4063 | ddb_entry = sess->dd_data; | ||
4064 | ddb_entry->sess = cls_sess; | ||
4065 | |||
4066 | cls_sess->recovery_tmo = ql4xsess_recovery_tmo; | ||
4067 | memcpy(&ddb_entry->fw_ddb_entry, fw_ddb_entry, | ||
4068 | sizeof(struct dev_db_entry)); | ||
4069 | |||
4070 | qla4xxx_setup_flash_ddb_entry(ha, ddb_entry); | ||
4071 | |||
4072 | cls_conn = iscsi_conn_setup(cls_sess, | ||
4073 | sizeof(struct qla_conn), | ||
4074 | conn_id); | ||
4075 | if (!cls_conn) | ||
4076 | goto exit_ddb_list; | ||
4077 | |||
4078 | ddb_entry->conn = cls_conn; | ||
4079 | |||
4080 | /* Setup ep, for displaying attributes in sysfs */ | ||
4081 | ep = qla4xxx_get_ep_fwdb(ha, fw_ddb_entry); | ||
4082 | if (ep) { | ||
4083 | ep->conn = cls_conn; | ||
4084 | cls_conn->ep = ep; | ||
4085 | } else { | ||
4086 | DEBUG2(ql4_printk(KERN_ERR, ha, | ||
4087 | "Unable to get ep\n")); | ||
4088 | } | ||
4089 | |||
4090 | /* Update sess/conn params */ | ||
4091 | qla4xxx_copy_fwddb_param(ha, fw_ddb_entry, cls_sess, | ||
4092 | cls_conn); | ||
4093 | |||
4094 | if (is_reset == RESET_ADAPTER) { | ||
4095 | iscsi_block_session(cls_sess); | ||
4096 | /* Use the relogin path to discover new devices | ||
4097 | * by short-circuting the logic of setting | ||
4098 | * timer to relogin - instead set the flags | ||
4099 | * to initiate login right away. | ||
4100 | */ | ||
4101 | set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); | ||
4102 | set_bit(DF_RELOGIN, &ddb_entry->flags); | ||
4103 | } | ||
4104 | } | ||
4105 | continue_next_nt: | ||
4106 | if (next_idx == 0) | ||
4107 | break; | ||
4108 | } | ||
4109 | exit_ddb_list: | ||
4110 | qla4xxx_free_nt_list(&list_nt); | ||
4111 | if (fw_ddb_entry) | ||
4112 | dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); | ||
4113 | |||
4114 | qla4xxx_free_ddb_index(ha); | ||
4115 | } | ||
4116 | |||
4117 | |||
3180 | /** | 4118 | /** |
3181 | * qla4xxx_probe_adapter - callback function to probe HBA | 4119 | * qla4xxx_probe_adapter - callback function to probe HBA |
3182 | * @pdev: pointer to pci_dev structure | 4120 | * @pdev: pointer to pci_dev structure |
@@ -3298,7 +4236,7 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev, | |||
3298 | * firmware | 4236 | * firmware |
3299 | * NOTE: interrupts enabled upon successful completion | 4237 | * NOTE: interrupts enabled upon successful completion |
3300 | */ | 4238 | */ |
3301 | status = qla4xxx_initialize_adapter(ha); | 4239 | status = qla4xxx_initialize_adapter(ha, INIT_ADAPTER); |
3302 | while ((!test_bit(AF_ONLINE, &ha->flags)) && | 4240 | while ((!test_bit(AF_ONLINE, &ha->flags)) && |
3303 | init_retry_count++ < MAX_INIT_RETRIES) { | 4241 | init_retry_count++ < MAX_INIT_RETRIES) { |
3304 | 4242 | ||
@@ -3319,7 +4257,7 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev, | |||
3319 | if (ha->isp_ops->reset_chip(ha) == QLA_ERROR) | 4257 | if (ha->isp_ops->reset_chip(ha) == QLA_ERROR) |
3320 | continue; | 4258 | continue; |
3321 | 4259 | ||
3322 | status = qla4xxx_initialize_adapter(ha); | 4260 | status = qla4xxx_initialize_adapter(ha, INIT_ADAPTER); |
3323 | } | 4261 | } |
3324 | 4262 | ||
3325 | if (!test_bit(AF_ONLINE, &ha->flags)) { | 4263 | if (!test_bit(AF_ONLINE, &ha->flags)) { |
@@ -3386,12 +4324,16 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev, | |||
3386 | ha->host_no, ha->firmware_version[0], ha->firmware_version[1], | 4324 | ha->host_no, ha->firmware_version[0], ha->firmware_version[1], |
3387 | ha->patch_number, ha->build_number); | 4325 | ha->patch_number, ha->build_number); |
3388 | 4326 | ||
3389 | qla4xxx_create_chap_list(ha); | ||
3390 | |||
3391 | if (qla4xxx_setup_boot_info(ha)) | 4327 | if (qla4xxx_setup_boot_info(ha)) |
3392 | ql4_printk(KERN_ERR, ha, "%s:ISCSI boot info setup failed\n", | 4328 | ql4_printk(KERN_ERR, ha, "%s:ISCSI boot info setup failed\n", |
3393 | __func__); | 4329 | __func__); |
3394 | 4330 | ||
4331 | /* Perform the build ddb list and login to each */ | ||
4332 | qla4xxx_build_ddb_list(ha, INIT_ADAPTER); | ||
4333 | iscsi_host_for_each_session(ha->host, qla4xxx_login_flash_ddb); | ||
4334 | |||
4335 | qla4xxx_create_chap_list(ha); | ||
4336 | |||
3395 | qla4xxx_create_ifaces(ha); | 4337 | qla4xxx_create_ifaces(ha); |
3396 | return 0; | 4338 | return 0; |
3397 | 4339 | ||
@@ -3449,6 +4391,38 @@ static void qla4xxx_prevent_other_port_reinit(struct scsi_qla_host *ha) | |||
3449 | } | 4391 | } |
3450 | } | 4392 | } |
3451 | 4393 | ||
4394 | static void qla4xxx_destroy_fw_ddb_session(struct scsi_qla_host *ha) | ||
4395 | { | ||
4396 | struct ddb_entry *ddb_entry; | ||
4397 | int options; | ||
4398 | int idx; | ||
4399 | |||
4400 | for (idx = 0; idx < MAX_DDB_ENTRIES; idx++) { | ||
4401 | |||
4402 | ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); | ||
4403 | if ((ddb_entry != NULL) && | ||
4404 | (ddb_entry->ddb_type == FLASH_DDB)) { | ||
4405 | |||
4406 | options = LOGOUT_OPTION_CLOSE_SESSION; | ||
4407 | if (qla4xxx_session_logout_ddb(ha, ddb_entry, options) | ||
4408 | == QLA_ERROR) | ||
4409 | ql4_printk(KERN_ERR, ha, "%s: Logout failed\n", | ||
4410 | __func__); | ||
4411 | |||
4412 | qla4xxx_clear_ddb_entry(ha, ddb_entry->fw_ddb_index); | ||
4413 | /* | ||
4414 | * we have decremented the reference count of the driver | ||
4415 | * when we setup the session to have the driver unload | ||
4416 | * to be seamless without actually destroying the | ||
4417 | * session | ||
4418 | **/ | ||
4419 | try_module_get(qla4xxx_iscsi_transport.owner); | ||
4420 | iscsi_destroy_endpoint(ddb_entry->conn->ep); | ||
4421 | qla4xxx_free_ddb(ha, ddb_entry); | ||
4422 | iscsi_session_teardown(ddb_entry->sess); | ||
4423 | } | ||
4424 | } | ||
4425 | } | ||
3452 | /** | 4426 | /** |
3453 | * qla4xxx_remove_adapter - calback function to remove adapter. | 4427 | * qla4xxx_remove_adapter - calback function to remove adapter. |
3454 | * @pci_dev: PCI device pointer | 4428 | * @pci_dev: PCI device pointer |
@@ -3465,9 +4439,11 @@ static void __devexit qla4xxx_remove_adapter(struct pci_dev *pdev) | |||
3465 | /* destroy iface from sysfs */ | 4439 | /* destroy iface from sysfs */ |
3466 | qla4xxx_destroy_ifaces(ha); | 4440 | qla4xxx_destroy_ifaces(ha); |
3467 | 4441 | ||
3468 | if (ha->boot_kset) | 4442 | if ((!ql4xdisablesysfsboot) && ha->boot_kset) |
3469 | iscsi_boot_destroy_kset(ha->boot_kset); | 4443 | iscsi_boot_destroy_kset(ha->boot_kset); |
3470 | 4444 | ||
4445 | qla4xxx_destroy_fw_ddb_session(ha); | ||
4446 | |||
3471 | scsi_remove_host(ha->host); | 4447 | scsi_remove_host(ha->host); |
3472 | 4448 | ||
3473 | qla4xxx_free_adapter(ha); | 4449 | qla4xxx_free_adapter(ha); |
@@ -4115,7 +5091,7 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha) | |||
4115 | 5091 | ||
4116 | qla4_8xxx_idc_unlock(ha); | 5092 | qla4_8xxx_idc_unlock(ha); |
4117 | clear_bit(AF_FW_RECOVERY, &ha->flags); | 5093 | clear_bit(AF_FW_RECOVERY, &ha->flags); |
4118 | rval = qla4xxx_initialize_adapter(ha); | 5094 | rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); |
4119 | qla4_8xxx_idc_lock(ha); | 5095 | qla4_8xxx_idc_lock(ha); |
4120 | 5096 | ||
4121 | if (rval != QLA_SUCCESS) { | 5097 | if (rval != QLA_SUCCESS) { |
@@ -4151,7 +5127,7 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha) | |||
4151 | if ((qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == | 5127 | if ((qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == |
4152 | QLA82XX_DEV_READY)) { | 5128 | QLA82XX_DEV_READY)) { |
4153 | clear_bit(AF_FW_RECOVERY, &ha->flags); | 5129 | clear_bit(AF_FW_RECOVERY, &ha->flags); |
4154 | rval = qla4xxx_initialize_adapter(ha); | 5130 | rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); |
4155 | if (rval == QLA_SUCCESS) { | 5131 | if (rval == QLA_SUCCESS) { |
4156 | ret = qla4xxx_request_irqs(ha); | 5132 | ret = qla4xxx_request_irqs(ha); |
4157 | if (ret) { | 5133 | if (ret) { |
diff --git a/drivers/scsi/qla4xxx/ql4_version.h b/drivers/scsi/qla4xxx/ql4_version.h index c15347d3f532..5254e57968f5 100644 --- a/drivers/scsi/qla4xxx/ql4_version.h +++ b/drivers/scsi/qla4xxx/ql4_version.h | |||
@@ -5,4 +5,4 @@ | |||
5 | * See LICENSE.qla4xxx for copyright and licensing details. | 5 | * See LICENSE.qla4xxx for copyright and licensing details. |
6 | */ | 6 | */ |
7 | 7 | ||
8 | #define QLA4XXX_DRIVER_VERSION "5.02.00-k8" | 8 | #define QLA4XXX_DRIVER_VERSION "5.02.00-k9" |
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 019a7163572f..dcf7e1006426 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c | |||
@@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) | |||
971 | struct s3c64xx_spi_info *sci; | 971 | struct s3c64xx_spi_info *sci; |
972 | struct spi_master *master; | 972 | struct spi_master *master; |
973 | int ret; | 973 | int ret; |
974 | char clk_name[16]; | ||
974 | 975 | ||
975 | if (pdev->id < 0) { | 976 | if (pdev->id < 0) { |
976 | dev_err(&pdev->dev, | 977 | dev_err(&pdev->dev, |
@@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) | |||
984 | } | 985 | } |
985 | 986 | ||
986 | sci = pdev->dev.platform_data; | 987 | sci = pdev->dev.platform_data; |
987 | if (!sci->src_clk_name) { | ||
988 | dev_err(&pdev->dev, | ||
989 | "Board init must call s3c64xx_spi_set_info()\n"); | ||
990 | return -EINVAL; | ||
991 | } | ||
992 | 988 | ||
993 | /* Check for availability of necessary resource */ | 989 | /* Check for availability of necessary resource */ |
994 | 990 | ||
@@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) | |||
1073 | goto err4; | 1069 | goto err4; |
1074 | } | 1070 | } |
1075 | 1071 | ||
1076 | sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name); | 1072 | sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr); |
1073 | sdd->src_clk = clk_get(&pdev->dev, clk_name); | ||
1077 | if (IS_ERR(sdd->src_clk)) { | 1074 | if (IS_ERR(sdd->src_clk)) { |
1078 | dev_err(&pdev->dev, | 1075 | dev_err(&pdev->dev, |
1079 | "Unable to acquire clock '%s'\n", sci->src_clk_name); | 1076 | "Unable to acquire clock '%s'\n", clk_name); |
1080 | ret = PTR_ERR(sdd->src_clk); | 1077 | ret = PTR_ERR(sdd->src_clk); |
1081 | goto err5; | 1078 | goto err5; |
1082 | } | 1079 | } |
1083 | 1080 | ||
1084 | if (clk_enable(sdd->src_clk)) { | 1081 | if (clk_enable(sdd->src_clk)) { |
1085 | dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", | 1082 | dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name); |
1086 | sci->src_clk_name); | ||
1087 | ret = -EBUSY; | 1083 | ret = -EBUSY; |
1088 | goto err6; | 1084 | goto err6; |
1089 | } | 1085 | } |
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 925a1e547a83..fb89b85d0d81 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig | |||
@@ -457,7 +457,7 @@ config SERIAL_SAMSUNG | |||
457 | config SERIAL_SAMSUNG_UARTS_4 | 457 | config SERIAL_SAMSUNG_UARTS_4 |
458 | bool | 458 | bool |
459 | depends on ARM && PLAT_SAMSUNG | 459 | depends on ARM && PLAT_SAMSUNG |
460 | default y if CPU_S3C2443 | 460 | default y if !(CPU_S3C2410 || SERIAL_S3C2412 || CPU_S3C2440 || CPU_S3C2442) |
461 | help | 461 | help |
462 | Internal node for the common case of 4 Samsung compatible UARTs | 462 | Internal node for the common case of 4 Samsung compatible UARTs |
463 | 463 | ||
@@ -465,7 +465,7 @@ config SERIAL_SAMSUNG_UARTS | |||
465 | int | 465 | int |
466 | depends on ARM && PLAT_SAMSUNG | 466 | depends on ARM && PLAT_SAMSUNG |
467 | default 6 if ARCH_S5P6450 | 467 | default 6 if ARCH_S5P6450 |
468 | default 4 if SERIAL_SAMSUNG_UARTS_4 | 468 | default 4 if SERIAL_SAMSUNG_UARTS_4 || CPU_S3C2416 |
469 | default 3 | 469 | default 3 |
470 | help | 470 | help |
471 | Select the number of available UART ports for the Samsung S3C | 471 | Select the number of available UART ports for the Samsung S3C |
@@ -495,47 +495,6 @@ config SERIAL_SAMSUNG_CONSOLE | |||
495 | your boot loader about how to pass options to the kernel at | 495 | your boot loader about how to pass options to the kernel at |
496 | boot time.) | 496 | boot time.) |
497 | 497 | ||
498 | config SERIAL_S3C2410 | ||
499 | tristate "Samsung S3C2410 Serial port support" | ||
500 | depends on SERIAL_SAMSUNG && CPU_S3C2410 | ||
501 | default y if CPU_S3C2410 | ||
502 | help | ||
503 | Serial port support for the Samsung S3C2410 SoC | ||
504 | |||
505 | config SERIAL_S3C2412 | ||
506 | tristate "Samsung S3C2412/S3C2413 Serial port support" | ||
507 | depends on SERIAL_SAMSUNG && CPU_S3C2412 | ||
508 | default y if CPU_S3C2412 | ||
509 | help | ||
510 | Serial port support for the Samsung S3C2412 and S3C2413 SoC | ||
511 | |||
512 | config SERIAL_S3C2440 | ||
513 | tristate "Samsung S3C2440/S3C2442/S3C2416 Serial port support" | ||
514 | depends on SERIAL_SAMSUNG && (CPU_S3C2440 || CPU_S3C2442 || CPU_S3C2416) | ||
515 | default y if CPU_S3C2440 | ||
516 | default y if CPU_S3C2442 | ||
517 | select SERIAL_SAMSUNG_UARTS_4 if CPU_S3C2416 | ||
518 | help | ||
519 | Serial port support for the Samsung S3C2440, S3C2416 and S3C2442 SoC | ||
520 | |||
521 | config SERIAL_S3C6400 | ||
522 | tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support" | ||
523 | depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100) | ||
524 | select SERIAL_SAMSUNG_UARTS_4 | ||
525 | default y | ||
526 | help | ||
527 | Serial port support for the Samsung S3C6400, S3C6410, S5P6440, S5P6450 | ||
528 | and S5PC100 SoCs | ||
529 | |||
530 | config SERIAL_S5PV210 | ||
531 | tristate "Samsung S5PV210 Serial port support" | ||
532 | depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_EXYNOS4210 || SOC_EXYNOS4212) | ||
533 | select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_EXYNOS4210 || SOC_EXYNOS4212) | ||
534 | default y | ||
535 | help | ||
536 | Serial port support for Samsung's S5P Family of SoC's | ||
537 | |||
538 | |||
539 | config SERIAL_MAX3100 | 498 | config SERIAL_MAX3100 |
540 | tristate "MAX3100 support" | 499 | tristate "MAX3100 support" |
541 | depends on SPI | 500 | depends on SPI |
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile index e10cf5b54b6d..84bc2e5a57be 100644 --- a/drivers/tty/serial/Makefile +++ b/drivers/tty/serial/Makefile | |||
@@ -39,11 +39,6 @@ obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o | |||
39 | obj-$(CONFIG_SERIAL_BFIN) += bfin_uart.o | 39 | obj-$(CONFIG_SERIAL_BFIN) += bfin_uart.o |
40 | obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o | 40 | obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o |
41 | obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o | 41 | obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o |
42 | obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o | ||
43 | obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o | ||
44 | obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o | ||
45 | obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o | ||
46 | obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o | ||
47 | obj-$(CONFIG_SERIAL_MAX3100) += max3100.o | 42 | obj-$(CONFIG_SERIAL_MAX3100) += max3100.o |
48 | obj-$(CONFIG_SERIAL_MAX3107) += max3107.o | 43 | obj-$(CONFIG_SERIAL_MAX3107) += max3107.o |
49 | obj-$(CONFIG_SERIAL_MAX3107_AAVA) += max3107-aava.o | 44 | obj-$(CONFIG_SERIAL_MAX3107_AAVA) += max3107-aava.o |
diff --git a/drivers/tty/serial/s3c2410.c b/drivers/tty/serial/s3c2410.c deleted file mode 100644 index b1d7e7c1849d..000000000000 --- a/drivers/tty/serial/s3c2410.c +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | /* | ||
2 | * Driver for Samsung S3C2410 SoC onboard UARTs. | ||
3 | * | ||
4 | * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/module.h> | ||
13 | #include <linux/ioport.h> | ||
14 | #include <linux/io.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/serial_core.h> | ||
18 | #include <linux/serial.h> | ||
19 | |||
20 | #include <asm/irq.h> | ||
21 | #include <mach/hardware.h> | ||
22 | |||
23 | #include <plat/regs-serial.h> | ||
24 | #include <mach/regs-gpio.h> | ||
25 | |||
26 | #include "samsung.h" | ||
27 | |||
28 | static int s3c2410_serial_setsource(struct uart_port *port, | ||
29 | struct s3c24xx_uart_clksrc *clk) | ||
30 | { | ||
31 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
32 | |||
33 | if (strcmp(clk->name, "uclk") == 0) | ||
34 | ucon |= S3C2410_UCON_UCLK; | ||
35 | else | ||
36 | ucon &= ~S3C2410_UCON_UCLK; | ||
37 | |||
38 | wr_regl(port, S3C2410_UCON, ucon); | ||
39 | return 0; | ||
40 | } | ||
41 | |||
42 | static int s3c2410_serial_getsource(struct uart_port *port, | ||
43 | struct s3c24xx_uart_clksrc *clk) | ||
44 | { | ||
45 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
46 | |||
47 | clk->divisor = 1; | ||
48 | clk->name = (ucon & S3C2410_UCON_UCLK) ? "uclk" : "pclk"; | ||
49 | |||
50 | return 0; | ||
51 | } | ||
52 | |||
53 | static int s3c2410_serial_resetport(struct uart_port *port, | ||
54 | struct s3c2410_uartcfg *cfg) | ||
55 | { | ||
56 | dbg("s3c2410_serial_resetport: port=%p (%08lx), cfg=%p\n", | ||
57 | port, port->mapbase, cfg); | ||
58 | |||
59 | wr_regl(port, S3C2410_UCON, cfg->ucon); | ||
60 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
61 | |||
62 | /* reset both fifos */ | ||
63 | |||
64 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
65 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
66 | |||
67 | return 0; | ||
68 | } | ||
69 | |||
70 | static struct s3c24xx_uart_info s3c2410_uart_inf = { | ||
71 | .name = "Samsung S3C2410 UART", | ||
72 | .type = PORT_S3C2410, | ||
73 | .fifosize = 16, | ||
74 | .rx_fifomask = S3C2410_UFSTAT_RXMASK, | ||
75 | .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, | ||
76 | .rx_fifofull = S3C2410_UFSTAT_RXFULL, | ||
77 | .tx_fifofull = S3C2410_UFSTAT_TXFULL, | ||
78 | .tx_fifomask = S3C2410_UFSTAT_TXMASK, | ||
79 | .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT, | ||
80 | .get_clksrc = s3c2410_serial_getsource, | ||
81 | .set_clksrc = s3c2410_serial_setsource, | ||
82 | .reset_port = s3c2410_serial_resetport, | ||
83 | }; | ||
84 | |||
85 | static int s3c2410_serial_probe(struct platform_device *dev) | ||
86 | { | ||
87 | return s3c24xx_serial_probe(dev, &s3c2410_uart_inf); | ||
88 | } | ||
89 | |||
90 | static struct platform_driver s3c2410_serial_driver = { | ||
91 | .probe = s3c2410_serial_probe, | ||
92 | .remove = __devexit_p(s3c24xx_serial_remove), | ||
93 | .driver = { | ||
94 | .name = "s3c2410-uart", | ||
95 | .owner = THIS_MODULE, | ||
96 | }, | ||
97 | }; | ||
98 | |||
99 | static int __init s3c2410_serial_init(void) | ||
100 | { | ||
101 | return s3c24xx_serial_init(&s3c2410_serial_driver, &s3c2410_uart_inf); | ||
102 | } | ||
103 | |||
104 | static void __exit s3c2410_serial_exit(void) | ||
105 | { | ||
106 | platform_driver_unregister(&s3c2410_serial_driver); | ||
107 | } | ||
108 | |||
109 | module_init(s3c2410_serial_init); | ||
110 | module_exit(s3c2410_serial_exit); | ||
111 | |||
112 | MODULE_LICENSE("GPL v2"); | ||
113 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
114 | MODULE_DESCRIPTION("Samsung S3C2410 SoC Serial port driver"); | ||
115 | MODULE_ALIAS("platform:s3c2410-uart"); | ||
diff --git a/drivers/tty/serial/s3c2412.c b/drivers/tty/serial/s3c2412.c deleted file mode 100644 index 2234bf9ced45..000000000000 --- a/drivers/tty/serial/s3c2412.c +++ /dev/null | |||
@@ -1,149 +0,0 @@ | |||
1 | /* | ||
2 | * Driver for Samsung S3C2412 and S3C2413 SoC onboard UARTs. | ||
3 | * | ||
4 | * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/module.h> | ||
13 | #include <linux/ioport.h> | ||
14 | #include <linux/io.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/serial_core.h> | ||
18 | #include <linux/serial.h> | ||
19 | |||
20 | #include <asm/irq.h> | ||
21 | #include <mach/hardware.h> | ||
22 | |||
23 | #include <plat/regs-serial.h> | ||
24 | #include <mach/regs-gpio.h> | ||
25 | |||
26 | #include "samsung.h" | ||
27 | |||
28 | static int s3c2412_serial_setsource(struct uart_port *port, | ||
29 | struct s3c24xx_uart_clksrc *clk) | ||
30 | { | ||
31 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
32 | |||
33 | ucon &= ~S3C2412_UCON_CLKMASK; | ||
34 | |||
35 | if (strcmp(clk->name, "uclk") == 0) | ||
36 | ucon |= S3C2440_UCON_UCLK; | ||
37 | else if (strcmp(clk->name, "pclk") == 0) | ||
38 | ucon |= S3C2440_UCON_PCLK; | ||
39 | else if (strcmp(clk->name, "usysclk") == 0) | ||
40 | ucon |= S3C2412_UCON_USYSCLK; | ||
41 | else { | ||
42 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
43 | return -EINVAL; | ||
44 | } | ||
45 | |||
46 | wr_regl(port, S3C2410_UCON, ucon); | ||
47 | return 0; | ||
48 | } | ||
49 | |||
50 | |||
51 | static int s3c2412_serial_getsource(struct uart_port *port, | ||
52 | struct s3c24xx_uart_clksrc *clk) | ||
53 | { | ||
54 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
55 | |||
56 | switch (ucon & S3C2412_UCON_CLKMASK) { | ||
57 | case S3C2412_UCON_UCLK: | ||
58 | clk->divisor = 1; | ||
59 | clk->name = "uclk"; | ||
60 | break; | ||
61 | |||
62 | case S3C2412_UCON_PCLK: | ||
63 | case S3C2412_UCON_PCLK2: | ||
64 | clk->divisor = 1; | ||
65 | clk->name = "pclk"; | ||
66 | break; | ||
67 | |||
68 | case S3C2412_UCON_USYSCLK: | ||
69 | clk->divisor = 1; | ||
70 | clk->name = "usysclk"; | ||
71 | break; | ||
72 | } | ||
73 | |||
74 | return 0; | ||
75 | } | ||
76 | |||
77 | static int s3c2412_serial_resetport(struct uart_port *port, | ||
78 | struct s3c2410_uartcfg *cfg) | ||
79 | { | ||
80 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
81 | |||
82 | dbg("%s: port=%p (%08lx), cfg=%p\n", | ||
83 | __func__, port, port->mapbase, cfg); | ||
84 | |||
85 | /* ensure we don't change the clock settings... */ | ||
86 | |||
87 | ucon &= S3C2412_UCON_CLKMASK; | ||
88 | |||
89 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
90 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
91 | |||
92 | /* reset both fifos */ | ||
93 | |||
94 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
95 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
96 | |||
97 | return 0; | ||
98 | } | ||
99 | |||
100 | static struct s3c24xx_uart_info s3c2412_uart_inf = { | ||
101 | .name = "Samsung S3C2412 UART", | ||
102 | .type = PORT_S3C2412, | ||
103 | .fifosize = 64, | ||
104 | .has_divslot = 1, | ||
105 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
106 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
107 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
108 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
109 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
110 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
111 | .get_clksrc = s3c2412_serial_getsource, | ||
112 | .set_clksrc = s3c2412_serial_setsource, | ||
113 | .reset_port = s3c2412_serial_resetport, | ||
114 | }; | ||
115 | |||
116 | /* device management */ | ||
117 | |||
118 | static int s3c2412_serial_probe(struct platform_device *dev) | ||
119 | { | ||
120 | dbg("s3c2440_serial_probe: dev=%p\n", dev); | ||
121 | return s3c24xx_serial_probe(dev, &s3c2412_uart_inf); | ||
122 | } | ||
123 | |||
124 | static struct platform_driver s3c2412_serial_driver = { | ||
125 | .probe = s3c2412_serial_probe, | ||
126 | .remove = __devexit_p(s3c24xx_serial_remove), | ||
127 | .driver = { | ||
128 | .name = "s3c2412-uart", | ||
129 | .owner = THIS_MODULE, | ||
130 | }, | ||
131 | }; | ||
132 | |||
133 | static inline int s3c2412_serial_init(void) | ||
134 | { | ||
135 | return s3c24xx_serial_init(&s3c2412_serial_driver, &s3c2412_uart_inf); | ||
136 | } | ||
137 | |||
138 | static inline void s3c2412_serial_exit(void) | ||
139 | { | ||
140 | platform_driver_unregister(&s3c2412_serial_driver); | ||
141 | } | ||
142 | |||
143 | module_init(s3c2412_serial_init); | ||
144 | module_exit(s3c2412_serial_exit); | ||
145 | |||
146 | MODULE_DESCRIPTION("Samsung S3C2412,S3C2413 SoC Serial port driver"); | ||
147 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
148 | MODULE_LICENSE("GPL v2"); | ||
149 | MODULE_ALIAS("platform:s3c2412-uart"); | ||
diff --git a/drivers/tty/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c deleted file mode 100644 index 1d0c324b813f..000000000000 --- a/drivers/tty/serial/s3c2440.c +++ /dev/null | |||
@@ -1,178 +0,0 @@ | |||
1 | /* | ||
2 | * Driver for Samsung S3C2440 and S3C2442 SoC onboard UARTs. | ||
3 | * | ||
4 | * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/module.h> | ||
13 | #include <linux/ioport.h> | ||
14 | #include <linux/io.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/serial_core.h> | ||
18 | #include <linux/serial.h> | ||
19 | |||
20 | #include <asm/irq.h> | ||
21 | #include <mach/hardware.h> | ||
22 | |||
23 | #include <plat/regs-serial.h> | ||
24 | #include <mach/regs-gpio.h> | ||
25 | |||
26 | #include "samsung.h" | ||
27 | |||
28 | |||
29 | static int s3c2440_serial_setsource(struct uart_port *port, | ||
30 | struct s3c24xx_uart_clksrc *clk) | ||
31 | { | ||
32 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
33 | |||
34 | /* todo - proper fclk<>nonfclk switch. */ | ||
35 | |||
36 | ucon &= ~S3C2440_UCON_CLKMASK; | ||
37 | |||
38 | if (strcmp(clk->name, "uclk") == 0) | ||
39 | ucon |= S3C2440_UCON_UCLK; | ||
40 | else if (strcmp(clk->name, "pclk") == 0) | ||
41 | ucon |= S3C2440_UCON_PCLK; | ||
42 | else if (strcmp(clk->name, "fclk") == 0) | ||
43 | ucon |= S3C2440_UCON_FCLK; | ||
44 | else { | ||
45 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
46 | return -EINVAL; | ||
47 | } | ||
48 | |||
49 | wr_regl(port, S3C2410_UCON, ucon); | ||
50 | return 0; | ||
51 | } | ||
52 | |||
53 | |||
54 | static int s3c2440_serial_getsource(struct uart_port *port, | ||
55 | struct s3c24xx_uart_clksrc *clk) | ||
56 | { | ||
57 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
58 | unsigned long ucon0, ucon1, ucon2; | ||
59 | |||
60 | switch (ucon & S3C2440_UCON_CLKMASK) { | ||
61 | case S3C2440_UCON_UCLK: | ||
62 | clk->divisor = 1; | ||
63 | clk->name = "uclk"; | ||
64 | break; | ||
65 | |||
66 | case S3C2440_UCON_PCLK: | ||
67 | case S3C2440_UCON_PCLK2: | ||
68 | clk->divisor = 1; | ||
69 | clk->name = "pclk"; | ||
70 | break; | ||
71 | |||
72 | case S3C2440_UCON_FCLK: | ||
73 | /* the fun of calculating the uart divisors on | ||
74 | * the s3c2440 */ | ||
75 | |||
76 | ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON); | ||
77 | ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON); | ||
78 | ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON); | ||
79 | |||
80 | printk("ucons: %08lx, %08lx, %08lx\n", ucon0, ucon1, ucon2); | ||
81 | |||
82 | ucon0 &= S3C2440_UCON0_DIVMASK; | ||
83 | ucon1 &= S3C2440_UCON1_DIVMASK; | ||
84 | ucon2 &= S3C2440_UCON2_DIVMASK; | ||
85 | |||
86 | if (ucon0 != 0) { | ||
87 | clk->divisor = ucon0 >> S3C2440_UCON_DIVSHIFT; | ||
88 | clk->divisor += 6; | ||
89 | } else if (ucon1 != 0) { | ||
90 | clk->divisor = ucon1 >> S3C2440_UCON_DIVSHIFT; | ||
91 | clk->divisor += 21; | ||
92 | } else if (ucon2 != 0) { | ||
93 | clk->divisor = ucon2 >> S3C2440_UCON_DIVSHIFT; | ||
94 | clk->divisor += 36; | ||
95 | } else { | ||
96 | /* manual calims 44, seems to be 9 */ | ||
97 | clk->divisor = 9; | ||
98 | } | ||
99 | |||
100 | clk->name = "fclk"; | ||
101 | break; | ||
102 | } | ||
103 | |||
104 | return 0; | ||
105 | } | ||
106 | |||
107 | static int s3c2440_serial_resetport(struct uart_port *port, | ||
108 | struct s3c2410_uartcfg *cfg) | ||
109 | { | ||
110 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
111 | |||
112 | dbg("s3c2440_serial_resetport: port=%p (%08lx), cfg=%p\n", | ||
113 | port, port->mapbase, cfg); | ||
114 | |||
115 | /* ensure we don't change the clock settings... */ | ||
116 | |||
117 | ucon &= (S3C2440_UCON0_DIVMASK | (3<<10)); | ||
118 | |||
119 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
120 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
121 | |||
122 | /* reset both fifos */ | ||
123 | |||
124 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
125 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
126 | |||
127 | return 0; | ||
128 | } | ||
129 | |||
130 | static struct s3c24xx_uart_info s3c2440_uart_inf = { | ||
131 | .name = "Samsung S3C2440 UART", | ||
132 | .type = PORT_S3C2440, | ||
133 | .fifosize = 64, | ||
134 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
135 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
136 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
137 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
138 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
139 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
140 | .get_clksrc = s3c2440_serial_getsource, | ||
141 | .set_clksrc = s3c2440_serial_setsource, | ||
142 | .reset_port = s3c2440_serial_resetport, | ||
143 | }; | ||
144 | |||
145 | /* device management */ | ||
146 | |||
147 | static int s3c2440_serial_probe(struct platform_device *dev) | ||
148 | { | ||
149 | dbg("s3c2440_serial_probe: dev=%p\n", dev); | ||
150 | return s3c24xx_serial_probe(dev, &s3c2440_uart_inf); | ||
151 | } | ||
152 | |||
153 | static struct platform_driver s3c2440_serial_driver = { | ||
154 | .probe = s3c2440_serial_probe, | ||
155 | .remove = __devexit_p(s3c24xx_serial_remove), | ||
156 | .driver = { | ||
157 | .name = "s3c2440-uart", | ||
158 | .owner = THIS_MODULE, | ||
159 | }, | ||
160 | }; | ||
161 | |||
162 | static int __init s3c2440_serial_init(void) | ||
163 | { | ||
164 | return s3c24xx_serial_init(&s3c2440_serial_driver, &s3c2440_uart_inf); | ||
165 | } | ||
166 | |||
167 | static void __exit s3c2440_serial_exit(void) | ||
168 | { | ||
169 | platform_driver_unregister(&s3c2440_serial_driver); | ||
170 | } | ||
171 | |||
172 | module_init(s3c2440_serial_init); | ||
173 | module_exit(s3c2440_serial_exit); | ||
174 | |||
175 | MODULE_DESCRIPTION("Samsung S3C2440,S3C2442 SoC Serial port driver"); | ||
176 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
177 | MODULE_LICENSE("GPL v2"); | ||
178 | MODULE_ALIAS("platform:s3c2440-uart"); | ||
diff --git a/drivers/tty/serial/s3c6400.c b/drivers/tty/serial/s3c6400.c deleted file mode 100644 index e2f6913d84d5..000000000000 --- a/drivers/tty/serial/s3c6400.c +++ /dev/null | |||
@@ -1,149 +0,0 @@ | |||
1 | /* | ||
2 | * Driver for Samsung S3C6400 and S3C6410 SoC onboard UARTs. | ||
3 | * | ||
4 | * Copyright 2008 Openmoko, Inc. | ||
5 | * Copyright 2008 Simtec Electronics | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * http://armlinux.simtec.co.uk/ | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/module.h> | ||
15 | #include <linux/ioport.h> | ||
16 | #include <linux/io.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/serial_core.h> | ||
20 | #include <linux/serial.h> | ||
21 | |||
22 | #include <asm/irq.h> | ||
23 | #include <mach/hardware.h> | ||
24 | |||
25 | #include <plat/regs-serial.h> | ||
26 | |||
27 | #include "samsung.h" | ||
28 | |||
29 | static int s3c6400_serial_setsource(struct uart_port *port, | ||
30 | struct s3c24xx_uart_clksrc *clk) | ||
31 | { | ||
32 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
33 | |||
34 | if (strcmp(clk->name, "uclk0") == 0) { | ||
35 | ucon &= ~S3C6400_UCON_CLKMASK; | ||
36 | ucon |= S3C6400_UCON_UCLK0; | ||
37 | } else if (strcmp(clk->name, "uclk1") == 0) | ||
38 | ucon |= S3C6400_UCON_UCLK1; | ||
39 | else if (strcmp(clk->name, "pclk") == 0) { | ||
40 | /* See notes about transitioning from UCLK to PCLK */ | ||
41 | ucon &= ~S3C6400_UCON_UCLK0; | ||
42 | } else { | ||
43 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
44 | return -EINVAL; | ||
45 | } | ||
46 | |||
47 | wr_regl(port, S3C2410_UCON, ucon); | ||
48 | return 0; | ||
49 | } | ||
50 | |||
51 | |||
52 | static int s3c6400_serial_getsource(struct uart_port *port, | ||
53 | struct s3c24xx_uart_clksrc *clk) | ||
54 | { | ||
55 | u32 ucon = rd_regl(port, S3C2410_UCON); | ||
56 | |||
57 | clk->divisor = 1; | ||
58 | |||
59 | switch (ucon & S3C6400_UCON_CLKMASK) { | ||
60 | case S3C6400_UCON_UCLK0: | ||
61 | clk->name = "uclk0"; | ||
62 | break; | ||
63 | |||
64 | case S3C6400_UCON_UCLK1: | ||
65 | clk->name = "uclk1"; | ||
66 | break; | ||
67 | |||
68 | case S3C6400_UCON_PCLK: | ||
69 | case S3C6400_UCON_PCLK2: | ||
70 | clk->name = "pclk"; | ||
71 | break; | ||
72 | } | ||
73 | |||
74 | return 0; | ||
75 | } | ||
76 | |||
77 | static int s3c6400_serial_resetport(struct uart_port *port, | ||
78 | struct s3c2410_uartcfg *cfg) | ||
79 | { | ||
80 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
81 | |||
82 | dbg("s3c6400_serial_resetport: port=%p (%08lx), cfg=%p\n", | ||
83 | port, port->mapbase, cfg); | ||
84 | |||
85 | /* ensure we don't change the clock settings... */ | ||
86 | |||
87 | ucon &= S3C6400_UCON_CLKMASK; | ||
88 | |||
89 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
90 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
91 | |||
92 | /* reset both fifos */ | ||
93 | |||
94 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
95 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
96 | |||
97 | return 0; | ||
98 | } | ||
99 | |||
100 | static struct s3c24xx_uart_info s3c6400_uart_inf = { | ||
101 | .name = "Samsung S3C6400 UART", | ||
102 | .type = PORT_S3C6400, | ||
103 | .fifosize = 64, | ||
104 | .has_divslot = 1, | ||
105 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
106 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
107 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
108 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
109 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
110 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
111 | .get_clksrc = s3c6400_serial_getsource, | ||
112 | .set_clksrc = s3c6400_serial_setsource, | ||
113 | .reset_port = s3c6400_serial_resetport, | ||
114 | }; | ||
115 | |||
116 | /* device management */ | ||
117 | |||
118 | static int s3c6400_serial_probe(struct platform_device *dev) | ||
119 | { | ||
120 | dbg("s3c6400_serial_probe: dev=%p\n", dev); | ||
121 | return s3c24xx_serial_probe(dev, &s3c6400_uart_inf); | ||
122 | } | ||
123 | |||
124 | static struct platform_driver s3c6400_serial_driver = { | ||
125 | .probe = s3c6400_serial_probe, | ||
126 | .remove = __devexit_p(s3c24xx_serial_remove), | ||
127 | .driver = { | ||
128 | .name = "s3c6400-uart", | ||
129 | .owner = THIS_MODULE, | ||
130 | }, | ||
131 | }; | ||
132 | |||
133 | static int __init s3c6400_serial_init(void) | ||
134 | { | ||
135 | return s3c24xx_serial_init(&s3c6400_serial_driver, &s3c6400_uart_inf); | ||
136 | } | ||
137 | |||
138 | static void __exit s3c6400_serial_exit(void) | ||
139 | { | ||
140 | platform_driver_unregister(&s3c6400_serial_driver); | ||
141 | } | ||
142 | |||
143 | module_init(s3c6400_serial_init); | ||
144 | module_exit(s3c6400_serial_exit); | ||
145 | |||
146 | MODULE_DESCRIPTION("Samsung S3C6400,S3C6410 SoC Serial port driver"); | ||
147 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
148 | MODULE_LICENSE("GPL v2"); | ||
149 | MODULE_ALIAS("platform:s3c6400-uart"); | ||
diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c deleted file mode 100644 index 8b0b888a1b76..000000000000 --- a/drivers/tty/serial/s5pv210.c +++ /dev/null | |||
@@ -1,158 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com/ | ||
4 | * | ||
5 | * Based on drivers/serial/s3c6400.c | ||
6 | * | ||
7 | * Driver for Samsung S5PV210 SoC UARTs. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/module.h> | ||
15 | #include <linux/ioport.h> | ||
16 | #include <linux/io.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/serial_core.h> | ||
20 | #include <linux/serial.h> | ||
21 | #include <linux/delay.h> | ||
22 | |||
23 | #include <asm/irq.h> | ||
24 | #include <mach/hardware.h> | ||
25 | #include <plat/regs-serial.h> | ||
26 | #include "samsung.h" | ||
27 | |||
28 | static int s5pv210_serial_setsource(struct uart_port *port, | ||
29 | struct s3c24xx_uart_clksrc *clk) | ||
30 | { | ||
31 | struct s3c2410_uartcfg *cfg = port->dev->platform_data; | ||
32 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
33 | |||
34 | if (cfg->flags & NO_NEED_CHECK_CLKSRC) | ||
35 | return 0; | ||
36 | |||
37 | if (strcmp(clk->name, "pclk") == 0) | ||
38 | ucon &= ~S5PV210_UCON_CLKMASK; | ||
39 | else if (strcmp(clk->name, "uclk1") == 0) | ||
40 | ucon |= S5PV210_UCON_CLKMASK; | ||
41 | else { | ||
42 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
43 | return -EINVAL; | ||
44 | } | ||
45 | |||
46 | wr_regl(port, S3C2410_UCON, ucon); | ||
47 | return 0; | ||
48 | } | ||
49 | |||
50 | |||
51 | static int s5pv210_serial_getsource(struct uart_port *port, | ||
52 | struct s3c24xx_uart_clksrc *clk) | ||
53 | { | ||
54 | struct s3c2410_uartcfg *cfg = port->dev->platform_data; | ||
55 | u32 ucon = rd_regl(port, S3C2410_UCON); | ||
56 | |||
57 | clk->divisor = 1; | ||
58 | |||
59 | if (cfg->flags & NO_NEED_CHECK_CLKSRC) | ||
60 | return 0; | ||
61 | |||
62 | switch (ucon & S5PV210_UCON_CLKMASK) { | ||
63 | case S5PV210_UCON_PCLK: | ||
64 | clk->name = "pclk"; | ||
65 | break; | ||
66 | case S5PV210_UCON_UCLK: | ||
67 | clk->name = "uclk1"; | ||
68 | break; | ||
69 | } | ||
70 | |||
71 | return 0; | ||
72 | } | ||
73 | |||
74 | static int s5pv210_serial_resetport(struct uart_port *port, | ||
75 | struct s3c2410_uartcfg *cfg) | ||
76 | { | ||
77 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
78 | |||
79 | ucon &= S5PV210_UCON_CLKMASK; | ||
80 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
81 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
82 | |||
83 | /* reset both fifos */ | ||
84 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
85 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
86 | |||
87 | /* It is need to delay When reset FIFO register */ | ||
88 | udelay(1); | ||
89 | |||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | #define S5PV210_UART_DEFAULT_INFO(fifo_size) \ | ||
94 | .name = "Samsung S5PV210 UART0", \ | ||
95 | .type = PORT_S3C6400, \ | ||
96 | .fifosize = fifo_size, \ | ||
97 | .has_divslot = 1, \ | ||
98 | .rx_fifomask = S5PV210_UFSTAT_RXMASK, \ | ||
99 | .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \ | ||
100 | .rx_fifofull = S5PV210_UFSTAT_RXFULL, \ | ||
101 | .tx_fifofull = S5PV210_UFSTAT_TXFULL, \ | ||
102 | .tx_fifomask = S5PV210_UFSTAT_TXMASK, \ | ||
103 | .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \ | ||
104 | .get_clksrc = s5pv210_serial_getsource, \ | ||
105 | .set_clksrc = s5pv210_serial_setsource, \ | ||
106 | .reset_port = s5pv210_serial_resetport | ||
107 | |||
108 | static struct s3c24xx_uart_info s5p_port_fifo256 = { | ||
109 | S5PV210_UART_DEFAULT_INFO(256), | ||
110 | }; | ||
111 | |||
112 | static struct s3c24xx_uart_info s5p_port_fifo64 = { | ||
113 | S5PV210_UART_DEFAULT_INFO(64), | ||
114 | }; | ||
115 | |||
116 | static struct s3c24xx_uart_info s5p_port_fifo16 = { | ||
117 | S5PV210_UART_DEFAULT_INFO(16), | ||
118 | }; | ||
119 | |||
120 | static struct s3c24xx_uart_info *s5p_uart_inf[] = { | ||
121 | [0] = &s5p_port_fifo256, | ||
122 | [1] = &s5p_port_fifo64, | ||
123 | [2] = &s5p_port_fifo16, | ||
124 | [3] = &s5p_port_fifo16, | ||
125 | }; | ||
126 | |||
127 | /* device management */ | ||
128 | static int s5p_serial_probe(struct platform_device *pdev) | ||
129 | { | ||
130 | return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]); | ||
131 | } | ||
132 | |||
133 | static struct platform_driver s5p_serial_driver = { | ||
134 | .probe = s5p_serial_probe, | ||
135 | .remove = __devexit_p(s3c24xx_serial_remove), | ||
136 | .driver = { | ||
137 | .name = "s5pv210-uart", | ||
138 | .owner = THIS_MODULE, | ||
139 | }, | ||
140 | }; | ||
141 | |||
142 | static int __init s5p_serial_init(void) | ||
143 | { | ||
144 | return s3c24xx_serial_init(&s5p_serial_driver, *s5p_uart_inf); | ||
145 | } | ||
146 | |||
147 | static void __exit s5p_serial_exit(void) | ||
148 | { | ||
149 | platform_driver_unregister(&s5p_serial_driver); | ||
150 | } | ||
151 | |||
152 | module_init(s5p_serial_init); | ||
153 | module_exit(s5p_serial_exit); | ||
154 | |||
155 | MODULE_LICENSE("GPL"); | ||
156 | MODULE_ALIAS("platform:s5pv210-uart"); | ||
157 | MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support"); | ||
158 | MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>"); | ||
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index b31f1c3a2c4c..f96f37b5fec6 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <linux/delay.h> | 42 | #include <linux/delay.h> |
43 | #include <linux/clk.h> | 43 | #include <linux/clk.h> |
44 | #include <linux/cpufreq.h> | 44 | #include <linux/cpufreq.h> |
45 | #include <linux/of.h> | ||
45 | 46 | ||
46 | #include <asm/irq.h> | 47 | #include <asm/irq.h> |
47 | 48 | ||
@@ -49,6 +50,7 @@ | |||
49 | #include <mach/map.h> | 50 | #include <mach/map.h> |
50 | 51 | ||
51 | #include <plat/regs-serial.h> | 52 | #include <plat/regs-serial.h> |
53 | #include <plat/clock.h> | ||
52 | 54 | ||
53 | #include "samsung.h" | 55 | #include "samsung.h" |
54 | 56 | ||
@@ -190,10 +192,13 @@ static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *p | |||
190 | 192 | ||
191 | static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) | 193 | static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) |
192 | { | 194 | { |
195 | struct s3c24xx_uart_port *ourport; | ||
196 | |||
193 | if (port->dev == NULL) | 197 | if (port->dev == NULL) |
194 | return NULL; | 198 | return NULL; |
195 | 199 | ||
196 | return (struct s3c2410_uartcfg *)port->dev->platform_data; | 200 | ourport = container_of(port, struct s3c24xx_uart_port, port); |
201 | return ourport->cfg; | ||
197 | } | 202 | } |
198 | 203 | ||
199 | static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, | 204 | static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, |
@@ -202,7 +207,7 @@ static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, | |||
202 | struct s3c24xx_uart_info *info = ourport->info; | 207 | struct s3c24xx_uart_info *info = ourport->info; |
203 | 208 | ||
204 | if (ufstat & info->rx_fifofull) | 209 | if (ufstat & info->rx_fifofull) |
205 | return info->fifosize; | 210 | return ourport->port.fifosize; |
206 | 211 | ||
207 | return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; | 212 | return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; |
208 | } | 213 | } |
@@ -555,154 +560,98 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, | |||
555 | * | 560 | * |
556 | */ | 561 | */ |
557 | 562 | ||
563 | #define MAX_CLK_NAME_LENGTH 15 | ||
558 | 564 | ||
559 | #define MAX_CLKS (8) | 565 | static inline int s3c24xx_serial_getsource(struct uart_port *port) |
560 | |||
561 | static struct s3c24xx_uart_clksrc tmp_clksrc = { | ||
562 | .name = "pclk", | ||
563 | .min_baud = 0, | ||
564 | .max_baud = 0, | ||
565 | .divisor = 1, | ||
566 | }; | ||
567 | |||
568 | static inline int | ||
569 | s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c) | ||
570 | { | 566 | { |
571 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | 567 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
568 | unsigned int ucon; | ||
572 | 569 | ||
573 | return (info->get_clksrc)(port, c); | 570 | if (info->num_clks == 1) |
574 | } | 571 | return 0; |
575 | |||
576 | static inline int | ||
577 | s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c) | ||
578 | { | ||
579 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
580 | 572 | ||
581 | return (info->set_clksrc)(port, c); | 573 | ucon = rd_regl(port, S3C2410_UCON); |
574 | ucon &= info->clksel_mask; | ||
575 | return ucon >> info->clksel_shift; | ||
582 | } | 576 | } |
583 | 577 | ||
584 | struct baud_calc { | 578 | static void s3c24xx_serial_setsource(struct uart_port *port, |
585 | struct s3c24xx_uart_clksrc *clksrc; | 579 | unsigned int clk_sel) |
586 | unsigned int calc; | ||
587 | unsigned int divslot; | ||
588 | unsigned int quot; | ||
589 | struct clk *src; | ||
590 | }; | ||
591 | |||
592 | static int s3c24xx_serial_calcbaud(struct baud_calc *calc, | ||
593 | struct uart_port *port, | ||
594 | struct s3c24xx_uart_clksrc *clksrc, | ||
595 | unsigned int baud) | ||
596 | { | 580 | { |
597 | struct s3c24xx_uart_port *ourport = to_ourport(port); | 581 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
598 | unsigned long rate; | 582 | unsigned int ucon; |
599 | |||
600 | calc->src = clk_get(port->dev, clksrc->name); | ||
601 | if (calc->src == NULL || IS_ERR(calc->src)) | ||
602 | return 0; | ||
603 | |||
604 | rate = clk_get_rate(calc->src); | ||
605 | rate /= clksrc->divisor; | ||
606 | 583 | ||
607 | calc->clksrc = clksrc; | 584 | if (info->num_clks == 1) |
585 | return; | ||
608 | 586 | ||
609 | if (ourport->info->has_divslot) { | 587 | ucon = rd_regl(port, S3C2410_UCON); |
610 | unsigned long div = rate / baud; | 588 | if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel) |
611 | 589 | return; | |
612 | /* The UDIVSLOT register on the newer UARTs allows us to | ||
613 | * get a divisor adjustment of 1/16th on the baud clock. | ||
614 | * | ||
615 | * We don't keep the UDIVSLOT value (the 16ths we calculated | ||
616 | * by not multiplying the baud by 16) as it is easy enough | ||
617 | * to recalculate. | ||
618 | */ | ||
619 | |||
620 | calc->quot = div / 16; | ||
621 | calc->calc = rate / div; | ||
622 | } else { | ||
623 | calc->quot = (rate + (8 * baud)) / (16 * baud); | ||
624 | calc->calc = (rate / (calc->quot * 16)); | ||
625 | } | ||
626 | 590 | ||
627 | calc->quot--; | 591 | ucon &= ~info->clksel_mask; |
628 | return 1; | 592 | ucon |= clk_sel << info->clksel_shift; |
593 | wr_regl(port, S3C2410_UCON, ucon); | ||
629 | } | 594 | } |
630 | 595 | ||
631 | static unsigned int s3c24xx_serial_getclk(struct uart_port *port, | 596 | static unsigned int s3c24xx_serial_getclk(struct s3c24xx_uart_port *ourport, |
632 | struct s3c24xx_uart_clksrc **clksrc, | 597 | unsigned int req_baud, struct clk **best_clk, |
633 | struct clk **clk, | 598 | unsigned int *clk_num) |
634 | unsigned int baud) | ||
635 | { | 599 | { |
636 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); | 600 | struct s3c24xx_uart_info *info = ourport->info; |
637 | struct s3c24xx_uart_clksrc *clkp; | 601 | struct clk *clk; |
638 | struct baud_calc res[MAX_CLKS]; | 602 | unsigned long rate; |
639 | struct baud_calc *resptr, *best, *sptr; | 603 | unsigned int cnt, baud, quot, clk_sel, best_quot = 0; |
640 | int i; | 604 | char clkname[MAX_CLK_NAME_LENGTH]; |
641 | 605 | int calc_deviation, deviation = (1 << 30) - 1; | |
642 | clkp = cfg->clocks; | 606 | |
643 | best = NULL; | 607 | *best_clk = NULL; |
644 | 608 | clk_sel = (ourport->cfg->clk_sel) ? ourport->cfg->clk_sel : | |
645 | if (cfg->clocks_size < 2) { | 609 | ourport->info->def_clk_sel; |
646 | if (cfg->clocks_size == 0) | 610 | for (cnt = 0; cnt < info->num_clks; cnt++) { |
647 | clkp = &tmp_clksrc; | 611 | if (!(clk_sel & (1 << cnt))) |
648 | 612 | continue; | |
649 | /* check to see if we're sourcing fclk, and if so we're | 613 | |
650 | * going to have to update the clock source | 614 | sprintf(clkname, "clk_uart_baud%d", cnt); |
651 | */ | 615 | clk = clk_get(ourport->port.dev, clkname); |
652 | 616 | if (IS_ERR_OR_NULL(clk)) | |
653 | if (strcmp(clkp->name, "fclk") == 0) { | 617 | continue; |
654 | struct s3c24xx_uart_clksrc src; | 618 | |
655 | 619 | rate = clk_get_rate(clk); | |
656 | s3c24xx_serial_getsource(port, &src); | 620 | if (!rate) |
657 | 621 | continue; | |
658 | /* check that the port already using fclk, and if | 622 | |
659 | * not, then re-select fclk | 623 | if (ourport->info->has_divslot) { |
624 | unsigned long div = rate / req_baud; | ||
625 | |||
626 | /* The UDIVSLOT register on the newer UARTs allows us to | ||
627 | * get a divisor adjustment of 1/16th on the baud clock. | ||
628 | * | ||
629 | * We don't keep the UDIVSLOT value (the 16ths we | ||
630 | * calculated by not multiplying the baud by 16) as it | ||
631 | * is easy enough to recalculate. | ||
660 | */ | 632 | */ |
661 | 633 | ||
662 | if (strcmp(src.name, clkp->name) == 0) { | 634 | quot = div / 16; |
663 | s3c24xx_serial_setsource(port, clkp); | 635 | baud = rate / div; |
664 | s3c24xx_serial_getsource(port, &src); | 636 | } else { |
665 | } | 637 | quot = (rate + (8 * req_baud)) / (16 * req_baud); |
666 | 638 | baud = rate / (quot * 16); | |
667 | clkp->divisor = src.divisor; | ||
668 | } | ||
669 | |||
670 | s3c24xx_serial_calcbaud(res, port, clkp, baud); | ||
671 | best = res; | ||
672 | resptr = best + 1; | ||
673 | } else { | ||
674 | resptr = res; | ||
675 | |||
676 | for (i = 0; i < cfg->clocks_size; i++, clkp++) { | ||
677 | if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud)) | ||
678 | resptr++; | ||
679 | } | 639 | } |
680 | } | 640 | quot--; |
681 | |||
682 | /* ok, we now need to select the best clock we found */ | ||
683 | |||
684 | if (!best) { | ||
685 | unsigned int deviation = (1<<30)|((1<<30)-1); | ||
686 | int calc_deviation; | ||
687 | 641 | ||
688 | for (sptr = res; sptr < resptr; sptr++) { | 642 | calc_deviation = req_baud - baud; |
689 | calc_deviation = baud - sptr->calc; | 643 | if (calc_deviation < 0) |
690 | if (calc_deviation < 0) | 644 | calc_deviation = -calc_deviation; |
691 | calc_deviation = -calc_deviation; | ||
692 | 645 | ||
693 | if (calc_deviation < deviation) { | 646 | if (calc_deviation < deviation) { |
694 | best = sptr; | 647 | *best_clk = clk; |
695 | deviation = calc_deviation; | 648 | best_quot = quot; |
696 | } | 649 | *clk_num = cnt; |
650 | deviation = calc_deviation; | ||
697 | } | 651 | } |
698 | } | 652 | } |
699 | 653 | ||
700 | /* store results to pass back */ | 654 | return best_quot; |
701 | |||
702 | *clksrc = best->clksrc; | ||
703 | *clk = best->src; | ||
704 | |||
705 | return best->quot; | ||
706 | } | 655 | } |
707 | 656 | ||
708 | /* udivslot_table[] | 657 | /* udivslot_table[] |
@@ -735,10 +684,9 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, | |||
735 | { | 684 | { |
736 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); | 685 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); |
737 | struct s3c24xx_uart_port *ourport = to_ourport(port); | 686 | struct s3c24xx_uart_port *ourport = to_ourport(port); |
738 | struct s3c24xx_uart_clksrc *clksrc = NULL; | ||
739 | struct clk *clk = NULL; | 687 | struct clk *clk = NULL; |
740 | unsigned long flags; | 688 | unsigned long flags; |
741 | unsigned int baud, quot; | 689 | unsigned int baud, quot, clk_sel = 0; |
742 | unsigned int ulcon; | 690 | unsigned int ulcon; |
743 | unsigned int umcon; | 691 | unsigned int umcon; |
744 | unsigned int udivslot = 0; | 692 | unsigned int udivslot = 0; |
@@ -754,17 +702,16 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, | |||
754 | */ | 702 | */ |
755 | 703 | ||
756 | baud = uart_get_baud_rate(port, termios, old, 0, 115200*8); | 704 | baud = uart_get_baud_rate(port, termios, old, 0, 115200*8); |
757 | 705 | quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel); | |
758 | if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) | 706 | if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) |
759 | quot = port->custom_divisor; | 707 | quot = port->custom_divisor; |
760 | else | 708 | if (!clk) |
761 | quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud); | 709 | return; |
762 | 710 | ||
763 | /* check to see if we need to change clock source */ | 711 | /* check to see if we need to change clock source */ |
764 | 712 | ||
765 | if (ourport->clksrc != clksrc || ourport->baudclk != clk) { | 713 | if (ourport->baudclk != clk) { |
766 | dbg("selecting clock %p\n", clk); | 714 | s3c24xx_serial_setsource(port, clk_sel); |
767 | s3c24xx_serial_setsource(port, clksrc); | ||
768 | 715 | ||
769 | if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) { | 716 | if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) { |
770 | clk_disable(ourport->baudclk); | 717 | clk_disable(ourport->baudclk); |
@@ -773,7 +720,6 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, | |||
773 | 720 | ||
774 | clk_enable(clk); | 721 | clk_enable(clk); |
775 | 722 | ||
776 | ourport->clksrc = clksrc; | ||
777 | ourport->baudclk = clk; | 723 | ourport->baudclk = clk; |
778 | ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; | 724 | ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; |
779 | } | 725 | } |
@@ -1020,16 +966,29 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS | |||
1020 | 966 | ||
1021 | /* s3c24xx_serial_resetport | 967 | /* s3c24xx_serial_resetport |
1022 | * | 968 | * |
1023 | * wrapper to call the specific reset for this port (reset the fifos | 969 | * reset the fifos and other the settings. |
1024 | * and the settings) | ||
1025 | */ | 970 | */ |
1026 | 971 | ||
1027 | static inline int s3c24xx_serial_resetport(struct uart_port *port, | 972 | static void s3c24xx_serial_resetport(struct uart_port *port, |
1028 | struct s3c2410_uartcfg *cfg) | 973 | struct s3c2410_uartcfg *cfg) |
1029 | { | 974 | { |
1030 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | 975 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
976 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
977 | unsigned int ucon_mask; | ||
978 | |||
979 | ucon_mask = info->clksel_mask; | ||
980 | if (info->type == PORT_S3C2440) | ||
981 | ucon_mask |= S3C2440_UCON0_DIVMASK; | ||
1031 | 982 | ||
1032 | return (info->reset_port)(port, cfg); | 983 | ucon &= ucon_mask; |
984 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
985 | |||
986 | /* reset both fifos */ | ||
987 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
988 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
989 | |||
990 | /* some delay is required after fifo reset */ | ||
991 | udelay(1); | ||
1033 | } | 992 | } |
1034 | 993 | ||
1035 | 994 | ||
@@ -1121,11 +1080,10 @@ static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *p | |||
1121 | */ | 1080 | */ |
1122 | 1081 | ||
1123 | static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, | 1082 | static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, |
1124 | struct s3c24xx_uart_info *info, | ||
1125 | struct platform_device *platdev) | 1083 | struct platform_device *platdev) |
1126 | { | 1084 | { |
1127 | struct uart_port *port = &ourport->port; | 1085 | struct uart_port *port = &ourport->port; |
1128 | struct s3c2410_uartcfg *cfg; | 1086 | struct s3c2410_uartcfg *cfg = ourport->cfg; |
1129 | struct resource *res; | 1087 | struct resource *res; |
1130 | int ret; | 1088 | int ret; |
1131 | 1089 | ||
@@ -1134,30 +1092,16 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, | |||
1134 | if (platdev == NULL) | 1092 | if (platdev == NULL) |
1135 | return -ENODEV; | 1093 | return -ENODEV; |
1136 | 1094 | ||
1137 | cfg = s3c24xx_dev_to_cfg(&platdev->dev); | ||
1138 | |||
1139 | if (port->mapbase != 0) | 1095 | if (port->mapbase != 0) |
1140 | return 0; | 1096 | return 0; |
1141 | 1097 | ||
1142 | if (cfg->hwport > CONFIG_SERIAL_SAMSUNG_UARTS) { | ||
1143 | printk(KERN_ERR "%s: port %d bigger than %d\n", __func__, | ||
1144 | cfg->hwport, CONFIG_SERIAL_SAMSUNG_UARTS); | ||
1145 | return -ERANGE; | ||
1146 | } | ||
1147 | |||
1148 | /* setup info for port */ | 1098 | /* setup info for port */ |
1149 | port->dev = &platdev->dev; | 1099 | port->dev = &platdev->dev; |
1150 | ourport->info = info; | ||
1151 | 1100 | ||
1152 | /* Startup sequence is different for s3c64xx and higher SoC's */ | 1101 | /* Startup sequence is different for s3c64xx and higher SoC's */ |
1153 | if (s3c24xx_serial_has_interrupt_mask(port)) | 1102 | if (s3c24xx_serial_has_interrupt_mask(port)) |
1154 | s3c24xx_serial_ops.startup = s3c64xx_serial_startup; | 1103 | s3c24xx_serial_ops.startup = s3c64xx_serial_startup; |
1155 | 1104 | ||
1156 | /* copy the info in from provided structure */ | ||
1157 | ourport->port.fifosize = info->fifosize; | ||
1158 | |||
1159 | dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport); | ||
1160 | |||
1161 | port->uartclk = 1; | 1105 | port->uartclk = 1; |
1162 | 1106 | ||
1163 | if (cfg->uart_flags & UPF_CONS_FLOW) { | 1107 | if (cfg->uart_flags & UPF_CONS_FLOW) { |
@@ -1215,43 +1159,74 @@ static ssize_t s3c24xx_serial_show_clksrc(struct device *dev, | |||
1215 | struct uart_port *port = s3c24xx_dev_to_port(dev); | 1159 | struct uart_port *port = s3c24xx_dev_to_port(dev); |
1216 | struct s3c24xx_uart_port *ourport = to_ourport(port); | 1160 | struct s3c24xx_uart_port *ourport = to_ourport(port); |
1217 | 1161 | ||
1218 | return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->clksrc->name); | 1162 | return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->baudclk->name); |
1219 | } | 1163 | } |
1220 | 1164 | ||
1221 | static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL); | 1165 | static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL); |
1222 | 1166 | ||
1167 | |||
1223 | /* Device driver serial port probe */ | 1168 | /* Device driver serial port probe */ |
1224 | 1169 | ||
1170 | static const struct of_device_id s3c24xx_uart_dt_match[]; | ||
1225 | static int probe_index; | 1171 | static int probe_index; |
1226 | 1172 | ||
1227 | int s3c24xx_serial_probe(struct platform_device *dev, | 1173 | static inline struct s3c24xx_serial_drv_data *s3c24xx_get_driver_data( |
1228 | struct s3c24xx_uart_info *info) | 1174 | struct platform_device *pdev) |
1175 | { | ||
1176 | #ifdef CONFIG_OF | ||
1177 | if (pdev->dev.of_node) { | ||
1178 | const struct of_device_id *match; | ||
1179 | match = of_match_node(s3c24xx_uart_dt_match, pdev->dev.of_node); | ||
1180 | return (struct s3c24xx_serial_drv_data *)match->data; | ||
1181 | } | ||
1182 | #endif | ||
1183 | return (struct s3c24xx_serial_drv_data *) | ||
1184 | platform_get_device_id(pdev)->driver_data; | ||
1185 | } | ||
1186 | |||
1187 | static int s3c24xx_serial_probe(struct platform_device *pdev) | ||
1229 | { | 1188 | { |
1230 | struct s3c24xx_uart_port *ourport; | 1189 | struct s3c24xx_uart_port *ourport; |
1231 | int ret; | 1190 | int ret; |
1232 | 1191 | ||
1233 | dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index); | 1192 | dbg("s3c24xx_serial_probe(%p) %d\n", pdev, probe_index); |
1234 | 1193 | ||
1235 | ourport = &s3c24xx_serial_ports[probe_index]; | 1194 | ourport = &s3c24xx_serial_ports[probe_index]; |
1195 | |||
1196 | ourport->drv_data = s3c24xx_get_driver_data(pdev); | ||
1197 | if (!ourport->drv_data) { | ||
1198 | dev_err(&pdev->dev, "could not find driver data\n"); | ||
1199 | return -ENODEV; | ||
1200 | } | ||
1201 | |||
1202 | ourport->info = ourport->drv_data->info; | ||
1203 | ourport->cfg = (pdev->dev.platform_data) ? | ||
1204 | (struct s3c2410_uartcfg *)pdev->dev.platform_data : | ||
1205 | ourport->drv_data->def_cfg; | ||
1206 | |||
1207 | ourport->port.fifosize = (ourport->info->fifosize) ? | ||
1208 | ourport->info->fifosize : | ||
1209 | ourport->drv_data->fifosize[probe_index]; | ||
1210 | |||
1236 | probe_index++; | 1211 | probe_index++; |
1237 | 1212 | ||
1238 | dbg("%s: initialising port %p...\n", __func__, ourport); | 1213 | dbg("%s: initialising port %p...\n", __func__, ourport); |
1239 | 1214 | ||
1240 | ret = s3c24xx_serial_init_port(ourport, info, dev); | 1215 | ret = s3c24xx_serial_init_port(ourport, pdev); |
1241 | if (ret < 0) | 1216 | if (ret < 0) |
1242 | goto probe_err; | 1217 | goto probe_err; |
1243 | 1218 | ||
1244 | dbg("%s: adding port\n", __func__); | 1219 | dbg("%s: adding port\n", __func__); |
1245 | uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); | 1220 | uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); |
1246 | platform_set_drvdata(dev, &ourport->port); | 1221 | platform_set_drvdata(pdev, &ourport->port); |
1247 | 1222 | ||
1248 | ret = device_create_file(&dev->dev, &dev_attr_clock_source); | 1223 | ret = device_create_file(&pdev->dev, &dev_attr_clock_source); |
1249 | if (ret < 0) | 1224 | if (ret < 0) |
1250 | printk(KERN_ERR "%s: failed to add clksrc attr.\n", __func__); | 1225 | dev_err(&pdev->dev, "failed to add clock source attr.\n"); |
1251 | 1226 | ||
1252 | ret = s3c24xx_serial_cpufreq_register(ourport); | 1227 | ret = s3c24xx_serial_cpufreq_register(ourport); |
1253 | if (ret < 0) | 1228 | if (ret < 0) |
1254 | dev_err(&dev->dev, "failed to add cpufreq notifier\n"); | 1229 | dev_err(&pdev->dev, "failed to add cpufreq notifier\n"); |
1255 | 1230 | ||
1256 | return 0; | 1231 | return 0; |
1257 | 1232 | ||
@@ -1259,9 +1234,7 @@ int s3c24xx_serial_probe(struct platform_device *dev, | |||
1259 | return ret; | 1234 | return ret; |
1260 | } | 1235 | } |
1261 | 1236 | ||
1262 | EXPORT_SYMBOL_GPL(s3c24xx_serial_probe); | 1237 | static int __devexit s3c24xx_serial_remove(struct platform_device *dev) |
1263 | |||
1264 | int __devexit s3c24xx_serial_remove(struct platform_device *dev) | ||
1265 | { | 1238 | { |
1266 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | 1239 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); |
1267 | 1240 | ||
@@ -1274,8 +1247,6 @@ int __devexit s3c24xx_serial_remove(struct platform_device *dev) | |||
1274 | return 0; | 1247 | return 0; |
1275 | } | 1248 | } |
1276 | 1249 | ||
1277 | EXPORT_SYMBOL_GPL(s3c24xx_serial_remove); | ||
1278 | |||
1279 | /* UART power management code */ | 1250 | /* UART power management code */ |
1280 | #ifdef CONFIG_PM_SLEEP | 1251 | #ifdef CONFIG_PM_SLEEP |
1281 | static int s3c24xx_serial_suspend(struct device *dev) | 1252 | static int s3c24xx_serial_suspend(struct device *dev) |
@@ -1315,41 +1286,6 @@ static const struct dev_pm_ops s3c24xx_serial_pm_ops = { | |||
1315 | #define SERIAL_SAMSUNG_PM_OPS NULL | 1286 | #define SERIAL_SAMSUNG_PM_OPS NULL |
1316 | #endif /* CONFIG_PM_SLEEP */ | 1287 | #endif /* CONFIG_PM_SLEEP */ |
1317 | 1288 | ||
1318 | int s3c24xx_serial_init(struct platform_driver *drv, | ||
1319 | struct s3c24xx_uart_info *info) | ||
1320 | { | ||
1321 | dbg("s3c24xx_serial_init(%p,%p)\n", drv, info); | ||
1322 | |||
1323 | drv->driver.pm = SERIAL_SAMSUNG_PM_OPS; | ||
1324 | |||
1325 | return platform_driver_register(drv); | ||
1326 | } | ||
1327 | |||
1328 | EXPORT_SYMBOL_GPL(s3c24xx_serial_init); | ||
1329 | |||
1330 | /* module initialisation code */ | ||
1331 | |||
1332 | static int __init s3c24xx_serial_modinit(void) | ||
1333 | { | ||
1334 | int ret; | ||
1335 | |||
1336 | ret = uart_register_driver(&s3c24xx_uart_drv); | ||
1337 | if (ret < 0) { | ||
1338 | printk(KERN_ERR "failed to register UART driver\n"); | ||
1339 | return -1; | ||
1340 | } | ||
1341 | |||
1342 | return 0; | ||
1343 | } | ||
1344 | |||
1345 | static void __exit s3c24xx_serial_modexit(void) | ||
1346 | { | ||
1347 | uart_unregister_driver(&s3c24xx_uart_drv); | ||
1348 | } | ||
1349 | |||
1350 | module_init(s3c24xx_serial_modinit); | ||
1351 | module_exit(s3c24xx_serial_modexit); | ||
1352 | |||
1353 | /* Console code */ | 1289 | /* Console code */ |
1354 | 1290 | ||
1355 | #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE | 1291 | #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE |
@@ -1395,12 +1331,13 @@ static void __init | |||
1395 | s3c24xx_serial_get_options(struct uart_port *port, int *baud, | 1331 | s3c24xx_serial_get_options(struct uart_port *port, int *baud, |
1396 | int *parity, int *bits) | 1332 | int *parity, int *bits) |
1397 | { | 1333 | { |
1398 | struct s3c24xx_uart_clksrc clksrc; | ||
1399 | struct clk *clk; | 1334 | struct clk *clk; |
1400 | unsigned int ulcon; | 1335 | unsigned int ulcon; |
1401 | unsigned int ucon; | 1336 | unsigned int ucon; |
1402 | unsigned int ubrdiv; | 1337 | unsigned int ubrdiv; |
1403 | unsigned long rate; | 1338 | unsigned long rate; |
1339 | unsigned int clk_sel; | ||
1340 | char clk_name[MAX_CLK_NAME_LENGTH]; | ||
1404 | 1341 | ||
1405 | ulcon = rd_regl(port, S3C2410_ULCON); | 1342 | ulcon = rd_regl(port, S3C2410_ULCON); |
1406 | ucon = rd_regl(port, S3C2410_UCON); | 1343 | ucon = rd_regl(port, S3C2410_UCON); |
@@ -1445,44 +1382,21 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud, | |||
1445 | 1382 | ||
1446 | /* now calculate the baud rate */ | 1383 | /* now calculate the baud rate */ |
1447 | 1384 | ||
1448 | s3c24xx_serial_getsource(port, &clksrc); | 1385 | clk_sel = s3c24xx_serial_getsource(port); |
1386 | sprintf(clk_name, "clk_uart_baud%d", clk_sel); | ||
1449 | 1387 | ||
1450 | clk = clk_get(port->dev, clksrc.name); | 1388 | clk = clk_get(port->dev, clk_name); |
1451 | if (!IS_ERR(clk) && clk != NULL) | 1389 | if (!IS_ERR(clk) && clk != NULL) |
1452 | rate = clk_get_rate(clk) / clksrc.divisor; | 1390 | rate = clk_get_rate(clk); |
1453 | else | 1391 | else |
1454 | rate = 1; | 1392 | rate = 1; |
1455 | 1393 | ||
1456 | |||
1457 | *baud = rate / (16 * (ubrdiv + 1)); | 1394 | *baud = rate / (16 * (ubrdiv + 1)); |
1458 | dbg("calculated baud %d\n", *baud); | 1395 | dbg("calculated baud %d\n", *baud); |
1459 | } | 1396 | } |
1460 | 1397 | ||
1461 | } | 1398 | } |
1462 | 1399 | ||
1463 | /* s3c24xx_serial_init_ports | ||
1464 | * | ||
1465 | * initialise the serial ports from the machine provided initialisation | ||
1466 | * data. | ||
1467 | */ | ||
1468 | |||
1469 | static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info) | ||
1470 | { | ||
1471 | struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports; | ||
1472 | struct platform_device **platdev_ptr; | ||
1473 | int i; | ||
1474 | |||
1475 | dbg("s3c24xx_serial_init_ports: initialising ports...\n"); | ||
1476 | |||
1477 | platdev_ptr = s3c24xx_uart_devs; | ||
1478 | |||
1479 | for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) { | ||
1480 | s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr); | ||
1481 | } | ||
1482 | |||
1483 | return 0; | ||
1484 | } | ||
1485 | |||
1486 | static int __init | 1400 | static int __init |
1487 | s3c24xx_serial_console_setup(struct console *co, char *options) | 1401 | s3c24xx_serial_console_setup(struct console *co, char *options) |
1488 | { | 1402 | { |
@@ -1526,11 +1440,6 @@ s3c24xx_serial_console_setup(struct console *co, char *options) | |||
1526 | return uart_set_options(port, co, baud, parity, bits, flow); | 1440 | return uart_set_options(port, co, baud, parity, bits, flow); |
1527 | } | 1441 | } |
1528 | 1442 | ||
1529 | /* s3c24xx_serial_initconsole | ||
1530 | * | ||
1531 | * initialise the console from one of the uart drivers | ||
1532 | */ | ||
1533 | |||
1534 | static struct console s3c24xx_serial_console = { | 1443 | static struct console s3c24xx_serial_console = { |
1535 | .name = S3C24XX_SERIAL_NAME, | 1444 | .name = S3C24XX_SERIAL_NAME, |
1536 | .device = uart_console_device, | 1445 | .device = uart_console_device, |
@@ -1540,34 +1449,250 @@ static struct console s3c24xx_serial_console = { | |||
1540 | .setup = s3c24xx_serial_console_setup, | 1449 | .setup = s3c24xx_serial_console_setup, |
1541 | .data = &s3c24xx_uart_drv, | 1450 | .data = &s3c24xx_uart_drv, |
1542 | }; | 1451 | }; |
1452 | #endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */ | ||
1543 | 1453 | ||
1544 | int s3c24xx_serial_initconsole(struct platform_driver *drv, | 1454 | #ifdef CONFIG_CPU_S3C2410 |
1545 | struct s3c24xx_uart_info **info) | 1455 | static struct s3c24xx_serial_drv_data s3c2410_serial_drv_data = { |
1456 | .info = &(struct s3c24xx_uart_info) { | ||
1457 | .name = "Samsung S3C2410 UART", | ||
1458 | .type = PORT_S3C2410, | ||
1459 | .fifosize = 16, | ||
1460 | .rx_fifomask = S3C2410_UFSTAT_RXMASK, | ||
1461 | .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, | ||
1462 | .rx_fifofull = S3C2410_UFSTAT_RXFULL, | ||
1463 | .tx_fifofull = S3C2410_UFSTAT_TXFULL, | ||
1464 | .tx_fifomask = S3C2410_UFSTAT_TXMASK, | ||
1465 | .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT, | ||
1466 | .def_clk_sel = S3C2410_UCON_CLKSEL0, | ||
1467 | .num_clks = 2, | ||
1468 | .clksel_mask = S3C2410_UCON_CLKMASK, | ||
1469 | .clksel_shift = S3C2410_UCON_CLKSHIFT, | ||
1470 | }, | ||
1471 | .def_cfg = &(struct s3c2410_uartcfg) { | ||
1472 | .ucon = S3C2410_UCON_DEFAULT, | ||
1473 | .ufcon = S3C2410_UFCON_DEFAULT, | ||
1474 | }, | ||
1475 | }; | ||
1476 | #define S3C2410_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2410_serial_drv_data) | ||
1477 | #else | ||
1478 | #define S3C2410_SERIAL_DRV_DATA (kernel_ulong_t)NULL | ||
1479 | #endif | ||
1546 | 1480 | ||
1547 | { | 1481 | #ifdef CONFIG_CPU_S3C2412 |
1548 | struct platform_device *dev = s3c24xx_uart_devs[0]; | 1482 | static struct s3c24xx_serial_drv_data s3c2412_serial_drv_data = { |
1483 | .info = &(struct s3c24xx_uart_info) { | ||
1484 | .name = "Samsung S3C2412 UART", | ||
1485 | .type = PORT_S3C2412, | ||
1486 | .fifosize = 64, | ||
1487 | .has_divslot = 1, | ||
1488 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
1489 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
1490 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
1491 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
1492 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
1493 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
1494 | .def_clk_sel = S3C2410_UCON_CLKSEL2, | ||
1495 | .num_clks = 4, | ||
1496 | .clksel_mask = S3C2412_UCON_CLKMASK, | ||
1497 | .clksel_shift = S3C2412_UCON_CLKSHIFT, | ||
1498 | }, | ||
1499 | .def_cfg = &(struct s3c2410_uartcfg) { | ||
1500 | .ucon = S3C2410_UCON_DEFAULT, | ||
1501 | .ufcon = S3C2410_UFCON_DEFAULT, | ||
1502 | }, | ||
1503 | }; | ||
1504 | #define S3C2412_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2412_serial_drv_data) | ||
1505 | #else | ||
1506 | #define S3C2412_SERIAL_DRV_DATA (kernel_ulong_t)NULL | ||
1507 | #endif | ||
1549 | 1508 | ||
1550 | dbg("s3c24xx_serial_initconsole\n"); | 1509 | #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2416) || \ |
1510 | defined(CONFIG_CPU_S3C2443) | ||
1511 | static struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = { | ||
1512 | .info = &(struct s3c24xx_uart_info) { | ||
1513 | .name = "Samsung S3C2440 UART", | ||
1514 | .type = PORT_S3C2440, | ||
1515 | .fifosize = 64, | ||
1516 | .has_divslot = 1, | ||
1517 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
1518 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
1519 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
1520 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
1521 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
1522 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
1523 | .def_clk_sel = S3C2410_UCON_CLKSEL2, | ||
1524 | .num_clks = 4, | ||
1525 | .clksel_mask = S3C2412_UCON_CLKMASK, | ||
1526 | .clksel_shift = S3C2412_UCON_CLKSHIFT, | ||
1527 | }, | ||
1528 | .def_cfg = &(struct s3c2410_uartcfg) { | ||
1529 | .ucon = S3C2410_UCON_DEFAULT, | ||
1530 | .ufcon = S3C2410_UFCON_DEFAULT, | ||
1531 | }, | ||
1532 | }; | ||
1533 | #define S3C2440_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2440_serial_drv_data) | ||
1534 | #else | ||
1535 | #define S3C2440_SERIAL_DRV_DATA (kernel_ulong_t)NULL | ||
1536 | #endif | ||
1551 | 1537 | ||
1552 | /* select driver based on the cpu */ | 1538 | #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) || \ |
1539 | defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) || \ | ||
1540 | defined(CONFIG_CPU_S5PC100) | ||
1541 | static struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = { | ||
1542 | .info = &(struct s3c24xx_uart_info) { | ||
1543 | .name = "Samsung S3C6400 UART", | ||
1544 | .type = PORT_S3C6400, | ||
1545 | .fifosize = 64, | ||
1546 | .has_divslot = 1, | ||
1547 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
1548 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
1549 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
1550 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
1551 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
1552 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
1553 | .def_clk_sel = S3C2410_UCON_CLKSEL2, | ||
1554 | .num_clks = 4, | ||
1555 | .clksel_mask = S3C6400_UCON_CLKMASK, | ||
1556 | .clksel_shift = S3C6400_UCON_CLKSHIFT, | ||
1557 | }, | ||
1558 | .def_cfg = &(struct s3c2410_uartcfg) { | ||
1559 | .ucon = S3C2410_UCON_DEFAULT, | ||
1560 | .ufcon = S3C2410_UFCON_DEFAULT, | ||
1561 | }, | ||
1562 | }; | ||
1563 | #define S3C6400_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c6400_serial_drv_data) | ||
1564 | #else | ||
1565 | #define S3C6400_SERIAL_DRV_DATA (kernel_ulong_t)NULL | ||
1566 | #endif | ||
1553 | 1567 | ||
1554 | if (dev == NULL) { | 1568 | #ifdef CONFIG_CPU_S5PV210 |
1555 | printk(KERN_ERR "s3c24xx: no devices for console init\n"); | 1569 | static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { |
1556 | return 0; | 1570 | .info = &(struct s3c24xx_uart_info) { |
1557 | } | 1571 | .name = "Samsung S5PV210 UART", |
1572 | .type = PORT_S3C6400, | ||
1573 | .has_divslot = 1, | ||
1574 | .rx_fifomask = S5PV210_UFSTAT_RXMASK, | ||
1575 | .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, | ||
1576 | .rx_fifofull = S5PV210_UFSTAT_RXFULL, | ||
1577 | .tx_fifofull = S5PV210_UFSTAT_TXFULL, | ||
1578 | .tx_fifomask = S5PV210_UFSTAT_TXMASK, | ||
1579 | .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, | ||
1580 | .def_clk_sel = S3C2410_UCON_CLKSEL0, | ||
1581 | .num_clks = 2, | ||
1582 | .clksel_mask = S5PV210_UCON_CLKMASK, | ||
1583 | .clksel_shift = S5PV210_UCON_CLKSHIFT, | ||
1584 | }, | ||
1585 | .def_cfg = &(struct s3c2410_uartcfg) { | ||
1586 | .ucon = S5PV210_UCON_DEFAULT, | ||
1587 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
1588 | }, | ||
1589 | .fifosize = { 256, 64, 16, 16 }, | ||
1590 | }; | ||
1591 | #define S5PV210_SERIAL_DRV_DATA ((kernel_ulong_t)&s5pv210_serial_drv_data) | ||
1592 | #else | ||
1593 | #define S5PV210_SERIAL_DRV_DATA (kernel_ulong_t)NULL | ||
1594 | #endif | ||
1558 | 1595 | ||
1559 | if (strcmp(dev->name, drv->driver.name) != 0) | 1596 | #ifdef CONFIG_CPU_EXYNOS4210 |
1560 | return 0; | 1597 | static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = { |
1598 | .info = &(struct s3c24xx_uart_info) { | ||
1599 | .name = "Samsung Exynos4 UART", | ||
1600 | .type = PORT_S3C6400, | ||
1601 | .has_divslot = 1, | ||
1602 | .rx_fifomask = S5PV210_UFSTAT_RXMASK, | ||
1603 | .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, | ||
1604 | .rx_fifofull = S5PV210_UFSTAT_RXFULL, | ||
1605 | .tx_fifofull = S5PV210_UFSTAT_TXFULL, | ||
1606 | .tx_fifomask = S5PV210_UFSTAT_TXMASK, | ||
1607 | .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, | ||
1608 | .def_clk_sel = S3C2410_UCON_CLKSEL0, | ||
1609 | .num_clks = 1, | ||
1610 | .clksel_mask = 0, | ||
1611 | .clksel_shift = 0, | ||
1612 | }, | ||
1613 | .def_cfg = &(struct s3c2410_uartcfg) { | ||
1614 | .ucon = S5PV210_UCON_DEFAULT, | ||
1615 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
1616 | .has_fracval = 1, | ||
1617 | }, | ||
1618 | .fifosize = { 256, 64, 16, 16 }, | ||
1619 | }; | ||
1620 | #define EXYNOS4210_SERIAL_DRV_DATA ((kernel_ulong_t)&exynos4210_serial_drv_data) | ||
1621 | #else | ||
1622 | #define EXYNOS4210_SERIAL_DRV_DATA (kernel_ulong_t)NULL | ||
1623 | #endif | ||
1561 | 1624 | ||
1562 | s3c24xx_serial_console.data = &s3c24xx_uart_drv; | 1625 | static struct platform_device_id s3c24xx_serial_driver_ids[] = { |
1563 | s3c24xx_serial_init_ports(info); | 1626 | { |
1627 | .name = "s3c2410-uart", | ||
1628 | .driver_data = S3C2410_SERIAL_DRV_DATA, | ||
1629 | }, { | ||
1630 | .name = "s3c2412-uart", | ||
1631 | .driver_data = S3C2412_SERIAL_DRV_DATA, | ||
1632 | }, { | ||
1633 | .name = "s3c2440-uart", | ||
1634 | .driver_data = S3C2440_SERIAL_DRV_DATA, | ||
1635 | }, { | ||
1636 | .name = "s3c6400-uart", | ||
1637 | .driver_data = S3C6400_SERIAL_DRV_DATA, | ||
1638 | }, { | ||
1639 | .name = "s5pv210-uart", | ||
1640 | .driver_data = S5PV210_SERIAL_DRV_DATA, | ||
1641 | }, { | ||
1642 | .name = "exynos4210-uart", | ||
1643 | .driver_data = EXYNOS4210_SERIAL_DRV_DATA, | ||
1644 | }, | ||
1645 | { }, | ||
1646 | }; | ||
1647 | MODULE_DEVICE_TABLE(platform, s3c24xx_serial_driver_ids); | ||
1564 | 1648 | ||
1565 | register_console(&s3c24xx_serial_console); | 1649 | #ifdef CONFIG_OF |
1566 | return 0; | 1650 | static const struct of_device_id s3c24xx_uart_dt_match[] = { |
1651 | { .compatible = "samsung,exynos4210-uart", | ||
1652 | .data = (void *)EXYNOS4210_SERIAL_DRV_DATA }, | ||
1653 | {}, | ||
1654 | }; | ||
1655 | MODULE_DEVICE_TABLE(of, s3c24xx_uart_dt_match); | ||
1656 | #else | ||
1657 | #define s3c24xx_uart_dt_match NULL | ||
1658 | #endif | ||
1659 | |||
1660 | static struct platform_driver samsung_serial_driver = { | ||
1661 | .probe = s3c24xx_serial_probe, | ||
1662 | .remove = __devexit_p(s3c24xx_serial_remove), | ||
1663 | .id_table = s3c24xx_serial_driver_ids, | ||
1664 | .driver = { | ||
1665 | .name = "samsung-uart", | ||
1666 | .owner = THIS_MODULE, | ||
1667 | .pm = SERIAL_SAMSUNG_PM_OPS, | ||
1668 | .of_match_table = s3c24xx_uart_dt_match, | ||
1669 | }, | ||
1670 | }; | ||
1671 | |||
1672 | /* module initialisation code */ | ||
1673 | |||
1674 | static int __init s3c24xx_serial_modinit(void) | ||
1675 | { | ||
1676 | int ret; | ||
1677 | |||
1678 | ret = uart_register_driver(&s3c24xx_uart_drv); | ||
1679 | if (ret < 0) { | ||
1680 | printk(KERN_ERR "failed to register UART driver\n"); | ||
1681 | return -1; | ||
1682 | } | ||
1683 | |||
1684 | return platform_driver_register(&samsung_serial_driver); | ||
1567 | } | 1685 | } |
1568 | 1686 | ||
1569 | #endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */ | 1687 | static void __exit s3c24xx_serial_modexit(void) |
1688 | { | ||
1689 | uart_unregister_driver(&s3c24xx_uart_drv); | ||
1690 | } | ||
1691 | |||
1692 | module_init(s3c24xx_serial_modinit); | ||
1693 | module_exit(s3c24xx_serial_modexit); | ||
1570 | 1694 | ||
1695 | MODULE_ALIAS("platform:samsung-uart"); | ||
1571 | MODULE_DESCRIPTION("Samsung SoC Serial port driver"); | 1696 | MODULE_DESCRIPTION("Samsung SoC Serial port driver"); |
1572 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | 1697 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); |
1573 | MODULE_LICENSE("GPL v2"); | 1698 | MODULE_LICENSE("GPL v2"); |
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h index 8e87b788e5c6..1a4bca3e4179 100644 --- a/drivers/tty/serial/samsung.h +++ b/drivers/tty/serial/samsung.h | |||
@@ -19,20 +19,25 @@ struct s3c24xx_uart_info { | |||
19 | unsigned long tx_fifomask; | 19 | unsigned long tx_fifomask; |
20 | unsigned long tx_fifoshift; | 20 | unsigned long tx_fifoshift; |
21 | unsigned long tx_fifofull; | 21 | unsigned long tx_fifofull; |
22 | unsigned int def_clk_sel; | ||
23 | unsigned long num_clks; | ||
24 | unsigned long clksel_mask; | ||
25 | unsigned long clksel_shift; | ||
22 | 26 | ||
23 | /* uart port features */ | 27 | /* uart port features */ |
24 | 28 | ||
25 | unsigned int has_divslot:1; | 29 | unsigned int has_divslot:1; |
26 | 30 | ||
27 | /* clock source control */ | ||
28 | |||
29 | int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); | ||
30 | int (*set_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); | ||
31 | |||
32 | /* uart controls */ | 31 | /* uart controls */ |
33 | int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); | 32 | int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); |
34 | }; | 33 | }; |
35 | 34 | ||
35 | struct s3c24xx_serial_drv_data { | ||
36 | struct s3c24xx_uart_info *info; | ||
37 | struct s3c2410_uartcfg *def_cfg; | ||
38 | unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS]; | ||
39 | }; | ||
40 | |||
36 | struct s3c24xx_uart_port { | 41 | struct s3c24xx_uart_port { |
37 | unsigned char rx_claimed; | 42 | unsigned char rx_claimed; |
38 | unsigned char tx_claimed; | 43 | unsigned char tx_claimed; |
@@ -43,10 +48,13 @@ struct s3c24xx_uart_port { | |||
43 | unsigned int tx_irq; | 48 | unsigned int tx_irq; |
44 | 49 | ||
45 | struct s3c24xx_uart_info *info; | 50 | struct s3c24xx_uart_info *info; |
46 | struct s3c24xx_uart_clksrc *clksrc; | ||
47 | struct clk *clk; | 51 | struct clk *clk; |
48 | struct clk *baudclk; | 52 | struct clk *baudclk; |
49 | struct uart_port port; | 53 | struct uart_port port; |
54 | struct s3c24xx_serial_drv_data *drv_data; | ||
55 | |||
56 | /* reference to platform data */ | ||
57 | struct s3c2410_uartcfg *cfg; | ||
50 | 58 | ||
51 | #ifdef CONFIG_CPU_FREQ | 59 | #ifdef CONFIG_CPU_FREQ |
52 | struct notifier_block freq_transition; | 60 | struct notifier_block freq_transition; |
@@ -56,7 +64,6 @@ struct s3c24xx_uart_port { | |||
56 | /* conversion functions */ | 64 | /* conversion functions */ |
57 | 65 | ||
58 | #define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) | 66 | #define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) |
59 | #define s3c24xx_dev_to_cfg(__dev) (struct s3c2410_uartcfg *)((__dev)->platform_data) | ||
60 | 67 | ||
61 | /* register access controls */ | 68 | /* register access controls */ |
62 | 69 | ||
@@ -69,17 +76,6 @@ struct s3c24xx_uart_port { | |||
69 | #define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg)) | 76 | #define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg)) |
70 | #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) | 77 | #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) |
71 | 78 | ||
72 | extern int s3c24xx_serial_probe(struct platform_device *dev, | ||
73 | struct s3c24xx_uart_info *uart); | ||
74 | |||
75 | extern int __devexit s3c24xx_serial_remove(struct platform_device *dev); | ||
76 | |||
77 | extern int s3c24xx_serial_initconsole(struct platform_driver *drv, | ||
78 | struct s3c24xx_uart_info **uart); | ||
79 | |||
80 | extern int s3c24xx_serial_init(struct platform_driver *drv, | ||
81 | struct s3c24xx_uart_info *info); | ||
82 | |||
83 | #ifdef CONFIG_SERIAL_SAMSUNG_DEBUG | 79 | #ifdef CONFIG_SERIAL_SAMSUNG_DEBUG |
84 | 80 | ||
85 | extern void printascii(const char *); | 81 | extern void printascii(const char *); |
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 717ebc9ff941..600d82348511 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c | |||
@@ -264,7 +264,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc) | |||
264 | ret = -ENODEV; | 264 | ret = -ENODEV; |
265 | goto err0; | 265 | goto err0; |
266 | } | 266 | } |
267 | dwc->revision = reg & DWC3_GSNPSREV_MASK; | 267 | dwc->revision = reg; |
268 | 268 | ||
269 | dwc3_core_soft_reset(dwc); | 269 | dwc3_core_soft_reset(dwc); |
270 | 270 | ||
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 8efe0fa9228d..1ed56d8492d7 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c | |||
@@ -1748,7 +1748,7 @@ static int __init at91udc_probe(struct platform_device *pdev) | |||
1748 | 1748 | ||
1749 | /* rm9200 needs manual D+ pullup; off by default */ | 1749 | /* rm9200 needs manual D+ pullup; off by default */ |
1750 | if (cpu_is_at91rm9200()) { | 1750 | if (cpu_is_at91rm9200()) { |
1751 | if (udc->board.pullup_pin <= 0) { | 1751 | if (gpio_is_valid(udc->board.pullup_pin)) { |
1752 | DBG("no D+ pullup?\n"); | 1752 | DBG("no D+ pullup?\n"); |
1753 | retval = -ENODEV; | 1753 | retval = -ENODEV; |
1754 | goto fail0; | 1754 | goto fail0; |
@@ -1815,7 +1815,7 @@ static int __init at91udc_probe(struct platform_device *pdev) | |||
1815 | DBG("request irq %d failed\n", udc->udp_irq); | 1815 | DBG("request irq %d failed\n", udc->udp_irq); |
1816 | goto fail1; | 1816 | goto fail1; |
1817 | } | 1817 | } |
1818 | if (udc->board.vbus_pin > 0) { | 1818 | if (gpio_is_valid(udc->board.vbus_pin)) { |
1819 | retval = gpio_request(udc->board.vbus_pin, "udc_vbus"); | 1819 | retval = gpio_request(udc->board.vbus_pin, "udc_vbus"); |
1820 | if (retval < 0) { | 1820 | if (retval < 0) { |
1821 | DBG("request vbus pin failed\n"); | 1821 | DBG("request vbus pin failed\n"); |
@@ -1859,10 +1859,10 @@ static int __init at91udc_probe(struct platform_device *pdev) | |||
1859 | INFO("%s version %s\n", driver_name, DRIVER_VERSION); | 1859 | INFO("%s version %s\n", driver_name, DRIVER_VERSION); |
1860 | return 0; | 1860 | return 0; |
1861 | fail4: | 1861 | fail4: |
1862 | if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled) | 1862 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled) |
1863 | free_irq(udc->board.vbus_pin, udc); | 1863 | free_irq(udc->board.vbus_pin, udc); |
1864 | fail3: | 1864 | fail3: |
1865 | if (udc->board.vbus_pin > 0) | 1865 | if (gpio_is_valid(udc->board.vbus_pin)) |
1866 | gpio_free(udc->board.vbus_pin); | 1866 | gpio_free(udc->board.vbus_pin); |
1867 | fail2: | 1867 | fail2: |
1868 | free_irq(udc->udp_irq, udc); | 1868 | free_irq(udc->udp_irq, udc); |
@@ -1897,7 +1897,7 @@ static int __exit at91udc_remove(struct platform_device *pdev) | |||
1897 | 1897 | ||
1898 | device_init_wakeup(&pdev->dev, 0); | 1898 | device_init_wakeup(&pdev->dev, 0); |
1899 | remove_debug_file(udc); | 1899 | remove_debug_file(udc); |
1900 | if (udc->board.vbus_pin > 0) { | 1900 | if (gpio_is_valid(udc->board.vbus_pin)) { |
1901 | free_irq(udc->board.vbus_pin, udc); | 1901 | free_irq(udc->board.vbus_pin, udc); |
1902 | gpio_free(udc->board.vbus_pin); | 1902 | gpio_free(udc->board.vbus_pin); |
1903 | } | 1903 | } |
@@ -1941,7 +1941,7 @@ static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) | |||
1941 | enable_irq_wake(udc->udp_irq); | 1941 | enable_irq_wake(udc->udp_irq); |
1942 | 1942 | ||
1943 | udc->active_suspend = wake; | 1943 | udc->active_suspend = wake; |
1944 | if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && wake) | 1944 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && wake) |
1945 | enable_irq_wake(udc->board.vbus_pin); | 1945 | enable_irq_wake(udc->board.vbus_pin); |
1946 | return 0; | 1946 | return 0; |
1947 | } | 1947 | } |
@@ -1951,7 +1951,7 @@ static int at91udc_resume(struct platform_device *pdev) | |||
1951 | struct at91_udc *udc = platform_get_drvdata(pdev); | 1951 | struct at91_udc *udc = platform_get_drvdata(pdev); |
1952 | unsigned long flags; | 1952 | unsigned long flags; |
1953 | 1953 | ||
1954 | if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && | 1954 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && |
1955 | udc->active_suspend) | 1955 | udc->active_suspend) |
1956 | disable_irq_wake(udc->board.vbus_pin); | 1956 | disable_irq_wake(udc->board.vbus_pin); |
1957 | 1957 | ||
diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index 596a0b464e61..4dff83d2f265 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c | |||
@@ -130,9 +130,6 @@ ep_matches ( | |||
130 | num_req_streams = ep_comp->bmAttributes & 0x1f; | 130 | num_req_streams = ep_comp->bmAttributes & 0x1f; |
131 | if (num_req_streams > ep->max_streams) | 131 | if (num_req_streams > ep->max_streams) |
132 | return 0; | 132 | return 0; |
133 | /* Update the ep_comp descriptor if needed */ | ||
134 | if (num_req_streams != ep->max_streams) | ||
135 | ep_comp->bmAttributes = ep->max_streams; | ||
136 | } | 133 | } |
137 | 134 | ||
138 | } | 135 | } |
diff --git a/drivers/usb/host/isp1760-if.c b/drivers/usb/host/isp1760-if.c index a7dc1e1d45f2..2ac4ac2e4ef9 100644 --- a/drivers/usb/host/isp1760-if.c +++ b/drivers/usb/host/isp1760-if.c | |||
@@ -18,7 +18,7 @@ | |||
18 | 18 | ||
19 | #include "isp1760-hcd.h" | 19 | #include "isp1760-hcd.h" |
20 | 20 | ||
21 | #ifdef CONFIG_OF | 21 | #if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) |
22 | #include <linux/slab.h> | 22 | #include <linux/slab.h> |
23 | #include <linux/of.h> | 23 | #include <linux/of.h> |
24 | #include <linux/of_platform.h> | 24 | #include <linux/of_platform.h> |
@@ -31,7 +31,7 @@ | |||
31 | #include <linux/pci.h> | 31 | #include <linux/pci.h> |
32 | #endif | 32 | #endif |
33 | 33 | ||
34 | #ifdef CONFIG_OF | 34 | #if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) |
35 | struct isp1760 { | 35 | struct isp1760 { |
36 | struct usb_hcd *hcd; | 36 | struct usb_hcd *hcd; |
37 | int rst_gpio; | 37 | int rst_gpio; |
@@ -437,7 +437,7 @@ static int __init isp1760_init(void) | |||
437 | ret = platform_driver_register(&isp1760_plat_driver); | 437 | ret = platform_driver_register(&isp1760_plat_driver); |
438 | if (!ret) | 438 | if (!ret) |
439 | any_ret = 0; | 439 | any_ret = 0; |
440 | #ifdef CONFIG_OF | 440 | #if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) |
441 | ret = platform_driver_register(&isp1760_of_driver); | 441 | ret = platform_driver_register(&isp1760_of_driver); |
442 | if (!ret) | 442 | if (!ret) |
443 | any_ret = 0; | 443 | any_ret = 0; |
@@ -457,7 +457,7 @@ module_init(isp1760_init); | |||
457 | static void __exit isp1760_exit(void) | 457 | static void __exit isp1760_exit(void) |
458 | { | 458 | { |
459 | platform_driver_unregister(&isp1760_plat_driver); | 459 | platform_driver_unregister(&isp1760_plat_driver); |
460 | #ifdef CONFIG_OF | 460 | #if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) |
461 | platform_driver_unregister(&isp1760_of_driver); | 461 | platform_driver_unregister(&isp1760_of_driver); |
462 | #endif | 462 | #endif |
463 | #ifdef CONFIG_PCI | 463 | #ifdef CONFIG_PCI |
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 95a9fec38e89..5df0b0e3392b 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c | |||
@@ -223,7 +223,7 @@ static void ohci_at91_usb_set_power(struct at91_usbh_data *pdata, int port, int | |||
223 | if (port < 0 || port >= 2) | 223 | if (port < 0 || port >= 2) |
224 | return; | 224 | return; |
225 | 225 | ||
226 | if (pdata->vbus_pin[port] <= 0) | 226 | if (!gpio_is_valid(pdata->vbus_pin[port])) |
227 | return; | 227 | return; |
228 | 228 | ||
229 | gpio_set_value(pdata->vbus_pin[port], !pdata->vbus_pin_inverted ^ enable); | 229 | gpio_set_value(pdata->vbus_pin[port], !pdata->vbus_pin_inverted ^ enable); |
@@ -234,7 +234,7 @@ static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port) | |||
234 | if (port < 0 || port >= 2) | 234 | if (port < 0 || port >= 2) |
235 | return -EINVAL; | 235 | return -EINVAL; |
236 | 236 | ||
237 | if (pdata->vbus_pin[port] <= 0) | 237 | if (!gpio_is_valid(pdata->vbus_pin[port])) |
238 | return -EINVAL; | 238 | return -EINVAL; |
239 | 239 | ||
240 | return gpio_get_value(pdata->vbus_pin[port]) ^ !pdata->vbus_pin_inverted; | 240 | return gpio_get_value(pdata->vbus_pin[port]) ^ !pdata->vbus_pin_inverted; |
@@ -465,7 +465,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev) | |||
465 | 465 | ||
466 | if (pdata) { | 466 | if (pdata) { |
467 | for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { | 467 | for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { |
468 | if (pdata->vbus_pin[i] <= 0) | 468 | if (!gpio_is_valid(pdata->vbus_pin[i])) |
469 | continue; | 469 | continue; |
470 | gpio_request(pdata->vbus_pin[i], "ohci_vbus"); | 470 | gpio_request(pdata->vbus_pin[i], "ohci_vbus"); |
471 | ohci_at91_usb_set_power(pdata, i, 1); | 471 | ohci_at91_usb_set_power(pdata, i, 1); |
@@ -474,7 +474,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev) | |||
474 | for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { | 474 | for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { |
475 | int ret; | 475 | int ret; |
476 | 476 | ||
477 | if (pdata->overcurrent_pin[i] <= 0) | 477 | if (!gpio_is_valid(pdata->overcurrent_pin[i])) |
478 | continue; | 478 | continue; |
479 | gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent"); | 479 | gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent"); |
480 | 480 | ||
@@ -499,14 +499,14 @@ static int ohci_hcd_at91_drv_remove(struct platform_device *pdev) | |||
499 | 499 | ||
500 | if (pdata) { | 500 | if (pdata) { |
501 | for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { | 501 | for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { |
502 | if (pdata->vbus_pin[i] <= 0) | 502 | if (!gpio_is_valid(pdata->vbus_pin[i])) |
503 | continue; | 503 | continue; |
504 | ohci_at91_usb_set_power(pdata, i, 0); | 504 | ohci_at91_usb_set_power(pdata, i, 0); |
505 | gpio_free(pdata->vbus_pin[i]); | 505 | gpio_free(pdata->vbus_pin[i]); |
506 | } | 506 | } |
507 | 507 | ||
508 | for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { | 508 | for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { |
509 | if (pdata->overcurrent_pin[i] <= 0) | 509 | if (!gpio_is_valid(pdata->overcurrent_pin[i])) |
510 | continue; | 510 | continue; |
511 | free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev); | 511 | free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev); |
512 | gpio_free(pdata->overcurrent_pin[i]); | 512 | gpio_free(pdata->overcurrent_pin[i]); |
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c index 60ddba8066ea..79cb0af779fa 100644 --- a/drivers/usb/musb/musb_host.c +++ b/drivers/usb/musb/musb_host.c | |||
@@ -774,6 +774,10 @@ static void musb_ep_program(struct musb *musb, u8 epnum, | |||
774 | if (musb->double_buffer_not_ok) | 774 | if (musb->double_buffer_not_ok) |
775 | musb_writew(epio, MUSB_TXMAXP, | 775 | musb_writew(epio, MUSB_TXMAXP, |
776 | hw_ep->max_packet_sz_tx); | 776 | hw_ep->max_packet_sz_tx); |
777 | else if (can_bulk_split(musb, qh->type)) | ||
778 | musb_writew(epio, MUSB_TXMAXP, packet_sz | ||
779 | | ((hw_ep->max_packet_sz_tx / | ||
780 | packet_sz) - 1) << 11); | ||
777 | else | 781 | else |
778 | musb_writew(epio, MUSB_TXMAXP, | 782 | musb_writew(epio, MUSB_TXMAXP, |
779 | qh->maxpacket | | 783 | qh->maxpacket | |
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c index 87445b2d72a7..00562566ef5f 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c | |||
@@ -35,6 +35,11 @@ | |||
35 | 35 | ||
36 | #define DRV_NAME "AT91SAM9 Watchdog" | 36 | #define DRV_NAME "AT91SAM9 Watchdog" |
37 | 37 | ||
38 | #define wdt_read(field) \ | ||
39 | __raw_readl(at91wdt_private.base + field) | ||
40 | #define wdt_write(field, val) \ | ||
41 | __raw_writel((val), at91wdt_private.base + field) | ||
42 | |||
38 | /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, | 43 | /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, |
39 | * use this to convert a watchdog | 44 | * use this to convert a watchdog |
40 | * value from/to milliseconds. | 45 | * value from/to milliseconds. |
@@ -63,6 +68,7 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " | |||
63 | static void at91_ping(unsigned long data); | 68 | static void at91_ping(unsigned long data); |
64 | 69 | ||
65 | static struct { | 70 | static struct { |
71 | void __iomem *base; | ||
66 | unsigned long next_heartbeat; /* the next_heartbeat for the timer */ | 72 | unsigned long next_heartbeat; /* the next_heartbeat for the timer */ |
67 | unsigned long open; | 73 | unsigned long open; |
68 | char expect_close; | 74 | char expect_close; |
@@ -77,7 +83,7 @@ static struct { | |||
77 | */ | 83 | */ |
78 | static inline void at91_wdt_reset(void) | 84 | static inline void at91_wdt_reset(void) |
79 | { | 85 | { |
80 | at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); | 86 | wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); |
81 | } | 87 | } |
82 | 88 | ||
83 | /* | 89 | /* |
@@ -132,7 +138,7 @@ static int at91_wdt_settimeout(unsigned int timeout) | |||
132 | unsigned int mr; | 138 | unsigned int mr; |
133 | 139 | ||
134 | /* Check if disabled */ | 140 | /* Check if disabled */ |
135 | mr = at91_sys_read(AT91_WDT_MR); | 141 | mr = wdt_read(AT91_WDT_MR); |
136 | if (mr & AT91_WDT_WDDIS) { | 142 | if (mr & AT91_WDT_WDDIS) { |
137 | printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n"); | 143 | printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n"); |
138 | return -EIO; | 144 | return -EIO; |
@@ -149,7 +155,7 @@ static int at91_wdt_settimeout(unsigned int timeout) | |||
149 | | AT91_WDT_WDDBGHLT /* disabled in debug mode */ | 155 | | AT91_WDT_WDDBGHLT /* disabled in debug mode */ |
150 | | AT91_WDT_WDD /* restart at any time */ | 156 | | AT91_WDT_WDD /* restart at any time */ |
151 | | (timeout & AT91_WDT_WDV); /* timer value */ | 157 | | (timeout & AT91_WDT_WDV); /* timer value */ |
152 | at91_sys_write(AT91_WDT_MR, reg); | 158 | wdt_write(AT91_WDT_MR, reg); |
153 | 159 | ||
154 | return 0; | 160 | return 0; |
155 | } | 161 | } |
@@ -248,12 +254,22 @@ static struct miscdevice at91wdt_miscdev = { | |||
248 | 254 | ||
249 | static int __init at91wdt_probe(struct platform_device *pdev) | 255 | static int __init at91wdt_probe(struct platform_device *pdev) |
250 | { | 256 | { |
257 | struct resource *r; | ||
251 | int res; | 258 | int res; |
252 | 259 | ||
253 | if (at91wdt_miscdev.parent) | 260 | if (at91wdt_miscdev.parent) |
254 | return -EBUSY; | 261 | return -EBUSY; |
255 | at91wdt_miscdev.parent = &pdev->dev; | 262 | at91wdt_miscdev.parent = &pdev->dev; |
256 | 263 | ||
264 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
265 | if (!r) | ||
266 | return -ENODEV; | ||
267 | at91wdt_private.base = ioremap(r->start, resource_size(r)); | ||
268 | if (!at91wdt_private.base) { | ||
269 | dev_err(&pdev->dev, "failed to map registers, aborting.\n"); | ||
270 | return -ENOMEM; | ||
271 | } | ||
272 | |||
257 | /* Set watchdog */ | 273 | /* Set watchdog */ |
258 | res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000)); | 274 | res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000)); |
259 | if (res) | 275 | if (res) |
diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h index 757f9cab5c82..c6fbb2e6c41b 100644 --- a/drivers/watchdog/at91sam9_wdt.h +++ b/drivers/watchdog/at91sam9_wdt.h | |||
@@ -16,11 +16,11 @@ | |||
16 | #ifndef AT91_WDT_H | 16 | #ifndef AT91_WDT_H |
17 | #define AT91_WDT_H | 17 | #define AT91_WDT_H |
18 | 18 | ||
19 | #define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ | 19 | #define AT91_WDT_CR 0x00 /* Watchdog Control Register */ |
20 | #define AT91_WDT_WDRSTT (1 << 0) /* Restart */ | 20 | #define AT91_WDT_WDRSTT (1 << 0) /* Restart */ |
21 | #define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ | 21 | #define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ |
22 | 22 | ||
23 | #define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ | 23 | #define AT91_WDT_MR 0x04 /* Watchdog Mode Register */ |
24 | #define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ | 24 | #define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ |
25 | #define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ | 25 | #define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ |
26 | #define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ | 26 | #define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ |
@@ -30,7 +30,7 @@ | |||
30 | #define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ | 30 | #define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ |
31 | #define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ | 31 | #define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ |
32 | 32 | ||
33 | #define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ | 33 | #define AT91_WDT_SR 0x08 /* Watchdog Status Register */ |
34 | #define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ | 34 | #define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ |
35 | #define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ | 35 | #define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ |
36 | 36 | ||
diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c index 03f449a430d2..5b89f7d6cd0f 100644 --- a/drivers/watchdog/coh901327_wdt.c +++ b/drivers/watchdog/coh901327_wdt.c | |||
@@ -76,8 +76,6 @@ static int irq; | |||
76 | static void __iomem *virtbase; | 76 | static void __iomem *virtbase; |
77 | static unsigned long coh901327_users; | 77 | static unsigned long coh901327_users; |
78 | static unsigned long boot_status; | 78 | static unsigned long boot_status; |
79 | static u16 wdogenablestore; | ||
80 | static u16 irqmaskstore; | ||
81 | static struct device *parent; | 79 | static struct device *parent; |
82 | 80 | ||
83 | /* | 81 | /* |
@@ -461,6 +459,10 @@ out: | |||
461 | } | 459 | } |
462 | 460 | ||
463 | #ifdef CONFIG_PM | 461 | #ifdef CONFIG_PM |
462 | |||
463 | static u16 wdogenablestore; | ||
464 | static u16 irqmaskstore; | ||
465 | |||
464 | static int coh901327_suspend(struct platform_device *pdev, pm_message_t state) | 466 | static int coh901327_suspend(struct platform_device *pdev, pm_message_t state) |
465 | { | 467 | { |
466 | irqmaskstore = readw(virtbase + U300_WDOG_IMR) & 0x0001U; | 468 | irqmaskstore = readw(virtbase + U300_WDOG_IMR) & 0x0001U; |
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c index 3774c9b8dac9..8464ea1c36a1 100644 --- a/drivers/watchdog/hpwdt.c +++ b/drivers/watchdog/hpwdt.c | |||
@@ -231,6 +231,7 @@ static int __devinit cru_detect(unsigned long map_entry, | |||
231 | 231 | ||
232 | cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE; | 232 | cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE; |
233 | 233 | ||
234 | set_memory_x((unsigned long)bios32_entrypoint, (2 * PAGE_SIZE)); | ||
234 | asminline_call(&cmn_regs, bios32_entrypoint); | 235 | asminline_call(&cmn_regs, bios32_entrypoint); |
235 | 236 | ||
236 | if (cmn_regs.u1.ral != 0) { | 237 | if (cmn_regs.u1.ral != 0) { |
@@ -248,8 +249,10 @@ static int __devinit cru_detect(unsigned long map_entry, | |||
248 | if ((physical_bios_base + physical_bios_offset)) { | 249 | if ((physical_bios_base + physical_bios_offset)) { |
249 | cru_rom_addr = | 250 | cru_rom_addr = |
250 | ioremap(cru_physical_address, cru_length); | 251 | ioremap(cru_physical_address, cru_length); |
251 | if (cru_rom_addr) | 252 | if (cru_rom_addr) { |
253 | set_memory_x((unsigned long)cru_rom_addr, cru_length); | ||
252 | retval = 0; | 254 | retval = 0; |
255 | } | ||
253 | } | 256 | } |
254 | 257 | ||
255 | printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n", | 258 | printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n", |
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c index ba6ad662635a..99796c5d913d 100644 --- a/drivers/watchdog/iTCO_wdt.c +++ b/drivers/watchdog/iTCO_wdt.c | |||
@@ -384,10 +384,10 @@ MODULE_PARM_DESC(nowayout, | |||
384 | "Watchdog cannot be stopped once started (default=" | 384 | "Watchdog cannot be stopped once started (default=" |
385 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | 385 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
386 | 386 | ||
387 | static int turn_SMI_watchdog_clear_off = 0; | 387 | static int turn_SMI_watchdog_clear_off = 1; |
388 | module_param(turn_SMI_watchdog_clear_off, int, 0); | 388 | module_param(turn_SMI_watchdog_clear_off, int, 0); |
389 | MODULE_PARM_DESC(turn_SMI_watchdog_clear_off, | 389 | MODULE_PARM_DESC(turn_SMI_watchdog_clear_off, |
390 | "Turn off SMI clearing watchdog (default=0)"); | 390 | "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)"); |
391 | 391 | ||
392 | /* | 392 | /* |
393 | * Some TCO specific functions | 393 | * Some TCO specific functions |
@@ -813,7 +813,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, | |||
813 | ret = -EIO; | 813 | ret = -EIO; |
814 | goto out_unmap; | 814 | goto out_unmap; |
815 | } | 815 | } |
816 | if (turn_SMI_watchdog_clear_off) { | 816 | if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) { |
817 | /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ | 817 | /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ |
818 | val32 = inl(SMI_EN); | 818 | val32 = inl(SMI_EN); |
819 | val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ | 819 | val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ |
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c index cc2cfbe33b30..bfaf9bb1ee0d 100644 --- a/drivers/watchdog/sp805_wdt.c +++ b/drivers/watchdog/sp805_wdt.c | |||
@@ -351,7 +351,7 @@ static int __devexit sp805_wdt_remove(struct amba_device *adev) | |||
351 | return 0; | 351 | return 0; |
352 | } | 352 | } |
353 | 353 | ||
354 | static struct amba_id sp805_wdt_ids[] __initdata = { | 354 | static struct amba_id sp805_wdt_ids[] = { |
355 | { | 355 | { |
356 | .id = 0x00141805, | 356 | .id = 0x00141805, |
357 | .mask = 0x00ffffff, | 357 | .mask = 0x00ffffff, |
diff --git a/drivers/xen/xenbus/xenbus_xs.c b/drivers/xen/xenbus/xenbus_xs.c index b3b8f2f3ad10..ede860f921df 100644 --- a/drivers/xen/xenbus/xenbus_xs.c +++ b/drivers/xen/xenbus/xenbus_xs.c | |||
@@ -621,15 +621,6 @@ static struct xenbus_watch *find_watch(const char *token) | |||
621 | return NULL; | 621 | return NULL; |
622 | } | 622 | } |
623 | 623 | ||
624 | static void xs_reset_watches(void) | ||
625 | { | ||
626 | int err; | ||
627 | |||
628 | err = xs_error(xs_single(XBT_NIL, XS_RESET_WATCHES, "", NULL)); | ||
629 | if (err && err != -EEXIST) | ||
630 | printk(KERN_WARNING "xs_reset_watches failed: %d\n", err); | ||
631 | } | ||
632 | |||
633 | /* Register callback to watch this node. */ | 624 | /* Register callback to watch this node. */ |
634 | int register_xenbus_watch(struct xenbus_watch *watch) | 625 | int register_xenbus_watch(struct xenbus_watch *watch) |
635 | { | 626 | { |
@@ -906,9 +897,5 @@ int xs_init(void) | |||
906 | if (IS_ERR(task)) | 897 | if (IS_ERR(task)) |
907 | return PTR_ERR(task); | 898 | return PTR_ERR(task); |
908 | 899 | ||
909 | /* shutdown watches for kexec boot */ | ||
910 | if (xen_hvm_domain()) | ||
911 | xs_reset_watches(); | ||
912 | |||
913 | return 0; | 900 | return 0; |
914 | } | 901 | } |
diff --git a/firmware/README.AddingFirmware b/firmware/README.AddingFirmware index e24cd8986d8b..ea78c3a17eec 100644 --- a/firmware/README.AddingFirmware +++ b/firmware/README.AddingFirmware | |||
@@ -12,7 +12,7 @@ here. | |||
12 | This directory is _NOT_ for adding arbitrary new firmware images. The | 12 | This directory is _NOT_ for adding arbitrary new firmware images. The |
13 | place to add those is the separate linux-firmware repository: | 13 | place to add those is the separate linux-firmware repository: |
14 | 14 | ||
15 | git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git | 15 | git://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git |
16 | 16 | ||
17 | That repository contains all these firmware images which have been | 17 | That repository contains all these firmware images which have been |
18 | extracted from older drivers, as well various new firmware images which | 18 | extracted from older drivers, as well various new firmware images which |
@@ -22,6 +22,7 @@ been permitted to redistribute under separate cover. | |||
22 | To submit firmware to that repository, please send either a git binary | 22 | To submit firmware to that repository, please send either a git binary |
23 | diff or preferably a git pull request to: | 23 | diff or preferably a git pull request to: |
24 | David Woodhouse <dwmw2@infradead.org> | 24 | David Woodhouse <dwmw2@infradead.org> |
25 | Ben Hutchings <ben@decadent.org.uk> | ||
25 | 26 | ||
26 | Your commit should include an update to the WHENCE file clearly | 27 | Your commit should include an update to the WHENCE file clearly |
27 | identifying the licence under which the firmware is available, and | 28 | identifying the licence under which the firmware is available, and |
diff --git a/fs/btrfs/async-thread.c b/fs/btrfs/async-thread.c index cb97174e2366..0b394580d860 100644 --- a/fs/btrfs/async-thread.c +++ b/fs/btrfs/async-thread.c | |||
@@ -563,8 +563,8 @@ static struct btrfs_worker_thread *find_worker(struct btrfs_workers *workers) | |||
563 | struct list_head *fallback; | 563 | struct list_head *fallback; |
564 | int ret; | 564 | int ret; |
565 | 565 | ||
566 | again: | ||
567 | spin_lock_irqsave(&workers->lock, flags); | 566 | spin_lock_irqsave(&workers->lock, flags); |
567 | again: | ||
568 | worker = next_worker(workers); | 568 | worker = next_worker(workers); |
569 | 569 | ||
570 | if (!worker) { | 570 | if (!worker) { |
@@ -579,6 +579,7 @@ again: | |||
579 | spin_unlock_irqrestore(&workers->lock, flags); | 579 | spin_unlock_irqrestore(&workers->lock, flags); |
580 | /* we're below the limit, start another worker */ | 580 | /* we're below the limit, start another worker */ |
581 | ret = __btrfs_start_workers(workers); | 581 | ret = __btrfs_start_workers(workers); |
582 | spin_lock_irqsave(&workers->lock, flags); | ||
582 | if (ret) | 583 | if (ret) |
583 | goto fallback; | 584 | goto fallback; |
584 | goto again; | 585 | goto again; |
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index 0a6b928813a4..fd1a06df5bc6 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c | |||
@@ -4590,10 +4590,6 @@ static int btrfs_add_nondir(struct btrfs_trans_handle *trans, | |||
4590 | int err = btrfs_add_link(trans, dir, inode, | 4590 | int err = btrfs_add_link(trans, dir, inode, |
4591 | dentry->d_name.name, dentry->d_name.len, | 4591 | dentry->d_name.name, dentry->d_name.len, |
4592 | backref, index); | 4592 | backref, index); |
4593 | if (!err) { | ||
4594 | d_instantiate(dentry, inode); | ||
4595 | return 0; | ||
4596 | } | ||
4597 | if (err > 0) | 4593 | if (err > 0) |
4598 | err = -EEXIST; | 4594 | err = -EEXIST; |
4599 | return err; | 4595 | return err; |
@@ -4655,6 +4651,7 @@ static int btrfs_mknod(struct inode *dir, struct dentry *dentry, | |||
4655 | else { | 4651 | else { |
4656 | init_special_inode(inode, inode->i_mode, rdev); | 4652 | init_special_inode(inode, inode->i_mode, rdev); |
4657 | btrfs_update_inode(trans, root, inode); | 4653 | btrfs_update_inode(trans, root, inode); |
4654 | d_instantiate(dentry, inode); | ||
4658 | } | 4655 | } |
4659 | out_unlock: | 4656 | out_unlock: |
4660 | nr = trans->blocks_used; | 4657 | nr = trans->blocks_used; |
@@ -4722,6 +4719,7 @@ static int btrfs_create(struct inode *dir, struct dentry *dentry, | |||
4722 | inode->i_mapping->a_ops = &btrfs_aops; | 4719 | inode->i_mapping->a_ops = &btrfs_aops; |
4723 | inode->i_mapping->backing_dev_info = &root->fs_info->bdi; | 4720 | inode->i_mapping->backing_dev_info = &root->fs_info->bdi; |
4724 | BTRFS_I(inode)->io_tree.ops = &btrfs_extent_io_ops; | 4721 | BTRFS_I(inode)->io_tree.ops = &btrfs_extent_io_ops; |
4722 | d_instantiate(dentry, inode); | ||
4725 | } | 4723 | } |
4726 | out_unlock: | 4724 | out_unlock: |
4727 | nr = trans->blocks_used; | 4725 | nr = trans->blocks_used; |
@@ -4779,6 +4777,7 @@ static int btrfs_link(struct dentry *old_dentry, struct inode *dir, | |||
4779 | struct dentry *parent = dentry->d_parent; | 4777 | struct dentry *parent = dentry->d_parent; |
4780 | err = btrfs_update_inode(trans, root, inode); | 4778 | err = btrfs_update_inode(trans, root, inode); |
4781 | BUG_ON(err); | 4779 | BUG_ON(err); |
4780 | d_instantiate(dentry, inode); | ||
4782 | btrfs_log_new_name(trans, inode, NULL, parent); | 4781 | btrfs_log_new_name(trans, inode, NULL, parent); |
4783 | } | 4782 | } |
4784 | 4783 | ||
@@ -7245,6 +7244,8 @@ static int btrfs_symlink(struct inode *dir, struct dentry *dentry, | |||
7245 | drop_inode = 1; | 7244 | drop_inode = 1; |
7246 | 7245 | ||
7247 | out_unlock: | 7246 | out_unlock: |
7247 | if (!err) | ||
7248 | d_instantiate(dentry, inode); | ||
7248 | nr = trans->blocks_used; | 7249 | nr = trans->blocks_used; |
7249 | btrfs_end_transaction_throttle(trans, root); | 7250 | btrfs_end_transaction_throttle(trans, root); |
7250 | if (drop_inode) { | 7251 | if (drop_inode) { |
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c index 3eeb97661262..98954003a8d3 100644 --- a/fs/ceph/dir.c +++ b/fs/ceph/dir.c | |||
@@ -1094,42 +1094,19 @@ static int ceph_snapdir_d_revalidate(struct dentry *dentry, | |||
1094 | /* | 1094 | /* |
1095 | * Set/clear/test dir complete flag on the dir's dentry. | 1095 | * Set/clear/test dir complete flag on the dir's dentry. |
1096 | */ | 1096 | */ |
1097 | static struct dentry * __d_find_any_alias(struct inode *inode) | ||
1098 | { | ||
1099 | struct dentry *alias; | ||
1100 | |||
1101 | if (list_empty(&inode->i_dentry)) | ||
1102 | return NULL; | ||
1103 | alias = list_first_entry(&inode->i_dentry, struct dentry, d_alias); | ||
1104 | return alias; | ||
1105 | } | ||
1106 | |||
1107 | void ceph_dir_set_complete(struct inode *inode) | 1097 | void ceph_dir_set_complete(struct inode *inode) |
1108 | { | 1098 | { |
1109 | struct dentry *dentry = __d_find_any_alias(inode); | 1099 | /* not yet implemented */ |
1110 | |||
1111 | if (dentry && ceph_dentry(dentry)) { | ||
1112 | dout(" marking %p (%p) complete\n", inode, dentry); | ||
1113 | set_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags); | ||
1114 | } | ||
1115 | } | 1100 | } |
1116 | 1101 | ||
1117 | void ceph_dir_clear_complete(struct inode *inode) | 1102 | void ceph_dir_clear_complete(struct inode *inode) |
1118 | { | 1103 | { |
1119 | struct dentry *dentry = __d_find_any_alias(inode); | 1104 | /* not yet implemented */ |
1120 | |||
1121 | if (dentry && ceph_dentry(dentry)) { | ||
1122 | dout(" marking %p (%p) NOT complete\n", inode, dentry); | ||
1123 | clear_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags); | ||
1124 | } | ||
1125 | } | 1105 | } |
1126 | 1106 | ||
1127 | bool ceph_dir_test_complete(struct inode *inode) | 1107 | bool ceph_dir_test_complete(struct inode *inode) |
1128 | { | 1108 | { |
1129 | struct dentry *dentry = __d_find_any_alias(inode); | 1109 | /* not yet implemented */ |
1130 | |||
1131 | if (dentry && ceph_dentry(dentry)) | ||
1132 | return test_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags); | ||
1133 | return false; | 1110 | return false; |
1134 | } | 1111 | } |
1135 | 1112 | ||
diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index ac86f8b3e3cb..517f211a3bd4 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c | |||
@@ -47,17 +47,6 @@ struct wb_writeback_work { | |||
47 | struct completion *done; /* set if the caller waits */ | 47 | struct completion *done; /* set if the caller waits */ |
48 | }; | 48 | }; |
49 | 49 | ||
50 | const char *wb_reason_name[] = { | ||
51 | [WB_REASON_BACKGROUND] = "background", | ||
52 | [WB_REASON_TRY_TO_FREE_PAGES] = "try_to_free_pages", | ||
53 | [WB_REASON_SYNC] = "sync", | ||
54 | [WB_REASON_PERIODIC] = "periodic", | ||
55 | [WB_REASON_LAPTOP_TIMER] = "laptop_timer", | ||
56 | [WB_REASON_FREE_MORE_MEM] = "free_more_memory", | ||
57 | [WB_REASON_FS_FREE_SPACE] = "fs_free_space", | ||
58 | [WB_REASON_FORKER_THREAD] = "forker_thread" | ||
59 | }; | ||
60 | |||
61 | /* | 50 | /* |
62 | * Include the creation of the trace points after defining the | 51 | * Include the creation of the trace points after defining the |
63 | * wb_writeback_work structure so that the definition remains local to this | 52 | * wb_writeback_work structure so that the definition remains local to this |
diff --git a/fs/locks.c b/fs/locks.c index 3b0d05dcd7c1..637694bf3a03 100644 --- a/fs/locks.c +++ b/fs/locks.c | |||
@@ -1205,6 +1205,8 @@ int __break_lease(struct inode *inode, unsigned int mode) | |||
1205 | int want_write = (mode & O_ACCMODE) != O_RDONLY; | 1205 | int want_write = (mode & O_ACCMODE) != O_RDONLY; |
1206 | 1206 | ||
1207 | new_fl = lease_alloc(NULL, want_write ? F_WRLCK : F_RDLCK); | 1207 | new_fl = lease_alloc(NULL, want_write ? F_WRLCK : F_RDLCK); |
1208 | if (IS_ERR(new_fl)) | ||
1209 | return PTR_ERR(new_fl); | ||
1208 | 1210 | ||
1209 | lock_flocks(); | 1211 | lock_flocks(); |
1210 | 1212 | ||
@@ -1221,12 +1223,6 @@ int __break_lease(struct inode *inode, unsigned int mode) | |||
1221 | if (fl->fl_owner == current->files) | 1223 | if (fl->fl_owner == current->files) |
1222 | i_have_this_lease = 1; | 1224 | i_have_this_lease = 1; |
1223 | 1225 | ||
1224 | if (IS_ERR(new_fl) && !i_have_this_lease | ||
1225 | && ((mode & O_NONBLOCK) == 0)) { | ||
1226 | error = PTR_ERR(new_fl); | ||
1227 | goto out; | ||
1228 | } | ||
1229 | |||
1230 | break_time = 0; | 1226 | break_time = 0; |
1231 | if (lease_break_time > 0) { | 1227 | if (lease_break_time > 0) { |
1232 | break_time = jiffies + lease_break_time * HZ; | 1228 | break_time = jiffies + lease_break_time * HZ; |
@@ -1284,8 +1280,7 @@ restart: | |||
1284 | 1280 | ||
1285 | out: | 1281 | out: |
1286 | unlock_flocks(); | 1282 | unlock_flocks(); |
1287 | if (!IS_ERR(new_fl)) | 1283 | locks_free_lock(new_fl); |
1288 | locks_free_lock(new_fl); | ||
1289 | return error; | 1284 | return error; |
1290 | } | 1285 | } |
1291 | 1286 | ||
diff --git a/fs/nfs/file.c b/fs/nfs/file.c index eca56d4b39c0..606ef0f20aed 100644 --- a/fs/nfs/file.c +++ b/fs/nfs/file.c | |||
@@ -147,7 +147,7 @@ static loff_t nfs_file_llseek(struct file *filp, loff_t offset, int origin) | |||
147 | * origin == SEEK_END || SEEK_DATA || SEEK_HOLE => we must revalidate | 147 | * origin == SEEK_END || SEEK_DATA || SEEK_HOLE => we must revalidate |
148 | * the cached file length | 148 | * the cached file length |
149 | */ | 149 | */ |
150 | if (origin != SEEK_SET || origin != SEEK_CUR) { | 150 | if (origin != SEEK_SET && origin != SEEK_CUR) { |
151 | struct inode *inode = filp->f_mapping->host; | 151 | struct inode *inode = filp->f_mapping->host; |
152 | 152 | ||
153 | int retval = nfs_revalidate_file_size(inode, filp); | 153 | int retval = nfs_revalidate_file_size(inode, filp); |
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c index be2bbac13817..d9f4d78c3413 100644 --- a/fs/nfs/nfs4proc.c +++ b/fs/nfs/nfs4proc.c | |||
@@ -39,6 +39,8 @@ | |||
39 | #include <linux/delay.h> | 39 | #include <linux/delay.h> |
40 | #include <linux/errno.h> | 40 | #include <linux/errno.h> |
41 | #include <linux/string.h> | 41 | #include <linux/string.h> |
42 | #include <linux/ratelimit.h> | ||
43 | #include <linux/printk.h> | ||
42 | #include <linux/slab.h> | 44 | #include <linux/slab.h> |
43 | #include <linux/sunrpc/clnt.h> | 45 | #include <linux/sunrpc/clnt.h> |
44 | #include <linux/sunrpc/gss_api.h> | 46 | #include <linux/sunrpc/gss_api.h> |
@@ -894,6 +896,8 @@ out: | |||
894 | 896 | ||
895 | static int can_open_delegated(struct nfs_delegation *delegation, fmode_t fmode) | 897 | static int can_open_delegated(struct nfs_delegation *delegation, fmode_t fmode) |
896 | { | 898 | { |
899 | if (delegation == NULL) | ||
900 | return 0; | ||
897 | if ((delegation->type & fmode) != fmode) | 901 | if ((delegation->type & fmode) != fmode) |
898 | return 0; | 902 | return 0; |
899 | if (test_bit(NFS_DELEGATION_NEED_RECLAIM, &delegation->flags)) | 903 | if (test_bit(NFS_DELEGATION_NEED_RECLAIM, &delegation->flags)) |
@@ -1036,8 +1040,7 @@ static struct nfs4_state *nfs4_try_open_cached(struct nfs4_opendata *opendata) | |||
1036 | } | 1040 | } |
1037 | rcu_read_lock(); | 1041 | rcu_read_lock(); |
1038 | delegation = rcu_dereference(nfsi->delegation); | 1042 | delegation = rcu_dereference(nfsi->delegation); |
1039 | if (delegation == NULL || | 1043 | if (!can_open_delegated(delegation, fmode)) { |
1040 | !can_open_delegated(delegation, fmode)) { | ||
1041 | rcu_read_unlock(); | 1044 | rcu_read_unlock(); |
1042 | break; | 1045 | break; |
1043 | } | 1046 | } |
@@ -1091,7 +1094,12 @@ static struct nfs4_state *nfs4_opendata_to_nfs4_state(struct nfs4_opendata *data | |||
1091 | if (delegation) | 1094 | if (delegation) |
1092 | delegation_flags = delegation->flags; | 1095 | delegation_flags = delegation->flags; |
1093 | rcu_read_unlock(); | 1096 | rcu_read_unlock(); |
1094 | if ((delegation_flags & 1UL<<NFS_DELEGATION_NEED_RECLAIM) == 0) | 1097 | if (data->o_arg.claim == NFS4_OPEN_CLAIM_DELEGATE_CUR) { |
1098 | pr_err_ratelimited("NFS: Broken NFSv4 server %s is " | ||
1099 | "returning a delegation for " | ||
1100 | "OPEN(CLAIM_DELEGATE_CUR)\n", | ||
1101 | NFS_CLIENT(inode)->cl_server); | ||
1102 | } else if ((delegation_flags & 1UL<<NFS_DELEGATION_NEED_RECLAIM) == 0) | ||
1095 | nfs_inode_set_delegation(state->inode, | 1103 | nfs_inode_set_delegation(state->inode, |
1096 | data->owner->so_cred, | 1104 | data->owner->so_cred, |
1097 | &data->o_res); | 1105 | &data->o_res); |
@@ -1423,11 +1431,9 @@ static void nfs4_open_prepare(struct rpc_task *task, void *calldata) | |||
1423 | goto out_no_action; | 1431 | goto out_no_action; |
1424 | rcu_read_lock(); | 1432 | rcu_read_lock(); |
1425 | delegation = rcu_dereference(NFS_I(data->state->inode)->delegation); | 1433 | delegation = rcu_dereference(NFS_I(data->state->inode)->delegation); |
1426 | if (delegation != NULL && | 1434 | if (data->o_arg.claim != NFS4_OPEN_CLAIM_DELEGATE_CUR && |
1427 | test_bit(NFS_DELEGATION_NEED_RECLAIM, &delegation->flags) == 0) { | 1435 | can_open_delegated(delegation, data->o_arg.fmode)) |
1428 | rcu_read_unlock(); | 1436 | goto unlock_no_action; |
1429 | goto out_no_action; | ||
1430 | } | ||
1431 | rcu_read_unlock(); | 1437 | rcu_read_unlock(); |
1432 | } | 1438 | } |
1433 | /* Update sequence id. */ | 1439 | /* Update sequence id. */ |
@@ -1444,6 +1450,8 @@ static void nfs4_open_prepare(struct rpc_task *task, void *calldata) | |||
1444 | return; | 1450 | return; |
1445 | rpc_call_start(task); | 1451 | rpc_call_start(task); |
1446 | return; | 1452 | return; |
1453 | unlock_no_action: | ||
1454 | rcu_read_unlock(); | ||
1447 | out_no_action: | 1455 | out_no_action: |
1448 | task->tk_action = NULL; | 1456 | task->tk_action = NULL; |
1449 | 1457 | ||
diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c index 39914be40b03..6a7107ae6b72 100644 --- a/fs/nfs/nfs4state.c +++ b/fs/nfs/nfs4state.c | |||
@@ -1156,11 +1156,13 @@ restart: | |||
1156 | if (status >= 0) { | 1156 | if (status >= 0) { |
1157 | status = nfs4_reclaim_locks(state, ops); | 1157 | status = nfs4_reclaim_locks(state, ops); |
1158 | if (status >= 0) { | 1158 | if (status >= 0) { |
1159 | spin_lock(&state->state_lock); | ||
1159 | list_for_each_entry(lock, &state->lock_states, ls_locks) { | 1160 | list_for_each_entry(lock, &state->lock_states, ls_locks) { |
1160 | if (!(lock->ls_flags & NFS_LOCK_INITIALIZED)) | 1161 | if (!(lock->ls_flags & NFS_LOCK_INITIALIZED)) |
1161 | printk("%s: Lock reclaim failed!\n", | 1162 | printk("%s: Lock reclaim failed!\n", |
1162 | __func__); | 1163 | __func__); |
1163 | } | 1164 | } |
1165 | spin_unlock(&state->state_lock); | ||
1164 | nfs4_put_open_state(state); | 1166 | nfs4_put_open_state(state); |
1165 | goto restart; | 1167 | goto restart; |
1166 | } | 1168 | } |
@@ -1224,10 +1226,12 @@ static void nfs4_clear_open_state(struct nfs4_state *state) | |||
1224 | clear_bit(NFS_O_RDONLY_STATE, &state->flags); | 1226 | clear_bit(NFS_O_RDONLY_STATE, &state->flags); |
1225 | clear_bit(NFS_O_WRONLY_STATE, &state->flags); | 1227 | clear_bit(NFS_O_WRONLY_STATE, &state->flags); |
1226 | clear_bit(NFS_O_RDWR_STATE, &state->flags); | 1228 | clear_bit(NFS_O_RDWR_STATE, &state->flags); |
1229 | spin_lock(&state->state_lock); | ||
1227 | list_for_each_entry(lock, &state->lock_states, ls_locks) { | 1230 | list_for_each_entry(lock, &state->lock_states, ls_locks) { |
1228 | lock->ls_seqid.flags = 0; | 1231 | lock->ls_seqid.flags = 0; |
1229 | lock->ls_flags &= ~NFS_LOCK_INITIALIZED; | 1232 | lock->ls_flags &= ~NFS_LOCK_INITIALIZED; |
1230 | } | 1233 | } |
1234 | spin_unlock(&state->state_lock); | ||
1231 | } | 1235 | } |
1232 | 1236 | ||
1233 | static void nfs4_reset_seqids(struct nfs_server *server, | 1237 | static void nfs4_reset_seqids(struct nfs_server *server, |
@@ -1350,12 +1354,14 @@ static void nfs4_warn_keyexpired(const char *s) | |||
1350 | static int nfs4_recovery_handle_error(struct nfs_client *clp, int error) | 1354 | static int nfs4_recovery_handle_error(struct nfs_client *clp, int error) |
1351 | { | 1355 | { |
1352 | switch (error) { | 1356 | switch (error) { |
1357 | case 0: | ||
1358 | break; | ||
1353 | case -NFS4ERR_CB_PATH_DOWN: | 1359 | case -NFS4ERR_CB_PATH_DOWN: |
1354 | nfs_handle_cb_pathdown(clp); | 1360 | nfs_handle_cb_pathdown(clp); |
1355 | return 0; | 1361 | break; |
1356 | case -NFS4ERR_NO_GRACE: | 1362 | case -NFS4ERR_NO_GRACE: |
1357 | nfs4_state_end_reclaim_reboot(clp); | 1363 | nfs4_state_end_reclaim_reboot(clp); |
1358 | return 0; | 1364 | break; |
1359 | case -NFS4ERR_STALE_CLIENTID: | 1365 | case -NFS4ERR_STALE_CLIENTID: |
1360 | case -NFS4ERR_LEASE_MOVED: | 1366 | case -NFS4ERR_LEASE_MOVED: |
1361 | set_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state); | 1367 | set_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state); |
@@ -1375,13 +1381,15 @@ static int nfs4_recovery_handle_error(struct nfs_client *clp, int error) | |||
1375 | case -NFS4ERR_SEQ_MISORDERED: | 1381 | case -NFS4ERR_SEQ_MISORDERED: |
1376 | set_bit(NFS4CLNT_SESSION_RESET, &clp->cl_state); | 1382 | set_bit(NFS4CLNT_SESSION_RESET, &clp->cl_state); |
1377 | /* Zero session reset errors */ | 1383 | /* Zero session reset errors */ |
1378 | return 0; | 1384 | break; |
1379 | case -EKEYEXPIRED: | 1385 | case -EKEYEXPIRED: |
1380 | /* Nothing we can do */ | 1386 | /* Nothing we can do */ |
1381 | nfs4_warn_keyexpired(clp->cl_hostname); | 1387 | nfs4_warn_keyexpired(clp->cl_hostname); |
1382 | return 0; | 1388 | break; |
1389 | default: | ||
1390 | return error; | ||
1383 | } | 1391 | } |
1384 | return error; | 1392 | return 0; |
1385 | } | 1393 | } |
1386 | 1394 | ||
1387 | static int nfs4_do_reclaim(struct nfs_client *clp, const struct nfs4_state_recovery_ops *ops) | 1395 | static int nfs4_do_reclaim(struct nfs_client *clp, const struct nfs4_state_recovery_ops *ops) |
@@ -1428,7 +1436,7 @@ static int nfs4_check_lease(struct nfs_client *clp) | |||
1428 | struct rpc_cred *cred; | 1436 | struct rpc_cred *cred; |
1429 | const struct nfs4_state_maintenance_ops *ops = | 1437 | const struct nfs4_state_maintenance_ops *ops = |
1430 | clp->cl_mvops->state_renewal_ops; | 1438 | clp->cl_mvops->state_renewal_ops; |
1431 | int status = -NFS4ERR_EXPIRED; | 1439 | int status; |
1432 | 1440 | ||
1433 | /* Is the client already known to have an expired lease? */ | 1441 | /* Is the client already known to have an expired lease? */ |
1434 | if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) | 1442 | if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) |
@@ -1438,6 +1446,7 @@ static int nfs4_check_lease(struct nfs_client *clp) | |||
1438 | spin_unlock(&clp->cl_lock); | 1446 | spin_unlock(&clp->cl_lock); |
1439 | if (cred == NULL) { | 1447 | if (cred == NULL) { |
1440 | cred = nfs4_get_setclientid_cred(clp); | 1448 | cred = nfs4_get_setclientid_cred(clp); |
1449 | status = -ENOKEY; | ||
1441 | if (cred == NULL) | 1450 | if (cred == NULL) |
1442 | goto out; | 1451 | goto out; |
1443 | } | 1452 | } |
@@ -1525,16 +1534,16 @@ void nfs41_handle_sequence_flag_errors(struct nfs_client *clp, u32 flags) | |||
1525 | { | 1534 | { |
1526 | if (!flags) | 1535 | if (!flags) |
1527 | return; | 1536 | return; |
1528 | else if (flags & SEQ4_STATUS_RESTART_RECLAIM_NEEDED) | 1537 | if (flags & SEQ4_STATUS_RESTART_RECLAIM_NEEDED) |
1529 | nfs41_handle_server_reboot(clp); | 1538 | nfs41_handle_server_reboot(clp); |
1530 | else if (flags & (SEQ4_STATUS_EXPIRED_ALL_STATE_REVOKED | | 1539 | if (flags & (SEQ4_STATUS_EXPIRED_ALL_STATE_REVOKED | |
1531 | SEQ4_STATUS_EXPIRED_SOME_STATE_REVOKED | | 1540 | SEQ4_STATUS_EXPIRED_SOME_STATE_REVOKED | |
1532 | SEQ4_STATUS_ADMIN_STATE_REVOKED | | 1541 | SEQ4_STATUS_ADMIN_STATE_REVOKED | |
1533 | SEQ4_STATUS_LEASE_MOVED)) | 1542 | SEQ4_STATUS_LEASE_MOVED)) |
1534 | nfs41_handle_state_revoked(clp); | 1543 | nfs41_handle_state_revoked(clp); |
1535 | else if (flags & SEQ4_STATUS_RECALLABLE_STATE_REVOKED) | 1544 | if (flags & SEQ4_STATUS_RECALLABLE_STATE_REVOKED) |
1536 | nfs41_handle_recallable_state_revoked(clp); | 1545 | nfs41_handle_recallable_state_revoked(clp); |
1537 | else if (flags & (SEQ4_STATUS_CB_PATH_DOWN | | 1546 | if (flags & (SEQ4_STATUS_CB_PATH_DOWN | |
1538 | SEQ4_STATUS_BACKCHANNEL_FAULT | | 1547 | SEQ4_STATUS_BACKCHANNEL_FAULT | |
1539 | SEQ4_STATUS_CB_PATH_DOWN_SESSION)) | 1548 | SEQ4_STATUS_CB_PATH_DOWN_SESSION)) |
1540 | nfs41_handle_cb_path_down(clp); | 1549 | nfs41_handle_cb_path_down(clp); |
@@ -1662,10 +1671,10 @@ static void nfs4_state_manager(struct nfs_client *clp) | |||
1662 | 1671 | ||
1663 | if (test_and_clear_bit(NFS4CLNT_CHECK_LEASE, &clp->cl_state)) { | 1672 | if (test_and_clear_bit(NFS4CLNT_CHECK_LEASE, &clp->cl_state)) { |
1664 | status = nfs4_check_lease(clp); | 1673 | status = nfs4_check_lease(clp); |
1674 | if (status < 0) | ||
1675 | goto out_error; | ||
1665 | if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) | 1676 | if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) |
1666 | continue; | 1677 | continue; |
1667 | if (status < 0 && status != -NFS4ERR_CB_PATH_DOWN) | ||
1668 | goto out_error; | ||
1669 | } | 1678 | } |
1670 | 1679 | ||
1671 | /* Initialize or reset the session */ | 1680 | /* Initialize or reset the session */ |
diff --git a/fs/nilfs2/ioctl.c b/fs/nilfs2/ioctl.c index 41d6743d303c..ac258beeda3c 100644 --- a/fs/nilfs2/ioctl.c +++ b/fs/nilfs2/ioctl.c | |||
@@ -625,6 +625,9 @@ static int nilfs_ioctl_clean_segments(struct inode *inode, struct file *filp, | |||
625 | if (argv[n].v_nmembs > nsegs * nilfs->ns_blocks_per_segment) | 625 | if (argv[n].v_nmembs > nsegs * nilfs->ns_blocks_per_segment) |
626 | goto out_free; | 626 | goto out_free; |
627 | 627 | ||
628 | if (argv[n].v_nmembs >= UINT_MAX / argv[n].v_size) | ||
629 | goto out_free; | ||
630 | |||
628 | len = argv[n].v_size * argv[n].v_nmembs; | 631 | len = argv[n].v_size * argv[n].v_nmembs; |
629 | base = (void __user *)(unsigned long)argv[n].v_base; | 632 | base = (void __user *)(unsigned long)argv[n].v_base; |
630 | if (len == 0) { | 633 | if (len == 0) { |
@@ -842,6 +845,19 @@ long nilfs_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | |||
842 | case FS_IOC32_GETVERSION: | 845 | case FS_IOC32_GETVERSION: |
843 | cmd = FS_IOC_GETVERSION; | 846 | cmd = FS_IOC_GETVERSION; |
844 | break; | 847 | break; |
848 | case NILFS_IOCTL_CHANGE_CPMODE: | ||
849 | case NILFS_IOCTL_DELETE_CHECKPOINT: | ||
850 | case NILFS_IOCTL_GET_CPINFO: | ||
851 | case NILFS_IOCTL_GET_CPSTAT: | ||
852 | case NILFS_IOCTL_GET_SUINFO: | ||
853 | case NILFS_IOCTL_GET_SUSTAT: | ||
854 | case NILFS_IOCTL_GET_VINFO: | ||
855 | case NILFS_IOCTL_GET_BDESCS: | ||
856 | case NILFS_IOCTL_CLEAN_SEGMENTS: | ||
857 | case NILFS_IOCTL_SYNC: | ||
858 | case NILFS_IOCTL_RESIZE: | ||
859 | case NILFS_IOCTL_SET_ALLOC_RANGE: | ||
860 | break; | ||
845 | default: | 861 | default: |
846 | return -ENOIOCTLCMD; | 862 | return -ENOIOCTLCMD; |
847 | } | 863 | } |
diff --git a/fs/proc/stat.c b/fs/proc/stat.c index 2a30d67dd6b8..0855e6f20391 100644 --- a/fs/proc/stat.c +++ b/fs/proc/stat.c | |||
@@ -32,7 +32,7 @@ static cputime64_t get_idle_time(int cpu) | |||
32 | idle = kstat_cpu(cpu).cpustat.idle; | 32 | idle = kstat_cpu(cpu).cpustat.idle; |
33 | idle = cputime64_add(idle, arch_idle_time(cpu)); | 33 | idle = cputime64_add(idle, arch_idle_time(cpu)); |
34 | } else | 34 | } else |
35 | idle = nsecs_to_jiffies64(1000 * idle_time); | 35 | idle = usecs_to_cputime64(idle_time); |
36 | 36 | ||
37 | return idle; | 37 | return idle; |
38 | } | 38 | } |
@@ -46,7 +46,7 @@ static cputime64_t get_iowait_time(int cpu) | |||
46 | /* !NO_HZ so we can rely on cpustat.iowait */ | 46 | /* !NO_HZ so we can rely on cpustat.iowait */ |
47 | iowait = kstat_cpu(cpu).cpustat.iowait; | 47 | iowait = kstat_cpu(cpu).cpustat.iowait; |
48 | else | 48 | else |
49 | iowait = nsecs_to_jiffies64(1000 * iowait_time); | 49 | iowait = usecs_to_cputime64(iowait_time); |
50 | 50 | ||
51 | return iowait; | 51 | return iowait; |
52 | } | 52 | } |
diff --git a/fs/xfs/xfs_super.c b/fs/xfs/xfs_super.c index 3eca58f51ae9..8a899496fd5f 100644 --- a/fs/xfs/xfs_super.c +++ b/fs/xfs/xfs_super.c | |||
@@ -869,27 +869,6 @@ xfs_fs_dirty_inode( | |||
869 | } | 869 | } |
870 | 870 | ||
871 | STATIC int | 871 | STATIC int |
872 | xfs_log_inode( | ||
873 | struct xfs_inode *ip) | ||
874 | { | ||
875 | struct xfs_mount *mp = ip->i_mount; | ||
876 | struct xfs_trans *tp; | ||
877 | int error; | ||
878 | |||
879 | tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS); | ||
880 | error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0); | ||
881 | if (error) { | ||
882 | xfs_trans_cancel(tp, 0); | ||
883 | return error; | ||
884 | } | ||
885 | |||
886 | xfs_ilock(ip, XFS_ILOCK_EXCL); | ||
887 | xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL); | ||
888 | xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE); | ||
889 | return xfs_trans_commit(tp, 0); | ||
890 | } | ||
891 | |||
892 | STATIC int | ||
893 | xfs_fs_write_inode( | 872 | xfs_fs_write_inode( |
894 | struct inode *inode, | 873 | struct inode *inode, |
895 | struct writeback_control *wbc) | 874 | struct writeback_control *wbc) |
@@ -902,10 +881,8 @@ xfs_fs_write_inode( | |||
902 | 881 | ||
903 | if (XFS_FORCED_SHUTDOWN(mp)) | 882 | if (XFS_FORCED_SHUTDOWN(mp)) |
904 | return -XFS_ERROR(EIO); | 883 | return -XFS_ERROR(EIO); |
905 | if (!ip->i_update_core) | ||
906 | return 0; | ||
907 | 884 | ||
908 | if (wbc->sync_mode == WB_SYNC_ALL) { | 885 | if (wbc->sync_mode == WB_SYNC_ALL || wbc->for_kupdate) { |
909 | /* | 886 | /* |
910 | * Make sure the inode has made it it into the log. Instead | 887 | * Make sure the inode has made it it into the log. Instead |
911 | * of forcing it all the way to stable storage using a | 888 | * of forcing it all the way to stable storage using a |
@@ -913,11 +890,14 @@ xfs_fs_write_inode( | |||
913 | * ->sync_fs call do that for thus, which reduces the number | 890 | * ->sync_fs call do that for thus, which reduces the number |
914 | * of synchronous log forces dramatically. | 891 | * of synchronous log forces dramatically. |
915 | */ | 892 | */ |
916 | error = xfs_log_inode(ip); | 893 | error = xfs_log_dirty_inode(ip, NULL, 0); |
917 | if (error) | 894 | if (error) |
918 | goto out; | 895 | goto out; |
919 | return 0; | 896 | return 0; |
920 | } else { | 897 | } else { |
898 | if (!ip->i_update_core) | ||
899 | return 0; | ||
900 | |||
921 | /* | 901 | /* |
922 | * We make this non-blocking if the inode is contended, return | 902 | * We make this non-blocking if the inode is contended, return |
923 | * EAGAIN to indicate to the caller that they did not succeed. | 903 | * EAGAIN to indicate to the caller that they did not succeed. |
diff --git a/fs/xfs/xfs_sync.c b/fs/xfs/xfs_sync.c index be5c51d8f757..f0994aedcd15 100644 --- a/fs/xfs/xfs_sync.c +++ b/fs/xfs/xfs_sync.c | |||
@@ -336,6 +336,32 @@ xfs_sync_fsdata( | |||
336 | return error; | 336 | return error; |
337 | } | 337 | } |
338 | 338 | ||
339 | int | ||
340 | xfs_log_dirty_inode( | ||
341 | struct xfs_inode *ip, | ||
342 | struct xfs_perag *pag, | ||
343 | int flags) | ||
344 | { | ||
345 | struct xfs_mount *mp = ip->i_mount; | ||
346 | struct xfs_trans *tp; | ||
347 | int error; | ||
348 | |||
349 | if (!ip->i_update_core) | ||
350 | return 0; | ||
351 | |||
352 | tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS); | ||
353 | error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0); | ||
354 | if (error) { | ||
355 | xfs_trans_cancel(tp, 0); | ||
356 | return error; | ||
357 | } | ||
358 | |||
359 | xfs_ilock(ip, XFS_ILOCK_EXCL); | ||
360 | xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL); | ||
361 | xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE); | ||
362 | return xfs_trans_commit(tp, 0); | ||
363 | } | ||
364 | |||
339 | /* | 365 | /* |
340 | * When remounting a filesystem read-only or freezing the filesystem, we have | 366 | * When remounting a filesystem read-only or freezing the filesystem, we have |
341 | * two phases to execute. This first phase is syncing the data before we | 367 | * two phases to execute. This first phase is syncing the data before we |
@@ -359,6 +385,16 @@ xfs_quiesce_data( | |||
359 | { | 385 | { |
360 | int error, error2 = 0; | 386 | int error, error2 = 0; |
361 | 387 | ||
388 | /* | ||
389 | * Log all pending size and timestamp updates. The vfs writeback | ||
390 | * code is supposed to do this, but due to its overagressive | ||
391 | * livelock detection it will skip inodes where appending writes | ||
392 | * were written out in the first non-blocking sync phase if their | ||
393 | * completion took long enough that it happened after taking the | ||
394 | * timestamp for the cut-off in the blocking phase. | ||
395 | */ | ||
396 | xfs_inode_ag_iterator(mp, xfs_log_dirty_inode, 0); | ||
397 | |||
362 | xfs_qm_sync(mp, SYNC_TRYLOCK); | 398 | xfs_qm_sync(mp, SYNC_TRYLOCK); |
363 | xfs_qm_sync(mp, SYNC_WAIT); | 399 | xfs_qm_sync(mp, SYNC_WAIT); |
364 | 400 | ||
diff --git a/fs/xfs/xfs_sync.h b/fs/xfs/xfs_sync.h index 941202e7ac6e..fa965479d788 100644 --- a/fs/xfs/xfs_sync.h +++ b/fs/xfs/xfs_sync.h | |||
@@ -34,6 +34,8 @@ void xfs_quiesce_attr(struct xfs_mount *mp); | |||
34 | 34 | ||
35 | void xfs_flush_inodes(struct xfs_inode *ip); | 35 | void xfs_flush_inodes(struct xfs_inode *ip); |
36 | 36 | ||
37 | int xfs_log_dirty_inode(struct xfs_inode *ip, struct xfs_perag *pag, int flags); | ||
38 | |||
37 | int xfs_reclaim_inodes(struct xfs_mount *mp, int mode); | 39 | int xfs_reclaim_inodes(struct xfs_mount *mp, int mode); |
38 | int xfs_reclaim_inodes_count(struct xfs_mount *mp); | 40 | int xfs_reclaim_inodes_count(struct xfs_mount *mp); |
39 | void xfs_reclaim_inodes_nr(struct xfs_mount *mp, int nr_to_scan); | 41 | void xfs_reclaim_inodes_nr(struct xfs_mount *mp, int nr_to_scan); |
diff --git a/include/asm-generic/cputime.h b/include/asm-generic/cputime.h index 62ce6823c0f2..12a1764f612b 100644 --- a/include/asm-generic/cputime.h +++ b/include/asm-generic/cputime.h | |||
@@ -40,6 +40,7 @@ typedef u64 cputime64_t; | |||
40 | */ | 40 | */ |
41 | #define cputime_to_usecs(__ct) jiffies_to_usecs(__ct) | 41 | #define cputime_to_usecs(__ct) jiffies_to_usecs(__ct) |
42 | #define usecs_to_cputime(__msecs) usecs_to_jiffies(__msecs) | 42 | #define usecs_to_cputime(__msecs) usecs_to_jiffies(__msecs) |
43 | #define usecs_to_cputime64(__msecs) nsecs_to_jiffies64((__msecs) * 1000) | ||
43 | 44 | ||
44 | /* | 45 | /* |
45 | * Convert cputime to seconds and back. | 46 | * Convert cputime to seconds and back. |
diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h index d12f077a6daf..12e023c19ac1 100644 --- a/include/linux/amba/pl330.h +++ b/include/linux/amba/pl330.h | |||
@@ -12,17 +12,9 @@ | |||
12 | #ifndef __AMBA_PL330_H_ | 12 | #ifndef __AMBA_PL330_H_ |
13 | #define __AMBA_PL330_H_ | 13 | #define __AMBA_PL330_H_ |
14 | 14 | ||
15 | #include <linux/dmaengine.h> | ||
15 | #include <asm/hardware/pl330.h> | 16 | #include <asm/hardware/pl330.h> |
16 | 17 | ||
17 | struct dma_pl330_peri { | ||
18 | /* | ||
19 | * Peri_Req i/f of the DMAC that is | ||
20 | * peripheral could be reached from. | ||
21 | */ | ||
22 | u8 peri_id; /* specific dma id */ | ||
23 | enum pl330_reqtype rqtype; | ||
24 | }; | ||
25 | |||
26 | struct dma_pl330_platdata { | 18 | struct dma_pl330_platdata { |
27 | /* | 19 | /* |
28 | * Number of valid peripherals connected to DMAC. | 20 | * Number of valid peripherals connected to DMAC. |
@@ -33,9 +25,12 @@ struct dma_pl330_platdata { | |||
33 | */ | 25 | */ |
34 | u8 nr_valid_peri; | 26 | u8 nr_valid_peri; |
35 | /* Array of valid peripherals */ | 27 | /* Array of valid peripherals */ |
36 | struct dma_pl330_peri *peri; | 28 | u8 *peri_id; |
29 | /* Operational capabilities */ | ||
30 | dma_cap_mask_t cap_mask; | ||
37 | /* Bytes to allocate for MC buffer */ | 31 | /* Bytes to allocate for MC buffer */ |
38 | unsigned mcbuf_sz; | 32 | unsigned mcbuf_sz; |
39 | }; | 33 | }; |
40 | 34 | ||
35 | extern bool pl330_filter(struct dma_chan *chan, void *param); | ||
41 | #endif /* __AMBA_PL330_H_ */ | 36 | #endif /* __AMBA_PL330_H_ */ |
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index c86c940d1de3..081147da0564 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h | |||
@@ -71,7 +71,7 @@ struct timecounter { | |||
71 | 71 | ||
72 | /** | 72 | /** |
73 | * cyclecounter_cyc2ns - converts cycle counter cycles to nanoseconds | 73 | * cyclecounter_cyc2ns - converts cycle counter cycles to nanoseconds |
74 | * @tc: Pointer to cycle counter. | 74 | * @cc: Pointer to cycle counter. |
75 | * @cycles: Cycles | 75 | * @cycles: Cycles |
76 | * | 76 | * |
77 | * XXX - This could use some mult_lxl_ll() asm optimization. Same code | 77 | * XXX - This could use some mult_lxl_ll() asm optimization. Same code |
@@ -114,7 +114,7 @@ extern u64 timecounter_read(struct timecounter *tc); | |||
114 | * time base as values returned by | 114 | * time base as values returned by |
115 | * timecounter_read() | 115 | * timecounter_read() |
116 | * @tc: Pointer to time counter. | 116 | * @tc: Pointer to time counter. |
117 | * @cycle: a value returned by tc->cc->read() | 117 | * @cycle_tstamp: a value returned by tc->cc->read() |
118 | * | 118 | * |
119 | * Cycle counts that are converted correctly as long as they | 119 | * Cycle counts that are converted correctly as long as they |
120 | * fall into the interval [-1/2 max cycle count, +1/2 max cycle count], | 120 | * fall into the interval [-1/2 max cycle count, +1/2 max cycle count], |
@@ -156,11 +156,12 @@ extern u64 timecounter_cyc2time(struct timecounter *tc, | |||
156 | * @mult: cycle to nanosecond multiplier | 156 | * @mult: cycle to nanosecond multiplier |
157 | * @shift: cycle to nanosecond divisor (power of two) | 157 | * @shift: cycle to nanosecond divisor (power of two) |
158 | * @max_idle_ns: max idle time permitted by the clocksource (nsecs) | 158 | * @max_idle_ns: max idle time permitted by the clocksource (nsecs) |
159 | * @maxadj maximum adjustment value to mult (~11%) | 159 | * @maxadj: maximum adjustment value to mult (~11%) |
160 | * @flags: flags describing special properties | 160 | * @flags: flags describing special properties |
161 | * @archdata: arch-specific data | 161 | * @archdata: arch-specific data |
162 | * @suspend: suspend function for the clocksource, if necessary | 162 | * @suspend: suspend function for the clocksource, if necessary |
163 | * @resume: resume function for the clocksource, if necessary | 163 | * @resume: resume function for the clocksource, if necessary |
164 | * @cycle_last: most recent cycle counter value seen by ::read() | ||
164 | */ | 165 | */ |
165 | struct clocksource { | 166 | struct clocksource { |
166 | /* | 167 | /* |
@@ -187,6 +188,7 @@ struct clocksource { | |||
187 | void (*suspend)(struct clocksource *cs); | 188 | void (*suspend)(struct clocksource *cs); |
188 | void (*resume)(struct clocksource *cs); | 189 | void (*resume)(struct clocksource *cs); |
189 | 190 | ||
191 | /* private: */ | ||
190 | #ifdef CONFIG_CLOCKSOURCE_WATCHDOG | 192 | #ifdef CONFIG_CLOCKSOURCE_WATCHDOG |
191 | /* Watchdog related data, used by the framework */ | 193 | /* Watchdog related data, used by the framework */ |
192 | struct list_head wd_list; | 194 | struct list_head wd_list; |
@@ -261,6 +263,9 @@ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant) | |||
261 | 263 | ||
262 | /** | 264 | /** |
263 | * clocksource_cyc2ns - converts clocksource cycles to nanoseconds | 265 | * clocksource_cyc2ns - converts clocksource cycles to nanoseconds |
266 | * @cycles: cycles | ||
267 | * @mult: cycle to nanosecond multiplier | ||
268 | * @shift: cycle to nanosecond divisor (power of two) | ||
264 | * | 269 | * |
265 | * Converts cycles to nanoseconds, using the given mult and shift. | 270 | * Converts cycles to nanoseconds, using the given mult and shift. |
266 | * | 271 | * |
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 99834e581b9e..bd4272b61a14 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h | |||
@@ -91,10 +91,11 @@ static inline unsigned int irq_domain_to_irq(struct irq_domain *d, | |||
91 | 91 | ||
92 | extern void irq_domain_add(struct irq_domain *domain); | 92 | extern void irq_domain_add(struct irq_domain *domain); |
93 | extern void irq_domain_del(struct irq_domain *domain); | 93 | extern void irq_domain_del(struct irq_domain *domain); |
94 | |||
95 | extern struct irq_domain_ops irq_domain_simple_ops; | ||
94 | #endif /* CONFIG_IRQ_DOMAIN */ | 96 | #endif /* CONFIG_IRQ_DOMAIN */ |
95 | 97 | ||
96 | #if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ) | 98 | #if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ) |
97 | extern struct irq_domain_ops irq_domain_simple_ops; | ||
98 | extern void irq_domain_add_simple(struct device_node *controller, int irq_base); | 99 | extern void irq_domain_add_simple(struct device_node *controller, int irq_base); |
99 | extern void irq_domain_generate_simple(const struct of_device_id *match, | 100 | extern void irq_domain_generate_simple(const struct of_device_id *match, |
100 | u64 phys_base, unsigned int irq_start); | 101 | u64 phys_base, unsigned int irq_start); |
diff --git a/include/linux/kvm.h b/include/linux/kvm.h index c3892fc1d538..68e67e50d028 100644 --- a/include/linux/kvm.h +++ b/include/linux/kvm.h | |||
@@ -557,6 +557,7 @@ struct kvm_ppc_pvinfo { | |||
557 | #define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */ | 557 | #define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */ |
558 | #define KVM_CAP_PPC_PAPR 68 | 558 | #define KVM_CAP_PPC_PAPR 68 |
559 | #define KVM_CAP_S390_GMAP 71 | 559 | #define KVM_CAP_S390_GMAP 71 |
560 | #define KVM_CAP_TSC_DEADLINE_TIMER 72 | ||
560 | 561 | ||
561 | #ifdef KVM_CAP_IRQ_ROUTING | 562 | #ifdef KVM_CAP_IRQ_ROUTING |
562 | 563 | ||
diff --git a/include/linux/lglock.h b/include/linux/lglock.h index f549056fb20b..87f402ccec55 100644 --- a/include/linux/lglock.h +++ b/include/linux/lglock.h | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/spinlock.h> | 22 | #include <linux/spinlock.h> |
23 | #include <linux/lockdep.h> | 23 | #include <linux/lockdep.h> |
24 | #include <linux/percpu.h> | 24 | #include <linux/percpu.h> |
25 | #include <linux/cpu.h> | ||
25 | 26 | ||
26 | /* can make br locks by using local lock for read side, global lock for write */ | 27 | /* can make br locks by using local lock for read side, global lock for write */ |
27 | #define br_lock_init(name) name##_lock_init() | 28 | #define br_lock_init(name) name##_lock_init() |
@@ -72,9 +73,31 @@ | |||
72 | 73 | ||
73 | #define DEFINE_LGLOCK(name) \ | 74 | #define DEFINE_LGLOCK(name) \ |
74 | \ | 75 | \ |
76 | DEFINE_SPINLOCK(name##_cpu_lock); \ | ||
77 | cpumask_t name##_cpus __read_mostly; \ | ||
75 | DEFINE_PER_CPU(arch_spinlock_t, name##_lock); \ | 78 | DEFINE_PER_CPU(arch_spinlock_t, name##_lock); \ |
76 | DEFINE_LGLOCK_LOCKDEP(name); \ | 79 | DEFINE_LGLOCK_LOCKDEP(name); \ |
77 | \ | 80 | \ |
81 | static int \ | ||
82 | name##_lg_cpu_callback(struct notifier_block *nb, \ | ||
83 | unsigned long action, void *hcpu) \ | ||
84 | { \ | ||
85 | switch (action & ~CPU_TASKS_FROZEN) { \ | ||
86 | case CPU_UP_PREPARE: \ | ||
87 | spin_lock(&name##_cpu_lock); \ | ||
88 | cpu_set((unsigned long)hcpu, name##_cpus); \ | ||
89 | spin_unlock(&name##_cpu_lock); \ | ||
90 | break; \ | ||
91 | case CPU_UP_CANCELED: case CPU_DEAD: \ | ||
92 | spin_lock(&name##_cpu_lock); \ | ||
93 | cpu_clear((unsigned long)hcpu, name##_cpus); \ | ||
94 | spin_unlock(&name##_cpu_lock); \ | ||
95 | } \ | ||
96 | return NOTIFY_OK; \ | ||
97 | } \ | ||
98 | static struct notifier_block name##_lg_cpu_notifier = { \ | ||
99 | .notifier_call = name##_lg_cpu_callback, \ | ||
100 | }; \ | ||
78 | void name##_lock_init(void) { \ | 101 | void name##_lock_init(void) { \ |
79 | int i; \ | 102 | int i; \ |
80 | LOCKDEP_INIT_MAP(&name##_lock_dep_map, #name, &name##_lock_key, 0); \ | 103 | LOCKDEP_INIT_MAP(&name##_lock_dep_map, #name, &name##_lock_key, 0); \ |
@@ -83,6 +106,11 @@ | |||
83 | lock = &per_cpu(name##_lock, i); \ | 106 | lock = &per_cpu(name##_lock, i); \ |
84 | *lock = (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED; \ | 107 | *lock = (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED; \ |
85 | } \ | 108 | } \ |
109 | register_hotcpu_notifier(&name##_lg_cpu_notifier); \ | ||
110 | get_online_cpus(); \ | ||
111 | for_each_online_cpu(i) \ | ||
112 | cpu_set(i, name##_cpus); \ | ||
113 | put_online_cpus(); \ | ||
86 | } \ | 114 | } \ |
87 | EXPORT_SYMBOL(name##_lock_init); \ | 115 | EXPORT_SYMBOL(name##_lock_init); \ |
88 | \ | 116 | \ |
@@ -124,9 +152,9 @@ | |||
124 | \ | 152 | \ |
125 | void name##_global_lock_online(void) { \ | 153 | void name##_global_lock_online(void) { \ |
126 | int i; \ | 154 | int i; \ |
127 | preempt_disable(); \ | 155 | spin_lock(&name##_cpu_lock); \ |
128 | rwlock_acquire(&name##_lock_dep_map, 0, 0, _RET_IP_); \ | 156 | rwlock_acquire(&name##_lock_dep_map, 0, 0, _RET_IP_); \ |
129 | for_each_online_cpu(i) { \ | 157 | for_each_cpu(i, &name##_cpus) { \ |
130 | arch_spinlock_t *lock; \ | 158 | arch_spinlock_t *lock; \ |
131 | lock = &per_cpu(name##_lock, i); \ | 159 | lock = &per_cpu(name##_lock, i); \ |
132 | arch_spin_lock(lock); \ | 160 | arch_spin_lock(lock); \ |
@@ -137,12 +165,12 @@ | |||
137 | void name##_global_unlock_online(void) { \ | 165 | void name##_global_unlock_online(void) { \ |
138 | int i; \ | 166 | int i; \ |
139 | rwlock_release(&name##_lock_dep_map, 1, _RET_IP_); \ | 167 | rwlock_release(&name##_lock_dep_map, 1, _RET_IP_); \ |
140 | for_each_online_cpu(i) { \ | 168 | for_each_cpu(i, &name##_cpus) { \ |
141 | arch_spinlock_t *lock; \ | 169 | arch_spinlock_t *lock; \ |
142 | lock = &per_cpu(name##_lock, i); \ | 170 | lock = &per_cpu(name##_lock, i); \ |
143 | arch_spin_unlock(lock); \ | 171 | arch_spin_unlock(lock); \ |
144 | } \ | 172 | } \ |
145 | preempt_enable(); \ | 173 | spin_unlock(&name##_cpu_lock); \ |
146 | } \ | 174 | } \ |
147 | EXPORT_SYMBOL(name##_global_unlock_online); \ | 175 | EXPORT_SYMBOL(name##_global_unlock_online); \ |
148 | \ | 176 | \ |
diff --git a/include/linux/platform_data/macb.h b/include/linux/platform_data/macb.h new file mode 100644 index 000000000000..b081c7245ec8 --- /dev/null +++ b/include/linux/platform_data/macb.h | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __MACB_PDATA_H__ | ||
9 | #define __MACB_PDATA_H__ | ||
10 | |||
11 | struct macb_platform_data { | ||
12 | u32 phy_mask; | ||
13 | int phy_irq_pin; /* PHY IRQ */ | ||
14 | u8 is_rmii; /* using RMII interface? */ | ||
15 | }; | ||
16 | |||
17 | #endif /* __MACB_PDATA_H__ */ | ||
diff --git a/include/media/davinci/vpif_types.h b/include/media/davinci/vpif_types.h new file mode 100644 index 000000000000..9929b05cff3a --- /dev/null +++ b/include/media/davinci/vpif_types.h | |||
@@ -0,0 +1,71 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Texas Instruments Inc | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation version 2. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
16 | */ | ||
17 | #ifndef _VPIF_TYPES_H | ||
18 | #define _VPIF_TYPES_H | ||
19 | |||
20 | #define VPIF_CAPTURE_MAX_CHANNELS 2 | ||
21 | |||
22 | enum vpif_if_type { | ||
23 | VPIF_IF_BT656, | ||
24 | VPIF_IF_BT1120, | ||
25 | VPIF_IF_RAW_BAYER | ||
26 | }; | ||
27 | |||
28 | struct vpif_interface { | ||
29 | enum vpif_if_type if_type; | ||
30 | unsigned hd_pol:1; | ||
31 | unsigned vd_pol:1; | ||
32 | unsigned fid_pol:1; | ||
33 | }; | ||
34 | |||
35 | struct vpif_subdev_info { | ||
36 | const char *name; | ||
37 | struct i2c_board_info board_info; | ||
38 | u32 input; | ||
39 | u32 output; | ||
40 | unsigned can_route:1; | ||
41 | struct vpif_interface vpif_if; | ||
42 | }; | ||
43 | |||
44 | struct vpif_display_config { | ||
45 | int (*set_clock)(int, int); | ||
46 | struct vpif_subdev_info *subdevinfo; | ||
47 | int subdev_count; | ||
48 | const char **output; | ||
49 | int output_count; | ||
50 | const char *card_name; | ||
51 | }; | ||
52 | |||
53 | struct vpif_input { | ||
54 | struct v4l2_input input; | ||
55 | const char *subdev_name; | ||
56 | }; | ||
57 | |||
58 | struct vpif_capture_chan_config { | ||
59 | const struct vpif_input *inputs; | ||
60 | int input_count; | ||
61 | }; | ||
62 | |||
63 | struct vpif_capture_config { | ||
64 | int (*setup_input_channel_mode)(int); | ||
65 | int (*setup_input_path)(int, const char *); | ||
66 | struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS]; | ||
67 | struct vpif_subdev_info *subdev_info; | ||
68 | int subdev_count; | ||
69 | const char *card_name; | ||
70 | }; | ||
71 | #endif /* _VPIF_TYPES_H */ | ||
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h index b1377b931eb7..5fb2c3d10c05 100644 --- a/include/media/soc_camera.h +++ b/include/media/soc_camera.h | |||
@@ -254,7 +254,7 @@ unsigned long soc_camera_apply_board_flags(struct soc_camera_link *icl, | |||
254 | static inline struct video_device *soc_camera_i2c_to_vdev(const struct i2c_client *client) | 254 | static inline struct video_device *soc_camera_i2c_to_vdev(const struct i2c_client *client) |
255 | { | 255 | { |
256 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | 256 | struct v4l2_subdev *sd = i2c_get_clientdata(client); |
257 | struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; | 257 | struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd); |
258 | return icd ? icd->vdev : NULL; | 258 | return icd ? icd->vdev : NULL; |
259 | } | 259 | } |
260 | 260 | ||
@@ -279,6 +279,11 @@ static inline struct soc_camera_device *soc_camera_from_vbq(const struct videobu | |||
279 | return container_of(vq, struct soc_camera_device, vb_vidq); | 279 | return container_of(vq, struct soc_camera_device, vb_vidq); |
280 | } | 280 | } |
281 | 281 | ||
282 | static inline u32 soc_camera_grp_id(const struct soc_camera_device *icd) | ||
283 | { | ||
284 | return (icd->iface << 8) | (icd->devnum + 1); | ||
285 | } | ||
286 | |||
282 | void soc_camera_lock(struct vb2_queue *vq); | 287 | void soc_camera_lock(struct vb2_queue *vq); |
283 | void soc_camera_unlock(struct vb2_queue *vq); | 288 | void soc_camera_unlock(struct vb2_queue *vq); |
284 | 289 | ||
diff --git a/include/net/dst.h b/include/net/dst.h index 6faec1a60216..75766b42660e 100644 --- a/include/net/dst.h +++ b/include/net/dst.h | |||
@@ -53,6 +53,7 @@ struct dst_entry { | |||
53 | #define DST_NOHASH 0x0008 | 53 | #define DST_NOHASH 0x0008 |
54 | #define DST_NOCACHE 0x0010 | 54 | #define DST_NOCACHE 0x0010 |
55 | #define DST_NOCOUNT 0x0020 | 55 | #define DST_NOCOUNT 0x0020 |
56 | #define DST_NOPEER 0x0040 | ||
56 | 57 | ||
57 | short error; | 58 | short error; |
58 | short obsolete; | 59 | short obsolete; |
diff --git a/include/net/flow.h b/include/net/flow.h index a09447749e2d..57f15a7f1cdd 100644 --- a/include/net/flow.h +++ b/include/net/flow.h | |||
@@ -207,6 +207,7 @@ extern struct flow_cache_object *flow_cache_lookup( | |||
207 | u8 dir, flow_resolve_t resolver, void *ctx); | 207 | u8 dir, flow_resolve_t resolver, void *ctx); |
208 | 208 | ||
209 | extern void flow_cache_flush(void); | 209 | extern void flow_cache_flush(void); |
210 | extern void flow_cache_flush_deferred(void); | ||
210 | extern atomic_t flow_cache_genid; | 211 | extern atomic_t flow_cache_genid; |
211 | 212 | ||
212 | #endif | 213 | #endif |
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h index 873d5be7926c..e5a7b9aaf552 100644 --- a/include/net/ip_vs.h +++ b/include/net/ip_vs.h | |||
@@ -1207,7 +1207,7 @@ extern void ip_vs_control_cleanup(void); | |||
1207 | extern struct ip_vs_dest * | 1207 | extern struct ip_vs_dest * |
1208 | ip_vs_find_dest(struct net *net, int af, const union nf_inet_addr *daddr, | 1208 | ip_vs_find_dest(struct net *net, int af, const union nf_inet_addr *daddr, |
1209 | __be16 dport, const union nf_inet_addr *vaddr, __be16 vport, | 1209 | __be16 dport, const union nf_inet_addr *vaddr, __be16 vport, |
1210 | __u16 protocol, __u32 fwmark); | 1210 | __u16 protocol, __u32 fwmark, __u32 flags); |
1211 | extern struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp); | 1211 | extern struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp); |
1212 | 1212 | ||
1213 | 1213 | ||
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index e90e7a9935dd..a15432da27c3 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h | |||
@@ -241,6 +241,9 @@ extern struct sctp_globals { | |||
241 | * bits is an indicator of when to send and window update SACK. | 241 | * bits is an indicator of when to send and window update SACK. |
242 | */ | 242 | */ |
243 | int rwnd_update_shift; | 243 | int rwnd_update_shift; |
244 | |||
245 | /* Threshold for autoclose timeout, in seconds. */ | ||
246 | unsigned long max_autoclose; | ||
244 | } sctp_globals; | 247 | } sctp_globals; |
245 | 248 | ||
246 | #define sctp_rto_initial (sctp_globals.rto_initial) | 249 | #define sctp_rto_initial (sctp_globals.rto_initial) |
@@ -281,6 +284,7 @@ extern struct sctp_globals { | |||
281 | #define sctp_auth_enable (sctp_globals.auth_enable) | 284 | #define sctp_auth_enable (sctp_globals.auth_enable) |
282 | #define sctp_checksum_disable (sctp_globals.checksum_disable) | 285 | #define sctp_checksum_disable (sctp_globals.checksum_disable) |
283 | #define sctp_rwnd_upd_shift (sctp_globals.rwnd_update_shift) | 286 | #define sctp_rwnd_upd_shift (sctp_globals.rwnd_update_shift) |
287 | #define sctp_max_autoclose (sctp_globals.max_autoclose) | ||
284 | 288 | ||
285 | /* SCTP Socket type: UDP or TCP style. */ | 289 | /* SCTP Socket type: UDP or TCP style. */ |
286 | typedef enum { | 290 | typedef enum { |
diff --git a/include/net/sock.h b/include/net/sock.h index abb6e0f0c3c3..32e39371fba6 100644 --- a/include/net/sock.h +++ b/include/net/sock.h | |||
@@ -637,12 +637,14 @@ static inline void __sk_add_backlog(struct sock *sk, struct sk_buff *skb) | |||
637 | 637 | ||
638 | /* | 638 | /* |
639 | * Take into account size of receive queue and backlog queue | 639 | * Take into account size of receive queue and backlog queue |
640 | * Do not take into account this skb truesize, | ||
641 | * to allow even a single big packet to come. | ||
640 | */ | 642 | */ |
641 | static inline bool sk_rcvqueues_full(const struct sock *sk, const struct sk_buff *skb) | 643 | static inline bool sk_rcvqueues_full(const struct sock *sk, const struct sk_buff *skb) |
642 | { | 644 | { |
643 | unsigned int qsize = sk->sk_backlog.len + atomic_read(&sk->sk_rmem_alloc); | 645 | unsigned int qsize = sk->sk_backlog.len + atomic_read(&sk->sk_rmem_alloc); |
644 | 646 | ||
645 | return qsize + skb->truesize > sk->sk_rcvbuf; | 647 | return qsize > sk->sk_rcvbuf; |
646 | } | 648 | } |
647 | 649 | ||
648 | /* The per-socket spinlock must be held here. */ | 650 | /* The per-socket spinlock must be held here. */ |
diff --git a/include/scsi/libfcoe.h b/include/scsi/libfcoe.h index d1e95c6ac776..5a35a2a2d3c5 100644 --- a/include/scsi/libfcoe.h +++ b/include/scsi/libfcoe.h | |||
@@ -147,6 +147,7 @@ struct fcoe_ctlr { | |||
147 | u8 map_dest; | 147 | u8 map_dest; |
148 | u8 spma; | 148 | u8 spma; |
149 | u8 probe_tries; | 149 | u8 probe_tries; |
150 | u8 priority; | ||
150 | u8 dest_addr[ETH_ALEN]; | 151 | u8 dest_addr[ETH_ALEN]; |
151 | u8 ctl_src_addr[ETH_ALEN]; | 152 | u8 ctl_src_addr[ETH_ALEN]; |
152 | 153 | ||
@@ -301,6 +302,7 @@ struct fcoe_percpu_s { | |||
301 | * @lport: The associated local port | 302 | * @lport: The associated local port |
302 | * @fcoe_pending_queue: The pending Rx queue of skbs | 303 | * @fcoe_pending_queue: The pending Rx queue of skbs |
303 | * @fcoe_pending_queue_active: Indicates if the pending queue is active | 304 | * @fcoe_pending_queue_active: Indicates if the pending queue is active |
305 | * @priority: Packet priority (DCB) | ||
304 | * @max_queue_depth: Max queue depth of pending queue | 306 | * @max_queue_depth: Max queue depth of pending queue |
305 | * @min_queue_depth: Min queue depth of pending queue | 307 | * @min_queue_depth: Min queue depth of pending queue |
306 | * @timer: The queue timer | 308 | * @timer: The queue timer |
@@ -316,6 +318,7 @@ struct fcoe_port { | |||
316 | struct fc_lport *lport; | 318 | struct fc_lport *lport; |
317 | struct sk_buff_head fcoe_pending_queue; | 319 | struct sk_buff_head fcoe_pending_queue; |
318 | u8 fcoe_pending_queue_active; | 320 | u8 fcoe_pending_queue_active; |
321 | u8 priority; | ||
319 | u32 max_queue_depth; | 322 | u32 max_queue_depth; |
320 | u32 min_queue_depth; | 323 | u32 min_queue_depth; |
321 | struct timer_list timer; | 324 | struct timer_list timer; |
diff --git a/include/trace/events/writeback.h b/include/trace/events/writeback.h index b99caa8b780c..99d1d0decf88 100644 --- a/include/trace/events/writeback.h +++ b/include/trace/events/writeback.h | |||
@@ -21,6 +21,16 @@ | |||
21 | {I_REFERENCED, "I_REFERENCED"} \ | 21 | {I_REFERENCED, "I_REFERENCED"} \ |
22 | ) | 22 | ) |
23 | 23 | ||
24 | #define WB_WORK_REASON \ | ||
25 | {WB_REASON_BACKGROUND, "background"}, \ | ||
26 | {WB_REASON_TRY_TO_FREE_PAGES, "try_to_free_pages"}, \ | ||
27 | {WB_REASON_SYNC, "sync"}, \ | ||
28 | {WB_REASON_PERIODIC, "periodic"}, \ | ||
29 | {WB_REASON_LAPTOP_TIMER, "laptop_timer"}, \ | ||
30 | {WB_REASON_FREE_MORE_MEM, "free_more_memory"}, \ | ||
31 | {WB_REASON_FS_FREE_SPACE, "fs_free_space"}, \ | ||
32 | {WB_REASON_FORKER_THREAD, "forker_thread"} | ||
33 | |||
24 | struct wb_writeback_work; | 34 | struct wb_writeback_work; |
25 | 35 | ||
26 | DECLARE_EVENT_CLASS(writeback_work_class, | 36 | DECLARE_EVENT_CLASS(writeback_work_class, |
@@ -55,7 +65,7 @@ DECLARE_EVENT_CLASS(writeback_work_class, | |||
55 | __entry->for_kupdate, | 65 | __entry->for_kupdate, |
56 | __entry->range_cyclic, | 66 | __entry->range_cyclic, |
57 | __entry->for_background, | 67 | __entry->for_background, |
58 | wb_reason_name[__entry->reason] | 68 | __print_symbolic(__entry->reason, WB_WORK_REASON) |
59 | ) | 69 | ) |
60 | ); | 70 | ); |
61 | #define DEFINE_WRITEBACK_WORK_EVENT(name) \ | 71 | #define DEFINE_WRITEBACK_WORK_EVENT(name) \ |
@@ -184,7 +194,8 @@ TRACE_EVENT(writeback_queue_io, | |||
184 | __entry->older, /* older_than_this in jiffies */ | 194 | __entry->older, /* older_than_this in jiffies */ |
185 | __entry->age, /* older_than_this in relative milliseconds */ | 195 | __entry->age, /* older_than_this in relative milliseconds */ |
186 | __entry->moved, | 196 | __entry->moved, |
187 | wb_reason_name[__entry->reason]) | 197 | __print_symbolic(__entry->reason, WB_WORK_REASON) |
198 | ) | ||
188 | ); | 199 | ); |
189 | 200 | ||
190 | TRACE_EVENT(global_dirty_state, | 201 | TRACE_EVENT(global_dirty_state, |
diff --git a/include/xen/interface/io/xs_wire.h b/include/xen/interface/io/xs_wire.h index f0b6890370be..f6f07aa35af5 100644 --- a/include/xen/interface/io/xs_wire.h +++ b/include/xen/interface/io/xs_wire.h | |||
@@ -29,8 +29,7 @@ enum xsd_sockmsg_type | |||
29 | XS_IS_DOMAIN_INTRODUCED, | 29 | XS_IS_DOMAIN_INTRODUCED, |
30 | XS_RESUME, | 30 | XS_RESUME, |
31 | XS_SET_TARGET, | 31 | XS_SET_TARGET, |
32 | XS_RESTRICT, | 32 | XS_RESTRICT |
33 | XS_RESET_WATCHES | ||
34 | }; | 33 | }; |
35 | 34 | ||
36 | #define XS_WRITE_NONE "NONE" | 35 | #define XS_WRITE_NONE "NONE" |
diff --git a/kernel/cgroup.c b/kernel/cgroup.c index d9d5648f3cdc..a184470cf9b5 100644 --- a/kernel/cgroup.c +++ b/kernel/cgroup.c | |||
@@ -2098,11 +2098,6 @@ int cgroup_attach_proc(struct cgroup *cgrp, struct task_struct *leader) | |||
2098 | continue; | 2098 | continue; |
2099 | /* get old css_set pointer */ | 2099 | /* get old css_set pointer */ |
2100 | task_lock(tsk); | 2100 | task_lock(tsk); |
2101 | if (tsk->flags & PF_EXITING) { | ||
2102 | /* ignore this task if it's going away */ | ||
2103 | task_unlock(tsk); | ||
2104 | continue; | ||
2105 | } | ||
2106 | oldcg = tsk->cgroups; | 2101 | oldcg = tsk->cgroups; |
2107 | get_css_set(oldcg); | 2102 | get_css_set(oldcg); |
2108 | task_unlock(tsk); | 2103 | task_unlock(tsk); |
diff --git a/kernel/cpuset.c b/kernel/cpuset.c index 9fe58c46a426..0b1712dba587 100644 --- a/kernel/cpuset.c +++ b/kernel/cpuset.c | |||
@@ -123,6 +123,19 @@ static inline struct cpuset *task_cs(struct task_struct *task) | |||
123 | struct cpuset, css); | 123 | struct cpuset, css); |
124 | } | 124 | } |
125 | 125 | ||
126 | #ifdef CONFIG_NUMA | ||
127 | static inline bool task_has_mempolicy(struct task_struct *task) | ||
128 | { | ||
129 | return task->mempolicy; | ||
130 | } | ||
131 | #else | ||
132 | static inline bool task_has_mempolicy(struct task_struct *task) | ||
133 | { | ||
134 | return false; | ||
135 | } | ||
136 | #endif | ||
137 | |||
138 | |||
126 | /* bits in struct cpuset flags field */ | 139 | /* bits in struct cpuset flags field */ |
127 | typedef enum { | 140 | typedef enum { |
128 | CS_CPU_EXCLUSIVE, | 141 | CS_CPU_EXCLUSIVE, |
@@ -949,7 +962,7 @@ static void cpuset_migrate_mm(struct mm_struct *mm, const nodemask_t *from, | |||
949 | static void cpuset_change_task_nodemask(struct task_struct *tsk, | 962 | static void cpuset_change_task_nodemask(struct task_struct *tsk, |
950 | nodemask_t *newmems) | 963 | nodemask_t *newmems) |
951 | { | 964 | { |
952 | bool masks_disjoint = !nodes_intersects(*newmems, tsk->mems_allowed); | 965 | bool need_loop; |
953 | 966 | ||
954 | repeat: | 967 | repeat: |
955 | /* | 968 | /* |
@@ -962,6 +975,14 @@ repeat: | |||
962 | return; | 975 | return; |
963 | 976 | ||
964 | task_lock(tsk); | 977 | task_lock(tsk); |
978 | /* | ||
979 | * Determine if a loop is necessary if another thread is doing | ||
980 | * get_mems_allowed(). If at least one node remains unchanged and | ||
981 | * tsk does not have a mempolicy, then an empty nodemask will not be | ||
982 | * possible when mems_allowed is larger than a word. | ||
983 | */ | ||
984 | need_loop = task_has_mempolicy(tsk) || | ||
985 | !nodes_intersects(*newmems, tsk->mems_allowed); | ||
965 | nodes_or(tsk->mems_allowed, tsk->mems_allowed, *newmems); | 986 | nodes_or(tsk->mems_allowed, tsk->mems_allowed, *newmems); |
966 | mpol_rebind_task(tsk, newmems, MPOL_REBIND_STEP1); | 987 | mpol_rebind_task(tsk, newmems, MPOL_REBIND_STEP1); |
967 | 988 | ||
@@ -981,11 +1002,9 @@ repeat: | |||
981 | 1002 | ||
982 | /* | 1003 | /* |
983 | * Allocation of memory is very fast, we needn't sleep when waiting | 1004 | * Allocation of memory is very fast, we needn't sleep when waiting |
984 | * for the read-side. No wait is necessary, however, if at least one | 1005 | * for the read-side. |
985 | * node remains unchanged. | ||
986 | */ | 1006 | */ |
987 | while (masks_disjoint && | 1007 | while (need_loop && ACCESS_ONCE(tsk->mems_allowed_change_disable)) { |
988 | ACCESS_ONCE(tsk->mems_allowed_change_disable)) { | ||
989 | task_unlock(tsk); | 1008 | task_unlock(tsk); |
990 | if (!task_curr(tsk)) | 1009 | if (!task_curr(tsk)) |
991 | yield(); | 1010 | yield(); |
diff --git a/kernel/events/core.c b/kernel/events/core.c index d3b9df5962c2..58690af323e4 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c | |||
@@ -3558,9 +3558,13 @@ static void ring_buffer_wakeup(struct perf_event *event) | |||
3558 | 3558 | ||
3559 | rcu_read_lock(); | 3559 | rcu_read_lock(); |
3560 | rb = rcu_dereference(event->rb); | 3560 | rb = rcu_dereference(event->rb); |
3561 | list_for_each_entry_rcu(event, &rb->event_list, rb_entry) { | 3561 | if (!rb) |
3562 | goto unlock; | ||
3563 | |||
3564 | list_for_each_entry_rcu(event, &rb->event_list, rb_entry) | ||
3562 | wake_up_all(&event->waitq); | 3565 | wake_up_all(&event->waitq); |
3563 | } | 3566 | |
3567 | unlock: | ||
3564 | rcu_read_unlock(); | 3568 | rcu_read_unlock(); |
3565 | } | 3569 | } |
3566 | 3570 | ||
diff --git a/kernel/futex.c b/kernel/futex.c index ea87f4d2f455..1614be20173d 100644 --- a/kernel/futex.c +++ b/kernel/futex.c | |||
@@ -314,17 +314,29 @@ again: | |||
314 | #endif | 314 | #endif |
315 | 315 | ||
316 | lock_page(page_head); | 316 | lock_page(page_head); |
317 | |||
318 | /* | ||
319 | * If page_head->mapping is NULL, then it cannot be a PageAnon | ||
320 | * page; but it might be the ZERO_PAGE or in the gate area or | ||
321 | * in a special mapping (all cases which we are happy to fail); | ||
322 | * or it may have been a good file page when get_user_pages_fast | ||
323 | * found it, but truncated or holepunched or subjected to | ||
324 | * invalidate_complete_page2 before we got the page lock (also | ||
325 | * cases which we are happy to fail). And we hold a reference, | ||
326 | * so refcount care in invalidate_complete_page's remove_mapping | ||
327 | * prevents drop_caches from setting mapping to NULL beneath us. | ||
328 | * | ||
329 | * The case we do have to guard against is when memory pressure made | ||
330 | * shmem_writepage move it from filecache to swapcache beneath us: | ||
331 | * an unlikely race, but we do need to retry for page_head->mapping. | ||
332 | */ | ||
317 | if (!page_head->mapping) { | 333 | if (!page_head->mapping) { |
334 | int shmem_swizzled = PageSwapCache(page_head); | ||
318 | unlock_page(page_head); | 335 | unlock_page(page_head); |
319 | put_page(page_head); | 336 | put_page(page_head); |
320 | /* | 337 | if (shmem_swizzled) |
321 | * ZERO_PAGE pages don't have a mapping. Avoid a busy loop | 338 | goto again; |
322 | * trying to find one. RW mapping would have COW'd (and thus | 339 | return -EFAULT; |
323 | * have a mapping) so this page is RO and won't ever change. | ||
324 | */ | ||
325 | if ((page_head == ZERO_PAGE(address))) | ||
326 | return -EFAULT; | ||
327 | goto again; | ||
328 | } | 340 | } |
329 | 341 | ||
330 | /* | 342 | /* |
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 200ce832c585..7ca523b249ef 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c | |||
@@ -143,11 +143,6 @@ int irq_domain_simple_dt_translate(struct irq_domain *d, | |||
143 | return 0; | 143 | return 0; |
144 | } | 144 | } |
145 | 145 | ||
146 | struct irq_domain_ops irq_domain_simple_ops = { | ||
147 | .dt_translate = irq_domain_simple_dt_translate, | ||
148 | }; | ||
149 | EXPORT_SYMBOL_GPL(irq_domain_simple_ops); | ||
150 | |||
151 | /** | 146 | /** |
152 | * irq_domain_create_simple() - Set up a 'simple' translation range | 147 | * irq_domain_create_simple() - Set up a 'simple' translation range |
153 | */ | 148 | */ |
@@ -182,3 +177,10 @@ void irq_domain_generate_simple(const struct of_device_id *match, | |||
182 | } | 177 | } |
183 | EXPORT_SYMBOL_GPL(irq_domain_generate_simple); | 178 | EXPORT_SYMBOL_GPL(irq_domain_generate_simple); |
184 | #endif /* CONFIG_OF_IRQ */ | 179 | #endif /* CONFIG_OF_IRQ */ |
180 | |||
181 | struct irq_domain_ops irq_domain_simple_ops = { | ||
182 | #ifdef CONFIG_OF_IRQ | ||
183 | .dt_translate = irq_domain_simple_dt_translate, | ||
184 | #endif /* CONFIG_OF_IRQ */ | ||
185 | }; | ||
186 | EXPORT_SYMBOL_GPL(irq_domain_simple_ops); | ||
diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c index a78ed2736ba7..8a39fa3e3c6c 100644 --- a/kernel/sched_fair.c +++ b/kernel/sched_fair.c | |||
@@ -2352,13 +2352,11 @@ again: | |||
2352 | if (!smt && (sd->flags & SD_SHARE_CPUPOWER)) | 2352 | if (!smt && (sd->flags & SD_SHARE_CPUPOWER)) |
2353 | continue; | 2353 | continue; |
2354 | 2354 | ||
2355 | if (!(sd->flags & SD_SHARE_PKG_RESOURCES)) { | 2355 | if (smt && !(sd->flags & SD_SHARE_CPUPOWER)) |
2356 | if (!smt) { | 2356 | break; |
2357 | smt = 1; | 2357 | |
2358 | goto again; | 2358 | if (!(sd->flags & SD_SHARE_PKG_RESOURCES)) |
2359 | } | ||
2360 | break; | 2359 | break; |
2361 | } | ||
2362 | 2360 | ||
2363 | sg = sd->groups; | 2361 | sg = sd->groups; |
2364 | do { | 2362 | do { |
@@ -2378,6 +2376,10 @@ next: | |||
2378 | sg = sg->next; | 2376 | sg = sg->next; |
2379 | } while (sg != sd->groups); | 2377 | } while (sg != sd->groups); |
2380 | } | 2378 | } |
2379 | if (!smt) { | ||
2380 | smt = 1; | ||
2381 | goto again; | ||
2382 | } | ||
2381 | done: | 2383 | done: |
2382 | rcu_read_unlock(); | 2384 | rcu_read_unlock(); |
2383 | 2385 | ||
diff --git a/kernel/sysctl_binary.c b/kernel/sysctl_binary.c index 6318b511afa1..a650694883a1 100644 --- a/kernel/sysctl_binary.c +++ b/kernel/sysctl_binary.c | |||
@@ -1354,7 +1354,7 @@ static ssize_t binary_sysctl(const int *name, int nlen, | |||
1354 | 1354 | ||
1355 | fput(file); | 1355 | fput(file); |
1356 | out_putname: | 1356 | out_putname: |
1357 | putname(pathname); | 1357 | __putname(pathname); |
1358 | out: | 1358 | out: |
1359 | return result; | 1359 | return result; |
1360 | } | 1360 | } |
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c index c4eb71c8b2ea..1ecd6ba36d6c 100644 --- a/kernel/time/clockevents.c +++ b/kernel/time/clockevents.c | |||
@@ -387,7 +387,6 @@ void clockevents_exchange_device(struct clock_event_device *old, | |||
387 | * released list and do a notify add later. | 387 | * released list and do a notify add later. |
388 | */ | 388 | */ |
389 | if (old) { | 389 | if (old) { |
390 | old->event_handler = clockevents_handle_noop; | ||
391 | clockevents_set_mode(old, CLOCK_EVT_MODE_UNUSED); | 390 | clockevents_set_mode(old, CLOCK_EVT_MODE_UNUSED); |
392 | list_del(&old->list); | 391 | list_del(&old->list); |
393 | list_add(&old->list, &clockevents_released); | 392 | list_add(&old->list, &clockevents_released); |
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c index da2f760e780c..d3ad022136e5 100644 --- a/kernel/time/clocksource.c +++ b/kernel/time/clocksource.c | |||
@@ -647,7 +647,7 @@ static void clocksource_enqueue(struct clocksource *cs) | |||
647 | 647 | ||
648 | /** | 648 | /** |
649 | * __clocksource_updatefreq_scale - Used update clocksource with new freq | 649 | * __clocksource_updatefreq_scale - Used update clocksource with new freq |
650 | * @t: clocksource to be registered | 650 | * @cs: clocksource to be registered |
651 | * @scale: Scale factor multiplied against freq to get clocksource hz | 651 | * @scale: Scale factor multiplied against freq to get clocksource hz |
652 | * @freq: clocksource frequency (cycles per second) divided by scale | 652 | * @freq: clocksource frequency (cycles per second) divided by scale |
653 | * | 653 | * |
@@ -699,7 +699,7 @@ EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale); | |||
699 | 699 | ||
700 | /** | 700 | /** |
701 | * __clocksource_register_scale - Used to install new clocksources | 701 | * __clocksource_register_scale - Used to install new clocksources |
702 | * @t: clocksource to be registered | 702 | * @cs: clocksource to be registered |
703 | * @scale: Scale factor multiplied against freq to get clocksource hz | 703 | * @scale: Scale factor multiplied against freq to get clocksource hz |
704 | * @freq: clocksource frequency (cycles per second) divided by scale | 704 | * @freq: clocksource frequency (cycles per second) divided by scale |
705 | * | 705 | * |
@@ -727,7 +727,7 @@ EXPORT_SYMBOL_GPL(__clocksource_register_scale); | |||
727 | 727 | ||
728 | /** | 728 | /** |
729 | * clocksource_register - Used to install new clocksources | 729 | * clocksource_register - Used to install new clocksources |
730 | * @t: clocksource to be registered | 730 | * @cs: clocksource to be registered |
731 | * | 731 | * |
732 | * Returns -EBUSY if registration fails, zero otherwise. | 732 | * Returns -EBUSY if registration fails, zero otherwise. |
733 | */ | 733 | */ |
@@ -761,6 +761,8 @@ static void __clocksource_change_rating(struct clocksource *cs, int rating) | |||
761 | 761 | ||
762 | /** | 762 | /** |
763 | * clocksource_change_rating - Change the rating of a registered clocksource | 763 | * clocksource_change_rating - Change the rating of a registered clocksource |
764 | * @cs: clocksource to be changed | ||
765 | * @rating: new rating | ||
764 | */ | 766 | */ |
765 | void clocksource_change_rating(struct clocksource *cs, int rating) | 767 | void clocksource_change_rating(struct clocksource *cs, int rating) |
766 | { | 768 | { |
@@ -772,6 +774,7 @@ EXPORT_SYMBOL(clocksource_change_rating); | |||
772 | 774 | ||
773 | /** | 775 | /** |
774 | * clocksource_unregister - remove a registered clocksource | 776 | * clocksource_unregister - remove a registered clocksource |
777 | * @cs: clocksource to be unregistered | ||
775 | */ | 778 | */ |
776 | void clocksource_unregister(struct clocksource *cs) | 779 | void clocksource_unregister(struct clocksource *cs) |
777 | { | 780 | { |
@@ -787,6 +790,7 @@ EXPORT_SYMBOL(clocksource_unregister); | |||
787 | /** | 790 | /** |
788 | * sysfs_show_current_clocksources - sysfs interface for current clocksource | 791 | * sysfs_show_current_clocksources - sysfs interface for current clocksource |
789 | * @dev: unused | 792 | * @dev: unused |
793 | * @attr: unused | ||
790 | * @buf: char buffer to be filled with clocksource list | 794 | * @buf: char buffer to be filled with clocksource list |
791 | * | 795 | * |
792 | * Provides sysfs interface for listing current clocksource. | 796 | * Provides sysfs interface for listing current clocksource. |
@@ -807,6 +811,7 @@ sysfs_show_current_clocksources(struct sys_device *dev, | |||
807 | /** | 811 | /** |
808 | * sysfs_override_clocksource - interface for manually overriding clocksource | 812 | * sysfs_override_clocksource - interface for manually overriding clocksource |
809 | * @dev: unused | 813 | * @dev: unused |
814 | * @attr: unused | ||
810 | * @buf: name of override clocksource | 815 | * @buf: name of override clocksource |
811 | * @count: length of buffer | 816 | * @count: length of buffer |
812 | * | 817 | * |
@@ -842,6 +847,7 @@ static ssize_t sysfs_override_clocksource(struct sys_device *dev, | |||
842 | /** | 847 | /** |
843 | * sysfs_show_available_clocksources - sysfs interface for listing clocksource | 848 | * sysfs_show_available_clocksources - sysfs interface for listing clocksource |
844 | * @dev: unused | 849 | * @dev: unused |
850 | * @attr: unused | ||
845 | * @buf: char buffer to be filled with clocksource list | 851 | * @buf: char buffer to be filled with clocksource list |
846 | * | 852 | * |
847 | * Provides sysfs interface for listing registered clocksources | 853 | * Provides sysfs interface for listing registered clocksources |
diff --git a/mm/filemap.c b/mm/filemap.c index c106d3b3cc64..5f0a3c91fdac 100644 --- a/mm/filemap.c +++ b/mm/filemap.c | |||
@@ -1828,7 +1828,7 @@ repeat: | |||
1828 | page = __page_cache_alloc(gfp | __GFP_COLD); | 1828 | page = __page_cache_alloc(gfp | __GFP_COLD); |
1829 | if (!page) | 1829 | if (!page) |
1830 | return ERR_PTR(-ENOMEM); | 1830 | return ERR_PTR(-ENOMEM); |
1831 | err = add_to_page_cache_lru(page, mapping, index, GFP_KERNEL); | 1831 | err = add_to_page_cache_lru(page, mapping, index, gfp); |
1832 | if (unlikely(err)) { | 1832 | if (unlikely(err)) { |
1833 | page_cache_release(page); | 1833 | page_cache_release(page); |
1834 | if (err == -EEXIST) | 1834 | if (err == -EEXIST) |
@@ -1925,10 +1925,7 @@ static struct page *wait_on_page_read(struct page *page) | |||
1925 | * @gfp: the page allocator flags to use if allocating | 1925 | * @gfp: the page allocator flags to use if allocating |
1926 | * | 1926 | * |
1927 | * This is the same as "read_mapping_page(mapping, index, NULL)", but with | 1927 | * This is the same as "read_mapping_page(mapping, index, NULL)", but with |
1928 | * any new page allocations done using the specified allocation flags. Note | 1928 | * any new page allocations done using the specified allocation flags. |
1929 | * that the Radix tree operations will still use GFP_KERNEL, so you can't | ||
1930 | * expect to do this atomically or anything like that - but you can pass in | ||
1931 | * other page requirements. | ||
1932 | * | 1929 | * |
1933 | * If the page does not get brought uptodate, return -EIO. | 1930 | * If the page does not get brought uptodate, return -EIO. |
1934 | */ | 1931 | */ |
diff --git a/mm/hugetlb.c b/mm/hugetlb.c index 73f17c0293c0..2316840b337a 100644 --- a/mm/hugetlb.c +++ b/mm/hugetlb.c | |||
@@ -901,7 +901,6 @@ retry: | |||
901 | h->resv_huge_pages += delta; | 901 | h->resv_huge_pages += delta; |
902 | ret = 0; | 902 | ret = 0; |
903 | 903 | ||
904 | spin_unlock(&hugetlb_lock); | ||
905 | /* Free the needed pages to the hugetlb pool */ | 904 | /* Free the needed pages to the hugetlb pool */ |
906 | list_for_each_entry_safe(page, tmp, &surplus_list, lru) { | 905 | list_for_each_entry_safe(page, tmp, &surplus_list, lru) { |
907 | if ((--needed) < 0) | 906 | if ((--needed) < 0) |
@@ -915,6 +914,7 @@ retry: | |||
915 | VM_BUG_ON(page_count(page)); | 914 | VM_BUG_ON(page_count(page)); |
916 | enqueue_huge_page(h, page); | 915 | enqueue_huge_page(h, page); |
917 | } | 916 | } |
917 | spin_unlock(&hugetlb_lock); | ||
918 | 918 | ||
919 | /* Free unnecessary surplus pages to the buddy allocator */ | 919 | /* Free unnecessary surplus pages to the buddy allocator */ |
920 | free: | 920 | free: |
diff --git a/mm/memcontrol.c b/mm/memcontrol.c index 6aff93c98aca..b63f5f7dfa07 100644 --- a/mm/memcontrol.c +++ b/mm/memcontrol.c | |||
@@ -4907,9 +4907,9 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont) | |||
4907 | int cpu; | 4907 | int cpu; |
4908 | enable_swap_cgroup(); | 4908 | enable_swap_cgroup(); |
4909 | parent = NULL; | 4909 | parent = NULL; |
4910 | root_mem_cgroup = memcg; | ||
4911 | if (mem_cgroup_soft_limit_tree_init()) | 4910 | if (mem_cgroup_soft_limit_tree_init()) |
4912 | goto free_out; | 4911 | goto free_out; |
4912 | root_mem_cgroup = memcg; | ||
4913 | for_each_possible_cpu(cpu) { | 4913 | for_each_possible_cpu(cpu) { |
4914 | struct memcg_stock_pcp *stock = | 4914 | struct memcg_stock_pcp *stock = |
4915 | &per_cpu(memcg_stock, cpu); | 4915 | &per_cpu(memcg_stock, cpu); |
@@ -4948,7 +4948,6 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont) | |||
4948 | return &memcg->css; | 4948 | return &memcg->css; |
4949 | free_out: | 4949 | free_out: |
4950 | __mem_cgroup_free(memcg); | 4950 | __mem_cgroup_free(memcg); |
4951 | root_mem_cgroup = NULL; | ||
4952 | return ERR_PTR(error); | 4951 | return ERR_PTR(error); |
4953 | } | 4952 | } |
4954 | 4953 | ||
diff --git a/mm/mempolicy.c b/mm/mempolicy.c index adc395481813..c3fdbcb17658 100644 --- a/mm/mempolicy.c +++ b/mm/mempolicy.c | |||
@@ -636,6 +636,7 @@ static int mbind_range(struct mm_struct *mm, unsigned long start, | |||
636 | struct vm_area_struct *prev; | 636 | struct vm_area_struct *prev; |
637 | struct vm_area_struct *vma; | 637 | struct vm_area_struct *vma; |
638 | int err = 0; | 638 | int err = 0; |
639 | pgoff_t pgoff; | ||
639 | unsigned long vmstart; | 640 | unsigned long vmstart; |
640 | unsigned long vmend; | 641 | unsigned long vmend; |
641 | 642 | ||
@@ -643,13 +644,21 @@ static int mbind_range(struct mm_struct *mm, unsigned long start, | |||
643 | if (!vma || vma->vm_start > start) | 644 | if (!vma || vma->vm_start > start) |
644 | return -EFAULT; | 645 | return -EFAULT; |
645 | 646 | ||
647 | if (start > vma->vm_start) | ||
648 | prev = vma; | ||
649 | |||
646 | for (; vma && vma->vm_start < end; prev = vma, vma = next) { | 650 | for (; vma && vma->vm_start < end; prev = vma, vma = next) { |
647 | next = vma->vm_next; | 651 | next = vma->vm_next; |
648 | vmstart = max(start, vma->vm_start); | 652 | vmstart = max(start, vma->vm_start); |
649 | vmend = min(end, vma->vm_end); | 653 | vmend = min(end, vma->vm_end); |
650 | 654 | ||
655 | if (mpol_equal(vma_policy(vma), new_pol)) | ||
656 | continue; | ||
657 | |||
658 | pgoff = vma->vm_pgoff + | ||
659 | ((vmstart - vma->vm_start) >> PAGE_SHIFT); | ||
651 | prev = vma_merge(mm, prev, vmstart, vmend, vma->vm_flags, | 660 | prev = vma_merge(mm, prev, vmstart, vmend, vma->vm_flags, |
652 | vma->anon_vma, vma->vm_file, vma->vm_pgoff, | 661 | vma->anon_vma, vma->vm_file, pgoff, |
653 | new_pol); | 662 | new_pol); |
654 | if (prev) { | 663 | if (prev) { |
655 | vma = prev; | 664 | vma = prev; |
diff --git a/mm/oom_kill.c b/mm/oom_kill.c index 76f2c5ae908e..069b64e521fc 100644 --- a/mm/oom_kill.c +++ b/mm/oom_kill.c | |||
@@ -176,7 +176,7 @@ static bool oom_unkillable_task(struct task_struct *p, | |||
176 | unsigned int oom_badness(struct task_struct *p, struct mem_cgroup *mem, | 176 | unsigned int oom_badness(struct task_struct *p, struct mem_cgroup *mem, |
177 | const nodemask_t *nodemask, unsigned long totalpages) | 177 | const nodemask_t *nodemask, unsigned long totalpages) |
178 | { | 178 | { |
179 | int points; | 179 | long points; |
180 | 180 | ||
181 | if (oom_unkillable_task(p, mem, nodemask)) | 181 | if (oom_unkillable_task(p, mem, nodemask)) |
182 | return 0; | 182 | return 0; |
diff --git a/mm/percpu.c b/mm/percpu.c index 3bb810a72006..716eb4acf2fc 100644 --- a/mm/percpu.c +++ b/mm/percpu.c | |||
@@ -1023,9 +1023,11 @@ phys_addr_t per_cpu_ptr_to_phys(void *addr) | |||
1023 | if (!is_vmalloc_addr(addr)) | 1023 | if (!is_vmalloc_addr(addr)) |
1024 | return __pa(addr); | 1024 | return __pa(addr); |
1025 | else | 1025 | else |
1026 | return page_to_phys(vmalloc_to_page(addr)); | 1026 | return page_to_phys(vmalloc_to_page(addr)) + |
1027 | offset_in_page(addr); | ||
1027 | } else | 1028 | } else |
1028 | return page_to_phys(pcpu_addr_to_page(addr)); | 1029 | return page_to_phys(pcpu_addr_to_page(addr)) + |
1030 | offset_in_page(addr); | ||
1029 | } | 1031 | } |
1030 | 1032 | ||
1031 | /** | 1033 | /** |
diff --git a/mm/vmalloc.c b/mm/vmalloc.c index f87577042a86..21fdf46ad5aa 100644 --- a/mm/vmalloc.c +++ b/mm/vmalloc.c | |||
@@ -1315,7 +1315,7 @@ static struct vm_struct *__get_vm_area_node(unsigned long size, | |||
1315 | unsigned long align, unsigned long flags, unsigned long start, | 1315 | unsigned long align, unsigned long flags, unsigned long start, |
1316 | unsigned long end, int node, gfp_t gfp_mask, void *caller) | 1316 | unsigned long end, int node, gfp_t gfp_mask, void *caller) |
1317 | { | 1317 | { |
1318 | static struct vmap_area *va; | 1318 | struct vmap_area *va; |
1319 | struct vm_struct *area; | 1319 | struct vm_struct *area; |
1320 | 1320 | ||
1321 | BUG_ON(in_interrupt()); | 1321 | BUG_ON(in_interrupt()); |
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c index e0af7237cd92..c1c597e3e198 100644 --- a/net/bluetooth/hci_conn.c +++ b/net/bluetooth/hci_conn.c | |||
@@ -673,7 +673,7 @@ int hci_conn_security(struct hci_conn *conn, __u8 sec_level, __u8 auth_type) | |||
673 | goto encrypt; | 673 | goto encrypt; |
674 | 674 | ||
675 | auth: | 675 | auth: |
676 | if (test_and_set_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) | 676 | if (test_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) |
677 | return 0; | 677 | return 0; |
678 | 678 | ||
679 | if (!hci_conn_auth(conn, sec_level, auth_type)) | 679 | if (!hci_conn_auth(conn, sec_level, auth_type)) |
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c index 5ea94a1eecf2..17b5b1cd9657 100644 --- a/net/bluetooth/l2cap_core.c +++ b/net/bluetooth/l2cap_core.c | |||
@@ -2152,7 +2152,7 @@ static int l2cap_parse_conf_rsp(struct l2cap_chan *chan, void *rsp, int len, voi | |||
2152 | void *ptr = req->data; | 2152 | void *ptr = req->data; |
2153 | int type, olen; | 2153 | int type, olen; |
2154 | unsigned long val; | 2154 | unsigned long val; |
2155 | struct l2cap_conf_rfc rfc; | 2155 | struct l2cap_conf_rfc rfc = { .mode = L2CAP_MODE_BASIC }; |
2156 | 2156 | ||
2157 | BT_DBG("chan %p, rsp %p, len %d, req %p", chan, rsp, len, data); | 2157 | BT_DBG("chan %p, rsp %p, len %d, req %p", chan, rsp, len, data); |
2158 | 2158 | ||
@@ -2271,6 +2271,16 @@ static void l2cap_conf_rfc_get(struct l2cap_chan *chan, void *rsp, int len) | |||
2271 | } | 2271 | } |
2272 | } | 2272 | } |
2273 | 2273 | ||
2274 | /* Use sane default values in case a misbehaving remote device | ||
2275 | * did not send an RFC option. | ||
2276 | */ | ||
2277 | rfc.mode = chan->mode; | ||
2278 | rfc.retrans_timeout = cpu_to_le16(L2CAP_DEFAULT_RETRANS_TO); | ||
2279 | rfc.monitor_timeout = cpu_to_le16(L2CAP_DEFAULT_MONITOR_TO); | ||
2280 | rfc.max_pdu_size = cpu_to_le16(chan->imtu); | ||
2281 | |||
2282 | BT_ERR("Expected RFC option was not found, using defaults"); | ||
2283 | |||
2274 | done: | 2284 | done: |
2275 | switch (rfc.mode) { | 2285 | switch (rfc.mode) { |
2276 | case L2CAP_MODE_ERTM: | 2286 | case L2CAP_MODE_ERTM: |
diff --git a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c index 4e32e18211f9..2d28dfe98389 100644 --- a/net/bluetooth/rfcomm/core.c +++ b/net/bluetooth/rfcomm/core.c | |||
@@ -1146,6 +1146,7 @@ static int rfcomm_recv_ua(struct rfcomm_session *s, u8 dlci) | |||
1146 | if (list_empty(&s->dlcs)) { | 1146 | if (list_empty(&s->dlcs)) { |
1147 | s->state = BT_DISCONN; | 1147 | s->state = BT_DISCONN; |
1148 | rfcomm_send_disc(s, 0); | 1148 | rfcomm_send_disc(s, 0); |
1149 | rfcomm_session_clear_timer(s); | ||
1149 | } | 1150 | } |
1150 | 1151 | ||
1151 | break; | 1152 | break; |
diff --git a/net/bridge/br_netfilter.c b/net/bridge/br_netfilter.c index d6ec3720c77e..fa8b8f763580 100644 --- a/net/bridge/br_netfilter.c +++ b/net/bridge/br_netfilter.c | |||
@@ -114,12 +114,18 @@ static struct neighbour *fake_neigh_lookup(const struct dst_entry *dst, const vo | |||
114 | return NULL; | 114 | return NULL; |
115 | } | 115 | } |
116 | 116 | ||
117 | static unsigned int fake_mtu(const struct dst_entry *dst) | ||
118 | { | ||
119 | return dst->dev->mtu; | ||
120 | } | ||
121 | |||
117 | static struct dst_ops fake_dst_ops = { | 122 | static struct dst_ops fake_dst_ops = { |
118 | .family = AF_INET, | 123 | .family = AF_INET, |
119 | .protocol = cpu_to_be16(ETH_P_IP), | 124 | .protocol = cpu_to_be16(ETH_P_IP), |
120 | .update_pmtu = fake_update_pmtu, | 125 | .update_pmtu = fake_update_pmtu, |
121 | .cow_metrics = fake_cow_metrics, | 126 | .cow_metrics = fake_cow_metrics, |
122 | .neigh_lookup = fake_neigh_lookup, | 127 | .neigh_lookup = fake_neigh_lookup, |
128 | .mtu = fake_mtu, | ||
123 | }; | 129 | }; |
124 | 130 | ||
125 | /* | 131 | /* |
@@ -141,7 +147,7 @@ void br_netfilter_rtable_init(struct net_bridge *br) | |||
141 | rt->dst.dev = br->dev; | 147 | rt->dst.dev = br->dev; |
142 | rt->dst.path = &rt->dst; | 148 | rt->dst.path = &rt->dst; |
143 | dst_init_metrics(&rt->dst, br_dst_default_metrics, true); | 149 | dst_init_metrics(&rt->dst, br_dst_default_metrics, true); |
144 | rt->dst.flags = DST_NOXFRM; | 150 | rt->dst.flags = DST_NOXFRM | DST_NOPEER; |
145 | rt->dst.ops = &fake_dst_ops; | 151 | rt->dst.ops = &fake_dst_ops; |
146 | } | 152 | } |
147 | 153 | ||
diff --git a/net/core/flow.c b/net/core/flow.c index 8ae42de9c79e..e318c7e98042 100644 --- a/net/core/flow.c +++ b/net/core/flow.c | |||
@@ -358,6 +358,18 @@ void flow_cache_flush(void) | |||
358 | put_online_cpus(); | 358 | put_online_cpus(); |
359 | } | 359 | } |
360 | 360 | ||
361 | static void flow_cache_flush_task(struct work_struct *work) | ||
362 | { | ||
363 | flow_cache_flush(); | ||
364 | } | ||
365 | |||
366 | static DECLARE_WORK(flow_cache_flush_work, flow_cache_flush_task); | ||
367 | |||
368 | void flow_cache_flush_deferred(void) | ||
369 | { | ||
370 | schedule_work(&flow_cache_flush_work); | ||
371 | } | ||
372 | |||
361 | static int __cpuinit flow_cache_cpu_prepare(struct flow_cache *fc, int cpu) | 373 | static int __cpuinit flow_cache_cpu_prepare(struct flow_cache *fc, int cpu) |
362 | { | 374 | { |
363 | struct flow_cache_percpu *fcp = per_cpu_ptr(fc->percpu, cpu); | 375 | struct flow_cache_percpu *fcp = per_cpu_ptr(fc->percpu, cpu); |
diff --git a/net/core/net-sysfs.c b/net/core/net-sysfs.c index c71c434a4c05..385aefe53648 100644 --- a/net/core/net-sysfs.c +++ b/net/core/net-sysfs.c | |||
@@ -665,11 +665,14 @@ static ssize_t store_rps_dev_flow_table_cnt(struct netdev_rx_queue *queue, | |||
665 | if (count) { | 665 | if (count) { |
666 | int i; | 666 | int i; |
667 | 667 | ||
668 | if (count > 1<<30) { | 668 | if (count > INT_MAX) |
669 | return -EINVAL; | ||
670 | count = roundup_pow_of_two(count); | ||
671 | if (count > (ULONG_MAX - sizeof(struct rps_dev_flow_table)) | ||
672 | / sizeof(struct rps_dev_flow)) { | ||
669 | /* Enforce a limit to prevent overflow */ | 673 | /* Enforce a limit to prevent overflow */ |
670 | return -EINVAL; | 674 | return -EINVAL; |
671 | } | 675 | } |
672 | count = roundup_pow_of_two(count); | ||
673 | table = vmalloc(RPS_DEV_FLOW_TABLE_SIZE(count)); | 676 | table = vmalloc(RPS_DEV_FLOW_TABLE_SIZE(count)); |
674 | if (!table) | 677 | if (!table) |
675 | return -ENOMEM; | 678 | return -ENOMEM; |
diff --git a/net/core/sock.c b/net/core/sock.c index 4ed7b1d12f5e..b23f174ab84c 100644 --- a/net/core/sock.c +++ b/net/core/sock.c | |||
@@ -288,11 +288,7 @@ int sock_queue_rcv_skb(struct sock *sk, struct sk_buff *skb) | |||
288 | unsigned long flags; | 288 | unsigned long flags; |
289 | struct sk_buff_head *list = &sk->sk_receive_queue; | 289 | struct sk_buff_head *list = &sk->sk_receive_queue; |
290 | 290 | ||
291 | /* Cast sk->rcvbuf to unsigned... It's pointless, but reduces | 291 | if (atomic_read(&sk->sk_rmem_alloc) >= sk->sk_rcvbuf) { |
292 | number of warnings when compiling with -W --ANK | ||
293 | */ | ||
294 | if (atomic_read(&sk->sk_rmem_alloc) + skb->truesize >= | ||
295 | (unsigned)sk->sk_rcvbuf) { | ||
296 | atomic_inc(&sk->sk_drops); | 292 | atomic_inc(&sk->sk_drops); |
297 | trace_sock_rcvqueue_full(sk, skb); | 293 | trace_sock_rcvqueue_full(sk, skb); |
298 | return -ENOMEM; | 294 | return -ENOMEM; |
diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c index 0da2afc97f32..99ec116bef14 100644 --- a/net/ipv4/ipconfig.c +++ b/net/ipv4/ipconfig.c | |||
@@ -253,6 +253,10 @@ static int __init ic_open_devs(void) | |||
253 | } | 253 | } |
254 | } | 254 | } |
255 | 255 | ||
256 | /* no point in waiting if we could not bring up at least one device */ | ||
257 | if (!ic_first_dev) | ||
258 | goto have_carrier; | ||
259 | |||
256 | /* wait for a carrier on at least one device */ | 260 | /* wait for a carrier on at least one device */ |
257 | start = jiffies; | 261 | start = jiffies; |
258 | while (jiffies - start < msecs_to_jiffies(CONF_CARRIER_TIMEOUT)) { | 262 | while (jiffies - start < msecs_to_jiffies(CONF_CARRIER_TIMEOUT)) { |
diff --git a/net/ipv4/route.c b/net/ipv4/route.c index 46af62363b8c..94cdbc55ca7e 100644 --- a/net/ipv4/route.c +++ b/net/ipv4/route.c | |||
@@ -91,6 +91,7 @@ | |||
91 | #include <linux/rcupdate.h> | 91 | #include <linux/rcupdate.h> |
92 | #include <linux/times.h> | 92 | #include <linux/times.h> |
93 | #include <linux/slab.h> | 93 | #include <linux/slab.h> |
94 | #include <linux/prefetch.h> | ||
94 | #include <net/dst.h> | 95 | #include <net/dst.h> |
95 | #include <net/net_namespace.h> | 96 | #include <net/net_namespace.h> |
96 | #include <net/protocol.h> | 97 | #include <net/protocol.h> |
@@ -120,6 +121,7 @@ | |||
120 | 121 | ||
121 | static int ip_rt_max_size; | 122 | static int ip_rt_max_size; |
122 | static int ip_rt_gc_timeout __read_mostly = RT_GC_TIMEOUT; | 123 | static int ip_rt_gc_timeout __read_mostly = RT_GC_TIMEOUT; |
124 | static int ip_rt_gc_interval __read_mostly = 60 * HZ; | ||
123 | static int ip_rt_gc_min_interval __read_mostly = HZ / 2; | 125 | static int ip_rt_gc_min_interval __read_mostly = HZ / 2; |
124 | static int ip_rt_redirect_number __read_mostly = 9; | 126 | static int ip_rt_redirect_number __read_mostly = 9; |
125 | static int ip_rt_redirect_load __read_mostly = HZ / 50; | 127 | static int ip_rt_redirect_load __read_mostly = HZ / 50; |
@@ -133,6 +135,9 @@ static int ip_rt_min_advmss __read_mostly = 256; | |||
133 | static int rt_chain_length_max __read_mostly = 20; | 135 | static int rt_chain_length_max __read_mostly = 20; |
134 | static int redirect_genid; | 136 | static int redirect_genid; |
135 | 137 | ||
138 | static struct delayed_work expires_work; | ||
139 | static unsigned long expires_ljiffies; | ||
140 | |||
136 | /* | 141 | /* |
137 | * Interface to generic destination cache. | 142 | * Interface to generic destination cache. |
138 | */ | 143 | */ |
@@ -830,6 +835,97 @@ static int has_noalias(const struct rtable *head, const struct rtable *rth) | |||
830 | return ONE; | 835 | return ONE; |
831 | } | 836 | } |
832 | 837 | ||
838 | static void rt_check_expire(void) | ||
839 | { | ||
840 | static unsigned int rover; | ||
841 | unsigned int i = rover, goal; | ||
842 | struct rtable *rth; | ||
843 | struct rtable __rcu **rthp; | ||
844 | unsigned long samples = 0; | ||
845 | unsigned long sum = 0, sum2 = 0; | ||
846 | unsigned long delta; | ||
847 | u64 mult; | ||
848 | |||
849 | delta = jiffies - expires_ljiffies; | ||
850 | expires_ljiffies = jiffies; | ||
851 | mult = ((u64)delta) << rt_hash_log; | ||
852 | if (ip_rt_gc_timeout > 1) | ||
853 | do_div(mult, ip_rt_gc_timeout); | ||
854 | goal = (unsigned int)mult; | ||
855 | if (goal > rt_hash_mask) | ||
856 | goal = rt_hash_mask + 1; | ||
857 | for (; goal > 0; goal--) { | ||
858 | unsigned long tmo = ip_rt_gc_timeout; | ||
859 | unsigned long length; | ||
860 | |||
861 | i = (i + 1) & rt_hash_mask; | ||
862 | rthp = &rt_hash_table[i].chain; | ||
863 | |||
864 | if (need_resched()) | ||
865 | cond_resched(); | ||
866 | |||
867 | samples++; | ||
868 | |||
869 | if (rcu_dereference_raw(*rthp) == NULL) | ||
870 | continue; | ||
871 | length = 0; | ||
872 | spin_lock_bh(rt_hash_lock_addr(i)); | ||
873 | while ((rth = rcu_dereference_protected(*rthp, | ||
874 | lockdep_is_held(rt_hash_lock_addr(i)))) != NULL) { | ||
875 | prefetch(rth->dst.rt_next); | ||
876 | if (rt_is_expired(rth)) { | ||
877 | *rthp = rth->dst.rt_next; | ||
878 | rt_free(rth); | ||
879 | continue; | ||
880 | } | ||
881 | if (rth->dst.expires) { | ||
882 | /* Entry is expired even if it is in use */ | ||
883 | if (time_before_eq(jiffies, rth->dst.expires)) { | ||
884 | nofree: | ||
885 | tmo >>= 1; | ||
886 | rthp = &rth->dst.rt_next; | ||
887 | /* | ||
888 | * We only count entries on | ||
889 | * a chain with equal hash inputs once | ||
890 | * so that entries for different QOS | ||
891 | * levels, and other non-hash input | ||
892 | * attributes don't unfairly skew | ||
893 | * the length computation | ||
894 | */ | ||
895 | length += has_noalias(rt_hash_table[i].chain, rth); | ||
896 | continue; | ||
897 | } | ||
898 | } else if (!rt_may_expire(rth, tmo, ip_rt_gc_timeout)) | ||
899 | goto nofree; | ||
900 | |||
901 | /* Cleanup aged off entries. */ | ||
902 | *rthp = rth->dst.rt_next; | ||
903 | rt_free(rth); | ||
904 | } | ||
905 | spin_unlock_bh(rt_hash_lock_addr(i)); | ||
906 | sum += length; | ||
907 | sum2 += length*length; | ||
908 | } | ||
909 | if (samples) { | ||
910 | unsigned long avg = sum / samples; | ||
911 | unsigned long sd = int_sqrt(sum2 / samples - avg*avg); | ||
912 | rt_chain_length_max = max_t(unsigned long, | ||
913 | ip_rt_gc_elasticity, | ||
914 | (avg + 4*sd) >> FRACT_BITS); | ||
915 | } | ||
916 | rover = i; | ||
917 | } | ||
918 | |||
919 | /* | ||
920 | * rt_worker_func() is run in process context. | ||
921 | * we call rt_check_expire() to scan part of the hash table | ||
922 | */ | ||
923 | static void rt_worker_func(struct work_struct *work) | ||
924 | { | ||
925 | rt_check_expire(); | ||
926 | schedule_delayed_work(&expires_work, ip_rt_gc_interval); | ||
927 | } | ||
928 | |||
833 | /* | 929 | /* |
834 | * Perturbation of rt_genid by a small quantity [1..256] | 930 | * Perturbation of rt_genid by a small quantity [1..256] |
835 | * Using 8 bits of shuffling ensure we can call rt_cache_invalidate() | 931 | * Using 8 bits of shuffling ensure we can call rt_cache_invalidate() |
@@ -1271,7 +1367,7 @@ void __ip_select_ident(struct iphdr *iph, struct dst_entry *dst, int more) | |||
1271 | { | 1367 | { |
1272 | struct rtable *rt = (struct rtable *) dst; | 1368 | struct rtable *rt = (struct rtable *) dst; |
1273 | 1369 | ||
1274 | if (rt) { | 1370 | if (rt && !(rt->dst.flags & DST_NOPEER)) { |
1275 | if (rt->peer == NULL) | 1371 | if (rt->peer == NULL) |
1276 | rt_bind_peer(rt, rt->rt_dst, 1); | 1372 | rt_bind_peer(rt, rt->rt_dst, 1); |
1277 | 1373 | ||
@@ -1282,7 +1378,7 @@ void __ip_select_ident(struct iphdr *iph, struct dst_entry *dst, int more) | |||
1282 | iph->id = htons(inet_getid(rt->peer, more)); | 1378 | iph->id = htons(inet_getid(rt->peer, more)); |
1283 | return; | 1379 | return; |
1284 | } | 1380 | } |
1285 | } else | 1381 | } else if (!rt) |
1286 | printk(KERN_DEBUG "rt_bind_peer(0) @%p\n", | 1382 | printk(KERN_DEBUG "rt_bind_peer(0) @%p\n", |
1287 | __builtin_return_address(0)); | 1383 | __builtin_return_address(0)); |
1288 | 1384 | ||
@@ -3179,6 +3275,13 @@ static ctl_table ipv4_route_table[] = { | |||
3179 | .proc_handler = proc_dointvec_jiffies, | 3275 | .proc_handler = proc_dointvec_jiffies, |
3180 | }, | 3276 | }, |
3181 | { | 3277 | { |
3278 | .procname = "gc_interval", | ||
3279 | .data = &ip_rt_gc_interval, | ||
3280 | .maxlen = sizeof(int), | ||
3281 | .mode = 0644, | ||
3282 | .proc_handler = proc_dointvec_jiffies, | ||
3283 | }, | ||
3284 | { | ||
3182 | .procname = "redirect_load", | 3285 | .procname = "redirect_load", |
3183 | .data = &ip_rt_redirect_load, | 3286 | .data = &ip_rt_redirect_load, |
3184 | .maxlen = sizeof(int), | 3287 | .maxlen = sizeof(int), |
@@ -3388,6 +3491,11 @@ int __init ip_rt_init(void) | |||
3388 | devinet_init(); | 3491 | devinet_init(); |
3389 | ip_fib_init(); | 3492 | ip_fib_init(); |
3390 | 3493 | ||
3494 | INIT_DELAYED_WORK_DEFERRABLE(&expires_work, rt_worker_func); | ||
3495 | expires_ljiffies = jiffies; | ||
3496 | schedule_delayed_work(&expires_work, | ||
3497 | net_random() % ip_rt_gc_interval + ip_rt_gc_interval); | ||
3498 | |||
3391 | if (ip_rt_proc_init()) | 3499 | if (ip_rt_proc_init()) |
3392 | printk(KERN_ERR "Unable to create route proc files\n"); | 3500 | printk(KERN_ERR "Unable to create route proc files\n"); |
3393 | #ifdef CONFIG_XFRM | 3501 | #ifdef CONFIG_XFRM |
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c index 84d0bd5cac93..ec562713db9b 100644 --- a/net/ipv6/ip6_output.c +++ b/net/ipv6/ip6_output.c | |||
@@ -603,7 +603,7 @@ void ipv6_select_ident(struct frag_hdr *fhdr, struct rt6_info *rt) | |||
603 | static atomic_t ipv6_fragmentation_id; | 603 | static atomic_t ipv6_fragmentation_id; |
604 | int old, new; | 604 | int old, new; |
605 | 605 | ||
606 | if (rt) { | 606 | if (rt && !(rt->dst.flags & DST_NOPEER)) { |
607 | struct inet_peer *peer; | 607 | struct inet_peer *peer; |
608 | 608 | ||
609 | if (!rt->rt6i_peer) | 609 | if (!rt->rt6i_peer) |
diff --git a/net/llc/af_llc.c b/net/llc/af_llc.c index dfd3a648a551..a18e6c3d36e3 100644 --- a/net/llc/af_llc.c +++ b/net/llc/af_llc.c | |||
@@ -833,15 +833,15 @@ static int llc_ui_recvmsg(struct kiocb *iocb, struct socket *sock, | |||
833 | copied += used; | 833 | copied += used; |
834 | len -= used; | 834 | len -= used; |
835 | 835 | ||
836 | /* For non stream protcols we get one packet per recvmsg call */ | ||
837 | if (sk->sk_type != SOCK_STREAM) | ||
838 | goto copy_uaddr; | ||
839 | |||
836 | if (!(flags & MSG_PEEK)) { | 840 | if (!(flags & MSG_PEEK)) { |
837 | sk_eat_skb(sk, skb, 0); | 841 | sk_eat_skb(sk, skb, 0); |
838 | *seq = 0; | 842 | *seq = 0; |
839 | } | 843 | } |
840 | 844 | ||
841 | /* For non stream protcols we get one packet per recvmsg call */ | ||
842 | if (sk->sk_type != SOCK_STREAM) | ||
843 | goto copy_uaddr; | ||
844 | |||
845 | /* Partial read */ | 845 | /* Partial read */ |
846 | if (used + offset < skb->len) | 846 | if (used + offset < skb->len) |
847 | continue; | 847 | continue; |
@@ -857,6 +857,12 @@ copy_uaddr: | |||
857 | } | 857 | } |
858 | if (llc_sk(sk)->cmsg_flags) | 858 | if (llc_sk(sk)->cmsg_flags) |
859 | llc_cmsg_rcv(msg, skb); | 859 | llc_cmsg_rcv(msg, skb); |
860 | |||
861 | if (!(flags & MSG_PEEK)) { | ||
862 | sk_eat_skb(sk, skb, 0); | ||
863 | *seq = 0; | ||
864 | } | ||
865 | |||
860 | goto out; | 866 | goto out; |
861 | } | 867 | } |
862 | 868 | ||
diff --git a/net/netfilter/ipvs/ip_vs_conn.c b/net/netfilter/ipvs/ip_vs_conn.c index 12571fb2881c..29fa5badde75 100644 --- a/net/netfilter/ipvs/ip_vs_conn.c +++ b/net/netfilter/ipvs/ip_vs_conn.c | |||
@@ -616,7 +616,7 @@ struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp) | |||
616 | if ((cp) && (!cp->dest)) { | 616 | if ((cp) && (!cp->dest)) { |
617 | dest = ip_vs_find_dest(ip_vs_conn_net(cp), cp->af, &cp->daddr, | 617 | dest = ip_vs_find_dest(ip_vs_conn_net(cp), cp->af, &cp->daddr, |
618 | cp->dport, &cp->vaddr, cp->vport, | 618 | cp->dport, &cp->vaddr, cp->vport, |
619 | cp->protocol, cp->fwmark); | 619 | cp->protocol, cp->fwmark, cp->flags); |
620 | ip_vs_bind_dest(cp, dest); | 620 | ip_vs_bind_dest(cp, dest); |
621 | return dest; | 621 | return dest; |
622 | } else | 622 | } else |
diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c index 008bf97cc91a..e1a66cf37f9a 100644 --- a/net/netfilter/ipvs/ip_vs_ctl.c +++ b/net/netfilter/ipvs/ip_vs_ctl.c | |||
@@ -619,15 +619,21 @@ struct ip_vs_dest *ip_vs_find_dest(struct net *net, int af, | |||
619 | const union nf_inet_addr *daddr, | 619 | const union nf_inet_addr *daddr, |
620 | __be16 dport, | 620 | __be16 dport, |
621 | const union nf_inet_addr *vaddr, | 621 | const union nf_inet_addr *vaddr, |
622 | __be16 vport, __u16 protocol, __u32 fwmark) | 622 | __be16 vport, __u16 protocol, __u32 fwmark, |
623 | __u32 flags) | ||
623 | { | 624 | { |
624 | struct ip_vs_dest *dest; | 625 | struct ip_vs_dest *dest; |
625 | struct ip_vs_service *svc; | 626 | struct ip_vs_service *svc; |
627 | __be16 port = dport; | ||
626 | 628 | ||
627 | svc = ip_vs_service_get(net, af, fwmark, protocol, vaddr, vport); | 629 | svc = ip_vs_service_get(net, af, fwmark, protocol, vaddr, vport); |
628 | if (!svc) | 630 | if (!svc) |
629 | return NULL; | 631 | return NULL; |
630 | dest = ip_vs_lookup_dest(svc, daddr, dport); | 632 | if (fwmark && (flags & IP_VS_CONN_F_FWD_MASK) != IP_VS_CONN_F_MASQ) |
633 | port = 0; | ||
634 | dest = ip_vs_lookup_dest(svc, daddr, port); | ||
635 | if (!dest) | ||
636 | dest = ip_vs_lookup_dest(svc, daddr, port ^ dport); | ||
631 | if (dest) | 637 | if (dest) |
632 | atomic_inc(&dest->refcnt); | 638 | atomic_inc(&dest->refcnt); |
633 | ip_vs_service_put(svc); | 639 | ip_vs_service_put(svc); |
diff --git a/net/netfilter/ipvs/ip_vs_sync.c b/net/netfilter/ipvs/ip_vs_sync.c index 3cdd479f9b5d..2b6678c0ce14 100644 --- a/net/netfilter/ipvs/ip_vs_sync.c +++ b/net/netfilter/ipvs/ip_vs_sync.c | |||
@@ -740,7 +740,7 @@ static void ip_vs_proc_conn(struct net *net, struct ip_vs_conn_param *param, | |||
740 | * but still handled. | 740 | * but still handled. |
741 | */ | 741 | */ |
742 | dest = ip_vs_find_dest(net, type, daddr, dport, param->vaddr, | 742 | dest = ip_vs_find_dest(net, type, daddr, dport, param->vaddr, |
743 | param->vport, protocol, fwmark); | 743 | param->vport, protocol, fwmark, flags); |
744 | 744 | ||
745 | /* Set the approprite ativity flag */ | 745 | /* Set the approprite ativity flag */ |
746 | if (protocol == IPPROTO_TCP) { | 746 | if (protocol == IPPROTO_TCP) { |
diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c index ef21b221f036..257e77256c5c 100644 --- a/net/netfilter/nf_conntrack_netlink.c +++ b/net/netfilter/nf_conntrack_netlink.c | |||
@@ -135,7 +135,7 @@ nla_put_failure: | |||
135 | static inline int | 135 | static inline int |
136 | ctnetlink_dump_timeout(struct sk_buff *skb, const struct nf_conn *ct) | 136 | ctnetlink_dump_timeout(struct sk_buff *skb, const struct nf_conn *ct) |
137 | { | 137 | { |
138 | long timeout = (ct->timeout.expires - jiffies) / HZ; | 138 | long timeout = ((long)ct->timeout.expires - (long)jiffies) / HZ; |
139 | 139 | ||
140 | if (timeout < 0) | 140 | if (timeout < 0) |
141 | timeout = 0; | 141 | timeout = 0; |
@@ -1358,12 +1358,15 @@ ctnetlink_create_conntrack(struct net *net, u16 zone, | |||
1358 | nf_ct_protonum(ct)); | 1358 | nf_ct_protonum(ct)); |
1359 | if (helper == NULL) { | 1359 | if (helper == NULL) { |
1360 | rcu_read_unlock(); | 1360 | rcu_read_unlock(); |
1361 | spin_unlock_bh(&nf_conntrack_lock); | ||
1361 | #ifdef CONFIG_MODULES | 1362 | #ifdef CONFIG_MODULES |
1362 | if (request_module("nfct-helper-%s", helpname) < 0) { | 1363 | if (request_module("nfct-helper-%s", helpname) < 0) { |
1364 | spin_lock_bh(&nf_conntrack_lock); | ||
1363 | err = -EOPNOTSUPP; | 1365 | err = -EOPNOTSUPP; |
1364 | goto err1; | 1366 | goto err1; |
1365 | } | 1367 | } |
1366 | 1368 | ||
1369 | spin_lock_bh(&nf_conntrack_lock); | ||
1367 | rcu_read_lock(); | 1370 | rcu_read_lock(); |
1368 | helper = __nf_conntrack_helper_find(helpname, | 1371 | helper = __nf_conntrack_helper_find(helpname, |
1369 | nf_ct_l3num(ct), | 1372 | nf_ct_l3num(ct), |
@@ -1638,7 +1641,7 @@ ctnetlink_exp_dump_expect(struct sk_buff *skb, | |||
1638 | const struct nf_conntrack_expect *exp) | 1641 | const struct nf_conntrack_expect *exp) |
1639 | { | 1642 | { |
1640 | struct nf_conn *master = exp->master; | 1643 | struct nf_conn *master = exp->master; |
1641 | long timeout = (exp->timeout.expires - jiffies) / HZ; | 1644 | long timeout = ((long)exp->timeout.expires - (long)jiffies) / HZ; |
1642 | struct nf_conn_help *help; | 1645 | struct nf_conn_help *help; |
1643 | 1646 | ||
1644 | if (timeout < 0) | 1647 | if (timeout < 0) |
@@ -1869,25 +1872,30 @@ ctnetlink_get_expect(struct sock *ctnl, struct sk_buff *skb, | |||
1869 | 1872 | ||
1870 | err = -ENOMEM; | 1873 | err = -ENOMEM; |
1871 | skb2 = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); | 1874 | skb2 = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); |
1872 | if (skb2 == NULL) | 1875 | if (skb2 == NULL) { |
1876 | nf_ct_expect_put(exp); | ||
1873 | goto out; | 1877 | goto out; |
1878 | } | ||
1874 | 1879 | ||
1875 | rcu_read_lock(); | 1880 | rcu_read_lock(); |
1876 | err = ctnetlink_exp_fill_info(skb2, NETLINK_CB(skb).pid, | 1881 | err = ctnetlink_exp_fill_info(skb2, NETLINK_CB(skb).pid, |
1877 | nlh->nlmsg_seq, IPCTNL_MSG_EXP_NEW, exp); | 1882 | nlh->nlmsg_seq, IPCTNL_MSG_EXP_NEW, exp); |
1878 | rcu_read_unlock(); | 1883 | rcu_read_unlock(); |
1884 | nf_ct_expect_put(exp); | ||
1879 | if (err <= 0) | 1885 | if (err <= 0) |
1880 | goto free; | 1886 | goto free; |
1881 | 1887 | ||
1882 | nf_ct_expect_put(exp); | 1888 | err = netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT); |
1889 | if (err < 0) | ||
1890 | goto out; | ||
1883 | 1891 | ||
1884 | return netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT); | 1892 | return 0; |
1885 | 1893 | ||
1886 | free: | 1894 | free: |
1887 | kfree_skb(skb2); | 1895 | kfree_skb(skb2); |
1888 | out: | 1896 | out: |
1889 | nf_ct_expect_put(exp); | 1897 | /* this avoids a loop in nfnetlink. */ |
1890 | return err; | 1898 | return err == -EAGAIN ? -ENOBUFS : err; |
1891 | } | 1899 | } |
1892 | 1900 | ||
1893 | static int | 1901 | static int |
diff --git a/net/netfilter/xt_connbytes.c b/net/netfilter/xt_connbytes.c index 5b138506690e..9ddf1c3bfb39 100644 --- a/net/netfilter/xt_connbytes.c +++ b/net/netfilter/xt_connbytes.c | |||
@@ -87,10 +87,10 @@ connbytes_mt(const struct sk_buff *skb, struct xt_action_param *par) | |||
87 | break; | 87 | break; |
88 | } | 88 | } |
89 | 89 | ||
90 | if (sinfo->count.to) | 90 | if (sinfo->count.to >= sinfo->count.from) |
91 | return what <= sinfo->count.to && what >= sinfo->count.from; | 91 | return what <= sinfo->count.to && what >= sinfo->count.from; |
92 | else | 92 | else /* inverted */ |
93 | return what >= sinfo->count.from; | 93 | return what < sinfo->count.to || what > sinfo->count.from; |
94 | } | 94 | } |
95 | 95 | ||
96 | static int connbytes_mt_check(const struct xt_mtchk_param *par) | 96 | static int connbytes_mt_check(const struct xt_mtchk_param *par) |
diff --git a/net/nfc/nci/core.c b/net/nfc/nci/core.c index 3925c6578767..ea66034499ce 100644 --- a/net/nfc/nci/core.c +++ b/net/nfc/nci/core.c | |||
@@ -69,7 +69,7 @@ static int __nci_request(struct nci_dev *ndev, | |||
69 | __u32 timeout) | 69 | __u32 timeout) |
70 | { | 70 | { |
71 | int rc = 0; | 71 | int rc = 0; |
72 | unsigned long completion_rc; | 72 | long completion_rc; |
73 | 73 | ||
74 | ndev->req_status = NCI_REQ_PEND; | 74 | ndev->req_status = NCI_REQ_PEND; |
75 | 75 | ||
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c index 82a6f34d39d0..d9d4970b9b07 100644 --- a/net/packet/af_packet.c +++ b/net/packet/af_packet.c | |||
@@ -1630,8 +1630,7 @@ static int packet_rcv(struct sk_buff *skb, struct net_device *dev, | |||
1630 | if (snaplen > res) | 1630 | if (snaplen > res) |
1631 | snaplen = res; | 1631 | snaplen = res; |
1632 | 1632 | ||
1633 | if (atomic_read(&sk->sk_rmem_alloc) + skb->truesize >= | 1633 | if (atomic_read(&sk->sk_rmem_alloc) >= sk->sk_rcvbuf) |
1634 | (unsigned)sk->sk_rcvbuf) | ||
1635 | goto drop_n_acct; | 1634 | goto drop_n_acct; |
1636 | 1635 | ||
1637 | if (skb_shared(skb)) { | 1636 | if (skb_shared(skb)) { |
@@ -1762,8 +1761,7 @@ static int tpacket_rcv(struct sk_buff *skb, struct net_device *dev, | |||
1762 | if (po->tp_version <= TPACKET_V2) { | 1761 | if (po->tp_version <= TPACKET_V2) { |
1763 | if (macoff + snaplen > po->rx_ring.frame_size) { | 1762 | if (macoff + snaplen > po->rx_ring.frame_size) { |
1764 | if (po->copy_thresh && | 1763 | if (po->copy_thresh && |
1765 | atomic_read(&sk->sk_rmem_alloc) + skb->truesize | 1764 | atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf) { |
1766 | < (unsigned)sk->sk_rcvbuf) { | ||
1767 | if (skb_shared(skb)) { | 1765 | if (skb_shared(skb)) { |
1768 | copy_skb = skb_clone(skb, GFP_ATOMIC); | 1766 | copy_skb = skb_clone(skb, GFP_ATOMIC); |
1769 | } else { | 1767 | } else { |
@@ -2450,8 +2448,12 @@ static int packet_do_bind(struct sock *sk, struct net_device *dev, __be16 protoc | |||
2450 | { | 2448 | { |
2451 | struct packet_sock *po = pkt_sk(sk); | 2449 | struct packet_sock *po = pkt_sk(sk); |
2452 | 2450 | ||
2453 | if (po->fanout) | 2451 | if (po->fanout) { |
2452 | if (dev) | ||
2453 | dev_put(dev); | ||
2454 | |||
2454 | return -EINVAL; | 2455 | return -EINVAL; |
2456 | } | ||
2455 | 2457 | ||
2456 | lock_sock(sk); | 2458 | lock_sock(sk); |
2457 | 2459 | ||
diff --git a/net/sched/sch_mqprio.c b/net/sched/sch_mqprio.c index f88256cbacbf..28de43092330 100644 --- a/net/sched/sch_mqprio.c +++ b/net/sched/sch_mqprio.c | |||
@@ -107,7 +107,7 @@ static int mqprio_init(struct Qdisc *sch, struct nlattr *opt) | |||
107 | if (!netif_is_multiqueue(dev)) | 107 | if (!netif_is_multiqueue(dev)) |
108 | return -EOPNOTSUPP; | 108 | return -EOPNOTSUPP; |
109 | 109 | ||
110 | if (nla_len(opt) < sizeof(*qopt)) | 110 | if (!opt || nla_len(opt) < sizeof(*qopt)) |
111 | return -EINVAL; | 111 | return -EINVAL; |
112 | 112 | ||
113 | qopt = nla_data(opt); | 113 | qopt = nla_data(opt); |
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c index eb3b9a86c6ed..a4ab207cdc59 100644 --- a/net/sched/sch_netem.c +++ b/net/sched/sch_netem.c | |||
@@ -488,7 +488,7 @@ static int get_dist_table(struct Qdisc *sch, const struct nlattr *attr) | |||
488 | return -EINVAL; | 488 | return -EINVAL; |
489 | 489 | ||
490 | s = sizeof(struct disttable) + n * sizeof(s16); | 490 | s = sizeof(struct disttable) + n * sizeof(s16); |
491 | d = kmalloc(s, GFP_KERNEL); | 491 | d = kmalloc(s, GFP_KERNEL | __GFP_NOWARN); |
492 | if (!d) | 492 | if (!d) |
493 | d = vmalloc(s); | 493 | d = vmalloc(s); |
494 | if (!d) | 494 | if (!d) |
@@ -501,9 +501,10 @@ static int get_dist_table(struct Qdisc *sch, const struct nlattr *attr) | |||
501 | root_lock = qdisc_root_sleeping_lock(sch); | 501 | root_lock = qdisc_root_sleeping_lock(sch); |
502 | 502 | ||
503 | spin_lock_bh(root_lock); | 503 | spin_lock_bh(root_lock); |
504 | dist_free(q->delay_dist); | 504 | swap(q->delay_dist, d); |
505 | q->delay_dist = d; | ||
506 | spin_unlock_bh(root_lock); | 505 | spin_unlock_bh(root_lock); |
506 | |||
507 | dist_free(d); | ||
507 | return 0; | 508 | return 0; |
508 | } | 509 | } |
509 | 510 | ||
diff --git a/net/sctp/associola.c b/net/sctp/associola.c index 152b5b3c3fff..acd2edbc073e 100644 --- a/net/sctp/associola.c +++ b/net/sctp/associola.c | |||
@@ -173,7 +173,7 @@ static struct sctp_association *sctp_association_init(struct sctp_association *a | |||
173 | asoc->timeouts[SCTP_EVENT_TIMEOUT_HEARTBEAT] = 0; | 173 | asoc->timeouts[SCTP_EVENT_TIMEOUT_HEARTBEAT] = 0; |
174 | asoc->timeouts[SCTP_EVENT_TIMEOUT_SACK] = asoc->sackdelay; | 174 | asoc->timeouts[SCTP_EVENT_TIMEOUT_SACK] = asoc->sackdelay; |
175 | asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE] = | 175 | asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE] = |
176 | (unsigned long)sp->autoclose * HZ; | 176 | min_t(unsigned long, sp->autoclose, sctp_max_autoclose) * HZ; |
177 | 177 | ||
178 | /* Initializes the timers */ | 178 | /* Initializes the timers */ |
179 | for (i = SCTP_EVENT_TIMEOUT_NONE; i < SCTP_NUM_TIMEOUT_TYPES; ++i) | 179 | for (i = SCTP_EVENT_TIMEOUT_NONE; i < SCTP_NUM_TIMEOUT_TYPES; ++i) |
diff --git a/net/sctp/output.c b/net/sctp/output.c index 08b3cead6503..817174eb5f41 100644 --- a/net/sctp/output.c +++ b/net/sctp/output.c | |||
@@ -697,13 +697,7 @@ static void sctp_packet_append_data(struct sctp_packet *packet, | |||
697 | /* Keep track of how many bytes are in flight to the receiver. */ | 697 | /* Keep track of how many bytes are in flight to the receiver. */ |
698 | asoc->outqueue.outstanding_bytes += datasize; | 698 | asoc->outqueue.outstanding_bytes += datasize; |
699 | 699 | ||
700 | /* Update our view of the receiver's rwnd. Include sk_buff overhead | 700 | /* Update our view of the receiver's rwnd. */ |
701 | * while updating peer.rwnd so that it reduces the chances of a | ||
702 | * receiver running out of receive buffer space even when receive | ||
703 | * window is still open. This can happen when a sender is sending | ||
704 | * sending small messages. | ||
705 | */ | ||
706 | datasize += sizeof(struct sk_buff); | ||
707 | if (datasize < rwnd) | 701 | if (datasize < rwnd) |
708 | rwnd -= datasize; | 702 | rwnd -= datasize; |
709 | else | 703 | else |
diff --git a/net/sctp/outqueue.c b/net/sctp/outqueue.c index 14c2b06028ff..cfeb1d4a1ee6 100644 --- a/net/sctp/outqueue.c +++ b/net/sctp/outqueue.c | |||
@@ -411,8 +411,7 @@ void sctp_retransmit_mark(struct sctp_outq *q, | |||
411 | chunk->transport->flight_size -= | 411 | chunk->transport->flight_size -= |
412 | sctp_data_size(chunk); | 412 | sctp_data_size(chunk); |
413 | q->outstanding_bytes -= sctp_data_size(chunk); | 413 | q->outstanding_bytes -= sctp_data_size(chunk); |
414 | q->asoc->peer.rwnd += (sctp_data_size(chunk) + | 414 | q->asoc->peer.rwnd += sctp_data_size(chunk); |
415 | sizeof(struct sk_buff)); | ||
416 | } | 415 | } |
417 | continue; | 416 | continue; |
418 | } | 417 | } |
@@ -432,8 +431,7 @@ void sctp_retransmit_mark(struct sctp_outq *q, | |||
432 | * (Section 7.2.4)), add the data size of those | 431 | * (Section 7.2.4)), add the data size of those |
433 | * chunks to the rwnd. | 432 | * chunks to the rwnd. |
434 | */ | 433 | */ |
435 | q->asoc->peer.rwnd += (sctp_data_size(chunk) + | 434 | q->asoc->peer.rwnd += sctp_data_size(chunk); |
436 | sizeof(struct sk_buff)); | ||
437 | q->outstanding_bytes -= sctp_data_size(chunk); | 435 | q->outstanding_bytes -= sctp_data_size(chunk); |
438 | if (chunk->transport) | 436 | if (chunk->transport) |
439 | transport->flight_size -= sctp_data_size(chunk); | 437 | transport->flight_size -= sctp_data_size(chunk); |
diff --git a/net/sctp/protocol.c b/net/sctp/protocol.c index 61b9fca5a173..6f6ad8686833 100644 --- a/net/sctp/protocol.c +++ b/net/sctp/protocol.c | |||
@@ -1285,6 +1285,9 @@ SCTP_STATIC __init int sctp_init(void) | |||
1285 | sctp_max_instreams = SCTP_DEFAULT_INSTREAMS; | 1285 | sctp_max_instreams = SCTP_DEFAULT_INSTREAMS; |
1286 | sctp_max_outstreams = SCTP_DEFAULT_OUTSTREAMS; | 1286 | sctp_max_outstreams = SCTP_DEFAULT_OUTSTREAMS; |
1287 | 1287 | ||
1288 | /* Initialize maximum autoclose timeout. */ | ||
1289 | sctp_max_autoclose = INT_MAX / HZ; | ||
1290 | |||
1288 | /* Initialize handle used for association ids. */ | 1291 | /* Initialize handle used for association ids. */ |
1289 | idr_init(&sctp_assocs_id); | 1292 | idr_init(&sctp_assocs_id); |
1290 | 1293 | ||
diff --git a/net/sctp/socket.c b/net/sctp/socket.c index 13bf5fcdbff1..54a7cd2fdd7a 100644 --- a/net/sctp/socket.c +++ b/net/sctp/socket.c | |||
@@ -2200,8 +2200,6 @@ static int sctp_setsockopt_autoclose(struct sock *sk, char __user *optval, | |||
2200 | return -EINVAL; | 2200 | return -EINVAL; |
2201 | if (copy_from_user(&sp->autoclose, optval, optlen)) | 2201 | if (copy_from_user(&sp->autoclose, optval, optlen)) |
2202 | return -EFAULT; | 2202 | return -EFAULT; |
2203 | /* make sure it won't exceed MAX_SCHEDULE_TIMEOUT */ | ||
2204 | sp->autoclose = min_t(long, sp->autoclose, MAX_SCHEDULE_TIMEOUT / HZ); | ||
2205 | 2203 | ||
2206 | return 0; | 2204 | return 0; |
2207 | } | 2205 | } |
diff --git a/net/sctp/sysctl.c b/net/sctp/sysctl.c index 6b3952961b85..60ffbd067ff7 100644 --- a/net/sctp/sysctl.c +++ b/net/sctp/sysctl.c | |||
@@ -53,6 +53,10 @@ static int sack_timer_min = 1; | |||
53 | static int sack_timer_max = 500; | 53 | static int sack_timer_max = 500; |
54 | static int addr_scope_max = 3; /* check sctp_scope_policy_t in include/net/sctp/constants.h for max entries */ | 54 | static int addr_scope_max = 3; /* check sctp_scope_policy_t in include/net/sctp/constants.h for max entries */ |
55 | static int rwnd_scale_max = 16; | 55 | static int rwnd_scale_max = 16; |
56 | static unsigned long max_autoclose_min = 0; | ||
57 | static unsigned long max_autoclose_max = | ||
58 | (MAX_SCHEDULE_TIMEOUT / HZ > UINT_MAX) | ||
59 | ? UINT_MAX : MAX_SCHEDULE_TIMEOUT / HZ; | ||
56 | 60 | ||
57 | extern long sysctl_sctp_mem[3]; | 61 | extern long sysctl_sctp_mem[3]; |
58 | extern int sysctl_sctp_rmem[3]; | 62 | extern int sysctl_sctp_rmem[3]; |
@@ -258,6 +262,15 @@ static ctl_table sctp_table[] = { | |||
258 | .extra1 = &one, | 262 | .extra1 = &one, |
259 | .extra2 = &rwnd_scale_max, | 263 | .extra2 = &rwnd_scale_max, |
260 | }, | 264 | }, |
265 | { | ||
266 | .procname = "max_autoclose", | ||
267 | .data = &sctp_max_autoclose, | ||
268 | .maxlen = sizeof(unsigned long), | ||
269 | .mode = 0644, | ||
270 | .proc_handler = &proc_doulongvec_minmax, | ||
271 | .extra1 = &max_autoclose_min, | ||
272 | .extra2 = &max_autoclose_max, | ||
273 | }, | ||
261 | 274 | ||
262 | { /* sentinel */ } | 275 | { /* sentinel */ } |
263 | }; | 276 | }; |
diff --git a/net/sunrpc/sched.c b/net/sunrpc/sched.c index d12ffa545811..00a1a2acd587 100644 --- a/net/sunrpc/sched.c +++ b/net/sunrpc/sched.c | |||
@@ -590,6 +590,27 @@ void rpc_prepare_task(struct rpc_task *task) | |||
590 | task->tk_ops->rpc_call_prepare(task, task->tk_calldata); | 590 | task->tk_ops->rpc_call_prepare(task, task->tk_calldata); |
591 | } | 591 | } |
592 | 592 | ||
593 | static void | ||
594 | rpc_init_task_statistics(struct rpc_task *task) | ||
595 | { | ||
596 | /* Initialize retry counters */ | ||
597 | task->tk_garb_retry = 2; | ||
598 | task->tk_cred_retry = 2; | ||
599 | task->tk_rebind_retry = 2; | ||
600 | |||
601 | /* starting timestamp */ | ||
602 | task->tk_start = ktime_get(); | ||
603 | } | ||
604 | |||
605 | static void | ||
606 | rpc_reset_task_statistics(struct rpc_task *task) | ||
607 | { | ||
608 | task->tk_timeouts = 0; | ||
609 | task->tk_flags &= ~(RPC_CALL_MAJORSEEN|RPC_TASK_KILLED|RPC_TASK_SENT); | ||
610 | |||
611 | rpc_init_task_statistics(task); | ||
612 | } | ||
613 | |||
593 | /* | 614 | /* |
594 | * Helper that calls task->tk_ops->rpc_call_done if it exists | 615 | * Helper that calls task->tk_ops->rpc_call_done if it exists |
595 | */ | 616 | */ |
@@ -602,6 +623,7 @@ void rpc_exit_task(struct rpc_task *task) | |||
602 | WARN_ON(RPC_ASSASSINATED(task)); | 623 | WARN_ON(RPC_ASSASSINATED(task)); |
603 | /* Always release the RPC slot and buffer memory */ | 624 | /* Always release the RPC slot and buffer memory */ |
604 | xprt_release(task); | 625 | xprt_release(task); |
626 | rpc_reset_task_statistics(task); | ||
605 | } | 627 | } |
606 | } | 628 | } |
607 | } | 629 | } |
@@ -804,11 +826,6 @@ static void rpc_init_task(struct rpc_task *task, const struct rpc_task_setup *ta | |||
804 | task->tk_calldata = task_setup_data->callback_data; | 826 | task->tk_calldata = task_setup_data->callback_data; |
805 | INIT_LIST_HEAD(&task->tk_task); | 827 | INIT_LIST_HEAD(&task->tk_task); |
806 | 828 | ||
807 | /* Initialize retry counters */ | ||
808 | task->tk_garb_retry = 2; | ||
809 | task->tk_cred_retry = 2; | ||
810 | task->tk_rebind_retry = 2; | ||
811 | |||
812 | task->tk_priority = task_setup_data->priority - RPC_PRIORITY_LOW; | 829 | task->tk_priority = task_setup_data->priority - RPC_PRIORITY_LOW; |
813 | task->tk_owner = current->tgid; | 830 | task->tk_owner = current->tgid; |
814 | 831 | ||
@@ -818,8 +835,7 @@ static void rpc_init_task(struct rpc_task *task, const struct rpc_task_setup *ta | |||
818 | if (task->tk_ops->rpc_call_prepare != NULL) | 835 | if (task->tk_ops->rpc_call_prepare != NULL) |
819 | task->tk_action = rpc_prepare_task; | 836 | task->tk_action = rpc_prepare_task; |
820 | 837 | ||
821 | /* starting timestamp */ | 838 | rpc_init_task_statistics(task); |
822 | task->tk_start = ktime_get(); | ||
823 | 839 | ||
824 | dprintk("RPC: new task initialized, procpid %u\n", | 840 | dprintk("RPC: new task initialized, procpid %u\n", |
825 | task_pid_nr(current)); | 841 | task_pid_nr(current)); |
diff --git a/net/sunrpc/xprt.c b/net/sunrpc/xprt.c index f4385e45a5fc..c64c0ef519b5 100644 --- a/net/sunrpc/xprt.c +++ b/net/sunrpc/xprt.c | |||
@@ -995,13 +995,11 @@ out_init_req: | |||
995 | 995 | ||
996 | static void xprt_free_slot(struct rpc_xprt *xprt, struct rpc_rqst *req) | 996 | static void xprt_free_slot(struct rpc_xprt *xprt, struct rpc_rqst *req) |
997 | { | 997 | { |
998 | if (xprt_dynamic_free_slot(xprt, req)) | ||
999 | return; | ||
1000 | |||
1001 | memset(req, 0, sizeof(*req)); /* mark unused */ | ||
1002 | |||
1003 | spin_lock(&xprt->reserve_lock); | 998 | spin_lock(&xprt->reserve_lock); |
1004 | list_add(&req->rq_list, &xprt->free); | 999 | if (!xprt_dynamic_free_slot(xprt, req)) { |
1000 | memset(req, 0, sizeof(*req)); /* mark unused */ | ||
1001 | list_add(&req->rq_list, &xprt->free); | ||
1002 | } | ||
1005 | rpc_wake_up_next(&xprt->backlog); | 1003 | rpc_wake_up_next(&xprt->backlog); |
1006 | spin_unlock(&xprt->reserve_lock); | 1004 | spin_unlock(&xprt->reserve_lock); |
1007 | } | 1005 | } |
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c index 2118d6446630..9049a5caeb25 100644 --- a/net/xfrm/xfrm_policy.c +++ b/net/xfrm/xfrm_policy.c | |||
@@ -2276,8 +2276,6 @@ static void __xfrm_garbage_collect(struct net *net) | |||
2276 | { | 2276 | { |
2277 | struct dst_entry *head, *next; | 2277 | struct dst_entry *head, *next; |
2278 | 2278 | ||
2279 | flow_cache_flush(); | ||
2280 | |||
2281 | spin_lock_bh(&xfrm_policy_sk_bundle_lock); | 2279 | spin_lock_bh(&xfrm_policy_sk_bundle_lock); |
2282 | head = xfrm_policy_sk_bundles; | 2280 | head = xfrm_policy_sk_bundles; |
2283 | xfrm_policy_sk_bundles = NULL; | 2281 | xfrm_policy_sk_bundles = NULL; |
@@ -2290,6 +2288,18 @@ static void __xfrm_garbage_collect(struct net *net) | |||
2290 | } | 2288 | } |
2291 | } | 2289 | } |
2292 | 2290 | ||
2291 | static void xfrm_garbage_collect(struct net *net) | ||
2292 | { | ||
2293 | flow_cache_flush(); | ||
2294 | __xfrm_garbage_collect(net); | ||
2295 | } | ||
2296 | |||
2297 | static void xfrm_garbage_collect_deferred(struct net *net) | ||
2298 | { | ||
2299 | flow_cache_flush_deferred(); | ||
2300 | __xfrm_garbage_collect(net); | ||
2301 | } | ||
2302 | |||
2293 | static void xfrm_init_pmtu(struct dst_entry *dst) | 2303 | static void xfrm_init_pmtu(struct dst_entry *dst) |
2294 | { | 2304 | { |
2295 | do { | 2305 | do { |
@@ -2422,7 +2432,7 @@ int xfrm_policy_register_afinfo(struct xfrm_policy_afinfo *afinfo) | |||
2422 | if (likely(dst_ops->neigh_lookup == NULL)) | 2432 | if (likely(dst_ops->neigh_lookup == NULL)) |
2423 | dst_ops->neigh_lookup = xfrm_neigh_lookup; | 2433 | dst_ops->neigh_lookup = xfrm_neigh_lookup; |
2424 | if (likely(afinfo->garbage_collect == NULL)) | 2434 | if (likely(afinfo->garbage_collect == NULL)) |
2425 | afinfo->garbage_collect = __xfrm_garbage_collect; | 2435 | afinfo->garbage_collect = xfrm_garbage_collect_deferred; |
2426 | xfrm_policy_afinfo[afinfo->family] = afinfo; | 2436 | xfrm_policy_afinfo[afinfo->family] = afinfo; |
2427 | } | 2437 | } |
2428 | write_unlock_bh(&xfrm_policy_afinfo_lock); | 2438 | write_unlock_bh(&xfrm_policy_afinfo_lock); |
@@ -2516,7 +2526,7 @@ static int xfrm_dev_event(struct notifier_block *this, unsigned long event, void | |||
2516 | 2526 | ||
2517 | switch (event) { | 2527 | switch (event) { |
2518 | case NETDEV_DOWN: | 2528 | case NETDEV_DOWN: |
2519 | __xfrm_garbage_collect(dev_net(dev)); | 2529 | xfrm_garbage_collect(dev_net(dev)); |
2520 | } | 2530 | } |
2521 | return NOTIFY_DONE; | 2531 | return NOTIFY_DONE; |
2522 | } | 2532 | } |
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index ba573fe7c74d..914833d99b06 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile | |||
@@ -60,8 +60,8 @@ update-po-config: $(obj)/kxgettext $(obj)/gconf.glade.h | |||
60 | --directory=$(srctree) --directory=$(objtree) \ | 60 | --directory=$(srctree) --directory=$(objtree) \ |
61 | --output $(obj)/config.pot | 61 | --output $(obj)/config.pot |
62 | $(Q)sed -i s/CHARSET/UTF-8/ $(obj)/config.pot | 62 | $(Q)sed -i s/CHARSET/UTF-8/ $(obj)/config.pot |
63 | $(Q)ln -fs Kconfig.x86 arch/um/Kconfig | 63 | $(Q)(for i in `ls $(srctree)/arch/*/Kconfig \ |
64 | $(Q)(for i in `ls $(srctree)/arch/*/Kconfig`; \ | 64 | $(srctree)/arch/*/um/Kconfig`; \ |
65 | do \ | 65 | do \ |
66 | echo " GEN $$i"; \ | 66 | echo " GEN $$i"; \ |
67 | $(obj)/kxgettext $$i \ | 67 | $(obj)/kxgettext $$i \ |
@@ -69,7 +69,6 @@ update-po-config: $(obj)/kxgettext $(obj)/gconf.glade.h | |||
69 | done ) | 69 | done ) |
70 | $(Q)msguniq --sort-by-file --to-code=UTF-8 $(obj)/config.pot \ | 70 | $(Q)msguniq --sort-by-file --to-code=UTF-8 $(obj)/config.pot \ |
71 | --output $(obj)/linux.pot | 71 | --output $(obj)/linux.pot |
72 | $(Q)rm -f $(srctree)/arch/um/Kconfig | ||
73 | $(Q)rm -f $(obj)/config.pot | 72 | $(Q)rm -f $(obj)/config.pot |
74 | 73 | ||
75 | PHONY += allnoconfig allyesconfig allmodconfig alldefconfig randconfig | 74 | PHONY += allnoconfig allyesconfig allmodconfig alldefconfig randconfig |
diff --git a/security/integrity/evm/evm_crypto.c b/security/integrity/evm/evm_crypto.c index 5dd5b140242c..8738deff26fa 100644 --- a/security/integrity/evm/evm_crypto.c +++ b/security/integrity/evm/evm_crypto.c | |||
@@ -27,20 +27,35 @@ static int evmkey_len = MAX_KEY_SIZE; | |||
27 | 27 | ||
28 | struct crypto_shash *hmac_tfm; | 28 | struct crypto_shash *hmac_tfm; |
29 | 29 | ||
30 | static DEFINE_MUTEX(mutex); | ||
31 | |||
30 | static struct shash_desc *init_desc(void) | 32 | static struct shash_desc *init_desc(void) |
31 | { | 33 | { |
32 | int rc; | 34 | int rc; |
33 | struct shash_desc *desc; | 35 | struct shash_desc *desc; |
34 | 36 | ||
35 | if (hmac_tfm == NULL) { | 37 | if (hmac_tfm == NULL) { |
38 | mutex_lock(&mutex); | ||
39 | if (hmac_tfm) | ||
40 | goto out; | ||
36 | hmac_tfm = crypto_alloc_shash(evm_hmac, 0, CRYPTO_ALG_ASYNC); | 41 | hmac_tfm = crypto_alloc_shash(evm_hmac, 0, CRYPTO_ALG_ASYNC); |
37 | if (IS_ERR(hmac_tfm)) { | 42 | if (IS_ERR(hmac_tfm)) { |
38 | pr_err("Can not allocate %s (reason: %ld)\n", | 43 | pr_err("Can not allocate %s (reason: %ld)\n", |
39 | evm_hmac, PTR_ERR(hmac_tfm)); | 44 | evm_hmac, PTR_ERR(hmac_tfm)); |
40 | rc = PTR_ERR(hmac_tfm); | 45 | rc = PTR_ERR(hmac_tfm); |
41 | hmac_tfm = NULL; | 46 | hmac_tfm = NULL; |
47 | mutex_unlock(&mutex); | ||
48 | return ERR_PTR(rc); | ||
49 | } | ||
50 | rc = crypto_shash_setkey(hmac_tfm, evmkey, evmkey_len); | ||
51 | if (rc) { | ||
52 | crypto_free_shash(hmac_tfm); | ||
53 | hmac_tfm = NULL; | ||
54 | mutex_unlock(&mutex); | ||
42 | return ERR_PTR(rc); | 55 | return ERR_PTR(rc); |
43 | } | 56 | } |
57 | out: | ||
58 | mutex_unlock(&mutex); | ||
44 | } | 59 | } |
45 | 60 | ||
46 | desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(hmac_tfm), | 61 | desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(hmac_tfm), |
@@ -51,11 +66,7 @@ static struct shash_desc *init_desc(void) | |||
51 | desc->tfm = hmac_tfm; | 66 | desc->tfm = hmac_tfm; |
52 | desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP; | 67 | desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP; |
53 | 68 | ||
54 | rc = crypto_shash_setkey(hmac_tfm, evmkey, evmkey_len); | ||
55 | if (rc) | ||
56 | goto out; | ||
57 | rc = crypto_shash_init(desc); | 69 | rc = crypto_shash_init(desc); |
58 | out: | ||
59 | if (rc) { | 70 | if (rc) { |
60 | kfree(desc); | 71 | kfree(desc); |
61 | return ERR_PTR(rc); | 72 | return ERR_PTR(rc); |
diff --git a/security/selinux/netport.c b/security/selinux/netport.c index 0b62bd112461..7b9eb1faf68b 100644 --- a/security/selinux/netport.c +++ b/security/selinux/netport.c | |||
@@ -123,7 +123,9 @@ static void sel_netport_insert(struct sel_netport *port) | |||
123 | if (sel_netport_hash[idx].size == SEL_NETPORT_HASH_BKT_LIMIT) { | 123 | if (sel_netport_hash[idx].size == SEL_NETPORT_HASH_BKT_LIMIT) { |
124 | struct sel_netport *tail; | 124 | struct sel_netport *tail; |
125 | tail = list_entry( | 125 | tail = list_entry( |
126 | rcu_dereference(sel_netport_hash[idx].list.prev), | 126 | rcu_dereference_protected( |
127 | sel_netport_hash[idx].list.prev, | ||
128 | lockdep_is_held(&sel_netport_lock)), | ||
127 | struct sel_netport, list); | 129 | struct sel_netport, list); |
128 | list_del_rcu(&tail->list); | 130 | list_del_rcu(&tail->list); |
129 | kfree_rcu(tail, rcu); | 131 | kfree_rcu(tail, rcu); |
diff --git a/sound/atmel/ac97c.c b/sound/atmel/ac97c.c index 6e5addeb236b..73516f69ac7c 100644 --- a/sound/atmel/ac97c.c +++ b/sound/atmel/ac97c.c | |||
@@ -899,6 +899,10 @@ static void atmel_ac97c_reset(struct atmel_ac97c *chip) | |||
899 | /* AC97 v2.2 specifications says minimum 1 us. */ | 899 | /* AC97 v2.2 specifications says minimum 1 us. */ |
900 | udelay(2); | 900 | udelay(2); |
901 | gpio_set_value(chip->reset_pin, 1); | 901 | gpio_set_value(chip->reset_pin, 1); |
902 | } else { | ||
903 | ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA); | ||
904 | udelay(2); | ||
905 | ac97c_writel(chip, MR, AC97C_MR_ENA); | ||
902 | } | 906 | } |
903 | } | 907 | } |
904 | 908 | ||
diff --git a/sound/soc/codecs/wm8776.c b/sound/soc/codecs/wm8776.c index bfdc52370ad0..d3b0a20744f1 100644 --- a/sound/soc/codecs/wm8776.c +++ b/sound/soc/codecs/wm8776.c | |||
@@ -235,6 +235,7 @@ static int wm8776_hw_params(struct snd_pcm_substream *substream, | |||
235 | switch (snd_pcm_format_width(params_format(params))) { | 235 | switch (snd_pcm_format_width(params_format(params))) { |
236 | case 16: | 236 | case 16: |
237 | iface = 0; | 237 | iface = 0; |
238 | break; | ||
238 | case 20: | 239 | case 20: |
239 | iface = 0x10; | 240 | iface = 0x10; |
240 | break; | 241 | break; |
diff --git a/virt/kvm/assigned-dev.c b/virt/kvm/assigned-dev.c index 3ad0925d23a9..758e3b36d4cf 100644 --- a/virt/kvm/assigned-dev.c +++ b/virt/kvm/assigned-dev.c | |||
@@ -17,6 +17,8 @@ | |||
17 | #include <linux/pci.h> | 17 | #include <linux/pci.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
20 | #include <linux/namei.h> | ||
21 | #include <linux/fs.h> | ||
20 | #include "irq.h" | 22 | #include "irq.h" |
21 | 23 | ||
22 | static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head, | 24 | static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head, |
@@ -480,12 +482,76 @@ out: | |||
480 | return r; | 482 | return r; |
481 | } | 483 | } |
482 | 484 | ||
485 | /* | ||
486 | * We want to test whether the caller has been granted permissions to | ||
487 | * use this device. To be able to configure and control the device, | ||
488 | * the user needs access to PCI configuration space and BAR resources. | ||
489 | * These are accessed through PCI sysfs. PCI config space is often | ||
490 | * passed to the process calling this ioctl via file descriptor, so we | ||
491 | * can't rely on access to that file. We can check for permissions | ||
492 | * on each of the BAR resource files, which is a pretty clear | ||
493 | * indicator that the user has been granted access to the device. | ||
494 | */ | ||
495 | static int probe_sysfs_permissions(struct pci_dev *dev) | ||
496 | { | ||
497 | #ifdef CONFIG_SYSFS | ||
498 | int i; | ||
499 | bool bar_found = false; | ||
500 | |||
501 | for (i = PCI_STD_RESOURCES; i <= PCI_STD_RESOURCE_END; i++) { | ||
502 | char *kpath, *syspath; | ||
503 | struct path path; | ||
504 | struct inode *inode; | ||
505 | int r; | ||
506 | |||
507 | if (!pci_resource_len(dev, i)) | ||
508 | continue; | ||
509 | |||
510 | kpath = kobject_get_path(&dev->dev.kobj, GFP_KERNEL); | ||
511 | if (!kpath) | ||
512 | return -ENOMEM; | ||
513 | |||
514 | /* Per sysfs-rules, sysfs is always at /sys */ | ||
515 | syspath = kasprintf(GFP_KERNEL, "/sys%s/resource%d", kpath, i); | ||
516 | kfree(kpath); | ||
517 | if (!syspath) | ||
518 | return -ENOMEM; | ||
519 | |||
520 | r = kern_path(syspath, LOOKUP_FOLLOW, &path); | ||
521 | kfree(syspath); | ||
522 | if (r) | ||
523 | return r; | ||
524 | |||
525 | inode = path.dentry->d_inode; | ||
526 | |||
527 | r = inode_permission(inode, MAY_READ | MAY_WRITE | MAY_ACCESS); | ||
528 | path_put(&path); | ||
529 | if (r) | ||
530 | return r; | ||
531 | |||
532 | bar_found = true; | ||
533 | } | ||
534 | |||
535 | /* If no resources, probably something special */ | ||
536 | if (!bar_found) | ||
537 | return -EPERM; | ||
538 | |||
539 | return 0; | ||
540 | #else | ||
541 | return -EINVAL; /* No way to control the device without sysfs */ | ||
542 | #endif | ||
543 | } | ||
544 | |||
483 | static int kvm_vm_ioctl_assign_device(struct kvm *kvm, | 545 | static int kvm_vm_ioctl_assign_device(struct kvm *kvm, |
484 | struct kvm_assigned_pci_dev *assigned_dev) | 546 | struct kvm_assigned_pci_dev *assigned_dev) |
485 | { | 547 | { |
486 | int r = 0, idx; | 548 | int r = 0, idx; |
487 | struct kvm_assigned_dev_kernel *match; | 549 | struct kvm_assigned_dev_kernel *match; |
488 | struct pci_dev *dev; | 550 | struct pci_dev *dev; |
551 | u8 header_type; | ||
552 | |||
553 | if (!(assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU)) | ||
554 | return -EINVAL; | ||
489 | 555 | ||
490 | mutex_lock(&kvm->lock); | 556 | mutex_lock(&kvm->lock); |
491 | idx = srcu_read_lock(&kvm->srcu); | 557 | idx = srcu_read_lock(&kvm->srcu); |
@@ -513,6 +579,18 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm, | |||
513 | r = -EINVAL; | 579 | r = -EINVAL; |
514 | goto out_free; | 580 | goto out_free; |
515 | } | 581 | } |
582 | |||
583 | /* Don't allow bridges to be assigned */ | ||
584 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | ||
585 | if ((header_type & PCI_HEADER_TYPE) != PCI_HEADER_TYPE_NORMAL) { | ||
586 | r = -EPERM; | ||
587 | goto out_put; | ||
588 | } | ||
589 | |||
590 | r = probe_sysfs_permissions(dev); | ||
591 | if (r) | ||
592 | goto out_put; | ||
593 | |||
516 | if (pci_enable_device(dev)) { | 594 | if (pci_enable_device(dev)) { |
517 | printk(KERN_INFO "%s: Could not enable PCI device\n", __func__); | 595 | printk(KERN_INFO "%s: Could not enable PCI device\n", __func__); |
518 | r = -EBUSY; | 596 | r = -EBUSY; |
@@ -544,16 +622,14 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm, | |||
544 | 622 | ||
545 | list_add(&match->list, &kvm->arch.assigned_dev_head); | 623 | list_add(&match->list, &kvm->arch.assigned_dev_head); |
546 | 624 | ||
547 | if (assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) { | 625 | if (!kvm->arch.iommu_domain) { |
548 | if (!kvm->arch.iommu_domain) { | 626 | r = kvm_iommu_map_guest(kvm); |
549 | r = kvm_iommu_map_guest(kvm); | ||
550 | if (r) | ||
551 | goto out_list_del; | ||
552 | } | ||
553 | r = kvm_assign_device(kvm, match); | ||
554 | if (r) | 627 | if (r) |
555 | goto out_list_del; | 628 | goto out_list_del; |
556 | } | 629 | } |
630 | r = kvm_assign_device(kvm, match); | ||
631 | if (r) | ||
632 | goto out_list_del; | ||
557 | 633 | ||
558 | out: | 634 | out: |
559 | srcu_read_unlock(&kvm->srcu, idx); | 635 | srcu_read_unlock(&kvm->srcu, idx); |
@@ -593,8 +669,7 @@ static int kvm_vm_ioctl_deassign_device(struct kvm *kvm, | |||
593 | goto out; | 669 | goto out; |
594 | } | 670 | } |
595 | 671 | ||
596 | if (match->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) | 672 | kvm_deassign_device(kvm, match); |
597 | kvm_deassign_device(kvm, match); | ||
598 | 673 | ||
599 | kvm_free_assigned_device(kvm, match); | 674 | kvm_free_assigned_device(kvm, match); |
600 | 675 | ||