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authorJean PIHET <jpihet@mvista.com>2009-12-15 06:36:10 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-12-22 10:32:31 -0500
commit3321c2bceab3ae6efdb2dc119c41d78e85d4b661 (patch)
tree73f0472cfc082893c0d71e32a0a8b3109e6133a5
parentcdd90fb575807622e69245d5c3048281f47c77b3 (diff)
ARM: 5849/1: ARMv7: fix Oprofile events count
On Oprofile ARMv7 the PMNC_D bit was set to lower the PMU IRQs and so to decrease the risk of errata #628216 from appearing. The effect of setting the PMNC_D bit is that the CCNT counter is divided by 64, making the program counter events count inaccurate. The new OMAP3 r4 cores should have that errata fixed. The PMNC_D bit should not be set, this patch fixes it. Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/oprofile/op_model_v7.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/arm/oprofile/op_model_v7.c b/arch/arm/oprofile/op_model_v7.c
index f20295f14adb..2088a6c0cc0e 100644
--- a/arch/arm/oprofile/op_model_v7.c
+++ b/arch/arm/oprofile/op_model_v7.c
@@ -191,12 +191,8 @@ int armv7_setup_pmnc(void)
191 return -EBUSY; 191 return -EBUSY;
192 } 192 }
193 193
194 /* 194 /* Initialize & Reset PMNC: C bit and P bit */
195 * Initialize & Reset PMNC: C bit, D bit and P bit. 195 armv7_pmnc_write(PMNC_P | PMNC_C);
196 * Note: Using a slower count for CCNT (D bit: divide by 64) results
197 * in a more stable system
198 */
199 armv7_pmnc_write(PMNC_P | PMNC_C | PMNC_D);
200 196
201 197
202 for (cnt = CCNT; cnt < CNTMAX; cnt++) { 198 for (cnt = CCNT; cnt < CNTMAX; cnt++) {