diff options
author | Paul Walmsley <paul@pwsan.com> | 2011-02-25 17:52:04 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-03-07 22:21:17 -0500 |
commit | 224113969dc9cc7a55f69da4dde5dc3fd1bbeb76 (patch) | |
tree | 3c1b100f82fc9bf22fdad164aeb7e68ab65a78d0 | |
parent | 241d3a8dca239610d3d991bf58d4fe38c2d86fd5 (diff) |
OMAP2xxx: clock: remove dsp_irate_ick
After commit 81b34fbecbfbf24ed95c2d80d5cb14149652408f ("OMAP2 clock:
split OMAP2420, OMAP2430 clock data into their own files"), it's
possible to remove dsp_irate_ick from the OMAP2420 and OMAP2430 clock
files. It was originally only needed due to a 2420/2430 clock tree difference,
and now that the data is in separate files, it's superfluous.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r-- | arch/arm/mach-omap2/clock.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock2420_data.c | 31 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock2430_data.c | 31 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock_common_data.c | 6 |
4 files changed, 23 insertions, 46 deletions
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 62cfd6cc7461..e10ff2b54844 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
@@ -139,6 +139,7 @@ extern struct clk *vclk, *sclk; | |||
139 | extern const struct clksel_rate gpt_32k_rates[]; | 139 | extern const struct clksel_rate gpt_32k_rates[]; |
140 | extern const struct clksel_rate gpt_sys_rates[]; | 140 | extern const struct clksel_rate gpt_sys_rates[]; |
141 | extern const struct clksel_rate gfx_l3_rates[]; | 141 | extern const struct clksel_rate gfx_l3_rates[]; |
142 | extern const struct clksel_rate dsp_ick_rates[]; | ||
142 | 143 | ||
143 | #if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) | 144 | #if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) |
144 | extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); | 145 | extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); |
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 22eeafc89b9f..53bd999c63ae 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c | |||
@@ -454,36 +454,22 @@ static struct clk dsp_fck = { | |||
454 | .recalc = &omap2_clksel_recalc, | 454 | .recalc = &omap2_clksel_recalc, |
455 | }; | 455 | }; |
456 | 456 | ||
457 | /* DSP interface clock */ | 457 | static const struct clksel dsp_ick_clksel[] = { |
458 | static const struct clksel_rate dsp_irate_ick_rates[] = { | 458 | { .parent = &dsp_fck, .rates = dsp_ick_rates }, |
459 | { .div = 1, .val = 1, .flags = RATE_IN_24XX }, | ||
460 | { .div = 2, .val = 2, .flags = RATE_IN_24XX }, | ||
461 | { .div = 0 }, | ||
462 | }; | ||
463 | |||
464 | static const struct clksel dsp_irate_ick_clksel[] = { | ||
465 | { .parent = &dsp_fck, .rates = dsp_irate_ick_rates }, | ||
466 | { .parent = NULL } | 459 | { .parent = NULL } |
467 | }; | 460 | }; |
468 | 461 | ||
469 | /* This clock does not exist as such in the TRM. */ | ||
470 | static struct clk dsp_irate_ick = { | ||
471 | .name = "dsp_irate_ick", | ||
472 | .ops = &clkops_null, | ||
473 | .parent = &dsp_fck, | ||
474 | .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), | ||
475 | .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK, | ||
476 | .clksel = dsp_irate_ick_clksel, | ||
477 | .recalc = &omap2_clksel_recalc, | ||
478 | }; | ||
479 | |||
480 | /* 2420 only */ | ||
481 | static struct clk dsp_ick = { | 462 | static struct clk dsp_ick = { |
482 | .name = "dsp_ick", /* apparently ipi and isp */ | 463 | .name = "dsp_ick", /* apparently ipi and isp */ |
483 | .ops = &clkops_omap2_iclk_dflt_wait, | 464 | .ops = &clkops_omap2_iclk_dflt_wait, |
484 | .parent = &dsp_irate_ick, | 465 | .parent = &dsp_fck, |
466 | .clkdm_name = "dsp_clkdm", | ||
485 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN), | 467 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN), |
486 | .enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */ | 468 | .enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */ |
469 | .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), | ||
470 | .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK, | ||
471 | .clksel = dsp_ick_clksel, | ||
472 | .recalc = &omap2_clksel_recalc, | ||
487 | }; | 473 | }; |
488 | 474 | ||
489 | /* | 475 | /* |
@@ -1812,7 +1798,6 @@ static struct omap_clk omap2420_clks[] = { | |||
1812 | CLK(NULL, "mpu_ck", &mpu_ck, CK_242X), | 1798 | CLK(NULL, "mpu_ck", &mpu_ck, CK_242X), |
1813 | /* dsp domain clocks */ | 1799 | /* dsp domain clocks */ |
1814 | CLK(NULL, "dsp_fck", &dsp_fck, CK_242X), | 1800 | CLK(NULL, "dsp_fck", &dsp_fck, CK_242X), |
1815 | CLK(NULL, "dsp_irate_ick", &dsp_irate_ick, CK_242X), | ||
1816 | CLK(NULL, "dsp_ick", &dsp_ick, CK_242X), | 1801 | CLK(NULL, "dsp_ick", &dsp_ick, CK_242X), |
1817 | CLK(NULL, "iva1_ifck", &iva1_ifck, CK_242X), | 1802 | CLK(NULL, "iva1_ifck", &iva1_ifck, CK_242X), |
1818 | CLK(NULL, "iva1_mpu_int_ifck", &iva1_mpu_int_ifck, CK_242X), | 1803 | CLK(NULL, "iva1_mpu_int_ifck", &iva1_mpu_int_ifck, CK_242X), |
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index df4cac5fef06..36dde2635acb 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c | |||
@@ -433,37 +433,23 @@ static struct clk dsp_fck = { | |||
433 | .recalc = &omap2_clksel_recalc, | 433 | .recalc = &omap2_clksel_recalc, |
434 | }; | 434 | }; |
435 | 435 | ||
436 | /* DSP interface clock */ | 436 | static const struct clksel dsp_ick_clksel[] = { |
437 | static const struct clksel_rate dsp_irate_ick_rates[] = { | 437 | { .parent = &dsp_fck, .rates = dsp_ick_rates }, |
438 | { .div = 1, .val = 1, .flags = RATE_IN_24XX }, | ||
439 | { .div = 2, .val = 2, .flags = RATE_IN_24XX }, | ||
440 | { .div = 3, .val = 3, .flags = RATE_IN_243X }, | ||
441 | { .div = 0 }, | ||
442 | }; | ||
443 | |||
444 | static const struct clksel dsp_irate_ick_clksel[] = { | ||
445 | { .parent = &dsp_fck, .rates = dsp_irate_ick_rates }, | ||
446 | { .parent = NULL } | 438 | { .parent = NULL } |
447 | }; | 439 | }; |
448 | 440 | ||
449 | /* This clock does not exist as such in the TRM. */ | ||
450 | static struct clk dsp_irate_ick = { | ||
451 | .name = "dsp_irate_ick", | ||
452 | .ops = &clkops_null, | ||
453 | .parent = &dsp_fck, | ||
454 | .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), | ||
455 | .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK, | ||
456 | .clksel = dsp_irate_ick_clksel, | ||
457 | .recalc = &omap2_clksel_recalc, | ||
458 | }; | ||
459 | |||
460 | /* 2430 only - EN_DSP controls both dsp fclk and iclk on 2430 */ | 441 | /* 2430 only - EN_DSP controls both dsp fclk and iclk on 2430 */ |
461 | static struct clk iva2_1_ick = { | 442 | static struct clk iva2_1_ick = { |
462 | .name = "iva2_1_ick", | 443 | .name = "iva2_1_ick", |
463 | .ops = &clkops_omap2_dflt_wait, | 444 | .ops = &clkops_omap2_dflt_wait, |
464 | .parent = &dsp_irate_ick, | 445 | .parent = &dsp_fck, |
446 | .clkdm_name = "dsp_clkdm", | ||
465 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), | 447 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), |
466 | .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, | 448 | .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, |
449 | .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), | ||
450 | .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK, | ||
451 | .clksel = dsp_ick_clksel, | ||
452 | .recalc = &omap2_clksel_recalc, | ||
467 | }; | 453 | }; |
468 | 454 | ||
469 | /* | 455 | /* |
@@ -1900,7 +1886,6 @@ static struct omap_clk omap2430_clks[] = { | |||
1900 | CLK(NULL, "mpu_ck", &mpu_ck, CK_243X), | 1886 | CLK(NULL, "mpu_ck", &mpu_ck, CK_243X), |
1901 | /* dsp domain clocks */ | 1887 | /* dsp domain clocks */ |
1902 | CLK(NULL, "dsp_fck", &dsp_fck, CK_243X), | 1888 | CLK(NULL, "dsp_fck", &dsp_fck, CK_243X), |
1903 | CLK(NULL, "dsp_irate_ick", &dsp_irate_ick, CK_243X), | ||
1904 | CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X), | 1889 | CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X), |
1905 | /* GFX domain clocks */ | 1890 | /* GFX domain clocks */ |
1906 | CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X), | 1891 | CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X), |
diff --git a/arch/arm/mach-omap2/clock_common_data.c b/arch/arm/mach-omap2/clock_common_data.c index 1cf8131205fa..6424d46be14a 100644 --- a/arch/arm/mach-omap2/clock_common_data.c +++ b/arch/arm/mach-omap2/clock_common_data.c | |||
@@ -37,3 +37,9 @@ const struct clksel_rate gfx_l3_rates[] = { | |||
37 | { .div = 0 } | 37 | { .div = 0 } |
38 | }; | 38 | }; |
39 | 39 | ||
40 | const struct clksel_rate dsp_ick_rates[] = { | ||
41 | { .div = 1, .val = 1, .flags = RATE_IN_24XX }, | ||
42 | { .div = 2, .val = 2, .flags = RATE_IN_24XX }, | ||
43 | { .div = 3, .val = 3, .flags = RATE_IN_243X }, | ||
44 | { .div = 0 }, | ||
45 | }; | ||