[PATCH] i386/x86-64 disable LAPIC completely for offline CPU

Disabling LAPIC timer isn't sufficient.  In some situations, such as we
enabled NMI watchdog, there is still unexpected interrupt (such as NMI)
invoked in offline CPU.  This also avoids offline CPU receives spurious
interrupt and anything similar.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: "Seth, Rohit" <rohit.seth@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

2 files changed, 2 insertions, 3 deletions

diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index d16520da4550..9ed449af8e9f 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -1338,8 +1338,7 @@ int __cpu_disable(void)
         if (cpu == 0)
                 return -EBUSY;
 
-        /* We enable the timer again on the exit path of the death loop */
-        disable_APIC_timer();
+        clear_local_APIC();
         /* Allow any queued timer interrupts to get serviced */
         local_irq_enable();
         mdelay(1);
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c
index 683c33f7b967..ecbd7b83acc1 100644
--- a/arch/x86_64/kernel/smpboot.c
+++ b/arch/x86_64/kernel/smpboot.c
@@ -1181,7 +1181,7 @@ int __cpu_disable(void)
         if (cpu == 0)
                 return -EBUSY;
 
-        disable_APIC_timer();
+        clear_local_APIC();
 
         /*
          * HACK: