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authorMasato Noguchi <Masato.Noguchi@jp.sony.com>2007-07-20 15:39:41 -0400
committerArnd Bergmann <arnd@klappe.arndb.de>2007-07-20 15:42:03 -0400
commitca53da3abb1d49748931ff2acb66d5a6eeeba2a1 (patch)
tree071c3894b1aea8db2b4e9a0cf10789171bb1ab4c
parentcf17df223c8cd56a92f34162f2a362eec9f4b157 (diff)
[CELL] spufs: change decrementer restore timing
The SPU decrementer should be restored after the LSCSA DMA has completed. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_restore.c4
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped36
2 files changed, 20 insertions, 20 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore.c b/arch/powerpc/platforms/cell/spufs/spu_restore.c
index 7114e033460e..21a9c952d88b 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore.c
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore.c
@@ -84,7 +84,7 @@ static inline void restore_decr(void)
84 unsigned int decr_running; 84 unsigned int decr_running;
85 unsigned int decr; 85 unsigned int decr;
86 86
87 /* Restore, Step 6: 87 /* Restore, Step 6(moved):
88 * If the LSCSA "decrementer running" flag is set 88 * If the LSCSA "decrementer running" flag is set
89 * then write the SPU_WrDec channel with the 89 * then write the SPU_WrDec channel with the
90 * decrementer value from LSCSA. 90 * decrementer value from LSCSA.
@@ -318,10 +318,10 @@ int main()
318 build_dma_list(lscsa_ea); /* Step 3. */ 318 build_dma_list(lscsa_ea); /* Step 3. */
319 restore_upper_240kb(lscsa_ea); /* Step 4. */ 319 restore_upper_240kb(lscsa_ea); /* Step 4. */
320 /* Step 5: done by 'exit'. */ 320 /* Step 5: done by 'exit'. */
321 restore_decr(); /* Step 6. */
322 enqueue_putllc(lscsa_ea); /* Step 7. */ 321 enqueue_putllc(lscsa_ea); /* Step 7. */
323 set_tag_update(); /* Step 8. */ 322 set_tag_update(); /* Step 8. */
324 read_tag_status(); /* Step 9. */ 323 read_tag_status(); /* Step 9. */
324 restore_decr(); /* moved Step 6. */
325 read_llar_status(); /* Step 10. */ 325 read_llar_status(); /* Step 10. */
326 write_ppu_mb(); /* Step 11. */ 326 write_ppu_mb(); /* Step 11. */
327 write_ppuint_mb(); /* Step 12. */ 327 write_ppuint_mb(); /* Step 12. */
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
index 799815e22377..f383b027e8bf 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
@@ -93,26 +93,21 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
930x18020204, 930x18020204,
940x24000282, 940x24000282,
950x217ffa09, 950x217ffa09,
960x04000403, 960x04000402,
970x21a00803, 970x21a00802,
980x3fbe0502, 980x3fbe0504,
990x3fe30102, 990x3fe30204,
1000x04000105, 1000x21a00884,
1010x21a00885,
1020x42074002, 1010x42074002,
1030x21a00902, 1020x21a00902,
1040x40803c03, 1030x40803c03,
1050x21a00983, 1040x21a00983,
1060x04000484, 1050x04000485,
1070x21a00a04, 1060x21a00a05,
1080x40802202, 1070x40802202,
1090x21a00a82, 1080x21a00a82,
1100x30809c03, 1090x21a00805,
1110x34000182, 1100x21a00884,
1120x14004102,
1130x21002782,
1140x21a00804,
1150x21a00885,
1160x3fbf0582, 1110x3fbf0582,
1170x3f200102, 1120x3f200102,
1180x3fbe0102, 1130x3fbe0102,
@@ -120,13 +115,17 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
1200x21a00902, 1150x21a00902,
1210x40804003, 1160x40804003,
1220x21a00983, 1170x21a00983,
1230x21a00a04, 1180x21a00a05,
1240x40805a02, 1190x40805a02,
1250x21a00a82, 1200x21a00a82,
1260x40800083, 1210x40800083,
1270x21a00b83, 1220x21a00b83,
1280x01a00c02, 1230x01a00c02,
1290x01a00d84, 1240x30809c03,
1250x34000182,
1260x14004102,
1270x21002082,
1280x01a00d82,
1300x3080a003, 1290x3080a003,
1310x34000182, 1300x34000182,
1320x21a00e02, 1310x21a00e02,
@@ -145,9 +144,10 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
1450x3080aa03, 1440x3080aa03,
1460x34000182, 1450x34000182,
1470x21a00b02, 1460x21a00b02,
1470x4020007f,
1480x3080ae02, 1480x3080ae02,
1490x3080ac04,
1500x42004805, 1490x42004805,
1500x3080ac04,
1510x34000103, 1510x34000103,
1520x34000202, 1520x34000202,
1530x1cffc183, 1530x1cffc183,
@@ -193,7 +193,7 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
1930x34000182, 1930x34000182,
1940x21a00382, 1940x21a00382,
1950x4020007f, 1950x4020007f,
1960x327fd700, 1960x327fde00,
1970x409ffe02, 1970x409ffe02,
1980x30801203, 1980x30801203,
1990x40800206, 1990x40800206,