diff options
| author | Jon Smirl <jonsmirl@gmail.com> | 2009-05-27 01:06:19 -0400 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-05-27 16:10:37 -0400 |
| commit | ea8b27ad0cc2573776c6cd87617a37aaf603b8bd (patch) | |
| tree | 06f0043345a608617be3a00daf755915a1bd53f2 | |
| parent | 08d15f034e94251606479d7ca9070994c2e2fcf0 (diff) | |
ASoC: Modify mpc5200 AC97 driver to use V9 of spin_event_timeout()
The function signature for spin_event_timeout() has changed in version V9.
Adjust the mpc5200 AC97 driver to use the new function.
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| -rw-r--r-- | sound/soc/fsl/mpc5200_psc_ac97.c | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/sound/soc/fsl/mpc5200_psc_ac97.c b/sound/soc/fsl/mpc5200_psc_ac97.c index 9f2df1552f02..794a247b3eb5 100644 --- a/sound/soc/fsl/mpc5200_psc_ac97.c +++ b/sound/soc/fsl/mpc5200_psc_ac97.c | |||
| @@ -31,13 +31,13 @@ static struct psc_dma *psc_dma; | |||
| 31 | 31 | ||
| 32 | static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg) | 32 | static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
| 33 | { | 33 | { |
| 34 | int rc; | 34 | int status; |
| 35 | unsigned int val; | 35 | unsigned int val; |
| 36 | 36 | ||
| 37 | /* Wait for command send status zero = ready */ | 37 | /* Wait for command send status zero = ready */ |
| 38 | spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & | 38 | status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & |
| 39 | MPC52xx_PSC_SR_CMDSEND), 100, 0, rc); | 39 | MPC52xx_PSC_SR_CMDSEND), 100, 0); |
| 40 | if (rc == 0) { | 40 | if (status == 0) { |
| 41 | pr_err("timeout on ac97 bus (rdy)\n"); | 41 | pr_err("timeout on ac97 bus (rdy)\n"); |
| 42 | return -ENODEV; | 42 | return -ENODEV; |
| 43 | } | 43 | } |
| @@ -45,9 +45,9 @@ static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg) | |||
| 45 | out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); | 45 | out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); |
| 46 | 46 | ||
| 47 | /* Wait for the answer */ | 47 | /* Wait for the answer */ |
| 48 | spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) & | 48 | status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) & |
| 49 | MPC52xx_PSC_SR_DATA_VAL), 100, 0, rc); | 49 | MPC52xx_PSC_SR_DATA_VAL), 100, 0); |
| 50 | if (rc == 0) { | 50 | if (status == 0) { |
| 51 | pr_err("timeout on ac97 read (val) %x\n", | 51 | pr_err("timeout on ac97 read (val) %x\n", |
| 52 | in_be16(&psc_dma->psc_regs->sr_csr.status)); | 52 | in_be16(&psc_dma->psc_regs->sr_csr.status)); |
| 53 | return -ENODEV; | 53 | return -ENODEV; |
| @@ -66,12 +66,12 @@ static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg) | |||
| 66 | static void psc_ac97_write(struct snd_ac97 *ac97, | 66 | static void psc_ac97_write(struct snd_ac97 *ac97, |
| 67 | unsigned short reg, unsigned short val) | 67 | unsigned short reg, unsigned short val) |
| 68 | { | 68 | { |
| 69 | int rc; | 69 | int status; |
| 70 | 70 | ||
| 71 | /* Wait for command status zero = ready */ | 71 | /* Wait for command status zero = ready */ |
| 72 | spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & | 72 | status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & |
| 73 | MPC52xx_PSC_SR_CMDSEND), 100, 0, rc); | 73 | MPC52xx_PSC_SR_CMDSEND), 100, 0); |
| 74 | if (rc == 0) { | 74 | if (status == 0) { |
| 75 | pr_err("timeout on ac97 bus (write)\n"); | 75 | pr_err("timeout on ac97 bus (write)\n"); |
| 76 | return; | 76 | return; |
| 77 | } | 77 | } |
| @@ -82,24 +82,22 @@ static void psc_ac97_write(struct snd_ac97 *ac97, | |||
| 82 | 82 | ||
| 83 | static void psc_ac97_warm_reset(struct snd_ac97 *ac97) | 83 | static void psc_ac97_warm_reset(struct snd_ac97 *ac97) |
| 84 | { | 84 | { |
| 85 | int rc; | ||
| 86 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; | 85 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; |
| 87 | 86 | ||
| 88 | out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); | 87 | out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); |
| 89 | spin_event_timeout(0, 3, 0, rc); | 88 | udelay(3); |
| 90 | out_be32(®s->sicr, psc_dma->sicr); | 89 | out_be32(®s->sicr, psc_dma->sicr); |
| 91 | } | 90 | } |
| 92 | 91 | ||
| 93 | static void psc_ac97_cold_reset(struct snd_ac97 *ac97) | 92 | static void psc_ac97_cold_reset(struct snd_ac97 *ac97) |
| 94 | { | 93 | { |
| 95 | int rc; | ||
| 96 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; | 94 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; |
| 97 | 95 | ||
| 98 | /* Do a cold reset */ | 96 | /* Do a cold reset */ |
| 99 | out_8(®s->op1, MPC52xx_PSC_OP_RES); | 97 | out_8(®s->op1, MPC52xx_PSC_OP_RES); |
| 100 | spin_event_timeout(0, 10, 0, rc); | 98 | udelay(10); |
| 101 | out_8(®s->op0, MPC52xx_PSC_OP_RES); | 99 | out_8(®s->op0, MPC52xx_PSC_OP_RES); |
| 102 | spin_event_timeout(0, 50, 0, rc); | 100 | udelay(50); |
| 103 | psc_ac97_warm_reset(ac97); | 101 | psc_ac97_warm_reset(ac97); |
| 104 | } | 102 | } |
| 105 | 103 | ||
