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authorMichael Chan <mchan@broadcom.com>2007-10-02 19:27:35 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:54:07 -0400
commitea1f8d5c3a593a791463c2efc07e5dfebd056500 (patch)
treee25bb6cffff8637b19c73f6ca68eeb901a2473a3
parentdad8c737962669240470923f951570ed716da1a1 (diff)
[BNX2]: Optimize firmware loading.
This is a follow up to the patches from Denys Vlasenkos <vda.linux@googlemail.com> to further optimize firmware loading. 1. In bnx2_init_cpus(), we allocate memory for decompression once and use it repeatedly instead of doing this for every firmware image. 2. We eliminate the BSS and SBSS firmware sections in bnx2_fw*.h since these are always zeros. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/bnx2.c40
-rw-r--r--drivers/net/bnx2.h4
-rw-r--r--drivers/net/bnx2_fw.h17
-rw-r--r--drivers/net/bnx2_fw2.h20
4 files changed, 20 insertions, 61 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 6d6ea56fe384..00aef8b08da4 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -2810,21 +2810,16 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
2810 /* Load the Text area. */ 2810 /* Load the Text area. */
2811 offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base); 2811 offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);
2812 if (fw->gz_text) { 2812 if (fw->gz_text) {
2813 u32 *text;
2814 int j; 2813 int j;
2815 2814
2816 text = vmalloc(FW_BUF_SIZE); 2815 rc = zlib_inflate_blob(fw->text, FW_BUF_SIZE, fw->gz_text,
2817 if (!text) 2816 fw->gz_text_len);
2818 return -ENOMEM; 2817 if (rc < 0)
2819 rc = zlib_inflate_blob(text, FW_BUF_SIZE, fw->gz_text, fw->gz_text_len);
2820 if (rc < 0) {
2821 vfree(text);
2822 return rc; 2818 return rc;
2823 } 2819
2824 for (j = 0; j < (fw->text_len / 4); j++, offset += 4) { 2820 for (j = 0; j < (fw->text_len / 4); j++, offset += 4) {
2825 REG_WR_IND(bp, offset, cpu_to_le32(text[j])); 2821 REG_WR_IND(bp, offset, cpu_to_le32(fw->text[j]));
2826 } 2822 }
2827 vfree(text);
2828 } 2823 }
2829 2824
2830 /* Load the Data area. */ 2825 /* Load the Data area. */
@@ -2839,21 +2834,21 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
2839 2834
2840 /* Load the SBSS area. */ 2835 /* Load the SBSS area. */
2841 offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base); 2836 offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base);
2842 if (fw->sbss) { 2837 if (fw->sbss_len) {
2843 int j; 2838 int j;
2844 2839
2845 for (j = 0; j < (fw->sbss_len / 4); j++, offset += 4) { 2840 for (j = 0; j < (fw->sbss_len / 4); j++, offset += 4) {
2846 REG_WR_IND(bp, offset, fw->sbss[j]); 2841 REG_WR_IND(bp, offset, 0);
2847 } 2842 }
2848 } 2843 }
2849 2844
2850 /* Load the BSS area. */ 2845 /* Load the BSS area. */
2851 offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base); 2846 offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base);
2852 if (fw->bss) { 2847 if (fw->bss_len) {
2853 int j; 2848 int j;
2854 2849
2855 for (j = 0; j < (fw->bss_len/4); j++, offset += 4) { 2850 for (j = 0; j < (fw->bss_len/4); j++, offset += 4) {
2856 REG_WR_IND(bp, offset, fw->bss[j]); 2851 REG_WR_IND(bp, offset, 0);
2857 } 2852 }
2858 } 2853 }
2859 2854
@@ -2894,19 +2889,16 @@ bnx2_init_cpus(struct bnx2 *bp)
2894 if (!text) 2889 if (!text)
2895 return -ENOMEM; 2890 return -ENOMEM;
2896 rc = zlib_inflate_blob(text, FW_BUF_SIZE, bnx2_rv2p_proc1, sizeof(bnx2_rv2p_proc1)); 2891 rc = zlib_inflate_blob(text, FW_BUF_SIZE, bnx2_rv2p_proc1, sizeof(bnx2_rv2p_proc1));
2897 if (rc < 0) { 2892 if (rc < 0)
2898 vfree(text);
2899 goto init_cpu_err; 2893 goto init_cpu_err;
2900 } 2894
2901 load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC1); 2895 load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC1);
2902 2896
2903 rc = zlib_inflate_blob(text, FW_BUF_SIZE, bnx2_rv2p_proc2, sizeof(bnx2_rv2p_proc2)); 2897 rc = zlib_inflate_blob(text, FW_BUF_SIZE, bnx2_rv2p_proc2, sizeof(bnx2_rv2p_proc2));
2904 if (rc < 0) { 2898 if (rc < 0)
2905 vfree(text);
2906 goto init_cpu_err; 2899 goto init_cpu_err;
2907 } 2900
2908 load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC2); 2901 load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC2);
2909 vfree(text);
2910 2902
2911 /* Initialize the RX Processor. */ 2903 /* Initialize the RX Processor. */
2912 cpu_reg.mode = BNX2_RXP_CPU_MODE; 2904 cpu_reg.mode = BNX2_RXP_CPU_MODE;
@@ -2927,6 +2919,7 @@ bnx2_init_cpus(struct bnx2 *bp)
2927 else 2919 else
2928 fw = &bnx2_rxp_fw_06; 2920 fw = &bnx2_rxp_fw_06;
2929 2921
2922 fw->text = text;
2930 rc = load_cpu_fw(bp, &cpu_reg, fw); 2923 rc = load_cpu_fw(bp, &cpu_reg, fw);
2931 if (rc) 2924 if (rc)
2932 goto init_cpu_err; 2925 goto init_cpu_err;
@@ -2950,6 +2943,7 @@ bnx2_init_cpus(struct bnx2 *bp)
2950 else 2943 else
2951 fw = &bnx2_txp_fw_06; 2944 fw = &bnx2_txp_fw_06;
2952 2945
2946 fw->text = text;
2953 rc = load_cpu_fw(bp, &cpu_reg, fw); 2947 rc = load_cpu_fw(bp, &cpu_reg, fw);
2954 if (rc) 2948 if (rc)
2955 goto init_cpu_err; 2949 goto init_cpu_err;
@@ -2973,6 +2967,7 @@ bnx2_init_cpus(struct bnx2 *bp)
2973 else 2967 else
2974 fw = &bnx2_tpat_fw_06; 2968 fw = &bnx2_tpat_fw_06;
2975 2969
2970 fw->text = text;
2976 rc = load_cpu_fw(bp, &cpu_reg, fw); 2971 rc = load_cpu_fw(bp, &cpu_reg, fw);
2977 if (rc) 2972 if (rc)
2978 goto init_cpu_err; 2973 goto init_cpu_err;
@@ -2996,6 +2991,7 @@ bnx2_init_cpus(struct bnx2 *bp)
2996 else 2991 else
2997 fw = &bnx2_com_fw_06; 2992 fw = &bnx2_com_fw_06;
2998 2993
2994 fw->text = text;
2999 rc = load_cpu_fw(bp, &cpu_reg, fw); 2995 rc = load_cpu_fw(bp, &cpu_reg, fw);
3000 if (rc) 2996 if (rc)
3001 goto init_cpu_err; 2997 goto init_cpu_err;
@@ -3017,11 +3013,13 @@ bnx2_init_cpus(struct bnx2 *bp)
3017 if (CHIP_NUM(bp) == CHIP_NUM_5709) { 3013 if (CHIP_NUM(bp) == CHIP_NUM_5709) {
3018 fw = &bnx2_cp_fw_09; 3014 fw = &bnx2_cp_fw_09;
3019 3015
3016 fw->text = text;
3020 rc = load_cpu_fw(bp, &cpu_reg, fw); 3017 rc = load_cpu_fw(bp, &cpu_reg, fw);
3021 if (rc) 3018 if (rc)
3022 goto init_cpu_err; 3019 goto init_cpu_err;
3023 } 3020 }
3024init_cpu_err: 3021init_cpu_err:
3022 vfree(text);
3025 return rc; 3023 return rc;
3026} 3024}
3027 3025
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index a717459cc8d4..56c190fc6de6 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6738,7 +6738,7 @@ struct fw_info {
6738 const u32 text_addr; 6738 const u32 text_addr;
6739 const u32 text_len; 6739 const u32 text_len;
6740 const u32 text_index; 6740 const u32 text_index;
6741/* u32 *text;*/ 6741 u32 *text;
6742 u8 *gz_text; 6742 u8 *gz_text;
6743 const u32 gz_text_len; 6743 const u32 gz_text_len;
6744 6744
@@ -6752,13 +6752,11 @@ struct fw_info {
6752 const u32 sbss_addr; 6752 const u32 sbss_addr;
6753 const u32 sbss_len; 6753 const u32 sbss_len;
6754 const u32 sbss_index; 6754 const u32 sbss_index;
6755 const u32 *sbss;
6756 6755
6757 /* BSS section. */ 6756 /* BSS section. */
6758 const u32 bss_addr; 6757 const u32 bss_addr;
6759 const u32 bss_len; 6758 const u32 bss_len;
6760 const u32 bss_index; 6759 const u32 bss_index;
6761 const u32 *bss;
6762 6760
6763 /* Read-only section. */ 6761 /* Read-only section. */
6764 const u32 rodata_addr; 6762 const u32 rodata_addr;
diff --git a/drivers/net/bnx2_fw.h b/drivers/net/bnx2_fw.h
index 30f2f4052fc1..a6d78243163b 100644
--- a/drivers/net/bnx2_fw.h
+++ b/drivers/net/bnx2_fw.h
@@ -1048,8 +1048,6 @@ static const u32 bnx2_COM_b06FwRodata[(0x88/4) + 1] = {
1048 0x08002bd8, 0x08002c08, 0x08002c38, 0x00000000, 0x080060cc, 0x080060cc, 1048 0x08002bd8, 0x08002c08, 0x08002c38, 0x00000000, 0x080060cc, 0x080060cc,
1049 0x080060cc, 0x080060cc, 0x080060cc, 0x08006100, 0x08006100, 0x08006140, 1049 0x080060cc, 0x080060cc, 0x080060cc, 0x08006100, 0x08006100, 0x08006140,
1050 0x0800614c, 0x0800614c, 0x080060cc, 0x00000000, 0x00000000 }; 1050 0x0800614c, 0x0800614c, 0x080060cc, 0x00000000, 0x00000000 };
1051static const u32 bnx2_COM_b06FwBss[(0x88/4) + 1] = { 0x0 };
1052static const u32 bnx2_COM_b06FwSbss[(0x60/4) + 1] = { 0x0 };
1053 1051
1054static struct fw_info bnx2_com_fw_06 = { 1052static struct fw_info bnx2_com_fw_06 = {
1055 .ver_major = 0x3, 1053 .ver_major = 0x3,
@@ -1072,12 +1070,10 @@ static struct fw_info bnx2_com_fw_06 = {
1072 .sbss_addr = 0x08007e00, 1070 .sbss_addr = 0x08007e00,
1073 .sbss_len = 0x60, 1071 .sbss_len = 0x60,
1074 .sbss_index = 0x0, 1072 .sbss_index = 0x0,
1075 .sbss = bnx2_COM_b06FwSbss,
1076 1073
1077 .bss_addr = 0x08007e60, 1074 .bss_addr = 0x08007e60,
1078 .bss_len = 0x88, 1075 .bss_len = 0x88,
1079 .bss_index = 0x0, 1076 .bss_index = 0x0,
1080 .bss = bnx2_COM_b06FwBss,
1081 1077
1082 .rodata_addr = 0x08007d58, 1078 .rodata_addr = 0x08007d58,
1083 .rodata_len = 0x88, 1079 .rodata_len = 0x88,
@@ -1762,9 +1758,6 @@ static u32 bnx2_RXP_b06FwRodata[(0x278/4) + 1] = {
1762 0x08006030, 0x08006030, 0x08006018, 0x08006030, 0x08006030, 0x08006030, 1758 0x08006030, 0x08006030, 0x08006018, 0x08006030, 0x08006030, 0x08006030,
1763 0x08006024, 0x00000000, 0x00000000 }; 1759 0x08006024, 0x00000000, 0x00000000 };
1764 1760
1765static u32 bnx2_RXP_b06FwBss[(0x13dc/4) + 1] = { 0x0 };
1766static u32 bnx2_RXP_b06FwSbss[(0x2c/4) + 1] = { 0x0 };
1767
1768static struct fw_info bnx2_rxp_fw_06 = { 1761static struct fw_info bnx2_rxp_fw_06 = {
1769 .ver_major = 0x2, 1762 .ver_major = 0x2,
1770 .ver_minor = 0x8, 1763 .ver_minor = 0x8,
@@ -1786,12 +1779,10 @@ static struct fw_info bnx2_rxp_fw_06 = {
1786 .sbss_addr = 0x080069c0, 1779 .sbss_addr = 0x080069c0,
1787 .sbss_len = 0x2c, 1780 .sbss_len = 0x2c,
1788 .sbss_index = 0x0, 1781 .sbss_index = 0x0,
1789 .sbss = bnx2_RXP_b06FwSbss,
1790 1782
1791 .bss_addr = 0x080069f0, 1783 .bss_addr = 0x080069f0,
1792 .bss_len = 0x13dc, 1784 .bss_len = 0x13dc,
1793 .bss_index = 0x0, 1785 .bss_index = 0x0,
1794 .bss = bnx2_RXP_b06FwBss,
1795 1786
1796 .rodata_addr = 0x08006728, 1787 .rodata_addr = 0x08006728,
1797 .rodata_len = 0x278, 1788 .rodata_len = 0x278,
@@ -2257,8 +2248,6 @@ static u8 bnx2_TPAT_b06FwText[] = {
2257 2248
2258static u32 bnx2_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 }; 2249static u32 bnx2_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 };
2259static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 }; 2250static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
2260static u32 bnx2_TPAT_b06FwBss[(0x250/4) + 1] = { 0x0 };
2261static u32 bnx2_TPAT_b06FwSbss[(0x34/4) + 1] = { 0x0 };
2262 2251
2263static struct fw_info bnx2_tpat_fw_06 = { 2252static struct fw_info bnx2_tpat_fw_06 = {
2264 .ver_major = 0x1, 2253 .ver_major = 0x1,
@@ -2281,12 +2270,10 @@ static struct fw_info bnx2_tpat_fw_06 = {
2281 .sbss_addr = 0x08001a60, 2270 .sbss_addr = 0x08001a60,
2282 .sbss_len = 0x34, 2271 .sbss_len = 0x34,
2283 .sbss_index = 0x0, 2272 .sbss_index = 0x0,
2284 .sbss = bnx2_TPAT_b06FwSbss,
2285 2273
2286 .bss_addr = 0x08001aa0, 2274 .bss_addr = 0x08001aa0,
2287 .bss_len = 0x250, 2275 .bss_len = 0x250,
2288 .bss_index = 0x0, 2276 .bss_index = 0x0,
2289 .bss = bnx2_TPAT_b06FwBss,
2290 2277
2291 .rodata_addr = 0x00000000, 2278 .rodata_addr = 0x00000000,
2292 .rodata_len = 0x0, 2279 .rodata_len = 0x0,
@@ -2714,8 +2701,6 @@ static u8 bnx2_TXP_b06FwText[] = {
2714 2701
2715static u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 }; 2702static u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 };
2716static u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 }; 2703static u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 };
2717static u32 bnx2_TXP_b06FwBss[(0x1c4/4) + 1] = { 0x0 };
2718static u32 bnx2_TXP_b06FwSbss[(0x38/4) + 1] = { 0x0 };
2719 2704
2720static struct fw_info bnx2_txp_fw_06 = { 2705static struct fw_info bnx2_txp_fw_06 = {
2721 .ver_major = 0x1, 2706 .ver_major = 0x1,
@@ -2738,12 +2723,10 @@ static struct fw_info bnx2_txp_fw_06 = {
2738 .sbss_addr = 0x08005760, 2723 .sbss_addr = 0x08005760,
2739 .sbss_len = 0x38, 2724 .sbss_len = 0x38,
2740 .sbss_index = 0x0, 2725 .sbss_index = 0x0,
2741 .sbss = bnx2_TXP_b06FwSbss,
2742 2726
2743 .bss_addr = 0x080057a0, 2727 .bss_addr = 0x080057a0,
2744 .bss_len = 0x1c4, 2728 .bss_len = 0x1c4,
2745 .bss_index = 0x0, 2729 .bss_index = 0x0,
2746 .bss = bnx2_TXP_b06FwBss,
2747 2730
2748 .rodata_addr = 0x00000000, 2731 .rodata_addr = 0x00000000,
2749 .rodata_len = 0x0, 2732 .rodata_len = 0x0,
diff --git a/drivers/net/bnx2_fw2.h b/drivers/net/bnx2_fw2.h
index 74f985d8fac7..5bd52bead9bf 100644
--- a/drivers/net/bnx2_fw2.h
+++ b/drivers/net/bnx2_fw2.h
@@ -1046,8 +1046,6 @@ static const u32 bnx2_COM_b09FwRodata[(0x88/4) + 1] = {
1046 0x08002b3c, 0x08002b6c, 0x08002b9c, 0x00000000, 0x0800604c, 0x0800604c, 1046 0x08002b3c, 0x08002b6c, 0x08002b9c, 0x00000000, 0x0800604c, 0x0800604c,
1047 0x0800604c, 0x0800604c, 0x0800604c, 0x08006078, 0x08006078, 0x080060b8, 1047 0x0800604c, 0x0800604c, 0x0800604c, 0x08006078, 0x08006078, 0x080060b8,
1048 0x080060c4, 0x080060c4, 0x0800604c, 0x00000000, 0x00000000 }; 1048 0x080060c4, 0x080060c4, 0x0800604c, 0x00000000, 0x00000000 };
1049static const u32 bnx2_COM_b09FwBss[(0x88/4) + 1] = { 0x0 };
1050static const u32 bnx2_COM_b09FwSbss[(0x60/4) + 1] = { 0x0 };
1051 1049
1052static struct fw_info bnx2_com_fw_09 = { 1050static struct fw_info bnx2_com_fw_09 = {
1053 .ver_major = 0x3, 1051 .ver_major = 0x3,
@@ -1070,12 +1068,10 @@ static struct fw_info bnx2_com_fw_09 = {
1070 .sbss_addr = 0x08007e60, 1068 .sbss_addr = 0x08007e60,
1071 .sbss_len = 0x60, 1069 .sbss_len = 0x60,
1072 .sbss_index = 0x0, 1070 .sbss_index = 0x0,
1073 .sbss = bnx2_COM_b09FwSbss,
1074 1071
1075 .bss_addr = 0x08007ec0, 1072 .bss_addr = 0x08007ec0,
1076 .bss_len = 0x88, 1073 .bss_len = 0x88,
1077 .bss_index = 0x0, 1074 .bss_index = 0x0,
1078 .bss = bnx2_COM_b09FwBss,
1079 1075
1080 .rodata_addr = 0x08007dc0, 1076 .rodata_addr = 0x08007dc0,
1081 .rodata_len = 0x88, 1077 .rodata_len = 0x88,
@@ -2243,8 +2239,6 @@ static const u32 bnx2_CP_b09FwRodata[(0x118/4) + 1] = {
2243 0x080032e8, 0x08003300, 0x08003320, 0x08003358, 0x08003338, 0x08003338, 2239 0x080032e8, 0x08003300, 0x08003320, 0x08003358, 0x08003338, 0x08003338,
2244 0x080050d4, 0x080050d4, 0x080050d4, 0x080050d4, 0x080050d4, 0x080050fc, 2240 0x080050d4, 0x080050d4, 0x080050d4, 0x080050d4, 0x080050d4, 0x080050fc,
2245 0x080050fc, 0x08005124, 0x08005174, 0x08005144, 0x00000000 }; 2241 0x080050fc, 0x08005124, 0x08005174, 0x08005144, 0x00000000 };
2246static const u32 bnx2_CP_b09FwBss[(0x3b0/4) + 1] = { 0x0 };
2247static const u32 bnx2_CP_b09FwSbss[(0xa1/4) + 1] = { 0x0 };
2248 2242
2249static struct fw_info bnx2_cp_fw_09 = { 2243static struct fw_info bnx2_cp_fw_09 = {
2250 .ver_major = 0x3, 2244 .ver_major = 0x3,
@@ -2267,12 +2261,10 @@ static struct fw_info bnx2_cp_fw_09 = {
2267 .sbss_addr = 0x08007024, 2261 .sbss_addr = 0x08007024,
2268 .sbss_len = 0xa1, 2262 .sbss_len = 0xa1,
2269 .sbss_index = 0x0, 2263 .sbss_index = 0x0,
2270 .sbss = bnx2_CP_b09FwSbss,
2271 2264
2272 .bss_addr = 0x080070d0, 2265 .bss_addr = 0x080070d0,
2273 .bss_len = 0x3b0, 2266 .bss_len = 0x3b0,
2274 .bss_index = 0x0, 2267 .bss_index = 0x0,
2275 .bss = bnx2_CP_b09FwBss,
2276 2268
2277 .rodata_addr = 0x08006ee8, 2269 .rodata_addr = 0x08006ee8,
2278 .rodata_len = 0x118, 2270 .rodata_len = 0x118,
@@ -2953,8 +2945,6 @@ static const u32 bnx2_RXP_b09FwRodata[(0x278/4) + 1] = {
2953 0x08006058, 0x08006070, 0x08006070, 0x08006070, 0x08006058, 0x08006070, 2945 0x08006058, 0x08006070, 0x08006070, 0x08006070, 0x08006058, 0x08006070,
2954 0x08006070, 0x08006070, 0x08006058, 0x08006070, 0x08006070, 0x08006070, 2946 0x08006070, 0x08006070, 0x08006058, 0x08006070, 0x08006070, 0x08006070,
2955 0x08006064, 0x00000000, 0x00000000 }; 2947 0x08006064, 0x00000000, 0x00000000 };
2956static const u32 bnx2_RXP_b09FwBss[(0x13dc/4) + 1] = { 0x0 };
2957static const u32 bnx2_RXP_b09FwSbss[(0x20/4) + 1] = { 0x0 };
2958 2948
2959static struct fw_info bnx2_rxp_fw_09 = { 2949static struct fw_info bnx2_rxp_fw_09 = {
2960 .ver_major = 0x3, 2950 .ver_major = 0x3,
@@ -2977,12 +2967,10 @@ static struct fw_info bnx2_rxp_fw_09 = {
2977 .sbss_addr = 0x08006a00, 2967 .sbss_addr = 0x08006a00,
2978 .sbss_len = 0x20, 2968 .sbss_len = 0x20,
2979 .sbss_index = 0x0, 2969 .sbss_index = 0x0,
2980 .sbss = bnx2_RXP_b09FwSbss,
2981 2970
2982 .bss_addr = 0x08006a20, 2971 .bss_addr = 0x08006a20,
2983 .bss_len = 0x13dc, 2972 .bss_len = 0x13dc,
2984 .bss_index = 0x0, 2973 .bss_index = 0x0,
2985 .bss = bnx2_RXP_b09FwBss,
2986 2974
2987 .rodata_addr = 0x08006768, 2975 .rodata_addr = 0x08006768,
2988 .rodata_len = 0x278, 2976 .rodata_len = 0x278,
@@ -3245,8 +3233,6 @@ static u8 bnx2_TPAT_b09FwText[] = {
3245 3233
3246static const u32 bnx2_TPAT_b09FwData[(0x0/4) + 1] = { 0x0 }; 3234static const u32 bnx2_TPAT_b09FwData[(0x0/4) + 1] = { 0x0 };
3247static const u32 bnx2_TPAT_b09FwRodata[(0x0/4) + 1] = { 0x0 }; 3235static const u32 bnx2_TPAT_b09FwRodata[(0x0/4) + 1] = { 0x0 };
3248static const u32 bnx2_TPAT_b09FwBss[(0x850/4) + 1] = { 0x0 };
3249static const u32 bnx2_TPAT_b09FwSbss[(0x2c/4) + 1] = { 0x0 };
3250 3236
3251static struct fw_info bnx2_tpat_fw_09 = { 3237static struct fw_info bnx2_tpat_fw_09 = {
3252 .ver_major = 0x3, 3238 .ver_major = 0x3,
@@ -3269,12 +3255,10 @@ static struct fw_info bnx2_tpat_fw_09 = {
3269 .sbss_addr = 0x08002088, 3255 .sbss_addr = 0x08002088,
3270 .sbss_len = 0x2c, 3256 .sbss_len = 0x2c,
3271 .sbss_index = 0x0, 3257 .sbss_index = 0x0,
3272 .sbss = bnx2_TPAT_b09FwSbss,
3273 3258
3274 .bss_addr = 0x080020c0, 3259 .bss_addr = 0x080020c0,
3275 .bss_len = 0x850, 3260 .bss_len = 0x850,
3276 .bss_index = 0x0, 3261 .bss_index = 0x0,
3277 .bss = bnx2_TPAT_b09FwBss,
3278 3262
3279 .rodata_addr = 0x00000000, 3263 .rodata_addr = 0x00000000,
3280 .rodata_len = 0x0, 3264 .rodata_len = 0x0,
@@ -4060,8 +4044,6 @@ static const u32 bnx2_TXP_b09FwRodata[(0x30/4) + 1] = {
4060 0x08004060, 0x0800408c, 0x080040d4, 0x080040d4, 0x08003f60, 0x08003f8c, 4044 0x08004060, 0x0800408c, 0x080040d4, 0x080040d4, 0x08003f60, 0x08003f8c,
4061 0x08003f8c, 0x080040d4, 0x080040d4, 0x080040d4, 0x08003ff4, 0x00000000, 4045 0x08003f8c, 0x080040d4, 0x080040d4, 0x080040d4, 0x08003ff4, 0x00000000,
4062 0x00000000 }; 4046 0x00000000 };
4063static const u32 bnx2_TXP_b09FwBss[(0xa20/4) + 1] = { 0x0 };
4064static const u32 bnx2_TXP_b09FwSbss[(0x8c/4) + 1] = { 0x0 };
4065 4047
4066static struct fw_info bnx2_txp_fw_09 = { 4048static struct fw_info bnx2_txp_fw_09 = {
4067 .ver_major = 0x3, 4049 .ver_major = 0x3,
@@ -4084,12 +4066,10 @@ static struct fw_info bnx2_txp_fw_09 = {
4084 .sbss_addr = 0x08004750, 4066 .sbss_addr = 0x08004750,
4085 .sbss_len = 0x8c, 4067 .sbss_len = 0x8c,
4086 .sbss_index = 0x0, 4068 .sbss_index = 0x0,
4087 .sbss = bnx2_TXP_b09FwSbss,
4088 4069
4089 .bss_addr = 0x080047e0, 4070 .bss_addr = 0x080047e0,
4090 .bss_len = 0xa20, 4071 .bss_len = 0xa20,
4091 .bss_index = 0x0, 4072 .bss_index = 0x0,
4092 .bss = bnx2_TXP_b09FwBss,
4093 4073
4094 .rodata_addr = 0x08004638, 4074 .rodata_addr = 0x08004638,
4095 .rodata_len = 0x30, 4075 .rodata_len = 0x30,