diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2010-03-11 00:33:25 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-03-17 00:24:06 -0400 |
| commit | d6ccb1f55ddf5146219707c0e71b85e3a52179b4 (patch) | |
| tree | 467582a2eabfedfcfd37ed2a02e6f00899c6937d | |
| parent | 30124d11097e371e42052144d8a3f4a78d26e09f (diff) | |
powerpc/85xx: Make sure lwarx hint isn't set on ppc32
e500v1/v2 based chips will treat any reserved field being set in an
opcode as illegal. Thus always setting the hint in the opcode is
a bad idea.
Anton should be kept away from the powerpc opcode map.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index aea714797590..d553bbeb726c 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
| @@ -25,7 +25,7 @@ | |||
| 25 | #define PPC_INST_LDARX 0x7c0000a8 | 25 | #define PPC_INST_LDARX 0x7c0000a8 |
| 26 | #define PPC_INST_LSWI 0x7c0004aa | 26 | #define PPC_INST_LSWI 0x7c0004aa |
| 27 | #define PPC_INST_LSWX 0x7c00042a | 27 | #define PPC_INST_LSWX 0x7c00042a |
| 28 | #define PPC_INST_LWARX 0x7c000029 | 28 | #define PPC_INST_LWARX 0x7c000028 |
| 29 | #define PPC_INST_LWSYNC 0x7c2004ac | 29 | #define PPC_INST_LWSYNC 0x7c2004ac |
| 30 | #define PPC_INST_LXVD2X 0x7c000698 | 30 | #define PPC_INST_LXVD2X 0x7c000698 |
| 31 | #define PPC_INST_MCRXR 0x7c000400 | 31 | #define PPC_INST_MCRXR 0x7c000400 |
| @@ -62,8 +62,8 @@ | |||
| 62 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) | 62 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) |
| 63 | #define __PPC_WC(w) (((w) & 0x3) << 21) | 63 | #define __PPC_WC(w) (((w) & 0x3) << 21) |
| 64 | /* | 64 | /* |
| 65 | * Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have | 65 | * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a |
| 66 | * any side effects on all 32bit processors, we can do this all the time. | 66 | * larx with EH set as an illegal instruction. |
| 67 | */ | 67 | */ |
| 68 | #ifdef CONFIG_PPC64 | 68 | #ifdef CONFIG_PPC64 |
| 69 | #define __PPC_EH(eh) (((eh) & 0x1) << 0) | 69 | #define __PPC_EH(eh) (((eh) & 0x1) << 0) |
