diff options
author | Ishizaki Kou <kou.ishizaki@toshiba.co.jp> | 2007-05-09 03:34:08 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-05-10 07:28:12 -0400 |
commit | d1af5b4ea970d8cccdacf243ae42899f3784ad85 (patch) | |
tree | da096a38fb579699086c2dbe8f7329379ebd7fe2 | |
parent | ab5570f093585a124cd440f5229393e36c5d600e (diff) |
[POWERPC] celleb: Fix support for multiple PCI domains
Celleb has multiple PCI host bridges (phbs). Previous boot logic gives
non-overlapped bus IDs between PCI host bridges so you can identify
PHB by bus ID. But newer boot logic gives same bus ID between PHBs (it
gives bus ID 0 as root bus.) So we have to set 'phb->buid' as
non-zero.
Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/powerpc/platforms/celleb/pci.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/celleb/pci.c b/arch/powerpc/platforms/celleb/pci.c index d1adf34cd5e8..e9ac19c4bba4 100644 --- a/arch/powerpc/platforms/celleb/pci.c +++ b/arch/powerpc/platforms/celleb/pci.c | |||
@@ -457,6 +457,7 @@ int __devinit celleb_setup_phb(struct pci_controller *phb) | |||
457 | 457 | ||
458 | pr_debug("PCI: celleb_setup_phb() %s\n", name); | 458 | pr_debug("PCI: celleb_setup_phb() %s\n", name); |
459 | phb_set_bus_ranges(dev, phb); | 459 | phb_set_bus_ranges(dev, phb); |
460 | phb->buid = 1; | ||
460 | 461 | ||
461 | if (strcmp(name, "epci") == 0) { | 462 | if (strcmp(name, "epci") == 0) { |
462 | phb->ops = &celleb_epci_ops; | 463 | phb->ops = &celleb_epci_ops; |