edac: add DDR3 memory type for MPC85xx EDAC

Since some new MPC85xx SOCs support DDR3 memory now, so add DDR3 memory
type for MPC85xx EDAC.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

4 files changed, 14 insertions, 1 deletions

diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h
index 3493c6bdb820..871c13b4c148 100644
--- a/drivers/edac/edac_core.h
+++ b/drivers/edac/edac_core.h
@@ -150,6 +150,8 @@ enum mem_type {
         MEM_FB_DDR2,            /* fully buffered DDR2 */
         MEM_RDDR2,              /* Registered DDR2 RAM */
         MEM_XDR,                /* Rambus XDR */
+        MEM_DDR3,               /* DDR3 RAM */
+        MEM_RDDR3,              /* Registered DDR3 RAM */
 };
 
 #define MEM_FLAG_EMPTY          BIT(MEM_EMPTY)
@@ -167,6 +169,8 @@ enum mem_type {
 #define MEM_FLAG_FB_DDR2        BIT(MEM_FB_DDR2)
 #define MEM_FLAG_RDDR2          BIT(MEM_RDDR2)
 #define MEM_FLAG_XDR            BIT(MEM_XDR)
+#define MEM_FLAG_DDR3            BIT(MEM_DDR3)
+#define MEM_FLAG_RDDR3           BIT(MEM_RDDR3)
 
 /* chipset Error Detection and Correction capabilities and mode */
 enum edac_type {
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index ad218fe4942d..e1d4ce083481 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -94,7 +94,9 @@ static const char *mem_types[] = {
         [MEM_DDR2] = "Unbuffered-DDR2",
         [MEM_FB_DDR2] = "FullyBuffered-DDR2",
         [MEM_RDDR2] = "Registered-DDR2",
-        [MEM_XDR] = "XDR"
+        [MEM_XDR] = "XDR",
+        [MEM_DDR3] = "Unbuffered-DDR3",
+        [MEM_RDDR3] = "Registered-DDR3"
 };
 
 static const char *dev_types[] = {
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 7c8c2d72916f..3f2ccfc6407c 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -757,6 +757,9 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
                 case DSC_SDTYPE_DDR2:
                         mtype = MEM_RDDR2;
                         break;
+                case DSC_SDTYPE_DDR3:
+                        mtype = MEM_RDDR3;
+                        break;
                 default:
                         mtype = MEM_UNKNOWN;
                         break;
@@ -769,6 +772,9 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
                 case DSC_SDTYPE_DDR2:
                         mtype = MEM_DDR2;
                         break;
+                case DSC_SDTYPE_DDR3:
+                        mtype = MEM_DDR3;
+                        break;
                 default:
                         mtype = MEM_UNKNOWN;
                         break;
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h
index 135b3539a030..52432ee7c4b9 100644
--- a/drivers/edac/mpc85xx_edac.h
+++ b/drivers/edac/mpc85xx_edac.h
@@ -53,6 +53,7 @@
 
 #define DSC_SDTYPE_DDR          0x02000000
 #define DSC_SDTYPE_DDR2         0x03000000
+#define DSC_SDTYPE_DDR3         0x07000000
 #define DSC_X32_EN      0x00000020
 
 /* Err_Int_En */